diff --git a/Drivers/CMSIS/Core/Include/cachel1_armv7.h b/Drivers/CMSIS/Core/Include/cachel1_armv7.h deleted file mode 100644 index 9f4c4d7..0000000 --- a/Drivers/CMSIS/Core/Include/cachel1_armv7.h +++ /dev/null @@ -1,411 +0,0 @@ -/****************************************************************************** - * @file cachel1_armv7.h - * @brief CMSIS Level 1 Cache API for Armv7-M and later - * @version V1.0.1 - * @date 19. April 2021 - ******************************************************************************/ -/* - * Copyright (c) 2020-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef ARM_CACHEL1_ARMV7_H -#define ARM_CACHEL1_ARMV7_H - -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_CacheFunctions Cache Functions - \brief Functions that configure Instruction and Data cache. - @{ - */ - -/* Cache Size ID Register Macros */ -#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos) -#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos ) - -#ifndef __SCB_DCACHE_LINE_SIZE -#define __SCB_DCACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */ -#endif - -#ifndef __SCB_ICACHE_LINE_SIZE -#define __SCB_ICACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */ -#endif - -/** - \brief Enable I-Cache - \details Turns on I-Cache - */ -__STATIC_FORCEINLINE void SCB_EnableICache (void) -{ - #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) - if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */ - - __DSB(); - __ISB(); - SCB->ICIALLU = 0UL; /* invalidate I-Cache */ - __DSB(); - __ISB(); - SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */ - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Disable I-Cache - \details Turns off I-Cache - */ -__STATIC_FORCEINLINE void SCB_DisableICache (void) -{ - #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) - __DSB(); - __ISB(); - SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */ - SCB->ICIALLU = 0UL; /* invalidate I-Cache */ - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Invalidate I-Cache - \details Invalidates I-Cache - */ -__STATIC_FORCEINLINE void SCB_InvalidateICache (void) -{ - #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) - __DSB(); - __ISB(); - SCB->ICIALLU = 0UL; - __DSB(); - __ISB(); - #endif -} - - -/** - \brief I-Cache Invalidate by address - \details Invalidates I-Cache for the given address. - I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity. - I-Cache memory blocks which are part of given address + given size are invalidated. - \param[in] addr address - \param[in] isize size of memory block (in number of bytes) -*/ -__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (volatile void *addr, int32_t isize) -{ - #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) - if ( isize > 0 ) { - int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); - uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */; - - __DSB(); - - do { - SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ - op_addr += __SCB_ICACHE_LINE_SIZE; - op_size -= __SCB_ICACHE_LINE_SIZE; - } while ( op_size > 0 ); - - __DSB(); - __ISB(); - } - #endif -} - - -/** - \brief Enable D-Cache - \details Turns on D-Cache - */ -__STATIC_FORCEINLINE void SCB_EnableDCache (void) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */ - - SCB->CSSELR = 0U; /* select Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | - ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways-- != 0U); - } while(sets-- != 0U); - __DSB(); - - SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */ - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Disable D-Cache - \details Turns off D-Cache - */ -__STATIC_FORCEINLINE void SCB_DisableDCache (void) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = 0U; /* select Level 1 data cache */ - __DSB(); - - SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* clean & invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | - ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways-- != 0U); - } while(sets-- != 0U); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Invalidate D-Cache - \details Invalidates D-Cache - */ -__STATIC_FORCEINLINE void SCB_InvalidateDCache (void) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = 0U; /* select Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | - ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways-- != 0U); - } while(sets-- != 0U); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Clean D-Cache - \details Cleans D-Cache - */ -__STATIC_FORCEINLINE void SCB_CleanDCache (void) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = 0U; /* select Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* clean D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) | - ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways-- != 0U); - } while(sets-- != 0U); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Clean & Invalidate D-Cache - \details Cleans and Invalidates D-Cache - */ -__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = 0U; /* select Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* clean & invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | - ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways-- != 0U); - } while(sets-- != 0U); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief D-Cache Invalidate by address - \details Invalidates D-Cache for the given address. - D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity. - D-Cache memory blocks which are part of given address + given size are invalidated. - \param[in] addr address - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (volatile void *addr, int32_t dsize) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - if ( dsize > 0 ) { - int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); - uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - - __DSB(); - - do { - SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ - op_addr += __SCB_DCACHE_LINE_SIZE; - op_size -= __SCB_DCACHE_LINE_SIZE; - } while ( op_size > 0 ); - - __DSB(); - __ISB(); - } - #endif -} - - -/** - \brief D-Cache Clean by address - \details Cleans D-Cache for the given address - D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity. - D-Cache memory blocks which are part of given address + given size are cleaned. - \param[in] addr address - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (volatile void *addr, int32_t dsize) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - if ( dsize > 0 ) { - int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); - uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - - __DSB(); - - do { - SCB->DCCMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ - op_addr += __SCB_DCACHE_LINE_SIZE; - op_size -= __SCB_DCACHE_LINE_SIZE; - } while ( op_size > 0 ); - - __DSB(); - __ISB(); - } - #endif -} - - -/** - \brief D-Cache Clean and Invalidate by address - \details Cleans and invalidates D_Cache for the given address - D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity. - D-Cache memory blocks which are part of given address + given size are cleaned and invalidated. - \param[in] addr address (aligned to 32-byte boundary) - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (volatile void *addr, int32_t dsize) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - if ( dsize > 0 ) { - int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); - uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - - __DSB(); - - do { - SCB->DCCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ - op_addr += __SCB_DCACHE_LINE_SIZE; - op_size -= __SCB_DCACHE_LINE_SIZE; - } while ( op_size > 0 ); - - __DSB(); - __ISB(); - } - #endif -} - -/*@} end of CMSIS_Core_CacheFunctions */ - -#endif /* ARM_CACHEL1_ARMV7_H */ diff --git a/Drivers/CMSIS/Core/Include/cmsis_armcc.h b/Drivers/CMSIS/Core/Include/cmsis_armcc.h deleted file mode 100644 index a2ad65f..0000000 --- a/Drivers/CMSIS/Core/Include/cmsis_armcc.h +++ /dev/null @@ -1,888 +0,0 @@ -/**************************************************************************//** - * @file cmsis_armcc.h - * @brief CMSIS compiler ARMCC (Arm Compiler 5) header file - * @version V5.3.2 - * @date 27. May 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_ARMCC_H -#define __CMSIS_ARMCC_H - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677) - #error "Please use Arm Compiler Toolchain V4.0.677 or later!" -#endif - -/* CMSIS compiler control architecture macros */ -#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \ - (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) ) - #define __ARM_ARCH_6M__ 1 -#endif - -#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1)) - #define __ARM_ARCH_7M__ 1 -#endif - -#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1)) - #define __ARM_ARCH_7EM__ 1 -#endif - - /* __ARM_ARCH_8M_BASE__ not applicable */ - /* __ARM_ARCH_8M_MAIN__ not applicable */ - /* __ARM_ARCH_8_1M_MAIN__ not applicable */ - -/* CMSIS compiler control DSP macros */ -#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) - #define __ARM_FEATURE_DSP 1 -#endif - -/* CMSIS compiler specific defines */ -#ifndef __ASM - #define __ASM __asm -#endif -#ifndef __INLINE - #define __INLINE __inline -#endif -#ifndef __STATIC_INLINE - #define __STATIC_INLINE static __inline -#endif -#ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE static __forceinline -#endif -#ifndef __NO_RETURN - #define __NO_RETURN __declspec(noreturn) -#endif -#ifndef __USED - #define __USED __attribute__((used)) -#endif -#ifndef __WEAK - #define __WEAK __attribute__((weak)) -#endif -#ifndef __PACKED - #define __PACKED __attribute__((packed)) -#endif -#ifndef __PACKED_STRUCT - #define __PACKED_STRUCT __packed struct -#endif -#ifndef __PACKED_UNION - #define __PACKED_UNION __packed union -#endif -#ifndef __UNALIGNED_UINT32 /* deprecated */ - #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x))) -#endif -#ifndef __UNALIGNED_UINT16_WRITE - #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val)) -#endif -#ifndef __UNALIGNED_UINT16_READ - #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr))) -#endif -#ifndef __UNALIGNED_UINT32_WRITE - #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val)) -#endif -#ifndef __UNALIGNED_UINT32_READ - #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr))) -#endif -#ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) -#endif -#ifndef __RESTRICT - #define __RESTRICT __restrict -#endif -#ifndef __COMPILER_BARRIER - #define __COMPILER_BARRIER() __memory_changed() -#endif - -/* ######################### Startup and Lowlevel Init ######################## */ - -#ifndef __PROGRAM_START -#define __PROGRAM_START __main -#endif - -#ifndef __INITIAL_SP -#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit -#endif - -#ifndef __STACK_LIMIT -#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base -#endif - -#ifndef __VECTOR_TABLE -#define __VECTOR_TABLE __Vectors -#endif - -#ifndef __VECTOR_TABLE_ATTRIBUTE -#define __VECTOR_TABLE_ATTRIBUTE __attribute__((used, section("RESET"))) -#endif - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/** - \brief No Operation - \details No Operation does nothing. This instruction can be used for code alignment purposes. - */ -#define __NOP __nop - - -/** - \brief Wait For Interrupt - \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. - */ -#define __WFI __wfi - - -/** - \brief Wait For Event - \details Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -#define __WFE __wfe - - -/** - \brief Send Event - \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -#define __SEV __sev - - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -#define __ISB() __isb(0xF) - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -#define __DSB() __dsb(0xF) - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -#define __DMB() __dmb(0xF) - - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV __rev - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. - \param [in] value Value to reverse - \return Reversed value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) -{ - rev16 r0, r0 - bx lr -} -#endif - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. - \param [in] value Value to reverse - \return Reversed value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value) -{ - revsh r0, r0 - bx lr -} -#endif - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] op1 Value to rotate - \param [in] op2 Number of Bits to rotate - \return Rotated value - */ -#define __ROR __ror - - -/** - \brief Breakpoint - \details Causes the processor to enter Debug state. - Debug tools can use this to investigate system state when the instruction at a particular address is reached. - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __breakpoint(value) - - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) - #define __RBIT __rbit -#else -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) -{ - uint32_t result; - uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ - - result = value; /* r will be reversed bits of v; first get LSB of v */ - for (value >>= 1U; value != 0U; value >>= 1U) - { - result <<= 1U; - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ - return result; -} -#endif - - -/** - \brief Count leading zeros - \details Counts the number of leading zeros of a data value. - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -#define __CLZ __clz - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) -#else - #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") -#endif - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) -#else - #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") -#endif - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) -#else - #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") -#endif - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXB(value, ptr) __strex(value, ptr) -#else - #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXH(value, ptr) __strex(value, ptr) -#else - #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXW(value, ptr) __strex(value, ptr) -#else - #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -#define __CLREX __clrex - - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT __ssat - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT __usat - - -/** - \brief Rotate Right with Extend (32 bit) - \details Moves each bit of a bitstring right by one bit. - The carry input is shifted in at the left end of the bitstring. - \param [in] value Value to rotate - \return Rotated value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value) -{ - rrx r0, r0 - bx lr -} -#endif - - -/** - \brief LDRT Unprivileged (8 bit) - \details Executes a Unprivileged LDRT instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr)) - - -/** - \brief LDRT Unprivileged (16 bit) - \details Executes a Unprivileged LDRT instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr)) - - -/** - \brief LDRT Unprivileged (32 bit) - \details Executes a Unprivileged LDRT instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr)) - - -/** - \brief STRT Unprivileged (8 bit) - \details Executes a Unprivileged STRT instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -#define __STRBT(value, ptr) __strt(value, ptr) - - -/** - \brief STRT Unprivileged (16 bit) - \details Executes a Unprivileged STRT instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -#define __STRHT(value, ptr) __strt(value, ptr) - - -/** - \brief STRT Unprivileged (32 bit) - \details Executes a Unprivileged STRT instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -#define __STRT(value, ptr) __strt(value, ptr) - -#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) -{ - if ((sat >= 1U) && (sat <= 32U)) - { - const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); - const int32_t min = -1 - max ; - if (val > max) - { - return max; - } - else if (val < min) - { - return min; - } - } - return val; -} - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) -{ - if (sat <= 31U) - { - const uint32_t max = ((1U << sat) - 1U); - if (val > (int32_t)max) - { - return max; - } - else if (val < 0) - { - return 0U; - } - } - return (uint32_t)val; -} - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ - */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing special-purpose register PRIMASK. - Can only be executed in Privileged modes. - */ -/* intrinsic void __enable_irq(); */ - - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting special-purpose register PRIMASK. - Can only be executed in Privileged modes. - */ -/* intrinsic void __disable_irq(); */ - -/** - \brief Get Control Register - \details Returns the content of the Control Register. - \return Control Register value - */ -__STATIC_INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - - -/** - \brief Set Control Register - \details Writes the given value to the Control Register. - \param [in] control Control Register value to set - */ -__STATIC_INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; - __ISB(); -} - - -/** - \brief Get IPSR Register - \details Returns the content of the IPSR Register. - \return IPSR Register value - */ -__STATIC_INLINE uint32_t __get_IPSR(void) -{ - register uint32_t __regIPSR __ASM("ipsr"); - return(__regIPSR); -} - - -/** - \brief Get APSR Register - \details Returns the content of the APSR Register. - \return APSR Register value - */ -__STATIC_INLINE uint32_t __get_APSR(void) -{ - register uint32_t __regAPSR __ASM("apsr"); - return(__regAPSR); -} - - -/** - \brief Get xPSR Register - \details Returns the content of the xPSR Register. - \return xPSR Register value - */ -__STATIC_INLINE uint32_t __get_xPSR(void) -{ - register uint32_t __regXPSR __ASM("xpsr"); - return(__regXPSR); -} - - -/** - \brief Get Process Stack Pointer - \details Returns the current value of the Process Stack Pointer (PSP). - \return PSP Register value - */ -__STATIC_INLINE uint32_t __get_PSP(void) -{ - register uint32_t __regProcessStackPointer __ASM("psp"); - return(__regProcessStackPointer); -} - - -/** - \brief Set Process Stack Pointer - \details Assigns the given value to the Process Stack Pointer (PSP). - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) -{ - register uint32_t __regProcessStackPointer __ASM("psp"); - __regProcessStackPointer = topOfProcStack; -} - - -/** - \brief Get Main Stack Pointer - \details Returns the current value of the Main Stack Pointer (MSP). - \return MSP Register value - */ -__STATIC_INLINE uint32_t __get_MSP(void) -{ - register uint32_t __regMainStackPointer __ASM("msp"); - return(__regMainStackPointer); -} - - -/** - \brief Set Main Stack Pointer - \details Assigns the given value to the Main Stack Pointer (MSP). - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) -{ - register uint32_t __regMainStackPointer __ASM("msp"); - __regMainStackPointer = topOfMainStack; -} - - -/** - \brief Get Priority Mask - \details Returns the current state of the priority mask bit from the Priority Mask Register. - \return Priority Mask value - */ -__STATIC_INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - - -/** - \brief Set Priority Mask - \details Assigns the given value to the Priority Mask Register. - \param [in] priMask Priority Mask - */ -__STATIC_INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) - -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing special-purpose register FAULTMASK. - Can only be executed in Privileged modes. - */ -#define __enable_fault_irq __enable_fiq - - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting special-purpose register FAULTMASK. - Can only be executed in Privileged modes. - */ -#define __disable_fault_irq __disable_fiq - - -/** - \brief Get Base Priority - \details Returns the current value of the Base Priority register. - \return Base Priority register value - */ -__STATIC_INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - - -/** - \brief Set Base Priority - \details Assigns the given value to the Base Priority register. - \param [in] basePri Base Priority value to set - */ -__STATIC_INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0xFFU); -} - - -/** - \brief Set Base Priority with condition - \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri) -{ - register uint32_t __regBasePriMax __ASM("basepri_max"); - __regBasePriMax = (basePri & 0xFFU); -} - - -/** - \brief Get Fault Mask - \details Returns the current value of the Fault Mask register. - \return Fault Mask register value - */ -__STATIC_INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - - -/** - \brief Set Fault Mask - \details Assigns the given value to the Fault Mask register. - \param [in] faultMask Fault Mask value to set - */ -__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & (uint32_t)1U); -} - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ - - -/** - \brief Get FPSCR - \details Returns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -__STATIC_INLINE uint32_t __get_FPSCR(void) -{ -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) - register uint32_t __regfpscr __ASM("fpscr"); - return(__regfpscr); -#else - return(0U); -#endif -} - - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -__STATIC_INLINE void __set_FPSCR(uint32_t fpscr) -{ -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) - register uint32_t __regfpscr __ASM("fpscr"); - __regfpscr = (fpscr); -#else - (void)fpscr; -#endif -} - - -/*@} end of CMSIS_Core_RegAccFunctions */ - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) - -#define __SADD8 __sadd8 -#define __QADD8 __qadd8 -#define __SHADD8 __shadd8 -#define __UADD8 __uadd8 -#define __UQADD8 __uqadd8 -#define __UHADD8 __uhadd8 -#define __SSUB8 __ssub8 -#define __QSUB8 __qsub8 -#define __SHSUB8 __shsub8 -#define __USUB8 __usub8 -#define __UQSUB8 __uqsub8 -#define __UHSUB8 __uhsub8 -#define __SADD16 __sadd16 -#define __QADD16 __qadd16 -#define __SHADD16 __shadd16 -#define __UADD16 __uadd16 -#define __UQADD16 __uqadd16 -#define __UHADD16 __uhadd16 -#define __SSUB16 __ssub16 -#define __QSUB16 __qsub16 -#define __SHSUB16 __shsub16 -#define __USUB16 __usub16 -#define __UQSUB16 __uqsub16 -#define __UHSUB16 __uhsub16 -#define __SASX __sasx -#define __QASX __qasx -#define __SHASX __shasx -#define __UASX __uasx -#define __UQASX __uqasx -#define __UHASX __uhasx -#define __SSAX __ssax -#define __QSAX __qsax -#define __SHSAX __shsax -#define __USAX __usax -#define __UQSAX __uqsax -#define __UHSAX __uhsax -#define __USAD8 __usad8 -#define __USADA8 __usada8 -#define __SSAT16 __ssat16 -#define __USAT16 __usat16 -#define __UXTB16 __uxtb16 -#define __UXTAB16 __uxtab16 -#define __SXTB16 __sxtb16 -#define __SXTAB16 __sxtab16 -#define __SMUAD __smuad -#define __SMUADX __smuadx -#define __SMLAD __smlad -#define __SMLADX __smladx -#define __SMLALD __smlald -#define __SMLALDX __smlaldx -#define __SMUSD __smusd -#define __SMUSDX __smusdx -#define __SMLSD __smlsd -#define __SMLSDX __smlsdx -#define __SMLSLD __smlsld -#define __SMLSLDX __smlsldx -#define __SEL __sel -#define __QADD __qadd -#define __QSUB __qsub - -#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ - ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) - -#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ - ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) - -#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \ - ((int64_t)(ARG3) << 32U) ) >> 32U)) - -#define __SXTB16_RORn(ARG1, ARG2) __SXTB16(__ROR(ARG1, ARG2)) - -#define __SXTAB16_RORn(ARG1, ARG2, ARG3) __SXTAB16(ARG1, __ROR(ARG2, ARG3)) - -#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#endif /* __CMSIS_ARMCC_H */ diff --git a/Drivers/CMSIS/Core/Include/cmsis_armclang.h b/Drivers/CMSIS/Core/Include/cmsis_armclang.h deleted file mode 100644 index 74bc4a2..0000000 --- a/Drivers/CMSIS/Core/Include/cmsis_armclang.h +++ /dev/null @@ -1,1503 +0,0 @@ -/**************************************************************************//** - * @file cmsis_armclang.h - * @brief CMSIS compiler armclang (Arm Compiler 6) header file - * @version V5.4.3 - * @date 27. May 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */ - -#ifndef __CMSIS_ARMCLANG_H -#define __CMSIS_ARMCLANG_H - -#pragma clang system_header /* treat file as system include file */ - -/* CMSIS compiler specific defines */ -#ifndef __ASM - #define __ASM __asm -#endif -#ifndef __INLINE - #define __INLINE __inline -#endif -#ifndef __STATIC_INLINE - #define __STATIC_INLINE static __inline -#endif -#ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline -#endif -#ifndef __NO_RETURN - #define __NO_RETURN __attribute__((__noreturn__)) -#endif -#ifndef __USED - #define __USED __attribute__((used)) -#endif -#ifndef __WEAK - #define __WEAK __attribute__((weak)) -#endif -#ifndef __PACKED - #define __PACKED __attribute__((packed, aligned(1))) -#endif -#ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) -#endif -#ifndef __PACKED_UNION - #define __PACKED_UNION union __attribute__((packed, aligned(1))) -#endif -#ifndef __UNALIGNED_UINT32 /* deprecated */ - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */ - struct __attribute__((packed)) T_UINT32 { uint32_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) -#endif -#ifndef __UNALIGNED_UINT16_WRITE - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */ - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) -#endif -#ifndef __UNALIGNED_UINT16_READ - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */ - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) -#endif -#ifndef __UNALIGNED_UINT32_WRITE - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */ - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) -#endif -#ifndef __UNALIGNED_UINT32_READ - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */ - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) -#endif -#ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) -#endif -#ifndef __RESTRICT - #define __RESTRICT __restrict -#endif -#ifndef __COMPILER_BARRIER - #define __COMPILER_BARRIER() __ASM volatile("":::"memory") -#endif - -/* ######################### Startup and Lowlevel Init ######################## */ - -#ifndef __PROGRAM_START -#define __PROGRAM_START __main -#endif - -#ifndef __INITIAL_SP -#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit -#endif - -#ifndef __STACK_LIMIT -#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base -#endif - -#ifndef __VECTOR_TABLE -#define __VECTOR_TABLE __Vectors -#endif - -#ifndef __VECTOR_TABLE_ATTRIBUTE -#define __VECTOR_TABLE_ATTRIBUTE __attribute__((used, section("RESET"))) -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -#ifndef __STACK_SEAL -#define __STACK_SEAL Image$$STACKSEAL$$ZI$$Base -#endif - -#ifndef __TZ_STACK_SEAL_SIZE -#define __TZ_STACK_SEAL_SIZE 8U -#endif - -#ifndef __TZ_STACK_SEAL_VALUE -#define __TZ_STACK_SEAL_VALUE 0xFEF5EDA5FEF5EDA5ULL -#endif - - -__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) { - *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE; -} -#endif - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/* Define macros for porting to both thumb1 and thumb2. - * For thumb1, use low register (r0-r7), specified by constraint "l" - * Otherwise, use general registers, specified by constraint "r" */ -#if defined (__thumb__) && !defined (__thumb2__) -#define __CMSIS_GCC_OUT_REG(r) "=l" (r) -#define __CMSIS_GCC_RW_REG(r) "+l" (r) -#define __CMSIS_GCC_USE_REG(r) "l" (r) -#else -#define __CMSIS_GCC_OUT_REG(r) "=r" (r) -#define __CMSIS_GCC_RW_REG(r) "+r" (r) -#define __CMSIS_GCC_USE_REG(r) "r" (r) -#endif - -/** - \brief No Operation - \details No Operation does nothing. This instruction can be used for code alignment purposes. - */ -#define __NOP __builtin_arm_nop - -/** - \brief Wait For Interrupt - \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. - */ -#define __WFI __builtin_arm_wfi - - -/** - \brief Wait For Event - \details Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -#define __WFE __builtin_arm_wfe - - -/** - \brief Send Event - \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -#define __SEV __builtin_arm_sev - - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -#define __ISB() __builtin_arm_isb(0xF) - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -#define __DSB() __builtin_arm_dsb(0xF) - - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -#define __DMB() __builtin_arm_dmb(0xF) - - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV(value) __builtin_bswap32(value) - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV16(value) __ROR(__REV(value), 16) - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REVSH(value) (int16_t)__builtin_bswap16(value) - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] op1 Value to rotate - \param [in] op2 Number of Bits to rotate - \return Rotated value - */ -__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) -{ - op2 %= 32U; - if (op2 == 0U) - { - return op1; - } - return (op1 >> op2) | (op1 << (32U - op2)); -} - - -/** - \brief Breakpoint - \details Causes the processor to enter Debug state. - Debug tools can use this to investigate system state when the instruction at a particular address is reached. - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __ASM volatile ("bkpt "#value) - - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ -#define __RBIT __builtin_arm_rbit - -/** - \brief Count leading zeros - \details Counts the number of leading zeros of a data value. - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) -{ - /* Even though __builtin_clz produces a CLZ instruction on ARM, formally - __builtin_clz(0) is undefined behaviour, so handle this case specially. - This guarantees ARM-compatible results if happening to compile on a non-ARM - target, and ensures the compiler doesn't decide to activate any - optimisations using the logic "value was passed to __builtin_clz, so it - is non-zero". - ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a - single CLZ instruction. - */ - if (value == 0U) - { - return 32U; - } - return __builtin_clz(value); -} - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDREXB (uint8_t)__builtin_arm_ldrex - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDREXH (uint16_t)__builtin_arm_ldrex - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDREXW (uint32_t)__builtin_arm_ldrex - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXB (uint32_t)__builtin_arm_strex - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXH (uint32_t)__builtin_arm_strex - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXW (uint32_t)__builtin_arm_strex - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -#define __CLREX __builtin_arm_clrex - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) */ - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT __builtin_arm_ssat - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT __builtin_arm_usat - - -/** - \brief Rotate Right with Extend (32 bit) - \details Moves each bit of a bitstring right by one bit. - The carry input is shifted in at the left end of the bitstring. - \param [in] value Value to rotate - \return Rotated value - */ -__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief LDRT Unprivileged (8 bit) - \details Executes a Unprivileged LDRT instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (16 bit) - \details Executes a Unprivileged LDRT instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (32 bit) - \details Executes a Unprivileged LDRT instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); - return(result); -} - - -/** - \brief STRT Unprivileged (8 bit) - \details Executes a Unprivileged STRT instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) -{ - __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (16 bit) - \details Executes a Unprivileged STRT instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) -{ - __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (32 bit) - \details Executes a Unprivileged STRT instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) -{ - __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); -} - -#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) */ - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) -{ - if ((sat >= 1U) && (sat <= 32U)) - { - const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); - const int32_t min = -1 - max ; - if (val > max) - { - return max; - } - else if (val < min) - { - return min; - } - } - return val; -} - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) -{ - if (sat <= 31U) - { - const uint32_t max = ((1U << sat) - 1U); - if (val > (int32_t)max) - { - return max; - } - else if (val < 0) - { - return 0U; - } - } - return (uint32_t)val; -} - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) */ - - -#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) - -/** - \brief Load-Acquire (8 bit) - \details Executes a LDAB instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return ((uint8_t) result); -} - - -/** - \brief Load-Acquire (16 bit) - \details Executes a LDAH instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return ((uint16_t) result); -} - - -/** - \brief Load-Acquire (32 bit) - \details Executes a LDA instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return(result); -} - - -/** - \brief Store-Release (8 bit) - \details Executes a STLB instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) -{ - __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); -} - - -/** - \brief Store-Release (16 bit) - \details Executes a STLH instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) -{ - __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); -} - - -/** - \brief Store-Release (32 bit) - \details Executes a STL instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) -{ - __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); -} - - -/** - \brief Load-Acquire Exclusive (8 bit) - \details Executes a LDAB exclusive instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDAEXB (uint8_t)__builtin_arm_ldaex - - -/** - \brief Load-Acquire Exclusive (16 bit) - \details Executes a LDAH exclusive instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDAEXH (uint16_t)__builtin_arm_ldaex - - -/** - \brief Load-Acquire Exclusive (32 bit) - \details Executes a LDA exclusive instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDAEX (uint32_t)__builtin_arm_ldaex - - -/** - \brief Store-Release Exclusive (8 bit) - \details Executes a STLB exclusive instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEXB (uint32_t)__builtin_arm_stlex - - -/** - \brief Store-Release Exclusive (16 bit) - \details Executes a STLH exclusive instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEXH (uint32_t)__builtin_arm_stlex - - -/** - \brief Store-Release Exclusive (32 bit) - \details Executes a STL exclusive instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEX (uint32_t)__builtin_arm_stlex - -#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) */ - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ - */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing special-purpose register PRIMASK. - Can only be executed in Privileged modes. - */ -#ifndef __ARM_COMPAT_H -__STATIC_FORCEINLINE void __enable_irq(void) -{ - __ASM volatile ("cpsie i" : : : "memory"); -} -#endif - - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting special-purpose register PRIMASK. - Can only be executed in Privileged modes. - */ -#ifndef __ARM_COMPAT_H -__STATIC_FORCEINLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); -} -#endif - - -/** - \brief Get Control Register - \details Returns the content of the Control Register. - \return Control Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CONTROL(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Control Register (non-secure) - \details Returns the content of the non-secure Control Register when in secure mode. - \return non-secure Control Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Control Register - \details Writes the given value to the Control Register. - \param [in] control Control Register value to set - */ -__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); - __ISB(); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Control Register (non-secure) - \details Writes the given value to the non-secure Control Register when in secure state. - \param [in] control Control Register value to set - */ -__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) -{ - __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); - __ISB(); -} -#endif - - -/** - \brief Get IPSR Register - \details Returns the content of the IPSR Register. - \return IPSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_IPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get APSR Register - \details Returns the content of the APSR Register. - \return APSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_APSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, apsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get xPSR Register - \details Returns the content of the xPSR Register. - \return xPSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_xPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get Process Stack Pointer - \details Returns the current value of the Process Stack Pointer (PSP). - \return PSP Register value - */ -__STATIC_FORCEINLINE uint32_t __get_PSP(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, psp" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Process Stack Pointer (non-secure) - \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. - \return PSP Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Process Stack Pointer - \details Assigns the given value to the Process Stack Pointer (PSP). - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Process Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state. - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); -} -#endif - - -/** - \brief Get Main Stack Pointer - \details Returns the current value of the Main Stack Pointer (MSP). - \return MSP Register value - */ -__STATIC_FORCEINLINE uint32_t __get_MSP(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, msp" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Main Stack Pointer (non-secure) - \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. - \return MSP Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Main Stack Pointer - \details Assigns the given value to the Main Stack Pointer (MSP). - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Main Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); -} -#endif - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Stack Pointer (non-secure) - \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. - \return SP Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. - \param [in] topOfStack Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) -{ - __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); -} -#endif - - -/** - \brief Get Priority Mask - \details Returns the current state of the priority mask bit from the Priority Mask Register. - \return Priority Mask value - */ -__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Priority Mask (non-secure) - \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state. - \return Priority Mask value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Priority Mask - \details Assigns the given value to the Priority Mask Register. - \param [in] priMask Priority Mask - */ -__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Priority Mask (non-secure) - \details Assigns the given value to the non-secure Priority Mask Register when in secure state. - \param [in] priMask Priority Mask - */ -__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) -{ - __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); -} -#endif - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing special-purpose register FAULTMASK. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __enable_fault_irq(void) -{ - __ASM volatile ("cpsie f" : : : "memory"); -} - - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting special-purpose register FAULTMASK. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __disable_fault_irq(void) -{ - __ASM volatile ("cpsid f" : : : "memory"); -} - - -/** - \brief Get Base Priority - \details Returns the current value of the Base Priority register. - \return Base Priority register value - */ -__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Base Priority (non-secure) - \details Returns the current value of the non-secure Base Priority register when in secure state. - \return Base Priority register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Base Priority - \details Assigns the given value to the Base Priority register. - \param [in] basePri Base Priority value to set - */ -__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Base Priority (non-secure) - \details Assigns the given value to the non-secure Base Priority register when in secure state. - \param [in] basePri Base Priority value to set - */ -__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) -{ - __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); -} -#endif - - -/** - \brief Set Base Priority with condition - \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) -{ - __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); -} - - -/** - \brief Get Fault Mask - \details Returns the current value of the Fault Mask register. - \return Fault Mask register value - */ -__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Fault Mask (non-secure) - \details Returns the current value of the non-secure Fault Mask register when in secure state. - \return Fault Mask register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Fault Mask - \details Assigns the given value to the Fault Mask register. - \param [in] faultMask Fault Mask value to set - */ -__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Fault Mask (non-secure) - \details Assigns the given value to the non-secure Fault Mask register when in secure state. - \param [in] faultMask Fault Mask value to set - */ -__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); -} -#endif - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) */ - - -#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) - -/** - \brief Get Process Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always in non-secure - mode. - - \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). - \return PSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) -{ -#if (!((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, psplim" : "=r" (result) ); - return result; -#endif -} - -#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Process Stack Pointer Limit (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always in non-secure - mode. - - \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. - \return PSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) -{ -#if (!((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) ) - // without main extensions, the non-secure PSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); - return result; -#endif -} -#endif - - -/** - \brief Set Process Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored in non-secure - mode. - - \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). - \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - */ -__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) -{ -#if (!((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - (void)ProcStackPtrLimit; -#else - __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); -#endif -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Process Stack Pointer (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored in non-secure - mode. - - \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. - \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - */ -__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) -{ -#if (!((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) ) - // without main extensions, the non-secure PSPLIM is RAZ/WI - (void)ProcStackPtrLimit; -#else - __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); -#endif -} -#endif - - -/** - \brief Get Main Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always. - - \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). - \return MSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) -{ -#if (!((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, msplim" : "=r" (result) ); - return result; -#endif -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Main Stack Pointer Limit (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always. - - \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. - \return MSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) -{ -#if (!((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) ) - // without main extensions, the non-secure MSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); - return result; -#endif -} -#endif - - -/** - \brief Set Main Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored. - - \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). - \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set - */ -__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) -{ -#if (!((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - (void)MainStackPtrLimit; -#else - __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); -#endif -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Main Stack Pointer Limit (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored. - - \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state. - \param [in] MainStackPtrLimit Main Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) -{ -#if (!((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) ) - // without main extensions, the non-secure MSPLIM is RAZ/WI - (void)MainStackPtrLimit; -#else - __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); -#endif -} -#endif - -#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) || \ - (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) */ - -/** - \brief Get FPSCR - \details Returns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr -#else -#define __get_FPSCR() ((uint32_t)0U) -#endif - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#define __set_FPSCR __builtin_arm_set_fpscr -#else -#define __set_FPSCR(x) ((void)(x)) -#endif - - -/*@} end of CMSIS_Core_RegAccFunctions */ - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) - -#define __SADD8 __builtin_arm_sadd8 -#define __QADD8 __builtin_arm_qadd8 -#define __SHADD8 __builtin_arm_shadd8 -#define __UADD8 __builtin_arm_uadd8 -#define __UQADD8 __builtin_arm_uqadd8 -#define __UHADD8 __builtin_arm_uhadd8 -#define __SSUB8 __builtin_arm_ssub8 -#define __QSUB8 __builtin_arm_qsub8 -#define __SHSUB8 __builtin_arm_shsub8 -#define __USUB8 __builtin_arm_usub8 -#define __UQSUB8 __builtin_arm_uqsub8 -#define __UHSUB8 __builtin_arm_uhsub8 -#define __SADD16 __builtin_arm_sadd16 -#define __QADD16 __builtin_arm_qadd16 -#define __SHADD16 __builtin_arm_shadd16 -#define __UADD16 __builtin_arm_uadd16 -#define __UQADD16 __builtin_arm_uqadd16 -#define __UHADD16 __builtin_arm_uhadd16 -#define __SSUB16 __builtin_arm_ssub16 -#define __QSUB16 __builtin_arm_qsub16 -#define __SHSUB16 __builtin_arm_shsub16 -#define __USUB16 __builtin_arm_usub16 -#define __UQSUB16 __builtin_arm_uqsub16 -#define __UHSUB16 __builtin_arm_uhsub16 -#define __SASX __builtin_arm_sasx -#define __QASX __builtin_arm_qasx -#define __SHASX __builtin_arm_shasx -#define __UASX __builtin_arm_uasx -#define __UQASX __builtin_arm_uqasx -#define __UHASX __builtin_arm_uhasx -#define __SSAX __builtin_arm_ssax -#define __QSAX __builtin_arm_qsax -#define __SHSAX __builtin_arm_shsax -#define __USAX __builtin_arm_usax -#define __UQSAX __builtin_arm_uqsax -#define __UHSAX __builtin_arm_uhsax -#define __USAD8 __builtin_arm_usad8 -#define __USADA8 __builtin_arm_usada8 -#define __SSAT16 __builtin_arm_ssat16 -#define __USAT16 __builtin_arm_usat16 -#define __UXTB16 __builtin_arm_uxtb16 -#define __UXTAB16 __builtin_arm_uxtab16 -#define __SXTB16 __builtin_arm_sxtb16 -#define __SXTAB16 __builtin_arm_sxtab16 -#define __SMUAD __builtin_arm_smuad -#define __SMUADX __builtin_arm_smuadx -#define __SMLAD __builtin_arm_smlad -#define __SMLADX __builtin_arm_smladx -#define __SMLALD __builtin_arm_smlald -#define __SMLALDX __builtin_arm_smlaldx -#define __SMUSD __builtin_arm_smusd -#define __SMUSDX __builtin_arm_smusdx -#define __SMLSD __builtin_arm_smlsd -#define __SMLSDX __builtin_arm_smlsdx -#define __SMLSLD __builtin_arm_smlsld -#define __SMLSLDX __builtin_arm_smlsldx -#define __SEL __builtin_arm_sel -#define __QADD __builtin_arm_qadd -#define __QSUB __builtin_arm_qsub - -#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ - ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) - -#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ - ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) - -#define __SXTB16_RORn(ARG1, ARG2) __SXTB16(__ROR(ARG1, ARG2)) - -#define __SXTAB16_RORn(ARG1, ARG2, ARG3) __SXTAB16(ARG1, __ROR(ARG2, ARG3)) - -__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) -{ - int32_t result; - - __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#endif /* (__ARM_FEATURE_DSP == 1) */ -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#endif /* __CMSIS_ARMCLANG_H */ diff --git a/Drivers/CMSIS/Core/Include/cmsis_armclang_ltm.h b/Drivers/CMSIS/Core/Include/cmsis_armclang_ltm.h deleted file mode 100644 index 6edd509..0000000 --- a/Drivers/CMSIS/Core/Include/cmsis_armclang_ltm.h +++ /dev/null @@ -1,1928 +0,0 @@ -/**************************************************************************//** - * @file cmsis_armclang_ltm.h - * @brief CMSIS compiler armclang (Arm Compiler 6) header file - * @version V1.5.3 - * @date 27. May 2021 - ******************************************************************************/ -/* - * Copyright (c) 2018-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */ - -#ifndef __CMSIS_ARMCLANG_H -#define __CMSIS_ARMCLANG_H - -#pragma clang system_header /* treat file as system include file */ - -/* CMSIS compiler specific defines */ -#ifndef __ASM - #define __ASM __asm -#endif -#ifndef __INLINE - #define __INLINE __inline -#endif -#ifndef __STATIC_INLINE - #define __STATIC_INLINE static __inline -#endif -#ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline -#endif -#ifndef __NO_RETURN - #define __NO_RETURN __attribute__((__noreturn__)) -#endif -#ifndef __USED - #define __USED __attribute__((used)) -#endif -#ifndef __WEAK - #define __WEAK __attribute__((weak)) -#endif -#ifndef __PACKED - #define __PACKED __attribute__((packed, aligned(1))) -#endif -#ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) -#endif -#ifndef __PACKED_UNION - #define __PACKED_UNION union __attribute__((packed, aligned(1))) -#endif -#ifndef __UNALIGNED_UINT32 /* deprecated */ - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */ - struct __attribute__((packed)) T_UINT32 { uint32_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) -#endif -#ifndef __UNALIGNED_UINT16_WRITE - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */ - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) -#endif -#ifndef __UNALIGNED_UINT16_READ - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */ - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) -#endif -#ifndef __UNALIGNED_UINT32_WRITE - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */ - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) -#endif -#ifndef __UNALIGNED_UINT32_READ - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */ - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) -#endif -#ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) -#endif -#ifndef __RESTRICT - #define __RESTRICT __restrict -#endif -#ifndef __COMPILER_BARRIER - #define __COMPILER_BARRIER() __ASM volatile("":::"memory") -#endif - -/* ######################### Startup and Lowlevel Init ######################## */ - -#ifndef __PROGRAM_START -#define __PROGRAM_START __main -#endif - -#ifndef __INITIAL_SP -#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit -#endif - -#ifndef __STACK_LIMIT -#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base -#endif - -#ifndef __VECTOR_TABLE -#define __VECTOR_TABLE __Vectors -#endif - -#ifndef __VECTOR_TABLE_ATTRIBUTE -#define __VECTOR_TABLE_ATTRIBUTE __attribute__((used, section("RESET"))) -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -#ifndef __STACK_SEAL -#define __STACK_SEAL Image$$STACKSEAL$$ZI$$Base -#endif - -#ifndef __TZ_STACK_SEAL_SIZE -#define __TZ_STACK_SEAL_SIZE 8U -#endif - -#ifndef __TZ_STACK_SEAL_VALUE -#define __TZ_STACK_SEAL_VALUE 0xFEF5EDA5FEF5EDA5ULL -#endif - - -__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) { - *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE; -} -#endif - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/* Define macros for porting to both thumb1 and thumb2. - * For thumb1, use low register (r0-r7), specified by constraint "l" - * Otherwise, use general registers, specified by constraint "r" */ -#if defined (__thumb__) && !defined (__thumb2__) -#define __CMSIS_GCC_OUT_REG(r) "=l" (r) -#define __CMSIS_GCC_USE_REG(r) "l" (r) -#else -#define __CMSIS_GCC_OUT_REG(r) "=r" (r) -#define __CMSIS_GCC_USE_REG(r) "r" (r) -#endif - -/** - \brief No Operation - \details No Operation does nothing. This instruction can be used for code alignment purposes. - */ -#define __NOP __builtin_arm_nop - -/** - \brief Wait For Interrupt - \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. - */ -#define __WFI __builtin_arm_wfi - - -/** - \brief Wait For Event - \details Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -#define __WFE __builtin_arm_wfe - - -/** - \brief Send Event - \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -#define __SEV __builtin_arm_sev - - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -#define __ISB() __builtin_arm_isb(0xF) - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -#define __DSB() __builtin_arm_dsb(0xF) - - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -#define __DMB() __builtin_arm_dmb(0xF) - - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV(value) __builtin_bswap32(value) - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV16(value) __ROR(__REV(value), 16) - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REVSH(value) (int16_t)__builtin_bswap16(value) - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] op1 Value to rotate - \param [in] op2 Number of Bits to rotate - \return Rotated value - */ -__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) -{ - op2 %= 32U; - if (op2 == 0U) - { - return op1; - } - return (op1 >> op2) | (op1 << (32U - op2)); -} - - -/** - \brief Breakpoint - \details Causes the processor to enter Debug state. - Debug tools can use this to investigate system state when the instruction at a particular address is reached. - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __ASM volatile ("bkpt "#value) - - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ -#define __RBIT __builtin_arm_rbit - -/** - \brief Count leading zeros - \details Counts the number of leading zeros of a data value. - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) -{ - /* Even though __builtin_clz produces a CLZ instruction on ARM, formally - __builtin_clz(0) is undefined behaviour, so handle this case specially. - This guarantees ARM-compatible results if happening to compile on a non-ARM - target, and ensures the compiler doesn't decide to activate any - optimisations using the logic "value was passed to __builtin_clz, so it - is non-zero". - ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a - single CLZ instruction. - */ - if (value == 0U) - { - return 32U; - } - return __builtin_clz(value); -} - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDREXB (uint8_t)__builtin_arm_ldrex - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDREXH (uint16_t)__builtin_arm_ldrex - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDREXW (uint32_t)__builtin_arm_ldrex - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXB (uint32_t)__builtin_arm_strex - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXH (uint32_t)__builtin_arm_strex - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXW (uint32_t)__builtin_arm_strex - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -#define __CLREX __builtin_arm_clrex - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT __builtin_arm_ssat - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT __builtin_arm_usat - - -/** - \brief Rotate Right with Extend (32 bit) - \details Moves each bit of a bitstring right by one bit. - The carry input is shifted in at the left end of the bitstring. - \param [in] value Value to rotate - \return Rotated value - */ -__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief LDRT Unprivileged (8 bit) - \details Executes a Unprivileged LDRT instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (16 bit) - \details Executes a Unprivileged LDRT instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (32 bit) - \details Executes a Unprivileged LDRT instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); - return(result); -} - - -/** - \brief STRT Unprivileged (8 bit) - \details Executes a Unprivileged STRT instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) -{ - __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (16 bit) - \details Executes a Unprivileged STRT instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) -{ - __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (32 bit) - \details Executes a Unprivileged STRT instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) -{ - __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); -} - -#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) -{ - if ((sat >= 1U) && (sat <= 32U)) - { - const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); - const int32_t min = -1 - max ; - if (val > max) - { - return max; - } - else if (val < min) - { - return min; - } - } - return val; -} - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) -{ - if (sat <= 31U) - { - const uint32_t max = ((1U << sat) - 1U); - if (val > (int32_t)max) - { - return max; - } - else if (val < 0) - { - return 0U; - } - } - return (uint32_t)val; -} - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ - - -#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) -/** - \brief Load-Acquire (8 bit) - \details Executes a LDAB instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return ((uint8_t) result); -} - - -/** - \brief Load-Acquire (16 bit) - \details Executes a LDAH instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return ((uint16_t) result); -} - - -/** - \brief Load-Acquire (32 bit) - \details Executes a LDA instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return(result); -} - - -/** - \brief Store-Release (8 bit) - \details Executes a STLB instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) -{ - __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); -} - - -/** - \brief Store-Release (16 bit) - \details Executes a STLH instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) -{ - __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); -} - - -/** - \brief Store-Release (32 bit) - \details Executes a STL instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) -{ - __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); -} - - -/** - \brief Load-Acquire Exclusive (8 bit) - \details Executes a LDAB exclusive instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDAEXB (uint8_t)__builtin_arm_ldaex - - -/** - \brief Load-Acquire Exclusive (16 bit) - \details Executes a LDAH exclusive instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDAEXH (uint16_t)__builtin_arm_ldaex - - -/** - \brief Load-Acquire Exclusive (32 bit) - \details Executes a LDA exclusive instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDAEX (uint32_t)__builtin_arm_ldaex - - -/** - \brief Store-Release Exclusive (8 bit) - \details Executes a STLB exclusive instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEXB (uint32_t)__builtin_arm_stlex - - -/** - \brief Store-Release Exclusive (16 bit) - \details Executes a STLH exclusive instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEXH (uint32_t)__builtin_arm_stlex - - -/** - \brief Store-Release Exclusive (32 bit) - \details Executes a STL exclusive instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEX (uint32_t)__builtin_arm_stlex - -#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ - */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing special-purpose register PRIMASK. - Can only be executed in Privileged modes. - */ -#ifndef __ARM_COMPAT_H -__STATIC_FORCEINLINE void __enable_irq(void) -{ - __ASM volatile ("cpsie i" : : : "memory"); -} -#endif - - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting special-purpose register PRIMASK. - Can only be executed in Privileged modes. - */ -#ifndef __ARM_COMPAT_H -__STATIC_FORCEINLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); -} -#endif - - -/** - \brief Get Control Register - \details Returns the content of the Control Register. - \return Control Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CONTROL(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Control Register (non-secure) - \details Returns the content of the non-secure Control Register when in secure mode. - \return non-secure Control Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Control Register - \details Writes the given value to the Control Register. - \param [in] control Control Register value to set - */ -__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); - __ISB(); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Control Register (non-secure) - \details Writes the given value to the non-secure Control Register when in secure state. - \param [in] control Control Register value to set - */ -__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) -{ - __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); - __ISB(); -} -#endif - - -/** - \brief Get IPSR Register - \details Returns the content of the IPSR Register. - \return IPSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_IPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get APSR Register - \details Returns the content of the APSR Register. - \return APSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_APSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, apsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get xPSR Register - \details Returns the content of the xPSR Register. - \return xPSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_xPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get Process Stack Pointer - \details Returns the current value of the Process Stack Pointer (PSP). - \return PSP Register value - */ -__STATIC_FORCEINLINE uint32_t __get_PSP(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, psp" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Process Stack Pointer (non-secure) - \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. - \return PSP Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Process Stack Pointer - \details Assigns the given value to the Process Stack Pointer (PSP). - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Process Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state. - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); -} -#endif - - -/** - \brief Get Main Stack Pointer - \details Returns the current value of the Main Stack Pointer (MSP). - \return MSP Register value - */ -__STATIC_FORCEINLINE uint32_t __get_MSP(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, msp" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Main Stack Pointer (non-secure) - \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. - \return MSP Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Main Stack Pointer - \details Assigns the given value to the Main Stack Pointer (MSP). - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Main Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); -} -#endif - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Stack Pointer (non-secure) - \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. - \return SP Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. - \param [in] topOfStack Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) -{ - __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); -} -#endif - - -/** - \brief Get Priority Mask - \details Returns the current state of the priority mask bit from the Priority Mask Register. - \return Priority Mask value - */ -__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Priority Mask (non-secure) - \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state. - \return Priority Mask value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Priority Mask - \details Assigns the given value to the Priority Mask Register. - \param [in] priMask Priority Mask - */ -__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Priority Mask (non-secure) - \details Assigns the given value to the non-secure Priority Mask Register when in secure state. - \param [in] priMask Priority Mask - */ -__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) -{ - __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); -} -#endif - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing special-purpose register FAULTMASK. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __enable_fault_irq(void) -{ - __ASM volatile ("cpsie f" : : : "memory"); -} - - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting special-purpose register FAULTMASK. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __disable_fault_irq(void) -{ - __ASM volatile ("cpsid f" : : : "memory"); -} - - -/** - \brief Get Base Priority - \details Returns the current value of the Base Priority register. - \return Base Priority register value - */ -__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Base Priority (non-secure) - \details Returns the current value of the non-secure Base Priority register when in secure state. - \return Base Priority register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Base Priority - \details Assigns the given value to the Base Priority register. - \param [in] basePri Base Priority value to set - */ -__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Base Priority (non-secure) - \details Assigns the given value to the non-secure Base Priority register when in secure state. - \param [in] basePri Base Priority value to set - */ -__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) -{ - __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); -} -#endif - - -/** - \brief Set Base Priority with condition - \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) -{ - __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); -} - - -/** - \brief Get Fault Mask - \details Returns the current value of the Fault Mask register. - \return Fault Mask register value - */ -__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Fault Mask (non-secure) - \details Returns the current value of the non-secure Fault Mask register when in secure state. - \return Fault Mask register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Fault Mask - \details Assigns the given value to the Fault Mask register. - \param [in] faultMask Fault Mask value to set - */ -__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Fault Mask (non-secure) - \details Assigns the given value to the non-secure Fault Mask register when in secure state. - \param [in] faultMask Fault Mask value to set - */ -__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); -} -#endif - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ - - -#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) - -/** - \brief Get Process Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always in non-secure - mode. - - \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). - \return PSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, psplim" : "=r" (result) ); - return result; -#endif -} - -#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Process Stack Pointer Limit (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always in non-secure - mode. - - \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. - \return PSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); - return result; -#endif -} -#endif - - -/** - \brief Set Process Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored in non-secure - mode. - - \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). - \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - */ -__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - (void)ProcStackPtrLimit; -#else - __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); -#endif -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Process Stack Pointer (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored in non-secure - mode. - - \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. - \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - */ -__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - (void)ProcStackPtrLimit; -#else - __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); -#endif -} -#endif - - -/** - \brief Get Main Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always. - - \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). - \return MSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, msplim" : "=r" (result) ); - return result; -#endif -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Main Stack Pointer Limit (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always. - - \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. - \return MSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); - return result; -#endif -} -#endif - - -/** - \brief Set Main Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored. - - \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). - \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set - */ -__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - (void)MainStackPtrLimit; -#else - __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); -#endif -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Main Stack Pointer Limit (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored. - - \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state. - \param [in] MainStackPtrLimit Main Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - (void)MainStackPtrLimit; -#else - __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); -#endif -} -#endif - -#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ - -/** - \brief Get FPSCR - \details Returns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr -#else -#define __get_FPSCR() ((uint32_t)0U) -#endif - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#define __set_FPSCR __builtin_arm_set_fpscr -#else -#define __set_FPSCR(x) ((void)(x)) -#endif - - -/*@} end of CMSIS_Core_RegAccFunctions */ - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) - -__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#define __SSAT16(ARG1,ARG2) \ -({ \ - int32_t __RES, __ARG1 = (ARG1); \ - __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - -#define __USAT16(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - -__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ - ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) - -#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ - ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) - -#define __SXTB16_RORn(ARG1, ARG2) __SXTB16(__ROR(ARG1, ARG2)) - -#define __SXTAB16_RORn(ARG1, ARG2, ARG3) __SXTAB16(ARG1, __ROR(ARG2, ARG3)) - -__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) -{ - int32_t result; - - __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#endif /* (__ARM_FEATURE_DSP == 1) */ -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#endif /* __CMSIS_ARMCLANG_H */ diff --git a/Drivers/CMSIS/Core/Include/cmsis_compiler.h b/Drivers/CMSIS/Core/Include/cmsis_compiler.h deleted file mode 100644 index 21a2c71..0000000 --- a/Drivers/CMSIS/Core/Include/cmsis_compiler.h +++ /dev/null @@ -1,283 +0,0 @@ -/**************************************************************************//** - * @file cmsis_compiler.h - * @brief CMSIS compiler generic header file - * @version V5.1.0 - * @date 09. October 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_COMPILER_H -#define __CMSIS_COMPILER_H - -#include - -/* - * Arm Compiler 4/5 - */ -#if defined ( __CC_ARM ) - #include "cmsis_armcc.h" - - -/* - * Arm Compiler 6.6 LTM (armclang) - */ -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100) - #include "cmsis_armclang_ltm.h" - - /* - * Arm Compiler above 6.10.1 (armclang) - */ -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) - #include "cmsis_armclang.h" - - -/* - * GNU Compiler - */ -#elif defined ( __GNUC__ ) - #include "cmsis_gcc.h" - - -/* - * IAR Compiler - */ -#elif defined ( __ICCARM__ ) - #include - - -/* - * TI Arm Compiler - */ -#elif defined ( __TI_ARM__ ) - #include - - #ifndef __ASM - #define __ASM __asm - #endif - #ifndef __INLINE - #define __INLINE inline - #endif - #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline - #endif - #ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __STATIC_INLINE - #endif - #ifndef __NO_RETURN - #define __NO_RETURN __attribute__((noreturn)) - #endif - #ifndef __USED - #define __USED __attribute__((used)) - #endif - #ifndef __WEAK - #define __WEAK __attribute__((weak)) - #endif - #ifndef __PACKED - #define __PACKED __attribute__((packed)) - #endif - #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __attribute__((packed)) - #endif - #ifndef __PACKED_UNION - #define __PACKED_UNION union __attribute__((packed)) - #endif - #ifndef __UNALIGNED_UINT32 /* deprecated */ - struct __attribute__((packed)) T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) - #endif - #ifndef __UNALIGNED_UINT16_WRITE - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT16_READ - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) - #endif - #ifndef __UNALIGNED_UINT32_WRITE - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT32_READ - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) - #endif - #ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) - #endif - #ifndef __RESTRICT - #define __RESTRICT __restrict - #endif - #ifndef __COMPILER_BARRIER - #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. - #define __COMPILER_BARRIER() (void)0 - #endif - - -/* - * TASKING Compiler - */ -#elif defined ( __TASKING__ ) - /* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all intrinsics, - * Including the CMSIS ones. - */ - - #ifndef __ASM - #define __ASM __asm - #endif - #ifndef __INLINE - #define __INLINE inline - #endif - #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline - #endif - #ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __STATIC_INLINE - #endif - #ifndef __NO_RETURN - #define __NO_RETURN __attribute__((noreturn)) - #endif - #ifndef __USED - #define __USED __attribute__((used)) - #endif - #ifndef __WEAK - #define __WEAK __attribute__((weak)) - #endif - #ifndef __PACKED - #define __PACKED __packed__ - #endif - #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __packed__ - #endif - #ifndef __PACKED_UNION - #define __PACKED_UNION union __packed__ - #endif - #ifndef __UNALIGNED_UINT32 /* deprecated */ - struct __packed__ T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) - #endif - #ifndef __UNALIGNED_UINT16_WRITE - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT16_READ - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) - #endif - #ifndef __UNALIGNED_UINT32_WRITE - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT32_READ - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) - #endif - #ifndef __ALIGNED - #define __ALIGNED(x) __align(x) - #endif - #ifndef __RESTRICT - #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. - #define __RESTRICT - #endif - #ifndef __COMPILER_BARRIER - #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. - #define __COMPILER_BARRIER() (void)0 - #endif - - -/* - * COSMIC Compiler - */ -#elif defined ( __CSMC__ ) - #include - - #ifndef __ASM - #define __ASM _asm - #endif - #ifndef __INLINE - #define __INLINE inline - #endif - #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline - #endif - #ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __STATIC_INLINE - #endif - #ifndef __NO_RETURN - // NO RETURN is automatically detected hence no warning here - #define __NO_RETURN - #endif - #ifndef __USED - #warning No compiler specific solution for __USED. __USED is ignored. - #define __USED - #endif - #ifndef __WEAK - #define __WEAK __weak - #endif - #ifndef __PACKED - #define __PACKED @packed - #endif - #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT @packed struct - #endif - #ifndef __PACKED_UNION - #define __PACKED_UNION @packed union - #endif - #ifndef __UNALIGNED_UINT32 /* deprecated */ - @packed struct T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) - #endif - #ifndef __UNALIGNED_UINT16_WRITE - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT16_READ - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) - #endif - #ifndef __UNALIGNED_UINT32_WRITE - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) - #endif - #ifndef __UNALIGNED_UINT32_READ - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) - #endif - #ifndef __ALIGNED - #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. - #define __ALIGNED(x) - #endif - #ifndef __RESTRICT - #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. - #define __RESTRICT - #endif - #ifndef __COMPILER_BARRIER - #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. - #define __COMPILER_BARRIER() (void)0 - #endif - - -#else - #error Unknown compiler. -#endif - - -#endif /* __CMSIS_COMPILER_H */ - diff --git a/Drivers/CMSIS/Core/Include/cmsis_gcc.h b/Drivers/CMSIS/Core/Include/cmsis_gcc.h deleted file mode 100644 index 045aaf1..0000000 --- a/Drivers/CMSIS/Core/Include/cmsis_gcc.h +++ /dev/null @@ -1,2211 +0,0 @@ -/**************************************************************************//** - * @file cmsis_gcc.h - * @brief CMSIS compiler GCC header file - * @version V5.4.1 - * @date 27. May 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_GCC_H -#define __CMSIS_GCC_H - -/* ignore some GCC warnings */ -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wsign-conversion" -#pragma GCC diagnostic ignored "-Wconversion" -#pragma GCC diagnostic ignored "-Wunused-parameter" - -/* Fallback for __has_builtin */ -#ifndef __has_builtin - #define __has_builtin(x) (0) -#endif - -/* CMSIS compiler specific defines */ -#ifndef __ASM - #define __ASM __asm -#endif -#ifndef __INLINE - #define __INLINE inline -#endif -#ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline -#endif -#ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline -#endif -#ifndef __NO_RETURN - #define __NO_RETURN __attribute__((__noreturn__)) -#endif -#ifndef __USED - #define __USED __attribute__((used)) -#endif -#ifndef __WEAK - #define __WEAK __attribute__((weak)) -#endif -#ifndef __PACKED - #define __PACKED __attribute__((packed, aligned(1))) -#endif -#ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) -#endif -#ifndef __PACKED_UNION - #define __PACKED_UNION union __attribute__((packed, aligned(1))) -#endif -#ifndef __UNALIGNED_UINT32 /* deprecated */ - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - #pragma GCC diagnostic ignored "-Wattributes" - struct __attribute__((packed)) T_UINT32 { uint32_t v; }; - #pragma GCC diagnostic pop - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) -#endif -#ifndef __UNALIGNED_UINT16_WRITE - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - #pragma GCC diagnostic ignored "-Wattributes" - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #pragma GCC diagnostic pop - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) -#endif -#ifndef __UNALIGNED_UINT16_READ - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - #pragma GCC diagnostic ignored "-Wattributes" - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #pragma GCC diagnostic pop - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) -#endif -#ifndef __UNALIGNED_UINT32_WRITE - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - #pragma GCC diagnostic ignored "-Wattributes" - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #pragma GCC diagnostic pop - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) -#endif -#ifndef __UNALIGNED_UINT32_READ - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - #pragma GCC diagnostic ignored "-Wattributes" - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #pragma GCC diagnostic pop - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) -#endif -#ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) -#endif -#ifndef __RESTRICT - #define __RESTRICT __restrict -#endif -#ifndef __COMPILER_BARRIER - #define __COMPILER_BARRIER() __ASM volatile("":::"memory") -#endif - -/* ######################### Startup and Lowlevel Init ######################## */ - -#ifndef __PROGRAM_START - -/** - \brief Initializes data and bss sections - \details This default implementations initialized all data and additional bss - sections relying on .copy.table and .zero.table specified properly - in the used linker script. - - */ -__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) -{ - extern void _start(void) __NO_RETURN; - - typedef struct { - uint32_t const* src; - uint32_t* dest; - uint32_t wlen; - } __copy_table_t; - - typedef struct { - uint32_t* dest; - uint32_t wlen; - } __zero_table_t; - - extern const __copy_table_t __copy_table_start__; - extern const __copy_table_t __copy_table_end__; - extern const __zero_table_t __zero_table_start__; - extern const __zero_table_t __zero_table_end__; - - for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) { - for(uint32_t i=0u; iwlen; ++i) { - pTable->dest[i] = pTable->src[i]; - } - } - - for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) { - for(uint32_t i=0u; iwlen; ++i) { - pTable->dest[i] = 0u; - } - } - - _start(); -} - -#define __PROGRAM_START __cmsis_start -#endif - -#ifndef __INITIAL_SP -#define __INITIAL_SP __StackTop -#endif - -#ifndef __STACK_LIMIT -#define __STACK_LIMIT __StackLimit -#endif - -#ifndef __VECTOR_TABLE -#define __VECTOR_TABLE __Vectors -#endif - -#ifndef __VECTOR_TABLE_ATTRIBUTE -#define __VECTOR_TABLE_ATTRIBUTE __attribute__((used, section(".vectors"))) -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -#ifndef __STACK_SEAL -#define __STACK_SEAL __StackSeal -#endif - -#ifndef __TZ_STACK_SEAL_SIZE -#define __TZ_STACK_SEAL_SIZE 8U -#endif - -#ifndef __TZ_STACK_SEAL_VALUE -#define __TZ_STACK_SEAL_VALUE 0xFEF5EDA5FEF5EDA5ULL -#endif - - -__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) { - *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE; -} -#endif - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/* Define macros for porting to both thumb1 and thumb2. - * For thumb1, use low register (r0-r7), specified by constraint "l" - * Otherwise, use general registers, specified by constraint "r" */ -#if defined (__thumb__) && !defined (__thumb2__) -#define __CMSIS_GCC_OUT_REG(r) "=l" (r) -#define __CMSIS_GCC_RW_REG(r) "+l" (r) -#define __CMSIS_GCC_USE_REG(r) "l" (r) -#else -#define __CMSIS_GCC_OUT_REG(r) "=r" (r) -#define __CMSIS_GCC_RW_REG(r) "+r" (r) -#define __CMSIS_GCC_USE_REG(r) "r" (r) -#endif - -/** - \brief No Operation - \details No Operation does nothing. This instruction can be used for code alignment purposes. - */ -#define __NOP() __ASM volatile ("nop") - -/** - \brief Wait For Interrupt - \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. - */ -#define __WFI() __ASM volatile ("wfi":::"memory") - - -/** - \brief Wait For Event - \details Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -#define __WFE() __ASM volatile ("wfe":::"memory") - - -/** - \brief Send Event - \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -#define __SEV() __ASM volatile ("sev") - - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -__STATIC_FORCEINLINE void __ISB(void) -{ - __ASM volatile ("isb 0xF":::"memory"); -} - - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -__STATIC_FORCEINLINE void __DSB(void) -{ - __ASM volatile ("dsb 0xF":::"memory"); -} - - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -__STATIC_FORCEINLINE void __DMB(void) -{ - __ASM volatile ("dmb 0xF":::"memory"); -} - - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. - \param [in] value Value to reverse - \return Reversed value - */ -__STATIC_FORCEINLINE uint32_t __REV(uint32_t value) -{ -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) - return __builtin_bswap32(value); -#else - uint32_t result; - - __ASM ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return result; -#endif -} - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. - \param [in] value Value to reverse - \return Reversed value - */ -__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) -{ - uint32_t result; - - __ASM ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return result; -} - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. - \param [in] value Value to reverse - \return Reversed value - */ -__STATIC_FORCEINLINE int16_t __REVSH(int16_t value) -{ -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - return (int16_t)__builtin_bswap16(value); -#else - int16_t result; - - __ASM ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return result; -#endif -} - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] op1 Value to rotate - \param [in] op2 Number of Bits to rotate - \return Rotated value - */ -__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) -{ - op2 %= 32U; - if (op2 == 0U) - { - return op1; - } - return (op1 >> op2) | (op1 << (32U - op2)); -} - - -/** - \brief Breakpoint - \details Causes the processor to enter Debug state. - Debug tools can use this to investigate system state when the instruction at a particular address is reached. - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __ASM volatile ("bkpt "#value) - - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ -__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) -{ - uint32_t result; - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) - __ASM ("rbit %0, %1" : "=r" (result) : "r" (value) ); -#else - uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ - - result = value; /* r will be reversed bits of v; first get LSB of v */ - for (value >>= 1U; value != 0U; value >>= 1U) - { - result <<= 1U; - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ -#endif - return result; -} - - -/** - \brief Count leading zeros - \details Counts the number of leading zeros of a data value. - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) -{ - /* Even though __builtin_clz produces a CLZ instruction on ARM, formally - __builtin_clz(0) is undefined behaviour, so handle this case specially. - This guarantees ARM-compatible results if happening to compile on a non-ARM - target, and ensures the compiler doesn't decide to activate any - optimisations using the logic "value was passed to __builtin_clz, so it - is non-zero". - ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a - single CLZ instruction. - */ - if (value == 0U) - { - return 32U; - } - return __builtin_clz(value); -} - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - return(result); -} - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) -{ - uint32_t result; - - __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - return(result); -} - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) -{ - uint32_t result; - - __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - return(result); -} - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - return(result); -} - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -__STATIC_FORCEINLINE void __CLREX(void) -{ - __ASM volatile ("clrex" ::: "memory"); -} - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] ARG1 Value to be saturated - \param [in] ARG2 Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT(ARG1, ARG2) \ -__extension__ \ -({ \ - int32_t __RES, __ARG1 = (ARG1); \ - __ASM volatile ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ - __RES; \ - }) - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] ARG1 Value to be saturated - \param [in] ARG2 Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT(ARG1, ARG2) \ -__extension__ \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM volatile ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ - __RES; \ - }) - - -/** - \brief Rotate Right with Extend (32 bit) - \details Moves each bit of a bitstring right by one bit. - The carry input is shifted in at the left end of the bitstring. - \param [in] value Value to rotate - \return Rotated value - */ -__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief LDRT Unprivileged (8 bit) - \details Executes a Unprivileged LDRT instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); -#endif - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (16 bit) - \details Executes a Unprivileged LDRT instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); -#endif - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (32 bit) - \details Executes a Unprivileged LDRT instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); - return(result); -} - - -/** - \brief STRT Unprivileged (8 bit) - \details Executes a Unprivileged STRT instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) -{ - __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (16 bit) - \details Executes a Unprivileged STRT instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) -{ - __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (32 bit) - \details Executes a Unprivileged STRT instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) -{ - __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); -} - -#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) -{ - if ((sat >= 1U) && (sat <= 32U)) - { - const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); - const int32_t min = -1 - max ; - if (val > max) - { - return max; - } - else if (val < min) - { - return min; - } - } - return val; -} - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) -{ - if (sat <= 31U) - { - const uint32_t max = ((1U << sat) - 1U); - if (val > (int32_t)max) - { - return max; - } - else if (val < 0) - { - return 0U; - } - } - return (uint32_t)val; -} - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ - - -#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) -/** - \brief Load-Acquire (8 bit) - \details Executes a LDAB instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return ((uint8_t) result); -} - - -/** - \brief Load-Acquire (16 bit) - \details Executes a LDAH instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return ((uint16_t) result); -} - - -/** - \brief Load-Acquire (32 bit) - \details Executes a LDA instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return(result); -} - - -/** - \brief Store-Release (8 bit) - \details Executes a STLB instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) -{ - __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); -} - - -/** - \brief Store-Release (16 bit) - \details Executes a STLH instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) -{ - __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); -} - - -/** - \brief Store-Release (32 bit) - \details Executes a STL instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) -{ - __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); -} - - -/** - \brief Load-Acquire Exclusive (8 bit) - \details Executes a LDAB exclusive instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return ((uint8_t) result); -} - - -/** - \brief Load-Acquire Exclusive (16 bit) - \details Executes a LDAH exclusive instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return ((uint16_t) result); -} - - -/** - \brief Load-Acquire Exclusive (32 bit) - \details Executes a LDA exclusive instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); - return(result); -} - - -/** - \brief Store-Release Exclusive (8 bit) - \details Executes a STLB exclusive instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); - return(result); -} - - -/** - \brief Store-Release Exclusive (16 bit) - \details Executes a STLH exclusive instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); - return(result); -} - - -/** - \brief Store-Release Exclusive (32 bit) - \details Executes a STL exclusive instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); - return(result); -} - -#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ - */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing special-purpose register PRIMASK. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __enable_irq(void) -{ - __ASM volatile ("cpsie i" : : : "memory"); -} - - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting special-purpose register PRIMASK. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); -} - - -/** - \brief Get Control Register - \details Returns the content of the Control Register. - \return Control Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CONTROL(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Control Register (non-secure) - \details Returns the content of the non-secure Control Register when in secure mode. - \return non-secure Control Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Control Register - \details Writes the given value to the Control Register. - \param [in] control Control Register value to set - */ -__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); - __ISB(); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Control Register (non-secure) - \details Writes the given value to the non-secure Control Register when in secure state. - \param [in] control Control Register value to set - */ -__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) -{ - __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); - __ISB(); -} -#endif - - -/** - \brief Get IPSR Register - \details Returns the content of the IPSR Register. - \return IPSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_IPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get APSR Register - \details Returns the content of the APSR Register. - \return APSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_APSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, apsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get xPSR Register - \details Returns the content of the xPSR Register. - \return xPSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_xPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get Process Stack Pointer - \details Returns the current value of the Process Stack Pointer (PSP). - \return PSP Register value - */ -__STATIC_FORCEINLINE uint32_t __get_PSP(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, psp" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Process Stack Pointer (non-secure) - \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. - \return PSP Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Process Stack Pointer - \details Assigns the given value to the Process Stack Pointer (PSP). - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Process Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state. - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); -} -#endif - - -/** - \brief Get Main Stack Pointer - \details Returns the current value of the Main Stack Pointer (MSP). - \return MSP Register value - */ -__STATIC_FORCEINLINE uint32_t __get_MSP(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, msp" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Main Stack Pointer (non-secure) - \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. - \return MSP Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Main Stack Pointer - \details Assigns the given value to the Main Stack Pointer (MSP). - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Main Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); -} -#endif - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Stack Pointer (non-secure) - \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. - \return SP Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. - \param [in] topOfStack Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) -{ - __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); -} -#endif - - -/** - \brief Get Priority Mask - \details Returns the current state of the priority mask bit from the Priority Mask Register. - \return Priority Mask value - */ -__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Priority Mask (non-secure) - \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state. - \return Priority Mask value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Priority Mask - \details Assigns the given value to the Priority Mask Register. - \param [in] priMask Priority Mask - */ -__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Priority Mask (non-secure) - \details Assigns the given value to the non-secure Priority Mask Register when in secure state. - \param [in] priMask Priority Mask - */ -__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) -{ - __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); -} -#endif - - -#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing special-purpose register FAULTMASK. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __enable_fault_irq(void) -{ - __ASM volatile ("cpsie f" : : : "memory"); -} - - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting special-purpose register FAULTMASK. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __disable_fault_irq(void) -{ - __ASM volatile ("cpsid f" : : : "memory"); -} - - -/** - \brief Get Base Priority - \details Returns the current value of the Base Priority register. - \return Base Priority register value - */ -__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Base Priority (non-secure) - \details Returns the current value of the non-secure Base Priority register when in secure state. - \return Base Priority register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Base Priority - \details Assigns the given value to the Base Priority register. - \param [in] basePri Base Priority value to set - */ -__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Base Priority (non-secure) - \details Assigns the given value to the non-secure Base Priority register when in secure state. - \param [in] basePri Base Priority value to set - */ -__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) -{ - __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); -} -#endif - - -/** - \brief Set Base Priority with condition - \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) -{ - __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); -} - - -/** - \brief Get Fault Mask - \details Returns the current value of the Fault Mask register. - \return Fault Mask register value - */ -__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Fault Mask (non-secure) - \details Returns the current value of the non-secure Fault Mask register when in secure state. - \return Fault Mask register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Fault Mask - \details Assigns the given value to the Fault Mask register. - \param [in] faultMask Fault Mask value to set - */ -__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Fault Mask (non-secure) - \details Assigns the given value to the non-secure Fault Mask register when in secure state. - \param [in] faultMask Fault Mask value to set - */ -__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); -} -#endif - -#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ - (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ - - -#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) - -/** - \brief Get Process Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always in non-secure - mode. - - \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). - \return PSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, psplim" : "=r" (result) ); - return result; -#endif -} - -#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Process Stack Pointer Limit (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always. - - \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. - \return PSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); - return result; -#endif -} -#endif - - -/** - \brief Set Process Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored in non-secure - mode. - - \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). - \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - */ -__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - (void)ProcStackPtrLimit; -#else - __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); -#endif -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Process Stack Pointer (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored. - - \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. - \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - */ -__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - (void)ProcStackPtrLimit; -#else - __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); -#endif -} -#endif - - -/** - \brief Get Main Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always in non-secure - mode. - - \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). - \return MSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, msplim" : "=r" (result) ); - return result; -#endif -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Get Main Stack Pointer Limit (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence zero is returned always. - - \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. - \return MSPLIM Register value - */ -__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - return 0U; -#else - uint32_t result; - __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); - return result; -#endif -} -#endif - - -/** - \brief Set Main Stack Pointer Limit - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored in non-secure - mode. - - \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). - \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set - */ -__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - (void)MainStackPtrLimit; -#else - __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); -#endif -} - - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) -/** - \brief Set Main Stack Pointer Limit (non-secure) - Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - Stack Pointer Limit register hence the write is silently ignored. - - \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state. - \param [in] MainStackPtrLimit Main Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) -{ -#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - (void)MainStackPtrLimit; -#else - __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); -#endif -} -#endif - -#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ - - -/** - \brief Get FPSCR - \details Returns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -__STATIC_FORCEINLINE uint32_t __get_FPSCR(void) -{ -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#if __has_builtin(__builtin_arm_get_fpscr) -// Re-enable using built-in when GCC has been fixed -// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) - /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ - return __builtin_arm_get_fpscr(); -#else - uint32_t result; - - __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); - return(result); -#endif -#else - return(0U); -#endif -} - - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) -{ -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#if __has_builtin(__builtin_arm_set_fpscr) -// Re-enable using built-in when GCC has been fixed -// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) - /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ - __builtin_arm_set_fpscr(fpscr); -#else - __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); -#endif -#else - (void)fpscr; -#endif -} - - -/*@} end of CMSIS_Core_RegAccFunctions */ - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) - -__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#define __SSAT16(ARG1, ARG2) \ -__extension__ \ -({ \ - int32_t __RES, __ARG1 = (ARG1); \ - __ASM volatile ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ - __RES; \ - }) - -#define __USAT16(ARG1, ARG2) \ -__extension__ \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM volatile ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ - __RES; \ - }) - -__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SXTB16_RORn(uint32_t op1, uint32_t rotate) -{ - uint32_t result; - if (__builtin_constant_p(rotate) && ((rotate == 8U) || (rotate == 16U) || (rotate == 24U))) { - __ASM volatile ("sxtb16 %0, %1, ROR %2" : "=r" (result) : "r" (op1), "i" (rotate) ); - } else { - result = __SXTB16(__ROR(op1, rotate)) ; - } - return result; -} - -__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SXTAB16_RORn(uint32_t op1, uint32_t op2, uint32_t rotate) -{ - uint32_t result; - if (__builtin_constant_p(rotate) && ((rotate == 8U) || (rotate == 16U) || (rotate == 24U))) { - __ASM volatile ("sxtab16 %0, %1, %2, ROR %3" : "=r" (result) : "r" (op1) , "r" (op2) , "i" (rotate)); - } else { - result = __SXTAB16(op1, __ROR(op2, rotate)); - } - return result; -} - - -__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -#define __PKHBT(ARG1,ARG2,ARG3) \ -__extension__ \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - -#define __PKHTB(ARG1,ARG2,ARG3) \ -__extension__ \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - if (ARG3 == 0) \ - __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ - else \ - __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - - -__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) -{ - int32_t result; - - __ASM ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#endif /* (__ARM_FEATURE_DSP == 1) */ -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#pragma GCC diagnostic pop - -#endif /* __CMSIS_GCC_H */ diff --git a/Drivers/CMSIS/Core/Include/cmsis_iccarm.h b/Drivers/CMSIS/Core/Include/cmsis_iccarm.h deleted file mode 100644 index 407b94b..0000000 --- a/Drivers/CMSIS/Core/Include/cmsis_iccarm.h +++ /dev/null @@ -1,1002 +0,0 @@ -/**************************************************************************//** - * @file cmsis_iccarm.h - * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file - * @version V5.3.0 - * @date 14. April 2021 - ******************************************************************************/ - -//------------------------------------------------------------------------------ -// -// Copyright (c) 2017-2021 IAR Systems -// Copyright (c) 2017-2021 Arm Limited. All rights reserved. -// -// SPDX-License-Identifier: Apache-2.0 -// -// Licensed under the Apache License, Version 2.0 (the "License") -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. -// -//------------------------------------------------------------------------------ - - -#ifndef __CMSIS_ICCARM_H__ -#define __CMSIS_ICCARM_H__ - -#ifndef __ICCARM__ - #error This file should only be compiled by ICCARM -#endif - -#pragma system_include - -#define __IAR_FT _Pragma("inline=forced") __intrinsic - -#if (__VER__ >= 8000000) - #define __ICCARM_V8 1 -#else - #define __ICCARM_V8 0 -#endif - -#ifndef __ALIGNED - #if __ICCARM_V8 - #define __ALIGNED(x) __attribute__((aligned(x))) - #elif (__VER__ >= 7080000) - /* Needs IAR language extensions */ - #define __ALIGNED(x) __attribute__((aligned(x))) - #else - #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored. - #define __ALIGNED(x) - #endif -#endif - - -/* Define compiler macros for CPU architecture, used in CMSIS 5. - */ -#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__ -/* Macros already defined */ -#else - #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) - #define __ARM_ARCH_8M_MAIN__ 1 - #elif defined(__ARM8M_BASELINE__) - #define __ARM_ARCH_8M_BASE__ 1 - #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M' - #if __ARM_ARCH == 6 - #define __ARM_ARCH_6M__ 1 - #elif __ARM_ARCH == 7 - #if __ARM_FEATURE_DSP - #define __ARM_ARCH_7EM__ 1 - #else - #define __ARM_ARCH_7M__ 1 - #endif - #endif /* __ARM_ARCH */ - #endif /* __ARM_ARCH_PROFILE == 'M' */ -#endif - -/* Alternativ core deduction for older ICCARM's */ -#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \ - !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__) - #if defined(__ARM6M__) && (__CORE__ == __ARM6M__) - #define __ARM_ARCH_6M__ 1 - #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__) - #define __ARM_ARCH_7M__ 1 - #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) - #define __ARM_ARCH_7EM__ 1 - #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__) - #define __ARM_ARCH_8M_BASE__ 1 - #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__) - #define __ARM_ARCH_8M_MAIN__ 1 - #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__) - #define __ARM_ARCH_8M_MAIN__ 1 - #else - #error "Unknown target." - #endif -#endif - - - -#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1 - #define __IAR_M0_FAMILY 1 -#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1 - #define __IAR_M0_FAMILY 1 -#else - #define __IAR_M0_FAMILY 0 -#endif - - -#ifndef __ASM - #define __ASM __asm -#endif - -#ifndef __COMPILER_BARRIER - #define __COMPILER_BARRIER() __ASM volatile("":::"memory") -#endif - -#ifndef __INLINE - #define __INLINE inline -#endif - -#ifndef __NO_RETURN - #if __ICCARM_V8 - #define __NO_RETURN __attribute__((__noreturn__)) - #else - #define __NO_RETURN _Pragma("object_attribute=__noreturn") - #endif -#endif - -#ifndef __PACKED - #if __ICCARM_V8 - #define __PACKED __attribute__((packed, aligned(1))) - #else - /* Needs IAR language extensions */ - #define __PACKED __packed - #endif -#endif - -#ifndef __PACKED_STRUCT - #if __ICCARM_V8 - #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) - #else - /* Needs IAR language extensions */ - #define __PACKED_STRUCT __packed struct - #endif -#endif - -#ifndef __PACKED_UNION - #if __ICCARM_V8 - #define __PACKED_UNION union __attribute__((packed, aligned(1))) - #else - /* Needs IAR language extensions */ - #define __PACKED_UNION __packed union - #endif -#endif - -#ifndef __RESTRICT - #if __ICCARM_V8 - #define __RESTRICT __restrict - #else - /* Needs IAR language extensions */ - #define __RESTRICT restrict - #endif -#endif - -#ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline -#endif - -#ifndef __FORCEINLINE - #define __FORCEINLINE _Pragma("inline=forced") -#endif - -#ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE -#endif - -#ifndef __UNALIGNED_UINT16_READ -#pragma language=save -#pragma language=extended -__IAR_FT uint16_t __iar_uint16_read(void const *ptr) -{ - return *(__packed uint16_t*)(ptr); -} -#pragma language=restore -#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR) -#endif - - -#ifndef __UNALIGNED_UINT16_WRITE -#pragma language=save -#pragma language=extended -__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val) -{ - *(__packed uint16_t*)(ptr) = val;; -} -#pragma language=restore -#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL) -#endif - -#ifndef __UNALIGNED_UINT32_READ -#pragma language=save -#pragma language=extended -__IAR_FT uint32_t __iar_uint32_read(void const *ptr) -{ - return *(__packed uint32_t*)(ptr); -} -#pragma language=restore -#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR) -#endif - -#ifndef __UNALIGNED_UINT32_WRITE -#pragma language=save -#pragma language=extended -__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val) -{ - *(__packed uint32_t*)(ptr) = val;; -} -#pragma language=restore -#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL) -#endif - -#ifndef __UNALIGNED_UINT32 /* deprecated */ -#pragma language=save -#pragma language=extended -__packed struct __iar_u32 { uint32_t v; }; -#pragma language=restore -#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v) -#endif - -#ifndef __USED - #if __ICCARM_V8 - #define __USED __attribute__((used)) - #else - #define __USED _Pragma("__root") - #endif -#endif - -#undef __WEAK /* undo the definition from DLib_Defaults.h */ -#ifndef __WEAK - #if __ICCARM_V8 - #define __WEAK __attribute__((weak)) - #else - #define __WEAK _Pragma("__weak") - #endif -#endif - -#ifndef __PROGRAM_START -#define __PROGRAM_START __iar_program_start -#endif - -#ifndef __INITIAL_SP -#define __INITIAL_SP CSTACK$$Limit -#endif - -#ifndef __STACK_LIMIT -#define __STACK_LIMIT CSTACK$$Base -#endif - -#ifndef __VECTOR_TABLE -#define __VECTOR_TABLE __vector_table -#endif - -#ifndef __VECTOR_TABLE_ATTRIBUTE -#define __VECTOR_TABLE_ATTRIBUTE @".intvec" -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -#ifndef __STACK_SEAL -#define __STACK_SEAL STACKSEAL$$Base -#endif - -#ifndef __TZ_STACK_SEAL_SIZE -#define __TZ_STACK_SEAL_SIZE 8U -#endif - -#ifndef __TZ_STACK_SEAL_VALUE -#define __TZ_STACK_SEAL_VALUE 0xFEF5EDA5FEF5EDA5ULL -#endif - -__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) { - *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE; -} -#endif - -#ifndef __ICCARM_INTRINSICS_VERSION__ - #define __ICCARM_INTRINSICS_VERSION__ 0 -#endif - -#if __ICCARM_INTRINSICS_VERSION__ == 2 - - #if defined(__CLZ) - #undef __CLZ - #endif - #if defined(__REVSH) - #undef __REVSH - #endif - #if defined(__RBIT) - #undef __RBIT - #endif - #if defined(__SSAT) - #undef __SSAT - #endif - #if defined(__USAT) - #undef __USAT - #endif - - #include "iccarm_builtin.h" - - #define __disable_fault_irq __iar_builtin_disable_fiq - #define __disable_irq __iar_builtin_disable_interrupt - #define __enable_fault_irq __iar_builtin_enable_fiq - #define __enable_irq __iar_builtin_enable_interrupt - #define __arm_rsr __iar_builtin_rsr - #define __arm_wsr __iar_builtin_wsr - - - #define __get_APSR() (__arm_rsr("APSR")) - #define __get_BASEPRI() (__arm_rsr("BASEPRI")) - #define __get_CONTROL() (__arm_rsr("CONTROL")) - #define __get_FAULTMASK() (__arm_rsr("FAULTMASK")) - - #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) - #define __get_FPSCR() (__arm_rsr("FPSCR")) - #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) - #else - #define __get_FPSCR() ( 0 ) - #define __set_FPSCR(VALUE) ((void)VALUE) - #endif - - #define __get_IPSR() (__arm_rsr("IPSR")) - #define __get_MSP() (__arm_rsr("MSP")) - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - #define __get_MSPLIM() (0U) - #else - #define __get_MSPLIM() (__arm_rsr("MSPLIM")) - #endif - #define __get_PRIMASK() (__arm_rsr("PRIMASK")) - #define __get_PSP() (__arm_rsr("PSP")) - - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - #define __get_PSPLIM() (0U) - #else - #define __get_PSPLIM() (__arm_rsr("PSPLIM")) - #endif - - #define __get_xPSR() (__arm_rsr("xPSR")) - - #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) - #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) - -__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) -{ - __arm_wsr("CONTROL", control); - __iar_builtin_ISB(); -} - - #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) - #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) - - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - #define __set_MSPLIM(VALUE) ((void)(VALUE)) - #else - #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) - #endif - #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) - #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - #define __set_PSPLIM(VALUE) ((void)(VALUE)) - #else - #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) - #endif - - #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS")) - -__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) -{ - __arm_wsr("CONTROL_NS", control); - __iar_builtin_ISB(); -} - - #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS")) - #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE))) - #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS")) - #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE))) - #define __TZ_get_SP_NS() (__arm_rsr("SP_NS")) - #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) - #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS")) - #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE))) - #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS")) - #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE))) - #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS")) - #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE))) - - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - #define __TZ_get_PSPLIM_NS() (0U) - #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) - #else - #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS")) - #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE))) - #endif - - #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS")) - #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE))) - - #define __NOP __iar_builtin_no_operation - - #define __CLZ __iar_builtin_CLZ - #define __CLREX __iar_builtin_CLREX - - #define __DMB __iar_builtin_DMB - #define __DSB __iar_builtin_DSB - #define __ISB __iar_builtin_ISB - - #define __LDREXB __iar_builtin_LDREXB - #define __LDREXH __iar_builtin_LDREXH - #define __LDREXW __iar_builtin_LDREX - - #define __RBIT __iar_builtin_RBIT - #define __REV __iar_builtin_REV - #define __REV16 __iar_builtin_REV16 - - __IAR_FT int16_t __REVSH(int16_t val) - { - return (int16_t) __iar_builtin_REVSH(val); - } - - #define __ROR __iar_builtin_ROR - #define __RRX __iar_builtin_RRX - - #define __SEV __iar_builtin_SEV - - #if !__IAR_M0_FAMILY - #define __SSAT __iar_builtin_SSAT - #endif - - #define __STREXB __iar_builtin_STREXB - #define __STREXH __iar_builtin_STREXH - #define __STREXW __iar_builtin_STREX - - #if !__IAR_M0_FAMILY - #define __USAT __iar_builtin_USAT - #endif - - #define __WFE __iar_builtin_WFE - #define __WFI __iar_builtin_WFI - - #if __ARM_MEDIA__ - #define __SADD8 __iar_builtin_SADD8 - #define __QADD8 __iar_builtin_QADD8 - #define __SHADD8 __iar_builtin_SHADD8 - #define __UADD8 __iar_builtin_UADD8 - #define __UQADD8 __iar_builtin_UQADD8 - #define __UHADD8 __iar_builtin_UHADD8 - #define __SSUB8 __iar_builtin_SSUB8 - #define __QSUB8 __iar_builtin_QSUB8 - #define __SHSUB8 __iar_builtin_SHSUB8 - #define __USUB8 __iar_builtin_USUB8 - #define __UQSUB8 __iar_builtin_UQSUB8 - #define __UHSUB8 __iar_builtin_UHSUB8 - #define __SADD16 __iar_builtin_SADD16 - #define __QADD16 __iar_builtin_QADD16 - #define __SHADD16 __iar_builtin_SHADD16 - #define __UADD16 __iar_builtin_UADD16 - #define __UQADD16 __iar_builtin_UQADD16 - #define __UHADD16 __iar_builtin_UHADD16 - #define __SSUB16 __iar_builtin_SSUB16 - #define __QSUB16 __iar_builtin_QSUB16 - #define __SHSUB16 __iar_builtin_SHSUB16 - #define __USUB16 __iar_builtin_USUB16 - #define __UQSUB16 __iar_builtin_UQSUB16 - #define __UHSUB16 __iar_builtin_UHSUB16 - #define __SASX __iar_builtin_SASX - #define __QASX __iar_builtin_QASX - #define __SHASX __iar_builtin_SHASX - #define __UASX __iar_builtin_UASX - #define __UQASX __iar_builtin_UQASX - #define __UHASX __iar_builtin_UHASX - #define __SSAX __iar_builtin_SSAX - #define __QSAX __iar_builtin_QSAX - #define __SHSAX __iar_builtin_SHSAX - #define __USAX __iar_builtin_USAX - #define __UQSAX __iar_builtin_UQSAX - #define __UHSAX __iar_builtin_UHSAX - #define __USAD8 __iar_builtin_USAD8 - #define __USADA8 __iar_builtin_USADA8 - #define __SSAT16 __iar_builtin_SSAT16 - #define __USAT16 __iar_builtin_USAT16 - #define __UXTB16 __iar_builtin_UXTB16 - #define __UXTAB16 __iar_builtin_UXTAB16 - #define __SXTB16 __iar_builtin_SXTB16 - #define __SXTAB16 __iar_builtin_SXTAB16 - #define __SMUAD __iar_builtin_SMUAD - #define __SMUADX __iar_builtin_SMUADX - #define __SMMLA __iar_builtin_SMMLA - #define __SMLAD __iar_builtin_SMLAD - #define __SMLADX __iar_builtin_SMLADX - #define __SMLALD __iar_builtin_SMLALD - #define __SMLALDX __iar_builtin_SMLALDX - #define __SMUSD __iar_builtin_SMUSD - #define __SMUSDX __iar_builtin_SMUSDX - #define __SMLSD __iar_builtin_SMLSD - #define __SMLSDX __iar_builtin_SMLSDX - #define __SMLSLD __iar_builtin_SMLSLD - #define __SMLSLDX __iar_builtin_SMLSLDX - #define __SEL __iar_builtin_SEL - #define __QADD __iar_builtin_QADD - #define __QSUB __iar_builtin_QSUB - #define __PKHBT __iar_builtin_PKHBT - #define __PKHTB __iar_builtin_PKHTB - #endif - -#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */ - - #if __IAR_M0_FAMILY - /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ - #define __CLZ __cmsis_iar_clz_not_active - #define __SSAT __cmsis_iar_ssat_not_active - #define __USAT __cmsis_iar_usat_not_active - #define __RBIT __cmsis_iar_rbit_not_active - #define __get_APSR __cmsis_iar_get_APSR_not_active - #endif - - - #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) - #define __get_FPSCR __cmsis_iar_get_FPSR_not_active - #define __set_FPSCR __cmsis_iar_set_FPSR_not_active - #endif - - #ifdef __INTRINSICS_INCLUDED - #error intrinsics.h is already included previously! - #endif - - #include - - #if __IAR_M0_FAMILY - /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ - #undef __CLZ - #undef __SSAT - #undef __USAT - #undef __RBIT - #undef __get_APSR - - __STATIC_INLINE uint8_t __CLZ(uint32_t data) - { - if (data == 0U) { return 32U; } - - uint32_t count = 0U; - uint32_t mask = 0x80000000U; - - while ((data & mask) == 0U) - { - count += 1U; - mask = mask >> 1U; - } - return count; - } - - __STATIC_INLINE uint32_t __RBIT(uint32_t v) - { - uint8_t sc = 31U; - uint32_t r = v; - for (v >>= 1U; v; v >>= 1U) - { - r <<= 1U; - r |= v & 1U; - sc--; - } - return (r << sc); - } - - __STATIC_INLINE uint32_t __get_APSR(void) - { - uint32_t res; - __asm("MRS %0,APSR" : "=r" (res)); - return res; - } - - #endif - - #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) - #undef __get_FPSCR - #undef __set_FPSCR - #define __get_FPSCR() (0) - #define __set_FPSCR(VALUE) ((void)VALUE) - #endif - - #pragma diag_suppress=Pe940 - #pragma diag_suppress=Pe177 - - #define __enable_irq __enable_interrupt - #define __disable_irq __disable_interrupt - #define __NOP __no_operation - - #define __get_xPSR __get_PSR - - #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0) - - __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr) - { - return __LDREX((unsigned long *)ptr); - } - - __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) - { - return __STREX(value, (unsigned long *)ptr); - } - #endif - - - /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ - #if (__CORTEX_M >= 0x03) - - __IAR_FT uint32_t __RRX(uint32_t value) - { - uint32_t result; - __ASM volatile("RRX %0, %1" : "=r"(result) : "r" (value)); - return(result); - } - - __IAR_FT void __set_BASEPRI_MAX(uint32_t value) - { - __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value)); - } - - - #define __enable_fault_irq __enable_fiq - #define __disable_fault_irq __disable_fiq - - - #endif /* (__CORTEX_M >= 0x03) */ - - __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) - { - return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2)); - } - - #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) - - __IAR_FT uint32_t __get_MSPLIM(void) - { - uint32_t res; - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - res = 0U; - #else - __asm volatile("MRS %0,MSPLIM" : "=r" (res)); - #endif - return res; - } - - __IAR_FT void __set_MSPLIM(uint32_t value) - { - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure MSPLIM is RAZ/WI - (void)value; - #else - __asm volatile("MSR MSPLIM,%0" :: "r" (value)); - #endif - } - - __IAR_FT uint32_t __get_PSPLIM(void) - { - uint32_t res; - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - res = 0U; - #else - __asm volatile("MRS %0,PSPLIM" : "=r" (res)); - #endif - return res; - } - - __IAR_FT void __set_PSPLIM(uint32_t value) - { - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - (void)value; - #else - __asm volatile("MSR PSPLIM,%0" :: "r" (value)); - #endif - } - - __IAR_FT uint32_t __TZ_get_CONTROL_NS(void) - { - uint32_t res; - __asm volatile("MRS %0,CONTROL_NS" : "=r" (res)); - return res; - } - - __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value) - { - __asm volatile("MSR CONTROL_NS,%0" :: "r" (value)); - __iar_builtin_ISB(); - } - - __IAR_FT uint32_t __TZ_get_PSP_NS(void) - { - uint32_t res; - __asm volatile("MRS %0,PSP_NS" : "=r" (res)); - return res; - } - - __IAR_FT void __TZ_set_PSP_NS(uint32_t value) - { - __asm volatile("MSR PSP_NS,%0" :: "r" (value)); - } - - __IAR_FT uint32_t __TZ_get_MSP_NS(void) - { - uint32_t res; - __asm volatile("MRS %0,MSP_NS" : "=r" (res)); - return res; - } - - __IAR_FT void __TZ_set_MSP_NS(uint32_t value) - { - __asm volatile("MSR MSP_NS,%0" :: "r" (value)); - } - - __IAR_FT uint32_t __TZ_get_SP_NS(void) - { - uint32_t res; - __asm volatile("MRS %0,SP_NS" : "=r" (res)); - return res; - } - __IAR_FT void __TZ_set_SP_NS(uint32_t value) - { - __asm volatile("MSR SP_NS,%0" :: "r" (value)); - } - - __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void) - { - uint32_t res; - __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res)); - return res; - } - - __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value) - { - __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value)); - } - - __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void) - { - uint32_t res; - __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res)); - return res; - } - - __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value) - { - __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value)); - } - - __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void) - { - uint32_t res; - __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res)); - return res; - } - - __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value) - { - __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value)); - } - - __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void) - { - uint32_t res; - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - res = 0U; - #else - __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res)); - #endif - return res; - } - - __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value) - { - #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ - (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) - // without main extensions, the non-secure PSPLIM is RAZ/WI - (void)value; - #else - __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value)); - #endif - } - - __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void) - { - uint32_t res; - __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res)); - return res; - } - - __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value) - { - __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value)); - } - - #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ - -#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */ - -#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value)) - -#if __IAR_M0_FAMILY - __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) - { - if ((sat >= 1U) && (sat <= 32U)) - { - const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); - const int32_t min = -1 - max ; - if (val > max) - { - return max; - } - else if (val < min) - { - return min; - } - } - return val; - } - - __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) - { - if (sat <= 31U) - { - const uint32_t max = ((1U << sat) - 1U); - if (val > (int32_t)max) - { - return max; - } - else if (val < 0) - { - return 0U; - } - } - return (uint32_t)val; - } -#endif - -#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ - - __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr) - { - uint32_t res; - __ASM volatile ("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); - return ((uint8_t)res); - } - - __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr) - { - uint32_t res; - __ASM volatile ("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); - return ((uint16_t)res); - } - - __IAR_FT uint32_t __LDRT(volatile uint32_t *addr) - { - uint32_t res; - __ASM volatile ("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); - return res; - } - - __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr) - { - __ASM volatile ("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); - } - - __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr) - { - __ASM volatile ("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); - } - - __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr) - { - __ASM volatile ("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory"); - } - -#endif /* (__CORTEX_M >= 0x03) */ - -#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ - (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) - - - __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr) - { - uint32_t res; - __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); - return ((uint8_t)res); - } - - __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr) - { - uint32_t res; - __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); - return ((uint16_t)res); - } - - __IAR_FT uint32_t __LDA(volatile uint32_t *ptr) - { - uint32_t res; - __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); - return res; - } - - __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr) - { - __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); - } - - __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr) - { - __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); - } - - __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr) - { - __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); - } - - __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr) - { - uint32_t res; - __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); - return ((uint8_t)res); - } - - __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr) - { - uint32_t res; - __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); - return ((uint16_t)res); - } - - __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr) - { - uint32_t res; - __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); - return res; - } - - __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) - { - uint32_t res; - __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); - return res; - } - - __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) - { - uint32_t res; - __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); - return res; - } - - __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) - { - uint32_t res; - __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); - return res; - } - -#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ - -#undef __IAR_FT -#undef __IAR_M0_FAMILY -#undef __ICCARM_V8 - -#pragma diag_default=Pe940 -#pragma diag_default=Pe177 - -#define __SXTB16_RORn(ARG1, ARG2) __SXTB16(__ROR(ARG1, ARG2)) - -#define __SXTAB16_RORn(ARG1, ARG2, ARG3) __SXTAB16(ARG1, __ROR(ARG2, ARG3)) - -#endif /* __CMSIS_ICCARM_H__ */ diff --git a/Drivers/CMSIS/Core/Include/cmsis_version.h b/Drivers/CMSIS/Core/Include/cmsis_version.h deleted file mode 100644 index 6addcbb..0000000 --- a/Drivers/CMSIS/Core/Include/cmsis_version.h +++ /dev/null @@ -1,39 +0,0 @@ -/**************************************************************************//** - * @file cmsis_version.h - * @brief CMSIS Core(M) Version definitions - * @version V5.0.5 - * @date 02. February 2022 - ******************************************************************************/ -/* - * Copyright (c) 2009-2022 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CMSIS_VERSION_H -#define __CMSIS_VERSION_H - -/* CMSIS Version definitions */ -#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ -#define __CM_CMSIS_VERSION_SUB ( 6U) /*!< [15:0] CMSIS Core(M) sub version */ -#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ - __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ -#endif diff --git a/Drivers/CMSIS/Core/Include/core_armv81mml.h b/Drivers/CMSIS/Core/Include/core_armv81mml.h deleted file mode 100644 index 7408a58..0000000 --- a/Drivers/CMSIS/Core/Include/core_armv81mml.h +++ /dev/null @@ -1,4228 +0,0 @@ -/**************************************************************************//** - * @file core_armv81mml.h - * @brief CMSIS Armv8.1-M Mainline Core Peripheral Access Layer Header File - * @version V1.4.2 - * @date 13. October 2021 - ******************************************************************************/ -/* - * Copyright (c) 2018-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#elif defined ( __GNUC__ ) - #pragma GCC diagnostic ignored "-Wpedantic" /* disable pedantic warning due to unnamed structs/unions */ -#endif - -#ifndef __CORE_ARMV81MML_H_GENERIC -#define __CORE_ARMV81MML_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_ARMV81MML - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS ARMV81MML definitions */ -#define __ARMv81MML_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __ARMv81MML_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __ARMv81MML_CMSIS_VERSION ((__ARMv81MML_CMSIS_VERSION_MAIN << 16U) | \ - __ARMv81MML_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (81U) /*!< Cortex-M Core */ - -#if defined ( __CC_ARM ) - #error Legacy Arm Compiler does not support Armv8.1-M target architecture. -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_ARMV81MML_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_ARMV81MML_H_DEPENDANT -#define __CORE_ARMV81MML_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __ARMv81MML_REV - #define __ARMv81MML_REV 0x0000U - #warning "__ARMv81MML_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #if __FPU_PRESENT != 0U - #ifndef __FPU_DP - #define __FPU_DP 0U - #warning "__FPU_DP not defined in device header file; using default!" - #endif - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __ICACHE_PRESENT - #define __ICACHE_PRESENT 0U - #warning "__ICACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DCACHE_PRESENT - #define __DCACHE_PRESENT 0U - #warning "__DCACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __PMU_PRESENT - #define __PMU_PRESENT 0U - #warning "__PMU_PRESENT not defined in device header file; using default!" - #endif - - #if __PMU_PRESENT != 0U - #ifndef __PMU_NUM_EVENTCNT - #define __PMU_NUM_EVENTCNT 2U - #warning "__PMU_NUM_EVENTCNT not defined in device header file; using default!" - #elif (__PMU_NUM_EVENTCNT > 31 || __PMU_NUM_EVENTCNT < 2) - #error "__PMU_NUM_EVENTCNT is out of range in device header file!" */ - #endif - #endif - - #ifndef __SAUREGION_PRESENT - #define __SAUREGION_PRESENT 0U - #warning "__SAUREGION_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DSP_PRESENT - #define __DSP_PRESENT 0U - #warning "__DSP_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 1U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group ARMv81MML */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core SAU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ - uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ - uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ - uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ -#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ - -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[16U]; - __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[16U]; - __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[16U]; - __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[16U]; - __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[16U]; - __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ - uint32_t RESERVED5[16U]; - __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED6[580U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ - __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ - __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ - __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ - uint32_t RESERVED7[21U]; - __IOM uint32_t SFSR; /*!< Offset: 0x0E4 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x0E8 (R/W) Secure Fault Address Register */ - uint32_t RESERVED3[69U]; - __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ - __IOM uint32_t RFSR; /*!< Offset: 0x204 (R/W) RAS Fault Status Register */ - uint32_t RESERVED4[14U]; - __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ - uint32_t RESERVED5[1U]; - __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ - uint32_t RESERVED6[1U]; - __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ - __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ - __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ - __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ - __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ - __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ - __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ - __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ - __OM uint32_t BPIALL; /*!< Offset: 0x278 ( /W) Branch Predictor Invalidate All */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ -#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ - -#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ -#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ - -#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ -#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ -#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ -#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ - -#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ -#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_IESB_Pos 5U /*!< SCB AIRCR: Implicit ESB Enable Position */ -#define SCB_AIRCR_IESB_Msk (1UL << SCB_AIRCR_IESB_Pos) /*!< SCB AIRCR: Implicit ESB Enable Mask */ - -#define SCB_AIRCR_DIT_Pos 4U /*!< SCB AIRCR: Data Independent Timing Position */ -#define SCB_AIRCR_DIT_Msk (1UL << SCB_AIRCR_DIT_Pos) /*!< SCB AIRCR: Data Independent Timing Mask */ - -#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ -#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ -#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_TRD_Pos 20U /*!< SCB CCR: TRD Position */ -#define SCB_CCR_TRD_Msk (1UL << SCB_CCR_TRD_Pos) /*!< SCB CCR: TRD Mask */ - -#define SCB_CCR_LOB_Pos 19U /*!< SCB CCR: LOB Position */ -#define SCB_CCR_LOB_Msk (1UL << SCB_CCR_LOB_Pos) /*!< SCB CCR: LOB Mask */ - -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ - -#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ -#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ -#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ -#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ -#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ - -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ -#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ - -#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ -#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ -#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ -#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ -#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ -#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_PMU_Pos 5U /*!< SCB DFSR: PMU Position */ -#define SCB_DFSR_PMU_Msk (1UL << SCB_DFSR_PMU_Pos) /*!< SCB DFSR: PMU Mask */ - -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/* SCB Non-Secure Access Control Register Definitions */ -#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ -#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ - -#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ -#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ - -#define SCB_NSACR_CP7_Pos 7U /*!< SCB NSACR: CP7 Position */ -#define SCB_NSACR_CP7_Msk (1UL << SCB_NSACR_CP7_Pos) /*!< SCB NSACR: CP7 Mask */ - -#define SCB_NSACR_CP6_Pos 6U /*!< SCB NSACR: CP6 Position */ -#define SCB_NSACR_CP6_Msk (1UL << SCB_NSACR_CP6_Pos) /*!< SCB NSACR: CP6 Mask */ - -#define SCB_NSACR_CP5_Pos 5U /*!< SCB NSACR: CP5 Position */ -#define SCB_NSACR_CP5_Msk (1UL << SCB_NSACR_CP5_Pos) /*!< SCB NSACR: CP5 Mask */ - -#define SCB_NSACR_CP4_Pos 4U /*!< SCB NSACR: CP4 Position */ -#define SCB_NSACR_CP4_Msk (1UL << SCB_NSACR_CP4_Pos) /*!< SCB NSACR: CP4 Mask */ - -#define SCB_NSACR_CP3_Pos 3U /*!< SCB NSACR: CP3 Position */ -#define SCB_NSACR_CP3_Msk (1UL << SCB_NSACR_CP3_Pos) /*!< SCB NSACR: CP3 Mask */ - -#define SCB_NSACR_CP2_Pos 2U /*!< SCB NSACR: CP2 Position */ -#define SCB_NSACR_CP2_Msk (1UL << SCB_NSACR_CP2_Pos) /*!< SCB NSACR: CP2 Mask */ - -#define SCB_NSACR_CP1_Pos 1U /*!< SCB NSACR: CP1 Position */ -#define SCB_NSACR_CP1_Msk (1UL << SCB_NSACR_CP1_Pos) /*!< SCB NSACR: CP1 Mask */ - -#define SCB_NSACR_CP0_Pos 0U /*!< SCB NSACR: CP0 Position */ -#define SCB_NSACR_CP0_Msk (1UL /*<< SCB_NSACR_CP0_Pos*/) /*!< SCB NSACR: CP0 Mask */ - -/* SCB Debug Feature Register 0 Definitions */ -#define SCB_ID_DFR_UDE_Pos 28U /*!< SCB ID_DFR: UDE Position */ -#define SCB_ID_DFR_UDE_Msk (0xFUL << SCB_ID_DFR_UDE_Pos) /*!< SCB ID_DFR: UDE Mask */ - -#define SCB_ID_DFR_MProfDbg_Pos 20U /*!< SCB ID_DFR: MProfDbg Position */ -#define SCB_ID_DFR_MProfDbg_Msk (0xFUL << SCB_ID_DFR_MProfDbg_Pos) /*!< SCB ID_DFR: MProfDbg Mask */ - -/* SCB Cache Level ID Register Definitions */ -#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ -#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ - -#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ -#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ - -/* SCB Cache Type Register Definitions */ -#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ -#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ - -#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ -#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ - -#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ -#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ - -#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ -#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ - -#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ -#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ - -/* SCB Cache Size ID Register Definitions */ -#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ -#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ - -#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ -#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ - -#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ -#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ - -#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ -#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ - -#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ -#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ - -#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ -#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ - -#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ -#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ - -/* SCB Cache Size Selection Register Definitions */ -#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ -#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ - -#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ -#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ - -/* SCB Software Triggered Interrupt Register Definitions */ -#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ -#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ - -/* SCB RAS Fault Status Register Definitions */ -#define SCB_RFSR_V_Pos 31U /*!< SCB RFSR: V Position */ -#define SCB_RFSR_V_Msk (1UL << SCB_RFSR_V_Pos) /*!< SCB RFSR: V Mask */ - -#define SCB_RFSR_IS_Pos 16U /*!< SCB RFSR: IS Position */ -#define SCB_RFSR_IS_Msk (0x7FFFUL << SCB_RFSR_IS_Pos) /*!< SCB RFSR: IS Mask */ - -#define SCB_RFSR_UET_Pos 0U /*!< SCB RFSR: UET Position */ -#define SCB_RFSR_UET_Msk (3UL /*<< SCB_RFSR_UET_Pos*/) /*!< SCB RFSR: UET Mask */ - -/* SCB D-Cache Invalidate by Set-way Register Definitions */ -#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ -#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ - -#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ -#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ - -/* SCB D-Cache Clean by Set-way Register Definitions */ -#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ -#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ - -#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ -#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ - -/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ -#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ -#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ - -#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ -#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ - __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ - uint32_t RESERVED6[3U]; - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) ITM Device Type Register */ - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Stimulus Port Register Definitions */ -#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ -#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ - -#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ -#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ -#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ - -#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ -#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - uint32_t RESERVED3[1U]; - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED4[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - uint32_t RESERVED5[1U]; - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED6[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - uint32_t RESERVED7[1U]; - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED8[1U]; - __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ - uint32_t RESERVED9[1U]; - __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ - uint32_t RESERVED10[1U]; - __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ - uint32_t RESERVED11[1U]; - __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ - uint32_t RESERVED12[1U]; - __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ - uint32_t RESERVED13[1U]; - __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ - uint32_t RESERVED14[1U]; - __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ - uint32_t RESERVED15[1U]; - __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ - uint32_t RESERVED16[1U]; - __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ - uint32_t RESERVED17[1U]; - __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ - uint32_t RESERVED18[1U]; - __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ - uint32_t RESERVED19[1U]; - __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ - uint32_t RESERVED20[1U]; - __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ - uint32_t RESERVED21[1U]; - __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ - uint32_t RESERVED22[1U]; - __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ - uint32_t RESERVED23[1U]; - __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ - uint32_t RESERVED24[1U]; - __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ - uint32_t RESERVED25[1U]; - __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ - uint32_t RESERVED26[1U]; - __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ - uint32_t RESERVED27[1U]; - __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ - uint32_t RESERVED28[1U]; - __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ - uint32_t RESERVED29[1U]; - __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ - uint32_t RESERVED30[1U]; - __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ - uint32_t RESERVED31[1U]; - __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ - uint32_t RESERVED32[934U]; - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ - uint32_t RESERVED33[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ -#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ -#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ - -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ -#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ - -#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ -#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ - uint32_t RESERVED3[809U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */ - uint32_t RESERVED4[4U]; - __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */ -#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ -#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ - -#define TPI_FFCR_EnFmt_Pos 0U /*!< TPI FFCR: EnFmt Position */ -#define TPI_FFCR_EnFmt_Msk (0x3UL << /*TPI_FFCR_EnFmt_Pos*/) /*!< TPI FFCR: EnFmt Mask */ - -/* TPI Periodic Synchronization Control Register Definitions */ -#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */ -#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */ - -/* TPI Software Lock Status Register Definitions */ -#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */ -#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */ - -#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */ -#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */ - -#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */ -#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */ -#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - -#if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_PMU Performance Monitoring Unit (PMU) - \brief Type definitions for the Performance Monitoring Unit (PMU) - @{ - */ - -/** - \brief Structure type to access the Performance Monitoring Unit (PMU). - */ -typedef struct -{ - __IOM uint32_t EVCNTR[__PMU_NUM_EVENTCNT]; /*!< Offset: 0x0 (R/W) PMU Event Counter Registers */ -#if __PMU_NUM_EVENTCNT<31 - uint32_t RESERVED0[31U-__PMU_NUM_EVENTCNT]; -#endif - __IOM uint32_t CCNTR; /*!< Offset: 0x7C (R/W) PMU Cycle Counter Register */ - uint32_t RESERVED1[224]; - __IOM uint32_t EVTYPER[__PMU_NUM_EVENTCNT]; /*!< Offset: 0x400 (R/W) PMU Event Type and Filter Registers */ -#if __PMU_NUM_EVENTCNT<31 - uint32_t RESERVED2[31U-__PMU_NUM_EVENTCNT]; -#endif - __IOM uint32_t CCFILTR; /*!< Offset: 0x47C (R/W) PMU Cycle Counter Filter Register */ - uint32_t RESERVED3[480]; - __IOM uint32_t CNTENSET; /*!< Offset: 0xC00 (R/W) PMU Count Enable Set Register */ - uint32_t RESERVED4[7]; - __IOM uint32_t CNTENCLR; /*!< Offset: 0xC20 (R/W) PMU Count Enable Clear Register */ - uint32_t RESERVED5[7]; - __IOM uint32_t INTENSET; /*!< Offset: 0xC40 (R/W) PMU Interrupt Enable Set Register */ - uint32_t RESERVED6[7]; - __IOM uint32_t INTENCLR; /*!< Offset: 0xC60 (R/W) PMU Interrupt Enable Clear Register */ - uint32_t RESERVED7[7]; - __IOM uint32_t OVSCLR; /*!< Offset: 0xC80 (R/W) PMU Overflow Flag Status Clear Register */ - uint32_t RESERVED8[7]; - __IOM uint32_t SWINC; /*!< Offset: 0xCA0 (R/W) PMU Software Increment Register */ - uint32_t RESERVED9[7]; - __IOM uint32_t OVSSET; /*!< Offset: 0xCC0 (R/W) PMU Overflow Flag Status Set Register */ - uint32_t RESERVED10[79]; - __IOM uint32_t TYPE; /*!< Offset: 0xE00 (R/W) PMU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0xE04 (R/W) PMU Control Register */ - uint32_t RESERVED11[108]; - __IOM uint32_t AUTHSTATUS; /*!< Offset: 0xFB8 (R/W) PMU Authentication Status Register */ - __IOM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/W) PMU Device Architecture Register */ - uint32_t RESERVED12[3]; - __IOM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/W) PMU Device Type Register */ - __IOM uint32_t PIDR4; /*!< Offset: 0xFD0 (R/W) PMU Peripheral Identification Register 4 */ - uint32_t RESERVED13[3]; - __IOM uint32_t PIDR0; /*!< Offset: 0xFE0 (R/W) PMU Peripheral Identification Register 0 */ - __IOM uint32_t PIDR1; /*!< Offset: 0xFE4 (R/W) PMU Peripheral Identification Register 1 */ - __IOM uint32_t PIDR2; /*!< Offset: 0xFE8 (R/W) PMU Peripheral Identification Register 2 */ - __IOM uint32_t PIDR3; /*!< Offset: 0xFEC (R/W) PMU Peripheral Identification Register 3 */ - __IOM uint32_t CIDR0; /*!< Offset: 0xFF0 (R/W) PMU Component Identification Register 0 */ - __IOM uint32_t CIDR1; /*!< Offset: 0xFF4 (R/W) PMU Component Identification Register 1 */ - __IOM uint32_t CIDR2; /*!< Offset: 0xFF8 (R/W) PMU Component Identification Register 2 */ - __IOM uint32_t CIDR3; /*!< Offset: 0xFFC (R/W) PMU Component Identification Register 3 */ -} PMU_Type; - -/** \brief PMU Event Counter Registers (0-30) Definitions */ - -#define PMU_EVCNTR_CNT_Pos 0U /*!< PMU EVCNTR: Counter Position */ -#define PMU_EVCNTR_CNT_Msk (0xFFFFUL /*<< PMU_EVCNTRx_CNT_Pos*/) /*!< PMU EVCNTR: Counter Mask */ - -/** \brief PMU Event Type and Filter Registers (0-30) Definitions */ - -#define PMU_EVTYPER_EVENTTOCNT_Pos 0U /*!< PMU EVTYPER: Event to Count Position */ -#define PMU_EVTYPER_EVENTTOCNT_Msk (0xFFFFUL /*<< EVTYPERx_EVENTTOCNT_Pos*/) /*!< PMU EVTYPER: Event to Count Mask */ - -/** \brief PMU Count Enable Set Register Definitions */ - -#define PMU_CNTENSET_CNT0_ENABLE_Pos 0U /*!< PMU CNTENSET: Event Counter 0 Enable Set Position */ -#define PMU_CNTENSET_CNT0_ENABLE_Msk (1UL /*<< PMU_CNTENSET_CNT0_ENABLE_Pos*/) /*!< PMU CNTENSET: Event Counter 0 Enable Set Mask */ - -#define PMU_CNTENSET_CNT1_ENABLE_Pos 1U /*!< PMU CNTENSET: Event Counter 1 Enable Set Position */ -#define PMU_CNTENSET_CNT1_ENABLE_Msk (1UL << PMU_CNTENSET_CNT1_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 1 Enable Set Mask */ - -#define PMU_CNTENSET_CNT2_ENABLE_Pos 2U /*!< PMU CNTENSET: Event Counter 2 Enable Set Position */ -#define PMU_CNTENSET_CNT2_ENABLE_Msk (1UL << PMU_CNTENSET_CNT2_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 2 Enable Set Mask */ - -#define PMU_CNTENSET_CNT3_ENABLE_Pos 3U /*!< PMU CNTENSET: Event Counter 3 Enable Set Position */ -#define PMU_CNTENSET_CNT3_ENABLE_Msk (1UL << PMU_CNTENSET_CNT3_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 3 Enable Set Mask */ - -#define PMU_CNTENSET_CNT4_ENABLE_Pos 4U /*!< PMU CNTENSET: Event Counter 4 Enable Set Position */ -#define PMU_CNTENSET_CNT4_ENABLE_Msk (1UL << PMU_CNTENSET_CNT4_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 4 Enable Set Mask */ - -#define PMU_CNTENSET_CNT5_ENABLE_Pos 5U /*!< PMU CNTENSET: Event Counter 5 Enable Set Position */ -#define PMU_CNTENSET_CNT5_ENABLE_Msk (1UL << PMU_CNTENSET_CNT5_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 5 Enable Set Mask */ - -#define PMU_CNTENSET_CNT6_ENABLE_Pos 6U /*!< PMU CNTENSET: Event Counter 6 Enable Set Position */ -#define PMU_CNTENSET_CNT6_ENABLE_Msk (1UL << PMU_CNTENSET_CNT6_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 6 Enable Set Mask */ - -#define PMU_CNTENSET_CNT7_ENABLE_Pos 7U /*!< PMU CNTENSET: Event Counter 7 Enable Set Position */ -#define PMU_CNTENSET_CNT7_ENABLE_Msk (1UL << PMU_CNTENSET_CNT7_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 7 Enable Set Mask */ - -#define PMU_CNTENSET_CNT8_ENABLE_Pos 8U /*!< PMU CNTENSET: Event Counter 8 Enable Set Position */ -#define PMU_CNTENSET_CNT8_ENABLE_Msk (1UL << PMU_CNTENSET_CNT8_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 8 Enable Set Mask */ - -#define PMU_CNTENSET_CNT9_ENABLE_Pos 9U /*!< PMU CNTENSET: Event Counter 9 Enable Set Position */ -#define PMU_CNTENSET_CNT9_ENABLE_Msk (1UL << PMU_CNTENSET_CNT9_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 9 Enable Set Mask */ - -#define PMU_CNTENSET_CNT10_ENABLE_Pos 10U /*!< PMU CNTENSET: Event Counter 10 Enable Set Position */ -#define PMU_CNTENSET_CNT10_ENABLE_Msk (1UL << PMU_CNTENSET_CNT10_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 10 Enable Set Mask */ - -#define PMU_CNTENSET_CNT11_ENABLE_Pos 11U /*!< PMU CNTENSET: Event Counter 11 Enable Set Position */ -#define PMU_CNTENSET_CNT11_ENABLE_Msk (1UL << PMU_CNTENSET_CNT11_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 11 Enable Set Mask */ - -#define PMU_CNTENSET_CNT12_ENABLE_Pos 12U /*!< PMU CNTENSET: Event Counter 12 Enable Set Position */ -#define PMU_CNTENSET_CNT12_ENABLE_Msk (1UL << PMU_CNTENSET_CNT12_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 12 Enable Set Mask */ - -#define PMU_CNTENSET_CNT13_ENABLE_Pos 13U /*!< PMU CNTENSET: Event Counter 13 Enable Set Position */ -#define PMU_CNTENSET_CNT13_ENABLE_Msk (1UL << PMU_CNTENSET_CNT13_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 13 Enable Set Mask */ - -#define PMU_CNTENSET_CNT14_ENABLE_Pos 14U /*!< PMU CNTENSET: Event Counter 14 Enable Set Position */ -#define PMU_CNTENSET_CNT14_ENABLE_Msk (1UL << PMU_CNTENSET_CNT14_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 14 Enable Set Mask */ - -#define PMU_CNTENSET_CNT15_ENABLE_Pos 15U /*!< PMU CNTENSET: Event Counter 15 Enable Set Position */ -#define PMU_CNTENSET_CNT15_ENABLE_Msk (1UL << PMU_CNTENSET_CNT15_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 15 Enable Set Mask */ - -#define PMU_CNTENSET_CNT16_ENABLE_Pos 16U /*!< PMU CNTENSET: Event Counter 16 Enable Set Position */ -#define PMU_CNTENSET_CNT16_ENABLE_Msk (1UL << PMU_CNTENSET_CNT16_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 16 Enable Set Mask */ - -#define PMU_CNTENSET_CNT17_ENABLE_Pos 17U /*!< PMU CNTENSET: Event Counter 17 Enable Set Position */ -#define PMU_CNTENSET_CNT17_ENABLE_Msk (1UL << PMU_CNTENSET_CNT17_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 17 Enable Set Mask */ - -#define PMU_CNTENSET_CNT18_ENABLE_Pos 18U /*!< PMU CNTENSET: Event Counter 18 Enable Set Position */ -#define PMU_CNTENSET_CNT18_ENABLE_Msk (1UL << PMU_CNTENSET_CNT18_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 18 Enable Set Mask */ - -#define PMU_CNTENSET_CNT19_ENABLE_Pos 19U /*!< PMU CNTENSET: Event Counter 19 Enable Set Position */ -#define PMU_CNTENSET_CNT19_ENABLE_Msk (1UL << PMU_CNTENSET_CNT19_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 19 Enable Set Mask */ - -#define PMU_CNTENSET_CNT20_ENABLE_Pos 20U /*!< PMU CNTENSET: Event Counter 20 Enable Set Position */ -#define PMU_CNTENSET_CNT20_ENABLE_Msk (1UL << PMU_CNTENSET_CNT20_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 20 Enable Set Mask */ - -#define PMU_CNTENSET_CNT21_ENABLE_Pos 21U /*!< PMU CNTENSET: Event Counter 21 Enable Set Position */ -#define PMU_CNTENSET_CNT21_ENABLE_Msk (1UL << PMU_CNTENSET_CNT21_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 21 Enable Set Mask */ - -#define PMU_CNTENSET_CNT22_ENABLE_Pos 22U /*!< PMU CNTENSET: Event Counter 22 Enable Set Position */ -#define PMU_CNTENSET_CNT22_ENABLE_Msk (1UL << PMU_CNTENSET_CNT22_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 22 Enable Set Mask */ - -#define PMU_CNTENSET_CNT23_ENABLE_Pos 23U /*!< PMU CNTENSET: Event Counter 23 Enable Set Position */ -#define PMU_CNTENSET_CNT23_ENABLE_Msk (1UL << PMU_CNTENSET_CNT23_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 23 Enable Set Mask */ - -#define PMU_CNTENSET_CNT24_ENABLE_Pos 24U /*!< PMU CNTENSET: Event Counter 24 Enable Set Position */ -#define PMU_CNTENSET_CNT24_ENABLE_Msk (1UL << PMU_CNTENSET_CNT24_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 24 Enable Set Mask */ - -#define PMU_CNTENSET_CNT25_ENABLE_Pos 25U /*!< PMU CNTENSET: Event Counter 25 Enable Set Position */ -#define PMU_CNTENSET_CNT25_ENABLE_Msk (1UL << PMU_CNTENSET_CNT25_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 25 Enable Set Mask */ - -#define PMU_CNTENSET_CNT26_ENABLE_Pos 26U /*!< PMU CNTENSET: Event Counter 26 Enable Set Position */ -#define PMU_CNTENSET_CNT26_ENABLE_Msk (1UL << PMU_CNTENSET_CNT26_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 26 Enable Set Mask */ - -#define PMU_CNTENSET_CNT27_ENABLE_Pos 27U /*!< PMU CNTENSET: Event Counter 27 Enable Set Position */ -#define PMU_CNTENSET_CNT27_ENABLE_Msk (1UL << PMU_CNTENSET_CNT27_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 27 Enable Set Mask */ - -#define PMU_CNTENSET_CNT28_ENABLE_Pos 28U /*!< PMU CNTENSET: Event Counter 28 Enable Set Position */ -#define PMU_CNTENSET_CNT28_ENABLE_Msk (1UL << PMU_CNTENSET_CNT28_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 28 Enable Set Mask */ - -#define PMU_CNTENSET_CNT29_ENABLE_Pos 29U /*!< PMU CNTENSET: Event Counter 29 Enable Set Position */ -#define PMU_CNTENSET_CNT29_ENABLE_Msk (1UL << PMU_CNTENSET_CNT29_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 29 Enable Set Mask */ - -#define PMU_CNTENSET_CNT30_ENABLE_Pos 30U /*!< PMU CNTENSET: Event Counter 30 Enable Set Position */ -#define PMU_CNTENSET_CNT30_ENABLE_Msk (1UL << PMU_CNTENSET_CNT30_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 30 Enable Set Mask */ - -#define PMU_CNTENSET_CCNTR_ENABLE_Pos 31U /*!< PMU CNTENSET: Cycle Counter Enable Set Position */ -#define PMU_CNTENSET_CCNTR_ENABLE_Msk (1UL << PMU_CNTENSET_CCNTR_ENABLE_Pos) /*!< PMU CNTENSET: Cycle Counter Enable Set Mask */ - -/** \brief PMU Count Enable Clear Register Definitions */ - -#define PMU_CNTENSET_CNT0_ENABLE_Pos 0U /*!< PMU CNTENCLR: Event Counter 0 Enable Clear Position */ -#define PMU_CNTENCLR_CNT0_ENABLE_Msk (1UL /*<< PMU_CNTENCLR_CNT0_ENABLE_Pos*/) /*!< PMU CNTENCLR: Event Counter 0 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT1_ENABLE_Pos 1U /*!< PMU CNTENCLR: Event Counter 1 Enable Clear Position */ -#define PMU_CNTENCLR_CNT1_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT1_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 1 Enable Clear */ - -#define PMU_CNTENCLR_CNT2_ENABLE_Pos 2U /*!< PMU CNTENCLR: Event Counter 2 Enable Clear Position */ -#define PMU_CNTENCLR_CNT2_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT2_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 2 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT3_ENABLE_Pos 3U /*!< PMU CNTENCLR: Event Counter 3 Enable Clear Position */ -#define PMU_CNTENCLR_CNT3_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT3_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 3 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT4_ENABLE_Pos 4U /*!< PMU CNTENCLR: Event Counter 4 Enable Clear Position */ -#define PMU_CNTENCLR_CNT4_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT4_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 4 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT5_ENABLE_Pos 5U /*!< PMU CNTENCLR: Event Counter 5 Enable Clear Position */ -#define PMU_CNTENCLR_CNT5_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT5_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 5 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT6_ENABLE_Pos 6U /*!< PMU CNTENCLR: Event Counter 6 Enable Clear Position */ -#define PMU_CNTENCLR_CNT6_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT6_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 6 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT7_ENABLE_Pos 7U /*!< PMU CNTENCLR: Event Counter 7 Enable Clear Position */ -#define PMU_CNTENCLR_CNT7_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT7_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 7 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT8_ENABLE_Pos 8U /*!< PMU CNTENCLR: Event Counter 8 Enable Clear Position */ -#define PMU_CNTENCLR_CNT8_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT8_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 8 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT9_ENABLE_Pos 9U /*!< PMU CNTENCLR: Event Counter 9 Enable Clear Position */ -#define PMU_CNTENCLR_CNT9_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT9_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 9 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT10_ENABLE_Pos 10U /*!< PMU CNTENCLR: Event Counter 10 Enable Clear Position */ -#define PMU_CNTENCLR_CNT10_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT10_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 10 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT11_ENABLE_Pos 11U /*!< PMU CNTENCLR: Event Counter 11 Enable Clear Position */ -#define PMU_CNTENCLR_CNT11_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT11_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 11 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT12_ENABLE_Pos 12U /*!< PMU CNTENCLR: Event Counter 12 Enable Clear Position */ -#define PMU_CNTENCLR_CNT12_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT12_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 12 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT13_ENABLE_Pos 13U /*!< PMU CNTENCLR: Event Counter 13 Enable Clear Position */ -#define PMU_CNTENCLR_CNT13_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT13_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 13 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT14_ENABLE_Pos 14U /*!< PMU CNTENCLR: Event Counter 14 Enable Clear Position */ -#define PMU_CNTENCLR_CNT14_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT14_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 14 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT15_ENABLE_Pos 15U /*!< PMU CNTENCLR: Event Counter 15 Enable Clear Position */ -#define PMU_CNTENCLR_CNT15_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT15_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 15 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT16_ENABLE_Pos 16U /*!< PMU CNTENCLR: Event Counter 16 Enable Clear Position */ -#define PMU_CNTENCLR_CNT16_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT16_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 16 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT17_ENABLE_Pos 17U /*!< PMU CNTENCLR: Event Counter 17 Enable Clear Position */ -#define PMU_CNTENCLR_CNT17_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT17_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 17 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT18_ENABLE_Pos 18U /*!< PMU CNTENCLR: Event Counter 18 Enable Clear Position */ -#define PMU_CNTENCLR_CNT18_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT18_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 18 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT19_ENABLE_Pos 19U /*!< PMU CNTENCLR: Event Counter 19 Enable Clear Position */ -#define PMU_CNTENCLR_CNT19_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT19_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 19 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT20_ENABLE_Pos 20U /*!< PMU CNTENCLR: Event Counter 20 Enable Clear Position */ -#define PMU_CNTENCLR_CNT20_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT20_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 20 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT21_ENABLE_Pos 21U /*!< PMU CNTENCLR: Event Counter 21 Enable Clear Position */ -#define PMU_CNTENCLR_CNT21_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT21_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 21 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT22_ENABLE_Pos 22U /*!< PMU CNTENCLR: Event Counter 22 Enable Clear Position */ -#define PMU_CNTENCLR_CNT22_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT22_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 22 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT23_ENABLE_Pos 23U /*!< PMU CNTENCLR: Event Counter 23 Enable Clear Position */ -#define PMU_CNTENCLR_CNT23_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT23_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 23 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT24_ENABLE_Pos 24U /*!< PMU CNTENCLR: Event Counter 24 Enable Clear Position */ -#define PMU_CNTENCLR_CNT24_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT24_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 24 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT25_ENABLE_Pos 25U /*!< PMU CNTENCLR: Event Counter 25 Enable Clear Position */ -#define PMU_CNTENCLR_CNT25_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT25_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 25 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT26_ENABLE_Pos 26U /*!< PMU CNTENCLR: Event Counter 26 Enable Clear Position */ -#define PMU_CNTENCLR_CNT26_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT26_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 26 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT27_ENABLE_Pos 27U /*!< PMU CNTENCLR: Event Counter 27 Enable Clear Position */ -#define PMU_CNTENCLR_CNT27_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT27_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 27 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT28_ENABLE_Pos 28U /*!< PMU CNTENCLR: Event Counter 28 Enable Clear Position */ -#define PMU_CNTENCLR_CNT28_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT28_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 28 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT29_ENABLE_Pos 29U /*!< PMU CNTENCLR: Event Counter 29 Enable Clear Position */ -#define PMU_CNTENCLR_CNT29_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT29_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 29 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT30_ENABLE_Pos 30U /*!< PMU CNTENCLR: Event Counter 30 Enable Clear Position */ -#define PMU_CNTENCLR_CNT30_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT30_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 30 Enable Clear Mask */ - -#define PMU_CNTENCLR_CCNTR_ENABLE_Pos 31U /*!< PMU CNTENCLR: Cycle Counter Enable Clear Position */ -#define PMU_CNTENCLR_CCNTR_ENABLE_Msk (1UL << PMU_CNTENCLR_CCNTR_ENABLE_Pos) /*!< PMU CNTENCLR: Cycle Counter Enable Clear Mask */ - -/** \brief PMU Interrupt Enable Set Register Definitions */ - -#define PMU_INTENSET_CNT0_ENABLE_Pos 0U /*!< PMU INTENSET: Event Counter 0 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT0_ENABLE_Msk (1UL /*<< PMU_INTENSET_CNT0_ENABLE_Pos*/) /*!< PMU INTENSET: Event Counter 0 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT1_ENABLE_Pos 1U /*!< PMU INTENSET: Event Counter 1 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT1_ENABLE_Msk (1UL << PMU_INTENSET_CNT1_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 1 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT2_ENABLE_Pos 2U /*!< PMU INTENSET: Event Counter 2 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT2_ENABLE_Msk (1UL << PMU_INTENSET_CNT2_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 2 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT3_ENABLE_Pos 3U /*!< PMU INTENSET: Event Counter 3 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT3_ENABLE_Msk (1UL << PMU_INTENSET_CNT3_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 3 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT4_ENABLE_Pos 4U /*!< PMU INTENSET: Event Counter 4 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT4_ENABLE_Msk (1UL << PMU_INTENSET_CNT4_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 4 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT5_ENABLE_Pos 5U /*!< PMU INTENSET: Event Counter 5 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT5_ENABLE_Msk (1UL << PMU_INTENSET_CNT5_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 5 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT6_ENABLE_Pos 6U /*!< PMU INTENSET: Event Counter 6 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT6_ENABLE_Msk (1UL << PMU_INTENSET_CNT6_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 6 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT7_ENABLE_Pos 7U /*!< PMU INTENSET: Event Counter 7 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT7_ENABLE_Msk (1UL << PMU_INTENSET_CNT7_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 7 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT8_ENABLE_Pos 8U /*!< PMU INTENSET: Event Counter 8 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT8_ENABLE_Msk (1UL << PMU_INTENSET_CNT8_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 8 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT9_ENABLE_Pos 9U /*!< PMU INTENSET: Event Counter 9 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT9_ENABLE_Msk (1UL << PMU_INTENSET_CNT9_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 9 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT10_ENABLE_Pos 10U /*!< PMU INTENSET: Event Counter 10 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT10_ENABLE_Msk (1UL << PMU_INTENSET_CNT10_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 10 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT11_ENABLE_Pos 11U /*!< PMU INTENSET: Event Counter 11 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT11_ENABLE_Msk (1UL << PMU_INTENSET_CNT11_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 11 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT12_ENABLE_Pos 12U /*!< PMU INTENSET: Event Counter 12 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT12_ENABLE_Msk (1UL << PMU_INTENSET_CNT12_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 12 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT13_ENABLE_Pos 13U /*!< PMU INTENSET: Event Counter 13 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT13_ENABLE_Msk (1UL << PMU_INTENSET_CNT13_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 13 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT14_ENABLE_Pos 14U /*!< PMU INTENSET: Event Counter 14 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT14_ENABLE_Msk (1UL << PMU_INTENSET_CNT14_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 14 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT15_ENABLE_Pos 15U /*!< PMU INTENSET: Event Counter 15 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT15_ENABLE_Msk (1UL << PMU_INTENSET_CNT15_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 15 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT16_ENABLE_Pos 16U /*!< PMU INTENSET: Event Counter 16 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT16_ENABLE_Msk (1UL << PMU_INTENSET_CNT16_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 16 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT17_ENABLE_Pos 17U /*!< PMU INTENSET: Event Counter 17 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT17_ENABLE_Msk (1UL << PMU_INTENSET_CNT17_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 17 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT18_ENABLE_Pos 18U /*!< PMU INTENSET: Event Counter 18 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT18_ENABLE_Msk (1UL << PMU_INTENSET_CNT18_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 18 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT19_ENABLE_Pos 19U /*!< PMU INTENSET: Event Counter 19 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT19_ENABLE_Msk (1UL << PMU_INTENSET_CNT19_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 19 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT20_ENABLE_Pos 20U /*!< PMU INTENSET: Event Counter 20 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT20_ENABLE_Msk (1UL << PMU_INTENSET_CNT20_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 20 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT21_ENABLE_Pos 21U /*!< PMU INTENSET: Event Counter 21 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT21_ENABLE_Msk (1UL << PMU_INTENSET_CNT21_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 21 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT22_ENABLE_Pos 22U /*!< PMU INTENSET: Event Counter 22 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT22_ENABLE_Msk (1UL << PMU_INTENSET_CNT22_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 22 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT23_ENABLE_Pos 23U /*!< PMU INTENSET: Event Counter 23 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT23_ENABLE_Msk (1UL << PMU_INTENSET_CNT23_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 23 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT24_ENABLE_Pos 24U /*!< PMU INTENSET: Event Counter 24 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT24_ENABLE_Msk (1UL << PMU_INTENSET_CNT24_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 24 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT25_ENABLE_Pos 25U /*!< PMU INTENSET: Event Counter 25 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT25_ENABLE_Msk (1UL << PMU_INTENSET_CNT25_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 25 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT26_ENABLE_Pos 26U /*!< PMU INTENSET: Event Counter 26 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT26_ENABLE_Msk (1UL << PMU_INTENSET_CNT26_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 26 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT27_ENABLE_Pos 27U /*!< PMU INTENSET: Event Counter 27 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT27_ENABLE_Msk (1UL << PMU_INTENSET_CNT27_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 27 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT28_ENABLE_Pos 28U /*!< PMU INTENSET: Event Counter 28 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT28_ENABLE_Msk (1UL << PMU_INTENSET_CNT28_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 28 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT29_ENABLE_Pos 29U /*!< PMU INTENSET: Event Counter 29 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT29_ENABLE_Msk (1UL << PMU_INTENSET_CNT29_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 29 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT30_ENABLE_Pos 30U /*!< PMU INTENSET: Event Counter 30 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT30_ENABLE_Msk (1UL << PMU_INTENSET_CNT30_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 30 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CYCCNT_ENABLE_Pos 31U /*!< PMU INTENSET: Cycle Counter Interrupt Enable Set Position */ -#define PMU_INTENSET_CCYCNT_ENABLE_Msk (1UL << PMU_INTENSET_CYCCNT_ENABLE_Pos) /*!< PMU INTENSET: Cycle Counter Interrupt Enable Set Mask */ - -/** \brief PMU Interrupt Enable Clear Register Definitions */ - -#define PMU_INTENSET_CNT0_ENABLE_Pos 0U /*!< PMU INTENCLR: Event Counter 0 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT0_ENABLE_Msk (1UL /*<< PMU_INTENCLR_CNT0_ENABLE_Pos*/) /*!< PMU INTENCLR: Event Counter 0 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT1_ENABLE_Pos 1U /*!< PMU INTENCLR: Event Counter 1 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT1_ENABLE_Msk (1UL << PMU_INTENCLR_CNT1_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 1 Interrupt Enable Clear */ - -#define PMU_INTENCLR_CNT2_ENABLE_Pos 2U /*!< PMU INTENCLR: Event Counter 2 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT2_ENABLE_Msk (1UL << PMU_INTENCLR_CNT2_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 2 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT3_ENABLE_Pos 3U /*!< PMU INTENCLR: Event Counter 3 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT3_ENABLE_Msk (1UL << PMU_INTENCLR_CNT3_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 3 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT4_ENABLE_Pos 4U /*!< PMU INTENCLR: Event Counter 4 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT4_ENABLE_Msk (1UL << PMU_INTENCLR_CNT4_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 4 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT5_ENABLE_Pos 5U /*!< PMU INTENCLR: Event Counter 5 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT5_ENABLE_Msk (1UL << PMU_INTENCLR_CNT5_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 5 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT6_ENABLE_Pos 6U /*!< PMU INTENCLR: Event Counter 6 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT6_ENABLE_Msk (1UL << PMU_INTENCLR_CNT6_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 6 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT7_ENABLE_Pos 7U /*!< PMU INTENCLR: Event Counter 7 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT7_ENABLE_Msk (1UL << PMU_INTENCLR_CNT7_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 7 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT8_ENABLE_Pos 8U /*!< PMU INTENCLR: Event Counter 8 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT8_ENABLE_Msk (1UL << PMU_INTENCLR_CNT8_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 8 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT9_ENABLE_Pos 9U /*!< PMU INTENCLR: Event Counter 9 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT9_ENABLE_Msk (1UL << PMU_INTENCLR_CNT9_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 9 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT10_ENABLE_Pos 10U /*!< PMU INTENCLR: Event Counter 10 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT10_ENABLE_Msk (1UL << PMU_INTENCLR_CNT10_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 10 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT11_ENABLE_Pos 11U /*!< PMU INTENCLR: Event Counter 11 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT11_ENABLE_Msk (1UL << PMU_INTENCLR_CNT11_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 11 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT12_ENABLE_Pos 12U /*!< PMU INTENCLR: Event Counter 12 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT12_ENABLE_Msk (1UL << PMU_INTENCLR_CNT12_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 12 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT13_ENABLE_Pos 13U /*!< PMU INTENCLR: Event Counter 13 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT13_ENABLE_Msk (1UL << PMU_INTENCLR_CNT13_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 13 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT14_ENABLE_Pos 14U /*!< PMU INTENCLR: Event Counter 14 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT14_ENABLE_Msk (1UL << PMU_INTENCLR_CNT14_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 14 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT15_ENABLE_Pos 15U /*!< PMU INTENCLR: Event Counter 15 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT15_ENABLE_Msk (1UL << PMU_INTENCLR_CNT15_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 15 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT16_ENABLE_Pos 16U /*!< PMU INTENCLR: Event Counter 16 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT16_ENABLE_Msk (1UL << PMU_INTENCLR_CNT16_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 16 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT17_ENABLE_Pos 17U /*!< PMU INTENCLR: Event Counter 17 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT17_ENABLE_Msk (1UL << PMU_INTENCLR_CNT17_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 17 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT18_ENABLE_Pos 18U /*!< PMU INTENCLR: Event Counter 18 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT18_ENABLE_Msk (1UL << PMU_INTENCLR_CNT18_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 18 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT19_ENABLE_Pos 19U /*!< PMU INTENCLR: Event Counter 19 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT19_ENABLE_Msk (1UL << PMU_INTENCLR_CNT19_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 19 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT20_ENABLE_Pos 20U /*!< PMU INTENCLR: Event Counter 20 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT20_ENABLE_Msk (1UL << PMU_INTENCLR_CNT20_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 20 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT21_ENABLE_Pos 21U /*!< PMU INTENCLR: Event Counter 21 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT21_ENABLE_Msk (1UL << PMU_INTENCLR_CNT21_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 21 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT22_ENABLE_Pos 22U /*!< PMU INTENCLR: Event Counter 22 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT22_ENABLE_Msk (1UL << PMU_INTENCLR_CNT22_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 22 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT23_ENABLE_Pos 23U /*!< PMU INTENCLR: Event Counter 23 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT23_ENABLE_Msk (1UL << PMU_INTENCLR_CNT23_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 23 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT24_ENABLE_Pos 24U /*!< PMU INTENCLR: Event Counter 24 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT24_ENABLE_Msk (1UL << PMU_INTENCLR_CNT24_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 24 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT25_ENABLE_Pos 25U /*!< PMU INTENCLR: Event Counter 25 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT25_ENABLE_Msk (1UL << PMU_INTENCLR_CNT25_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 25 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT26_ENABLE_Pos 26U /*!< PMU INTENCLR: Event Counter 26 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT26_ENABLE_Msk (1UL << PMU_INTENCLR_CNT26_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 26 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT27_ENABLE_Pos 27U /*!< PMU INTENCLR: Event Counter 27 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT27_ENABLE_Msk (1UL << PMU_INTENCLR_CNT27_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 27 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT28_ENABLE_Pos 28U /*!< PMU INTENCLR: Event Counter 28 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT28_ENABLE_Msk (1UL << PMU_INTENCLR_CNT28_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 28 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT29_ENABLE_Pos 29U /*!< PMU INTENCLR: Event Counter 29 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT29_ENABLE_Msk (1UL << PMU_INTENCLR_CNT29_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 29 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT30_ENABLE_Pos 30U /*!< PMU INTENCLR: Event Counter 30 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT30_ENABLE_Msk (1UL << PMU_INTENCLR_CNT30_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 30 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CYCCNT_ENABLE_Pos 31U /*!< PMU INTENCLR: Cycle Counter Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CYCCNT_ENABLE_Msk (1UL << PMU_INTENCLR_CYCCNT_ENABLE_Pos) /*!< PMU INTENCLR: Cycle Counter Interrupt Enable Clear Mask */ - -/** \brief PMU Overflow Flag Status Set Register Definitions */ - -#define PMU_OVSSET_CNT0_STATUS_Pos 0U /*!< PMU OVSSET: Event Counter 0 Overflow Set Position */ -#define PMU_OVSSET_CNT0_STATUS_Msk (1UL /*<< PMU_OVSSET_CNT0_STATUS_Pos*/) /*!< PMU OVSSET: Event Counter 0 Overflow Set Mask */ - -#define PMU_OVSSET_CNT1_STATUS_Pos 1U /*!< PMU OVSSET: Event Counter 1 Overflow Set Position */ -#define PMU_OVSSET_CNT1_STATUS_Msk (1UL << PMU_OVSSET_CNT1_STATUS_Pos) /*!< PMU OVSSET: Event Counter 1 Overflow Set Mask */ - -#define PMU_OVSSET_CNT2_STATUS_Pos 2U /*!< PMU OVSSET: Event Counter 2 Overflow Set Position */ -#define PMU_OVSSET_CNT2_STATUS_Msk (1UL << PMU_OVSSET_CNT2_STATUS_Pos) /*!< PMU OVSSET: Event Counter 2 Overflow Set Mask */ - -#define PMU_OVSSET_CNT3_STATUS_Pos 3U /*!< PMU OVSSET: Event Counter 3 Overflow Set Position */ -#define PMU_OVSSET_CNT3_STATUS_Msk (1UL << PMU_OVSSET_CNT3_STATUS_Pos) /*!< PMU OVSSET: Event Counter 3 Overflow Set Mask */ - -#define PMU_OVSSET_CNT4_STATUS_Pos 4U /*!< PMU OVSSET: Event Counter 4 Overflow Set Position */ -#define PMU_OVSSET_CNT4_STATUS_Msk (1UL << PMU_OVSSET_CNT4_STATUS_Pos) /*!< PMU OVSSET: Event Counter 4 Overflow Set Mask */ - -#define PMU_OVSSET_CNT5_STATUS_Pos 5U /*!< PMU OVSSET: Event Counter 5 Overflow Set Position */ -#define PMU_OVSSET_CNT5_STATUS_Msk (1UL << PMU_OVSSET_CNT5_STATUS_Pos) /*!< PMU OVSSET: Event Counter 5 Overflow Set Mask */ - -#define PMU_OVSSET_CNT6_STATUS_Pos 6U /*!< PMU OVSSET: Event Counter 6 Overflow Set Position */ -#define PMU_OVSSET_CNT6_STATUS_Msk (1UL << PMU_OVSSET_CNT6_STATUS_Pos) /*!< PMU OVSSET: Event Counter 6 Overflow Set Mask */ - -#define PMU_OVSSET_CNT7_STATUS_Pos 7U /*!< PMU OVSSET: Event Counter 7 Overflow Set Position */ -#define PMU_OVSSET_CNT7_STATUS_Msk (1UL << PMU_OVSSET_CNT7_STATUS_Pos) /*!< PMU OVSSET: Event Counter 7 Overflow Set Mask */ - -#define PMU_OVSSET_CNT8_STATUS_Pos 8U /*!< PMU OVSSET: Event Counter 8 Overflow Set Position */ -#define PMU_OVSSET_CNT8_STATUS_Msk (1UL << PMU_OVSSET_CNT8_STATUS_Pos) /*!< PMU OVSSET: Event Counter 8 Overflow Set Mask */ - -#define PMU_OVSSET_CNT9_STATUS_Pos 9U /*!< PMU OVSSET: Event Counter 9 Overflow Set Position */ -#define PMU_OVSSET_CNT9_STATUS_Msk (1UL << PMU_OVSSET_CNT9_STATUS_Pos) /*!< PMU OVSSET: Event Counter 9 Overflow Set Mask */ - -#define PMU_OVSSET_CNT10_STATUS_Pos 10U /*!< PMU OVSSET: Event Counter 10 Overflow Set Position */ -#define PMU_OVSSET_CNT10_STATUS_Msk (1UL << PMU_OVSSET_CNT10_STATUS_Pos) /*!< PMU OVSSET: Event Counter 10 Overflow Set Mask */ - -#define PMU_OVSSET_CNT11_STATUS_Pos 11U /*!< PMU OVSSET: Event Counter 11 Overflow Set Position */ -#define PMU_OVSSET_CNT11_STATUS_Msk (1UL << PMU_OVSSET_CNT11_STATUS_Pos) /*!< PMU OVSSET: Event Counter 11 Overflow Set Mask */ - -#define PMU_OVSSET_CNT12_STATUS_Pos 12U /*!< PMU OVSSET: Event Counter 12 Overflow Set Position */ -#define PMU_OVSSET_CNT12_STATUS_Msk (1UL << PMU_OVSSET_CNT12_STATUS_Pos) /*!< PMU OVSSET: Event Counter 12 Overflow Set Mask */ - -#define PMU_OVSSET_CNT13_STATUS_Pos 13U /*!< PMU OVSSET: Event Counter 13 Overflow Set Position */ -#define PMU_OVSSET_CNT13_STATUS_Msk (1UL << PMU_OVSSET_CNT13_STATUS_Pos) /*!< PMU OVSSET: Event Counter 13 Overflow Set Mask */ - -#define PMU_OVSSET_CNT14_STATUS_Pos 14U /*!< PMU OVSSET: Event Counter 14 Overflow Set Position */ -#define PMU_OVSSET_CNT14_STATUS_Msk (1UL << PMU_OVSSET_CNT14_STATUS_Pos) /*!< PMU OVSSET: Event Counter 14 Overflow Set Mask */ - -#define PMU_OVSSET_CNT15_STATUS_Pos 15U /*!< PMU OVSSET: Event Counter 15 Overflow Set Position */ -#define PMU_OVSSET_CNT15_STATUS_Msk (1UL << PMU_OVSSET_CNT15_STATUS_Pos) /*!< PMU OVSSET: Event Counter 15 Overflow Set Mask */ - -#define PMU_OVSSET_CNT16_STATUS_Pos 16U /*!< PMU OVSSET: Event Counter 16 Overflow Set Position */ -#define PMU_OVSSET_CNT16_STATUS_Msk (1UL << PMU_OVSSET_CNT16_STATUS_Pos) /*!< PMU OVSSET: Event Counter 16 Overflow Set Mask */ - -#define PMU_OVSSET_CNT17_STATUS_Pos 17U /*!< PMU OVSSET: Event Counter 17 Overflow Set Position */ -#define PMU_OVSSET_CNT17_STATUS_Msk (1UL << PMU_OVSSET_CNT17_STATUS_Pos) /*!< PMU OVSSET: Event Counter 17 Overflow Set Mask */ - -#define PMU_OVSSET_CNT18_STATUS_Pos 18U /*!< PMU OVSSET: Event Counter 18 Overflow Set Position */ -#define PMU_OVSSET_CNT18_STATUS_Msk (1UL << PMU_OVSSET_CNT18_STATUS_Pos) /*!< PMU OVSSET: Event Counter 18 Overflow Set Mask */ - -#define PMU_OVSSET_CNT19_STATUS_Pos 19U /*!< PMU OVSSET: Event Counter 19 Overflow Set Position */ -#define PMU_OVSSET_CNT19_STATUS_Msk (1UL << PMU_OVSSET_CNT19_STATUS_Pos) /*!< PMU OVSSET: Event Counter 19 Overflow Set Mask */ - -#define PMU_OVSSET_CNT20_STATUS_Pos 20U /*!< PMU OVSSET: Event Counter 20 Overflow Set Position */ -#define PMU_OVSSET_CNT20_STATUS_Msk (1UL << PMU_OVSSET_CNT20_STATUS_Pos) /*!< PMU OVSSET: Event Counter 20 Overflow Set Mask */ - -#define PMU_OVSSET_CNT21_STATUS_Pos 21U /*!< PMU OVSSET: Event Counter 21 Overflow Set Position */ -#define PMU_OVSSET_CNT21_STATUS_Msk (1UL << PMU_OVSSET_CNT21_STATUS_Pos) /*!< PMU OVSSET: Event Counter 21 Overflow Set Mask */ - -#define PMU_OVSSET_CNT22_STATUS_Pos 22U /*!< PMU OVSSET: Event Counter 22 Overflow Set Position */ -#define PMU_OVSSET_CNT22_STATUS_Msk (1UL << PMU_OVSSET_CNT22_STATUS_Pos) /*!< PMU OVSSET: Event Counter 22 Overflow Set Mask */ - -#define PMU_OVSSET_CNT23_STATUS_Pos 23U /*!< PMU OVSSET: Event Counter 23 Overflow Set Position */ -#define PMU_OVSSET_CNT23_STATUS_Msk (1UL << PMU_OVSSET_CNT23_STATUS_Pos) /*!< PMU OVSSET: Event Counter 23 Overflow Set Mask */ - -#define PMU_OVSSET_CNT24_STATUS_Pos 24U /*!< PMU OVSSET: Event Counter 24 Overflow Set Position */ -#define PMU_OVSSET_CNT24_STATUS_Msk (1UL << PMU_OVSSET_CNT24_STATUS_Pos) /*!< PMU OVSSET: Event Counter 24 Overflow Set Mask */ - -#define PMU_OVSSET_CNT25_STATUS_Pos 25U /*!< PMU OVSSET: Event Counter 25 Overflow Set Position */ -#define PMU_OVSSET_CNT25_STATUS_Msk (1UL << PMU_OVSSET_CNT25_STATUS_Pos) /*!< PMU OVSSET: Event Counter 25 Overflow Set Mask */ - -#define PMU_OVSSET_CNT26_STATUS_Pos 26U /*!< PMU OVSSET: Event Counter 26 Overflow Set Position */ -#define PMU_OVSSET_CNT26_STATUS_Msk (1UL << PMU_OVSSET_CNT26_STATUS_Pos) /*!< PMU OVSSET: Event Counter 26 Overflow Set Mask */ - -#define PMU_OVSSET_CNT27_STATUS_Pos 27U /*!< PMU OVSSET: Event Counter 27 Overflow Set Position */ -#define PMU_OVSSET_CNT27_STATUS_Msk (1UL << PMU_OVSSET_CNT27_STATUS_Pos) /*!< PMU OVSSET: Event Counter 27 Overflow Set Mask */ - -#define PMU_OVSSET_CNT28_STATUS_Pos 28U /*!< PMU OVSSET: Event Counter 28 Overflow Set Position */ -#define PMU_OVSSET_CNT28_STATUS_Msk (1UL << PMU_OVSSET_CNT28_STATUS_Pos) /*!< PMU OVSSET: Event Counter 28 Overflow Set Mask */ - -#define PMU_OVSSET_CNT29_STATUS_Pos 29U /*!< PMU OVSSET: Event Counter 29 Overflow Set Position */ -#define PMU_OVSSET_CNT29_STATUS_Msk (1UL << PMU_OVSSET_CNT29_STATUS_Pos) /*!< PMU OVSSET: Event Counter 29 Overflow Set Mask */ - -#define PMU_OVSSET_CNT30_STATUS_Pos 30U /*!< PMU OVSSET: Event Counter 30 Overflow Set Position */ -#define PMU_OVSSET_CNT30_STATUS_Msk (1UL << PMU_OVSSET_CNT30_STATUS_Pos) /*!< PMU OVSSET: Event Counter 30 Overflow Set Mask */ - -#define PMU_OVSSET_CYCCNT_STATUS_Pos 31U /*!< PMU OVSSET: Cycle Counter Overflow Set Position */ -#define PMU_OVSSET_CYCCNT_STATUS_Msk (1UL << PMU_OVSSET_CYCCNT_STATUS_Pos) /*!< PMU OVSSET: Cycle Counter Overflow Set Mask */ - -/** \brief PMU Overflow Flag Status Clear Register Definitions */ - -#define PMU_OVSCLR_CNT0_STATUS_Pos 0U /*!< PMU OVSCLR: Event Counter 0 Overflow Clear Position */ -#define PMU_OVSCLR_CNT0_STATUS_Msk (1UL /*<< PMU_OVSCLR_CNT0_STATUS_Pos*/) /*!< PMU OVSCLR: Event Counter 0 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT1_STATUS_Pos 1U /*!< PMU OVSCLR: Event Counter 1 Overflow Clear Position */ -#define PMU_OVSCLR_CNT1_STATUS_Msk (1UL << PMU_OVSCLR_CNT1_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 1 Overflow Clear */ - -#define PMU_OVSCLR_CNT2_STATUS_Pos 2U /*!< PMU OVSCLR: Event Counter 2 Overflow Clear Position */ -#define PMU_OVSCLR_CNT2_STATUS_Msk (1UL << PMU_OVSCLR_CNT2_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 2 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT3_STATUS_Pos 3U /*!< PMU OVSCLR: Event Counter 3 Overflow Clear Position */ -#define PMU_OVSCLR_CNT3_STATUS_Msk (1UL << PMU_OVSCLR_CNT3_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 3 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT4_STATUS_Pos 4U /*!< PMU OVSCLR: Event Counter 4 Overflow Clear Position */ -#define PMU_OVSCLR_CNT4_STATUS_Msk (1UL << PMU_OVSCLR_CNT4_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 4 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT5_STATUS_Pos 5U /*!< PMU OVSCLR: Event Counter 5 Overflow Clear Position */ -#define PMU_OVSCLR_CNT5_STATUS_Msk (1UL << PMU_OVSCLR_CNT5_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 5 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT6_STATUS_Pos 6U /*!< PMU OVSCLR: Event Counter 6 Overflow Clear Position */ -#define PMU_OVSCLR_CNT6_STATUS_Msk (1UL << PMU_OVSCLR_CNT6_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 6 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT7_STATUS_Pos 7U /*!< PMU OVSCLR: Event Counter 7 Overflow Clear Position */ -#define PMU_OVSCLR_CNT7_STATUS_Msk (1UL << PMU_OVSCLR_CNT7_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 7 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT8_STATUS_Pos 8U /*!< PMU OVSCLR: Event Counter 8 Overflow Clear Position */ -#define PMU_OVSCLR_CNT8_STATUS_Msk (1UL << PMU_OVSCLR_CNT8_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 8 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT9_STATUS_Pos 9U /*!< PMU OVSCLR: Event Counter 9 Overflow Clear Position */ -#define PMU_OVSCLR_CNT9_STATUS_Msk (1UL << PMU_OVSCLR_CNT9_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 9 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT10_STATUS_Pos 10U /*!< PMU OVSCLR: Event Counter 10 Overflow Clear Position */ -#define PMU_OVSCLR_CNT10_STATUS_Msk (1UL << PMU_OVSCLR_CNT10_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 10 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT11_STATUS_Pos 11U /*!< PMU OVSCLR: Event Counter 11 Overflow Clear Position */ -#define PMU_OVSCLR_CNT11_STATUS_Msk (1UL << PMU_OVSCLR_CNT11_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 11 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT12_STATUS_Pos 12U /*!< PMU OVSCLR: Event Counter 12 Overflow Clear Position */ -#define PMU_OVSCLR_CNT12_STATUS_Msk (1UL << PMU_OVSCLR_CNT12_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 12 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT13_STATUS_Pos 13U /*!< PMU OVSCLR: Event Counter 13 Overflow Clear Position */ -#define PMU_OVSCLR_CNT13_STATUS_Msk (1UL << PMU_OVSCLR_CNT13_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 13 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT14_STATUS_Pos 14U /*!< PMU OVSCLR: Event Counter 14 Overflow Clear Position */ -#define PMU_OVSCLR_CNT14_STATUS_Msk (1UL << PMU_OVSCLR_CNT14_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 14 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT15_STATUS_Pos 15U /*!< PMU OVSCLR: Event Counter 15 Overflow Clear Position */ -#define PMU_OVSCLR_CNT15_STATUS_Msk (1UL << PMU_OVSCLR_CNT15_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 15 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT16_STATUS_Pos 16U /*!< PMU OVSCLR: Event Counter 16 Overflow Clear Position */ -#define PMU_OVSCLR_CNT16_STATUS_Msk (1UL << PMU_OVSCLR_CNT16_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 16 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT17_STATUS_Pos 17U /*!< PMU OVSCLR: Event Counter 17 Overflow Clear Position */ -#define PMU_OVSCLR_CNT17_STATUS_Msk (1UL << PMU_OVSCLR_CNT17_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 17 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT18_STATUS_Pos 18U /*!< PMU OVSCLR: Event Counter 18 Overflow Clear Position */ -#define PMU_OVSCLR_CNT18_STATUS_Msk (1UL << PMU_OVSCLR_CNT18_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 18 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT19_STATUS_Pos 19U /*!< PMU OVSCLR: Event Counter 19 Overflow Clear Position */ -#define PMU_OVSCLR_CNT19_STATUS_Msk (1UL << PMU_OVSCLR_CNT19_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 19 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT20_STATUS_Pos 20U /*!< PMU OVSCLR: Event Counter 20 Overflow Clear Position */ -#define PMU_OVSCLR_CNT20_STATUS_Msk (1UL << PMU_OVSCLR_CNT20_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 20 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT21_STATUS_Pos 21U /*!< PMU OVSCLR: Event Counter 21 Overflow Clear Position */ -#define PMU_OVSCLR_CNT21_STATUS_Msk (1UL << PMU_OVSCLR_CNT21_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 21 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT22_STATUS_Pos 22U /*!< PMU OVSCLR: Event Counter 22 Overflow Clear Position */ -#define PMU_OVSCLR_CNT22_STATUS_Msk (1UL << PMU_OVSCLR_CNT22_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 22 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT23_STATUS_Pos 23U /*!< PMU OVSCLR: Event Counter 23 Overflow Clear Position */ -#define PMU_OVSCLR_CNT23_STATUS_Msk (1UL << PMU_OVSCLR_CNT23_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 23 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT24_STATUS_Pos 24U /*!< PMU OVSCLR: Event Counter 24 Overflow Clear Position */ -#define PMU_OVSCLR_CNT24_STATUS_Msk (1UL << PMU_OVSCLR_CNT24_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 24 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT25_STATUS_Pos 25U /*!< PMU OVSCLR: Event Counter 25 Overflow Clear Position */ -#define PMU_OVSCLR_CNT25_STATUS_Msk (1UL << PMU_OVSCLR_CNT25_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 25 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT26_STATUS_Pos 26U /*!< PMU OVSCLR: Event Counter 26 Overflow Clear Position */ -#define PMU_OVSCLR_CNT26_STATUS_Msk (1UL << PMU_OVSCLR_CNT26_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 26 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT27_STATUS_Pos 27U /*!< PMU OVSCLR: Event Counter 27 Overflow Clear Position */ -#define PMU_OVSCLR_CNT27_STATUS_Msk (1UL << PMU_OVSCLR_CNT27_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 27 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT28_STATUS_Pos 28U /*!< PMU OVSCLR: Event Counter 28 Overflow Clear Position */ -#define PMU_OVSCLR_CNT28_STATUS_Msk (1UL << PMU_OVSCLR_CNT28_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 28 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT29_STATUS_Pos 29U /*!< PMU OVSCLR: Event Counter 29 Overflow Clear Position */ -#define PMU_OVSCLR_CNT29_STATUS_Msk (1UL << PMU_OVSCLR_CNT29_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 29 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT30_STATUS_Pos 30U /*!< PMU OVSCLR: Event Counter 30 Overflow Clear Position */ -#define PMU_OVSCLR_CNT30_STATUS_Msk (1UL << PMU_OVSCLR_CNT30_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 30 Overflow Clear Mask */ - -#define PMU_OVSCLR_CYCCNT_STATUS_Pos 31U /*!< PMU OVSCLR: Cycle Counter Overflow Clear Position */ -#define PMU_OVSCLR_CYCCNT_STATUS_Msk (1UL << PMU_OVSCLR_CYCCNT_STATUS_Pos) /*!< PMU OVSCLR: Cycle Counter Overflow Clear Mask */ - -/** \brief PMU Software Increment Counter */ - -#define PMU_SWINC_CNT0_Pos 0U /*!< PMU SWINC: Event Counter 0 Software Increment Position */ -#define PMU_SWINC_CNT0_Msk (1UL /*<< PMU_SWINC_CNT0_Pos */) /*!< PMU SWINC: Event Counter 0 Software Increment Mask */ - -#define PMU_SWINC_CNT1_Pos 1U /*!< PMU SWINC: Event Counter 1 Software Increment Position */ -#define PMU_SWINC_CNT1_Msk (1UL << PMU_SWINC_CNT1_Pos) /*!< PMU SWINC: Event Counter 1 Software Increment Mask */ - -#define PMU_SWINC_CNT2_Pos 2U /*!< PMU SWINC: Event Counter 2 Software Increment Position */ -#define PMU_SWINC_CNT2_Msk (1UL << PMU_SWINC_CNT2_Pos) /*!< PMU SWINC: Event Counter 2 Software Increment Mask */ - -#define PMU_SWINC_CNT3_Pos 3U /*!< PMU SWINC: Event Counter 3 Software Increment Position */ -#define PMU_SWINC_CNT3_Msk (1UL << PMU_SWINC_CNT3_Pos) /*!< PMU SWINC: Event Counter 3 Software Increment Mask */ - -#define PMU_SWINC_CNT4_Pos 4U /*!< PMU SWINC: Event Counter 4 Software Increment Position */ -#define PMU_SWINC_CNT4_Msk (1UL << PMU_SWINC_CNT4_Pos) /*!< PMU SWINC: Event Counter 4 Software Increment Mask */ - -#define PMU_SWINC_CNT5_Pos 5U /*!< PMU SWINC: Event Counter 5 Software Increment Position */ -#define PMU_SWINC_CNT5_Msk (1UL << PMU_SWINC_CNT5_Pos) /*!< PMU SWINC: Event Counter 5 Software Increment Mask */ - -#define PMU_SWINC_CNT6_Pos 6U /*!< PMU SWINC: Event Counter 6 Software Increment Position */ -#define PMU_SWINC_CNT6_Msk (1UL << PMU_SWINC_CNT6_Pos) /*!< PMU SWINC: Event Counter 6 Software Increment Mask */ - -#define PMU_SWINC_CNT7_Pos 7U /*!< PMU SWINC: Event Counter 7 Software Increment Position */ -#define PMU_SWINC_CNT7_Msk (1UL << PMU_SWINC_CNT7_Pos) /*!< PMU SWINC: Event Counter 7 Software Increment Mask */ - -#define PMU_SWINC_CNT8_Pos 8U /*!< PMU SWINC: Event Counter 8 Software Increment Position */ -#define PMU_SWINC_CNT8_Msk (1UL << PMU_SWINC_CNT8_Pos) /*!< PMU SWINC: Event Counter 8 Software Increment Mask */ - -#define PMU_SWINC_CNT9_Pos 9U /*!< PMU SWINC: Event Counter 9 Software Increment Position */ -#define PMU_SWINC_CNT9_Msk (1UL << PMU_SWINC_CNT9_Pos) /*!< PMU SWINC: Event Counter 9 Software Increment Mask */ - -#define PMU_SWINC_CNT10_Pos 10U /*!< PMU SWINC: Event Counter 10 Software Increment Position */ -#define PMU_SWINC_CNT10_Msk (1UL << PMU_SWINC_CNT10_Pos) /*!< PMU SWINC: Event Counter 10 Software Increment Mask */ - -#define PMU_SWINC_CNT11_Pos 11U /*!< PMU SWINC: Event Counter 11 Software Increment Position */ -#define PMU_SWINC_CNT11_Msk (1UL << PMU_SWINC_CNT11_Pos) /*!< PMU SWINC: Event Counter 11 Software Increment Mask */ - -#define PMU_SWINC_CNT12_Pos 12U /*!< PMU SWINC: Event Counter 12 Software Increment Position */ -#define PMU_SWINC_CNT12_Msk (1UL << PMU_SWINC_CNT12_Pos) /*!< PMU SWINC: Event Counter 12 Software Increment Mask */ - -#define PMU_SWINC_CNT13_Pos 13U /*!< PMU SWINC: Event Counter 13 Software Increment Position */ -#define PMU_SWINC_CNT13_Msk (1UL << PMU_SWINC_CNT13_Pos) /*!< PMU SWINC: Event Counter 13 Software Increment Mask */ - -#define PMU_SWINC_CNT14_Pos 14U /*!< PMU SWINC: Event Counter 14 Software Increment Position */ -#define PMU_SWINC_CNT14_Msk (1UL << PMU_SWINC_CNT14_Pos) /*!< PMU SWINC: Event Counter 14 Software Increment Mask */ - -#define PMU_SWINC_CNT15_Pos 15U /*!< PMU SWINC: Event Counter 15 Software Increment Position */ -#define PMU_SWINC_CNT15_Msk (1UL << PMU_SWINC_CNT15_Pos) /*!< PMU SWINC: Event Counter 15 Software Increment Mask */ - -#define PMU_SWINC_CNT16_Pos 16U /*!< PMU SWINC: Event Counter 16 Software Increment Position */ -#define PMU_SWINC_CNT16_Msk (1UL << PMU_SWINC_CNT16_Pos) /*!< PMU SWINC: Event Counter 16 Software Increment Mask */ - -#define PMU_SWINC_CNT17_Pos 17U /*!< PMU SWINC: Event Counter 17 Software Increment Position */ -#define PMU_SWINC_CNT17_Msk (1UL << PMU_SWINC_CNT17_Pos) /*!< PMU SWINC: Event Counter 17 Software Increment Mask */ - -#define PMU_SWINC_CNT18_Pos 18U /*!< PMU SWINC: Event Counter 18 Software Increment Position */ -#define PMU_SWINC_CNT18_Msk (1UL << PMU_SWINC_CNT18_Pos) /*!< PMU SWINC: Event Counter 18 Software Increment Mask */ - -#define PMU_SWINC_CNT19_Pos 19U /*!< PMU SWINC: Event Counter 19 Software Increment Position */ -#define PMU_SWINC_CNT19_Msk (1UL << PMU_SWINC_CNT19_Pos) /*!< PMU SWINC: Event Counter 19 Software Increment Mask */ - -#define PMU_SWINC_CNT20_Pos 20U /*!< PMU SWINC: Event Counter 20 Software Increment Position */ -#define PMU_SWINC_CNT20_Msk (1UL << PMU_SWINC_CNT20_Pos) /*!< PMU SWINC: Event Counter 20 Software Increment Mask */ - -#define PMU_SWINC_CNT21_Pos 21U /*!< PMU SWINC: Event Counter 21 Software Increment Position */ -#define PMU_SWINC_CNT21_Msk (1UL << PMU_SWINC_CNT21_Pos) /*!< PMU SWINC: Event Counter 21 Software Increment Mask */ - -#define PMU_SWINC_CNT22_Pos 22U /*!< PMU SWINC: Event Counter 22 Software Increment Position */ -#define PMU_SWINC_CNT22_Msk (1UL << PMU_SWINC_CNT22_Pos) /*!< PMU SWINC: Event Counter 22 Software Increment Mask */ - -#define PMU_SWINC_CNT23_Pos 23U /*!< PMU SWINC: Event Counter 23 Software Increment Position */ -#define PMU_SWINC_CNT23_Msk (1UL << PMU_SWINC_CNT23_Pos) /*!< PMU SWINC: Event Counter 23 Software Increment Mask */ - -#define PMU_SWINC_CNT24_Pos 24U /*!< PMU SWINC: Event Counter 24 Software Increment Position */ -#define PMU_SWINC_CNT24_Msk (1UL << PMU_SWINC_CNT24_Pos) /*!< PMU SWINC: Event Counter 24 Software Increment Mask */ - -#define PMU_SWINC_CNT25_Pos 25U /*!< PMU SWINC: Event Counter 25 Software Increment Position */ -#define PMU_SWINC_CNT25_Msk (1UL << PMU_SWINC_CNT25_Pos) /*!< PMU SWINC: Event Counter 25 Software Increment Mask */ - -#define PMU_SWINC_CNT26_Pos 26U /*!< PMU SWINC: Event Counter 26 Software Increment Position */ -#define PMU_SWINC_CNT26_Msk (1UL << PMU_SWINC_CNT26_Pos) /*!< PMU SWINC: Event Counter 26 Software Increment Mask */ - -#define PMU_SWINC_CNT27_Pos 27U /*!< PMU SWINC: Event Counter 27 Software Increment Position */ -#define PMU_SWINC_CNT27_Msk (1UL << PMU_SWINC_CNT27_Pos) /*!< PMU SWINC: Event Counter 27 Software Increment Mask */ - -#define PMU_SWINC_CNT28_Pos 28U /*!< PMU SWINC: Event Counter 28 Software Increment Position */ -#define PMU_SWINC_CNT28_Msk (1UL << PMU_SWINC_CNT28_Pos) /*!< PMU SWINC: Event Counter 28 Software Increment Mask */ - -#define PMU_SWINC_CNT29_Pos 29U /*!< PMU SWINC: Event Counter 29 Software Increment Position */ -#define PMU_SWINC_CNT29_Msk (1UL << PMU_SWINC_CNT29_Pos) /*!< PMU SWINC: Event Counter 29 Software Increment Mask */ - -#define PMU_SWINC_CNT30_Pos 30U /*!< PMU SWINC: Event Counter 30 Software Increment Position */ -#define PMU_SWINC_CNT30_Msk (1UL << PMU_SWINC_CNT30_Pos) /*!< PMU SWINC: Event Counter 30 Software Increment Mask */ - -/** \brief PMU Control Register Definitions */ - -#define PMU_CTRL_ENABLE_Pos 0U /*!< PMU CTRL: ENABLE Position */ -#define PMU_CTRL_ENABLE_Msk (1UL /*<< PMU_CTRL_ENABLE_Pos*/) /*!< PMU CTRL: ENABLE Mask */ - -#define PMU_CTRL_EVENTCNT_RESET_Pos 1U /*!< PMU CTRL: Event Counter Reset Position */ -#define PMU_CTRL_EVENTCNT_RESET_Msk (1UL << PMU_CTRL_EVENTCNT_RESET_Pos) /*!< PMU CTRL: Event Counter Reset Mask */ - -#define PMU_CTRL_CYCCNT_RESET_Pos 2U /*!< PMU CTRL: Cycle Counter Reset Position */ -#define PMU_CTRL_CYCCNT_RESET_Msk (1UL << PMU_CTRL_CYCCNT_RESET_Pos) /*!< PMU CTRL: Cycle Counter Reset Mask */ - -#define PMU_CTRL_CYCCNT_DISABLE_Pos 5U /*!< PMU CTRL: Disable Cycle Counter Position */ -#define PMU_CTRL_CYCCNT_DISABLE_Msk (1UL << PMU_CTRL_CYCCNT_DISABLE_Pos) /*!< PMU CTRL: Disable Cycle Counter Mask */ - -#define PMU_CTRL_FRZ_ON_OV_Pos 9U /*!< PMU CTRL: Freeze-on-overflow Position */ -#define PMU_CTRL_FRZ_ON_OV_Msk (1UL << PMU_CTRL_FRZ_ON_OVERFLOW_Pos) /*!< PMU CTRL: Freeze-on-overflow Mask */ - -#define PMU_CTRL_TRACE_ON_OV_Pos 11U /*!< PMU CTRL: Trace-on-overflow Position */ -#define PMU_CTRL_TRACE_ON_OV_Msk (1UL << PMU_CTRL_TRACE_ON_OVERFLOW_Pos) /*!< PMU CTRL: Trace-on-overflow Mask */ - -/** \brief PMU Type Register Definitions */ - -#define PMU_TYPE_NUM_CNTS_Pos 0U /*!< PMU TYPE: Number of Counters Position */ -#define PMU_TYPE_NUM_CNTS_Msk (0xFFUL /*<< PMU_TYPE_NUM_CNTS_Pos*/) /*!< PMU TYPE: Number of Counters Mask */ - -#define PMU_TYPE_SIZE_CNTS_Pos 8U /*!< PMU TYPE: Size of Counters Position */ -#define PMU_TYPE_SIZE_CNTS_Msk (0x3FUL << PMU_TYPE_SIZE_CNTS_Pos) /*!< PMU TYPE: Size of Counters Mask */ - -#define PMU_TYPE_CYCCNT_PRESENT_Pos 14U /*!< PMU TYPE: Cycle Counter Present Position */ -#define PMU_TYPE_CYCCNT_PRESENT_Msk (1UL << PMU_TYPE_CYCCNT_PRESENT_Pos) /*!< PMU TYPE: Cycle Counter Present Mask */ - -#define PMU_TYPE_FRZ_OV_SUPPORT_Pos 21U /*!< PMU TYPE: Freeze-on-overflow Support Position */ -#define PMU_TYPE_FRZ_OV_SUPPORT_Msk (1UL << PMU_TYPE_FRZ_OV_SUPPORT_Pos) /*!< PMU TYPE: Freeze-on-overflow Support Mask */ - -#define PMU_TYPE_TRACE_ON_OV_SUPPORT_Pos 23U /*!< PMU TYPE: Trace-on-overflow Support Position */ -#define PMU_TYPE_TRACE_ON_OV_SUPPORT_Msk (1UL << PMU_TYPE_FRZ_OV_SUPPORT_Pos) /*!< PMU TYPE: Trace-on-overflow Support Mask */ - -/** \brief PMU Authentication Status Register Definitions */ - -#define PMU_AUTHSTATUS_NSID_Pos 0U /*!< PMU AUTHSTATUS: Non-secure Invasive Debug Position */ -#define PMU_AUTHSTATUS_NSID_Msk (0x3UL /*<< PMU_AUTHSTATUS_NSID_Pos*/) /*!< PMU AUTHSTATUS: Non-secure Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_NSNID_Pos 2U /*!< PMU AUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_NSNID_Msk (0x3UL << PMU_AUTHSTATUS_NSNID_Pos) /*!< PMU AUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SID_Pos 4U /*!< PMU AUTHSTATUS: Secure Invasive Debug Position */ -#define PMU_AUTHSTATUS_SID_Msk (0x3UL << PMU_AUTHSTATUS_SID_Pos) /*!< PMU AUTHSTATUS: Secure Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SNID_Pos 6U /*!< PMU AUTHSTATUS: Secure Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_SNID_Msk (0x3UL << PMU_AUTHSTATUS_SNID_Pos) /*!< PMU AUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define PMU_AUTHSTATUS_NSUID_Pos 16U /*!< PMU AUTHSTATUS: Non-secure Unprivileged Invasive Debug Position */ -#define PMU_AUTHSTATUS_NSUID_Msk (0x3UL << PMU_AUTHSTATUS_NSUID_Pos) /*!< PMU AUTHSTATUS: Non-secure Unprivileged Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_NSUNID_Pos 18U /*!< PMU AUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_NSUNID_Msk (0x3UL << PMU_AUTHSTATUS_NSUNID_Pos) /*!< PMU AUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SUID_Pos 20U /*!< PMU AUTHSTATUS: Secure Unprivileged Invasive Debug Position */ -#define PMU_AUTHSTATUS_SUID_Msk (0x3UL << PMU_AUTHSTATUS_SUID_Pos) /*!< PMU AUTHSTATUS: Secure Unprivileged Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SUNID_Pos 22U /*!< PMU AUTHSTATUS: Secure Unprivileged Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_SUNID_Msk (0x3UL << PMU_AUTHSTATUS_SUNID_Pos) /*!< PMU AUTHSTATUS: Secure Unprivileged Non-invasive Debug Mask */ - -/*@} end of group CMSIS_PMU */ -#endif - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ - __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ - __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ - __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ - uint32_t RESERVED0[1]; - union { - __IOM uint32_t MAIR[2]; - struct { - __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ - __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ - }; - }; -} MPU_Type; - -#define MPU_TYPE_RALIASES 4U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ -#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ - -#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ -#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ - -#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ -#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ - -#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ -#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ - -/* MPU Region Limit Address Register Definitions */ -#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ -#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ - -#define MPU_RLAR_PXN_Pos 4U /*!< MPU RLAR: PXN Position */ -#define MPU_RLAR_PXN_Msk (1UL << MPU_RLAR_PXN_Pos) /*!< MPU RLAR: PXN Mask */ - -#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ -#define MPU_RLAR_AttrIndx_Msk (7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ - -#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ -#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ - -/* MPU Memory Attribute Indirection Register 0 Definitions */ -#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ -#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ - -#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ -#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ - -#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ -#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ - -#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ -#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ - -/* MPU Memory Attribute Indirection Register 1 Definitions */ -#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ -#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ - -#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ -#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ - -#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ -#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ - -#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ -#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SAU Security Attribution Unit (SAU) - \brief Type definitions for the Security Attribution Unit (SAU) - @{ - */ - -/** - \brief Structure type to access the Security Attribution Unit (SAU). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ - __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ -#else - uint32_t RESERVED0[3]; -#endif - __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ -} SAU_Type; - -/* SAU Control Register Definitions */ -#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ -#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ - -#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ -#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ - -/* SAU Type Register Definitions */ -#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ -#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ - -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) -/* SAU Region Number Register Definitions */ -#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ -#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ - -/* SAU Region Base Address Register Definitions */ -#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ -#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ - -/* SAU Region Limit Address Register Definitions */ -#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ -#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ - -#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ -#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ - -#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ -#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ - -#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ - -/* Secure Fault Status Register Definitions */ -#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ -#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ - -#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ -#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ - -#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ -#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ - -#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ -#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ - -#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ -#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ - -#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ -#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ - -#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ -#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ - -#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ -#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ - -/*@} end of group CMSIS_SAU */ -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and VFP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ -#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ - -#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ -#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ - -#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ -#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ - -#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ -#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ - -#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ -#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ - -#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ -#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ -#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ -#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -#define FPU_FPDSCR_FZ16_Pos 19U /*!< FPDSCR: FZ16 bit Position */ -#define FPU_FPDSCR_FZ16_Msk (1UL << FPU_FPDSCR_FZ16_Pos) /*!< FPDSCR: FZ16 bit Mask */ - -#define FPU_FPDSCR_LTPSIZE_Pos 16U /*!< FPDSCR: LTPSIZE bit Position */ -#define FPU_FPDSCR_LTPSIZE_Msk (7UL << FPU_FPDSCR_LTPSIZE_Pos) /*!< FPDSCR: LTPSIZE bit Mask */ - -/* Media and VFP Feature Register 0 Definitions */ -#define FPU_MVFR0_FPRound_Pos 28U /*!< MVFR0: FPRound bits Position */ -#define FPU_MVFR0_FPRound_Msk (0xFUL << FPU_MVFR0_FPRound_Pos) /*!< MVFR0: FPRound bits Mask */ - -#define FPU_MVFR0_FPSqrt_Pos 20U /*!< MVFR0: FPSqrt bits Position */ -#define FPU_MVFR0_FPSqrt_Msk (0xFUL << FPU_MVFR0_FPSqrt_Pos) /*!< MVFR0: FPSqrt bits Mask */ - -#define FPU_MVFR0_FPDivide_Pos 16U /*!< MVFR0: FPDivide bits Position */ -#define FPU_MVFR0_FPDivide_Msk (0xFUL << FPU_MVFR0_FPDivide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FPDP_Pos 8U /*!< MVFR0: FPDP bits Position */ -#define FPU_MVFR0_FPDP_Msk (0xFUL << FPU_MVFR0_FPDP_Pos) /*!< MVFR0: FPDP bits Mask */ - -#define FPU_MVFR0_FPSP_Pos 4U /*!< MVFR0: FPSP bits Position */ -#define FPU_MVFR0_FPSP_Msk (0xFUL << FPU_MVFR0_FPSP_Pos) /*!< MVFR0: FPSP bits Mask */ - -#define FPU_MVFR0_SIMDReg_Pos 0U /*!< MVFR0: SIMDReg bits Position */ -#define FPU_MVFR0_SIMDReg_Msk (0xFUL /*<< FPU_MVFR0_SIMDReg_Pos*/) /*!< MVFR0: SIMDReg bits Mask */ - -/* Media and VFP Feature Register 1 Definitions */ -#define FPU_MVFR1_FMAC_Pos 28U /*!< MVFR1: FMAC bits Position */ -#define FPU_MVFR1_FMAC_Msk (0xFUL << FPU_MVFR1_FMAC_Pos) /*!< MVFR1: FMAC bits Mask */ - -#define FPU_MVFR1_FPHP_Pos 24U /*!< MVFR1: FPHP bits Position */ -#define FPU_MVFR1_FPHP_Msk (0xFUL << FPU_MVFR1_FPHP_Pos) /*!< MVFR1: FPHP bits Mask */ - -#define FPU_MVFR1_FP16_Pos 20U /*!< MVFR1: FP16 bits Position */ -#define FPU_MVFR1_FP16_Msk (0xFUL << FPU_MVFR1_FP16_Pos) /*!< MVFR1: FP16 bits Mask */ - -#define FPU_MVFR1_MVE_Pos 8U /*!< MVFR1: MVE bits Position */ -#define FPU_MVFR1_MVE_Msk (0xFUL << FPU_MVFR1_MVE_Pos) /*!< MVFR1: MVE bits Mask */ - -#define FPU_MVFR1_FPDNaN_Pos 4U /*!< MVFR1: FPDNaN bits Position */ -#define FPU_MVFR1_FPDNaN_Msk (0xFUL << FPU_MVFR1_FPDNaN_Pos) /*!< MVFR1: FPDNaN bits Mask */ - -#define FPU_MVFR1_FPFtZ_Pos 0U /*!< MVFR1: FPFtZ bits Position */ -#define FPU_MVFR1_FPFtZ_Msk (0xFUL /*<< FPU_MVFR1_FPFtZ_Pos*/) /*!< MVFR1: FPFtZ bits Mask */ - -/* Media and VFP Feature Register 2 Definitions */ -#define FPU_MVFR2_FPMisc_Pos 4U /*!< MVFR2: FPMisc bits Position */ -#define FPU_MVFR2_FPMisc_Msk (0xFUL << FPU_MVFR2_FPMisc_Pos) /*!< MVFR2: FPMisc bits Mask */ - -/*@} end of group CMSIS_FPU */ - -/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */ -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief \deprecated Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - __OM uint32_t DSCEMCR; /*!< Offset: 0x010 ( /W) Debug Set Clear Exception and Monitor Control Register */ - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */ -#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_FPD_Pos 23U /*!< \deprecated CoreDebug DHCSR: S_FPD Position */ -#define CoreDebug_DHCSR_S_FPD_Msk (1UL << CoreDebug_DHCSR_S_FPD_Pos) /*!< \deprecated CoreDebug DHCSR: S_FPD Mask */ - -#define CoreDebug_DHCSR_S_SUIDE_Pos 22U /*!< \deprecated CoreDebug DHCSR: S_SUIDE Position */ -#define CoreDebug_DHCSR_S_SUIDE_Msk (1UL << CoreDebug_DHCSR_S_SUIDE_Pos) /*!< \deprecated CoreDebug DHCSR: S_SUIDE Mask */ - -#define CoreDebug_DHCSR_S_NSUIDE_Pos 21U /*!< \deprecated CoreDebug DHCSR: S_NSUIDE Position */ -#define CoreDebug_DHCSR_S_NSUIDE_Msk (1UL << CoreDebug_DHCSR_S_NSUIDE_Pos) /*!< \deprecated CoreDebug DHCSR: S_NSUIDE Mask */ - -#define CoreDebug_DHCSR_S_SDE_Pos 20U /*!< \deprecated CoreDebug DHCSR: S_SDE Position */ -#define CoreDebug_DHCSR_S_SDE_Msk (1UL << CoreDebug_DHCSR_S_SDE_Pos) /*!< \deprecated CoreDebug DHCSR: S_SDE Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< \deprecated CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_PMOV_Pos 6U /*!< \deprecated CoreDebug DHCSR: C_PMOV Position */ -#define CoreDebug_DHCSR_C_PMOV_Msk (1UL << CoreDebug_DHCSR_C_PMOV_Pos) /*!< \deprecated CoreDebug DHCSR: C_PMOV Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< \deprecated CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< \deprecated CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< \deprecated CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< \deprecated CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< \deprecated CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< \deprecated CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */ - -/* Debug Set Clear Exception and Monitor Control Register Definitions */ -#define CoreDebug_DSCEMCR_CLR_MON_REQ_Pos 19U /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_REQ, Position */ -#define CoreDebug_DSCEMCR_CLR_MON_REQ_Msk (1UL << CoreDebug_DSCEMCR_CLR_MON_REQ_Pos) /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_REQ, Mask */ - -#define CoreDebug_DSCEMCR_CLR_MON_PEND_Pos 17U /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_PEND, Position */ -#define CoreDebug_DSCEMCR_CLR_MON_PEND_Msk (1UL << CoreDebug_DSCEMCR_CLR_MON_PEND_Pos) /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_PEND, Mask */ - -#define CoreDebug_DSCEMCR_SET_MON_REQ_Pos 3U /*!< \deprecated CoreDebug DSCEMCR: SET_MON_REQ, Position */ -#define CoreDebug_DSCEMCR_SET_MON_REQ_Msk (1UL << CoreDebug_DSCEMCR_SET_MON_REQ_Pos) /*!< \deprecated CoreDebug DSCEMCR: SET_MON_REQ, Mask */ - -#define CoreDebug_DSCEMCR_SET_MON_PEND_Pos 1U /*!< \deprecated CoreDebug DSCEMCR: SET_MON_PEND, Position */ -#define CoreDebug_DSCEMCR_SET_MON_PEND_Msk (1UL << CoreDebug_DSCEMCR_SET_MON_PEND_Pos) /*!< \deprecated CoreDebug DSCEMCR: SET_MON_PEND, Mask */ - -/* Debug Authentication Control Register Definitions */ -#define CoreDebug_DAUTHCTRL_UIDEN_Pos 10U /*!< \deprecated CoreDebug DAUTHCTRL: UIDEN, Position */ -#define CoreDebug_DAUTHCTRL_UIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_UIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: UIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_UIDAPEN_Pos 9U /*!< \deprecated CoreDebug DAUTHCTRL: UIDAPEN, Position */ -#define CoreDebug_DAUTHCTRL_UIDAPEN_Msk (1UL << CoreDebug_DAUTHCTRL_UIDAPEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: UIDAPEN, Mask */ - -#define CoreDebug_DAUTHCTRL_FSDMA_Pos 8U /*!< \deprecated CoreDebug DAUTHCTRL: FSDMA, Position */ -#define CoreDebug_DAUTHCTRL_FSDMA_Msk (1UL << CoreDebug_DAUTHCTRL_FSDMA_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: FSDMA, Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */ -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */ - -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */ - -/* Debug Security Control and Status Register Definitions */ -#define CoreDebug_DSCSR_CDS_Pos 16U /*!< \deprecated CoreDebug DSCSR: CDS Position */ -#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< \deprecated CoreDebug DSCSR: CDS Mask */ - -#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */ -#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */ - -#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */ -#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DCB Debug Control Block - \brief Type definitions for the Debug Control Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Control Block Registers (DCB). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - __OM uint32_t DSCEMCR; /*!< Offset: 0x010 ( /W) Debug Set Clear Exception and Monitor Control Register */ - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} DCB_Type; - -/* DHCSR, Debug Halting Control and Status Register Definitions */ -#define DCB_DHCSR_DBGKEY_Pos 16U /*!< DCB DHCSR: Debug key Position */ -#define DCB_DHCSR_DBGKEY_Msk (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos) /*!< DCB DHCSR: Debug key Mask */ - -#define DCB_DHCSR_S_RESTART_ST_Pos 26U /*!< DCB DHCSR: Restart sticky status Position */ -#define DCB_DHCSR_S_RESTART_ST_Msk (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos) /*!< DCB DHCSR: Restart sticky status Mask */ - -#define DCB_DHCSR_S_RESET_ST_Pos 25U /*!< DCB DHCSR: Reset sticky status Position */ -#define DCB_DHCSR_S_RESET_ST_Msk (0x1UL << DCB_DHCSR_S_RESET_ST_Pos) /*!< DCB DHCSR: Reset sticky status Mask */ - -#define DCB_DHCSR_S_RETIRE_ST_Pos 24U /*!< DCB DHCSR: Retire sticky status Position */ -#define DCB_DHCSR_S_RETIRE_ST_Msk (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos) /*!< DCB DHCSR: Retire sticky status Mask */ - -#define DCB_DHCSR_S_FPD_Pos 23U /*!< DCB DHCSR: Floating-point registers Debuggable Position */ -#define DCB_DHCSR_S_FPD_Msk (0x1UL << DCB_DHCSR_S_FPD_Pos) /*!< DCB DHCSR: Floating-point registers Debuggable Mask */ - -#define DCB_DHCSR_S_SUIDE_Pos 22U /*!< DCB DHCSR: Secure unprivileged halting debug enabled Position */ -#define DCB_DHCSR_S_SUIDE_Msk (0x1UL << DCB_DHCSR_S_SUIDE_Pos) /*!< DCB DHCSR: Secure unprivileged halting debug enabled Mask */ - -#define DCB_DHCSR_S_NSUIDE_Pos 21U /*!< DCB DHCSR: Non-secure unprivileged halting debug enabled Position */ -#define DCB_DHCSR_S_NSUIDE_Msk (0x1UL << DCB_DHCSR_S_NSUIDE_Pos) /*!< DCB DHCSR: Non-secure unprivileged halting debug enabled Mask */ - -#define DCB_DHCSR_S_SDE_Pos 20U /*!< DCB DHCSR: Secure debug enabled Position */ -#define DCB_DHCSR_S_SDE_Msk (0x1UL << DCB_DHCSR_S_SDE_Pos) /*!< DCB DHCSR: Secure debug enabled Mask */ - -#define DCB_DHCSR_S_LOCKUP_Pos 19U /*!< DCB DHCSR: Lockup status Position */ -#define DCB_DHCSR_S_LOCKUP_Msk (0x1UL << DCB_DHCSR_S_LOCKUP_Pos) /*!< DCB DHCSR: Lockup status Mask */ - -#define DCB_DHCSR_S_SLEEP_Pos 18U /*!< DCB DHCSR: Sleeping status Position */ -#define DCB_DHCSR_S_SLEEP_Msk (0x1UL << DCB_DHCSR_S_SLEEP_Pos) /*!< DCB DHCSR: Sleeping status Mask */ - -#define DCB_DHCSR_S_HALT_Pos 17U /*!< DCB DHCSR: Halted status Position */ -#define DCB_DHCSR_S_HALT_Msk (0x1UL << DCB_DHCSR_S_HALT_Pos) /*!< DCB DHCSR: Halted status Mask */ - -#define DCB_DHCSR_S_REGRDY_Pos 16U /*!< DCB DHCSR: Register ready status Position */ -#define DCB_DHCSR_S_REGRDY_Msk (0x1UL << DCB_DHCSR_S_REGRDY_Pos) /*!< DCB DHCSR: Register ready status Mask */ - -#define DCB_DHCSR_C_PMOV_Pos 6U /*!< DCB DHCSR: Halt on PMU overflow control Position */ -#define DCB_DHCSR_C_PMOV_Msk (0x1UL << DCB_DHCSR_C_PMOV_Pos) /*!< DCB DHCSR: Halt on PMU overflow control Mask */ - -#define DCB_DHCSR_C_SNAPSTALL_Pos 5U /*!< DCB DHCSR: Snap stall control Position */ -#define DCB_DHCSR_C_SNAPSTALL_Msk (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos) /*!< DCB DHCSR: Snap stall control Mask */ - -#define DCB_DHCSR_C_MASKINTS_Pos 3U /*!< DCB DHCSR: Mask interrupts control Position */ -#define DCB_DHCSR_C_MASKINTS_Msk (0x1UL << DCB_DHCSR_C_MASKINTS_Pos) /*!< DCB DHCSR: Mask interrupts control Mask */ - -#define DCB_DHCSR_C_STEP_Pos 2U /*!< DCB DHCSR: Step control Position */ -#define DCB_DHCSR_C_STEP_Msk (0x1UL << DCB_DHCSR_C_STEP_Pos) /*!< DCB DHCSR: Step control Mask */ - -#define DCB_DHCSR_C_HALT_Pos 1U /*!< DCB DHCSR: Halt control Position */ -#define DCB_DHCSR_C_HALT_Msk (0x1UL << DCB_DHCSR_C_HALT_Pos) /*!< DCB DHCSR: Halt control Mask */ - -#define DCB_DHCSR_C_DEBUGEN_Pos 0U /*!< DCB DHCSR: Debug enable control Position */ -#define DCB_DHCSR_C_DEBUGEN_Msk (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/) /*!< DCB DHCSR: Debug enable control Mask */ - -/* DCRSR, Debug Core Register Select Register Definitions */ -#define DCB_DCRSR_REGWnR_Pos 16U /*!< DCB DCRSR: Register write/not-read Position */ -#define DCB_DCRSR_REGWnR_Msk (0x1UL << DCB_DCRSR_REGWnR_Pos) /*!< DCB DCRSR: Register write/not-read Mask */ - -#define DCB_DCRSR_REGSEL_Pos 0U /*!< DCB DCRSR: Register selector Position */ -#define DCB_DCRSR_REGSEL_Msk (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/) /*!< DCB DCRSR: Register selector Mask */ - -/* DCRDR, Debug Core Register Data Register Definitions */ -#define DCB_DCRDR_DBGTMP_Pos 0U /*!< DCB DCRDR: Data temporary buffer Position */ -#define DCB_DCRDR_DBGTMP_Msk (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/) /*!< DCB DCRDR: Data temporary buffer Mask */ - -/* DEMCR, Debug Exception and Monitor Control Register Definitions */ -#define DCB_DEMCR_TRCENA_Pos 24U /*!< DCB DEMCR: Trace enable Position */ -#define DCB_DEMCR_TRCENA_Msk (0x1UL << DCB_DEMCR_TRCENA_Pos) /*!< DCB DEMCR: Trace enable Mask */ - -#define DCB_DEMCR_MONPRKEY_Pos 23U /*!< DCB DEMCR: Monitor pend req key Position */ -#define DCB_DEMCR_MONPRKEY_Msk (0x1UL << DCB_DEMCR_MONPRKEY_Pos) /*!< DCB DEMCR: Monitor pend req key Mask */ - -#define DCB_DEMCR_UMON_EN_Pos 21U /*!< DCB DEMCR: Unprivileged monitor enable Position */ -#define DCB_DEMCR_UMON_EN_Msk (0x1UL << DCB_DEMCR_UMON_EN_Pos) /*!< DCB DEMCR: Unprivileged monitor enable Mask */ - -#define DCB_DEMCR_SDME_Pos 20U /*!< DCB DEMCR: Secure DebugMonitor enable Position */ -#define DCB_DEMCR_SDME_Msk (0x1UL << DCB_DEMCR_SDME_Pos) /*!< DCB DEMCR: Secure DebugMonitor enable Mask */ - -#define DCB_DEMCR_MON_REQ_Pos 19U /*!< DCB DEMCR: Monitor request Position */ -#define DCB_DEMCR_MON_REQ_Msk (0x1UL << DCB_DEMCR_MON_REQ_Pos) /*!< DCB DEMCR: Monitor request Mask */ - -#define DCB_DEMCR_MON_STEP_Pos 18U /*!< DCB DEMCR: Monitor step Position */ -#define DCB_DEMCR_MON_STEP_Msk (0x1UL << DCB_DEMCR_MON_STEP_Pos) /*!< DCB DEMCR: Monitor step Mask */ - -#define DCB_DEMCR_MON_PEND_Pos 17U /*!< DCB DEMCR: Monitor pend Position */ -#define DCB_DEMCR_MON_PEND_Msk (0x1UL << DCB_DEMCR_MON_PEND_Pos) /*!< DCB DEMCR: Monitor pend Mask */ - -#define DCB_DEMCR_MON_EN_Pos 16U /*!< DCB DEMCR: Monitor enable Position */ -#define DCB_DEMCR_MON_EN_Msk (0x1UL << DCB_DEMCR_MON_EN_Pos) /*!< DCB DEMCR: Monitor enable Mask */ - -#define DCB_DEMCR_VC_SFERR_Pos 11U /*!< DCB DEMCR: Vector Catch SecureFault Position */ -#define DCB_DEMCR_VC_SFERR_Msk (0x1UL << DCB_DEMCR_VC_SFERR_Pos) /*!< DCB DEMCR: Vector Catch SecureFault Mask */ - -#define DCB_DEMCR_VC_HARDERR_Pos 10U /*!< DCB DEMCR: Vector Catch HardFault errors Position */ -#define DCB_DEMCR_VC_HARDERR_Msk (0x1UL << DCB_DEMCR_VC_HARDERR_Pos) /*!< DCB DEMCR: Vector Catch HardFault errors Mask */ - -#define DCB_DEMCR_VC_INTERR_Pos 9U /*!< DCB DEMCR: Vector Catch interrupt errors Position */ -#define DCB_DEMCR_VC_INTERR_Msk (0x1UL << DCB_DEMCR_VC_INTERR_Pos) /*!< DCB DEMCR: Vector Catch interrupt errors Mask */ - -#define DCB_DEMCR_VC_BUSERR_Pos 8U /*!< DCB DEMCR: Vector Catch BusFault errors Position */ -#define DCB_DEMCR_VC_BUSERR_Msk (0x1UL << DCB_DEMCR_VC_BUSERR_Pos) /*!< DCB DEMCR: Vector Catch BusFault errors Mask */ - -#define DCB_DEMCR_VC_STATERR_Pos 7U /*!< DCB DEMCR: Vector Catch state errors Position */ -#define DCB_DEMCR_VC_STATERR_Msk (0x1UL << DCB_DEMCR_VC_STATERR_Pos) /*!< DCB DEMCR: Vector Catch state errors Mask */ - -#define DCB_DEMCR_VC_CHKERR_Pos 6U /*!< DCB DEMCR: Vector Catch check errors Position */ -#define DCB_DEMCR_VC_CHKERR_Msk (0x1UL << DCB_DEMCR_VC_CHKERR_Pos) /*!< DCB DEMCR: Vector Catch check errors Mask */ - -#define DCB_DEMCR_VC_NOCPERR_Pos 5U /*!< DCB DEMCR: Vector Catch NOCP errors Position */ -#define DCB_DEMCR_VC_NOCPERR_Msk (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos) /*!< DCB DEMCR: Vector Catch NOCP errors Mask */ - -#define DCB_DEMCR_VC_MMERR_Pos 4U /*!< DCB DEMCR: Vector Catch MemManage errors Position */ -#define DCB_DEMCR_VC_MMERR_Msk (0x1UL << DCB_DEMCR_VC_MMERR_Pos) /*!< DCB DEMCR: Vector Catch MemManage errors Mask */ - -#define DCB_DEMCR_VC_CORERESET_Pos 0U /*!< DCB DEMCR: Vector Catch Core reset Position */ -#define DCB_DEMCR_VC_CORERESET_Msk (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/) /*!< DCB DEMCR: Vector Catch Core reset Mask */ - -/* DSCEMCR, Debug Set Clear Exception and Monitor Control Register Definitions */ -#define DCB_DSCEMCR_CLR_MON_REQ_Pos 19U /*!< DCB DSCEMCR: Clear monitor request Position */ -#define DCB_DSCEMCR_CLR_MON_REQ_Msk (0x1UL << DCB_DSCEMCR_CLR_MON_REQ_Pos) /*!< DCB DSCEMCR: Clear monitor request Mask */ - -#define DCB_DSCEMCR_CLR_MON_PEND_Pos 17U /*!< DCB DSCEMCR: Clear monitor pend Position */ -#define DCB_DSCEMCR_CLR_MON_PEND_Msk (0x1UL << DCB_DSCEMCR_CLR_MON_PEND_Pos) /*!< DCB DSCEMCR: Clear monitor pend Mask */ - -#define DCB_DSCEMCR_SET_MON_REQ_Pos 3U /*!< DCB DSCEMCR: Set monitor request Position */ -#define DCB_DSCEMCR_SET_MON_REQ_Msk (0x1UL << DCB_DSCEMCR_SET_MON_REQ_Pos) /*!< DCB DSCEMCR: Set monitor request Mask */ - -#define DCB_DSCEMCR_SET_MON_PEND_Pos 1U /*!< DCB DSCEMCR: Set monitor pend Position */ -#define DCB_DSCEMCR_SET_MON_PEND_Msk (0x1UL << DCB_DSCEMCR_SET_MON_PEND_Pos) /*!< DCB DSCEMCR: Set monitor pend Mask */ - -/* DAUTHCTRL, Debug Authentication Control Register Definitions */ -#define DCB_DAUTHCTRL_UIDEN_Pos 10U /*!< DCB DAUTHCTRL: Unprivileged Invasive Debug Enable Position */ -#define DCB_DAUTHCTRL_UIDEN_Msk (0x1UL << DCB_DAUTHCTRL_UIDEN_Pos) /*!< DCB DAUTHCTRL: Unprivileged Invasive Debug Enable Mask */ - -#define DCB_DAUTHCTRL_UIDAPEN_Pos 9U /*!< DCB DAUTHCTRL: Unprivileged Invasive DAP Access Enable Position */ -#define DCB_DAUTHCTRL_UIDAPEN_Msk (0x1UL << DCB_DAUTHCTRL_UIDAPEN_Pos) /*!< DCB DAUTHCTRL: Unprivileged Invasive DAP Access Enable Mask */ - -#define DCB_DAUTHCTRL_FSDMA_Pos 8U /*!< DCB DAUTHCTRL: Force Secure DebugMonitor Allowed Position */ -#define DCB_DAUTHCTRL_FSDMA_Msk (0x1UL << DCB_DAUTHCTRL_FSDMA_Pos) /*!< DCB DAUTHCTRL: Force Secure DebugMonitor Allowed Mask */ - -#define DCB_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPNIDENSEL_Msk (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos) /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */ - -#define DCB_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPIDENSEL_Msk (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */ - -/* DSCSR, Debug Security Control and Status Register Definitions */ -#define DCB_DSCSR_CDSKEY_Pos 17U /*!< DCB DSCSR: CDS write-enable key Position */ -#define DCB_DSCSR_CDSKEY_Msk (0x1UL << DCB_DSCSR_CDSKEY_Pos) /*!< DCB DSCSR: CDS write-enable key Mask */ - -#define DCB_DSCSR_CDS_Pos 16U /*!< DCB DSCSR: Current domain Secure Position */ -#define DCB_DSCSR_CDS_Msk (0x1UL << DCB_DSCSR_CDS_Pos) /*!< DCB DSCSR: Current domain Secure Mask */ - -#define DCB_DSCSR_SBRSEL_Pos 1U /*!< DCB DSCSR: Secure banked register select Position */ -#define DCB_DSCSR_SBRSEL_Msk (0x1UL << DCB_DSCSR_SBRSEL_Pos) /*!< DCB DSCSR: Secure banked register select Mask */ - -#define DCB_DSCSR_SBRSELEN_Pos 0U /*!< DCB DSCSR: Secure banked register select enable Position */ -#define DCB_DSCSR_SBRSELEN_Msk (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/) /*!< DCB DSCSR: Secure banked register select enable Mask */ - -/*@} end of group CMSIS_DCB */ - - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DIB Debug Identification Block - \brief Type definitions for the Debug Identification Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Identification Block Registers (DIB). - */ -typedef struct -{ - __OM uint32_t DLAR; /*!< Offset: 0x000 ( /W) SCS Software Lock Access Register */ - __IM uint32_t DLSR; /*!< Offset: 0x004 (R/ ) SCS Software Lock Status Register */ - __IM uint32_t DAUTHSTATUS; /*!< Offset: 0x008 (R/ ) Debug Authentication Status Register */ - __IM uint32_t DDEVARCH; /*!< Offset: 0x00C (R/ ) SCS Device Architecture Register */ - __IM uint32_t DDEVTYPE; /*!< Offset: 0x010 (R/ ) SCS Device Type Register */ -} DIB_Type; - -/* DLAR, SCS Software Lock Access Register Definitions */ -#define DIB_DLAR_KEY_Pos 0U /*!< DIB DLAR: KEY Position */ -#define DIB_DLAR_KEY_Msk (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */) /*!< DIB DLAR: KEY Mask */ - -/* DLSR, SCS Software Lock Status Register Definitions */ -#define DIB_DLSR_nTT_Pos 2U /*!< DIB DLSR: Not thirty-two bit Position */ -#define DIB_DLSR_nTT_Msk (0x1UL << DIB_DLSR_nTT_Pos ) /*!< DIB DLSR: Not thirty-two bit Mask */ - -#define DIB_DLSR_SLK_Pos 1U /*!< DIB DLSR: Software Lock status Position */ -#define DIB_DLSR_SLK_Msk (0x1UL << DIB_DLSR_SLK_Pos ) /*!< DIB DLSR: Software Lock status Mask */ - -#define DIB_DLSR_SLI_Pos 0U /*!< DIB DLSR: Software Lock implemented Position */ -#define DIB_DLSR_SLI_Msk (0x1UL /*<< DIB_DLSR_SLI_Pos*/) /*!< DIB DLSR: Software Lock implemented Mask */ - -/* DAUTHSTATUS, Debug Authentication Status Register Definitions */ -#define DIB_DAUTHSTATUS_SUNID_Pos 22U /*!< DIB DAUTHSTATUS: Secure Unprivileged Non-invasive Debug Allowed Position */ -#define DIB_DAUTHSTATUS_SUNID_Msk (0x3UL << DIB_DAUTHSTATUS_SUNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Unprivileged Non-invasive Debug Allowed Mask */ - -#define DIB_DAUTHSTATUS_SUID_Pos 20U /*!< DIB DAUTHSTATUS: Secure Unprivileged Invasive Debug Allowed Position */ -#define DIB_DAUTHSTATUS_SUID_Msk (0x3UL << DIB_DAUTHSTATUS_SUID_Pos ) /*!< DIB DAUTHSTATUS: Secure Unprivileged Invasive Debug Allowed Mask */ - -#define DIB_DAUTHSTATUS_NSUNID_Pos 18U /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Allo Position */ -#define DIB_DAUTHSTATUS_NSUNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSUNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Allo Mask */ - -#define DIB_DAUTHSTATUS_NSUID_Pos 16U /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Invasive Debug Allowed Position */ -#define DIB_DAUTHSTATUS_NSUID_Msk (0x3UL << DIB_DAUTHSTATUS_NSUID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Invasive Debug Allowed Mask */ - -#define DIB_DAUTHSTATUS_SNID_Pos 6U /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_SNID_Msk (0x3UL << DIB_DAUTHSTATUS_SNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_SID_Pos 4U /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_SID_Msk (0x3UL << DIB_DAUTHSTATUS_SID_Pos ) /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSNID_Pos 2U /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSID_Pos 0U /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSID_Msk (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/) /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */ - -/* DDEVARCH, SCS Device Architecture Register Definitions */ -#define DIB_DDEVARCH_ARCHITECT_Pos 21U /*!< DIB DDEVARCH: Architect Position */ -#define DIB_DDEVARCH_ARCHITECT_Msk (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos ) /*!< DIB DDEVARCH: Architect Mask */ - -#define DIB_DDEVARCH_PRESENT_Pos 20U /*!< DIB DDEVARCH: DEVARCH Present Position */ -#define DIB_DDEVARCH_PRESENT_Msk (0x1FUL << DIB_DDEVARCH_PRESENT_Pos ) /*!< DIB DDEVARCH: DEVARCH Present Mask */ - -#define DIB_DDEVARCH_REVISION_Pos 16U /*!< DIB DDEVARCH: Revision Position */ -#define DIB_DDEVARCH_REVISION_Msk (0xFUL << DIB_DDEVARCH_REVISION_Pos ) /*!< DIB DDEVARCH: Revision Mask */ - -#define DIB_DDEVARCH_ARCHVER_Pos 12U /*!< DIB DDEVARCH: Architecture Version Position */ -#define DIB_DDEVARCH_ARCHVER_Msk (0xFUL << DIB_DDEVARCH_ARCHVER_Pos ) /*!< DIB DDEVARCH: Architecture Version Mask */ - -#define DIB_DDEVARCH_ARCHPART_Pos 0U /*!< DIB DDEVARCH: Architecture Part Position */ -#define DIB_DDEVARCH_ARCHPART_Msk (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/) /*!< DIB DDEVARCH: Architecture Part Mask */ - -/* DDEVTYPE, SCS Device Type Register Definitions */ -#define DIB_DDEVTYPE_SUB_Pos 4U /*!< DIB DDEVTYPE: Sub-type Position */ -#define DIB_DDEVTYPE_SUB_Msk (0xFUL << DIB_DDEVTYPE_SUB_Pos ) /*!< DIB DDEVTYPE: Sub-type Mask */ - -#define DIB_DDEVTYPE_MAJOR_Pos 0U /*!< DIB DDEVTYPE: Major type Position */ -#define DIB_DDEVTYPE_MAJOR_Msk (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/) /*!< DIB DDEVTYPE: Major type Mask */ - - -/*@} end of group CMSIS_DIB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ - #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ - #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ - #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ - #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ - #define CoreDebug_BASE (0xE000EDF0UL) /*!< \deprecated Core Debug Base Address */ - #define DCB_BASE (0xE000EDF0UL) /*!< DCB Base Address */ - #define DIB_BASE (0xE000EFB0UL) /*!< DIB Base Address */ - #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ - #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ - #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - - #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ - #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ - #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ - #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ - #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ - #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ - #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< \deprecated Core Debug configuration struct */ - #define DCB ((DCB_Type *) DCB_BASE ) /*!< DCB configuration struct */ - #define DIB ((DIB_Type *) DIB_BASE ) /*!< DIB configuration struct */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ - #endif - - #if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U) - #define PMU_BASE (0xE0003000UL) /*!< PMU Base Address */ - #define PMU ((PMU_Type *) PMU_BASE ) /*!< PMU configuration struct */ - #endif - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ - #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ - #endif - - #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ - #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ - #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< \deprecated Core Debug Base Address (non-secure address space) */ - #define DCB_BASE_NS (0xE002EDF0UL) /*!< DCB Base Address (non-secure address space) */ - #define DIB_BASE_NS (0xE002EFB0UL) /*!< DIB Base Address (non-secure address space) */ - #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ - #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ - #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ - - #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ - #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ - #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ - #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ - #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct (non-secure address space) */ - #define DCB_NS ((DCB_Type *) DCB_BASE_NS ) /*!< DCB configuration struct (non-secure address space) */ - #define DIB_NS ((DIB_Type *) DIB_BASE_NS ) /*!< DIB configuration struct (non-secure address space) */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ - #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ - #endif - - #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ - #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ -/*@} */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_register_aliases Backwards Compatibility Aliases - \brief Register alias definitions for backwards compatibility. - @{ - */ -#define ID_ADR (ID_AFR) /*!< SCB Auxiliary Feature Register */ -/*@} */ - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* Special LR values for Secure/Non-Secure call handling and exception handling */ - -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ -#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ - -/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ -#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ -#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ -#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ -#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ -#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ -#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ -#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ - -/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ -#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ -#else -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ -#endif - - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Interrupt Target State - \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - \return 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Target State - \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Clear Interrupt Target State - \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - __DSB(); -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Priority Grouping (non-secure) - \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB_NS->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB_NS->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping (non-secure) - \details Reads the priority grouping field from the non-secure NVIC when in secure state. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) -{ - return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt (non-secure) - \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Interrupt Enable status (non-secure) - \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt (non-secure) - \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Pending Interrupt (non-secure) - \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt (non-secure) - \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt (non-secure) - \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt (non-secure) - \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority (non-secure) - \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every non-secure processor exception. - */ -__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority (non-secure) - \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_NVICFunctions */ - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv8.h" - -#endif - -/* ########################## PMU functions and events #################################### */ - -#if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U) - -#include "pmu_armv8.h" - -#endif - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = FPU->MVFR0; - if ((mvfr0 & (FPU_MVFR0_FPSP_Msk | FPU_MVFR0_FPDP_Msk)) == 0x220U) - { - return 2U; /* Double + Single precision FPU */ - } - else if ((mvfr0 & (FPU_MVFR0_FPSP_Msk | FPU_MVFR0_FPDP_Msk)) == 0x020U) - { - return 1U; /* Single precision FPU */ - } - else - { - return 0U; /* No FPU */ - } -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - -/* ########################## MVE functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_MveFunctions MVE Functions - \brief Function that provides MVE type. - @{ - */ - -/** - \brief get MVE type - \details returns the MVE type - \returns - - \b 0: No Vector Extension (MVE) - - \b 1: Integer Vector Extension (MVE-I) - - \b 2: Floating-point Vector Extension (MVE-F) - */ -__STATIC_INLINE uint32_t SCB_GetMVEType(void) -{ - const uint32_t mvfr1 = FPU->MVFR1; - if ((mvfr1 & FPU_MVFR1_MVE_Msk) == (0x2U << FPU_MVFR1_MVE_Pos)) - { - return 2U; - } - else if ((mvfr1 & FPU_MVFR1_MVE_Msk) == (0x1U << FPU_MVFR1_MVE_Pos)) - { - return 1U; - } - else - { - return 0U; - } -} - - -/*@} end of CMSIS_Core_MveFunctions */ - - -/* ########################## Cache functions #################################### */ - -#if ((defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)) || \ - (defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U))) -#include "cachel1_armv7.h" -#endif - - -/* ########################## SAU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SAUFunctions SAU Functions - \brief Functions that configure the SAU. - @{ - */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - -/** - \brief Enable SAU - \details Enables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Enable(void) -{ - SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); -} - - - -/** - \brief Disable SAU - \details Disables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Disable(void) -{ - SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); -} - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_SAUFunctions */ - - - - -/* ################################## Debug Control function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DCBFunctions Debug Control Functions - \brief Functions that access the Debug Control Block. - @{ - */ - - -/** - \brief Set Debug Authentication Control Register - \details writes to Debug Authentication Control register. - \param [in] value value to be writen. - */ -__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value) -{ - __DSB(); - __ISB(); - DCB->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register - \details Reads Debug Authentication Control register. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void) -{ - return (DCB->DAUTHCTRL); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Debug Authentication Control Register (non-secure) - \details writes to non-secure Debug Authentication Control register when in secure state. - \param [in] value value to be writen - */ -__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value) -{ - __DSB(); - __ISB(); - DCB_NS->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register (non-secure) - \details Reads non-secure Debug Authentication Control register when in secure state. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) -{ - return (DCB_NS->DAUTHCTRL); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## Debug Identification function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions - \brief Functions that access the Debug Identification Block. - @{ - */ - - -/** - \brief Get Debug Authentication Status Register - \details Reads Debug Authentication Status register. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t DIB_GetAuthStatus(void) -{ - return (DIB->DAUTHSTATUS); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Debug Authentication Status Register (non-secure) - \details Reads non-secure Debug Authentication Status register when in secure state. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void) -{ - return (DIB_NS->DAUTHSTATUS); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief System Tick Configuration (non-secure) - \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function TZ_SysTick_Config_NS is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - - */ -__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_ARMV81MML_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_armv8mbl.h b/Drivers/CMSIS/Core/Include/core_armv8mbl.h deleted file mode 100644 index 33970bc..0000000 --- a/Drivers/CMSIS/Core/Include/core_armv8mbl.h +++ /dev/null @@ -1,2222 +0,0 @@ -/**************************************************************************//** - * @file core_armv8mbl.h - * @brief CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File - * @version V5.1.0 - * @date 27. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#elif defined ( __GNUC__ ) - #pragma GCC diagnostic ignored "-Wpedantic" /* disable pedantic warning due to unnamed structs/unions */ -#endif - -#ifndef __CORE_ARMV8MBL_H_GENERIC -#define __CORE_ARMV8MBL_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_ARMv8MBL - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS definitions */ -#define __ARMv8MBL_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __ARMv8MBL_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __ARMv8MBL_CMSIS_VERSION ((__ARMv8MBL_CMSIS_VERSION_MAIN << 16U) | \ - __ARMv8MBL_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (2U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_ARMV8MBL_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_ARMV8MBL_H_DEPENDANT -#define __CORE_ARMV8MBL_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __ARMv8MBL_REV - #define __ARMv8MBL_REV 0x0000U - #warning "__ARMv8MBL_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __SAUREGION_PRESENT - #define __SAUREGION_PRESENT 0U - #warning "__SAUREGION_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 0U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif - - #ifndef __ETM_PRESENT - #define __ETM_PRESENT 0U - #warning "__ETM_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MTB_PRESENT - #define __MTB_PRESENT 0U - #warning "__MTB_PRESENT not defined in device header file; using default!" - #endif - -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group ARMv8MBL */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core SAU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[16U]; - __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[16U]; - __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[16U]; - __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[16U]; - __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[16U]; - __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ - uint32_t RESERVED5[16U]; - __IOM uint32_t IPR[124U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ -#else - uint32_t RESERVED0; -#endif - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED1; - __IOM uint32_t SHPR[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ -#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ - -#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ -#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ - -#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ -#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ -#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#endif - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ -#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ - -#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ -#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ - -#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ -#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ -#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ - -#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ -#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ -#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ -#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ - -#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ -#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - uint32_t RESERVED0[6U]; - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - uint32_t RESERVED3[1U]; - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED4[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - uint32_t RESERVED5[1U]; - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED6[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - uint32_t RESERVED7[1U]; - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED8[1U]; - __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ - uint32_t RESERVED9[1U]; - __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ - uint32_t RESERVED10[1U]; - __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ - uint32_t RESERVED11[1U]; - __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ - uint32_t RESERVED12[1U]; - __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ - uint32_t RESERVED13[1U]; - __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ - uint32_t RESERVED14[1U]; - __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ - uint32_t RESERVED15[1U]; - __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ - uint32_t RESERVED16[1U]; - __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ - uint32_t RESERVED17[1U]; - __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ - uint32_t RESERVED18[1U]; - __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ - uint32_t RESERVED19[1U]; - __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ - uint32_t RESERVED20[1U]; - __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ - uint32_t RESERVED21[1U]; - __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ - uint32_t RESERVED22[1U]; - __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ - uint32_t RESERVED23[1U]; - __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ - uint32_t RESERVED24[1U]; - __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ - uint32_t RESERVED25[1U]; - __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ - uint32_t RESERVED26[1U]; - __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ - uint32_t RESERVED27[1U]; - __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ - uint32_t RESERVED28[1U]; - __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ - uint32_t RESERVED29[1U]; - __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ - uint32_t RESERVED30[1U]; - __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ - uint32_t RESERVED31[1U]; - __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ -#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ - -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ -#define DWT_FUNCTION_ACTION_Msk (0x3UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ - -#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ -#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ - uint32_t RESERVED3[809U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */ - uint32_t RESERVED4[4U]; - __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */ -#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ -#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI Periodic Synchronization Control Register Definitions */ -#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */ -#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */ - -/* TPI Software Lock Status Register Definitions */ -#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */ -#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */ - -#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */ -#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */ - -#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */ -#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */ -#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ - uint32_t RESERVED0[7U]; - union { - __IOM uint32_t MAIR[2]; - struct { - __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ - __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ - }; - }; -} MPU_Type; - -#define MPU_TYPE_RALIASES 1U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ -#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ - -#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ -#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ - -#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ -#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ - -#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ -#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ - -/* MPU Region Limit Address Register Definitions */ -#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ -#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ - -#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ -#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ - -#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: EN Position */ -#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: EN Mask */ - -/* MPU Memory Attribute Indirection Register 0 Definitions */ -#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ -#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ - -#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ -#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ - -#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ -#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ - -#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ -#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ - -/* MPU Memory Attribute Indirection Register 1 Definitions */ -#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ -#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ - -#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ -#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ - -#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ -#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ - -#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ -#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SAU Security Attribution Unit (SAU) - \brief Type definitions for the Security Attribution Unit (SAU) - @{ - */ - -/** - \brief Structure type to access the Security Attribution Unit (SAU). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ - __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ -#endif -} SAU_Type; - -/* SAU Control Register Definitions */ -#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ -#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ - -#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ -#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ - -/* SAU Type Register Definitions */ -#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ -#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ - -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) -/* SAU Region Number Register Definitions */ -#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ -#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ - -/* SAU Region Base Address Register Definitions */ -#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ -#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ - -/* SAU Region Limit Address Register Definitions */ -#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ -#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ - -#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ -#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ - -#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ -#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ - -#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ - -/*@} end of group CMSIS_SAU */ -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */ -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief \deprecated Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */ -#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< \deprecated CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< \deprecated CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< \deprecated CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< \deprecated CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< \deprecated CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_DWTENA_Pos 24U /*!< \deprecated CoreDebug DEMCR: DWTENA Position */ -#define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos) /*!< \deprecated CoreDebug DEMCR: DWTENA Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */ - -/* Debug Authentication Control Register Definitions */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */ -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */ - -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */ - -/* Debug Security Control and Status Register Definitions */ -#define CoreDebug_DSCSR_CDS_Pos 16U /*!< \deprecated CoreDebug DSCSR: CDS Position */ -#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< \deprecated CoreDebug DSCSR: CDS Mask */ - -#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */ -#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */ - -#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */ -#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DCB Debug Control Block - \brief Type definitions for the Debug Control Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Control Block Registers (DCB). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} DCB_Type; - -/* DHCSR, Debug Halting Control and Status Register Definitions */ -#define DCB_DHCSR_DBGKEY_Pos 16U /*!< DCB DHCSR: Debug key Position */ -#define DCB_DHCSR_DBGKEY_Msk (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos) /*!< DCB DHCSR: Debug key Mask */ - -#define DCB_DHCSR_S_RESTART_ST_Pos 26U /*!< DCB DHCSR: Restart sticky status Position */ -#define DCB_DHCSR_S_RESTART_ST_Msk (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos) /*!< DCB DHCSR: Restart sticky status Mask */ - -#define DCB_DHCSR_S_RESET_ST_Pos 25U /*!< DCB DHCSR: Reset sticky status Position */ -#define DCB_DHCSR_S_RESET_ST_Msk (0x1UL << DCB_DHCSR_S_RESET_ST_Pos) /*!< DCB DHCSR: Reset sticky status Mask */ - -#define DCB_DHCSR_S_RETIRE_ST_Pos 24U /*!< DCB DHCSR: Retire sticky status Position */ -#define DCB_DHCSR_S_RETIRE_ST_Msk (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos) /*!< DCB DHCSR: Retire sticky status Mask */ - -#define DCB_DHCSR_S_SDE_Pos 20U /*!< DCB DHCSR: Secure debug enabled Position */ -#define DCB_DHCSR_S_SDE_Msk (0x1UL << DCB_DHCSR_S_SDE_Pos) /*!< DCB DHCSR: Secure debug enabled Mask */ - -#define DCB_DHCSR_S_LOCKUP_Pos 19U /*!< DCB DHCSR: Lockup status Position */ -#define DCB_DHCSR_S_LOCKUP_Msk (0x1UL << DCB_DHCSR_S_LOCKUP_Pos) /*!< DCB DHCSR: Lockup status Mask */ - -#define DCB_DHCSR_S_SLEEP_Pos 18U /*!< DCB DHCSR: Sleeping status Position */ -#define DCB_DHCSR_S_SLEEP_Msk (0x1UL << DCB_DHCSR_S_SLEEP_Pos) /*!< DCB DHCSR: Sleeping status Mask */ - -#define DCB_DHCSR_S_HALT_Pos 17U /*!< DCB DHCSR: Halted status Position */ -#define DCB_DHCSR_S_HALT_Msk (0x1UL << DCB_DHCSR_S_HALT_Pos) /*!< DCB DHCSR: Halted status Mask */ - -#define DCB_DHCSR_S_REGRDY_Pos 16U /*!< DCB DHCSR: Register ready status Position */ -#define DCB_DHCSR_S_REGRDY_Msk (0x1UL << DCB_DHCSR_S_REGRDY_Pos) /*!< DCB DHCSR: Register ready status Mask */ - -#define DCB_DHCSR_C_MASKINTS_Pos 3U /*!< DCB DHCSR: Mask interrupts control Position */ -#define DCB_DHCSR_C_MASKINTS_Msk (0x1UL << DCB_DHCSR_C_MASKINTS_Pos) /*!< DCB DHCSR: Mask interrupts control Mask */ - -#define DCB_DHCSR_C_STEP_Pos 2U /*!< DCB DHCSR: Step control Position */ -#define DCB_DHCSR_C_STEP_Msk (0x1UL << DCB_DHCSR_C_STEP_Pos) /*!< DCB DHCSR: Step control Mask */ - -#define DCB_DHCSR_C_HALT_Pos 1U /*!< DCB DHCSR: Halt control Position */ -#define DCB_DHCSR_C_HALT_Msk (0x1UL << DCB_DHCSR_C_HALT_Pos) /*!< DCB DHCSR: Halt control Mask */ - -#define DCB_DHCSR_C_DEBUGEN_Pos 0U /*!< DCB DHCSR: Debug enable control Position */ -#define DCB_DHCSR_C_DEBUGEN_Msk (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/) /*!< DCB DHCSR: Debug enable control Mask */ - -/* DCRSR, Debug Core Register Select Register Definitions */ -#define DCB_DCRSR_REGWnR_Pos 16U /*!< DCB DCRSR: Register write/not-read Position */ -#define DCB_DCRSR_REGWnR_Msk (0x1UL << DCB_DCRSR_REGWnR_Pos) /*!< DCB DCRSR: Register write/not-read Mask */ - -#define DCB_DCRSR_REGSEL_Pos 0U /*!< DCB DCRSR: Register selector Position */ -#define DCB_DCRSR_REGSEL_Msk (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/) /*!< DCB DCRSR: Register selector Mask */ - -/* DCRDR, Debug Core Register Data Register Definitions */ -#define DCB_DCRDR_DBGTMP_Pos 0U /*!< DCB DCRDR: Data temporary buffer Position */ -#define DCB_DCRDR_DBGTMP_Msk (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/) /*!< DCB DCRDR: Data temporary buffer Mask */ - -/* DEMCR, Debug Exception and Monitor Control Register Definitions */ -#define DCB_DEMCR_TRCENA_Pos 24U /*!< DCB DEMCR: Trace enable Position */ -#define DCB_DEMCR_TRCENA_Msk (0x1UL << DCB_DEMCR_TRCENA_Pos) /*!< DCB DEMCR: Trace enable Mask */ - -#define DCB_DEMCR_VC_HARDERR_Pos 10U /*!< DCB DEMCR: Vector Catch HardFault errors Position */ -#define DCB_DEMCR_VC_HARDERR_Msk (0x1UL << DCB_DEMCR_VC_HARDERR_Pos) /*!< DCB DEMCR: Vector Catch HardFault errors Mask */ - -#define DCB_DEMCR_VC_CORERESET_Pos 0U /*!< DCB DEMCR: Vector Catch Core reset Position */ -#define DCB_DEMCR_VC_CORERESET_Msk (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/) /*!< DCB DEMCR: Vector Catch Core reset Mask */ - -/* DAUTHCTRL, Debug Authentication Control Register Definitions */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPNIDENSEL_Msk (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos) /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */ - -#define DCB_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPIDENSEL_Msk (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */ - -/* DSCSR, Debug Security Control and Status Register Definitions */ -#define DCB_DSCSR_CDSKEY_Pos 17U /*!< DCB DSCSR: CDS write-enable key Position */ -#define DCB_DSCSR_CDSKEY_Msk (0x1UL << DCB_DSCSR_CDSKEY_Pos) /*!< DCB DSCSR: CDS write-enable key Mask */ - -#define DCB_DSCSR_CDS_Pos 16U /*!< DCB DSCSR: Current domain Secure Position */ -#define DCB_DSCSR_CDS_Msk (0x1UL << DCB_DSCSR_CDS_Pos) /*!< DCB DSCSR: Current domain Secure Mask */ - -#define DCB_DSCSR_SBRSEL_Pos 1U /*!< DCB DSCSR: Secure banked register select Position */ -#define DCB_DSCSR_SBRSEL_Msk (0x1UL << DCB_DSCSR_SBRSEL_Pos) /*!< DCB DSCSR: Secure banked register select Mask */ - -#define DCB_DSCSR_SBRSELEN_Pos 0U /*!< DCB DSCSR: Secure banked register select enable Position */ -#define DCB_DSCSR_SBRSELEN_Msk (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/) /*!< DCB DSCSR: Secure banked register select enable Mask */ - -/*@} end of group CMSIS_DCB */ - - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DIB Debug Identification Block - \brief Type definitions for the Debug Identification Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Identification Block Registers (DIB). - */ -typedef struct -{ - __OM uint32_t DLAR; /*!< Offset: 0x000 ( /W) SCS Software Lock Access Register */ - __IM uint32_t DLSR; /*!< Offset: 0x004 (R/ ) SCS Software Lock Status Register */ - __IM uint32_t DAUTHSTATUS; /*!< Offset: 0x008 (R/ ) Debug Authentication Status Register */ - __IM uint32_t DDEVARCH; /*!< Offset: 0x00C (R/ ) SCS Device Architecture Register */ - __IM uint32_t DDEVTYPE; /*!< Offset: 0x010 (R/ ) SCS Device Type Register */ -} DIB_Type; - -/* DLAR, SCS Software Lock Access Register Definitions */ -#define DIB_DLAR_KEY_Pos 0U /*!< DIB DLAR: KEY Position */ -#define DIB_DLAR_KEY_Msk (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */) /*!< DIB DLAR: KEY Mask */ - -/* DLSR, SCS Software Lock Status Register Definitions */ -#define DIB_DLSR_nTT_Pos 2U /*!< DIB DLSR: Not thirty-two bit Position */ -#define DIB_DLSR_nTT_Msk (0x1UL << DIB_DLSR_nTT_Pos ) /*!< DIB DLSR: Not thirty-two bit Mask */ - -#define DIB_DLSR_SLK_Pos 1U /*!< DIB DLSR: Software Lock status Position */ -#define DIB_DLSR_SLK_Msk (0x1UL << DIB_DLSR_SLK_Pos ) /*!< DIB DLSR: Software Lock status Mask */ - -#define DIB_DLSR_SLI_Pos 0U /*!< DIB DLSR: Software Lock implemented Position */ -#define DIB_DLSR_SLI_Msk (0x1UL /*<< DIB_DLSR_SLI_Pos*/) /*!< DIB DLSR: Software Lock implemented Mask */ - -/* DAUTHSTATUS, Debug Authentication Status Register Definitions */ -#define DIB_DAUTHSTATUS_SNID_Pos 6U /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_SNID_Msk (0x3UL << DIB_DAUTHSTATUS_SNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_SID_Pos 4U /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_SID_Msk (0x3UL << DIB_DAUTHSTATUS_SID_Pos ) /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSNID_Pos 2U /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSID_Pos 0U /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSID_Msk (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/) /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */ - -/* DDEVARCH, SCS Device Architecture Register Definitions */ -#define DIB_DDEVARCH_ARCHITECT_Pos 21U /*!< DIB DDEVARCH: Architect Position */ -#define DIB_DDEVARCH_ARCHITECT_Msk (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos ) /*!< DIB DDEVARCH: Architect Mask */ - -#define DIB_DDEVARCH_PRESENT_Pos 20U /*!< DIB DDEVARCH: DEVARCH Present Position */ -#define DIB_DDEVARCH_PRESENT_Msk (0x1FUL << DIB_DDEVARCH_PRESENT_Pos ) /*!< DIB DDEVARCH: DEVARCH Present Mask */ - -#define DIB_DDEVARCH_REVISION_Pos 16U /*!< DIB DDEVARCH: Revision Position */ -#define DIB_DDEVARCH_REVISION_Msk (0xFUL << DIB_DDEVARCH_REVISION_Pos ) /*!< DIB DDEVARCH: Revision Mask */ - -#define DIB_DDEVARCH_ARCHVER_Pos 12U /*!< DIB DDEVARCH: Architecture Version Position */ -#define DIB_DDEVARCH_ARCHVER_Msk (0xFUL << DIB_DDEVARCH_ARCHVER_Pos ) /*!< DIB DDEVARCH: Architecture Version Mask */ - -#define DIB_DDEVARCH_ARCHPART_Pos 0U /*!< DIB DDEVARCH: Architecture Part Position */ -#define DIB_DDEVARCH_ARCHPART_Msk (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/) /*!< DIB DDEVARCH: Architecture Part Mask */ - -/* DDEVTYPE, SCS Device Type Register Definitions */ -#define DIB_DDEVTYPE_SUB_Pos 4U /*!< DIB DDEVTYPE: Sub-type Position */ -#define DIB_DDEVTYPE_SUB_Msk (0xFUL << DIB_DDEVTYPE_SUB_Pos ) /*!< DIB DDEVTYPE: Sub-type Mask */ - -#define DIB_DDEVTYPE_MAJOR_Pos 0U /*!< DIB DDEVTYPE: Major type Position */ -#define DIB_DDEVTYPE_MAJOR_Msk (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/) /*!< DIB DDEVTYPE: Major type Mask */ - - -/*@} end of group CMSIS_DIB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ - #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ - #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ - #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ - #define CoreDebug_BASE (0xE000EDF0UL) /*!< \deprecated Core Debug Base Address */ - #define DCB_BASE (0xE000EDF0UL) /*!< DCB Base Address */ - #define DIB_BASE (0xE000EFB0UL) /*!< DIB Base Address */ - #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ - #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ - #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - - - #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ - #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ - #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ - #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ - #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< \deprecated Core Debug configuration struct */ - #define DCB ((DCB_Type *) DCB_BASE ) /*!< DCB configuration struct */ - #define DIB ((DIB_Type *) DIB_BASE ) /*!< DIB configuration struct */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ - #endif - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ - #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ - #endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ - #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< \deprecated Core Debug Base Address (non-secure address space) */ - #define DCB_BASE_NS (0xE002EDF0UL) /*!< DCB Base Address (non-secure address space) */ - #define DIB_BASE_NS (0xE002EFB0UL) /*!< DIB Base Address (non-secure address space) */ - #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ - #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ - #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ - - #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ - #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ - #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ - #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct (non-secure address space) */ - #define DCB_NS ((DCB_Type *) DCB_BASE_NS ) /*!< DCB configuration struct (non-secure address space) */ - #define DIB_NS ((DIB_Type *) DIB_BASE_NS ) /*!< DIB configuration struct (non-secure address space) */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ - #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ - #endif - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* Special LR values for Secure/Non-Secure call handling and exception handling */ - -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ -#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ - -/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ -#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ -#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ -#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ -#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ -#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ -#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ -#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ - -/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ -#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ -#else -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ -#endif - - -/* Interrupt Priorities are WORD accessible only under Armv6-M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - -#define __NVIC_SetPriorityGrouping(X) (void)(X) -#define __NVIC_GetPriorityGrouping() (0U) - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Interrupt Target State - \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - \return 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Target State - \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Clear Interrupt Target State - \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - If VTOR is not present address 0 must be mapped to SRAM. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - uint32_t *vectors = (uint32_t *)SCB->VTOR; -#else - uint32_t *vectors = (uint32_t *)0x0U; -#endif - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - __DSB(); -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - uint32_t *vectors = (uint32_t *)SCB->VTOR; -#else - uint32_t *vectors = (uint32_t *)0x0U; -#endif - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Enable Interrupt (non-secure) - \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Interrupt Enable status (non-secure) - \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt (non-secure) - \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Pending Interrupt (non-secure) - \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt (non-secure) - \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt (non-secure) - \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt (non-secure) - \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority (non-secure) - \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every non-secure processor exception. - */ -__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority (non-secure) - \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_NVICFunctions */ - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv8.h" - -#endif - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - return 0U; /* No FPU */ -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ########################## SAU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SAUFunctions SAU Functions - \brief Functions that configure the SAU. - @{ - */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - -/** - \brief Enable SAU - \details Enables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Enable(void) -{ - SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); -} - - - -/** - \brief Disable SAU - \details Disables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Disable(void) -{ - SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); -} - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_SAUFunctions */ - - - - -/* ################################## Debug Control function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DCBFunctions Debug Control Functions - \brief Functions that access the Debug Control Block. - @{ - */ - - -/** - \brief Set Debug Authentication Control Register - \details writes to Debug Authentication Control register. - \param [in] value value to be writen. - */ -__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value) -{ - __DSB(); - __ISB(); - DCB->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register - \details Reads Debug Authentication Control register. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void) -{ - return (DCB->DAUTHCTRL); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Debug Authentication Control Register (non-secure) - \details writes to non-secure Debug Authentication Control register when in secure state. - \param [in] value value to be writen - */ -__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value) -{ - __DSB(); - __ISB(); - DCB_NS->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register (non-secure) - \details Reads non-secure Debug Authentication Control register when in secure state. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) -{ - return (DCB_NS->DAUTHCTRL); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## Debug Identification function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions - \brief Functions that access the Debug Identification Block. - @{ - */ - - -/** - \brief Get Debug Authentication Status Register - \details Reads Debug Authentication Status register. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t DIB_GetAuthStatus(void) -{ - return (DIB->DAUTHSTATUS); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Debug Authentication Status Register (non-secure) - \details Reads non-secure Debug Authentication Status register when in secure state. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void) -{ - return (DIB_NS->DAUTHSTATUS); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief System Tick Configuration (non-secure) - \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function TZ_SysTick_Config_NS is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - - */ -__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_ARMV8MBL_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_armv8mml.h b/Drivers/CMSIS/Core/Include/core_armv8mml.h deleted file mode 100644 index 6e6bbb5..0000000 --- a/Drivers/CMSIS/Core/Include/core_armv8mml.h +++ /dev/null @@ -1,3209 +0,0 @@ -/**************************************************************************//** - * @file core_armv8mml.h - * @brief CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File - * @version V5.2.3 - * @date 13. October 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#elif defined ( __GNUC__ ) - #pragma GCC diagnostic ignored "-Wpedantic" /* disable pedantic warning due to unnamed structs/unions */ -#endif - -#ifndef __CORE_ARMV8MML_H_GENERIC -#define __CORE_ARMV8MML_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_ARMv8MML - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS Armv8MML definitions */ -#define __ARMv8MML_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __ARMv8MML_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __ARMv8MML_CMSIS_VERSION ((__ARMv8MML_CMSIS_VERSION_MAIN << 16U) | \ - __ARMv8MML_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (80U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. -*/ -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_ARMV8MML_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_ARMV8MML_H_DEPENDANT -#define __CORE_ARMV8MML_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __ARMv8MML_REV - #define __ARMv8MML_REV 0x0000U - #warning "__ARMv8MML_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __SAUREGION_PRESENT - #define __SAUREGION_PRESENT 0U - #warning "__SAUREGION_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DSP_PRESENT - #define __DSP_PRESENT 0U - #warning "__DSP_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 1U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group ARMv8MML */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core SAU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ - uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ - uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ - uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ -#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ - -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[16U]; - __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[16U]; - __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[16U]; - __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[16U]; - __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[16U]; - __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ - uint32_t RESERVED5[16U]; - __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED6[580U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ - __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ - __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ - __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ - uint32_t RESERVED7[21U]; - __IOM uint32_t SFSR; /*!< Offset: 0x0E4 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x0E8 (R/W) Secure Fault Address Register */ - uint32_t RESERVED3[69U]; - __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ - uint32_t RESERVED4[15U]; - __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ - uint32_t RESERVED5[1U]; - __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ - uint32_t RESERVED6[1U]; - __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ - __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ - __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ - __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ - __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ - __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ - __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ - __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ - __OM uint32_t BPIALL; /*!< Offset: 0x278 ( /W) Branch Predictor Invalidate All */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ -#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ - -#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ -#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ - -#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ -#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ -#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ -#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ - -#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ -#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ -#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ -#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ - -#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ -#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ -#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ -#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ -#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ - -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ -#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ - -#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ -#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ -#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ -#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ -#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ -#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/* SCB Non-Secure Access Control Register Definitions */ -#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ -#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ - -#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ -#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ - -#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */ -#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */ - -/* SCB Cache Level ID Register Definitions */ -#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ -#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ - -#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ -#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ - -/* SCB Cache Type Register Definitions */ -#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ -#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ - -#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ -#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ - -#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ -#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ - -#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ -#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ - -#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ -#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ - -/* SCB Cache Size ID Register Definitions */ -#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ -#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ - -#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ -#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ - -#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ -#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ - -#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ -#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ - -#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ -#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ - -#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ -#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ - -#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ -#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ - -/* SCB Cache Size Selection Register Definitions */ -#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ -#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ - -#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ -#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ - -/* SCB Software Triggered Interrupt Register Definitions */ -#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ -#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ - -/* SCB D-Cache Invalidate by Set-way Register Definitions */ -#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ -#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ - -#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ -#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ - -/* SCB D-Cache Clean by Set-way Register Definitions */ -#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ -#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ - -#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ -#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ - -/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ -#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ -#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ - -#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ -#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ - __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ - uint32_t RESERVED6[4U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Stimulus Port Register Definitions */ -#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ -#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ - -#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ -#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ -#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ - -#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ -#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - uint32_t RESERVED3[1U]; - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED4[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - uint32_t RESERVED5[1U]; - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED6[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - uint32_t RESERVED7[1U]; - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED8[1U]; - __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ - uint32_t RESERVED9[1U]; - __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ - uint32_t RESERVED10[1U]; - __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ - uint32_t RESERVED11[1U]; - __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ - uint32_t RESERVED12[1U]; - __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ - uint32_t RESERVED13[1U]; - __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ - uint32_t RESERVED14[1U]; - __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ - uint32_t RESERVED15[1U]; - __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ - uint32_t RESERVED16[1U]; - __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ - uint32_t RESERVED17[1U]; - __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ - uint32_t RESERVED18[1U]; - __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ - uint32_t RESERVED19[1U]; - __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ - uint32_t RESERVED20[1U]; - __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ - uint32_t RESERVED21[1U]; - __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ - uint32_t RESERVED22[1U]; - __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ - uint32_t RESERVED23[1U]; - __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ - uint32_t RESERVED24[1U]; - __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ - uint32_t RESERVED25[1U]; - __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ - uint32_t RESERVED26[1U]; - __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ - uint32_t RESERVED27[1U]; - __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ - uint32_t RESERVED28[1U]; - __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ - uint32_t RESERVED29[1U]; - __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ - uint32_t RESERVED30[1U]; - __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ - uint32_t RESERVED31[1U]; - __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ - uint32_t RESERVED32[934U]; - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ - uint32_t RESERVED33[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ -#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ -#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ - -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ -#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ - -#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ -#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ - uint32_t RESERVED3[809U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */ - uint32_t RESERVED4[4U]; - __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */ -#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ -#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI Periodic Synchronization Control Register Definitions */ -#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */ -#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */ - -/* TPI Software Lock Status Register Definitions */ -#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */ -#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */ - -#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */ -#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */ - -#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */ -#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */ -#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ - __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ - __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ - __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ - uint32_t RESERVED0[1]; - union { - __IOM uint32_t MAIR[2]; - struct { - __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ - __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ - }; - }; -} MPU_Type; - -#define MPU_TYPE_RALIASES 4U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ -#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ - -#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ -#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ - -#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ -#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ - -#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ -#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ - -/* MPU Region Limit Address Register Definitions */ -#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ -#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ - -#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ -#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ - -#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ -#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ - -/* MPU Memory Attribute Indirection Register 0 Definitions */ -#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ -#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ - -#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ -#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ - -#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ -#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ - -#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ -#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ - -/* MPU Memory Attribute Indirection Register 1 Definitions */ -#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ -#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ - -#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ -#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ - -#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ -#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ - -#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ -#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SAU Security Attribution Unit (SAU) - \brief Type definitions for the Security Attribution Unit (SAU) - @{ - */ - -/** - \brief Structure type to access the Security Attribution Unit (SAU). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ - __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ -#else - uint32_t RESERVED0[3]; -#endif - __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ -} SAU_Type; - -/* SAU Control Register Definitions */ -#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ -#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ - -#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ -#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ - -/* SAU Type Register Definitions */ -#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ -#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ - -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) -/* SAU Region Number Register Definitions */ -#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ -#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ - -/* SAU Region Base Address Register Definitions */ -#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ -#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ - -/* SAU Region Limit Address Register Definitions */ -#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ -#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ - -#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ -#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ - -#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ -#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ - -#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ - -/* Secure Fault Status Register Definitions */ -#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ -#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ - -#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ -#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ - -#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ -#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ - -#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ -#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ - -#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ -#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ - -#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ -#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ - -#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ -#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ - -#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ -#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ - -/*@} end of group CMSIS_SAU */ -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and VFP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ -#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ - -#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ -#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ - -#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ -#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ - -#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ -#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ - -#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ -#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ - -#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ -#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ -#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ -#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -/* Media and VFP Feature Register 0 Definitions */ -#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ -#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ - -#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ -#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ - -#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ -#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ - -#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ -#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ -#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ - -#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ -#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ - -#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ -#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ - -#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ -#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ - -/* Media and VFP Feature Register 1 Definitions */ -#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ -#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ - -#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ -#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ - -#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ -#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ - -#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ -#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ - -/* Media and VFP Feature Register 2 Definitions */ -#define FPU_MVFR2_FPMisc_Pos 4U /*!< MVFR2: FPMisc bits Position */ -#define FPU_MVFR2_FPMisc_Msk (0xFUL << FPU_MVFR2_FPMisc_Pos) /*!< MVFR2: FPMisc bits Mask */ - -/*@} end of group CMSIS_FPU */ - -/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */ -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief \deprecated Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */ -#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< \deprecated CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< \deprecated CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< \deprecated CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< \deprecated CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< \deprecated CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< \deprecated CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< \deprecated CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */ - -/* Debug Authentication Control Register Definitions */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */ -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */ - -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */ - -/* Debug Security Control and Status Register Definitions */ -#define CoreDebug_DSCSR_CDS_Pos 16U /*!< \deprecated CoreDebug DSCSR: CDS Position */ -#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< \deprecated CoreDebug DSCSR: CDS Mask */ - -#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */ -#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */ - -#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */ -#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DCB Debug Control Block - \brief Type definitions for the Debug Control Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Control Block Registers (DCB). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} DCB_Type; - -/* DHCSR, Debug Halting Control and Status Register Definitions */ -#define DCB_DHCSR_DBGKEY_Pos 16U /*!< DCB DHCSR: Debug key Position */ -#define DCB_DHCSR_DBGKEY_Msk (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos) /*!< DCB DHCSR: Debug key Mask */ - -#define DCB_DHCSR_S_RESTART_ST_Pos 26U /*!< DCB DHCSR: Restart sticky status Position */ -#define DCB_DHCSR_S_RESTART_ST_Msk (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos) /*!< DCB DHCSR: Restart sticky status Mask */ - -#define DCB_DHCSR_S_RESET_ST_Pos 25U /*!< DCB DHCSR: Reset sticky status Position */ -#define DCB_DHCSR_S_RESET_ST_Msk (0x1UL << DCB_DHCSR_S_RESET_ST_Pos) /*!< DCB DHCSR: Reset sticky status Mask */ - -#define DCB_DHCSR_S_RETIRE_ST_Pos 24U /*!< DCB DHCSR: Retire sticky status Position */ -#define DCB_DHCSR_S_RETIRE_ST_Msk (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos) /*!< DCB DHCSR: Retire sticky status Mask */ - -#define DCB_DHCSR_S_SDE_Pos 20U /*!< DCB DHCSR: Secure debug enabled Position */ -#define DCB_DHCSR_S_SDE_Msk (0x1UL << DCB_DHCSR_S_SDE_Pos) /*!< DCB DHCSR: Secure debug enabled Mask */ - -#define DCB_DHCSR_S_LOCKUP_Pos 19U /*!< DCB DHCSR: Lockup status Position */ -#define DCB_DHCSR_S_LOCKUP_Msk (0x1UL << DCB_DHCSR_S_LOCKUP_Pos) /*!< DCB DHCSR: Lockup status Mask */ - -#define DCB_DHCSR_S_SLEEP_Pos 18U /*!< DCB DHCSR: Sleeping status Position */ -#define DCB_DHCSR_S_SLEEP_Msk (0x1UL << DCB_DHCSR_S_SLEEP_Pos) /*!< DCB DHCSR: Sleeping status Mask */ - -#define DCB_DHCSR_S_HALT_Pos 17U /*!< DCB DHCSR: Halted status Position */ -#define DCB_DHCSR_S_HALT_Msk (0x1UL << DCB_DHCSR_S_HALT_Pos) /*!< DCB DHCSR: Halted status Mask */ - -#define DCB_DHCSR_S_REGRDY_Pos 16U /*!< DCB DHCSR: Register ready status Position */ -#define DCB_DHCSR_S_REGRDY_Msk (0x1UL << DCB_DHCSR_S_REGRDY_Pos) /*!< DCB DHCSR: Register ready status Mask */ - -#define DCB_DHCSR_C_SNAPSTALL_Pos 5U /*!< DCB DHCSR: Snap stall control Position */ -#define DCB_DHCSR_C_SNAPSTALL_Msk (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos) /*!< DCB DHCSR: Snap stall control Mask */ - -#define DCB_DHCSR_C_MASKINTS_Pos 3U /*!< DCB DHCSR: Mask interrupts control Position */ -#define DCB_DHCSR_C_MASKINTS_Msk (0x1UL << DCB_DHCSR_C_MASKINTS_Pos) /*!< DCB DHCSR: Mask interrupts control Mask */ - -#define DCB_DHCSR_C_STEP_Pos 2U /*!< DCB DHCSR: Step control Position */ -#define DCB_DHCSR_C_STEP_Msk (0x1UL << DCB_DHCSR_C_STEP_Pos) /*!< DCB DHCSR: Step control Mask */ - -#define DCB_DHCSR_C_HALT_Pos 1U /*!< DCB DHCSR: Halt control Position */ -#define DCB_DHCSR_C_HALT_Msk (0x1UL << DCB_DHCSR_C_HALT_Pos) /*!< DCB DHCSR: Halt control Mask */ - -#define DCB_DHCSR_C_DEBUGEN_Pos 0U /*!< DCB DHCSR: Debug enable control Position */ -#define DCB_DHCSR_C_DEBUGEN_Msk (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/) /*!< DCB DHCSR: Debug enable control Mask */ - -/* DCRSR, Debug Core Register Select Register Definitions */ -#define DCB_DCRSR_REGWnR_Pos 16U /*!< DCB DCRSR: Register write/not-read Position */ -#define DCB_DCRSR_REGWnR_Msk (0x1UL << DCB_DCRSR_REGWnR_Pos) /*!< DCB DCRSR: Register write/not-read Mask */ - -#define DCB_DCRSR_REGSEL_Pos 0U /*!< DCB DCRSR: Register selector Position */ -#define DCB_DCRSR_REGSEL_Msk (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/) /*!< DCB DCRSR: Register selector Mask */ - -/* DCRDR, Debug Core Register Data Register Definitions */ -#define DCB_DCRDR_DBGTMP_Pos 0U /*!< DCB DCRDR: Data temporary buffer Position */ -#define DCB_DCRDR_DBGTMP_Msk (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/) /*!< DCB DCRDR: Data temporary buffer Mask */ - -/* DEMCR, Debug Exception and Monitor Control Register Definitions */ -#define DCB_DEMCR_TRCENA_Pos 24U /*!< DCB DEMCR: Trace enable Position */ -#define DCB_DEMCR_TRCENA_Msk (0x1UL << DCB_DEMCR_TRCENA_Pos) /*!< DCB DEMCR: Trace enable Mask */ - -#define DCB_DEMCR_MONPRKEY_Pos 23U /*!< DCB DEMCR: Monitor pend req key Position */ -#define DCB_DEMCR_MONPRKEY_Msk (0x1UL << DCB_DEMCR_MONPRKEY_Pos) /*!< DCB DEMCR: Monitor pend req key Mask */ - -#define DCB_DEMCR_UMON_EN_Pos 21U /*!< DCB DEMCR: Unprivileged monitor enable Position */ -#define DCB_DEMCR_UMON_EN_Msk (0x1UL << DCB_DEMCR_UMON_EN_Pos) /*!< DCB DEMCR: Unprivileged monitor enable Mask */ - -#define DCB_DEMCR_SDME_Pos 20U /*!< DCB DEMCR: Secure DebugMonitor enable Position */ -#define DCB_DEMCR_SDME_Msk (0x1UL << DCB_DEMCR_SDME_Pos) /*!< DCB DEMCR: Secure DebugMonitor enable Mask */ - -#define DCB_DEMCR_MON_REQ_Pos 19U /*!< DCB DEMCR: Monitor request Position */ -#define DCB_DEMCR_MON_REQ_Msk (0x1UL << DCB_DEMCR_MON_REQ_Pos) /*!< DCB DEMCR: Monitor request Mask */ - -#define DCB_DEMCR_MON_STEP_Pos 18U /*!< DCB DEMCR: Monitor step Position */ -#define DCB_DEMCR_MON_STEP_Msk (0x1UL << DCB_DEMCR_MON_STEP_Pos) /*!< DCB DEMCR: Monitor step Mask */ - -#define DCB_DEMCR_MON_PEND_Pos 17U /*!< DCB DEMCR: Monitor pend Position */ -#define DCB_DEMCR_MON_PEND_Msk (0x1UL << DCB_DEMCR_MON_PEND_Pos) /*!< DCB DEMCR: Monitor pend Mask */ - -#define DCB_DEMCR_MON_EN_Pos 16U /*!< DCB DEMCR: Monitor enable Position */ -#define DCB_DEMCR_MON_EN_Msk (0x1UL << DCB_DEMCR_MON_EN_Pos) /*!< DCB DEMCR: Monitor enable Mask */ - -#define DCB_DEMCR_VC_SFERR_Pos 11U /*!< DCB DEMCR: Vector Catch SecureFault Position */ -#define DCB_DEMCR_VC_SFERR_Msk (0x1UL << DCB_DEMCR_VC_SFERR_Pos) /*!< DCB DEMCR: Vector Catch SecureFault Mask */ - -#define DCB_DEMCR_VC_HARDERR_Pos 10U /*!< DCB DEMCR: Vector Catch HardFault errors Position */ -#define DCB_DEMCR_VC_HARDERR_Msk (0x1UL << DCB_DEMCR_VC_HARDERR_Pos) /*!< DCB DEMCR: Vector Catch HardFault errors Mask */ - -#define DCB_DEMCR_VC_INTERR_Pos 9U /*!< DCB DEMCR: Vector Catch interrupt errors Position */ -#define DCB_DEMCR_VC_INTERR_Msk (0x1UL << DCB_DEMCR_VC_INTERR_Pos) /*!< DCB DEMCR: Vector Catch interrupt errors Mask */ - -#define DCB_DEMCR_VC_BUSERR_Pos 8U /*!< DCB DEMCR: Vector Catch BusFault errors Position */ -#define DCB_DEMCR_VC_BUSERR_Msk (0x1UL << DCB_DEMCR_VC_BUSERR_Pos) /*!< DCB DEMCR: Vector Catch BusFault errors Mask */ - -#define DCB_DEMCR_VC_STATERR_Pos 7U /*!< DCB DEMCR: Vector Catch state errors Position */ -#define DCB_DEMCR_VC_STATERR_Msk (0x1UL << DCB_DEMCR_VC_STATERR_Pos) /*!< DCB DEMCR: Vector Catch state errors Mask */ - -#define DCB_DEMCR_VC_CHKERR_Pos 6U /*!< DCB DEMCR: Vector Catch check errors Position */ -#define DCB_DEMCR_VC_CHKERR_Msk (0x1UL << DCB_DEMCR_VC_CHKERR_Pos) /*!< DCB DEMCR: Vector Catch check errors Mask */ - -#define DCB_DEMCR_VC_NOCPERR_Pos 5U /*!< DCB DEMCR: Vector Catch NOCP errors Position */ -#define DCB_DEMCR_VC_NOCPERR_Msk (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos) /*!< DCB DEMCR: Vector Catch NOCP errors Mask */ - -#define DCB_DEMCR_VC_MMERR_Pos 4U /*!< DCB DEMCR: Vector Catch MemManage errors Position */ -#define DCB_DEMCR_VC_MMERR_Msk (0x1UL << DCB_DEMCR_VC_MMERR_Pos) /*!< DCB DEMCR: Vector Catch MemManage errors Mask */ - -#define DCB_DEMCR_VC_CORERESET_Pos 0U /*!< DCB DEMCR: Vector Catch Core reset Position */ -#define DCB_DEMCR_VC_CORERESET_Msk (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/) /*!< DCB DEMCR: Vector Catch Core reset Mask */ - -/* DAUTHCTRL, Debug Authentication Control Register Definitions */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPNIDENSEL_Msk (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos) /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */ - -#define DCB_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPIDENSEL_Msk (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */ - -/* DSCSR, Debug Security Control and Status Register Definitions */ -#define DCB_DSCSR_CDSKEY_Pos 17U /*!< DCB DSCSR: CDS write-enable key Position */ -#define DCB_DSCSR_CDSKEY_Msk (0x1UL << DCB_DSCSR_CDSKEY_Pos) /*!< DCB DSCSR: CDS write-enable key Mask */ - -#define DCB_DSCSR_CDS_Pos 16U /*!< DCB DSCSR: Current domain Secure Position */ -#define DCB_DSCSR_CDS_Msk (0x1UL << DCB_DSCSR_CDS_Pos) /*!< DCB DSCSR: Current domain Secure Mask */ - -#define DCB_DSCSR_SBRSEL_Pos 1U /*!< DCB DSCSR: Secure banked register select Position */ -#define DCB_DSCSR_SBRSEL_Msk (0x1UL << DCB_DSCSR_SBRSEL_Pos) /*!< DCB DSCSR: Secure banked register select Mask */ - -#define DCB_DSCSR_SBRSELEN_Pos 0U /*!< DCB DSCSR: Secure banked register select enable Position */ -#define DCB_DSCSR_SBRSELEN_Msk (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/) /*!< DCB DSCSR: Secure banked register select enable Mask */ - -/*@} end of group CMSIS_DCB */ - - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DIB Debug Identification Block - \brief Type definitions for the Debug Identification Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Identification Block Registers (DIB). - */ -typedef struct -{ - __OM uint32_t DLAR; /*!< Offset: 0x000 ( /W) SCS Software Lock Access Register */ - __IM uint32_t DLSR; /*!< Offset: 0x004 (R/ ) SCS Software Lock Status Register */ - __IM uint32_t DAUTHSTATUS; /*!< Offset: 0x008 (R/ ) Debug Authentication Status Register */ - __IM uint32_t DDEVARCH; /*!< Offset: 0x00C (R/ ) SCS Device Architecture Register */ - __IM uint32_t DDEVTYPE; /*!< Offset: 0x010 (R/ ) SCS Device Type Register */ -} DIB_Type; - -/* DLAR, SCS Software Lock Access Register Definitions */ -#define DIB_DLAR_KEY_Pos 0U /*!< DIB DLAR: KEY Position */ -#define DIB_DLAR_KEY_Msk (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */) /*!< DIB DLAR: KEY Mask */ - -/* DLSR, SCS Software Lock Status Register Definitions */ -#define DIB_DLSR_nTT_Pos 2U /*!< DIB DLSR: Not thirty-two bit Position */ -#define DIB_DLSR_nTT_Msk (0x1UL << DIB_DLSR_nTT_Pos ) /*!< DIB DLSR: Not thirty-two bit Mask */ - -#define DIB_DLSR_SLK_Pos 1U /*!< DIB DLSR: Software Lock status Position */ -#define DIB_DLSR_SLK_Msk (0x1UL << DIB_DLSR_SLK_Pos ) /*!< DIB DLSR: Software Lock status Mask */ - -#define DIB_DLSR_SLI_Pos 0U /*!< DIB DLSR: Software Lock implemented Position */ -#define DIB_DLSR_SLI_Msk (0x1UL /*<< DIB_DLSR_SLI_Pos*/) /*!< DIB DLSR: Software Lock implemented Mask */ - -/* DAUTHSTATUS, Debug Authentication Status Register Definitions */ -#define DIB_DAUTHSTATUS_SNID_Pos 6U /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_SNID_Msk (0x3UL << DIB_DAUTHSTATUS_SNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_SID_Pos 4U /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_SID_Msk (0x3UL << DIB_DAUTHSTATUS_SID_Pos ) /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSNID_Pos 2U /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSID_Pos 0U /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSID_Msk (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/) /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */ - -/* DDEVARCH, SCS Device Architecture Register Definitions */ -#define DIB_DDEVARCH_ARCHITECT_Pos 21U /*!< DIB DDEVARCH: Architect Position */ -#define DIB_DDEVARCH_ARCHITECT_Msk (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos ) /*!< DIB DDEVARCH: Architect Mask */ - -#define DIB_DDEVARCH_PRESENT_Pos 20U /*!< DIB DDEVARCH: DEVARCH Present Position */ -#define DIB_DDEVARCH_PRESENT_Msk (0x1FUL << DIB_DDEVARCH_PRESENT_Pos ) /*!< DIB DDEVARCH: DEVARCH Present Mask */ - -#define DIB_DDEVARCH_REVISION_Pos 16U /*!< DIB DDEVARCH: Revision Position */ -#define DIB_DDEVARCH_REVISION_Msk (0xFUL << DIB_DDEVARCH_REVISION_Pos ) /*!< DIB DDEVARCH: Revision Mask */ - -#define DIB_DDEVARCH_ARCHVER_Pos 12U /*!< DIB DDEVARCH: Architecture Version Position */ -#define DIB_DDEVARCH_ARCHVER_Msk (0xFUL << DIB_DDEVARCH_ARCHVER_Pos ) /*!< DIB DDEVARCH: Architecture Version Mask */ - -#define DIB_DDEVARCH_ARCHPART_Pos 0U /*!< DIB DDEVARCH: Architecture Part Position */ -#define DIB_DDEVARCH_ARCHPART_Msk (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/) /*!< DIB DDEVARCH: Architecture Part Mask */ - -/* DDEVTYPE, SCS Device Type Register Definitions */ -#define DIB_DDEVTYPE_SUB_Pos 4U /*!< DIB DDEVTYPE: Sub-type Position */ -#define DIB_DDEVTYPE_SUB_Msk (0xFUL << DIB_DDEVTYPE_SUB_Pos ) /*!< DIB DDEVTYPE: Sub-type Mask */ - -#define DIB_DDEVTYPE_MAJOR_Pos 0U /*!< DIB DDEVTYPE: Major type Position */ -#define DIB_DDEVTYPE_MAJOR_Msk (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/) /*!< DIB DDEVTYPE: Major type Mask */ - - -/*@} end of group CMSIS_DIB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ - #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ - #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ - #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ - #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ - #define CoreDebug_BASE (0xE000EDF0UL) /*!< \deprecated Core Debug Base Address */ - #define DCB_BASE (0xE000EDF0UL) /*!< DCB Base Address */ - #define DIB_BASE (0xE000EFB0UL) /*!< DIB Base Address */ - #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ - #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ - #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - - #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ - #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ - #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ - #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ - #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ - #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ - #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< \deprecated Core Debug configuration struct */ - #define DCB ((DCB_Type *) DCB_BASE ) /*!< DCB configuration struct */ - #define DIB ((DIB_Type *) DIB_BASE ) /*!< DIB configuration struct */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ - #endif - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ - #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ - #endif - - #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ - #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ - #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< \deprecated Core Debug Base Address (non-secure address space) */ - #define DCB_BASE_NS (0xE002EDF0UL) /*!< DCB Base Address (non-secure address space) */ - #define DIB_BASE_NS (0xE002EFB0UL) /*!< DIB Base Address (non-secure address space) */ - #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ - #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ - #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ - - #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ - #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ - #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ - #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ - #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct (non-secure address space) */ - #define DCB_NS ((DCB_Type *) DCB_BASE_NS ) /*!< DCB configuration struct (non-secure address space) */ - #define DIB_NS ((DIB_Type *) DIB_BASE_NS ) /*!< DIB configuration struct (non-secure address space) */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ - #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ - #endif - - #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ - #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ -/*@} */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_register_aliases Backwards Compatibility Aliases - \brief Register alias definitions for backwards compatibility. - @{ - */ -#define ID_ADR (ID_AFR) /*!< SCB Auxiliary Feature Register */ -/*@} */ - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* Special LR values for Secure/Non-Secure call handling and exception handling */ - -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ -#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ - -/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ -#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ -#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ -#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ -#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ -#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ -#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ -#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ - -/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ -#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ -#else -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ -#endif - - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Interrupt Target State - \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - \return 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Target State - \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Clear Interrupt Target State - \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - __DSB(); -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Priority Grouping (non-secure) - \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB_NS->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB_NS->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping (non-secure) - \details Reads the priority grouping field from the non-secure NVIC when in secure state. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) -{ - return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt (non-secure) - \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Interrupt Enable status (non-secure) - \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt (non-secure) - \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Pending Interrupt (non-secure) - \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt (non-secure) - \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt (non-secure) - \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt (non-secure) - \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority (non-secure) - \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every non-secure processor exception. - */ -__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority (non-secure) - \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_NVICFunctions */ - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv8.h" - -#endif - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = FPU->MVFR0; - if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) - { - return 2U; /* Double + Single precision FPU */ - } - else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) - { - return 1U; /* Single precision FPU */ - } - else - { - return 0U; /* No FPU */ - } -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - -/* ########################## Cache functions #################################### */ - -#if ((defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)) || \ - (defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U))) -#include "cachel1_armv7.h" -#endif - - -/* ########################## SAU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SAUFunctions SAU Functions - \brief Functions that configure the SAU. - @{ - */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - -/** - \brief Enable SAU - \details Enables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Enable(void) -{ - SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); -} - - - -/** - \brief Disable SAU - \details Disables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Disable(void) -{ - SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); -} - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_SAUFunctions */ - - - - -/* ################################## Debug Control function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DCBFunctions Debug Control Functions - \brief Functions that access the Debug Control Block. - @{ - */ - - -/** - \brief Set Debug Authentication Control Register - \details writes to Debug Authentication Control register. - \param [in] value value to be writen. - */ -__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value) -{ - __DSB(); - __ISB(); - DCB->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register - \details Reads Debug Authentication Control register. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void) -{ - return (DCB->DAUTHCTRL); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Debug Authentication Control Register (non-secure) - \details writes to non-secure Debug Authentication Control register when in secure state. - \param [in] value value to be writen - */ -__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value) -{ - __DSB(); - __ISB(); - DCB_NS->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register (non-secure) - \details Reads non-secure Debug Authentication Control register when in secure state. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) -{ - return (DCB_NS->DAUTHCTRL); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## Debug Identification function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions - \brief Functions that access the Debug Identification Block. - @{ - */ - - -/** - \brief Get Debug Authentication Status Register - \details Reads Debug Authentication Status register. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t DIB_GetAuthStatus(void) -{ - return (DIB->DAUTHSTATUS); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Debug Authentication Status Register (non-secure) - \details Reads non-secure Debug Authentication Status register when in secure state. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void) -{ - return (DIB_NS->DAUTHSTATUS); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief System Tick Configuration (non-secure) - \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function TZ_SysTick_Config_NS is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - - */ -__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_ARMV8MML_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm0.h b/Drivers/CMSIS/Core/Include/core_cm0.h deleted file mode 100644 index 50d34a3..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm0.h +++ /dev/null @@ -1,952 +0,0 @@ -/**************************************************************************//** - * @file core_cm0.h - * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File - * @version V5.0.8 - * @date 21. August 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM0_H_GENERIC -#define __CORE_CM0_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M0 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS CM0 definitions */ -#define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \ - __CM0_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (0U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM0_H_DEPENDANT -#define __CORE_CM0_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM0_REV - #define __CM0_REV 0x0000U - #warning "__CM0_REV not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M0 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t _reserved0:1; /*!< bit: 0 Reserved */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RESERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - uint32_t RESERVED0; - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED1; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the Cortex-M0 header file. - @{ - */ -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ -/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0 */ - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* The following EXC_RETURN values are saved the LR on exception entry */ -#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ -#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ -#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ - - -/* Interrupt Priorities are WORD accessible only under Armv6-M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - -#define __NVIC_SetPriorityGrouping(X) (void)(X) -#define __NVIC_GetPriorityGrouping() (0U) - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - Address 0 must be mapped to SRAM. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)(NVIC_USER_IRQ_OFFSET << 2); /* point to 1st user interrupt */ - *(vectors + (int32_t)IRQn) = vector; /* use pointer arithmetic to access vector */ - /* ARM Application Note 321 states that the M0 does not require the architectural barrier */ -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)(NVIC_USER_IRQ_OFFSET << 2); /* point to 1st user interrupt */ - return *(vectors + (int32_t)IRQn); /* use pointer arithmetic to access vector */ -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - return 0U; /* No FPU */ -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm0plus.h b/Drivers/CMSIS/Core/Include/core_cm0plus.h deleted file mode 100644 index ed961aa..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm0plus.h +++ /dev/null @@ -1,1087 +0,0 @@ -/**************************************************************************//** - * @file core_cm0plus.h - * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File - * @version V5.0.9 - * @date 21. August 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM0PLUS_H_GENERIC -#define __CORE_CM0PLUS_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex-M0+ - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS CM0+ definitions */ -#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ - __CM0PLUS_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (0U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0PLUS_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM0PLUS_H_DEPENDANT -#define __CORE_CM0PLUS_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM0PLUS_REV - #define __CM0PLUS_REV 0x0000U - #warning "__CM0PLUS_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 0U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex-M0+ */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RESERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ -#else - uint32_t RESERVED0; -#endif - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED1; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) -/* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#endif - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ -} MPU_Type; - -#define MPU_TYPE_RALIASES 1U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the Cortex-M0+ header file. - @{ - */ -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ -/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0+ */ - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* The following EXC_RETURN values are saved the LR on exception entry */ -#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ -#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ -#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ - - -/* Interrupt Priorities are WORD accessible only under Armv6-M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - -#define __NVIC_SetPriorityGrouping(X) (void)(X) -#define __NVIC_GetPriorityGrouping() (0U) - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - If VTOR is not present address 0 must be mapped to SRAM. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; -#else - uint32_t *vectors = (uint32_t *)(NVIC_USER_IRQ_OFFSET << 2); /* point to 1st user interrupt */ - *(vectors + (int32_t)IRQn) = vector; /* use pointer arithmetic to access vector */ -#endif - /* ARM Application Note 321 states that the M0+ does not require the architectural barrier */ -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -#else - uint32_t *vectors = (uint32_t *)(NVIC_USER_IRQ_OFFSET << 2); /* point to 1st user interrupt */ - return *(vectors + (int32_t)IRQn); /* use pointer arithmetic to access vector */ -#endif -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv7.h" - -#endif - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - return 0U; /* No FPU */ -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0PLUS_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm1.h b/Drivers/CMSIS/Core/Include/core_cm1.h deleted file mode 100644 index 44c2a49..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm1.h +++ /dev/null @@ -1,979 +0,0 @@ -/**************************************************************************//** - * @file core_cm1.h - * @brief CMSIS Cortex-M1 Core Peripheral Access Layer Header File - * @version V1.0.1 - * @date 12. November 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM1_H_GENERIC -#define __CORE_CM1_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M1 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS CM1 definitions */ -#define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM1_CMSIS_VERSION ((__CM1_CMSIS_VERSION_MAIN << 16U) | \ - __CM1_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (1U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM1_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM1_H_DEPENDANT -#define __CORE_CM1_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM1_REV - #define __CM1_REV 0x0100U - #warning "__CM1_REV not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M1 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t _reserved0:1; /*!< bit: 0 Reserved */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - uint32_t RESERVED0; - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED1; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_ITCMUAEN_Pos 4U /*!< ACTLR: Instruction TCM Upper Alias Enable Position */ -#define SCnSCB_ACTLR_ITCMUAEN_Msk (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos) /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */ - -#define SCnSCB_ACTLR_ITCMLAEN_Pos 3U /*!< ACTLR: Instruction TCM Lower Alias Enable Position */ -#define SCnSCB_ACTLR_ITCMLAEN_Msk (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos) /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the Cortex-M1 header file. - @{ - */ -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ -/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M1 */ - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* The following EXC_RETURN values are saved the LR on exception entry */ -#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ -#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ -#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ - - -/* Interrupt Priorities are WORD accessible only under Armv6-M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - -#define __NVIC_SetPriorityGrouping(X) (void)(X) -#define __NVIC_GetPriorityGrouping() (0U) - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - Address 0 must be mapped to SRAM. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)0x0U; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - /* ARM Application Note 321 states that the M1 does not require the architectural barrier */ -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)0x0U; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - return 0U; /* No FPU */ -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM1_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm23.h b/Drivers/CMSIS/Core/Include/core_cm23.h deleted file mode 100644 index 54e85ea..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm23.h +++ /dev/null @@ -1,2297 +0,0 @@ -/**************************************************************************//** - * @file core_cm23.h - * @brief CMSIS Cortex-M23 Core Peripheral Access Layer Header File - * @version V5.1.0 - * @date 11. February 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#elif defined ( __GNUC__ ) - #pragma GCC diagnostic ignored "-Wpedantic" /* disable pedantic warning due to unnamed structs/unions */ -#endif - -#ifndef __CORE_CM23_H_GENERIC -#define __CORE_CM23_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M23 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS definitions */ -#define __CM23_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM23_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM23_CMSIS_VERSION ((__CM23_CMSIS_VERSION_MAIN << 16U) | \ - __CM23_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (23U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM23_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM23_H_DEPENDANT -#define __CORE_CM23_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM23_REV - #define __CM23_REV 0x0000U - #warning "__CM23_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __SAUREGION_PRESENT - #define __SAUREGION_PRESENT 0U - #warning "__SAUREGION_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 0U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif - - #ifndef __ETM_PRESENT - #define __ETM_PRESENT 0U - #warning "__ETM_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MTB_PRESENT - #define __MTB_PRESENT 0U - #warning "__MTB_PRESENT not defined in device header file; using default!" - #endif - -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M23 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core SAU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[16U]; - __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[16U]; - __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[16U]; - __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[16U]; - __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[16U]; - __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ - uint32_t RESERVED5[16U]; - __IOM uint32_t IPR[124U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ -#else - uint32_t RESERVED0; -#endif - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED1; - __IOM uint32_t SHPR[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ -#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ - -#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ -#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ - -#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ -#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ -#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#endif - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ -#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ - -#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ -#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ - -#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ -#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ -#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ - -#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ -#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ -#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ -#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ - -#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ -#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - uint32_t RESERVED0[6U]; - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - uint32_t RESERVED3[1U]; - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED4[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - uint32_t RESERVED5[1U]; - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED6[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - uint32_t RESERVED7[1U]; - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED8[1U]; - __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ - uint32_t RESERVED9[1U]; - __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ - uint32_t RESERVED10[1U]; - __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ - uint32_t RESERVED11[1U]; - __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ - uint32_t RESERVED12[1U]; - __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ - uint32_t RESERVED13[1U]; - __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ - uint32_t RESERVED14[1U]; - __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ - uint32_t RESERVED15[1U]; - __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ - uint32_t RESERVED16[1U]; - __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ - uint32_t RESERVED17[1U]; - __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ - uint32_t RESERVED18[1U]; - __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ - uint32_t RESERVED19[1U]; - __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ - uint32_t RESERVED20[1U]; - __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ - uint32_t RESERVED21[1U]; - __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ - uint32_t RESERVED22[1U]; - __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ - uint32_t RESERVED23[1U]; - __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ - uint32_t RESERVED24[1U]; - __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ - uint32_t RESERVED25[1U]; - __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ - uint32_t RESERVED26[1U]; - __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ - uint32_t RESERVED27[1U]; - __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ - uint32_t RESERVED28[1U]; - __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ - uint32_t RESERVED29[1U]; - __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ - uint32_t RESERVED30[1U]; - __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ - uint32_t RESERVED31[1U]; - __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ -#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ - -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ -#define DWT_FUNCTION_ACTION_Msk (0x3UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ - -#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ -#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ - __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */ - __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */ - __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ -#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration Test FIFO Test Data 0 Register Definitions */ -#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */ -#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */ - -#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */ -#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */ - -#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */ -#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */ - -#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */ -#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */ -#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */ -#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */ -#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */ - -/* TPI Integration Test ATB Control Register 2 Register Definitions */ -#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */ -#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */ - -#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */ -#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */ - -#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */ -#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */ - -#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */ -#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */ - -/* TPI Integration Test FIFO Test Data 1 Register Definitions */ -#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */ -#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */ - -#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */ -#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */ - -#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */ -#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */ - -#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */ -#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */ -#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */ -#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */ -#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */ - -/* TPI Integration Test ATB Control Register 0 Definitions */ -#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */ -#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */ - -#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */ -#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */ - -#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */ -#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */ - -#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */ -#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */ -#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ - uint32_t RESERVED0[7U]; - union { - __IOM uint32_t MAIR[2]; - struct { - __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ - __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ - }; - }; -} MPU_Type; - -#define MPU_TYPE_RALIASES 1U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ -#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ - -#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ -#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ - -#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ -#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ - -#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ -#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ - -/* MPU Region Limit Address Register Definitions */ -#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ -#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ - -#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ -#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ - -#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: EN Position */ -#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: EN Mask */ - -/* MPU Memory Attribute Indirection Register 0 Definitions */ -#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ -#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ - -#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ -#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ - -#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ -#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ - -#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ -#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ - -/* MPU Memory Attribute Indirection Register 1 Definitions */ -#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ -#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ - -#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ -#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ - -#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ -#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ - -#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ -#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SAU Security Attribution Unit (SAU) - \brief Type definitions for the Security Attribution Unit (SAU) - @{ - */ - -/** - \brief Structure type to access the Security Attribution Unit (SAU). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ - __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ -#endif -} SAU_Type; - -/* SAU Control Register Definitions */ -#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ -#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ - -#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ -#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ - -/* SAU Type Register Definitions */ -#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ -#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ - -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) -/* SAU Region Number Register Definitions */ -#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ -#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ - -/* SAU Region Base Address Register Definitions */ -#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ -#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ - -/* SAU Region Limit Address Register Definitions */ -#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ -#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ - -#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ -#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ - -#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ -#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ - -#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ - -/*@} end of group CMSIS_SAU */ -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */ -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief \deprecated Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */ -#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< \deprecated CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< \deprecated CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< \deprecated CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< \deprecated CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< \deprecated CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register */ -#define CoreDebug_DEMCR_DWTENA_Pos 24U /*!< \deprecated CoreDebug DEMCR: DWTENA Position */ -#define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos) /*!< \deprecated CoreDebug DEMCR: DWTENA Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */ - -/* Debug Authentication Control Register Definitions */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */ -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */ - -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */ - -/* Debug Security Control and Status Register Definitions */ -#define CoreDebug_DSCSR_CDS_Pos 16U /*!< \deprecated CoreDebug DSCSR: CDS Position */ -#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< \deprecated CoreDebug DSCSR: CDS Mask */ - -#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */ -#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */ - -#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */ -#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DCB Debug Control Block - \brief Type definitions for the Debug Control Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Control Block Registers (DCB). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} DCB_Type; - -/* DHCSR, Debug Halting Control and Status Register Definitions */ -#define DCB_DHCSR_DBGKEY_Pos 16U /*!< DCB DHCSR: Debug key Position */ -#define DCB_DHCSR_DBGKEY_Msk (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos) /*!< DCB DHCSR: Debug key Mask */ - -#define DCB_DHCSR_S_RESTART_ST_Pos 26U /*!< DCB DHCSR: Restart sticky status Position */ -#define DCB_DHCSR_S_RESTART_ST_Msk (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos) /*!< DCB DHCSR: Restart sticky status Mask */ - -#define DCB_DHCSR_S_RESET_ST_Pos 25U /*!< DCB DHCSR: Reset sticky status Position */ -#define DCB_DHCSR_S_RESET_ST_Msk (0x1UL << DCB_DHCSR_S_RESET_ST_Pos) /*!< DCB DHCSR: Reset sticky status Mask */ - -#define DCB_DHCSR_S_RETIRE_ST_Pos 24U /*!< DCB DHCSR: Retire sticky status Position */ -#define DCB_DHCSR_S_RETIRE_ST_Msk (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos) /*!< DCB DHCSR: Retire sticky status Mask */ - -#define DCB_DHCSR_S_SDE_Pos 20U /*!< DCB DHCSR: Secure debug enabled Position */ -#define DCB_DHCSR_S_SDE_Msk (0x1UL << DCB_DHCSR_S_SDE_Pos) /*!< DCB DHCSR: Secure debug enabled Mask */ - -#define DCB_DHCSR_S_LOCKUP_Pos 19U /*!< DCB DHCSR: Lockup status Position */ -#define DCB_DHCSR_S_LOCKUP_Msk (0x1UL << DCB_DHCSR_S_LOCKUP_Pos) /*!< DCB DHCSR: Lockup status Mask */ - -#define DCB_DHCSR_S_SLEEP_Pos 18U /*!< DCB DHCSR: Sleeping status Position */ -#define DCB_DHCSR_S_SLEEP_Msk (0x1UL << DCB_DHCSR_S_SLEEP_Pos) /*!< DCB DHCSR: Sleeping status Mask */ - -#define DCB_DHCSR_S_HALT_Pos 17U /*!< DCB DHCSR: Halted status Position */ -#define DCB_DHCSR_S_HALT_Msk (0x1UL << DCB_DHCSR_S_HALT_Pos) /*!< DCB DHCSR: Halted status Mask */ - -#define DCB_DHCSR_S_REGRDY_Pos 16U /*!< DCB DHCSR: Register ready status Position */ -#define DCB_DHCSR_S_REGRDY_Msk (0x1UL << DCB_DHCSR_S_REGRDY_Pos) /*!< DCB DHCSR: Register ready status Mask */ - -#define DCB_DHCSR_C_MASKINTS_Pos 3U /*!< DCB DHCSR: Mask interrupts control Position */ -#define DCB_DHCSR_C_MASKINTS_Msk (0x1UL << DCB_DHCSR_C_MASKINTS_Pos) /*!< DCB DHCSR: Mask interrupts control Mask */ - -#define DCB_DHCSR_C_STEP_Pos 2U /*!< DCB DHCSR: Step control Position */ -#define DCB_DHCSR_C_STEP_Msk (0x1UL << DCB_DHCSR_C_STEP_Pos) /*!< DCB DHCSR: Step control Mask */ - -#define DCB_DHCSR_C_HALT_Pos 1U /*!< DCB DHCSR: Halt control Position */ -#define DCB_DHCSR_C_HALT_Msk (0x1UL << DCB_DHCSR_C_HALT_Pos) /*!< DCB DHCSR: Halt control Mask */ - -#define DCB_DHCSR_C_DEBUGEN_Pos 0U /*!< DCB DHCSR: Debug enable control Position */ -#define DCB_DHCSR_C_DEBUGEN_Msk (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/) /*!< DCB DHCSR: Debug enable control Mask */ - -/* DCRSR, Debug Core Register Select Register Definitions */ -#define DCB_DCRSR_REGWnR_Pos 16U /*!< DCB DCRSR: Register write/not-read Position */ -#define DCB_DCRSR_REGWnR_Msk (0x1UL << DCB_DCRSR_REGWnR_Pos) /*!< DCB DCRSR: Register write/not-read Mask */ - -#define DCB_DCRSR_REGSEL_Pos 0U /*!< DCB DCRSR: Register selector Position */ -#define DCB_DCRSR_REGSEL_Msk (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/) /*!< DCB DCRSR: Register selector Mask */ - -/* DCRDR, Debug Core Register Data Register Definitions */ -#define DCB_DCRDR_DBGTMP_Pos 0U /*!< DCB DCRDR: Data temporary buffer Position */ -#define DCB_DCRDR_DBGTMP_Msk (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/) /*!< DCB DCRDR: Data temporary buffer Mask */ - -/* DEMCR, Debug Exception and Monitor Control Register Definitions */ -#define DCB_DEMCR_TRCENA_Pos 24U /*!< DCB DEMCR: Trace enable Position */ -#define DCB_DEMCR_TRCENA_Msk (0x1UL << DCB_DEMCR_TRCENA_Pos) /*!< DCB DEMCR: Trace enable Mask */ - -#define DCB_DEMCR_VC_HARDERR_Pos 10U /*!< DCB DEMCR: Vector Catch HardFault errors Position */ -#define DCB_DEMCR_VC_HARDERR_Msk (0x1UL << DCB_DEMCR_VC_HARDERR_Pos) /*!< DCB DEMCR: Vector Catch HardFault errors Mask */ - -#define DCB_DEMCR_VC_CORERESET_Pos 0U /*!< DCB DEMCR: Vector Catch Core reset Position */ -#define DCB_DEMCR_VC_CORERESET_Msk (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/) /*!< DCB DEMCR: Vector Catch Core reset Mask */ - -/* DAUTHCTRL, Debug Authentication Control Register Definitions */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPNIDENSEL_Msk (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos) /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */ - -#define DCB_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPIDENSEL_Msk (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */ - -/* DSCSR, Debug Security Control and Status Register Definitions */ -#define DCB_DSCSR_CDSKEY_Pos 17U /*!< DCB DSCSR: CDS write-enable key Position */ -#define DCB_DSCSR_CDSKEY_Msk (0x1UL << DCB_DSCSR_CDSKEY_Pos) /*!< DCB DSCSR: CDS write-enable key Mask */ - -#define DCB_DSCSR_CDS_Pos 16U /*!< DCB DSCSR: Current domain Secure Position */ -#define DCB_DSCSR_CDS_Msk (0x1UL << DCB_DSCSR_CDS_Pos) /*!< DCB DSCSR: Current domain Secure Mask */ - -#define DCB_DSCSR_SBRSEL_Pos 1U /*!< DCB DSCSR: Secure banked register select Position */ -#define DCB_DSCSR_SBRSEL_Msk (0x1UL << DCB_DSCSR_SBRSEL_Pos) /*!< DCB DSCSR: Secure banked register select Mask */ - -#define DCB_DSCSR_SBRSELEN_Pos 0U /*!< DCB DSCSR: Secure banked register select enable Position */ -#define DCB_DSCSR_SBRSELEN_Msk (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/) /*!< DCB DSCSR: Secure banked register select enable Mask */ - -/*@} end of group CMSIS_DCB */ - - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DIB Debug Identification Block - \brief Type definitions for the Debug Identification Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Identification Block Registers (DIB). - */ -typedef struct -{ - __OM uint32_t DLAR; /*!< Offset: 0x000 ( /W) SCS Software Lock Access Register */ - __IM uint32_t DLSR; /*!< Offset: 0x004 (R/ ) SCS Software Lock Status Register */ - __IM uint32_t DAUTHSTATUS; /*!< Offset: 0x008 (R/ ) Debug Authentication Status Register */ - __IM uint32_t DDEVARCH; /*!< Offset: 0x00C (R/ ) SCS Device Architecture Register */ - __IM uint32_t DDEVTYPE; /*!< Offset: 0x010 (R/ ) SCS Device Type Register */ -} DIB_Type; - -/* DLAR, SCS Software Lock Access Register Definitions */ -#define DIB_DLAR_KEY_Pos 0U /*!< DIB DLAR: KEY Position */ -#define DIB_DLAR_KEY_Msk (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */) /*!< DIB DLAR: KEY Mask */ - -/* DLSR, SCS Software Lock Status Register Definitions */ -#define DIB_DLSR_nTT_Pos 2U /*!< DIB DLSR: Not thirty-two bit Position */ -#define DIB_DLSR_nTT_Msk (0x1UL << DIB_DLSR_nTT_Pos ) /*!< DIB DLSR: Not thirty-two bit Mask */ - -#define DIB_DLSR_SLK_Pos 1U /*!< DIB DLSR: Software Lock status Position */ -#define DIB_DLSR_SLK_Msk (0x1UL << DIB_DLSR_SLK_Pos ) /*!< DIB DLSR: Software Lock status Mask */ - -#define DIB_DLSR_SLI_Pos 0U /*!< DIB DLSR: Software Lock implemented Position */ -#define DIB_DLSR_SLI_Msk (0x1UL /*<< DIB_DLSR_SLI_Pos*/) /*!< DIB DLSR: Software Lock implemented Mask */ - -/* DAUTHSTATUS, Debug Authentication Status Register Definitions */ -#define DIB_DAUTHSTATUS_SNID_Pos 6U /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_SNID_Msk (0x3UL << DIB_DAUTHSTATUS_SNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_SID_Pos 4U /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_SID_Msk (0x3UL << DIB_DAUTHSTATUS_SID_Pos ) /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSNID_Pos 2U /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSID_Pos 0U /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSID_Msk (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/) /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */ - -/* DDEVARCH, SCS Device Architecture Register Definitions */ -#define DIB_DDEVARCH_ARCHITECT_Pos 21U /*!< DIB DDEVARCH: Architect Position */ -#define DIB_DDEVARCH_ARCHITECT_Msk (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos ) /*!< DIB DDEVARCH: Architect Mask */ - -#define DIB_DDEVARCH_PRESENT_Pos 20U /*!< DIB DDEVARCH: DEVARCH Present Position */ -#define DIB_DDEVARCH_PRESENT_Msk (0x1FUL << DIB_DDEVARCH_PRESENT_Pos ) /*!< DIB DDEVARCH: DEVARCH Present Mask */ - -#define DIB_DDEVARCH_REVISION_Pos 16U /*!< DIB DDEVARCH: Revision Position */ -#define DIB_DDEVARCH_REVISION_Msk (0xFUL << DIB_DDEVARCH_REVISION_Pos ) /*!< DIB DDEVARCH: Revision Mask */ - -#define DIB_DDEVARCH_ARCHVER_Pos 12U /*!< DIB DDEVARCH: Architecture Version Position */ -#define DIB_DDEVARCH_ARCHVER_Msk (0xFUL << DIB_DDEVARCH_ARCHVER_Pos ) /*!< DIB DDEVARCH: Architecture Version Mask */ - -#define DIB_DDEVARCH_ARCHPART_Pos 0U /*!< DIB DDEVARCH: Architecture Part Position */ -#define DIB_DDEVARCH_ARCHPART_Msk (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/) /*!< DIB DDEVARCH: Architecture Part Mask */ - -/* DDEVTYPE, SCS Device Type Register Definitions */ -#define DIB_DDEVTYPE_SUB_Pos 4U /*!< DIB DDEVTYPE: Sub-type Position */ -#define DIB_DDEVTYPE_SUB_Msk (0xFUL << DIB_DDEVTYPE_SUB_Pos ) /*!< DIB DDEVTYPE: Sub-type Mask */ - -#define DIB_DDEVTYPE_MAJOR_Pos 0U /*!< DIB DDEVTYPE: Major type Position */ -#define DIB_DDEVTYPE_MAJOR_Msk (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/) /*!< DIB DDEVTYPE: Major type Mask */ - - -/*@} end of group CMSIS_DIB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ - #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ - #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ - #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ - #define CoreDebug_BASE (0xE000EDF0UL) /*!< \deprecated Core Debug Base Address */ - #define DCB_BASE (0xE000EDF0UL) /*!< DCB Base Address */ - #define DIB_BASE (0xE000EFB0UL) /*!< DIB Base Address */ - #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ - #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ - #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - - - #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ - #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ - #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ - #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ - #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< \deprecated Core Debug configuration struct */ - #define DCB ((DCB_Type *) DCB_BASE ) /*!< DCB configuration struct */ - #define DIB ((DIB_Type *) DIB_BASE ) /*!< DIB configuration struct */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ - #endif - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ - #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ - #endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ - #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< \deprecated Core Debug Base Address (non-secure address space) */ - #define DCB_BASE_NS (0xE002EDF0UL) /*!< DCB Base Address (non-secure address space) */ - #define DIB_BASE_NS (0xE002EFB0UL) /*!< DIB Base Address (non-secure address space) */ - #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ - #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ - #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ - - #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ - #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ - #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ - #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct (non-secure address space) */ - #define DCB_NS ((DCB_Type *) DCB_BASE_NS ) /*!< DCB configuration struct (non-secure address space) */ - #define DIB_NS ((DIB_Type *) DIB_BASE_NS ) /*!< DIB configuration struct (non-secure address space) */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ - #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ - #endif - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else -/*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for Cortex-M23 */ -/*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for Cortex-M23 */ - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* Special LR values for Secure/Non-Secure call handling and exception handling */ - -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ -#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ - -/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ -#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ -#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ -#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ -#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ -#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ -#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ -#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ - -/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ -#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ -#else -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ -#endif - - -/* Interrupt Priorities are WORD accessible only under Armv6-M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - -#define __NVIC_SetPriorityGrouping(X) (void)(X) -#define __NVIC_GetPriorityGrouping() (0U) - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Interrupt Target State - \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - \return 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Target State - \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Clear Interrupt Target State - \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - If VTOR is not present address 0 must be mapped to SRAM. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - uint32_t *vectors = (uint32_t *)SCB->VTOR; -#else - uint32_t *vectors = (uint32_t *)0x0U; -#endif - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - __DSB(); -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - uint32_t *vectors = (uint32_t *)SCB->VTOR; -#else - uint32_t *vectors = (uint32_t *)0x0U; -#endif - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Enable Interrupt (non-secure) - \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Interrupt Enable status (non-secure) - \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt (non-secure) - \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Pending Interrupt (non-secure) - \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt (non-secure) - \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt (non-secure) - \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt (non-secure) - \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority (non-secure) - \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every non-secure processor exception. - */ -__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority (non-secure) - \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_NVICFunctions */ - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv8.h" - -#endif - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - return 0U; /* No FPU */ -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ########################## SAU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SAUFunctions SAU Functions - \brief Functions that configure the SAU. - @{ - */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - -/** - \brief Enable SAU - \details Enables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Enable(void) -{ - SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); -} - - - -/** - \brief Disable SAU - \details Disables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Disable(void) -{ - SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); -} - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_SAUFunctions */ - - - - -/* ################################## Debug Control function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DCBFunctions Debug Control Functions - \brief Functions that access the Debug Control Block. - @{ - */ - - -/** - \brief Set Debug Authentication Control Register - \details writes to Debug Authentication Control register. - \param [in] value value to be writen. - */ -__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value) -{ - __DSB(); - __ISB(); - DCB->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register - \details Reads Debug Authentication Control register. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void) -{ - return (DCB->DAUTHCTRL); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Debug Authentication Control Register (non-secure) - \details writes to non-secure Debug Authentication Control register when in secure state. - \param [in] value value to be writen - */ -__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value) -{ - __DSB(); - __ISB(); - DCB_NS->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register (non-secure) - \details Reads non-secure Debug Authentication Control register when in secure state. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) -{ - return (DCB_NS->DAUTHCTRL); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## Debug Identification function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions - \brief Functions that access the Debug Identification Block. - @{ - */ - - -/** - \brief Get Debug Authentication Status Register - \details Reads Debug Authentication Status register. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t DIB_GetAuthStatus(void) -{ - return (DIB->DAUTHSTATUS); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Debug Authentication Status Register (non-secure) - \details Reads non-secure Debug Authentication Status register when in secure state. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void) -{ - return (DIB_NS->DAUTHSTATUS); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief System Tick Configuration (non-secure) - \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function TZ_SysTick_Config_NS is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - - */ -__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM23_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm3.h b/Drivers/CMSIS/Core/Include/core_cm3.h deleted file mode 100644 index 7beef11..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm3.h +++ /dev/null @@ -1,1943 +0,0 @@ -/**************************************************************************//** - * @file core_cm3.h - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version V5.1.2 - * @date 04. June 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM3_H_GENERIC -#define __CORE_CM3_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M3 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS CM3 definitions */ -#define __CM3_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \ - __CM3_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (3U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM3_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM3_H_DEPENDANT -#define __CORE_CM3_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM3_REV - #define __CM3_REV 0x0200U - #warning "__CM3_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 1U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M3 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:1; /*!< bit: 9 Reserved */ - uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ - uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit */ - uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ -#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ -#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RESERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[5U]; - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#if defined (__CM3_REV) && (__CM3_REV < 0x0201U) /* core r2p1 */ -#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ -#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ - -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#else -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#endif - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ -#if defined (__CM3_REV) && (__CM3_REV >= 0x200U) - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -#else - uint32_t RESERVED1[1U]; -#endif -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#if defined (__CM3_REV) && (__CM3_REV >= 0x200U) -#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */ -#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */ - -#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */ -#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */ - -#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ -#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ - -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ -#endif - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ -#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ - -#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ -#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ -#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ - -#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ -#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -#define MPU_TYPE_RALIASES 4U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* The following EXC_RETURN values are saved the LR on exception entry */ -#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ -#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ -#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ - - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - /* ARM Application Note 321 states that the M3 does not require the architectural barrier */ -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv7.h" - -#endif - - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - return 0U; /* No FPU */ -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM3_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm33.h b/Drivers/CMSIS/Core/Include/core_cm33.h deleted file mode 100644 index 05d27f2..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm33.h +++ /dev/null @@ -1,3277 +0,0 @@ -/**************************************************************************//** - * @file core_cm33.h - * @brief CMSIS Cortex-M33 Core Peripheral Access Layer Header File - * @version V5.2.3 - * @date 13. October 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#elif defined ( __GNUC__ ) - #pragma GCC diagnostic ignored "-Wpedantic" /* disable pedantic warning due to unnamed structs/unions */ -#endif - -#ifndef __CORE_CM33_H_GENERIC -#define __CORE_CM33_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M33 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS CM33 definitions */ -#define __CM33_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM33_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM33_CMSIS_VERSION ((__CM33_CMSIS_VERSION_MAIN << 16U) | \ - __CM33_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (33U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. -*/ -#if defined ( __CC_ARM ) - #if defined (__TARGET_FPU_VFP) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined (__ARM_FP) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined (__ARMVFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __TI_ARM__ ) - #if defined (__TI_VFP_SUPPORT__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined (__FPU_VFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM33_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM33_H_DEPENDANT -#define __CORE_CM33_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM33_REV - #define __CM33_REV 0x0000U - #warning "__CM33_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __SAUREGION_PRESENT - #define __SAUREGION_PRESENT 0U - #warning "__SAUREGION_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DSP_PRESENT - #define __DSP_PRESENT 0U - #warning "__DSP_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 1U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M33 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core SAU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ - uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ - uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ - uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ -#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ - -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[16U]; - __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[16U]; - __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[16U]; - __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[16U]; - __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[16U]; - __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ - uint32_t RESERVED5[16U]; - __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED6[580U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ - __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ - __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ - __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ - uint32_t RESERVED7[21U]; - __IOM uint32_t SFSR; /*!< Offset: 0x0E4 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x0E8 (R/W) Secure Fault Address Register */ - uint32_t RESERVED3[69U]; - __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ - uint32_t RESERVED4[15U]; - __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ - uint32_t RESERVED5[1U]; - __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ - uint32_t RESERVED6[1U]; - __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ - __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ - __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ - __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ - __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ - __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ - __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ - __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ - __OM uint32_t BPIALL; /*!< Offset: 0x278 ( /W) Branch Predictor Invalidate All */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ -#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ - -#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ -#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ - -#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ -#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ -#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ -#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ - -#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ -#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ -#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ -#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ - -#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ -#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ -#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ -#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ -#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ - -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ -#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ - -#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ -#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ -#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ -#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ -#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ -#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/* SCB Non-Secure Access Control Register Definitions */ -#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ -#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ - -#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ -#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ - -#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */ -#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */ - -/* SCB Cache Level ID Register Definitions */ -#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ -#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ - -#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ -#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ - -/* SCB Cache Type Register Definitions */ -#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ -#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ - -#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ -#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ - -#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ -#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ - -#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ -#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ - -#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ -#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ - -/* SCB Cache Size ID Register Definitions */ -#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ -#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ - -#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ -#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ - -#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ -#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ - -#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ -#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ - -#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ -#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ - -#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ -#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ - -#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ -#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ - -/* SCB Cache Size Selection Register Definitions */ -#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ -#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ - -#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ -#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ - -/* SCB Software Triggered Interrupt Register Definitions */ -#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ -#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ - -/* SCB D-Cache Invalidate by Set-way Register Definitions */ -#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ -#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ - -#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ -#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ - -/* SCB D-Cache Clean by Set-way Register Definitions */ -#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ -#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ - -#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ -#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ - -/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ -#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ -#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ - -#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ -#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ - __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ - uint32_t RESERVED6[4U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Stimulus Port Register Definitions */ -#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ -#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ - -#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ -#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ -#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ - -#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ -#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - uint32_t RESERVED3[1U]; - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED4[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - uint32_t RESERVED5[1U]; - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED6[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - uint32_t RESERVED7[1U]; - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED8[1U]; - __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ - uint32_t RESERVED9[1U]; - __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ - uint32_t RESERVED10[1U]; - __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ - uint32_t RESERVED11[1U]; - __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ - uint32_t RESERVED12[1U]; - __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ - uint32_t RESERVED13[1U]; - __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ - uint32_t RESERVED14[1U]; - __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ - uint32_t RESERVED15[1U]; - __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ - uint32_t RESERVED16[1U]; - __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ - uint32_t RESERVED17[1U]; - __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ - uint32_t RESERVED18[1U]; - __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ - uint32_t RESERVED19[1U]; - __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ - uint32_t RESERVED20[1U]; - __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ - uint32_t RESERVED21[1U]; - __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ - uint32_t RESERVED22[1U]; - __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ - uint32_t RESERVED23[1U]; - __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ - uint32_t RESERVED24[1U]; - __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ - uint32_t RESERVED25[1U]; - __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ - uint32_t RESERVED26[1U]; - __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ - uint32_t RESERVED27[1U]; - __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ - uint32_t RESERVED28[1U]; - __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ - uint32_t RESERVED29[1U]; - __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ - uint32_t RESERVED30[1U]; - __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ - uint32_t RESERVED31[1U]; - __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ - uint32_t RESERVED32[934U]; - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ - uint32_t RESERVED33[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ -#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ -#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ - -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ -#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ - -#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ -#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ - __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */ - __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */ - __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ -#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration Test FIFO Test Data 0 Register Definitions */ -#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */ -#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */ - -#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */ -#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */ - -#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */ -#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */ - -#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */ -#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */ -#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */ -#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */ -#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */ - -/* TPI Integration Test ATB Control Register 2 Register Definitions */ -#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */ -#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */ - -#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */ -#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */ - -#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */ -#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */ - -#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */ -#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */ - -/* TPI Integration Test FIFO Test Data 1 Register Definitions */ -#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */ -#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */ - -#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */ -#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */ - -#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */ -#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */ - -#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */ -#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */ -#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */ -#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */ -#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */ - -/* TPI Integration Test ATB Control Register 0 Definitions */ -#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */ -#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */ - -#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */ -#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */ - -#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */ -#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */ - -#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */ -#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */ -#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ - __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ - __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ - __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ - uint32_t RESERVED0[1]; - union { - __IOM uint32_t MAIR[2]; - struct { - __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ - __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ - }; - }; -} MPU_Type; - -#define MPU_TYPE_RALIASES 4U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ -#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ - -#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ -#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ - -#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ -#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ - -#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ -#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ - -/* MPU Region Limit Address Register Definitions */ -#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ -#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ - -#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ -#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ - -#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ -#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ - -/* MPU Memory Attribute Indirection Register 0 Definitions */ -#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ -#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ - -#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ -#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ - -#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ -#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ - -#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ -#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ - -/* MPU Memory Attribute Indirection Register 1 Definitions */ -#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ -#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ - -#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ -#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ - -#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ -#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ - -#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ -#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SAU Security Attribution Unit (SAU) - \brief Type definitions for the Security Attribution Unit (SAU) - @{ - */ - -/** - \brief Structure type to access the Security Attribution Unit (SAU). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ - __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ -#else - uint32_t RESERVED0[3]; -#endif - __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ -} SAU_Type; - -/* SAU Control Register Definitions */ -#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ -#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ - -#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ -#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ - -/* SAU Type Register Definitions */ -#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ -#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ - -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) -/* SAU Region Number Register Definitions */ -#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ -#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ - -/* SAU Region Base Address Register Definitions */ -#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ -#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ - -/* SAU Region Limit Address Register Definitions */ -#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ -#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ - -#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ -#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ - -#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ -#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ - -#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ - -/* Secure Fault Status Register Definitions */ -#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ -#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ - -#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ -#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ - -#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ -#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ - -#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ -#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ - -#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ -#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ - -#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ -#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ - -#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ -#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ - -#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ -#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ - -/*@} end of group CMSIS_SAU */ -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and VFP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ -#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ - -#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ -#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ - -#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ -#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ - -#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ -#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ - -#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ -#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ - -#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ -#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ -#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ -#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -/* Media and VFP Feature Register 0 Definitions */ -#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ -#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ - -#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ -#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ - -#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ -#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ - -#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ -#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ -#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ - -#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ -#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ - -#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ -#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ - -#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ -#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ - -/* Media and VFP Feature Register 1 Definitions */ -#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ -#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ - -#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ -#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ - -#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ -#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ - -#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ -#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ - -/* Media and VFP Feature Register 2 Definitions */ -#define FPU_MVFR2_FPMisc_Pos 4U /*!< MVFR2: FPMisc bits Position */ -#define FPU_MVFR2_FPMisc_Msk (0xFUL << FPU_MVFR2_FPMisc_Pos) /*!< MVFR2: FPMisc bits Mask */ - -/*@} end of group CMSIS_FPU */ - -/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */ -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief \deprecated Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */ -#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< \deprecated CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< \deprecated CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< \deprecated CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< \deprecated CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< \deprecated CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< \deprecated CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< \deprecated CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */ - -/* Debug Authentication Control Register Definitions */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */ -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */ - -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */ - -/* Debug Security Control and Status Register Definitions */ -#define CoreDebug_DSCSR_CDS_Pos 16U /*!< \deprecated CoreDebug DSCSR: CDS Position */ -#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< \deprecated CoreDebug DSCSR: CDS Mask */ - -#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */ -#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */ - -#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */ -#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DCB Debug Control Block - \brief Type definitions for the Debug Control Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Control Block Registers (DCB). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} DCB_Type; - -/* DHCSR, Debug Halting Control and Status Register Definitions */ -#define DCB_DHCSR_DBGKEY_Pos 16U /*!< DCB DHCSR: Debug key Position */ -#define DCB_DHCSR_DBGKEY_Msk (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos) /*!< DCB DHCSR: Debug key Mask */ - -#define DCB_DHCSR_S_RESTART_ST_Pos 26U /*!< DCB DHCSR: Restart sticky status Position */ -#define DCB_DHCSR_S_RESTART_ST_Msk (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos) /*!< DCB DHCSR: Restart sticky status Mask */ - -#define DCB_DHCSR_S_RESET_ST_Pos 25U /*!< DCB DHCSR: Reset sticky status Position */ -#define DCB_DHCSR_S_RESET_ST_Msk (0x1UL << DCB_DHCSR_S_RESET_ST_Pos) /*!< DCB DHCSR: Reset sticky status Mask */ - -#define DCB_DHCSR_S_RETIRE_ST_Pos 24U /*!< DCB DHCSR: Retire sticky status Position */ -#define DCB_DHCSR_S_RETIRE_ST_Msk (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos) /*!< DCB DHCSR: Retire sticky status Mask */ - -#define DCB_DHCSR_S_SDE_Pos 20U /*!< DCB DHCSR: Secure debug enabled Position */ -#define DCB_DHCSR_S_SDE_Msk (0x1UL << DCB_DHCSR_S_SDE_Pos) /*!< DCB DHCSR: Secure debug enabled Mask */ - -#define DCB_DHCSR_S_LOCKUP_Pos 19U /*!< DCB DHCSR: Lockup status Position */ -#define DCB_DHCSR_S_LOCKUP_Msk (0x1UL << DCB_DHCSR_S_LOCKUP_Pos) /*!< DCB DHCSR: Lockup status Mask */ - -#define DCB_DHCSR_S_SLEEP_Pos 18U /*!< DCB DHCSR: Sleeping status Position */ -#define DCB_DHCSR_S_SLEEP_Msk (0x1UL << DCB_DHCSR_S_SLEEP_Pos) /*!< DCB DHCSR: Sleeping status Mask */ - -#define DCB_DHCSR_S_HALT_Pos 17U /*!< DCB DHCSR: Halted status Position */ -#define DCB_DHCSR_S_HALT_Msk (0x1UL << DCB_DHCSR_S_HALT_Pos) /*!< DCB DHCSR: Halted status Mask */ - -#define DCB_DHCSR_S_REGRDY_Pos 16U /*!< DCB DHCSR: Register ready status Position */ -#define DCB_DHCSR_S_REGRDY_Msk (0x1UL << DCB_DHCSR_S_REGRDY_Pos) /*!< DCB DHCSR: Register ready status Mask */ - -#define DCB_DHCSR_C_SNAPSTALL_Pos 5U /*!< DCB DHCSR: Snap stall control Position */ -#define DCB_DHCSR_C_SNAPSTALL_Msk (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos) /*!< DCB DHCSR: Snap stall control Mask */ - -#define DCB_DHCSR_C_MASKINTS_Pos 3U /*!< DCB DHCSR: Mask interrupts control Position */ -#define DCB_DHCSR_C_MASKINTS_Msk (0x1UL << DCB_DHCSR_C_MASKINTS_Pos) /*!< DCB DHCSR: Mask interrupts control Mask */ - -#define DCB_DHCSR_C_STEP_Pos 2U /*!< DCB DHCSR: Step control Position */ -#define DCB_DHCSR_C_STEP_Msk (0x1UL << DCB_DHCSR_C_STEP_Pos) /*!< DCB DHCSR: Step control Mask */ - -#define DCB_DHCSR_C_HALT_Pos 1U /*!< DCB DHCSR: Halt control Position */ -#define DCB_DHCSR_C_HALT_Msk (0x1UL << DCB_DHCSR_C_HALT_Pos) /*!< DCB DHCSR: Halt control Mask */ - -#define DCB_DHCSR_C_DEBUGEN_Pos 0U /*!< DCB DHCSR: Debug enable control Position */ -#define DCB_DHCSR_C_DEBUGEN_Msk (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/) /*!< DCB DHCSR: Debug enable control Mask */ - -/* DCRSR, Debug Core Register Select Register Definitions */ -#define DCB_DCRSR_REGWnR_Pos 16U /*!< DCB DCRSR: Register write/not-read Position */ -#define DCB_DCRSR_REGWnR_Msk (0x1UL << DCB_DCRSR_REGWnR_Pos) /*!< DCB DCRSR: Register write/not-read Mask */ - -#define DCB_DCRSR_REGSEL_Pos 0U /*!< DCB DCRSR: Register selector Position */ -#define DCB_DCRSR_REGSEL_Msk (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/) /*!< DCB DCRSR: Register selector Mask */ - -/* DCRDR, Debug Core Register Data Register Definitions */ -#define DCB_DCRDR_DBGTMP_Pos 0U /*!< DCB DCRDR: Data temporary buffer Position */ -#define DCB_DCRDR_DBGTMP_Msk (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/) /*!< DCB DCRDR: Data temporary buffer Mask */ - -/* DEMCR, Debug Exception and Monitor Control Register Definitions */ -#define DCB_DEMCR_TRCENA_Pos 24U /*!< DCB DEMCR: Trace enable Position */ -#define DCB_DEMCR_TRCENA_Msk (0x1UL << DCB_DEMCR_TRCENA_Pos) /*!< DCB DEMCR: Trace enable Mask */ - -#define DCB_DEMCR_MONPRKEY_Pos 23U /*!< DCB DEMCR: Monitor pend req key Position */ -#define DCB_DEMCR_MONPRKEY_Msk (0x1UL << DCB_DEMCR_MONPRKEY_Pos) /*!< DCB DEMCR: Monitor pend req key Mask */ - -#define DCB_DEMCR_UMON_EN_Pos 21U /*!< DCB DEMCR: Unprivileged monitor enable Position */ -#define DCB_DEMCR_UMON_EN_Msk (0x1UL << DCB_DEMCR_UMON_EN_Pos) /*!< DCB DEMCR: Unprivileged monitor enable Mask */ - -#define DCB_DEMCR_SDME_Pos 20U /*!< DCB DEMCR: Secure DebugMonitor enable Position */ -#define DCB_DEMCR_SDME_Msk (0x1UL << DCB_DEMCR_SDME_Pos) /*!< DCB DEMCR: Secure DebugMonitor enable Mask */ - -#define DCB_DEMCR_MON_REQ_Pos 19U /*!< DCB DEMCR: Monitor request Position */ -#define DCB_DEMCR_MON_REQ_Msk (0x1UL << DCB_DEMCR_MON_REQ_Pos) /*!< DCB DEMCR: Monitor request Mask */ - -#define DCB_DEMCR_MON_STEP_Pos 18U /*!< DCB DEMCR: Monitor step Position */ -#define DCB_DEMCR_MON_STEP_Msk (0x1UL << DCB_DEMCR_MON_STEP_Pos) /*!< DCB DEMCR: Monitor step Mask */ - -#define DCB_DEMCR_MON_PEND_Pos 17U /*!< DCB DEMCR: Monitor pend Position */ -#define DCB_DEMCR_MON_PEND_Msk (0x1UL << DCB_DEMCR_MON_PEND_Pos) /*!< DCB DEMCR: Monitor pend Mask */ - -#define DCB_DEMCR_MON_EN_Pos 16U /*!< DCB DEMCR: Monitor enable Position */ -#define DCB_DEMCR_MON_EN_Msk (0x1UL << DCB_DEMCR_MON_EN_Pos) /*!< DCB DEMCR: Monitor enable Mask */ - -#define DCB_DEMCR_VC_SFERR_Pos 11U /*!< DCB DEMCR: Vector Catch SecureFault Position */ -#define DCB_DEMCR_VC_SFERR_Msk (0x1UL << DCB_DEMCR_VC_SFERR_Pos) /*!< DCB DEMCR: Vector Catch SecureFault Mask */ - -#define DCB_DEMCR_VC_HARDERR_Pos 10U /*!< DCB DEMCR: Vector Catch HardFault errors Position */ -#define DCB_DEMCR_VC_HARDERR_Msk (0x1UL << DCB_DEMCR_VC_HARDERR_Pos) /*!< DCB DEMCR: Vector Catch HardFault errors Mask */ - -#define DCB_DEMCR_VC_INTERR_Pos 9U /*!< DCB DEMCR: Vector Catch interrupt errors Position */ -#define DCB_DEMCR_VC_INTERR_Msk (0x1UL << DCB_DEMCR_VC_INTERR_Pos) /*!< DCB DEMCR: Vector Catch interrupt errors Mask */ - -#define DCB_DEMCR_VC_BUSERR_Pos 8U /*!< DCB DEMCR: Vector Catch BusFault errors Position */ -#define DCB_DEMCR_VC_BUSERR_Msk (0x1UL << DCB_DEMCR_VC_BUSERR_Pos) /*!< DCB DEMCR: Vector Catch BusFault errors Mask */ - -#define DCB_DEMCR_VC_STATERR_Pos 7U /*!< DCB DEMCR: Vector Catch state errors Position */ -#define DCB_DEMCR_VC_STATERR_Msk (0x1UL << DCB_DEMCR_VC_STATERR_Pos) /*!< DCB DEMCR: Vector Catch state errors Mask */ - -#define DCB_DEMCR_VC_CHKERR_Pos 6U /*!< DCB DEMCR: Vector Catch check errors Position */ -#define DCB_DEMCR_VC_CHKERR_Msk (0x1UL << DCB_DEMCR_VC_CHKERR_Pos) /*!< DCB DEMCR: Vector Catch check errors Mask */ - -#define DCB_DEMCR_VC_NOCPERR_Pos 5U /*!< DCB DEMCR: Vector Catch NOCP errors Position */ -#define DCB_DEMCR_VC_NOCPERR_Msk (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos) /*!< DCB DEMCR: Vector Catch NOCP errors Mask */ - -#define DCB_DEMCR_VC_MMERR_Pos 4U /*!< DCB DEMCR: Vector Catch MemManage errors Position */ -#define DCB_DEMCR_VC_MMERR_Msk (0x1UL << DCB_DEMCR_VC_MMERR_Pos) /*!< DCB DEMCR: Vector Catch MemManage errors Mask */ - -#define DCB_DEMCR_VC_CORERESET_Pos 0U /*!< DCB DEMCR: Vector Catch Core reset Position */ -#define DCB_DEMCR_VC_CORERESET_Msk (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/) /*!< DCB DEMCR: Vector Catch Core reset Mask */ - -/* DAUTHCTRL, Debug Authentication Control Register Definitions */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPNIDENSEL_Msk (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos) /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */ - -#define DCB_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPIDENSEL_Msk (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */ - -/* DSCSR, Debug Security Control and Status Register Definitions */ -#define DCB_DSCSR_CDSKEY_Pos 17U /*!< DCB DSCSR: CDS write-enable key Position */ -#define DCB_DSCSR_CDSKEY_Msk (0x1UL << DCB_DSCSR_CDSKEY_Pos) /*!< DCB DSCSR: CDS write-enable key Mask */ - -#define DCB_DSCSR_CDS_Pos 16U /*!< DCB DSCSR: Current domain Secure Position */ -#define DCB_DSCSR_CDS_Msk (0x1UL << DCB_DSCSR_CDS_Pos) /*!< DCB DSCSR: Current domain Secure Mask */ - -#define DCB_DSCSR_SBRSEL_Pos 1U /*!< DCB DSCSR: Secure banked register select Position */ -#define DCB_DSCSR_SBRSEL_Msk (0x1UL << DCB_DSCSR_SBRSEL_Pos) /*!< DCB DSCSR: Secure banked register select Mask */ - -#define DCB_DSCSR_SBRSELEN_Pos 0U /*!< DCB DSCSR: Secure banked register select enable Position */ -#define DCB_DSCSR_SBRSELEN_Msk (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/) /*!< DCB DSCSR: Secure banked register select enable Mask */ - -/*@} end of group CMSIS_DCB */ - - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DIB Debug Identification Block - \brief Type definitions for the Debug Identification Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Identification Block Registers (DIB). - */ -typedef struct -{ - __OM uint32_t DLAR; /*!< Offset: 0x000 ( /W) SCS Software Lock Access Register */ - __IM uint32_t DLSR; /*!< Offset: 0x004 (R/ ) SCS Software Lock Status Register */ - __IM uint32_t DAUTHSTATUS; /*!< Offset: 0x008 (R/ ) Debug Authentication Status Register */ - __IM uint32_t DDEVARCH; /*!< Offset: 0x00C (R/ ) SCS Device Architecture Register */ - __IM uint32_t DDEVTYPE; /*!< Offset: 0x010 (R/ ) SCS Device Type Register */ -} DIB_Type; - -/* DLAR, SCS Software Lock Access Register Definitions */ -#define DIB_DLAR_KEY_Pos 0U /*!< DIB DLAR: KEY Position */ -#define DIB_DLAR_KEY_Msk (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */) /*!< DIB DLAR: KEY Mask */ - -/* DLSR, SCS Software Lock Status Register Definitions */ -#define DIB_DLSR_nTT_Pos 2U /*!< DIB DLSR: Not thirty-two bit Position */ -#define DIB_DLSR_nTT_Msk (0x1UL << DIB_DLSR_nTT_Pos ) /*!< DIB DLSR: Not thirty-two bit Mask */ - -#define DIB_DLSR_SLK_Pos 1U /*!< DIB DLSR: Software Lock status Position */ -#define DIB_DLSR_SLK_Msk (0x1UL << DIB_DLSR_SLK_Pos ) /*!< DIB DLSR: Software Lock status Mask */ - -#define DIB_DLSR_SLI_Pos 0U /*!< DIB DLSR: Software Lock implemented Position */ -#define DIB_DLSR_SLI_Msk (0x1UL /*<< DIB_DLSR_SLI_Pos*/) /*!< DIB DLSR: Software Lock implemented Mask */ - -/* DAUTHSTATUS, Debug Authentication Status Register Definitions */ -#define DIB_DAUTHSTATUS_SNID_Pos 6U /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_SNID_Msk (0x3UL << DIB_DAUTHSTATUS_SNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_SID_Pos 4U /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_SID_Msk (0x3UL << DIB_DAUTHSTATUS_SID_Pos ) /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSNID_Pos 2U /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSID_Pos 0U /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSID_Msk (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/) /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */ - -/* DDEVARCH, SCS Device Architecture Register Definitions */ -#define DIB_DDEVARCH_ARCHITECT_Pos 21U /*!< DIB DDEVARCH: Architect Position */ -#define DIB_DDEVARCH_ARCHITECT_Msk (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos ) /*!< DIB DDEVARCH: Architect Mask */ - -#define DIB_DDEVARCH_PRESENT_Pos 20U /*!< DIB DDEVARCH: DEVARCH Present Position */ -#define DIB_DDEVARCH_PRESENT_Msk (0x1FUL << DIB_DDEVARCH_PRESENT_Pos ) /*!< DIB DDEVARCH: DEVARCH Present Mask */ - -#define DIB_DDEVARCH_REVISION_Pos 16U /*!< DIB DDEVARCH: Revision Position */ -#define DIB_DDEVARCH_REVISION_Msk (0xFUL << DIB_DDEVARCH_REVISION_Pos ) /*!< DIB DDEVARCH: Revision Mask */ - -#define DIB_DDEVARCH_ARCHVER_Pos 12U /*!< DIB DDEVARCH: Architecture Version Position */ -#define DIB_DDEVARCH_ARCHVER_Msk (0xFUL << DIB_DDEVARCH_ARCHVER_Pos ) /*!< DIB DDEVARCH: Architecture Version Mask */ - -#define DIB_DDEVARCH_ARCHPART_Pos 0U /*!< DIB DDEVARCH: Architecture Part Position */ -#define DIB_DDEVARCH_ARCHPART_Msk (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/) /*!< DIB DDEVARCH: Architecture Part Mask */ - -/* DDEVTYPE, SCS Device Type Register Definitions */ -#define DIB_DDEVTYPE_SUB_Pos 4U /*!< DIB DDEVTYPE: Sub-type Position */ -#define DIB_DDEVTYPE_SUB_Msk (0xFUL << DIB_DDEVTYPE_SUB_Pos ) /*!< DIB DDEVTYPE: Sub-type Mask */ - -#define DIB_DDEVTYPE_MAJOR_Pos 0U /*!< DIB DDEVTYPE: Major type Position */ -#define DIB_DDEVTYPE_MAJOR_Msk (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/) /*!< DIB DDEVTYPE: Major type Mask */ - - -/*@} end of group CMSIS_DIB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ - #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ - #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ - #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ - #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ - #define CoreDebug_BASE (0xE000EDF0UL) /*!< \deprecated Core Debug Base Address */ - #define DCB_BASE (0xE000EDF0UL) /*!< DCB Base Address */ - #define DIB_BASE (0xE000EFB0UL) /*!< DIB Base Address */ - #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ - #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ - #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - - #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ - #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ - #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ - #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ - #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ - #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ - #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< \deprecated Core Debug configuration struct */ - #define DCB ((DCB_Type *) DCB_BASE ) /*!< DCB configuration struct */ - #define DIB ((DIB_Type *) DIB_BASE ) /*!< DIB configuration struct */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ - #endif - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ - #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ - #endif - - #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ - #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ - #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< \deprecated Core Debug Base Address (non-secure address space) */ - #define DCB_BASE_NS (0xE002EDF0UL) /*!< DCB Base Address (non-secure address space) */ - #define DIB_BASE_NS (0xE002EFB0UL) /*!< DIB Base Address (non-secure address space) */ - #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ - #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ - #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ - - #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ - #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ - #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ - #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ - #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct (non-secure address space) */ - #define DCB_NS ((DCB_Type *) DCB_BASE_NS ) /*!< DCB configuration struct (non-secure address space) */ - #define DIB_NS ((DIB_Type *) DIB_BASE_NS ) /*!< DIB configuration struct (non-secure address space) */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ - #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ - #endif - - #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ - #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ -/*@} */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_register_aliases Backwards Compatibility Aliases - \brief Register alias definitions for backwards compatibility. - @{ - */ -#define ID_ADR (ID_AFR) /*!< SCB Auxiliary Feature Register */ -/*@} */ - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* Special LR values for Secure/Non-Secure call handling and exception handling */ - -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ -#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ - -/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ -#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ -#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ -#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ -#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ -#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ -#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ -#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ - -/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ -#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ -#else -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ -#endif - - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Interrupt Target State - \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - \return 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Target State - \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Clear Interrupt Target State - \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - __DSB(); -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Priority Grouping (non-secure) - \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB_NS->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB_NS->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping (non-secure) - \details Reads the priority grouping field from the non-secure NVIC when in secure state. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) -{ - return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt (non-secure) - \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Interrupt Enable status (non-secure) - \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt (non-secure) - \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Pending Interrupt (non-secure) - \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt (non-secure) - \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt (non-secure) - \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt (non-secure) - \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority (non-secure) - \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every non-secure processor exception. - */ -__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority (non-secure) - \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_NVICFunctions */ - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv8.h" - -#endif - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = FPU->MVFR0; - if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) - { - return 2U; /* Double + Single precision FPU */ - } - else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) - { - return 1U; /* Single precision FPU */ - } - else - { - return 0U; /* No FPU */ - } -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ########################## SAU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SAUFunctions SAU Functions - \brief Functions that configure the SAU. - @{ - */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - -/** - \brief Enable SAU - \details Enables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Enable(void) -{ - SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); -} - - - -/** - \brief Disable SAU - \details Disables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Disable(void) -{ - SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); -} - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_SAUFunctions */ - - - - -/* ################################## Debug Control function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DCBFunctions Debug Control Functions - \brief Functions that access the Debug Control Block. - @{ - */ - - -/** - \brief Set Debug Authentication Control Register - \details writes to Debug Authentication Control register. - \param [in] value value to be writen. - */ -__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value) -{ - __DSB(); - __ISB(); - DCB->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register - \details Reads Debug Authentication Control register. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void) -{ - return (DCB->DAUTHCTRL); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Debug Authentication Control Register (non-secure) - \details writes to non-secure Debug Authentication Control register when in secure state. - \param [in] value value to be writen - */ -__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value) -{ - __DSB(); - __ISB(); - DCB_NS->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register (non-secure) - \details Reads non-secure Debug Authentication Control register when in secure state. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) -{ - return (DCB_NS->DAUTHCTRL); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## Debug Identification function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions - \brief Functions that access the Debug Identification Block. - @{ - */ - - -/** - \brief Get Debug Authentication Status Register - \details Reads Debug Authentication Status register. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t DIB_GetAuthStatus(void) -{ - return (DIB->DAUTHSTATUS); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Debug Authentication Status Register (non-secure) - \details Reads non-secure Debug Authentication Status register when in secure state. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void) -{ - return (DIB_NS->DAUTHSTATUS); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief System Tick Configuration (non-secure) - \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function TZ_SysTick_Config_NS is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - - */ -__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM33_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm35p.h b/Drivers/CMSIS/Core/Include/core_cm35p.h deleted file mode 100644 index 8092007..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm35p.h +++ /dev/null @@ -1,3277 +0,0 @@ -/**************************************************************************//** - * @file core_cm35p.h - * @brief CMSIS Cortex-M35P Core Peripheral Access Layer Header File - * @version V1.1.3 - * @date 13. October 2021 - ******************************************************************************/ -/* - * Copyright (c) 2018-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#elif defined ( __GNUC__ ) - #pragma GCC diagnostic ignored "-Wpedantic" /* disable pedantic warning due to unnamed structs/unions */ -#endif - -#ifndef __CORE_CM35P_H_GENERIC -#define __CORE_CM35P_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M35P - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS CM35P definitions */ -#define __CM35P_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM35P_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM35P_CMSIS_VERSION ((__CM35P_CMSIS_VERSION_MAIN << 16U) | \ - __CM35P_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (35U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. -*/ -#if defined ( __CC_ARM ) - #if defined (__TARGET_FPU_VFP) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined (__ARM_FP) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined (__ARMVFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __TI_ARM__ ) - #if defined (__TI_VFP_SUPPORT__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined (__FPU_VFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM35P_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM35P_H_DEPENDANT -#define __CORE_CM35P_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM35P_REV - #define __CM35P_REV 0x0000U - #warning "__CM35P_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __SAUREGION_PRESENT - #define __SAUREGION_PRESENT 0U - #warning "__SAUREGION_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DSP_PRESENT - #define __DSP_PRESENT 0U - #warning "__DSP_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 1U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M35P */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core SAU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ - uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ - uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ - uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ -#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ - -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[16U]; - __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[16U]; - __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[16U]; - __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[16U]; - __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[16U]; - __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ - uint32_t RESERVED5[16U]; - __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED6[580U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ - __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ - __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ - __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ - uint32_t RESERVED7[21U]; - __IOM uint32_t SFSR; /*!< Offset: 0x0E4 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x0E8 (R/W) Secure Fault Address Register */ - uint32_t RESERVED3[69U]; - __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ - uint32_t RESERVED4[15U]; - __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ - uint32_t RESERVED5[1U]; - __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ - uint32_t RESERVED6[1U]; - __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ - __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ - __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ - __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ - __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ - __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ - __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ - __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ - __OM uint32_t BPIALL; /*!< Offset: 0x278 ( /W) Branch Predictor Invalidate All */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ -#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ - -#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ -#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ - -#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ -#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ -#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ -#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ - -#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ -#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ -#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ -#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ - -#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ -#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ -#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ -#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ -#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ - -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ -#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ - -#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ -#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ -#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ -#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ -#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ -#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/* SCB Non-Secure Access Control Register Definitions */ -#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ -#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ - -#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ -#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ - -#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */ -#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */ - -/* SCB Cache Level ID Register Definitions */ -#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ -#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ - -#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ -#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ - -/* SCB Cache Type Register Definitions */ -#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ -#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ - -#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ -#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ - -#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ -#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ - -#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ -#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ - -#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ -#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ - -/* SCB Cache Size ID Register Definitions */ -#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ -#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ - -#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ -#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ - -#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ -#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ - -#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ -#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ - -#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ -#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ - -#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ -#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ - -#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ -#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ - -/* SCB Cache Size Selection Register Definitions */ -#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ -#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ - -#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ -#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ - -/* SCB Software Triggered Interrupt Register Definitions */ -#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ -#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ - -/* SCB D-Cache Invalidate by Set-way Register Definitions */ -#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ -#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ - -#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ -#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ - -/* SCB D-Cache Clean by Set-way Register Definitions */ -#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ -#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ - -#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ -#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ - -/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ -#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ -#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ - -#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ -#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ - __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ - uint32_t RESERVED6[4U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Stimulus Port Register Definitions */ -#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ -#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ - -#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ -#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ -#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ - -#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ -#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - uint32_t RESERVED3[1U]; - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED4[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - uint32_t RESERVED5[1U]; - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED6[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - uint32_t RESERVED7[1U]; - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED8[1U]; - __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ - uint32_t RESERVED9[1U]; - __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ - uint32_t RESERVED10[1U]; - __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ - uint32_t RESERVED11[1U]; - __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ - uint32_t RESERVED12[1U]; - __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ - uint32_t RESERVED13[1U]; - __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ - uint32_t RESERVED14[1U]; - __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ - uint32_t RESERVED15[1U]; - __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ - uint32_t RESERVED16[1U]; - __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ - uint32_t RESERVED17[1U]; - __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ - uint32_t RESERVED18[1U]; - __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ - uint32_t RESERVED19[1U]; - __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ - uint32_t RESERVED20[1U]; - __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ - uint32_t RESERVED21[1U]; - __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ - uint32_t RESERVED22[1U]; - __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ - uint32_t RESERVED23[1U]; - __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ - uint32_t RESERVED24[1U]; - __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ - uint32_t RESERVED25[1U]; - __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ - uint32_t RESERVED26[1U]; - __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ - uint32_t RESERVED27[1U]; - __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ - uint32_t RESERVED28[1U]; - __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ - uint32_t RESERVED29[1U]; - __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ - uint32_t RESERVED30[1U]; - __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ - uint32_t RESERVED31[1U]; - __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ - uint32_t RESERVED32[934U]; - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ - uint32_t RESERVED33[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ -#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ -#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ - -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ -#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ - -#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ -#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ - __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */ - __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */ - __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ -#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration Test FIFO Test Data 0 Register Definitions */ -#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */ -#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */ - -#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */ -#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */ - -#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */ -#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */ - -#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */ -#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */ -#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */ -#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */ -#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */ - -/* TPI Integration Test ATB Control Register 2 Register Definitions */ -#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */ -#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */ - -#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */ -#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */ - -#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */ -#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */ - -#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */ -#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */ - -/* TPI Integration Test FIFO Test Data 1 Register Definitions */ -#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */ -#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */ - -#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */ -#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */ - -#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */ -#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */ - -#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */ -#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */ -#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */ -#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */ -#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */ - -/* TPI Integration Test ATB Control Register 0 Definitions */ -#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */ -#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */ - -#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */ -#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */ - -#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */ -#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */ - -#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */ -#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */ -#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ - __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ - __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ - __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ - uint32_t RESERVED0[1]; - union { - __IOM uint32_t MAIR[2]; - struct { - __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ - __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ - }; - }; -} MPU_Type; - -#define MPU_TYPE_RALIASES 4U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ -#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ - -#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ -#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ - -#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ -#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ - -#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ -#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ - -/* MPU Region Limit Address Register Definitions */ -#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ -#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ - -#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ -#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ - -#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ -#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ - -/* MPU Memory Attribute Indirection Register 0 Definitions */ -#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ -#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ - -#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ -#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ - -#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ -#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ - -#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ -#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ - -/* MPU Memory Attribute Indirection Register 1 Definitions */ -#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ -#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ - -#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ -#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ - -#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ -#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ - -#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ -#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SAU Security Attribution Unit (SAU) - \brief Type definitions for the Security Attribution Unit (SAU) - @{ - */ - -/** - \brief Structure type to access the Security Attribution Unit (SAU). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ - __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ -#else - uint32_t RESERVED0[3]; -#endif - __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ -} SAU_Type; - -/* SAU Control Register Definitions */ -#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ -#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ - -#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ -#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ - -/* SAU Type Register Definitions */ -#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ -#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ - -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) -/* SAU Region Number Register Definitions */ -#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ -#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ - -/* SAU Region Base Address Register Definitions */ -#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ -#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ - -/* SAU Region Limit Address Register Definitions */ -#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ -#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ - -#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ -#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ - -#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ -#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ - -#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ - -/* Secure Fault Status Register Definitions */ -#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ -#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ - -#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ -#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ - -#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ -#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ - -#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ -#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ - -#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ -#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ - -#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ -#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ - -#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ -#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ - -#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ -#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ - -/*@} end of group CMSIS_SAU */ -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and VFP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ -#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ - -#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ -#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ - -#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ -#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ - -#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ -#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ - -#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ -#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ - -#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ -#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ -#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ -#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -/* Media and VFP Feature Register 0 Definitions */ -#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ -#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ - -#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ -#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ - -#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ -#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ - -#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ -#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ -#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ - -#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ -#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ - -#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ -#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ - -#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ -#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ - -/* Media and VFP Feature Register 1 Definitions */ -#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ -#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ - -#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ -#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ - -#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ -#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ - -#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ -#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ - -/* Media and VFP Feature Register 2 Definitions */ -#define FPU_MVFR2_FPMisc_Pos 4U /*!< MVFR2: FPMisc bits Position */ -#define FPU_MVFR2_FPMisc_Msk (0xFUL << FPU_MVFR2_FPMisc_Pos) /*!< MVFR2: FPMisc bits Mask */ - -/*@} end of group CMSIS_FPU */ - -/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */ -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief \deprecated Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */ -#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< \deprecated CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< \deprecated CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< \deprecated CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< \deprecated CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< \deprecated CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< \deprecated CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< \deprecated CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */ - -/* Debug Authentication Control Register Definitions */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */ -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */ - -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */ - -/* Debug Security Control and Status Register Definitions */ -#define CoreDebug_DSCSR_CDS_Pos 16U /*!< \deprecated CoreDebug DSCSR: CDS Position */ -#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< \deprecated CoreDebug DSCSR: CDS Mask */ - -#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */ -#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */ - -#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */ -#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DCB Debug Control Block - \brief Type definitions for the Debug Control Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Control Block Registers (DCB). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} DCB_Type; - -/* DHCSR, Debug Halting Control and Status Register Definitions */ -#define DCB_DHCSR_DBGKEY_Pos 16U /*!< DCB DHCSR: Debug key Position */ -#define DCB_DHCSR_DBGKEY_Msk (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos) /*!< DCB DHCSR: Debug key Mask */ - -#define DCB_DHCSR_S_RESTART_ST_Pos 26U /*!< DCB DHCSR: Restart sticky status Position */ -#define DCB_DHCSR_S_RESTART_ST_Msk (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos) /*!< DCB DHCSR: Restart sticky status Mask */ - -#define DCB_DHCSR_S_RESET_ST_Pos 25U /*!< DCB DHCSR: Reset sticky status Position */ -#define DCB_DHCSR_S_RESET_ST_Msk (0x1UL << DCB_DHCSR_S_RESET_ST_Pos) /*!< DCB DHCSR: Reset sticky status Mask */ - -#define DCB_DHCSR_S_RETIRE_ST_Pos 24U /*!< DCB DHCSR: Retire sticky status Position */ -#define DCB_DHCSR_S_RETIRE_ST_Msk (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos) /*!< DCB DHCSR: Retire sticky status Mask */ - -#define DCB_DHCSR_S_SDE_Pos 20U /*!< DCB DHCSR: Secure debug enabled Position */ -#define DCB_DHCSR_S_SDE_Msk (0x1UL << DCB_DHCSR_S_SDE_Pos) /*!< DCB DHCSR: Secure debug enabled Mask */ - -#define DCB_DHCSR_S_LOCKUP_Pos 19U /*!< DCB DHCSR: Lockup status Position */ -#define DCB_DHCSR_S_LOCKUP_Msk (0x1UL << DCB_DHCSR_S_LOCKUP_Pos) /*!< DCB DHCSR: Lockup status Mask */ - -#define DCB_DHCSR_S_SLEEP_Pos 18U /*!< DCB DHCSR: Sleeping status Position */ -#define DCB_DHCSR_S_SLEEP_Msk (0x1UL << DCB_DHCSR_S_SLEEP_Pos) /*!< DCB DHCSR: Sleeping status Mask */ - -#define DCB_DHCSR_S_HALT_Pos 17U /*!< DCB DHCSR: Halted status Position */ -#define DCB_DHCSR_S_HALT_Msk (0x1UL << DCB_DHCSR_S_HALT_Pos) /*!< DCB DHCSR: Halted status Mask */ - -#define DCB_DHCSR_S_REGRDY_Pos 16U /*!< DCB DHCSR: Register ready status Position */ -#define DCB_DHCSR_S_REGRDY_Msk (0x1UL << DCB_DHCSR_S_REGRDY_Pos) /*!< DCB DHCSR: Register ready status Mask */ - -#define DCB_DHCSR_C_SNAPSTALL_Pos 5U /*!< DCB DHCSR: Snap stall control Position */ -#define DCB_DHCSR_C_SNAPSTALL_Msk (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos) /*!< DCB DHCSR: Snap stall control Mask */ - -#define DCB_DHCSR_C_MASKINTS_Pos 3U /*!< DCB DHCSR: Mask interrupts control Position */ -#define DCB_DHCSR_C_MASKINTS_Msk (0x1UL << DCB_DHCSR_C_MASKINTS_Pos) /*!< DCB DHCSR: Mask interrupts control Mask */ - -#define DCB_DHCSR_C_STEP_Pos 2U /*!< DCB DHCSR: Step control Position */ -#define DCB_DHCSR_C_STEP_Msk (0x1UL << DCB_DHCSR_C_STEP_Pos) /*!< DCB DHCSR: Step control Mask */ - -#define DCB_DHCSR_C_HALT_Pos 1U /*!< DCB DHCSR: Halt control Position */ -#define DCB_DHCSR_C_HALT_Msk (0x1UL << DCB_DHCSR_C_HALT_Pos) /*!< DCB DHCSR: Halt control Mask */ - -#define DCB_DHCSR_C_DEBUGEN_Pos 0U /*!< DCB DHCSR: Debug enable control Position */ -#define DCB_DHCSR_C_DEBUGEN_Msk (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/) /*!< DCB DHCSR: Debug enable control Mask */ - -/* DCRSR, Debug Core Register Select Register Definitions */ -#define DCB_DCRSR_REGWnR_Pos 16U /*!< DCB DCRSR: Register write/not-read Position */ -#define DCB_DCRSR_REGWnR_Msk (0x1UL << DCB_DCRSR_REGWnR_Pos) /*!< DCB DCRSR: Register write/not-read Mask */ - -#define DCB_DCRSR_REGSEL_Pos 0U /*!< DCB DCRSR: Register selector Position */ -#define DCB_DCRSR_REGSEL_Msk (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/) /*!< DCB DCRSR: Register selector Mask */ - -/* DCRDR, Debug Core Register Data Register Definitions */ -#define DCB_DCRDR_DBGTMP_Pos 0U /*!< DCB DCRDR: Data temporary buffer Position */ -#define DCB_DCRDR_DBGTMP_Msk (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/) /*!< DCB DCRDR: Data temporary buffer Mask */ - -/* DEMCR, Debug Exception and Monitor Control Register Definitions */ -#define DCB_DEMCR_TRCENA_Pos 24U /*!< DCB DEMCR: Trace enable Position */ -#define DCB_DEMCR_TRCENA_Msk (0x1UL << DCB_DEMCR_TRCENA_Pos) /*!< DCB DEMCR: Trace enable Mask */ - -#define DCB_DEMCR_MONPRKEY_Pos 23U /*!< DCB DEMCR: Monitor pend req key Position */ -#define DCB_DEMCR_MONPRKEY_Msk (0x1UL << DCB_DEMCR_MONPRKEY_Pos) /*!< DCB DEMCR: Monitor pend req key Mask */ - -#define DCB_DEMCR_UMON_EN_Pos 21U /*!< DCB DEMCR: Unprivileged monitor enable Position */ -#define DCB_DEMCR_UMON_EN_Msk (0x1UL << DCB_DEMCR_UMON_EN_Pos) /*!< DCB DEMCR: Unprivileged monitor enable Mask */ - -#define DCB_DEMCR_SDME_Pos 20U /*!< DCB DEMCR: Secure DebugMonitor enable Position */ -#define DCB_DEMCR_SDME_Msk (0x1UL << DCB_DEMCR_SDME_Pos) /*!< DCB DEMCR: Secure DebugMonitor enable Mask */ - -#define DCB_DEMCR_MON_REQ_Pos 19U /*!< DCB DEMCR: Monitor request Position */ -#define DCB_DEMCR_MON_REQ_Msk (0x1UL << DCB_DEMCR_MON_REQ_Pos) /*!< DCB DEMCR: Monitor request Mask */ - -#define DCB_DEMCR_MON_STEP_Pos 18U /*!< DCB DEMCR: Monitor step Position */ -#define DCB_DEMCR_MON_STEP_Msk (0x1UL << DCB_DEMCR_MON_STEP_Pos) /*!< DCB DEMCR: Monitor step Mask */ - -#define DCB_DEMCR_MON_PEND_Pos 17U /*!< DCB DEMCR: Monitor pend Position */ -#define DCB_DEMCR_MON_PEND_Msk (0x1UL << DCB_DEMCR_MON_PEND_Pos) /*!< DCB DEMCR: Monitor pend Mask */ - -#define DCB_DEMCR_MON_EN_Pos 16U /*!< DCB DEMCR: Monitor enable Position */ -#define DCB_DEMCR_MON_EN_Msk (0x1UL << DCB_DEMCR_MON_EN_Pos) /*!< DCB DEMCR: Monitor enable Mask */ - -#define DCB_DEMCR_VC_SFERR_Pos 11U /*!< DCB DEMCR: Vector Catch SecureFault Position */ -#define DCB_DEMCR_VC_SFERR_Msk (0x1UL << DCB_DEMCR_VC_SFERR_Pos) /*!< DCB DEMCR: Vector Catch SecureFault Mask */ - -#define DCB_DEMCR_VC_HARDERR_Pos 10U /*!< DCB DEMCR: Vector Catch HardFault errors Position */ -#define DCB_DEMCR_VC_HARDERR_Msk (0x1UL << DCB_DEMCR_VC_HARDERR_Pos) /*!< DCB DEMCR: Vector Catch HardFault errors Mask */ - -#define DCB_DEMCR_VC_INTERR_Pos 9U /*!< DCB DEMCR: Vector Catch interrupt errors Position */ -#define DCB_DEMCR_VC_INTERR_Msk (0x1UL << DCB_DEMCR_VC_INTERR_Pos) /*!< DCB DEMCR: Vector Catch interrupt errors Mask */ - -#define DCB_DEMCR_VC_BUSERR_Pos 8U /*!< DCB DEMCR: Vector Catch BusFault errors Position */ -#define DCB_DEMCR_VC_BUSERR_Msk (0x1UL << DCB_DEMCR_VC_BUSERR_Pos) /*!< DCB DEMCR: Vector Catch BusFault errors Mask */ - -#define DCB_DEMCR_VC_STATERR_Pos 7U /*!< DCB DEMCR: Vector Catch state errors Position */ -#define DCB_DEMCR_VC_STATERR_Msk (0x1UL << DCB_DEMCR_VC_STATERR_Pos) /*!< DCB DEMCR: Vector Catch state errors Mask */ - -#define DCB_DEMCR_VC_CHKERR_Pos 6U /*!< DCB DEMCR: Vector Catch check errors Position */ -#define DCB_DEMCR_VC_CHKERR_Msk (0x1UL << DCB_DEMCR_VC_CHKERR_Pos) /*!< DCB DEMCR: Vector Catch check errors Mask */ - -#define DCB_DEMCR_VC_NOCPERR_Pos 5U /*!< DCB DEMCR: Vector Catch NOCP errors Position */ -#define DCB_DEMCR_VC_NOCPERR_Msk (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos) /*!< DCB DEMCR: Vector Catch NOCP errors Mask */ - -#define DCB_DEMCR_VC_MMERR_Pos 4U /*!< DCB DEMCR: Vector Catch MemManage errors Position */ -#define DCB_DEMCR_VC_MMERR_Msk (0x1UL << DCB_DEMCR_VC_MMERR_Pos) /*!< DCB DEMCR: Vector Catch MemManage errors Mask */ - -#define DCB_DEMCR_VC_CORERESET_Pos 0U /*!< DCB DEMCR: Vector Catch Core reset Position */ -#define DCB_DEMCR_VC_CORERESET_Msk (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/) /*!< DCB DEMCR: Vector Catch Core reset Mask */ - -/* DAUTHCTRL, Debug Authentication Control Register Definitions */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPNIDENSEL_Msk (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos) /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */ - -#define DCB_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPIDENSEL_Msk (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */ - -/* DSCSR, Debug Security Control and Status Register Definitions */ -#define DCB_DSCSR_CDSKEY_Pos 17U /*!< DCB DSCSR: CDS write-enable key Position */ -#define DCB_DSCSR_CDSKEY_Msk (0x1UL << DCB_DSCSR_CDSKEY_Pos) /*!< DCB DSCSR: CDS write-enable key Mask */ - -#define DCB_DSCSR_CDS_Pos 16U /*!< DCB DSCSR: Current domain Secure Position */ -#define DCB_DSCSR_CDS_Msk (0x1UL << DCB_DSCSR_CDS_Pos) /*!< DCB DSCSR: Current domain Secure Mask */ - -#define DCB_DSCSR_SBRSEL_Pos 1U /*!< DCB DSCSR: Secure banked register select Position */ -#define DCB_DSCSR_SBRSEL_Msk (0x1UL << DCB_DSCSR_SBRSEL_Pos) /*!< DCB DSCSR: Secure banked register select Mask */ - -#define DCB_DSCSR_SBRSELEN_Pos 0U /*!< DCB DSCSR: Secure banked register select enable Position */ -#define DCB_DSCSR_SBRSELEN_Msk (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/) /*!< DCB DSCSR: Secure banked register select enable Mask */ - -/*@} end of group CMSIS_DCB */ - - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DIB Debug Identification Block - \brief Type definitions for the Debug Identification Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Identification Block Registers (DIB). - */ -typedef struct -{ - __OM uint32_t DLAR; /*!< Offset: 0x000 ( /W) SCS Software Lock Access Register */ - __IM uint32_t DLSR; /*!< Offset: 0x004 (R/ ) SCS Software Lock Status Register */ - __IM uint32_t DAUTHSTATUS; /*!< Offset: 0x008 (R/ ) Debug Authentication Status Register */ - __IM uint32_t DDEVARCH; /*!< Offset: 0x00C (R/ ) SCS Device Architecture Register */ - __IM uint32_t DDEVTYPE; /*!< Offset: 0x010 (R/ ) SCS Device Type Register */ -} DIB_Type; - -/* DLAR, SCS Software Lock Access Register Definitions */ -#define DIB_DLAR_KEY_Pos 0U /*!< DIB DLAR: KEY Position */ -#define DIB_DLAR_KEY_Msk (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */) /*!< DIB DLAR: KEY Mask */ - -/* DLSR, SCS Software Lock Status Register Definitions */ -#define DIB_DLSR_nTT_Pos 2U /*!< DIB DLSR: Not thirty-two bit Position */ -#define DIB_DLSR_nTT_Msk (0x1UL << DIB_DLSR_nTT_Pos ) /*!< DIB DLSR: Not thirty-two bit Mask */ - -#define DIB_DLSR_SLK_Pos 1U /*!< DIB DLSR: Software Lock status Position */ -#define DIB_DLSR_SLK_Msk (0x1UL << DIB_DLSR_SLK_Pos ) /*!< DIB DLSR: Software Lock status Mask */ - -#define DIB_DLSR_SLI_Pos 0U /*!< DIB DLSR: Software Lock implemented Position */ -#define DIB_DLSR_SLI_Msk (0x1UL /*<< DIB_DLSR_SLI_Pos*/) /*!< DIB DLSR: Software Lock implemented Mask */ - -/* DAUTHSTATUS, Debug Authentication Status Register Definitions */ -#define DIB_DAUTHSTATUS_SNID_Pos 6U /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_SNID_Msk (0x3UL << DIB_DAUTHSTATUS_SNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_SID_Pos 4U /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_SID_Msk (0x3UL << DIB_DAUTHSTATUS_SID_Pos ) /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSNID_Pos 2U /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSID_Pos 0U /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSID_Msk (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/) /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */ - -/* DDEVARCH, SCS Device Architecture Register Definitions */ -#define DIB_DDEVARCH_ARCHITECT_Pos 21U /*!< DIB DDEVARCH: Architect Position */ -#define DIB_DDEVARCH_ARCHITECT_Msk (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos ) /*!< DIB DDEVARCH: Architect Mask */ - -#define DIB_DDEVARCH_PRESENT_Pos 20U /*!< DIB DDEVARCH: DEVARCH Present Position */ -#define DIB_DDEVARCH_PRESENT_Msk (0x1FUL << DIB_DDEVARCH_PRESENT_Pos ) /*!< DIB DDEVARCH: DEVARCH Present Mask */ - -#define DIB_DDEVARCH_REVISION_Pos 16U /*!< DIB DDEVARCH: Revision Position */ -#define DIB_DDEVARCH_REVISION_Msk (0xFUL << DIB_DDEVARCH_REVISION_Pos ) /*!< DIB DDEVARCH: Revision Mask */ - -#define DIB_DDEVARCH_ARCHVER_Pos 12U /*!< DIB DDEVARCH: Architecture Version Position */ -#define DIB_DDEVARCH_ARCHVER_Msk (0xFUL << DIB_DDEVARCH_ARCHVER_Pos ) /*!< DIB DDEVARCH: Architecture Version Mask */ - -#define DIB_DDEVARCH_ARCHPART_Pos 0U /*!< DIB DDEVARCH: Architecture Part Position */ -#define DIB_DDEVARCH_ARCHPART_Msk (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/) /*!< DIB DDEVARCH: Architecture Part Mask */ - -/* DDEVTYPE, SCS Device Type Register Definitions */ -#define DIB_DDEVTYPE_SUB_Pos 4U /*!< DIB DDEVTYPE: Sub-type Position */ -#define DIB_DDEVTYPE_SUB_Msk (0xFUL << DIB_DDEVTYPE_SUB_Pos ) /*!< DIB DDEVTYPE: Sub-type Mask */ - -#define DIB_DDEVTYPE_MAJOR_Pos 0U /*!< DIB DDEVTYPE: Major type Position */ -#define DIB_DDEVTYPE_MAJOR_Msk (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/) /*!< DIB DDEVTYPE: Major type Mask */ - - -/*@} end of group CMSIS_DIB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ - #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ - #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ - #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ - #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ - #define CoreDebug_BASE (0xE000EDF0UL) /*!< \deprecated Core Debug Base Address */ - #define DCB_BASE (0xE000EDF0UL) /*!< DCB Base Address */ - #define DIB_BASE (0xE000EFB0UL) /*!< DIB Base Address */ - #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ - #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ - #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - - #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ - #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ - #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ - #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ - #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ - #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ - #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< \deprecated Core Debug configuration struct */ - #define DCB ((DCB_Type *) DCB_BASE ) /*!< DCB configuration struct */ - #define DIB ((DIB_Type *) DIB_BASE ) /*!< DIB configuration struct */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ - #endif - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ - #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ - #endif - - #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ - #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ - #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< \deprecated Core Debug Base Address (non-secure address space) */ - #define DCB_BASE_NS (0xE002EDF0UL) /*!< DCB Base Address (non-secure address space) */ - #define DIB_BASE_NS (0xE002EFB0UL) /*!< DIB Base Address (non-secure address space) */ - #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ - #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ - #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ - - #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ - #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ - #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ - #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ - #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct (non-secure address space) */ - #define DCB_NS ((DCB_Type *) DCB_BASE_NS ) /*!< DCB configuration struct (non-secure address space) */ - #define DIB_NS ((DIB_Type *) DIB_BASE_NS ) /*!< DIB configuration struct (non-secure address space) */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ - #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ - #endif - - #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ - #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ -/*@} */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_register_aliases Backwards Compatibility Aliases - \brief Register alias definitions for backwards compatibility. - @{ - */ -#define ID_ADR (ID_AFR) /*!< SCB Auxiliary Feature Register */ -/*@} */ - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* Special LR values for Secure/Non-Secure call handling and exception handling */ - -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ -#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ - -/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ -#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ -#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ -#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ -#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ -#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ -#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ -#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ - -/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ -#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ -#else -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ -#endif - - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Interrupt Target State - \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - \return 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Target State - \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Clear Interrupt Target State - \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - __DSB(); -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Priority Grouping (non-secure) - \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB_NS->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB_NS->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping (non-secure) - \details Reads the priority grouping field from the non-secure NVIC when in secure state. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) -{ - return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt (non-secure) - \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Interrupt Enable status (non-secure) - \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt (non-secure) - \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Pending Interrupt (non-secure) - \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt (non-secure) - \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt (non-secure) - \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt (non-secure) - \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority (non-secure) - \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every non-secure processor exception. - */ -__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority (non-secure) - \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_NVICFunctions */ - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv8.h" - -#endif - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = FPU->MVFR0; - if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) - { - return 2U; /* Double + Single precision FPU */ - } - else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) - { - return 1U; /* Single precision FPU */ - } - else - { - return 0U; /* No FPU */ - } -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ########################## SAU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SAUFunctions SAU Functions - \brief Functions that configure the SAU. - @{ - */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - -/** - \brief Enable SAU - \details Enables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Enable(void) -{ - SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); -} - - - -/** - \brief Disable SAU - \details Disables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Disable(void) -{ - SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); -} - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_SAUFunctions */ - - - - -/* ################################## Debug Control function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DCBFunctions Debug Control Functions - \brief Functions that access the Debug Control Block. - @{ - */ - - -/** - \brief Set Debug Authentication Control Register - \details writes to Debug Authentication Control register. - \param [in] value value to be writen. - */ -__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value) -{ - __DSB(); - __ISB(); - DCB->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register - \details Reads Debug Authentication Control register. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void) -{ - return (DCB->DAUTHCTRL); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Debug Authentication Control Register (non-secure) - \details writes to non-secure Debug Authentication Control register when in secure state. - \param [in] value value to be writen - */ -__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value) -{ - __DSB(); - __ISB(); - DCB_NS->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register (non-secure) - \details Reads non-secure Debug Authentication Control register when in secure state. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) -{ - return (DCB_NS->DAUTHCTRL); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## Debug Identification function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions - \brief Functions that access the Debug Identification Block. - @{ - */ - - -/** - \brief Get Debug Authentication Status Register - \details Reads Debug Authentication Status register. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t DIB_GetAuthStatus(void) -{ - return (DIB->DAUTHSTATUS); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Debug Authentication Status Register (non-secure) - \details Reads non-secure Debug Authentication Status register when in secure state. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void) -{ - return (DIB_NS->DAUTHSTATUS); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief System Tick Configuration (non-secure) - \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function TZ_SysTick_Config_NS is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - - */ -__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM35P_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm4.h b/Drivers/CMSIS/Core/Include/core_cm4.h deleted file mode 100644 index c63f4af..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm4.h +++ /dev/null @@ -1,2129 +0,0 @@ -/**************************************************************************//** - * @file core_cm4.h - * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File - * @version V5.1.2 - * @date 04. June 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM4_H_GENERIC -#define __CORE_CM4_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M4 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS CM4 definitions */ -#define __CM4_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM4_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \ - __CM4_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (4U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. -*/ -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM4_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM4_H_DEPENDANT -#define __CORE_CM4_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM4_REV - #define __CM4_REV 0x0000U - #warning "__CM4_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 1U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M4 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:1; /*!< bit: 9 Reserved */ - uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit */ - uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ -#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ -#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ - uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RESERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[5U]; - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ -#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ -#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */ -#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */ - -#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */ -#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */ - -#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ -#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ - -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ -#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ - -#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ -#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ -#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ - -#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ -#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -#define MPU_TYPE_RALIASES 4U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -/* Media and FP Feature Register 0 Definitions */ -#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ -#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ - -#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ -#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ - -#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ -#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ - -#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ -#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ -#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ - -#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ -#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ - -#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ -#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ - -#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ -#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ - -/* Media and FP Feature Register 1 Definitions */ -#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ -#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ - -#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ -#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ - -#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ -#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ - -#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ -#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ - -/* Media and FP Feature Register 2 Definitions */ - -#define FPU_MVFR2_VFP_Misc_Pos 4U /*!< MVFR2: VFP Misc bits Position */ -#define FPU_MVFR2_VFP_Misc_Msk (0xFUL << FPU_MVFR2_VFP_Misc_Pos) /*!< MVFR2: VFP Misc bits Mask */ - -/*@} end of group CMSIS_FPU */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -#define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ -#define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* The following EXC_RETURN values are saved the LR on exception entry */ -#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ -#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ -#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ -#define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */ -#define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */ -#define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */ - - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - /* ARM Application Note 321 states that the M4 does not require the architectural barrier */ -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv7.h" - -#endif - - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = FPU->MVFR0; - if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) - { - return 1U; /* Single precision FPU */ - } - else - { - return 0U; /* No FPU */ - } -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM4_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm55.h b/Drivers/CMSIS/Core/Include/core_cm55.h deleted file mode 100644 index 874ed4b..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm55.h +++ /dev/null @@ -1,4817 +0,0 @@ -/**************************************************************************//** - * @file core_cm55.h - * @brief CMSIS Cortex-M55 Core Peripheral Access Layer Header File - * @version V1.2.4 - * @date 21. April 2022 - ******************************************************************************/ -/* - * Copyright (c) 2018-2022 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#elif defined ( __GNUC__ ) - #pragma GCC diagnostic ignored "-Wpedantic" /* disable pedantic warning due to unnamed structs/unions */ -#endif - -#ifndef __CORE_CM55_H_GENERIC -#define __CORE_CM55_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M55 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS CM55 definitions */ -#define __CM55_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM55_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM55_CMSIS_VERSION ((__CM55_CMSIS_VERSION_MAIN << 16U) | \ - __CM55_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (55U) /*!< Cortex-M Core */ - -#if defined ( __CC_ARM ) - #error Legacy Arm Compiler does not support Armv8.1-M target architecture. -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM55_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM55_H_DEPENDANT -#define __CORE_CM55_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM55_REV - #define __CM55_REV 0x0000U - #warning "__CM55_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #if __FPU_PRESENT != 0U - #ifndef __FPU_DP - #define __FPU_DP 0U - #warning "__FPU_DP not defined in device header file; using default!" - #endif - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __ICACHE_PRESENT - #define __ICACHE_PRESENT 0U - #warning "__ICACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DCACHE_PRESENT - #define __DCACHE_PRESENT 0U - #warning "__DCACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 1U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __PMU_PRESENT - #define __PMU_PRESENT 0U - #warning "__PMU_PRESENT not defined in device header file; using default!" - #endif - - #if __PMU_PRESENT != 0U - #ifndef __PMU_NUM_EVENTCNT - #define __PMU_NUM_EVENTCNT 8U - #warning "__PMU_NUM_EVENTCNT not defined in device header file; using default!" - #elif (__PMU_NUM_EVENTCNT > 8 || __PMU_NUM_EVENTCNT < 2) - #error "__PMU_NUM_EVENTCNT is out of range in device header file!" */ - #endif - #endif - - #ifndef __SAUREGION_PRESENT - #define __SAUREGION_PRESENT 0U - #warning "__SAUREGION_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DSP_PRESENT - #define __DSP_PRESENT 0U - #warning "__DSP_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M55 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core EWIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core PMU Register - - Core MPU Register - - Core SAU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ - uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ - uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ - uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ -#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ - -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[16U]; - __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[16U]; - __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[16U]; - __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[16U]; - __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[16U]; - __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ - uint32_t RESERVED5[16U]; - __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED6[580U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ - __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ - __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ - __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ - uint32_t RESERVED7[21U]; - __IOM uint32_t SFSR; /*!< Offset: 0x0E4 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x0E8 (R/W) Secure Fault Address Register */ - uint32_t RESERVED3[69U]; - __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ - __IOM uint32_t RFSR; /*!< Offset: 0x204 (R/W) RAS Fault Status Register */ - uint32_t RESERVED4[14U]; - __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ - uint32_t RESERVED5[1U]; - __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ - uint32_t RESERVED6[1U]; - __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ - __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ - __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ - __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ - __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ - __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ - __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ - __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ - __OM uint32_t BPIALL; /*!< Offset: 0x278 ( /W) Branch Predictor Invalidate All */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ -#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ - -#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ -#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ - -#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ -#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ -#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ -#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ - -#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ -#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_IESB_Pos 5U /*!< SCB AIRCR: Implicit ESB Enable Position */ -#define SCB_AIRCR_IESB_Msk (1UL << SCB_AIRCR_IESB_Pos) /*!< SCB AIRCR: Implicit ESB Enable Mask */ - -#define SCB_AIRCR_DIT_Pos 4U /*!< SCB AIRCR: Data Independent Timing Position */ -#define SCB_AIRCR_DIT_Msk (1UL << SCB_AIRCR_DIT_Pos) /*!< SCB AIRCR: Data Independent Timing Mask */ - -#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ -#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ -#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_TRD_Pos 20U /*!< SCB CCR: TRD Position */ -#define SCB_CCR_TRD_Msk (1UL << SCB_CCR_TRD_Pos) /*!< SCB CCR: TRD Mask */ - -#define SCB_CCR_LOB_Pos 19U /*!< SCB CCR: LOB Position */ -#define SCB_CCR_LOB_Msk (1UL << SCB_CCR_LOB_Pos) /*!< SCB CCR: LOB Mask */ - -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ - -#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ -#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ -#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ -#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ -#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ - -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ -#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ - -#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ -#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ -#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ -#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ -#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ -#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_PMU_Pos 5U /*!< SCB DFSR: PMU Position */ -#define SCB_DFSR_PMU_Msk (1UL << SCB_DFSR_PMU_Pos) /*!< SCB DFSR: PMU Mask */ - -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/* SCB Non-Secure Access Control Register Definitions */ -#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ -#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ - -#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ -#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ - -#define SCB_NSACR_CP7_Pos 7U /*!< SCB NSACR: CP7 Position */ -#define SCB_NSACR_CP7_Msk (1UL << SCB_NSACR_CP7_Pos) /*!< SCB NSACR: CP7 Mask */ - -#define SCB_NSACR_CP6_Pos 6U /*!< SCB NSACR: CP6 Position */ -#define SCB_NSACR_CP6_Msk (1UL << SCB_NSACR_CP6_Pos) /*!< SCB NSACR: CP6 Mask */ - -#define SCB_NSACR_CP5_Pos 5U /*!< SCB NSACR: CP5 Position */ -#define SCB_NSACR_CP5_Msk (1UL << SCB_NSACR_CP5_Pos) /*!< SCB NSACR: CP5 Mask */ - -#define SCB_NSACR_CP4_Pos 4U /*!< SCB NSACR: CP4 Position */ -#define SCB_NSACR_CP4_Msk (1UL << SCB_NSACR_CP4_Pos) /*!< SCB NSACR: CP4 Mask */ - -#define SCB_NSACR_CP3_Pos 3U /*!< SCB NSACR: CP3 Position */ -#define SCB_NSACR_CP3_Msk (1UL << SCB_NSACR_CP3_Pos) /*!< SCB NSACR: CP3 Mask */ - -#define SCB_NSACR_CP2_Pos 2U /*!< SCB NSACR: CP2 Position */ -#define SCB_NSACR_CP2_Msk (1UL << SCB_NSACR_CP2_Pos) /*!< SCB NSACR: CP2 Mask */ - -#define SCB_NSACR_CP1_Pos 1U /*!< SCB NSACR: CP1 Position */ -#define SCB_NSACR_CP1_Msk (1UL << SCB_NSACR_CP1_Pos) /*!< SCB NSACR: CP1 Mask */ - -#define SCB_NSACR_CP0_Pos 0U /*!< SCB NSACR: CP0 Position */ -#define SCB_NSACR_CP0_Msk (1UL /*<< SCB_NSACR_CP0_Pos*/) /*!< SCB NSACR: CP0 Mask */ - -/* SCB Debug Feature Register 0 Definitions */ -#define SCB_ID_DFR_UDE_Pos 28U /*!< SCB ID_DFR: UDE Position */ -#define SCB_ID_DFR_UDE_Msk (0xFUL << SCB_ID_DFR_UDE_Pos) /*!< SCB ID_DFR: UDE Mask */ - -#define SCB_ID_DFR_MProfDbg_Pos 20U /*!< SCB ID_DFR: MProfDbg Position */ -#define SCB_ID_DFR_MProfDbg_Msk (0xFUL << SCB_ID_DFR_MProfDbg_Pos) /*!< SCB ID_DFR: MProfDbg Mask */ - -/* SCB Cache Level ID Register Definitions */ -#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ -#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ - -#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ -#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ - -/* SCB Cache Type Register Definitions */ -#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ -#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ - -#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ -#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ - -#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ -#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ - -#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ -#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ - -#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ -#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ - -/* SCB Cache Size ID Register Definitions */ -#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ -#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ - -#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ -#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ - -#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ -#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ - -#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ -#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ - -#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ -#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ - -#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ -#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ - -#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ -#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ - -/* SCB Cache Size Selection Register Definitions */ -#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ -#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ - -#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ -#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ - -/* SCB Software Triggered Interrupt Register Definitions */ -#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ -#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ - -/* SCB RAS Fault Status Register Definitions */ -#define SCB_RFSR_V_Pos 31U /*!< SCB RFSR: V Position */ -#define SCB_RFSR_V_Msk (1UL << SCB_RFSR_V_Pos) /*!< SCB RFSR: V Mask */ - -#define SCB_RFSR_IS_Pos 16U /*!< SCB RFSR: IS Position */ -#define SCB_RFSR_IS_Msk (0x7FFFUL << SCB_RFSR_IS_Pos) /*!< SCB RFSR: IS Mask */ - -#define SCB_RFSR_UET_Pos 0U /*!< SCB RFSR: UET Position */ -#define SCB_RFSR_UET_Msk (3UL /*<< SCB_RFSR_UET_Pos*/) /*!< SCB RFSR: UET Mask */ - -/* SCB D-Cache Invalidate by Set-way Register Definitions */ -#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ -#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ - -#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ -#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ - -/* SCB D-Cache Clean by Set-way Register Definitions */ -#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ -#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ - -#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ -#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ - -/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ -#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ -#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ - -#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ -#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ICB Implementation Control Block register (ICB) - \brief Type definitions for the Implementation Control Block Register - @{ - */ - -/** - \brief Structure type to access the Implementation Control Block (ICB). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ - __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ -} ICB_Type; - -/* Auxiliary Control Register Definitions */ -#define ICB_ACTLR_DISCRITAXIRUW_Pos 27U /*!< ACTLR: DISCRITAXIRUW Position */ -#define ICB_ACTLR_DISCRITAXIRUW_Msk (1UL << ICB_ACTLR_DISCRITAXIRUW_Pos) /*!< ACTLR: DISCRITAXIRUW Mask */ - -#define ICB_ACTLR_DISDI_Pos 16U /*!< ACTLR: DISDI Position */ -#define ICB_ACTLR_DISDI_Msk (3UL << ICB_ACTLR_DISDI_Pos) /*!< ACTLR: DISDI Mask */ - -#define ICB_ACTLR_DISCRITAXIRUR_Pos 15U /*!< ACTLR: DISCRITAXIRUR Position */ -#define ICB_ACTLR_DISCRITAXIRUR_Msk (1UL << ICB_ACTLR_DISCRITAXIRUR_Pos) /*!< ACTLR: DISCRITAXIRUR Mask */ - -#define ICB_ACTLR_EVENTBUSEN_Pos 14U /*!< ACTLR: EVENTBUSEN Position */ -#define ICB_ACTLR_EVENTBUSEN_Msk (1UL << ICB_ACTLR_EVENTBUSEN_Pos) /*!< ACTLR: EVENTBUSEN Mask */ - -#define ICB_ACTLR_EVENTBUSEN_S_Pos 13U /*!< ACTLR: EVENTBUSEN_S Position */ -#define ICB_ACTLR_EVENTBUSEN_S_Msk (1UL << ICB_ACTLR_EVENTBUSEN_S_Pos) /*!< ACTLR: EVENTBUSEN_S Mask */ - -#define ICB_ACTLR_DISITMATBFLUSH_Pos 12U /*!< ACTLR: DISITMATBFLUSH Position */ -#define ICB_ACTLR_DISITMATBFLUSH_Msk (1UL << ICB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */ - -#define ICB_ACTLR_DISNWAMODE_Pos 11U /*!< ACTLR: DISNWAMODE Position */ -#define ICB_ACTLR_DISNWAMODE_Msk (1UL << ICB_ACTLR_DISNWAMODE_Pos) /*!< ACTLR: DISNWAMODE Mask */ - -#define ICB_ACTLR_FPEXCODIS_Pos 10U /*!< ACTLR: FPEXCODIS Position */ -#define ICB_ACTLR_FPEXCODIS_Msk (1UL << ICB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */ - -#define ICB_ACTLR_DISOLAP_Pos 7U /*!< ACTLR: DISOLAP Position */ -#define ICB_ACTLR_DISOLAP_Msk (1UL << ICB_ACTLR_DISOLAP_Pos) /*!< ACTLR: DISOLAP Mask */ - -#define ICB_ACTLR_DISOLAPS_Pos 6U /*!< ACTLR: DISOLAPS Position */ -#define ICB_ACTLR_DISOLAPS_Msk (1UL << ICB_ACTLR_DISOLAPS_Pos) /*!< ACTLR: DISOLAPS Mask */ - -#define ICB_ACTLR_DISLOBR_Pos 5U /*!< ACTLR: DISLOBR Position */ -#define ICB_ACTLR_DISLOBR_Msk (1UL << ICB_ACTLR_DISLOBR_Pos) /*!< ACTLR: DISLOBR Mask */ - -#define ICB_ACTLR_DISLO_Pos 4U /*!< ACTLR: DISLO Position */ -#define ICB_ACTLR_DISLO_Msk (1UL << ICB_ACTLR_DISLO_Pos) /*!< ACTLR: DISLO Mask */ - -#define ICB_ACTLR_DISLOLEP_Pos 3U /*!< ACTLR: DISLOLEP Position */ -#define ICB_ACTLR_DISLOLEP_Msk (1UL << ICB_ACTLR_DISLOLEP_Pos) /*!< ACTLR: DISLOLEP Mask */ - -#define ICB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define ICB_ACTLR_DISFOLD_Msk (1UL << ICB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -/* Interrupt Controller Type Register Definitions */ -#define ICB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define ICB_ICTR_INTLINESNUM_Msk (0xFUL /*<< ICB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_ICB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ - uint32_t RESERVED6[3U]; - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) ITM Device Type Register */ - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Stimulus Port Register Definitions */ -#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ -#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ - -#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ -#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ -#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ - -#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ -#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - uint32_t RESERVED3[1U]; - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED4[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - uint32_t RESERVED5[1U]; - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED6[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - uint32_t RESERVED7[1U]; - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED8[1U]; - __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ - uint32_t RESERVED9[1U]; - __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ - uint32_t RESERVED10[1U]; - __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ - uint32_t RESERVED11[1U]; - __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ - uint32_t RESERVED12[1U]; - __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ - uint32_t RESERVED13[1U]; - __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ - uint32_t RESERVED14[1U]; - __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ - uint32_t RESERVED15[1U]; - __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ - uint32_t RESERVED16[1U]; - __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ - uint32_t RESERVED17[1U]; - __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ - uint32_t RESERVED18[1U]; - __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ - uint32_t RESERVED19[1U]; - __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ - uint32_t RESERVED20[1U]; - __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ - uint32_t RESERVED21[1U]; - __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ - uint32_t RESERVED22[1U]; - __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ - uint32_t RESERVED23[1U]; - __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ - uint32_t RESERVED24[1U]; - __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ - uint32_t RESERVED25[1U]; - __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ - uint32_t RESERVED26[1U]; - __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ - uint32_t RESERVED27[1U]; - __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ - uint32_t RESERVED28[1U]; - __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ - uint32_t RESERVED29[1U]; - __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ - uint32_t RESERVED30[1U]; - __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ - uint32_t RESERVED31[1U]; - __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ - uint32_t RESERVED32[934U]; - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ - uint32_t RESERVED33[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ -#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ -#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ - -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ -#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ - -#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ -#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup MemSysCtl_Type Memory System Control Registers (IMPLEMENTATION DEFINED) - \brief Type definitions for the Memory System Control Registers (MEMSYSCTL) - @{ - */ - -/** - \brief Structure type to access the Memory System Control Registers (MEMSYSCTL). - */ -typedef struct -{ - __IOM uint32_t MSCR; /*!< Offset: 0x000 (R/W) Memory System Control Register */ - __IOM uint32_t PFCR; /*!< Offset: 0x004 (R/W) Prefetcher Control Register */ - uint32_t RESERVED1[2U]; - __IOM uint32_t ITCMCR; /*!< Offset: 0x010 (R/W) ITCM Control Register */ - __IOM uint32_t DTCMCR; /*!< Offset: 0x014 (R/W) DTCM Control Register */ - __IOM uint32_t PAHBCR; /*!< Offset: 0x018 (R/W) P-AHB Control Register */ - uint32_t RESERVED2[313U]; - __IOM uint32_t ITGU_CTRL; /*!< Offset: 0x500 (R/W) ITGU Control Register */ - __IOM uint32_t ITGU_CFG; /*!< Offset: 0x504 (R/W) ITGU Configuration Register */ - uint32_t RESERVED3[2U]; - __IOM uint32_t ITGU_LUT[16U]; /*!< Offset: 0x510 (R/W) ITGU Look Up Table Register */ - uint32_t RESERVED4[44U]; - __IOM uint32_t DTGU_CTRL; /*!< Offset: 0x600 (R/W) DTGU Control Registers */ - __IOM uint32_t DTGU_CFG; /*!< Offset: 0x604 (R/W) DTGU Configuration Register */ - uint32_t RESERVED5[2U]; - __IOM uint32_t DTGU_LUT[16U]; /*!< Offset: 0x610 (R/W) DTGU Look Up Table Register */ -} MemSysCtl_Type; - -/* MEMSYSCTL Memory System Control Register (MSCR) Register Definitions */ -#define MEMSYSCTL_MSCR_CPWRDN_Pos 17U /*!< MEMSYSCTL MSCR: CPWRDN Position */ -#define MEMSYSCTL_MSCR_CPWRDN_Msk (0x1UL << MEMSYSCTL_MSCR_CPWRDN_Pos) /*!< MEMSYSCTL MSCR: CPWRDN Mask */ - -#define MEMSYSCTL_MSCR_DCCLEAN_Pos 16U /*!< MEMSYSCTL MSCR: DCCLEAN Position */ -#define MEMSYSCTL_MSCR_DCCLEAN_Msk (0x1UL << MEMSYSCTL_MSCR_DCCLEAN_Pos) /*!< MEMSYSCTL MSCR: DCCLEAN Mask */ - -#define MEMSYSCTL_MSCR_ICACTIVE_Pos 13U /*!< MEMSYSCTL MSCR: ICACTIVE Position */ -#define MEMSYSCTL_MSCR_ICACTIVE_Msk (0x1UL << MEMSYSCTL_MSCR_ICACTIVE_Pos) /*!< MEMSYSCTL MSCR: ICACTIVE Mask */ - -#define MEMSYSCTL_MSCR_DCACTIVE_Pos 12U /*!< MEMSYSCTL MSCR: DCACTIVE Position */ -#define MEMSYSCTL_MSCR_DCACTIVE_Msk (0x1UL << MEMSYSCTL_MSCR_DCACTIVE_Pos) /*!< MEMSYSCTL MSCR: DCACTIVE Mask */ - -#define MEMSYSCTL_MSCR_TECCCHKDIS_Pos 4U /*!< MEMSYSCTL MSCR: TECCCHKDIS Position */ -#define MEMSYSCTL_MSCR_TECCCHKDIS_Msk (0x1UL << MEMSYSCTL_MSCR_TECCCHKDIS_Pos) /*!< MEMSYSCTL MSCR: TECCCHKDIS Mask */ - -#define MEMSYSCTL_MSCR_EVECCFAULT_Pos 3U /*!< MEMSYSCTL MSCR: EVECCFAULT Position */ -#define MEMSYSCTL_MSCR_EVECCFAULT_Msk (0x1UL << MEMSYSCTL_MSCR_EVECCFAULT_Pos) /*!< MEMSYSCTL MSCR: EVECCFAULT Mask */ - -#define MEMSYSCTL_MSCR_FORCEWT_Pos 2U /*!< MEMSYSCTL MSCR: FORCEWT Position */ -#define MEMSYSCTL_MSCR_FORCEWT_Msk (0x1UL << MEMSYSCTL_MSCR_FORCEWT_Pos) /*!< MEMSYSCTL MSCR: FORCEWT Mask */ - -#define MEMSYSCTL_MSCR_ECCEN_Pos 1U /*!< MEMSYSCTL MSCR: ECCEN Position */ -#define MEMSYSCTL_MSCR_ECCEN_Msk (0x1UL << MEMSYSCTL_MSCR_ECCEN_Pos) /*!< MEMSYSCTL MSCR: ECCEN Mask */ - -/* MEMSYSCTL Prefetcher Control Register (PFCR) Register Definitions */ -#define MEMSYSCTL_PFCR_MAX_OS_Pos 7U /*!< MEMSYSCTL PFCR: MAX_OS Position */ -#define MEMSYSCTL_PFCR_MAX_OS_Msk (0x7UL << MEMSYSCTL_PFCR_MAX_OS_Pos) /*!< MEMSYSCTL PFCR: MAX_OS Mask */ - -#define MEMSYSCTL_PFCR_MAX_LA_Pos 4U /*!< MEMSYSCTL PFCR: MAX_LA Position */ -#define MEMSYSCTL_PFCR_MAX_LA_Msk (0x7UL << MEMSYSCTL_PFCR_MAX_LA_Pos) /*!< MEMSYSCTL PFCR: MAX_LA Mask */ - -#define MEMSYSCTL_PFCR_MIN_LA_Pos 1U /*!< MEMSYSCTL PFCR: MIN_LA Position */ -#define MEMSYSCTL_PFCR_MIN_LA_Msk (0x7UL << MEMSYSCTL_PFCR_MIN_LA_Pos) /*!< MEMSYSCTL PFCR: MIN_LA Mask */ - -#define MEMSYSCTL_PFCR_ENABLE_Pos 0U /*!< MEMSYSCTL PFCR: ENABLE Position */ -#define MEMSYSCTL_PFCR_ENABLE_Msk (0x1UL /*<< MEMSYSCTL_PFCR_ENABLE_Pos*/) /*!< MEMSYSCTL PFCR: ENABLE Mask */ - -/* MEMSYSCTL ITCM Control Register (ITCMCR) Register Definitions */ -#define MEMSYSCTL_ITCMCR_SZ_Pos 3U /*!< MEMSYSCTL ITCMCR: SZ Position */ -#define MEMSYSCTL_ITCMCR_SZ_Msk (0xFUL << MEMSYSCTL_ITCMCR_SZ_Pos) /*!< MEMSYSCTL ITCMCR: SZ Mask */ - -#define MEMSYSCTL_ITCMCR_EN_Pos 0U /*!< MEMSYSCTL ITCMCR: EN Position */ -#define MEMSYSCTL_ITCMCR_EN_Msk (0x1UL /*<< MEMSYSCTL_ITCMCR_EN_Pos*/) /*!< MEMSYSCTL ITCMCR: EN Mask */ - -/* MEMSYSCTL DTCM Control Register (DTCMCR) Register Definitions */ -#define MEMSYSCTL_DTCMCR_SZ_Pos 3U /*!< MEMSYSCTL DTCMCR: SZ Position */ -#define MEMSYSCTL_DTCMCR_SZ_Msk (0xFUL << MEMSYSCTL_DTCMCR_SZ_Pos) /*!< MEMSYSCTL DTCMCR: SZ Mask */ - -#define MEMSYSCTL_DTCMCR_EN_Pos 0U /*!< MEMSYSCTL DTCMCR: EN Position */ -#define MEMSYSCTL_DTCMCR_EN_Msk (0x1UL /*<< MEMSYSCTL_DTCMCR_EN_Pos*/) /*!< MEMSYSCTL DTCMCR: EN Mask */ - -/* MEMSYSCTL P-AHB Control Register (PAHBCR) Register Definitions */ -#define MEMSYSCTL_PAHBCR_SZ_Pos 1U /*!< MEMSYSCTL PAHBCR: SZ Position */ -#define MEMSYSCTL_PAHBCR_SZ_Msk (0x7UL << MEMSYSCTL_PAHBCR_SZ_Pos) /*!< MEMSYSCTL PAHBCR: SZ Mask */ - -#define MEMSYSCTL_PAHBCR_EN_Pos 0U /*!< MEMSYSCTL PAHBCR: EN Position */ -#define MEMSYSCTL_PAHBCR_EN_Msk (0x1UL /*<< MEMSYSCTL_PAHBCR_EN_Pos*/) /*!< MEMSYSCTL PAHBCR: EN Mask */ - -/* MEMSYSCTL ITGU Control Register (ITGU_CTRL) Register Definitions */ -#define MEMSYSCTL_ITGU_CTRL_DEREN_Pos 1U /*!< MEMSYSCTL ITGU_CTRL: DEREN Position */ -#define MEMSYSCTL_ITGU_CTRL_DEREN_Msk (0x1UL << MEMSYSCTL_ITGU_CTRL_DEREN_Pos) /*!< MEMSYSCTL ITGU_CTRL: DEREN Mask */ - -#define MEMSYSCTL_ITGU_CTRL_DBFEN_Pos 0U /*!< MEMSYSCTL ITGU_CTRL: DBFEN Position */ -#define MEMSYSCTL_ITGU_CTRL_DBFEN_Msk (0x1UL /*<< MEMSYSCTL_ITGU_CTRL_DBFEN_Pos*/) /*!< MEMSYSCTL ITGU_CTRL: DBFEN Mask */ - -/* MEMSYSCTL ITGU Configuration Register (ITGU_CFG) Register Definitions */ -#define MEMSYSCTL_ITGU_CFG_PRESENT_Pos 31U /*!< MEMSYSCTL ITGU_CFG: PRESENT Position */ -#define MEMSYSCTL_ITGU_CFG_PRESENT_Msk (0x1UL << MEMSYSCTL_ITGU_CFG_PRESENT_Pos) /*!< MEMSYSCTL ITGU_CFG: PRESENT Mask */ - -#define MEMSYSCTL_ITGU_CFG_NUMBLKS_Pos 8U /*!< MEMSYSCTL ITGU_CFG: NUMBLKS Position */ -#define MEMSYSCTL_ITGU_CFG_NUMBLKS_Msk (0xFUL << MEMSYSCTL_ITGU_CFG_NUMBLKS_Pos) /*!< MEMSYSCTL ITGU_CFG: NUMBLKS Mask */ - -#define MEMSYSCTL_ITGU_CFG_BLKSZ_Pos 0U /*!< MEMSYSCTL ITGU_CFG: BLKSZ Position */ -#define MEMSYSCTL_ITGU_CFG_BLKSZ_Msk (0xFUL /*<< MEMSYSCTL_ITGU_CFG_BLKSZ_Pos*/) /*!< MEMSYSCTL ITGU_CFG: BLKSZ Mask */ - -/* MEMSYSCTL DTGU Control Registers (DTGU_CTRL) Register Definitions */ -#define MEMSYSCTL_DTGU_CTRL_DEREN_Pos 1U /*!< MEMSYSCTL DTGU_CTRL: DEREN Position */ -#define MEMSYSCTL_DTGU_CTRL_DEREN_Msk (0x1UL << MEMSYSCTL_DTGU_CTRL_DEREN_Pos) /*!< MEMSYSCTL DTGU_CTRL: DEREN Mask */ - -#define MEMSYSCTL_DTGU_CTRL_DBFEN_Pos 0U /*!< MEMSYSCTL DTGU_CTRL: DBFEN Position */ -#define MEMSYSCTL_DTGU_CTRL_DBFEN_Msk (0x1UL /*<< MEMSYSCTL_DTGU_CTRL_DBFEN_Pos*/) /*!< MEMSYSCTL DTGU_CTRL: DBFEN Mask */ - -/* MEMSYSCTL DTGU Configuration Register (DTGU_CFG) Register Definitions */ -#define MEMSYSCTL_DTGU_CFG_PRESENT_Pos 31U /*!< MEMSYSCTL DTGU_CFG: PRESENT Position */ -#define MEMSYSCTL_DTGU_CFG_PRESENT_Msk (0x1UL << MEMSYSCTL_DTGU_CFG_PRESENT_Pos) /*!< MEMSYSCTL DTGU_CFG: PRESENT Mask */ - -#define MEMSYSCTL_DTGU_CFG_NUMBLKS_Pos 8U /*!< MEMSYSCTL DTGU_CFG: NUMBLKS Position */ -#define MEMSYSCTL_DTGU_CFG_NUMBLKS_Msk (0xFUL << MEMSYSCTL_DTGU_CFG_NUMBLKS_Pos) /*!< MEMSYSCTL DTGU_CFG: NUMBLKS Mask */ - -#define MEMSYSCTL_DTGU_CFG_BLKSZ_Pos 0U /*!< MEMSYSCTL DTGU_CFG: BLKSZ Position */ -#define MEMSYSCTL_DTGU_CFG_BLKSZ_Msk (0xFUL /*<< MEMSYSCTL_DTGU_CFG_BLKSZ_Pos*/) /*!< MEMSYSCTL DTGU_CFG: BLKSZ Mask */ - - -/*@}*/ /* end of group MemSysCtl_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup PwrModCtl_Type Power Mode Control Registers - \brief Type definitions for the Power Mode Control Registers (PWRMODCTL) - @{ - */ - -/** - \brief Structure type to access the Power Mode Control Registers (PWRMODCTL). - */ -typedef struct -{ - __IOM uint32_t CPDLPSTATE; /*!< Offset: 0x000 (R/W) Core Power Domain Low Power State Register */ - __IOM uint32_t DPDLPSTATE; /*!< Offset: 0x004 (R/W) Debug Power Domain Low Power State Register */ -} PwrModCtl_Type; - -/* PWRMODCTL Core Power Domain Low Power State (CPDLPSTATE) Register Definitions */ -#define PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos 8U /*!< PWRMODCTL CPDLPSTATE: RLPSTATE Position */ -#define PWRMODCTL_CPDLPSTATE_RLPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos) /*!< PWRMODCTL CPDLPSTATE: RLPSTATE Mask */ - -#define PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos 4U /*!< PWRMODCTL CPDLPSTATE: ELPSTATE Position */ -#define PWRMODCTL_CPDLPSTATE_ELPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos) /*!< PWRMODCTL CPDLPSTATE: ELPSTATE Mask */ - -#define PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos 0U /*!< PWRMODCTL CPDLPSTATE: CLPSTATE Position */ -#define PWRMODCTL_CPDLPSTATE_CLPSTATE_Msk (0x3UL /*<< PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos*/) /*!< PWRMODCTL CPDLPSTATE: CLPSTATE Mask */ - -/* PWRMODCTL Debug Power Domain Low Power State (DPDLPSTATE) Register Definitions */ -#define PWRMODCTL_DPDLPSTATE_DLPSTATE_Pos 0U /*!< PWRMODCTL DPDLPSTATE: DLPSTATE Position */ -#define PWRMODCTL_DPDLPSTATE_DLPSTATE_Msk (0x3UL /*<< PWRMODCTL_DPDLPSTATE_DLPSTATE_Pos*/) /*!< PWRMODCTL DPDLPSTATE: DLPSTATE Mask */ - -/*@}*/ /* end of group PwrModCtl_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup EWIC_Type External Wakeup Interrupt Controller Registers - \brief Type definitions for the External Wakeup Interrupt Controller Registers (EWIC) - @{ - */ - -/** - \brief Structure type to access the External Wakeup Interrupt Controller Registers (EWIC). - */ -typedef struct -{ - __OM uint32_t EVENTSPR; /*!< Offset: 0x000 ( /W) Event Set Pending Register */ - uint32_t RESERVED0[31U]; - __IM uint32_t EVENTMASKA; /*!< Offset: 0x080 (R/W) Event Mask A Register */ - __IM uint32_t EVENTMASK[15]; /*!< Offset: 0x084 (R/W) Event Mask Register */ -} EWIC_Type; - -/* EWIC External Wakeup Interrupt Controller (EVENTSPR) Register Definitions */ -#define EWIC_EVENTSPR_EDBGREQ_Pos 2U /*!< EWIC EVENTSPR: EDBGREQ Position */ -#define EWIC_EVENTSPR_EDBGREQ_Msk (0x1UL << EWIC_EVENTSPR_EDBGREQ_Pos) /*!< EWIC EVENTSPR: EDBGREQ Mask */ - -#define EWIC_EVENTSPR_NMI_Pos 1U /*!< EWIC EVENTSPR: NMI Position */ -#define EWIC_EVENTSPR_NMI_Msk (0x1UL << EWIC_EVENTSPR_NMI_Pos) /*!< EWIC EVENTSPR: NMI Mask */ - -#define EWIC_EVENTSPR_EVENT_Pos 0U /*!< EWIC EVENTSPR: EVENT Position */ -#define EWIC_EVENTSPR_EVENT_Msk (0x1UL /*<< EWIC_EVENTSPR_EVENT_Pos*/) /*!< EWIC EVENTSPR: EVENT Mask */ - -/* EWIC External Wakeup Interrupt Controller (EVENTMASKA) Register Definitions */ -#define EWIC_EVENTMASKA_EDBGREQ_Pos 2U /*!< EWIC EVENTMASKA: EDBGREQ Position */ -#define EWIC_EVENTMASKA_EDBGREQ_Msk (0x1UL << EWIC_EVENTMASKA_EDBGREQ_Pos) /*!< EWIC EVENTMASKA: EDBGREQ Mask */ - -#define EWIC_EVENTMASKA_NMI_Pos 1U /*!< EWIC EVENTMASKA: NMI Position */ -#define EWIC_EVENTMASKA_NMI_Msk (0x1UL << EWIC_EVENTMASKA_NMI_Pos) /*!< EWIC EVENTMASKA: NMI Mask */ - -#define EWIC_EVENTMASKA_EVENT_Pos 0U /*!< EWIC EVENTMASKA: EVENT Position */ -#define EWIC_EVENTMASKA_EVENT_Msk (0x1UL /*<< EWIC_EVENTMASKA_EVENT_Pos*/) /*!< EWIC EVENTMASKA: EVENT Mask */ - -/* EWIC External Wakeup Interrupt Controller (EVENTMASK) Register Definitions */ -#define EWIC_EVENTMASK_IRQ_Pos 0U /*!< EWIC EVENTMASKA: IRQ Position */ -#define EWIC_EVENTMASK_IRQ_Msk (0xFFFFFFFFUL /*<< EWIC_EVENTMASKA_IRQ_Pos*/) /*!< EWIC EVENTMASKA: IRQ Mask */ - -/*@}*/ /* end of group EWIC_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup ErrBnk_Type Error Banking Registers (IMPLEMENTATION DEFINED) - \brief Type definitions for the Error Banking Registers (ERRBNK) - @{ - */ - -/** - \brief Structure type to access the Error Banking Registers (ERRBNK). - */ -typedef struct -{ - __IOM uint32_t IEBR0; /*!< Offset: 0x000 (R/W) Instruction Cache Error Bank Register 0 */ - __IOM uint32_t IEBR1; /*!< Offset: 0x004 (R/W) Instruction Cache Error Bank Register 1 */ - uint32_t RESERVED0[2U]; - __IOM uint32_t DEBR0; /*!< Offset: 0x010 (R/W) Data Cache Error Bank Register 0 */ - __IOM uint32_t DEBR1; /*!< Offset: 0x014 (R/W) Data Cache Error Bank Register 1 */ - uint32_t RESERVED1[2U]; - __IOM uint32_t TEBR0; /*!< Offset: 0x020 (R/W) TCM Error Bank Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t TEBR1; /*!< Offset: 0x028 (R/W) TCM Error Bank Register 1 */ -} ErrBnk_Type; - -/* ERRBNK Instruction Cache Error Bank Register 0 (IEBR0) Register Definitions */ -#define ERRBNK_IEBR0_SWDEF_Pos 30U /*!< ERRBNK IEBR0: SWDEF Position */ -#define ERRBNK_IEBR0_SWDEF_Msk (0x3UL << ERRBNK_IEBR0_SWDEF_Pos) /*!< ERRBNK IEBR0: SWDEF Mask */ - -#define ERRBNK_IEBR0_BANK_Pos 16U /*!< ERRBNK IEBR0: BANK Position */ -#define ERRBNK_IEBR0_BANK_Msk (0x1UL << ERRBNK_IEBR0_BANK_Pos) /*!< ERRBNK IEBR0: BANK Mask */ - -#define ERRBNK_IEBR0_LOCATION_Pos 2U /*!< ERRBNK IEBR0: LOCATION Position */ -#define ERRBNK_IEBR0_LOCATION_Msk (0x3FFFUL << ERRBNK_IEBR0_LOCATION_Pos) /*!< ERRBNK IEBR0: LOCATION Mask */ - -#define ERRBNK_IEBR0_LOCKED_Pos 1U /*!< ERRBNK IEBR0: LOCKED Position */ -#define ERRBNK_IEBR0_LOCKED_Msk (0x1UL << ERRBNK_IEBR0_LOCKED_Pos) /*!< ERRBNK IEBR0: LOCKED Mask */ - -#define ERRBNK_IEBR0_VALID_Pos 0U /*!< ERRBNK IEBR0: VALID Position */ -#define ERRBNK_IEBR0_VALID_Msk (0x1UL << /*ERRBNK_IEBR0_VALID_Pos*/) /*!< ERRBNK IEBR0: VALID Mask */ - -/* ERRBNK Instruction Cache Error Bank Register 1 (IEBR1) Register Definitions */ -#define ERRBNK_IEBR1_SWDEF_Pos 30U /*!< ERRBNK IEBR1: SWDEF Position */ -#define ERRBNK_IEBR1_SWDEF_Msk (0x3UL << ERRBNK_IEBR1_SWDEF_Pos) /*!< ERRBNK IEBR1: SWDEF Mask */ - -#define ERRBNK_IEBR1_BANK_Pos 16U /*!< ERRBNK IEBR1: BANK Position */ -#define ERRBNK_IEBR1_BANK_Msk (0x1UL << ERRBNK_IEBR1_BANK_Pos) /*!< ERRBNK IEBR1: BANK Mask */ - -#define ERRBNK_IEBR1_LOCATION_Pos 2U /*!< ERRBNK IEBR1: LOCATION Position */ -#define ERRBNK_IEBR1_LOCATION_Msk (0x3FFFUL << ERRBNK_IEBR1_LOCATION_Pos) /*!< ERRBNK IEBR1: LOCATION Mask */ - -#define ERRBNK_IEBR1_LOCKED_Pos 1U /*!< ERRBNK IEBR1: LOCKED Position */ -#define ERRBNK_IEBR1_LOCKED_Msk (0x1UL << ERRBNK_IEBR1_LOCKED_Pos) /*!< ERRBNK IEBR1: LOCKED Mask */ - -#define ERRBNK_IEBR1_VALID_Pos 0U /*!< ERRBNK IEBR1: VALID Position */ -#define ERRBNK_IEBR1_VALID_Msk (0x1UL << /*ERRBNK_IEBR1_VALID_Pos*/) /*!< ERRBNK IEBR1: VALID Mask */ - -/* ERRBNK Data Cache Error Bank Register 0 (DEBR0) Register Definitions */ -#define ERRBNK_DEBR0_SWDEF_Pos 30U /*!< ERRBNK DEBR0: SWDEF Position */ -#define ERRBNK_DEBR0_SWDEF_Msk (0x3UL << ERRBNK_DEBR0_SWDEF_Pos) /*!< ERRBNK DEBR0: SWDEF Mask */ - -#define ERRBNK_DEBR0_TYPE_Pos 17U /*!< ERRBNK DEBR0: TYPE Position */ -#define ERRBNK_DEBR0_TYPE_Msk (0x1UL << ERRBNK_DEBR0_TYPE_Pos) /*!< ERRBNK DEBR0: TYPE Mask */ - -#define ERRBNK_DEBR0_BANK_Pos 16U /*!< ERRBNK DEBR0: BANK Position */ -#define ERRBNK_DEBR0_BANK_Msk (0x1UL << ERRBNK_DEBR0_BANK_Pos) /*!< ERRBNK DEBR0: BANK Mask */ - -#define ERRBNK_DEBR0_LOCATION_Pos 2U /*!< ERRBNK DEBR0: LOCATION Position */ -#define ERRBNK_DEBR0_LOCATION_Msk (0x3FFFUL << ERRBNK_DEBR0_LOCATION_Pos) /*!< ERRBNK DEBR0: LOCATION Mask */ - -#define ERRBNK_DEBR0_LOCKED_Pos 1U /*!< ERRBNK DEBR0: LOCKED Position */ -#define ERRBNK_DEBR0_LOCKED_Msk (0x1UL << ERRBNK_DEBR0_LOCKED_Pos) /*!< ERRBNK DEBR0: LOCKED Mask */ - -#define ERRBNK_DEBR0_VALID_Pos 0U /*!< ERRBNK DEBR0: VALID Position */ -#define ERRBNK_DEBR0_VALID_Msk (0x1UL << /*ERRBNK_DEBR0_VALID_Pos*/) /*!< ERRBNK DEBR0: VALID Mask */ - -/* ERRBNK Data Cache Error Bank Register 1 (DEBR1) Register Definitions */ -#define ERRBNK_DEBR1_SWDEF_Pos 30U /*!< ERRBNK DEBR1: SWDEF Position */ -#define ERRBNK_DEBR1_SWDEF_Msk (0x3UL << ERRBNK_DEBR1_SWDEF_Pos) /*!< ERRBNK DEBR1: SWDEF Mask */ - -#define ERRBNK_DEBR1_TYPE_Pos 17U /*!< ERRBNK DEBR1: TYPE Position */ -#define ERRBNK_DEBR1_TYPE_Msk (0x1UL << ERRBNK_DEBR1_TYPE_Pos) /*!< ERRBNK DEBR1: TYPE Mask */ - -#define ERRBNK_DEBR1_BANK_Pos 16U /*!< ERRBNK DEBR1: BANK Position */ -#define ERRBNK_DEBR1_BANK_Msk (0x1UL << ERRBNK_DEBR1_BANK_Pos) /*!< ERRBNK DEBR1: BANK Mask */ - -#define ERRBNK_DEBR1_LOCATION_Pos 2U /*!< ERRBNK DEBR1: LOCATION Position */ -#define ERRBNK_DEBR1_LOCATION_Msk (0x3FFFUL << ERRBNK_DEBR1_LOCATION_Pos) /*!< ERRBNK DEBR1: LOCATION Mask */ - -#define ERRBNK_DEBR1_LOCKED_Pos 1U /*!< ERRBNK DEBR1: LOCKED Position */ -#define ERRBNK_DEBR1_LOCKED_Msk (0x1UL << ERRBNK_DEBR1_LOCKED_Pos) /*!< ERRBNK DEBR1: LOCKED Mask */ - -#define ERRBNK_DEBR1_VALID_Pos 0U /*!< ERRBNK DEBR1: VALID Position */ -#define ERRBNK_DEBR1_VALID_Msk (0x1UL << /*ERRBNK_DEBR1_VALID_Pos*/) /*!< ERRBNK DEBR1: VALID Mask */ - -/* ERRBNK TCM Error Bank Register 0 (TEBR0) Register Definitions */ -#define ERRBNK_TEBR0_SWDEF_Pos 30U /*!< ERRBNK TEBR0: SWDEF Position */ -#define ERRBNK_TEBR0_SWDEF_Msk (0x3UL << ERRBNK_TEBR0_SWDEF_Pos) /*!< ERRBNK TEBR0: SWDEF Mask */ - -#define ERRBNK_TEBR0_POISON_Pos 28U /*!< ERRBNK TEBR0: POISON Position */ -#define ERRBNK_TEBR0_POISON_Msk (0x1UL << ERRBNK_TEBR0_POISON_Pos) /*!< ERRBNK TEBR0: POISON Mask */ - -#define ERRBNK_TEBR0_TYPE_Pos 27U /*!< ERRBNK TEBR0: TYPE Position */ -#define ERRBNK_TEBR0_TYPE_Msk (0x1UL << ERRBNK_TEBR0_TYPE_Pos) /*!< ERRBNK TEBR0: TYPE Mask */ - -#define ERRBNK_TEBR0_BANK_Pos 24U /*!< ERRBNK TEBR0: BANK Position */ -#define ERRBNK_TEBR0_BANK_Msk (0x3UL << ERRBNK_TEBR0_BANK_Pos) /*!< ERRBNK TEBR0: BANK Mask */ - -#define ERRBNK_TEBR0_LOCATION_Pos 2U /*!< ERRBNK TEBR0: LOCATION Position */ -#define ERRBNK_TEBR0_LOCATION_Msk (0x3FFFFFUL << ERRBNK_TEBR0_LOCATION_Pos) /*!< ERRBNK TEBR0: LOCATION Mask */ - -#define ERRBNK_TEBR0_LOCKED_Pos 1U /*!< ERRBNK TEBR0: LOCKED Position */ -#define ERRBNK_TEBR0_LOCKED_Msk (0x1UL << ERRBNK_TEBR0_LOCKED_Pos) /*!< ERRBNK TEBR0: LOCKED Mask */ - -#define ERRBNK_TEBR0_VALID_Pos 0U /*!< ERRBNK TEBR0: VALID Position */ -#define ERRBNK_TEBR0_VALID_Msk (0x1UL << /*ERRBNK_TEBR0_VALID_Pos*/) /*!< ERRBNK TEBR0: VALID Mask */ - -/* ERRBNK TCM Error Bank Register 1 (TEBR1) Register Definitions */ -#define ERRBNK_TEBR1_SWDEF_Pos 30U /*!< ERRBNK TEBR1: SWDEF Position */ -#define ERRBNK_TEBR1_SWDEF_Msk (0x3UL << ERRBNK_TEBR1_SWDEF_Pos) /*!< ERRBNK TEBR1: SWDEF Mask */ - -#define ERRBNK_TEBR1_POISON_Pos 28U /*!< ERRBNK TEBR1: POISON Position */ -#define ERRBNK_TEBR1_POISON_Msk (0x1UL << ERRBNK_TEBR1_POISON_Pos) /*!< ERRBNK TEBR1: POISON Mask */ - -#define ERRBNK_TEBR1_TYPE_Pos 27U /*!< ERRBNK TEBR1: TYPE Position */ -#define ERRBNK_TEBR1_TYPE_Msk (0x1UL << ERRBNK_TEBR1_TYPE_Pos) /*!< ERRBNK TEBR1: TYPE Mask */ - -#define ERRBNK_TEBR1_BANK_Pos 24U /*!< ERRBNK TEBR1: BANK Position */ -#define ERRBNK_TEBR1_BANK_Msk (0x3UL << ERRBNK_TEBR1_BANK_Pos) /*!< ERRBNK TEBR1: BANK Mask */ - -#define ERRBNK_TEBR1_LOCATION_Pos 2U /*!< ERRBNK TEBR1: LOCATION Position */ -#define ERRBNK_TEBR1_LOCATION_Msk (0x3FFFFFUL << ERRBNK_TEBR1_LOCATION_Pos) /*!< ERRBNK TEBR1: LOCATION Mask */ - -#define ERRBNK_TEBR1_LOCKED_Pos 1U /*!< ERRBNK TEBR1: LOCKED Position */ -#define ERRBNK_TEBR1_LOCKED_Msk (0x1UL << ERRBNK_TEBR1_LOCKED_Pos) /*!< ERRBNK TEBR1: LOCKED Mask */ - -#define ERRBNK_TEBR1_VALID_Pos 0U /*!< ERRBNK TEBR1: VALID Position */ -#define ERRBNK_TEBR1_VALID_Msk (0x1UL << /*ERRBNK_TEBR1_VALID_Pos*/) /*!< ERRBNK TEBR1: VALID Mask */ - -/*@}*/ /* end of group ErrBnk_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup PrcCfgInf_Type Processor Configuration Information Registers (IMPLEMENTATION DEFINED) - \brief Type definitions for the Processor Configuration Information Registerss (PRCCFGINF) - @{ - */ - -/** - \brief Structure type to access the Processor Configuration Information Registerss (PRCCFGINF). - */ -typedef struct -{ - __OM uint32_t CFGINFOSEL; /*!< Offset: 0x000 ( /W) Processor Configuration Information Selection Register */ - __IM uint32_t CFGINFORD; /*!< Offset: 0x004 (R/ ) Processor Configuration Information Read Data Register */ -} PrcCfgInf_Type; - -/* PRCCFGINF Processor Configuration Information Selection Register (CFGINFOSEL) Definitions */ - -/* PRCCFGINF Processor Configuration Information Read Data Register (CFGINFORD) Definitions */ - -/*@}*/ /* end of group PrcCfgInf_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup STL_Type Software Test Library Observation Registers - \brief Type definitions for the Software Test Library Observation Registerss (STL) - @{ - */ - -/** - \brief Structure type to access the Software Test Library Observation Registerss (STL). - */ -typedef struct -{ - __IM uint32_t STLNVICPENDOR; /*!< Offset: 0x000 (R/ ) NVIC Pending Priority Tree Register */ - __IM uint32_t STLNVICACTVOR; /*!< Offset: 0x004 (R/ ) NVIC Active Priority Tree Register */ - uint32_t RESERVED0[2U]; - __OM uint32_t STLIDMPUSR; /*!< Offset: 0x010 ( /W) MPU Sanple Register */ - __IM uint32_t STLIMPUOR; /*!< Offset: 0x014 (R/ ) MPU Region Hit Register */ - __IM uint32_t STLD0MPUOR; /*!< Offset: 0x018 (R/ ) MPU Memory Attributes Register 0 */ - __IM uint32_t STLD1MPUOR; /*!< Offset: 0x01C (R/ ) MPU Memory Attributes Register 1 */ - -} STL_Type; - -/* STL Software Test Library Observation Register (STLNVICPENDOR) Definitions */ -#define STL_STLNVICPENDOR_VALID_Pos 18U /*!< STL STLNVICPENDOR: VALID Position */ -#define STL_STLNVICPENDOR_VALID_Msk (0x1UL << STL_STLNVICPENDOR_VALID_Pos) /*!< STL STLNVICPENDOR: VALID Mask */ - -#define STL_STLNVICPENDOR_TARGET_Pos 17U /*!< STL STLNVICPENDOR: TARGET Position */ -#define STL_STLNVICPENDOR_TARGET_Msk (0x1UL << STL_STLNVICPENDOR_TARGET_Pos) /*!< STL STLNVICPENDOR: TARGET Mask */ - -#define STL_STLNVICPENDOR_PRIORITY_Pos 9U /*!< STL STLNVICPENDOR: PRIORITY Position */ -#define STL_STLNVICPENDOR_PRIORITY_Msk (0xFFUL << STL_STLNVICPENDOR_PRIORITY_Pos) /*!< STL STLNVICPENDOR: PRIORITY Mask */ - -#define STL_STLNVICPENDOR_INTNUM_Pos 0U /*!< STL STLNVICPENDOR: INTNUM Position */ -#define STL_STLNVICPENDOR_INTNUM_Msk (0x1FFUL /*<< STL_STLNVICPENDOR_INTNUM_Pos*/) /*!< STL STLNVICPENDOR: INTNUM Mask */ - -/* STL Software Test Library Observation Register (STLNVICACTVOR) Definitions */ -#define STL_STLNVICACTVOR_VALID_Pos 18U /*!< STL STLNVICACTVOR: VALID Position */ -#define STL_STLNVICACTVOR_VALID_Msk (0x1UL << STL_STLNVICACTVOR_VALID_Pos) /*!< STL STLNVICACTVOR: VALID Mask */ - -#define STL_STLNVICACTVOR_TARGET_Pos 17U /*!< STL STLNVICACTVOR: TARGET Position */ -#define STL_STLNVICACTVOR_TARGET_Msk (0x1UL << STL_STLNVICACTVOR_TARGET_Pos) /*!< STL STLNVICACTVOR: TARGET Mask */ - -#define STL_STLNVICACTVOR_PRIORITY_Pos 9U /*!< STL STLNVICACTVOR: PRIORITY Position */ -#define STL_STLNVICACTVOR_PRIORITY_Msk (0xFFUL << STL_STLNVICACTVOR_PRIORITY_Pos) /*!< STL STLNVICACTVOR: PRIORITY Mask */ - -#define STL_STLNVICACTVOR_INTNUM_Pos 0U /*!< STL STLNVICACTVOR: INTNUM Position */ -#define STL_STLNVICACTVOR_INTNUM_Msk (0x1FFUL /*<< STL_STLNVICACTVOR_INTNUM_Pos*/) /*!< STL STLNVICACTVOR: INTNUM Mask */ - -/* STL Software Test Library Observation Register (STLIDMPUSR) Definitions */ -#define STL_STLIDMPUSR_ADDR_Pos 5U /*!< STL STLIDMPUSR: ADDR Position */ -#define STL_STLIDMPUSR_ADDR_Msk (0x7FFFFFFUL << STL_STLIDMPUSR_ADDR_Pos) /*!< STL STLIDMPUSR: ADDR Mask */ - -#define STL_STLIDMPUSR_INSTR_Pos 2U /*!< STL STLIDMPUSR: INSTR Position */ -#define STL_STLIDMPUSR_INSTR_Msk (0x1UL << STL_STLIDMPUSR_INSTR_Pos) /*!< STL STLIDMPUSR: INSTR Mask */ - -#define STL_STLIDMPUSR_DATA_Pos 1U /*!< STL STLIDMPUSR: DATA Position */ -#define STL_STLIDMPUSR_DATA_Msk (0x1UL << STL_STLIDMPUSR_DATA_Pos) /*!< STL STLIDMPUSR: DATA Mask */ - -/* STL Software Test Library Observation Register (STLIMPUOR) Definitions */ -#define STL_STLIMPUOR_HITREGION_Pos 9U /*!< STL STLIMPUOR: HITREGION Position */ -#define STL_STLIMPUOR_HITREGION_Msk (0xFFUL << STL_STLIMPUOR_HITREGION_Pos) /*!< STL STLIMPUOR: HITREGION Mask */ - -#define STL_STLIMPUOR_ATTR_Pos 0U /*!< STL STLIMPUOR: ATTR Position */ -#define STL_STLIMPUOR_ATTR_Msk (0x1FFUL /*<< STL_STLIMPUOR_ATTR_Pos*/) /*!< STL STLIMPUOR: ATTR Mask */ - -/* STL Software Test Library Observation Register (STLD0MPUOR) Definitions */ -#define STL_STLD0MPUOR_HITREGION_Pos 9U /*!< STL STLD0MPUOR: HITREGION Position */ -#define STL_STLD0MPUOR_HITREGION_Msk (0xFFUL << STL_STLD0MPUOR_HITREGION_Pos) /*!< STL STLD0MPUOR: HITREGION Mask */ - -#define STL_STLD0MPUOR_ATTR_Pos 0U /*!< STL STLD0MPUOR: ATTR Position */ -#define STL_STLD0MPUOR_ATTR_Msk (0x1FFUL /*<< STL_STLD0MPUOR_ATTR_Pos*/) /*!< STL STLD0MPUOR: ATTR Mask */ - -/* STL Software Test Library Observation Register (STLD1MPUOR) Definitions */ -#define STL_STLD1MPUOR_HITREGION_Pos 9U /*!< STL STLD1MPUOR: HITREGION Position */ -#define STL_STLD1MPUOR_HITREGION_Msk (0xFFUL << STL_STLD1MPUOR_HITREGION_Pos) /*!< STL STLD1MPUOR: HITREGION Mask */ - -#define STL_STLD1MPUOR_ATTR_Pos 0U /*!< STL STLD1MPUOR: ATTR Position */ -#define STL_STLD1MPUOR_ATTR_Msk (0x1FFUL /*<< STL_STLD1MPUOR_ATTR_Pos*/) /*!< STL STLD1MPUOR: ATTR Mask */ - -/*@}*/ /* end of group STL_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ - uint32_t RESERVED3[809U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */ - uint32_t RESERVED4[4U]; - __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */ -#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ -#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ - -#define TPI_FFCR_EnFmt_Pos 0U /*!< TPI FFCR: EnFmt Position */ -#define TPI_FFCR_EnFmt_Msk (0x3UL << /*TPI_FFCR_EnFmt_Pos*/) /*!< TPI FFCR: EnFmt Mask */ - -/* TPI Periodic Synchronization Control Register Definitions */ -#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */ -#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */ - -/* TPI Software Lock Status Register Definitions */ -#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */ -#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */ - -#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */ -#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */ - -#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */ -#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */ -#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - -#if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_PMU Performance Monitoring Unit (PMU) - \brief Type definitions for the Performance Monitoring Unit (PMU) - @{ - */ - -/** - \brief Structure type to access the Performance Monitoring Unit (PMU). - */ -typedef struct -{ - __IOM uint32_t EVCNTR[__PMU_NUM_EVENTCNT]; /*!< Offset: 0x0 (R/W) PMU Event Counter Registers */ -#if __PMU_NUM_EVENTCNT<31 - uint32_t RESERVED0[31U-__PMU_NUM_EVENTCNT]; -#endif - __IOM uint32_t CCNTR; /*!< Offset: 0x7C (R/W) PMU Cycle Counter Register */ - uint32_t RESERVED1[224]; - __IOM uint32_t EVTYPER[__PMU_NUM_EVENTCNT]; /*!< Offset: 0x400 (R/W) PMU Event Type and Filter Registers */ -#if __PMU_NUM_EVENTCNT<31 - uint32_t RESERVED2[31U-__PMU_NUM_EVENTCNT]; -#endif - __IOM uint32_t CCFILTR; /*!< Offset: 0x47C (R/W) PMU Cycle Counter Filter Register */ - uint32_t RESERVED3[480]; - __IOM uint32_t CNTENSET; /*!< Offset: 0xC00 (R/W) PMU Count Enable Set Register */ - uint32_t RESERVED4[7]; - __IOM uint32_t CNTENCLR; /*!< Offset: 0xC20 (R/W) PMU Count Enable Clear Register */ - uint32_t RESERVED5[7]; - __IOM uint32_t INTENSET; /*!< Offset: 0xC40 (R/W) PMU Interrupt Enable Set Register */ - uint32_t RESERVED6[7]; - __IOM uint32_t INTENCLR; /*!< Offset: 0xC60 (R/W) PMU Interrupt Enable Clear Register */ - uint32_t RESERVED7[7]; - __IOM uint32_t OVSCLR; /*!< Offset: 0xC80 (R/W) PMU Overflow Flag Status Clear Register */ - uint32_t RESERVED8[7]; - __IOM uint32_t SWINC; /*!< Offset: 0xCA0 (R/W) PMU Software Increment Register */ - uint32_t RESERVED9[7]; - __IOM uint32_t OVSSET; /*!< Offset: 0xCC0 (R/W) PMU Overflow Flag Status Set Register */ - uint32_t RESERVED10[79]; - __IOM uint32_t TYPE; /*!< Offset: 0xE00 (R/W) PMU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0xE04 (R/W) PMU Control Register */ - uint32_t RESERVED11[108]; - __IOM uint32_t AUTHSTATUS; /*!< Offset: 0xFB8 (R/W) PMU Authentication Status Register */ - __IOM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/W) PMU Device Architecture Register */ - uint32_t RESERVED12[3]; - __IOM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/W) PMU Device Type Register */ - __IOM uint32_t PIDR4; /*!< Offset: 0xFD0 (R/W) PMU Peripheral Identification Register 4 */ - uint32_t RESERVED13[3]; - __IOM uint32_t PIDR0; /*!< Offset: 0xFE0 (R/W) PMU Peripheral Identification Register 0 */ - __IOM uint32_t PIDR1; /*!< Offset: 0xFE4 (R/W) PMU Peripheral Identification Register 1 */ - __IOM uint32_t PIDR2; /*!< Offset: 0xFE8 (R/W) PMU Peripheral Identification Register 2 */ - __IOM uint32_t PIDR3; /*!< Offset: 0xFEC (R/W) PMU Peripheral Identification Register 3 */ - __IOM uint32_t CIDR0; /*!< Offset: 0xFF0 (R/W) PMU Component Identification Register 0 */ - __IOM uint32_t CIDR1; /*!< Offset: 0xFF4 (R/W) PMU Component Identification Register 1 */ - __IOM uint32_t CIDR2; /*!< Offset: 0xFF8 (R/W) PMU Component Identification Register 2 */ - __IOM uint32_t CIDR3; /*!< Offset: 0xFFC (R/W) PMU Component Identification Register 3 */ -} PMU_Type; - -/** \brief PMU Event Counter Registers (0-30) Definitions */ - -#define PMU_EVCNTR_CNT_Pos 0U /*!< PMU EVCNTR: Counter Position */ -#define PMU_EVCNTR_CNT_Msk (0xFFFFUL /*<< PMU_EVCNTRx_CNT_Pos*/) /*!< PMU EVCNTR: Counter Mask */ - -/** \brief PMU Event Type and Filter Registers (0-30) Definitions */ - -#define PMU_EVTYPER_EVENTTOCNT_Pos 0U /*!< PMU EVTYPER: Event to Count Position */ -#define PMU_EVTYPER_EVENTTOCNT_Msk (0xFFFFUL /*<< EVTYPERx_EVENTTOCNT_Pos*/) /*!< PMU EVTYPER: Event to Count Mask */ - -/** \brief PMU Count Enable Set Register Definitions */ - -#define PMU_CNTENSET_CNT0_ENABLE_Pos 0U /*!< PMU CNTENSET: Event Counter 0 Enable Set Position */ -#define PMU_CNTENSET_CNT0_ENABLE_Msk (1UL /*<< PMU_CNTENSET_CNT0_ENABLE_Pos*/) /*!< PMU CNTENSET: Event Counter 0 Enable Set Mask */ - -#define PMU_CNTENSET_CNT1_ENABLE_Pos 1U /*!< PMU CNTENSET: Event Counter 1 Enable Set Position */ -#define PMU_CNTENSET_CNT1_ENABLE_Msk (1UL << PMU_CNTENSET_CNT1_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 1 Enable Set Mask */ - -#define PMU_CNTENSET_CNT2_ENABLE_Pos 2U /*!< PMU CNTENSET: Event Counter 2 Enable Set Position */ -#define PMU_CNTENSET_CNT2_ENABLE_Msk (1UL << PMU_CNTENSET_CNT2_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 2 Enable Set Mask */ - -#define PMU_CNTENSET_CNT3_ENABLE_Pos 3U /*!< PMU CNTENSET: Event Counter 3 Enable Set Position */ -#define PMU_CNTENSET_CNT3_ENABLE_Msk (1UL << PMU_CNTENSET_CNT3_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 3 Enable Set Mask */ - -#define PMU_CNTENSET_CNT4_ENABLE_Pos 4U /*!< PMU CNTENSET: Event Counter 4 Enable Set Position */ -#define PMU_CNTENSET_CNT4_ENABLE_Msk (1UL << PMU_CNTENSET_CNT4_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 4 Enable Set Mask */ - -#define PMU_CNTENSET_CNT5_ENABLE_Pos 5U /*!< PMU CNTENSET: Event Counter 5 Enable Set Position */ -#define PMU_CNTENSET_CNT5_ENABLE_Msk (1UL << PMU_CNTENSET_CNT5_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 5 Enable Set Mask */ - -#define PMU_CNTENSET_CNT6_ENABLE_Pos 6U /*!< PMU CNTENSET: Event Counter 6 Enable Set Position */ -#define PMU_CNTENSET_CNT6_ENABLE_Msk (1UL << PMU_CNTENSET_CNT6_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 6 Enable Set Mask */ - -#define PMU_CNTENSET_CNT7_ENABLE_Pos 7U /*!< PMU CNTENSET: Event Counter 7 Enable Set Position */ -#define PMU_CNTENSET_CNT7_ENABLE_Msk (1UL << PMU_CNTENSET_CNT7_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 7 Enable Set Mask */ - -#define PMU_CNTENSET_CNT8_ENABLE_Pos 8U /*!< PMU CNTENSET: Event Counter 8 Enable Set Position */ -#define PMU_CNTENSET_CNT8_ENABLE_Msk (1UL << PMU_CNTENSET_CNT8_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 8 Enable Set Mask */ - -#define PMU_CNTENSET_CNT9_ENABLE_Pos 9U /*!< PMU CNTENSET: Event Counter 9 Enable Set Position */ -#define PMU_CNTENSET_CNT9_ENABLE_Msk (1UL << PMU_CNTENSET_CNT9_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 9 Enable Set Mask */ - -#define PMU_CNTENSET_CNT10_ENABLE_Pos 10U /*!< PMU CNTENSET: Event Counter 10 Enable Set Position */ -#define PMU_CNTENSET_CNT10_ENABLE_Msk (1UL << PMU_CNTENSET_CNT10_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 10 Enable Set Mask */ - -#define PMU_CNTENSET_CNT11_ENABLE_Pos 11U /*!< PMU CNTENSET: Event Counter 11 Enable Set Position */ -#define PMU_CNTENSET_CNT11_ENABLE_Msk (1UL << PMU_CNTENSET_CNT11_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 11 Enable Set Mask */ - -#define PMU_CNTENSET_CNT12_ENABLE_Pos 12U /*!< PMU CNTENSET: Event Counter 12 Enable Set Position */ -#define PMU_CNTENSET_CNT12_ENABLE_Msk (1UL << PMU_CNTENSET_CNT12_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 12 Enable Set Mask */ - -#define PMU_CNTENSET_CNT13_ENABLE_Pos 13U /*!< PMU CNTENSET: Event Counter 13 Enable Set Position */ -#define PMU_CNTENSET_CNT13_ENABLE_Msk (1UL << PMU_CNTENSET_CNT13_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 13 Enable Set Mask */ - -#define PMU_CNTENSET_CNT14_ENABLE_Pos 14U /*!< PMU CNTENSET: Event Counter 14 Enable Set Position */ -#define PMU_CNTENSET_CNT14_ENABLE_Msk (1UL << PMU_CNTENSET_CNT14_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 14 Enable Set Mask */ - -#define PMU_CNTENSET_CNT15_ENABLE_Pos 15U /*!< PMU CNTENSET: Event Counter 15 Enable Set Position */ -#define PMU_CNTENSET_CNT15_ENABLE_Msk (1UL << PMU_CNTENSET_CNT15_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 15 Enable Set Mask */ - -#define PMU_CNTENSET_CNT16_ENABLE_Pos 16U /*!< PMU CNTENSET: Event Counter 16 Enable Set Position */ -#define PMU_CNTENSET_CNT16_ENABLE_Msk (1UL << PMU_CNTENSET_CNT16_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 16 Enable Set Mask */ - -#define PMU_CNTENSET_CNT17_ENABLE_Pos 17U /*!< PMU CNTENSET: Event Counter 17 Enable Set Position */ -#define PMU_CNTENSET_CNT17_ENABLE_Msk (1UL << PMU_CNTENSET_CNT17_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 17 Enable Set Mask */ - -#define PMU_CNTENSET_CNT18_ENABLE_Pos 18U /*!< PMU CNTENSET: Event Counter 18 Enable Set Position */ -#define PMU_CNTENSET_CNT18_ENABLE_Msk (1UL << PMU_CNTENSET_CNT18_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 18 Enable Set Mask */ - -#define PMU_CNTENSET_CNT19_ENABLE_Pos 19U /*!< PMU CNTENSET: Event Counter 19 Enable Set Position */ -#define PMU_CNTENSET_CNT19_ENABLE_Msk (1UL << PMU_CNTENSET_CNT19_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 19 Enable Set Mask */ - -#define PMU_CNTENSET_CNT20_ENABLE_Pos 20U /*!< PMU CNTENSET: Event Counter 20 Enable Set Position */ -#define PMU_CNTENSET_CNT20_ENABLE_Msk (1UL << PMU_CNTENSET_CNT20_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 20 Enable Set Mask */ - -#define PMU_CNTENSET_CNT21_ENABLE_Pos 21U /*!< PMU CNTENSET: Event Counter 21 Enable Set Position */ -#define PMU_CNTENSET_CNT21_ENABLE_Msk (1UL << PMU_CNTENSET_CNT21_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 21 Enable Set Mask */ - -#define PMU_CNTENSET_CNT22_ENABLE_Pos 22U /*!< PMU CNTENSET: Event Counter 22 Enable Set Position */ -#define PMU_CNTENSET_CNT22_ENABLE_Msk (1UL << PMU_CNTENSET_CNT22_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 22 Enable Set Mask */ - -#define PMU_CNTENSET_CNT23_ENABLE_Pos 23U /*!< PMU CNTENSET: Event Counter 23 Enable Set Position */ -#define PMU_CNTENSET_CNT23_ENABLE_Msk (1UL << PMU_CNTENSET_CNT23_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 23 Enable Set Mask */ - -#define PMU_CNTENSET_CNT24_ENABLE_Pos 24U /*!< PMU CNTENSET: Event Counter 24 Enable Set Position */ -#define PMU_CNTENSET_CNT24_ENABLE_Msk (1UL << PMU_CNTENSET_CNT24_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 24 Enable Set Mask */ - -#define PMU_CNTENSET_CNT25_ENABLE_Pos 25U /*!< PMU CNTENSET: Event Counter 25 Enable Set Position */ -#define PMU_CNTENSET_CNT25_ENABLE_Msk (1UL << PMU_CNTENSET_CNT25_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 25 Enable Set Mask */ - -#define PMU_CNTENSET_CNT26_ENABLE_Pos 26U /*!< PMU CNTENSET: Event Counter 26 Enable Set Position */ -#define PMU_CNTENSET_CNT26_ENABLE_Msk (1UL << PMU_CNTENSET_CNT26_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 26 Enable Set Mask */ - -#define PMU_CNTENSET_CNT27_ENABLE_Pos 27U /*!< PMU CNTENSET: Event Counter 27 Enable Set Position */ -#define PMU_CNTENSET_CNT27_ENABLE_Msk (1UL << PMU_CNTENSET_CNT27_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 27 Enable Set Mask */ - -#define PMU_CNTENSET_CNT28_ENABLE_Pos 28U /*!< PMU CNTENSET: Event Counter 28 Enable Set Position */ -#define PMU_CNTENSET_CNT28_ENABLE_Msk (1UL << PMU_CNTENSET_CNT28_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 28 Enable Set Mask */ - -#define PMU_CNTENSET_CNT29_ENABLE_Pos 29U /*!< PMU CNTENSET: Event Counter 29 Enable Set Position */ -#define PMU_CNTENSET_CNT29_ENABLE_Msk (1UL << PMU_CNTENSET_CNT29_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 29 Enable Set Mask */ - -#define PMU_CNTENSET_CNT30_ENABLE_Pos 30U /*!< PMU CNTENSET: Event Counter 30 Enable Set Position */ -#define PMU_CNTENSET_CNT30_ENABLE_Msk (1UL << PMU_CNTENSET_CNT30_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 30 Enable Set Mask */ - -#define PMU_CNTENSET_CCNTR_ENABLE_Pos 31U /*!< PMU CNTENSET: Cycle Counter Enable Set Position */ -#define PMU_CNTENSET_CCNTR_ENABLE_Msk (1UL << PMU_CNTENSET_CCNTR_ENABLE_Pos) /*!< PMU CNTENSET: Cycle Counter Enable Set Mask */ - -/** \brief PMU Count Enable Clear Register Definitions */ - -#define PMU_CNTENSET_CNT0_ENABLE_Pos 0U /*!< PMU CNTENCLR: Event Counter 0 Enable Clear Position */ -#define PMU_CNTENCLR_CNT0_ENABLE_Msk (1UL /*<< PMU_CNTENCLR_CNT0_ENABLE_Pos*/) /*!< PMU CNTENCLR: Event Counter 0 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT1_ENABLE_Pos 1U /*!< PMU CNTENCLR: Event Counter 1 Enable Clear Position */ -#define PMU_CNTENCLR_CNT1_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT1_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 1 Enable Clear */ - -#define PMU_CNTENCLR_CNT2_ENABLE_Pos 2U /*!< PMU CNTENCLR: Event Counter 2 Enable Clear Position */ -#define PMU_CNTENCLR_CNT2_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT2_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 2 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT3_ENABLE_Pos 3U /*!< PMU CNTENCLR: Event Counter 3 Enable Clear Position */ -#define PMU_CNTENCLR_CNT3_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT3_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 3 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT4_ENABLE_Pos 4U /*!< PMU CNTENCLR: Event Counter 4 Enable Clear Position */ -#define PMU_CNTENCLR_CNT4_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT4_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 4 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT5_ENABLE_Pos 5U /*!< PMU CNTENCLR: Event Counter 5 Enable Clear Position */ -#define PMU_CNTENCLR_CNT5_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT5_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 5 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT6_ENABLE_Pos 6U /*!< PMU CNTENCLR: Event Counter 6 Enable Clear Position */ -#define PMU_CNTENCLR_CNT6_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT6_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 6 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT7_ENABLE_Pos 7U /*!< PMU CNTENCLR: Event Counter 7 Enable Clear Position */ -#define PMU_CNTENCLR_CNT7_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT7_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 7 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT8_ENABLE_Pos 8U /*!< PMU CNTENCLR: Event Counter 8 Enable Clear Position */ -#define PMU_CNTENCLR_CNT8_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT8_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 8 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT9_ENABLE_Pos 9U /*!< PMU CNTENCLR: Event Counter 9 Enable Clear Position */ -#define PMU_CNTENCLR_CNT9_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT9_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 9 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT10_ENABLE_Pos 10U /*!< PMU CNTENCLR: Event Counter 10 Enable Clear Position */ -#define PMU_CNTENCLR_CNT10_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT10_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 10 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT11_ENABLE_Pos 11U /*!< PMU CNTENCLR: Event Counter 11 Enable Clear Position */ -#define PMU_CNTENCLR_CNT11_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT11_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 11 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT12_ENABLE_Pos 12U /*!< PMU CNTENCLR: Event Counter 12 Enable Clear Position */ -#define PMU_CNTENCLR_CNT12_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT12_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 12 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT13_ENABLE_Pos 13U /*!< PMU CNTENCLR: Event Counter 13 Enable Clear Position */ -#define PMU_CNTENCLR_CNT13_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT13_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 13 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT14_ENABLE_Pos 14U /*!< PMU CNTENCLR: Event Counter 14 Enable Clear Position */ -#define PMU_CNTENCLR_CNT14_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT14_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 14 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT15_ENABLE_Pos 15U /*!< PMU CNTENCLR: Event Counter 15 Enable Clear Position */ -#define PMU_CNTENCLR_CNT15_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT15_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 15 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT16_ENABLE_Pos 16U /*!< PMU CNTENCLR: Event Counter 16 Enable Clear Position */ -#define PMU_CNTENCLR_CNT16_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT16_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 16 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT17_ENABLE_Pos 17U /*!< PMU CNTENCLR: Event Counter 17 Enable Clear Position */ -#define PMU_CNTENCLR_CNT17_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT17_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 17 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT18_ENABLE_Pos 18U /*!< PMU CNTENCLR: Event Counter 18 Enable Clear Position */ -#define PMU_CNTENCLR_CNT18_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT18_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 18 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT19_ENABLE_Pos 19U /*!< PMU CNTENCLR: Event Counter 19 Enable Clear Position */ -#define PMU_CNTENCLR_CNT19_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT19_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 19 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT20_ENABLE_Pos 20U /*!< PMU CNTENCLR: Event Counter 20 Enable Clear Position */ -#define PMU_CNTENCLR_CNT20_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT20_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 20 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT21_ENABLE_Pos 21U /*!< PMU CNTENCLR: Event Counter 21 Enable Clear Position */ -#define PMU_CNTENCLR_CNT21_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT21_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 21 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT22_ENABLE_Pos 22U /*!< PMU CNTENCLR: Event Counter 22 Enable Clear Position */ -#define PMU_CNTENCLR_CNT22_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT22_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 22 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT23_ENABLE_Pos 23U /*!< PMU CNTENCLR: Event Counter 23 Enable Clear Position */ -#define PMU_CNTENCLR_CNT23_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT23_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 23 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT24_ENABLE_Pos 24U /*!< PMU CNTENCLR: Event Counter 24 Enable Clear Position */ -#define PMU_CNTENCLR_CNT24_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT24_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 24 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT25_ENABLE_Pos 25U /*!< PMU CNTENCLR: Event Counter 25 Enable Clear Position */ -#define PMU_CNTENCLR_CNT25_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT25_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 25 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT26_ENABLE_Pos 26U /*!< PMU CNTENCLR: Event Counter 26 Enable Clear Position */ -#define PMU_CNTENCLR_CNT26_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT26_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 26 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT27_ENABLE_Pos 27U /*!< PMU CNTENCLR: Event Counter 27 Enable Clear Position */ -#define PMU_CNTENCLR_CNT27_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT27_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 27 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT28_ENABLE_Pos 28U /*!< PMU CNTENCLR: Event Counter 28 Enable Clear Position */ -#define PMU_CNTENCLR_CNT28_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT28_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 28 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT29_ENABLE_Pos 29U /*!< PMU CNTENCLR: Event Counter 29 Enable Clear Position */ -#define PMU_CNTENCLR_CNT29_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT29_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 29 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT30_ENABLE_Pos 30U /*!< PMU CNTENCLR: Event Counter 30 Enable Clear Position */ -#define PMU_CNTENCLR_CNT30_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT30_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 30 Enable Clear Mask */ - -#define PMU_CNTENCLR_CCNTR_ENABLE_Pos 31U /*!< PMU CNTENCLR: Cycle Counter Enable Clear Position */ -#define PMU_CNTENCLR_CCNTR_ENABLE_Msk (1UL << PMU_CNTENCLR_CCNTR_ENABLE_Pos) /*!< PMU CNTENCLR: Cycle Counter Enable Clear Mask */ - -/** \brief PMU Interrupt Enable Set Register Definitions */ - -#define PMU_INTENSET_CNT0_ENABLE_Pos 0U /*!< PMU INTENSET: Event Counter 0 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT0_ENABLE_Msk (1UL /*<< PMU_INTENSET_CNT0_ENABLE_Pos*/) /*!< PMU INTENSET: Event Counter 0 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT1_ENABLE_Pos 1U /*!< PMU INTENSET: Event Counter 1 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT1_ENABLE_Msk (1UL << PMU_INTENSET_CNT1_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 1 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT2_ENABLE_Pos 2U /*!< PMU INTENSET: Event Counter 2 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT2_ENABLE_Msk (1UL << PMU_INTENSET_CNT2_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 2 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT3_ENABLE_Pos 3U /*!< PMU INTENSET: Event Counter 3 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT3_ENABLE_Msk (1UL << PMU_INTENSET_CNT3_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 3 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT4_ENABLE_Pos 4U /*!< PMU INTENSET: Event Counter 4 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT4_ENABLE_Msk (1UL << PMU_INTENSET_CNT4_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 4 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT5_ENABLE_Pos 5U /*!< PMU INTENSET: Event Counter 5 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT5_ENABLE_Msk (1UL << PMU_INTENSET_CNT5_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 5 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT6_ENABLE_Pos 6U /*!< PMU INTENSET: Event Counter 6 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT6_ENABLE_Msk (1UL << PMU_INTENSET_CNT6_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 6 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT7_ENABLE_Pos 7U /*!< PMU INTENSET: Event Counter 7 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT7_ENABLE_Msk (1UL << PMU_INTENSET_CNT7_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 7 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT8_ENABLE_Pos 8U /*!< PMU INTENSET: Event Counter 8 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT8_ENABLE_Msk (1UL << PMU_INTENSET_CNT8_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 8 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT9_ENABLE_Pos 9U /*!< PMU INTENSET: Event Counter 9 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT9_ENABLE_Msk (1UL << PMU_INTENSET_CNT9_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 9 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT10_ENABLE_Pos 10U /*!< PMU INTENSET: Event Counter 10 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT10_ENABLE_Msk (1UL << PMU_INTENSET_CNT10_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 10 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT11_ENABLE_Pos 11U /*!< PMU INTENSET: Event Counter 11 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT11_ENABLE_Msk (1UL << PMU_INTENSET_CNT11_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 11 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT12_ENABLE_Pos 12U /*!< PMU INTENSET: Event Counter 12 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT12_ENABLE_Msk (1UL << PMU_INTENSET_CNT12_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 12 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT13_ENABLE_Pos 13U /*!< PMU INTENSET: Event Counter 13 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT13_ENABLE_Msk (1UL << PMU_INTENSET_CNT13_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 13 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT14_ENABLE_Pos 14U /*!< PMU INTENSET: Event Counter 14 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT14_ENABLE_Msk (1UL << PMU_INTENSET_CNT14_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 14 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT15_ENABLE_Pos 15U /*!< PMU INTENSET: Event Counter 15 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT15_ENABLE_Msk (1UL << PMU_INTENSET_CNT15_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 15 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT16_ENABLE_Pos 16U /*!< PMU INTENSET: Event Counter 16 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT16_ENABLE_Msk (1UL << PMU_INTENSET_CNT16_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 16 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT17_ENABLE_Pos 17U /*!< PMU INTENSET: Event Counter 17 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT17_ENABLE_Msk (1UL << PMU_INTENSET_CNT17_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 17 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT18_ENABLE_Pos 18U /*!< PMU INTENSET: Event Counter 18 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT18_ENABLE_Msk (1UL << PMU_INTENSET_CNT18_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 18 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT19_ENABLE_Pos 19U /*!< PMU INTENSET: Event Counter 19 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT19_ENABLE_Msk (1UL << PMU_INTENSET_CNT19_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 19 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT20_ENABLE_Pos 20U /*!< PMU INTENSET: Event Counter 20 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT20_ENABLE_Msk (1UL << PMU_INTENSET_CNT20_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 20 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT21_ENABLE_Pos 21U /*!< PMU INTENSET: Event Counter 21 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT21_ENABLE_Msk (1UL << PMU_INTENSET_CNT21_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 21 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT22_ENABLE_Pos 22U /*!< PMU INTENSET: Event Counter 22 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT22_ENABLE_Msk (1UL << PMU_INTENSET_CNT22_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 22 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT23_ENABLE_Pos 23U /*!< PMU INTENSET: Event Counter 23 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT23_ENABLE_Msk (1UL << PMU_INTENSET_CNT23_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 23 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT24_ENABLE_Pos 24U /*!< PMU INTENSET: Event Counter 24 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT24_ENABLE_Msk (1UL << PMU_INTENSET_CNT24_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 24 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT25_ENABLE_Pos 25U /*!< PMU INTENSET: Event Counter 25 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT25_ENABLE_Msk (1UL << PMU_INTENSET_CNT25_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 25 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT26_ENABLE_Pos 26U /*!< PMU INTENSET: Event Counter 26 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT26_ENABLE_Msk (1UL << PMU_INTENSET_CNT26_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 26 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT27_ENABLE_Pos 27U /*!< PMU INTENSET: Event Counter 27 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT27_ENABLE_Msk (1UL << PMU_INTENSET_CNT27_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 27 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT28_ENABLE_Pos 28U /*!< PMU INTENSET: Event Counter 28 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT28_ENABLE_Msk (1UL << PMU_INTENSET_CNT28_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 28 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT29_ENABLE_Pos 29U /*!< PMU INTENSET: Event Counter 29 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT29_ENABLE_Msk (1UL << PMU_INTENSET_CNT29_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 29 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT30_ENABLE_Pos 30U /*!< PMU INTENSET: Event Counter 30 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT30_ENABLE_Msk (1UL << PMU_INTENSET_CNT30_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 30 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CYCCNT_ENABLE_Pos 31U /*!< PMU INTENSET: Cycle Counter Interrupt Enable Set Position */ -#define PMU_INTENSET_CCYCNT_ENABLE_Msk (1UL << PMU_INTENSET_CYCCNT_ENABLE_Pos) /*!< PMU INTENSET: Cycle Counter Interrupt Enable Set Mask */ - -/** \brief PMU Interrupt Enable Clear Register Definitions */ - -#define PMU_INTENSET_CNT0_ENABLE_Pos 0U /*!< PMU INTENCLR: Event Counter 0 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT0_ENABLE_Msk (1UL /*<< PMU_INTENCLR_CNT0_ENABLE_Pos*/) /*!< PMU INTENCLR: Event Counter 0 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT1_ENABLE_Pos 1U /*!< PMU INTENCLR: Event Counter 1 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT1_ENABLE_Msk (1UL << PMU_INTENCLR_CNT1_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 1 Interrupt Enable Clear */ - -#define PMU_INTENCLR_CNT2_ENABLE_Pos 2U /*!< PMU INTENCLR: Event Counter 2 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT2_ENABLE_Msk (1UL << PMU_INTENCLR_CNT2_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 2 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT3_ENABLE_Pos 3U /*!< PMU INTENCLR: Event Counter 3 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT3_ENABLE_Msk (1UL << PMU_INTENCLR_CNT3_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 3 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT4_ENABLE_Pos 4U /*!< PMU INTENCLR: Event Counter 4 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT4_ENABLE_Msk (1UL << PMU_INTENCLR_CNT4_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 4 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT5_ENABLE_Pos 5U /*!< PMU INTENCLR: Event Counter 5 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT5_ENABLE_Msk (1UL << PMU_INTENCLR_CNT5_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 5 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT6_ENABLE_Pos 6U /*!< PMU INTENCLR: Event Counter 6 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT6_ENABLE_Msk (1UL << PMU_INTENCLR_CNT6_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 6 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT7_ENABLE_Pos 7U /*!< PMU INTENCLR: Event Counter 7 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT7_ENABLE_Msk (1UL << PMU_INTENCLR_CNT7_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 7 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT8_ENABLE_Pos 8U /*!< PMU INTENCLR: Event Counter 8 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT8_ENABLE_Msk (1UL << PMU_INTENCLR_CNT8_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 8 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT9_ENABLE_Pos 9U /*!< PMU INTENCLR: Event Counter 9 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT9_ENABLE_Msk (1UL << PMU_INTENCLR_CNT9_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 9 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT10_ENABLE_Pos 10U /*!< PMU INTENCLR: Event Counter 10 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT10_ENABLE_Msk (1UL << PMU_INTENCLR_CNT10_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 10 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT11_ENABLE_Pos 11U /*!< PMU INTENCLR: Event Counter 11 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT11_ENABLE_Msk (1UL << PMU_INTENCLR_CNT11_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 11 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT12_ENABLE_Pos 12U /*!< PMU INTENCLR: Event Counter 12 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT12_ENABLE_Msk (1UL << PMU_INTENCLR_CNT12_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 12 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT13_ENABLE_Pos 13U /*!< PMU INTENCLR: Event Counter 13 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT13_ENABLE_Msk (1UL << PMU_INTENCLR_CNT13_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 13 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT14_ENABLE_Pos 14U /*!< PMU INTENCLR: Event Counter 14 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT14_ENABLE_Msk (1UL << PMU_INTENCLR_CNT14_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 14 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT15_ENABLE_Pos 15U /*!< PMU INTENCLR: Event Counter 15 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT15_ENABLE_Msk (1UL << PMU_INTENCLR_CNT15_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 15 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT16_ENABLE_Pos 16U /*!< PMU INTENCLR: Event Counter 16 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT16_ENABLE_Msk (1UL << PMU_INTENCLR_CNT16_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 16 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT17_ENABLE_Pos 17U /*!< PMU INTENCLR: Event Counter 17 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT17_ENABLE_Msk (1UL << PMU_INTENCLR_CNT17_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 17 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT18_ENABLE_Pos 18U /*!< PMU INTENCLR: Event Counter 18 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT18_ENABLE_Msk (1UL << PMU_INTENCLR_CNT18_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 18 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT19_ENABLE_Pos 19U /*!< PMU INTENCLR: Event Counter 19 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT19_ENABLE_Msk (1UL << PMU_INTENCLR_CNT19_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 19 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT20_ENABLE_Pos 20U /*!< PMU INTENCLR: Event Counter 20 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT20_ENABLE_Msk (1UL << PMU_INTENCLR_CNT20_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 20 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT21_ENABLE_Pos 21U /*!< PMU INTENCLR: Event Counter 21 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT21_ENABLE_Msk (1UL << PMU_INTENCLR_CNT21_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 21 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT22_ENABLE_Pos 22U /*!< PMU INTENCLR: Event Counter 22 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT22_ENABLE_Msk (1UL << PMU_INTENCLR_CNT22_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 22 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT23_ENABLE_Pos 23U /*!< PMU INTENCLR: Event Counter 23 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT23_ENABLE_Msk (1UL << PMU_INTENCLR_CNT23_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 23 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT24_ENABLE_Pos 24U /*!< PMU INTENCLR: Event Counter 24 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT24_ENABLE_Msk (1UL << PMU_INTENCLR_CNT24_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 24 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT25_ENABLE_Pos 25U /*!< PMU INTENCLR: Event Counter 25 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT25_ENABLE_Msk (1UL << PMU_INTENCLR_CNT25_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 25 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT26_ENABLE_Pos 26U /*!< PMU INTENCLR: Event Counter 26 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT26_ENABLE_Msk (1UL << PMU_INTENCLR_CNT26_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 26 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT27_ENABLE_Pos 27U /*!< PMU INTENCLR: Event Counter 27 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT27_ENABLE_Msk (1UL << PMU_INTENCLR_CNT27_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 27 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT28_ENABLE_Pos 28U /*!< PMU INTENCLR: Event Counter 28 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT28_ENABLE_Msk (1UL << PMU_INTENCLR_CNT28_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 28 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT29_ENABLE_Pos 29U /*!< PMU INTENCLR: Event Counter 29 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT29_ENABLE_Msk (1UL << PMU_INTENCLR_CNT29_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 29 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT30_ENABLE_Pos 30U /*!< PMU INTENCLR: Event Counter 30 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT30_ENABLE_Msk (1UL << PMU_INTENCLR_CNT30_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 30 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CYCCNT_ENABLE_Pos 31U /*!< PMU INTENCLR: Cycle Counter Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CYCCNT_ENABLE_Msk (1UL << PMU_INTENCLR_CYCCNT_ENABLE_Pos) /*!< PMU INTENCLR: Cycle Counter Interrupt Enable Clear Mask */ - -/** \brief PMU Overflow Flag Status Set Register Definitions */ - -#define PMU_OVSSET_CNT0_STATUS_Pos 0U /*!< PMU OVSSET: Event Counter 0 Overflow Set Position */ -#define PMU_OVSSET_CNT0_STATUS_Msk (1UL /*<< PMU_OVSSET_CNT0_STATUS_Pos*/) /*!< PMU OVSSET: Event Counter 0 Overflow Set Mask */ - -#define PMU_OVSSET_CNT1_STATUS_Pos 1U /*!< PMU OVSSET: Event Counter 1 Overflow Set Position */ -#define PMU_OVSSET_CNT1_STATUS_Msk (1UL << PMU_OVSSET_CNT1_STATUS_Pos) /*!< PMU OVSSET: Event Counter 1 Overflow Set Mask */ - -#define PMU_OVSSET_CNT2_STATUS_Pos 2U /*!< PMU OVSSET: Event Counter 2 Overflow Set Position */ -#define PMU_OVSSET_CNT2_STATUS_Msk (1UL << PMU_OVSSET_CNT2_STATUS_Pos) /*!< PMU OVSSET: Event Counter 2 Overflow Set Mask */ - -#define PMU_OVSSET_CNT3_STATUS_Pos 3U /*!< PMU OVSSET: Event Counter 3 Overflow Set Position */ -#define PMU_OVSSET_CNT3_STATUS_Msk (1UL << PMU_OVSSET_CNT3_STATUS_Pos) /*!< PMU OVSSET: Event Counter 3 Overflow Set Mask */ - -#define PMU_OVSSET_CNT4_STATUS_Pos 4U /*!< PMU OVSSET: Event Counter 4 Overflow Set Position */ -#define PMU_OVSSET_CNT4_STATUS_Msk (1UL << PMU_OVSSET_CNT4_STATUS_Pos) /*!< PMU OVSSET: Event Counter 4 Overflow Set Mask */ - -#define PMU_OVSSET_CNT5_STATUS_Pos 5U /*!< PMU OVSSET: Event Counter 5 Overflow Set Position */ -#define PMU_OVSSET_CNT5_STATUS_Msk (1UL << PMU_OVSSET_CNT5_STATUS_Pos) /*!< PMU OVSSET: Event Counter 5 Overflow Set Mask */ - -#define PMU_OVSSET_CNT6_STATUS_Pos 6U /*!< PMU OVSSET: Event Counter 6 Overflow Set Position */ -#define PMU_OVSSET_CNT6_STATUS_Msk (1UL << PMU_OVSSET_CNT6_STATUS_Pos) /*!< PMU OVSSET: Event Counter 6 Overflow Set Mask */ - -#define PMU_OVSSET_CNT7_STATUS_Pos 7U /*!< PMU OVSSET: Event Counter 7 Overflow Set Position */ -#define PMU_OVSSET_CNT7_STATUS_Msk (1UL << PMU_OVSSET_CNT7_STATUS_Pos) /*!< PMU OVSSET: Event Counter 7 Overflow Set Mask */ - -#define PMU_OVSSET_CNT8_STATUS_Pos 8U /*!< PMU OVSSET: Event Counter 8 Overflow Set Position */ -#define PMU_OVSSET_CNT8_STATUS_Msk (1UL << PMU_OVSSET_CNT8_STATUS_Pos) /*!< PMU OVSSET: Event Counter 8 Overflow Set Mask */ - -#define PMU_OVSSET_CNT9_STATUS_Pos 9U /*!< PMU OVSSET: Event Counter 9 Overflow Set Position */ -#define PMU_OVSSET_CNT9_STATUS_Msk (1UL << PMU_OVSSET_CNT9_STATUS_Pos) /*!< PMU OVSSET: Event Counter 9 Overflow Set Mask */ - -#define PMU_OVSSET_CNT10_STATUS_Pos 10U /*!< PMU OVSSET: Event Counter 10 Overflow Set Position */ -#define PMU_OVSSET_CNT10_STATUS_Msk (1UL << PMU_OVSSET_CNT10_STATUS_Pos) /*!< PMU OVSSET: Event Counter 10 Overflow Set Mask */ - -#define PMU_OVSSET_CNT11_STATUS_Pos 11U /*!< PMU OVSSET: Event Counter 11 Overflow Set Position */ -#define PMU_OVSSET_CNT11_STATUS_Msk (1UL << PMU_OVSSET_CNT11_STATUS_Pos) /*!< PMU OVSSET: Event Counter 11 Overflow Set Mask */ - -#define PMU_OVSSET_CNT12_STATUS_Pos 12U /*!< PMU OVSSET: Event Counter 12 Overflow Set Position */ -#define PMU_OVSSET_CNT12_STATUS_Msk (1UL << PMU_OVSSET_CNT12_STATUS_Pos) /*!< PMU OVSSET: Event Counter 12 Overflow Set Mask */ - -#define PMU_OVSSET_CNT13_STATUS_Pos 13U /*!< PMU OVSSET: Event Counter 13 Overflow Set Position */ -#define PMU_OVSSET_CNT13_STATUS_Msk (1UL << PMU_OVSSET_CNT13_STATUS_Pos) /*!< PMU OVSSET: Event Counter 13 Overflow Set Mask */ - -#define PMU_OVSSET_CNT14_STATUS_Pos 14U /*!< PMU OVSSET: Event Counter 14 Overflow Set Position */ -#define PMU_OVSSET_CNT14_STATUS_Msk (1UL << PMU_OVSSET_CNT14_STATUS_Pos) /*!< PMU OVSSET: Event Counter 14 Overflow Set Mask */ - -#define PMU_OVSSET_CNT15_STATUS_Pos 15U /*!< PMU OVSSET: Event Counter 15 Overflow Set Position */ -#define PMU_OVSSET_CNT15_STATUS_Msk (1UL << PMU_OVSSET_CNT15_STATUS_Pos) /*!< PMU OVSSET: Event Counter 15 Overflow Set Mask */ - -#define PMU_OVSSET_CNT16_STATUS_Pos 16U /*!< PMU OVSSET: Event Counter 16 Overflow Set Position */ -#define PMU_OVSSET_CNT16_STATUS_Msk (1UL << PMU_OVSSET_CNT16_STATUS_Pos) /*!< PMU OVSSET: Event Counter 16 Overflow Set Mask */ - -#define PMU_OVSSET_CNT17_STATUS_Pos 17U /*!< PMU OVSSET: Event Counter 17 Overflow Set Position */ -#define PMU_OVSSET_CNT17_STATUS_Msk (1UL << PMU_OVSSET_CNT17_STATUS_Pos) /*!< PMU OVSSET: Event Counter 17 Overflow Set Mask */ - -#define PMU_OVSSET_CNT18_STATUS_Pos 18U /*!< PMU OVSSET: Event Counter 18 Overflow Set Position */ -#define PMU_OVSSET_CNT18_STATUS_Msk (1UL << PMU_OVSSET_CNT18_STATUS_Pos) /*!< PMU OVSSET: Event Counter 18 Overflow Set Mask */ - -#define PMU_OVSSET_CNT19_STATUS_Pos 19U /*!< PMU OVSSET: Event Counter 19 Overflow Set Position */ -#define PMU_OVSSET_CNT19_STATUS_Msk (1UL << PMU_OVSSET_CNT19_STATUS_Pos) /*!< PMU OVSSET: Event Counter 19 Overflow Set Mask */ - -#define PMU_OVSSET_CNT20_STATUS_Pos 20U /*!< PMU OVSSET: Event Counter 20 Overflow Set Position */ -#define PMU_OVSSET_CNT20_STATUS_Msk (1UL << PMU_OVSSET_CNT20_STATUS_Pos) /*!< PMU OVSSET: Event Counter 20 Overflow Set Mask */ - -#define PMU_OVSSET_CNT21_STATUS_Pos 21U /*!< PMU OVSSET: Event Counter 21 Overflow Set Position */ -#define PMU_OVSSET_CNT21_STATUS_Msk (1UL << PMU_OVSSET_CNT21_STATUS_Pos) /*!< PMU OVSSET: Event Counter 21 Overflow Set Mask */ - -#define PMU_OVSSET_CNT22_STATUS_Pos 22U /*!< PMU OVSSET: Event Counter 22 Overflow Set Position */ -#define PMU_OVSSET_CNT22_STATUS_Msk (1UL << PMU_OVSSET_CNT22_STATUS_Pos) /*!< PMU OVSSET: Event Counter 22 Overflow Set Mask */ - -#define PMU_OVSSET_CNT23_STATUS_Pos 23U /*!< PMU OVSSET: Event Counter 23 Overflow Set Position */ -#define PMU_OVSSET_CNT23_STATUS_Msk (1UL << PMU_OVSSET_CNT23_STATUS_Pos) /*!< PMU OVSSET: Event Counter 23 Overflow Set Mask */ - -#define PMU_OVSSET_CNT24_STATUS_Pos 24U /*!< PMU OVSSET: Event Counter 24 Overflow Set Position */ -#define PMU_OVSSET_CNT24_STATUS_Msk (1UL << PMU_OVSSET_CNT24_STATUS_Pos) /*!< PMU OVSSET: Event Counter 24 Overflow Set Mask */ - -#define PMU_OVSSET_CNT25_STATUS_Pos 25U /*!< PMU OVSSET: Event Counter 25 Overflow Set Position */ -#define PMU_OVSSET_CNT25_STATUS_Msk (1UL << PMU_OVSSET_CNT25_STATUS_Pos) /*!< PMU OVSSET: Event Counter 25 Overflow Set Mask */ - -#define PMU_OVSSET_CNT26_STATUS_Pos 26U /*!< PMU OVSSET: Event Counter 26 Overflow Set Position */ -#define PMU_OVSSET_CNT26_STATUS_Msk (1UL << PMU_OVSSET_CNT26_STATUS_Pos) /*!< PMU OVSSET: Event Counter 26 Overflow Set Mask */ - -#define PMU_OVSSET_CNT27_STATUS_Pos 27U /*!< PMU OVSSET: Event Counter 27 Overflow Set Position */ -#define PMU_OVSSET_CNT27_STATUS_Msk (1UL << PMU_OVSSET_CNT27_STATUS_Pos) /*!< PMU OVSSET: Event Counter 27 Overflow Set Mask */ - -#define PMU_OVSSET_CNT28_STATUS_Pos 28U /*!< PMU OVSSET: Event Counter 28 Overflow Set Position */ -#define PMU_OVSSET_CNT28_STATUS_Msk (1UL << PMU_OVSSET_CNT28_STATUS_Pos) /*!< PMU OVSSET: Event Counter 28 Overflow Set Mask */ - -#define PMU_OVSSET_CNT29_STATUS_Pos 29U /*!< PMU OVSSET: Event Counter 29 Overflow Set Position */ -#define PMU_OVSSET_CNT29_STATUS_Msk (1UL << PMU_OVSSET_CNT29_STATUS_Pos) /*!< PMU OVSSET: Event Counter 29 Overflow Set Mask */ - -#define PMU_OVSSET_CNT30_STATUS_Pos 30U /*!< PMU OVSSET: Event Counter 30 Overflow Set Position */ -#define PMU_OVSSET_CNT30_STATUS_Msk (1UL << PMU_OVSSET_CNT30_STATUS_Pos) /*!< PMU OVSSET: Event Counter 30 Overflow Set Mask */ - -#define PMU_OVSSET_CYCCNT_STATUS_Pos 31U /*!< PMU OVSSET: Cycle Counter Overflow Set Position */ -#define PMU_OVSSET_CYCCNT_STATUS_Msk (1UL << PMU_OVSSET_CYCCNT_STATUS_Pos) /*!< PMU OVSSET: Cycle Counter Overflow Set Mask */ - -/** \brief PMU Overflow Flag Status Clear Register Definitions */ - -#define PMU_OVSCLR_CNT0_STATUS_Pos 0U /*!< PMU OVSCLR: Event Counter 0 Overflow Clear Position */ -#define PMU_OVSCLR_CNT0_STATUS_Msk (1UL /*<< PMU_OVSCLR_CNT0_STATUS_Pos*/) /*!< PMU OVSCLR: Event Counter 0 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT1_STATUS_Pos 1U /*!< PMU OVSCLR: Event Counter 1 Overflow Clear Position */ -#define PMU_OVSCLR_CNT1_STATUS_Msk (1UL << PMU_OVSCLR_CNT1_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 1 Overflow Clear */ - -#define PMU_OVSCLR_CNT2_STATUS_Pos 2U /*!< PMU OVSCLR: Event Counter 2 Overflow Clear Position */ -#define PMU_OVSCLR_CNT2_STATUS_Msk (1UL << PMU_OVSCLR_CNT2_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 2 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT3_STATUS_Pos 3U /*!< PMU OVSCLR: Event Counter 3 Overflow Clear Position */ -#define PMU_OVSCLR_CNT3_STATUS_Msk (1UL << PMU_OVSCLR_CNT3_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 3 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT4_STATUS_Pos 4U /*!< PMU OVSCLR: Event Counter 4 Overflow Clear Position */ -#define PMU_OVSCLR_CNT4_STATUS_Msk (1UL << PMU_OVSCLR_CNT4_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 4 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT5_STATUS_Pos 5U /*!< PMU OVSCLR: Event Counter 5 Overflow Clear Position */ -#define PMU_OVSCLR_CNT5_STATUS_Msk (1UL << PMU_OVSCLR_CNT5_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 5 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT6_STATUS_Pos 6U /*!< PMU OVSCLR: Event Counter 6 Overflow Clear Position */ -#define PMU_OVSCLR_CNT6_STATUS_Msk (1UL << PMU_OVSCLR_CNT6_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 6 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT7_STATUS_Pos 7U /*!< PMU OVSCLR: Event Counter 7 Overflow Clear Position */ -#define PMU_OVSCLR_CNT7_STATUS_Msk (1UL << PMU_OVSCLR_CNT7_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 7 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT8_STATUS_Pos 8U /*!< PMU OVSCLR: Event Counter 8 Overflow Clear Position */ -#define PMU_OVSCLR_CNT8_STATUS_Msk (1UL << PMU_OVSCLR_CNT8_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 8 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT9_STATUS_Pos 9U /*!< PMU OVSCLR: Event Counter 9 Overflow Clear Position */ -#define PMU_OVSCLR_CNT9_STATUS_Msk (1UL << PMU_OVSCLR_CNT9_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 9 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT10_STATUS_Pos 10U /*!< PMU OVSCLR: Event Counter 10 Overflow Clear Position */ -#define PMU_OVSCLR_CNT10_STATUS_Msk (1UL << PMU_OVSCLR_CNT10_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 10 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT11_STATUS_Pos 11U /*!< PMU OVSCLR: Event Counter 11 Overflow Clear Position */ -#define PMU_OVSCLR_CNT11_STATUS_Msk (1UL << PMU_OVSCLR_CNT11_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 11 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT12_STATUS_Pos 12U /*!< PMU OVSCLR: Event Counter 12 Overflow Clear Position */ -#define PMU_OVSCLR_CNT12_STATUS_Msk (1UL << PMU_OVSCLR_CNT12_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 12 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT13_STATUS_Pos 13U /*!< PMU OVSCLR: Event Counter 13 Overflow Clear Position */ -#define PMU_OVSCLR_CNT13_STATUS_Msk (1UL << PMU_OVSCLR_CNT13_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 13 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT14_STATUS_Pos 14U /*!< PMU OVSCLR: Event Counter 14 Overflow Clear Position */ -#define PMU_OVSCLR_CNT14_STATUS_Msk (1UL << PMU_OVSCLR_CNT14_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 14 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT15_STATUS_Pos 15U /*!< PMU OVSCLR: Event Counter 15 Overflow Clear Position */ -#define PMU_OVSCLR_CNT15_STATUS_Msk (1UL << PMU_OVSCLR_CNT15_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 15 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT16_STATUS_Pos 16U /*!< PMU OVSCLR: Event Counter 16 Overflow Clear Position */ -#define PMU_OVSCLR_CNT16_STATUS_Msk (1UL << PMU_OVSCLR_CNT16_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 16 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT17_STATUS_Pos 17U /*!< PMU OVSCLR: Event Counter 17 Overflow Clear Position */ -#define PMU_OVSCLR_CNT17_STATUS_Msk (1UL << PMU_OVSCLR_CNT17_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 17 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT18_STATUS_Pos 18U /*!< PMU OVSCLR: Event Counter 18 Overflow Clear Position */ -#define PMU_OVSCLR_CNT18_STATUS_Msk (1UL << PMU_OVSCLR_CNT18_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 18 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT19_STATUS_Pos 19U /*!< PMU OVSCLR: Event Counter 19 Overflow Clear Position */ -#define PMU_OVSCLR_CNT19_STATUS_Msk (1UL << PMU_OVSCLR_CNT19_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 19 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT20_STATUS_Pos 20U /*!< PMU OVSCLR: Event Counter 20 Overflow Clear Position */ -#define PMU_OVSCLR_CNT20_STATUS_Msk (1UL << PMU_OVSCLR_CNT20_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 20 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT21_STATUS_Pos 21U /*!< PMU OVSCLR: Event Counter 21 Overflow Clear Position */ -#define PMU_OVSCLR_CNT21_STATUS_Msk (1UL << PMU_OVSCLR_CNT21_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 21 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT22_STATUS_Pos 22U /*!< PMU OVSCLR: Event Counter 22 Overflow Clear Position */ -#define PMU_OVSCLR_CNT22_STATUS_Msk (1UL << PMU_OVSCLR_CNT22_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 22 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT23_STATUS_Pos 23U /*!< PMU OVSCLR: Event Counter 23 Overflow Clear Position */ -#define PMU_OVSCLR_CNT23_STATUS_Msk (1UL << PMU_OVSCLR_CNT23_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 23 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT24_STATUS_Pos 24U /*!< PMU OVSCLR: Event Counter 24 Overflow Clear Position */ -#define PMU_OVSCLR_CNT24_STATUS_Msk (1UL << PMU_OVSCLR_CNT24_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 24 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT25_STATUS_Pos 25U /*!< PMU OVSCLR: Event Counter 25 Overflow Clear Position */ -#define PMU_OVSCLR_CNT25_STATUS_Msk (1UL << PMU_OVSCLR_CNT25_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 25 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT26_STATUS_Pos 26U /*!< PMU OVSCLR: Event Counter 26 Overflow Clear Position */ -#define PMU_OVSCLR_CNT26_STATUS_Msk (1UL << PMU_OVSCLR_CNT26_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 26 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT27_STATUS_Pos 27U /*!< PMU OVSCLR: Event Counter 27 Overflow Clear Position */ -#define PMU_OVSCLR_CNT27_STATUS_Msk (1UL << PMU_OVSCLR_CNT27_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 27 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT28_STATUS_Pos 28U /*!< PMU OVSCLR: Event Counter 28 Overflow Clear Position */ -#define PMU_OVSCLR_CNT28_STATUS_Msk (1UL << PMU_OVSCLR_CNT28_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 28 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT29_STATUS_Pos 29U /*!< PMU OVSCLR: Event Counter 29 Overflow Clear Position */ -#define PMU_OVSCLR_CNT29_STATUS_Msk (1UL << PMU_OVSCLR_CNT29_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 29 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT30_STATUS_Pos 30U /*!< PMU OVSCLR: Event Counter 30 Overflow Clear Position */ -#define PMU_OVSCLR_CNT30_STATUS_Msk (1UL << PMU_OVSCLR_CNT30_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 30 Overflow Clear Mask */ - -#define PMU_OVSCLR_CYCCNT_STATUS_Pos 31U /*!< PMU OVSCLR: Cycle Counter Overflow Clear Position */ -#define PMU_OVSCLR_CYCCNT_STATUS_Msk (1UL << PMU_OVSCLR_CYCCNT_STATUS_Pos) /*!< PMU OVSCLR: Cycle Counter Overflow Clear Mask */ - -/** \brief PMU Software Increment Counter */ - -#define PMU_SWINC_CNT0_Pos 0U /*!< PMU SWINC: Event Counter 0 Software Increment Position */ -#define PMU_SWINC_CNT0_Msk (1UL /*<< PMU_SWINC_CNT0_Pos */) /*!< PMU SWINC: Event Counter 0 Software Increment Mask */ - -#define PMU_SWINC_CNT1_Pos 1U /*!< PMU SWINC: Event Counter 1 Software Increment Position */ -#define PMU_SWINC_CNT1_Msk (1UL << PMU_SWINC_CNT1_Pos) /*!< PMU SWINC: Event Counter 1 Software Increment Mask */ - -#define PMU_SWINC_CNT2_Pos 2U /*!< PMU SWINC: Event Counter 2 Software Increment Position */ -#define PMU_SWINC_CNT2_Msk (1UL << PMU_SWINC_CNT2_Pos) /*!< PMU SWINC: Event Counter 2 Software Increment Mask */ - -#define PMU_SWINC_CNT3_Pos 3U /*!< PMU SWINC: Event Counter 3 Software Increment Position */ -#define PMU_SWINC_CNT3_Msk (1UL << PMU_SWINC_CNT3_Pos) /*!< PMU SWINC: Event Counter 3 Software Increment Mask */ - -#define PMU_SWINC_CNT4_Pos 4U /*!< PMU SWINC: Event Counter 4 Software Increment Position */ -#define PMU_SWINC_CNT4_Msk (1UL << PMU_SWINC_CNT4_Pos) /*!< PMU SWINC: Event Counter 4 Software Increment Mask */ - -#define PMU_SWINC_CNT5_Pos 5U /*!< PMU SWINC: Event Counter 5 Software Increment Position */ -#define PMU_SWINC_CNT5_Msk (1UL << PMU_SWINC_CNT5_Pos) /*!< PMU SWINC: Event Counter 5 Software Increment Mask */ - -#define PMU_SWINC_CNT6_Pos 6U /*!< PMU SWINC: Event Counter 6 Software Increment Position */ -#define PMU_SWINC_CNT6_Msk (1UL << PMU_SWINC_CNT6_Pos) /*!< PMU SWINC: Event Counter 6 Software Increment Mask */ - -#define PMU_SWINC_CNT7_Pos 7U /*!< PMU SWINC: Event Counter 7 Software Increment Position */ -#define PMU_SWINC_CNT7_Msk (1UL << PMU_SWINC_CNT7_Pos) /*!< PMU SWINC: Event Counter 7 Software Increment Mask */ - -#define PMU_SWINC_CNT8_Pos 8U /*!< PMU SWINC: Event Counter 8 Software Increment Position */ -#define PMU_SWINC_CNT8_Msk (1UL << PMU_SWINC_CNT8_Pos) /*!< PMU SWINC: Event Counter 8 Software Increment Mask */ - -#define PMU_SWINC_CNT9_Pos 9U /*!< PMU SWINC: Event Counter 9 Software Increment Position */ -#define PMU_SWINC_CNT9_Msk (1UL << PMU_SWINC_CNT9_Pos) /*!< PMU SWINC: Event Counter 9 Software Increment Mask */ - -#define PMU_SWINC_CNT10_Pos 10U /*!< PMU SWINC: Event Counter 10 Software Increment Position */ -#define PMU_SWINC_CNT10_Msk (1UL << PMU_SWINC_CNT10_Pos) /*!< PMU SWINC: Event Counter 10 Software Increment Mask */ - -#define PMU_SWINC_CNT11_Pos 11U /*!< PMU SWINC: Event Counter 11 Software Increment Position */ -#define PMU_SWINC_CNT11_Msk (1UL << PMU_SWINC_CNT11_Pos) /*!< PMU SWINC: Event Counter 11 Software Increment Mask */ - -#define PMU_SWINC_CNT12_Pos 12U /*!< PMU SWINC: Event Counter 12 Software Increment Position */ -#define PMU_SWINC_CNT12_Msk (1UL << PMU_SWINC_CNT12_Pos) /*!< PMU SWINC: Event Counter 12 Software Increment Mask */ - -#define PMU_SWINC_CNT13_Pos 13U /*!< PMU SWINC: Event Counter 13 Software Increment Position */ -#define PMU_SWINC_CNT13_Msk (1UL << PMU_SWINC_CNT13_Pos) /*!< PMU SWINC: Event Counter 13 Software Increment Mask */ - -#define PMU_SWINC_CNT14_Pos 14U /*!< PMU SWINC: Event Counter 14 Software Increment Position */ -#define PMU_SWINC_CNT14_Msk (1UL << PMU_SWINC_CNT14_Pos) /*!< PMU SWINC: Event Counter 14 Software Increment Mask */ - -#define PMU_SWINC_CNT15_Pos 15U /*!< PMU SWINC: Event Counter 15 Software Increment Position */ -#define PMU_SWINC_CNT15_Msk (1UL << PMU_SWINC_CNT15_Pos) /*!< PMU SWINC: Event Counter 15 Software Increment Mask */ - -#define PMU_SWINC_CNT16_Pos 16U /*!< PMU SWINC: Event Counter 16 Software Increment Position */ -#define PMU_SWINC_CNT16_Msk (1UL << PMU_SWINC_CNT16_Pos) /*!< PMU SWINC: Event Counter 16 Software Increment Mask */ - -#define PMU_SWINC_CNT17_Pos 17U /*!< PMU SWINC: Event Counter 17 Software Increment Position */ -#define PMU_SWINC_CNT17_Msk (1UL << PMU_SWINC_CNT17_Pos) /*!< PMU SWINC: Event Counter 17 Software Increment Mask */ - -#define PMU_SWINC_CNT18_Pos 18U /*!< PMU SWINC: Event Counter 18 Software Increment Position */ -#define PMU_SWINC_CNT18_Msk (1UL << PMU_SWINC_CNT18_Pos) /*!< PMU SWINC: Event Counter 18 Software Increment Mask */ - -#define PMU_SWINC_CNT19_Pos 19U /*!< PMU SWINC: Event Counter 19 Software Increment Position */ -#define PMU_SWINC_CNT19_Msk (1UL << PMU_SWINC_CNT19_Pos) /*!< PMU SWINC: Event Counter 19 Software Increment Mask */ - -#define PMU_SWINC_CNT20_Pos 20U /*!< PMU SWINC: Event Counter 20 Software Increment Position */ -#define PMU_SWINC_CNT20_Msk (1UL << PMU_SWINC_CNT20_Pos) /*!< PMU SWINC: Event Counter 20 Software Increment Mask */ - -#define PMU_SWINC_CNT21_Pos 21U /*!< PMU SWINC: Event Counter 21 Software Increment Position */ -#define PMU_SWINC_CNT21_Msk (1UL << PMU_SWINC_CNT21_Pos) /*!< PMU SWINC: Event Counter 21 Software Increment Mask */ - -#define PMU_SWINC_CNT22_Pos 22U /*!< PMU SWINC: Event Counter 22 Software Increment Position */ -#define PMU_SWINC_CNT22_Msk (1UL << PMU_SWINC_CNT22_Pos) /*!< PMU SWINC: Event Counter 22 Software Increment Mask */ - -#define PMU_SWINC_CNT23_Pos 23U /*!< PMU SWINC: Event Counter 23 Software Increment Position */ -#define PMU_SWINC_CNT23_Msk (1UL << PMU_SWINC_CNT23_Pos) /*!< PMU SWINC: Event Counter 23 Software Increment Mask */ - -#define PMU_SWINC_CNT24_Pos 24U /*!< PMU SWINC: Event Counter 24 Software Increment Position */ -#define PMU_SWINC_CNT24_Msk (1UL << PMU_SWINC_CNT24_Pos) /*!< PMU SWINC: Event Counter 24 Software Increment Mask */ - -#define PMU_SWINC_CNT25_Pos 25U /*!< PMU SWINC: Event Counter 25 Software Increment Position */ -#define PMU_SWINC_CNT25_Msk (1UL << PMU_SWINC_CNT25_Pos) /*!< PMU SWINC: Event Counter 25 Software Increment Mask */ - -#define PMU_SWINC_CNT26_Pos 26U /*!< PMU SWINC: Event Counter 26 Software Increment Position */ -#define PMU_SWINC_CNT26_Msk (1UL << PMU_SWINC_CNT26_Pos) /*!< PMU SWINC: Event Counter 26 Software Increment Mask */ - -#define PMU_SWINC_CNT27_Pos 27U /*!< PMU SWINC: Event Counter 27 Software Increment Position */ -#define PMU_SWINC_CNT27_Msk (1UL << PMU_SWINC_CNT27_Pos) /*!< PMU SWINC: Event Counter 27 Software Increment Mask */ - -#define PMU_SWINC_CNT28_Pos 28U /*!< PMU SWINC: Event Counter 28 Software Increment Position */ -#define PMU_SWINC_CNT28_Msk (1UL << PMU_SWINC_CNT28_Pos) /*!< PMU SWINC: Event Counter 28 Software Increment Mask */ - -#define PMU_SWINC_CNT29_Pos 29U /*!< PMU SWINC: Event Counter 29 Software Increment Position */ -#define PMU_SWINC_CNT29_Msk (1UL << PMU_SWINC_CNT29_Pos) /*!< PMU SWINC: Event Counter 29 Software Increment Mask */ - -#define PMU_SWINC_CNT30_Pos 30U /*!< PMU SWINC: Event Counter 30 Software Increment Position */ -#define PMU_SWINC_CNT30_Msk (1UL << PMU_SWINC_CNT30_Pos) /*!< PMU SWINC: Event Counter 30 Software Increment Mask */ - -/** \brief PMU Control Register Definitions */ - -#define PMU_CTRL_ENABLE_Pos 0U /*!< PMU CTRL: ENABLE Position */ -#define PMU_CTRL_ENABLE_Msk (1UL /*<< PMU_CTRL_ENABLE_Pos*/) /*!< PMU CTRL: ENABLE Mask */ - -#define PMU_CTRL_EVENTCNT_RESET_Pos 1U /*!< PMU CTRL: Event Counter Reset Position */ -#define PMU_CTRL_EVENTCNT_RESET_Msk (1UL << PMU_CTRL_EVENTCNT_RESET_Pos) /*!< PMU CTRL: Event Counter Reset Mask */ - -#define PMU_CTRL_CYCCNT_RESET_Pos 2U /*!< PMU CTRL: Cycle Counter Reset Position */ -#define PMU_CTRL_CYCCNT_RESET_Msk (1UL << PMU_CTRL_CYCCNT_RESET_Pos) /*!< PMU CTRL: Cycle Counter Reset Mask */ - -#define PMU_CTRL_CYCCNT_DISABLE_Pos 5U /*!< PMU CTRL: Disable Cycle Counter Position */ -#define PMU_CTRL_CYCCNT_DISABLE_Msk (1UL << PMU_CTRL_CYCCNT_DISABLE_Pos) /*!< PMU CTRL: Disable Cycle Counter Mask */ - -#define PMU_CTRL_FRZ_ON_OV_Pos 9U /*!< PMU CTRL: Freeze-on-overflow Position */ -#define PMU_CTRL_FRZ_ON_OV_Msk (1UL << PMU_CTRL_FRZ_ON_OVERFLOW_Pos) /*!< PMU CTRL: Freeze-on-overflow Mask */ - -#define PMU_CTRL_TRACE_ON_OV_Pos 11U /*!< PMU CTRL: Trace-on-overflow Position */ -#define PMU_CTRL_TRACE_ON_OV_Msk (1UL << PMU_CTRL_TRACE_ON_OVERFLOW_Pos) /*!< PMU CTRL: Trace-on-overflow Mask */ - -/** \brief PMU Type Register Definitions */ - -#define PMU_TYPE_NUM_CNTS_Pos 0U /*!< PMU TYPE: Number of Counters Position */ -#define PMU_TYPE_NUM_CNTS_Msk (0xFFUL /*<< PMU_TYPE_NUM_CNTS_Pos*/) /*!< PMU TYPE: Number of Counters Mask */ - -#define PMU_TYPE_SIZE_CNTS_Pos 8U /*!< PMU TYPE: Size of Counters Position */ -#define PMU_TYPE_SIZE_CNTS_Msk (0x3FUL << PMU_TYPE_SIZE_CNTS_Pos) /*!< PMU TYPE: Size of Counters Mask */ - -#define PMU_TYPE_CYCCNT_PRESENT_Pos 14U /*!< PMU TYPE: Cycle Counter Present Position */ -#define PMU_TYPE_CYCCNT_PRESENT_Msk (1UL << PMU_TYPE_CYCCNT_PRESENT_Pos) /*!< PMU TYPE: Cycle Counter Present Mask */ - -#define PMU_TYPE_FRZ_OV_SUPPORT_Pos 21U /*!< PMU TYPE: Freeze-on-overflow Support Position */ -#define PMU_TYPE_FRZ_OV_SUPPORT_Msk (1UL << PMU_TYPE_FRZ_OV_SUPPORT_Pos) /*!< PMU TYPE: Freeze-on-overflow Support Mask */ - -#define PMU_TYPE_TRACE_ON_OV_SUPPORT_Pos 23U /*!< PMU TYPE: Trace-on-overflow Support Position */ -#define PMU_TYPE_TRACE_ON_OV_SUPPORT_Msk (1UL << PMU_TYPE_FRZ_OV_SUPPORT_Pos) /*!< PMU TYPE: Trace-on-overflow Support Mask */ - -/** \brief PMU Authentication Status Register Definitions */ - -#define PMU_AUTHSTATUS_NSID_Pos 0U /*!< PMU AUTHSTATUS: Non-secure Invasive Debug Position */ -#define PMU_AUTHSTATUS_NSID_Msk (0x3UL /*<< PMU_AUTHSTATUS_NSID_Pos*/) /*!< PMU AUTHSTATUS: Non-secure Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_NSNID_Pos 2U /*!< PMU AUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_NSNID_Msk (0x3UL << PMU_AUTHSTATUS_NSNID_Pos) /*!< PMU AUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SID_Pos 4U /*!< PMU AUTHSTATUS: Secure Invasive Debug Position */ -#define PMU_AUTHSTATUS_SID_Msk (0x3UL << PMU_AUTHSTATUS_SID_Pos) /*!< PMU AUTHSTATUS: Secure Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SNID_Pos 6U /*!< PMU AUTHSTATUS: Secure Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_SNID_Msk (0x3UL << PMU_AUTHSTATUS_SNID_Pos) /*!< PMU AUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define PMU_AUTHSTATUS_NSUID_Pos 16U /*!< PMU AUTHSTATUS: Non-secure Unprivileged Invasive Debug Position */ -#define PMU_AUTHSTATUS_NSUID_Msk (0x3UL << PMU_AUTHSTATUS_NSUID_Pos) /*!< PMU AUTHSTATUS: Non-secure Unprivileged Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_NSUNID_Pos 18U /*!< PMU AUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_NSUNID_Msk (0x3UL << PMU_AUTHSTATUS_NSUNID_Pos) /*!< PMU AUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SUID_Pos 20U /*!< PMU AUTHSTATUS: Secure Unprivileged Invasive Debug Position */ -#define PMU_AUTHSTATUS_SUID_Msk (0x3UL << PMU_AUTHSTATUS_SUID_Pos) /*!< PMU AUTHSTATUS: Secure Unprivileged Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SUNID_Pos 22U /*!< PMU AUTHSTATUS: Secure Unprivileged Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_SUNID_Msk (0x3UL << PMU_AUTHSTATUS_SUNID_Pos) /*!< PMU AUTHSTATUS: Secure Unprivileged Non-invasive Debug Mask */ - - -/*@} end of group CMSIS_PMU */ -#endif - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ - __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ - __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ - __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ - uint32_t RESERVED0[1]; - union { - __IOM uint32_t MAIR[2]; - struct { - __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ - __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ - }; - }; -} MPU_Type; - -#define MPU_TYPE_RALIASES 4U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ -#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ - -#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ -#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ - -#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ -#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ - -#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ -#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ - -/* MPU Region Limit Address Register Definitions */ -#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ -#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ - -#define MPU_RLAR_PXN_Pos 4U /*!< MPU RLAR: PXN Position */ -#define MPU_RLAR_PXN_Msk (1UL << MPU_RLAR_PXN_Pos) /*!< MPU RLAR: PXN Mask */ - -#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ -#define MPU_RLAR_AttrIndx_Msk (7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ - -#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ -#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ - -/* MPU Memory Attribute Indirection Register 0 Definitions */ -#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ -#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ - -#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ -#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ - -#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ -#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ - -#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ -#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ - -/* MPU Memory Attribute Indirection Register 1 Definitions */ -#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ -#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ - -#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ -#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ - -#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ -#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ - -#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ -#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SAU Security Attribution Unit (SAU) - \brief Type definitions for the Security Attribution Unit (SAU) - @{ - */ - -/** - \brief Structure type to access the Security Attribution Unit (SAU). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ - __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ -#else - uint32_t RESERVED0[3]; -#endif - __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ -} SAU_Type; - -/* SAU Control Register Definitions */ -#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ -#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ - -#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ -#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ - -/* SAU Type Register Definitions */ -#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ -#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ - -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) -/* SAU Region Number Register Definitions */ -#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ -#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ - -/* SAU Region Base Address Register Definitions */ -#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ -#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ - -/* SAU Region Limit Address Register Definitions */ -#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ -#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ - -#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ -#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ - -#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ -#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ - -#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ - -/* Secure Fault Status Register Definitions */ -#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ -#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ - -#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ -#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ - -#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ -#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ - -#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ -#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ - -#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ -#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ - -#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ -#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ - -#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ -#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ - -#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ -#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ - -/*@} end of group CMSIS_SAU */ -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and VFP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ -#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ - -#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ -#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ - -#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ -#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ - -#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ -#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ - -#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ -#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ - -#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ -#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ -#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ -#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -#define FPU_FPDSCR_FZ16_Pos 19U /*!< FPDSCR: FZ16 bit Position */ -#define FPU_FPDSCR_FZ16_Msk (1UL << FPU_FPDSCR_FZ16_Pos) /*!< FPDSCR: FZ16 bit Mask */ - -#define FPU_FPDSCR_LTPSIZE_Pos 16U /*!< FPDSCR: LTPSIZE bit Position */ -#define FPU_FPDSCR_LTPSIZE_Msk (7UL << FPU_FPDSCR_LTPSIZE_Pos) /*!< FPDSCR: LTPSIZE bit Mask */ - -/* Media and VFP Feature Register 0 Definitions */ -#define FPU_MVFR0_FPRound_Pos 28U /*!< MVFR0: FPRound bits Position */ -#define FPU_MVFR0_FPRound_Msk (0xFUL << FPU_MVFR0_FPRound_Pos) /*!< MVFR0: FPRound bits Mask */ - -#define FPU_MVFR0_FPSqrt_Pos 20U /*!< MVFR0: FPSqrt bits Position */ -#define FPU_MVFR0_FPSqrt_Msk (0xFUL << FPU_MVFR0_FPSqrt_Pos) /*!< MVFR0: FPSqrt bits Mask */ - -#define FPU_MVFR0_FPDivide_Pos 16U /*!< MVFR0: FPDivide bits Position */ -#define FPU_MVFR0_FPDivide_Msk (0xFUL << FPU_MVFR0_FPDivide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FPDP_Pos 8U /*!< MVFR0: FPDP bits Position */ -#define FPU_MVFR0_FPDP_Msk (0xFUL << FPU_MVFR0_FPDP_Pos) /*!< MVFR0: FPDP bits Mask */ - -#define FPU_MVFR0_FPSP_Pos 4U /*!< MVFR0: FPSP bits Position */ -#define FPU_MVFR0_FPSP_Msk (0xFUL << FPU_MVFR0_FPSP_Pos) /*!< MVFR0: FPSP bits Mask */ - -#define FPU_MVFR0_SIMDReg_Pos 0U /*!< MVFR0: SIMDReg bits Position */ -#define FPU_MVFR0_SIMDReg_Msk (0xFUL /*<< FPU_MVFR0_SIMDReg_Pos*/) /*!< MVFR0: SIMDReg bits Mask */ - -/* Media and VFP Feature Register 1 Definitions */ -#define FPU_MVFR1_FMAC_Pos 28U /*!< MVFR1: FMAC bits Position */ -#define FPU_MVFR1_FMAC_Msk (0xFUL << FPU_MVFR1_FMAC_Pos) /*!< MVFR1: FMAC bits Mask */ - -#define FPU_MVFR1_FPHP_Pos 24U /*!< MVFR1: FPHP bits Position */ -#define FPU_MVFR1_FPHP_Msk (0xFUL << FPU_MVFR1_FPHP_Pos) /*!< MVFR1: FPHP bits Mask */ - -#define FPU_MVFR1_FP16_Pos 20U /*!< MVFR1: FP16 bits Position */ -#define FPU_MVFR1_FP16_Msk (0xFUL << FPU_MVFR1_FP16_Pos) /*!< MVFR1: FP16 bits Mask */ - -#define FPU_MVFR1_MVE_Pos 8U /*!< MVFR1: MVE bits Position */ -#define FPU_MVFR1_MVE_Msk (0xFUL << FPU_MVFR1_MVE_Pos) /*!< MVFR1: MVE bits Mask */ - -#define FPU_MVFR1_FPDNaN_Pos 4U /*!< MVFR1: FPDNaN bits Position */ -#define FPU_MVFR1_FPDNaN_Msk (0xFUL << FPU_MVFR1_FPDNaN_Pos) /*!< MVFR1: FPDNaN bits Mask */ - -#define FPU_MVFR1_FPFtZ_Pos 0U /*!< MVFR1: FPFtZ bits Position */ -#define FPU_MVFR1_FPFtZ_Msk (0xFUL /*<< FPU_MVFR1_FPFtZ_Pos*/) /*!< MVFR1: FPFtZ bits Mask */ - -/* Media and VFP Feature Register 2 Definitions */ -#define FPU_MVFR2_FPMisc_Pos 4U /*!< MVFR2: FPMisc bits Position */ -#define FPU_MVFR2_FPMisc_Msk (0xFUL << FPU_MVFR2_FPMisc_Pos) /*!< MVFR2: FPMisc bits Mask */ - -/*@} end of group CMSIS_FPU */ - -/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */ -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief \deprecated Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - __OM uint32_t DSCEMCR; /*!< Offset: 0x010 ( /W) Debug Set Clear Exception and Monitor Control Register */ - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */ -#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_FPD_Pos 23U /*!< \deprecated CoreDebug DHCSR: S_FPD Position */ -#define CoreDebug_DHCSR_S_FPD_Msk (1UL << CoreDebug_DHCSR_S_FPD_Pos) /*!< \deprecated CoreDebug DHCSR: S_FPD Mask */ - -#define CoreDebug_DHCSR_S_SUIDE_Pos 22U /*!< \deprecated CoreDebug DHCSR: S_SUIDE Position */ -#define CoreDebug_DHCSR_S_SUIDE_Msk (1UL << CoreDebug_DHCSR_S_SUIDE_Pos) /*!< \deprecated CoreDebug DHCSR: S_SUIDE Mask */ - -#define CoreDebug_DHCSR_S_NSUIDE_Pos 21U /*!< \deprecated CoreDebug DHCSR: S_NSUIDE Position */ -#define CoreDebug_DHCSR_S_NSUIDE_Msk (1UL << CoreDebug_DHCSR_S_NSUIDE_Pos) /*!< \deprecated CoreDebug DHCSR: S_NSUIDE Mask */ - -#define CoreDebug_DHCSR_S_SDE_Pos 20U /*!< \deprecated CoreDebug DHCSR: S_SDE Position */ -#define CoreDebug_DHCSR_S_SDE_Msk (1UL << CoreDebug_DHCSR_S_SDE_Pos) /*!< \deprecated CoreDebug DHCSR: S_SDE Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< \deprecated CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_PMOV_Pos 6U /*!< \deprecated CoreDebug DHCSR: C_PMOV Position */ -#define CoreDebug_DHCSR_C_PMOV_Msk (1UL << CoreDebug_DHCSR_C_PMOV_Pos) /*!< \deprecated CoreDebug DHCSR: C_PMOV Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< \deprecated CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< \deprecated CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< \deprecated CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< \deprecated CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< \deprecated CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< \deprecated CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */ - -/* Debug Set Clear Exception and Monitor Control Register Definitions */ -#define CoreDebug_DSCEMCR_CLR_MON_REQ_Pos 19U /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_REQ, Position */ -#define CoreDebug_DSCEMCR_CLR_MON_REQ_Msk (1UL << CoreDebug_DSCEMCR_CLR_MON_REQ_Pos) /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_REQ, Mask */ - -#define CoreDebug_DSCEMCR_CLR_MON_PEND_Pos 17U /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_PEND, Position */ -#define CoreDebug_DSCEMCR_CLR_MON_PEND_Msk (1UL << CoreDebug_DSCEMCR_CLR_MON_PEND_Pos) /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_PEND, Mask */ - -#define CoreDebug_DSCEMCR_SET_MON_REQ_Pos 3U /*!< \deprecated CoreDebug DSCEMCR: SET_MON_REQ, Position */ -#define CoreDebug_DSCEMCR_SET_MON_REQ_Msk (1UL << CoreDebug_DSCEMCR_SET_MON_REQ_Pos) /*!< \deprecated CoreDebug DSCEMCR: SET_MON_REQ, Mask */ - -#define CoreDebug_DSCEMCR_SET_MON_PEND_Pos 1U /*!< \deprecated CoreDebug DSCEMCR: SET_MON_PEND, Position */ -#define CoreDebug_DSCEMCR_SET_MON_PEND_Msk (1UL << CoreDebug_DSCEMCR_SET_MON_PEND_Pos) /*!< \deprecated CoreDebug DSCEMCR: SET_MON_PEND, Mask */ - -/* Debug Authentication Control Register Definitions */ -#define CoreDebug_DAUTHCTRL_UIDEN_Pos 10U /*!< \deprecated CoreDebug DAUTHCTRL: UIDEN, Position */ -#define CoreDebug_DAUTHCTRL_UIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_UIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: UIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_UIDAPEN_Pos 9U /*!< \deprecated CoreDebug DAUTHCTRL: UIDAPEN, Position */ -#define CoreDebug_DAUTHCTRL_UIDAPEN_Msk (1UL << CoreDebug_DAUTHCTRL_UIDAPEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: UIDAPEN, Mask */ - -#define CoreDebug_DAUTHCTRL_FSDMA_Pos 8U /*!< \deprecated CoreDebug DAUTHCTRL: FSDMA, Position */ -#define CoreDebug_DAUTHCTRL_FSDMA_Msk (1UL << CoreDebug_DAUTHCTRL_FSDMA_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: FSDMA, Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */ -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */ - -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */ - -/* Debug Security Control and Status Register Definitions */ -#define CoreDebug_DSCSR_CDS_Pos 16U /*!< \deprecated CoreDebug DSCSR: CDS Position */ -#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< \deprecated CoreDebug DSCSR: CDS Mask */ - -#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */ -#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */ - -#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */ -#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DCB Debug Control Block - \brief Type definitions for the Debug Control Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Control Block Registers (DCB). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - __OM uint32_t DSCEMCR; /*!< Offset: 0x010 ( /W) Debug Set Clear Exception and Monitor Control Register */ - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} DCB_Type; - -/* DHCSR, Debug Halting Control and Status Register Definitions */ -#define DCB_DHCSR_DBGKEY_Pos 16U /*!< DCB DHCSR: Debug key Position */ -#define DCB_DHCSR_DBGKEY_Msk (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos) /*!< DCB DHCSR: Debug key Mask */ - -#define DCB_DHCSR_S_RESTART_ST_Pos 26U /*!< DCB DHCSR: Restart sticky status Position */ -#define DCB_DHCSR_S_RESTART_ST_Msk (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos) /*!< DCB DHCSR: Restart sticky status Mask */ - -#define DCB_DHCSR_S_RESET_ST_Pos 25U /*!< DCB DHCSR: Reset sticky status Position */ -#define DCB_DHCSR_S_RESET_ST_Msk (0x1UL << DCB_DHCSR_S_RESET_ST_Pos) /*!< DCB DHCSR: Reset sticky status Mask */ - -#define DCB_DHCSR_S_RETIRE_ST_Pos 24U /*!< DCB DHCSR: Retire sticky status Position */ -#define DCB_DHCSR_S_RETIRE_ST_Msk (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos) /*!< DCB DHCSR: Retire sticky status Mask */ - -#define DCB_DHCSR_S_FPD_Pos 23U /*!< DCB DHCSR: Floating-point registers Debuggable Position */ -#define DCB_DHCSR_S_FPD_Msk (0x1UL << DCB_DHCSR_S_FPD_Pos) /*!< DCB DHCSR: Floating-point registers Debuggable Mask */ - -#define DCB_DHCSR_S_SUIDE_Pos 22U /*!< DCB DHCSR: Secure unprivileged halting debug enabled Position */ -#define DCB_DHCSR_S_SUIDE_Msk (0x1UL << DCB_DHCSR_S_SUIDE_Pos) /*!< DCB DHCSR: Secure unprivileged halting debug enabled Mask */ - -#define DCB_DHCSR_S_NSUIDE_Pos 21U /*!< DCB DHCSR: Non-secure unprivileged halting debug enabled Position */ -#define DCB_DHCSR_S_NSUIDE_Msk (0x1UL << DCB_DHCSR_S_NSUIDE_Pos) /*!< DCB DHCSR: Non-secure unprivileged halting debug enabled Mask */ - -#define DCB_DHCSR_S_SDE_Pos 20U /*!< DCB DHCSR: Secure debug enabled Position */ -#define DCB_DHCSR_S_SDE_Msk (0x1UL << DCB_DHCSR_S_SDE_Pos) /*!< DCB DHCSR: Secure debug enabled Mask */ - -#define DCB_DHCSR_S_LOCKUP_Pos 19U /*!< DCB DHCSR: Lockup status Position */ -#define DCB_DHCSR_S_LOCKUP_Msk (0x1UL << DCB_DHCSR_S_LOCKUP_Pos) /*!< DCB DHCSR: Lockup status Mask */ - -#define DCB_DHCSR_S_SLEEP_Pos 18U /*!< DCB DHCSR: Sleeping status Position */ -#define DCB_DHCSR_S_SLEEP_Msk (0x1UL << DCB_DHCSR_S_SLEEP_Pos) /*!< DCB DHCSR: Sleeping status Mask */ - -#define DCB_DHCSR_S_HALT_Pos 17U /*!< DCB DHCSR: Halted status Position */ -#define DCB_DHCSR_S_HALT_Msk (0x1UL << DCB_DHCSR_S_HALT_Pos) /*!< DCB DHCSR: Halted status Mask */ - -#define DCB_DHCSR_S_REGRDY_Pos 16U /*!< DCB DHCSR: Register ready status Position */ -#define DCB_DHCSR_S_REGRDY_Msk (0x1UL << DCB_DHCSR_S_REGRDY_Pos) /*!< DCB DHCSR: Register ready status Mask */ - -#define DCB_DHCSR_C_PMOV_Pos 6U /*!< DCB DHCSR: Halt on PMU overflow control Position */ -#define DCB_DHCSR_C_PMOV_Msk (0x1UL << DCB_DHCSR_C_PMOV_Pos) /*!< DCB DHCSR: Halt on PMU overflow control Mask */ - -#define DCB_DHCSR_C_SNAPSTALL_Pos 5U /*!< DCB DHCSR: Snap stall control Position */ -#define DCB_DHCSR_C_SNAPSTALL_Msk (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos) /*!< DCB DHCSR: Snap stall control Mask */ - -#define DCB_DHCSR_C_MASKINTS_Pos 3U /*!< DCB DHCSR: Mask interrupts control Position */ -#define DCB_DHCSR_C_MASKINTS_Msk (0x1UL << DCB_DHCSR_C_MASKINTS_Pos) /*!< DCB DHCSR: Mask interrupts control Mask */ - -#define DCB_DHCSR_C_STEP_Pos 2U /*!< DCB DHCSR: Step control Position */ -#define DCB_DHCSR_C_STEP_Msk (0x1UL << DCB_DHCSR_C_STEP_Pos) /*!< DCB DHCSR: Step control Mask */ - -#define DCB_DHCSR_C_HALT_Pos 1U /*!< DCB DHCSR: Halt control Position */ -#define DCB_DHCSR_C_HALT_Msk (0x1UL << DCB_DHCSR_C_HALT_Pos) /*!< DCB DHCSR: Halt control Mask */ - -#define DCB_DHCSR_C_DEBUGEN_Pos 0U /*!< DCB DHCSR: Debug enable control Position */ -#define DCB_DHCSR_C_DEBUGEN_Msk (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/) /*!< DCB DHCSR: Debug enable control Mask */ - -/* DCRSR, Debug Core Register Select Register Definitions */ -#define DCB_DCRSR_REGWnR_Pos 16U /*!< DCB DCRSR: Register write/not-read Position */ -#define DCB_DCRSR_REGWnR_Msk (0x1UL << DCB_DCRSR_REGWnR_Pos) /*!< DCB DCRSR: Register write/not-read Mask */ - -#define DCB_DCRSR_REGSEL_Pos 0U /*!< DCB DCRSR: Register selector Position */ -#define DCB_DCRSR_REGSEL_Msk (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/) /*!< DCB DCRSR: Register selector Mask */ - -/* DCRDR, Debug Core Register Data Register Definitions */ -#define DCB_DCRDR_DBGTMP_Pos 0U /*!< DCB DCRDR: Data temporary buffer Position */ -#define DCB_DCRDR_DBGTMP_Msk (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/) /*!< DCB DCRDR: Data temporary buffer Mask */ - -/* DEMCR, Debug Exception and Monitor Control Register Definitions */ -#define DCB_DEMCR_TRCENA_Pos 24U /*!< DCB DEMCR: Trace enable Position */ -#define DCB_DEMCR_TRCENA_Msk (0x1UL << DCB_DEMCR_TRCENA_Pos) /*!< DCB DEMCR: Trace enable Mask */ - -#define DCB_DEMCR_MONPRKEY_Pos 23U /*!< DCB DEMCR: Monitor pend req key Position */ -#define DCB_DEMCR_MONPRKEY_Msk (0x1UL << DCB_DEMCR_MONPRKEY_Pos) /*!< DCB DEMCR: Monitor pend req key Mask */ - -#define DCB_DEMCR_UMON_EN_Pos 21U /*!< DCB DEMCR: Unprivileged monitor enable Position */ -#define DCB_DEMCR_UMON_EN_Msk (0x1UL << DCB_DEMCR_UMON_EN_Pos) /*!< DCB DEMCR: Unprivileged monitor enable Mask */ - -#define DCB_DEMCR_SDME_Pos 20U /*!< DCB DEMCR: Secure DebugMonitor enable Position */ -#define DCB_DEMCR_SDME_Msk (0x1UL << DCB_DEMCR_SDME_Pos) /*!< DCB DEMCR: Secure DebugMonitor enable Mask */ - -#define DCB_DEMCR_MON_REQ_Pos 19U /*!< DCB DEMCR: Monitor request Position */ -#define DCB_DEMCR_MON_REQ_Msk (0x1UL << DCB_DEMCR_MON_REQ_Pos) /*!< DCB DEMCR: Monitor request Mask */ - -#define DCB_DEMCR_MON_STEP_Pos 18U /*!< DCB DEMCR: Monitor step Position */ -#define DCB_DEMCR_MON_STEP_Msk (0x1UL << DCB_DEMCR_MON_STEP_Pos) /*!< DCB DEMCR: Monitor step Mask */ - -#define DCB_DEMCR_MON_PEND_Pos 17U /*!< DCB DEMCR: Monitor pend Position */ -#define DCB_DEMCR_MON_PEND_Msk (0x1UL << DCB_DEMCR_MON_PEND_Pos) /*!< DCB DEMCR: Monitor pend Mask */ - -#define DCB_DEMCR_MON_EN_Pos 16U /*!< DCB DEMCR: Monitor enable Position */ -#define DCB_DEMCR_MON_EN_Msk (0x1UL << DCB_DEMCR_MON_EN_Pos) /*!< DCB DEMCR: Monitor enable Mask */ - -#define DCB_DEMCR_VC_SFERR_Pos 11U /*!< DCB DEMCR: Vector Catch SecureFault Position */ -#define DCB_DEMCR_VC_SFERR_Msk (0x1UL << DCB_DEMCR_VC_SFERR_Pos) /*!< DCB DEMCR: Vector Catch SecureFault Mask */ - -#define DCB_DEMCR_VC_HARDERR_Pos 10U /*!< DCB DEMCR: Vector Catch HardFault errors Position */ -#define DCB_DEMCR_VC_HARDERR_Msk (0x1UL << DCB_DEMCR_VC_HARDERR_Pos) /*!< DCB DEMCR: Vector Catch HardFault errors Mask */ - -#define DCB_DEMCR_VC_INTERR_Pos 9U /*!< DCB DEMCR: Vector Catch interrupt errors Position */ -#define DCB_DEMCR_VC_INTERR_Msk (0x1UL << DCB_DEMCR_VC_INTERR_Pos) /*!< DCB DEMCR: Vector Catch interrupt errors Mask */ - -#define DCB_DEMCR_VC_BUSERR_Pos 8U /*!< DCB DEMCR: Vector Catch BusFault errors Position */ -#define DCB_DEMCR_VC_BUSERR_Msk (0x1UL << DCB_DEMCR_VC_BUSERR_Pos) /*!< DCB DEMCR: Vector Catch BusFault errors Mask */ - -#define DCB_DEMCR_VC_STATERR_Pos 7U /*!< DCB DEMCR: Vector Catch state errors Position */ -#define DCB_DEMCR_VC_STATERR_Msk (0x1UL << DCB_DEMCR_VC_STATERR_Pos) /*!< DCB DEMCR: Vector Catch state errors Mask */ - -#define DCB_DEMCR_VC_CHKERR_Pos 6U /*!< DCB DEMCR: Vector Catch check errors Position */ -#define DCB_DEMCR_VC_CHKERR_Msk (0x1UL << DCB_DEMCR_VC_CHKERR_Pos) /*!< DCB DEMCR: Vector Catch check errors Mask */ - -#define DCB_DEMCR_VC_NOCPERR_Pos 5U /*!< DCB DEMCR: Vector Catch NOCP errors Position */ -#define DCB_DEMCR_VC_NOCPERR_Msk (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos) /*!< DCB DEMCR: Vector Catch NOCP errors Mask */ - -#define DCB_DEMCR_VC_MMERR_Pos 4U /*!< DCB DEMCR: Vector Catch MemManage errors Position */ -#define DCB_DEMCR_VC_MMERR_Msk (0x1UL << DCB_DEMCR_VC_MMERR_Pos) /*!< DCB DEMCR: Vector Catch MemManage errors Mask */ - -#define DCB_DEMCR_VC_CORERESET_Pos 0U /*!< DCB DEMCR: Vector Catch Core reset Position */ -#define DCB_DEMCR_VC_CORERESET_Msk (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/) /*!< DCB DEMCR: Vector Catch Core reset Mask */ - -/* DSCEMCR, Debug Set Clear Exception and Monitor Control Register Definitions */ -#define DCB_DSCEMCR_CLR_MON_REQ_Pos 19U /*!< DCB DSCEMCR: Clear monitor request Position */ -#define DCB_DSCEMCR_CLR_MON_REQ_Msk (0x1UL << DCB_DSCEMCR_CLR_MON_REQ_Pos) /*!< DCB DSCEMCR: Clear monitor request Mask */ - -#define DCB_DSCEMCR_CLR_MON_PEND_Pos 17U /*!< DCB DSCEMCR: Clear monitor pend Position */ -#define DCB_DSCEMCR_CLR_MON_PEND_Msk (0x1UL << DCB_DSCEMCR_CLR_MON_PEND_Pos) /*!< DCB DSCEMCR: Clear monitor pend Mask */ - -#define DCB_DSCEMCR_SET_MON_REQ_Pos 3U /*!< DCB DSCEMCR: Set monitor request Position */ -#define DCB_DSCEMCR_SET_MON_REQ_Msk (0x1UL << DCB_DSCEMCR_SET_MON_REQ_Pos) /*!< DCB DSCEMCR: Set monitor request Mask */ - -#define DCB_DSCEMCR_SET_MON_PEND_Pos 1U /*!< DCB DSCEMCR: Set monitor pend Position */ -#define DCB_DSCEMCR_SET_MON_PEND_Msk (0x1UL << DCB_DSCEMCR_SET_MON_PEND_Pos) /*!< DCB DSCEMCR: Set monitor pend Mask */ - -/* DAUTHCTRL, Debug Authentication Control Register Definitions */ -#define DCB_DAUTHCTRL_UIDEN_Pos 10U /*!< DCB DAUTHCTRL: Unprivileged Invasive Debug Enable Position */ -#define DCB_DAUTHCTRL_UIDEN_Msk (0x1UL << DCB_DAUTHCTRL_UIDEN_Pos) /*!< DCB DAUTHCTRL: Unprivileged Invasive Debug Enable Mask */ - -#define DCB_DAUTHCTRL_UIDAPEN_Pos 9U /*!< DCB DAUTHCTRL: Unprivileged Invasive DAP Access Enable Position */ -#define DCB_DAUTHCTRL_UIDAPEN_Msk (0x1UL << DCB_DAUTHCTRL_UIDAPEN_Pos) /*!< DCB DAUTHCTRL: Unprivileged Invasive DAP Access Enable Mask */ - -#define DCB_DAUTHCTRL_FSDMA_Pos 8U /*!< DCB DAUTHCTRL: Force Secure DebugMonitor Allowed Position */ -#define DCB_DAUTHCTRL_FSDMA_Msk (0x1UL << DCB_DAUTHCTRL_FSDMA_Pos) /*!< DCB DAUTHCTRL: Force Secure DebugMonitor Allowed Mask */ - -#define DCB_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPNIDENSEL_Msk (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos) /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */ - -#define DCB_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPIDENSEL_Msk (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */ - -/* DSCSR, Debug Security Control and Status Register Definitions */ -#define DCB_DSCSR_CDSKEY_Pos 17U /*!< DCB DSCSR: CDS write-enable key Position */ -#define DCB_DSCSR_CDSKEY_Msk (0x1UL << DCB_DSCSR_CDSKEY_Pos) /*!< DCB DSCSR: CDS write-enable key Mask */ - -#define DCB_DSCSR_CDS_Pos 16U /*!< DCB DSCSR: Current domain Secure Position */ -#define DCB_DSCSR_CDS_Msk (0x1UL << DCB_DSCSR_CDS_Pos) /*!< DCB DSCSR: Current domain Secure Mask */ - -#define DCB_DSCSR_SBRSEL_Pos 1U /*!< DCB DSCSR: Secure banked register select Position */ -#define DCB_DSCSR_SBRSEL_Msk (0x1UL << DCB_DSCSR_SBRSEL_Pos) /*!< DCB DSCSR: Secure banked register select Mask */ - -#define DCB_DSCSR_SBRSELEN_Pos 0U /*!< DCB DSCSR: Secure banked register select enable Position */ -#define DCB_DSCSR_SBRSELEN_Msk (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/) /*!< DCB DSCSR: Secure banked register select enable Mask */ - -/*@} end of group CMSIS_DCB */ - - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DIB Debug Identification Block - \brief Type definitions for the Debug Identification Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Identification Block Registers (DIB). - */ -typedef struct -{ - __OM uint32_t DLAR; /*!< Offset: 0x000 ( /W) SCS Software Lock Access Register */ - __IM uint32_t DLSR; /*!< Offset: 0x004 (R/ ) SCS Software Lock Status Register */ - __IM uint32_t DAUTHSTATUS; /*!< Offset: 0x008 (R/ ) Debug Authentication Status Register */ - __IM uint32_t DDEVARCH; /*!< Offset: 0x00C (R/ ) SCS Device Architecture Register */ - __IM uint32_t DDEVTYPE; /*!< Offset: 0x010 (R/ ) SCS Device Type Register */ -} DIB_Type; - -/* DLAR, SCS Software Lock Access Register Definitions */ -#define DIB_DLAR_KEY_Pos 0U /*!< DIB DLAR: KEY Position */ -#define DIB_DLAR_KEY_Msk (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */) /*!< DIB DLAR: KEY Mask */ - -/* DLSR, SCS Software Lock Status Register Definitions */ -#define DIB_DLSR_nTT_Pos 2U /*!< DIB DLSR: Not thirty-two bit Position */ -#define DIB_DLSR_nTT_Msk (0x1UL << DIB_DLSR_nTT_Pos ) /*!< DIB DLSR: Not thirty-two bit Mask */ - -#define DIB_DLSR_SLK_Pos 1U /*!< DIB DLSR: Software Lock status Position */ -#define DIB_DLSR_SLK_Msk (0x1UL << DIB_DLSR_SLK_Pos ) /*!< DIB DLSR: Software Lock status Mask */ - -#define DIB_DLSR_SLI_Pos 0U /*!< DIB DLSR: Software Lock implemented Position */ -#define DIB_DLSR_SLI_Msk (0x1UL /*<< DIB_DLSR_SLI_Pos*/) /*!< DIB DLSR: Software Lock implemented Mask */ - -/* DAUTHSTATUS, Debug Authentication Status Register Definitions */ -#define DIB_DAUTHSTATUS_SUNID_Pos 22U /*!< DIB DAUTHSTATUS: Secure Unprivileged Non-invasive Debug Allowed Position */ -#define DIB_DAUTHSTATUS_SUNID_Msk (0x3UL << DIB_DAUTHSTATUS_SUNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Unprivileged Non-invasive Debug Allowed Mask */ - -#define DIB_DAUTHSTATUS_SUID_Pos 20U /*!< DIB DAUTHSTATUS: Secure Unprivileged Invasive Debug Allowed Position */ -#define DIB_DAUTHSTATUS_SUID_Msk (0x3UL << DIB_DAUTHSTATUS_SUID_Pos ) /*!< DIB DAUTHSTATUS: Secure Unprivileged Invasive Debug Allowed Mask */ - -#define DIB_DAUTHSTATUS_NSUNID_Pos 18U /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Allo Position */ -#define DIB_DAUTHSTATUS_NSUNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSUNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Allo Mask */ - -#define DIB_DAUTHSTATUS_NSUID_Pos 16U /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Invasive Debug Allowed Position */ -#define DIB_DAUTHSTATUS_NSUID_Msk (0x3UL << DIB_DAUTHSTATUS_NSUID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Invasive Debug Allowed Mask */ - -#define DIB_DAUTHSTATUS_SNID_Pos 6U /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_SNID_Msk (0x3UL << DIB_DAUTHSTATUS_SNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_SID_Pos 4U /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_SID_Msk (0x3UL << DIB_DAUTHSTATUS_SID_Pos ) /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSNID_Pos 2U /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSID_Pos 0U /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSID_Msk (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/) /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */ - -/* DDEVARCH, SCS Device Architecture Register Definitions */ -#define DIB_DDEVARCH_ARCHITECT_Pos 21U /*!< DIB DDEVARCH: Architect Position */ -#define DIB_DDEVARCH_ARCHITECT_Msk (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos ) /*!< DIB DDEVARCH: Architect Mask */ - -#define DIB_DDEVARCH_PRESENT_Pos 20U /*!< DIB DDEVARCH: DEVARCH Present Position */ -#define DIB_DDEVARCH_PRESENT_Msk (0x1FUL << DIB_DDEVARCH_PRESENT_Pos ) /*!< DIB DDEVARCH: DEVARCH Present Mask */ - -#define DIB_DDEVARCH_REVISION_Pos 16U /*!< DIB DDEVARCH: Revision Position */ -#define DIB_DDEVARCH_REVISION_Msk (0xFUL << DIB_DDEVARCH_REVISION_Pos ) /*!< DIB DDEVARCH: Revision Mask */ - -#define DIB_DDEVARCH_ARCHVER_Pos 12U /*!< DIB DDEVARCH: Architecture Version Position */ -#define DIB_DDEVARCH_ARCHVER_Msk (0xFUL << DIB_DDEVARCH_ARCHVER_Pos ) /*!< DIB DDEVARCH: Architecture Version Mask */ - -#define DIB_DDEVARCH_ARCHPART_Pos 0U /*!< DIB DDEVARCH: Architecture Part Position */ -#define DIB_DDEVARCH_ARCHPART_Msk (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/) /*!< DIB DDEVARCH: Architecture Part Mask */ - -/* DDEVTYPE, SCS Device Type Register Definitions */ -#define DIB_DDEVTYPE_SUB_Pos 4U /*!< DIB DDEVTYPE: Sub-type Position */ -#define DIB_DDEVTYPE_SUB_Msk (0xFUL << DIB_DDEVTYPE_SUB_Pos ) /*!< DIB DDEVTYPE: Sub-type Mask */ - -#define DIB_DDEVTYPE_MAJOR_Pos 0U /*!< DIB DDEVTYPE: Major type Position */ -#define DIB_DDEVTYPE_MAJOR_Msk (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/) /*!< DIB DDEVTYPE: Major type Mask */ - - -/*@} end of group CMSIS_DIB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ - #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ - #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ - #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ - #define MEMSYSCTL_BASE (0xE001E000UL) /*!< Memory System Control Base Address */ - #define ERRBNK_BASE (0xE001E100UL) /*!< Error Banking Base Address */ - #define PWRMODCTL_BASE (0xE001E300UL) /*!< Power Mode Control Base Address */ - #define EWIC_BASE (0xE001E400UL) /*!< External Wakeup Interrupt Controller Base Address */ - #define PRCCFGINF_BASE (0xE001E700UL) /*!< Processor Configuration Information Base Address */ - #define STL_BASE (0xE001E800UL) /*!< Software Test Library Base Address */ - #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ - #define CoreDebug_BASE (0xE000EDF0UL) /*!< \deprecated Core Debug Base Address */ - #define DCB_BASE (0xE000EDF0UL) /*!< DCB Base Address */ - #define DIB_BASE (0xE000EFB0UL) /*!< DIB Base Address */ - #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ - #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ - #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - - #define ICB ((ICB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ - #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ - #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ - #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ - #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ - #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ - #define MEMSYSCTL ((MemSysCtl_Type *) MEMSYSCTL_BASE ) /*!< Memory System Control configuration struct */ - #define ERRBNK ((ErrBnk_Type *) ERRBNK_BASE ) /*!< Error Banking configuration struct */ - #define PWRMODCTL ((PwrModCtl_Type *) PWRMODCTL_BASE ) /*!< Power Mode Control configuration struct */ - #define EWIC ((EWIC_Type *) EWIC_BASE ) /*!< EWIC configuration struct */ - #define PRCCFGINF ((PrcCfgInf_Type *) PRCCFGINF_BASE ) /*!< Processor Configuration Information configuration struct */ - #define STL ((STL_Type *) STL_BASE ) /*!< Software Test Library configuration struct */ - #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< \deprecated Core Debug configuration struct */ - #define DCB ((DCB_Type *) DCB_BASE ) /*!< DCB configuration struct */ - #define DIB ((DIB_Type *) DIB_BASE ) /*!< DIB configuration struct */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ - #endif - - #if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U) - #define PMU_BASE (0xE0003000UL) /*!< PMU Base Address */ - #define PMU ((PMU_Type *) PMU_BASE ) /*!< PMU configuration struct */ - #endif - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ - #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ - #endif - - #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ - #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ - #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< \deprecated Core Debug Base Address (non-secure address space) */ - #define DCB_BASE_NS (0xE002EDF0UL) /*!< DCB Base Address (non-secure address space) */ - #define DIB_BASE_NS (0xE002EFB0UL) /*!< DIB Base Address (non-secure address space) */ - #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ - #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ - #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ - - #define ICB_NS ((ICB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ - #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ - #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ - #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ - #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct (non-secure address space) */ - #define DCB_NS ((DCB_Type *) DCB_BASE_NS ) /*!< DCB configuration struct (non-secure address space) */ - #define DIB_NS ((DIB_Type *) DIB_BASE_NS ) /*!< DIB configuration struct (non-secure address space) */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ - #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ - #endif - - #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ - #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ -/*@} */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_register_aliases Backwards Compatibility Aliases - \brief Register alias definitions for backwards compatibility. - @{ - */ -#define ID_ADR (ID_AFR) /*!< SCB Auxiliary Feature Register */ - -/* 'SCnSCB' is deprecated and replaced by 'ICB' */ -typedef ICB_Type SCnSCB_Type; - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISCRITAXIRUW_Pos (ICB_ACTLR_DISCRITAXIRUW_Pos) -#define SCnSCB_ACTLR_DISCRITAXIRUW_Msk (ICB_ACTLR_DISCRITAXIRUW_Msk) - -#define SCnSCB_ACTLR_DISDI_Pos (ICB_ACTLR_DISDI_Pos) -#define SCnSCB_ACTLR_DISDI_Msk (ICB_ACTLR_DISDI_Msk) - -#define SCnSCB_ACTLR_DISCRITAXIRUR_Pos (ICB_ACTLR_DISCRITAXIRUR_Pos) -#define SCnSCB_ACTLR_DISCRITAXIRUR_Msk (ICB_ACTLR_DISCRITAXIRUR_Msk) - -#define SCnSCB_ACTLR_EVENTBUSEN_Pos (ICB_ACTLR_EVENTBUSEN_Pos) -#define SCnSCB_ACTLR_EVENTBUSEN_Msk (ICB_ACTLR_EVENTBUSEN_Msk) - -#define SCnSCB_ACTLR_EVENTBUSEN_S_Pos (ICB_ACTLR_EVENTBUSEN_S_Pos) -#define SCnSCB_ACTLR_EVENTBUSEN_S_Msk (ICB_ACTLR_EVENTBUSEN_S_Msk) - -#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos (ICB_ACTLR_DISITMATBFLUSH_Pos) -#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (ICB_ACTLR_DISITMATBFLUSH_Msk) - -#define SCnSCB_ACTLR_DISNWAMODE_Pos (ICB_ACTLR_DISNWAMODE_Pos) -#define SCnSCB_ACTLR_DISNWAMODE_Msk (ICB_ACTLR_DISNWAMODE_Msk) - -#define SCnSCB_ACTLR_FPEXCODIS_Pos (ICB_ACTLR_FPEXCODIS_Pos) -#define SCnSCB_ACTLR_FPEXCODIS_Msk (ICB_ACTLR_FPEXCODIS_Msk) - -#define SCnSCB_ACTLR_DISOLAP_Pos (ICB_ACTLR_DISOLAP_Pos) -#define SCnSCB_ACTLR_DISOLAP_Msk (ICB_ACTLR_DISOLAP_Msk) - -#define SCnSCB_ACTLR_DISOLAPS_Pos (ICB_ACTLR_DISOLAPS_Pos) -#define SCnSCB_ACTLR_DISOLAPS_Msk (ICB_ACTLR_DISOLAPS_Msk) - -#define SCnSCB_ACTLR_DISLOBR_Pos (ICB_ACTLR_DISLOBR_Pos) -#define SCnSCB_ACTLR_DISLOBR_Msk (ICB_ACTLR_DISLOBR_Msk) - -#define SCnSCB_ACTLR_DISLO_Pos (ICB_ACTLR_DISLO_Pos) -#define SCnSCB_ACTLR_DISLO_Msk (ICB_ACTLR_DISLO_Msk) - -#define SCnSCB_ACTLR_DISLOLEP_Pos (ICB_ACTLR_DISLOLEP_Pos) -#define SCnSCB_ACTLR_DISLOLEP_Msk (ICB_ACTLR_DISLOLEP_Msk) - -#define SCnSCB_ACTLR_DISFOLD_Pos (ICB_ACTLR_DISFOLD_Pos) -#define SCnSCB_ACTLR_DISFOLD_Msk (ICB_ACTLR_DISFOLD_Msk) - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos (ICB_ICTR_INTLINESNUM_Pos) -#define SCnSCB_ICTR_INTLINESNUM_Msk (ICB_ICTR_INTLINESNUM_Msk) - -#define SCnSCB (ICB) -#define SCnSCB_NS (ICB_NS) - -/*@} */ - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* Special LR values for Secure/Non-Secure call handling and exception handling */ - -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ -#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ - -/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ -#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ -#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ -#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ -#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ -#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ -#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ -#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ - -/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ -#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ -#else -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ -#endif - - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Interrupt Target State - \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - \return 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Target State - \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Clear Interrupt Target State - \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - __DSB(); -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Priority Grouping (non-secure) - \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB_NS->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB_NS->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping (non-secure) - \details Reads the priority grouping field from the non-secure NVIC when in secure state. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) -{ - return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt (non-secure) - \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Interrupt Enable status (non-secure) - \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt (non-secure) - \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Pending Interrupt (non-secure) - \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt (non-secure) - \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt (non-secure) - \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt (non-secure) - \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority (non-secure) - \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every non-secure processor exception. - */ -__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority (non-secure) - \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_NVICFunctions */ - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv8.h" - -#endif - -/* ########################## PMU functions and events #################################### */ - -#if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U) - -#include "pmu_armv8.h" - -/** - \brief Cortex-M55 PMU events - \note Architectural PMU events can be found in pmu_armv8.h -*/ - -#define ARMCM55_PMU_ECC_ERR 0xC000 /*!< Any ECC error */ -#define ARMCM55_PMU_ECC_ERR_FATAL 0xC001 /*!< Any fatal ECC error */ -#define ARMCM55_PMU_ECC_ERR_DCACHE 0xC010 /*!< Any ECC error in the data cache */ -#define ARMCM55_PMU_ECC_ERR_ICACHE 0xC011 /*!< Any ECC error in the instruction cache */ -#define ARMCM55_PMU_ECC_ERR_FATAL_DCACHE 0xC012 /*!< Any fatal ECC error in the data cache */ -#define ARMCM55_PMU_ECC_ERR_FATAL_ICACHE 0xC013 /*!< Any fatal ECC error in the instruction cache*/ -#define ARMCM55_PMU_ECC_ERR_DTCM 0xC020 /*!< Any ECC error in the DTCM */ -#define ARMCM55_PMU_ECC_ERR_ITCM 0xC021 /*!< Any ECC error in the ITCM */ -#define ARMCM55_PMU_ECC_ERR_FATAL_DTCM 0xC022 /*!< Any fatal ECC error in the DTCM */ -#define ARMCM55_PMU_ECC_ERR_FATAL_ITCM 0xC023 /*!< Any fatal ECC error in the ITCM */ -#define ARMCM55_PMU_PF_LINEFILL 0xC100 /*!< A prefetcher starts a line-fill */ -#define ARMCM55_PMU_PF_CANCEL 0xC101 /*!< A prefetcher stops prefetching */ -#define ARMCM55_PMU_PF_DROP_LINEFILL 0xC102 /*!< A linefill triggered by a prefetcher has been dropped because of lack of buffering */ -#define ARMCM55_PMU_NWAMODE_ENTER 0xC200 /*!< No write-allocate mode entry */ -#define ARMCM55_PMU_NWAMODE 0xC201 /*!< Write-allocate store is not allocated into the data cache due to no-write-allocate mode */ -#define ARMCM55_PMU_SAHB_ACCESS 0xC300 /*!< Read or write access on the S-AHB interface to the TCM */ -#define ARMCM55_PMU_PAHB_ACCESS 0xC301 /*!< Read or write access to the P-AHB write interface */ -#define ARMCM55_PMU_AXI_WRITE_ACCESS 0xC302 /*!< Any beat access to M-AXI write interface */ -#define ARMCM55_PMU_AXI_READ_ACCESS 0xC303 /*!< Any beat access to M-AXI read interface */ -#define ARMCM55_PMU_DOSTIMEOUT_DOUBLE 0xC400 /*!< Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress */ -#define ARMCM55_PMU_DOSTIMEOUT_TRIPLE 0xC401 /*!< Denial of Service timeout has fired three times and blocked the LSU to force forward progress */ - -#endif - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = FPU->MVFR0; - if ((mvfr0 & (FPU_MVFR0_FPSP_Msk | FPU_MVFR0_FPDP_Msk)) == 0x220U) - { - return 2U; /* Double + Single precision FPU */ - } - else if ((mvfr0 & (FPU_MVFR0_FPSP_Msk | FPU_MVFR0_FPDP_Msk)) == 0x020U) - { - return 1U; /* Single precision FPU */ - } - else - { - return 0U; /* No FPU */ - } -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - -/* ########################## MVE functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_MveFunctions MVE Functions - \brief Function that provides MVE type. - @{ - */ - -/** - \brief get MVE type - \details returns the MVE type - \returns - - \b 0: No Vector Extension (MVE) - - \b 1: Integer Vector Extension (MVE-I) - - \b 2: Floating-point Vector Extension (MVE-F) - */ -__STATIC_INLINE uint32_t SCB_GetMVEType(void) -{ - const uint32_t mvfr1 = FPU->MVFR1; - if ((mvfr1 & FPU_MVFR1_MVE_Msk) == (0x2U << FPU_MVFR1_MVE_Pos)) - { - return 2U; - } - else if ((mvfr1 & FPU_MVFR1_MVE_Msk) == (0x1U << FPU_MVFR1_MVE_Pos)) - { - return 1U; - } - else - { - return 0U; - } -} - - -/*@} end of CMSIS_Core_MveFunctions */ - - -/* ########################## Cache functions #################################### */ - -#if ((defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)) || \ - (defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U))) -#include "cachel1_armv7.h" -#endif - - -/* ########################## SAU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SAUFunctions SAU Functions - \brief Functions that configure the SAU. - @{ - */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - -/** - \brief Enable SAU - \details Enables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Enable(void) -{ - SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); -} - - - -/** - \brief Disable SAU - \details Disables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Disable(void) -{ - SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); -} - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_SAUFunctions */ - - - - -/* ################################## Debug Control function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DCBFunctions Debug Control Functions - \brief Functions that access the Debug Control Block. - @{ - */ - - -/** - \brief Set Debug Authentication Control Register - \details writes to Debug Authentication Control register. - \param [in] value value to be writen. - */ -__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value) -{ - __DSB(); - __ISB(); - DCB->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register - \details Reads Debug Authentication Control register. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void) -{ - return (DCB->DAUTHCTRL); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Debug Authentication Control Register (non-secure) - \details writes to non-secure Debug Authentication Control register when in secure state. - \param [in] value value to be writen - */ -__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value) -{ - __DSB(); - __ISB(); - DCB_NS->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register (non-secure) - \details Reads non-secure Debug Authentication Control register when in secure state. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) -{ - return (DCB_NS->DAUTHCTRL); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## Debug Identification function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions - \brief Functions that access the Debug Identification Block. - @{ - */ - - -/** - \brief Get Debug Authentication Status Register - \details Reads Debug Authentication Status register. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t DIB_GetAuthStatus(void) -{ - return (DIB->DAUTHSTATUS); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Debug Authentication Status Register (non-secure) - \details Reads non-secure Debug Authentication Status register when in secure state. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void) -{ - return (DIB_NS->DAUTHSTATUS); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief System Tick Configuration (non-secure) - \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function TZ_SysTick_Config_NS is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - - */ -__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM55_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm7.h b/Drivers/CMSIS/Core/Include/core_cm7.h deleted file mode 100644 index 8a4ea3e..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm7.h +++ /dev/null @@ -1,2366 +0,0 @@ -/**************************************************************************//** - * @file core_cm7.h - * @brief CMSIS Cortex-M7 Core Peripheral Access Layer Header File - * @version V5.1.6 - * @date 04. June 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM7_H_GENERIC -#define __CORE_CM7_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M7 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS CM7 definitions */ -#define __CM7_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM7_CMSIS_VERSION_SUB ( __CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM7_CMSIS_VERSION ((__CM7_CMSIS_VERSION_MAIN << 16U) | \ - __CM7_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_M (7U) /*!< Cortex-M Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. -*/ -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM7_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM7_H_DEPENDANT -#define __CORE_CM7_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM7_REV - #define __CM7_REV 0x0000U - #warning "__CM7_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __ICACHE_PRESENT - #define __ICACHE_PRESENT 0U - #warning "__ICACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DCACHE_PRESENT - #define __DCACHE_PRESENT 0U - #warning "__DCACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DTCM_PRESENT - #define __DTCM_PRESENT 0U - #warning "__DTCM_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 1U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M7 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:1; /*!< bit: 9 Reserved */ - uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit */ - uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ -#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ -#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ - uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RESERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t ID_MFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ID_ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[1U]; - __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ - __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ - __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ - __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - uint32_t RESERVED3[93U]; - __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ - uint32_t RESERVED4[15U]; - __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ - uint32_t RESERVED5[1U]; - __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ - uint32_t RESERVED6[1U]; - __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ - __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ - __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ - __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ - __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ - __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ - __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ - __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ - __OM uint32_t BPIALL; /*!< Offset: 0x278 ( /W) Branch Predictor Invalidate All */ - uint32_t RESERVED7[5U]; - __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */ - __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */ - __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */ - __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ - __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */ - uint32_t RESERVED8[1U]; - __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: Branch prediction enable bit Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: Instruction cache enable bit Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: Cache enable bit Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */ - -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ -#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ -#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/* SCB Cache Level ID Register Definitions */ -#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ -#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ - -#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ -#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ - -/* SCB Cache Type Register Definitions */ -#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ -#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ - -#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ -#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ - -#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ -#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ - -#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ -#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ - -#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ -#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ - -/* SCB Cache Size ID Register Definitions */ -#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ -#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ - -#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ -#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ - -#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ -#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ - -#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ -#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ - -#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ -#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ - -#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ -#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ - -#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ -#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ - -/* SCB Cache Size Selection Register Definitions */ -#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ -#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ - -#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ -#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ - -/* SCB Software Triggered Interrupt Register Definitions */ -#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ -#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ - -/* SCB D-Cache Invalidate by Set-way Register Definitions */ -#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ -#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ - -#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ -#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ - -/* SCB D-Cache Clean by Set-way Register Definitions */ -#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ -#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ - -#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ -#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ - -/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ -#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ -#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ - -#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ -#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ - -/* Instruction Tightly-Coupled Memory Control Register Definitions */ -#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */ -#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */ - -#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */ -#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */ - -#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */ -#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */ - -#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */ -#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */ - -/* Data Tightly-Coupled Memory Control Register Definitions */ -#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */ -#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */ - -#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */ -#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */ - -#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */ -#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */ - -#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */ -#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */ - -/* AHBP Control Register Definitions */ -#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */ -#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */ - -#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */ -#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */ - -/* L1 Cache Control Register Definitions */ -#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */ -#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */ - -#define SCB_CACR_ECCEN_Pos 1U /*!< \deprecated SCB CACR: ECCEN Position */ -#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< \deprecated SCB CACR: ECCEN Mask */ - -#define SCB_CACR_ECCDIS_Pos 1U /*!< SCB CACR: ECCDIS Position */ -#define SCB_CACR_ECCDIS_Msk (1UL << SCB_CACR_ECCDIS_Pos) /*!< SCB CACR: ECCDIS Mask */ - -#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */ -#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */ - -/* AHBS Control Register Definitions */ -#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */ -#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBSCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */ - -#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */ -#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBSCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */ - -#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/ -#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBSCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */ - -/* Auxiliary Bus Fault Status Register Definitions */ -#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/ -#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */ - -#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/ -#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */ - -#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/ -#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */ - -#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/ -#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */ - -#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/ -#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */ - -#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/ -#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISDYNADD_Pos 26U /*!< ACTLR: DISDYNADD Position */ -#define SCnSCB_ACTLR_DISDYNADD_Msk (1UL << SCnSCB_ACTLR_DISDYNADD_Pos) /*!< ACTLR: DISDYNADD Mask */ - -#define SCnSCB_ACTLR_DISISSCH1_Pos 21U /*!< ACTLR: DISISSCH1 Position */ -#define SCnSCB_ACTLR_DISISSCH1_Msk (0x1FUL << SCnSCB_ACTLR_DISISSCH1_Pos) /*!< ACTLR: DISISSCH1 Mask */ - -#define SCnSCB_ACTLR_DISDI_Pos 16U /*!< ACTLR: DISDI Position */ -#define SCnSCB_ACTLR_DISDI_Msk (0x1FUL << SCnSCB_ACTLR_DISDI_Pos) /*!< ACTLR: DISDI Mask */ - -#define SCnSCB_ACTLR_DISCRITAXIRUR_Pos 15U /*!< ACTLR: DISCRITAXIRUR Position */ -#define SCnSCB_ACTLR_DISCRITAXIRUR_Msk (1UL << SCnSCB_ACTLR_DISCRITAXIRUR_Pos) /*!< ACTLR: DISCRITAXIRUR Mask */ - -#define SCnSCB_ACTLR_DISBTACALLOC_Pos 14U /*!< ACTLR: DISBTACALLOC Position */ -#define SCnSCB_ACTLR_DISBTACALLOC_Msk (1UL << SCnSCB_ACTLR_DISBTACALLOC_Pos) /*!< ACTLR: DISBTACALLOC Mask */ - -#define SCnSCB_ACTLR_DISBTACREAD_Pos 13U /*!< ACTLR: DISBTACREAD Position */ -#define SCnSCB_ACTLR_DISBTACREAD_Msk (1UL << SCnSCB_ACTLR_DISBTACREAD_Pos) /*!< ACTLR: DISBTACREAD Mask */ - -#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U /*!< ACTLR: DISITMATBFLUSH Position */ -#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */ - -#define SCnSCB_ACTLR_DISRAMODE_Pos 11U /*!< ACTLR: DISRAMODE Position */ -#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos) /*!< ACTLR: DISRAMODE Mask */ - -#define SCnSCB_ACTLR_FPEXCODIS_Pos 10U /*!< ACTLR: FPEXCODIS Position */ -#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */ - -#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED3[981U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( W) Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ -#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ - -#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ -#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ -#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ - -#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ -#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -#define MPU_TYPE_RALIASES 4U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -/* Media and FP Feature Register 0 Definitions */ -#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ -#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ - -#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ -#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ - -#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ -#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ - -#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ -#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ -#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ - -#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ -#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ - -#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ -#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ - -#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ -#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ - -/* Media and FP Feature Register 1 Definitions */ -#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ -#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ - -#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ -#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ - -#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ -#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ - -#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ -#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ - -/* Media and FP Feature Register 2 Definitions */ - -#define FPU_MVFR2_VFP_Misc_Pos 4U /*!< MVFR2: VFP Misc bits Position */ -#define FPU_MVFR2_VFP_Misc_Msk (0xFUL << FPU_MVFR2_VFP_Misc_Pos) /*!< MVFR2: VFP Misc bits Mask */ - -/*@} end of group CMSIS_FPU */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -#define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ -#define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* The following EXC_RETURN values are saved the LR on exception entry */ -#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ -#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ -#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ -#define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */ -#define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */ -#define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */ - - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - __DSB(); -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv7.h" - -#endif - - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = SCB->MVFR0; - if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) - { - return 2U; /* Double + Single precision FPU */ - } - else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) - { - return 1U; /* Single precision FPU */ - } - else - { - return 0U; /* No FPU */ - } -} - -/*@} end of CMSIS_Core_FpuFunctions */ - - -/* ########################## Cache functions #################################### */ - -#if ((defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)) || \ - (defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U))) -#include "cachel1_armv7.h" -#endif - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM7_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_cm85.h b/Drivers/CMSIS/Core/Include/core_cm85.h deleted file mode 100644 index 5fbb289..0000000 --- a/Drivers/CMSIS/Core/Include/core_cm85.h +++ /dev/null @@ -1,4672 +0,0 @@ -/**************************************************************************//** - * @file core_cm85.h - * @brief CMSIS Cortex-M85 Core Peripheral Access Layer Header File - * @version V1.0.4 - * @date 21. April 2022 - ******************************************************************************/ -/* - * Copyright (c) 2022 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#elif defined ( __GNUC__ ) - #pragma GCC diagnostic ignored "-Wpedantic" /* disable pedantic warning due to unnamed structs/unions */ -#endif - -#ifndef __CORE_CM85_H_GENERIC -#define __CORE_CM85_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M85 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS CM85 definitions */ - -#define __CORTEX_M (85U) /*!< Cortex-M Core */ - -#if defined ( __CC_ARM ) - #error Legacy Arm Compiler does not support Armv8.1-M target architecture. -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined(__ARM_FEATURE_DSP) - #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM85_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM85_H_DEPENDANT -#define __CORE_CM85_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM85_REV - #define __CM85_REV 0x0001U - #warning "__CM85_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #if __FPU_PRESENT != 0U - #ifndef __FPU_DP - #define __FPU_DP 0U - #warning "__FPU_DP not defined in device header file; using default!" - #endif - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __ICACHE_PRESENT - #define __ICACHE_PRESENT 0U - #warning "__ICACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DCACHE_PRESENT - #define __DCACHE_PRESENT 0U - #warning "__DCACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 1U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __PMU_PRESENT - #define __PMU_PRESENT 0U - #warning "__PMU_PRESENT not defined in device header file; using default!" - #endif - - #if __PMU_PRESENT != 0U - #ifndef __PMU_NUM_EVENTCNT - #define __PMU_NUM_EVENTCNT 8U - #warning "__PMU_NUM_EVENTCNT not defined in device header file; using default!" - #elif (__PMU_NUM_EVENTCNT > 8 || __PMU_NUM_EVENTCNT < 2) - #error "__PMU_NUM_EVENTCNT is out of range in device header file!" */ - #endif - #endif - - #ifndef __SAUREGION_PRESENT - #define __SAUREGION_PRESENT 0U - #warning "__SAUREGION_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DSP_PRESENT - #define __DSP_PRESENT 0U - #warning "__DSP_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M85 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core EWIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core PMU Register - - Core MPU Register - - Core SAU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:1; /*!< bit: 20 Reserved */ - uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ - uint32_t _reserved2:2; /*!< bit: 22..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_B_Pos 21U /*!< xPSR: B Position */ -#define xPSR_B_Msk (1UL << xPSR_B_Pos) /*!< xPSR: B Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ - uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ - uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ - uint32_t BTI_EN:1; /*!< bit: 4 Privileged branch target identification enable */ - uint32_t UBTI_EN:1; /*!< bit: 5 Unprivileged branch target identification enable */ - uint32_t PAC_EN:1; /*!< bit: 6 Privileged pointer authentication enable */ - uint32_t UPAC_EN:1; /*!< bit: 7 Unprivileged pointer authentication enable */ - uint32_t _reserved1:24; /*!< bit: 8..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_UPAC_EN_Pos 7U /*!< CONTROL: UPAC_EN Position */ -#define CONTROL_UPAC_EN_Msk (1UL << CONTROL_UPAC_EN_Pos) /*!< CONTROL: UPAC_EN Mask */ - -#define CONTROL_PAC_EN_Pos 6U /*!< CONTROL: PAC_EN Position */ -#define CONTROL_PAC_EN_Msk (1UL << CONTROL_PAC_EN_Pos) /*!< CONTROL: PAC_EN Mask */ - -#define CONTROL_UBTI_EN_Pos 5U /*!< CONTROL: UBTI_EN Position */ -#define CONTROL_UBTI_EN_Msk (1UL << CONTROL_UBTI_EN_Pos) /*!< CONTROL: UBTI_EN Mask */ - -#define CONTROL_BTI_EN_Pos 4U /*!< CONTROL: BTI_EN Position */ -#define CONTROL_BTI_EN_Msk (1UL << CONTROL_BTI_EN_Pos) /*!< CONTROL: BTI_EN Mask */ - -#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ -#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ - -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[16U]; - __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[16U]; - __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[16U]; - __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[16U]; - __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[16U]; - __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ - uint32_t RESERVED5[16U]; - __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED6[580U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ - __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ - __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ - __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ - uint32_t RESERVED7[21U]; - __IOM uint32_t SFSR; /*!< Offset: 0x0E4 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x0E8 (R/W) Secure Fault Address Register */ - uint32_t RESERVED3[69U]; - __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ - __IOM uint32_t RFSR; /*!< Offset: 0x204 (R/W) RAS Fault Status Register */ - uint32_t RESERVED4[14U]; - __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ - uint32_t RESERVED5[1U]; - __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ - uint32_t RESERVED6[1U]; - __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ - __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ - __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ - __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ - __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ - __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ - __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ - __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ - __OM uint32_t BPIALL; /*!< Offset: 0x278 ( /W) Branch Predictor Invalidate All */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ -#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ - -#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ -#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ - -#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ -#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ -#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ -#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ - -#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ -#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_IESB_Pos 5U /*!< SCB AIRCR: Implicit ESB Enable Position */ -#define SCB_AIRCR_IESB_Msk (1UL << SCB_AIRCR_IESB_Pos) /*!< SCB AIRCR: Implicit ESB Enable Mask */ - -#define SCB_AIRCR_DIT_Pos 4U /*!< SCB AIRCR: Data Independent Timing Position */ -#define SCB_AIRCR_DIT_Msk (1UL << SCB_AIRCR_DIT_Pos) /*!< SCB AIRCR: Data Independent Timing Mask */ - -#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ -#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ -#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_TRD_Pos 20U /*!< SCB CCR: TRD Position */ -#define SCB_CCR_TRD_Msk (1UL << SCB_CCR_TRD_Pos) /*!< SCB CCR: TRD Mask */ - -#define SCB_CCR_LOB_Pos 19U /*!< SCB CCR: LOB Position */ -#define SCB_CCR_LOB_Msk (1UL << SCB_CCR_LOB_Pos) /*!< SCB CCR: LOB Mask */ - -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ - -#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ -#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ -#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ -#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ -#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ - -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ -#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ - -#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ -#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ -#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ -#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ -#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ -#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_PMU_Pos 5U /*!< SCB DFSR: PMU Position */ -#define SCB_DFSR_PMU_Msk (1UL << SCB_DFSR_PMU_Pos) /*!< SCB DFSR: PMU Mask */ - -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/* SCB Non-Secure Access Control Register Definitions */ -#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ -#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ - -#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ -#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ - -#define SCB_NSACR_CP7_Pos 7U /*!< SCB NSACR: CP7 Position */ -#define SCB_NSACR_CP7_Msk (1UL << SCB_NSACR_CP7_Pos) /*!< SCB NSACR: CP7 Mask */ - -#define SCB_NSACR_CP6_Pos 6U /*!< SCB NSACR: CP6 Position */ -#define SCB_NSACR_CP6_Msk (1UL << SCB_NSACR_CP6_Pos) /*!< SCB NSACR: CP6 Mask */ - -#define SCB_NSACR_CP5_Pos 5U /*!< SCB NSACR: CP5 Position */ -#define SCB_NSACR_CP5_Msk (1UL << SCB_NSACR_CP5_Pos) /*!< SCB NSACR: CP5 Mask */ - -#define SCB_NSACR_CP4_Pos 4U /*!< SCB NSACR: CP4 Position */ -#define SCB_NSACR_CP4_Msk (1UL << SCB_NSACR_CP4_Pos) /*!< SCB NSACR: CP4 Mask */ - -#define SCB_NSACR_CP3_Pos 3U /*!< SCB NSACR: CP3 Position */ -#define SCB_NSACR_CP3_Msk (1UL << SCB_NSACR_CP3_Pos) /*!< SCB NSACR: CP3 Mask */ - -#define SCB_NSACR_CP2_Pos 2U /*!< SCB NSACR: CP2 Position */ -#define SCB_NSACR_CP2_Msk (1UL << SCB_NSACR_CP2_Pos) /*!< SCB NSACR: CP2 Mask */ - -#define SCB_NSACR_CP1_Pos 1U /*!< SCB NSACR: CP1 Position */ -#define SCB_NSACR_CP1_Msk (1UL << SCB_NSACR_CP1_Pos) /*!< SCB NSACR: CP1 Mask */ - -#define SCB_NSACR_CP0_Pos 0U /*!< SCB NSACR: CP0 Position */ -#define SCB_NSACR_CP0_Msk (1UL /*<< SCB_NSACR_CP0_Pos*/) /*!< SCB NSACR: CP0 Mask */ - -/* SCB Debug Feature Register 0 Definitions */ -#define SCB_ID_DFR_UDE_Pos 28U /*!< SCB ID_DFR: UDE Position */ -#define SCB_ID_DFR_UDE_Msk (0xFUL << SCB_ID_DFR_UDE_Pos) /*!< SCB ID_DFR: UDE Mask */ - -#define SCB_ID_DFR_MProfDbg_Pos 20U /*!< SCB ID_DFR: MProfDbg Position */ -#define SCB_ID_DFR_MProfDbg_Msk (0xFUL << SCB_ID_DFR_MProfDbg_Pos) /*!< SCB ID_DFR: MProfDbg Mask */ - -/* SCB Cache Level ID Register Definitions */ -#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ -#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ - -#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ -#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ - -/* SCB Cache Type Register Definitions */ -#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ -#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ - -#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ -#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ - -#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ -#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ - -#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ -#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ - -#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ -#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ - -/* SCB Cache Size ID Register Definitions */ -#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ -#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ - -#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ -#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ - -#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ -#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ - -#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ -#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ - -#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ -#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ - -#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ -#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ - -#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ -#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ - -/* SCB Cache Size Selection Register Definitions */ -#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ -#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ - -#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ -#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ - -/* SCB Software Triggered Interrupt Register Definitions */ -#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ -#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ - -/* SCB RAS Fault Status Register Definitions */ -#define SCB_RFSR_V_Pos 31U /*!< SCB RFSR: V Position */ -#define SCB_RFSR_V_Msk (1UL << SCB_RFSR_V_Pos) /*!< SCB RFSR: V Mask */ - -#define SCB_RFSR_IS_Pos 16U /*!< SCB RFSR: IS Position */ -#define SCB_RFSR_IS_Msk (0x7FFFUL << SCB_RFSR_IS_Pos) /*!< SCB RFSR: IS Mask */ - -#define SCB_RFSR_UET_Pos 0U /*!< SCB RFSR: UET Position */ -#define SCB_RFSR_UET_Msk (3UL /*<< SCB_RFSR_UET_Pos*/) /*!< SCB RFSR: UET Mask */ - -/* SCB D-Cache Invalidate by Set-way Register Definitions */ -#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ -#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ - -#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ -#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ - -/* SCB D-Cache Clean by Set-way Register Definitions */ -#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ -#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ - -#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ -#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ - -/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ -#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ -#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ - -#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ -#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ICB Implementation Control Block register (ICB) - \brief Type definitions for the Implementation Control Block Register - @{ - */ - -/** - \brief Structure type to access the Implementation Control Block (ICB). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ - __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ -} ICB_Type; - -/* Auxiliary Control Register Definitions */ -#define ICB_ACTLR_DISCRITAXIRUW_Pos 27U /*!< ACTLR: DISCRITAXIRUW Position */ -#define ICB_ACTLR_DISCRITAXIRUW_Msk (1UL << ICB_ACTLR_DISCRITAXIRUW_Pos) /*!< ACTLR: DISCRITAXIRUW Mask */ - -#define ICB_ACTLR_DISCRITAXIRUR_Pos 15U /*!< ACTLR: DISCRITAXIRUR Position */ -#define ICB_ACTLR_DISCRITAXIRUR_Msk (1UL << ICB_ACTLR_DISCRITAXIRUR_Pos) /*!< ACTLR: DISCRITAXIRUR Mask */ - -#define ICB_ACTLR_EVENTBUSEN_Pos 14U /*!< ACTLR: EVENTBUSEN Position */ -#define ICB_ACTLR_EVENTBUSEN_Msk (1UL << ICB_ACTLR_EVENTBUSEN_Pos) /*!< ACTLR: EVENTBUSEN Mask */ - -#define ICB_ACTLR_EVENTBUSEN_S_Pos 13U /*!< ACTLR: EVENTBUSEN_S Position */ -#define ICB_ACTLR_EVENTBUSEN_S_Msk (1UL << ICB_ACTLR_EVENTBUSEN_S_Pos) /*!< ACTLR: EVENTBUSEN_S Mask */ - -#define ICB_ACTLR_DISITMATBFLUSH_Pos 12U /*!< ACTLR: DISITMATBFLUSH Position */ -#define ICB_ACTLR_DISITMATBFLUSH_Msk (1UL << ICB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */ - -#define ICB_ACTLR_DISNWAMODE_Pos 11U /*!< ACTLR: DISNWAMODE Position */ -#define ICB_ACTLR_DISNWAMODE_Msk (1UL << ICB_ACTLR_DISNWAMODE_Pos) /*!< ACTLR: DISNWAMODE Mask */ - -#define ICB_ACTLR_FPEXCODIS_Pos 10U /*!< ACTLR: FPEXCODIS Position */ -#define ICB_ACTLR_FPEXCODIS_Msk (1UL << ICB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */ - -/* Interrupt Controller Type Register Definitions */ -#define ICB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define ICB_ICTR_INTLINESNUM_Msk (0xFUL /*<< ICB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_ICB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ - uint32_t RESERVED6[3U]; - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) ITM Device Type Register */ - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Stimulus Port Register Definitions */ -#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ -#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ - -#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ -#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ -#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ - -#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ -#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - uint32_t RESERVED3[1U]; - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED4[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - uint32_t RESERVED5[1U]; - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED6[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - uint32_t RESERVED7[1U]; - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED8[1U]; - __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ - uint32_t RESERVED9[1U]; - __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ - uint32_t RESERVED10[1U]; - __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ - uint32_t RESERVED11[1U]; - __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ - uint32_t RESERVED12[1U]; - __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ - uint32_t RESERVED13[1U]; - __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ - uint32_t RESERVED14[1U]; - __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ - uint32_t RESERVED15[1U]; - __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ - uint32_t RESERVED16[1U]; - __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ - uint32_t RESERVED17[1U]; - __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ - uint32_t RESERVED18[1U]; - __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ - uint32_t RESERVED19[1U]; - __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ - uint32_t RESERVED20[1U]; - __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ - uint32_t RESERVED21[1U]; - __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ - uint32_t RESERVED22[1U]; - __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ - uint32_t RESERVED23[1U]; - __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ - uint32_t RESERVED24[1U]; - __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ - uint32_t RESERVED25[1U]; - __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ - uint32_t RESERVED26[1U]; - __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ - uint32_t RESERVED27[1U]; - __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ - uint32_t RESERVED28[1U]; - __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ - uint32_t RESERVED29[1U]; - __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ - uint32_t RESERVED30[1U]; - __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ - uint32_t RESERVED31[1U]; - __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ - uint32_t RESERVED32[934U]; - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ - uint32_t RESERVED33[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ -#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ -#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ - -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ -#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ - -#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ -#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup MemSysCtl_Type Memory System Control Registers (IMPLEMENTATION DEFINED) - \brief Type definitions for the Memory System Control Registers (MEMSYSCTL) - @{ - */ - -/** - \brief Structure type to access the Memory System Control Registers (MEMSYSCTL). - */ -typedef struct -{ - __IOM uint32_t MSCR; /*!< Offset: 0x000 (R/W) Memory System Control Register */ - __IOM uint32_t PFCR; /*!< Offset: 0x004 (R/W) Prefetcher Control Register */ - uint32_t RESERVED1[2U]; - __IOM uint32_t ITCMCR; /*!< Offset: 0x010 (R/W) ITCM Control Register */ - __IOM uint32_t DTCMCR; /*!< Offset: 0x014 (R/W) DTCM Control Register */ - __IOM uint32_t PAHBCR; /*!< Offset: 0x018 (R/W) P-AHB Control Register */ - uint32_t RESERVED2[313U]; - __IOM uint32_t ITGU_CTRL; /*!< Offset: 0x500 (R/W) ITGU Control Register */ - __IOM uint32_t ITGU_CFG; /*!< Offset: 0x504 (R/W) ITGU Configuration Register */ - uint32_t RESERVED3[2U]; - __IOM uint32_t ITGU_LUT[16U]; /*!< Offset: 0x510 (R/W) ITGU Look Up Table Register */ - uint32_t RESERVED4[44U]; - __IOM uint32_t DTGU_CTRL; /*!< Offset: 0x600 (R/W) DTGU Control Registers */ - __IOM uint32_t DTGU_CFG; /*!< Offset: 0x604 (R/W) DTGU Configuration Register */ - uint32_t RESERVED5[2U]; - __IOM uint32_t DTGU_LUT[16U]; /*!< Offset: 0x610 (R/W) DTGU Look Up Table Register */ -} MemSysCtl_Type; - -/* MEMSYSCTL Memory System Control Register (MSCR) Register Definitions */ -#define MEMSYSCTL_MSCR_CPWRDN_Pos 17U /*!< MEMSYSCTL MSCR: CPWRDN Position */ -#define MEMSYSCTL_MSCR_CPWRDN_Msk (0x1UL << MEMSYSCTL_MSCR_CPWRDN_Pos) /*!< MEMSYSCTL MSCR: CPWRDN Mask */ - -#define MEMSYSCTL_MSCR_DCCLEAN_Pos 16U /*!< MEMSYSCTL MSCR: DCCLEAN Position */ -#define MEMSYSCTL_MSCR_DCCLEAN_Msk (0x1UL << MEMSYSCTL_MSCR_DCCLEAN_Pos) /*!< MEMSYSCTL MSCR: DCCLEAN Mask */ - -#define MEMSYSCTL_MSCR_ICACTIVE_Pos 13U /*!< MEMSYSCTL MSCR: ICACTIVE Position */ -#define MEMSYSCTL_MSCR_ICACTIVE_Msk (0x1UL << MEMSYSCTL_MSCR_ICACTIVE_Pos) /*!< MEMSYSCTL MSCR: ICACTIVE Mask */ - -#define MEMSYSCTL_MSCR_DCACTIVE_Pos 12U /*!< MEMSYSCTL MSCR: DCACTIVE Position */ -#define MEMSYSCTL_MSCR_DCACTIVE_Msk (0x1UL << MEMSYSCTL_MSCR_DCACTIVE_Pos) /*!< MEMSYSCTL MSCR: DCACTIVE Mask */ - -#define MEMSYSCTL_MSCR_EVECCFAULT_Pos 3U /*!< MEMSYSCTL MSCR: EVECCFAULT Position */ -#define MEMSYSCTL_MSCR_EVECCFAULT_Msk (0x1UL << MEMSYSCTL_MSCR_EVECCFAULT_Pos) /*!< MEMSYSCTL MSCR: EVECCFAULT Mask */ - -#define MEMSYSCTL_MSCR_FORCEWT_Pos 2U /*!< MEMSYSCTL MSCR: FORCEWT Position */ -#define MEMSYSCTL_MSCR_FORCEWT_Msk (0x1UL << MEMSYSCTL_MSCR_FORCEWT_Pos) /*!< MEMSYSCTL MSCR: FORCEWT Mask */ - -#define MEMSYSCTL_MSCR_ECCEN_Pos 1U /*!< MEMSYSCTL MSCR: ECCEN Position */ -#define MEMSYSCTL_MSCR_ECCEN_Msk (0x1UL << MEMSYSCTL_MSCR_ECCEN_Pos) /*!< MEMSYSCTL MSCR: ECCEN Mask */ - -/* MEMSYSCTL Prefetcher Control Register (PFCR) Register Definitions */ -#define MEMSYSCTL_PFCR_DIS_NLP_Pos 7U /*!< MEMSYSCTL PFCR: DIS_NLP Position */ -#define MEMSYSCTL_PFCR_DIS_NLP_Msk (0x1UL << MEMSYSCTL_PFCR_DIS_NLP_Pos) /*!< MEMSYSCTL PFCR: DIS_NLP Mask */ - -#define MEMSYSCTL_PFCR_ENABLE_Pos 0U /*!< MEMSYSCTL PFCR: ENABLE Position */ -#define MEMSYSCTL_PFCR_ENABLE_Msk (0x1UL /*<< MEMSYSCTL_PFCR_ENABLE_Pos*/) /*!< MEMSYSCTL PFCR: ENABLE Mask */ - -/* MEMSYSCTL ITCM Control Register (ITCMCR) Register Definitions */ -#define MEMSYSCTL_ITCMCR_SZ_Pos 3U /*!< MEMSYSCTL ITCMCR: SZ Position */ -#define MEMSYSCTL_ITCMCR_SZ_Msk (0xFUL << MEMSYSCTL_ITCMCR_SZ_Pos) /*!< MEMSYSCTL ITCMCR: SZ Mask */ - -#define MEMSYSCTL_ITCMCR_EN_Pos 0U /*!< MEMSYSCTL ITCMCR: EN Position */ -#define MEMSYSCTL_ITCMCR_EN_Msk (0x1UL /*<< MEMSYSCTL_ITCMCR_EN_Pos*/) /*!< MEMSYSCTL ITCMCR: EN Mask */ - -/* MEMSYSCTL DTCM Control Register (DTCMCR) Register Definitions */ -#define MEMSYSCTL_DTCMCR_SZ_Pos 3U /*!< MEMSYSCTL DTCMCR: SZ Position */ -#define MEMSYSCTL_DTCMCR_SZ_Msk (0xFUL << MEMSYSCTL_DTCMCR_SZ_Pos) /*!< MEMSYSCTL DTCMCR: SZ Mask */ - -#define MEMSYSCTL_DTCMCR_EN_Pos 0U /*!< MEMSYSCTL DTCMCR: EN Position */ -#define MEMSYSCTL_DTCMCR_EN_Msk (0x1UL /*<< MEMSYSCTL_DTCMCR_EN_Pos*/) /*!< MEMSYSCTL DTCMCR: EN Mask */ - -/* MEMSYSCTL P-AHB Control Register (PAHBCR) Register Definitions */ -#define MEMSYSCTL_PAHBCR_SZ_Pos 1U /*!< MEMSYSCTL PAHBCR: SZ Position */ -#define MEMSYSCTL_PAHBCR_SZ_Msk (0x7UL << MEMSYSCTL_PAHBCR_SZ_Pos) /*!< MEMSYSCTL PAHBCR: SZ Mask */ - -#define MEMSYSCTL_PAHBCR_EN_Pos 0U /*!< MEMSYSCTL PAHBCR: EN Position */ -#define MEMSYSCTL_PAHBCR_EN_Msk (0x1UL /*<< MEMSYSCTL_PAHBCR_EN_Pos*/) /*!< MEMSYSCTL PAHBCR: EN Mask */ - -/* MEMSYSCTL ITGU Control Register (ITGU_CTRL) Register Definitions */ -#define MEMSYSCTL_ITGU_CTRL_DEREN_Pos 1U /*!< MEMSYSCTL ITGU_CTRL: DEREN Position */ -#define MEMSYSCTL_ITGU_CTRL_DEREN_Msk (0x1UL << MEMSYSCTL_ITGU_CTRL_DEREN_Pos) /*!< MEMSYSCTL ITGU_CTRL: DEREN Mask */ - -#define MEMSYSCTL_ITGU_CTRL_DBFEN_Pos 0U /*!< MEMSYSCTL ITGU_CTRL: DBFEN Position */ -#define MEMSYSCTL_ITGU_CTRL_DBFEN_Msk (0x1UL /*<< MEMSYSCTL_ITGU_CTRL_DBFEN_Pos*/) /*!< MEMSYSCTL ITGU_CTRL: DBFEN Mask */ - -/* MEMSYSCTL ITGU Configuration Register (ITGU_CFG) Register Definitions */ -#define MEMSYSCTL_ITGU_CFG_PRESENT_Pos 31U /*!< MEMSYSCTL ITGU_CFG: PRESENT Position */ -#define MEMSYSCTL_ITGU_CFG_PRESENT_Msk (0x1UL << MEMSYSCTL_ITGU_CFG_PRESENT_Pos) /*!< MEMSYSCTL ITGU_CFG: PRESENT Mask */ - -#define MEMSYSCTL_ITGU_CFG_NUMBLKS_Pos 8U /*!< MEMSYSCTL ITGU_CFG: NUMBLKS Position */ -#define MEMSYSCTL_ITGU_CFG_NUMBLKS_Msk (0xFUL << MEMSYSCTL_ITGU_CFG_NUMBLKS_Pos) /*!< MEMSYSCTL ITGU_CFG: NUMBLKS Mask */ - -#define MEMSYSCTL_ITGU_CFG_BLKSZ_Pos 0U /*!< MEMSYSCTL ITGU_CFG: BLKSZ Position */ -#define MEMSYSCTL_ITGU_CFG_BLKSZ_Msk (0xFUL /*<< MEMSYSCTL_ITGU_CFG_BLKSZ_Pos*/) /*!< MEMSYSCTL ITGU_CFG: BLKSZ Mask */ - -/* MEMSYSCTL DTGU Control Registers (DTGU_CTRL) Register Definitions */ -#define MEMSYSCTL_DTGU_CTRL_DEREN_Pos 1U /*!< MEMSYSCTL DTGU_CTRL: DEREN Position */ -#define MEMSYSCTL_DTGU_CTRL_DEREN_Msk (0x1UL << MEMSYSCTL_DTGU_CTRL_DEREN_Pos) /*!< MEMSYSCTL DTGU_CTRL: DEREN Mask */ - -#define MEMSYSCTL_DTGU_CTRL_DBFEN_Pos 0U /*!< MEMSYSCTL DTGU_CTRL: DBFEN Position */ -#define MEMSYSCTL_DTGU_CTRL_DBFEN_Msk (0x1UL /*<< MEMSYSCTL_DTGU_CTRL_DBFEN_Pos*/) /*!< MEMSYSCTL DTGU_CTRL: DBFEN Mask */ - -/* MEMSYSCTL DTGU Configuration Register (DTGU_CFG) Register Definitions */ -#define MEMSYSCTL_DTGU_CFG_PRESENT_Pos 31U /*!< MEMSYSCTL DTGU_CFG: PRESENT Position */ -#define MEMSYSCTL_DTGU_CFG_PRESENT_Msk (0x1UL << MEMSYSCTL_DTGU_CFG_PRESENT_Pos) /*!< MEMSYSCTL DTGU_CFG: PRESENT Mask */ - -#define MEMSYSCTL_DTGU_CFG_NUMBLKS_Pos 8U /*!< MEMSYSCTL DTGU_CFG: NUMBLKS Position */ -#define MEMSYSCTL_DTGU_CFG_NUMBLKS_Msk (0xFUL << MEMSYSCTL_DTGU_CFG_NUMBLKS_Pos) /*!< MEMSYSCTL DTGU_CFG: NUMBLKS Mask */ - -#define MEMSYSCTL_DTGU_CFG_BLKSZ_Pos 0U /*!< MEMSYSCTL DTGU_CFG: BLKSZ Position */ -#define MEMSYSCTL_DTGU_CFG_BLKSZ_Msk (0xFUL /*<< MEMSYSCTL_DTGU_CFG_BLKSZ_Pos*/) /*!< MEMSYSCTL DTGU_CFG: BLKSZ Mask */ - - -/*@}*/ /* end of group MemSysCtl_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup PwrModCtl_Type Power Mode Control Registers - \brief Type definitions for the Power Mode Control Registers (PWRMODCTL) - @{ - */ - -/** - \brief Structure type to access the Power Mode Control Registers (PWRMODCTL). - */ -typedef struct -{ - __IOM uint32_t CPDLPSTATE; /*!< Offset: 0x000 (R/W) Core Power Domain Low Power State Register */ - __IOM uint32_t DPDLPSTATE; /*!< Offset: 0x004 (R/W) Debug Power Domain Low Power State Register */ -} PwrModCtl_Type; - -/* PWRMODCTL Core Power Domain Low Power State (CPDLPSTATE) Register Definitions */ -#define PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos 8U /*!< PWRMODCTL CPDLPSTATE: RLPSTATE Position */ -#define PWRMODCTL_CPDLPSTATE_RLPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos) /*!< PWRMODCTL CPDLPSTATE: RLPSTATE Mask */ - -#define PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos 4U /*!< PWRMODCTL CPDLPSTATE: ELPSTATE Position */ -#define PWRMODCTL_CPDLPSTATE_ELPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos) /*!< PWRMODCTL CPDLPSTATE: ELPSTATE Mask */ - -#define PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos 0U /*!< PWRMODCTL CPDLPSTATE: CLPSTATE Position */ -#define PWRMODCTL_CPDLPSTATE_CLPSTATE_Msk (0x3UL /*<< PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos*/) /*!< PWRMODCTL CPDLPSTATE: CLPSTATE Mask */ - -/* PWRMODCTL Debug Power Domain Low Power State (DPDLPSTATE) Register Definitions */ -#define PWRMODCTL_DPDLPSTATE_DLPSTATE_Pos 0U /*!< PWRMODCTL DPDLPSTATE: DLPSTATE Position */ -#define PWRMODCTL_DPDLPSTATE_DLPSTATE_Msk (0x3UL /*<< PWRMODCTL_DPDLPSTATE_DLPSTATE_Pos*/) /*!< PWRMODCTL DPDLPSTATE: DLPSTATE Mask */ - -/*@}*/ /* end of group PwrModCtl_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup EWIC_Type External Wakeup Interrupt Controller Registers - \brief Type definitions for the External Wakeup Interrupt Controller Registers (EWIC) - @{ - */ - -/** - \brief Structure type to access the External Wakeup Interrupt Controller Registers (EWIC). - */ -typedef struct -{ - __OM uint32_t EVENTSPR; /*!< Offset: 0x000 ( /W) Event Set Pending Register */ - uint32_t RESERVED0[31U]; - __IM uint32_t EVENTMASKA; /*!< Offset: 0x080 (R/W) Event Mask A Register */ - __IM uint32_t EVENTMASK[15]; /*!< Offset: 0x084 (R/W) Event Mask Register */ -} EWIC_Type; - -/* EWIC External Wakeup Interrupt Controller (EVENTSPR) Register Definitions */ -#define EWIC_EVENTSPR_EDBGREQ_Pos 2U /*!< EWIC EVENTSPR: EDBGREQ Position */ -#define EWIC_EVENTSPR_EDBGREQ_Msk (0x1UL << EWIC_EVENTSPR_EDBGREQ_Pos) /*!< EWIC EVENTSPR: EDBGREQ Mask */ - -#define EWIC_EVENTSPR_NMI_Pos 1U /*!< EWIC EVENTSPR: NMI Position */ -#define EWIC_EVENTSPR_NMI_Msk (0x1UL << EWIC_EVENTSPR_NMI_Pos) /*!< EWIC EVENTSPR: NMI Mask */ - -#define EWIC_EVENTSPR_EVENT_Pos 0U /*!< EWIC EVENTSPR: EVENT Position */ -#define EWIC_EVENTSPR_EVENT_Msk (0x1UL /*<< EWIC_EVENTSPR_EVENT_Pos*/) /*!< EWIC EVENTSPR: EVENT Mask */ - -/* EWIC External Wakeup Interrupt Controller (EVENTMASKA) Register Definitions */ -#define EWIC_EVENTMASKA_EDBGREQ_Pos 2U /*!< EWIC EVENTMASKA: EDBGREQ Position */ -#define EWIC_EVENTMASKA_EDBGREQ_Msk (0x1UL << EWIC_EVENTMASKA_EDBGREQ_Pos) /*!< EWIC EVENTMASKA: EDBGREQ Mask */ - -#define EWIC_EVENTMASKA_NMI_Pos 1U /*!< EWIC EVENTMASKA: NMI Position */ -#define EWIC_EVENTMASKA_NMI_Msk (0x1UL << EWIC_EVENTMASKA_NMI_Pos) /*!< EWIC EVENTMASKA: NMI Mask */ - -#define EWIC_EVENTMASKA_EVENT_Pos 0U /*!< EWIC EVENTMASKA: EVENT Position */ -#define EWIC_EVENTMASKA_EVENT_Msk (0x1UL /*<< EWIC_EVENTMASKA_EVENT_Pos*/) /*!< EWIC EVENTMASKA: EVENT Mask */ - -/* EWIC External Wakeup Interrupt Controller (EVENTMASK) Register Definitions */ -#define EWIC_EVENTMASK_IRQ_Pos 0U /*!< EWIC EVENTMASKA: IRQ Position */ -#define EWIC_EVENTMASK_IRQ_Msk (0xFFFFFFFFUL /*<< EWIC_EVENTMASKA_IRQ_Pos*/) /*!< EWIC EVENTMASKA: IRQ Mask */ - -/*@}*/ /* end of group EWIC_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup ErrBnk_Type Error Banking Registers (IMPLEMENTATION DEFINED) - \brief Type definitions for the Error Banking Registers (ERRBNK) - @{ - */ - -/** - \brief Structure type to access the Error Banking Registers (ERRBNK). - */ -typedef struct -{ - __IOM uint32_t IEBR0; /*!< Offset: 0x000 (R/W) Instruction Cache Error Bank Register 0 */ - __IOM uint32_t IEBR1; /*!< Offset: 0x004 (R/W) Instruction Cache Error Bank Register 1 */ - uint32_t RESERVED0[2U]; - __IOM uint32_t DEBR0; /*!< Offset: 0x010 (R/W) Data Cache Error Bank Register 0 */ - __IOM uint32_t DEBR1; /*!< Offset: 0x014 (R/W) Data Cache Error Bank Register 1 */ - uint32_t RESERVED1[2U]; - __IOM uint32_t TEBR0; /*!< Offset: 0x020 (R/W) TCM Error Bank Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t TEBR1; /*!< Offset: 0x028 (R/W) TCM Error Bank Register 1 */ -} ErrBnk_Type; - -/* ERRBNK Instruction Cache Error Bank Register 0 (IEBR0) Register Definitions */ -#define ERRBNK_IEBR0_SWDEF_Pos 30U /*!< ERRBNK IEBR0: SWDEF Position */ -#define ERRBNK_IEBR0_SWDEF_Msk (0x3UL << ERRBNK_IEBR0_SWDEF_Pos) /*!< ERRBNK IEBR0: SWDEF Mask */ - -#define ERRBNK_IEBR0_BANK_Pos 16U /*!< ERRBNK IEBR0: BANK Position */ -#define ERRBNK_IEBR0_BANK_Msk (0x1UL << ERRBNK_IEBR0_BANK_Pos) /*!< ERRBNK IEBR0: BANK Mask */ - -#define ERRBNK_IEBR0_LOCATION_Pos 2U /*!< ERRBNK IEBR0: LOCATION Position */ -#define ERRBNK_IEBR0_LOCATION_Msk (0x3FFFUL << ERRBNK_IEBR0_LOCATION_Pos) /*!< ERRBNK IEBR0: LOCATION Mask */ - -#define ERRBNK_IEBR0_LOCKED_Pos 1U /*!< ERRBNK IEBR0: LOCKED Position */ -#define ERRBNK_IEBR0_LOCKED_Msk (0x1UL << ERRBNK_IEBR0_LOCKED_Pos) /*!< ERRBNK IEBR0: LOCKED Mask */ - -#define ERRBNK_IEBR0_VALID_Pos 0U /*!< ERRBNK IEBR0: VALID Position */ -#define ERRBNK_IEBR0_VALID_Msk (0x1UL << /*ERRBNK_IEBR0_VALID_Pos*/) /*!< ERRBNK IEBR0: VALID Mask */ - -/* ERRBNK Instruction Cache Error Bank Register 1 (IEBR1) Register Definitions */ -#define ERRBNK_IEBR1_SWDEF_Pos 30U /*!< ERRBNK IEBR1: SWDEF Position */ -#define ERRBNK_IEBR1_SWDEF_Msk (0x3UL << ERRBNK_IEBR1_SWDEF_Pos) /*!< ERRBNK IEBR1: SWDEF Mask */ - -#define ERRBNK_IEBR1_BANK_Pos 16U /*!< ERRBNK IEBR1: BANK Position */ -#define ERRBNK_IEBR1_BANK_Msk (0x1UL << ERRBNK_IEBR1_BANK_Pos) /*!< ERRBNK IEBR1: BANK Mask */ - -#define ERRBNK_IEBR1_LOCATION_Pos 2U /*!< ERRBNK IEBR1: LOCATION Position */ -#define ERRBNK_IEBR1_LOCATION_Msk (0x3FFFUL << ERRBNK_IEBR1_LOCATION_Pos) /*!< ERRBNK IEBR1: LOCATION Mask */ - -#define ERRBNK_IEBR1_LOCKED_Pos 1U /*!< ERRBNK IEBR1: LOCKED Position */ -#define ERRBNK_IEBR1_LOCKED_Msk (0x1UL << ERRBNK_IEBR1_LOCKED_Pos) /*!< ERRBNK IEBR1: LOCKED Mask */ - -#define ERRBNK_IEBR1_VALID_Pos 0U /*!< ERRBNK IEBR1: VALID Position */ -#define ERRBNK_IEBR1_VALID_Msk (0x1UL << /*ERRBNK_IEBR1_VALID_Pos*/) /*!< ERRBNK IEBR1: VALID Mask */ - -/* ERRBNK Data Cache Error Bank Register 0 (DEBR0) Register Definitions */ -#define ERRBNK_DEBR0_SWDEF_Pos 30U /*!< ERRBNK DEBR0: SWDEF Position */ -#define ERRBNK_DEBR0_SWDEF_Msk (0x3UL << ERRBNK_DEBR0_SWDEF_Pos) /*!< ERRBNK DEBR0: SWDEF Mask */ - -#define ERRBNK_DEBR0_TYPE_Pos 17U /*!< ERRBNK DEBR0: TYPE Position */ -#define ERRBNK_DEBR0_TYPE_Msk (0x1UL << ERRBNK_DEBR0_TYPE_Pos) /*!< ERRBNK DEBR0: TYPE Mask */ - -#define ERRBNK_DEBR0_BANK_Pos 16U /*!< ERRBNK DEBR0: BANK Position */ -#define ERRBNK_DEBR0_BANK_Msk (0x1UL << ERRBNK_DEBR0_BANK_Pos) /*!< ERRBNK DEBR0: BANK Mask */ - -#define ERRBNK_DEBR0_LOCATION_Pos 2U /*!< ERRBNK DEBR0: LOCATION Position */ -#define ERRBNK_DEBR0_LOCATION_Msk (0x3FFFUL << ERRBNK_DEBR0_LOCATION_Pos) /*!< ERRBNK DEBR0: LOCATION Mask */ - -#define ERRBNK_DEBR0_LOCKED_Pos 1U /*!< ERRBNK DEBR0: LOCKED Position */ -#define ERRBNK_DEBR0_LOCKED_Msk (0x1UL << ERRBNK_DEBR0_LOCKED_Pos) /*!< ERRBNK DEBR0: LOCKED Mask */ - -#define ERRBNK_DEBR0_VALID_Pos 0U /*!< ERRBNK DEBR0: VALID Position */ -#define ERRBNK_DEBR0_VALID_Msk (0x1UL << /*ERRBNK_DEBR0_VALID_Pos*/) /*!< ERRBNK DEBR0: VALID Mask */ - -/* ERRBNK Data Cache Error Bank Register 1 (DEBR1) Register Definitions */ -#define ERRBNK_DEBR1_SWDEF_Pos 30U /*!< ERRBNK DEBR1: SWDEF Position */ -#define ERRBNK_DEBR1_SWDEF_Msk (0x3UL << ERRBNK_DEBR1_SWDEF_Pos) /*!< ERRBNK DEBR1: SWDEF Mask */ - -#define ERRBNK_DEBR1_TYPE_Pos 17U /*!< ERRBNK DEBR1: TYPE Position */ -#define ERRBNK_DEBR1_TYPE_Msk (0x1UL << ERRBNK_DEBR1_TYPE_Pos) /*!< ERRBNK DEBR1: TYPE Mask */ - -#define ERRBNK_DEBR1_BANK_Pos 16U /*!< ERRBNK DEBR1: BANK Position */ -#define ERRBNK_DEBR1_BANK_Msk (0x1UL << ERRBNK_DEBR1_BANK_Pos) /*!< ERRBNK DEBR1: BANK Mask */ - -#define ERRBNK_DEBR1_LOCATION_Pos 2U /*!< ERRBNK DEBR1: LOCATION Position */ -#define ERRBNK_DEBR1_LOCATION_Msk (0x3FFFUL << ERRBNK_DEBR1_LOCATION_Pos) /*!< ERRBNK DEBR1: LOCATION Mask */ - -#define ERRBNK_DEBR1_LOCKED_Pos 1U /*!< ERRBNK DEBR1: LOCKED Position */ -#define ERRBNK_DEBR1_LOCKED_Msk (0x1UL << ERRBNK_DEBR1_LOCKED_Pos) /*!< ERRBNK DEBR1: LOCKED Mask */ - -#define ERRBNK_DEBR1_VALID_Pos 0U /*!< ERRBNK DEBR1: VALID Position */ -#define ERRBNK_DEBR1_VALID_Msk (0x1UL << /*ERRBNK_DEBR1_VALID_Pos*/) /*!< ERRBNK DEBR1: VALID Mask */ - -/* ERRBNK TCM Error Bank Register 0 (TEBR0) Register Definitions */ -#define ERRBNK_TEBR0_SWDEF_Pos 30U /*!< ERRBNK TEBR0: SWDEF Position */ -#define ERRBNK_TEBR0_SWDEF_Msk (0x3UL << ERRBNK_TEBR0_SWDEF_Pos) /*!< ERRBNK TEBR0: SWDEF Mask */ - -#define ERRBNK_TEBR0_POISON_Pos 28U /*!< ERRBNK TEBR0: POISON Position */ -#define ERRBNK_TEBR0_POISON_Msk (0x1UL << ERRBNK_TEBR0_POISON_Pos) /*!< ERRBNK TEBR0: POISON Mask */ - -#define ERRBNK_TEBR0_TYPE_Pos 27U /*!< ERRBNK TEBR0: TYPE Position */ -#define ERRBNK_TEBR0_TYPE_Msk (0x1UL << ERRBNK_TEBR0_TYPE_Pos) /*!< ERRBNK TEBR0: TYPE Mask */ - -#define ERRBNK_TEBR0_BANK_Pos 24U /*!< ERRBNK TEBR0: BANK Position */ -#define ERRBNK_TEBR0_BANK_Msk (0x3UL << ERRBNK_TEBR0_BANK_Pos) /*!< ERRBNK TEBR0: BANK Mask */ - -#define ERRBNK_TEBR0_LOCATION_Pos 2U /*!< ERRBNK TEBR0: LOCATION Position */ -#define ERRBNK_TEBR0_LOCATION_Msk (0x3FFFFFUL << ERRBNK_TEBR0_LOCATION_Pos) /*!< ERRBNK TEBR0: LOCATION Mask */ - -#define ERRBNK_TEBR0_LOCKED_Pos 1U /*!< ERRBNK TEBR0: LOCKED Position */ -#define ERRBNK_TEBR0_LOCKED_Msk (0x1UL << ERRBNK_TEBR0_LOCKED_Pos) /*!< ERRBNK TEBR0: LOCKED Mask */ - -#define ERRBNK_TEBR0_VALID_Pos 0U /*!< ERRBNK TEBR0: VALID Position */ -#define ERRBNK_TEBR0_VALID_Msk (0x1UL << /*ERRBNK_TEBR0_VALID_Pos*/) /*!< ERRBNK TEBR0: VALID Mask */ - -/* ERRBNK TCM Error Bank Register 1 (TEBR1) Register Definitions */ -#define ERRBNK_TEBR1_SWDEF_Pos 30U /*!< ERRBNK TEBR1: SWDEF Position */ -#define ERRBNK_TEBR1_SWDEF_Msk (0x3UL << ERRBNK_TEBR1_SWDEF_Pos) /*!< ERRBNK TEBR1: SWDEF Mask */ - -#define ERRBNK_TEBR1_POISON_Pos 28U /*!< ERRBNK TEBR1: POISON Position */ -#define ERRBNK_TEBR1_POISON_Msk (0x1UL << ERRBNK_TEBR1_POISON_Pos) /*!< ERRBNK TEBR1: POISON Mask */ - -#define ERRBNK_TEBR1_TYPE_Pos 27U /*!< ERRBNK TEBR1: TYPE Position */ -#define ERRBNK_TEBR1_TYPE_Msk (0x1UL << ERRBNK_TEBR1_TYPE_Pos) /*!< ERRBNK TEBR1: TYPE Mask */ - -#define ERRBNK_TEBR1_BANK_Pos 24U /*!< ERRBNK TEBR1: BANK Position */ -#define ERRBNK_TEBR1_BANK_Msk (0x3UL << ERRBNK_TEBR1_BANK_Pos) /*!< ERRBNK TEBR1: BANK Mask */ - -#define ERRBNK_TEBR1_LOCATION_Pos 2U /*!< ERRBNK TEBR1: LOCATION Position */ -#define ERRBNK_TEBR1_LOCATION_Msk (0x3FFFFFUL << ERRBNK_TEBR1_LOCATION_Pos) /*!< ERRBNK TEBR1: LOCATION Mask */ - -#define ERRBNK_TEBR1_LOCKED_Pos 1U /*!< ERRBNK TEBR1: LOCKED Position */ -#define ERRBNK_TEBR1_LOCKED_Msk (0x1UL << ERRBNK_TEBR1_LOCKED_Pos) /*!< ERRBNK TEBR1: LOCKED Mask */ - -#define ERRBNK_TEBR1_VALID_Pos 0U /*!< ERRBNK TEBR1: VALID Position */ -#define ERRBNK_TEBR1_VALID_Msk (0x1UL << /*ERRBNK_TEBR1_VALID_Pos*/) /*!< ERRBNK TEBR1: VALID Mask */ - -/*@}*/ /* end of group ErrBnk_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup PrcCfgInf_Type Processor Configuration Information Registers (IMPLEMENTATION DEFINED) - \brief Type definitions for the Processor Configuration Information Registerss (PRCCFGINF) - @{ - */ - -/** - \brief Structure type to access the Processor Configuration Information Registerss (PRCCFGINF). - */ -typedef struct -{ - __OM uint32_t CFGINFOSEL; /*!< Offset: 0x000 ( /W) Processor Configuration Information Selection Register */ - __IM uint32_t CFGINFORD; /*!< Offset: 0x004 (R/ ) Processor Configuration Information Read Data Register */ -} PrcCfgInf_Type; - -/* PRCCFGINF Processor Configuration Information Selection Register (CFGINFOSEL) Definitions */ - -/* PRCCFGINF Processor Configuration Information Read Data Register (CFGINFORD) Definitions */ - -/*@}*/ /* end of group PrcCfgInf_Type */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ - uint32_t RESERVED3[809U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */ - uint32_t RESERVED4[4U]; - __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */ -#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ -#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ - -#define TPI_FFCR_EnFmt_Pos 0U /*!< TPI FFCR: EnFmt Position */ -#define TPI_FFCR_EnFmt_Msk (0x3UL << /*TPI_FFCR_EnFmt_Pos*/) /*!< TPI FFCR: EnFmt Mask */ - -/* TPI Periodic Synchronization Control Register Definitions */ -#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */ -#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */ - -/* TPI Software Lock Status Register Definitions */ -#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */ -#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */ - -#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */ -#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */ - -#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */ -#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */ -#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - -#if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_PMU Performance Monitoring Unit (PMU) - \brief Type definitions for the Performance Monitoring Unit (PMU) - @{ - */ - -/** - \brief Structure type to access the Performance Monitoring Unit (PMU). - */ -typedef struct -{ - __IOM uint32_t EVCNTR[__PMU_NUM_EVENTCNT]; /*!< Offset: 0x0 (R/W) PMU Event Counter Registers */ -#if __PMU_NUM_EVENTCNT<31 - uint32_t RESERVED0[31U-__PMU_NUM_EVENTCNT]; -#endif - __IOM uint32_t CCNTR; /*!< Offset: 0x7C (R/W) PMU Cycle Counter Register */ - uint32_t RESERVED1[224]; - __IOM uint32_t EVTYPER[__PMU_NUM_EVENTCNT]; /*!< Offset: 0x400 (R/W) PMU Event Type and Filter Registers */ -#if __PMU_NUM_EVENTCNT<31 - uint32_t RESERVED2[31U-__PMU_NUM_EVENTCNT]; -#endif - __IOM uint32_t CCFILTR; /*!< Offset: 0x47C (R/W) PMU Cycle Counter Filter Register */ - uint32_t RESERVED3[480]; - __IOM uint32_t CNTENSET; /*!< Offset: 0xC00 (R/W) PMU Count Enable Set Register */ - uint32_t RESERVED4[7]; - __IOM uint32_t CNTENCLR; /*!< Offset: 0xC20 (R/W) PMU Count Enable Clear Register */ - uint32_t RESERVED5[7]; - __IOM uint32_t INTENSET; /*!< Offset: 0xC40 (R/W) PMU Interrupt Enable Set Register */ - uint32_t RESERVED6[7]; - __IOM uint32_t INTENCLR; /*!< Offset: 0xC60 (R/W) PMU Interrupt Enable Clear Register */ - uint32_t RESERVED7[7]; - __IOM uint32_t OVSCLR; /*!< Offset: 0xC80 (R/W) PMU Overflow Flag Status Clear Register */ - uint32_t RESERVED8[7]; - __IOM uint32_t SWINC; /*!< Offset: 0xCA0 (R/W) PMU Software Increment Register */ - uint32_t RESERVED9[7]; - __IOM uint32_t OVSSET; /*!< Offset: 0xCC0 (R/W) PMU Overflow Flag Status Set Register */ - uint32_t RESERVED10[79]; - __IOM uint32_t TYPE; /*!< Offset: 0xE00 (R/W) PMU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0xE04 (R/W) PMU Control Register */ - uint32_t RESERVED11[108]; - __IOM uint32_t AUTHSTATUS; /*!< Offset: 0xFB8 (R/W) PMU Authentication Status Register */ - __IOM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/W) PMU Device Architecture Register */ - uint32_t RESERVED12[3]; - __IOM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/W) PMU Device Type Register */ - __IOM uint32_t PIDR4; /*!< Offset: 0xFD0 (R/W) PMU Peripheral Identification Register 4 */ - uint32_t RESERVED13[3]; - __IOM uint32_t PIDR0; /*!< Offset: 0xFE0 (R/W) PMU Peripheral Identification Register 0 */ - __IOM uint32_t PIDR1; /*!< Offset: 0xFE4 (R/W) PMU Peripheral Identification Register 1 */ - __IOM uint32_t PIDR2; /*!< Offset: 0xFE8 (R/W) PMU Peripheral Identification Register 2 */ - __IOM uint32_t PIDR3; /*!< Offset: 0xFEC (R/W) PMU Peripheral Identification Register 3 */ - __IOM uint32_t CIDR0; /*!< Offset: 0xFF0 (R/W) PMU Component Identification Register 0 */ - __IOM uint32_t CIDR1; /*!< Offset: 0xFF4 (R/W) PMU Component Identification Register 1 */ - __IOM uint32_t CIDR2; /*!< Offset: 0xFF8 (R/W) PMU Component Identification Register 2 */ - __IOM uint32_t CIDR3; /*!< Offset: 0xFFC (R/W) PMU Component Identification Register 3 */ -} PMU_Type; - -/** \brief PMU Event Counter Registers (0-30) Definitions */ - -#define PMU_EVCNTR_CNT_Pos 0U /*!< PMU EVCNTR: Counter Position */ -#define PMU_EVCNTR_CNT_Msk (0xFFFFUL /*<< PMU_EVCNTRx_CNT_Pos*/) /*!< PMU EVCNTR: Counter Mask */ - -/** \brief PMU Event Type and Filter Registers (0-30) Definitions */ - -#define PMU_EVTYPER_EVENTTOCNT_Pos 0U /*!< PMU EVTYPER: Event to Count Position */ -#define PMU_EVTYPER_EVENTTOCNT_Msk (0xFFFFUL /*<< EVTYPERx_EVENTTOCNT_Pos*/) /*!< PMU EVTYPER: Event to Count Mask */ - -/** \brief PMU Count Enable Set Register Definitions */ - -#define PMU_CNTENSET_CNT0_ENABLE_Pos 0U /*!< PMU CNTENSET: Event Counter 0 Enable Set Position */ -#define PMU_CNTENSET_CNT0_ENABLE_Msk (1UL /*<< PMU_CNTENSET_CNT0_ENABLE_Pos*/) /*!< PMU CNTENSET: Event Counter 0 Enable Set Mask */ - -#define PMU_CNTENSET_CNT1_ENABLE_Pos 1U /*!< PMU CNTENSET: Event Counter 1 Enable Set Position */ -#define PMU_CNTENSET_CNT1_ENABLE_Msk (1UL << PMU_CNTENSET_CNT1_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 1 Enable Set Mask */ - -#define PMU_CNTENSET_CNT2_ENABLE_Pos 2U /*!< PMU CNTENSET: Event Counter 2 Enable Set Position */ -#define PMU_CNTENSET_CNT2_ENABLE_Msk (1UL << PMU_CNTENSET_CNT2_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 2 Enable Set Mask */ - -#define PMU_CNTENSET_CNT3_ENABLE_Pos 3U /*!< PMU CNTENSET: Event Counter 3 Enable Set Position */ -#define PMU_CNTENSET_CNT3_ENABLE_Msk (1UL << PMU_CNTENSET_CNT3_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 3 Enable Set Mask */ - -#define PMU_CNTENSET_CNT4_ENABLE_Pos 4U /*!< PMU CNTENSET: Event Counter 4 Enable Set Position */ -#define PMU_CNTENSET_CNT4_ENABLE_Msk (1UL << PMU_CNTENSET_CNT4_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 4 Enable Set Mask */ - -#define PMU_CNTENSET_CNT5_ENABLE_Pos 5U /*!< PMU CNTENSET: Event Counter 5 Enable Set Position */ -#define PMU_CNTENSET_CNT5_ENABLE_Msk (1UL << PMU_CNTENSET_CNT5_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 5 Enable Set Mask */ - -#define PMU_CNTENSET_CNT6_ENABLE_Pos 6U /*!< PMU CNTENSET: Event Counter 6 Enable Set Position */ -#define PMU_CNTENSET_CNT6_ENABLE_Msk (1UL << PMU_CNTENSET_CNT6_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 6 Enable Set Mask */ - -#define PMU_CNTENSET_CNT7_ENABLE_Pos 7U /*!< PMU CNTENSET: Event Counter 7 Enable Set Position */ -#define PMU_CNTENSET_CNT7_ENABLE_Msk (1UL << PMU_CNTENSET_CNT7_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 7 Enable Set Mask */ - -#define PMU_CNTENSET_CNT8_ENABLE_Pos 8U /*!< PMU CNTENSET: Event Counter 8 Enable Set Position */ -#define PMU_CNTENSET_CNT8_ENABLE_Msk (1UL << PMU_CNTENSET_CNT8_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 8 Enable Set Mask */ - -#define PMU_CNTENSET_CNT9_ENABLE_Pos 9U /*!< PMU CNTENSET: Event Counter 9 Enable Set Position */ -#define PMU_CNTENSET_CNT9_ENABLE_Msk (1UL << PMU_CNTENSET_CNT9_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 9 Enable Set Mask */ - -#define PMU_CNTENSET_CNT10_ENABLE_Pos 10U /*!< PMU CNTENSET: Event Counter 10 Enable Set Position */ -#define PMU_CNTENSET_CNT10_ENABLE_Msk (1UL << PMU_CNTENSET_CNT10_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 10 Enable Set Mask */ - -#define PMU_CNTENSET_CNT11_ENABLE_Pos 11U /*!< PMU CNTENSET: Event Counter 11 Enable Set Position */ -#define PMU_CNTENSET_CNT11_ENABLE_Msk (1UL << PMU_CNTENSET_CNT11_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 11 Enable Set Mask */ - -#define PMU_CNTENSET_CNT12_ENABLE_Pos 12U /*!< PMU CNTENSET: Event Counter 12 Enable Set Position */ -#define PMU_CNTENSET_CNT12_ENABLE_Msk (1UL << PMU_CNTENSET_CNT12_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 12 Enable Set Mask */ - -#define PMU_CNTENSET_CNT13_ENABLE_Pos 13U /*!< PMU CNTENSET: Event Counter 13 Enable Set Position */ -#define PMU_CNTENSET_CNT13_ENABLE_Msk (1UL << PMU_CNTENSET_CNT13_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 13 Enable Set Mask */ - -#define PMU_CNTENSET_CNT14_ENABLE_Pos 14U /*!< PMU CNTENSET: Event Counter 14 Enable Set Position */ -#define PMU_CNTENSET_CNT14_ENABLE_Msk (1UL << PMU_CNTENSET_CNT14_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 14 Enable Set Mask */ - -#define PMU_CNTENSET_CNT15_ENABLE_Pos 15U /*!< PMU CNTENSET: Event Counter 15 Enable Set Position */ -#define PMU_CNTENSET_CNT15_ENABLE_Msk (1UL << PMU_CNTENSET_CNT15_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 15 Enable Set Mask */ - -#define PMU_CNTENSET_CNT16_ENABLE_Pos 16U /*!< PMU CNTENSET: Event Counter 16 Enable Set Position */ -#define PMU_CNTENSET_CNT16_ENABLE_Msk (1UL << PMU_CNTENSET_CNT16_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 16 Enable Set Mask */ - -#define PMU_CNTENSET_CNT17_ENABLE_Pos 17U /*!< PMU CNTENSET: Event Counter 17 Enable Set Position */ -#define PMU_CNTENSET_CNT17_ENABLE_Msk (1UL << PMU_CNTENSET_CNT17_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 17 Enable Set Mask */ - -#define PMU_CNTENSET_CNT18_ENABLE_Pos 18U /*!< PMU CNTENSET: Event Counter 18 Enable Set Position */ -#define PMU_CNTENSET_CNT18_ENABLE_Msk (1UL << PMU_CNTENSET_CNT18_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 18 Enable Set Mask */ - -#define PMU_CNTENSET_CNT19_ENABLE_Pos 19U /*!< PMU CNTENSET: Event Counter 19 Enable Set Position */ -#define PMU_CNTENSET_CNT19_ENABLE_Msk (1UL << PMU_CNTENSET_CNT19_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 19 Enable Set Mask */ - -#define PMU_CNTENSET_CNT20_ENABLE_Pos 20U /*!< PMU CNTENSET: Event Counter 20 Enable Set Position */ -#define PMU_CNTENSET_CNT20_ENABLE_Msk (1UL << PMU_CNTENSET_CNT20_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 20 Enable Set Mask */ - -#define PMU_CNTENSET_CNT21_ENABLE_Pos 21U /*!< PMU CNTENSET: Event Counter 21 Enable Set Position */ -#define PMU_CNTENSET_CNT21_ENABLE_Msk (1UL << PMU_CNTENSET_CNT21_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 21 Enable Set Mask */ - -#define PMU_CNTENSET_CNT22_ENABLE_Pos 22U /*!< PMU CNTENSET: Event Counter 22 Enable Set Position */ -#define PMU_CNTENSET_CNT22_ENABLE_Msk (1UL << PMU_CNTENSET_CNT22_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 22 Enable Set Mask */ - -#define PMU_CNTENSET_CNT23_ENABLE_Pos 23U /*!< PMU CNTENSET: Event Counter 23 Enable Set Position */ -#define PMU_CNTENSET_CNT23_ENABLE_Msk (1UL << PMU_CNTENSET_CNT23_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 23 Enable Set Mask */ - -#define PMU_CNTENSET_CNT24_ENABLE_Pos 24U /*!< PMU CNTENSET: Event Counter 24 Enable Set Position */ -#define PMU_CNTENSET_CNT24_ENABLE_Msk (1UL << PMU_CNTENSET_CNT24_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 24 Enable Set Mask */ - -#define PMU_CNTENSET_CNT25_ENABLE_Pos 25U /*!< PMU CNTENSET: Event Counter 25 Enable Set Position */ -#define PMU_CNTENSET_CNT25_ENABLE_Msk (1UL << PMU_CNTENSET_CNT25_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 25 Enable Set Mask */ - -#define PMU_CNTENSET_CNT26_ENABLE_Pos 26U /*!< PMU CNTENSET: Event Counter 26 Enable Set Position */ -#define PMU_CNTENSET_CNT26_ENABLE_Msk (1UL << PMU_CNTENSET_CNT26_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 26 Enable Set Mask */ - -#define PMU_CNTENSET_CNT27_ENABLE_Pos 27U /*!< PMU CNTENSET: Event Counter 27 Enable Set Position */ -#define PMU_CNTENSET_CNT27_ENABLE_Msk (1UL << PMU_CNTENSET_CNT27_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 27 Enable Set Mask */ - -#define PMU_CNTENSET_CNT28_ENABLE_Pos 28U /*!< PMU CNTENSET: Event Counter 28 Enable Set Position */ -#define PMU_CNTENSET_CNT28_ENABLE_Msk (1UL << PMU_CNTENSET_CNT28_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 28 Enable Set Mask */ - -#define PMU_CNTENSET_CNT29_ENABLE_Pos 29U /*!< PMU CNTENSET: Event Counter 29 Enable Set Position */ -#define PMU_CNTENSET_CNT29_ENABLE_Msk (1UL << PMU_CNTENSET_CNT29_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 29 Enable Set Mask */ - -#define PMU_CNTENSET_CNT30_ENABLE_Pos 30U /*!< PMU CNTENSET: Event Counter 30 Enable Set Position */ -#define PMU_CNTENSET_CNT30_ENABLE_Msk (1UL << PMU_CNTENSET_CNT30_ENABLE_Pos) /*!< PMU CNTENSET: Event Counter 30 Enable Set Mask */ - -#define PMU_CNTENSET_CCNTR_ENABLE_Pos 31U /*!< PMU CNTENSET: Cycle Counter Enable Set Position */ -#define PMU_CNTENSET_CCNTR_ENABLE_Msk (1UL << PMU_CNTENSET_CCNTR_ENABLE_Pos) /*!< PMU CNTENSET: Cycle Counter Enable Set Mask */ - -/** \brief PMU Count Enable Clear Register Definitions */ - -#define PMU_CNTENSET_CNT0_ENABLE_Pos 0U /*!< PMU CNTENCLR: Event Counter 0 Enable Clear Position */ -#define PMU_CNTENCLR_CNT0_ENABLE_Msk (1UL /*<< PMU_CNTENCLR_CNT0_ENABLE_Pos*/) /*!< PMU CNTENCLR: Event Counter 0 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT1_ENABLE_Pos 1U /*!< PMU CNTENCLR: Event Counter 1 Enable Clear Position */ -#define PMU_CNTENCLR_CNT1_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT1_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 1 Enable Clear */ - -#define PMU_CNTENCLR_CNT2_ENABLE_Pos 2U /*!< PMU CNTENCLR: Event Counter 2 Enable Clear Position */ -#define PMU_CNTENCLR_CNT2_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT2_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 2 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT3_ENABLE_Pos 3U /*!< PMU CNTENCLR: Event Counter 3 Enable Clear Position */ -#define PMU_CNTENCLR_CNT3_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT3_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 3 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT4_ENABLE_Pos 4U /*!< PMU CNTENCLR: Event Counter 4 Enable Clear Position */ -#define PMU_CNTENCLR_CNT4_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT4_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 4 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT5_ENABLE_Pos 5U /*!< PMU CNTENCLR: Event Counter 5 Enable Clear Position */ -#define PMU_CNTENCLR_CNT5_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT5_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 5 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT6_ENABLE_Pos 6U /*!< PMU CNTENCLR: Event Counter 6 Enable Clear Position */ -#define PMU_CNTENCLR_CNT6_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT6_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 6 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT7_ENABLE_Pos 7U /*!< PMU CNTENCLR: Event Counter 7 Enable Clear Position */ -#define PMU_CNTENCLR_CNT7_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT7_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 7 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT8_ENABLE_Pos 8U /*!< PMU CNTENCLR: Event Counter 8 Enable Clear Position */ -#define PMU_CNTENCLR_CNT8_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT8_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 8 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT9_ENABLE_Pos 9U /*!< PMU CNTENCLR: Event Counter 9 Enable Clear Position */ -#define PMU_CNTENCLR_CNT9_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT9_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 9 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT10_ENABLE_Pos 10U /*!< PMU CNTENCLR: Event Counter 10 Enable Clear Position */ -#define PMU_CNTENCLR_CNT10_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT10_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 10 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT11_ENABLE_Pos 11U /*!< PMU CNTENCLR: Event Counter 11 Enable Clear Position */ -#define PMU_CNTENCLR_CNT11_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT11_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 11 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT12_ENABLE_Pos 12U /*!< PMU CNTENCLR: Event Counter 12 Enable Clear Position */ -#define PMU_CNTENCLR_CNT12_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT12_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 12 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT13_ENABLE_Pos 13U /*!< PMU CNTENCLR: Event Counter 13 Enable Clear Position */ -#define PMU_CNTENCLR_CNT13_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT13_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 13 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT14_ENABLE_Pos 14U /*!< PMU CNTENCLR: Event Counter 14 Enable Clear Position */ -#define PMU_CNTENCLR_CNT14_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT14_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 14 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT15_ENABLE_Pos 15U /*!< PMU CNTENCLR: Event Counter 15 Enable Clear Position */ -#define PMU_CNTENCLR_CNT15_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT15_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 15 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT16_ENABLE_Pos 16U /*!< PMU CNTENCLR: Event Counter 16 Enable Clear Position */ -#define PMU_CNTENCLR_CNT16_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT16_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 16 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT17_ENABLE_Pos 17U /*!< PMU CNTENCLR: Event Counter 17 Enable Clear Position */ -#define PMU_CNTENCLR_CNT17_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT17_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 17 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT18_ENABLE_Pos 18U /*!< PMU CNTENCLR: Event Counter 18 Enable Clear Position */ -#define PMU_CNTENCLR_CNT18_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT18_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 18 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT19_ENABLE_Pos 19U /*!< PMU CNTENCLR: Event Counter 19 Enable Clear Position */ -#define PMU_CNTENCLR_CNT19_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT19_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 19 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT20_ENABLE_Pos 20U /*!< PMU CNTENCLR: Event Counter 20 Enable Clear Position */ -#define PMU_CNTENCLR_CNT20_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT20_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 20 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT21_ENABLE_Pos 21U /*!< PMU CNTENCLR: Event Counter 21 Enable Clear Position */ -#define PMU_CNTENCLR_CNT21_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT21_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 21 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT22_ENABLE_Pos 22U /*!< PMU CNTENCLR: Event Counter 22 Enable Clear Position */ -#define PMU_CNTENCLR_CNT22_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT22_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 22 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT23_ENABLE_Pos 23U /*!< PMU CNTENCLR: Event Counter 23 Enable Clear Position */ -#define PMU_CNTENCLR_CNT23_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT23_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 23 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT24_ENABLE_Pos 24U /*!< PMU CNTENCLR: Event Counter 24 Enable Clear Position */ -#define PMU_CNTENCLR_CNT24_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT24_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 24 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT25_ENABLE_Pos 25U /*!< PMU CNTENCLR: Event Counter 25 Enable Clear Position */ -#define PMU_CNTENCLR_CNT25_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT25_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 25 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT26_ENABLE_Pos 26U /*!< PMU CNTENCLR: Event Counter 26 Enable Clear Position */ -#define PMU_CNTENCLR_CNT26_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT26_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 26 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT27_ENABLE_Pos 27U /*!< PMU CNTENCLR: Event Counter 27 Enable Clear Position */ -#define PMU_CNTENCLR_CNT27_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT27_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 27 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT28_ENABLE_Pos 28U /*!< PMU CNTENCLR: Event Counter 28 Enable Clear Position */ -#define PMU_CNTENCLR_CNT28_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT28_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 28 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT29_ENABLE_Pos 29U /*!< PMU CNTENCLR: Event Counter 29 Enable Clear Position */ -#define PMU_CNTENCLR_CNT29_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT29_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 29 Enable Clear Mask */ - -#define PMU_CNTENCLR_CNT30_ENABLE_Pos 30U /*!< PMU CNTENCLR: Event Counter 30 Enable Clear Position */ -#define PMU_CNTENCLR_CNT30_ENABLE_Msk (1UL << PMU_CNTENCLR_CNT30_ENABLE_Pos) /*!< PMU CNTENCLR: Event Counter 30 Enable Clear Mask */ - -#define PMU_CNTENCLR_CCNTR_ENABLE_Pos 31U /*!< PMU CNTENCLR: Cycle Counter Enable Clear Position */ -#define PMU_CNTENCLR_CCNTR_ENABLE_Msk (1UL << PMU_CNTENCLR_CCNTR_ENABLE_Pos) /*!< PMU CNTENCLR: Cycle Counter Enable Clear Mask */ - -/** \brief PMU Interrupt Enable Set Register Definitions */ - -#define PMU_INTENSET_CNT0_ENABLE_Pos 0U /*!< PMU INTENSET: Event Counter 0 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT0_ENABLE_Msk (1UL /*<< PMU_INTENSET_CNT0_ENABLE_Pos*/) /*!< PMU INTENSET: Event Counter 0 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT1_ENABLE_Pos 1U /*!< PMU INTENSET: Event Counter 1 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT1_ENABLE_Msk (1UL << PMU_INTENSET_CNT1_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 1 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT2_ENABLE_Pos 2U /*!< PMU INTENSET: Event Counter 2 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT2_ENABLE_Msk (1UL << PMU_INTENSET_CNT2_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 2 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT3_ENABLE_Pos 3U /*!< PMU INTENSET: Event Counter 3 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT3_ENABLE_Msk (1UL << PMU_INTENSET_CNT3_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 3 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT4_ENABLE_Pos 4U /*!< PMU INTENSET: Event Counter 4 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT4_ENABLE_Msk (1UL << PMU_INTENSET_CNT4_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 4 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT5_ENABLE_Pos 5U /*!< PMU INTENSET: Event Counter 5 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT5_ENABLE_Msk (1UL << PMU_INTENSET_CNT5_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 5 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT6_ENABLE_Pos 6U /*!< PMU INTENSET: Event Counter 6 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT6_ENABLE_Msk (1UL << PMU_INTENSET_CNT6_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 6 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT7_ENABLE_Pos 7U /*!< PMU INTENSET: Event Counter 7 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT7_ENABLE_Msk (1UL << PMU_INTENSET_CNT7_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 7 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT8_ENABLE_Pos 8U /*!< PMU INTENSET: Event Counter 8 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT8_ENABLE_Msk (1UL << PMU_INTENSET_CNT8_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 8 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT9_ENABLE_Pos 9U /*!< PMU INTENSET: Event Counter 9 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT9_ENABLE_Msk (1UL << PMU_INTENSET_CNT9_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 9 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT10_ENABLE_Pos 10U /*!< PMU INTENSET: Event Counter 10 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT10_ENABLE_Msk (1UL << PMU_INTENSET_CNT10_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 10 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT11_ENABLE_Pos 11U /*!< PMU INTENSET: Event Counter 11 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT11_ENABLE_Msk (1UL << PMU_INTENSET_CNT11_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 11 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT12_ENABLE_Pos 12U /*!< PMU INTENSET: Event Counter 12 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT12_ENABLE_Msk (1UL << PMU_INTENSET_CNT12_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 12 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT13_ENABLE_Pos 13U /*!< PMU INTENSET: Event Counter 13 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT13_ENABLE_Msk (1UL << PMU_INTENSET_CNT13_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 13 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT14_ENABLE_Pos 14U /*!< PMU INTENSET: Event Counter 14 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT14_ENABLE_Msk (1UL << PMU_INTENSET_CNT14_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 14 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT15_ENABLE_Pos 15U /*!< PMU INTENSET: Event Counter 15 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT15_ENABLE_Msk (1UL << PMU_INTENSET_CNT15_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 15 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT16_ENABLE_Pos 16U /*!< PMU INTENSET: Event Counter 16 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT16_ENABLE_Msk (1UL << PMU_INTENSET_CNT16_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 16 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT17_ENABLE_Pos 17U /*!< PMU INTENSET: Event Counter 17 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT17_ENABLE_Msk (1UL << PMU_INTENSET_CNT17_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 17 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT18_ENABLE_Pos 18U /*!< PMU INTENSET: Event Counter 18 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT18_ENABLE_Msk (1UL << PMU_INTENSET_CNT18_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 18 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT19_ENABLE_Pos 19U /*!< PMU INTENSET: Event Counter 19 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT19_ENABLE_Msk (1UL << PMU_INTENSET_CNT19_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 19 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT20_ENABLE_Pos 20U /*!< PMU INTENSET: Event Counter 20 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT20_ENABLE_Msk (1UL << PMU_INTENSET_CNT20_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 20 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT21_ENABLE_Pos 21U /*!< PMU INTENSET: Event Counter 21 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT21_ENABLE_Msk (1UL << PMU_INTENSET_CNT21_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 21 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT22_ENABLE_Pos 22U /*!< PMU INTENSET: Event Counter 22 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT22_ENABLE_Msk (1UL << PMU_INTENSET_CNT22_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 22 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT23_ENABLE_Pos 23U /*!< PMU INTENSET: Event Counter 23 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT23_ENABLE_Msk (1UL << PMU_INTENSET_CNT23_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 23 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT24_ENABLE_Pos 24U /*!< PMU INTENSET: Event Counter 24 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT24_ENABLE_Msk (1UL << PMU_INTENSET_CNT24_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 24 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT25_ENABLE_Pos 25U /*!< PMU INTENSET: Event Counter 25 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT25_ENABLE_Msk (1UL << PMU_INTENSET_CNT25_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 25 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT26_ENABLE_Pos 26U /*!< PMU INTENSET: Event Counter 26 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT26_ENABLE_Msk (1UL << PMU_INTENSET_CNT26_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 26 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT27_ENABLE_Pos 27U /*!< PMU INTENSET: Event Counter 27 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT27_ENABLE_Msk (1UL << PMU_INTENSET_CNT27_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 27 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT28_ENABLE_Pos 28U /*!< PMU INTENSET: Event Counter 28 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT28_ENABLE_Msk (1UL << PMU_INTENSET_CNT28_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 28 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT29_ENABLE_Pos 29U /*!< PMU INTENSET: Event Counter 29 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT29_ENABLE_Msk (1UL << PMU_INTENSET_CNT29_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 29 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CNT30_ENABLE_Pos 30U /*!< PMU INTENSET: Event Counter 30 Interrupt Enable Set Position */ -#define PMU_INTENSET_CNT30_ENABLE_Msk (1UL << PMU_INTENSET_CNT30_ENABLE_Pos) /*!< PMU INTENSET: Event Counter 30 Interrupt Enable Set Mask */ - -#define PMU_INTENSET_CYCCNT_ENABLE_Pos 31U /*!< PMU INTENSET: Cycle Counter Interrupt Enable Set Position */ -#define PMU_INTENSET_CCYCNT_ENABLE_Msk (1UL << PMU_INTENSET_CYCCNT_ENABLE_Pos) /*!< PMU INTENSET: Cycle Counter Interrupt Enable Set Mask */ - -/** \brief PMU Interrupt Enable Clear Register Definitions */ - -#define PMU_INTENSET_CNT0_ENABLE_Pos 0U /*!< PMU INTENCLR: Event Counter 0 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT0_ENABLE_Msk (1UL /*<< PMU_INTENCLR_CNT0_ENABLE_Pos*/) /*!< PMU INTENCLR: Event Counter 0 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT1_ENABLE_Pos 1U /*!< PMU INTENCLR: Event Counter 1 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT1_ENABLE_Msk (1UL << PMU_INTENCLR_CNT1_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 1 Interrupt Enable Clear */ - -#define PMU_INTENCLR_CNT2_ENABLE_Pos 2U /*!< PMU INTENCLR: Event Counter 2 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT2_ENABLE_Msk (1UL << PMU_INTENCLR_CNT2_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 2 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT3_ENABLE_Pos 3U /*!< PMU INTENCLR: Event Counter 3 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT3_ENABLE_Msk (1UL << PMU_INTENCLR_CNT3_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 3 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT4_ENABLE_Pos 4U /*!< PMU INTENCLR: Event Counter 4 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT4_ENABLE_Msk (1UL << PMU_INTENCLR_CNT4_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 4 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT5_ENABLE_Pos 5U /*!< PMU INTENCLR: Event Counter 5 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT5_ENABLE_Msk (1UL << PMU_INTENCLR_CNT5_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 5 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT6_ENABLE_Pos 6U /*!< PMU INTENCLR: Event Counter 6 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT6_ENABLE_Msk (1UL << PMU_INTENCLR_CNT6_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 6 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT7_ENABLE_Pos 7U /*!< PMU INTENCLR: Event Counter 7 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT7_ENABLE_Msk (1UL << PMU_INTENCLR_CNT7_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 7 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT8_ENABLE_Pos 8U /*!< PMU INTENCLR: Event Counter 8 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT8_ENABLE_Msk (1UL << PMU_INTENCLR_CNT8_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 8 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT9_ENABLE_Pos 9U /*!< PMU INTENCLR: Event Counter 9 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT9_ENABLE_Msk (1UL << PMU_INTENCLR_CNT9_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 9 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT10_ENABLE_Pos 10U /*!< PMU INTENCLR: Event Counter 10 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT10_ENABLE_Msk (1UL << PMU_INTENCLR_CNT10_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 10 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT11_ENABLE_Pos 11U /*!< PMU INTENCLR: Event Counter 11 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT11_ENABLE_Msk (1UL << PMU_INTENCLR_CNT11_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 11 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT12_ENABLE_Pos 12U /*!< PMU INTENCLR: Event Counter 12 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT12_ENABLE_Msk (1UL << PMU_INTENCLR_CNT12_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 12 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT13_ENABLE_Pos 13U /*!< PMU INTENCLR: Event Counter 13 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT13_ENABLE_Msk (1UL << PMU_INTENCLR_CNT13_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 13 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT14_ENABLE_Pos 14U /*!< PMU INTENCLR: Event Counter 14 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT14_ENABLE_Msk (1UL << PMU_INTENCLR_CNT14_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 14 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT15_ENABLE_Pos 15U /*!< PMU INTENCLR: Event Counter 15 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT15_ENABLE_Msk (1UL << PMU_INTENCLR_CNT15_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 15 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT16_ENABLE_Pos 16U /*!< PMU INTENCLR: Event Counter 16 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT16_ENABLE_Msk (1UL << PMU_INTENCLR_CNT16_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 16 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT17_ENABLE_Pos 17U /*!< PMU INTENCLR: Event Counter 17 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT17_ENABLE_Msk (1UL << PMU_INTENCLR_CNT17_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 17 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT18_ENABLE_Pos 18U /*!< PMU INTENCLR: Event Counter 18 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT18_ENABLE_Msk (1UL << PMU_INTENCLR_CNT18_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 18 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT19_ENABLE_Pos 19U /*!< PMU INTENCLR: Event Counter 19 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT19_ENABLE_Msk (1UL << PMU_INTENCLR_CNT19_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 19 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT20_ENABLE_Pos 20U /*!< PMU INTENCLR: Event Counter 20 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT20_ENABLE_Msk (1UL << PMU_INTENCLR_CNT20_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 20 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT21_ENABLE_Pos 21U /*!< PMU INTENCLR: Event Counter 21 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT21_ENABLE_Msk (1UL << PMU_INTENCLR_CNT21_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 21 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT22_ENABLE_Pos 22U /*!< PMU INTENCLR: Event Counter 22 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT22_ENABLE_Msk (1UL << PMU_INTENCLR_CNT22_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 22 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT23_ENABLE_Pos 23U /*!< PMU INTENCLR: Event Counter 23 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT23_ENABLE_Msk (1UL << PMU_INTENCLR_CNT23_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 23 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT24_ENABLE_Pos 24U /*!< PMU INTENCLR: Event Counter 24 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT24_ENABLE_Msk (1UL << PMU_INTENCLR_CNT24_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 24 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT25_ENABLE_Pos 25U /*!< PMU INTENCLR: Event Counter 25 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT25_ENABLE_Msk (1UL << PMU_INTENCLR_CNT25_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 25 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT26_ENABLE_Pos 26U /*!< PMU INTENCLR: Event Counter 26 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT26_ENABLE_Msk (1UL << PMU_INTENCLR_CNT26_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 26 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT27_ENABLE_Pos 27U /*!< PMU INTENCLR: Event Counter 27 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT27_ENABLE_Msk (1UL << PMU_INTENCLR_CNT27_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 27 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT28_ENABLE_Pos 28U /*!< PMU INTENCLR: Event Counter 28 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT28_ENABLE_Msk (1UL << PMU_INTENCLR_CNT28_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 28 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT29_ENABLE_Pos 29U /*!< PMU INTENCLR: Event Counter 29 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT29_ENABLE_Msk (1UL << PMU_INTENCLR_CNT29_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 29 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CNT30_ENABLE_Pos 30U /*!< PMU INTENCLR: Event Counter 30 Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CNT30_ENABLE_Msk (1UL << PMU_INTENCLR_CNT30_ENABLE_Pos) /*!< PMU INTENCLR: Event Counter 30 Interrupt Enable Clear Mask */ - -#define PMU_INTENCLR_CYCCNT_ENABLE_Pos 31U /*!< PMU INTENCLR: Cycle Counter Interrupt Enable Clear Position */ -#define PMU_INTENCLR_CYCCNT_ENABLE_Msk (1UL << PMU_INTENCLR_CYCCNT_ENABLE_Pos) /*!< PMU INTENCLR: Cycle Counter Interrupt Enable Clear Mask */ - -/** \brief PMU Overflow Flag Status Set Register Definitions */ - -#define PMU_OVSSET_CNT0_STATUS_Pos 0U /*!< PMU OVSSET: Event Counter 0 Overflow Set Position */ -#define PMU_OVSSET_CNT0_STATUS_Msk (1UL /*<< PMU_OVSSET_CNT0_STATUS_Pos*/) /*!< PMU OVSSET: Event Counter 0 Overflow Set Mask */ - -#define PMU_OVSSET_CNT1_STATUS_Pos 1U /*!< PMU OVSSET: Event Counter 1 Overflow Set Position */ -#define PMU_OVSSET_CNT1_STATUS_Msk (1UL << PMU_OVSSET_CNT1_STATUS_Pos) /*!< PMU OVSSET: Event Counter 1 Overflow Set Mask */ - -#define PMU_OVSSET_CNT2_STATUS_Pos 2U /*!< PMU OVSSET: Event Counter 2 Overflow Set Position */ -#define PMU_OVSSET_CNT2_STATUS_Msk (1UL << PMU_OVSSET_CNT2_STATUS_Pos) /*!< PMU OVSSET: Event Counter 2 Overflow Set Mask */ - -#define PMU_OVSSET_CNT3_STATUS_Pos 3U /*!< PMU OVSSET: Event Counter 3 Overflow Set Position */ -#define PMU_OVSSET_CNT3_STATUS_Msk (1UL << PMU_OVSSET_CNT3_STATUS_Pos) /*!< PMU OVSSET: Event Counter 3 Overflow Set Mask */ - -#define PMU_OVSSET_CNT4_STATUS_Pos 4U /*!< PMU OVSSET: Event Counter 4 Overflow Set Position */ -#define PMU_OVSSET_CNT4_STATUS_Msk (1UL << PMU_OVSSET_CNT4_STATUS_Pos) /*!< PMU OVSSET: Event Counter 4 Overflow Set Mask */ - -#define PMU_OVSSET_CNT5_STATUS_Pos 5U /*!< PMU OVSSET: Event Counter 5 Overflow Set Position */ -#define PMU_OVSSET_CNT5_STATUS_Msk (1UL << PMU_OVSSET_CNT5_STATUS_Pos) /*!< PMU OVSSET: Event Counter 5 Overflow Set Mask */ - -#define PMU_OVSSET_CNT6_STATUS_Pos 6U /*!< PMU OVSSET: Event Counter 6 Overflow Set Position */ -#define PMU_OVSSET_CNT6_STATUS_Msk (1UL << PMU_OVSSET_CNT6_STATUS_Pos) /*!< PMU OVSSET: Event Counter 6 Overflow Set Mask */ - -#define PMU_OVSSET_CNT7_STATUS_Pos 7U /*!< PMU OVSSET: Event Counter 7 Overflow Set Position */ -#define PMU_OVSSET_CNT7_STATUS_Msk (1UL << PMU_OVSSET_CNT7_STATUS_Pos) /*!< PMU OVSSET: Event Counter 7 Overflow Set Mask */ - -#define PMU_OVSSET_CNT8_STATUS_Pos 8U /*!< PMU OVSSET: Event Counter 8 Overflow Set Position */ -#define PMU_OVSSET_CNT8_STATUS_Msk (1UL << PMU_OVSSET_CNT8_STATUS_Pos) /*!< PMU OVSSET: Event Counter 8 Overflow Set Mask */ - -#define PMU_OVSSET_CNT9_STATUS_Pos 9U /*!< PMU OVSSET: Event Counter 9 Overflow Set Position */ -#define PMU_OVSSET_CNT9_STATUS_Msk (1UL << PMU_OVSSET_CNT9_STATUS_Pos) /*!< PMU OVSSET: Event Counter 9 Overflow Set Mask */ - -#define PMU_OVSSET_CNT10_STATUS_Pos 10U /*!< PMU OVSSET: Event Counter 10 Overflow Set Position */ -#define PMU_OVSSET_CNT10_STATUS_Msk (1UL << PMU_OVSSET_CNT10_STATUS_Pos) /*!< PMU OVSSET: Event Counter 10 Overflow Set Mask */ - -#define PMU_OVSSET_CNT11_STATUS_Pos 11U /*!< PMU OVSSET: Event Counter 11 Overflow Set Position */ -#define PMU_OVSSET_CNT11_STATUS_Msk (1UL << PMU_OVSSET_CNT11_STATUS_Pos) /*!< PMU OVSSET: Event Counter 11 Overflow Set Mask */ - -#define PMU_OVSSET_CNT12_STATUS_Pos 12U /*!< PMU OVSSET: Event Counter 12 Overflow Set Position */ -#define PMU_OVSSET_CNT12_STATUS_Msk (1UL << PMU_OVSSET_CNT12_STATUS_Pos) /*!< PMU OVSSET: Event Counter 12 Overflow Set Mask */ - -#define PMU_OVSSET_CNT13_STATUS_Pos 13U /*!< PMU OVSSET: Event Counter 13 Overflow Set Position */ -#define PMU_OVSSET_CNT13_STATUS_Msk (1UL << PMU_OVSSET_CNT13_STATUS_Pos) /*!< PMU OVSSET: Event Counter 13 Overflow Set Mask */ - -#define PMU_OVSSET_CNT14_STATUS_Pos 14U /*!< PMU OVSSET: Event Counter 14 Overflow Set Position */ -#define PMU_OVSSET_CNT14_STATUS_Msk (1UL << PMU_OVSSET_CNT14_STATUS_Pos) /*!< PMU OVSSET: Event Counter 14 Overflow Set Mask */ - -#define PMU_OVSSET_CNT15_STATUS_Pos 15U /*!< PMU OVSSET: Event Counter 15 Overflow Set Position */ -#define PMU_OVSSET_CNT15_STATUS_Msk (1UL << PMU_OVSSET_CNT15_STATUS_Pos) /*!< PMU OVSSET: Event Counter 15 Overflow Set Mask */ - -#define PMU_OVSSET_CNT16_STATUS_Pos 16U /*!< PMU OVSSET: Event Counter 16 Overflow Set Position */ -#define PMU_OVSSET_CNT16_STATUS_Msk (1UL << PMU_OVSSET_CNT16_STATUS_Pos) /*!< PMU OVSSET: Event Counter 16 Overflow Set Mask */ - -#define PMU_OVSSET_CNT17_STATUS_Pos 17U /*!< PMU OVSSET: Event Counter 17 Overflow Set Position */ -#define PMU_OVSSET_CNT17_STATUS_Msk (1UL << PMU_OVSSET_CNT17_STATUS_Pos) /*!< PMU OVSSET: Event Counter 17 Overflow Set Mask */ - -#define PMU_OVSSET_CNT18_STATUS_Pos 18U /*!< PMU OVSSET: Event Counter 18 Overflow Set Position */ -#define PMU_OVSSET_CNT18_STATUS_Msk (1UL << PMU_OVSSET_CNT18_STATUS_Pos) /*!< PMU OVSSET: Event Counter 18 Overflow Set Mask */ - -#define PMU_OVSSET_CNT19_STATUS_Pos 19U /*!< PMU OVSSET: Event Counter 19 Overflow Set Position */ -#define PMU_OVSSET_CNT19_STATUS_Msk (1UL << PMU_OVSSET_CNT19_STATUS_Pos) /*!< PMU OVSSET: Event Counter 19 Overflow Set Mask */ - -#define PMU_OVSSET_CNT20_STATUS_Pos 20U /*!< PMU OVSSET: Event Counter 20 Overflow Set Position */ -#define PMU_OVSSET_CNT20_STATUS_Msk (1UL << PMU_OVSSET_CNT20_STATUS_Pos) /*!< PMU OVSSET: Event Counter 20 Overflow Set Mask */ - -#define PMU_OVSSET_CNT21_STATUS_Pos 21U /*!< PMU OVSSET: Event Counter 21 Overflow Set Position */ -#define PMU_OVSSET_CNT21_STATUS_Msk (1UL << PMU_OVSSET_CNT21_STATUS_Pos) /*!< PMU OVSSET: Event Counter 21 Overflow Set Mask */ - -#define PMU_OVSSET_CNT22_STATUS_Pos 22U /*!< PMU OVSSET: Event Counter 22 Overflow Set Position */ -#define PMU_OVSSET_CNT22_STATUS_Msk (1UL << PMU_OVSSET_CNT22_STATUS_Pos) /*!< PMU OVSSET: Event Counter 22 Overflow Set Mask */ - -#define PMU_OVSSET_CNT23_STATUS_Pos 23U /*!< PMU OVSSET: Event Counter 23 Overflow Set Position */ -#define PMU_OVSSET_CNT23_STATUS_Msk (1UL << PMU_OVSSET_CNT23_STATUS_Pos) /*!< PMU OVSSET: Event Counter 23 Overflow Set Mask */ - -#define PMU_OVSSET_CNT24_STATUS_Pos 24U /*!< PMU OVSSET: Event Counter 24 Overflow Set Position */ -#define PMU_OVSSET_CNT24_STATUS_Msk (1UL << PMU_OVSSET_CNT24_STATUS_Pos) /*!< PMU OVSSET: Event Counter 24 Overflow Set Mask */ - -#define PMU_OVSSET_CNT25_STATUS_Pos 25U /*!< PMU OVSSET: Event Counter 25 Overflow Set Position */ -#define PMU_OVSSET_CNT25_STATUS_Msk (1UL << PMU_OVSSET_CNT25_STATUS_Pos) /*!< PMU OVSSET: Event Counter 25 Overflow Set Mask */ - -#define PMU_OVSSET_CNT26_STATUS_Pos 26U /*!< PMU OVSSET: Event Counter 26 Overflow Set Position */ -#define PMU_OVSSET_CNT26_STATUS_Msk (1UL << PMU_OVSSET_CNT26_STATUS_Pos) /*!< PMU OVSSET: Event Counter 26 Overflow Set Mask */ - -#define PMU_OVSSET_CNT27_STATUS_Pos 27U /*!< PMU OVSSET: Event Counter 27 Overflow Set Position */ -#define PMU_OVSSET_CNT27_STATUS_Msk (1UL << PMU_OVSSET_CNT27_STATUS_Pos) /*!< PMU OVSSET: Event Counter 27 Overflow Set Mask */ - -#define PMU_OVSSET_CNT28_STATUS_Pos 28U /*!< PMU OVSSET: Event Counter 28 Overflow Set Position */ -#define PMU_OVSSET_CNT28_STATUS_Msk (1UL << PMU_OVSSET_CNT28_STATUS_Pos) /*!< PMU OVSSET: Event Counter 28 Overflow Set Mask */ - -#define PMU_OVSSET_CNT29_STATUS_Pos 29U /*!< PMU OVSSET: Event Counter 29 Overflow Set Position */ -#define PMU_OVSSET_CNT29_STATUS_Msk (1UL << PMU_OVSSET_CNT29_STATUS_Pos) /*!< PMU OVSSET: Event Counter 29 Overflow Set Mask */ - -#define PMU_OVSSET_CNT30_STATUS_Pos 30U /*!< PMU OVSSET: Event Counter 30 Overflow Set Position */ -#define PMU_OVSSET_CNT30_STATUS_Msk (1UL << PMU_OVSSET_CNT30_STATUS_Pos) /*!< PMU OVSSET: Event Counter 30 Overflow Set Mask */ - -#define PMU_OVSSET_CYCCNT_STATUS_Pos 31U /*!< PMU OVSSET: Cycle Counter Overflow Set Position */ -#define PMU_OVSSET_CYCCNT_STATUS_Msk (1UL << PMU_OVSSET_CYCCNT_STATUS_Pos) /*!< PMU OVSSET: Cycle Counter Overflow Set Mask */ - -/** \brief PMU Overflow Flag Status Clear Register Definitions */ - -#define PMU_OVSCLR_CNT0_STATUS_Pos 0U /*!< PMU OVSCLR: Event Counter 0 Overflow Clear Position */ -#define PMU_OVSCLR_CNT0_STATUS_Msk (1UL /*<< PMU_OVSCLR_CNT0_STATUS_Pos*/) /*!< PMU OVSCLR: Event Counter 0 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT1_STATUS_Pos 1U /*!< PMU OVSCLR: Event Counter 1 Overflow Clear Position */ -#define PMU_OVSCLR_CNT1_STATUS_Msk (1UL << PMU_OVSCLR_CNT1_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 1 Overflow Clear */ - -#define PMU_OVSCLR_CNT2_STATUS_Pos 2U /*!< PMU OVSCLR: Event Counter 2 Overflow Clear Position */ -#define PMU_OVSCLR_CNT2_STATUS_Msk (1UL << PMU_OVSCLR_CNT2_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 2 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT3_STATUS_Pos 3U /*!< PMU OVSCLR: Event Counter 3 Overflow Clear Position */ -#define PMU_OVSCLR_CNT3_STATUS_Msk (1UL << PMU_OVSCLR_CNT3_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 3 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT4_STATUS_Pos 4U /*!< PMU OVSCLR: Event Counter 4 Overflow Clear Position */ -#define PMU_OVSCLR_CNT4_STATUS_Msk (1UL << PMU_OVSCLR_CNT4_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 4 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT5_STATUS_Pos 5U /*!< PMU OVSCLR: Event Counter 5 Overflow Clear Position */ -#define PMU_OVSCLR_CNT5_STATUS_Msk (1UL << PMU_OVSCLR_CNT5_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 5 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT6_STATUS_Pos 6U /*!< PMU OVSCLR: Event Counter 6 Overflow Clear Position */ -#define PMU_OVSCLR_CNT6_STATUS_Msk (1UL << PMU_OVSCLR_CNT6_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 6 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT7_STATUS_Pos 7U /*!< PMU OVSCLR: Event Counter 7 Overflow Clear Position */ -#define PMU_OVSCLR_CNT7_STATUS_Msk (1UL << PMU_OVSCLR_CNT7_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 7 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT8_STATUS_Pos 8U /*!< PMU OVSCLR: Event Counter 8 Overflow Clear Position */ -#define PMU_OVSCLR_CNT8_STATUS_Msk (1UL << PMU_OVSCLR_CNT8_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 8 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT9_STATUS_Pos 9U /*!< PMU OVSCLR: Event Counter 9 Overflow Clear Position */ -#define PMU_OVSCLR_CNT9_STATUS_Msk (1UL << PMU_OVSCLR_CNT9_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 9 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT10_STATUS_Pos 10U /*!< PMU OVSCLR: Event Counter 10 Overflow Clear Position */ -#define PMU_OVSCLR_CNT10_STATUS_Msk (1UL << PMU_OVSCLR_CNT10_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 10 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT11_STATUS_Pos 11U /*!< PMU OVSCLR: Event Counter 11 Overflow Clear Position */ -#define PMU_OVSCLR_CNT11_STATUS_Msk (1UL << PMU_OVSCLR_CNT11_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 11 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT12_STATUS_Pos 12U /*!< PMU OVSCLR: Event Counter 12 Overflow Clear Position */ -#define PMU_OVSCLR_CNT12_STATUS_Msk (1UL << PMU_OVSCLR_CNT12_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 12 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT13_STATUS_Pos 13U /*!< PMU OVSCLR: Event Counter 13 Overflow Clear Position */ -#define PMU_OVSCLR_CNT13_STATUS_Msk (1UL << PMU_OVSCLR_CNT13_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 13 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT14_STATUS_Pos 14U /*!< PMU OVSCLR: Event Counter 14 Overflow Clear Position */ -#define PMU_OVSCLR_CNT14_STATUS_Msk (1UL << PMU_OVSCLR_CNT14_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 14 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT15_STATUS_Pos 15U /*!< PMU OVSCLR: Event Counter 15 Overflow Clear Position */ -#define PMU_OVSCLR_CNT15_STATUS_Msk (1UL << PMU_OVSCLR_CNT15_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 15 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT16_STATUS_Pos 16U /*!< PMU OVSCLR: Event Counter 16 Overflow Clear Position */ -#define PMU_OVSCLR_CNT16_STATUS_Msk (1UL << PMU_OVSCLR_CNT16_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 16 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT17_STATUS_Pos 17U /*!< PMU OVSCLR: Event Counter 17 Overflow Clear Position */ -#define PMU_OVSCLR_CNT17_STATUS_Msk (1UL << PMU_OVSCLR_CNT17_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 17 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT18_STATUS_Pos 18U /*!< PMU OVSCLR: Event Counter 18 Overflow Clear Position */ -#define PMU_OVSCLR_CNT18_STATUS_Msk (1UL << PMU_OVSCLR_CNT18_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 18 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT19_STATUS_Pos 19U /*!< PMU OVSCLR: Event Counter 19 Overflow Clear Position */ -#define PMU_OVSCLR_CNT19_STATUS_Msk (1UL << PMU_OVSCLR_CNT19_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 19 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT20_STATUS_Pos 20U /*!< PMU OVSCLR: Event Counter 20 Overflow Clear Position */ -#define PMU_OVSCLR_CNT20_STATUS_Msk (1UL << PMU_OVSCLR_CNT20_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 20 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT21_STATUS_Pos 21U /*!< PMU OVSCLR: Event Counter 21 Overflow Clear Position */ -#define PMU_OVSCLR_CNT21_STATUS_Msk (1UL << PMU_OVSCLR_CNT21_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 21 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT22_STATUS_Pos 22U /*!< PMU OVSCLR: Event Counter 22 Overflow Clear Position */ -#define PMU_OVSCLR_CNT22_STATUS_Msk (1UL << PMU_OVSCLR_CNT22_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 22 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT23_STATUS_Pos 23U /*!< PMU OVSCLR: Event Counter 23 Overflow Clear Position */ -#define PMU_OVSCLR_CNT23_STATUS_Msk (1UL << PMU_OVSCLR_CNT23_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 23 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT24_STATUS_Pos 24U /*!< PMU OVSCLR: Event Counter 24 Overflow Clear Position */ -#define PMU_OVSCLR_CNT24_STATUS_Msk (1UL << PMU_OVSCLR_CNT24_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 24 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT25_STATUS_Pos 25U /*!< PMU OVSCLR: Event Counter 25 Overflow Clear Position */ -#define PMU_OVSCLR_CNT25_STATUS_Msk (1UL << PMU_OVSCLR_CNT25_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 25 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT26_STATUS_Pos 26U /*!< PMU OVSCLR: Event Counter 26 Overflow Clear Position */ -#define PMU_OVSCLR_CNT26_STATUS_Msk (1UL << PMU_OVSCLR_CNT26_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 26 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT27_STATUS_Pos 27U /*!< PMU OVSCLR: Event Counter 27 Overflow Clear Position */ -#define PMU_OVSCLR_CNT27_STATUS_Msk (1UL << PMU_OVSCLR_CNT27_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 27 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT28_STATUS_Pos 28U /*!< PMU OVSCLR: Event Counter 28 Overflow Clear Position */ -#define PMU_OVSCLR_CNT28_STATUS_Msk (1UL << PMU_OVSCLR_CNT28_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 28 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT29_STATUS_Pos 29U /*!< PMU OVSCLR: Event Counter 29 Overflow Clear Position */ -#define PMU_OVSCLR_CNT29_STATUS_Msk (1UL << PMU_OVSCLR_CNT29_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 29 Overflow Clear Mask */ - -#define PMU_OVSCLR_CNT30_STATUS_Pos 30U /*!< PMU OVSCLR: Event Counter 30 Overflow Clear Position */ -#define PMU_OVSCLR_CNT30_STATUS_Msk (1UL << PMU_OVSCLR_CNT30_STATUS_Pos) /*!< PMU OVSCLR: Event Counter 30 Overflow Clear Mask */ - -#define PMU_OVSCLR_CYCCNT_STATUS_Pos 31U /*!< PMU OVSCLR: Cycle Counter Overflow Clear Position */ -#define PMU_OVSCLR_CYCCNT_STATUS_Msk (1UL << PMU_OVSCLR_CYCCNT_STATUS_Pos) /*!< PMU OVSCLR: Cycle Counter Overflow Clear Mask */ - -/** \brief PMU Software Increment Counter */ - -#define PMU_SWINC_CNT0_Pos 0U /*!< PMU SWINC: Event Counter 0 Software Increment Position */ -#define PMU_SWINC_CNT0_Msk (1UL /*<< PMU_SWINC_CNT0_Pos */) /*!< PMU SWINC: Event Counter 0 Software Increment Mask */ - -#define PMU_SWINC_CNT1_Pos 1U /*!< PMU SWINC: Event Counter 1 Software Increment Position */ -#define PMU_SWINC_CNT1_Msk (1UL << PMU_SWINC_CNT1_Pos) /*!< PMU SWINC: Event Counter 1 Software Increment Mask */ - -#define PMU_SWINC_CNT2_Pos 2U /*!< PMU SWINC: Event Counter 2 Software Increment Position */ -#define PMU_SWINC_CNT2_Msk (1UL << PMU_SWINC_CNT2_Pos) /*!< PMU SWINC: Event Counter 2 Software Increment Mask */ - -#define PMU_SWINC_CNT3_Pos 3U /*!< PMU SWINC: Event Counter 3 Software Increment Position */ -#define PMU_SWINC_CNT3_Msk (1UL << PMU_SWINC_CNT3_Pos) /*!< PMU SWINC: Event Counter 3 Software Increment Mask */ - -#define PMU_SWINC_CNT4_Pos 4U /*!< PMU SWINC: Event Counter 4 Software Increment Position */ -#define PMU_SWINC_CNT4_Msk (1UL << PMU_SWINC_CNT4_Pos) /*!< PMU SWINC: Event Counter 4 Software Increment Mask */ - -#define PMU_SWINC_CNT5_Pos 5U /*!< PMU SWINC: Event Counter 5 Software Increment Position */ -#define PMU_SWINC_CNT5_Msk (1UL << PMU_SWINC_CNT5_Pos) /*!< PMU SWINC: Event Counter 5 Software Increment Mask */ - -#define PMU_SWINC_CNT6_Pos 6U /*!< PMU SWINC: Event Counter 6 Software Increment Position */ -#define PMU_SWINC_CNT6_Msk (1UL << PMU_SWINC_CNT6_Pos) /*!< PMU SWINC: Event Counter 6 Software Increment Mask */ - -#define PMU_SWINC_CNT7_Pos 7U /*!< PMU SWINC: Event Counter 7 Software Increment Position */ -#define PMU_SWINC_CNT7_Msk (1UL << PMU_SWINC_CNT7_Pos) /*!< PMU SWINC: Event Counter 7 Software Increment Mask */ - -#define PMU_SWINC_CNT8_Pos 8U /*!< PMU SWINC: Event Counter 8 Software Increment Position */ -#define PMU_SWINC_CNT8_Msk (1UL << PMU_SWINC_CNT8_Pos) /*!< PMU SWINC: Event Counter 8 Software Increment Mask */ - -#define PMU_SWINC_CNT9_Pos 9U /*!< PMU SWINC: Event Counter 9 Software Increment Position */ -#define PMU_SWINC_CNT9_Msk (1UL << PMU_SWINC_CNT9_Pos) /*!< PMU SWINC: Event Counter 9 Software Increment Mask */ - -#define PMU_SWINC_CNT10_Pos 10U /*!< PMU SWINC: Event Counter 10 Software Increment Position */ -#define PMU_SWINC_CNT10_Msk (1UL << PMU_SWINC_CNT10_Pos) /*!< PMU SWINC: Event Counter 10 Software Increment Mask */ - -#define PMU_SWINC_CNT11_Pos 11U /*!< PMU SWINC: Event Counter 11 Software Increment Position */ -#define PMU_SWINC_CNT11_Msk (1UL << PMU_SWINC_CNT11_Pos) /*!< PMU SWINC: Event Counter 11 Software Increment Mask */ - -#define PMU_SWINC_CNT12_Pos 12U /*!< PMU SWINC: Event Counter 12 Software Increment Position */ -#define PMU_SWINC_CNT12_Msk (1UL << PMU_SWINC_CNT12_Pos) /*!< PMU SWINC: Event Counter 12 Software Increment Mask */ - -#define PMU_SWINC_CNT13_Pos 13U /*!< PMU SWINC: Event Counter 13 Software Increment Position */ -#define PMU_SWINC_CNT13_Msk (1UL << PMU_SWINC_CNT13_Pos) /*!< PMU SWINC: Event Counter 13 Software Increment Mask */ - -#define PMU_SWINC_CNT14_Pos 14U /*!< PMU SWINC: Event Counter 14 Software Increment Position */ -#define PMU_SWINC_CNT14_Msk (1UL << PMU_SWINC_CNT14_Pos) /*!< PMU SWINC: Event Counter 14 Software Increment Mask */ - -#define PMU_SWINC_CNT15_Pos 15U /*!< PMU SWINC: Event Counter 15 Software Increment Position */ -#define PMU_SWINC_CNT15_Msk (1UL << PMU_SWINC_CNT15_Pos) /*!< PMU SWINC: Event Counter 15 Software Increment Mask */ - -#define PMU_SWINC_CNT16_Pos 16U /*!< PMU SWINC: Event Counter 16 Software Increment Position */ -#define PMU_SWINC_CNT16_Msk (1UL << PMU_SWINC_CNT16_Pos) /*!< PMU SWINC: Event Counter 16 Software Increment Mask */ - -#define PMU_SWINC_CNT17_Pos 17U /*!< PMU SWINC: Event Counter 17 Software Increment Position */ -#define PMU_SWINC_CNT17_Msk (1UL << PMU_SWINC_CNT17_Pos) /*!< PMU SWINC: Event Counter 17 Software Increment Mask */ - -#define PMU_SWINC_CNT18_Pos 18U /*!< PMU SWINC: Event Counter 18 Software Increment Position */ -#define PMU_SWINC_CNT18_Msk (1UL << PMU_SWINC_CNT18_Pos) /*!< PMU SWINC: Event Counter 18 Software Increment Mask */ - -#define PMU_SWINC_CNT19_Pos 19U /*!< PMU SWINC: Event Counter 19 Software Increment Position */ -#define PMU_SWINC_CNT19_Msk (1UL << PMU_SWINC_CNT19_Pos) /*!< PMU SWINC: Event Counter 19 Software Increment Mask */ - -#define PMU_SWINC_CNT20_Pos 20U /*!< PMU SWINC: Event Counter 20 Software Increment Position */ -#define PMU_SWINC_CNT20_Msk (1UL << PMU_SWINC_CNT20_Pos) /*!< PMU SWINC: Event Counter 20 Software Increment Mask */ - -#define PMU_SWINC_CNT21_Pos 21U /*!< PMU SWINC: Event Counter 21 Software Increment Position */ -#define PMU_SWINC_CNT21_Msk (1UL << PMU_SWINC_CNT21_Pos) /*!< PMU SWINC: Event Counter 21 Software Increment Mask */ - -#define PMU_SWINC_CNT22_Pos 22U /*!< PMU SWINC: Event Counter 22 Software Increment Position */ -#define PMU_SWINC_CNT22_Msk (1UL << PMU_SWINC_CNT22_Pos) /*!< PMU SWINC: Event Counter 22 Software Increment Mask */ - -#define PMU_SWINC_CNT23_Pos 23U /*!< PMU SWINC: Event Counter 23 Software Increment Position */ -#define PMU_SWINC_CNT23_Msk (1UL << PMU_SWINC_CNT23_Pos) /*!< PMU SWINC: Event Counter 23 Software Increment Mask */ - -#define PMU_SWINC_CNT24_Pos 24U /*!< PMU SWINC: Event Counter 24 Software Increment Position */ -#define PMU_SWINC_CNT24_Msk (1UL << PMU_SWINC_CNT24_Pos) /*!< PMU SWINC: Event Counter 24 Software Increment Mask */ - -#define PMU_SWINC_CNT25_Pos 25U /*!< PMU SWINC: Event Counter 25 Software Increment Position */ -#define PMU_SWINC_CNT25_Msk (1UL << PMU_SWINC_CNT25_Pos) /*!< PMU SWINC: Event Counter 25 Software Increment Mask */ - -#define PMU_SWINC_CNT26_Pos 26U /*!< PMU SWINC: Event Counter 26 Software Increment Position */ -#define PMU_SWINC_CNT26_Msk (1UL << PMU_SWINC_CNT26_Pos) /*!< PMU SWINC: Event Counter 26 Software Increment Mask */ - -#define PMU_SWINC_CNT27_Pos 27U /*!< PMU SWINC: Event Counter 27 Software Increment Position */ -#define PMU_SWINC_CNT27_Msk (1UL << PMU_SWINC_CNT27_Pos) /*!< PMU SWINC: Event Counter 27 Software Increment Mask */ - -#define PMU_SWINC_CNT28_Pos 28U /*!< PMU SWINC: Event Counter 28 Software Increment Position */ -#define PMU_SWINC_CNT28_Msk (1UL << PMU_SWINC_CNT28_Pos) /*!< PMU SWINC: Event Counter 28 Software Increment Mask */ - -#define PMU_SWINC_CNT29_Pos 29U /*!< PMU SWINC: Event Counter 29 Software Increment Position */ -#define PMU_SWINC_CNT29_Msk (1UL << PMU_SWINC_CNT29_Pos) /*!< PMU SWINC: Event Counter 29 Software Increment Mask */ - -#define PMU_SWINC_CNT30_Pos 30U /*!< PMU SWINC: Event Counter 30 Software Increment Position */ -#define PMU_SWINC_CNT30_Msk (1UL << PMU_SWINC_CNT30_Pos) /*!< PMU SWINC: Event Counter 30 Software Increment Mask */ - -/** \brief PMU Control Register Definitions */ - -#define PMU_CTRL_ENABLE_Pos 0U /*!< PMU CTRL: ENABLE Position */ -#define PMU_CTRL_ENABLE_Msk (1UL /*<< PMU_CTRL_ENABLE_Pos*/) /*!< PMU CTRL: ENABLE Mask */ - -#define PMU_CTRL_EVENTCNT_RESET_Pos 1U /*!< PMU CTRL: Event Counter Reset Position */ -#define PMU_CTRL_EVENTCNT_RESET_Msk (1UL << PMU_CTRL_EVENTCNT_RESET_Pos) /*!< PMU CTRL: Event Counter Reset Mask */ - -#define PMU_CTRL_CYCCNT_RESET_Pos 2U /*!< PMU CTRL: Cycle Counter Reset Position */ -#define PMU_CTRL_CYCCNT_RESET_Msk (1UL << PMU_CTRL_CYCCNT_RESET_Pos) /*!< PMU CTRL: Cycle Counter Reset Mask */ - -#define PMU_CTRL_CYCCNT_DISABLE_Pos 5U /*!< PMU CTRL: Disable Cycle Counter Position */ -#define PMU_CTRL_CYCCNT_DISABLE_Msk (1UL << PMU_CTRL_CYCCNT_DISABLE_Pos) /*!< PMU CTRL: Disable Cycle Counter Mask */ - -#define PMU_CTRL_FRZ_ON_OV_Pos 9U /*!< PMU CTRL: Freeze-on-overflow Position */ -#define PMU_CTRL_FRZ_ON_OV_Msk (1UL << PMU_CTRL_FRZ_ON_OVERFLOW_Pos) /*!< PMU CTRL: Freeze-on-overflow Mask */ - -#define PMU_CTRL_TRACE_ON_OV_Pos 11U /*!< PMU CTRL: Trace-on-overflow Position */ -#define PMU_CTRL_TRACE_ON_OV_Msk (1UL << PMU_CTRL_TRACE_ON_OVERFLOW_Pos) /*!< PMU CTRL: Trace-on-overflow Mask */ - -/** \brief PMU Type Register Definitions */ - -#define PMU_TYPE_NUM_CNTS_Pos 0U /*!< PMU TYPE: Number of Counters Position */ -#define PMU_TYPE_NUM_CNTS_Msk (0xFFUL /*<< PMU_TYPE_NUM_CNTS_Pos*/) /*!< PMU TYPE: Number of Counters Mask */ - -#define PMU_TYPE_SIZE_CNTS_Pos 8U /*!< PMU TYPE: Size of Counters Position */ -#define PMU_TYPE_SIZE_CNTS_Msk (0x3FUL << PMU_TYPE_SIZE_CNTS_Pos) /*!< PMU TYPE: Size of Counters Mask */ - -#define PMU_TYPE_CYCCNT_PRESENT_Pos 14U /*!< PMU TYPE: Cycle Counter Present Position */ -#define PMU_TYPE_CYCCNT_PRESENT_Msk (1UL << PMU_TYPE_CYCCNT_PRESENT_Pos) /*!< PMU TYPE: Cycle Counter Present Mask */ - -#define PMU_TYPE_FRZ_OV_SUPPORT_Pos 21U /*!< PMU TYPE: Freeze-on-overflow Support Position */ -#define PMU_TYPE_FRZ_OV_SUPPORT_Msk (1UL << PMU_TYPE_FRZ_OV_SUPPORT_Pos) /*!< PMU TYPE: Freeze-on-overflow Support Mask */ - -#define PMU_TYPE_TRACE_ON_OV_SUPPORT_Pos 23U /*!< PMU TYPE: Trace-on-overflow Support Position */ -#define PMU_TYPE_TRACE_ON_OV_SUPPORT_Msk (1UL << PMU_TYPE_FRZ_OV_SUPPORT_Pos) /*!< PMU TYPE: Trace-on-overflow Support Mask */ - -/** \brief PMU Authentication Status Register Definitions */ - -#define PMU_AUTHSTATUS_NSID_Pos 0U /*!< PMU AUTHSTATUS: Non-secure Invasive Debug Position */ -#define PMU_AUTHSTATUS_NSID_Msk (0x3UL /*<< PMU_AUTHSTATUS_NSID_Pos*/) /*!< PMU AUTHSTATUS: Non-secure Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_NSNID_Pos 2U /*!< PMU AUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_NSNID_Msk (0x3UL << PMU_AUTHSTATUS_NSNID_Pos) /*!< PMU AUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SID_Pos 4U /*!< PMU AUTHSTATUS: Secure Invasive Debug Position */ -#define PMU_AUTHSTATUS_SID_Msk (0x3UL << PMU_AUTHSTATUS_SID_Pos) /*!< PMU AUTHSTATUS: Secure Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SNID_Pos 6U /*!< PMU AUTHSTATUS: Secure Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_SNID_Msk (0x3UL << PMU_AUTHSTATUS_SNID_Pos) /*!< PMU AUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define PMU_AUTHSTATUS_NSUID_Pos 16U /*!< PMU AUTHSTATUS: Non-secure Unprivileged Invasive Debug Position */ -#define PMU_AUTHSTATUS_NSUID_Msk (0x3UL << PMU_AUTHSTATUS_NSUID_Pos) /*!< PMU AUTHSTATUS: Non-secure Unprivileged Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_NSUNID_Pos 18U /*!< PMU AUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_NSUNID_Msk (0x3UL << PMU_AUTHSTATUS_NSUNID_Pos) /*!< PMU AUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SUID_Pos 20U /*!< PMU AUTHSTATUS: Secure Unprivileged Invasive Debug Position */ -#define PMU_AUTHSTATUS_SUID_Msk (0x3UL << PMU_AUTHSTATUS_SUID_Pos) /*!< PMU AUTHSTATUS: Secure Unprivileged Invasive Debug Mask */ - -#define PMU_AUTHSTATUS_SUNID_Pos 22U /*!< PMU AUTHSTATUS: Secure Unprivileged Non-invasive Debug Position */ -#define PMU_AUTHSTATUS_SUNID_Msk (0x3UL << PMU_AUTHSTATUS_SUNID_Pos) /*!< PMU AUTHSTATUS: Secure Unprivileged Non-invasive Debug Mask */ - - -/*@} end of group CMSIS_PMU */ -#endif - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ - __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ - __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ - __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ - uint32_t RESERVED0[1]; - union { - __IOM uint32_t MAIR[2]; - struct { - __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ - __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ - }; - }; -} MPU_Type; - -#define MPU_TYPE_RALIASES 4U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ -#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ - -#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ -#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ - -#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ -#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ - -#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ -#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ - -/* MPU Region Limit Address Register Definitions */ -#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ -#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ - -#define MPU_RLAR_PXN_Pos 4U /*!< MPU RLAR: PXN Position */ -#define MPU_RLAR_PXN_Msk (1UL << MPU_RLAR_PXN_Pos) /*!< MPU RLAR: PXN Mask */ - -#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ -#define MPU_RLAR_AttrIndx_Msk (7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ - -#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ -#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ - -/* MPU Memory Attribute Indirection Register 0 Definitions */ -#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ -#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ - -#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ -#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ - -#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ -#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ - -#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ -#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ - -/* MPU Memory Attribute Indirection Register 1 Definitions */ -#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ -#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ - -#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ -#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ - -#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ -#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ - -#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ -#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SAU Security Attribution Unit (SAU) - \brief Type definitions for the Security Attribution Unit (SAU) - @{ - */ - -/** - \brief Structure type to access the Security Attribution Unit (SAU). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ - __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ -#else - uint32_t RESERVED0[3]; -#endif - __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ -} SAU_Type; - -/* SAU Control Register Definitions */ -#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ -#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ - -#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ -#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ - -/* SAU Type Register Definitions */ -#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ -#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ - -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) -/* SAU Region Number Register Definitions */ -#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ -#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ - -/* SAU Region Base Address Register Definitions */ -#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ -#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ - -/* SAU Region Limit Address Register Definitions */ -#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ -#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ - -#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ -#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ - -#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ -#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ - -#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ - -/* Secure Fault Status Register Definitions */ -#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ -#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ - -#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ -#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ - -#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ -#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ - -#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ -#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ - -#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ -#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ - -#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ -#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ - -#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ -#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ - -#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ -#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ - -/*@} end of group CMSIS_SAU */ -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and VFP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ -#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ - -#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ -#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ - -#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ -#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ - -#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ -#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ - -#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ -#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ - -#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ -#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ -#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ -#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -#define FPU_FPDSCR_FZ16_Pos 19U /*!< FPDSCR: FZ16 bit Position */ -#define FPU_FPDSCR_FZ16_Msk (1UL << FPU_FPDSCR_FZ16_Pos) /*!< FPDSCR: FZ16 bit Mask */ - -#define FPU_FPDSCR_LTPSIZE_Pos 16U /*!< FPDSCR: LTPSIZE bit Position */ -#define FPU_FPDSCR_LTPSIZE_Msk (7UL << FPU_FPDSCR_LTPSIZE_Pos) /*!< FPDSCR: LTPSIZE bit Mask */ - -/* Media and VFP Feature Register 0 Definitions */ -#define FPU_MVFR0_FPRound_Pos 28U /*!< MVFR0: FPRound bits Position */ -#define FPU_MVFR0_FPRound_Msk (0xFUL << FPU_MVFR0_FPRound_Pos) /*!< MVFR0: FPRound bits Mask */ - -#define FPU_MVFR0_FPSqrt_Pos 20U /*!< MVFR0: FPSqrt bits Position */ -#define FPU_MVFR0_FPSqrt_Msk (0xFUL << FPU_MVFR0_FPSqrt_Pos) /*!< MVFR0: FPSqrt bits Mask */ - -#define FPU_MVFR0_FPDivide_Pos 16U /*!< MVFR0: FPDivide bits Position */ -#define FPU_MVFR0_FPDivide_Msk (0xFUL << FPU_MVFR0_FPDivide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FPDP_Pos 8U /*!< MVFR0: FPDP bits Position */ -#define FPU_MVFR0_FPDP_Msk (0xFUL << FPU_MVFR0_FPDP_Pos) /*!< MVFR0: FPDP bits Mask */ - -#define FPU_MVFR0_FPSP_Pos 4U /*!< MVFR0: FPSP bits Position */ -#define FPU_MVFR0_FPSP_Msk (0xFUL << FPU_MVFR0_FPSP_Pos) /*!< MVFR0: FPSP bits Mask */ - -#define FPU_MVFR0_SIMDReg_Pos 0U /*!< MVFR0: SIMDReg bits Position */ -#define FPU_MVFR0_SIMDReg_Msk (0xFUL /*<< FPU_MVFR0_SIMDReg_Pos*/) /*!< MVFR0: SIMDReg bits Mask */ - -/* Media and VFP Feature Register 1 Definitions */ -#define FPU_MVFR1_FMAC_Pos 28U /*!< MVFR1: FMAC bits Position */ -#define FPU_MVFR1_FMAC_Msk (0xFUL << FPU_MVFR1_FMAC_Pos) /*!< MVFR1: FMAC bits Mask */ - -#define FPU_MVFR1_FPHP_Pos 24U /*!< MVFR1: FPHP bits Position */ -#define FPU_MVFR1_FPHP_Msk (0xFUL << FPU_MVFR1_FPHP_Pos) /*!< MVFR1: FPHP bits Mask */ - -#define FPU_MVFR1_FP16_Pos 20U /*!< MVFR1: FP16 bits Position */ -#define FPU_MVFR1_FP16_Msk (0xFUL << FPU_MVFR1_FP16_Pos) /*!< MVFR1: FP16 bits Mask */ - -#define FPU_MVFR1_MVE_Pos 8U /*!< MVFR1: MVE bits Position */ -#define FPU_MVFR1_MVE_Msk (0xFUL << FPU_MVFR1_MVE_Pos) /*!< MVFR1: MVE bits Mask */ - -#define FPU_MVFR1_FPDNaN_Pos 4U /*!< MVFR1: FPDNaN bits Position */ -#define FPU_MVFR1_FPDNaN_Msk (0xFUL << FPU_MVFR1_FPDNaN_Pos) /*!< MVFR1: FPDNaN bits Mask */ - -#define FPU_MVFR1_FPFtZ_Pos 0U /*!< MVFR1: FPFtZ bits Position */ -#define FPU_MVFR1_FPFtZ_Msk (0xFUL /*<< FPU_MVFR1_FPFtZ_Pos*/) /*!< MVFR1: FPFtZ bits Mask */ - -/* Media and VFP Feature Register 2 Definitions */ -#define FPU_MVFR2_FPMisc_Pos 4U /*!< MVFR2: FPMisc bits Position */ -#define FPU_MVFR2_FPMisc_Msk (0xFUL << FPU_MVFR2_FPMisc_Pos) /*!< MVFR2: FPMisc bits Mask */ - -/*@} end of group CMSIS_FPU */ - -/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */ -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief \deprecated Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - __OM uint32_t DSCEMCR; /*!< Offset: 0x010 ( /W) Debug Set Clear Exception and Monitor Control Register */ - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */ -#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_FPD_Pos 23U /*!< \deprecated CoreDebug DHCSR: S_FPD Position */ -#define CoreDebug_DHCSR_S_FPD_Msk (1UL << CoreDebug_DHCSR_S_FPD_Pos) /*!< \deprecated CoreDebug DHCSR: S_FPD Mask */ - -#define CoreDebug_DHCSR_S_SUIDE_Pos 22U /*!< \deprecated CoreDebug DHCSR: S_SUIDE Position */ -#define CoreDebug_DHCSR_S_SUIDE_Msk (1UL << CoreDebug_DHCSR_S_SUIDE_Pos) /*!< \deprecated CoreDebug DHCSR: S_SUIDE Mask */ - -#define CoreDebug_DHCSR_S_NSUIDE_Pos 21U /*!< \deprecated CoreDebug DHCSR: S_NSUIDE Position */ -#define CoreDebug_DHCSR_S_NSUIDE_Msk (1UL << CoreDebug_DHCSR_S_NSUIDE_Pos) /*!< \deprecated CoreDebug DHCSR: S_NSUIDE Mask */ - -#define CoreDebug_DHCSR_S_SDE_Pos 20U /*!< \deprecated CoreDebug DHCSR: S_SDE Position */ -#define CoreDebug_DHCSR_S_SDE_Msk (1UL << CoreDebug_DHCSR_S_SDE_Pos) /*!< \deprecated CoreDebug DHCSR: S_SDE Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< \deprecated CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_PMOV_Pos 6U /*!< \deprecated CoreDebug DHCSR: C_PMOV Position */ -#define CoreDebug_DHCSR_C_PMOV_Msk (1UL << CoreDebug_DHCSR_C_PMOV_Pos) /*!< \deprecated CoreDebug DHCSR: C_PMOV Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< \deprecated CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< \deprecated CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< \deprecated CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< \deprecated CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< \deprecated CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< \deprecated CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */ - -/* Debug Set Clear Exception and Monitor Control Register Definitions */ -#define CoreDebug_DSCEMCR_CLR_MON_REQ_Pos 19U /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_REQ, Position */ -#define CoreDebug_DSCEMCR_CLR_MON_REQ_Msk (1UL << CoreDebug_DSCEMCR_CLR_MON_REQ_Pos) /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_REQ, Mask */ - -#define CoreDebug_DSCEMCR_CLR_MON_PEND_Pos 17U /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_PEND, Position */ -#define CoreDebug_DSCEMCR_CLR_MON_PEND_Msk (1UL << CoreDebug_DSCEMCR_CLR_MON_PEND_Pos) /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_PEND, Mask */ - -#define CoreDebug_DSCEMCR_SET_MON_REQ_Pos 3U /*!< \deprecated CoreDebug DSCEMCR: SET_MON_REQ, Position */ -#define CoreDebug_DSCEMCR_SET_MON_REQ_Msk (1UL << CoreDebug_DSCEMCR_SET_MON_REQ_Pos) /*!< \deprecated CoreDebug DSCEMCR: SET_MON_REQ, Mask */ - -#define CoreDebug_DSCEMCR_SET_MON_PEND_Pos 1U /*!< \deprecated CoreDebug DSCEMCR: SET_MON_PEND, Position */ -#define CoreDebug_DSCEMCR_SET_MON_PEND_Msk (1UL << CoreDebug_DSCEMCR_SET_MON_PEND_Pos) /*!< \deprecated CoreDebug DSCEMCR: SET_MON_PEND, Mask */ - -/* Debug Authentication Control Register Definitions */ -#define CoreDebug_DAUTHCTRL_UIDEN_Pos 10U /*!< \deprecated CoreDebug DAUTHCTRL: UIDEN, Position */ -#define CoreDebug_DAUTHCTRL_UIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_UIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: UIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_UIDAPEN_Pos 9U /*!< \deprecated CoreDebug DAUTHCTRL: UIDAPEN, Position */ -#define CoreDebug_DAUTHCTRL_UIDAPEN_Msk (1UL << CoreDebug_DAUTHCTRL_UIDAPEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: UIDAPEN, Mask */ - -#define CoreDebug_DAUTHCTRL_FSDMA_Pos 8U /*!< \deprecated CoreDebug DAUTHCTRL: FSDMA, Position */ -#define CoreDebug_DAUTHCTRL_FSDMA_Msk (1UL << CoreDebug_DAUTHCTRL_FSDMA_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: FSDMA, Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ -#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ - -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ - -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */ -#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */ - -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */ -#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */ - -/* Debug Security Control and Status Register Definitions */ -#define CoreDebug_DSCSR_CDS_Pos 16U /*!< \deprecated CoreDebug DSCSR: CDS Position */ -#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< \deprecated CoreDebug DSCSR: CDS Mask */ - -#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */ -#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */ - -#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */ -#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DCB Debug Control Block - \brief Type definitions for the Debug Control Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Control Block Registers (DCB). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - __OM uint32_t DSCEMCR; /*!< Offset: 0x010 ( /W) Debug Set Clear Exception and Monitor Control Register */ - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} DCB_Type; - -/* DHCSR, Debug Halting Control and Status Register Definitions */ -#define DCB_DHCSR_DBGKEY_Pos 16U /*!< DCB DHCSR: Debug key Position */ -#define DCB_DHCSR_DBGKEY_Msk (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos) /*!< DCB DHCSR: Debug key Mask */ - -#define DCB_DHCSR_S_RESTART_ST_Pos 26U /*!< DCB DHCSR: Restart sticky status Position */ -#define DCB_DHCSR_S_RESTART_ST_Msk (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos) /*!< DCB DHCSR: Restart sticky status Mask */ - -#define DCB_DHCSR_S_RESET_ST_Pos 25U /*!< DCB DHCSR: Reset sticky status Position */ -#define DCB_DHCSR_S_RESET_ST_Msk (0x1UL << DCB_DHCSR_S_RESET_ST_Pos) /*!< DCB DHCSR: Reset sticky status Mask */ - -#define DCB_DHCSR_S_RETIRE_ST_Pos 24U /*!< DCB DHCSR: Retire sticky status Position */ -#define DCB_DHCSR_S_RETIRE_ST_Msk (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos) /*!< DCB DHCSR: Retire sticky status Mask */ - -#define DCB_DHCSR_S_FPD_Pos 23U /*!< DCB DHCSR: Floating-point registers Debuggable Position */ -#define DCB_DHCSR_S_FPD_Msk (0x1UL << DCB_DHCSR_S_FPD_Pos) /*!< DCB DHCSR: Floating-point registers Debuggable Mask */ - -#define DCB_DHCSR_S_SUIDE_Pos 22U /*!< DCB DHCSR: Secure unprivileged halting debug enabled Position */ -#define DCB_DHCSR_S_SUIDE_Msk (0x1UL << DCB_DHCSR_S_SUIDE_Pos) /*!< DCB DHCSR: Secure unprivileged halting debug enabled Mask */ - -#define DCB_DHCSR_S_NSUIDE_Pos 21U /*!< DCB DHCSR: Non-secure unprivileged halting debug enabled Position */ -#define DCB_DHCSR_S_NSUIDE_Msk (0x1UL << DCB_DHCSR_S_NSUIDE_Pos) /*!< DCB DHCSR: Non-secure unprivileged halting debug enabled Mask */ - -#define DCB_DHCSR_S_SDE_Pos 20U /*!< DCB DHCSR: Secure debug enabled Position */ -#define DCB_DHCSR_S_SDE_Msk (0x1UL << DCB_DHCSR_S_SDE_Pos) /*!< DCB DHCSR: Secure debug enabled Mask */ - -#define DCB_DHCSR_S_LOCKUP_Pos 19U /*!< DCB DHCSR: Lockup status Position */ -#define DCB_DHCSR_S_LOCKUP_Msk (0x1UL << DCB_DHCSR_S_LOCKUP_Pos) /*!< DCB DHCSR: Lockup status Mask */ - -#define DCB_DHCSR_S_SLEEP_Pos 18U /*!< DCB DHCSR: Sleeping status Position */ -#define DCB_DHCSR_S_SLEEP_Msk (0x1UL << DCB_DHCSR_S_SLEEP_Pos) /*!< DCB DHCSR: Sleeping status Mask */ - -#define DCB_DHCSR_S_HALT_Pos 17U /*!< DCB DHCSR: Halted status Position */ -#define DCB_DHCSR_S_HALT_Msk (0x1UL << DCB_DHCSR_S_HALT_Pos) /*!< DCB DHCSR: Halted status Mask */ - -#define DCB_DHCSR_S_REGRDY_Pos 16U /*!< DCB DHCSR: Register ready status Position */ -#define DCB_DHCSR_S_REGRDY_Msk (0x1UL << DCB_DHCSR_S_REGRDY_Pos) /*!< DCB DHCSR: Register ready status Mask */ - -#define DCB_DHCSR_C_PMOV_Pos 6U /*!< DCB DHCSR: Halt on PMU overflow control Position */ -#define DCB_DHCSR_C_PMOV_Msk (0x1UL << DCB_DHCSR_C_PMOV_Pos) /*!< DCB DHCSR: Halt on PMU overflow control Mask */ - -#define DCB_DHCSR_C_SNAPSTALL_Pos 5U /*!< DCB DHCSR: Snap stall control Position */ -#define DCB_DHCSR_C_SNAPSTALL_Msk (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos) /*!< DCB DHCSR: Snap stall control Mask */ - -#define DCB_DHCSR_C_MASKINTS_Pos 3U /*!< DCB DHCSR: Mask interrupts control Position */ -#define DCB_DHCSR_C_MASKINTS_Msk (0x1UL << DCB_DHCSR_C_MASKINTS_Pos) /*!< DCB DHCSR: Mask interrupts control Mask */ - -#define DCB_DHCSR_C_STEP_Pos 2U /*!< DCB DHCSR: Step control Position */ -#define DCB_DHCSR_C_STEP_Msk (0x1UL << DCB_DHCSR_C_STEP_Pos) /*!< DCB DHCSR: Step control Mask */ - -#define DCB_DHCSR_C_HALT_Pos 1U /*!< DCB DHCSR: Halt control Position */ -#define DCB_DHCSR_C_HALT_Msk (0x1UL << DCB_DHCSR_C_HALT_Pos) /*!< DCB DHCSR: Halt control Mask */ - -#define DCB_DHCSR_C_DEBUGEN_Pos 0U /*!< DCB DHCSR: Debug enable control Position */ -#define DCB_DHCSR_C_DEBUGEN_Msk (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/) /*!< DCB DHCSR: Debug enable control Mask */ - -/* DCRSR, Debug Core Register Select Register Definitions */ -#define DCB_DCRSR_REGWnR_Pos 16U /*!< DCB DCRSR: Register write/not-read Position */ -#define DCB_DCRSR_REGWnR_Msk (0x1UL << DCB_DCRSR_REGWnR_Pos) /*!< DCB DCRSR: Register write/not-read Mask */ - -#define DCB_DCRSR_REGSEL_Pos 0U /*!< DCB DCRSR: Register selector Position */ -#define DCB_DCRSR_REGSEL_Msk (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/) /*!< DCB DCRSR: Register selector Mask */ - -/* DCRDR, Debug Core Register Data Register Definitions */ -#define DCB_DCRDR_DBGTMP_Pos 0U /*!< DCB DCRDR: Data temporary buffer Position */ -#define DCB_DCRDR_DBGTMP_Msk (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/) /*!< DCB DCRDR: Data temporary buffer Mask */ - -/* DEMCR, Debug Exception and Monitor Control Register Definitions */ -#define DCB_DEMCR_TRCENA_Pos 24U /*!< DCB DEMCR: Trace enable Position */ -#define DCB_DEMCR_TRCENA_Msk (0x1UL << DCB_DEMCR_TRCENA_Pos) /*!< DCB DEMCR: Trace enable Mask */ - -#define DCB_DEMCR_MONPRKEY_Pos 23U /*!< DCB DEMCR: Monitor pend req key Position */ -#define DCB_DEMCR_MONPRKEY_Msk (0x1UL << DCB_DEMCR_MONPRKEY_Pos) /*!< DCB DEMCR: Monitor pend req key Mask */ - -#define DCB_DEMCR_UMON_EN_Pos 21U /*!< DCB DEMCR: Unprivileged monitor enable Position */ -#define DCB_DEMCR_UMON_EN_Msk (0x1UL << DCB_DEMCR_UMON_EN_Pos) /*!< DCB DEMCR: Unprivileged monitor enable Mask */ - -#define DCB_DEMCR_SDME_Pos 20U /*!< DCB DEMCR: Secure DebugMonitor enable Position */ -#define DCB_DEMCR_SDME_Msk (0x1UL << DCB_DEMCR_SDME_Pos) /*!< DCB DEMCR: Secure DebugMonitor enable Mask */ - -#define DCB_DEMCR_MON_REQ_Pos 19U /*!< DCB DEMCR: Monitor request Position */ -#define DCB_DEMCR_MON_REQ_Msk (0x1UL << DCB_DEMCR_MON_REQ_Pos) /*!< DCB DEMCR: Monitor request Mask */ - -#define DCB_DEMCR_MON_STEP_Pos 18U /*!< DCB DEMCR: Monitor step Position */ -#define DCB_DEMCR_MON_STEP_Msk (0x1UL << DCB_DEMCR_MON_STEP_Pos) /*!< DCB DEMCR: Monitor step Mask */ - -#define DCB_DEMCR_MON_PEND_Pos 17U /*!< DCB DEMCR: Monitor pend Position */ -#define DCB_DEMCR_MON_PEND_Msk (0x1UL << DCB_DEMCR_MON_PEND_Pos) /*!< DCB DEMCR: Monitor pend Mask */ - -#define DCB_DEMCR_MON_EN_Pos 16U /*!< DCB DEMCR: Monitor enable Position */ -#define DCB_DEMCR_MON_EN_Msk (0x1UL << DCB_DEMCR_MON_EN_Pos) /*!< DCB DEMCR: Monitor enable Mask */ - -#define DCB_DEMCR_VC_SFERR_Pos 11U /*!< DCB DEMCR: Vector Catch SecureFault Position */ -#define DCB_DEMCR_VC_SFERR_Msk (0x1UL << DCB_DEMCR_VC_SFERR_Pos) /*!< DCB DEMCR: Vector Catch SecureFault Mask */ - -#define DCB_DEMCR_VC_HARDERR_Pos 10U /*!< DCB DEMCR: Vector Catch HardFault errors Position */ -#define DCB_DEMCR_VC_HARDERR_Msk (0x1UL << DCB_DEMCR_VC_HARDERR_Pos) /*!< DCB DEMCR: Vector Catch HardFault errors Mask */ - -#define DCB_DEMCR_VC_INTERR_Pos 9U /*!< DCB DEMCR: Vector Catch interrupt errors Position */ -#define DCB_DEMCR_VC_INTERR_Msk (0x1UL << DCB_DEMCR_VC_INTERR_Pos) /*!< DCB DEMCR: Vector Catch interrupt errors Mask */ - -#define DCB_DEMCR_VC_BUSERR_Pos 8U /*!< DCB DEMCR: Vector Catch BusFault errors Position */ -#define DCB_DEMCR_VC_BUSERR_Msk (0x1UL << DCB_DEMCR_VC_BUSERR_Pos) /*!< DCB DEMCR: Vector Catch BusFault errors Mask */ - -#define DCB_DEMCR_VC_STATERR_Pos 7U /*!< DCB DEMCR: Vector Catch state errors Position */ -#define DCB_DEMCR_VC_STATERR_Msk (0x1UL << DCB_DEMCR_VC_STATERR_Pos) /*!< DCB DEMCR: Vector Catch state errors Mask */ - -#define DCB_DEMCR_VC_CHKERR_Pos 6U /*!< DCB DEMCR: Vector Catch check errors Position */ -#define DCB_DEMCR_VC_CHKERR_Msk (0x1UL << DCB_DEMCR_VC_CHKERR_Pos) /*!< DCB DEMCR: Vector Catch check errors Mask */ - -#define DCB_DEMCR_VC_NOCPERR_Pos 5U /*!< DCB DEMCR: Vector Catch NOCP errors Position */ -#define DCB_DEMCR_VC_NOCPERR_Msk (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos) /*!< DCB DEMCR: Vector Catch NOCP errors Mask */ - -#define DCB_DEMCR_VC_MMERR_Pos 4U /*!< DCB DEMCR: Vector Catch MemManage errors Position */ -#define DCB_DEMCR_VC_MMERR_Msk (0x1UL << DCB_DEMCR_VC_MMERR_Pos) /*!< DCB DEMCR: Vector Catch MemManage errors Mask */ - -#define DCB_DEMCR_VC_CORERESET_Pos 0U /*!< DCB DEMCR: Vector Catch Core reset Position */ -#define DCB_DEMCR_VC_CORERESET_Msk (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/) /*!< DCB DEMCR: Vector Catch Core reset Mask */ - -/* DSCEMCR, Debug Set Clear Exception and Monitor Control Register Definitions */ -#define DCB_DSCEMCR_CLR_MON_REQ_Pos 19U /*!< DCB DSCEMCR: Clear monitor request Position */ -#define DCB_DSCEMCR_CLR_MON_REQ_Msk (0x1UL << DCB_DSCEMCR_CLR_MON_REQ_Pos) /*!< DCB DSCEMCR: Clear monitor request Mask */ - -#define DCB_DSCEMCR_CLR_MON_PEND_Pos 17U /*!< DCB DSCEMCR: Clear monitor pend Position */ -#define DCB_DSCEMCR_CLR_MON_PEND_Msk (0x1UL << DCB_DSCEMCR_CLR_MON_PEND_Pos) /*!< DCB DSCEMCR: Clear monitor pend Mask */ - -#define DCB_DSCEMCR_SET_MON_REQ_Pos 3U /*!< DCB DSCEMCR: Set monitor request Position */ -#define DCB_DSCEMCR_SET_MON_REQ_Msk (0x1UL << DCB_DSCEMCR_SET_MON_REQ_Pos) /*!< DCB DSCEMCR: Set monitor request Mask */ - -#define DCB_DSCEMCR_SET_MON_PEND_Pos 1U /*!< DCB DSCEMCR: Set monitor pend Position */ -#define DCB_DSCEMCR_SET_MON_PEND_Msk (0x1UL << DCB_DSCEMCR_SET_MON_PEND_Pos) /*!< DCB DSCEMCR: Set monitor pend Mask */ - -/* DAUTHCTRL, Debug Authentication Control Register Definitions */ -#define DCB_DAUTHCTRL_UIDEN_Pos 10U /*!< DCB DAUTHCTRL: Unprivileged Invasive Debug Enable Position */ -#define DCB_DAUTHCTRL_UIDEN_Msk (0x1UL << DCB_DAUTHCTRL_UIDEN_Pos) /*!< DCB DAUTHCTRL: Unprivileged Invasive Debug Enable Mask */ - -#define DCB_DAUTHCTRL_UIDAPEN_Pos 9U /*!< DCB DAUTHCTRL: Unprivileged Invasive DAP Access Enable Position */ -#define DCB_DAUTHCTRL_UIDAPEN_Msk (0x1UL << DCB_DAUTHCTRL_UIDAPEN_Pos) /*!< DCB DAUTHCTRL: Unprivileged Invasive DAP Access Enable Mask */ - -#define DCB_DAUTHCTRL_FSDMA_Pos 8U /*!< DCB DAUTHCTRL: Force Secure DebugMonitor Allowed Position */ -#define DCB_DAUTHCTRL_FSDMA_Msk (0x1UL << DCB_DAUTHCTRL_FSDMA_Pos) /*!< DCB DAUTHCTRL: Force Secure DebugMonitor Allowed Mask */ - -#define DCB_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPNIDENSEL_Msk (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos) /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */ - -#define DCB_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPIDENSEL_Msk (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */ - -/* DSCSR, Debug Security Control and Status Register Definitions */ -#define DCB_DSCSR_CDSKEY_Pos 17U /*!< DCB DSCSR: CDS write-enable key Position */ -#define DCB_DSCSR_CDSKEY_Msk (0x1UL << DCB_DSCSR_CDSKEY_Pos) /*!< DCB DSCSR: CDS write-enable key Mask */ - -#define DCB_DSCSR_CDS_Pos 16U /*!< DCB DSCSR: Current domain Secure Position */ -#define DCB_DSCSR_CDS_Msk (0x1UL << DCB_DSCSR_CDS_Pos) /*!< DCB DSCSR: Current domain Secure Mask */ - -#define DCB_DSCSR_SBRSEL_Pos 1U /*!< DCB DSCSR: Secure banked register select Position */ -#define DCB_DSCSR_SBRSEL_Msk (0x1UL << DCB_DSCSR_SBRSEL_Pos) /*!< DCB DSCSR: Secure banked register select Mask */ - -#define DCB_DSCSR_SBRSELEN_Pos 0U /*!< DCB DSCSR: Secure banked register select enable Position */ -#define DCB_DSCSR_SBRSELEN_Msk (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/) /*!< DCB DSCSR: Secure banked register select enable Mask */ - -/*@} end of group CMSIS_DCB */ - - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DIB Debug Identification Block - \brief Type definitions for the Debug Identification Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Identification Block Registers (DIB). - */ -typedef struct -{ - __OM uint32_t DLAR; /*!< Offset: 0x000 ( /W) SCS Software Lock Access Register */ - __IM uint32_t DLSR; /*!< Offset: 0x004 (R/ ) SCS Software Lock Status Register */ - __IM uint32_t DAUTHSTATUS; /*!< Offset: 0x008 (R/ ) Debug Authentication Status Register */ - __IM uint32_t DDEVARCH; /*!< Offset: 0x00C (R/ ) SCS Device Architecture Register */ - __IM uint32_t DDEVTYPE; /*!< Offset: 0x010 (R/ ) SCS Device Type Register */ -} DIB_Type; - -/* DLAR, SCS Software Lock Access Register Definitions */ -#define DIB_DLAR_KEY_Pos 0U /*!< DIB DLAR: KEY Position */ -#define DIB_DLAR_KEY_Msk (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */) /*!< DIB DLAR: KEY Mask */ - -/* DLSR, SCS Software Lock Status Register Definitions */ -#define DIB_DLSR_nTT_Pos 2U /*!< DIB DLSR: Not thirty-two bit Position */ -#define DIB_DLSR_nTT_Msk (0x1UL << DIB_DLSR_nTT_Pos ) /*!< DIB DLSR: Not thirty-two bit Mask */ - -#define DIB_DLSR_SLK_Pos 1U /*!< DIB DLSR: Software Lock status Position */ -#define DIB_DLSR_SLK_Msk (0x1UL << DIB_DLSR_SLK_Pos ) /*!< DIB DLSR: Software Lock status Mask */ - -#define DIB_DLSR_SLI_Pos 0U /*!< DIB DLSR: Software Lock implemented Position */ -#define DIB_DLSR_SLI_Msk (0x1UL /*<< DIB_DLSR_SLI_Pos*/) /*!< DIB DLSR: Software Lock implemented Mask */ - -/* DAUTHSTATUS, Debug Authentication Status Register Definitions */ -#define DIB_DAUTHSTATUS_SUNID_Pos 22U /*!< DIB DAUTHSTATUS: Secure Unprivileged Non-invasive Debug Allowed Position */ -#define DIB_DAUTHSTATUS_SUNID_Msk (0x3UL << DIB_DAUTHSTATUS_SUNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Unprivileged Non-invasive Debug Allowed Mask */ - -#define DIB_DAUTHSTATUS_SUID_Pos 20U /*!< DIB DAUTHSTATUS: Secure Unprivileged Invasive Debug Allowed Position */ -#define DIB_DAUTHSTATUS_SUID_Msk (0x3UL << DIB_DAUTHSTATUS_SUID_Pos ) /*!< DIB DAUTHSTATUS: Secure Unprivileged Invasive Debug Allowed Mask */ - -#define DIB_DAUTHSTATUS_NSUNID_Pos 18U /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Allo Position */ -#define DIB_DAUTHSTATUS_NSUNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSUNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Allo Mask */ - -#define DIB_DAUTHSTATUS_NSUID_Pos 16U /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Invasive Debug Allowed Position */ -#define DIB_DAUTHSTATUS_NSUID_Msk (0x3UL << DIB_DAUTHSTATUS_NSUID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Invasive Debug Allowed Mask */ - -#define DIB_DAUTHSTATUS_SNID_Pos 6U /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_SNID_Msk (0x3UL << DIB_DAUTHSTATUS_SNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_SID_Pos 4U /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_SID_Msk (0x3UL << DIB_DAUTHSTATUS_SID_Pos ) /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSNID_Pos 2U /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSID_Pos 0U /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSID_Msk (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/) /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */ - -/* DDEVARCH, SCS Device Architecture Register Definitions */ -#define DIB_DDEVARCH_ARCHITECT_Pos 21U /*!< DIB DDEVARCH: Architect Position */ -#define DIB_DDEVARCH_ARCHITECT_Msk (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos ) /*!< DIB DDEVARCH: Architect Mask */ - -#define DIB_DDEVARCH_PRESENT_Pos 20U /*!< DIB DDEVARCH: DEVARCH Present Position */ -#define DIB_DDEVARCH_PRESENT_Msk (0x1FUL << DIB_DDEVARCH_PRESENT_Pos ) /*!< DIB DDEVARCH: DEVARCH Present Mask */ - -#define DIB_DDEVARCH_REVISION_Pos 16U /*!< DIB DDEVARCH: Revision Position */ -#define DIB_DDEVARCH_REVISION_Msk (0xFUL << DIB_DDEVARCH_REVISION_Pos ) /*!< DIB DDEVARCH: Revision Mask */ - -#define DIB_DDEVARCH_ARCHVER_Pos 12U /*!< DIB DDEVARCH: Architecture Version Position */ -#define DIB_DDEVARCH_ARCHVER_Msk (0xFUL << DIB_DDEVARCH_ARCHVER_Pos ) /*!< DIB DDEVARCH: Architecture Version Mask */ - -#define DIB_DDEVARCH_ARCHPART_Pos 0U /*!< DIB DDEVARCH: Architecture Part Position */ -#define DIB_DDEVARCH_ARCHPART_Msk (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/) /*!< DIB DDEVARCH: Architecture Part Mask */ - -/* DDEVTYPE, SCS Device Type Register Definitions */ -#define DIB_DDEVTYPE_SUB_Pos 4U /*!< DIB DDEVTYPE: Sub-type Position */ -#define DIB_DDEVTYPE_SUB_Msk (0xFUL << DIB_DDEVTYPE_SUB_Pos ) /*!< DIB DDEVTYPE: Sub-type Mask */ - -#define DIB_DDEVTYPE_MAJOR_Pos 0U /*!< DIB DDEVTYPE: Major type Position */ -#define DIB_DDEVTYPE_MAJOR_Msk (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/) /*!< DIB DDEVTYPE: Major type Mask */ - - -/*@} end of group CMSIS_DIB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ - #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ - #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ - #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ - #define MEMSYSCTL_BASE (0xE001E000UL) /*!< Memory System Control Base Address */ - #define ERRBNK_BASE (0xE001E100UL) /*!< Error Banking Base Address */ - #define PWRMODCTL_BASE (0xE001E300UL) /*!< Power Mode Control Base Address */ - #define EWIC_BASE (0xE001E400UL) /*!< External Wakeup Interrupt Controller Base Address */ - #define PRCCFGINF_BASE (0xE001E700UL) /*!< Processor Configuration Information Base Address */ - #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ - #define CoreDebug_BASE (0xE000EDF0UL) /*!< \deprecated Core Debug Base Address */ - #define DCB_BASE (0xE000EDF0UL) /*!< DCB Base Address */ - #define DIB_BASE (0xE000EFB0UL) /*!< DIB Base Address */ - #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ - #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ - #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - - #define ICB ((ICB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ - #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ - #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ - #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ - #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ - #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ - #define MEMSYSCTL ((MemSysCtl_Type *) MEMSYSCTL_BASE ) /*!< Memory System Control configuration struct */ - #define ERRBNK ((ErrBnk_Type *) ERRBNK_BASE ) /*!< Error Banking configuration struct */ - #define PWRMODCTL ((PwrModCtl_Type *) PWRMODCTL_BASE ) /*!< Power Mode Control configuration struct */ - #define EWIC ((EWIC_Type *) EWIC_BASE ) /*!< EWIC configuration struct */ - #define PRCCFGINF ((PrcCfgInf_Type *) PRCCFGINF_BASE ) /*!< Processor Configuration Information configuration struct */ - #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< \deprecated Core Debug configuration struct */ - #define DCB ((DCB_Type *) DCB_BASE ) /*!< DCB configuration struct */ - #define DIB ((DIB_Type *) DIB_BASE ) /*!< DIB configuration struct */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ - #endif - - #if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U) - #define PMU_BASE (0xE0003000UL) /*!< PMU Base Address */ - #define PMU ((PMU_Type *) PMU_BASE ) /*!< PMU configuration struct */ - #endif - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ - #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ - #endif - - #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ - #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ - #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< \deprecated Core Debug Base Address (non-secure address space) */ - #define DCB_BASE_NS (0xE002EDF0UL) /*!< DCB Base Address (non-secure address space) */ - #define DIB_BASE_NS (0xE002EFB0UL) /*!< DIB Base Address (non-secure address space) */ - #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ - #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ - #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ - - #define ICB_NS ((ICB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ - #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ - #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ - #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ - #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct (non-secure address space) */ - #define DCB_NS ((DCB_Type *) DCB_BASE_NS ) /*!< DCB configuration struct (non-secure address space) */ - #define DIB_NS ((DIB_Type *) DIB_BASE_NS ) /*!< DIB configuration struct (non-secure address space) */ - - #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ - #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ - #endif - - #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ - #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ -/*@} */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_register_aliases Backwards Compatibility Aliases - \brief Register alias definitions for backwards compatibility. - @{ - */ - -/*@} */ - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* Special LR values for Secure/Non-Secure call handling and exception handling */ - -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ -#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ - -/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ -#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ -#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ -#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ -#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ -#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ -#define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ -#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ - -/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ -#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ -#else -#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ -#endif - - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Interrupt Target State - \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - \return 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Target State - \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Clear Interrupt Target State - \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - __DSB(); -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Priority Grouping (non-secure) - \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB_NS->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB_NS->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping (non-secure) - \details Reads the priority grouping field from the non-secure NVIC when in secure state. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) -{ - return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt (non-secure) - \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Interrupt Enable status (non-secure) - \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt (non-secure) - \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Pending Interrupt (non-secure) - \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt (non-secure) - \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt (non-secure) - \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt (non-secure) - \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority (non-secure) - \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every non-secure processor exception. - */ -__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority (non-secure) - \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_NVICFunctions */ - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv8.h" - -#endif - -/* ########################## PMU functions and events #################################### */ - -#if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U) - -#include "pmu_armv8.h" - -/** - \brief Cortex-M85 PMU events - \note Architectural PMU events can be found in pmu_armv8.h -*/ - -#define ARMCM85_PMU_ECC_ERR 0xC000 /*!< One or more Error Correcting Code (ECC) errors detected */ -#define ARMCM85_PMU_ECC_ERR_MBIT 0xC001 /*!< One or more multi-bit ECC errors detected */ -#define ARMCM85_PMU_ECC_ERR_DCACHE 0xC010 /*!< One or more ECC errors in the data cache */ -#define ARMCM85_PMU_ECC_ERR_ICACHE 0xC011 /*!< One or more ECC errors in the instruction cache */ -#define ARMCM85_PMU_ECC_ERR_MBIT_DCACHE 0xC012 /*!< One or more multi-bit ECC errors in the data cache */ -#define ARMCM85_PMU_ECC_ERR_MBIT_ICACHE 0xC013 /*!< One or more multi-bit ECC errors in the instruction cache */ -#define ARMCM85_PMU_ECC_ERR_DTCM 0xC020 /*!< One or more ECC errors in the Data Tightly Coupled Memory (DTCM) */ -#define ARMCM85_PMU_ECC_ERR_ITCM 0xC021 /*!< One or more ECC errors in the Instruction Tightly Coupled Memory (ITCM) */ -#define ARMCM85_PMU_ECC_ERR_MBIT_DTCM 0xC022 /*!< One or more multi-bit ECC errors in the DTCM */ -#define ARMCM85_PMU_ECC_ERR_MBIT_ITCM 0xC023 /*!< One or more multi-bit ECC errors in the ITCM */ -#define ARMCM85_PMU_PF_LINEFILL 0xC100 /*!< The prefetcher starts a line-fill */ -#define ARMCM85_PMU_PF_CANCEL 0xC101 /*!< The prefetcher stops prefetching */ -#define ARMCM85_PMU_PF_DROP_LINEFILL 0xC102 /*!< A linefill triggered by a prefetcher has been dropped because of lack of buffering */ -#define ARMCM85_PMU_NWAMODE_ENTER 0xC200 /*!< No write-allocate mode entry */ -#define ARMCM85_PMU_NWAMODE 0xC201 /*!< Write-allocate store is not allocated into the data cache due to no-write-allocate mode */ -#define ARMCM85_PMU_SAHB_ACCESS 0xC300 /*!< Read or write access on the S-AHB interface to the TCM */ -#define ARMCM85_PMU_PAHB_ACCESS 0xC301 /*!< Read or write access on the P-AHB write interface */ -#define ARMCM85_PMU_AXI_WRITE_ACCESS 0xC302 /*!< Any beat access to M-AXI write interface */ -#define ARMCM85_PMU_AXI_READ_ACCESS 0xC303 /*!< Any beat access to M-AXI read interface */ -#define ARMCM85_PMU_DOSTIMEOUT_DOUBLE 0xC400 /*!< Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress */ -#define ARMCM85_PMU_DOSTIMEOUT_TRIPLE 0xC401 /*!< Denial of Service timeout has fired three times and blocked the LSU to force forward progress */ - -#endif - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = FPU->MVFR0; - if ((mvfr0 & (FPU_MVFR0_FPSP_Msk | FPU_MVFR0_FPDP_Msk)) == 0x220U) - { - return 2U; /* Double + Single precision FPU */ - } - else if ((mvfr0 & (FPU_MVFR0_FPSP_Msk | FPU_MVFR0_FPDP_Msk)) == 0x020U) - { - return 1U; /* Single precision FPU */ - } - else - { - return 0U; /* No FPU */ - } -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - -/* ########################## MVE functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_MveFunctions MVE Functions - \brief Function that provides MVE type. - @{ - */ - -/** - \brief get MVE type - \details returns the MVE type - \returns - - \b 0: No Vector Extension (MVE) - - \b 1: Integer Vector Extension (MVE-I) - - \b 2: Floating-point Vector Extension (MVE-F) - */ -__STATIC_INLINE uint32_t SCB_GetMVEType(void) -{ - const uint32_t mvfr1 = FPU->MVFR1; - if ((mvfr1 & FPU_MVFR1_MVE_Msk) == (0x2U << FPU_MVFR1_MVE_Pos)) - { - return 2U; - } - else if ((mvfr1 & FPU_MVFR1_MVE_Msk) == (0x1U << FPU_MVFR1_MVE_Pos)) - { - return 1U; - } - else - { - return 0U; - } -} - - -/*@} end of CMSIS_Core_MveFunctions */ - - -/* ########################## Cache functions #################################### */ - -#if ((defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)) || \ - (defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U))) -#include "cachel1_armv7.h" -#endif - - -/* ########################## SAU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SAUFunctions SAU Functions - \brief Functions that configure the SAU. - @{ - */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - -/** - \brief Enable SAU - \details Enables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Enable(void) -{ - SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); -} - - - -/** - \brief Disable SAU - \details Disables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Disable(void) -{ - SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); -} - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_SAUFunctions */ - - - -/* ################### PAC Key functions ########################### */ - -#if (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1)) -#include "pac_armv81.h" -#endif - - -/* ################################## Debug Control function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DCBFunctions Debug Control Functions - \brief Functions that access the Debug Control Block. - @{ - */ - - -/** - \brief Set Debug Authentication Control Register - \details writes to Debug Authentication Control register. - \param [in] value value to be writen. - */ -__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value) -{ - __DSB(); - __ISB(); - DCB->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register - \details Reads Debug Authentication Control register. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void) -{ - return (DCB->DAUTHCTRL); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Debug Authentication Control Register (non-secure) - \details writes to non-secure Debug Authentication Control register when in secure state. - \param [in] value value to be writen - */ -__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value) -{ - __DSB(); - __ISB(); - DCB_NS->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register (non-secure) - \details Reads non-secure Debug Authentication Control register when in secure state. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) -{ - return (DCB_NS->DAUTHCTRL); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## Debug Identification function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions - \brief Functions that access the Debug Identification Block. - @{ - */ - - -/** - \brief Get Debug Authentication Status Register - \details Reads Debug Authentication Status register. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t DIB_GetAuthStatus(void) -{ - return (DIB->DAUTHSTATUS); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Debug Authentication Status Register (non-secure) - \details Reads non-secure Debug Authentication Status register when in secure state. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void) -{ - return (DIB_NS->DAUTHSTATUS); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief System Tick Configuration (non-secure) - \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function TZ_SysTick_Config_NS is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - - */ -__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM85_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_sc000.h b/Drivers/CMSIS/Core/Include/core_sc000.h deleted file mode 100644 index 357c1df..0000000 --- a/Drivers/CMSIS/Core/Include/core_sc000.h +++ /dev/null @@ -1,1030 +0,0 @@ -/**************************************************************************//** - * @file core_sc000.h - * @brief CMSIS SC000 Core Peripheral Access Layer Header File - * @version V5.0.7 - * @date 27. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_SC000_H_GENERIC -#define __CORE_SC000_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup SC000 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS SC000 definitions */ -#define __SC000_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __SC000_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16U) | \ - __SC000_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_SC (000U) /*!< Cortex secure core */ - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC000_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_SC000_H_DEPENDANT -#define __CORE_SC000_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __SC000_REV - #define __SC000_REV 0x0000U - #warning "__SC000_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 0U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group SC000 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t _reserved0:1; /*!< bit: 0 Reserved */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - uint32_t RESERVED1[154U]; - __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the SC000 header file. - @{ - */ -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else -/*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for SC000 */ -/*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for SC000 */ - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ -/*#define NVIC_GetActive __NVIC_GetActive not available for SC000 */ - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* The following EXC_RETURN values are saved the LR on exception entry */ -#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ -#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ -#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ - - -/* Interrupt Priorities are WORD accessible only under Armv6-M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - /* ARM Application Note 321 states that the M0 and M0+ do not require the architectural barrier - assume SC000 is the same */ -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - return 0U; /* No FPU */ -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC000_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_sc300.h b/Drivers/CMSIS/Core/Include/core_sc300.h deleted file mode 100644 index 5b66b5f..0000000 --- a/Drivers/CMSIS/Core/Include/core_sc300.h +++ /dev/null @@ -1,1917 +0,0 @@ -/**************************************************************************//** - * @file core_sc300.h - * @brief CMSIS SC300 Core Peripheral Access Layer Header File - * @version V5.0.10 - * @date 04. June 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_SC300_H_GENERIC -#define __CORE_SC300_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup SC3000 - @{ - */ - -#include "cmsis_version.h" - -/* CMSIS SC300 definitions */ -#define __SC300_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __SC300_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16U) | \ - __SC300_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ - -#define __CORTEX_SC (300U) /*!< Cortex secure core */ - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC300_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_SC300_H_DEPENDANT -#define __CORE_SC300_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __SC300_REV - #define __SC300_REV 0x0000U - #warning "__SC300_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 1U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group SC300 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:1; /*!< bit: 9 Reserved */ - uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ - uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit */ - uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ -#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ -#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RESERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[5U]; - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - uint32_t RESERVED1[129U]; - __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ -#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ - -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ -#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ - -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ -#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ - -#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ -#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ -#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ - -#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ -#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -#ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ - #define NVIC_GetActive __NVIC_GetActive - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset -#endif /* CMSIS_NVIC_VIRTUAL */ - -#ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE -#else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 - - -/* The following EXC_RETURN values are saved the LR on exception entry */ -#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ -#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ -#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ - - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - /* ARM Application Note 321 states that the M3 does not require the architectural barrier */ -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - return 0U; /* No FPU */ -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC300_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/core_starmc1.h b/Drivers/CMSIS/Core/Include/core_starmc1.h deleted file mode 100644 index 68f5bce..0000000 --- a/Drivers/CMSIS/Core/Include/core_starmc1.h +++ /dev/null @@ -1,3592 +0,0 @@ -/**************************************************************************//** - * @file core_starmc1.h - * @brief CMSIS ArmChina STAR-MC1 Core Peripheral Access Layer Header File - * @version V1.0.2 - * @date 07. April 2022 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. - * Copyright (c) 2018-2022 Arm China. - * All rights reserved. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#elif defined ( __GNUC__ ) - #pragma GCC diagnostic ignored "-Wpedantic" /* disable pedantic warning due to unnamed structs/unions */ -#endif - -#ifndef __CORE_STAR_H_GENERIC -#define __CORE_STAR_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup STAR-MC1 - @{ - */ - -#include "cmsis_version.h" - -/* Macro Define for STAR-MC1 */ -#define __STAR_MC (1U) /*!< STAR-MC Core */ - -/** __FPU_USED indicates whether an FPU is used or not. - For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. -*/ -#if defined ( __CC_ARM ) - #if defined (__TARGET_FPU_VFP) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined (__ARM_FP) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined (__ARMVFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - - #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) - #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) - #define __DSP_USED 1U - #else - #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" - #define __DSP_USED 0U - #endif - #else - #define __DSP_USED 0U - #endif - -#elif defined ( __TI_ARM__ ) - #if defined (__TI_VFP_SUPPORT__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined (__FPU_VFP__) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_STAR_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_STAR_H_DEPENDANT -#define __CORE_STAR_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __STAR_REV - #define __STAR_REV 0x0000U - #warning "__STAR_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __SAUREGION_PRESENT - #define __SAUREGION_PRESENT 0U - #warning "__SAUREGION_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DSP_PRESENT - #define __DSP_PRESENT 0U - #warning "__DSP_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __ICACHE_PRESENT - #define __ICACHE_PRESENT 0U - #warning "__ICACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DCACHE_PRESENT - #define __DCACHE_PRESENT 0U - #warning "__DCACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DTCM_PRESENT - #define __DTCM_PRESENT 0U - #warning "__DTCM_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group STAR-MC1 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core SAU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for STAR-MC1 processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ - uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ - uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ - uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ -#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ - -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[16U]; - __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[16U]; - __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[16U]; - __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[16U]; - __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[16U]; - __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ - uint32_t RESERVED5[16U]; - __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED6[580U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ID_ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[1U]; - __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ - __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ - __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ - __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ - uint32_t RESERVED_ADD1[21U]; - __IOM uint32_t SFSR; /*!< Offset: 0x0E4 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x0E8 (R/W) Secure Fault Address Register */ - uint32_t RESERVED3[69U]; - __OM uint32_t STIR; /*!< Offset: F00-D00=0x200 ( /W) Software Triggered Interrupt Register */ - uint32_t RESERVED4[15U]; - __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ - uint32_t RESERVED5[1U]; - __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ - uint32_t RESERVED6[1U]; - __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ - __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ - __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ - __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ - __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ - __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ - __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ - __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ -} SCB_Type; - -typedef struct -{ - __IOM uint32_t CACR; /*!< Offset: 0x0 (R/W) L1 Cache Control Register */ - __IOM uint32_t ITCMCR; /*!< Offset: 0x10 (R/W) Instruction Tightly-Coupled Memory Control Register */ - __IOM uint32_t DTCMCR; /*!< Offset: 0x14 (R/W) Data Tightly-Coupled Memory Control Registers */ -}EMSS_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ -#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ - -#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ -#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ - -#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ -#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ -#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ -#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ - -#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ -#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ -#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ -#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ - -#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ -#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ -#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ -#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ - -#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ -#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ - -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ -#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ - -#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ -#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ -#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ -#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ - -#define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ -#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ - -#define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ -#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ - -#define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ -#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ - -#define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ -#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ - -#define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ -#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ - -/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ -#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ - -#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ -#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ - -#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ -#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ - -#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ -#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ - -#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ -#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ - -#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ -#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ - -#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ -#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ - -/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ -#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ -#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ - -#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ -#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ - -#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ -#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ - -#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ -#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ - -#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ -#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ - -#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ -#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ - -#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ -#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/* SCB Non-Secure Access Control Register Definitions */ -#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ -#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ - -#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ -#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ - -#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */ -#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */ - -/* SCB Cache Level ID Register Definitions */ -#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ -#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ - -#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ -#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ - -#define SCB_CLIDR_IC_Pos 0U /*!< SCB CLIDR: IC Position */ -#define SCB_CLIDR_IC_Msk (1UL << SCB_CLIDR_IC_Pos) /*!< SCB CLIDR: IC Mask */ - -#define SCB_CLIDR_DC_Pos 1U /*!< SCB CLIDR: DC Position */ -#define SCB_CLIDR_DC_Msk (1UL << SCB_CLIDR_DC_Pos) /*!< SCB CLIDR: DC Mask */ - - - -/* SCB Cache Type Register Definitions */ -#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ -#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ - -#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ -#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ - -#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ -#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ - -#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ -#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ - -#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ -#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ - -/* SCB Cache Size ID Register Definitions */ -#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ -#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ - -#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ -#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ - -#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ -#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ - -#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ -#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ - -#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ -#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ - -#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ -#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ - -#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ -#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ - -/* SCB Cache Size Selection Register Definitions */ -#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ -#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ - -#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ -#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ - -/* SCB Software Triggered Interrupt Register Definitions */ -#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ -#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ - -/* SCB D-Cache line Invalidate by Set-way Register Definitions */ -#define SCB_DCISW_LEVEL_Pos 1U /*!< SCB DCISW: Level Position */ -#define SCB_DCISW_LEVEL_Msk (7UL << SCB_DCISW_LEVEL_Pos) /*!< SCB DCISW: Level Mask */ - -#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ -#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ - -#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ -#define SCB_DCISW_SET_Msk (0xFFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ - -/* SCB D-Cache Clean line by Set-way Register Definitions */ -#define SCB_DCCSW_LEVEL_Pos 1U /*!< SCB DCCSW: Level Position */ -#define SCB_DCCSW_LEVEL_Msk (7UL << SCB_DCCSW_LEVEL_Pos) /*!< SCB DCCSW: Level Mask */ - -#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ -#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ - -#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ -#define SCB_DCCSW_SET_Msk (0xFFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ - -/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ -#define SCB_DCCISW_LEVEL_Pos 1U /*!< SCB DCCISW: Level Position */ -#define SCB_DCCISW_LEVEL_Msk (7UL << SCB_DCCISW_LEVEL_Pos) /*!< SCB DCCISW: Level Mask */ - -#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ -#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ - -#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ -#define SCB_DCCISW_SET_Msk (0xFFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ - -/* ArmChina: Implementation Defined */ -/* Instruction Tightly-Coupled Memory Control Register Definitions */ -#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */ -#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */ - -#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */ -#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */ - -/* Data Tightly-Coupled Memory Control Register Definitions */ -#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */ -#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */ - -#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */ -#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */ - -/* L1 Cache Control Register Definitions */ -#define SCB_CACR_DCCLEAN_Pos 16U /*!< SCB CACR: DCCLEAN Position */ -#define SCB_CACR_DCCLEAN_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: DCCLEAN Mask */ - -#define SCB_CACR_ICACTIVE_Pos 13U /*!< SCB CACR: ICACTIVE Position */ -#define SCB_CACR_ICACTIVE_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: ICACTIVE Mask */ - -#define SCB_CACR_DCACTIVE_Pos 12U /*!< SCB CACR: DCACTIVE Position */ -#define SCB_CACR_DCACTIVE_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: DCACTIVE Mask */ - -#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */ -#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ - __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[32U]; - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ - uint32_t RESERVED6[4U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Stimulus Port Register Definitions */ -#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ -#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ - -#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ -#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ -#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ - -#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ -#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - uint32_t RESERVED3[1U]; - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED4[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - uint32_t RESERVED5[1U]; - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED6[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - uint32_t RESERVED7[1U]; - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED8[1U]; - __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ - uint32_t RESERVED9[1U]; - __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ - uint32_t RESERVED10[1U]; - __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ - uint32_t RESERVED11[1U]; - __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ - uint32_t RESERVED12[1U]; - __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ - uint32_t RESERVED13[1U]; - __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ - uint32_t RESERVED14[1U]; - __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ - uint32_t RESERVED15[1U]; - __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ - uint32_t RESERVED16[1U]; - __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ - uint32_t RESERVED17[1U]; - __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ - uint32_t RESERVED18[1U]; - __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ - uint32_t RESERVED19[1U]; - __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ - uint32_t RESERVED20[1U]; - __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ - uint32_t RESERVED21[1U]; - __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ - uint32_t RESERVED22[1U]; - __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ - uint32_t RESERVED23[1U]; - __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ - uint32_t RESERVED24[1U]; - __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ - uint32_t RESERVED25[1U]; - __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ - uint32_t RESERVED26[1U]; - __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ - uint32_t RESERVED27[1U]; - __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ - uint32_t RESERVED28[1U]; - __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ - uint32_t RESERVED29[1U]; - __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ - uint32_t RESERVED30[1U]; - __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ - uint32_t RESERVED31[1U]; - __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ - uint32_t RESERVED32[934U]; - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ - uint32_t RESERVED33[1U]; - __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ -#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ -#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ - -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ -#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ - -#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ -#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ - __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */ - __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */ - __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ -#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration Test FIFO Test Data 0 Register Definitions */ -#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */ -#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */ - -#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */ -#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */ - -#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */ -#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */ - -#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */ -#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */ -#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */ -#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */ - -#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */ -#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */ - -/* TPI Integration Test ATB Control Register 2 Register Definitions */ -#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */ -#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */ - -#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */ -#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */ - -#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */ -#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */ - -#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */ -#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */ - -/* TPI Integration Test FIFO Test Data 1 Register Definitions */ -#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */ -#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */ - -#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */ -#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */ - -#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */ -#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */ - -#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */ -#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */ -#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */ -#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */ - -#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */ -#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */ - -/* TPI Integration Test ATB Control Register 0 Definitions */ -#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */ -#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */ - -#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */ -#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */ - -#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */ -#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */ - -#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */ -#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */ -#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ - __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ - __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ - __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ - uint32_t RESERVED0[1]; - union { - __IOM uint32_t MAIR[2]; - struct { - __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ - __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ - }; - }; -} MPU_Type; - -#define MPU_TYPE_RALIASES 4U - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ -#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ - -#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ -#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ - -#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ -#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ - -#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ -#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ - -/* MPU Region Limit Address Register Definitions */ -#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ -#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ - -#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ -#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ - -#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ -#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ - -/* MPU Memory Attribute Indirection Register 0 Definitions */ -#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ -#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ - -#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ -#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ - -#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ -#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ - -#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ -#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ - -/* MPU Memory Attribute Indirection Register 1 Definitions */ -#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ -#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ - -#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ -#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ - -#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ -#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ - -#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ -#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SAU Security Attribution Unit (SAU) - \brief Type definitions for the Security Attribution Unit (SAU) - @{ - */ - -/** - \brief Structure type to access the Security Attribution Unit (SAU). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ - __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ - __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ -#else - uint32_t RESERVED0[3]; -#endif - __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ - __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ -} SAU_Type; - -/* SAU Control Register Definitions */ -#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ -#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ - -#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ -#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ - -/* SAU Type Register Definitions */ -#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ -#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ - -#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) -/* SAU Region Number Register Definitions */ -#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ -#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ - -/* SAU Region Base Address Register Definitions */ -#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ -#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ - -/* SAU Region Limit Address Register Definitions */ -#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ -#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ - -#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ -#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ - -#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ -#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ - -#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ - -/* Secure Fault Status Register Definitions */ -#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ -#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ - -#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ -#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ - -#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ -#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ - -#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ -#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ - -#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ -#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ - -#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ -#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ - -#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ -#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ - -#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ -#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ - -/*@} end of group CMSIS_SAU */ -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and VFP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ -#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ - -#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ -#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ - -#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ -#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ - -#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ -#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ - -#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ -#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ - -#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ -#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ -#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ -#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -/* Media and VFP Feature Register 0 Definitions */ -#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ -#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ - -#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ -#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ - -#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ -#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ - -#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ -#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ -#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ - -#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ -#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ - -#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ -#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ - -#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ -#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ - -/* Media and VFP Feature Register 1 Definitions */ -#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ -#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ - -#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ -#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ - -#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ -#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ - -#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ -#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ - -/* Media and VFP Feature Register 2 Definitions */ -#define FPU_MVFR2_FPMisc_Pos 4U /*!< MVFR2: FPMisc bits Position */ -#define FPU_MVFR2_FPMisc_Msk (0xFUL << FPU_MVFR2_FPMisc_Pos) /*!< MVFR2: FPMisc bits Mask */ - -/*@} end of group CMSIS_FPU */ - - - - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DCB Debug Control Block - \brief Type definitions for the Debug Control Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Control Block Registers (DCB). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ - __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ -} DCB_Type; - -/* DHCSR, Debug Halting Control and Status Register Definitions */ -#define DCB_DHCSR_DBGKEY_Pos 16U /*!< DCB DHCSR: Debug key Position */ -#define DCB_DHCSR_DBGKEY_Msk (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos) /*!< DCB DHCSR: Debug key Mask */ - -#define DCB_DHCSR_S_RESTART_ST_Pos 26U /*!< DCB DHCSR: Restart sticky status Position */ -#define DCB_DHCSR_S_RESTART_ST_Msk (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos) /*!< DCB DHCSR: Restart sticky status Mask */ - -#define DCB_DHCSR_S_RESET_ST_Pos 25U /*!< DCB DHCSR: Reset sticky status Position */ -#define DCB_DHCSR_S_RESET_ST_Msk (0x1UL << DCB_DHCSR_S_RESET_ST_Pos) /*!< DCB DHCSR: Reset sticky status Mask */ - -#define DCB_DHCSR_S_RETIRE_ST_Pos 24U /*!< DCB DHCSR: Retire sticky status Position */ -#define DCB_DHCSR_S_RETIRE_ST_Msk (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos) /*!< DCB DHCSR: Retire sticky status Mask */ - -#define DCB_DHCSR_S_SDE_Pos 20U /*!< DCB DHCSR: Secure debug enabled Position */ -#define DCB_DHCSR_S_SDE_Msk (0x1UL << DCB_DHCSR_S_SDE_Pos) /*!< DCB DHCSR: Secure debug enabled Mask */ - -#define DCB_DHCSR_S_LOCKUP_Pos 19U /*!< DCB DHCSR: Lockup status Position */ -#define DCB_DHCSR_S_LOCKUP_Msk (0x1UL << DCB_DHCSR_S_LOCKUP_Pos) /*!< DCB DHCSR: Lockup status Mask */ - -#define DCB_DHCSR_S_SLEEP_Pos 18U /*!< DCB DHCSR: Sleeping status Position */ -#define DCB_DHCSR_S_SLEEP_Msk (0x1UL << DCB_DHCSR_S_SLEEP_Pos) /*!< DCB DHCSR: Sleeping status Mask */ - -#define DCB_DHCSR_S_HALT_Pos 17U /*!< DCB DHCSR: Halted status Position */ -#define DCB_DHCSR_S_HALT_Msk (0x1UL << DCB_DHCSR_S_HALT_Pos) /*!< DCB DHCSR: Halted status Mask */ - -#define DCB_DHCSR_S_REGRDY_Pos 16U /*!< DCB DHCSR: Register ready status Position */ -#define DCB_DHCSR_S_REGRDY_Msk (0x1UL << DCB_DHCSR_S_REGRDY_Pos) /*!< DCB DHCSR: Register ready status Mask */ - -#define DCB_DHCSR_C_SNAPSTALL_Pos 5U /*!< DCB DHCSR: Snap stall control Position */ -#define DCB_DHCSR_C_SNAPSTALL_Msk (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos) /*!< DCB DHCSR: Snap stall control Mask */ - -#define DCB_DHCSR_C_MASKINTS_Pos 3U /*!< DCB DHCSR: Mask interrupts control Position */ -#define DCB_DHCSR_C_MASKINTS_Msk (0x1UL << DCB_DHCSR_C_MASKINTS_Pos) /*!< DCB DHCSR: Mask interrupts control Mask */ - -#define DCB_DHCSR_C_STEP_Pos 2U /*!< DCB DHCSR: Step control Position */ -#define DCB_DHCSR_C_STEP_Msk (0x1UL << DCB_DHCSR_C_STEP_Pos) /*!< DCB DHCSR: Step control Mask */ - -#define DCB_DHCSR_C_HALT_Pos 1U /*!< DCB DHCSR: Halt control Position */ -#define DCB_DHCSR_C_HALT_Msk (0x1UL << DCB_DHCSR_C_HALT_Pos) /*!< DCB DHCSR: Halt control Mask */ - -#define DCB_DHCSR_C_DEBUGEN_Pos 0U /*!< DCB DHCSR: Debug enable control Position */ -#define DCB_DHCSR_C_DEBUGEN_Msk (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/) /*!< DCB DHCSR: Debug enable control Mask */ - -/* DCRSR, Debug Core Register Select Register Definitions */ -#define DCB_DCRSR_REGWnR_Pos 16U /*!< DCB DCRSR: Register write/not-read Position */ -#define DCB_DCRSR_REGWnR_Msk (0x1UL << DCB_DCRSR_REGWnR_Pos) /*!< DCB DCRSR: Register write/not-read Mask */ - -#define DCB_DCRSR_REGSEL_Pos 0U /*!< DCB DCRSR: Register selector Position */ -#define DCB_DCRSR_REGSEL_Msk (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/) /*!< DCB DCRSR: Register selector Mask */ - -/* DCRDR, Debug Core Register Data Register Definitions */ -#define DCB_DCRDR_DBGTMP_Pos 0U /*!< DCB DCRDR: Data temporary buffer Position */ -#define DCB_DCRDR_DBGTMP_Msk (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/) /*!< DCB DCRDR: Data temporary buffer Mask */ - -/* DEMCR, Debug Exception and Monitor Control Register Definitions */ -#define DCB_DEMCR_TRCENA_Pos 24U /*!< DCB DEMCR: Trace enable Position */ -#define DCB_DEMCR_TRCENA_Msk (0x1UL << DCB_DEMCR_TRCENA_Pos) /*!< DCB DEMCR: Trace enable Mask */ - -#define DCB_DEMCR_MONPRKEY_Pos 23U /*!< DCB DEMCR: Monitor pend req key Position */ -#define DCB_DEMCR_MONPRKEY_Msk (0x1UL << DCB_DEMCR_MONPRKEY_Pos) /*!< DCB DEMCR: Monitor pend req key Mask */ - -#define DCB_DEMCR_UMON_EN_Pos 21U /*!< DCB DEMCR: Unprivileged monitor enable Position */ -#define DCB_DEMCR_UMON_EN_Msk (0x1UL << DCB_DEMCR_UMON_EN_Pos) /*!< DCB DEMCR: Unprivileged monitor enable Mask */ - -#define DCB_DEMCR_SDME_Pos 20U /*!< DCB DEMCR: Secure DebugMonitor enable Position */ -#define DCB_DEMCR_SDME_Msk (0x1UL << DCB_DEMCR_SDME_Pos) /*!< DCB DEMCR: Secure DebugMonitor enable Mask */ - -#define DCB_DEMCR_MON_REQ_Pos 19U /*!< DCB DEMCR: Monitor request Position */ -#define DCB_DEMCR_MON_REQ_Msk (0x1UL << DCB_DEMCR_MON_REQ_Pos) /*!< DCB DEMCR: Monitor request Mask */ - -#define DCB_DEMCR_MON_STEP_Pos 18U /*!< DCB DEMCR: Monitor step Position */ -#define DCB_DEMCR_MON_STEP_Msk (0x1UL << DCB_DEMCR_MON_STEP_Pos) /*!< DCB DEMCR: Monitor step Mask */ - -#define DCB_DEMCR_MON_PEND_Pos 17U /*!< DCB DEMCR: Monitor pend Position */ -#define DCB_DEMCR_MON_PEND_Msk (0x1UL << DCB_DEMCR_MON_PEND_Pos) /*!< DCB DEMCR: Monitor pend Mask */ - -#define DCB_DEMCR_MON_EN_Pos 16U /*!< DCB DEMCR: Monitor enable Position */ -#define DCB_DEMCR_MON_EN_Msk (0x1UL << DCB_DEMCR_MON_EN_Pos) /*!< DCB DEMCR: Monitor enable Mask */ - -#define DCB_DEMCR_VC_SFERR_Pos 11U /*!< DCB DEMCR: Vector Catch SecureFault Position */ -#define DCB_DEMCR_VC_SFERR_Msk (0x1UL << DCB_DEMCR_VC_SFERR_Pos) /*!< DCB DEMCR: Vector Catch SecureFault Mask */ - -#define DCB_DEMCR_VC_HARDERR_Pos 10U /*!< DCB DEMCR: Vector Catch HardFault errors Position */ -#define DCB_DEMCR_VC_HARDERR_Msk (0x1UL << DCB_DEMCR_VC_HARDERR_Pos) /*!< DCB DEMCR: Vector Catch HardFault errors Mask */ - -#define DCB_DEMCR_VC_INTERR_Pos 9U /*!< DCB DEMCR: Vector Catch interrupt errors Position */ -#define DCB_DEMCR_VC_INTERR_Msk (0x1UL << DCB_DEMCR_VC_INTERR_Pos) /*!< DCB DEMCR: Vector Catch interrupt errors Mask */ - -#define DCB_DEMCR_VC_BUSERR_Pos 8U /*!< DCB DEMCR: Vector Catch BusFault errors Position */ -#define DCB_DEMCR_VC_BUSERR_Msk (0x1UL << DCB_DEMCR_VC_BUSERR_Pos) /*!< DCB DEMCR: Vector Catch BusFault errors Mask */ - -#define DCB_DEMCR_VC_STATERR_Pos 7U /*!< DCB DEMCR: Vector Catch state errors Position */ -#define DCB_DEMCR_VC_STATERR_Msk (0x1UL << DCB_DEMCR_VC_STATERR_Pos) /*!< DCB DEMCR: Vector Catch state errors Mask */ - -#define DCB_DEMCR_VC_CHKERR_Pos 6U /*!< DCB DEMCR: Vector Catch check errors Position */ -#define DCB_DEMCR_VC_CHKERR_Msk (0x1UL << DCB_DEMCR_VC_CHKERR_Pos) /*!< DCB DEMCR: Vector Catch check errors Mask */ - -#define DCB_DEMCR_VC_NOCPERR_Pos 5U /*!< DCB DEMCR: Vector Catch NOCP errors Position */ -#define DCB_DEMCR_VC_NOCPERR_Msk (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos) /*!< DCB DEMCR: Vector Catch NOCP errors Mask */ - -#define DCB_DEMCR_VC_MMERR_Pos 4U /*!< DCB DEMCR: Vector Catch MemManage errors Position */ -#define DCB_DEMCR_VC_MMERR_Msk (0x1UL << DCB_DEMCR_VC_MMERR_Pos) /*!< DCB DEMCR: Vector Catch MemManage errors Mask */ - -#define DCB_DEMCR_VC_CORERESET_Pos 0U /*!< DCB DEMCR: Vector Catch Core reset Position */ -#define DCB_DEMCR_VC_CORERESET_Msk (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/) /*!< DCB DEMCR: Vector Catch Core reset Mask */ - -/* DAUTHCTRL, Debug Authentication Control Register Definitions */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPNIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPNIDENSEL_Msk (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos) /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */ - -#define DCB_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */ -#define DCB_DAUTHCTRL_INTSPIDEN_Msk (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos) /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */ - -#define DCB_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */ -#define DCB_DAUTHCTRL_SPIDENSEL_Msk (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */ - -/* DSCSR, Debug Security Control and Status Register Definitions */ -#define DCB_DSCSR_CDSKEY_Pos 17U /*!< DCB DSCSR: CDS write-enable key Position */ -#define DCB_DSCSR_CDSKEY_Msk (0x1UL << DCB_DSCSR_CDSKEY_Pos) /*!< DCB DSCSR: CDS write-enable key Mask */ - -#define DCB_DSCSR_CDS_Pos 16U /*!< DCB DSCSR: Current domain Secure Position */ -#define DCB_DSCSR_CDS_Msk (0x1UL << DCB_DSCSR_CDS_Pos) /*!< DCB DSCSR: Current domain Secure Mask */ - -#define DCB_DSCSR_SBRSEL_Pos 1U /*!< DCB DSCSR: Secure banked register select Position */ -#define DCB_DSCSR_SBRSEL_Msk (0x1UL << DCB_DSCSR_SBRSEL_Pos) /*!< DCB DSCSR: Secure banked register select Mask */ - -#define DCB_DSCSR_SBRSELEN_Pos 0U /*!< DCB DSCSR: Secure banked register select enable Position */ -#define DCB_DSCSR_SBRSELEN_Msk (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/) /*!< DCB DSCSR: Secure banked register select enable Mask */ - -/*@} end of group CMSIS_DCB */ - - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DIB Debug Identification Block - \brief Type definitions for the Debug Identification Block Registers - @{ - */ - -/** - \brief Structure type to access the Debug Identification Block Registers (DIB). - */ -typedef struct -{ - __OM uint32_t DLAR; /*!< Offset: 0x000 ( /W) SCS Software Lock Access Register */ - __IM uint32_t DLSR; /*!< Offset: 0x004 (R/ ) SCS Software Lock Status Register */ - __IM uint32_t DAUTHSTATUS; /*!< Offset: 0x008 (R/ ) Debug Authentication Status Register */ - __IM uint32_t DDEVARCH; /*!< Offset: 0x00C (R/ ) SCS Device Architecture Register */ - __IM uint32_t DDEVTYPE; /*!< Offset: 0x010 (R/ ) SCS Device Type Register */ -} DIB_Type; - -/* DLAR, SCS Software Lock Access Register Definitions */ -#define DIB_DLAR_KEY_Pos 0U /*!< DIB DLAR: KEY Position */ -#define DIB_DLAR_KEY_Msk (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */) /*!< DIB DLAR: KEY Mask */ - -/* DLSR, SCS Software Lock Status Register Definitions */ -#define DIB_DLSR_nTT_Pos 2U /*!< DIB DLSR: Not thirty-two bit Position */ -#define DIB_DLSR_nTT_Msk (0x1UL << DIB_DLSR_nTT_Pos ) /*!< DIB DLSR: Not thirty-two bit Mask */ - -#define DIB_DLSR_SLK_Pos 1U /*!< DIB DLSR: Software Lock status Position */ -#define DIB_DLSR_SLK_Msk (0x1UL << DIB_DLSR_SLK_Pos ) /*!< DIB DLSR: Software Lock status Mask */ - -#define DIB_DLSR_SLI_Pos 0U /*!< DIB DLSR: Software Lock implemented Position */ -#define DIB_DLSR_SLI_Msk (0x1UL /*<< DIB_DLSR_SLI_Pos*/) /*!< DIB DLSR: Software Lock implemented Mask */ - -/* DAUTHSTATUS, Debug Authentication Status Register Definitions */ -#define DIB_DAUTHSTATUS_SNID_Pos 6U /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_SNID_Msk (0x3UL << DIB_DAUTHSTATUS_SNID_Pos ) /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_SID_Pos 4U /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_SID_Msk (0x3UL << DIB_DAUTHSTATUS_SID_Pos ) /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSNID_Pos 2U /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSNID_Msk (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos ) /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */ - -#define DIB_DAUTHSTATUS_NSID_Pos 0U /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */ -#define DIB_DAUTHSTATUS_NSID_Msk (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/) /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */ - -/* DDEVARCH, SCS Device Architecture Register Definitions */ -#define DIB_DDEVARCH_ARCHITECT_Pos 21U /*!< DIB DDEVARCH: Architect Position */ -#define DIB_DDEVARCH_ARCHITECT_Msk (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos ) /*!< DIB DDEVARCH: Architect Mask */ - -#define DIB_DDEVARCH_PRESENT_Pos 20U /*!< DIB DDEVARCH: DEVARCH Present Position */ -#define DIB_DDEVARCH_PRESENT_Msk (0x1FUL << DIB_DDEVARCH_PRESENT_Pos ) /*!< DIB DDEVARCH: DEVARCH Present Mask */ - -#define DIB_DDEVARCH_REVISION_Pos 16U /*!< DIB DDEVARCH: Revision Position */ -#define DIB_DDEVARCH_REVISION_Msk (0xFUL << DIB_DDEVARCH_REVISION_Pos ) /*!< DIB DDEVARCH: Revision Mask */ - -#define DIB_DDEVARCH_ARCHVER_Pos 12U /*!< DIB DDEVARCH: Architecture Version Position */ -#define DIB_DDEVARCH_ARCHVER_Msk (0xFUL << DIB_DDEVARCH_ARCHVER_Pos ) /*!< DIB DDEVARCH: Architecture Version Mask */ - -#define DIB_DDEVARCH_ARCHPART_Pos 0U /*!< DIB DDEVARCH: Architecture Part Position */ -#define DIB_DDEVARCH_ARCHPART_Msk (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/) /*!< DIB DDEVARCH: Architecture Part Mask */ - -/* DDEVTYPE, SCS Device Type Register Definitions */ -#define DIB_DDEVTYPE_SUB_Pos 4U /*!< DIB DDEVTYPE: Sub-type Position */ -#define DIB_DDEVTYPE_SUB_Msk (0xFUL << DIB_DDEVTYPE_SUB_Pos ) /*!< DIB DDEVTYPE: Sub-type Mask */ - -#define DIB_DDEVTYPE_MAJOR_Pos 0U /*!< DIB DDEVTYPE: Major type Position */ -#define DIB_DDEVTYPE_MAJOR_Msk (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/) /*!< DIB DDEVTYPE: Major type Mask */ - - -/*@} end of group CMSIS_DIB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Core Hardware */ - #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ - #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ - #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ - #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ - #define DCB_BASE (0xE000EDF0UL) /*!< DCB Base Address */ - #define DIB_BASE (0xE000EFB0UL) /*!< DIB Base Address */ - #define EMSS_BASE (0xE001E000UL) /*!AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Interrupt Target State - \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - \return 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Target State - \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Clear Interrupt Target State - \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 if interrupt is assigned to Secure - 1 if interrupt is assigned to Non Secure - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); - return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; - __DSB(); -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *)SCB->VTOR; - return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses including - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/** - \brief Software Reset - \details Initiates a system reset request to reset the CPU. - */ -__NO_RETURN __STATIC_INLINE void __SW_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses including - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_BFHFNMINS_Msk) | /* Keep BFHFNMINS unchanged. Use this Reset function in case your case need to keep it */ - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | /* Keep priority group unchanged */ - SCB_AIRCR_SYSRESETREQ_Msk ); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Priority Grouping (non-secure) - \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB_NS->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - SCB_NS->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping (non-secure) - \details Reads the priority grouping field from the non-secure NVIC when in secure state. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) -{ - return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable Interrupt (non-secure) - \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Interrupt Enable status (non-secure) - \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt (non-secure) - \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Pending Interrupt (non-secure) - \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt (non-secure) - \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt (non-secure) - \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Get Active Interrupt (non-secure) - \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Interrupt Priority (non-secure) - \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every non-secure processor exception. - */ -__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority (non-secure) - \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } -} -#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_NVICFunctions */ - -/* ########################## MPU functions #################################### */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - -#include "mpu_armv8.h" - -#endif - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = FPU->MVFR0; - if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) - { - return 2U; /* Double + Single precision FPU */ - } - else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) - { - return 1U; /* Single precision FPU */ - } - else - { - return 0U; /* No FPU */ - } -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ########################## SAU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SAUFunctions SAU Functions - \brief Functions that configure the SAU. - @{ - */ - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - -/** - \brief Enable SAU - \details Enables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Enable(void) -{ - SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); -} - - - -/** - \brief Disable SAU - \details Disables the Security Attribution Unit (SAU). - */ -__STATIC_INLINE void TZ_SAU_Disable(void) -{ - SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); -} - -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_SAUFunctions */ - - - -/* ################################## Debug Control function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DCBFunctions Debug Control Functions - \brief Functions that access the Debug Control Block. - @{ - */ - - -/** - \brief Set Debug Authentication Control Register - \details writes to Debug Authentication Control register. - \param [in] value value to be writen. - */ -__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value) -{ - __DSB(); - __ISB(); - DCB->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register - \details Reads Debug Authentication Control register. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void) -{ - return (DCB->DAUTHCTRL); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Debug Authentication Control Register (non-secure) - \details writes to non-secure Debug Authentication Control register when in secure state. - \param [in] value value to be writen - */ -__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value) -{ - __DSB(); - __ISB(); - DCB_NS->DAUTHCTRL = value; - __DSB(); - __ISB(); -} - - -/** - \brief Get Debug Authentication Control Register (non-secure) - \details Reads non-secure Debug Authentication Control register when in secure state. - \return Debug Authentication Control Register. - */ -__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) -{ - return (DCB_NS->DAUTHCTRL); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - - - -/* ################################## Debug Identification function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions - \brief Functions that access the Debug Identification Block. - @{ - */ - - -/** - \brief Get Debug Authentication Status Register - \details Reads Debug Authentication Status register. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t DIB_GetAuthStatus(void) -{ - return (DIB->DAUTHSTATUS); -} - - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Debug Authentication Status Register (non-secure) - \details Reads non-secure Debug Authentication Status register when in secure state. - \return Debug Authentication Status Register. - */ -__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void) -{ - return (DIB_NS->DAUTHSTATUS); -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -/*@} end of CMSIS_Core_DCBFunctions */ - - -#if ((defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)) || \ - (defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U))) - -/* ########################## Cache functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_CacheFunctions Cache Functions - \brief Functions that configure Instruction and Data cache. - @{ - */ - -/* Cache Size ID Register Macros */ -#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos) -#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos ) - -#define __SCB_DCACHE_LINE_SIZE 32U /*!< STAR-MC1 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */ -#define __SCB_ICACHE_LINE_SIZE 32U /*!< STAR-MC1 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */ - -/** - \brief Enable I-Cache - \details Turns on I-Cache - */ -__STATIC_FORCEINLINE void SCB_EnableICache (void) -{ - #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) - if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */ - - __DSB(); - __ISB(); - SCB->ICIALLU = 0UL; /* invalidate I-Cache */ - __DSB(); - __ISB(); - SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */ - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Disable I-Cache - \details Turns off I-Cache - */ -__STATIC_FORCEINLINE void SCB_DisableICache (void) -{ - #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) - __DSB(); - __ISB(); - SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */ - SCB->ICIALLU = 0UL; /* invalidate I-Cache */ - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Invalidate I-Cache - \details Invalidates I-Cache - */ -__STATIC_FORCEINLINE void SCB_InvalidateICache (void) -{ - #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) - __DSB(); - __ISB(); - SCB->ICIALLU = 0UL; - __DSB(); - __ISB(); - #endif -} - - -/** - \brief I-Cache Invalidate by address - \details Invalidates I-Cache for the given address. - I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity. - I-Cache memory blocks which are part of given address + given size are invalidated. - \param[in] addr address - \param[in] isize size of memory block (in number of bytes) -*/ -__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isize) -{ - #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) - if ( isize > 0 ) { - int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); - uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */; - - __DSB(); - - do { - SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ - op_addr += __SCB_ICACHE_LINE_SIZE; - op_size -= __SCB_ICACHE_LINE_SIZE; - } while ( op_size > 0 ); - - __DSB(); - __ISB(); - } - #endif -} - - -/** - \brief Enable D-Cache - \details Turns on D-Cache - */ -__STATIC_FORCEINLINE void SCB_EnableDCache (void) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */ - - SCB->CSSELR = 0U; /* select Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | - ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways-- != 0U); - } while(sets-- != 0U); - __DSB(); - - SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */ - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Disable D-Cache - \details Turns off D-Cache - */ -__STATIC_FORCEINLINE void SCB_DisableDCache (void) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = 0U; /* select Level 1 data cache */ - __DSB(); - - SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* clean & invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | - ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways-- != 0U); - } while(sets-- != 0U); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Invalidate D-Cache - \details Invalidates D-Cache - */ -__STATIC_FORCEINLINE void SCB_InvalidateDCache (void) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = 0U; /* select Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | - ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways-- != 0U); - } while(sets-- != 0U); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Clean D-Cache - \details Cleans D-Cache - */ -__STATIC_FORCEINLINE void SCB_CleanDCache (void) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = 0U; /* select Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* clean D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) | - ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways-- != 0U); - } while(sets-- != 0U); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Clean & Invalidate D-Cache - \details Cleans and Invalidates D-Cache - */ -__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = 0U; /* select Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* clean & invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | - ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways-- != 0U); - } while(sets-- != 0U); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief D-Cache Invalidate by address - \details Invalidates D-Cache for the given address. - D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity. - D-Cache memory blocks which are part of given address + given size are invalidated. - \param[in] addr address - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - if ( dsize > 0 ) { - int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); - uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - - __DSB(); - - do { - SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ - op_addr += __SCB_DCACHE_LINE_SIZE; - op_size -= __SCB_DCACHE_LINE_SIZE; - } while ( op_size > 0 ); - - __DSB(); - __ISB(); - } - #endif -} - - -/** - \brief D-Cache Clean by address - \details Cleans D-Cache for the given address - D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity. - D-Cache memory blocks which are part of given address + given size are cleaned. - \param[in] addr address - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - if ( dsize > 0 ) { - int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); - uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - - __DSB(); - - do { - SCB->DCCMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ - op_addr += __SCB_DCACHE_LINE_SIZE; - op_size -= __SCB_DCACHE_LINE_SIZE; - } while ( op_size > 0 ); - - __DSB(); - __ISB(); - } - #endif -} - - -/** - \brief D-Cache Clean and Invalidate by address - \details Cleans and invalidates D_Cache for the given address - D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity. - D-Cache memory blocks which are part of given address + given size are cleaned and invalidated. - \param[in] addr address (aligned to 32-byte boundary) - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) -{ - #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - if ( dsize > 0 ) { - int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); - uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - - __DSB(); - - do { - SCB->DCCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ - op_addr += __SCB_DCACHE_LINE_SIZE; - op_size -= __SCB_DCACHE_LINE_SIZE; - } while ( op_size > 0 ); - - __DSB(); - __ISB(); - } - #endif -} - -/*@} end of CMSIS_Core_CacheFunctions */ -#endif - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) -/** - \brief System Tick Configuration (non-secure) - \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function TZ_SysTick_Config_NS is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - - */ -__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} -#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_STAR_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core/Include/mpu_armv7.h b/Drivers/CMSIS/Core/Include/mpu_armv7.h deleted file mode 100644 index 3b26817..0000000 --- a/Drivers/CMSIS/Core/Include/mpu_armv7.h +++ /dev/null @@ -1,275 +0,0 @@ -/****************************************************************************** - * @file mpu_armv7.h - * @brief CMSIS MPU API for Armv7-M MPU - * @version V5.1.2 - * @date 25. May 2020 - ******************************************************************************/ -/* - * Copyright (c) 2017-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef ARM_MPU_ARMV7_H -#define ARM_MPU_ARMV7_H - -#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes -#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes -#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes -#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes -#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes -#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte -#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes -#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes -#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes -#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes -#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes -#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes -#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes -#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes -#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes -#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte -#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes -#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes -#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes -#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes -#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes -#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes -#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes -#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes -#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes -#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte -#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes -#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes - -#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access -#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only -#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only -#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access -#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only -#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access - -/** MPU Region Base Address Register Value -* -* \param Region The region to be configured, number 0 to 15. -* \param BaseAddress The base address for the region. -*/ -#define ARM_MPU_RBAR(Region, BaseAddress) \ - (((BaseAddress) & MPU_RBAR_ADDR_Msk) | \ - ((Region) & MPU_RBAR_REGION_Msk) | \ - (MPU_RBAR_VALID_Msk)) - -/** -* MPU Memory Access Attributes -* -* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. -* \param IsShareable Region is shareable between multiple bus masters. -* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. -* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. -*/ -#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \ - ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \ - (((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \ - (((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \ - (((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk)) - -/** -* MPU Region Attribute and Size Register Value -* -* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. -* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. -* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_. -* \param SubRegionDisable Sub-region disable field. -* \param Size Region size of the region to be configured, for example 4K, 8K. -*/ -#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \ - ((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \ - (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \ - (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \ - (((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \ - (((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \ - (((MPU_RASR_ENABLE_Msk)))) - -/** -* MPU Region Attribute and Size Register Value -* -* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. -* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. -* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. -* \param IsShareable Region is shareable between multiple bus masters. -* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. -* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. -* \param SubRegionDisable Sub-region disable field. -* \param Size Region size of the region to be configured, for example 4K, 8K. -*/ -#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \ - ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size) - -/** -* MPU Memory Access Attribute for strongly ordered memory. -* - TEX: 000b -* - Shareable -* - Non-cacheable -* - Non-bufferable -*/ -#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U) - -/** -* MPU Memory Access Attribute for device memory. -* - TEX: 000b (if shareable) or 010b (if non-shareable) -* - Shareable or non-shareable -* - Non-cacheable -* - Bufferable (if shareable) or non-bufferable (if non-shareable) -* -* \param IsShareable Configures the device memory as shareable or non-shareable. -*/ -#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U)) - -/** -* MPU Memory Access Attribute for normal memory. -* - TEX: 1BBb (reflecting outer cacheability rules) -* - Shareable or non-shareable -* - Cacheable or non-cacheable (reflecting inner cacheability rules) -* - Bufferable or non-bufferable (reflecting inner cacheability rules) -* -* \param OuterCp Configures the outer cache policy. -* \param InnerCp Configures the inner cache policy. -* \param IsShareable Configures the memory as shareable or non-shareable. -*/ -#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U)) - -/** -* MPU Memory Access Attribute non-cacheable policy. -*/ -#define ARM_MPU_CACHEP_NOCACHE 0U - -/** -* MPU Memory Access Attribute write-back, write and read allocate policy. -*/ -#define ARM_MPU_CACHEP_WB_WRA 1U - -/** -* MPU Memory Access Attribute write-through, no write allocate policy. -*/ -#define ARM_MPU_CACHEP_WT_NWA 2U - -/** -* MPU Memory Access Attribute write-back, no write allocate policy. -*/ -#define ARM_MPU_CACHEP_WB_NWA 3U - - -/** -* Struct for a single MPU Region -*/ -typedef struct { - uint32_t RBAR; //!< The region base address register value (RBAR) - uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR -} ARM_MPU_Region_t; - -/** Enable the MPU. -* \param MPU_Control Default access permissions for unconfigured regions. -*/ -__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) -{ - __DMB(); - MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; -#ifdef SCB_SHCSR_MEMFAULTENA_Msk - SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; -#endif - __DSB(); - __ISB(); -} - -/** Disable the MPU. -*/ -__STATIC_INLINE void ARM_MPU_Disable(void) -{ - __DMB(); -#ifdef SCB_SHCSR_MEMFAULTENA_Msk - SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; -#endif - MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; - __DSB(); - __ISB(); -} - -/** Clear and disable the given MPU region. -* \param rnr Region number to be cleared. -*/ -__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) -{ - MPU->RNR = rnr; - MPU->RASR = 0U; -} - -/** Configure an MPU region. -* \param rbar Value for RBAR register. -* \param rasr Value for RASR register. -*/ -__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr) -{ - MPU->RBAR = rbar; - MPU->RASR = rasr; -} - -/** Configure the given MPU region. -* \param rnr Region number to be configured. -* \param rbar Value for RBAR register. -* \param rasr Value for RASR register. -*/ -__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr) -{ - MPU->RNR = rnr; - MPU->RBAR = rbar; - MPU->RASR = rasr; -} - -/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_Load(). -* \param dst Destination data is copied to. -* \param src Source data is copied from. -* \param len Amount of data words to be copied. -*/ -__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) -{ - uint32_t i; - for (i = 0U; i < len; ++i) - { - dst[i] = src[i]; - } -} - -/** Load the given number of MPU regions from a table. -* \param table Pointer to the MPU configuration table. -* \param cnt Amount of regions to be configured. -*/ -__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) -{ - const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; - while (cnt > MPU_TYPE_RALIASES) { - ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize); - table += MPU_TYPE_RALIASES; - cnt -= MPU_TYPE_RALIASES; - } - ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize); -} - -#endif diff --git a/Drivers/CMSIS/Core/Include/mpu_armv8.h b/Drivers/CMSIS/Core/Include/mpu_armv8.h deleted file mode 100644 index b6ff9a9..0000000 --- a/Drivers/CMSIS/Core/Include/mpu_armv8.h +++ /dev/null @@ -1,352 +0,0 @@ -/****************************************************************************** - * @file mpu_armv8.h - * @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU - * @version V5.1.3 - * @date 03. February 2021 - ******************************************************************************/ -/* - * Copyright (c) 2017-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef ARM_MPU_ARMV8_H -#define ARM_MPU_ARMV8_H - -/** \brief Attribute for device memory (outer only) */ -#define ARM_MPU_ATTR_DEVICE ( 0U ) - -/** \brief Attribute for non-cacheable, normal memory */ -#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U ) - -/** \brief Attribute for normal memory (outer and inner) -* \param NT Non-Transient: Set to 1 for non-transient data. -* \param WB Write-Back: Set to 1 to use write-back update policy. -* \param RA Read Allocation: Set to 1 to use cache allocation on read miss. -* \param WA Write Allocation: Set to 1 to use cache allocation on write miss. -*/ -#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \ - ((((NT) & 1U) << 3U) | (((WB) & 1U) << 2U) | (((RA) & 1U) << 1U) | ((WA) & 1U)) - -/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */ -#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U) - -/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */ -#define ARM_MPU_ATTR_DEVICE_nGnRE (1U) - -/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */ -#define ARM_MPU_ATTR_DEVICE_nGRE (2U) - -/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */ -#define ARM_MPU_ATTR_DEVICE_GRE (3U) - -/** \brief Memory Attribute -* \param O Outer memory attributes -* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes -*/ -#define ARM_MPU_ATTR(O, I) ((((O) & 0xFU) << 4U) | ((((O) & 0xFU) != 0U) ? ((I) & 0xFU) : (((I) & 0x3U) << 2U))) - -/** \brief Normal memory non-shareable */ -#define ARM_MPU_SH_NON (0U) - -/** \brief Normal memory outer shareable */ -#define ARM_MPU_SH_OUTER (2U) - -/** \brief Normal memory inner shareable */ -#define ARM_MPU_SH_INNER (3U) - -/** \brief Memory access permissions -* \param RO Read-Only: Set to 1 for read-only memory. -* \param NP Non-Privileged: Set to 1 for non-privileged memory. -*/ -#define ARM_MPU_AP_(RO, NP) ((((RO) & 1U) << 1U) | ((NP) & 1U)) - -/** \brief Region Base Address Register value -* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. -* \param SH Defines the Shareability domain for this memory region. -* \param RO Read-Only: Set to 1 for a read-only memory region. -* \param NP Non-Privileged: Set to 1 for a non-privileged memory region. -* \oaram XN eXecute Never: Set to 1 for a non-executable memory region. -*/ -#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \ - (((BASE) & MPU_RBAR_BASE_Msk) | \ - (((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \ - ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \ - (((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk)) - -/** \brief Region Limit Address Register value -* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended. -* \param IDX The attribute index to be associated with this memory region. -*/ -#define ARM_MPU_RLAR(LIMIT, IDX) \ - (((LIMIT) & MPU_RLAR_LIMIT_Msk) | \ - (((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \ - (MPU_RLAR_EN_Msk)) - -#if defined(MPU_RLAR_PXN_Pos) - -/** \brief Region Limit Address Register with PXN value -* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended. -* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region. -* \param IDX The attribute index to be associated with this memory region. -*/ -#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \ - (((LIMIT) & MPU_RLAR_LIMIT_Msk) | \ - (((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \ - (((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \ - (MPU_RLAR_EN_Msk)) - -#endif - -/** -* Struct for a single MPU Region -*/ -typedef struct { - uint32_t RBAR; /*!< Region Base Address Register value */ - uint32_t RLAR; /*!< Region Limit Address Register value */ -} ARM_MPU_Region_t; - -/** Enable the MPU. -* \param MPU_Control Default access permissions for unconfigured regions. -*/ -__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) -{ - __DMB(); - MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; -#ifdef SCB_SHCSR_MEMFAULTENA_Msk - SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; -#endif - __DSB(); - __ISB(); -} - -/** Disable the MPU. -*/ -__STATIC_INLINE void ARM_MPU_Disable(void) -{ - __DMB(); -#ifdef SCB_SHCSR_MEMFAULTENA_Msk - SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; -#endif - MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; - __DSB(); - __ISB(); -} - -#ifdef MPU_NS -/** Enable the Non-secure MPU. -* \param MPU_Control Default access permissions for unconfigured regions. -*/ -__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control) -{ - __DMB(); - MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; -#ifdef SCB_SHCSR_MEMFAULTENA_Msk - SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; -#endif - __DSB(); - __ISB(); -} - -/** Disable the Non-secure MPU. -*/ -__STATIC_INLINE void ARM_MPU_Disable_NS(void) -{ - __DMB(); -#ifdef SCB_SHCSR_MEMFAULTENA_Msk - SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; -#endif - MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk; - __DSB(); - __ISB(); -} -#endif - -/** Set the memory attribute encoding to the given MPU. -* \param mpu Pointer to the MPU to be configured. -* \param idx The attribute index to be set [0-7] -* \param attr The attribute value to be set. -*/ -__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr) -{ - const uint8_t reg = idx / 4U; - const uint32_t pos = ((idx % 4U) * 8U); - const uint32_t mask = 0xFFU << pos; - - if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) { - return; // invalid index - } - - mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask)); -} - -/** Set the memory attribute encoding. -* \param idx The attribute index to be set [0-7] -* \param attr The attribute value to be set. -*/ -__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr) -{ - ARM_MPU_SetMemAttrEx(MPU, idx, attr); -} - -#ifdef MPU_NS -/** Set the memory attribute encoding to the Non-secure MPU. -* \param idx The attribute index to be set [0-7] -* \param attr The attribute value to be set. -*/ -__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr) -{ - ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr); -} -#endif - -/** Clear and disable the given MPU region of the given MPU. -* \param mpu Pointer to MPU to be used. -* \param rnr Region number to be cleared. -*/ -__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr) -{ - mpu->RNR = rnr; - mpu->RLAR = 0U; -} - -/** Clear and disable the given MPU region. -* \param rnr Region number to be cleared. -*/ -__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) -{ - ARM_MPU_ClrRegionEx(MPU, rnr); -} - -#ifdef MPU_NS -/** Clear and disable the given Non-secure MPU region. -* \param rnr Region number to be cleared. -*/ -__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) -{ - ARM_MPU_ClrRegionEx(MPU_NS, rnr); -} -#endif - -/** Configure the given MPU region of the given MPU. -* \param mpu Pointer to MPU to be used. -* \param rnr Region number to be configured. -* \param rbar Value for RBAR register. -* \param rlar Value for RLAR register. -*/ -__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) -{ - mpu->RNR = rnr; - mpu->RBAR = rbar; - mpu->RLAR = rlar; -} - -/** Configure the given MPU region. -* \param rnr Region number to be configured. -* \param rbar Value for RBAR register. -* \param rlar Value for RLAR register. -*/ -__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar) -{ - ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar); -} - -#ifdef MPU_NS -/** Configure the given Non-secure MPU region. -* \param rnr Region number to be configured. -* \param rbar Value for RBAR register. -* \param rlar Value for RLAR register. -*/ -__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar) -{ - ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); -} -#endif - -/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_LoadEx() -* \param dst Destination data is copied to. -* \param src Source data is copied from. -* \param len Amount of data words to be copied. -*/ -__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) -{ - uint32_t i; - for (i = 0U; i < len; ++i) - { - dst[i] = src[i]; - } -} - -/** Load the given number of MPU regions from a table to the given MPU. -* \param mpu Pointer to the MPU registers to be used. -* \param rnr First region number to be configured. -* \param table Pointer to the MPU configuration table. -* \param cnt Amount of regions to be configured. -*/ -__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) -{ - const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; - if (cnt == 1U) { - mpu->RNR = rnr; - ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize); - } else { - uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U); - uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES; - - mpu->RNR = rnrBase; - while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) { - uint32_t c = MPU_TYPE_RALIASES - rnrOffset; - ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize); - table += c; - cnt -= c; - rnrOffset = 0U; - rnrBase += MPU_TYPE_RALIASES; - mpu->RNR = rnrBase; - } - - ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize); - } -} - -/** Load the given number of MPU regions from a table. -* \param rnr First region number to be configured. -* \param table Pointer to the MPU configuration table. -* \param cnt Amount of regions to be configured. -*/ -__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) -{ - ARM_MPU_LoadEx(MPU, rnr, table, cnt); -} - -#ifdef MPU_NS -/** Load the given number of MPU regions from a table to the Non-secure MPU. -* \param rnr First region number to be configured. -* \param table Pointer to the MPU configuration table. -* \param cnt Amount of regions to be configured. -*/ -__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) -{ - ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt); -} -#endif - -#endif - diff --git a/Drivers/CMSIS/Core/Include/pac_armv81.h b/Drivers/CMSIS/Core/Include/pac_armv81.h deleted file mode 100644 index b802d6b..0000000 --- a/Drivers/CMSIS/Core/Include/pac_armv81.h +++ /dev/null @@ -1,206 +0,0 @@ -/****************************************************************************** - * @file pac_armv81.h - * @brief CMSIS PAC key functions for Armv8.1-M PAC extension - * @version V1.0.0 - * @date 23. March 2022 - ******************************************************************************/ -/* - * Copyright (c) 2022 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef PAC_ARMV81_H -#define PAC_ARMV81_H - - -/* ################### PAC Key functions ########################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_PacKeyFunctions PAC Key functions - \brief Functions that access the PAC keys. - @{ - */ - -#if (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1)) - -/** - \brief read the PAC key used for privileged mode - \details Reads the PAC key stored in the PAC_KEY_P registers. - \param [out] pPacKey 128bit PAC key - */ -__STATIC_FORCEINLINE void __get_PAC_KEY_P (uint32_t* pPacKey) { - __ASM volatile ( - "mrs r1, pac_key_p_0\n" - "str r1,[%0,#0]\n" - "mrs r1, pac_key_p_1\n" - "str r1,[%0,#4]\n" - "mrs r1, pac_key_p_2\n" - "str r1,[%0,#8]\n" - "mrs r1, pac_key_p_3\n" - "str r1,[%0,#12]\n" - : : "r" (pPacKey) : "memory", "r1" - ); -} - -/** - \brief write the PAC key used for privileged mode - \details writes the given PAC key to the PAC_KEY_P registers. - \param [in] pPacKey 128bit PAC key - */ -__STATIC_FORCEINLINE void __set_PAC_KEY_P (uint32_t* pPacKey) { - __ASM volatile ( - "ldr r1,[%0,#0]\n" - "msr pac_key_p_0, r1\n" - "ldr r1,[%0,#4]\n" - "msr pac_key_p_1, r1\n" - "ldr r1,[%0,#8]\n" - "msr pac_key_p_2, r1\n" - "ldr r1,[%0,#12]\n" - "msr pac_key_p_3, r1\n" - : : "r" (pPacKey) : "memory", "r1" - ); -} - -/** - \brief read the PAC key used for unprivileged mode - \details Reads the PAC key stored in the PAC_KEY_U registers. - \param [out] pPacKey 128bit PAC key - */ -__STATIC_FORCEINLINE void __get_PAC_KEY_U (uint32_t* pPacKey) { - __ASM volatile ( - "mrs r1, pac_key_u_0\n" - "str r1,[%0,#0]\n" - "mrs r1, pac_key_u_1\n" - "str r1,[%0,#4]\n" - "mrs r1, pac_key_u_2\n" - "str r1,[%0,#8]\n" - "mrs r1, pac_key_u_3\n" - "str r1,[%0,#12]\n" - : : "r" (pPacKey) : "memory", "r1" - ); -} - -/** - \brief write the PAC key used for unprivileged mode - \details writes the given PAC key to the PAC_KEY_U registers. - \param [in] pPacKey 128bit PAC key - */ -__STATIC_FORCEINLINE void __set_PAC_KEY_U (uint32_t* pPacKey) { - __ASM volatile ( - "ldr r1,[%0,#0]\n" - "msr pac_key_u_0, r1\n" - "ldr r1,[%0,#4]\n" - "msr pac_key_u_1, r1\n" - "ldr r1,[%0,#8]\n" - "msr pac_key_u_2, r1\n" - "ldr r1,[%0,#12]\n" - "msr pac_key_u_3, r1\n" - : : "r" (pPacKey) : "memory", "r1" - ); -} - -#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) - -/** - \brief read the PAC key used for privileged mode (non-secure) - \details Reads the PAC key stored in the non-secure PAC_KEY_P registers when in secure mode. - \param [out] pPacKey 128bit PAC key - */ -__STATIC_FORCEINLINE void __TZ_get_PAC_KEY_P_NS (uint32_t* pPacKey) { - __ASM volatile ( - "mrs r1, pac_key_p_0_ns\n" - "str r1,[%0,#0]\n" - "mrs r1, pac_key_p_1_ns\n" - "str r1,[%0,#4]\n" - "mrs r1, pac_key_p_2_ns\n" - "str r1,[%0,#8]\n" - "mrs r1, pac_key_p_3_ns\n" - "str r1,[%0,#12]\n" - : : "r" (pPacKey) : "memory", "r1" - ); -} - -/** - \brief write the PAC key used for privileged mode (non-secure) - \details writes the given PAC key to the non-secure PAC_KEY_P registers when in secure mode. - \param [in] pPacKey 128bit PAC key - */ -__STATIC_FORCEINLINE void __TZ_set_PAC_KEY_P_NS (uint32_t* pPacKey) { - __ASM volatile ( - "ldr r1,[%0,#0]\n" - "msr pac_key_p_0_ns, r1\n" - "ldr r1,[%0,#4]\n" - "msr pac_key_p_1_ns, r1\n" - "ldr r1,[%0,#8]\n" - "msr pac_key_p_2_ns, r1\n" - "ldr r1,[%0,#12]\n" - "msr pac_key_p_3_ns, r1\n" - : : "r" (pPacKey) : "memory", "r1" - ); -} - -/** - \brief read the PAC key used for unprivileged mode (non-secure) - \details Reads the PAC key stored in the non-secure PAC_KEY_U registers when in secure mode. - \param [out] pPacKey 128bit PAC key - */ -__STATIC_FORCEINLINE void __TZ_get_PAC_KEY_U_NS (uint32_t* pPacKey) { - __ASM volatile ( - "mrs r1, pac_key_u_0_ns\n" - "str r1,[%0,#0]\n" - "mrs r1, pac_key_u_1_ns\n" - "str r1,[%0,#4]\n" - "mrs r1, pac_key_u_2_ns\n" - "str r1,[%0,#8]\n" - "mrs r1, pac_key_u_3_ns\n" - "str r1,[%0,#12]\n" - : : "r" (pPacKey) : "memory", "r1" - ); -} - -/** - \brief write the PAC key used for unprivileged mode (non-secure) - \details writes the given PAC key to the non-secure PAC_KEY_U registers when in secure mode. - \param [in] pPacKey 128bit PAC key - */ -__STATIC_FORCEINLINE void __TZ_set_PAC_KEY_U_NS (uint32_t* pPacKey) { - __ASM volatile ( - "ldr r1,[%0,#0]\n" - "msr pac_key_u_0_ns, r1\n" - "ldr r1,[%0,#4]\n" - "msr pac_key_u_1_ns, r1\n" - "ldr r1,[%0,#8]\n" - "msr pac_key_u_2_ns, r1\n" - "ldr r1,[%0,#12]\n" - "msr pac_key_u_3_ns, r1\n" - : : "r" (pPacKey) : "memory", "r1" - ); -} - -#endif /* (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) */ - -#endif /* (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1)) */ - -/*@} end of CMSIS_Core_PacKeyFunctions */ - - -#endif /* PAC_ARMV81_H */ diff --git a/Drivers/CMSIS/Core/Include/pmu_armv8.h b/Drivers/CMSIS/Core/Include/pmu_armv8.h deleted file mode 100644 index 4cbc570..0000000 --- a/Drivers/CMSIS/Core/Include/pmu_armv8.h +++ /dev/null @@ -1,337 +0,0 @@ -/****************************************************************************** - * @file pmu_armv8.h - * @brief CMSIS PMU API for Armv8.1-M PMU - * @version V1.0.1 - * @date 15. April 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef ARM_PMU_ARMV8_H -#define ARM_PMU_ARMV8_H - -/** - * \brief PMU Events - * \note See the Armv8.1-M Architecture Reference Manual for full details on these PMU events. - * */ - -#define ARM_PMU_SW_INCR 0x0000 /*!< Software update to the PMU_SWINC register, architecturally executed and condition code check pass */ -#define ARM_PMU_L1I_CACHE_REFILL 0x0001 /*!< L1 I-Cache refill */ -#define ARM_PMU_L1D_CACHE_REFILL 0x0003 /*!< L1 D-Cache refill */ -#define ARM_PMU_L1D_CACHE 0x0004 /*!< L1 D-Cache access */ -#define ARM_PMU_LD_RETIRED 0x0006 /*!< Memory-reading instruction architecturally executed and condition code check pass */ -#define ARM_PMU_ST_RETIRED 0x0007 /*!< Memory-writing instruction architecturally executed and condition code check pass */ -#define ARM_PMU_INST_RETIRED 0x0008 /*!< Instruction architecturally executed */ -#define ARM_PMU_EXC_TAKEN 0x0009 /*!< Exception entry */ -#define ARM_PMU_EXC_RETURN 0x000A /*!< Exception return instruction architecturally executed and the condition code check pass */ -#define ARM_PMU_PC_WRITE_RETIRED 0x000C /*!< Software change to the Program Counter (PC). Instruction is architecturally executed and condition code check pass */ -#define ARM_PMU_BR_IMMED_RETIRED 0x000D /*!< Immediate branch architecturally executed */ -#define ARM_PMU_BR_RETURN_RETIRED 0x000E /*!< Function return instruction architecturally executed and the condition code check pass */ -#define ARM_PMU_UNALIGNED_LDST_RETIRED 0x000F /*!< Unaligned memory memory-reading or memory-writing instruction architecturally executed and condition code check pass */ -#define ARM_PMU_BR_MIS_PRED 0x0010 /*!< Mispredicted or not predicted branch speculatively executed */ -#define ARM_PMU_CPU_CYCLES 0x0011 /*!< Cycle */ -#define ARM_PMU_BR_PRED 0x0012 /*!< Predictable branch speculatively executed */ -#define ARM_PMU_MEM_ACCESS 0x0013 /*!< Data memory access */ -#define ARM_PMU_L1I_CACHE 0x0014 /*!< Level 1 instruction cache access */ -#define ARM_PMU_L1D_CACHE_WB 0x0015 /*!< Level 1 data cache write-back */ -#define ARM_PMU_L2D_CACHE 0x0016 /*!< Level 2 data cache access */ -#define ARM_PMU_L2D_CACHE_REFILL 0x0017 /*!< Level 2 data cache refill */ -#define ARM_PMU_L2D_CACHE_WB 0x0018 /*!< Level 2 data cache write-back */ -#define ARM_PMU_BUS_ACCESS 0x0019 /*!< Bus access */ -#define ARM_PMU_MEMORY_ERROR 0x001A /*!< Local memory error */ -#define ARM_PMU_INST_SPEC 0x001B /*!< Instruction speculatively executed */ -#define ARM_PMU_BUS_CYCLES 0x001D /*!< Bus cycles */ -#define ARM_PMU_CHAIN 0x001E /*!< For an odd numbered counter, increment when an overflow occurs on the preceding even-numbered counter on the same PE */ -#define ARM_PMU_L1D_CACHE_ALLOCATE 0x001F /*!< Level 1 data cache allocation without refill */ -#define ARM_PMU_L2D_CACHE_ALLOCATE 0x0020 /*!< Level 2 data cache allocation without refill */ -#define ARM_PMU_BR_RETIRED 0x0021 /*!< Branch instruction architecturally executed */ -#define ARM_PMU_BR_MIS_PRED_RETIRED 0x0022 /*!< Mispredicted branch instruction architecturally executed */ -#define ARM_PMU_STALL_FRONTEND 0x0023 /*!< No operation issued because of the frontend */ -#define ARM_PMU_STALL_BACKEND 0x0024 /*!< No operation issued because of the backend */ -#define ARM_PMU_L2I_CACHE 0x0027 /*!< Level 2 instruction cache access */ -#define ARM_PMU_L2I_CACHE_REFILL 0x0028 /*!< Level 2 instruction cache refill */ -#define ARM_PMU_L3D_CACHE_ALLOCATE 0x0029 /*!< Level 3 data cache allocation without refill */ -#define ARM_PMU_L3D_CACHE_REFILL 0x002A /*!< Level 3 data cache refill */ -#define ARM_PMU_L3D_CACHE 0x002B /*!< Level 3 data cache access */ -#define ARM_PMU_L3D_CACHE_WB 0x002C /*!< Level 3 data cache write-back */ -#define ARM_PMU_LL_CACHE_RD 0x0036 /*!< Last level data cache read */ -#define ARM_PMU_LL_CACHE_MISS_RD 0x0037 /*!< Last level data cache read miss */ -#define ARM_PMU_L1D_CACHE_MISS_RD 0x0039 /*!< Level 1 data cache read miss */ -#define ARM_PMU_OP_COMPLETE 0x003A /*!< Operation retired */ -#define ARM_PMU_OP_SPEC 0x003B /*!< Operation speculatively executed */ -#define ARM_PMU_STALL 0x003C /*!< Stall cycle for instruction or operation not sent for execution */ -#define ARM_PMU_STALL_OP_BACKEND 0x003D /*!< Stall cycle for instruction or operation not sent for execution due to pipeline backend */ -#define ARM_PMU_STALL_OP_FRONTEND 0x003E /*!< Stall cycle for instruction or operation not sent for execution due to pipeline frontend */ -#define ARM_PMU_STALL_OP 0x003F /*!< Instruction or operation slots not occupied each cycle */ -#define ARM_PMU_L1D_CACHE_RD 0x0040 /*!< Level 1 data cache read */ -#define ARM_PMU_LE_RETIRED 0x0100 /*!< Loop end instruction executed */ -#define ARM_PMU_LE_SPEC 0x0101 /*!< Loop end instruction speculatively executed */ -#define ARM_PMU_BF_RETIRED 0x0104 /*!< Branch future instruction architecturally executed and condition code check pass */ -#define ARM_PMU_BF_SPEC 0x0105 /*!< Branch future instruction speculatively executed and condition code check pass */ -#define ARM_PMU_LE_CANCEL 0x0108 /*!< Loop end instruction not taken */ -#define ARM_PMU_BF_CANCEL 0x0109 /*!< Branch future instruction not taken */ -#define ARM_PMU_SE_CALL_S 0x0114 /*!< Call to secure function, resulting in Security state change */ -#define ARM_PMU_SE_CALL_NS 0x0115 /*!< Call to non-secure function, resulting in Security state change */ -#define ARM_PMU_DWT_CMPMATCH0 0x0118 /*!< DWT comparator 0 match */ -#define ARM_PMU_DWT_CMPMATCH1 0x0119 /*!< DWT comparator 1 match */ -#define ARM_PMU_DWT_CMPMATCH2 0x011A /*!< DWT comparator 2 match */ -#define ARM_PMU_DWT_CMPMATCH3 0x011B /*!< DWT comparator 3 match */ -#define ARM_PMU_MVE_INST_RETIRED 0x0200 /*!< MVE instruction architecturally executed */ -#define ARM_PMU_MVE_INST_SPEC 0x0201 /*!< MVE instruction speculatively executed */ -#define ARM_PMU_MVE_FP_RETIRED 0x0204 /*!< MVE floating-point instruction architecturally executed */ -#define ARM_PMU_MVE_FP_SPEC 0x0205 /*!< MVE floating-point instruction speculatively executed */ -#define ARM_PMU_MVE_FP_HP_RETIRED 0x0208 /*!< MVE half-precision floating-point instruction architecturally executed */ -#define ARM_PMU_MVE_FP_HP_SPEC 0x0209 /*!< MVE half-precision floating-point instruction speculatively executed */ -#define ARM_PMU_MVE_FP_SP_RETIRED 0x020C /*!< MVE single-precision floating-point instruction architecturally executed */ -#define ARM_PMU_MVE_FP_SP_SPEC 0x020D /*!< MVE single-precision floating-point instruction speculatively executed */ -#define ARM_PMU_MVE_FP_MAC_RETIRED 0x0214 /*!< MVE floating-point multiply or multiply-accumulate instruction architecturally executed */ -#define ARM_PMU_MVE_FP_MAC_SPEC 0x0215 /*!< MVE floating-point multiply or multiply-accumulate instruction speculatively executed */ -#define ARM_PMU_MVE_INT_RETIRED 0x0224 /*!< MVE integer instruction architecturally executed */ -#define ARM_PMU_MVE_INT_SPEC 0x0225 /*!< MVE integer instruction speculatively executed */ -#define ARM_PMU_MVE_INT_MAC_RETIRED 0x0228 /*!< MVE multiply or multiply-accumulate instruction architecturally executed */ -#define ARM_PMU_MVE_INT_MAC_SPEC 0x0229 /*!< MVE multiply or multiply-accumulate instruction speculatively executed */ -#define ARM_PMU_MVE_LDST_RETIRED 0x0238 /*!< MVE load or store instruction architecturally executed */ -#define ARM_PMU_MVE_LDST_SPEC 0x0239 /*!< MVE load or store instruction speculatively executed */ -#define ARM_PMU_MVE_LD_RETIRED 0x023C /*!< MVE load instruction architecturally executed */ -#define ARM_PMU_MVE_LD_SPEC 0x023D /*!< MVE load instruction speculatively executed */ -#define ARM_PMU_MVE_ST_RETIRED 0x0240 /*!< MVE store instruction architecturally executed */ -#define ARM_PMU_MVE_ST_SPEC 0x0241 /*!< MVE store instruction speculatively executed */ -#define ARM_PMU_MVE_LDST_CONTIG_RETIRED 0x0244 /*!< MVE contiguous load or store instruction architecturally executed */ -#define ARM_PMU_MVE_LDST_CONTIG_SPEC 0x0245 /*!< MVE contiguous load or store instruction speculatively executed */ -#define ARM_PMU_MVE_LD_CONTIG_RETIRED 0x0248 /*!< MVE contiguous load instruction architecturally executed */ -#define ARM_PMU_MVE_LD_CONTIG_SPEC 0x0249 /*!< MVE contiguous load instruction speculatively executed */ -#define ARM_PMU_MVE_ST_CONTIG_RETIRED 0x024C /*!< MVE contiguous store instruction architecturally executed */ -#define ARM_PMU_MVE_ST_CONTIG_SPEC 0x024D /*!< MVE contiguous store instruction speculatively executed */ -#define ARM_PMU_MVE_LDST_NONCONTIG_RETIRED 0x0250 /*!< MVE non-contiguous load or store instruction architecturally executed */ -#define ARM_PMU_MVE_LDST_NONCONTIG_SPEC 0x0251 /*!< MVE non-contiguous load or store instruction speculatively executed */ -#define ARM_PMU_MVE_LD_NONCONTIG_RETIRED 0x0254 /*!< MVE non-contiguous load instruction architecturally executed */ -#define ARM_PMU_MVE_LD_NONCONTIG_SPEC 0x0255 /*!< MVE non-contiguous load instruction speculatively executed */ -#define ARM_PMU_MVE_ST_NONCONTIG_RETIRED 0x0258 /*!< MVE non-contiguous store instruction architecturally executed */ -#define ARM_PMU_MVE_ST_NONCONTIG_SPEC 0x0259 /*!< MVE non-contiguous store instruction speculatively executed */ -#define ARM_PMU_MVE_LDST_MULTI_RETIRED 0x025C /*!< MVE memory instruction targeting multiple registers architecturally executed */ -#define ARM_PMU_MVE_LDST_MULTI_SPEC 0x025D /*!< MVE memory instruction targeting multiple registers speculatively executed */ -#define ARM_PMU_MVE_LD_MULTI_RETIRED 0x0260 /*!< MVE memory load instruction targeting multiple registers architecturally executed */ -#define ARM_PMU_MVE_LD_MULTI_SPEC 0x0261 /*!< MVE memory load instruction targeting multiple registers speculatively executed */ -#define ARM_PMU_MVE_ST_MULTI_RETIRED 0x0261 /*!< MVE memory store instruction targeting multiple registers architecturally executed */ -#define ARM_PMU_MVE_ST_MULTI_SPEC 0x0265 /*!< MVE memory store instruction targeting multiple registers speculatively executed */ -#define ARM_PMU_MVE_LDST_UNALIGNED_RETIRED 0x028C /*!< MVE unaligned memory load or store instruction architecturally executed */ -#define ARM_PMU_MVE_LDST_UNALIGNED_SPEC 0x028D /*!< MVE unaligned memory load or store instruction speculatively executed */ -#define ARM_PMU_MVE_LD_UNALIGNED_RETIRED 0x0290 /*!< MVE unaligned load instruction architecturally executed */ -#define ARM_PMU_MVE_LD_UNALIGNED_SPEC 0x0291 /*!< MVE unaligned load instruction speculatively executed */ -#define ARM_PMU_MVE_ST_UNALIGNED_RETIRED 0x0294 /*!< MVE unaligned store instruction architecturally executed */ -#define ARM_PMU_MVE_ST_UNALIGNED_SPEC 0x0295 /*!< MVE unaligned store instruction speculatively executed */ -#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_RETIRED 0x0298 /*!< MVE unaligned noncontiguous load or store instruction architecturally executed */ -#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_SPEC 0x0299 /*!< MVE unaligned noncontiguous load or store instruction speculatively executed */ -#define ARM_PMU_MVE_VREDUCE_RETIRED 0x02A0 /*!< MVE vector reduction instruction architecturally executed */ -#define ARM_PMU_MVE_VREDUCE_SPEC 0x02A1 /*!< MVE vector reduction instruction speculatively executed */ -#define ARM_PMU_MVE_VREDUCE_FP_RETIRED 0x02A4 /*!< MVE floating-point vector reduction instruction architecturally executed */ -#define ARM_PMU_MVE_VREDUCE_FP_SPEC 0x02A5 /*!< MVE floating-point vector reduction instruction speculatively executed */ -#define ARM_PMU_MVE_VREDUCE_INT_RETIRED 0x02A8 /*!< MVE integer vector reduction instruction architecturally executed */ -#define ARM_PMU_MVE_VREDUCE_INT_SPEC 0x02A9 /*!< MVE integer vector reduction instruction speculatively executed */ -#define ARM_PMU_MVE_PRED 0x02B8 /*!< Cycles where one or more predicated beats architecturally executed */ -#define ARM_PMU_MVE_STALL 0x02CC /*!< Stall cycles caused by an MVE instruction */ -#define ARM_PMU_MVE_STALL_RESOURCE 0x02CD /*!< Stall cycles caused by an MVE instruction because of resource conflicts */ -#define ARM_PMU_MVE_STALL_RESOURCE_MEM 0x02CE /*!< Stall cycles caused by an MVE instruction because of memory resource conflicts */ -#define ARM_PMU_MVE_STALL_RESOURCE_FP 0x02CF /*!< Stall cycles caused by an MVE instruction because of floating-point resource conflicts */ -#define ARM_PMU_MVE_STALL_RESOURCE_INT 0x02D0 /*!< Stall cycles caused by an MVE instruction because of integer resource conflicts */ -#define ARM_PMU_MVE_STALL_BREAK 0x02D3 /*!< Stall cycles caused by an MVE chain break */ -#define ARM_PMU_MVE_STALL_DEPENDENCY 0x02D4 /*!< Stall cycles caused by MVE register dependency */ -#define ARM_PMU_ITCM_ACCESS 0x4007 /*!< Instruction TCM access */ -#define ARM_PMU_DTCM_ACCESS 0x4008 /*!< Data TCM access */ -#define ARM_PMU_TRCEXTOUT0 0x4010 /*!< ETM external output 0 */ -#define ARM_PMU_TRCEXTOUT1 0x4011 /*!< ETM external output 1 */ -#define ARM_PMU_TRCEXTOUT2 0x4012 /*!< ETM external output 2 */ -#define ARM_PMU_TRCEXTOUT3 0x4013 /*!< ETM external output 3 */ -#define ARM_PMU_CTI_TRIGOUT4 0x4018 /*!< Cross-trigger Interface output trigger 4 */ -#define ARM_PMU_CTI_TRIGOUT5 0x4019 /*!< Cross-trigger Interface output trigger 5 */ -#define ARM_PMU_CTI_TRIGOUT6 0x401A /*!< Cross-trigger Interface output trigger 6 */ -#define ARM_PMU_CTI_TRIGOUT7 0x401B /*!< Cross-trigger Interface output trigger 7 */ - -/** \brief PMU Functions */ - -__STATIC_INLINE void ARM_PMU_Enable(void); -__STATIC_INLINE void ARM_PMU_Disable(void); - -__STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type); - -__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void); -__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void); - -__STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask); -__STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask); - -__STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void); -__STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num); - -__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void); -__STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask); - -__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask); -__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask); - -__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask); - -/** - \brief Enable the PMU -*/ -__STATIC_INLINE void ARM_PMU_Enable(void) -{ - PMU->CTRL |= PMU_CTRL_ENABLE_Msk; -} - -/** - \brief Disable the PMU -*/ -__STATIC_INLINE void ARM_PMU_Disable(void) -{ - PMU->CTRL &= ~PMU_CTRL_ENABLE_Msk; -} - -/** - \brief Set event to count for PMU eventer counter - \param [in] num Event counter (0-30) to configure - \param [in] type Event to count -*/ -__STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type) -{ - PMU->EVTYPER[num] = type; -} - -/** - \brief Reset cycle counter -*/ -__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void) -{ - PMU->CTRL |= PMU_CTRL_CYCCNT_RESET_Msk; -} - -/** - \brief Reset all event counters -*/ -__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void) -{ - PMU->CTRL |= PMU_CTRL_EVENTCNT_RESET_Msk; -} - -/** - \brief Enable counters - \param [in] mask Counters to enable - \note Enables one or more of the following: - - event counters (0-30) - - cycle counter -*/ -__STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask) -{ - PMU->CNTENSET = mask; -} - -/** - \brief Disable counters - \param [in] mask Counters to enable - \note Disables one or more of the following: - - event counters (0-30) - - cycle counter -*/ -__STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask) -{ - PMU->CNTENCLR = mask; -} - -/** - \brief Read cycle counter - \return Cycle count -*/ -__STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void) -{ - return PMU->CCNTR; -} - -/** - \brief Read event counter - \param [in] num Event counter (0-30) to read - \return Event count -*/ -__STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num) -{ - return PMU_EVCNTR_CNT_Msk & PMU->EVCNTR[num]; -} - -/** - \brief Read counter overflow status - \return Counter overflow status bits for the following: - - event counters (0-30) - - cycle counter -*/ -__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void) -{ - return PMU->OVSSET; -} - -/** - \brief Clear counter overflow status - \param [in] mask Counter overflow status bits to clear - \note Clears overflow status bits for one or more of the following: - - event counters (0-30) - - cycle counter -*/ -__STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask) -{ - PMU->OVSCLR = mask; -} - -/** - \brief Enable counter overflow interrupt request - \param [in] mask Counter overflow interrupt request bits to set - \note Sets overflow interrupt request bits for one or more of the following: - - event counters (0-30) - - cycle counter -*/ -__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask) -{ - PMU->INTENSET = mask; -} - -/** - \brief Disable counter overflow interrupt request - \param [in] mask Counter overflow interrupt request bits to clear - \note Clears overflow interrupt request bits for one or more of the following: - - event counters (0-30) - - cycle counter -*/ -__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask) -{ - PMU->INTENCLR = mask; -} - -/** - \brief Software increment event counter - \param [in] mask Counters to increment - \note Software increment bits for one or more event counters (0-30) -*/ -__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask) -{ - PMU->SWINC = mask; -} - -#endif diff --git a/Drivers/CMSIS/Core/Include/tz_context.h b/Drivers/CMSIS/Core/Include/tz_context.h deleted file mode 100644 index d4c1474..0000000 --- a/Drivers/CMSIS/Core/Include/tz_context.h +++ /dev/null @@ -1,70 +0,0 @@ -/****************************************************************************** - * @file tz_context.h - * @brief Context Management for Armv8-M TrustZone - * @version V1.0.1 - * @date 10. January 2018 - ******************************************************************************/ -/* - * Copyright (c) 2017-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef TZ_CONTEXT_H -#define TZ_CONTEXT_H - -#include - -#ifndef TZ_MODULEID_T -#define TZ_MODULEID_T -/// \details Data type that identifies secure software modules called by a process. -typedef uint32_t TZ_ModuleId_t; -#endif - -/// \details TZ Memory ID identifies an allocated memory slot. -typedef uint32_t TZ_MemoryId_t; - -/// Initialize secure context memory system -/// \return execution status (1: success, 0: error) -uint32_t TZ_InitContextSystem_S (void); - -/// Allocate context memory for calling secure software modules in TrustZone -/// \param[in] module identifies software modules called from non-secure mode -/// \return value != 0 id TrustZone memory slot identifier -/// \return value 0 no memory available or internal error -TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); - -/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S -/// \param[in] id TrustZone memory slot identifier -/// \return execution status (1: success, 0: error) -uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); - -/// Load secure context (called on RTOS thread context switch) -/// \param[in] id TrustZone memory slot identifier -/// \return execution status (1: success, 0: error) -uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); - -/// Store secure context (called on RTOS thread context switch) -/// \param[in] id TrustZone memory slot identifier -/// \return execution status (1: success, 0: error) -uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); - -#endif // TZ_CONTEXT_H diff --git a/Drivers/CMSIS/Core/Template/ARMv8-M/main_s.c b/Drivers/CMSIS/Core/Template/ARMv8-M/main_s.c deleted file mode 100644 index cde9ff0..0000000 --- a/Drivers/CMSIS/Core/Template/ARMv8-M/main_s.c +++ /dev/null @@ -1,58 +0,0 @@ -/****************************************************************************** - * @file main_s.c - * @brief Code template for secure main function - * @version V1.1.1 - * @date 10. January 2018 - ******************************************************************************/ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* Use CMSE intrinsics */ -#include - -#include "RTE_Components.h" -#include CMSIS_device_header - -/* TZ_START_NS: Start address of non-secure application */ -#ifndef TZ_START_NS -#define TZ_START_NS (0x200000U) -#endif - -/* typedef for non-secure callback functions */ -typedef void (*funcptr_void) (void) __attribute__((cmse_nonsecure_call)); - -/* Secure main() */ -int main(void) { - funcptr_void NonSecure_ResetHandler; - - /* Add user setup code for secure part here*/ - - /* Set non-secure main stack (MSP_NS) */ - __TZ_set_MSP_NS(*((uint32_t *)(TZ_START_NS))); - - /* Get non-secure reset handler */ - NonSecure_ResetHandler = (funcptr_void)(*((uint32_t *)((TZ_START_NS) + 4U))); - - /* Start non-secure state software application */ - NonSecure_ResetHandler(); - - /* Non-secure software does not return, this code is not executed */ - while (1) { - __NOP(); - } -} diff --git a/Drivers/CMSIS/Core/Template/ARMv8-M/tz_context.c b/Drivers/CMSIS/Core/Template/ARMv8-M/tz_context.c deleted file mode 100644 index 298bbf7..0000000 --- a/Drivers/CMSIS/Core/Template/ARMv8-M/tz_context.c +++ /dev/null @@ -1,200 +0,0 @@ -/****************************************************************************** - * @file tz_context.c - * @brief Context Management for Armv8-M TrustZone - Sample implementation - * @version V1.1.1 - * @date 10. January 2018 - ******************************************************************************/ -/* - * Copyright (c) 2016-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "RTE_Components.h" -#include CMSIS_device_header -#include "tz_context.h" - -/// Number of process slots (threads may call secure library code) -#ifndef TZ_PROCESS_STACK_SLOTS -#define TZ_PROCESS_STACK_SLOTS 8U -#endif - -/// Stack size of the secure library code -#ifndef TZ_PROCESS_STACK_SIZE -#define TZ_PROCESS_STACK_SIZE 256U -#endif - -typedef struct { - uint32_t sp_top; // stack space top - uint32_t sp_limit; // stack space limit - uint32_t sp; // current stack pointer -} stack_info_t; - -static stack_info_t ProcessStackInfo [TZ_PROCESS_STACK_SLOTS]; -static uint64_t ProcessStackMemory[TZ_PROCESS_STACK_SLOTS][TZ_PROCESS_STACK_SIZE/8U]; -static uint32_t ProcessStackFreeSlot = 0xFFFFFFFFU; - - -/// Initialize secure context memory system -/// \return execution status (1: success, 0: error) -__attribute__((cmse_nonsecure_entry)) -uint32_t TZ_InitContextSystem_S (void) { - uint32_t n; - - if (__get_IPSR() == 0U) { - return 0U; // Thread Mode - } - - for (n = 0U; n < TZ_PROCESS_STACK_SLOTS; n++) { - ProcessStackInfo[n].sp = 0U; - ProcessStackInfo[n].sp_limit = (uint32_t)&ProcessStackMemory[n]; - ProcessStackInfo[n].sp_top = (uint32_t)&ProcessStackMemory[n] + TZ_PROCESS_STACK_SIZE; - *((uint32_t *)ProcessStackMemory[n]) = n + 1U; - } - *((uint32_t *)ProcessStackMemory[--n]) = 0xFFFFFFFFU; - - ProcessStackFreeSlot = 0U; - - // Default process stack pointer and stack limit - __set_PSPLIM((uint32_t)ProcessStackMemory); - __set_PSP ((uint32_t)ProcessStackMemory); - - // Privileged Thread Mode using PSP - __set_CONTROL(0x02U); - - return 1U; // Success -} - - -/// Allocate context memory for calling secure software modules in TrustZone -/// \param[in] module identifies software modules called from non-secure mode -/// \return value != 0 id TrustZone memory slot identifier -/// \return value 0 no memory available or internal error -__attribute__((cmse_nonsecure_entry)) -TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module) { - uint32_t slot; - - (void)module; // Ignore (fixed Stack size) - - if (__get_IPSR() == 0U) { - return 0U; // Thread Mode - } - - if (ProcessStackFreeSlot == 0xFFFFFFFFU) { - return 0U; // No slot available - } - - slot = ProcessStackFreeSlot; - ProcessStackFreeSlot = *((uint32_t *)ProcessStackMemory[slot]); - - ProcessStackInfo[slot].sp = ProcessStackInfo[slot].sp_top; - - return (slot + 1U); -} - - -/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S -/// \param[in] id TrustZone memory slot identifier -/// \return execution status (1: success, 0: error) -__attribute__((cmse_nonsecure_entry)) -uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id) { - uint32_t slot; - - if (__get_IPSR() == 0U) { - return 0U; // Thread Mode - } - - if ((id == 0U) || (id > TZ_PROCESS_STACK_SLOTS)) { - return 0U; // Invalid ID - } - - slot = id - 1U; - - if (ProcessStackInfo[slot].sp == 0U) { - return 0U; // Inactive slot - } - ProcessStackInfo[slot].sp = 0U; - - *((uint32_t *)ProcessStackMemory[slot]) = ProcessStackFreeSlot; - ProcessStackFreeSlot = slot; - - return 1U; // Success -} - - -/// Load secure context (called on RTOS thread context switch) -/// \param[in] id TrustZone memory slot identifier -/// \return execution status (1: success, 0: error) -__attribute__((cmse_nonsecure_entry)) -uint32_t TZ_LoadContext_S (TZ_MemoryId_t id) { - uint32_t slot; - - if ((__get_IPSR() == 0U) || ((__get_CONTROL() & 2U) == 0U)) { - return 0U; // Thread Mode or using Main Stack for threads - } - - if ((id == 0U) || (id > TZ_PROCESS_STACK_SLOTS)) { - return 0U; // Invalid ID - } - - slot = id - 1U; - - if (ProcessStackInfo[slot].sp == 0U) { - return 0U; // Inactive slot - } - - // Setup process stack pointer and stack limit - __set_PSPLIM(ProcessStackInfo[slot].sp_limit); - __set_PSP (ProcessStackInfo[slot].sp); - - return 1U; // Success -} - - -/// Store secure context (called on RTOS thread context switch) -/// \param[in] id TrustZone memory slot identifier -/// \return execution status (1: success, 0: error) -__attribute__((cmse_nonsecure_entry)) -uint32_t TZ_StoreContext_S (TZ_MemoryId_t id) { - uint32_t slot; - uint32_t sp; - - if ((__get_IPSR() == 0U) || ((__get_CONTROL() & 2U) == 0U)) { - return 0U; // Thread Mode or using Main Stack for threads - } - - if ((id == 0U) || (id > TZ_PROCESS_STACK_SLOTS)) { - return 0U; // Invalid ID - } - - slot = id - 1U; - - if (ProcessStackInfo[slot].sp == 0U) { - return 0U; // Inactive slot - } - - sp = __get_PSP(); - if ((sp < ProcessStackInfo[slot].sp_limit) || - (sp > ProcessStackInfo[slot].sp_top)) { - return 0U; // SP out of range - } - ProcessStackInfo[slot].sp = sp; - - // Default process stack pointer and stack limit - __set_PSPLIM((uint32_t)ProcessStackMemory); - __set_PSP ((uint32_t)ProcessStackMemory); - - return 1U; // Success -} diff --git a/Drivers/CMSIS/Core_A/Include/cmsis_armcc.h b/Drivers/CMSIS/Core_A/Include/cmsis_armcc.h deleted file mode 100644 index 2bd73d8..0000000 --- a/Drivers/CMSIS/Core_A/Include/cmsis_armcc.h +++ /dev/null @@ -1,563 +0,0 @@ -/**************************************************************************//** - * @file cmsis_armcc.h - * @brief CMSIS compiler specific macros, functions, instructions - * @version V1.0.5 - * @date 05. May 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_ARMCC_H -#define __CMSIS_ARMCC_H - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677) - #error "Please use Arm Compiler Toolchain V4.0.677 or later!" -#endif - -/* CMSIS compiler control architecture macros */ -#if (defined (__TARGET_ARCH_7_A ) && (__TARGET_ARCH_7_A == 1)) - #define __ARM_ARCH_7A__ 1 -#endif - -/* CMSIS compiler specific defines */ -#ifndef __ASM - #define __ASM __asm -#endif -#ifndef __INLINE - #define __INLINE __inline -#endif -#ifndef __FORCEINLINE - #define __FORCEINLINE __forceinline -#endif -#ifndef __STATIC_INLINE - #define __STATIC_INLINE static __inline -#endif -#ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE static __forceinline -#endif -#ifndef __NO_RETURN - #define __NO_RETURN __declspec(noreturn) -#endif -#ifndef CMSIS_DEPRECATED - #define CMSIS_DEPRECATED __attribute__((deprecated)) -#endif -#ifndef __USED - #define __USED __attribute__((used)) -#endif -#ifndef __WEAK - #define __WEAK __attribute__((weak)) -#endif -#ifndef __PACKED - #define __PACKED __attribute__((packed)) -#endif -#ifndef __PACKED_STRUCT - #define __PACKED_STRUCT __packed struct -#endif -#ifndef __UNALIGNED_UINT16_WRITE - #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val)) -#endif -#ifndef __UNALIGNED_UINT16_READ - #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr))) -#endif -#ifndef __UNALIGNED_UINT32_WRITE - #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val)) -#endif -#ifndef __UNALIGNED_UINT32_READ - #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr))) -#endif -#ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) -#endif -#ifndef __PACKED - #define __PACKED __attribute__((packed)) -#endif -#ifndef __COMPILER_BARRIER - #define __COMPILER_BARRIER() __memory_changed() -#endif - -/* ########################## Core Instruction Access ######################### */ -/** - \brief No Operation - */ -#define __NOP __nop - -/** - \brief Wait For Interrupt - */ -#define __WFI __wfi - -/** - \brief Wait For Event - */ -#define __WFE __wfe - -/** - \brief Send Event - */ -#define __SEV __sev - -/** - \brief Instruction Synchronization Barrier - */ -#define __ISB() __isb(0xF) - -/** - \brief Data Synchronization Barrier - */ -#define __DSB() __dsb(0xF) - -/** - \brief Data Memory Barrier - */ -#define __DMB() __dmb(0xF) - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV __rev - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. - \param [in] value Value to reverse - \return Reversed value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) -{ - rev16 r0, r0 - bx lr -} -#endif - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. - \param [in] value Value to reverse - \return Reversed value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value) -{ - revsh r0, r0 - bx lr -} -#endif - -/** - \brief Rotate Right in unsigned value (32 bit) - \param [in] op1 Value to rotate - \param [in] op2 Number of Bits to rotate - \return Rotated value - */ -#define __ROR __ror - -/** - \brief Breakpoint - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __breakpoint(value) - -/** - \brief Reverse bit order of value - \param [in] value Value to reverse - \return Reversed value - */ -#define __RBIT __rbit - -/** - \brief Count leading zeros - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -#define __CLZ __clz - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) -#else - #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") -#endif - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) -#else - #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") -#endif - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) -#else - #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") -#endif - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXB(value, ptr) __strex(value, ptr) -#else - #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXH(value, ptr) __strex(value, ptr) -#else - #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXW(value, ptr) __strex(value, ptr) -#else - #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -#define __CLREX __clrex - - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT __ssat - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT __usat - -/* ########################### Core Function Access ########################### */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -/* intrinsic void __enable_irq(); */ - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -/* intrinsic void __disable_irq(void); */ - -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -#define __enable_fault_irq __enable_fiq - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -#define __disable_fault_irq __disable_fiq - -/** - \brief Get FPSCR (Floating Point Status/Control) - \return Floating Point Status/Control register value - */ -__STATIC_INLINE uint32_t __get_FPSCR(void) -{ -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) - register uint32_t __regfpscr __ASM("fpscr"); - return(__regfpscr); -#else - return(0U); -#endif -} - -/** - \brief Set FPSCR (Floating Point Status/Control) - \param [in] fpscr Floating Point Status/Control value to set - */ -__STATIC_INLINE void __set_FPSCR(uint32_t fpscr) -{ -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) - register uint32_t __regfpscr __ASM("fpscr"); - __regfpscr = (fpscr); -#else - (void)fpscr; -#endif -} - -/** \brief Get CPSR (Current Program Status Register) - \return CPSR Register value - */ -__STATIC_INLINE uint32_t __get_CPSR(void) -{ - register uint32_t __regCPSR __ASM("cpsr"); - return(__regCPSR); -} - - -/** \brief Set CPSR (Current Program Status Register) - \param [in] cpsr CPSR value to set - */ -__STATIC_INLINE void __set_CPSR(uint32_t cpsr) -{ - register uint32_t __regCPSR __ASM("cpsr"); - __regCPSR = cpsr; -} - -/** \brief Get Mode - \return Processor Mode - */ -__STATIC_INLINE uint32_t __get_mode(void) -{ - return (__get_CPSR() & 0x1FU); -} - -/** \brief Set Mode - \param [in] mode Mode value to set - */ -__STATIC_INLINE __ASM void __set_mode(uint32_t mode) -{ - MOV r1, lr - MSR CPSR_C, r0 - BX r1 -} - -/** \brief Get Stack Pointer - \return Stack Pointer - */ -__STATIC_INLINE __ASM uint32_t __get_SP(void) -{ - MOV r0, sp - BX lr -} - -/** \brief Set Stack Pointer - \param [in] stack Stack Pointer value to set - */ -__STATIC_INLINE __ASM void __set_SP(uint32_t stack) -{ - MOV sp, r0 - BX lr -} - - -/** \brief Get USR/SYS Stack Pointer - \return USR/SYSStack Pointer - */ -__STATIC_INLINE __ASM uint32_t __get_SP_usr(void) -{ - ARM - PRESERVE8 - - MRS R1, CPSR - CPS #0x1F ;no effect in USR mode - MOV R0, SP - MSR CPSR_c, R1 ;no effect in USR mode - ISB - BX LR -} - -/** \brief Set USR/SYS Stack Pointer - \param [in] topOfProcStack USR/SYS Stack Pointer value to set - */ -__STATIC_INLINE __ASM void __set_SP_usr(uint32_t topOfProcStack) -{ - ARM - PRESERVE8 - - MRS R1, CPSR - CPS #0x1F ;no effect in USR mode - MOV SP, R0 - MSR CPSR_c, R1 ;no effect in USR mode - ISB - BX LR -} - -/** \brief Get FPEXC (Floating Point Exception Control Register) - \return Floating Point Exception Control Register value - */ -__STATIC_INLINE uint32_t __get_FPEXC(void) -{ -#if (__FPU_PRESENT == 1) - register uint32_t __regfpexc __ASM("fpexc"); - return(__regfpexc); -#else - return(0); -#endif -} - -/** \brief Set FPEXC (Floating Point Exception Control Register) - \param [in] fpexc Floating Point Exception Control value to set - */ -__STATIC_INLINE void __set_FPEXC(uint32_t fpexc) -{ -#if (__FPU_PRESENT == 1) - register uint32_t __regfpexc __ASM("fpexc"); - __regfpexc = (fpexc); -#endif -} - -/* - * Include common core functions to access Coprocessor 15 registers - */ - -#define __get_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); (Rt) = tmp; } while(0) -#define __set_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); tmp = (Rt); } while(0) -#define __get_CP64(cp, op1, Rt, CRm) \ - do { \ - uint32_t ltmp, htmp; \ - __ASM volatile("MRRC p" # cp ", " # op1 ", ltmp, htmp, c" # CRm); \ - (Rt) = ((((uint64_t)htmp) << 32U) | ((uint64_t)ltmp)); \ - } while(0) - -#define __set_CP64(cp, op1, Rt, CRm) \ - do { \ - const uint64_t tmp = (Rt); \ - const uint32_t ltmp = (uint32_t)(tmp); \ - const uint32_t htmp = (uint32_t)(tmp >> 32U); \ - __ASM volatile("MCRR p" # cp ", " # op1 ", ltmp, htmp, c" # CRm); \ - } while(0) - -#include "cmsis_cp15.h" - -/** \brief Enable Floating Point Unit - - Critical section, called from undef handler, so systick is disabled - */ -__STATIC_INLINE __ASM void __FPU_Enable(void) -{ - ARM - - //Permit access to VFP/NEON, registers by modifying CPACR - MRC p15,0,R1,c1,c0,2 - ORR R1,R1,#0x00F00000 - MCR p15,0,R1,c1,c0,2 - - //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted - ISB - - //Enable VFP/NEON - VMRS R1,FPEXC - ORR R1,R1,#0x40000000 - VMSR FPEXC,R1 - - //Initialise VFP/NEON registers to 0 - MOV R2,#0 - - //Initialise D16 registers to 0 - VMOV D0, R2,R2 - VMOV D1, R2,R2 - VMOV D2, R2,R2 - VMOV D3, R2,R2 - VMOV D4, R2,R2 - VMOV D5, R2,R2 - VMOV D6, R2,R2 - VMOV D7, R2,R2 - VMOV D8, R2,R2 - VMOV D9, R2,R2 - VMOV D10,R2,R2 - VMOV D11,R2,R2 - VMOV D12,R2,R2 - VMOV D13,R2,R2 - VMOV D14,R2,R2 - VMOV D15,R2,R2 - - IF {TARGET_FEATURE_EXTENSION_REGISTER_COUNT} == 32 - //Initialise D32 registers to 0 - VMOV D16,R2,R2 - VMOV D17,R2,R2 - VMOV D18,R2,R2 - VMOV D19,R2,R2 - VMOV D20,R2,R2 - VMOV D21,R2,R2 - VMOV D22,R2,R2 - VMOV D23,R2,R2 - VMOV D24,R2,R2 - VMOV D25,R2,R2 - VMOV D26,R2,R2 - VMOV D27,R2,R2 - VMOV D28,R2,R2 - VMOV D29,R2,R2 - VMOV D30,R2,R2 - VMOV D31,R2,R2 - ENDIF - - //Initialise FPSCR to a known state - VMRS R1,FPSCR - LDR R2,=0x00086060 //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero. - AND R1,R1,R2 - VMSR FPSCR,R1 - - BX LR -} - -#endif /* __CMSIS_ARMCC_H */ diff --git a/Drivers/CMSIS/Core_A/Include/cmsis_armclang.h b/Drivers/CMSIS/Core_A/Include/cmsis_armclang.h deleted file mode 100644 index b7d69c7..0000000 --- a/Drivers/CMSIS/Core_A/Include/cmsis_armclang.h +++ /dev/null @@ -1,614 +0,0 @@ -/**************************************************************************//** - * @file cmsis_armclang.h - * @brief CMSIS compiler specific macros, functions, instructions - * @version V1.2.1 - * @date 05. May 2021 - ******************************************************************************/ -/* - * Copyright (c) 2009-2021 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_ARMCLANG_H -#define __CMSIS_ARMCLANG_H - -#pragma clang system_header /* treat file as system include file */ - -/* CMSIS compiler specific defines */ -#ifndef __ASM - #define __ASM __asm -#endif -#ifndef __INLINE - #define __INLINE __inline -#endif -#ifndef __FORCEINLINE - #define __FORCEINLINE __attribute__((always_inline)) -#endif -#ifndef __STATIC_INLINE - #define __STATIC_INLINE static __inline -#endif -#ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline -#endif -#ifndef __NO_RETURN - #define __NO_RETURN __attribute__((__noreturn__)) -#endif -#ifndef CMSIS_DEPRECATED - #define CMSIS_DEPRECATED __attribute__((deprecated)) -#endif -#ifndef __USED - #define __USED __attribute__((used)) -#endif -#ifndef __WEAK - #define __WEAK __attribute__((weak)) -#endif -#ifndef __PACKED - #define __PACKED __attribute__((packed, aligned(1))) -#endif -#ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) -#endif -#ifndef __UNALIGNED_UINT16_WRITE - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */ - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) -#endif -#ifndef __UNALIGNED_UINT16_READ - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */ - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) -#endif -#ifndef __UNALIGNED_UINT32_WRITE - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */ - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) -#endif -#ifndef __UNALIGNED_UINT32_READ - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) -#endif -#ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) -#endif -#ifndef __PACKED - #define __PACKED __attribute__((packed)) -#endif -#ifndef __COMPILER_BARRIER - #define __COMPILER_BARRIER() __ASM volatile("":::"memory") -#endif - -/* ########################## Core Instruction Access ######################### */ -/** - \brief No Operation - */ -#define __NOP __builtin_arm_nop - -/** - \brief Wait For Interrupt - */ -#define __WFI __builtin_arm_wfi - -/** - \brief Wait For Event - */ -#define __WFE __builtin_arm_wfe - -/** - \brief Send Event - */ -#define __SEV __builtin_arm_sev - -/** - \brief Instruction Synchronization Barrier - */ -#define __ISB() __builtin_arm_isb(0xF) - -/** - \brief Data Synchronization Barrier - */ -#define __DSB() __builtin_arm_dsb(0xF) - -/** - \brief Data Memory Barrier - */ -#define __DMB() __builtin_arm_dmb(0xF) - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV(value) __builtin_bswap32(value) - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV16(value) __ROR(__REV(value), 16) - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REVSH(value) (int16_t)__builtin_bswap16(value) - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] op1 Value to rotate - \param [in] op2 Number of Bits to rotate - \return Rotated value - */ -__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) -{ - op2 %= 32U; - if (op2 == 0U) - { - return op1; - } - return (op1 >> op2) | (op1 << (32U - op2)); -} - - -/** - \brief Breakpoint - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __ASM volatile ("bkpt "#value) - -/** - \brief Reverse bit order of value - \param [in] value Value to reverse - \return Reversed value - */ -#define __RBIT __builtin_arm_rbit - -/** - \brief Count leading zeros - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) -{ - /* Even though __builtin_clz produces a CLZ instruction on ARM, formally - __builtin_clz(0) is undefined behaviour, so handle this case specially. - This guarantees ARM-compatible results if happening to compile on a non-ARM - target, and ensures the compiler doesn't decide to activate any - optimisations using the logic "value was passed to __builtin_clz, so it - is non-zero". - ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a - single CLZ instruction. - */ - if (value == 0U) - { - return 32U; - } - return __builtin_clz(value); -} - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDREXB (uint8_t)__builtin_arm_ldrex - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDREXH (uint16_t)__builtin_arm_ldrex - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDREXW (uint32_t)__builtin_arm_ldrex - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXB (uint32_t)__builtin_arm_strex - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXH (uint32_t)__builtin_arm_strex - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXW (uint32_t)__builtin_arm_strex - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -#define __CLREX __builtin_arm_clrex - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT __builtin_arm_ssat - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT __builtin_arm_usat - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) - -#define __SADD8 __builtin_arm_sadd8 -#define __SADD16 __builtin_arm_sadd16 -#define __QADD8 __builtin_arm_qadd8 -#define __QSUB8 __builtin_arm_qsub8 -#define __QADD16 __builtin_arm_qadd16 -#define __SHADD16 __builtin_arm_shadd16 -#define __QSUB16 __builtin_arm_qsub16 -#define __SHSUB16 __builtin_arm_shsub16 -#define __QASX __builtin_arm_qasx -#define __SHASX __builtin_arm_shasx -#define __QSAX __builtin_arm_qsax -#define __SHSAX __builtin_arm_shsax -#define __SXTB16 __builtin_arm_sxtb16 -#define __SMUAD __builtin_arm_smuad -#define __SMUADX __builtin_arm_smuadx -#define __SMLAD __builtin_arm_smlad -#define __SMLADX __builtin_arm_smladx -#define __SMLALD __builtin_arm_smlald -#define __SMLALDX __builtin_arm_smlaldx -#define __SMUSD __builtin_arm_smusd -#define __SMUSDX __builtin_arm_smusdx -#define __SMLSDX __builtin_arm_smlsdx -#define __USAT16 __builtin_arm_usat16 -#define __SSUB8 __builtin_arm_ssub8 -#define __SXTB16 __builtin_arm_sxtb16 -#define __SXTAB16 __builtin_arm_sxtab16 - - -__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ - ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) - -#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ - ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) - -__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) -{ - int32_t result; - - __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#endif /* (__ARM_FEATURE_DSP == 1) */ - -/* ########################### Core Function Access ########################### */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __enable_irq(void) -{ - __ASM volatile ("cpsie i" : : : "memory"); -} - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); -} - -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __enable_fault_irq(void) -{ - __ASM volatile ("cpsie f" : : : "memory"); -} - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __disable_fault_irq(void) -{ - __ASM volatile ("cpsid f" : : : "memory"); -} - -/** - \brief Get FPSCR - \details Returns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -#define __get_FPSCR __builtin_arm_get_fpscr - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -#define __set_FPSCR __builtin_arm_set_fpscr - -/** \brief Get CPSR Register - \return CPSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CPSR(void) -{ - uint32_t result; - __ASM volatile("MRS %0, cpsr" : "=r" (result) ); - return(result); -} - -/** \brief Set CPSR Register - \param [in] cpsr CPSR value to set - */ -__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr) -{ - __ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "cc", "memory"); -} - -/** \brief Get Mode - \return Processor Mode - */ -__STATIC_FORCEINLINE uint32_t __get_mode(void) -{ - return (__get_CPSR() & 0x1FU); -} - -/** \brief Set Mode - \param [in] mode Mode value to set - */ -__STATIC_FORCEINLINE void __set_mode(uint32_t mode) -{ - __ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory"); -} - -/** \brief Get Stack Pointer - \return Stack Pointer value - */ -__STATIC_FORCEINLINE uint32_t __get_SP(void) -{ - uint32_t result; - __ASM volatile("MOV %0, sp" : "=r" (result) : : "memory"); - return result; -} - -/** \brief Set Stack Pointer - \param [in] stack Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __set_SP(uint32_t stack) -{ - __ASM volatile("MOV sp, %0" : : "r" (stack) : "memory"); -} - -/** \brief Get USR/SYS Stack Pointer - \return USR/SYS Stack Pointer value - */ -__STATIC_FORCEINLINE uint32_t __get_SP_usr(void) -{ - uint32_t cpsr; - uint32_t result; - __ASM volatile( - "MRS %0, cpsr \n" - "CPS #0x1F \n" // no effect in USR mode - "MOV %1, sp \n" - "MSR cpsr_c, %0 \n" // no effect in USR mode - "ISB" : "=r"(cpsr), "=r"(result) : : "memory" - ); - return result; -} - -/** \brief Set USR/SYS Stack Pointer - \param [in] topOfProcStack USR/SYS Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack) -{ - uint32_t cpsr; - __ASM volatile( - "MRS %0, cpsr \n" - "CPS #0x1F \n" // no effect in USR mode - "MOV sp, %1 \n" - "MSR cpsr_c, %0 \n" // no effect in USR mode - "ISB" : "=r"(cpsr) : "r" (topOfProcStack) : "memory" - ); -} - -/** \brief Get FPEXC - \return Floating Point Exception Control register value - */ -__STATIC_FORCEINLINE uint32_t __get_FPEXC(void) -{ -#if (__FPU_PRESENT == 1) - uint32_t result; - __ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory"); - return(result); -#else - return(0); -#endif -} - -/** \brief Set FPEXC - \param [in] fpexc Floating Point Exception Control value to set - */ -__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc) -{ -#if (__FPU_PRESENT == 1) - __ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory"); -#endif -} - -/* - * Include common core functions to access Coprocessor 15 registers - */ - -#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" ) -#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" ) -#define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" ) -#define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" ) - -#include "cmsis_cp15.h" - -/** \brief Enable Floating Point Unit - - Critical section, called from undef handler, so systick is disabled - */ -__STATIC_INLINE void __FPU_Enable(void) -{ - __ASM volatile( - //Permit access to VFP/NEON, registers by modifying CPACR - " MRC p15,0,R1,c1,c0,2 \n" - " ORR R1,R1,#0x00F00000 \n" - " MCR p15,0,R1,c1,c0,2 \n" - - //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted - " ISB \n" - - //Enable VFP/NEON - " VMRS R1,FPEXC \n" - " ORR R1,R1,#0x40000000 \n" - " VMSR FPEXC,R1 \n" - - //Initialise VFP/NEON registers to 0 - " MOV R2,#0 \n" - - //Initialise D16 registers to 0 - " VMOV D0, R2,R2 \n" - " VMOV D1, R2,R2 \n" - " VMOV D2, R2,R2 \n" - " VMOV D3, R2,R2 \n" - " VMOV D4, R2,R2 \n" - " VMOV D5, R2,R2 \n" - " VMOV D6, R2,R2 \n" - " VMOV D7, R2,R2 \n" - " VMOV D8, R2,R2 \n" - " VMOV D9, R2,R2 \n" - " VMOV D10,R2,R2 \n" - " VMOV D11,R2,R2 \n" - " VMOV D12,R2,R2 \n" - " VMOV D13,R2,R2 \n" - " VMOV D14,R2,R2 \n" - " VMOV D15,R2,R2 \n" - -#if (defined(__ARM_NEON) && (__ARM_NEON == 1)) - //Initialise D32 registers to 0 - " VMOV D16,R2,R2 \n" - " VMOV D17,R2,R2 \n" - " VMOV D18,R2,R2 \n" - " VMOV D19,R2,R2 \n" - " VMOV D20,R2,R2 \n" - " VMOV D21,R2,R2 \n" - " VMOV D22,R2,R2 \n" - " VMOV D23,R2,R2 \n" - " VMOV D24,R2,R2 \n" - " VMOV D25,R2,R2 \n" - " VMOV D26,R2,R2 \n" - " VMOV D27,R2,R2 \n" - " VMOV D28,R2,R2 \n" - " VMOV D29,R2,R2 \n" - " VMOV D30,R2,R2 \n" - " VMOV D31,R2,R2 \n" -#endif - - //Initialise FPSCR to a known state - " VMRS R1,FPSCR \n" - " LDR R2,=0x00086060 \n" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero. - " AND R1,R1,R2 \n" - " VMSR FPSCR,R1 " - : : : "cc", "r1", "r2" - ); -} - -#endif /* __CMSIS_ARMCLANG_H */ diff --git a/Drivers/CMSIS/Core_A/Include/cmsis_compiler.h b/Drivers/CMSIS/Core_A/Include/cmsis_compiler.h deleted file mode 100644 index 9c6cab7..0000000 --- a/Drivers/CMSIS/Core_A/Include/cmsis_compiler.h +++ /dev/null @@ -1,213 +0,0 @@ -/**************************************************************************//** - * @file cmsis_compiler.h - * @brief CMSIS compiler specific macros, functions, instructions - * @version V1.0.2 - * @date 10. January 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_COMPILER_H -#define __CMSIS_COMPILER_H - -#include - -/* - * Arm Compiler 4/5 - */ -#if defined ( __CC_ARM ) - #include "cmsis_armcc.h" - - -/* - * Arm Compiler 6 (armclang) - */ -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #include "cmsis_armclang.h" - - -/* - * GNU Compiler - */ -#elif defined ( __GNUC__ ) - #include "cmsis_gcc.h" - - -/* - * IAR Compiler - */ -#elif defined ( __ICCARM__ ) - #include "cmsis_iccarm.h" - - -/* - * TI Arm Compiler - */ -#elif defined ( __TI_ARM__ ) - #include - - #ifndef __ASM - #define __ASM __asm - #endif - #ifndef __INLINE - #define __INLINE inline - #endif - #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline - #endif - #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline - #endif - #ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __STATIC_INLINE - #endif - #ifndef __NO_RETURN - #define __NO_RETURN __attribute__((noreturn)) - #endif - #ifndef CMSIS_DEPRECATED - #define CMSIS_DEPRECATED __attribute__((deprecated)) - #endif - #ifndef __USED - #define __USED __attribute__((used)) - #endif - #ifndef __WEAK - #define __WEAK __attribute__((weak)) - #endif - #ifndef __UNALIGNED_UINT32 - struct __attribute__((packed)) T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) - #endif - #ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) - #endif - #ifndef __PACKED - #define __PACKED __attribute__((packed)) - #endif - #ifndef __COMPILER_BARRIER - #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. - #define __COMPILER_BARRIER() (void)0 - #endif - - -/* - * TASKING Compiler - */ -#elif defined ( __TASKING__ ) - /* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all intrinsics, - * Including the CMSIS ones. - */ - - #ifndef __ASM - #define __ASM __asm - #endif - #ifndef __INLINE - #define __INLINE inline - #endif - #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline - #endif - #ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __STATIC_INLINE - #endif - #ifndef __NO_RETURN - #define __NO_RETURN __attribute__((noreturn)) - #endif - #ifndef CMSIS_DEPRECATED - #define CMSIS_DEPRECATED __attribute__((deprecated)) - #endif - #ifndef __USED - #define __USED __attribute__((used)) - #endif - #ifndef __WEAK - #define __WEAK __attribute__((weak)) - #endif - #ifndef __UNALIGNED_UINT32 - struct __packed__ T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) - #endif - #ifndef __ALIGNED - #define __ALIGNED(x) __align(x) - #endif - #ifndef __PACKED - #define __PACKED __packed__ - #endif - #ifndef __COMPILER_BARRIER - #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. - #define __COMPILER_BARRIER() (void)0 - #endif - - -/* - * COSMIC Compiler - */ -#elif defined ( __CSMC__ ) - #include - - #ifndef __ASM - #define __ASM _asm - #endif - #ifndef __INLINE - #define __INLINE inline - #endif - #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline - #endif - #ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __STATIC_INLINE - #endif - #ifndef __NO_RETURN - // NO RETURN is automatically detected hence no warning here - #define __NO_RETURN - #endif - #ifndef __USED - #warning No compiler specific solution for __USED. __USED is ignored. - #define __USED - #endif - #ifndef CMSIS_DEPRECATED - #warning No compiler specific solution for CMSIS_DEPRECATED. CMSIS_DEPRECATED is ignored. - #define CMSIS_DEPRECATED - #endif - #ifndef __WEAK - #define __WEAK __weak - #endif - #ifndef __UNALIGNED_UINT32 - @packed struct T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) - #endif - #ifndef __ALIGNED - #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. - #define __ALIGNED(x) - #endif - #ifndef __PACKED - #define __PACKED @packed - #endif - #ifndef __COMPILER_BARRIER - #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. - #define __COMPILER_BARRIER() (void)0 - #endif - - -#else - #error Unknown compiler. -#endif - - -#endif /* __CMSIS_COMPILER_H */ - diff --git a/Drivers/CMSIS/Core_A/Include/cmsis_cp15.h b/Drivers/CMSIS/Core_A/Include/cmsis_cp15.h deleted file mode 100644 index 75e57b8..0000000 --- a/Drivers/CMSIS/Core_A/Include/cmsis_cp15.h +++ /dev/null @@ -1,514 +0,0 @@ -/**************************************************************************//** - * @file cmsis_cp15.h - * @brief CMSIS compiler specific macros, functions, instructions - * @version V1.0.1 - * @date 07. Sep 2017 - ******************************************************************************/ -/* - * Copyright (c) 2009-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CMSIS_CP15_H -#define __CMSIS_CP15_H - -/** \brief Get ACTLR - \return Auxiliary Control register value - */ -__STATIC_FORCEINLINE uint32_t __get_ACTLR(void) -{ - uint32_t result; - __get_CP(15, 0, result, 1, 0, 1); - return(result); -} - -/** \brief Set ACTLR - \param [in] actlr Auxiliary Control value to set - */ -__STATIC_FORCEINLINE void __set_ACTLR(uint32_t actlr) -{ - __set_CP(15, 0, actlr, 1, 0, 1); -} - -/** \brief Get CPACR - \return Coprocessor Access Control register value - */ -__STATIC_FORCEINLINE uint32_t __get_CPACR(void) -{ - uint32_t result; - __get_CP(15, 0, result, 1, 0, 2); - return result; -} - -/** \brief Set CPACR - \param [in] cpacr Coprocessor Access Control value to set - */ -__STATIC_FORCEINLINE void __set_CPACR(uint32_t cpacr) -{ - __set_CP(15, 0, cpacr, 1, 0, 2); -} - -/** \brief Get DFSR - \return Data Fault Status Register value - */ -__STATIC_FORCEINLINE uint32_t __get_DFSR(void) -{ - uint32_t result; - __get_CP(15, 0, result, 5, 0, 0); - return result; -} - -/** \brief Set DFSR - \param [in] dfsr Data Fault Status value to set - */ -__STATIC_FORCEINLINE void __set_DFSR(uint32_t dfsr) -{ - __set_CP(15, 0, dfsr, 5, 0, 0); -} - -/** \brief Get IFSR - \return Instruction Fault Status Register value - */ -__STATIC_FORCEINLINE uint32_t __get_IFSR(void) -{ - uint32_t result; - __get_CP(15, 0, result, 5, 0, 1); - return result; -} - -/** \brief Set IFSR - \param [in] ifsr Instruction Fault Status value to set - */ -__STATIC_FORCEINLINE void __set_IFSR(uint32_t ifsr) -{ - __set_CP(15, 0, ifsr, 5, 0, 1); -} - -/** \brief Get ISR - \return Interrupt Status Register value - */ -__STATIC_FORCEINLINE uint32_t __get_ISR(void) -{ - uint32_t result; - __get_CP(15, 0, result, 12, 1, 0); - return result; -} - -/** \brief Get CBAR - \return Configuration Base Address register value - */ -__STATIC_FORCEINLINE uint32_t __get_CBAR(void) -{ - uint32_t result; - __get_CP(15, 4, result, 15, 0, 0); - return result; -} - -/** \brief Get TTBR0 - - This function returns the value of the Translation Table Base Register 0. - - \return Translation Table Base Register 0 value - */ -__STATIC_FORCEINLINE uint32_t __get_TTBR0(void) -{ - uint32_t result; - __get_CP(15, 0, result, 2, 0, 0); - return result; -} - -/** \brief Set TTBR0 - - This function assigns the given value to the Translation Table Base Register 0. - - \param [in] ttbr0 Translation Table Base Register 0 value to set - */ -__STATIC_FORCEINLINE void __set_TTBR0(uint32_t ttbr0) -{ - __set_CP(15, 0, ttbr0, 2, 0, 0); -} - -/** \brief Get DACR - - This function returns the value of the Domain Access Control Register. - - \return Domain Access Control Register value - */ -__STATIC_FORCEINLINE uint32_t __get_DACR(void) -{ - uint32_t result; - __get_CP(15, 0, result, 3, 0, 0); - return result; -} - -/** \brief Set DACR - - This function assigns the given value to the Domain Access Control Register. - - \param [in] dacr Domain Access Control Register value to set - */ -__STATIC_FORCEINLINE void __set_DACR(uint32_t dacr) -{ - __set_CP(15, 0, dacr, 3, 0, 0); -} - -/** \brief Set SCTLR - - This function assigns the given value to the System Control Register. - - \param [in] sctlr System Control Register value to set - */ -__STATIC_FORCEINLINE void __set_SCTLR(uint32_t sctlr) -{ - __set_CP(15, 0, sctlr, 1, 0, 0); -} - -/** \brief Get SCTLR - \return System Control Register value - */ -__STATIC_FORCEINLINE uint32_t __get_SCTLR(void) -{ - uint32_t result; - __get_CP(15, 0, result, 1, 0, 0); - return result; -} - -/** \brief Set ACTRL - \param [in] actrl Auxiliary Control Register value to set - */ -__STATIC_FORCEINLINE void __set_ACTRL(uint32_t actrl) -{ - __set_CP(15, 0, actrl, 1, 0, 1); -} - -/** \brief Get ACTRL - \return Auxiliary Control Register value - */ -__STATIC_FORCEINLINE uint32_t __get_ACTRL(void) -{ - uint32_t result; - __get_CP(15, 0, result, 1, 0, 1); - return result; -} - -/** \brief Get MPIDR - - This function returns the value of the Multiprocessor Affinity Register. - - \return Multiprocessor Affinity Register value - */ -__STATIC_FORCEINLINE uint32_t __get_MPIDR(void) -{ - uint32_t result; - __get_CP(15, 0, result, 0, 0, 5); - return result; -} - -/** \brief Get VBAR - - This function returns the value of the Vector Base Address Register. - - \return Vector Base Address Register - */ -__STATIC_FORCEINLINE uint32_t __get_VBAR(void) -{ - uint32_t result; - __get_CP(15, 0, result, 12, 0, 0); - return result; -} - -/** \brief Set VBAR - - This function assigns the given value to the Vector Base Address Register. - - \param [in] vbar Vector Base Address Register value to set - */ -__STATIC_FORCEINLINE void __set_VBAR(uint32_t vbar) -{ - __set_CP(15, 0, vbar, 12, 0, 0); -} - -/** \brief Get MVBAR - - This function returns the value of the Monitor Vector Base Address Register. - - \return Monitor Vector Base Address Register - */ -__STATIC_FORCEINLINE uint32_t __get_MVBAR(void) -{ - uint32_t result; - __get_CP(15, 0, result, 12, 0, 1); - return result; -} - -/** \brief Set MVBAR - - This function assigns the given value to the Monitor Vector Base Address Register. - - \param [in] mvbar Monitor Vector Base Address Register value to set - */ -__STATIC_FORCEINLINE void __set_MVBAR(uint32_t mvbar) -{ - __set_CP(15, 0, mvbar, 12, 0, 1); -} - -#if (defined(__CORTEX_A) && (__CORTEX_A == 7U) && \ - defined(__TIM_PRESENT) && (__TIM_PRESENT == 1U)) || \ - defined(DOXYGEN) - -/** \brief Set CNTFRQ - - This function assigns the given value to PL1 Physical Timer Counter Frequency Register (CNTFRQ). - - \param [in] value CNTFRQ Register value to set -*/ -__STATIC_FORCEINLINE void __set_CNTFRQ(uint32_t value) -{ - __set_CP(15, 0, value, 14, 0, 0); -} - -/** \brief Get CNTFRQ - - This function returns the value of the PL1 Physical Timer Counter Frequency Register (CNTFRQ). - - \return CNTFRQ Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CNTFRQ(void) -{ - uint32_t result; - __get_CP(15, 0, result, 14, 0 , 0); - return result; -} - -/** \brief Set CNTP_TVAL - - This function assigns the given value to PL1 Physical Timer Value Register (CNTP_TVAL). - - \param [in] value CNTP_TVAL Register value to set -*/ -__STATIC_FORCEINLINE void __set_CNTP_TVAL(uint32_t value) -{ - __set_CP(15, 0, value, 14, 2, 0); -} - -/** \brief Get CNTP_TVAL - - This function returns the value of the PL1 Physical Timer Value Register (CNTP_TVAL). - - \return CNTP_TVAL Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CNTP_TVAL(void) -{ - uint32_t result; - __get_CP(15, 0, result, 14, 2, 0); - return result; -} - -/** \brief Get CNTPCT - - This function returns the value of the 64 bits PL1 Physical Count Register (CNTPCT). - - \return CNTPCT Register value - */ -__STATIC_FORCEINLINE uint64_t __get_CNTPCT(void) -{ - uint64_t result; - __get_CP64(15, 0, result, 14); - return result; -} - -/** \brief Set CNTP_CVAL - - This function assigns the given value to 64bits PL1 Physical Timer CompareValue Register (CNTP_CVAL). - - \param [in] value CNTP_CVAL Register value to set -*/ -__STATIC_FORCEINLINE void __set_CNTP_CVAL(uint64_t value) -{ - __set_CP64(15, 2, value, 14); -} - -/** \brief Get CNTP_CVAL - - This function returns the value of the 64 bits PL1 Physical Timer CompareValue Register (CNTP_CVAL). - - \return CNTP_CVAL Register value - */ -__STATIC_FORCEINLINE uint64_t __get_CNTP_CVAL(void) -{ - uint64_t result; - __get_CP64(15, 2, result, 14); - return result; -} - -/** \brief Set CNTP_CTL - - This function assigns the given value to PL1 Physical Timer Control Register (CNTP_CTL). - - \param [in] value CNTP_CTL Register value to set -*/ -__STATIC_FORCEINLINE void __set_CNTP_CTL(uint32_t value) -{ - __set_CP(15, 0, value, 14, 2, 1); -} - -/** \brief Get CNTP_CTL register - \return CNTP_CTL Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CNTP_CTL(void) -{ - uint32_t result; - __get_CP(15, 0, result, 14, 2, 1); - return result; -} - -#endif - -/** \brief Set TLBIALL - - TLB Invalidate All - */ -__STATIC_FORCEINLINE void __set_TLBIALL(uint32_t value) -{ - __set_CP(15, 0, value, 8, 7, 0); -} - -/** \brief Set BPIALL. - - Branch Predictor Invalidate All - */ -__STATIC_FORCEINLINE void __set_BPIALL(uint32_t value) -{ - __set_CP(15, 0, value, 7, 5, 6); -} - -/** \brief Set ICIALLU - - Instruction Cache Invalidate All - */ -__STATIC_FORCEINLINE void __set_ICIALLU(uint32_t value) -{ - __set_CP(15, 0, value, 7, 5, 0); -} - -/** \brief Set DCCMVAC - - Data cache clean - */ -__STATIC_FORCEINLINE void __set_DCCMVAC(uint32_t value) -{ - __set_CP(15, 0, value, 7, 10, 1); -} - -/** \brief Set DCIMVAC - - Data cache invalidate - */ -__STATIC_FORCEINLINE void __set_DCIMVAC(uint32_t value) -{ - __set_CP(15, 0, value, 7, 6, 1); -} - -/** \brief Set DCCIMVAC - - Data cache clean and invalidate - */ -__STATIC_FORCEINLINE void __set_DCCIMVAC(uint32_t value) -{ - __set_CP(15, 0, value, 7, 14, 1); -} - -/** \brief Set CSSELR - */ -__STATIC_FORCEINLINE void __set_CSSELR(uint32_t value) -{ -// __ASM volatile("MCR p15, 2, %0, c0, c0, 0" : : "r"(value) : "memory"); - __set_CP(15, 2, value, 0, 0, 0); -} - -/** \brief Get CSSELR - \return CSSELR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CSSELR(void) -{ - uint32_t result; -// __ASM volatile("MRC p15, 2, %0, c0, c0, 0" : "=r"(result) : : "memory"); - __get_CP(15, 2, result, 0, 0, 0); - return result; -} - -/** \brief Set CCSIDR - \deprecated CCSIDR itself is read-only. Use __set_CSSELR to select cache level instead. - */ -CMSIS_DEPRECATED -__STATIC_FORCEINLINE void __set_CCSIDR(uint32_t value) -{ - __set_CSSELR(value); -} - -/** \brief Get CCSIDR - \return CCSIDR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CCSIDR(void) -{ - uint32_t result; -// __ASM volatile("MRC p15, 1, %0, c0, c0, 0" : "=r"(result) : : "memory"); - __get_CP(15, 1, result, 0, 0, 0); - return result; -} - -/** \brief Get CLIDR - \return CLIDR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CLIDR(void) -{ - uint32_t result; -// __ASM volatile("MRC p15, 1, %0, c0, c0, 1" : "=r"(result) : : "memory"); - __get_CP(15, 1, result, 0, 0, 1); - return result; -} - -/** \brief Set DCISW - */ -__STATIC_FORCEINLINE void __set_DCISW(uint32_t value) -{ -// __ASM volatile("MCR p15, 0, %0, c7, c6, 2" : : "r"(value) : "memory") - __set_CP(15, 0, value, 7, 6, 2); -} - -/** \brief Set DCCSW - */ -__STATIC_FORCEINLINE void __set_DCCSW(uint32_t value) -{ -// __ASM volatile("MCR p15, 0, %0, c7, c10, 2" : : "r"(value) : "memory") - __set_CP(15, 0, value, 7, 10, 2); -} - -/** \brief Set DCCISW - */ -__STATIC_FORCEINLINE void __set_DCCISW(uint32_t value) -{ -// __ASM volatile("MCR p15, 0, %0, c7, c14, 2" : : "r"(value) : "memory") - __set_CP(15, 0, value, 7, 14, 2); -} - -#endif diff --git a/Drivers/CMSIS/Core_A/Include/cmsis_gcc.h b/Drivers/CMSIS/Core_A/Include/cmsis_gcc.h deleted file mode 100644 index 7f153d4..0000000 --- a/Drivers/CMSIS/Core_A/Include/cmsis_gcc.h +++ /dev/null @@ -1,917 +0,0 @@ -/**************************************************************************//** - * @file cmsis_gcc.h - * @brief CMSIS compiler specific macros, functions, instructions - * @version V1.3.2 - * @date 24. March 2022 - ******************************************************************************/ -/* - * Copyright (c) 2009-2022 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_GCC_H -#define __CMSIS_GCC_H - -/* ignore some GCC warnings */ -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wsign-conversion" -#pragma GCC diagnostic ignored "-Wconversion" -#pragma GCC diagnostic ignored "-Wunused-parameter" - -/* Fallback for __has_builtin */ -#ifndef __has_builtin - #define __has_builtin(x) (0) -#endif - -/* CMSIS compiler specific defines */ -#ifndef __ASM - #define __ASM __asm -#endif -#ifndef __INLINE - #define __INLINE inline -#endif -#ifndef __FORCEINLINE - #define __FORCEINLINE __attribute__((always_inline)) -#endif -#ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline -#endif -#ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline -#endif -#ifndef __NO_RETURN - #define __NO_RETURN __attribute__((__noreturn__)) -#endif -#ifndef CMSIS_DEPRECATED - #define CMSIS_DEPRECATED __attribute__((deprecated)) -#endif -#ifndef __USED - #define __USED __attribute__((used)) -#endif -#ifndef __WEAK - #define __WEAK __attribute__((weak)) -#endif -#ifndef __PACKED - #define __PACKED __attribute__((packed, aligned(1))) -#endif -#ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) -#endif -#ifndef __UNALIGNED_UINT16_WRITE - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */ - __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; - #pragma GCC diagnostic pop - #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) -#endif -#ifndef __UNALIGNED_UINT16_READ - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */ - __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - #pragma GCC diagnostic pop - #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) -#endif -#ifndef __UNALIGNED_UINT32_WRITE - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" -/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */ - __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; - #pragma GCC diagnostic pop - #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) -#endif -#ifndef __UNALIGNED_UINT32_READ - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wpacked" - __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; - #pragma GCC diagnostic pop - #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) -#endif -#ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) -#endif -#ifndef __COMPILER_BARRIER - #define __COMPILER_BARRIER() __ASM volatile("":::"memory") -#endif - - -__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - - -__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - - -#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ - ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) - -#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ - ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) - -__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) -{ - int32_t result; - - __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - - -/* ########################## Core Instruction Access ######################### */ -/** - \brief No Operation - */ -#define __NOP() __ASM volatile ("nop") - -/** - \brief Wait For Interrupt - */ -#define __WFI() __ASM volatile ("wfi":::"memory") - -/** - \brief Wait For Event - */ -#define __WFE() __ASM volatile ("wfe":::"memory") - -/** - \brief Send Event - */ -#define __SEV() __ASM volatile ("sev") - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -__STATIC_FORCEINLINE void __ISB(void) -{ - __ASM volatile ("isb 0xF":::"memory"); -} - - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -__STATIC_FORCEINLINE void __DSB(void) -{ - __ASM volatile ("dsb 0xF":::"memory"); -} - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -__STATIC_FORCEINLINE void __DMB(void) -{ - __ASM volatile ("dmb 0xF":::"memory"); -} - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. - \param [in] value Value to reverse - \return Reversed value - */ -__STATIC_FORCEINLINE uint32_t __REV(uint32_t value) -{ -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) - return __builtin_bswap32(value); -#else - uint32_t result; - - __ASM ("rev %0, %1" : "=r" (result) : "r" (value) ); - return result; -#endif -} - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. - \param [in] value Value to reverse - \return Reversed value - */ -__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) -{ - uint32_t result; - __ASM ("rev16 %0, %1" : "=r" (result) : "r" (value)); - return result; -} - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. - \param [in] value Value to reverse - \return Reversed value - */ -__STATIC_FORCEINLINE int16_t __REVSH(int16_t value) -{ -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - return (int16_t)__builtin_bswap16(value); -#else - int16_t result; - - __ASM ("revsh %0, %1" : "=r" (result) : "r" (value) ); - return result; -#endif -} - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] op1 Value to rotate - \param [in] op2 Number of Bits to rotate - \return Rotated value - */ -__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) -{ - op2 %= 32U; - if (op2 == 0U) - { - return op1; - } - return (op1 >> op2) | (op1 << (32U - op2)); -} - - -/** - \brief Breakpoint - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __ASM volatile ("bkpt "#value) - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ -__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) -{ - uint32_t result; - __ASM ("rbit %0, %1" : "=r" (result) : "r" (value) ); - return result; -} - -/** - \brief Count leading zeros - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) -{ - /* Even though __builtin_clz produces a CLZ instruction on ARM, formally - __builtin_clz(0) is undefined behaviour, so handle this case specially. - This guarantees ARM-compatible results if happening to compile on a non-ARM - target, and ensures the compiler doesn't decide to activate any - optimisations using the logic "value was passed to __builtin_clz, so it - is non-zero". - ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a - single CLZ instruction. - */ - if (value == 0U) - { - return 32U; - } - return __builtin_clz(value); -} - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - return(result); -} - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) -{ - uint32_t result; - - __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - return(result); -} - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) -{ - uint32_t result; - - __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - return(result); -} - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - return(result); -} - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -__STATIC_FORCEINLINE void __CLREX(void) -{ - __ASM volatile ("clrex" ::: "memory"); -} - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT(ARG1, ARG2) \ -__extension__ \ -({ \ - int32_t __RES, __ARG1 = (ARG1); \ - __ASM volatile ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ - __RES; \ - }) - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT(ARG1, ARG2) \ -__extension__ \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM volatile ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ - __RES; \ - }) - -/* ########################### Core Function Access ########################### */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __enable_irq(void) -{ - __ASM volatile ("cpsie i" : : : "memory"); -} - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); -} - -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __enable_fault_irq(void) -{ - __ASM volatile ("cpsie f" : : : "memory"); -} - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__STATIC_FORCEINLINE void __disable_fault_irq(void) -{ - __ASM volatile ("cpsid f" : : : "memory"); -} - -/** - \brief Get FPSCR - \details Returns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -__STATIC_FORCEINLINE uint32_t __get_FPSCR(void) -{ - #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) - #if __has_builtin(__builtin_arm_get_fpscr) - // Re-enable using built-in when GCC has been fixed - // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) - /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ - return __builtin_arm_get_fpscr(); - #else - uint32_t result; - - __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); - return(result); - #endif - #else - return(0U); - #endif -} - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) -{ - #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) - #if __has_builtin(__builtin_arm_set_fpscr) - // Re-enable using built-in when GCC has been fixed - // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) - /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ - __builtin_arm_set_fpscr(fpscr); - #else - __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); - #endif - #else - (void)fpscr; - #endif -} - -/** \brief Get CPSR Register - \return CPSR Register value - */ -__STATIC_FORCEINLINE uint32_t __get_CPSR(void) -{ - uint32_t result; - __ASM volatile("MRS %0, cpsr" : "=r" (result) ); - return(result); -} - -/** \brief Set CPSR Register - \param [in] cpsr CPSR value to set - */ -__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr) -{ - __ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "cc", "memory"); -} - -/** \brief Get Mode - \return Processor Mode - */ -__STATIC_FORCEINLINE uint32_t __get_mode(void) -{ - return (__get_CPSR() & 0x1FU); -} - -/** \brief Set Mode - \param [in] mode Mode value to set - */ -__STATIC_FORCEINLINE void __set_mode(uint32_t mode) -{ - __ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory"); -} - -/** \brief Get Stack Pointer - \return Stack Pointer value - */ -__STATIC_FORCEINLINE uint32_t __get_SP(void) -{ - uint32_t result; - __ASM volatile("MOV %0, sp" : "=r" (result) : : "memory"); - return result; -} - -/** \brief Set Stack Pointer - \param [in] stack Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __set_SP(uint32_t stack) -{ - __ASM volatile("MOV sp, %0" : : "r" (stack) : "memory"); -} - -/** \brief Get USR/SYS Stack Pointer - \return USR/SYS Stack Pointer value - */ -__STATIC_FORCEINLINE uint32_t __get_SP_usr(void) -{ - uint32_t cpsr = __get_CPSR(); - uint32_t result; - __ASM volatile( - "CPS #0x1F \n" - "MOV %0, sp " : "=r"(result) : : "memory" - ); - __set_CPSR(cpsr); - __ISB(); - return result; -} - -/** \brief Set USR/SYS Stack Pointer - \param [in] topOfProcStack USR/SYS Stack Pointer value to set - */ -__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack) -{ - uint32_t cpsr = __get_CPSR(); - __ASM volatile( - "CPS #0x1F \n" - "MOV sp, %0 " : : "r" (topOfProcStack) : "memory" - ); - __set_CPSR(cpsr); - __ISB(); -} - -/** \brief Get FPEXC - \return Floating Point Exception Control register value - */ -__STATIC_FORCEINLINE uint32_t __get_FPEXC(void) -{ -#if (__FPU_PRESENT == 1) - uint32_t result; - __ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory"); - return(result); -#else - return(0); -#endif -} - -/** \brief Set FPEXC - \param [in] fpexc Floating Point Exception Control value to set - */ -__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc) -{ -#if (__FPU_PRESENT == 1) - __ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory"); -#endif -} - -/* - * Include common core functions to access Coprocessor 15 registers - */ - -#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" ) -#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" ) -#define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" ) -#define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" ) - -#include "cmsis_cp15.h" - -/** \brief Enable Floating Point Unit - - Critical section, called from undef handler, so systick is disabled - */ -__STATIC_INLINE void __FPU_Enable(void) -{ - __ASM volatile( - //Permit access to VFP/NEON, registers by modifying CPACR - " MRC p15,0,R1,c1,c0,2 \n" - " ORR R1,R1,#0x00F00000 \n" - " MCR p15,0,R1,c1,c0,2 \n" - - //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted - " ISB \n" - - //Enable VFP/NEON - " VMRS R1,FPEXC \n" - " ORR R1,R1,#0x40000000 \n" - " VMSR FPEXC,R1 \n" - - //Initialise VFP/NEON registers to 0 - " MOV R2,#0 \n" - - //Initialise D16 registers to 0 - " VMOV D0, R2,R2 \n" - " VMOV D1, R2,R2 \n" - " VMOV D2, R2,R2 \n" - " VMOV D3, R2,R2 \n" - " VMOV D4, R2,R2 \n" - " VMOV D5, R2,R2 \n" - " VMOV D6, R2,R2 \n" - " VMOV D7, R2,R2 \n" - " VMOV D8, R2,R2 \n" - " VMOV D9, R2,R2 \n" - " VMOV D10,R2,R2 \n" - " VMOV D11,R2,R2 \n" - " VMOV D12,R2,R2 \n" - " VMOV D13,R2,R2 \n" - " VMOV D14,R2,R2 \n" - " VMOV D15,R2,R2 \n" - -#if (defined(__ARM_NEON) && (__ARM_NEON == 1)) - //Initialise D32 registers to 0 - " VMOV D16,R2,R2 \n" - " VMOV D17,R2,R2 \n" - " VMOV D18,R2,R2 \n" - " VMOV D19,R2,R2 \n" - " VMOV D20,R2,R2 \n" - " VMOV D21,R2,R2 \n" - " VMOV D22,R2,R2 \n" - " VMOV D23,R2,R2 \n" - " VMOV D24,R2,R2 \n" - " VMOV D25,R2,R2 \n" - " VMOV D26,R2,R2 \n" - " VMOV D27,R2,R2 \n" - " VMOV D28,R2,R2 \n" - " VMOV D29,R2,R2 \n" - " VMOV D30,R2,R2 \n" - " VMOV D31,R2,R2 \n" -#endif - - //Initialise FPSCR to a known state - " VMRS R1,FPSCR \n" - " LDR R2,=0x00086060 \n" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero. - " AND R1,R1,R2 \n" - " VMSR FPSCR,R1 " - : : : "cc", "r1", "r2" - ); -} - -#pragma GCC diagnostic pop - -#endif /* __CMSIS_GCC_H */ diff --git a/Drivers/CMSIS/Core_A/Include/cmsis_iccarm.h b/Drivers/CMSIS/Core_A/Include/cmsis_iccarm.h deleted file mode 100644 index 5b345c6..0000000 --- a/Drivers/CMSIS/Core_A/Include/cmsis_iccarm.h +++ /dev/null @@ -1,573 +0,0 @@ -/**************************************************************************//** - * @file cmsis_iccarm.h - * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file - * @version V5.0.7 - * @date 15. May 2019 - ******************************************************************************/ - -//------------------------------------------------------------------------------ -// -// Copyright (c) 2017-2018 IAR Systems -// Copyright (c) 2018-2019 Arm Limited -// -// SPDX-License-Identifier: Apache-2.0 -// -// Licensed under the Apache License, Version 2.0 (the "License") -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. -// -//------------------------------------------------------------------------------ - - -#ifndef __CMSIS_ICCARM_H__ -#define __CMSIS_ICCARM_H__ - -#ifndef __ICCARM__ - #error This file should only be compiled by ICCARM -#endif - -#pragma system_include - -#define __IAR_FT _Pragma("inline=forced") __intrinsic - -#if (__VER__ >= 8000000) - #define __ICCARM_V8 1 -#else - #define __ICCARM_V8 0 -#endif - -#pragma language=extended - -#ifndef __ALIGNED - #if __ICCARM_V8 - #define __ALIGNED(x) __attribute__((aligned(x))) - #elif (__VER__ >= 7080000) - /* Needs IAR language extensions */ - #define __ALIGNED(x) __attribute__((aligned(x))) - #else - #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored. - #define __ALIGNED(x) - #endif -#endif - - -/* Define compiler macros for CPU architecture, used in CMSIS 5. - */ -#if __ARM_ARCH_7A__ -/* Macro already defined */ -#else - #if defined(__ARM7A__) - #define __ARM_ARCH_7A__ 1 - #endif -#endif - -#ifndef __ASM - #define __ASM __asm -#endif - -#ifndef __COMPILER_BARRIER - #define __COMPILER_BARRIER() __ASM volatile("":::"memory") -#endif - -#ifndef __INLINE - #define __INLINE inline -#endif - -#ifndef __NO_RETURN - #if __ICCARM_V8 - #define __NO_RETURN __attribute__((__noreturn__)) - #else - #define __NO_RETURN _Pragma("object_attribute=__noreturn") - #endif -#endif - -#ifndef __PACKED - /* Needs IAR language extensions */ - #if __ICCARM_V8 - #define __PACKED __attribute__((packed, aligned(1))) - #else - #define __PACKED __packed - #endif -#endif - -#ifndef __PACKED_STRUCT - /* Needs IAR language extensions */ - #if __ICCARM_V8 - #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) - #else - #define __PACKED_STRUCT __packed struct - #endif -#endif - -#ifndef __PACKED_UNION - /* Needs IAR language extensions */ - #if __ICCARM_V8 - #define __PACKED_UNION union __attribute__((packed, aligned(1))) - #else - #define __PACKED_UNION __packed union - #endif -#endif - -#ifndef __RESTRICT - #if __ICCARM_V8 - #define __RESTRICT __restrict - #else - /* Needs IAR language extensions */ - #define __RESTRICT restrict - #endif -#endif - -#ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline -#endif - -#ifndef __FORCEINLINE - #define __FORCEINLINE _Pragma("inline=forced") -#endif - -#ifndef __STATIC_FORCEINLINE - #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE -#endif - -#ifndef CMSIS_DEPRECATED - #define CMSIS_DEPRECATED __attribute__((deprecated)) -#endif - -#ifndef __UNALIGNED_UINT16_READ - #pragma language=save - #pragma language=extended - __IAR_FT uint16_t __iar_uint16_read(void const *ptr) - { - return *(__packed uint16_t*)(ptr); - } - #pragma language=restore - #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR) -#endif - - -#ifndef __UNALIGNED_UINT16_WRITE - #pragma language=save - #pragma language=extended - __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val) - { - *(__packed uint16_t*)(ptr) = val;; - } - #pragma language=restore - #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL) -#endif - -#ifndef __UNALIGNED_UINT32_READ - #pragma language=save - #pragma language=extended - __IAR_FT uint32_t __iar_uint32_read(void const *ptr) - { - return *(__packed uint32_t*)(ptr); - } - #pragma language=restore - #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR) -#endif - -#ifndef __UNALIGNED_UINT32_WRITE - #pragma language=save - #pragma language=extended - __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val) - { - *(__packed uint32_t*)(ptr) = val;; - } - #pragma language=restore - #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL) -#endif - -#if 0 -#ifndef __UNALIGNED_UINT32 /* deprecated */ - #pragma language=save - #pragma language=extended - __packed struct __iar_u32 { uint32_t v; }; - #pragma language=restore - #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v) -#endif -#endif - -#ifndef __USED - #if __ICCARM_V8 - #define __USED __attribute__((used)) - #else - #define __USED _Pragma("__root") - #endif -#endif - -#ifndef __WEAK - #if __ICCARM_V8 - #define __WEAK __attribute__((weak)) - #else - #define __WEAK _Pragma("__weak") - #endif -#endif - - -#ifndef __ICCARM_INTRINSICS_VERSION__ - #define __ICCARM_INTRINSICS_VERSION__ 0 -#endif - -#if __ICCARM_INTRINSICS_VERSION__ == 2 - - #if defined(__CLZ) - #undef __CLZ - #endif - #if defined(__REVSH) - #undef __REVSH - #endif - #if defined(__RBIT) - #undef __RBIT - #endif - #if defined(__SSAT) - #undef __SSAT - #endif - #if defined(__USAT) - #undef __USAT - #endif - - #include "iccarm_builtin.h" - - #define __enable_irq __iar_builtin_enable_interrupt - #define __disable_irq __iar_builtin_disable_interrupt - #define __enable_fault_irq __iar_builtin_enable_fiq - #define __disable_fault_irq __iar_builtin_disable_fiq - #define __arm_rsr __iar_builtin_rsr - #define __arm_wsr __iar_builtin_wsr - - #if __FPU_PRESENT - #define __get_FPSCR() (__arm_rsr("FPSCR")) - #else - #define __get_FPSCR() ( 0 ) - #endif - - #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", VALUE)) - - #define __get_CPSR() (__arm_rsr("CPSR")) - #define __get_mode() (__get_CPSR() & 0x1FU) - - #define __set_CPSR(VALUE) (__arm_wsr("CPSR", (VALUE))) - #define __set_mode(VALUE) (__arm_wsr("CPSR_c", (VALUE))) - - - #define __get_FPEXC() (__arm_rsr("FPEXC")) - #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", VALUE)) - - #define __get_CP(cp, op1, RT, CRn, CRm, op2) \ - ((RT) = __arm_rsr("p" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2)) - - #define __set_CP(cp, op1, RT, CRn, CRm, op2) \ - (__arm_wsr("p" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2, (RT))) - - #define __get_CP64(cp, op1, Rt, CRm) \ - __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" ) - - #define __set_CP64(cp, op1, Rt, CRm) \ - __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" ) - - #include "cmsis_cp15.h" - - #define __NOP __iar_builtin_no_operation - - #define __CLZ __iar_builtin_CLZ - #define __CLREX __iar_builtin_CLREX - - #define __DMB __iar_builtin_DMB - #define __DSB __iar_builtin_DSB - #define __ISB __iar_builtin_ISB - - #define __LDREXB __iar_builtin_LDREXB - #define __LDREXH __iar_builtin_LDREXH - #define __LDREXW __iar_builtin_LDREX - - #define __RBIT __iar_builtin_RBIT - #define __REV __iar_builtin_REV - #define __REV16 __iar_builtin_REV16 - - __IAR_FT int16_t __REVSH(int16_t val) - { - return (int16_t) __iar_builtin_REVSH(val); - } - - #define __ROR __iar_builtin_ROR - #define __RRX __iar_builtin_RRX - - #define __SEV __iar_builtin_SEV - - #define __SSAT __iar_builtin_SSAT - - #define __STREXB __iar_builtin_STREXB - #define __STREXH __iar_builtin_STREXH - #define __STREXW __iar_builtin_STREX - - #define __USAT __iar_builtin_USAT - - #define __WFE __iar_builtin_WFE - #define __WFI __iar_builtin_WFI - - #define __SADD8 __iar_builtin_SADD8 - #define __QADD8 __iar_builtin_QADD8 - #define __SHADD8 __iar_builtin_SHADD8 - #define __UADD8 __iar_builtin_UADD8 - #define __UQADD8 __iar_builtin_UQADD8 - #define __UHADD8 __iar_builtin_UHADD8 - #define __SSUB8 __iar_builtin_SSUB8 - #define __QSUB8 __iar_builtin_QSUB8 - #define __SHSUB8 __iar_builtin_SHSUB8 - #define __USUB8 __iar_builtin_USUB8 - #define __UQSUB8 __iar_builtin_UQSUB8 - #define __UHSUB8 __iar_builtin_UHSUB8 - #define __SADD16 __iar_builtin_SADD16 - #define __QADD16 __iar_builtin_QADD16 - #define __SHADD16 __iar_builtin_SHADD16 - #define __UADD16 __iar_builtin_UADD16 - #define __UQADD16 __iar_builtin_UQADD16 - #define __UHADD16 __iar_builtin_UHADD16 - #define __SSUB16 __iar_builtin_SSUB16 - #define __QSUB16 __iar_builtin_QSUB16 - #define __SHSUB16 __iar_builtin_SHSUB16 - #define __USUB16 __iar_builtin_USUB16 - #define __UQSUB16 __iar_builtin_UQSUB16 - #define __UHSUB16 __iar_builtin_UHSUB16 - #define __SASX __iar_builtin_SASX - #define __QASX __iar_builtin_QASX - #define __SHASX __iar_builtin_SHASX - #define __UASX __iar_builtin_UASX - #define __UQASX __iar_builtin_UQASX - #define __UHASX __iar_builtin_UHASX - #define __SSAX __iar_builtin_SSAX - #define __QSAX __iar_builtin_QSAX - #define __SHSAX __iar_builtin_SHSAX - #define __USAX __iar_builtin_USAX - #define __UQSAX __iar_builtin_UQSAX - #define __UHSAX __iar_builtin_UHSAX - #define __USAD8 __iar_builtin_USAD8 - #define __USADA8 __iar_builtin_USADA8 - #define __SSAT16 __iar_builtin_SSAT16 - #define __USAT16 __iar_builtin_USAT16 - #define __UXTB16 __iar_builtin_UXTB16 - #define __UXTAB16 __iar_builtin_UXTAB16 - #define __SXTB16 __iar_builtin_SXTB16 - #define __SXTAB16 __iar_builtin_SXTAB16 - #define __SMUAD __iar_builtin_SMUAD - #define __SMUADX __iar_builtin_SMUADX - #define __SMMLA __iar_builtin_SMMLA - #define __SMLAD __iar_builtin_SMLAD - #define __SMLADX __iar_builtin_SMLADX - #define __SMLALD __iar_builtin_SMLALD - #define __SMLALDX __iar_builtin_SMLALDX - #define __SMUSD __iar_builtin_SMUSD - #define __SMUSDX __iar_builtin_SMUSDX - #define __SMLSD __iar_builtin_SMLSD - #define __SMLSDX __iar_builtin_SMLSDX - #define __SMLSLD __iar_builtin_SMLSLD - #define __SMLSLDX __iar_builtin_SMLSLDX - #define __SEL __iar_builtin_SEL - #define __QADD __iar_builtin_QADD - #define __QSUB __iar_builtin_QSUB - #define __PKHBT __iar_builtin_PKHBT - #define __PKHTB __iar_builtin_PKHTB - -#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */ - - #if !__FPU_PRESENT - #define __get_FPSCR __cmsis_iar_get_FPSR_not_active - #endif - - #ifdef __INTRINSICS_INCLUDED - #error intrinsics.h is already included previously! - #endif - - #include - - #if !__FPU_PRESENT - #define __get_FPSCR() (0) - #endif - - #pragma diag_suppress=Pe940 - #pragma diag_suppress=Pe177 - - #define __enable_irq __enable_interrupt - #define __disable_irq __disable_interrupt - #define __enable_fault_irq __enable_fiq - #define __disable_fault_irq __disable_fiq - #define __NOP __no_operation - - #define __get_xPSR __get_PSR - - __IAR_FT void __set_mode(uint32_t mode) - { - __ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory"); - } - - __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr) - { - return __LDREX((unsigned long *)ptr); - } - - __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) - { - return __STREX(value, (unsigned long *)ptr); - } - - - __IAR_FT uint32_t __RRX(uint32_t value) - { - uint32_t result; - __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc"); - return(result); - } - - - __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) - { - return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2)); - } - - __IAR_FT uint32_t __get_FPEXC(void) - { - #if (__FPU_PRESENT == 1) - uint32_t result; - __ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory"); - return(result); - #else - return(0); - #endif - } - - __IAR_FT void __set_FPEXC(uint32_t fpexc) - { - #if (__FPU_PRESENT == 1) - __ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory"); - #endif - } - - - #define __get_CP(cp, op1, Rt, CRn, CRm, op2) \ - __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" ) - #define __set_CP(cp, op1, Rt, CRn, CRm, op2) \ - __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" ) - #define __get_CP64(cp, op1, Rt, CRm) \ - __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" ) - #define __set_CP64(cp, op1, Rt, CRm) \ - __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" ) - - #include "cmsis_cp15.h" - -#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */ - -#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value)) - - -__IAR_FT uint32_t __get_SP_usr(void) -{ - uint32_t cpsr; - uint32_t result; - __ASM volatile( - "MRS %0, cpsr \n" - "CPS #0x1F \n" // no effect in USR mode - "MOV %1, sp \n" - "MSR cpsr_c, %2 \n" // no effect in USR mode - "ISB" : "=r"(cpsr), "=r"(result) : "r"(cpsr) : "memory" - ); - return result; -} - -__IAR_FT void __set_SP_usr(uint32_t topOfProcStack) -{ - uint32_t cpsr; - __ASM volatile( - "MRS %0, cpsr \n" - "CPS #0x1F \n" // no effect in USR mode - "MOV sp, %1 \n" - "MSR cpsr_c, %2 \n" // no effect in USR mode - "ISB" : "=r"(cpsr) : "r" (topOfProcStack), "r"(cpsr) : "memory" - ); -} - -#define __get_mode() (__get_CPSR() & 0x1FU) - -__STATIC_INLINE -void __FPU_Enable(void) -{ - __ASM volatile( - //Permit access to VFP/NEON, registers by modifying CPACR - " MRC p15,0,R1,c1,c0,2 \n" - " ORR R1,R1,#0x00F00000 \n" - " MCR p15,0,R1,c1,c0,2 \n" - - //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted - " ISB \n" - - //Enable VFP/NEON - " VMRS R1,FPEXC \n" - " ORR R1,R1,#0x40000000 \n" - " VMSR FPEXC,R1 \n" - - //Initialise VFP/NEON registers to 0 - " MOV R2,#0 \n" - - //Initialise D16 registers to 0 - " VMOV D0, R2,R2 \n" - " VMOV D1, R2,R2 \n" - " VMOV D2, R2,R2 \n" - " VMOV D3, R2,R2 \n" - " VMOV D4, R2,R2 \n" - " VMOV D5, R2,R2 \n" - " VMOV D6, R2,R2 \n" - " VMOV D7, R2,R2 \n" - " VMOV D8, R2,R2 \n" - " VMOV D9, R2,R2 \n" - " VMOV D10,R2,R2 \n" - " VMOV D11,R2,R2 \n" - " VMOV D12,R2,R2 \n" - " VMOV D13,R2,R2 \n" - " VMOV D14,R2,R2 \n" - " VMOV D15,R2,R2 \n" - -#ifdef __ARM_ADVANCED_SIMD__ - //Initialise D32 registers to 0 - " VMOV D16,R2,R2 \n" - " VMOV D17,R2,R2 \n" - " VMOV D18,R2,R2 \n" - " VMOV D19,R2,R2 \n" - " VMOV D20,R2,R2 \n" - " VMOV D21,R2,R2 \n" - " VMOV D22,R2,R2 \n" - " VMOV D23,R2,R2 \n" - " VMOV D24,R2,R2 \n" - " VMOV D25,R2,R2 \n" - " VMOV D26,R2,R2 \n" - " VMOV D27,R2,R2 \n" - " VMOV D28,R2,R2 \n" - " VMOV D29,R2,R2 \n" - " VMOV D30,R2,R2 \n" - " VMOV D31,R2,R2 \n" -#endif - - //Initialise FPSCR to a known state - " VMRS R1,FPSCR \n" - " MOV32 R2,#0x00086060 \n" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero. - " AND R1,R1,R2 \n" - " VMSR FPSCR,R1 \n" - : : : "cc", "r1", "r2" - ); -} - - - -#undef __IAR_FT -#undef __ICCARM_V8 - -#pragma diag_default=Pe940 -#pragma diag_default=Pe177 - -#endif /* __CMSIS_ICCARM_H__ */ diff --git a/Drivers/CMSIS/Core_A/Include/core_ca.h b/Drivers/CMSIS/Core_A/Include/core_ca.h deleted file mode 100644 index 15ada25..0000000 --- a/Drivers/CMSIS/Core_A/Include/core_ca.h +++ /dev/null @@ -1,2614 +0,0 @@ -/**************************************************************************//** - * @file core_ca.h - * @brief CMSIS Cortex-A Core Peripheral Access Layer Header File - * @version V1.0.3 - * @date 28. January 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CA_H_GENERIC -#define __CORE_CA_H_GENERIC - -#ifdef __cplusplus - extern "C" { -#endif - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ - -/* CMSIS CA definitions */ -#define __CA_CMSIS_VERSION_MAIN (1U) /*!< \brief [31:16] CMSIS-Core(A) main version */ -#define __CA_CMSIS_VERSION_SUB (1U) /*!< \brief [15:0] CMSIS-Core(A) sub version */ -#define __CA_CMSIS_VERSION ((__CA_CMSIS_VERSION_MAIN << 16U) | \ - __CA_CMSIS_VERSION_SUB ) /*!< \brief CMSIS-Core(A) version number */ - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #if (__FPU_PRESENT == 1) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if (__FPU_PRESENT == 1) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #if (__FPU_PRESENT == 1) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if (__FPU_PRESENT == 1) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if (__FPU_PRESENT == 1) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif -#endif - -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CA_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CA_H_DEPENDANT -#define __CORE_CA_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - - /* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CA_REV - #define __CA_REV 0x0000U - #warning "__CA_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __GIC_PRESENT - #define __GIC_PRESENT 1U - #warning "__GIC_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __TIM_PRESENT - #define __TIM_PRESENT 1U - #warning "__TIM_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __L2C_PRESENT - #define __L2C_PRESENT 0U - #warning "__L2C_PRESENT not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -#ifdef __cplusplus - #define __I volatile /*!< \brief Defines 'read only' permissions */ -#else - #define __I volatile const /*!< \brief Defines 'read only' permissions */ -#endif -#define __O volatile /*!< \brief Defines 'write only' permissions */ -#define __IO volatile /*!< \brief Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*!< \brief Defines 'read only' structure member permissions */ -#define __OM volatile /*!< \brief Defines 'write only' structure member permissions */ -#define __IOM volatile /*!< \brief Defines 'read / write' structure member permissions */ -#define RESERVED(N, T) T RESERVED##N; // placeholder struct members used for "reserved" areas - - /******************************************************************************* - * Register Abstraction - Core Register contain: - - CPSR - - CP15 Registers - - L2C-310 Cache Controller - - Generic Interrupt Controller Distributor - - Generic Interrupt Controller Interface - ******************************************************************************/ - -/* Core Register CPSR */ -typedef union -{ - struct - { - uint32_t M:5; /*!< \brief bit: 0.. 4 Mode field */ - uint32_t T:1; /*!< \brief bit: 5 Thumb execution state bit */ - uint32_t F:1; /*!< \brief bit: 6 FIQ mask bit */ - uint32_t I:1; /*!< \brief bit: 7 IRQ mask bit */ - uint32_t A:1; /*!< \brief bit: 8 Asynchronous abort mask bit */ - uint32_t E:1; /*!< \brief bit: 9 Endianness execution state bit */ - uint32_t IT1:6; /*!< \brief bit: 10..15 If-Then execution state bits 2-7 */ - uint32_t GE:4; /*!< \brief bit: 16..19 Greater than or Equal flags */ - RESERVED(0:4, uint32_t) - uint32_t J:1; /*!< \brief bit: 24 Jazelle bit */ - uint32_t IT0:2; /*!< \brief bit: 25..26 If-Then execution state bits 0-1 */ - uint32_t Q:1; /*!< \brief bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< \brief bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< \brief bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< \brief bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< \brief bit: 31 Negative condition code flag */ - } b; /*!< \brief Structure used for bit access */ - uint32_t w; /*!< \brief Type used for word access */ -} CPSR_Type; - - - -/* CPSR Register Definitions */ -#define CPSR_N_Pos 31U /*!< \brief CPSR: N Position */ -#define CPSR_N_Msk (1UL << CPSR_N_Pos) /*!< \brief CPSR: N Mask */ - -#define CPSR_Z_Pos 30U /*!< \brief CPSR: Z Position */ -#define CPSR_Z_Msk (1UL << CPSR_Z_Pos) /*!< \brief CPSR: Z Mask */ - -#define CPSR_C_Pos 29U /*!< \brief CPSR: C Position */ -#define CPSR_C_Msk (1UL << CPSR_C_Pos) /*!< \brief CPSR: C Mask */ - -#define CPSR_V_Pos 28U /*!< \brief CPSR: V Position */ -#define CPSR_V_Msk (1UL << CPSR_V_Pos) /*!< \brief CPSR: V Mask */ - -#define CPSR_Q_Pos 27U /*!< \brief CPSR: Q Position */ -#define CPSR_Q_Msk (1UL << CPSR_Q_Pos) /*!< \brief CPSR: Q Mask */ - -#define CPSR_IT0_Pos 25U /*!< \brief CPSR: IT0 Position */ -#define CPSR_IT0_Msk (3UL << CPSR_IT0_Pos) /*!< \brief CPSR: IT0 Mask */ - -#define CPSR_J_Pos 24U /*!< \brief CPSR: J Position */ -#define CPSR_J_Msk (1UL << CPSR_J_Pos) /*!< \brief CPSR: J Mask */ - -#define CPSR_GE_Pos 16U /*!< \brief CPSR: GE Position */ -#define CPSR_GE_Msk (0xFUL << CPSR_GE_Pos) /*!< \brief CPSR: GE Mask */ - -#define CPSR_IT1_Pos 10U /*!< \brief CPSR: IT1 Position */ -#define CPSR_IT1_Msk (0x3FUL << CPSR_IT1_Pos) /*!< \brief CPSR: IT1 Mask */ - -#define CPSR_E_Pos 9U /*!< \brief CPSR: E Position */ -#define CPSR_E_Msk (1UL << CPSR_E_Pos) /*!< \brief CPSR: E Mask */ - -#define CPSR_A_Pos 8U /*!< \brief CPSR: A Position */ -#define CPSR_A_Msk (1UL << CPSR_A_Pos) /*!< \brief CPSR: A Mask */ - -#define CPSR_I_Pos 7U /*!< \brief CPSR: I Position */ -#define CPSR_I_Msk (1UL << CPSR_I_Pos) /*!< \brief CPSR: I Mask */ - -#define CPSR_F_Pos 6U /*!< \brief CPSR: F Position */ -#define CPSR_F_Msk (1UL << CPSR_F_Pos) /*!< \brief CPSR: F Mask */ - -#define CPSR_T_Pos 5U /*!< \brief CPSR: T Position */ -#define CPSR_T_Msk (1UL << CPSR_T_Pos) /*!< \brief CPSR: T Mask */ - -#define CPSR_M_Pos 0U /*!< \brief CPSR: M Position */ -#define CPSR_M_Msk (0x1FUL << CPSR_M_Pos) /*!< \brief CPSR: M Mask */ - -#define CPSR_M_USR 0x10U /*!< \brief CPSR: M User mode (PL0) */ -#define CPSR_M_FIQ 0x11U /*!< \brief CPSR: M Fast Interrupt mode (PL1) */ -#define CPSR_M_IRQ 0x12U /*!< \brief CPSR: M Interrupt mode (PL1) */ -#define CPSR_M_SVC 0x13U /*!< \brief CPSR: M Supervisor mode (PL1) */ -#define CPSR_M_MON 0x16U /*!< \brief CPSR: M Monitor mode (PL1) */ -#define CPSR_M_ABT 0x17U /*!< \brief CPSR: M Abort mode (PL1) */ -#define CPSR_M_HYP 0x1AU /*!< \brief CPSR: M Hypervisor mode (PL2) */ -#define CPSR_M_UND 0x1BU /*!< \brief CPSR: M Undefined mode (PL1) */ -#define CPSR_M_SYS 0x1FU /*!< \brief CPSR: M System mode (PL1) */ - -/* CP15 Register SCTLR */ -typedef union -{ - struct - { - uint32_t M:1; /*!< \brief bit: 0 MMU enable */ - uint32_t A:1; /*!< \brief bit: 1 Alignment check enable */ - uint32_t C:1; /*!< \brief bit: 2 Cache enable */ - RESERVED(0:2, uint32_t) - uint32_t CP15BEN:1; /*!< \brief bit: 5 CP15 barrier enable */ - RESERVED(1:1, uint32_t) - uint32_t B:1; /*!< \brief bit: 7 Endianness model */ - RESERVED(2:2, uint32_t) - uint32_t SW:1; /*!< \brief bit: 10 SWP and SWPB enable */ - uint32_t Z:1; /*!< \brief bit: 11 Branch prediction enable */ - uint32_t I:1; /*!< \brief bit: 12 Instruction cache enable */ - uint32_t V:1; /*!< \brief bit: 13 Vectors bit */ - uint32_t RR:1; /*!< \brief bit: 14 Round Robin select */ - RESERVED(3:2, uint32_t) - uint32_t HA:1; /*!< \brief bit: 17 Hardware Access flag enable */ - RESERVED(4:1, uint32_t) - uint32_t WXN:1; /*!< \brief bit: 19 Write permission implies XN */ - uint32_t UWXN:1; /*!< \brief bit: 20 Unprivileged write permission implies PL1 XN */ - uint32_t FI:1; /*!< \brief bit: 21 Fast interrupts configuration enable */ - uint32_t U:1; /*!< \brief bit: 22 Alignment model */ - RESERVED(5:1, uint32_t) - uint32_t VE:1; /*!< \brief bit: 24 Interrupt Vectors Enable */ - uint32_t EE:1; /*!< \brief bit: 25 Exception Endianness */ - RESERVED(6:1, uint32_t) - uint32_t NMFI:1; /*!< \brief bit: 27 Non-maskable FIQ (NMFI) support */ - uint32_t TRE:1; /*!< \brief bit: 28 TEX remap enable. */ - uint32_t AFE:1; /*!< \brief bit: 29 Access flag enable */ - uint32_t TE:1; /*!< \brief bit: 30 Thumb Exception enable */ - RESERVED(7:1, uint32_t) - } b; /*!< \brief Structure used for bit access */ - uint32_t w; /*!< \brief Type used for word access */ -} SCTLR_Type; - -#define SCTLR_TE_Pos 30U /*!< \brief SCTLR: TE Position */ -#define SCTLR_TE_Msk (1UL << SCTLR_TE_Pos) /*!< \brief SCTLR: TE Mask */ - -#define SCTLR_AFE_Pos 29U /*!< \brief SCTLR: AFE Position */ -#define SCTLR_AFE_Msk (1UL << SCTLR_AFE_Pos) /*!< \brief SCTLR: AFE Mask */ - -#define SCTLR_TRE_Pos 28U /*!< \brief SCTLR: TRE Position */ -#define SCTLR_TRE_Msk (1UL << SCTLR_TRE_Pos) /*!< \brief SCTLR: TRE Mask */ - -#define SCTLR_NMFI_Pos 27U /*!< \brief SCTLR: NMFI Position */ -#define SCTLR_NMFI_Msk (1UL << SCTLR_NMFI_Pos) /*!< \brief SCTLR: NMFI Mask */ - -#define SCTLR_EE_Pos 25U /*!< \brief SCTLR: EE Position */ -#define SCTLR_EE_Msk (1UL << SCTLR_EE_Pos) /*!< \brief SCTLR: EE Mask */ - -#define SCTLR_VE_Pos 24U /*!< \brief SCTLR: VE Position */ -#define SCTLR_VE_Msk (1UL << SCTLR_VE_Pos) /*!< \brief SCTLR: VE Mask */ - -#define SCTLR_U_Pos 22U /*!< \brief SCTLR: U Position */ -#define SCTLR_U_Msk (1UL << SCTLR_U_Pos) /*!< \brief SCTLR: U Mask */ - -#define SCTLR_FI_Pos 21U /*!< \brief SCTLR: FI Position */ -#define SCTLR_FI_Msk (1UL << SCTLR_FI_Pos) /*!< \brief SCTLR: FI Mask */ - -#define SCTLR_UWXN_Pos 20U /*!< \brief SCTLR: UWXN Position */ -#define SCTLR_UWXN_Msk (1UL << SCTLR_UWXN_Pos) /*!< \brief SCTLR: UWXN Mask */ - -#define SCTLR_WXN_Pos 19U /*!< \brief SCTLR: WXN Position */ -#define SCTLR_WXN_Msk (1UL << SCTLR_WXN_Pos) /*!< \brief SCTLR: WXN Mask */ - -#define SCTLR_HA_Pos 17U /*!< \brief SCTLR: HA Position */ -#define SCTLR_HA_Msk (1UL << SCTLR_HA_Pos) /*!< \brief SCTLR: HA Mask */ - -#define SCTLR_RR_Pos 14U /*!< \brief SCTLR: RR Position */ -#define SCTLR_RR_Msk (1UL << SCTLR_RR_Pos) /*!< \brief SCTLR: RR Mask */ - -#define SCTLR_V_Pos 13U /*!< \brief SCTLR: V Position */ -#define SCTLR_V_Msk (1UL << SCTLR_V_Pos) /*!< \brief SCTLR: V Mask */ - -#define SCTLR_I_Pos 12U /*!< \brief SCTLR: I Position */ -#define SCTLR_I_Msk (1UL << SCTLR_I_Pos) /*!< \brief SCTLR: I Mask */ - -#define SCTLR_Z_Pos 11U /*!< \brief SCTLR: Z Position */ -#define SCTLR_Z_Msk (1UL << SCTLR_Z_Pos) /*!< \brief SCTLR: Z Mask */ - -#define SCTLR_SW_Pos 10U /*!< \brief SCTLR: SW Position */ -#define SCTLR_SW_Msk (1UL << SCTLR_SW_Pos) /*!< \brief SCTLR: SW Mask */ - -#define SCTLR_B_Pos 7U /*!< \brief SCTLR: B Position */ -#define SCTLR_B_Msk (1UL << SCTLR_B_Pos) /*!< \brief SCTLR: B Mask */ - -#define SCTLR_CP15BEN_Pos 5U /*!< \brief SCTLR: CP15BEN Position */ -#define SCTLR_CP15BEN_Msk (1UL << SCTLR_CP15BEN_Pos) /*!< \brief SCTLR: CP15BEN Mask */ - -#define SCTLR_C_Pos 2U /*!< \brief SCTLR: C Position */ -#define SCTLR_C_Msk (1UL << SCTLR_C_Pos) /*!< \brief SCTLR: C Mask */ - -#define SCTLR_A_Pos 1U /*!< \brief SCTLR: A Position */ -#define SCTLR_A_Msk (1UL << SCTLR_A_Pos) /*!< \brief SCTLR: A Mask */ - -#define SCTLR_M_Pos 0U /*!< \brief SCTLR: M Position */ -#define SCTLR_M_Msk (1UL << SCTLR_M_Pos) /*!< \brief SCTLR: M Mask */ - -/* CP15 Register ACTLR */ -typedef union -{ -#if __CORTEX_A == 5 || defined(DOXYGEN) - /** \brief Structure used for bit access on Cortex-A5 */ - struct - { - uint32_t FW:1; /*!< \brief bit: 0 Cache and TLB maintenance broadcast */ - RESERVED(0:5, uint32_t) - uint32_t SMP:1; /*!< \brief bit: 6 Enables coherent requests to the processor */ - uint32_t EXCL:1; /*!< \brief bit: 7 Exclusive L1/L2 cache control */ - RESERVED(1:2, uint32_t) - uint32_t DODMBS:1; /*!< \brief bit: 10 Disable optimized data memory barrier behavior */ - uint32_t DWBST:1; /*!< \brief bit: 11 AXI data write bursts to Normal memory */ - uint32_t RADIS:1; /*!< \brief bit: 12 L1 Data Cache read-allocate mode disable */ - uint32_t L1PCTL:2; /*!< \brief bit:13..14 L1 Data prefetch control */ - uint32_t BP:2; /*!< \brief bit:16..15 Branch prediction policy */ - uint32_t RSDIS:1; /*!< \brief bit: 17 Disable return stack operation */ - uint32_t BTDIS:1; /*!< \brief bit: 18 Disable indirect Branch Target Address Cache (BTAC) */ - RESERVED(3:9, uint32_t) - uint32_t DBDI:1; /*!< \brief bit: 28 Disable branch dual issue */ - RESERVED(7:3, uint32_t) - } b; -#endif -#if __CORTEX_A == 7 || defined(DOXYGEN) - /** \brief Structure used for bit access on Cortex-A7 */ - struct - { - RESERVED(0:6, uint32_t) - uint32_t SMP:1; /*!< \brief bit: 6 Enables coherent requests to the processor */ - RESERVED(1:3, uint32_t) - uint32_t DODMBS:1; /*!< \brief bit: 10 Disable optimized data memory barrier behavior */ - uint32_t L2RADIS:1; /*!< \brief bit: 11 L2 Data Cache read-allocate mode disable */ - uint32_t L1RADIS:1; /*!< \brief bit: 12 L1 Data Cache read-allocate mode disable */ - uint32_t L1PCTL:2; /*!< \brief bit:13..14 L1 Data prefetch control */ - uint32_t DDVM:1; /*!< \brief bit: 15 Disable Distributed Virtual Memory (DVM) transactions */ - RESERVED(3:12, uint32_t) - uint32_t DDI:1; /*!< \brief bit: 28 Disable dual issue */ - RESERVED(7:3, uint32_t) - } b; -#endif -#if __CORTEX_A == 9 || defined(DOXYGEN) - /** \brief Structure used for bit access on Cortex-A9 */ - struct - { - uint32_t FW:1; /*!< \brief bit: 0 Cache and TLB maintenance broadcast */ - RESERVED(0:1, uint32_t) - uint32_t L1PE:1; /*!< \brief bit: 2 Dside prefetch */ - uint32_t WFLZM:1; /*!< \brief bit: 3 Cache and TLB maintenance broadcast */ - RESERVED(1:2, uint32_t) - uint32_t SMP:1; /*!< \brief bit: 6 Enables coherent requests to the processor */ - uint32_t EXCL:1; /*!< \brief bit: 7 Exclusive L1/L2 cache control */ - uint32_t AOW:1; /*!< \brief bit: 8 Enable allocation in one cache way only */ - uint32_t PARITY:1; /*!< \brief bit: 9 Support for parity checking, if implemented */ - RESERVED(7:22, uint32_t) - } b; -#endif - uint32_t w; /*!< \brief Type used for word access */ -} ACTLR_Type; - -#define ACTLR_DDI_Pos 28U /*!< \brief ACTLR: DDI Position */ -#define ACTLR_DDI_Msk (1UL << ACTLR_DDI_Pos) /*!< \brief ACTLR: DDI Mask */ - -#define ACTLR_DBDI_Pos 28U /*!< \brief ACTLR: DBDI Position */ -#define ACTLR_DBDI_Msk (1UL << ACTLR_DBDI_Pos) /*!< \brief ACTLR: DBDI Mask */ - -#define ACTLR_BTDIS_Pos 18U /*!< \brief ACTLR: BTDIS Position */ -#define ACTLR_BTDIS_Msk (1UL << ACTLR_BTDIS_Pos) /*!< \brief ACTLR: BTDIS Mask */ - -#define ACTLR_RSDIS_Pos 17U /*!< \brief ACTLR: RSDIS Position */ -#define ACTLR_RSDIS_Msk (1UL << ACTLR_RSDIS_Pos) /*!< \brief ACTLR: RSDIS Mask */ - -#define ACTLR_BP_Pos 15U /*!< \brief ACTLR: BP Position */ -#define ACTLR_BP_Msk (3UL << ACTLR_BP_Pos) /*!< \brief ACTLR: BP Mask */ - -#define ACTLR_DDVM_Pos 15U /*!< \brief ACTLR: DDVM Position */ -#define ACTLR_DDVM_Msk (1UL << ACTLR_DDVM_Pos) /*!< \brief ACTLR: DDVM Mask */ - -#define ACTLR_L1PCTL_Pos 13U /*!< \brief ACTLR: L1PCTL Position */ -#define ACTLR_L1PCTL_Msk (3UL << ACTLR_L1PCTL_Pos) /*!< \brief ACTLR: L1PCTL Mask */ - -#define ACTLR_RADIS_Pos 12U /*!< \brief ACTLR: RADIS Position */ -#define ACTLR_RADIS_Msk (1UL << ACTLR_RADIS_Pos) /*!< \brief ACTLR: RADIS Mask */ - -#define ACTLR_L1RADIS_Pos 12U /*!< \brief ACTLR: L1RADIS Position */ -#define ACTLR_L1RADIS_Msk (1UL << ACTLR_L1RADIS_Pos) /*!< \brief ACTLR: L1RADIS Mask */ - -#define ACTLR_DWBST_Pos 11U /*!< \brief ACTLR: DWBST Position */ -#define ACTLR_DWBST_Msk (1UL << ACTLR_DWBST_Pos) /*!< \brief ACTLR: DWBST Mask */ - -#define ACTLR_L2RADIS_Pos 11U /*!< \brief ACTLR: L2RADIS Position */ -#define ACTLR_L2RADIS_Msk (1UL << ACTLR_L2RADIS_Pos) /*!< \brief ACTLR: L2RADIS Mask */ - -#define ACTLR_DODMBS_Pos 10U /*!< \brief ACTLR: DODMBS Position */ -#define ACTLR_DODMBS_Msk (1UL << ACTLR_DODMBS_Pos) /*!< \brief ACTLR: DODMBS Mask */ - -#define ACTLR_PARITY_Pos 9U /*!< \brief ACTLR: PARITY Position */ -#define ACTLR_PARITY_Msk (1UL << ACTLR_PARITY_Pos) /*!< \brief ACTLR: PARITY Mask */ - -#define ACTLR_AOW_Pos 8U /*!< \brief ACTLR: AOW Position */ -#define ACTLR_AOW_Msk (1UL << ACTLR_AOW_Pos) /*!< \brief ACTLR: AOW Mask */ - -#define ACTLR_EXCL_Pos 7U /*!< \brief ACTLR: EXCL Position */ -#define ACTLR_EXCL_Msk (1UL << ACTLR_EXCL_Pos) /*!< \brief ACTLR: EXCL Mask */ - -#define ACTLR_SMP_Pos 6U /*!< \brief ACTLR: SMP Position */ -#define ACTLR_SMP_Msk (1UL << ACTLR_SMP_Pos) /*!< \brief ACTLR: SMP Mask */ - -#define ACTLR_WFLZM_Pos 3U /*!< \brief ACTLR: WFLZM Position */ -#define ACTLR_WFLZM_Msk (1UL << ACTLR_WFLZM_Pos) /*!< \brief ACTLR: WFLZM Mask */ - -#define ACTLR_L1PE_Pos 2U /*!< \brief ACTLR: L1PE Position */ -#define ACTLR_L1PE_Msk (1UL << ACTLR_L1PE_Pos) /*!< \brief ACTLR: L1PE Mask */ - -#define ACTLR_FW_Pos 0U /*!< \brief ACTLR: FW Position */ -#define ACTLR_FW_Msk (1UL << ACTLR_FW_Pos) /*!< \brief ACTLR: FW Mask */ - -/* CP15 Register CPACR */ -typedef union -{ - struct - { - uint32_t CP0:2; /*!< \brief bit: 0..1 Access rights for coprocessor 0 */ - uint32_t CP1:2; /*!< \brief bit: 2..3 Access rights for coprocessor 1 */ - uint32_t CP2:2; /*!< \brief bit: 4..5 Access rights for coprocessor 2 */ - uint32_t CP3:2; /*!< \brief bit: 6..7 Access rights for coprocessor 3 */ - uint32_t CP4:2; /*!< \brief bit: 8..9 Access rights for coprocessor 4 */ - uint32_t CP5:2; /*!< \brief bit:10..11 Access rights for coprocessor 5 */ - uint32_t CP6:2; /*!< \brief bit:12..13 Access rights for coprocessor 6 */ - uint32_t CP7:2; /*!< \brief bit:14..15 Access rights for coprocessor 7 */ - uint32_t CP8:2; /*!< \brief bit:16..17 Access rights for coprocessor 8 */ - uint32_t CP9:2; /*!< \brief bit:18..19 Access rights for coprocessor 9 */ - uint32_t CP10:2; /*!< \brief bit:20..21 Access rights for coprocessor 10 */ - uint32_t CP11:2; /*!< \brief bit:22..23 Access rights for coprocessor 11 */ - uint32_t CP12:2; /*!< \brief bit:24..25 Access rights for coprocessor 11 */ - uint32_t CP13:2; /*!< \brief bit:26..27 Access rights for coprocessor 11 */ - uint32_t TRCDIS:1; /*!< \brief bit: 28 Disable CP14 access to trace registers */ - RESERVED(0:1, uint32_t) - uint32_t D32DIS:1; /*!< \brief bit: 30 Disable use of registers D16-D31 of the VFP register file */ - uint32_t ASEDIS:1; /*!< \brief bit: 31 Disable Advanced SIMD Functionality */ - } b; /*!< \brief Structure used for bit access */ - uint32_t w; /*!< \brief Type used for word access */ -} CPACR_Type; - -#define CPACR_ASEDIS_Pos 31U /*!< \brief CPACR: ASEDIS Position */ -#define CPACR_ASEDIS_Msk (1UL << CPACR_ASEDIS_Pos) /*!< \brief CPACR: ASEDIS Mask */ - -#define CPACR_D32DIS_Pos 30U /*!< \brief CPACR: D32DIS Position */ -#define CPACR_D32DIS_Msk (1UL << CPACR_D32DIS_Pos) /*!< \brief CPACR: D32DIS Mask */ - -#define CPACR_TRCDIS_Pos 28U /*!< \brief CPACR: D32DIS Position */ -#define CPACR_TRCDIS_Msk (1UL << CPACR_D32DIS_Pos) /*!< \brief CPACR: D32DIS Mask */ - -#define CPACR_CP_Pos_(n) (n*2U) /*!< \brief CPACR: CPn Position */ -#define CPACR_CP_Msk_(n) (3UL << CPACR_CP_Pos_(n)) /*!< \brief CPACR: CPn Mask */ - -#define CPACR_CP_NA 0U /*!< \brief CPACR CPn field: Access denied. */ -#define CPACR_CP_PL1 1U /*!< \brief CPACR CPn field: Accessible from PL1 only. */ -#define CPACR_CP_FA 3U /*!< \brief CPACR CPn field: Full access. */ - -/* CP15 Register DFSR */ -typedef union -{ - struct - { - uint32_t FS0:4; /*!< \brief bit: 0.. 3 Fault Status bits bit 0-3 */ - uint32_t Domain:4; /*!< \brief bit: 4.. 7 Fault on which domain */ - RESERVED(0:1, uint32_t) - uint32_t LPAE:1; /*!< \brief bit: 9 Large Physical Address Extension */ - uint32_t FS1:1; /*!< \brief bit: 10 Fault Status bits bit 4 */ - uint32_t WnR:1; /*!< \brief bit: 11 Write not Read bit */ - uint32_t ExT:1; /*!< \brief bit: 12 External abort type */ - uint32_t CM:1; /*!< \brief bit: 13 Cache maintenance fault */ - RESERVED(1:18, uint32_t) - } s; /*!< \brief Structure used for bit access in short format */ - struct - { - uint32_t STATUS:5; /*!< \brief bit: 0.. 5 Fault Status bits */ - RESERVED(0:3, uint32_t) - uint32_t LPAE:1; /*!< \brief bit: 9 Large Physical Address Extension */ - RESERVED(1:1, uint32_t) - uint32_t WnR:1; /*!< \brief bit: 11 Write not Read bit */ - uint32_t ExT:1; /*!< \brief bit: 12 External abort type */ - uint32_t CM:1; /*!< \brief bit: 13 Cache maintenance fault */ - RESERVED(2:18, uint32_t) - } l; /*!< \brief Structure used for bit access in long format */ - uint32_t w; /*!< \brief Type used for word access */ -} DFSR_Type; - -#define DFSR_CM_Pos 13U /*!< \brief DFSR: CM Position */ -#define DFSR_CM_Msk (1UL << DFSR_CM_Pos) /*!< \brief DFSR: CM Mask */ - -#define DFSR_Ext_Pos 12U /*!< \brief DFSR: Ext Position */ -#define DFSR_Ext_Msk (1UL << DFSR_Ext_Pos) /*!< \brief DFSR: Ext Mask */ - -#define DFSR_WnR_Pos 11U /*!< \brief DFSR: WnR Position */ -#define DFSR_WnR_Msk (1UL << DFSR_WnR_Pos) /*!< \brief DFSR: WnR Mask */ - -#define DFSR_FS1_Pos 10U /*!< \brief DFSR: FS1 Position */ -#define DFSR_FS1_Msk (1UL << DFSR_FS1_Pos) /*!< \brief DFSR: FS1 Mask */ - -#define DFSR_LPAE_Pos 9U /*!< \brief DFSR: LPAE Position */ -#define DFSR_LPAE_Msk (1UL << DFSR_LPAE_Pos) /*!< \brief DFSR: LPAE Mask */ - -#define DFSR_Domain_Pos 4U /*!< \brief DFSR: Domain Position */ -#define DFSR_Domain_Msk (0xFUL << DFSR_Domain_Pos) /*!< \brief DFSR: Domain Mask */ - -#define DFSR_FS0_Pos 0U /*!< \brief DFSR: FS0 Position */ -#define DFSR_FS0_Msk (0xFUL << DFSR_FS0_Pos) /*!< \brief DFSR: FS0 Mask */ - -#define DFSR_STATUS_Pos 0U /*!< \brief DFSR: STATUS Position */ -#define DFSR_STATUS_Msk (0x3FUL << DFSR_STATUS_Pos) /*!< \brief DFSR: STATUS Mask */ - -/* CP15 Register IFSR */ -typedef union -{ - struct - { - uint32_t FS0:4; /*!< \brief bit: 0.. 3 Fault Status bits bit 0-3 */ - RESERVED(0:5, uint32_t) - uint32_t LPAE:1; /*!< \brief bit: 9 Large Physical Address Extension */ - uint32_t FS1:1; /*!< \brief bit: 10 Fault Status bits bit 4 */ - RESERVED(1:1, uint32_t) - uint32_t ExT:1; /*!< \brief bit: 12 External abort type */ - RESERVED(2:19, uint32_t) - } s; /*!< \brief Structure used for bit access in short format */ - struct - { - uint32_t STATUS:6; /*!< \brief bit: 0.. 5 Fault Status bits */ - RESERVED(0:3, uint32_t) - uint32_t LPAE:1; /*!< \brief bit: 9 Large Physical Address Extension */ - RESERVED(1:2, uint32_t) - uint32_t ExT:1; /*!< \brief bit: 12 External abort type */ - RESERVED(2:19, uint32_t) - } l; /*!< \brief Structure used for bit access in long format */ - uint32_t w; /*!< \brief Type used for word access */ -} IFSR_Type; - -#define IFSR_ExT_Pos 12U /*!< \brief IFSR: ExT Position */ -#define IFSR_ExT_Msk (1UL << IFSR_ExT_Pos) /*!< \brief IFSR: ExT Mask */ - -#define IFSR_FS1_Pos 10U /*!< \brief IFSR: FS1 Position */ -#define IFSR_FS1_Msk (1UL << IFSR_FS1_Pos) /*!< \brief IFSR: FS1 Mask */ - -#define IFSR_LPAE_Pos 9U /*!< \brief IFSR: LPAE Position */ -#define IFSR_LPAE_Msk (0x1UL << IFSR_LPAE_Pos) /*!< \brief IFSR: LPAE Mask */ - -#define IFSR_FS0_Pos 0U /*!< \brief IFSR: FS0 Position */ -#define IFSR_FS0_Msk (0xFUL << IFSR_FS0_Pos) /*!< \brief IFSR: FS0 Mask */ - -#define IFSR_STATUS_Pos 0U /*!< \brief IFSR: STATUS Position */ -#define IFSR_STATUS_Msk (0x3FUL << IFSR_STATUS_Pos) /*!< \brief IFSR: STATUS Mask */ - -/* CP15 Register ISR */ -typedef union -{ - struct - { - RESERVED(0:6, uint32_t) - uint32_t F:1; /*!< \brief bit: 6 FIQ pending bit */ - uint32_t I:1; /*!< \brief bit: 7 IRQ pending bit */ - uint32_t A:1; /*!< \brief bit: 8 External abort pending bit */ - RESERVED(1:23, uint32_t) - } b; /*!< \brief Structure used for bit access */ - uint32_t w; /*!< \brief Type used for word access */ -} ISR_Type; - -#define ISR_A_Pos 13U /*!< \brief ISR: A Position */ -#define ISR_A_Msk (1UL << ISR_A_Pos) /*!< \brief ISR: A Mask */ - -#define ISR_I_Pos 12U /*!< \brief ISR: I Position */ -#define ISR_I_Msk (1UL << ISR_I_Pos) /*!< \brief ISR: I Mask */ - -#define ISR_F_Pos 11U /*!< \brief ISR: F Position */ -#define ISR_F_Msk (1UL << ISR_F_Pos) /*!< \brief ISR: F Mask */ - -/* DACR Register */ -#define DACR_D_Pos_(n) (2U*n) /*!< \brief DACR: Dn Position */ -#define DACR_D_Msk_(n) (3UL << DACR_D_Pos_(n)) /*!< \brief DACR: Dn Mask */ -#define DACR_Dn_NOACCESS 0U /*!< \brief DACR Dn field: No access */ -#define DACR_Dn_CLIENT 1U /*!< \brief DACR Dn field: Client */ -#define DACR_Dn_MANAGER 3U /*!< \brief DACR Dn field: Manager */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param [in] field Name of the register bit field. - \param [in] value Value of the bit field. This parameter is interpreted as an uint32_t type. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param [in] field Name of the register bit field. - \param [in] value Value of register. This parameter is interpreted as an uint32_t type. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) - - -/** - \brief Union type to access the L2C_310 Cache Controller. -*/ -#if (__L2C_PRESENT == 1U) || defined(DOXYGEN) -typedef struct -{ - __IM uint32_t CACHE_ID; /*!< \brief Offset: 0x0000 (R/ ) Cache ID Register */ - __IM uint32_t CACHE_TYPE; /*!< \brief Offset: 0x0004 (R/ ) Cache Type Register */ - RESERVED(0[0x3e], uint32_t) - __IOM uint32_t CONTROL; /*!< \brief Offset: 0x0100 (R/W) Control Register */ - __IOM uint32_t AUX_CNT; /*!< \brief Offset: 0x0104 (R/W) Auxiliary Control */ - RESERVED(1[0x3e], uint32_t) - __IOM uint32_t EVENT_CONTROL; /*!< \brief Offset: 0x0200 (R/W) Event Counter Control */ - __IOM uint32_t EVENT_COUNTER1_CONF; /*!< \brief Offset: 0x0204 (R/W) Event Counter 1 Configuration */ - __IOM uint32_t EVENT_COUNTER0_CONF; /*!< \brief Offset: 0x0208 (R/W) Event Counter 1 Configuration */ - RESERVED(2[0x2], uint32_t) - __IOM uint32_t INTERRUPT_MASK; /*!< \brief Offset: 0x0214 (R/W) Interrupt Mask */ - __IM uint32_t MASKED_INT_STATUS; /*!< \brief Offset: 0x0218 (R/ ) Masked Interrupt Status */ - __IM uint32_t RAW_INT_STATUS; /*!< \brief Offset: 0x021c (R/ ) Raw Interrupt Status */ - __OM uint32_t INTERRUPT_CLEAR; /*!< \brief Offset: 0x0220 ( /W) Interrupt Clear */ - RESERVED(3[0x143], uint32_t) - __IOM uint32_t CACHE_SYNC; /*!< \brief Offset: 0x0730 (R/W) Cache Sync */ - RESERVED(4[0xf], uint32_t) - __IOM uint32_t INV_LINE_PA; /*!< \brief Offset: 0x0770 (R/W) Invalidate Line By PA */ - RESERVED(6[2], uint32_t) - __IOM uint32_t INV_WAY; /*!< \brief Offset: 0x077c (R/W) Invalidate by Way */ - RESERVED(5[0xc], uint32_t) - __IOM uint32_t CLEAN_LINE_PA; /*!< \brief Offset: 0x07b0 (R/W) Clean Line by PA */ - RESERVED(7[1], uint32_t) - __IOM uint32_t CLEAN_LINE_INDEX_WAY; /*!< \brief Offset: 0x07b8 (R/W) Clean Line by Index/Way */ - __IOM uint32_t CLEAN_WAY; /*!< \brief Offset: 0x07bc (R/W) Clean by Way */ - RESERVED(8[0xc], uint32_t) - __IOM uint32_t CLEAN_INV_LINE_PA; /*!< \brief Offset: 0x07f0 (R/W) Clean and Invalidate Line by PA */ - RESERVED(9[1], uint32_t) - __IOM uint32_t CLEAN_INV_LINE_INDEX_WAY; /*!< \brief Offset: 0x07f8 (R/W) Clean and Invalidate Line by Index/Way */ - __IOM uint32_t CLEAN_INV_WAY; /*!< \brief Offset: 0x07fc (R/W) Clean and Invalidate by Way */ - RESERVED(10[0x40], uint32_t) - __IOM uint32_t DATA_LOCK_0_WAY; /*!< \brief Offset: 0x0900 (R/W) Data Lockdown 0 by Way */ - __IOM uint32_t INST_LOCK_0_WAY; /*!< \brief Offset: 0x0904 (R/W) Instruction Lockdown 0 by Way */ - __IOM uint32_t DATA_LOCK_1_WAY; /*!< \brief Offset: 0x0908 (R/W) Data Lockdown 1 by Way */ - __IOM uint32_t INST_LOCK_1_WAY; /*!< \brief Offset: 0x090c (R/W) Instruction Lockdown 1 by Way */ - __IOM uint32_t DATA_LOCK_2_WAY; /*!< \brief Offset: 0x0910 (R/W) Data Lockdown 2 by Way */ - __IOM uint32_t INST_LOCK_2_WAY; /*!< \brief Offset: 0x0914 (R/W) Instruction Lockdown 2 by Way */ - __IOM uint32_t DATA_LOCK_3_WAY; /*!< \brief Offset: 0x0918 (R/W) Data Lockdown 3 by Way */ - __IOM uint32_t INST_LOCK_3_WAY; /*!< \brief Offset: 0x091c (R/W) Instruction Lockdown 3 by Way */ - __IOM uint32_t DATA_LOCK_4_WAY; /*!< \brief Offset: 0x0920 (R/W) Data Lockdown 4 by Way */ - __IOM uint32_t INST_LOCK_4_WAY; /*!< \brief Offset: 0x0924 (R/W) Instruction Lockdown 4 by Way */ - __IOM uint32_t DATA_LOCK_5_WAY; /*!< \brief Offset: 0x0928 (R/W) Data Lockdown 5 by Way */ - __IOM uint32_t INST_LOCK_5_WAY; /*!< \brief Offset: 0x092c (R/W) Instruction Lockdown 5 by Way */ - __IOM uint32_t DATA_LOCK_6_WAY; /*!< \brief Offset: 0x0930 (R/W) Data Lockdown 5 by Way */ - __IOM uint32_t INST_LOCK_6_WAY; /*!< \brief Offset: 0x0934 (R/W) Instruction Lockdown 5 by Way */ - __IOM uint32_t DATA_LOCK_7_WAY; /*!< \brief Offset: 0x0938 (R/W) Data Lockdown 6 by Way */ - __IOM uint32_t INST_LOCK_7_WAY; /*!< \brief Offset: 0x093c (R/W) Instruction Lockdown 6 by Way */ - RESERVED(11[0x4], uint32_t) - __IOM uint32_t LOCK_LINE_EN; /*!< \brief Offset: 0x0950 (R/W) Lockdown by Line Enable */ - __IOM uint32_t UNLOCK_ALL_BY_WAY; /*!< \brief Offset: 0x0954 (R/W) Unlock All Lines by Way */ - RESERVED(12[0xaa], uint32_t) - __IOM uint32_t ADDRESS_FILTER_START; /*!< \brief Offset: 0x0c00 (R/W) Address Filtering Start */ - __IOM uint32_t ADDRESS_FILTER_END; /*!< \brief Offset: 0x0c04 (R/W) Address Filtering End */ - RESERVED(13[0xce], uint32_t) - __IOM uint32_t DEBUG_CONTROL; /*!< \brief Offset: 0x0f40 (R/W) Debug Control Register */ -} L2C_310_TypeDef; - -#define L2C_310 ((L2C_310_TypeDef *)L2C_310_BASE) /*!< \brief L2C_310 register set access pointer */ -#endif - -#if (__GIC_PRESENT == 1U) || defined(DOXYGEN) - -/** \brief Structure type to access the Generic Interrupt Controller Distributor (GICD) -*/ -typedef struct -{ - __IOM uint32_t CTLR; /*!< \brief Offset: 0x000 (R/W) Distributor Control Register */ - __IM uint32_t TYPER; /*!< \brief Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IM uint32_t IIDR; /*!< \brief Offset: 0x008 (R/ ) Distributor Implementer Identification Register */ - RESERVED(0, uint32_t) - __IOM uint32_t STATUSR; /*!< \brief Offset: 0x010 (R/W) Error Reporting Status Register, optional */ - RESERVED(1[11], uint32_t) - __OM uint32_t SETSPI_NSR; /*!< \brief Offset: 0x040 ( /W) Set SPI Register */ - RESERVED(2, uint32_t) - __OM uint32_t CLRSPI_NSR; /*!< \brief Offset: 0x048 ( /W) Clear SPI Register */ - RESERVED(3, uint32_t) - __OM uint32_t SETSPI_SR; /*!< \brief Offset: 0x050 ( /W) Set SPI, Secure Register */ - RESERVED(4, uint32_t) - __OM uint32_t CLRSPI_SR; /*!< \brief Offset: 0x058 ( /W) Clear SPI, Secure Register */ - RESERVED(5[9], uint32_t) - __IOM uint32_t IGROUPR[32]; /*!< \brief Offset: 0x080 (R/W) Interrupt Group Registers */ - __IOM uint32_t ISENABLER[32]; /*!< \brief Offset: 0x100 (R/W) Interrupt Set-Enable Registers */ - __IOM uint32_t ICENABLER[32]; /*!< \brief Offset: 0x180 (R/W) Interrupt Clear-Enable Registers */ - __IOM uint32_t ISPENDR[32]; /*!< \brief Offset: 0x200 (R/W) Interrupt Set-Pending Registers */ - __IOM uint32_t ICPENDR[32]; /*!< \brief Offset: 0x280 (R/W) Interrupt Clear-Pending Registers */ - __IOM uint32_t ISACTIVER[32]; /*!< \brief Offset: 0x300 (R/W) Interrupt Set-Active Registers */ - __IOM uint32_t ICACTIVER[32]; /*!< \brief Offset: 0x380 (R/W) Interrupt Clear-Active Registers */ - __IOM uint32_t IPRIORITYR[255]; /*!< \brief Offset: 0x400 (R/W) Interrupt Priority Registers */ - RESERVED(6, uint32_t) - __IOM uint32_t ITARGETSR[255]; /*!< \brief Offset: 0x800 (R/W) Interrupt Targets Registers */ - RESERVED(7, uint32_t) - __IOM uint32_t ICFGR[64]; /*!< \brief Offset: 0xC00 (R/W) Interrupt Configuration Registers */ - __IOM uint32_t IGRPMODR[32]; /*!< \brief Offset: 0xD00 (R/W) Interrupt Group Modifier Registers */ - RESERVED(8[32], uint32_t) - __IOM uint32_t NSACR[64]; /*!< \brief Offset: 0xE00 (R/W) Non-secure Access Control Registers */ - __OM uint32_t SGIR; /*!< \brief Offset: 0xF00 ( /W) Software Generated Interrupt Register */ - RESERVED(9[3], uint32_t) - __IOM uint32_t CPENDSGIR[4]; /*!< \brief Offset: 0xF10 (R/W) SGI Clear-Pending Registers */ - __IOM uint32_t SPENDSGIR[4]; /*!< \brief Offset: 0xF20 (R/W) SGI Set-Pending Registers */ - RESERVED(10[5236], uint32_t) - __IOM uint64_t IROUTER[988]; /*!< \brief Offset: 0x6100(R/W) Interrupt Routing Registers */ -} GICDistributor_Type; - -#define GICDistributor ((GICDistributor_Type *) GIC_DISTRIBUTOR_BASE ) /*!< \brief GIC Distributor register set access pointer */ - -/** \brief Structure type to access the Generic Interrupt Controller Interface (GICC) -*/ -typedef struct -{ - __IOM uint32_t CTLR; /*!< \brief Offset: 0x000 (R/W) CPU Interface Control Register */ - __IOM uint32_t PMR; /*!< \brief Offset: 0x004 (R/W) Interrupt Priority Mask Register */ - __IOM uint32_t BPR; /*!< \brief Offset: 0x008 (R/W) Binary Point Register */ - __IM uint32_t IAR; /*!< \brief Offset: 0x00C (R/ ) Interrupt Acknowledge Register */ - __OM uint32_t EOIR; /*!< \brief Offset: 0x010 ( /W) End Of Interrupt Register */ - __IM uint32_t RPR; /*!< \brief Offset: 0x014 (R/ ) Running Priority Register */ - __IM uint32_t HPPIR; /*!< \brief Offset: 0x018 (R/ ) Highest Priority Pending Interrupt Register */ - __IOM uint32_t ABPR; /*!< \brief Offset: 0x01C (R/W) Aliased Binary Point Register */ - __IM uint32_t AIAR; /*!< \brief Offset: 0x020 (R/ ) Aliased Interrupt Acknowledge Register */ - __OM uint32_t AEOIR; /*!< \brief Offset: 0x024 ( /W) Aliased End Of Interrupt Register */ - __IM uint32_t AHPPIR; /*!< \brief Offset: 0x028 (R/ ) Aliased Highest Priority Pending Interrupt Register */ - __IOM uint32_t STATUSR; /*!< \brief Offset: 0x02C (R/W) Error Reporting Status Register, optional */ - RESERVED(1[40], uint32_t) - __IOM uint32_t APR[4]; /*!< \brief Offset: 0x0D0 (R/W) Active Priority Register */ - __IOM uint32_t NSAPR[4]; /*!< \brief Offset: 0x0E0 (R/W) Non-secure Active Priority Register */ - RESERVED(2[3], uint32_t) - __IM uint32_t IIDR; /*!< \brief Offset: 0x0FC (R/ ) CPU Interface Identification Register */ - RESERVED(3[960], uint32_t) - __OM uint32_t DIR; /*!< \brief Offset: 0x1000( /W) Deactivate Interrupt Register */ -} GICInterface_Type; - -#define GICInterface ((GICInterface_Type *) GIC_INTERFACE_BASE ) /*!< \brief GIC Interface register set access pointer */ -#endif - -#if (__TIM_PRESENT == 1U) || defined(DOXYGEN) -#if ((__CORTEX_A == 5U) || (__CORTEX_A == 9U)) || defined(DOXYGEN) -/** \brief Structure type to access the Private Timer -*/ -typedef struct -{ - __IOM uint32_t LOAD; //!< \brief Offset: 0x000 (R/W) Private Timer Load Register - __IOM uint32_t COUNTER; //!< \brief Offset: 0x004 (R/W) Private Timer Counter Register - __IOM uint32_t CONTROL; //!< \brief Offset: 0x008 (R/W) Private Timer Control Register - __IOM uint32_t ISR; //!< \brief Offset: 0x00C (R/W) Private Timer Interrupt Status Register - RESERVED(0[4], uint32_t) - __IOM uint32_t WLOAD; //!< \brief Offset: 0x020 (R/W) Watchdog Load Register - __IOM uint32_t WCOUNTER; //!< \brief Offset: 0x024 (R/W) Watchdog Counter Register - __IOM uint32_t WCONTROL; //!< \brief Offset: 0x028 (R/W) Watchdog Control Register - __IOM uint32_t WISR; //!< \brief Offset: 0x02C (R/W) Watchdog Interrupt Status Register - __IOM uint32_t WRESET; //!< \brief Offset: 0x030 (R/W) Watchdog Reset Status Register - __OM uint32_t WDISABLE; //!< \brief Offset: 0x034 ( /W) Watchdog Disable Register -} Timer_Type; -#define PTIM ((Timer_Type *) TIMER_BASE ) /*!< \brief Timer register struct */ -#endif -#endif - - /******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - L1 Cache Functions - - L2C-310 Cache Controller Functions - - PL1 Timer Functions - - GIC Functions - - MMU Functions - ******************************************************************************/ - -/* ########################## L1 Cache functions ################################# */ - -/** \brief Enable Caches by setting I and C bits in SCTLR register. -*/ -__STATIC_FORCEINLINE void L1C_EnableCaches(void) { - __set_SCTLR( __get_SCTLR() | SCTLR_I_Msk | SCTLR_C_Msk); - __ISB(); -} - -/** \brief Disable Caches by clearing I and C bits in SCTLR register. -*/ -__STATIC_FORCEINLINE void L1C_DisableCaches(void) { - __set_SCTLR( __get_SCTLR() & (~SCTLR_I_Msk) & (~SCTLR_C_Msk)); - __ISB(); -} - -/** \brief Enable Branch Prediction by setting Z bit in SCTLR register. -*/ -__STATIC_FORCEINLINE void L1C_EnableBTAC(void) { - __set_SCTLR( __get_SCTLR() | SCTLR_Z_Msk); - __ISB(); -} - -/** \brief Disable Branch Prediction by clearing Z bit in SCTLR register. -*/ -__STATIC_FORCEINLINE void L1C_DisableBTAC(void) { - __set_SCTLR( __get_SCTLR() & (~SCTLR_Z_Msk)); - __ISB(); -} - -/** \brief Invalidate entire branch predictor array -*/ -__STATIC_FORCEINLINE void L1C_InvalidateBTAC(void) { - __set_BPIALL(0); - __DSB(); //ensure completion of the invalidation - __ISB(); //ensure instruction fetch path sees new state -} - -/** \brief Invalidate the whole instruction cache -*/ -__STATIC_FORCEINLINE void L1C_InvalidateICacheAll(void) { - __set_ICIALLU(0); - __DSB(); //ensure completion of the invalidation - __ISB(); //ensure instruction fetch path sees new I cache state -} - -/** \brief Clean data cache line by address. -* \param [in] va Pointer to data to clear the cache for. -*/ -__STATIC_FORCEINLINE void L1C_CleanDCacheMVA(void *va) { - __set_DCCMVAC((uint32_t)va); - __DMB(); //ensure the ordering of data cache maintenance operations and their effects -} - -/** \brief Invalidate data cache line by address. -* \param [in] va Pointer to data to invalidate the cache for. -*/ -__STATIC_FORCEINLINE void L1C_InvalidateDCacheMVA(void *va) { - __set_DCIMVAC((uint32_t)va); - __DMB(); //ensure the ordering of data cache maintenance operations and their effects -} - -/** \brief Clean and Invalidate data cache by address. -* \param [in] va Pointer to data to invalidate the cache for. -*/ -__STATIC_FORCEINLINE void L1C_CleanInvalidateDCacheMVA(void *va) { - __set_DCCIMVAC((uint32_t)va); - __DMB(); //ensure the ordering of data cache maintenance operations and their effects -} - -/** \brief Calculate log2 rounded up -* - log(0) => 0 -* - log(1) => 0 -* - log(2) => 1 -* - log(3) => 2 -* - log(4) => 2 -* - log(5) => 3 -* : : -* - log(16) => 4 -* - log(32) => 5 -* : : -* \param [in] n input value parameter -* \return log2(n) -*/ -__STATIC_FORCEINLINE uint8_t __log2_up(uint32_t n) -{ - if (n < 2U) { - return 0U; - } - uint8_t log = 0U; - uint32_t t = n; - while(t > 1U) - { - log++; - t >>= 1U; - } - if (n & 1U) { log++; } - return log; -} - -/** \brief Apply cache maintenance to given cache level. -* \param [in] level cache level to be maintained -* \param [in] maint 0 - invalidate, 1 - clean, otherwise - invalidate and clean -*/ -__STATIC_FORCEINLINE void __L1C_MaintainDCacheSetWay(uint32_t level, uint32_t maint) -{ - uint32_t Dummy; - uint32_t ccsidr; - uint32_t num_sets; - uint32_t num_ways; - uint32_t shift_way; - uint32_t log2_linesize; - int32_t log2_num_ways; - - Dummy = level << 1U; - /* set csselr, select ccsidr register */ - __set_CSSELR(Dummy); - /* get current ccsidr register */ - ccsidr = __get_CCSIDR(); - num_sets = ((ccsidr & 0x0FFFE000U) >> 13U) + 1U; - num_ways = ((ccsidr & 0x00001FF8U) >> 3U) + 1U; - log2_linesize = (ccsidr & 0x00000007U) + 2U + 2U; - log2_num_ways = __log2_up(num_ways); - if ((log2_num_ways < 0) || (log2_num_ways > 32)) { - return; // FATAL ERROR - } - shift_way = 32U - (uint32_t)log2_num_ways; - for(int32_t way = num_ways-1; way >= 0; way--) - { - for(int32_t set = num_sets-1; set >= 0; set--) - { - Dummy = (level << 1U) | (((uint32_t)set) << log2_linesize) | (((uint32_t)way) << shift_way); - switch (maint) - { - case 0U: __set_DCISW(Dummy); break; - case 1U: __set_DCCSW(Dummy); break; - default: __set_DCCISW(Dummy); break; - } - } - } - __DMB(); -} - -/** \brief Clean and Invalidate the entire data or unified cache -* Generic mechanism for cleaning/invalidating the entire data or unified cache to the point of coherency -* \param [in] op 0 - invalidate, 1 - clean, otherwise - invalidate and clean -*/ -__STATIC_FORCEINLINE void L1C_CleanInvalidateCache(uint32_t op) { - uint32_t clidr; - uint32_t cache_type; - clidr = __get_CLIDR(); - for(uint32_t i = 0U; i<7U; i++) - { - cache_type = (clidr >> i*3U) & 0x7UL; - if ((cache_type >= 2U) && (cache_type <= 4U)) - { - __L1C_MaintainDCacheSetWay(i, op); - } - } -} - -/** \brief Clean and Invalidate the entire data or unified cache -* Generic mechanism for cleaning/invalidating the entire data or unified cache to the point of coherency -* \param [in] op 0 - invalidate, 1 - clean, otherwise - invalidate and clean -* \deprecated Use generic L1C_CleanInvalidateCache instead. -*/ -CMSIS_DEPRECATED -__STATIC_FORCEINLINE void __L1C_CleanInvalidateCache(uint32_t op) { - L1C_CleanInvalidateCache(op); -} - -/** \brief Invalidate the whole data cache. -*/ -__STATIC_FORCEINLINE void L1C_InvalidateDCacheAll(void) { - L1C_CleanInvalidateCache(0); -} - -/** \brief Clean the whole data cache. - */ -__STATIC_FORCEINLINE void L1C_CleanDCacheAll(void) { - L1C_CleanInvalidateCache(1); -} - -/** \brief Clean and invalidate the whole data cache. - */ -__STATIC_FORCEINLINE void L1C_CleanInvalidateDCacheAll(void) { - L1C_CleanInvalidateCache(2); -} - -/* ########################## L2 Cache functions ################################# */ -#if (__L2C_PRESENT == 1U) || defined(DOXYGEN) -/** \brief Cache Sync operation by writing CACHE_SYNC register. -*/ -__STATIC_INLINE void L2C_Sync(void) -{ - L2C_310->CACHE_SYNC = 0x0; -} - -/** \brief Read cache controller cache ID from CACHE_ID register. - * \return L2C_310_TypeDef::CACHE_ID - */ -__STATIC_INLINE int L2C_GetID (void) -{ - return L2C_310->CACHE_ID; -} - -/** \brief Read cache controller cache type from CACHE_TYPE register. -* \return L2C_310_TypeDef::CACHE_TYPE -*/ -__STATIC_INLINE int L2C_GetType (void) -{ - return L2C_310->CACHE_TYPE; -} - -/** \brief Invalidate all cache by way -*/ -__STATIC_INLINE void L2C_InvAllByWay (void) -{ - unsigned int assoc; - - if (L2C_310->AUX_CNT & (1U << 16U)) { - assoc = 16U; - } else { - assoc = 8U; - } - - L2C_310->INV_WAY = (1U << assoc) - 1U; - while(L2C_310->INV_WAY & ((1U << assoc) - 1U)); //poll invalidate - - L2C_Sync(); -} - -/** \brief Clean and Invalidate all cache by way -*/ -__STATIC_INLINE void L2C_CleanInvAllByWay (void) -{ - unsigned int assoc; - - if (L2C_310->AUX_CNT & (1U << 16U)) { - assoc = 16U; - } else { - assoc = 8U; - } - - L2C_310->CLEAN_INV_WAY = (1U << assoc) - 1U; - while(L2C_310->CLEAN_INV_WAY & ((1U << assoc) - 1U)); //poll invalidate - - L2C_Sync(); -} - -/** \brief Enable Level 2 Cache -*/ -__STATIC_INLINE void L2C_Enable(void) -{ - L2C_310->CONTROL = 0; - L2C_310->INTERRUPT_CLEAR = 0x000001FFuL; - L2C_310->DEBUG_CONTROL = 0; - L2C_310->DATA_LOCK_0_WAY = 0; - L2C_310->CACHE_SYNC = 0; - L2C_310->CONTROL = 0x01; - L2C_Sync(); -} - -/** \brief Disable Level 2 Cache -*/ -__STATIC_INLINE void L2C_Disable(void) -{ - L2C_310->CONTROL = 0x00; - L2C_Sync(); -} - -/** \brief Invalidate cache by physical address -* \param [in] pa Pointer to data to invalidate cache for. -*/ -__STATIC_INLINE void L2C_InvPa (void *pa) -{ - L2C_310->INV_LINE_PA = (unsigned int)pa; - L2C_Sync(); -} - -/** \brief Clean cache by physical address -* \param [in] pa Pointer to data to invalidate cache for. -*/ -__STATIC_INLINE void L2C_CleanPa (void *pa) -{ - L2C_310->CLEAN_LINE_PA = (unsigned int)pa; - L2C_Sync(); -} - -/** \brief Clean and invalidate cache by physical address -* \param [in] pa Pointer to data to invalidate cache for. -*/ -__STATIC_INLINE void L2C_CleanInvPa (void *pa) -{ - L2C_310->CLEAN_INV_LINE_PA = (unsigned int)pa; - L2C_Sync(); -} -#endif - -/* ########################## GIC functions ###################################### */ -#if (__GIC_PRESENT == 1U) || defined(DOXYGEN) - -/** \brief Enable the interrupt distributor using the GIC's CTLR register. -*/ -__STATIC_INLINE void GIC_EnableDistributor(void) -{ - GICDistributor->CTLR |= 1U; -} - -/** \brief Disable the interrupt distributor using the GIC's CTLR register. -*/ -__STATIC_INLINE void GIC_DisableDistributor(void) -{ - GICDistributor->CTLR &=~1U; -} - -/** \brief Read the GIC's TYPER register. -* \return GICDistributor_Type::TYPER -*/ -__STATIC_INLINE uint32_t GIC_DistributorInfo(void) -{ - return (GICDistributor->TYPER); -} - -/** \brief Reads the GIC's IIDR register. -* \return GICDistributor_Type::IIDR -*/ -__STATIC_INLINE uint32_t GIC_DistributorImplementer(void) -{ - return (GICDistributor->IIDR); -} - -/** \brief Sets the GIC's ITARGETSR register for the given interrupt. -* \param [in] IRQn Interrupt to be configured. -* \param [in] cpu_target CPU interfaces to assign this interrupt to. -*/ -__STATIC_INLINE void GIC_SetTarget(IRQn_Type IRQn, uint32_t cpu_target) -{ - uint32_t mask = GICDistributor->ITARGETSR[IRQn / 4U] & ~(0xFFUL << ((IRQn % 4U) * 8U)); - GICDistributor->ITARGETSR[IRQn / 4U] = mask | ((cpu_target & 0xFFUL) << ((IRQn % 4U) * 8U)); -} - -/** \brief Read the GIC's ITARGETSR register. -* \param [in] IRQn Interrupt to acquire the configuration for. -* \return GICDistributor_Type::ITARGETSR -*/ -__STATIC_INLINE uint32_t GIC_GetTarget(IRQn_Type IRQn) -{ - return (GICDistributor->ITARGETSR[IRQn / 4U] >> ((IRQn % 4U) * 8U)) & 0xFFUL; -} - -/** \brief Enable the CPU's interrupt interface. -*/ -__STATIC_INLINE void GIC_EnableInterface(void) -{ - GICInterface->CTLR |= 1U; //enable interface -} - -/** \brief Disable the CPU's interrupt interface. -*/ -__STATIC_INLINE void GIC_DisableInterface(void) -{ - GICInterface->CTLR &=~1U; //disable distributor -} - -/** \brief Read the CPU's IAR register. -* \return GICInterface_Type::IAR -*/ -__STATIC_INLINE IRQn_Type GIC_AcknowledgePending(void) -{ - return (IRQn_Type)(GICInterface->IAR); -} - -/** \brief Writes the given interrupt number to the CPU's EOIR register. -* \param [in] IRQn The interrupt to be signaled as finished. -*/ -__STATIC_INLINE void GIC_EndInterrupt(IRQn_Type IRQn) -{ - GICInterface->EOIR = IRQn; -} - -/** \brief Enables the given interrupt using GIC's ISENABLER register. -* \param [in] IRQn The interrupt to be enabled. -*/ -__STATIC_INLINE void GIC_EnableIRQ(IRQn_Type IRQn) -{ - GICDistributor->ISENABLER[IRQn / 32U] = 1U << (IRQn % 32U); -} - -/** \brief Get interrupt enable status using GIC's ISENABLER register. -* \param [in] IRQn The interrupt to be queried. -* \return 0 - interrupt is not enabled, 1 - interrupt is enabled. -*/ -__STATIC_INLINE uint32_t GIC_GetEnableIRQ(IRQn_Type IRQn) -{ - return (GICDistributor->ISENABLER[IRQn / 32U] >> (IRQn % 32U)) & 1UL; -} - -/** \brief Disables the given interrupt using GIC's ICENABLER register. -* \param [in] IRQn The interrupt to be disabled. -*/ -__STATIC_INLINE void GIC_DisableIRQ(IRQn_Type IRQn) -{ - GICDistributor->ICENABLER[IRQn / 32U] = 1U << (IRQn % 32U); -} - -/** \brief Get interrupt pending status from GIC's ISPENDR register. -* \param [in] IRQn The interrupt to be queried. -* \return 0 - interrupt is not pending, 1 - interrupt is pendig. -*/ -__STATIC_INLINE uint32_t GIC_GetPendingIRQ(IRQn_Type IRQn) -{ - uint32_t pend; - - if (IRQn >= 16U) { - pend = (GICDistributor->ISPENDR[IRQn / 32U] >> (IRQn % 32U)) & 1UL; - } else { - // INTID 0-15 Software Generated Interrupt - pend = (GICDistributor->SPENDSGIR[IRQn / 4U] >> ((IRQn % 4U) * 8U)) & 0xFFUL; - // No CPU identification offered - if (pend != 0U) { - pend = 1U; - } else { - pend = 0U; - } - } - - return (pend); -} - -/** \brief Sets the given interrupt as pending using GIC's ISPENDR register. -* \param [in] IRQn The interrupt to be enabled. -*/ -__STATIC_INLINE void GIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if (IRQn >= 16U) { - GICDistributor->ISPENDR[IRQn / 32U] = 1U << (IRQn % 32U); - } else { - // INTID 0-15 Software Generated Interrupt - // Forward the interrupt to the CPU interface that requested it - GICDistributor->SGIR = (IRQn | 0x02000000U); - } -} - -/** \brief Clears the given interrupt from being pending using GIC's ICPENDR register. -* \param [in] IRQn The interrupt to be enabled. -*/ -__STATIC_INLINE void GIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if (IRQn >= 16U) { - GICDistributor->ICPENDR[IRQn / 32U] = 1U << (IRQn % 32U); - } else { - // INTID 0-15 Software Generated Interrupt - GICDistributor->CPENDSGIR[IRQn / 4U] = 1U << ((IRQn % 4U) * 8U); - } -} - -/** \brief Sets the interrupt configuration using GIC's ICFGR register. -* \param [in] IRQn The interrupt to be configured. -* \param [in] int_config Int_config field value. Bit 0: Reserved (0 - N-N model, 1 - 1-N model for some GIC before v1) -* Bit 1: 0 - level sensitive, 1 - edge triggered -*/ -__STATIC_INLINE void GIC_SetConfiguration(IRQn_Type IRQn, uint32_t int_config) -{ - uint32_t icfgr = GICDistributor->ICFGR[IRQn / 16U]; - uint32_t shift = (IRQn % 16U) << 1U; - - icfgr &= (~(3U << shift)); - icfgr |= ( int_config << shift); - - GICDistributor->ICFGR[IRQn / 16U] = icfgr; -} - -/** \brief Get the interrupt configuration from the GIC's ICFGR register. -* \param [in] IRQn Interrupt to acquire the configuration for. -* \return Int_config field value. Bit 0: Reserved (0 - N-N model, 1 - 1-N model for some GIC before v1) -* Bit 1: 0 - level sensitive, 1 - edge triggered -*/ -__STATIC_INLINE uint32_t GIC_GetConfiguration(IRQn_Type IRQn) -{ - return (GICDistributor->ICFGR[IRQn / 16U] >> ((IRQn % 16U) >> 1U)); -} - -/** \brief Set the priority for the given interrupt in the GIC's IPRIORITYR register. -* \param [in] IRQn The interrupt to be configured. -* \param [in] priority The priority for the interrupt, lower values denote higher priorities. -*/ -__STATIC_INLINE void GIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - uint32_t mask = GICDistributor->IPRIORITYR[IRQn / 4U] & ~(0xFFUL << ((IRQn % 4U) * 8U)); - GICDistributor->IPRIORITYR[IRQn / 4U] = mask | ((priority & 0xFFUL) << ((IRQn % 4U) * 8U)); -} - -/** \brief Read the current interrupt priority from GIC's IPRIORITYR register. -* \param [in] IRQn The interrupt to be queried. -*/ -__STATIC_INLINE uint32_t GIC_GetPriority(IRQn_Type IRQn) -{ - return (GICDistributor->IPRIORITYR[IRQn / 4U] >> ((IRQn % 4U) * 8U)) & 0xFFUL; -} - -/** \brief Set the interrupt priority mask using CPU's PMR register. -* \param [in] priority Priority mask to be set. -*/ -__STATIC_INLINE void GIC_SetInterfacePriorityMask(uint32_t priority) -{ - GICInterface->PMR = priority & 0xFFUL; //set priority mask -} - -/** \brief Read the current interrupt priority mask from CPU's PMR register. -* \result GICInterface_Type::PMR -*/ -__STATIC_INLINE uint32_t GIC_GetInterfacePriorityMask(void) -{ - return GICInterface->PMR; -} - -/** \brief Configures the group priority and subpriority split point using CPU's BPR register. -* \param [in] binary_point Amount of bits used as subpriority. -*/ -__STATIC_INLINE void GIC_SetBinaryPoint(uint32_t binary_point) -{ - GICInterface->BPR = binary_point & 7U; //set binary point -} - -/** \brief Read the current group priority and subpriority split point from CPU's BPR register. -* \return GICInterface_Type::BPR -*/ -__STATIC_INLINE uint32_t GIC_GetBinaryPoint(void) -{ - return GICInterface->BPR; -} - -/** \brief Get the status for a given interrupt. -* \param [in] IRQn The interrupt to get status for. -* \return 0 - not pending/active, 1 - pending, 2 - active, 3 - pending and active -*/ -__STATIC_INLINE uint32_t GIC_GetIRQStatus(IRQn_Type IRQn) -{ - uint32_t pending, active; - - active = ((GICDistributor->ISACTIVER[IRQn / 32U]) >> (IRQn % 32U)) & 1UL; - pending = ((GICDistributor->ISPENDR[IRQn / 32U]) >> (IRQn % 32U)) & 1UL; - - return ((active<<1U) | pending); -} - -/** \brief Generate a software interrupt using GIC's SGIR register. -* \param [in] IRQn Software interrupt to be generated. -* \param [in] target_list List of CPUs the software interrupt should be forwarded to. -* \param [in] filter_list Filter to be applied to determine interrupt receivers. -*/ -__STATIC_INLINE void GIC_SendSGI(IRQn_Type IRQn, uint32_t target_list, uint32_t filter_list) -{ - GICDistributor->SGIR = ((filter_list & 3U) << 24U) | ((target_list & 0xFFUL) << 16U) | (IRQn & 0x0FUL); -} - -/** \brief Get the interrupt number of the highest interrupt pending from CPU's HPPIR register. -* \return GICInterface_Type::HPPIR -*/ -__STATIC_INLINE uint32_t GIC_GetHighPendingIRQ(void) -{ - return GICInterface->HPPIR; -} - -/** \brief Provides information about the implementer and revision of the CPU interface. -* \return GICInterface_Type::IIDR -*/ -__STATIC_INLINE uint32_t GIC_GetInterfaceId(void) -{ - return GICInterface->IIDR; -} - -/** \brief Set the interrupt group from the GIC's IGROUPR register. -* \param [in] IRQn The interrupt to be queried. -* \param [in] group Interrupt group number: 0 - Group 0, 1 - Group 1 -*/ -__STATIC_INLINE void GIC_SetGroup(IRQn_Type IRQn, uint32_t group) -{ - uint32_t igroupr = GICDistributor->IGROUPR[IRQn / 32U]; - uint32_t shift = (IRQn % 32U); - - igroupr &= (~(1U << shift)); - igroupr |= ( (group & 1U) << shift); - - GICDistributor->IGROUPR[IRQn / 32U] = igroupr; -} -#define GIC_SetSecurity GIC_SetGroup - -/** \brief Get the interrupt group from the GIC's IGROUPR register. -* \param [in] IRQn The interrupt to be queried. -* \return 0 - Group 0, 1 - Group 1 -*/ -__STATIC_INLINE uint32_t GIC_GetGroup(IRQn_Type IRQn) -{ - return (GICDistributor->IGROUPR[IRQn / 32U] >> (IRQn % 32U)) & 1UL; -} -#define GIC_GetSecurity GIC_GetGroup - -/** \brief Initialize the interrupt distributor. -*/ -__STATIC_INLINE void GIC_DistInit(void) -{ - uint32_t i; - uint32_t num_irq = 0U; - uint32_t priority_field; - - //A reset sets all bits in the IGROUPRs corresponding to the SPIs to 0, - //configuring all of the interrupts as Secure. - - //Disable interrupt forwarding - GIC_DisableDistributor(); - //Get the maximum number of interrupts that the GIC supports - num_irq = 32U * ((GIC_DistributorInfo() & 0x1FU) + 1U); - - /* Priority level is implementation defined. - To determine the number of priority bits implemented write 0xFF to an IPRIORITYR - priority field and read back the value stored.*/ - GIC_SetPriority((IRQn_Type)0U, 0xFFU); - priority_field = GIC_GetPriority((IRQn_Type)0U); - - for (i = 32U; i < num_irq; i++) - { - //Disable the SPI interrupt - GIC_DisableIRQ((IRQn_Type)i); - //Set level-sensitive (and N-N model) - GIC_SetConfiguration((IRQn_Type)i, 0U); - //Set priority - GIC_SetPriority((IRQn_Type)i, priority_field/2U); - //Set target list to CPU0 - GIC_SetTarget((IRQn_Type)i, 1U); - } - //Enable distributor - GIC_EnableDistributor(); -} - -/** \brief Initialize the CPU's interrupt interface -*/ -__STATIC_INLINE void GIC_CPUInterfaceInit(void) -{ - uint32_t i; - uint32_t priority_field; - - //A reset sets all bits in the IGROUPRs corresponding to the SPIs to 0, - //configuring all of the interrupts as Secure. - - //Disable interrupt forwarding - GIC_DisableInterface(); - - /* Priority level is implementation defined. - To determine the number of priority bits implemented write 0xFF to an IPRIORITYR - priority field and read back the value stored.*/ - GIC_SetPriority((IRQn_Type)0U, 0xFFU); - priority_field = GIC_GetPriority((IRQn_Type)0U); - - //SGI and PPI - for (i = 0U; i < 32U; i++) - { - if(i > 15U) { - //Set level-sensitive (and N-N model) for PPI - GIC_SetConfiguration((IRQn_Type)i, 0U); - } - //Disable SGI and PPI interrupts - GIC_DisableIRQ((IRQn_Type)i); - //Set priority - GIC_SetPriority((IRQn_Type)i, priority_field/2U); - } - //Enable interface - GIC_EnableInterface(); - //Set binary point to 0 - GIC_SetBinaryPoint(0U); - //Set priority mask - GIC_SetInterfacePriorityMask(0xFFU); -} - -/** \brief Initialize and enable the GIC -*/ -__STATIC_INLINE void GIC_Enable(void) -{ - GIC_DistInit(); - GIC_CPUInterfaceInit(); //per CPU -} -#endif - -/* ########################## Generic Timer functions ############################ */ -#if (__TIM_PRESENT == 1U) || defined(DOXYGEN) - -/* PL1 Physical Timer */ -#if (__CORTEX_A == 7U) || defined(DOXYGEN) - -/** \brief Physical Timer Control register */ -typedef union -{ - struct - { - uint32_t ENABLE:1; /*!< \brief bit: 0 Enables the timer. */ - uint32_t IMASK:1; /*!< \brief bit: 1 Timer output signal mask bit. */ - uint32_t ISTATUS:1; /*!< \brief bit: 2 The status of the timer. */ - RESERVED(0:29, uint32_t) - } b; /*!< \brief Structure used for bit access */ - uint32_t w; /*!< \brief Type used for word access */ -} CNTP_CTL_Type; - -/** \brief Configures the frequency the timer shall run at. -* \param [in] value The timer frequency in Hz. -*/ -__STATIC_INLINE void PL1_SetCounterFrequency(uint32_t value) -{ - __set_CNTFRQ(value); - __ISB(); -} - -/** \brief Sets the reset value of the timer. -* \param [in] value The value the timer is loaded with. -*/ -__STATIC_INLINE void PL1_SetLoadValue(uint32_t value) -{ - __set_CNTP_TVAL(value); - __ISB(); -} - -/** \brief Get the current counter value. -* \return Current counter value. -*/ -__STATIC_INLINE uint32_t PL1_GetCurrentValue(void) -{ - return(__get_CNTP_TVAL()); -} - -/** \brief Get the current physical counter value. -* \return Current physical counter value. -*/ -__STATIC_INLINE uint64_t PL1_GetCurrentPhysicalValue(void) -{ - return(__get_CNTPCT()); -} - -/** \brief Set the physical compare value. -* \param [in] value New physical timer compare value. -*/ -__STATIC_INLINE void PL1_SetPhysicalCompareValue(uint64_t value) -{ - __set_CNTP_CVAL(value); - __ISB(); -} - -/** \brief Get the physical compare value. -* \return Physical compare value. -*/ -__STATIC_INLINE uint64_t PL1_GetPhysicalCompareValue(void) -{ - return(__get_CNTP_CVAL()); -} - -/** \brief Configure the timer by setting the control value. -* \param [in] value New timer control value. -*/ -__STATIC_INLINE void PL1_SetControl(uint32_t value) -{ - __set_CNTP_CTL(value); - __ISB(); -} - -/** \brief Get the control value. -* \return Control value. -*/ -__STATIC_INLINE uint32_t PL1_GetControl(void) -{ - return(__get_CNTP_CTL()); -} -#endif - -/* Private Timer */ -#if ((__CORTEX_A == 5U) || (__CORTEX_A == 9U)) || defined(DOXYGEN) -/** \brief Set the load value to timers LOAD register. -* \param [in] value The load value to be set. -*/ -__STATIC_INLINE void PTIM_SetLoadValue(uint32_t value) -{ - PTIM->LOAD = value; -} - -/** \brief Get the load value from timers LOAD register. -* \return Timer_Type::LOAD -*/ -__STATIC_INLINE uint32_t PTIM_GetLoadValue(void) -{ - return(PTIM->LOAD); -} - -/** \brief Set current counter value from its COUNTER register. -*/ -__STATIC_INLINE void PTIM_SetCurrentValue(uint32_t value) -{ - PTIM->COUNTER = value; -} - -/** \brief Get current counter value from timers COUNTER register. -* \result Timer_Type::COUNTER -*/ -__STATIC_INLINE uint32_t PTIM_GetCurrentValue(void) -{ - return(PTIM->COUNTER); -} - -/** \brief Configure the timer using its CONTROL register. -* \param [in] value The new configuration value to be set. -*/ -__STATIC_INLINE void PTIM_SetControl(uint32_t value) -{ - PTIM->CONTROL = value; -} - -/** ref Timer_Type::CONTROL Get the current timer configuration from its CONTROL register. -* \return Timer_Type::CONTROL -*/ -__STATIC_INLINE uint32_t PTIM_GetControl(void) -{ - return(PTIM->CONTROL); -} - -/** ref Timer_Type::CONTROL Get the event flag in timers ISR register. -* \return 0 - flag is not set, 1- flag is set -*/ -__STATIC_INLINE uint32_t PTIM_GetEventFlag(void) -{ - return (PTIM->ISR & 1UL); -} - -/** ref Timer_Type::CONTROL Clears the event flag in timers ISR register. -*/ -__STATIC_INLINE void PTIM_ClearEventFlag(void) -{ - PTIM->ISR = 1; -} -#endif -#endif - -/* ########################## MMU functions ###################################### */ - -#define SECTION_DESCRIPTOR (0x2) -#define SECTION_MASK (0xFFFFFFFC) - -#define SECTION_TEXCB_MASK (0xFFFF8FF3) -#define SECTION_B_SHIFT (2) -#define SECTION_C_SHIFT (3) -#define SECTION_TEX0_SHIFT (12) -#define SECTION_TEX1_SHIFT (13) -#define SECTION_TEX2_SHIFT (14) - -#define SECTION_XN_MASK (0xFFFFFFEF) -#define SECTION_XN_SHIFT (4) - -#define SECTION_DOMAIN_MASK (0xFFFFFE1F) -#define SECTION_DOMAIN_SHIFT (5) - -#define SECTION_P_MASK (0xFFFFFDFF) -#define SECTION_P_SHIFT (9) - -#define SECTION_AP_MASK (0xFFFF73FF) -#define SECTION_AP_SHIFT (10) -#define SECTION_AP2_SHIFT (15) - -#define SECTION_S_MASK (0xFFFEFFFF) -#define SECTION_S_SHIFT (16) - -#define SECTION_NG_MASK (0xFFFDFFFF) -#define SECTION_NG_SHIFT (17) - -#define SECTION_NS_MASK (0xFFF7FFFF) -#define SECTION_NS_SHIFT (19) - -#define PAGE_L1_DESCRIPTOR (0x1) -#define PAGE_L1_MASK (0xFFFFFFFC) - -#define PAGE_L2_4K_DESC (0x2) -#define PAGE_L2_4K_MASK (0xFFFFFFFD) - -#define PAGE_L2_64K_DESC (0x1) -#define PAGE_L2_64K_MASK (0xFFFFFFFC) - -#define PAGE_4K_TEXCB_MASK (0xFFFFFE33) -#define PAGE_4K_B_SHIFT (2) -#define PAGE_4K_C_SHIFT (3) -#define PAGE_4K_TEX0_SHIFT (6) -#define PAGE_4K_TEX1_SHIFT (7) -#define PAGE_4K_TEX2_SHIFT (8) - -#define PAGE_64K_TEXCB_MASK (0xFFFF8FF3) -#define PAGE_64K_B_SHIFT (2) -#define PAGE_64K_C_SHIFT (3) -#define PAGE_64K_TEX0_SHIFT (12) -#define PAGE_64K_TEX1_SHIFT (13) -#define PAGE_64K_TEX2_SHIFT (14) - -#define PAGE_TEXCB_MASK (0xFFFF8FF3) -#define PAGE_B_SHIFT (2) -#define PAGE_C_SHIFT (3) -#define PAGE_TEX_SHIFT (12) - -#define PAGE_XN_4K_MASK (0xFFFFFFFE) -#define PAGE_XN_4K_SHIFT (0) -#define PAGE_XN_64K_MASK (0xFFFF7FFF) -#define PAGE_XN_64K_SHIFT (15) - -#define PAGE_DOMAIN_MASK (0xFFFFFE1F) -#define PAGE_DOMAIN_SHIFT (5) - -#define PAGE_P_MASK (0xFFFFFDFF) -#define PAGE_P_SHIFT (9) - -#define PAGE_AP_MASK (0xFFFFFDCF) -#define PAGE_AP_SHIFT (4) -#define PAGE_AP2_SHIFT (9) - -#define PAGE_S_MASK (0xFFFFFBFF) -#define PAGE_S_SHIFT (10) - -#define PAGE_NG_MASK (0xFFFFF7FF) -#define PAGE_NG_SHIFT (11) - -#define PAGE_NS_MASK (0xFFFFFFF7) -#define PAGE_NS_SHIFT (3) - -#define OFFSET_1M (0x00100000) -#define OFFSET_64K (0x00010000) -#define OFFSET_4K (0x00001000) - -#define DESCRIPTOR_FAULT (0x00000000) - -/* Attributes enumerations */ - -/* Region size attributes */ -typedef enum -{ - SECTION, - PAGE_4k, - PAGE_64k, -} mmu_region_size_Type; - -/* Region type attributes */ -typedef enum -{ - NORMAL, - DEVICE, - SHARED_DEVICE, - NON_SHARED_DEVICE, - STRONGLY_ORDERED -} mmu_memory_Type; - -/* Region cacheability attributes */ -typedef enum -{ - NON_CACHEABLE, - WB_WA, - WT, - WB_NO_WA, -} mmu_cacheability_Type; - -/* Region parity check attributes */ -typedef enum -{ - ECC_DISABLED, - ECC_ENABLED, -} mmu_ecc_check_Type; - -/* Region execution attributes */ -typedef enum -{ - EXECUTE, - NON_EXECUTE, -} mmu_execute_Type; - -/* Region global attributes */ -typedef enum -{ - GLOBAL, - NON_GLOBAL, -} mmu_global_Type; - -/* Region shareability attributes */ -typedef enum -{ - NON_SHARED, - SHARED, -} mmu_shared_Type; - -/* Region security attributes */ -typedef enum -{ - SECURE, - NON_SECURE, -} mmu_secure_Type; - -/* Region access attributes */ -typedef enum -{ - NO_ACCESS, - RW, - READ, -} mmu_access_Type; - -/* Memory Region definition */ -typedef struct RegionStruct { - mmu_region_size_Type rg_t; - mmu_memory_Type mem_t; - uint8_t domain; - mmu_cacheability_Type inner_norm_t; - mmu_cacheability_Type outer_norm_t; - mmu_ecc_check_Type e_t; - mmu_execute_Type xn_t; - mmu_global_Type g_t; - mmu_secure_Type sec_t; - mmu_access_Type priv_t; - mmu_access_Type user_t; - mmu_shared_Type sh_t; - -} mmu_region_attributes_Type; - -//Following macros define the descriptors and attributes -//Sect_Normal. Outer & inner wb/wa, non-shareable, executable, rw, domain 0 -#define section_normal(descriptor_l1, region) region.rg_t = SECTION; \ - region.domain = 0x0; \ - region.e_t = ECC_DISABLED; \ - region.g_t = GLOBAL; \ - region.inner_norm_t = WB_WA; \ - region.outer_norm_t = WB_WA; \ - region.mem_t = NORMAL; \ - region.sec_t = SECURE; \ - region.xn_t = EXECUTE; \ - region.priv_t = RW; \ - region.user_t = RW; \ - region.sh_t = NON_SHARED; \ - MMU_GetSectionDescriptor(&descriptor_l1, region); - -//Sect_Normal_NC. Outer & inner non-cacheable, non-shareable, executable, rw, domain 0 -#define section_normal_nc(descriptor_l1, region) region.rg_t = SECTION; \ - region.domain = 0x0; \ - region.e_t = ECC_DISABLED; \ - region.g_t = GLOBAL; \ - region.inner_norm_t = NON_CACHEABLE; \ - region.outer_norm_t = NON_CACHEABLE; \ - region.mem_t = NORMAL; \ - region.sec_t = SECURE; \ - region.xn_t = EXECUTE; \ - region.priv_t = RW; \ - region.user_t = RW; \ - region.sh_t = NON_SHARED; \ - MMU_GetSectionDescriptor(&descriptor_l1, region); - -//Sect_Normal_Cod. Outer & inner wb/wa, non-shareable, executable, ro, domain 0 -#define section_normal_cod(descriptor_l1, region) region.rg_t = SECTION; \ - region.domain = 0x0; \ - region.e_t = ECC_DISABLED; \ - region.g_t = GLOBAL; \ - region.inner_norm_t = WB_WA; \ - region.outer_norm_t = WB_WA; \ - region.mem_t = NORMAL; \ - region.sec_t = SECURE; \ - region.xn_t = EXECUTE; \ - region.priv_t = READ; \ - region.user_t = READ; \ - region.sh_t = NON_SHARED; \ - MMU_GetSectionDescriptor(&descriptor_l1, region); - -//Sect_Normal_RO. Sect_Normal_Cod, but not executable -#define section_normal_ro(descriptor_l1, region) region.rg_t = SECTION; \ - region.domain = 0x0; \ - region.e_t = ECC_DISABLED; \ - region.g_t = GLOBAL; \ - region.inner_norm_t = WB_WA; \ - region.outer_norm_t = WB_WA; \ - region.mem_t = NORMAL; \ - region.sec_t = SECURE; \ - region.xn_t = NON_EXECUTE; \ - region.priv_t = READ; \ - region.user_t = READ; \ - region.sh_t = NON_SHARED; \ - MMU_GetSectionDescriptor(&descriptor_l1, region); - -//Sect_Normal_RW. Sect_Normal_Cod, but writeable and not executable -#define section_normal_rw(descriptor_l1, region) region.rg_t = SECTION; \ - region.domain = 0x0; \ - region.e_t = ECC_DISABLED; \ - region.g_t = GLOBAL; \ - region.inner_norm_t = WB_WA; \ - region.outer_norm_t = WB_WA; \ - region.mem_t = NORMAL; \ - region.sec_t = SECURE; \ - region.xn_t = NON_EXECUTE; \ - region.priv_t = RW; \ - region.user_t = RW; \ - region.sh_t = NON_SHARED; \ - MMU_GetSectionDescriptor(&descriptor_l1, region); -//Sect_SO. Strongly-ordered (therefore shareable), not executable, rw, domain 0, base addr 0 -#define section_so(descriptor_l1, region) region.rg_t = SECTION; \ - region.domain = 0x0; \ - region.e_t = ECC_DISABLED; \ - region.g_t = GLOBAL; \ - region.inner_norm_t = NON_CACHEABLE; \ - region.outer_norm_t = NON_CACHEABLE; \ - region.mem_t = STRONGLY_ORDERED; \ - region.sec_t = SECURE; \ - region.xn_t = NON_EXECUTE; \ - region.priv_t = RW; \ - region.user_t = RW; \ - region.sh_t = NON_SHARED; \ - MMU_GetSectionDescriptor(&descriptor_l1, region); - -//Sect_Device_RO. Device, non-shareable, non-executable, ro, domain 0, base addr 0 -#define section_device_ro(descriptor_l1, region) region.rg_t = SECTION; \ - region.domain = 0x0; \ - region.e_t = ECC_DISABLED; \ - region.g_t = GLOBAL; \ - region.inner_norm_t = NON_CACHEABLE; \ - region.outer_norm_t = NON_CACHEABLE; \ - region.mem_t = STRONGLY_ORDERED; \ - region.sec_t = SECURE; \ - region.xn_t = NON_EXECUTE; \ - region.priv_t = READ; \ - region.user_t = READ; \ - region.sh_t = NON_SHARED; \ - MMU_GetSectionDescriptor(&descriptor_l1, region); - -//Sect_Device_RW. Sect_Device_RO, but writeable -#define section_device_rw(descriptor_l1, region) region.rg_t = SECTION; \ - region.domain = 0x0; \ - region.e_t = ECC_DISABLED; \ - region.g_t = GLOBAL; \ - region.inner_norm_t = NON_CACHEABLE; \ - region.outer_norm_t = NON_CACHEABLE; \ - region.mem_t = STRONGLY_ORDERED; \ - region.sec_t = SECURE; \ - region.xn_t = NON_EXECUTE; \ - region.priv_t = RW; \ - region.user_t = RW; \ - region.sh_t = NON_SHARED; \ - MMU_GetSectionDescriptor(&descriptor_l1, region); -//Page_4k_Device_RW. Shared device, not executable, rw, domain 0 -#define page4k_device_rw(descriptor_l1, descriptor_l2, region) region.rg_t = PAGE_4k; \ - region.domain = 0x0; \ - region.e_t = ECC_DISABLED; \ - region.g_t = GLOBAL; \ - region.inner_norm_t = NON_CACHEABLE; \ - region.outer_norm_t = NON_CACHEABLE; \ - region.mem_t = SHARED_DEVICE; \ - region.sec_t = SECURE; \ - region.xn_t = NON_EXECUTE; \ - region.priv_t = RW; \ - region.user_t = RW; \ - region.sh_t = NON_SHARED; \ - MMU_GetPageDescriptor(&descriptor_l1, &descriptor_l2, region); - -//Page_64k_Device_RW. Shared device, not executable, rw, domain 0 -#define page64k_device_rw(descriptor_l1, descriptor_l2, region) region.rg_t = PAGE_64k; \ - region.domain = 0x0; \ - region.e_t = ECC_DISABLED; \ - region.g_t = GLOBAL; \ - region.inner_norm_t = NON_CACHEABLE; \ - region.outer_norm_t = NON_CACHEABLE; \ - region.mem_t = SHARED_DEVICE; \ - region.sec_t = SECURE; \ - region.xn_t = NON_EXECUTE; \ - region.priv_t = RW; \ - region.user_t = RW; \ - region.sh_t = NON_SHARED; \ - MMU_GetPageDescriptor(&descriptor_l1, &descriptor_l2, region); - -/** \brief Set section execution-never attribute - - \param [out] descriptor_l1 L1 descriptor. - \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE. - - \return 0 -*/ -__STATIC_INLINE int MMU_XNSection(uint32_t *descriptor_l1, mmu_execute_Type xn) -{ - *descriptor_l1 &= SECTION_XN_MASK; - *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT); - return 0; -} - -/** \brief Set section domain - - \param [out] descriptor_l1 L1 descriptor. - \param [in] domain Section domain - - \return 0 -*/ -__STATIC_INLINE int MMU_DomainSection(uint32_t *descriptor_l1, uint8_t domain) -{ - *descriptor_l1 &= SECTION_DOMAIN_MASK; - *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT); - return 0; -} - -/** \brief Set section parity check - - \param [out] descriptor_l1 L1 descriptor. - \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED - - \return 0 -*/ -__STATIC_INLINE int MMU_PSection(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit) -{ - *descriptor_l1 &= SECTION_P_MASK; - *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT); - return 0; -} - -/** \brief Set section access privileges - - \param [out] descriptor_l1 L1 descriptor. - \param [in] user User Level Access: NO_ACCESS, RW, READ - \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ - \param [in] afe Access flag enable - - \return 0 -*/ -__STATIC_INLINE int MMU_APSection(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe) -{ - uint32_t ap = 0; - - if (afe == 0) { //full access - if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; } - else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } - else if ((priv == RW) && (user == READ)) { ap = 0x2; } - else if ((priv == RW) && (user == RW)) { ap = 0x3; } - else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } - else if ((priv == READ) && (user == READ)) { ap = 0x7; } - } - - else { //Simplified access - if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } - else if ((priv == RW) && (user == RW)) { ap = 0x3; } - else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } - else if ((priv == READ) && (user == READ)) { ap = 0x7; } - } - - *descriptor_l1 &= SECTION_AP_MASK; - *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT; - *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT; - - return 0; -} - -/** \brief Set section shareability - - \param [out] descriptor_l1 L1 descriptor. - \param [in] s_bit Section shareability: NON_SHARED, SHARED - - \return 0 -*/ -__STATIC_INLINE int MMU_SharedSection(uint32_t *descriptor_l1, mmu_shared_Type s_bit) -{ - *descriptor_l1 &= SECTION_S_MASK; - *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT); - return 0; -} - -/** \brief Set section Global attribute - - \param [out] descriptor_l1 L1 descriptor. - \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL - - \return 0 -*/ -__STATIC_INLINE int MMU_GlobalSection(uint32_t *descriptor_l1, mmu_global_Type g_bit) -{ - *descriptor_l1 &= SECTION_NG_MASK; - *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT); - return 0; -} - -/** \brief Set section Security attribute - - \param [out] descriptor_l1 L1 descriptor. - \param [in] s_bit Section Security attribute: SECURE, NON_SECURE - - \return 0 -*/ -__STATIC_INLINE int MMU_SecureSection(uint32_t *descriptor_l1, mmu_secure_Type s_bit) -{ - *descriptor_l1 &= SECTION_NS_MASK; - *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT); - return 0; -} - -/* Page 4k or 64k */ -/** \brief Set 4k/64k page execution-never attribute - - \param [out] descriptor_l2 L2 descriptor. - \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE. - \param [in] page Page size: PAGE_4k, PAGE_64k, - - \return 0 -*/ -__STATIC_INLINE int MMU_XNPage(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page) -{ - if (page == PAGE_4k) - { - *descriptor_l2 &= PAGE_XN_4K_MASK; - *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT); - } - else - { - *descriptor_l2 &= PAGE_XN_64K_MASK; - *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT); - } - return 0; -} - -/** \brief Set 4k/64k page domain - - \param [out] descriptor_l1 L1 descriptor. - \param [in] domain Page domain - - \return 0 -*/ -__STATIC_INLINE int MMU_DomainPage(uint32_t *descriptor_l1, uint8_t domain) -{ - *descriptor_l1 &= PAGE_DOMAIN_MASK; - *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT); - return 0; -} - -/** \brief Set 4k/64k page parity check - - \param [out] descriptor_l1 L1 descriptor. - \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED - - \return 0 -*/ -__STATIC_INLINE int MMU_PPage(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit) -{ - *descriptor_l1 &= SECTION_P_MASK; - *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT); - return 0; -} - -/** \brief Set 4k/64k page access privileges - - \param [out] descriptor_l2 L2 descriptor. - \param [in] user User Level Access: NO_ACCESS, RW, READ - \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ - \param [in] afe Access flag enable - - \return 0 -*/ -__STATIC_INLINE int MMU_APPage(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe) -{ - uint32_t ap = 0; - - if (afe == 0) { //full access - if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; } - else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } - else if ((priv == RW) && (user == READ)) { ap = 0x2; } - else if ((priv == RW) && (user == RW)) { ap = 0x3; } - else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } - else if ((priv == READ) && (user == READ)) { ap = 0x6; } - } - - else { //Simplified access - if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } - else if ((priv == RW) && (user == RW)) { ap = 0x3; } - else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } - else if ((priv == READ) && (user == READ)) { ap = 0x7; } - } - - *descriptor_l2 &= PAGE_AP_MASK; - *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT; - *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT; - - return 0; -} - -/** \brief Set 4k/64k page shareability - - \param [out] descriptor_l2 L2 descriptor. - \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED - - \return 0 -*/ -__STATIC_INLINE int MMU_SharedPage(uint32_t *descriptor_l2, mmu_shared_Type s_bit) -{ - *descriptor_l2 &= PAGE_S_MASK; - *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT); - return 0; -} - -/** \brief Set 4k/64k page Global attribute - - \param [out] descriptor_l2 L2 descriptor. - \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL - - \return 0 -*/ -__STATIC_INLINE int MMU_GlobalPage(uint32_t *descriptor_l2, mmu_global_Type g_bit) -{ - *descriptor_l2 &= PAGE_NG_MASK; - *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT); - return 0; -} - -/** \brief Set 4k/64k page Security attribute - - \param [out] descriptor_l1 L1 descriptor. - \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE - - \return 0 -*/ -__STATIC_INLINE int MMU_SecurePage(uint32_t *descriptor_l1, mmu_secure_Type s_bit) -{ - *descriptor_l1 &= PAGE_NS_MASK; - *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT); - return 0; -} - -/** \brief Set Section memory attributes - - \param [out] descriptor_l1 L1 descriptor. - \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED - \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, - \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, - - \return 0 -*/ -__STATIC_INLINE int MMU_MemorySection(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner) -{ - *descriptor_l1 &= SECTION_TEXCB_MASK; - - if (STRONGLY_ORDERED == mem) - { - return 0; - } - else if (SHARED_DEVICE == mem) - { - *descriptor_l1 |= (1 << SECTION_B_SHIFT); - } - else if (NON_SHARED_DEVICE == mem) - { - *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT); - } - else if (NORMAL == mem) - { - *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT; - switch(inner) - { - case NON_CACHEABLE: - break; - case WB_WA: - *descriptor_l1 |= (1 << SECTION_B_SHIFT); - break; - case WT: - *descriptor_l1 |= 1 << SECTION_C_SHIFT; - break; - case WB_NO_WA: - *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT); - break; - } - switch(outer) - { - case NON_CACHEABLE: - break; - case WB_WA: - *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT); - break; - case WT: - *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT; - break; - case WB_NO_WA: - *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT); - break; - } - } - return 0; -} - -/** \brief Set 4k/64k page memory attributes - - \param [out] descriptor_l2 L2 descriptor. - \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED - \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, - \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, - \param [in] page Page size - - \return 0 -*/ -__STATIC_INLINE int MMU_MemoryPage(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page) -{ - *descriptor_l2 &= PAGE_4K_TEXCB_MASK; - - if (page == PAGE_64k) - { - //same as section - MMU_MemorySection(descriptor_l2, mem, outer, inner); - } - else - { - if (STRONGLY_ORDERED == mem) - { - return 0; - } - else if (SHARED_DEVICE == mem) - { - *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT); - } - else if (NON_SHARED_DEVICE == mem) - { - *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT); - } - else if (NORMAL == mem) - { - *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT; - switch(inner) - { - case NON_CACHEABLE: - break; - case WB_WA: - *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT); - break; - case WT: - *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT; - break; - case WB_NO_WA: - *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT); - break; - } - switch(outer) - { - case NON_CACHEABLE: - break; - case WB_WA: - *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT); - break; - case WT: - *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT; - break; - case WB_NO_WA: - *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT); - break; - } - } - } - - return 0; -} - -/** \brief Create a L1 section descriptor - - \param [out] descriptor L1 descriptor - \param [in] reg Section attributes - - \return 0 -*/ -__STATIC_INLINE int MMU_GetSectionDescriptor(uint32_t *descriptor, mmu_region_attributes_Type reg) -{ - *descriptor = 0; - - MMU_MemorySection(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t); - MMU_XNSection(descriptor,reg.xn_t); - MMU_DomainSection(descriptor, reg.domain); - MMU_PSection(descriptor, reg.e_t); - MMU_APSection(descriptor, reg.priv_t, reg.user_t, 1); - MMU_SharedSection(descriptor,reg.sh_t); - MMU_GlobalSection(descriptor,reg.g_t); - MMU_SecureSection(descriptor,reg.sec_t); - *descriptor &= SECTION_MASK; - *descriptor |= SECTION_DESCRIPTOR; - - return 0; -} - - -/** \brief Create a L1 and L2 4k/64k page descriptor - - \param [out] descriptor L1 descriptor - \param [out] descriptor2 L2 descriptor - \param [in] reg 4k/64k page attributes - - \return 0 -*/ -__STATIC_INLINE int MMU_GetPageDescriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg) -{ - *descriptor = 0; - *descriptor2 = 0; - - switch (reg.rg_t) - { - case PAGE_4k: - MMU_MemoryPage(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k); - MMU_XNPage(descriptor2, reg.xn_t, PAGE_4k); - MMU_DomainPage(descriptor, reg.domain); - MMU_PPage(descriptor, reg.e_t); - MMU_APPage(descriptor2, reg.priv_t, reg.user_t, 1); - MMU_SharedPage(descriptor2,reg.sh_t); - MMU_GlobalPage(descriptor2,reg.g_t); - MMU_SecurePage(descriptor,reg.sec_t); - *descriptor &= PAGE_L1_MASK; - *descriptor |= PAGE_L1_DESCRIPTOR; - *descriptor2 &= PAGE_L2_4K_MASK; - *descriptor2 |= PAGE_L2_4K_DESC; - break; - - case PAGE_64k: - MMU_MemoryPage(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k); - MMU_XNPage(descriptor2, reg.xn_t, PAGE_64k); - MMU_DomainPage(descriptor, reg.domain); - MMU_PPage(descriptor, reg.e_t); - MMU_APPage(descriptor2, reg.priv_t, reg.user_t, 1); - MMU_SharedPage(descriptor2,reg.sh_t); - MMU_GlobalPage(descriptor2,reg.g_t); - MMU_SecurePage(descriptor,reg.sec_t); - *descriptor &= PAGE_L1_MASK; - *descriptor |= PAGE_L1_DESCRIPTOR; - *descriptor2 &= PAGE_L2_64K_MASK; - *descriptor2 |= PAGE_L2_64K_DESC; - break; - - case SECTION: - //error - break; - } - - return 0; -} - -/** \brief Create a 1MB Section - - \param [in] ttb Translation table base address - \param [in] base_address Section base address - \param [in] count Number of sections to create - \param [in] descriptor_l1 L1 descriptor (region attributes) - -*/ -__STATIC_INLINE void MMU_TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1) -{ - uint32_t offset; - uint32_t entry; - uint32_t i; - - offset = base_address >> 20; - entry = (base_address & 0xFFF00000) | descriptor_l1; - - //4 bytes aligned - ttb = ttb + offset; - - for (i = 0; i < count; i++ ) - { - //4 bytes aligned - *ttb++ = entry; - entry += OFFSET_1M; - } -} - -/** \brief Create a 4k page entry - - \param [in] ttb L1 table base address - \param [in] base_address 4k base address - \param [in] count Number of 4k pages to create - \param [in] descriptor_l1 L1 descriptor (region attributes) - \param [in] ttb_l2 L2 table base address - \param [in] descriptor_l2 L2 descriptor (region attributes) - -*/ -__STATIC_INLINE void MMU_TTPage4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 ) -{ - - uint32_t offset, offset2; - uint32_t entry, entry2; - uint32_t i; - - offset = base_address >> 20; - entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1; - - //4 bytes aligned - ttb += offset; - //create l1_entry - *ttb = entry; - - offset2 = (base_address & 0xff000) >> 12; - ttb_l2 += offset2; - entry2 = (base_address & 0xFFFFF000) | descriptor_l2; - for (i = 0; i < count; i++ ) - { - //4 bytes aligned - *ttb_l2++ = entry2; - entry2 += OFFSET_4K; - } -} - -/** \brief Create a 64k page entry - - \param [in] ttb L1 table base address - \param [in] base_address 64k base address - \param [in] count Number of 64k pages to create - \param [in] descriptor_l1 L1 descriptor (region attributes) - \param [in] ttb_l2 L2 table base address - \param [in] descriptor_l2 L2 descriptor (region attributes) - -*/ -__STATIC_INLINE void MMU_TTPage64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 ) -{ - uint32_t offset, offset2; - uint32_t entry, entry2; - uint32_t i,j; - - - offset = base_address >> 20; - entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1; - - //4 bytes aligned - ttb += offset; - //create l1_entry - *ttb = entry; - - offset2 = (base_address & 0xff000) >> 12; - ttb_l2 += offset2; - entry2 = (base_address & 0xFFFF0000) | descriptor_l2; - for (i = 0; i < count; i++ ) - { - //create 16 entries - for (j = 0; j < 16; j++) - { - //4 bytes aligned - *ttb_l2++ = entry2; - } - entry2 += OFFSET_64K; - } -} - -/** \brief Enable MMU -*/ -__STATIC_INLINE void MMU_Enable(void) -{ - // Set M bit 0 to enable the MMU - // Set AFE bit to enable simplified access permissions model - // Clear TRE bit to disable TEX remap and A bit to disable strict alignment fault checking - __set_SCTLR( (__get_SCTLR() & ~(1 << 28) & ~(1 << 1)) | 1 | (1 << 29)); - __ISB(); -} - -/** \brief Disable MMU -*/ -__STATIC_INLINE void MMU_Disable(void) -{ - // Clear M bit 0 to disable the MMU - __set_SCTLR( __get_SCTLR() & ~1); - __ISB(); -} - -/** \brief Invalidate entire unified TLB -*/ - -__STATIC_INLINE void MMU_InvalidateTLB(void) -{ - __set_TLBIALL(0); - __DSB(); //ensure completion of the invalidation - __ISB(); //ensure instruction fetch path sees new state -} - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CA_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Drivers/CMSIS/Core_A/Include/irq_ctrl.h b/Drivers/CMSIS/Core_A/Include/irq_ctrl.h deleted file mode 100644 index e52e14a..0000000 --- a/Drivers/CMSIS/Core_A/Include/irq_ctrl.h +++ /dev/null @@ -1,192 +0,0 @@ -/**************************************************************************//** - * @file irq_ctrl.h - * @brief Interrupt Controller API header file - * @version V1.1.0 - * @date 03. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2017-2020 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef IRQ_CTRL_H_ -#define IRQ_CTRL_H_ - -#include - -#ifndef IRQHANDLER_T -#define IRQHANDLER_T -/// Interrupt handler data type -typedef void (*IRQHandler_t) (void); -#endif - -#ifndef IRQN_ID_T -#define IRQN_ID_T -/// Interrupt ID number data type -typedef int32_t IRQn_ID_t; -#endif - -/* Interrupt mode bit-masks */ -#define IRQ_MODE_TRIG_Pos (0U) -#define IRQ_MODE_TRIG_Msk (0x07UL /*<< IRQ_MODE_TRIG_Pos*/) -#define IRQ_MODE_TRIG_LEVEL (0x00UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: level triggered interrupt -#define IRQ_MODE_TRIG_LEVEL_LOW (0x01UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: low level triggered interrupt -#define IRQ_MODE_TRIG_LEVEL_HIGH (0x02UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: high level triggered interrupt -#define IRQ_MODE_TRIG_EDGE (0x04UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: edge triggered interrupt -#define IRQ_MODE_TRIG_EDGE_RISING (0x05UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising edge triggered interrupt -#define IRQ_MODE_TRIG_EDGE_FALLING (0x06UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: falling edge triggered interrupt -#define IRQ_MODE_TRIG_EDGE_BOTH (0x07UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising and falling edge triggered interrupt - -#define IRQ_MODE_TYPE_Pos (3U) -#define IRQ_MODE_TYPE_Msk (0x01UL << IRQ_MODE_TYPE_Pos) -#define IRQ_MODE_TYPE_IRQ (0x00UL << IRQ_MODE_TYPE_Pos) ///< Type: interrupt source triggers CPU IRQ line -#define IRQ_MODE_TYPE_FIQ (0x01UL << IRQ_MODE_TYPE_Pos) ///< Type: interrupt source triggers CPU FIQ line - -#define IRQ_MODE_DOMAIN_Pos (4U) -#define IRQ_MODE_DOMAIN_Msk (0x01UL << IRQ_MODE_DOMAIN_Pos) -#define IRQ_MODE_DOMAIN_NONSECURE (0x00UL << IRQ_MODE_DOMAIN_Pos) ///< Domain: interrupt is targeting non-secure domain -#define IRQ_MODE_DOMAIN_SECURE (0x01UL << IRQ_MODE_DOMAIN_Pos) ///< Domain: interrupt is targeting secure domain - -#define IRQ_MODE_CPU_Pos (5U) -#define IRQ_MODE_CPU_Msk (0xFFUL << IRQ_MODE_CPU_Pos) -#define IRQ_MODE_CPU_ALL (0x00UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets all CPUs -#define IRQ_MODE_CPU_0 (0x01UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 0 -#define IRQ_MODE_CPU_1 (0x02UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 1 -#define IRQ_MODE_CPU_2 (0x04UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 2 -#define IRQ_MODE_CPU_3 (0x08UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 3 -#define IRQ_MODE_CPU_4 (0x10UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 4 -#define IRQ_MODE_CPU_5 (0x20UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 5 -#define IRQ_MODE_CPU_6 (0x40UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 6 -#define IRQ_MODE_CPU_7 (0x80UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 7 - -// Encoding in some early GIC implementations -#define IRQ_MODE_MODEL_Pos (13U) -#define IRQ_MODE_MODEL_Msk (0x1UL << IRQ_MODE_MODEL_Pos) -#define IRQ_MODE_MODEL_NN (0x0UL << IRQ_MODE_MODEL_Pos) ///< Corresponding interrupt is handled using the N-N model -#define IRQ_MODE_MODEL_1N (0x1UL << IRQ_MODE_MODEL_Pos) ///< Corresponding interrupt is handled using the 1-N model - -#define IRQ_MODE_ERROR (0x80000000UL) ///< Bit indicating mode value error - -/* Interrupt priority bit-masks */ -#define IRQ_PRIORITY_Msk (0x0000FFFFUL) ///< Interrupt priority value bit-mask -#define IRQ_PRIORITY_ERROR (0x80000000UL) ///< Bit indicating priority value error - -/// Initialize interrupt controller. -/// \return 0 on success, -1 on error. -int32_t IRQ_Initialize (void); - -/// Register interrupt handler. -/// \param[in] irqn interrupt ID number -/// \param[in] handler interrupt handler function address -/// \return 0 on success, -1 on error. -int32_t IRQ_SetHandler (IRQn_ID_t irqn, IRQHandler_t handler); - -/// Get the registered interrupt handler. -/// \param[in] irqn interrupt ID number -/// \return registered interrupt handler function address. -IRQHandler_t IRQ_GetHandler (IRQn_ID_t irqn); - -/// Enable interrupt. -/// \param[in] irqn interrupt ID number -/// \return 0 on success, -1 on error. -int32_t IRQ_Enable (IRQn_ID_t irqn); - -/// Disable interrupt. -/// \param[in] irqn interrupt ID number -/// \return 0 on success, -1 on error. -int32_t IRQ_Disable (IRQn_ID_t irqn); - -/// Get interrupt enable state. -/// \param[in] irqn interrupt ID number -/// \return 0 - interrupt is disabled, 1 - interrupt is enabled. -uint32_t IRQ_GetEnableState (IRQn_ID_t irqn); - -/// Configure interrupt request mode. -/// \param[in] irqn interrupt ID number -/// \param[in] mode mode configuration -/// \return 0 on success, -1 on error. -int32_t IRQ_SetMode (IRQn_ID_t irqn, uint32_t mode); - -/// Get interrupt mode configuration. -/// \param[in] irqn interrupt ID number -/// \return current interrupt mode configuration with optional IRQ_MODE_ERROR bit set. -uint32_t IRQ_GetMode (IRQn_ID_t irqn); - -/// Get ID number of current interrupt request (IRQ). -/// \return interrupt ID number. -IRQn_ID_t IRQ_GetActiveIRQ (void); - -/// Get ID number of current fast interrupt request (FIQ). -/// \return interrupt ID number. -IRQn_ID_t IRQ_GetActiveFIQ (void); - -/// Signal end of interrupt processing. -/// \param[in] irqn interrupt ID number -/// \return 0 on success, -1 on error. -int32_t IRQ_EndOfInterrupt (IRQn_ID_t irqn); - -/// Set interrupt pending flag. -/// \param[in] irqn interrupt ID number -/// \return 0 on success, -1 on error. -int32_t IRQ_SetPending (IRQn_ID_t irqn); - -/// Get interrupt pending flag. -/// \param[in] irqn interrupt ID number -/// \return 0 - interrupt is not pending, 1 - interrupt is pending. -uint32_t IRQ_GetPending (IRQn_ID_t irqn); - -/// Clear interrupt pending flag. -/// \param[in] irqn interrupt ID number -/// \return 0 on success, -1 on error. -int32_t IRQ_ClearPending (IRQn_ID_t irqn); - -/// Set interrupt priority value. -/// \param[in] irqn interrupt ID number -/// \param[in] priority interrupt priority value -/// \return 0 on success, -1 on error. -int32_t IRQ_SetPriority (IRQn_ID_t irqn, uint32_t priority); - -/// Get interrupt priority. -/// \param[in] irqn interrupt ID number -/// \return current interrupt priority value with optional IRQ_PRIORITY_ERROR bit set. -uint32_t IRQ_GetPriority (IRQn_ID_t irqn); - -/// Set priority masking threshold. -/// \param[in] priority priority masking threshold value -/// \return 0 on success, -1 on error. -int32_t IRQ_SetPriorityMask (uint32_t priority); - -/// Get priority masking threshold -/// \return current priority masking threshold value with optional IRQ_PRIORITY_ERROR bit set. -uint32_t IRQ_GetPriorityMask (void); - -/// Set priority grouping field split point -/// \param[in] bits number of MSB bits included in the group priority field comparison -/// \return 0 on success, -1 on error. -int32_t IRQ_SetPriorityGroupBits (uint32_t bits); - -/// Get priority grouping field split point -/// \return current number of MSB bits included in the group priority field comparison with -/// optional IRQ_PRIORITY_ERROR bit set. -uint32_t IRQ_GetPriorityGroupBits (void); - -#endif // IRQ_CTRL_H_ diff --git a/Drivers/CMSIS/Core_A/Source/irq_ctrl_gic.c b/Drivers/CMSIS/Core_A/Source/irq_ctrl_gic.c deleted file mode 100644 index affaf81..0000000 --- a/Drivers/CMSIS/Core_A/Source/irq_ctrl_gic.c +++ /dev/null @@ -1,418 +0,0 @@ -/**************************************************************************//** - * @file irq_ctrl_gic.c - * @brief Interrupt controller handling implementation for GIC - * @version V1.1.1 - * @date 29. March 2021 - ******************************************************************************/ -/* - * Copyright (c) 2017-2021 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include - -#include "RTE_Components.h" -#include CMSIS_device_header - -#include "irq_ctrl.h" - -#if defined(__GIC_PRESENT) && (__GIC_PRESENT == 1U) - -/// Number of implemented interrupt lines -#ifndef IRQ_GIC_LINE_COUNT -#define IRQ_GIC_LINE_COUNT (1020U) -#endif - -static IRQHandler_t IRQTable[IRQ_GIC_LINE_COUNT] = { 0U }; -static uint32_t IRQ_ID0; - -/// Initialize interrupt controller. -__WEAK int32_t IRQ_Initialize (void) { - uint32_t i; - - for (i = 0U; i < IRQ_GIC_LINE_COUNT; i++) { - IRQTable[i] = (IRQHandler_t)NULL; - } - GIC_Enable(); - return (0); -} - - -/// Register interrupt handler. -__WEAK int32_t IRQ_SetHandler (IRQn_ID_t irqn, IRQHandler_t handler) { - int32_t status; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - IRQTable[irqn] = handler; - status = 0; - } else { - status = -1; - } - - return (status); -} - - -/// Get the registered interrupt handler. -__WEAK IRQHandler_t IRQ_GetHandler (IRQn_ID_t irqn) { - IRQHandler_t h; - - // Ignore CPUID field (software generated interrupts) - irqn &= 0x3FFU; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - h = IRQTable[irqn]; - } else { - h = (IRQHandler_t)0; - } - - return (h); -} - - -/// Enable interrupt. -__WEAK int32_t IRQ_Enable (IRQn_ID_t irqn) { - int32_t status; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - GIC_EnableIRQ ((IRQn_Type)irqn); - status = 0; - } else { - status = -1; - } - - return (status); -} - - -/// Disable interrupt. -__WEAK int32_t IRQ_Disable (IRQn_ID_t irqn) { - int32_t status; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - GIC_DisableIRQ ((IRQn_Type)irqn); - status = 0; - } else { - status = -1; - } - - return (status); -} - - -/// Get interrupt enable state. -__WEAK uint32_t IRQ_GetEnableState (IRQn_ID_t irqn) { - uint32_t enable; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - enable = GIC_GetEnableIRQ((IRQn_Type)irqn); - } else { - enable = 0U; - } - - return (enable); -} - - -/// Configure interrupt request mode. -__WEAK int32_t IRQ_SetMode (IRQn_ID_t irqn, uint32_t mode) { - uint32_t val; - uint8_t cfg; - uint8_t secure; - uint8_t cpu; - int32_t status = 0; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - // Check triggering mode - val = (mode & IRQ_MODE_TRIG_Msk); - - if (val == IRQ_MODE_TRIG_LEVEL) { - cfg = 0x00U; - } else if (val == IRQ_MODE_TRIG_EDGE) { - cfg = 0x02U; - } else { - cfg = 0x00U; - status = -1; - } - - val = (mode & IRQ_MODE_MODEL_Msk); - if (val == IRQ_MODE_MODEL_1N) { - cfg |= 1; // 1-N model - } - - // Check interrupt type - val = mode & IRQ_MODE_TYPE_Msk; - - if (val != IRQ_MODE_TYPE_IRQ) { - status = -1; - } - - // Check interrupt domain - val = mode & IRQ_MODE_DOMAIN_Msk; - - if (val == IRQ_MODE_DOMAIN_NONSECURE) { - secure = 0U; - } else { - // Check security extensions support - val = GIC_DistributorInfo() & (1UL << 10U); - - if (val != 0U) { - // Security extensions are supported - secure = 1U; - } else { - secure = 0U; - status = -1; - } - } - - // Check interrupt CPU targets - val = mode & IRQ_MODE_CPU_Msk; - - if (val == IRQ_MODE_CPU_ALL) { - cpu = 0xFFU; - } else { - cpu = (uint8_t)(val >> IRQ_MODE_CPU_Pos); - } - - // Apply configuration if no mode error - if (status == 0) { - GIC_SetConfiguration((IRQn_Type)irqn, cfg); - GIC_SetTarget ((IRQn_Type)irqn, cpu); - - if (secure != 0U) { - GIC_SetGroup ((IRQn_Type)irqn, secure); - } - } - } - - return (status); -} - - -/// Get interrupt mode configuration. -__WEAK uint32_t IRQ_GetMode (IRQn_ID_t irqn) { - uint32_t mode; - uint32_t val; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - mode = IRQ_MODE_TYPE_IRQ; - - // Get trigger mode - val = GIC_GetConfiguration((IRQn_Type)irqn); - - if ((val & 2U) != 0U) { - // Corresponding interrupt is edge triggered - mode |= IRQ_MODE_TRIG_EDGE; - } else { - // Corresponding interrupt is level triggered - mode |= IRQ_MODE_TRIG_LEVEL; - } - - if (val & 1U) { - mode |= IRQ_MODE_MODEL_1N; - } - // Get interrupt CPU targets - mode |= GIC_GetTarget ((IRQn_Type)irqn) << IRQ_MODE_CPU_Pos; - - } else { - mode = IRQ_MODE_ERROR; - } - - return (mode); -} - - -/// Get ID number of current interrupt request (IRQ). -__WEAK IRQn_ID_t IRQ_GetActiveIRQ (void) { - IRQn_ID_t irqn; - uint32_t prio; - - /* Dummy read to avoid GIC 390 errata 801120 */ - GIC_GetHighPendingIRQ(); - - irqn = GIC_AcknowledgePending(); - - __DSB(); - - /* Workaround GIC 390 errata 733075 (GIC-390_Errata_Notice_v6.pdf, 09-Jul-2014) */ - /* The following workaround code is for a single-core system. It would be */ - /* different in a multi-core system. */ - /* If the ID is 0 or 0x3FE or 0x3FF, then the GIC CPU interface may be locked-up */ - /* so unlock it, otherwise service the interrupt as normal. */ - /* Special IDs 1020=0x3FC and 1021=0x3FD are reserved values in GICv1 and GICv2 */ - /* so will not occur here. */ - - if ((irqn == 0) || (irqn >= 0x3FE)) { - /* Unlock the CPU interface with a dummy write to Interrupt Priority Register */ - prio = GIC_GetPriority((IRQn_Type)0); - GIC_SetPriority ((IRQn_Type)0, prio); - - __DSB(); - - if ((irqn == 0U) && ((GIC_GetIRQStatus ((IRQn_Type)irqn) & 1U) != 0U) && (IRQ_ID0 == 0U)) { - /* If the ID is 0, is active and has not been seen before */ - IRQ_ID0 = 1U; - } - /* End of Workaround GIC 390 errata 733075 */ - } - - return (irqn); -} - - -/// Get ID number of current fast interrupt request (FIQ). -__WEAK IRQn_ID_t IRQ_GetActiveFIQ (void) { - return ((IRQn_ID_t)-1); -} - - -/// Signal end of interrupt processing. -__WEAK int32_t IRQ_EndOfInterrupt (IRQn_ID_t irqn) { - int32_t status; - IRQn_Type irq = (IRQn_Type)irqn; - - irqn &= 0x3FFU; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - GIC_EndInterrupt (irq); - - if (irqn == 0) { - IRQ_ID0 = 0U; - } - - status = 0; - } else { - status = -1; - } - - return (status); -} - - -/// Set interrupt pending flag. -__WEAK int32_t IRQ_SetPending (IRQn_ID_t irqn) { - int32_t status; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - GIC_SetPendingIRQ ((IRQn_Type)irqn); - status = 0; - } else { - status = -1; - } - - return (status); -} - -/// Get interrupt pending flag. -__WEAK uint32_t IRQ_GetPending (IRQn_ID_t irqn) { - uint32_t pending; - - if ((irqn >= 16) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - pending = GIC_GetPendingIRQ ((IRQn_Type)irqn); - } else { - pending = 0U; - } - - return (pending & 1U); -} - - -/// Clear interrupt pending flag. -__WEAK int32_t IRQ_ClearPending (IRQn_ID_t irqn) { - int32_t status; - - if ((irqn >= 16) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - GIC_ClearPendingIRQ ((IRQn_Type)irqn); - status = 0; - } else { - status = -1; - } - - return (status); -} - - -/// Set interrupt priority value. -__WEAK int32_t IRQ_SetPriority (IRQn_ID_t irqn, uint32_t priority) { - int32_t status; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - GIC_SetPriority ((IRQn_Type)irqn, priority); - status = 0; - } else { - status = -1; - } - - return (status); -} - - -/// Get interrupt priority. -__WEAK uint32_t IRQ_GetPriority (IRQn_ID_t irqn) { - uint32_t priority; - - if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) { - priority = GIC_GetPriority ((IRQn_Type)irqn); - } else { - priority = IRQ_PRIORITY_ERROR; - } - - return (priority); -} - - -/// Set priority masking threshold. -__WEAK int32_t IRQ_SetPriorityMask (uint32_t priority) { - GIC_SetInterfacePriorityMask (priority); - return (0); -} - - -/// Get priority masking threshold -__WEAK uint32_t IRQ_GetPriorityMask (void) { - return GIC_GetInterfacePriorityMask(); -} - - -/// Set priority grouping field split point -__WEAK int32_t IRQ_SetPriorityGroupBits (uint32_t bits) { - int32_t status; - - if (bits == IRQ_PRIORITY_Msk) { - bits = 7U; - } - - if (bits < 8U) { - GIC_SetBinaryPoint (7U - bits); - status = 0; - } else { - status = -1; - } - - return (status); -} - - -/// Get priority grouping field split point -__WEAK uint32_t IRQ_GetPriorityGroupBits (void) { - uint32_t bp; - - bp = GIC_GetBinaryPoint() & 0x07U; - - return (7U - bp); -} - -#endif diff --git a/Drivers/CMSIS/DAP/Firmware/Config/DAP_config.h b/Drivers/CMSIS/DAP/Firmware/Config/DAP_config.h deleted file mode 100644 index d4de40f..0000000 --- a/Drivers/CMSIS/DAP/Firmware/Config/DAP_config.h +++ /dev/null @@ -1,561 +0,0 @@ -/* - * Copyright (c) 2013-2021 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 16. June 2021 - * $Revision: V2.1.0 - * - * Project: CMSIS-DAP Configuration - * Title: DAP_config.h CMSIS-DAP Configuration File (Template) - * - *---------------------------------------------------------------------------*/ - -#ifndef __DAP_CONFIG_H__ -#define __DAP_CONFIG_H__ - - -//************************************************************************************************** -/** -\defgroup DAP_Config_Debug_gr CMSIS-DAP Debug Unit Information -\ingroup DAP_ConfigIO_gr -@{ -Provides definitions about the hardware and configuration of the Debug Unit. - -This information includes: - - Definition of Cortex-M processor parameters used in CMSIS-DAP Debug Unit. - - Debug Unit Identification strings (Vendor, Product, Serial Number). - - Debug Unit communication packet size. - - Debug Access Port supported modes and settings (JTAG/SWD and SWO). - - Optional information about a connected Target Device (for Evaluation Boards). -*/ - -#ifdef _RTE_ -#include "RTE_Components.h" -#include CMSIS_device_header -#else -#include "device.h" // Debug Unit Cortex-M Processor Header File -#endif - -/// Processor Clock of the Cortex-M MCU used in the Debug Unit. -/// This value is used to calculate the SWD/JTAG clock speed. -#define CPU_CLOCK 100000000U ///< Specifies the CPU Clock in Hz. - -/// Number of processor cycles for I/O Port write operations. -/// This value is used to calculate the SWD/JTAG clock speed that is generated with I/O -/// Port write operations in the Debug Unit by a Cortex-M MCU. Most Cortex-M processors -/// require 2 processor cycles for a I/O Port Write operation. If the Debug Unit uses -/// a Cortex-M0+ processor with high-speed peripheral I/O only 1 processor cycle might be -/// required. -#define IO_PORT_WRITE_CYCLES 2U ///< I/O Cycles: 2=default, 1=Cortex-M0+ fast I/0. - -/// Indicate that Serial Wire Debug (SWD) communication mode is available at the Debug Access Port. -/// This information is returned by the command \ref DAP_Info as part of Capabilities. -#define DAP_SWD 1 ///< SWD Mode: 1 = available, 0 = not available. - -/// Indicate that JTAG communication mode is available at the Debug Port. -/// This information is returned by the command \ref DAP_Info as part of Capabilities. -#define DAP_JTAG 1 ///< JTAG Mode: 1 = available, 0 = not available. - -/// Configure maximum number of JTAG devices on the scan chain connected to the Debug Access Port. -/// This setting impacts the RAM requirements of the Debug Unit. Valid range is 1 .. 255. -#define DAP_JTAG_DEV_CNT 8U ///< Maximum number of JTAG devices on scan chain. - -/// Default communication mode on the Debug Access Port. -/// Used for the command \ref DAP_Connect when Port Default mode is selected. -#define DAP_DEFAULT_PORT 1U ///< Default JTAG/SWJ Port Mode: 1 = SWD, 2 = JTAG. - -/// Default communication speed on the Debug Access Port for SWD and JTAG mode. -/// Used to initialize the default SWD/JTAG clock frequency. -/// The command \ref DAP_SWJ_Clock can be used to overwrite this default setting. -#define DAP_DEFAULT_SWJ_CLOCK 1000000U ///< Default SWD/JTAG clock frequency in Hz. - -/// Maximum Package Size for Command and Response data. -/// This configuration settings is used to optimize the communication performance with the -/// debugger and depends on the USB peripheral. Typical vales are 64 for Full-speed USB HID or WinUSB, -/// 1024 for High-speed USB HID and 512 for High-speed USB WinUSB. -#define DAP_PACKET_SIZE 512U ///< Specifies Packet Size in bytes. - -/// Maximum Package Buffers for Command and Response data. -/// This configuration settings is used to optimize the communication performance with the -/// debugger and depends on the USB peripheral. For devices with limited RAM or USB buffer the -/// setting can be reduced (valid range is 1 .. 255). -#define DAP_PACKET_COUNT 8U ///< Specifies number of packets buffered. - -/// Indicate that UART Serial Wire Output (SWO) trace is available. -/// This information is returned by the command \ref DAP_Info as part of Capabilities. -#define SWO_UART 1 ///< SWO UART: 1 = available, 0 = not available. - -/// USART Driver instance number for the UART SWO. -#define SWO_UART_DRIVER 0 ///< USART Driver instance number (Driver_USART#). - -/// Maximum SWO UART Baudrate. -#define SWO_UART_MAX_BAUDRATE 10000000U ///< SWO UART Maximum Baudrate in Hz. - -/// Indicate that Manchester Serial Wire Output (SWO) trace is available. -/// This information is returned by the command \ref DAP_Info as part of Capabilities. -#define SWO_MANCHESTER 0 ///< SWO Manchester: 1 = available, 0 = not available. - -/// SWO Trace Buffer Size. -#define SWO_BUFFER_SIZE 4096U ///< SWO Trace Buffer Size in bytes (must be 2^n). - -/// SWO Streaming Trace. -#define SWO_STREAM 0 ///< SWO Streaming Trace: 1 = available, 0 = not available. - -/// Clock frequency of the Test Domain Timer. Timer value is returned with \ref TIMESTAMP_GET. -#define TIMESTAMP_CLOCK 100000000U ///< Timestamp clock in Hz (0 = timestamps not supported). - -/// Indicate that UART Communication Port is available. -/// This information is returned by the command \ref DAP_Info as part of Capabilities. -#define DAP_UART 1 ///< DAP UART: 1 = available, 0 = not available. - -/// USART Driver instance number for the UART Communication Port. -#define DAP_UART_DRIVER 1 ///< USART Driver instance number (Driver_USART#). - -/// UART Receive Buffer Size. -#define DAP_UART_RX_BUFFER_SIZE 1024U ///< Uart Receive Buffer Size in bytes (must be 2^n). - -/// UART Transmit Buffer Size. -#define DAP_UART_TX_BUFFER_SIZE 1024U ///< Uart Transmit Buffer Size in bytes (must be 2^n). - -/// Indicate that UART Communication via USB COM Port is available. -/// This information is returned by the command \ref DAP_Info as part of Capabilities. -#define DAP_UART_USB_COM_PORT 1 ///< USB COM Port: 1 = available, 0 = not available. - -/// Debug Unit is connected to fixed Target Device. -/// The Debug Unit may be part of an evaluation board and always connected to a fixed -/// known device. In this case a Device Vendor, Device Name, Board Vendor and Board Name strings -/// are stored and may be used by the debugger or IDE to configure device parameters. -#define TARGET_FIXED 0 ///< Target: 1 = known, 0 = unknown; - -#define TARGET_DEVICE_VENDOR "Arm" ///< String indicating the Silicon Vendor -#define TARGET_DEVICE_NAME "Cortex-M" ///< String indicating the Target Device -#define TARGET_BOARD_VENDOR "Arm" ///< String indicating the Board Vendor -#define TARGET_BOARD_NAME "Arm board" ///< String indicating the Board Name - -#if TARGET_FIXED != 0 -#include -static const char TargetDeviceVendor [] = TARGET_DEVICE_VENDOR; -static const char TargetDeviceName [] = TARGET_DEVICE_NAME; -static const char TargetBoardVendor [] = TARGET_BOARD_VENDOR; -static const char TargetBoardName [] = TARGET_BOARD_NAME; -#endif - -/** Get Vendor Name string. -\param str Pointer to buffer to store the string (max 60 characters). -\return String length (including terminating NULL character) or 0 (no string). -*/ -__STATIC_INLINE uint8_t DAP_GetVendorString (char *str) { - (void)str; - return (0U); -} - -/** Get Product Name string. -\param str Pointer to buffer to store the string (max 60 characters). -\return String length (including terminating NULL character) or 0 (no string). -*/ -__STATIC_INLINE uint8_t DAP_GetProductString (char *str) { - (void)str; - return (0U); -} - -/** Get Serial Number string. -\param str Pointer to buffer to store the string (max 60 characters). -\return String length (including terminating NULL character) or 0 (no string). -*/ -__STATIC_INLINE uint8_t DAP_GetSerNumString (char *str) { - (void)str; - return (0U); -} - -/** Get Target Device Vendor string. -\param str Pointer to buffer to store the string (max 60 characters). -\return String length (including terminating NULL character) or 0 (no string). -*/ -__STATIC_INLINE uint8_t DAP_GetTargetDeviceVendorString (char *str) { -#if TARGET_FIXED != 0 - uint8_t len; - - strcpy(str, TargetDeviceVendor); - len = (uint8_t)(strlen(TargetDeviceVendor) + 1U); - return (len); -#else - (void)str; - return (0U); -#endif -} - -/** Get Target Device Name string. -\param str Pointer to buffer to store the string (max 60 characters). -\return String length (including terminating NULL character) or 0 (no string). -*/ -__STATIC_INLINE uint8_t DAP_GetTargetDeviceNameString (char *str) { -#if TARGET_FIXED != 0 - uint8_t len; - - strcpy(str, TargetDeviceName); - len = (uint8_t)(strlen(TargetDeviceName) + 1U); - return (len); -#else - (void)str; - return (0U); -#endif -} - -/** Get Target Board Vendor string. -\param str Pointer to buffer to store the string (max 60 characters). -\return String length (including terminating NULL character) or 0 (no string). -*/ -__STATIC_INLINE uint8_t DAP_GetTargetBoardVendorString (char *str) { -#if TARGET_FIXED != 0 - uint8_t len; - - strcpy(str, TargetBoardVendor); - len = (uint8_t)(strlen(TargetBoardVendor) + 1U); - return (len); -#else - (void)str; - return (0U); -#endif -} - -/** Get Target Board Name string. -\param str Pointer to buffer to store the string (max 60 characters). -\return String length (including terminating NULL character) or 0 (no string). -*/ -__STATIC_INLINE uint8_t DAP_GetTargetBoardNameString (char *str) { -#if TARGET_FIXED != 0 - uint8_t len; - - strcpy(str, TargetBoardName); - len = (uint8_t)(strlen(TargetBoardName) + 1U); - return (len); -#else - (void)str; - return (0U); -#endif -} - -/** Get Product Firmware Version string. -\param str Pointer to buffer to store the string (max 60 characters). -\return String length (including terminating NULL character) or 0 (no string). -*/ -__STATIC_INLINE uint8_t DAP_GetProductFirmwareVersionString (char *str) { - (void)str; - return (0U); -} - -///@} - - -//************************************************************************************************** -/** -\defgroup DAP_Config_PortIO_gr CMSIS-DAP Hardware I/O Pin Access -\ingroup DAP_ConfigIO_gr -@{ - -Standard I/O Pins of the CMSIS-DAP Hardware Debug Port support standard JTAG mode -and Serial Wire Debug (SWD) mode. In SWD mode only 2 pins are required to implement the debug -interface of a device. The following I/O Pins are provided: - -JTAG I/O Pin | SWD I/O Pin | CMSIS-DAP Hardware pin mode ----------------------------- | -------------------- | --------------------------------------------- -TCK: Test Clock | SWCLK: Clock | Output Push/Pull -TMS: Test Mode Select | SWDIO: Data I/O | Output Push/Pull; Input (for receiving data) -TDI: Test Data Input | | Output Push/Pull -TDO: Test Data Output | | Input -nTRST: Test Reset (optional) | | Output Open Drain with pull-up resistor -nRESET: Device Reset | nRESET: Device Reset | Output Open Drain with pull-up resistor - - -DAP Hardware I/O Pin Access Functions -------------------------------------- -The various I/O Pins are accessed by functions that implement the Read, Write, Set, or Clear to -these I/O Pins. - -For the SWDIO I/O Pin there are additional functions that are called in SWD I/O mode only. -This functions are provided to achieve faster I/O that is possible with some advanced GPIO -peripherals that can independently write/read a single I/O pin without affecting any other pins -of the same I/O port. The following SWDIO I/O Pin functions are provided: - - \ref PIN_SWDIO_OUT_ENABLE to enable the output mode from the DAP hardware. - - \ref PIN_SWDIO_OUT_DISABLE to enable the input mode to the DAP hardware. - - \ref PIN_SWDIO_IN to read from the SWDIO I/O pin with utmost possible speed. - - \ref PIN_SWDIO_OUT to write to the SWDIO I/O pin with utmost possible speed. -*/ - - -// Configure DAP I/O pins ------------------------------ - -/** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET. -Configures the DAP Hardware I/O pins for JTAG mode: - - TCK, TMS, TDI, nTRST, nRESET to output mode and set to high level. - - TDO to input mode. -*/ -__STATIC_INLINE void PORT_JTAG_SETUP (void) { - ; -} - -/** Setup SWD I/O pins: SWCLK, SWDIO, and nRESET. -Configures the DAP Hardware I/O pins for Serial Wire Debug (SWD) mode: - - SWCLK, SWDIO, nRESET to output mode and set to default high level. - - TDI, nTRST to HighZ mode (pins are unused in SWD mode). -*/ -__STATIC_INLINE void PORT_SWD_SETUP (void) { - ; -} - -/** Disable JTAG/SWD I/O Pins. -Disables the DAP Hardware I/O pins which configures: - - TCK/SWCLK, TMS/SWDIO, TDI, TDO, nTRST, nRESET to High-Z mode. -*/ -__STATIC_INLINE void PORT_OFF (void) { - ; -} - - -// SWCLK/TCK I/O pin ------------------------------------- - -/** SWCLK/TCK I/O pin: Get Input. -\return Current status of the SWCLK/TCK DAP hardware I/O pin. -*/ -__STATIC_FORCEINLINE uint32_t PIN_SWCLK_TCK_IN (void) { - return (0U); -} - -/** SWCLK/TCK I/O pin: Set Output to High. -Set the SWCLK/TCK DAP hardware I/O pin to high level. -*/ -__STATIC_FORCEINLINE void PIN_SWCLK_TCK_SET (void) { - ; -} - -/** SWCLK/TCK I/O pin: Set Output to Low. -Set the SWCLK/TCK DAP hardware I/O pin to low level. -*/ -__STATIC_FORCEINLINE void PIN_SWCLK_TCK_CLR (void) { - ; -} - - -// SWDIO/TMS Pin I/O -------------------------------------- - -/** SWDIO/TMS I/O pin: Get Input. -\return Current status of the SWDIO/TMS DAP hardware I/O pin. -*/ -__STATIC_FORCEINLINE uint32_t PIN_SWDIO_TMS_IN (void) { - return (0U); -} - -/** SWDIO/TMS I/O pin: Set Output to High. -Set the SWDIO/TMS DAP hardware I/O pin to high level. -*/ -__STATIC_FORCEINLINE void PIN_SWDIO_TMS_SET (void) { - ; -} - -/** SWDIO/TMS I/O pin: Set Output to Low. -Set the SWDIO/TMS DAP hardware I/O pin to low level. -*/ -__STATIC_FORCEINLINE void PIN_SWDIO_TMS_CLR (void) { - ; -} - -/** SWDIO I/O pin: Get Input (used in SWD mode only). -\return Current status of the SWDIO DAP hardware I/O pin. -*/ -__STATIC_FORCEINLINE uint32_t PIN_SWDIO_IN (void) { - return (0U); -} - -/** SWDIO I/O pin: Set Output (used in SWD mode only). -\param bit Output value for the SWDIO DAP hardware I/O pin. -*/ -__STATIC_FORCEINLINE void PIN_SWDIO_OUT (uint32_t bit) { - ; -} - -/** SWDIO I/O pin: Switch to Output mode (used in SWD mode only). -Configure the SWDIO DAP hardware I/O pin to output mode. This function is -called prior \ref PIN_SWDIO_OUT function calls. -*/ -__STATIC_FORCEINLINE void PIN_SWDIO_OUT_ENABLE (void) { - ; -} - -/** SWDIO I/O pin: Switch to Input mode (used in SWD mode only). -Configure the SWDIO DAP hardware I/O pin to input mode. This function is -called prior \ref PIN_SWDIO_IN function calls. -*/ -__STATIC_FORCEINLINE void PIN_SWDIO_OUT_DISABLE (void) { - ; -} - - -// TDI Pin I/O --------------------------------------------- - -/** TDI I/O pin: Get Input. -\return Current status of the TDI DAP hardware I/O pin. -*/ -__STATIC_FORCEINLINE uint32_t PIN_TDI_IN (void) { - return (0U); -} - -/** TDI I/O pin: Set Output. -\param bit Output value for the TDI DAP hardware I/O pin. -*/ -__STATIC_FORCEINLINE void PIN_TDI_OUT (uint32_t bit) { - ; -} - - -// TDO Pin I/O --------------------------------------------- - -/** TDO I/O pin: Get Input. -\return Current status of the TDO DAP hardware I/O pin. -*/ -__STATIC_FORCEINLINE uint32_t PIN_TDO_IN (void) { - return (0U); -} - - -// nTRST Pin I/O ------------------------------------------- - -/** nTRST I/O pin: Get Input. -\return Current status of the nTRST DAP hardware I/O pin. -*/ -__STATIC_FORCEINLINE uint32_t PIN_nTRST_IN (void) { - return (0U); -} - -/** nTRST I/O pin: Set Output. -\param bit JTAG TRST Test Reset pin status: - - 0: issue a JTAG TRST Test Reset. - - 1: release JTAG TRST Test Reset. -*/ -__STATIC_FORCEINLINE void PIN_nTRST_OUT (uint32_t bit) { - ; -} - -// nRESET Pin I/O------------------------------------------ - -/** nRESET I/O pin: Get Input. -\return Current status of the nRESET DAP hardware I/O pin. -*/ -__STATIC_FORCEINLINE uint32_t PIN_nRESET_IN (void) { - return (0U); -} - -/** nRESET I/O pin: Set Output. -\param bit target device hardware reset pin status: - - 0: issue a device hardware reset. - - 1: release device hardware reset. -*/ -__STATIC_FORCEINLINE void PIN_nRESET_OUT (uint32_t bit) { - ; -} - -///@} - - -//************************************************************************************************** -/** -\defgroup DAP_Config_LEDs_gr CMSIS-DAP Hardware Status LEDs -\ingroup DAP_ConfigIO_gr -@{ - -CMSIS-DAP Hardware may provide LEDs that indicate the status of the CMSIS-DAP Debug Unit. - -It is recommended to provide the following LEDs for status indication: - - Connect LED: is active when the DAP hardware is connected to a debugger. - - Running LED: is active when the debugger has put the target device into running state. -*/ - -/** Debug Unit: Set status of Connected LED. -\param bit status of the Connect LED. - - 1: Connect LED ON: debugger is connected to CMSIS-DAP Debug Unit. - - 0: Connect LED OFF: debugger is not connected to CMSIS-DAP Debug Unit. -*/ -__STATIC_INLINE void LED_CONNECTED_OUT (uint32_t bit) {} - -/** Debug Unit: Set status Target Running LED. -\param bit status of the Target Running LED. - - 1: Target Running LED ON: program execution in target started. - - 0: Target Running LED OFF: program execution in target stopped. -*/ -__STATIC_INLINE void LED_RUNNING_OUT (uint32_t bit) {} - -///@} - - -//************************************************************************************************** -/** -\defgroup DAP_Config_Timestamp_gr CMSIS-DAP Timestamp -\ingroup DAP_ConfigIO_gr -@{ -Access function for Test Domain Timer. - -The value of the Test Domain Timer in the Debug Unit is returned by the function \ref TIMESTAMP_GET. By -default, the DWT timer is used. The frequency of this timer is configured with \ref TIMESTAMP_CLOCK. - -*/ - -/** Get timestamp of Test Domain Timer. -\return Current timestamp value. -*/ -__STATIC_INLINE uint32_t TIMESTAMP_GET (void) { - return (DWT->CYCCNT); -} - -///@} - - -//************************************************************************************************** -/** -\defgroup DAP_Config_Initialization_gr CMSIS-DAP Initialization -\ingroup DAP_ConfigIO_gr -@{ - -CMSIS-DAP Hardware I/O and LED Pins are initialized with the function \ref DAP_SETUP. -*/ - -/** Setup of the Debug Unit I/O pins and LEDs (called when Debug Unit is initialized). -This function performs the initialization of the CMSIS-DAP Hardware I/O Pins and the -Status LEDs. In detail the operation of Hardware I/O and LED pins are enabled and set: - - I/O clock system enabled. - - all I/O pins: input buffer enabled, output pins are set to HighZ mode. - - for nTRST, nRESET a weak pull-up (if available) is enabled. - - LED output pins are enabled and LEDs are turned off. -*/ -__STATIC_INLINE void DAP_SETUP (void) { - ; -} - -/** Reset Target Device with custom specific I/O pin or command sequence. -This function allows the optional implementation of a device specific reset sequence. -It is called when the command \ref DAP_ResetTarget and is for example required -when a device needs a time-critical unlock sequence that enables the debug port. -\return 0 = no device specific reset sequence is implemented.\n - 1 = a device specific reset sequence is implemented. -*/ -__STATIC_INLINE uint8_t RESET_TARGET (void) { - return (0U); // change to '1' when a device reset sequence is implemented -} - -///@} - - -#endif /* __DAP_CONFIG_H__ */ diff --git a/Drivers/CMSIS/DAP/Firmware/Include/DAP.h b/Drivers/CMSIS/DAP/Firmware/Include/DAP.h deleted file mode 100644 index 7fc78b0..0000000 --- a/Drivers/CMSIS/DAP/Firmware/Include/DAP.h +++ /dev/null @@ -1,367 +0,0 @@ -/* - * Copyright (c) 2013-2022 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 26. April 2022 - * $Revision: V2.1.1 - * - * Project: CMSIS-DAP Include - * Title: DAP.h Definitions - * - *---------------------------------------------------------------------------*/ - -#ifndef __DAP_H__ -#define __DAP_H__ - - -// DAP Firmware Version -#ifdef DAP_FW_V1 -#define DAP_FW_VER "1.3.0" -#else -#define DAP_FW_VER "2.1.1" -#endif - -// DAP Command IDs -#define ID_DAP_Info 0x00U -#define ID_DAP_HostStatus 0x01U -#define ID_DAP_Connect 0x02U -#define ID_DAP_Disconnect 0x03U -#define ID_DAP_TransferConfigure 0x04U -#define ID_DAP_Transfer 0x05U -#define ID_DAP_TransferBlock 0x06U -#define ID_DAP_TransferAbort 0x07U -#define ID_DAP_WriteABORT 0x08U -#define ID_DAP_Delay 0x09U -#define ID_DAP_ResetTarget 0x0AU -#define ID_DAP_SWJ_Pins 0x10U -#define ID_DAP_SWJ_Clock 0x11U -#define ID_DAP_SWJ_Sequence 0x12U -#define ID_DAP_SWD_Configure 0x13U -#define ID_DAP_SWD_Sequence 0x1DU -#define ID_DAP_JTAG_Sequence 0x14U -#define ID_DAP_JTAG_Configure 0x15U -#define ID_DAP_JTAG_IDCODE 0x16U -#define ID_DAP_SWO_Transport 0x17U -#define ID_DAP_SWO_Mode 0x18U -#define ID_DAP_SWO_Baudrate 0x19U -#define ID_DAP_SWO_Control 0x1AU -#define ID_DAP_SWO_Status 0x1BU -#define ID_DAP_SWO_ExtendedStatus 0x1EU -#define ID_DAP_SWO_Data 0x1CU -#define ID_DAP_UART_Transport 0x1FU -#define ID_DAP_UART_Configure 0x20U -#define ID_DAP_UART_Control 0x22U -#define ID_DAP_UART_Status 0x23U -#define ID_DAP_UART_Transfer 0x21U - -#define ID_DAP_QueueCommands 0x7EU -#define ID_DAP_ExecuteCommands 0x7FU - -// DAP Vendor Command IDs -#define ID_DAP_Vendor0 0x80U -#define ID_DAP_Vendor1 0x81U -#define ID_DAP_Vendor2 0x82U -#define ID_DAP_Vendor3 0x83U -#define ID_DAP_Vendor4 0x84U -#define ID_DAP_Vendor5 0x85U -#define ID_DAP_Vendor6 0x86U -#define ID_DAP_Vendor7 0x87U -#define ID_DAP_Vendor8 0x88U -#define ID_DAP_Vendor9 0x89U -#define ID_DAP_Vendor10 0x8AU -#define ID_DAP_Vendor11 0x8BU -#define ID_DAP_Vendor12 0x8CU -#define ID_DAP_Vendor13 0x8DU -#define ID_DAP_Vendor14 0x8EU -#define ID_DAP_Vendor15 0x8FU -#define ID_DAP_Vendor16 0x90U -#define ID_DAP_Vendor17 0x91U -#define ID_DAP_Vendor18 0x92U -#define ID_DAP_Vendor19 0x93U -#define ID_DAP_Vendor20 0x94U -#define ID_DAP_Vendor21 0x95U -#define ID_DAP_Vendor22 0x96U -#define ID_DAP_Vendor23 0x97U -#define ID_DAP_Vendor24 0x98U -#define ID_DAP_Vendor25 0x99U -#define ID_DAP_Vendor26 0x9AU -#define ID_DAP_Vendor27 0x9BU -#define ID_DAP_Vendor28 0x9CU -#define ID_DAP_Vendor29 0x9DU -#define ID_DAP_Vendor30 0x9EU -#define ID_DAP_Vendor31 0x9FU - -#define ID_DAP_Invalid 0xFFU - -// DAP Status Code -#define DAP_OK 0U -#define DAP_ERROR 0xFFU - -// DAP ID -#define DAP_ID_VENDOR 1U -#define DAP_ID_PRODUCT 2U -#define DAP_ID_SER_NUM 3U -#define DAP_ID_DAP_FW_VER 4U -#define DAP_ID_DEVICE_VENDOR 5U -#define DAP_ID_DEVICE_NAME 6U -#define DAP_ID_BOARD_VENDOR 7U -#define DAP_ID_BOARD_NAME 8U -#define DAP_ID_PRODUCT_FW_VER 9U -#define DAP_ID_CAPABILITIES 0xF0U -#define DAP_ID_TIMESTAMP_CLOCK 0xF1U -#define DAP_ID_UART_RX_BUFFER_SIZE 0xFBU -#define DAP_ID_UART_TX_BUFFER_SIZE 0xFCU -#define DAP_ID_SWO_BUFFER_SIZE 0xFDU -#define DAP_ID_PACKET_COUNT 0xFEU -#define DAP_ID_PACKET_SIZE 0xFFU - -// DAP Host Status -#define DAP_DEBUGGER_CONNECTED 0U -#define DAP_TARGET_RUNNING 1U - -// DAP Port -#define DAP_PORT_AUTODETECT 0U // Autodetect Port -#define DAP_PORT_DISABLED 0U // Port Disabled (I/O pins in High-Z) -#define DAP_PORT_SWD 1U // SWD Port (SWCLK, SWDIO) + nRESET -#define DAP_PORT_JTAG 2U // JTAG Port (TCK, TMS, TDI, TDO, nTRST) + nRESET - -// DAP SWJ Pins -#define DAP_SWJ_SWCLK_TCK 0 // SWCLK/TCK -#define DAP_SWJ_SWDIO_TMS 1 // SWDIO/TMS -#define DAP_SWJ_TDI 2 // TDI -#define DAP_SWJ_TDO 3 // TDO -#define DAP_SWJ_nTRST 5 // nTRST -#define DAP_SWJ_nRESET 7 // nRESET - -// DAP Transfer Request -#define DAP_TRANSFER_APnDP (1U<<0) -#define DAP_TRANSFER_RnW (1U<<1) -#define DAP_TRANSFER_A2 (1U<<2) -#define DAP_TRANSFER_A3 (1U<<3) -#define DAP_TRANSFER_MATCH_VALUE (1U<<4) -#define DAP_TRANSFER_MATCH_MASK (1U<<5) -#define DAP_TRANSFER_TIMESTAMP (1U<<7) - -// DAP Transfer Response -#define DAP_TRANSFER_OK (1U<<0) -#define DAP_TRANSFER_WAIT (1U<<1) -#define DAP_TRANSFER_FAULT (1U<<2) -#define DAP_TRANSFER_ERROR (1U<<3) -#define DAP_TRANSFER_MISMATCH (1U<<4) - -// DAP SWO Trace Mode -#define DAP_SWO_OFF 0U -#define DAP_SWO_UART 1U -#define DAP_SWO_MANCHESTER 2U - -// DAP SWO Trace Status -#define DAP_SWO_CAPTURE_ACTIVE (1U<<0) -#define DAP_SWO_CAPTURE_PAUSED (1U<<1) -#define DAP_SWO_STREAM_ERROR (1U<<6) -#define DAP_SWO_BUFFER_OVERRUN (1U<<7) - -// DAP UART Transport -#define DAP_UART_TRANSPORT_NONE 0U -#define DAP_UART_TRANSPORT_USB_COM_PORT 1U -#define DAP_UART_TRANSPORT_DAP_COMMAND 2U - -// DAP UART Control -#define DAP_UART_CONTROL_RX_ENABLE (1U<<0) -#define DAP_UART_CONTROL_RX_DISABLE (1U<<1) -#define DAP_UART_CONTROL_RX_BUF_FLUSH (1U<<2) -#define DAP_UART_CONTROL_TX_ENABLE (1U<<4) -#define DAP_UART_CONTROL_TX_DISABLE (1U<<5) -#define DAP_UART_CONTROL_TX_BUF_FLUSH (1U<<6) - -// DAP UART Status -#define DAP_UART_STATUS_RX_ENABLED (1U<<0) -#define DAP_UART_STATUS_RX_DATA_LOST (1U<<1) -#define DAP_UART_STATUS_FRAMING_ERROR (1U<<2) -#define DAP_UART_STATUS_PARITY_ERROR (1U<<3) -#define DAP_UART_STATUS_TX_ENABLED (1U<<4) - -// DAP UART Configure Error -#define DAP_UART_CFG_ERROR_DATA_BITS (1U<<0) -#define DAP_UART_CFG_ERROR_PARITY (1U<<1) -#define DAP_UART_CFG_ERROR_STOP_BITS (1U<<2) - -// Debug Port Register Addresses -#define DP_IDCODE 0x00U // IDCODE Register (SW Read only) -#define DP_ABORT 0x00U // Abort Register (SW Write only) -#define DP_CTRL_STAT 0x04U // Control & Status -#define DP_WCR 0x04U // Wire Control Register (SW Only) -#define DP_SELECT 0x08U // Select Register (JTAG R/W & SW W) -#define DP_RESEND 0x08U // Resend (SW Read Only) -#define DP_RDBUFF 0x0CU // Read Buffer (Read Only) - -// JTAG IR Codes -#define JTAG_ABORT 0x08U -#define JTAG_DPACC 0x0AU -#define JTAG_APACC 0x0BU -#define JTAG_IDCODE 0x0EU -#define JTAG_BYPASS 0x0FU - -// JTAG Sequence Info -#define JTAG_SEQUENCE_TCK 0x3FU // TCK count -#define JTAG_SEQUENCE_TMS 0x40U // TMS value -#define JTAG_SEQUENCE_TDO 0x80U // TDO capture - -// SWD Sequence Info -#define SWD_SEQUENCE_CLK 0x3FU // SWCLK count -#define SWD_SEQUENCE_DIN 0x80U // SWDIO capture - - -#include -#include -#include "cmsis_compiler.h" - -// DAP Data structure -typedef struct { - uint8_t debug_port; // Debug Port - uint8_t fast_clock; // Fast Clock Flag - uint8_t padding[2]; - uint32_t clock_delay; // Clock Delay - uint32_t timestamp; // Last captured Timestamp - struct { // Transfer Configuration - uint8_t idle_cycles; // Idle cycles after transfer - uint8_t padding[3]; - uint16_t retry_count; // Number of retries after WAIT response - uint16_t match_retry; // Number of retries if read value does not match - uint32_t match_mask; // Match Mask - } transfer; -#if (DAP_SWD != 0) - struct { // SWD Configuration - uint8_t turnaround; // Turnaround period - uint8_t data_phase; // Always generate Data Phase - } swd_conf; -#endif -#if (DAP_JTAG != 0) - struct { // JTAG Device Chain - uint8_t count; // Number of devices - uint8_t index; // Device index (device at TDO has index 0) -#if (DAP_JTAG_DEV_CNT != 0) - uint8_t ir_length[DAP_JTAG_DEV_CNT]; // IR Length in bits - uint16_t ir_before[DAP_JTAG_DEV_CNT]; // Bits before IR - uint16_t ir_after [DAP_JTAG_DEV_CNT]; // Bits after IR -#endif - } jtag_dev; -#endif -} DAP_Data_t; - -extern DAP_Data_t DAP_Data; // DAP Data -extern volatile uint8_t DAP_TransferAbort; // Transfer Abort Flag - - -#ifdef __cplusplus -extern "C" -{ -#endif - -// Functions -extern void SWJ_Sequence (uint32_t count, const uint8_t *data); -extern void SWD_Sequence (uint32_t info, const uint8_t *swdo, uint8_t *swdi); -extern void JTAG_Sequence (uint32_t info, const uint8_t *tdi, uint8_t *tdo); -extern void JTAG_IR (uint32_t ir); -extern uint32_t JTAG_ReadIDCode (void); -extern void JTAG_WriteAbort (uint32_t data); -extern uint8_t JTAG_Transfer (uint32_t request, uint32_t *data); -extern uint8_t SWD_Transfer (uint32_t request, uint32_t *data); - -extern void Delayms (uint32_t delay); - -extern uint32_t SWO_Transport (const uint8_t *request, uint8_t *response); -extern uint32_t SWO_Mode (const uint8_t *request, uint8_t *response); -extern uint32_t SWO_Baudrate (const uint8_t *request, uint8_t *response); -extern uint32_t SWO_Control (const uint8_t *request, uint8_t *response); -extern uint32_t SWO_Status (uint8_t *response); -extern uint32_t SWO_ExtendedStatus (const uint8_t *request, uint8_t *response); -extern uint32_t SWO_Data (const uint8_t *request, uint8_t *response); - -extern void SWO_QueueTransfer (uint8_t *buf, uint32_t num); -extern void SWO_AbortTransfer (void); -extern void SWO_TransferComplete (void); - -extern uint32_t SWO_Mode_UART (uint32_t enable); -extern uint32_t SWO_Baudrate_UART (uint32_t baudrate); -extern uint32_t SWO_Control_UART (uint32_t active); -extern void SWO_Capture_UART (uint8_t *buf, uint32_t num); -extern uint32_t SWO_GetCount_UART (void); - -extern uint32_t SWO_Mode_Manchester (uint32_t enable); -extern uint32_t SWO_Baudrate_Manchester (uint32_t baudrate); -extern uint32_t SWO_Control_Manchester (uint32_t active); -extern void SWO_Capture_Manchester (uint8_t *buf, uint32_t num); -extern uint32_t SWO_GetCount_Manchester (void); - -extern uint32_t UART_Transport (const uint8_t *request, uint8_t *response); -extern uint32_t UART_Configure (const uint8_t *request, uint8_t *response); -extern uint32_t UART_Control (const uint8_t *request, uint8_t *response); -extern uint32_t UART_Status (uint8_t *response); -extern uint32_t UART_Transfer (const uint8_t *request, uint8_t *response); - -extern uint8_t USB_COM_PORT_Activate (uint32_t cmd); - -extern uint32_t DAP_ProcessVendorCommand (const uint8_t *request, uint8_t *response); -extern uint32_t DAP_ProcessCommand (const uint8_t *request, uint8_t *response); -extern uint32_t DAP_ExecuteCommand (const uint8_t *request, uint8_t *response); - -extern void DAP_Setup (void); - -// Configurable delay for clock generation -#ifndef DELAY_SLOW_CYCLES -#define DELAY_SLOW_CYCLES 3U // Number of cycles for one iteration -#endif -#if defined(__CC_ARM) -__STATIC_FORCEINLINE void PIN_DELAY_SLOW (uint32_t delay) { - uint32_t count = delay; - while (--count); -} -#else -__STATIC_FORCEINLINE void PIN_DELAY_SLOW (uint32_t delay) { - __ASM volatile ( - ".syntax unified\n" - "0:\n\t" - "subs %0,%0,#1\n\t" - "bne 0b\n" - : "+l" (delay) : : "cc" - ); -} -#endif - -// Fixed delay for fast clock generation -#ifndef DELAY_FAST_CYCLES -#define DELAY_FAST_CYCLES 0U // Number of cycles: 0..3 -#endif -__STATIC_FORCEINLINE void PIN_DELAY_FAST (void) { -#if (DELAY_FAST_CYCLES >= 1U) - __NOP(); -#endif -#if (DELAY_FAST_CYCLES >= 2U) - __NOP(); -#endif -#if (DELAY_FAST_CYCLES >= 3U) - __NOP(); -#endif -} - -#ifdef __cplusplus -} -#endif - - -#endif /* __DAP_H__ */ diff --git a/Drivers/CMSIS/DAP/Firmware/Source/DAP.c b/Drivers/CMSIS/DAP/Firmware/Source/DAP.c deleted file mode 100644 index 4a76bb0..0000000 --- a/Drivers/CMSIS/DAP/Firmware/Source/DAP.c +++ /dev/null @@ -1,1812 +0,0 @@ -/* - * Copyright (c) 2013-2022 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 26. April 2022 - * $Revision: V2.1.1 - * - * Project: CMSIS-DAP Source - * Title: DAP.c CMSIS-DAP Commands - * - *---------------------------------------------------------------------------*/ - -#include -#include "DAP_config.h" -#include "DAP.h" - - -#if (DAP_PACKET_SIZE < 64U) -#error "Minimum Packet Size is 64!" -#endif -#if (DAP_PACKET_SIZE > 32768U) -#error "Maximum Packet Size is 32768!" -#endif -#if (DAP_PACKET_COUNT < 1U) -#error "Minimum Packet Count is 1!" -#endif -#if (DAP_PACKET_COUNT > 255U) -#error "Maximum Packet Count is 255!" -#endif - - -// Clock Macros -#define MAX_SWJ_CLOCK(delay_cycles) \ - ((CPU_CLOCK/2U) / (IO_PORT_WRITE_CYCLES + delay_cycles)) - - - DAP_Data_t DAP_Data; // DAP Data -volatile uint8_t DAP_TransferAbort; // Transfer Abort Flag - - -static const char DAP_FW_Ver [] = DAP_FW_VER; - - -// Common clock delay calculation routine -// clock: requested SWJ frequency in Hertz -static void Set_Clock_Delay(uint32_t clock) { - uint32_t delay; - - if (clock >= MAX_SWJ_CLOCK(DELAY_FAST_CYCLES)) { - DAP_Data.fast_clock = 1U; - DAP_Data.clock_delay = 1U; - } else { - DAP_Data.fast_clock = 0U; - - delay = ((CPU_CLOCK/2U) + (clock - 1U)) / clock; - if (delay > IO_PORT_WRITE_CYCLES) { - delay -= IO_PORT_WRITE_CYCLES; - delay = (delay + (DELAY_SLOW_CYCLES - 1U)) / DELAY_SLOW_CYCLES; - } else { - delay = 1U; - } - - DAP_Data.clock_delay = delay; - } -} - - -// Get DAP Information -// id: info identifier -// info: pointer to info data -// return: number of bytes in info data -static uint8_t DAP_Info(uint8_t id, uint8_t *info) { - uint8_t length = 0U; - - switch (id) { - case DAP_ID_VENDOR: - length = DAP_GetVendorString((char *)info); - break; - case DAP_ID_PRODUCT: - length = DAP_GetProductString((char *)info); - break; - case DAP_ID_SER_NUM: - length = DAP_GetSerNumString((char *)info); - break; - case DAP_ID_DAP_FW_VER: - length = (uint8_t)sizeof(DAP_FW_Ver); - memcpy(info, DAP_FW_Ver, length); - break; - case DAP_ID_DEVICE_VENDOR: - length = DAP_GetTargetDeviceVendorString((char *)info); - break; - case DAP_ID_DEVICE_NAME: - length = DAP_GetTargetDeviceNameString((char *)info); - break; - case DAP_ID_BOARD_VENDOR: - length = DAP_GetTargetBoardVendorString((char *)info); - break; - case DAP_ID_BOARD_NAME: - length = DAP_GetTargetBoardNameString((char *)info); - break; - case DAP_ID_PRODUCT_FW_VER: - length = DAP_GetProductFirmwareVersionString((char *)info); - break; - case DAP_ID_CAPABILITIES: - info[0] = ((DAP_SWD != 0) ? (1U << 0) : 0U) | - ((DAP_JTAG != 0) ? (1U << 1) : 0U) | - ((SWO_UART != 0) ? (1U << 2) : 0U) | - ((SWO_MANCHESTER != 0) ? (1U << 3) : 0U) | - /* Atomic Commands */ (1U << 4) | - ((TIMESTAMP_CLOCK != 0U) ? (1U << 5) : 0U) | - ((SWO_STREAM != 0U) ? (1U << 6) : 0U) | - ((DAP_UART != 0U) ? (1U << 7) : 0U); - - info[1] = ((DAP_UART_USB_COM_PORT != 0) ? (1U << 0) : 0U); - length = 2U; - break; - case DAP_ID_TIMESTAMP_CLOCK: -#if (TIMESTAMP_CLOCK != 0U) - info[0] = (uint8_t)(TIMESTAMP_CLOCK >> 0); - info[1] = (uint8_t)(TIMESTAMP_CLOCK >> 8); - info[2] = (uint8_t)(TIMESTAMP_CLOCK >> 16); - info[3] = (uint8_t)(TIMESTAMP_CLOCK >> 24); - length = 4U; -#endif - break; - case DAP_ID_UART_RX_BUFFER_SIZE: -#if (DAP_UART != 0) - info[0] = (uint8_t)(DAP_UART_RX_BUFFER_SIZE >> 0); - info[1] = (uint8_t)(DAP_UART_RX_BUFFER_SIZE >> 8); - info[2] = (uint8_t)(DAP_UART_RX_BUFFER_SIZE >> 16); - info[3] = (uint8_t)(DAP_UART_RX_BUFFER_SIZE >> 24); - length = 4U; -#endif - break; - case DAP_ID_UART_TX_BUFFER_SIZE: -#if (DAP_UART != 0) - info[0] = (uint8_t)(DAP_UART_TX_BUFFER_SIZE >> 0); - info[1] = (uint8_t)(DAP_UART_TX_BUFFER_SIZE >> 8); - info[2] = (uint8_t)(DAP_UART_TX_BUFFER_SIZE >> 16); - info[3] = (uint8_t)(DAP_UART_TX_BUFFER_SIZE >> 24); - length = 4U; -#endif - break; - case DAP_ID_SWO_BUFFER_SIZE: -#if ((SWO_UART != 0) || (SWO_MANCHESTER != 0)) - info[0] = (uint8_t)(SWO_BUFFER_SIZE >> 0); - info[1] = (uint8_t)(SWO_BUFFER_SIZE >> 8); - info[2] = (uint8_t)(SWO_BUFFER_SIZE >> 16); - info[3] = (uint8_t)(SWO_BUFFER_SIZE >> 24); - length = 4U; -#endif - break; - case DAP_ID_PACKET_SIZE: - info[0] = (uint8_t)(DAP_PACKET_SIZE >> 0); - info[1] = (uint8_t)(DAP_PACKET_SIZE >> 8); - length = 2U; - break; - case DAP_ID_PACKET_COUNT: - info[0] = DAP_PACKET_COUNT; - length = 1U; - break; - default: - break; - } - - return (length); -} - - -// Delay for specified time -// delay: delay time in ms -void Delayms(uint32_t delay) { - delay *= ((CPU_CLOCK/1000U) + (DELAY_SLOW_CYCLES-1U)) / DELAY_SLOW_CYCLES; - PIN_DELAY_SLOW(delay); -} - - -// Process Delay command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_Delay(const uint8_t *request, uint8_t *response) { - uint32_t delay; - - delay = (uint32_t)(*(request+0)) | - (uint32_t)(*(request+1) << 8); - delay *= ((CPU_CLOCK/1000000U) + (DELAY_SLOW_CYCLES-1U)) / DELAY_SLOW_CYCLES; - - PIN_DELAY_SLOW(delay); - - *response = DAP_OK; - return ((2U << 16) | 1U); -} - - -// Process Host Status command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_HostStatus(const uint8_t *request, uint8_t *response) { - - switch (*request) { - case DAP_DEBUGGER_CONNECTED: - LED_CONNECTED_OUT((*(request+1) & 1U)); - break; - case DAP_TARGET_RUNNING: - LED_RUNNING_OUT((*(request+1) & 1U)); - break; - default: - *response = DAP_ERROR; - return ((2U << 16) | 1U); - } - - *response = DAP_OK; - return ((2U << 16) | 1U); -} - - -// Process Connect command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_Connect(const uint8_t *request, uint8_t *response) { - uint32_t port; - - if (*request == DAP_PORT_AUTODETECT) { - port = DAP_DEFAULT_PORT; - } else { - port = *request; - } - - switch (port) { -#if (DAP_SWD != 0) - case DAP_PORT_SWD: - DAP_Data.debug_port = DAP_PORT_SWD; - PORT_SWD_SETUP(); - break; -#endif -#if (DAP_JTAG != 0) - case DAP_PORT_JTAG: - DAP_Data.debug_port = DAP_PORT_JTAG; - PORT_JTAG_SETUP(); - break; -#endif - default: - port = DAP_PORT_DISABLED; - break; - } - - *response = (uint8_t)port; - return ((1U << 16) | 1U); -} - - -// Process Disconnect command and prepare response -// response: pointer to response data -// return: number of bytes in response -static uint32_t DAP_Disconnect(uint8_t *response) { - - DAP_Data.debug_port = DAP_PORT_DISABLED; - PORT_OFF(); - - *response = DAP_OK; - return (1U); -} - - -// Process Reset Target command and prepare response -// response: pointer to response data -// return: number of bytes in response -static uint32_t DAP_ResetTarget(uint8_t *response) { - - *(response+1) = RESET_TARGET(); - *(response+0) = DAP_OK; - return (2U); -} - - -// Process SWJ Pins command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_SWJ_Pins(const uint8_t *request, uint8_t *response) { -#if ((DAP_SWD != 0) || (DAP_JTAG != 0)) - uint32_t value; - uint32_t select; - uint32_t wait; - uint32_t timestamp; - - value = (uint32_t) *(request+0); - select = (uint32_t) *(request+1); - wait = (uint32_t)(*(request+2) << 0) | - (uint32_t)(*(request+3) << 8) | - (uint32_t)(*(request+4) << 16) | - (uint32_t)(*(request+5) << 24); - - if ((select & (1U << DAP_SWJ_SWCLK_TCK)) != 0U) { - if ((value & (1U << DAP_SWJ_SWCLK_TCK)) != 0U) { - PIN_SWCLK_TCK_SET(); - } else { - PIN_SWCLK_TCK_CLR(); - } - } - if ((select & (1U << DAP_SWJ_SWDIO_TMS)) != 0U) { - if ((value & (1U << DAP_SWJ_SWDIO_TMS)) != 0U) { - PIN_SWDIO_TMS_SET(); - } else { - PIN_SWDIO_TMS_CLR(); - } - } - if ((select & (1U << DAP_SWJ_TDI)) != 0U) { - PIN_TDI_OUT(value >> DAP_SWJ_TDI); - } - if ((select & (1U << DAP_SWJ_nTRST)) != 0U) { - PIN_nTRST_OUT(value >> DAP_SWJ_nTRST); - } - if ((select & (1U << DAP_SWJ_nRESET)) != 0U){ - PIN_nRESET_OUT(value >> DAP_SWJ_nRESET); - } - - if (wait != 0U) { -#if (TIMESTAMP_CLOCK != 0U) - if (wait > 3000000U) { - wait = 3000000U; - } -#if (TIMESTAMP_CLOCK >= 1000000U) - wait *= TIMESTAMP_CLOCK / 1000000U; -#else - wait /= 1000000U / TIMESTAMP_CLOCK; -#endif -#else - wait = 1U; -#endif - timestamp = TIMESTAMP_GET(); - do { - if ((select & (1U << DAP_SWJ_SWCLK_TCK)) != 0U) { - if ((value >> DAP_SWJ_SWCLK_TCK) ^ PIN_SWCLK_TCK_IN()) { - continue; - } - } - if ((select & (1U << DAP_SWJ_SWDIO_TMS)) != 0U) { - if ((value >> DAP_SWJ_SWDIO_TMS) ^ PIN_SWDIO_TMS_IN()) { - continue; - } - } - if ((select & (1U << DAP_SWJ_TDI)) != 0U) { - if ((value >> DAP_SWJ_TDI) ^ PIN_TDI_IN()) { - continue; - } - } - if ((select & (1U << DAP_SWJ_nTRST)) != 0U) { - if ((value >> DAP_SWJ_nTRST) ^ PIN_nTRST_IN()) { - continue; - } - } - if ((select & (1U << DAP_SWJ_nRESET)) != 0U) { - if ((value >> DAP_SWJ_nRESET) ^ PIN_nRESET_IN()) { - continue; - } - } - break; - } while ((TIMESTAMP_GET() - timestamp) < wait); - } - - value = (PIN_SWCLK_TCK_IN() << DAP_SWJ_SWCLK_TCK) | - (PIN_SWDIO_TMS_IN() << DAP_SWJ_SWDIO_TMS) | - (PIN_TDI_IN() << DAP_SWJ_TDI) | - (PIN_TDO_IN() << DAP_SWJ_TDO) | - (PIN_nTRST_IN() << DAP_SWJ_nTRST) | - (PIN_nRESET_IN() << DAP_SWJ_nRESET); - - *response = (uint8_t)value; -#else - *response = 0U; -#endif - - return ((6U << 16) | 1U); -} - - -// Process SWJ Clock command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_SWJ_Clock(const uint8_t *request, uint8_t *response) { -#if ((DAP_SWD != 0) || (DAP_JTAG != 0)) - uint32_t clock; - uint32_t delay; - - clock = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8) | - (uint32_t)(*(request+2) << 16) | - (uint32_t)(*(request+3) << 24); - - if (clock == 0U) { - *response = DAP_ERROR; - return ((4U << 16) | 1U); - } - - Set_Clock_Delay(clock); - - *response = DAP_OK; -#else - *response = DAP_ERROR; -#endif - - return ((4U << 16) | 1U); -} - - -// Process SWJ Sequence command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_SWJ_Sequence(const uint8_t *request, uint8_t *response) { - uint32_t count; - - count = *request++; - if (count == 0U) { - count = 256U; - } - -#if ((DAP_SWD != 0) || (DAP_JTAG != 0)) - SWJ_Sequence(count, request); - *response = DAP_OK; -#else - *response = DAP_ERROR; -#endif - - count = (count + 7U) >> 3; - - return (((count + 1U) << 16) | 1U); -} - - -// Process SWD Configure command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_SWD_Configure(const uint8_t *request, uint8_t *response) { -#if (DAP_SWD != 0) - uint8_t value; - - value = *request; - DAP_Data.swd_conf.turnaround = (value & 0x03U) + 1U; - DAP_Data.swd_conf.data_phase = (value & 0x04U) ? 1U : 0U; - - *response = DAP_OK; -#else - *response = DAP_ERROR; -#endif - - return ((1U << 16) | 1U); -} - - -// Process SWD Sequence command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_SWD_Sequence(const uint8_t *request, uint8_t *response) { - uint32_t sequence_info; - uint32_t sequence_count; - uint32_t request_count; - uint32_t response_count; - uint32_t count; - -#if (DAP_SWD != 0) - *response++ = DAP_OK; -#else - *response++ = DAP_ERROR; -#endif - request_count = 1U; - response_count = 1U; - - sequence_count = *request++; - while (sequence_count--) { - sequence_info = *request++; - count = sequence_info & SWD_SEQUENCE_CLK; - if (count == 0U) { - count = 64U; - } - count = (count + 7U) / 8U; -#if (DAP_SWD != 0) - if ((sequence_info & SWD_SEQUENCE_DIN) != 0U) { - PIN_SWDIO_OUT_DISABLE(); - } else { - PIN_SWDIO_OUT_ENABLE(); - } - SWD_Sequence(sequence_info, request, response); - if (sequence_count == 0U) { - PIN_SWDIO_OUT_ENABLE(); - } -#endif - if ((sequence_info & SWD_SEQUENCE_DIN) != 0U) { - request_count++; -#if (DAP_SWD != 0) - response += count; - response_count += count; -#endif - } else { - request += count; - request_count += count + 1U; - } - } - - return ((request_count << 16) | response_count); -} - - -// Process JTAG Sequence command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_JTAG_Sequence(const uint8_t *request, uint8_t *response) { - uint32_t sequence_info; - uint32_t sequence_count; - uint32_t request_count; - uint32_t response_count; - uint32_t count; - -#if (DAP_JTAG != 0) - *response++ = DAP_OK; -#else - *response++ = DAP_ERROR; -#endif - request_count = 1U; - response_count = 1U; - - sequence_count = *request++; - while (sequence_count--) { - sequence_info = *request++; - count = sequence_info & JTAG_SEQUENCE_TCK; - if (count == 0U) { - count = 64U; - } - count = (count + 7U) / 8U; -#if (DAP_JTAG != 0) - JTAG_Sequence(sequence_info, request, response); -#endif - request += count; - request_count += count + 1U; -#if (DAP_JTAG != 0) - if ((sequence_info & JTAG_SEQUENCE_TDO) != 0U) { - response += count; - response_count += count; - } -#endif - } - - return ((request_count << 16) | response_count); -} - - -// Process JTAG Configure command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_JTAG_Configure(const uint8_t *request, uint8_t *response) { - uint32_t count; -#if (DAP_JTAG != 0) - uint32_t length; - uint32_t bits; - uint32_t n; - - count = *request++; - DAP_Data.jtag_dev.count = (uint8_t)count; - - bits = 0U; - for (n = 0U; n < count; n++) { - length = *request++; - DAP_Data.jtag_dev.ir_length[n] = (uint8_t)length; - DAP_Data.jtag_dev.ir_before[n] = (uint16_t)bits; - bits += length; - } - for (n = 0U; n < count; n++) { - bits -= DAP_Data.jtag_dev.ir_length[n]; - DAP_Data.jtag_dev.ir_after[n] = (uint16_t)bits; - } - - *response = DAP_OK; -#else - count = *request; - *response = DAP_ERROR; -#endif - - return (((count + 1U) << 16) | 1U); -} - - -// Process JTAG IDCODE command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_JTAG_IDCode(const uint8_t *request, uint8_t *response) { -#if (DAP_JTAG != 0) - uint32_t data; - - if (DAP_Data.debug_port != DAP_PORT_JTAG) { - goto id_error; - } - - // Device index (JTAP TAP) - DAP_Data.jtag_dev.index = *request; - if (DAP_Data.jtag_dev.index >= DAP_Data.jtag_dev.count) { - goto id_error; - } - - // Select JTAG chain - JTAG_IR(JTAG_IDCODE); - - // Read IDCODE register - data = JTAG_ReadIDCode(); - - // Store Data - *(response+0) = DAP_OK; - *(response+1) = (uint8_t)(data >> 0); - *(response+2) = (uint8_t)(data >> 8); - *(response+3) = (uint8_t)(data >> 16); - *(response+4) = (uint8_t)(data >> 24); - - return ((1U << 16) | 5U); - -id_error: -#endif - *response = DAP_ERROR; - return ((1U << 16) | 1U); -} - - -// Process Transfer Configure command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_TransferConfigure(const uint8_t *request, uint8_t *response) { - - DAP_Data.transfer.idle_cycles = *(request+0); - DAP_Data.transfer.retry_count = (uint16_t) *(request+1) | - (uint16_t)(*(request+2) << 8); - DAP_Data.transfer.match_retry = (uint16_t) *(request+3) | - (uint16_t)(*(request+4) << 8); - - *response = DAP_OK; - return ((5U << 16) | 1U); -} - - -// Process SWD Transfer command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -#if (DAP_SWD != 0) -static uint32_t DAP_SWD_Transfer(const uint8_t *request, uint8_t *response) { - const - uint8_t *request_head; - uint32_t request_count; - uint32_t request_value; - uint8_t *response_head; - uint32_t response_count; - uint32_t response_value; - uint32_t post_read; - uint32_t check_write; - uint32_t match_value; - uint32_t match_retry; - uint32_t retry; - uint32_t data; -#if (TIMESTAMP_CLOCK != 0U) - uint32_t timestamp; -#endif - - request_head = request; - - response_count = 0U; - response_value = 0U; - response_head = response; - response += 2; - - DAP_TransferAbort = 0U; - - post_read = 0U; - check_write = 0U; - - request++; // Ignore DAP index - - request_count = *request++; - - for (; request_count != 0U; request_count--) { - request_value = *request++; - if ((request_value & DAP_TRANSFER_RnW) != 0U) { - // Read register - if (post_read) { - // Read was posted before - retry = DAP_Data.transfer.retry_count; - if ((request_value & (DAP_TRANSFER_APnDP | DAP_TRANSFER_MATCH_VALUE)) == DAP_TRANSFER_APnDP) { - // Read previous AP data and post next AP read - do { - response_value = SWD_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - } else { - // Read previous AP data - do { - response_value = SWD_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - post_read = 0U; - } - if (response_value != DAP_TRANSFER_OK) { - break; - } - // Store previous AP data - *response++ = (uint8_t) data; - *response++ = (uint8_t)(data >> 8); - *response++ = (uint8_t)(data >> 16); - *response++ = (uint8_t)(data >> 24); -#if (TIMESTAMP_CLOCK != 0U) - if (post_read) { - // Store Timestamp of next AP read - if ((request_value & DAP_TRANSFER_TIMESTAMP) != 0U) { - timestamp = DAP_Data.timestamp; - *response++ = (uint8_t) timestamp; - *response++ = (uint8_t)(timestamp >> 8); - *response++ = (uint8_t)(timestamp >> 16); - *response++ = (uint8_t)(timestamp >> 24); - } - } -#endif - } - if ((request_value & DAP_TRANSFER_MATCH_VALUE) != 0U) { - // Read with value match - match_value = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8) | - (uint32_t)(*(request+2) << 16) | - (uint32_t)(*(request+3) << 24); - request += 4; - match_retry = DAP_Data.transfer.match_retry; - if ((request_value & DAP_TRANSFER_APnDP) != 0U) { - // Post AP read - retry = DAP_Data.transfer.retry_count; - do { - response_value = SWD_Transfer(request_value, NULL); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } - } - do { - // Read register until its value matches or retry counter expires - retry = DAP_Data.transfer.retry_count; - do { - response_value = SWD_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } - } while (((data & DAP_Data.transfer.match_mask) != match_value) && match_retry-- && !DAP_TransferAbort); - if ((data & DAP_Data.transfer.match_mask) != match_value) { - response_value |= DAP_TRANSFER_MISMATCH; - } - if (response_value != DAP_TRANSFER_OK) { - break; - } - } else { - // Normal read - retry = DAP_Data.transfer.retry_count; - if ((request_value & DAP_TRANSFER_APnDP) != 0U) { - // Read AP register - if (post_read == 0U) { - // Post AP read - do { - response_value = SWD_Transfer(request_value, NULL); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } -#if (TIMESTAMP_CLOCK != 0U) - // Store Timestamp - if ((request_value & DAP_TRANSFER_TIMESTAMP) != 0U) { - timestamp = DAP_Data.timestamp; - *response++ = (uint8_t) timestamp; - *response++ = (uint8_t)(timestamp >> 8); - *response++ = (uint8_t)(timestamp >> 16); - *response++ = (uint8_t)(timestamp >> 24); - } -#endif - post_read = 1U; - } - } else { - // Read DP register - do { - response_value = SWD_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } -#if (TIMESTAMP_CLOCK != 0U) - // Store Timestamp - if ((request_value & DAP_TRANSFER_TIMESTAMP) != 0U) { - timestamp = DAP_Data.timestamp; - *response++ = (uint8_t) timestamp; - *response++ = (uint8_t)(timestamp >> 8); - *response++ = (uint8_t)(timestamp >> 16); - *response++ = (uint8_t)(timestamp >> 24); - } -#endif - // Store data - *response++ = (uint8_t) data; - *response++ = (uint8_t)(data >> 8); - *response++ = (uint8_t)(data >> 16); - *response++ = (uint8_t)(data >> 24); - } - } - check_write = 0U; - } else { - // Write register - if (post_read) { - // Read previous data - retry = DAP_Data.transfer.retry_count; - do { - response_value = SWD_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } - // Store previous data - *response++ = (uint8_t) data; - *response++ = (uint8_t)(data >> 8); - *response++ = (uint8_t)(data >> 16); - *response++ = (uint8_t)(data >> 24); - post_read = 0U; - } - // Load data - data = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8) | - (uint32_t)(*(request+2) << 16) | - (uint32_t)(*(request+3) << 24); - request += 4; - if ((request_value & DAP_TRANSFER_MATCH_MASK) != 0U) { - // Write match mask - DAP_Data.transfer.match_mask = data; - response_value = DAP_TRANSFER_OK; - } else { - // Write DP/AP register - retry = DAP_Data.transfer.retry_count; - do { - response_value = SWD_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } -#if (TIMESTAMP_CLOCK != 0U) - // Store Timestamp - if ((request_value & DAP_TRANSFER_TIMESTAMP) != 0U) { - timestamp = DAP_Data.timestamp; - *response++ = (uint8_t) timestamp; - *response++ = (uint8_t)(timestamp >> 8); - *response++ = (uint8_t)(timestamp >> 16); - *response++ = (uint8_t)(timestamp >> 24); - } -#endif - check_write = 1U; - } - } - response_count++; - if (DAP_TransferAbort) { - break; - } - } - - for (; request_count != 0U; request_count--) { - // Process canceled requests - request_value = *request++; - if ((request_value & DAP_TRANSFER_RnW) != 0U) { - // Read register - if ((request_value & DAP_TRANSFER_MATCH_VALUE) != 0U) { - // Read with value match - request += 4; - } - } else { - // Write register - request += 4; - } - } - - if (response_value == DAP_TRANSFER_OK) { - if (post_read) { - // Read previous data - retry = DAP_Data.transfer.retry_count; - do { - response_value = SWD_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - goto end; - } - // Store previous data - *response++ = (uint8_t) data; - *response++ = (uint8_t)(data >> 8); - *response++ = (uint8_t)(data >> 16); - *response++ = (uint8_t)(data >> 24); - } else if (check_write) { - // Check last write - retry = DAP_Data.transfer.retry_count; - do { - response_value = SWD_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, NULL); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - } - } - -end: - *(response_head+0) = (uint8_t)response_count; - *(response_head+1) = (uint8_t)response_value; - - return (((uint32_t)(request - request_head) << 16) | (uint32_t)(response - response_head)); -} -#endif - - -// Process JTAG Transfer command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -#if (DAP_JTAG != 0) -static uint32_t DAP_JTAG_Transfer(const uint8_t *request, uint8_t *response) { - const - uint8_t *request_head; - uint32_t request_count; - uint32_t request_value; - uint32_t request_ir; - uint8_t *response_head; - uint32_t response_count; - uint32_t response_value; - uint32_t post_read; - uint32_t match_value; - uint32_t match_retry; - uint32_t retry; - uint32_t data; - uint32_t ir; -#if (TIMESTAMP_CLOCK != 0U) - uint32_t timestamp; -#endif - - request_head = request; - - response_count = 0U; - response_value = 0U; - response_head = response; - response += 2; - - DAP_TransferAbort = 0U; - - ir = 0U; - post_read = 0U; - - // Device index (JTAP TAP) - DAP_Data.jtag_dev.index = *request++; - if (DAP_Data.jtag_dev.index >= DAP_Data.jtag_dev.count) { - goto end; - } - - request_count = *request++; - - for (; request_count != 0U; request_count--) { - request_value = *request++; - request_ir = (request_value & DAP_TRANSFER_APnDP) ? JTAG_APACC : JTAG_DPACC; - if ((request_value & DAP_TRANSFER_RnW) != 0U) { - // Read register - if (post_read) { - // Read was posted before - retry = DAP_Data.transfer.retry_count; - if ((ir == request_ir) && ((request_value & DAP_TRANSFER_MATCH_VALUE) == 0U)) { - // Read previous data and post next read - do { - response_value = JTAG_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - } else { - // Select JTAG chain - if (ir != JTAG_DPACC) { - ir = JTAG_DPACC; - JTAG_IR(ir); - } - // Read previous data - do { - response_value = JTAG_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - post_read = 0U; - } - if (response_value != DAP_TRANSFER_OK) { - break; - } - // Store previous data - *response++ = (uint8_t) data; - *response++ = (uint8_t)(data >> 8); - *response++ = (uint8_t)(data >> 16); - *response++ = (uint8_t)(data >> 24); -#if (TIMESTAMP_CLOCK != 0U) - if (post_read) { - // Store Timestamp of next AP read - if ((request_value & DAP_TRANSFER_TIMESTAMP) != 0U) { - timestamp = DAP_Data.timestamp; - *response++ = (uint8_t) timestamp; - *response++ = (uint8_t)(timestamp >> 8); - *response++ = (uint8_t)(timestamp >> 16); - *response++ = (uint8_t)(timestamp >> 24); - } - } -#endif - } - if ((request_value & DAP_TRANSFER_MATCH_VALUE) != 0U) { - // Read with value match - match_value = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8) | - (uint32_t)(*(request+2) << 16) | - (uint32_t)(*(request+3) << 24); - request += 4; - match_retry = DAP_Data.transfer.match_retry; - // Select JTAG chain - if (ir != request_ir) { - ir = request_ir; - JTAG_IR(ir); - } - // Post DP/AP read - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(request_value, NULL); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } - do { - // Read register until its value matches or retry counter expires - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } - } while (((data & DAP_Data.transfer.match_mask) != match_value) && match_retry-- && !DAP_TransferAbort); - if ((data & DAP_Data.transfer.match_mask) != match_value) { - response_value |= DAP_TRANSFER_MISMATCH; - } - if (response_value != DAP_TRANSFER_OK) { - break; - } - } else { - // Normal read - if (post_read == 0U) { - // Select JTAG chain - if (ir != request_ir) { - ir = request_ir; - JTAG_IR(ir); - } - // Post DP/AP read - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(request_value, NULL); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } -#if (TIMESTAMP_CLOCK != 0U) - // Store Timestamp - if ((request_value & DAP_TRANSFER_TIMESTAMP) != 0U) { - timestamp = DAP_Data.timestamp; - *response++ = (uint8_t) timestamp; - *response++ = (uint8_t)(timestamp >> 8); - *response++ = (uint8_t)(timestamp >> 16); - *response++ = (uint8_t)(timestamp >> 24); - } -#endif - post_read = 1U; - } - } - } else { - // Write register - if (post_read) { - // Select JTAG chain - if (ir != JTAG_DPACC) { - ir = JTAG_DPACC; - JTAG_IR(ir); - } - // Read previous data - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } - // Store previous data - *response++ = (uint8_t) data; - *response++ = (uint8_t)(data >> 8); - *response++ = (uint8_t)(data >> 16); - *response++ = (uint8_t)(data >> 24); - post_read = 0U; - } - // Load data - data = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8) | - (uint32_t)(*(request+2) << 16) | - (uint32_t)(*(request+3) << 24); - request += 4; - if ((request_value & DAP_TRANSFER_MATCH_MASK) != 0U) { - // Write match mask - DAP_Data.transfer.match_mask = data; - response_value = DAP_TRANSFER_OK; - } else { - // Select JTAG chain - if (ir != request_ir) { - ir = request_ir; - JTAG_IR(ir); - } - // Write DP/AP register - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - break; - } -#if (TIMESTAMP_CLOCK != 0U) - // Store Timestamp - if ((request_value & DAP_TRANSFER_TIMESTAMP) != 0U) { - timestamp = DAP_Data.timestamp; - *response++ = (uint8_t) timestamp; - *response++ = (uint8_t)(timestamp >> 8); - *response++ = (uint8_t)(timestamp >> 16); - *response++ = (uint8_t)(timestamp >> 24); - } -#endif - } - } - response_count++; - if (DAP_TransferAbort) { - break; - } - } - - for (; request_count != 0U; request_count--) { - // Process canceled requests - request_value = *request++; - if ((request_value & DAP_TRANSFER_RnW) != 0U) { - // Read register - if ((request_value & DAP_TRANSFER_MATCH_VALUE) != 0U) { - // Read with value match - request += 4; - } - } else { - // Write register - request += 4; - } - } - - if (response_value == DAP_TRANSFER_OK) { - // Select JTAG chain - if (ir != JTAG_DPACC) { - ir = JTAG_DPACC; - JTAG_IR(ir); - } - if (post_read) { - // Read previous data - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - goto end; - } - // Store previous data - *response++ = (uint8_t) data; - *response++ = (uint8_t)(data >> 8); - *response++ = (uint8_t)(data >> 16); - *response++ = (uint8_t)(data >> 24); - } else { - // Check last write - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, NULL); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - } - } - -end: - *(response_head+0) = (uint8_t)response_count; - *(response_head+1) = (uint8_t)response_value; - - return (((uint32_t)(request - request_head) << 16) | (uint32_t)(response - response_head)); -} -#endif - - -// Process Dummy Transfer command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_Dummy_Transfer(const uint8_t *request, uint8_t *response) { - const - uint8_t *request_head; - uint32_t request_count; - uint32_t request_value; - - request_head = request; - - request++; // Ignore DAP index - - request_count = *request++; - - for (; request_count != 0U; request_count--) { - // Process dummy requests - request_value = *request++; - if ((request_value & DAP_TRANSFER_RnW) != 0U) { - // Read register - if ((request_value & DAP_TRANSFER_MATCH_VALUE) != 0U) { - // Read with value match - request += 4; - } - } else { - // Write register - request += 4; - } - } - - *(response+0) = 0U; // Response count - *(response+1) = 0U; // Response value - - return (((uint32_t)(request - request_head) << 16) | 2U); -} - - -// Process Transfer command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_Transfer(const uint8_t *request, uint8_t *response) { - uint32_t num; - - switch (DAP_Data.debug_port) { -#if (DAP_SWD != 0) - case DAP_PORT_SWD: - num = DAP_SWD_Transfer(request, response); - break; -#endif -#if (DAP_JTAG != 0) - case DAP_PORT_JTAG: - num = DAP_JTAG_Transfer(request, response); - break; -#endif - default: - num = DAP_Dummy_Transfer(request, response); - break; - } - - return (num); -} - - -// Process SWD Transfer Block command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response -#if (DAP_SWD != 0) -static uint32_t DAP_SWD_TransferBlock(const uint8_t *request, uint8_t *response) { - uint32_t request_count; - uint32_t request_value; - uint32_t response_count; - uint32_t response_value; - uint8_t *response_head; - uint32_t retry; - uint32_t data; - - response_count = 0U; - response_value = 0U; - response_head = response; - response += 3; - - DAP_TransferAbort = 0U; - - request++; // Ignore DAP index - - request_count = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8); - request += 2; - if (request_count == 0U) { - goto end; - } - - request_value = *request++; - if ((request_value & DAP_TRANSFER_RnW) != 0U) { - // Read register block - if ((request_value & DAP_TRANSFER_APnDP) != 0U) { - // Post AP read - retry = DAP_Data.transfer.retry_count; - do { - response_value = SWD_Transfer(request_value, NULL); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - goto end; - } - } - while (request_count--) { - // Read DP/AP register - if ((request_count == 0U) && ((request_value & DAP_TRANSFER_APnDP) != 0U)) { - // Last AP read - request_value = DP_RDBUFF | DAP_TRANSFER_RnW; - } - retry = DAP_Data.transfer.retry_count; - do { - response_value = SWD_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - goto end; - } - // Store data - *response++ = (uint8_t) data; - *response++ = (uint8_t)(data >> 8); - *response++ = (uint8_t)(data >> 16); - *response++ = (uint8_t)(data >> 24); - response_count++; - } - } else { - // Write register block - while (request_count--) { - // Load data - data = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8) | - (uint32_t)(*(request+2) << 16) | - (uint32_t)(*(request+3) << 24); - request += 4; - // Write DP/AP register - retry = DAP_Data.transfer.retry_count; - do { - response_value = SWD_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - goto end; - } - response_count++; - } - // Check last write - retry = DAP_Data.transfer.retry_count; - do { - response_value = SWD_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, NULL); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - } - -end: - *(response_head+0) = (uint8_t)(response_count >> 0); - *(response_head+1) = (uint8_t)(response_count >> 8); - *(response_head+2) = (uint8_t) response_value; - - return ((uint32_t)(response - response_head)); -} -#endif - - -// Process JTAG Transfer Block command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response -#if (DAP_JTAG != 0) -static uint32_t DAP_JTAG_TransferBlock(const uint8_t *request, uint8_t *response) { - uint32_t request_count; - uint32_t request_value; - uint32_t response_count; - uint32_t response_value; - uint8_t *response_head; - uint32_t retry; - uint32_t data; - uint32_t ir; - - response_count = 0U; - response_value = 0U; - response_head = response; - response += 3; - - DAP_TransferAbort = 0U; - - // Device index (JTAP TAP) - DAP_Data.jtag_dev.index = *request++; - if (DAP_Data.jtag_dev.index >= DAP_Data.jtag_dev.count) { - goto end; - } - - request_count = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8); - request += 2; - if (request_count == 0U) { - goto end; - } - - request_value = *request++; - - // Select JTAG chain - ir = (request_value & DAP_TRANSFER_APnDP) ? JTAG_APACC : JTAG_DPACC; - JTAG_IR(ir); - - if ((request_value & DAP_TRANSFER_RnW) != 0U) { - // Post read - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(request_value, NULL); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - goto end; - } - // Read register block - while (request_count--) { - // Read DP/AP register - if (request_count == 0U) { - // Last read - if (ir != JTAG_DPACC) { - JTAG_IR(JTAG_DPACC); - } - request_value = DP_RDBUFF | DAP_TRANSFER_RnW; - } - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - goto end; - } - // Store data - *response++ = (uint8_t) data; - *response++ = (uint8_t)(data >> 8); - *response++ = (uint8_t)(data >> 16); - *response++ = (uint8_t)(data >> 24); - response_count++; - } - } else { - // Write register block - while (request_count--) { - // Load data - data = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8) | - (uint32_t)(*(request+2) << 16) | - (uint32_t)(*(request+3) << 24); - request += 4; - // Write DP/AP register - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(request_value, &data); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - if (response_value != DAP_TRANSFER_OK) { - goto end; - } - response_count++; - } - // Check last write - if (ir != JTAG_DPACC) { - JTAG_IR(JTAG_DPACC); - } - retry = DAP_Data.transfer.retry_count; - do { - response_value = JTAG_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, NULL); - } while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort); - } - -end: - *(response_head+0) = (uint8_t)(response_count >> 0); - *(response_head+1) = (uint8_t)(response_count >> 8); - *(response_head+2) = (uint8_t) response_value; - - return ((uint32_t)(response - response_head)); -} -#endif - - -// Process Transfer Block command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_TransferBlock(const uint8_t *request, uint8_t *response) { - uint32_t num; - - switch (DAP_Data.debug_port) { -#if (DAP_SWD != 0) - case DAP_PORT_SWD: - num = DAP_SWD_TransferBlock (request, response); - break; -#endif -#if (DAP_JTAG != 0) - case DAP_PORT_JTAG: - num = DAP_JTAG_TransferBlock(request, response); - break; -#endif - default: - *(response+0) = 0U; // Response count [7:0] - *(response+1) = 0U; // Response count[15:8] - *(response+2) = 0U; // Response value - num = 3U; - break; - } - - if ((*(request+3) & DAP_TRANSFER_RnW) != 0U) { - // Read register block - num |= 4U << 16; - } else { - // Write register block - num |= (4U + (((uint32_t)(*(request+1)) | (uint32_t)(*(request+2) << 8)) * 4)) << 16; - } - - return (num); -} - - -// Process SWD Write ABORT command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response -#if (DAP_SWD != 0) -static uint32_t DAP_SWD_WriteAbort(const uint8_t *request, uint8_t *response) { - uint32_t data; - - // Load data (Ignore DAP index) - data = (uint32_t)(*(request+1) << 0) | - (uint32_t)(*(request+2) << 8) | - (uint32_t)(*(request+3) << 16) | - (uint32_t)(*(request+4) << 24); - - // Write Abort register - SWD_Transfer(DP_ABORT, &data); - - *response = DAP_OK; - return (1U); -} -#endif - - -// Process JTAG Write ABORT command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response -#if (DAP_JTAG != 0) -static uint32_t DAP_JTAG_WriteAbort(const uint8_t *request, uint8_t *response) { - uint32_t data; - - // Device index (JTAP TAP) - DAP_Data.jtag_dev.index = *request; - if (DAP_Data.jtag_dev.index >= DAP_Data.jtag_dev.count) { - *response = DAP_ERROR; - return (1U); - } - - // Select JTAG chain - JTAG_IR(JTAG_ABORT); - - // Load data - data = (uint32_t)(*(request+1) << 0) | - (uint32_t)(*(request+2) << 8) | - (uint32_t)(*(request+3) << 16) | - (uint32_t)(*(request+4) << 24); - - // Write Abort register - JTAG_WriteAbort(data); - - *response = DAP_OK; - return (1U); -} -#endif - - -// Process Write ABORT command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -static uint32_t DAP_WriteAbort(const uint8_t *request, uint8_t *response) { - uint32_t num; - - switch (DAP_Data.debug_port) { -#if (DAP_SWD != 0) - case DAP_PORT_SWD: - num = DAP_SWD_WriteAbort (request, response); - break; -#endif -#if (DAP_JTAG != 0) - case DAP_PORT_JTAG: - num = DAP_JTAG_WriteAbort(request, response); - break; -#endif - default: - *response = DAP_ERROR; - num = 1U; - break; - } - return ((5U << 16) | num); -} - - -// Process DAP Vendor command request and prepare response -// Default function (can be overridden) -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -__WEAK uint32_t DAP_ProcessVendorCommand(const uint8_t *request, uint8_t *response) { - (void)request; - *response = ID_DAP_Invalid; - return ((1U << 16) | 1U); -} - - -// Process DAP command request and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t DAP_ProcessCommand(const uint8_t *request, uint8_t *response) { - uint32_t num; - - if ((*request >= ID_DAP_Vendor0) && (*request <= ID_DAP_Vendor31)) { - return DAP_ProcessVendorCommand(request, response); - } - - *response++ = *request; - - switch (*request++) { - case ID_DAP_Info: - num = DAP_Info(*request, response+1); - *response = (uint8_t)num; - return ((2U << 16) + 2U + num); - - case ID_DAP_HostStatus: - num = DAP_HostStatus(request, response); - break; - - case ID_DAP_Connect: - num = DAP_Connect(request, response); - break; - case ID_DAP_Disconnect: - num = DAP_Disconnect(response); - break; - - case ID_DAP_Delay: - num = DAP_Delay(request, response); - break; - - case ID_DAP_ResetTarget: - num = DAP_ResetTarget(response); - break; - - case ID_DAP_SWJ_Pins: - num = DAP_SWJ_Pins(request, response); - break; - case ID_DAP_SWJ_Clock: - num = DAP_SWJ_Clock(request, response); - break; - case ID_DAP_SWJ_Sequence: - num = DAP_SWJ_Sequence(request, response); - break; - - case ID_DAP_SWD_Configure: - num = DAP_SWD_Configure(request, response); - break; - case ID_DAP_SWD_Sequence: - num = DAP_SWD_Sequence(request, response); - break; - - case ID_DAP_JTAG_Sequence: - num = DAP_JTAG_Sequence(request, response); - break; - case ID_DAP_JTAG_Configure: - num = DAP_JTAG_Configure(request, response); - break; - case ID_DAP_JTAG_IDCODE: - num = DAP_JTAG_IDCode(request, response); - break; - - case ID_DAP_TransferConfigure: - num = DAP_TransferConfigure(request, response); - break; - case ID_DAP_Transfer: - num = DAP_Transfer(request, response); - break; - case ID_DAP_TransferBlock: - num = DAP_TransferBlock(request, response); - break; - - case ID_DAP_WriteABORT: - num = DAP_WriteAbort(request, response); - break; - -#if ((SWO_UART != 0) || (SWO_MANCHESTER != 0)) - case ID_DAP_SWO_Transport: - num = SWO_Transport(request, response); - break; - case ID_DAP_SWO_Mode: - num = SWO_Mode(request, response); - break; - case ID_DAP_SWO_Baudrate: - num = SWO_Baudrate(request, response); - break; - case ID_DAP_SWO_Control: - num = SWO_Control(request, response); - break; - case ID_DAP_SWO_Status: - num = SWO_Status(response); - break; - case ID_DAP_SWO_ExtendedStatus: - num = SWO_ExtendedStatus(request, response); - break; - case ID_DAP_SWO_Data: - num = SWO_Data(request, response); - break; -#endif - -#if (DAP_UART != 0) - case ID_DAP_UART_Transport: - num = UART_Transport(request, response); - break; - case ID_DAP_UART_Configure: - num = UART_Configure(request, response); - break; - case ID_DAP_UART_Control: - num = UART_Control(request, response); - break; - case ID_DAP_UART_Status: - num = UART_Status(response); - break; - case ID_DAP_UART_Transfer: - num = UART_Transfer(request, response); - break; -#endif - - default: - *(response-1) = ID_DAP_Invalid; - return ((1U << 16) | 1U); - } - - return ((1U << 16) + 1U + num); -} - - -// Execute DAP command (process request and prepare response) -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t DAP_ExecuteCommand(const uint8_t *request, uint8_t *response) { - uint32_t cnt, num, n; - - if (*request == ID_DAP_ExecuteCommands) { - *response++ = *request++; - cnt = *request++; - *response++ = (uint8_t)cnt; - num = (2U << 16) | 2U; - while (cnt--) { - n = DAP_ProcessCommand(request, response); - num += n; - request += (uint16_t)(n >> 16); - response += (uint16_t) n; - } - return (num); - } - - return DAP_ProcessCommand(request, response); -} - - -// Setup DAP -void DAP_Setup(void) { - - // Default settings - DAP_Data.debug_port = 0U; - DAP_Data.transfer.idle_cycles = 0U; - DAP_Data.transfer.retry_count = 100U; - DAP_Data.transfer.match_retry = 0U; - DAP_Data.transfer.match_mask = 0x00000000U; -#if (DAP_SWD != 0) - DAP_Data.swd_conf.turnaround = 1U; - DAP_Data.swd_conf.data_phase = 0U; -#endif -#if (DAP_JTAG != 0) - DAP_Data.jtag_dev.count = 0U; -#endif - - // Sets DAP_Data.fast_clock and DAP_Data.clock_delay. - Set_Clock_Delay(DAP_DEFAULT_SWJ_CLOCK); - - DAP_SETUP(); // Device specific setup -} diff --git a/Drivers/CMSIS/DAP/Firmware/Source/DAP_vendor.c b/Drivers/CMSIS/DAP/Firmware/Source/DAP_vendor.c deleted file mode 100644 index 2d8b486..0000000 --- a/Drivers/CMSIS/DAP/Firmware/Source/DAP_vendor.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 1. December 2017 - * $Revision: V2.0.0 - * - * Project: CMSIS-DAP Source - * Title: DAP_vendor.c CMSIS-DAP Vendor Commands - * - *---------------------------------------------------------------------------*/ - -#include "DAP_config.h" -#include "DAP.h" - -//************************************************************************************************** -/** -\defgroup DAP_Vendor_Adapt_gr Adapt Vendor Commands -\ingroup DAP_Vendor_gr -@{ - -The file DAP_vendor.c provides template source code for extension of a Debug Unit with -Vendor Commands. Copy this file to the project folder of the Debug Unit and add the -file to the MDK-ARM project under the file group Configuration. -*/ - -/** Process DAP Vendor Command and prepare Response Data -\param request pointer to request data -\param response pointer to response data -\return number of bytes in response (lower 16 bits) - number of bytes in request (upper 16 bits) -*/ -uint32_t DAP_ProcessVendorCommand(const uint8_t *request, uint8_t *response) { - uint32_t num = (1U << 16) | 1U; - - *response++ = *request; // copy Command ID - - switch (*request++) { // first byte in request is Command ID - case ID_DAP_Vendor0: -#if 0 // example user command - num += 1U << 16; // increment request count - if (*request == 1U) { // when first command data byte is 1 - *response++ = 'X'; // send 'X' as response - num++; // increment response count - } -#endif - break; - - case ID_DAP_Vendor1: break; - case ID_DAP_Vendor2: break; - case ID_DAP_Vendor3: break; - case ID_DAP_Vendor4: break; - case ID_DAP_Vendor5: break; - case ID_DAP_Vendor6: break; - case ID_DAP_Vendor7: break; - case ID_DAP_Vendor8: break; - case ID_DAP_Vendor9: break; - case ID_DAP_Vendor10: break; - case ID_DAP_Vendor11: break; - case ID_DAP_Vendor12: break; - case ID_DAP_Vendor13: break; - case ID_DAP_Vendor14: break; - case ID_DAP_Vendor15: break; - case ID_DAP_Vendor16: break; - case ID_DAP_Vendor17: break; - case ID_DAP_Vendor18: break; - case ID_DAP_Vendor19: break; - case ID_DAP_Vendor20: break; - case ID_DAP_Vendor21: break; - case ID_DAP_Vendor22: break; - case ID_DAP_Vendor23: break; - case ID_DAP_Vendor24: break; - case ID_DAP_Vendor25: break; - case ID_DAP_Vendor26: break; - case ID_DAP_Vendor27: break; - case ID_DAP_Vendor28: break; - case ID_DAP_Vendor29: break; - case ID_DAP_Vendor30: break; - case ID_DAP_Vendor31: break; - } - - return (num); -} - -///@} diff --git a/Drivers/CMSIS/DAP/Firmware/Source/JTAG_DP.c b/Drivers/CMSIS/DAP/Firmware/Source/JTAG_DP.c deleted file mode 100644 index 1bb89e5..0000000 --- a/Drivers/CMSIS/DAP/Firmware/Source/JTAG_DP.c +++ /dev/null @@ -1,370 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 1. December 2017 - * $Revision: V2.0.0 - * - * Project: CMSIS-DAP Source - * Title: JTAG_DP.c CMSIS-DAP JTAG DP I/O - * - *---------------------------------------------------------------------------*/ - -#include "DAP_config.h" -#include "DAP.h" - - -// JTAG Macros - -#define PIN_TCK_SET PIN_SWCLK_TCK_SET -#define PIN_TCK_CLR PIN_SWCLK_TCK_CLR -#define PIN_TMS_SET PIN_SWDIO_TMS_SET -#define PIN_TMS_CLR PIN_SWDIO_TMS_CLR - -#define JTAG_CYCLE_TCK() \ - PIN_TCK_CLR(); \ - PIN_DELAY(); \ - PIN_TCK_SET(); \ - PIN_DELAY() - -#define JTAG_CYCLE_TDI(tdi) \ - PIN_TDI_OUT(tdi); \ - PIN_TCK_CLR(); \ - PIN_DELAY(); \ - PIN_TCK_SET(); \ - PIN_DELAY() - -#define JTAG_CYCLE_TDO(tdo) \ - PIN_TCK_CLR(); \ - PIN_DELAY(); \ - tdo = PIN_TDO_IN(); \ - PIN_TCK_SET(); \ - PIN_DELAY() - -#define JTAG_CYCLE_TDIO(tdi,tdo) \ - PIN_TDI_OUT(tdi); \ - PIN_TCK_CLR(); \ - PIN_DELAY(); \ - tdo = PIN_TDO_IN(); \ - PIN_TCK_SET(); \ - PIN_DELAY() - -#define PIN_DELAY() PIN_DELAY_SLOW(DAP_Data.clock_delay) - - -#if (DAP_JTAG != 0) - - -// Generate JTAG Sequence -// info: sequence information -// tdi: pointer to TDI generated data -// tdo: pointer to TDO captured data -// return: none -void JTAG_Sequence (uint32_t info, const uint8_t *tdi, uint8_t *tdo) { - uint32_t i_val; - uint32_t o_val; - uint32_t bit; - uint32_t n, k; - - n = info & JTAG_SEQUENCE_TCK; - if (n == 0U) { - n = 64U; - } - - if (info & JTAG_SEQUENCE_TMS) { - PIN_TMS_SET(); - } else { - PIN_TMS_CLR(); - } - - while (n) { - i_val = *tdi++; - o_val = 0U; - for (k = 8U; k && n; k--, n--) { - JTAG_CYCLE_TDIO(i_val, bit); - i_val >>= 1; - o_val >>= 1; - o_val |= bit << 7; - } - o_val >>= k; - if (info & JTAG_SEQUENCE_TDO) { - *tdo++ = (uint8_t)o_val; - } - } -} - - -// JTAG Set IR -// ir: IR value -// return: none -#define JTAG_IR_Function(speed) /**/ \ -static void JTAG_IR_##speed (uint32_t ir) { \ - uint32_t n; \ - \ - PIN_TMS_SET(); \ - JTAG_CYCLE_TCK(); /* Select-DR-Scan */ \ - JTAG_CYCLE_TCK(); /* Select-IR-Scan */ \ - PIN_TMS_CLR(); \ - JTAG_CYCLE_TCK(); /* Capture-IR */ \ - JTAG_CYCLE_TCK(); /* Shift-IR */ \ - \ - PIN_TDI_OUT(1U); \ - for (n = DAP_Data.jtag_dev.ir_before[DAP_Data.jtag_dev.index]; n; n--) { \ - JTAG_CYCLE_TCK(); /* Bypass before data */ \ - } \ - for (n = DAP_Data.jtag_dev.ir_length[DAP_Data.jtag_dev.index] - 1U; n; n--) { \ - JTAG_CYCLE_TDI(ir); /* Set IR bits (except last) */ \ - ir >>= 1; \ - } \ - n = DAP_Data.jtag_dev.ir_after[DAP_Data.jtag_dev.index]; \ - if (n) { \ - JTAG_CYCLE_TDI(ir); /* Set last IR bit */ \ - PIN_TDI_OUT(1U); \ - for (--n; n; n--) { \ - JTAG_CYCLE_TCK(); /* Bypass after data */ \ - } \ - PIN_TMS_SET(); \ - JTAG_CYCLE_TCK(); /* Bypass & Exit1-IR */ \ - } else { \ - PIN_TMS_SET(); \ - JTAG_CYCLE_TDI(ir); /* Set last IR bit & Exit1-IR */ \ - } \ - \ - JTAG_CYCLE_TCK(); /* Update-IR */ \ - PIN_TMS_CLR(); \ - JTAG_CYCLE_TCK(); /* Idle */ \ - PIN_TDI_OUT(1U); \ -} - - -// JTAG Transfer I/O -// request: A[3:2] RnW APnDP -// data: DATA[31:0] -// return: ACK[2:0] -#define JTAG_TransferFunction(speed) /**/ \ -static uint8_t JTAG_Transfer##speed (uint32_t request, uint32_t *data) { \ - uint32_t ack; \ - uint32_t bit; \ - uint32_t val; \ - uint32_t n; \ - \ - PIN_TMS_SET(); \ - JTAG_CYCLE_TCK(); /* Select-DR-Scan */ \ - PIN_TMS_CLR(); \ - JTAG_CYCLE_TCK(); /* Capture-DR */ \ - JTAG_CYCLE_TCK(); /* Shift-DR */ \ - \ - for (n = DAP_Data.jtag_dev.index; n; n--) { \ - JTAG_CYCLE_TCK(); /* Bypass before data */ \ - } \ - \ - JTAG_CYCLE_TDIO(request >> 1, bit); /* Set RnW, Get ACK.0 */ \ - ack = bit << 1; \ - JTAG_CYCLE_TDIO(request >> 2, bit); /* Set A2, Get ACK.1 */ \ - ack |= bit << 0; \ - JTAG_CYCLE_TDIO(request >> 3, bit); /* Set A3, Get ACK.2 */ \ - ack |= bit << 2; \ - \ - if (ack != DAP_TRANSFER_OK) { \ - /* Exit on error */ \ - PIN_TMS_SET(); \ - JTAG_CYCLE_TCK(); /* Exit1-DR */ \ - goto exit; \ - } \ - \ - if (request & DAP_TRANSFER_RnW) { \ - /* Read Transfer */ \ - val = 0U; \ - for (n = 31U; n; n--) { \ - JTAG_CYCLE_TDO(bit); /* Get D0..D30 */ \ - val |= bit << 31; \ - val >>= 1; \ - } \ - n = DAP_Data.jtag_dev.count - DAP_Data.jtag_dev.index - 1U; \ - if (n) { \ - JTAG_CYCLE_TDO(bit); /* Get D31 */ \ - for (--n; n; n--) { \ - JTAG_CYCLE_TCK(); /* Bypass after data */ \ - } \ - PIN_TMS_SET(); \ - JTAG_CYCLE_TCK(); /* Bypass & Exit1-DR */ \ - } else { \ - PIN_TMS_SET(); \ - JTAG_CYCLE_TDO(bit); /* Get D31 & Exit1-DR */ \ - } \ - val |= bit << 31; \ - if (data) { *data = val; } \ - } else { \ - /* Write Transfer */ \ - val = *data; \ - for (n = 31U; n; n--) { \ - JTAG_CYCLE_TDI(val); /* Set D0..D30 */ \ - val >>= 1; \ - } \ - n = DAP_Data.jtag_dev.count - DAP_Data.jtag_dev.index - 1U; \ - if (n) { \ - JTAG_CYCLE_TDI(val); /* Set D31 */ \ - for (--n; n; n--) { \ - JTAG_CYCLE_TCK(); /* Bypass after data */ \ - } \ - PIN_TMS_SET(); \ - JTAG_CYCLE_TCK(); /* Bypass & Exit1-DR */ \ - } else { \ - PIN_TMS_SET(); \ - JTAG_CYCLE_TDI(val); /* Set D31 & Exit1-DR */ \ - } \ - } \ - \ -exit: \ - JTAG_CYCLE_TCK(); /* Update-DR */ \ - PIN_TMS_CLR(); \ - JTAG_CYCLE_TCK(); /* Idle */ \ - PIN_TDI_OUT(1U); \ - \ - /* Capture Timestamp */ \ - if (request & DAP_TRANSFER_TIMESTAMP) { \ - DAP_Data.timestamp = TIMESTAMP_GET(); \ - } \ - \ - /* Idle cycles */ \ - n = DAP_Data.transfer.idle_cycles; \ - while (n--) { \ - JTAG_CYCLE_TCK(); /* Idle */ \ - } \ - \ - return ((uint8_t)ack); \ -} - - -#undef PIN_DELAY -#define PIN_DELAY() PIN_DELAY_FAST() -JTAG_IR_Function(Fast) -JTAG_TransferFunction(Fast) - -#undef PIN_DELAY -#define PIN_DELAY() PIN_DELAY_SLOW(DAP_Data.clock_delay) -JTAG_IR_Function(Slow) -JTAG_TransferFunction(Slow) - - -// JTAG Read IDCODE register -// return: value read -uint32_t JTAG_ReadIDCode (void) { - uint32_t bit; - uint32_t val; - uint32_t n; - - PIN_TMS_SET(); - JTAG_CYCLE_TCK(); /* Select-DR-Scan */ - PIN_TMS_CLR(); - JTAG_CYCLE_TCK(); /* Capture-DR */ - JTAG_CYCLE_TCK(); /* Shift-DR */ - - for (n = DAP_Data.jtag_dev.index; n; n--) { - JTAG_CYCLE_TCK(); /* Bypass before data */ - } - - val = 0U; - for (n = 31U; n; n--) { - JTAG_CYCLE_TDO(bit); /* Get D0..D30 */ - val |= bit << 31; - val >>= 1; - } - PIN_TMS_SET(); - JTAG_CYCLE_TDO(bit); /* Get D31 & Exit1-DR */ - val |= bit << 31; - - JTAG_CYCLE_TCK(); /* Update-DR */ - PIN_TMS_CLR(); - JTAG_CYCLE_TCK(); /* Idle */ - - return (val); -} - - -// JTAG Write ABORT register -// data: value to write -// return: none -void JTAG_WriteAbort (uint32_t data) { - uint32_t n; - - PIN_TMS_SET(); - JTAG_CYCLE_TCK(); /* Select-DR-Scan */ - PIN_TMS_CLR(); - JTAG_CYCLE_TCK(); /* Capture-DR */ - JTAG_CYCLE_TCK(); /* Shift-DR */ - - for (n = DAP_Data.jtag_dev.index; n; n--) { - JTAG_CYCLE_TCK(); /* Bypass before data */ - } - - PIN_TDI_OUT(0U); - JTAG_CYCLE_TCK(); /* Set RnW=0 (Write) */ - JTAG_CYCLE_TCK(); /* Set A2=0 */ - JTAG_CYCLE_TCK(); /* Set A3=0 */ - - for (n = 31U; n; n--) { - JTAG_CYCLE_TDI(data); /* Set D0..D30 */ - data >>= 1; - } - n = DAP_Data.jtag_dev.count - DAP_Data.jtag_dev.index - 1U; - if (n) { - JTAG_CYCLE_TDI(data); /* Set D31 */ - for (--n; n; n--) { - JTAG_CYCLE_TCK(); /* Bypass after data */ - } - PIN_TMS_SET(); - JTAG_CYCLE_TCK(); /* Bypass & Exit1-DR */ - } else { - PIN_TMS_SET(); - JTAG_CYCLE_TDI(data); /* Set D31 & Exit1-DR */ - } - - JTAG_CYCLE_TCK(); /* Update-DR */ - PIN_TMS_CLR(); - JTAG_CYCLE_TCK(); /* Idle */ - PIN_TDI_OUT(1U); -} - - -// JTAG Set IR -// ir: IR value -// return: none -void JTAG_IR (uint32_t ir) { - if (DAP_Data.fast_clock) { - JTAG_IR_Fast(ir); - } else { - JTAG_IR_Slow(ir); - } -} - - -// JTAG Transfer I/O -// request: A[3:2] RnW APnDP -// data: DATA[31:0] -// return: ACK[2:0] -uint8_t JTAG_Transfer(uint32_t request, uint32_t *data) { - if (DAP_Data.fast_clock) { - return JTAG_TransferFast(request, data); - } else { - return JTAG_TransferSlow(request, data); - } -} - - -#endif /* (DAP_JTAG != 0) */ diff --git a/Drivers/CMSIS/DAP/Firmware/Source/SWO.c b/Drivers/CMSIS/DAP/Firmware/Source/SWO.c deleted file mode 100644 index 3785921..0000000 --- a/Drivers/CMSIS/DAP/Firmware/Source/SWO.c +++ /dev/null @@ -1,798 +0,0 @@ -/* - * Copyright (c) 2013-2021 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 29. March 2021 - * $Revision: V2.0.1 - * - * Project: CMSIS-DAP Source - * Title: SWO.c CMSIS-DAP SWO I/O - * - *---------------------------------------------------------------------------*/ - -#include "DAP_config.h" -#include "DAP.h" -#if (SWO_UART != 0) -#include "Driver_USART.h" -#endif -#if (SWO_STREAM != 0) -#include "cmsis_os2.h" -#define osObjectsExternal -#include "osObjects.h" -#endif - -#if (SWO_STREAM != 0) -#ifdef DAP_FW_V1 -#error "SWO Streaming Trace not supported in DAP V1!" -#endif -#endif - -#if (SWO_UART != 0) - -// USART Driver -#define _USART_Driver_(n) Driver_USART##n -#define USART_Driver_(n) _USART_Driver_(n) -extern ARM_DRIVER_USART USART_Driver_(SWO_UART_DRIVER); -#define pUSART (&USART_Driver_(SWO_UART_DRIVER)) - -static uint8_t USART_Ready = 0U; - -#endif /* (SWO_UART != 0) */ - - -#if ((SWO_UART != 0) || (SWO_MANCHESTER != 0)) - - -#define SWO_STREAM_TIMEOUT 50U /* Stream timeout in ms */ - -#define USB_BLOCK_SIZE 512U /* USB Block Size */ -#define TRACE_BLOCK_SIZE 64U /* Trace Block Size (2^n: 32...512) */ - -// Trace State -static uint8_t TraceTransport = 0U; /* Trace Transport */ -static uint8_t TraceMode = 0U; /* Trace Mode */ -static uint8_t TraceStatus = 0U; /* Trace Status without Errors */ -static uint8_t TraceError[2] = {0U, 0U}; /* Trace Error flags (banked) */ -static uint8_t TraceError_n = 0U; /* Active Trace Error bank */ - -// Trace Buffer -static uint8_t TraceBuf[SWO_BUFFER_SIZE]; /* Trace Buffer (must be 2^n) */ -static volatile uint32_t TraceIndexI = 0U; /* Incoming Trace Index */ -static volatile uint32_t TraceIndexO = 0U; /* Outgoing Trace Index */ -static volatile uint8_t TraceUpdate; /* Trace Update Flag */ -static uint32_t TraceBlockSize; /* Current Trace Block Size */ - -#if (TIMESTAMP_CLOCK != 0U) -// Trace Timestamp -static volatile struct { - uint32_t index; - uint32_t tick; -} TraceTimestamp; -#endif - -// Trace Helper functions -static void ClearTrace (void); -static void ResumeTrace (void); -static uint32_t GetTraceCount (void); -static uint8_t GetTraceStatus (void); -static void SetTraceError (uint8_t flag); - -#if (SWO_STREAM != 0) -extern osThreadId_t SWO_ThreadId; -static volatile uint8_t TransferBusy = 0U; /* Transfer Busy Flag */ -static uint32_t TransferSize; /* Current Transfer Size */ -#endif - - -#if (SWO_UART != 0) - -// USART Driver Callback function -// event: event mask -static void USART_Callback (uint32_t event) { - uint32_t index_i; - uint32_t index_o; - uint32_t count; - uint32_t num; - - if (event & ARM_USART_EVENT_RECEIVE_COMPLETE) { -#if (TIMESTAMP_CLOCK != 0U) - TraceTimestamp.tick = TIMESTAMP_GET(); -#endif - index_o = TraceIndexO; - index_i = TraceIndexI; - index_i += TraceBlockSize; - TraceIndexI = index_i; -#if (TIMESTAMP_CLOCK != 0U) - TraceTimestamp.index = index_i; -#endif - num = TRACE_BLOCK_SIZE - (index_i & (TRACE_BLOCK_SIZE - 1U)); - count = index_i - index_o; - if (count <= (SWO_BUFFER_SIZE - num)) { - index_i &= SWO_BUFFER_SIZE - 1U; - TraceBlockSize = num; - pUSART->Receive(&TraceBuf[index_i], num); - } else { - TraceStatus = DAP_SWO_CAPTURE_ACTIVE | DAP_SWO_CAPTURE_PAUSED; - } - TraceUpdate = 1U; -#if (SWO_STREAM != 0) - if (TraceTransport == 2U) { - if (count >= (USB_BLOCK_SIZE - (index_o & (USB_BLOCK_SIZE - 1U)))) { - osThreadFlagsSet(SWO_ThreadId, 1U); - } - } -#endif - } - if (event & ARM_USART_EVENT_RX_OVERFLOW) { - SetTraceError(DAP_SWO_BUFFER_OVERRUN); - } - if (event & (ARM_USART_EVENT_RX_BREAK | - ARM_USART_EVENT_RX_FRAMING_ERROR | - ARM_USART_EVENT_RX_PARITY_ERROR)) { - SetTraceError(DAP_SWO_STREAM_ERROR); - } -} - -// Enable or disable SWO Mode (UART) -// enable: enable flag -// return: 1 - Success, 0 - Error -__WEAK uint32_t SWO_Mode_UART (uint32_t enable) { - int32_t status; - - USART_Ready = 0U; - - if (enable != 0U) { - status = pUSART->Initialize(USART_Callback); - if (status != ARM_DRIVER_OK) { - return (0U); - } - status = pUSART->PowerControl(ARM_POWER_FULL); - if (status != ARM_DRIVER_OK) { - pUSART->Uninitialize(); - return (0U); - } - } else { - pUSART->Control(ARM_USART_CONTROL_RX, 0U); - pUSART->Control(ARM_USART_ABORT_RECEIVE, 0U); - pUSART->PowerControl(ARM_POWER_OFF); - pUSART->Uninitialize(); - } - return (1U); -} - -// Configure SWO Baudrate (UART) -// baudrate: requested baudrate -// return: actual baudrate or 0 when not configured -__WEAK uint32_t SWO_Baudrate_UART (uint32_t baudrate) { - int32_t status; - uint32_t index; - uint32_t num; - - if (baudrate > SWO_UART_MAX_BAUDRATE) { - baudrate = SWO_UART_MAX_BAUDRATE; - } - - if (TraceStatus & DAP_SWO_CAPTURE_ACTIVE) { - pUSART->Control(ARM_USART_CONTROL_RX, 0U); - if (pUSART->GetStatus().rx_busy) { - TraceIndexI += pUSART->GetRxCount(); - pUSART->Control(ARM_USART_ABORT_RECEIVE, 0U); - } - } - - status = pUSART->Control(ARM_USART_MODE_ASYNCHRONOUS | - ARM_USART_DATA_BITS_8 | - ARM_USART_PARITY_NONE | - ARM_USART_STOP_BITS_1, - baudrate); - - if (status == ARM_DRIVER_OK) { - USART_Ready = 1U; - } else { - USART_Ready = 0U; - return (0U); - } - - if (TraceStatus & DAP_SWO_CAPTURE_ACTIVE) { - if ((TraceStatus & DAP_SWO_CAPTURE_PAUSED) == 0U) { - index = TraceIndexI & (SWO_BUFFER_SIZE - 1U); - num = TRACE_BLOCK_SIZE - (index & (TRACE_BLOCK_SIZE - 1U)); - TraceBlockSize = num; - pUSART->Receive(&TraceBuf[index], num); - } - pUSART->Control(ARM_USART_CONTROL_RX, 1U); - } - - return (baudrate); -} - -// Control SWO Capture (UART) -// active: active flag -// return: 1 - Success, 0 - Error -__WEAK uint32_t SWO_Control_UART (uint32_t active) { - int32_t status; - - if (active) { - if (!USART_Ready) { - return (0U); - } - TraceBlockSize = 1U; - status = pUSART->Receive(&TraceBuf[0], 1U); - if (status != ARM_DRIVER_OK) { - return (0U); - } - status = pUSART->Control(ARM_USART_CONTROL_RX, 1U); - if (status != ARM_DRIVER_OK) { - return (0U); - } - } else { - pUSART->Control(ARM_USART_CONTROL_RX, 0U); - if (pUSART->GetStatus().rx_busy) { - TraceIndexI += pUSART->GetRxCount(); - pUSART->Control(ARM_USART_ABORT_RECEIVE, 0U); - } - } - return (1U); -} - -// Start SWO Capture (UART) -// buf: pointer to buffer for capturing -// num: number of bytes to capture -__WEAK void SWO_Capture_UART (uint8_t *buf, uint32_t num) { - TraceBlockSize = num; - pUSART->Receive(buf, num); -} - -// Get SWO Pending Trace Count (UART) -// return: number of pending trace data bytes -__WEAK uint32_t SWO_GetCount_UART (void) { - uint32_t count; - - if (pUSART->GetStatus().rx_busy) { - count = pUSART->GetRxCount(); - } else { - count = 0U; - } - return (count); -} - -#endif /* (SWO_UART != 0) */ - - -#if (SWO_MANCHESTER != 0) - -// Enable or disable SWO Mode (Manchester) -// enable: enable flag -// return: 1 - Success, 0 - Error -__WEAK uint32_t SWO_Mode_Manchester (uint32_t enable) { - return (0U); -} - -// Configure SWO Baudrate (Manchester) -// baudrate: requested baudrate -// return: actual baudrate or 0 when not configured -__WEAK uint32_t SWO_Baudrate_Manchester (uint32_t baudrate) { - return (0U); -} - -// Control SWO Capture (Manchester) -// active: active flag -// return: 1 - Success, 0 - Error -__WEAK uint32_t SWO_Control_Manchester (uint32_t active) { - return (0U); -} - -// Start SWO Capture (Manchester) -// buf: pointer to buffer for capturing -// num: number of bytes to capture -__WEAK void SWO_Capture_Manchester (uint8_t *buf, uint32_t num) { -} - -// Get SWO Pending Trace Count (Manchester) -// return: number of pending trace data bytes -__WEAK uint32_t SWO_GetCount_Manchester (void) { -} - -#endif /* (SWO_MANCHESTER != 0) */ - - -// Clear Trace Errors and Data -static void ClearTrace (void) { - -#if (SWO_STREAM != 0) - if (TraceTransport == 2U) { - if (TransferBusy != 0U) { - SWO_AbortTransfer(); - TransferBusy = 0U; - } - } -#endif - - TraceError[0] = 0U; - TraceError[1] = 0U; - TraceError_n = 0U; - TraceIndexI = 0U; - TraceIndexO = 0U; - -#if (TIMESTAMP_CLOCK != 0U) - TraceTimestamp.index = 0U; - TraceTimestamp.tick = 0U; -#endif -} - -// Resume Trace Capture -static void ResumeTrace (void) { - uint32_t index_i; - uint32_t index_o; - - if (TraceStatus == (DAP_SWO_CAPTURE_ACTIVE | DAP_SWO_CAPTURE_PAUSED)) { - index_i = TraceIndexI; - index_o = TraceIndexO; - if ((index_i - index_o) < SWO_BUFFER_SIZE) { - index_i &= SWO_BUFFER_SIZE - 1U; - switch (TraceMode) { -#if (SWO_UART != 0) - case DAP_SWO_UART: - TraceStatus = DAP_SWO_CAPTURE_ACTIVE; - SWO_Capture_UART(&TraceBuf[index_i], 1U); - break; -#endif -#if (SWO_MANCHESTER != 0) - case DAP_SWO_MANCHESTER: - TraceStatus = DAP_SWO_CAPTURE_ACTIVE; - SWO_Capture_Manchester(&TraceBuf[index_i], 1U); - break; -#endif - default: - break; - } - } - } -} - -// Get Trace Count -// return: number of available data bytes in trace buffer -static uint32_t GetTraceCount (void) { - uint32_t count; - - if (TraceStatus == DAP_SWO_CAPTURE_ACTIVE) { - do { - TraceUpdate = 0U; - count = TraceIndexI - TraceIndexO; - switch (TraceMode) { -#if (SWO_UART != 0) - case DAP_SWO_UART: - count += SWO_GetCount_UART(); - break; -#endif -#if (SWO_MANCHESTER != 0) - case DAP_SWO_MANCHESTER: - count += SWO_GetCount_Manchester(); - break; -#endif - default: - break; - } - } while (TraceUpdate != 0U); - } else { - count = TraceIndexI - TraceIndexO; - } - - return (count); -} - -// Get Trace Status (clear Error flags) -// return: Trace Status (Active flag and Error flags) -static uint8_t GetTraceStatus (void) { - uint8_t status; - uint32_t n; - - n = TraceError_n; - TraceError_n ^= 1U; - status = TraceStatus | TraceError[n]; - TraceError[n] = 0U; - - return (status); -} - -// Set Trace Error flag(s) -// flag: error flag(s) to set -static void SetTraceError (uint8_t flag) { - TraceError[TraceError_n] |= flag; -} - - -// Process SWO Transport command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t SWO_Transport (const uint8_t *request, uint8_t *response) { - uint8_t transport; - uint32_t result; - - if ((TraceStatus & DAP_SWO_CAPTURE_ACTIVE) == 0U) { - transport = *request; - switch (transport) { - case 0U: - case 1U: -#if (SWO_STREAM != 0) - case 2U: -#endif - TraceTransport = transport; - result = 1U; - break; - default: - result = 0U; - break; - } - } else { - result = 0U; - } - - if (result != 0U) { - *response = DAP_OK; - } else { - *response = DAP_ERROR; - } - - return ((1U << 16) | 1U); -} - - -// Process SWO Mode command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t SWO_Mode (const uint8_t *request, uint8_t *response) { - uint8_t mode; - uint32_t result; - - mode = *request; - - switch (TraceMode) { -#if (SWO_UART != 0) - case DAP_SWO_UART: - SWO_Mode_UART(0U); - break; -#endif -#if (SWO_MANCHESTER != 0) - case DAP_SWO_MANCHESTER: - SWO_Mode_Manchester(0U); - break; -#endif - default: - break; - } - - switch (mode) { - case DAP_SWO_OFF: - result = 1U; - break; -#if (SWO_UART != 0) - case DAP_SWO_UART: - result = SWO_Mode_UART(1U); - break; -#endif -#if (SWO_MANCHESTER != 0) - case DAP_SWO_MANCHESTER: - result = SWO_Mode_Manchester(1U); - break; -#endif - default: - result = 0U; - break; - } - if (result != 0U) { - TraceMode = mode; - } else { - TraceMode = DAP_SWO_OFF; - } - - TraceStatus = 0U; - - if (result != 0U) { - *response = DAP_OK; - } else { - *response = DAP_ERROR; - } - - return ((1U << 16) | 1U); -} - - -// Process SWO Baudrate command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t SWO_Baudrate (const uint8_t *request, uint8_t *response) { - uint32_t baudrate; - - baudrate = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8) | - (uint32_t)(*(request+2) << 16) | - (uint32_t)(*(request+3) << 24); - - switch (TraceMode) { -#if (SWO_UART != 0) - case DAP_SWO_UART: - baudrate = SWO_Baudrate_UART(baudrate); - break; -#endif -#if (SWO_MANCHESTER != 0) - case DAP_SWO_MANCHESTER: - baudrate = SWO_Baudrate_Manchester(baudrate); - break; -#endif - default: - baudrate = 0U; - break; - } - - if (baudrate == 0U) { - TraceStatus = 0U; - } - - *response++ = (uint8_t)(baudrate >> 0); - *response++ = (uint8_t)(baudrate >> 8); - *response++ = (uint8_t)(baudrate >> 16); - *response = (uint8_t)(baudrate >> 24); - - return ((4U << 16) | 4U); -} - - -// Process SWO Control command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t SWO_Control (const uint8_t *request, uint8_t *response) { - uint8_t active; - uint32_t result; - - active = *request & DAP_SWO_CAPTURE_ACTIVE; - - if (active != (TraceStatus & DAP_SWO_CAPTURE_ACTIVE)) { - if (active) { - ClearTrace(); - } - switch (TraceMode) { -#if (SWO_UART != 0) - case DAP_SWO_UART: - result = SWO_Control_UART(active); - break; -#endif -#if (SWO_MANCHESTER != 0) - case DAP_SWO_MANCHESTER: - result = SWO_Control_Manchester(active); - break; -#endif - default: - result = 0U; - break; - } - if (result != 0U) { - TraceStatus = active; -#if (SWO_STREAM != 0) - if (TraceTransport == 2U) { - osThreadFlagsSet(SWO_ThreadId, 1U); - } -#endif - } - } else { - result = 1U; - } - - if (result != 0U) { - *response = DAP_OK; - } else { - *response = DAP_ERROR; - } - - return ((1U << 16) | 1U); -} - - -// Process SWO Status command and prepare response -// response: pointer to response data -// return: number of bytes in response -uint32_t SWO_Status (uint8_t *response) { - uint8_t status; - uint32_t count; - - status = GetTraceStatus(); - count = GetTraceCount(); - - *response++ = status; - *response++ = (uint8_t)(count >> 0); - *response++ = (uint8_t)(count >> 8); - *response++ = (uint8_t)(count >> 16); - *response = (uint8_t)(count >> 24); - - return (5U); -} - - -// Process SWO Extended Status command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t SWO_ExtendedStatus (const uint8_t *request, uint8_t *response) { - uint8_t cmd; - uint8_t status; - uint32_t count; -#if (TIMESTAMP_CLOCK != 0U) - uint32_t index; - uint32_t tick; -#endif - uint32_t num; - - num = 0U; - cmd = *request; - - if (cmd & 0x01U) { - status = GetTraceStatus(); - *response++ = status; - num += 1U; - } - - if (cmd & 0x02U) { - count = GetTraceCount(); - *response++ = (uint8_t)(count >> 0); - *response++ = (uint8_t)(count >> 8); - *response++ = (uint8_t)(count >> 16); - *response++ = (uint8_t)(count >> 24); - num += 4U; - } - -#if (TIMESTAMP_CLOCK != 0U) - if (cmd & 0x04U) { - do { - TraceUpdate = 0U; - index = TraceTimestamp.index; - tick = TraceTimestamp.tick; - } while (TraceUpdate != 0U); - *response++ = (uint8_t)(index >> 0); - *response++ = (uint8_t)(index >> 8); - *response++ = (uint8_t)(index >> 16); - *response++ = (uint8_t)(index >> 24); - *response++ = (uint8_t)(tick >> 0); - *response++ = (uint8_t)(tick >> 8); - *response++ = (uint8_t)(tick >> 16); - *response++ = (uint8_t)(tick >> 24); - num += 4U; - } -#endif - - return ((1U << 16) | num); -} - - -// Process SWO Data command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t SWO_Data (const uint8_t *request, uint8_t *response) { - uint8_t status; - uint32_t count; - uint32_t index; - uint32_t n, i; - - status = GetTraceStatus(); - count = GetTraceCount(); - - if (TraceTransport == 1U) { - n = (uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8); - if (n > (DAP_PACKET_SIZE - 4U)) { - n = DAP_PACKET_SIZE - 4U; - } - if (count > n) { - count = n; - } - } else { - count = 0U; - } - - *response++ = status; - *response++ = (uint8_t)(count >> 0); - *response++ = (uint8_t)(count >> 8); - - if (TraceTransport == 1U) { - index = TraceIndexO; - for (i = index, n = count; n; n--) { - i &= SWO_BUFFER_SIZE - 1U; - *response++ = TraceBuf[i++]; - } - TraceIndexO = index + count; - ResumeTrace(); - } - - return ((2U << 16) | (3U + count)); -} - - -#if (SWO_STREAM != 0) - -// SWO Data Transfer complete callback -void SWO_TransferComplete (void) { - TraceIndexO += TransferSize; - TransferBusy = 0U; - ResumeTrace(); - osThreadFlagsSet(SWO_ThreadId, 1U); -} - -// SWO Thread -__NO_RETURN void SWO_Thread (void *argument) { - uint32_t timeout; - uint32_t flags; - uint32_t count; - uint32_t index; - uint32_t i, n; - (void) argument; - - timeout = osWaitForever; - - for (;;) { - flags = osThreadFlagsWait(1U, osFlagsWaitAny, timeout); - if (TraceStatus & DAP_SWO_CAPTURE_ACTIVE) { - timeout = SWO_STREAM_TIMEOUT; - } else { - timeout = osWaitForever; - flags = osFlagsErrorTimeout; - } - if (TransferBusy == 0U) { - count = GetTraceCount(); - if (count != 0U) { - index = TraceIndexO & (SWO_BUFFER_SIZE - 1U); - n = SWO_BUFFER_SIZE - index; - if (count > n) { - count = n; - } - if (flags != osFlagsErrorTimeout) { - i = index & (USB_BLOCK_SIZE - 1U); - if (i == 0U) { - count &= ~(USB_BLOCK_SIZE - 1U); - } else { - n = USB_BLOCK_SIZE - i; - if (count >= n) { - count = n; - } else { - count = 0U; - } - } - } - if (count != 0U) { - TransferSize = count; - TransferBusy = 1U; - SWO_QueueTransfer(&TraceBuf[index], count); - } - } - } - } -} - -#endif /* (SWO_STREAM != 0) */ - - -#endif /* ((SWO_UART != 0) || (SWO_MANCHESTER != 0)) */ diff --git a/Drivers/CMSIS/DAP/Firmware/Source/SW_DP.c b/Drivers/CMSIS/DAP/Firmware/Source/SW_DP.c deleted file mode 100644 index a2ad59c..0000000 --- a/Drivers/CMSIS/DAP/Firmware/Source/SW_DP.c +++ /dev/null @@ -1,286 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 1. December 2017 - * $Revision: V2.0.0 - * - * Project: CMSIS-DAP Source - * Title: SW_DP.c CMSIS-DAP SW DP I/O - * - *---------------------------------------------------------------------------*/ - -#include "DAP_config.h" -#include "DAP.h" - - -// SW Macros - -#define PIN_SWCLK_SET PIN_SWCLK_TCK_SET -#define PIN_SWCLK_CLR PIN_SWCLK_TCK_CLR - -#define SW_CLOCK_CYCLE() \ - PIN_SWCLK_CLR(); \ - PIN_DELAY(); \ - PIN_SWCLK_SET(); \ - PIN_DELAY() - -#define SW_WRITE_BIT(bit) \ - PIN_SWDIO_OUT(bit); \ - PIN_SWCLK_CLR(); \ - PIN_DELAY(); \ - PIN_SWCLK_SET(); \ - PIN_DELAY() - -#define SW_READ_BIT(bit) \ - PIN_SWCLK_CLR(); \ - PIN_DELAY(); \ - bit = PIN_SWDIO_IN(); \ - PIN_SWCLK_SET(); \ - PIN_DELAY() - -#define PIN_DELAY() PIN_DELAY_SLOW(DAP_Data.clock_delay) - - -// Generate SWJ Sequence -// count: sequence bit count -// data: pointer to sequence bit data -// return: none -#if ((DAP_SWD != 0) || (DAP_JTAG != 0)) -void SWJ_Sequence (uint32_t count, const uint8_t *data) { - uint32_t val; - uint32_t n; - - val = 0U; - n = 0U; - while (count--) { - if (n == 0U) { - val = *data++; - n = 8U; - } - if (val & 1U) { - PIN_SWDIO_TMS_SET(); - } else { - PIN_SWDIO_TMS_CLR(); - } - SW_CLOCK_CYCLE(); - val >>= 1; - n--; - } -} -#endif - - -// Generate SWD Sequence -// info: sequence information -// swdo: pointer to SWDIO generated data -// swdi: pointer to SWDIO captured data -// return: none -#if (DAP_SWD != 0) -void SWD_Sequence (uint32_t info, const uint8_t *swdo, uint8_t *swdi) { - uint32_t val; - uint32_t bit; - uint32_t n, k; - - n = info & SWD_SEQUENCE_CLK; - if (n == 0U) { - n = 64U; - } - - if (info & SWD_SEQUENCE_DIN) { - while (n) { - val = 0U; - for (k = 8U; k && n; k--, n--) { - SW_READ_BIT(bit); - val >>= 1; - val |= bit << 7; - } - val >>= k; - *swdi++ = (uint8_t)val; - } - } else { - while (n) { - val = *swdo++; - for (k = 8U; k && n; k--, n--) { - SW_WRITE_BIT(val); - val >>= 1; - } - } - } -} -#endif - - -#if (DAP_SWD != 0) - - -// SWD Transfer I/O -// request: A[3:2] RnW APnDP -// data: DATA[31:0] -// return: ACK[2:0] -#define SWD_TransferFunction(speed) /**/ \ -static uint8_t SWD_Transfer##speed (uint32_t request, uint32_t *data) { \ - uint32_t ack; \ - uint32_t bit; \ - uint32_t val; \ - uint32_t parity; \ - \ - uint32_t n; \ - \ - /* Packet Request */ \ - parity = 0U; \ - SW_WRITE_BIT(1U); /* Start Bit */ \ - bit = request >> 0; \ - SW_WRITE_BIT(bit); /* APnDP Bit */ \ - parity += bit; \ - bit = request >> 1; \ - SW_WRITE_BIT(bit); /* RnW Bit */ \ - parity += bit; \ - bit = request >> 2; \ - SW_WRITE_BIT(bit); /* A2 Bit */ \ - parity += bit; \ - bit = request >> 3; \ - SW_WRITE_BIT(bit); /* A3 Bit */ \ - parity += bit; \ - SW_WRITE_BIT(parity); /* Parity Bit */ \ - SW_WRITE_BIT(0U); /* Stop Bit */ \ - SW_WRITE_BIT(1U); /* Park Bit */ \ - \ - /* Turnaround */ \ - PIN_SWDIO_OUT_DISABLE(); \ - for (n = DAP_Data.swd_conf.turnaround; n; n--) { \ - SW_CLOCK_CYCLE(); \ - } \ - \ - /* Acknowledge response */ \ - SW_READ_BIT(bit); \ - ack = bit << 0; \ - SW_READ_BIT(bit); \ - ack |= bit << 1; \ - SW_READ_BIT(bit); \ - ack |= bit << 2; \ - \ - if (ack == DAP_TRANSFER_OK) { /* OK response */ \ - /* Data transfer */ \ - if (request & DAP_TRANSFER_RnW) { \ - /* Read data */ \ - val = 0U; \ - parity = 0U; \ - for (n = 32U; n; n--) { \ - SW_READ_BIT(bit); /* Read RDATA[0:31] */ \ - parity += bit; \ - val >>= 1; \ - val |= bit << 31; \ - } \ - SW_READ_BIT(bit); /* Read Parity */ \ - if ((parity ^ bit) & 1U) { \ - ack = DAP_TRANSFER_ERROR; \ - } \ - if (data) { *data = val; } \ - /* Turnaround */ \ - for (n = DAP_Data.swd_conf.turnaround; n; n--) { \ - SW_CLOCK_CYCLE(); \ - } \ - PIN_SWDIO_OUT_ENABLE(); \ - } else { \ - /* Turnaround */ \ - for (n = DAP_Data.swd_conf.turnaround; n; n--) { \ - SW_CLOCK_CYCLE(); \ - } \ - PIN_SWDIO_OUT_ENABLE(); \ - /* Write data */ \ - val = *data; \ - parity = 0U; \ - for (n = 32U; n; n--) { \ - SW_WRITE_BIT(val); /* Write WDATA[0:31] */ \ - parity += val; \ - val >>= 1; \ - } \ - SW_WRITE_BIT(parity); /* Write Parity Bit */ \ - } \ - /* Capture Timestamp */ \ - if (request & DAP_TRANSFER_TIMESTAMP) { \ - DAP_Data.timestamp = TIMESTAMP_GET(); \ - } \ - /* Idle cycles */ \ - n = DAP_Data.transfer.idle_cycles; \ - if (n) { \ - PIN_SWDIO_OUT(0U); \ - for (; n; n--) { \ - SW_CLOCK_CYCLE(); \ - } \ - } \ - PIN_SWDIO_OUT(1U); \ - return ((uint8_t)ack); \ - } \ - \ - if ((ack == DAP_TRANSFER_WAIT) || (ack == DAP_TRANSFER_FAULT)) { \ - /* WAIT or FAULT response */ \ - if (DAP_Data.swd_conf.data_phase && ((request & DAP_TRANSFER_RnW) != 0U)) { \ - for (n = 32U+1U; n; n--) { \ - SW_CLOCK_CYCLE(); /* Dummy Read RDATA[0:31] + Parity */ \ - } \ - } \ - /* Turnaround */ \ - for (n = DAP_Data.swd_conf.turnaround; n; n--) { \ - SW_CLOCK_CYCLE(); \ - } \ - PIN_SWDIO_OUT_ENABLE(); \ - if (DAP_Data.swd_conf.data_phase && ((request & DAP_TRANSFER_RnW) == 0U)) { \ - PIN_SWDIO_OUT(0U); \ - for (n = 32U+1U; n; n--) { \ - SW_CLOCK_CYCLE(); /* Dummy Write WDATA[0:31] + Parity */ \ - } \ - } \ - PIN_SWDIO_OUT(1U); \ - return ((uint8_t)ack); \ - } \ - \ - /* Protocol error */ \ - for (n = DAP_Data.swd_conf.turnaround + 32U + 1U; n; n--) { \ - SW_CLOCK_CYCLE(); /* Back off data phase */ \ - } \ - PIN_SWDIO_OUT_ENABLE(); \ - PIN_SWDIO_OUT(1U); \ - return ((uint8_t)ack); \ -} - - -#undef PIN_DELAY -#define PIN_DELAY() PIN_DELAY_FAST() -SWD_TransferFunction(Fast) - -#undef PIN_DELAY -#define PIN_DELAY() PIN_DELAY_SLOW(DAP_Data.clock_delay) -SWD_TransferFunction(Slow) - - -// SWD Transfer I/O -// request: A[3:2] RnW APnDP -// data: DATA[31:0] -// return: ACK[2:0] -uint8_t SWD_Transfer(uint32_t request, uint32_t *data) { - if (DAP_Data.fast_clock) { - return SWD_TransferFast(request, data); - } else { - return SWD_TransferSlow(request, data); - } -} - - -#endif /* (DAP_SWD != 0) */ diff --git a/Drivers/CMSIS/DAP/Firmware/Source/UART.c b/Drivers/CMSIS/DAP/Firmware/Source/UART.c deleted file mode 100644 index 5720b39..0000000 --- a/Drivers/CMSIS/DAP/Firmware/Source/UART.c +++ /dev/null @@ -1,652 +0,0 @@ -/* - * Copyright (c) 2021 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 1. March 2021 - * $Revision: V1.0.0 - * - * Project: CMSIS-DAP Source - * Title: UART.c CMSIS-DAP UART - * - *---------------------------------------------------------------------------*/ - -#include "DAP_config.h" -#include "DAP.h" - -#if (DAP_UART != 0) - -#ifdef DAP_FW_V1 -#error "UART Communication Port not supported in DAP V1!" -#endif - -#include "Driver_USART.h" - -#include "cmsis_os2.h" -#include - -#define UART_RX_BLOCK_SIZE 32U /* Uart Rx Block Size (must be 2^n) */ - -// USART Driver -#define _USART_Driver_(n) Driver_USART##n -#define USART_Driver_(n) _USART_Driver_(n) -extern ARM_DRIVER_USART USART_Driver_(DAP_UART_DRIVER); -#define pUSART (&USART_Driver_(DAP_UART_DRIVER)) - -// UART Configuration -#if (DAP_UART_USB_COM_PORT != 0) -static uint8_t UartTransport = DAP_UART_TRANSPORT_USB_COM_PORT; -#else -static uint8_t UartTransport = DAP_UART_TRANSPORT_NONE; -#endif - -// UART Flags -static uint8_t UartConfigured = 0U; -static uint8_t UartReceiveEnabled = 0U; -static uint8_t UartTransmitEnabled = 0U; -static uint8_t UartTransmitActive = 0U; - -// UART TX Buffer -static uint8_t UartTxBuf[DAP_UART_TX_BUFFER_SIZE]; -static volatile uint32_t UartTxIndexI = 0U; -static volatile uint32_t UartTxIndexO = 0U; - -// UART RX Buffer -static uint8_t UartRxBuf[DAP_UART_RX_BUFFER_SIZE]; -static volatile uint32_t UartRxIndexI = 0U; -static volatile uint32_t UartRxIndexO = 0U; - -// Uart Errors -static volatile uint8_t UartErrorRxDataLost = 0U; -static volatile uint8_t UartErrorFraming = 0U; -static volatile uint8_t UartErrorParity = 0U; - -// UART Transmit -static uint32_t UartTxNum = 0U; - -// Function prototypes -static uint8_t UART_Init (void); -static void UART_Uninit (void); -static uint8_t UART_Get_Status (void); -static uint8_t UART_Receive_Enable (void); -static uint8_t UART_Transmit_Enable (void); -static void UART_Receive_Disable (void); -static void UART_Transmit_Disable (void); -static void UART_Receive_Flush (void); -static void UART_Transmit_Flush (void); -static void UART_Receive (void); -static void UART_Transmit (void); - - -// USART Driver Callback function -// event: event mask -static void USART_Callback (uint32_t event) { - if (event & ARM_USART_EVENT_SEND_COMPLETE) { - UartTxIndexO += UartTxNum; - UartTransmitActive = 0U; - UART_Transmit(); - } - if (event & ARM_USART_EVENT_RECEIVE_COMPLETE) { - UartRxIndexI += UART_RX_BLOCK_SIZE; - UART_Receive(); - } - if (event & ARM_USART_EVENT_RX_OVERFLOW) { - UartErrorRxDataLost = 1U; - } - if (event & ARM_USART_EVENT_RX_FRAMING_ERROR) { - UartErrorFraming = 1U; - } - if (event & ARM_USART_EVENT_RX_PARITY_ERROR) { - UartErrorParity = 1U; - } -} - -// Init UART -// return: DAP_OK or DAP_ERROR -static uint8_t UART_Init (void) { - int32_t status; - uint8_t ret = DAP_ERROR; - - UartConfigured = 0U; - UartReceiveEnabled = 0U; - UartTransmitEnabled = 0U; - UartTransmitActive = 0U; - UartErrorRxDataLost = 0U; - UartErrorFraming = 0U; - UartErrorParity = 0U; - UartTxIndexI = 0U; - UartTxIndexO = 0U; - UartRxIndexI = 0U; - UartRxIndexO = 0U; - UartTxNum = 0U; - - status = pUSART->Initialize(USART_Callback); - if (status == ARM_DRIVER_OK) { - status = pUSART->PowerControl(ARM_POWER_FULL); - } - if (status == ARM_DRIVER_OK) { - ret = DAP_OK; - } - - return (ret); -} - -// Un-Init UART -static void UART_Uninit (void) { - UartConfigured = 0U; - - pUSART->PowerControl(ARM_POWER_OFF); - pUSART->Uninitialize(); -} - -// Get UART Status -// return: status -static uint8_t UART_Get_Status (void) { - uint8_t status = 0U; - - if (UartReceiveEnabled != 0U) { - status |= DAP_UART_STATUS_RX_ENABLED; - } - if (UartErrorRxDataLost != 0U) { - UartErrorRxDataLost = 0U; - status |= DAP_UART_STATUS_RX_DATA_LOST; - } - if (UartErrorFraming != 0U) { - UartErrorFraming = 0U; - status |= DAP_UART_STATUS_FRAMING_ERROR; - } - if (UartErrorParity != 0U) { - UartErrorParity = 0U; - status |= DAP_UART_STATUS_PARITY_ERROR; - } - if (UartTransmitEnabled != 0U) { - status |= DAP_UART_STATUS_TX_ENABLED; - } - - return (status); -} - -// Enable UART Receive -// return: DAP_OK or DAP_ERROR -static uint8_t UART_Receive_Enable (void) { - int32_t status; - uint8_t ret = DAP_ERROR; - - if (UartReceiveEnabled == 0U) { - // Flush Buffers - UartRxIndexI = 0U; - UartRxIndexO = 0U; - - UART_Receive(); - status = pUSART->Control(ARM_USART_CONTROL_RX, 1U); - if (status == ARM_DRIVER_OK) { - UartReceiveEnabled = 1U; - ret = DAP_OK; - } - } else { - ret = DAP_OK; - } - - return (ret); -} - -// Enable UART Transmit -// return: DAP_OK or DAP_ERROR -static uint8_t UART_Transmit_Enable (void) { - int32_t status; - uint8_t ret = DAP_ERROR; - - if (UartTransmitEnabled == 0U) { - // Flush Buffers - UartTransmitActive = 0U; - UartTxIndexI = 0U; - UartTxIndexO = 0U; - UartTxNum = 0U; - - status = pUSART->Control(ARM_USART_CONTROL_TX, 1U); - if (status == ARM_DRIVER_OK) { - UartTransmitEnabled = 1U; - ret = DAP_OK; - } - } else { - ret = DAP_OK; - } - - return (ret); -} - -// Disable UART Receive -static void UART_Receive_Disable (void) { - if (UartReceiveEnabled != 0U) { - pUSART->Control(ARM_USART_CONTROL_RX, 0U); - pUSART->Control(ARM_USART_ABORT_RECEIVE, 0U); - UartReceiveEnabled = 0U; - } -} - -// Disable UART Transmit -static void UART_Transmit_Disable (void) { - if (UartTransmitEnabled != 0U) { - pUSART->Control(ARM_USART_ABORT_SEND, 0U); - pUSART->Control(ARM_USART_CONTROL_TX, 0U); - UartTransmitActive = 0U; - UartTransmitEnabled = 0U; - } -} - -// Flush UART Receive buffer -static void UART_Receive_Flush (void) { - pUSART->Control(ARM_USART_ABORT_RECEIVE, 0U); - UartRxIndexI = 0U; - UartRxIndexO = 0U; - if (UartReceiveEnabled != 0U) { - UART_Receive(); - } -} - -// Flush UART Transmit buffer -static void UART_Transmit_Flush (void) { - pUSART->Control(ARM_USART_ABORT_SEND, 0U); - UartTransmitActive = 0U; - UartTxIndexI = 0U; - UartTxIndexO = 0U; - UartTxNum = 0U; -} - -// Receive data from target via UART -static void UART_Receive (void) { - uint32_t index; - - index = UartRxIndexI & (DAP_UART_RX_BUFFER_SIZE - 1U); - pUSART->Receive(&UartRxBuf[index], UART_RX_BLOCK_SIZE); -} - -// Transmit available data to target via UART -static void UART_Transmit (void) { - uint32_t count; - uint32_t index; - - count = UartTxIndexI - UartTxIndexO; - index = UartTxIndexO & (DAP_UART_TX_BUFFER_SIZE - 1U); - - if (count != 0U) { - if ((index + count) <= DAP_UART_TX_BUFFER_SIZE) { - UartTxNum = count; - } else { - UartTxNum = DAP_UART_TX_BUFFER_SIZE - index; - } - UartTransmitActive = 1U; - pUSART->Send(&UartTxBuf[index], UartTxNum); - } -} - -// Process UART Transport command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t UART_Transport (const uint8_t *request, uint8_t *response) { - uint8_t transport; - uint8_t ret = DAP_ERROR; - - transport = *request; - switch (transport) { - case DAP_UART_TRANSPORT_NONE: - switch (UartTransport) { - case DAP_UART_TRANSPORT_NONE: - ret = DAP_OK; - break; - case DAP_UART_TRANSPORT_USB_COM_PORT: -#if (DAP_UART_USB_COM_PORT != 0) - USB_COM_PORT_Activate(0U); - UartTransport = DAP_UART_TRANSPORT_NONE; - ret = DAP_OK; -#endif - break; - case DAP_UART_TRANSPORT_DAP_COMMAND: - UART_Receive_Disable(); - UART_Transmit_Disable(); - UART_Uninit(); - UartTransport = DAP_UART_TRANSPORT_NONE; - ret= DAP_OK; - break; - } - break; - case DAP_UART_TRANSPORT_USB_COM_PORT: - switch (UartTransport) { - case DAP_UART_TRANSPORT_NONE: -#if (DAP_UART_USB_COM_PORT != 0) - if (USB_COM_PORT_Activate(1U) == 0U) { - UartTransport = DAP_UART_TRANSPORT_USB_COM_PORT; - ret = DAP_OK; - } -#endif - break; - case DAP_UART_TRANSPORT_USB_COM_PORT: - ret = DAP_OK; - break; - case DAP_UART_TRANSPORT_DAP_COMMAND: - UART_Receive_Disable(); - UART_Transmit_Disable(); - UART_Uninit(); - UartTransport = DAP_UART_TRANSPORT_NONE; -#if (DAP_UART_USB_COM_PORT != 0) - if (USB_COM_PORT_Activate(1U) == 0U) { - UartTransport = DAP_UART_TRANSPORT_USB_COM_PORT; - ret = DAP_OK; - } -#endif - break; - } - break; - case DAP_UART_TRANSPORT_DAP_COMMAND: - switch (UartTransport) { - case DAP_UART_TRANSPORT_NONE: - ret = UART_Init(); - if (ret == DAP_OK) { - UartTransport = DAP_UART_TRANSPORT_DAP_COMMAND; - } - break; - case DAP_UART_TRANSPORT_USB_COM_PORT: -#if (DAP_UART_USB_COM_PORT != 0) - USB_COM_PORT_Activate(0U); - UartTransport = DAP_UART_TRANSPORT_NONE; -#endif - ret = UART_Init(); - if (ret == DAP_OK) { - UartTransport = DAP_UART_TRANSPORT_DAP_COMMAND; - } - break; - case DAP_UART_TRANSPORT_DAP_COMMAND: - ret = DAP_OK; - break; - } - break; - default: - break; - } - - *response = ret; - - return ((1U << 16) | 1U); -} - -// Process UART Configure command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t UART_Configure (const uint8_t *request, uint8_t *response) { - uint8_t control, status; - uint32_t baudrate; - int32_t result; - - if (UartTransport != DAP_UART_TRANSPORT_DAP_COMMAND) { - status = DAP_UART_CFG_ERROR_DATA_BITS | - DAP_UART_CFG_ERROR_PARITY | - DAP_UART_CFG_ERROR_STOP_BITS; - baudrate = 0U; // baudrate error - } else { - - status = 0U; - control = *request; - baudrate = (uint32_t)(*(request+1) << 0) | - (uint32_t)(*(request+2) << 8) | - (uint32_t)(*(request+3) << 16) | - (uint32_t)(*(request+4) << 24); - - result = pUSART->Control(control | - ARM_USART_MODE_ASYNCHRONOUS | - ARM_USART_FLOW_CONTROL_NONE, - baudrate); - if (result == ARM_DRIVER_OK) { - UartConfigured = 1U; - } else { - UartConfigured = 0U; - switch (result) { - case ARM_USART_ERROR_BAUDRATE: - status = 0U; - baudrate = 0U; - break; - case ARM_USART_ERROR_DATA_BITS: - status = DAP_UART_CFG_ERROR_DATA_BITS; - break; - case ARM_USART_ERROR_PARITY: - status = DAP_UART_CFG_ERROR_PARITY; - break; - case ARM_USART_ERROR_STOP_BITS: - status = DAP_UART_CFG_ERROR_STOP_BITS; - break; - default: - status = DAP_UART_CFG_ERROR_DATA_BITS | - DAP_UART_CFG_ERROR_PARITY | - DAP_UART_CFG_ERROR_STOP_BITS; - baudrate = 0U; - break; - } - } - } - - *response++ = status; - *response++ = (uint8_t)(baudrate >> 0); - *response++ = (uint8_t)(baudrate >> 8); - *response++ = (uint8_t)(baudrate >> 16); - *response = (uint8_t)(baudrate >> 24); - - return ((5U << 16) | 5U); -} - -// Process UART Control command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t UART_Control (const uint8_t *request, uint8_t *response) { - uint8_t control; - uint8_t result; - uint8_t ret = DAP_OK; - - if (UartTransport != DAP_UART_TRANSPORT_DAP_COMMAND) { - ret = DAP_ERROR; - } else { - - control = *request; - - if ((control & DAP_UART_CONTROL_RX_DISABLE) != 0U) { - // Receive disable - UART_Receive_Disable(); - } else if ((control & DAP_UART_CONTROL_RX_ENABLE) != 0U) { - // Receive enable - if (UartConfigured != 0U) { - result = UART_Receive_Enable(); - if (result != DAP_OK) { - ret = DAP_ERROR; - } - } else { - ret = DAP_ERROR; - } - } - if ((control & DAP_UART_CONTROL_RX_BUF_FLUSH) != 0U) { - UART_Receive_Flush(); - } - - if ((control & DAP_UART_CONTROL_TX_DISABLE) != 0U) { - // Transmit disable - UART_Transmit_Disable(); - } else if ((control & DAP_UART_CONTROL_TX_ENABLE) != 0U) { - // Transmit enable - if (UartConfigured != 0U) { - result = UART_Transmit_Enable(); - if (result != DAP_OK) { - ret = DAP_ERROR; - } - } else { - ret = DAP_ERROR; - } - } - if ((control & DAP_UART_CONTROL_TX_BUF_FLUSH) != 0U) { - UART_Transmit_Flush(); - } - } - - *response = ret; - - return ((1U << 16) | 1U); -} - -// Process UART Status command and prepare response -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t UART_Status (uint8_t *response) { - uint32_t rx_cnt, tx_cnt; - uint32_t cnt; - uint8_t status; - - if ((UartTransport != DAP_UART_TRANSPORT_DAP_COMMAND) || - (UartConfigured == 0U)) { - rx_cnt = 0U; - tx_cnt = 0U; - status = 0U; - } else { - - rx_cnt = UartRxIndexI - UartRxIndexO; - rx_cnt += pUSART->GetRxCount(); - if (rx_cnt > (DAP_UART_RX_BUFFER_SIZE - (UART_RX_BLOCK_SIZE*2))) { - // Overflow - UartErrorRxDataLost = 1U; - rx_cnt = (DAP_UART_RX_BUFFER_SIZE - (UART_RX_BLOCK_SIZE*2)); - UartRxIndexO = UartRxIndexI - rx_cnt; - } - - tx_cnt = UartTxIndexI - UartTxIndexO; - cnt = pUSART->GetTxCount(); - if (UartTransmitActive != 0U) { - tx_cnt -= cnt; - } - - status = UART_Get_Status(); - } - - *response++ = status; - *response++ = (uint8_t)(rx_cnt >> 0); - *response++ = (uint8_t)(rx_cnt >> 8); - *response++ = (uint8_t)(rx_cnt >> 16); - *response++ = (uint8_t)(rx_cnt >> 24); - *response++ = (uint8_t)(tx_cnt >> 0); - *response++ = (uint8_t)(tx_cnt >> 8); - *response++ = (uint8_t)(tx_cnt >> 16); - *response = (uint8_t)(tx_cnt >> 24); - - return ((0U << 16) | 9U); -} - -// Process UART Transfer command and prepare response -// request: pointer to request data -// response: pointer to response data -// return: number of bytes in response (lower 16 bits) -// number of bytes in request (upper 16 bits) -uint32_t UART_Transfer (const uint8_t *request, uint8_t *response) { - uint32_t rx_cnt, tx_cnt; - uint32_t rx_num, tx_num; - uint8_t *rx_data; - const - uint8_t *tx_data; - uint32_t num; - uint32_t index; - uint8_t status; - - if (UartTransport != DAP_UART_TRANSPORT_DAP_COMMAND) { - status = 0U; - rx_cnt = 0U; - tx_cnt = 0U; - } else { - - // RX Data - rx_cnt = ((uint32_t)(*(request+0) << 0) | - (uint32_t)(*(request+1) << 8)); - - if (rx_cnt > (DAP_PACKET_SIZE - 6U)) { - rx_cnt = (DAP_PACKET_SIZE - 6U); - } - rx_num = UartRxIndexI - UartRxIndexO; - rx_num += pUSART->GetRxCount(); - if (rx_num > (DAP_UART_RX_BUFFER_SIZE - (UART_RX_BLOCK_SIZE*2))) { - // Overflow - UartErrorRxDataLost = 1U; - rx_num = (DAP_UART_RX_BUFFER_SIZE - (UART_RX_BLOCK_SIZE*2)); - UartRxIndexO = UartRxIndexI - rx_num; - } - if (rx_cnt > rx_num) { - rx_cnt = rx_num; - } - - rx_data = (response+5); - index = UartRxIndexO & (DAP_UART_RX_BUFFER_SIZE - 1U); - if ((index + rx_cnt) <= DAP_UART_RX_BUFFER_SIZE) { - memcpy( rx_data, &UartRxBuf[index], rx_cnt); - } else { - num = DAP_UART_RX_BUFFER_SIZE - index; - memcpy( rx_data, &UartRxBuf[index], num); - memcpy(&rx_data[num], &UartRxBuf[0], rx_cnt - num); - } - UartRxIndexO += rx_cnt; - - // TX Data - tx_cnt = ((uint32_t)(*(request+2) << 0) | - (uint32_t)(*(request+3) << 8)); - tx_data = (request+4); - - if (tx_cnt > (DAP_PACKET_SIZE - 5U)) { - tx_cnt = (DAP_PACKET_SIZE - 5U); - } - tx_num = UartTxIndexI - UartTxIndexO; - num = pUSART->GetTxCount(); - if (UartTransmitActive != 0U) { - tx_num -= num; - } - if (tx_cnt > (DAP_UART_TX_BUFFER_SIZE - tx_num)) { - tx_cnt = (DAP_UART_TX_BUFFER_SIZE - tx_num); - } - - index = UartTxIndexI & (DAP_UART_TX_BUFFER_SIZE - 1U); - if ((index + tx_cnt) <= DAP_UART_TX_BUFFER_SIZE) { - memcpy(&UartTxBuf[index], tx_data, tx_cnt); - } else { - num = DAP_UART_TX_BUFFER_SIZE - index; - memcpy(&UartTxBuf[index], tx_data, num); - memcpy(&UartTxBuf[0], &tx_data[num], tx_cnt - num); - } - UartTxIndexI += tx_cnt; - - if (UartTransmitActive == 0U) { - UART_Transmit(); - } - - status = UART_Get_Status(); - } - - *response++ = status; - *response++ = (uint8_t)(tx_cnt >> 0); - *response++ = (uint8_t)(tx_cnt >> 8); - *response++ = (uint8_t)(rx_cnt >> 0); - *response = (uint8_t)(rx_cnt >> 8); - - return (((4U + tx_cnt) << 16) | (5U + rx_cnt)); -} - -#endif /* DAP_UART */ diff --git a/Drivers/CMSIS/DSP/ComputeLibrary/Include/NEMath.h b/Drivers/CMSIS/DSP/ComputeLibrary/Include/NEMath.h deleted file mode 100644 index c9df8db..0000000 --- a/Drivers/CMSIS/DSP/ComputeLibrary/Include/NEMath.h +++ /dev/null @@ -1,414 +0,0 @@ -/* - * Copyright (c) 2016, 2019 ARM Limited. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ -#ifndef __ARM_COMPUTE_NEMATH_H__ -#define __ARM_COMPUTE_NEMATH_H__ - - -#if defined(ARM_MATH_NEON) -/** Calculate floor of a vector. - * - * @param[in] val Input vector value in F32 format. - * - * @return The calculated floor vector. - */ -static inline float32x4_t vfloorq_f32(float32x4_t val); - -/** Calculate inverse square root. - * - * @param[in] x Input value. - * - * @return The calculated inverse square root. - */ -static inline float32x2_t vinvsqrt_f32(float32x2_t x); - -/** Calculate inverse square root. - * - * @param[in] x Input value. - * - * @return The calculated inverse square root. - */ -static inline float32x4_t vinvsqrtq_f32(float32x4_t x); - -/** Calculate reciprocal. - * - * @param[in] x Input value. - * - * @return The calculated reciprocal. - */ -static inline float32x2_t vinv_f32(float32x2_t x); - -/** Calculate reciprocal. - * - * @param[in] x Input value. - * - * @return The calculated reciprocal. - */ -static inline float32x4_t vinvq_f32(float32x4_t x); - -/** Perform a 7th degree polynomial approximation using Estrin's method. - * - * @param[in] x Input vector value in F32 format. - * @param[in] coeffs Polynomial coefficients table. (array of flattened float32x4_t vectors) - * - * @return The calculated approximation. - */ -static inline float32x4_t vtaylor_polyq_f32(float32x4_t x, const float32_t *coeffs); - -/** Calculate exponential - * - * @param[in] x Input vector value in F32 format. - * - * @return The calculated exponent. - */ -static inline float32x4_t vexpq_f32(float32x4_t x); - -/** Calculate logarithm - * - * @param[in] x Input vector value in F32 format. - * - * @return The calculated logarithm. - */ -static inline float32x4_t vlogq_f32(float32x4_t x); - -/** Calculate hyperbolic tangent. - * - * tanh(x) = (e^2x - 1)/(e^2x + 1) - * - * @note We clamp x to [-5,5] to avoid overflowing issues. - * - * @param[in] val Input vector value in F32 format. - * - * @return The calculated Hyperbolic Tangent. - */ -static inline float32x4_t vtanhq_f32(float32x4_t val); - -/** Calculate n power of a number. - * - * pow(x,n) = e^(n*log(x)) - * - * @param[in] val Input vector value in F32 format. - * @param[in] n Powers to raise the input to. - * - * @return The calculated power. - */ -static inline float32x4_t vpowq_f32(float32x4_t val, float32x4_t n); - -#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -/** Calculate hyperbolic tangent. - * - * tanh(x) = (e^2x - 1)/(e^2x + 1) - * - * @note We clamp x to [-5,5] to avoid overflowing issues. - * - * @param[in] val Input vector value in F32 format. - * - * @return The calculated Hyperbolic Tangent. - */ -static inline float16x8_t vtanhq_f16(float16x8_t val); - -/** Calculate reciprocal. - * - * @param[in] x Input value. - * - * @return The calculated reciprocal. - */ -static inline float16x4_t vinv_f16(float16x4_t x); - -/** Calculate reciprocal. - * - * @param[in] x Input value. - * - * @return The calculated reciprocal. - */ -static inline float16x8_t vinvq_f16(float16x8_t x); - -/** Calculate inverse square root. - * - * @param[in] x Input value. - * - * @return The calculated inverse square root. - */ -static inline float16x4_t vinvsqrt_f16(float16x4_t x); - -/** Calculate inverse square root. - * - * @param[in] x Input value. - * - * @return The calculated inverse square root. - */ -static inline float16x8_t vinvsqrtq_f16(float16x8_t x); - -/** Calculate exponential - * - * @param[in] x Input vector value in F16 format. - * - * @return The calculated exponent. - */ -static inline float16x8_t vexpq_f16(float16x8_t x); - -/** Calculate n power of a number. - * - * pow(x,n) = e^(n*log(x)) - * - * @param[in] val Input vector value in F16 format. - * @param[in] n Powers to raise the input to. - * - * @return The calculated power. - */ -static inline float16x8_t vpowq_f16(float16x8_t val, float16x8_t n); -#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */ - -/** Exponent polynomial coefficients */ -extern const float32_t exp_tab[4*8]; - - -/** Logarithm polynomial coefficients */ -extern const float32_t log_tab[4*8]; - -#ifndef DOXYGEN_SKIP_THIS -inline float32x4_t vfloorq_f32(float32x4_t val) -{ - static const float32_t CONST_1[4] = {1.f,1.f,1.f,1.f}; - - const int32x4_t z = vcvtq_s32_f32(val); - const float32x4_t r = vcvtq_f32_s32(z); - - return vbslq_f32(vcgtq_f32(r, val), vsubq_f32(r, vld1q_f32(CONST_1)), r); -} - -inline float32x2_t vinvsqrt_f32(float32x2_t x) -{ - float32x2_t sqrt_reciprocal = vrsqrte_f32(x); - sqrt_reciprocal = vmul_f32(vrsqrts_f32(vmul_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); - sqrt_reciprocal = vmul_f32(vrsqrts_f32(vmul_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); - - return sqrt_reciprocal; -} - -inline float32x4_t vinvsqrtq_f32(float32x4_t x) -{ - float32x4_t sqrt_reciprocal = vrsqrteq_f32(x); - sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); - sqrt_reciprocal = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); - - return sqrt_reciprocal; -} - -inline float32x2_t vinv_f32(float32x2_t x) -{ - float32x2_t recip = vrecpe_f32(x); - recip = vmul_f32(vrecps_f32(x, recip), recip); - recip = vmul_f32(vrecps_f32(x, recip), recip); - return recip; -} - -inline float32x4_t vinvq_f32(float32x4_t x) -{ - float32x4_t recip = vrecpeq_f32(x); - recip = vmulq_f32(vrecpsq_f32(x, recip), recip); - recip = vmulq_f32(vrecpsq_f32(x, recip), recip); - return recip; -} - -inline float32x4_t vtaylor_polyq_f32(float32x4_t x, const float32_t *coeffs) -{ - float32x4_t A = vmlaq_f32(vld1q_f32(&coeffs[4*0]), vld1q_f32(&coeffs[4*4]), x); - float32x4_t B = vmlaq_f32(vld1q_f32(&coeffs[4*2]), vld1q_f32(&coeffs[4*6]), x); - float32x4_t C = vmlaq_f32(vld1q_f32(&coeffs[4*1]), vld1q_f32(&coeffs[4*5]), x); - float32x4_t D = vmlaq_f32(vld1q_f32(&coeffs[4*3]), vld1q_f32(&coeffs[4*7]), x); - float32x4_t x2 = vmulq_f32(x, x); - float32x4_t x4 = vmulq_f32(x2, x2); - float32x4_t res = vmlaq_f32(vmlaq_f32(A, B, x2), vmlaq_f32(C, D, x2), x4); - return res; -} - -inline float32x4_t vexpq_f32(float32x4_t x) -{ - static const float32_t CONST_LN2[4] = {0.6931471805f,0.6931471805f,0.6931471805f,0.6931471805f}; // ln(2) - static const float32_t CONST_INV_LN2[4] = {1.4426950408f,1.4426950408f,1.4426950408f,1.4426950408f}; // 1/ln(2) - static const float32_t CONST_0[4] = {0.f,0.f,0.f,0.f}; - static const int32_t CONST_NEGATIVE_126[4] = {-126,-126,-126,-126}; - - // Perform range reduction [-log(2),log(2)] - int32x4_t m = vcvtq_s32_f32(vmulq_f32(x, vld1q_f32(CONST_INV_LN2))); - float32x4_t val = vmlsq_f32(x, vcvtq_f32_s32(m), vld1q_f32(CONST_LN2)); - - // Polynomial Approximation - float32x4_t poly = vtaylor_polyq_f32(val, exp_tab); - - // Reconstruct - poly = vreinterpretq_f32_s32(vqaddq_s32(vreinterpretq_s32_f32(poly), vqshlq_n_s32(m, 23))); - poly = vbslq_f32(vcltq_s32(m, vld1q_s32(CONST_NEGATIVE_126)), vld1q_f32(CONST_0), poly); - - return poly; -} - -inline float32x4_t vlogq_f32(float32x4_t x) -{ - static const int32_t CONST_127[4] = {127,127,127,127}; // 127 - static const float32_t CONST_LN2[4] = {0.6931471805f,0.6931471805f,0.6931471805f,0.6931471805f}; // ln(2) - - // Extract exponent - int32x4_t m = vsubq_s32(vreinterpretq_s32_u32(vshrq_n_u32(vreinterpretq_u32_f32(x), 23)), vld1q_s32(CONST_127)); - float32x4_t val = vreinterpretq_f32_s32(vsubq_s32(vreinterpretq_s32_f32(x), vshlq_n_s32(m, 23))); - - // Polynomial Approximation - float32x4_t poly = vtaylor_polyq_f32(val, log_tab); - - // Reconstruct - poly = vmlaq_f32(poly, vcvtq_f32_s32(m), vld1q_f32(CONST_LN2)); - - return poly; -} - -inline float32x4_t vtanhq_f32(float32x4_t val) -{ - static const float32_t CONST_1[4] = {1.f,1.f,1.f,1.f}; - static const float32_t CONST_2[4] = {2.f,2.f,2.f,2.f}; - static const float32_t CONST_MIN_TANH[4] = {-10.f,-10.f,-10.f,-10.f}; - static const float32_t CONST_MAX_TANH[4] = {10.f,10.f,10.f,10.f}; - - float32x4_t x = vminq_f32(vmaxq_f32(val, vld1q_f32(CONST_MIN_TANH)), vld1q_f32(CONST_MAX_TANH)); - float32x4_t exp2x = vexpq_f32(vmulq_f32(vld1q_f32(CONST_2), x)); - float32x4_t num = vsubq_f32(exp2x, vld1q_f32(CONST_1)); - float32x4_t den = vaddq_f32(exp2x, vld1q_f32(CONST_1)); - float32x4_t tanh = vmulq_f32(num, vinvq_f32(den)); - return tanh; -} - -inline float32x4_t vpowq_f32(float32x4_t val, float32x4_t n) -{ - return vexpq_f32(vmulq_f32(n, vlogq_f32(val))); -} -#endif /* DOXYGEN_SKIP_THIS */ - -#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -/** Exponent polynomial coefficients */ -/** Logarithm polynomial coefficients */ -#ifndef DOXYGEN_SKIP_THIS -inline float16x8_t vfloorq_f16(float16x8_t val) -{ - static const float16_t CONST_1[8] = {1.f,1.f,1.f,1.f,1.f,1.f,1.f,1.f}; - - const int16x8_t z = vcvtq_s16_f16(val); - const float16x8_t r = vcvtq_f16_s16(z); - - return vbslq_f16(vcgtq_f16(r, val), vsubq_f16(r, vld1q_f16(CONST_1)), r); -} -inline float16x4_t vinvsqrt_f16(float16x4_t x) -{ - float16x4_t sqrt_reciprocal = vrsqrte_f16(x); - sqrt_reciprocal = vmul_f16(vrsqrts_f16(vmul_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); - sqrt_reciprocal = vmul_f16(vrsqrts_f16(vmul_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); - return sqrt_reciprocal; -} - -inline float16x8_t vinvsqrtq_f16(float16x8_t x) -{ - float16x8_t sqrt_reciprocal = vrsqrteq_f16(x); - sqrt_reciprocal = vmulq_f16(vrsqrtsq_f16(vmulq_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); - sqrt_reciprocal = vmulq_f16(vrsqrtsq_f16(vmulq_f16(x, sqrt_reciprocal), sqrt_reciprocal), sqrt_reciprocal); - return sqrt_reciprocal; -} - -inline float16x4_t vinv_f16(float16x4_t x) -{ - float16x4_t recip = vrecpe_f16(x); - recip = vmul_f16(vrecps_f16(x, recip), recip); - recip = vmul_f16(vrecps_f16(x, recip), recip); - return recip; -} - -inline float16x8_t vinvq_f16(float16x8_t x) -{ - float16x8_t recip = vrecpeq_f16(x); - recip = vmulq_f16(vrecpsq_f16(x, recip), recip); - recip = vmulq_f16(vrecpsq_f16(x, recip), recip); - return recip; -} - -inline float16x8_t vtanhq_f16(float16x8_t val) -{ - const float16_t CONST_1[8] = {1.f,1.f,1.f,1.f,1.f,1.f,1.f,1.f}; - const float16_t CONST_2[8] = {2.f,2.f,2.f,2.f,2.f,2.f,2.f,2.f}; - const float16_t CONST_MIN_TANH[8] = {-10.f,-10.f,-10.f,-10.f,-10.f,-10.f,-10.f,-10.f}; - const float16_t CONST_MAX_TANH[8] = {10.f,10.f,10.f,10.f,10.f,10.f,10.f,10.f}; - - const float16x8_t x = vminq_f16(vmaxq_f16(val, vld1q_f16(CONST_MIN_TANH)), vld1q_f16(CONST_MAX_TANH)); - const float16x8_t exp2x = vexpq_f16(vmulq_f16(vld1q_f16(CONST_2), x)); - const float16x8_t num = vsubq_f16(exp2x, vld1q_f16(CONST_1)); - const float16x8_t den = vaddq_f16(exp2x, vld1q_f16(CONST_1)); - const float16x8_t tanh = vmulq_f16(num, vinvq_f16(den)); - return tanh; -} - -inline float16x8_t vtaylor_polyq_f16(float16x8_t x, const float16_t *coeffs) -{ - const float16x8_t A = vaddq_f16(vld1q_f16(&coeffs[8*0]), vmulq_f16(vld1q_f16(&coeffs[8*4]), x)); - const float16x8_t B = vaddq_f16(vld1q_f16(&coeffs[8*2]), vmulq_f16(vld1q_f16(&coeffs[8*6]), x)); - const float16x8_t C = vaddq_f16(vld1q_f16(&coeffs[8*1]), vmulq_f16(vld1q_f16(&coeffs[8*5]), x)); - const float16x8_t D = vaddq_f16(vld1q_f16(&coeffs[8*3]), vmulq_f16(vld1q_f16(&coeffs[8*7]), x)); - const float16x8_t x2 = vmulq_f16(x, x); - const float16x8_t x4 = vmulq_f16(x2, x2); - const float16x8_t res = vaddq_f16(vaddq_f16(A, vmulq_f16(B, x2)), vmulq_f16(vaddq_f16(C, vmulq_f16(D, x2)), x4)); - return res; -} - -inline float16x8_t vexpq_f16(float16x8_t x) -{ - // TODO (COMPMID-1535) : Revisit FP16 approximations - const float32x4_t x_high = vcvt_f32_f16(vget_high_f16(x)); - const float32x4_t x_low = vcvt_f32_f16(vget_low_f16(x)); - - const float16x8_t res = vcvt_high_f16_f32(vcvt_f16_f32(vexpq_f32(x_low)), vexpq_f32(x_high)); - return res; -} - -inline float16x8_t vlogq_f16(float16x8_t x) -{ - // TODO (COMPMID-1535) : Revisit FP16 approximations - const float32x4_t x_high = vcvt_f32_f16(vget_high_f16(x)); - const float32x4_t x_low = vcvt_f32_f16(vget_low_f16(x)); - - const float16x8_t res = vcvt_high_f16_f32(vcvt_f16_f32(vlogq_f32(x_low)), vlogq_f32(x_high)); - return res; -} - -inline float16x8_t vpowq_f16(float16x8_t val, float16x8_t n) -{ - // TODO (giaiod01) - COMPMID-1535 - float32x4_t n0_f32 = vcvt_f32_f16(vget_low_f16(n)); - float32x4_t n1_f32 = vcvt_f32_f16(vget_high_f16(n)); - float32x4_t val0_f32 = vcvt_f32_f16(vget_low_f16(val)); - float32x4_t val1_f32 = vcvt_f32_f16(vget_high_f16(val)); - - float32x4_t res0_f32 = vexpq_f32(vmulq_f32(n0_f32, vlogq_f32(val0_f32))); - float32x4_t res1_f32 = vexpq_f32(vmulq_f32(n1_f32, vlogq_f32(val1_f32))); - - return vcombine_f16(vcvt_f16_f32(res0_f32), vcvt_f16_f32(res1_f32)); -} -#endif /* DOXYGEN_SKIP_THIS */ -#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */ -#endif -#endif /* __ARM_COMPUTE_NEMATH_H__ */ diff --git a/Drivers/CMSIS/DSP/ComputeLibrary/LICENSE.txt b/Drivers/CMSIS/DSP/ComputeLibrary/LICENSE.txt deleted file mode 100644 index 30d978f..0000000 --- a/Drivers/CMSIS/DSP/ComputeLibrary/LICENSE.txt +++ /dev/null @@ -1,21 +0,0 @@ -MIT License - -Copyright (c) 2017-2019 ARM Software - -Permission is hereby granted, free of charge, to any person obtaining a copy -of this software and associated documentation files (the "Software"), to deal -in the Software without restriction, including without limitation the rights -to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -copies of the Software, and to permit persons to whom the Software is -furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice shall be included in all -copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -SOFTWARE. diff --git a/Drivers/CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c b/Drivers/CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c deleted file mode 100644 index 5d4dad4..0000000 --- a/Drivers/CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2016, 2019 ARM Limited. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ -#include "arm_math.h" -#include "NEMath.h" - -#if defined(ARM_MATH_NEON) - -/** Exponent polynomial coefficients */ -const float32_t exp_tab[4*8] = -{ - 1.f,1.f,1.f,1.f, - 0.0416598916054f,0.0416598916054f,0.0416598916054f,0.0416598916054f, - 0.500000596046f,0.500000596046f,0.500000596046f,0.500000596046f, - 0.0014122662833f,0.0014122662833f,0.0014122662833f,0.0014122662833f, - 1.00000011921f,1.00000011921f,1.00000011921f,1.00000011921f, - 0.00833693705499f,0.00833693705499f,0.00833693705499f,0.00833693705499f, - 0.166665703058f,0.166665703058f,0.166665703058f,0.166665703058f, - 0.000195780929062f,0.000195780929062f,0.000195780929062f,0.000195780929062f -}; - -/** Logarithm polynomial coefficients */ -const float32_t log_tab[4*8] = -{ - -2.29561495781f,-2.29561495781f,-2.29561495781f,-2.29561495781f, - -2.47071170807f,-2.47071170807f,-2.47071170807f,-2.47071170807f, - -5.68692588806f,-5.68692588806f,-5.68692588806f,-5.68692588806f, - -0.165253549814f,-0.165253549814f,-0.165253549814f,-0.165253549814f, - 5.17591238022f,5.17591238022f,5.17591238022f,5.17591238022f, - 0.844007015228f,0.844007015228f,0.844007015228f,0.844007015228f, - 4.58445882797f,4.58445882797f,4.58445882797f,4.58445882797f, - 0.0141278216615f,0.0141278216615f,0.0141278216615f,0.0141278216615f -}; - -#endif diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/Abstract.txt deleted file mode 100644 index ff1e085..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_class_marks_example - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/CMakeLists.txt deleted file mode 100644 index c7dfe51..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_bayes_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_bayes_example) - - -include(config) -configApp(arm_bayes_example ${ROOT}) - -target_sources(arm_bayes_example PRIVATE arm_bayes_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_bayes_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/arm_bayes_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/arm_bayes_example_f32.c deleted file mode 100644 index 66fc34f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_bayes_example/arm_bayes_example_f32.c +++ /dev/null @@ -1,145 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2019-2020 ARM Limited. All rights reserved. -* -* $Date: 09. December 2019 -* $Revision: V1.0.0 -* -* Project: CMSIS DSP Library -* Title: arm_bayes_example_f32.c -* -* Description: Example code demonstrating how to use Bayes functions. -* -* Target Processor: Cortex-M/Cortex-A -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup BayesExample Bayes Example - * - * \par Description: - * \par - * Demonstrates the use of Bayesian classifier functions. It is complementing the tutorial - * about classical ML with CMSIS-DSP and python scikit-learn: - * https://developer.arm.com/solutions/machine-learning-on-arm/developer-material/how-to-guides/implement-classical-ml-with-arm-cmsis-dsp-libraries - * - */ - - -/** \example arm_bayes_example_f32.c - */ - -#include -#include -#include "arm_math.h" - -/* -Those parameters can be generated with the python library scikit-learn. -*/ -arm_gaussian_naive_bayes_instance_f32 S; - -#define NB_OF_CLASSES 3 -#define VECTOR_DIMENSION 2 - -const float32_t theta[NB_OF_CLASSES*VECTOR_DIMENSION] = { - 1.4539529436590528f, 0.8722776016801852f, - -1.5267934452462473f, 0.903204577814203f, - -0.15338006360932258f, -2.9997913665803964f -}; /**< Mean values for the Gaussians */ - -const float32_t sigma[NB_OF_CLASSES*VECTOR_DIMENSION] = { - 1.0063470889514925f, 0.9038018246524426f, - 1.0224479953244736f, 0.7768764290432544f, - 1.1217662403241206f, 1.2303890106020325f -}; /**< Variances for the Gaussians */ - -const float32_t classPriors[NB_OF_CLASSES] = { - 0.3333333333333333f, 0.3333333333333333f, 0.3333333333333333f -}; /**< Class prior probabilities */ - -int32_t main(void) -{ - /* Array of input data */ - float32_t in[2]; - - /* Result of the classifier */ - float32_t result[NB_OF_CLASSES]; - float32_t temp[NB_OF_CLASSES]; - float32_t maxProba; - uint32_t index; - - S.vectorDimension = VECTOR_DIMENSION; - S.numberOfClasses = NB_OF_CLASSES; - S.theta = theta; - S.sigma = sigma; - S.classPriors = classPriors; - S.epsilon=4.328939296523643e-09f; - - in[0] = 1.5f; - in[1] = 1.0f; - - index = arm_gaussian_naive_bayes_predict_f32(&S, in, result,temp); - - maxProba = result[index]; - -#if defined(SEMIHOSTING) - printf("Class = %d\n", index); -#endif - - in[0] = -1.5f; - in[1] = 1.0f; - - index = arm_gaussian_naive_bayes_predict_f32(&S, in, result,temp); - - maxProba = result[index]; - -#if defined(SEMIHOSTING) - printf("Class = %d\n", index); -#endif - - in[0] = 0.0f; - in[1] = -3.0f; - - index = arm_gaussian_naive_bayes_predict_f32(&S, in, result,temp); - - maxProba = result[index]; - -#if defined(SEMIHOSTING) - printf("Class = %d\n", index); -#endif - -#if !defined(SEMIHOSTING) - while (1); /* main function does not return */ -#endif -} - - - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/Abstract.txt deleted file mode 100644 index ff1e085..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_class_marks_example - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/CMakeLists.txt deleted file mode 100644 index 2ef86ab..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_class_marks_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_class_marks_example) - - -include(config) -configApp(arm_class_marks_example ${ROOT}) - -target_sources(arm_class_marks_example PRIVATE arm_class_marks_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_class_marks_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/arm_class_marks_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/arm_class_marks_example_f32.c deleted file mode 100644 index bc72bdf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_class_marks_example/arm_class_marks_example_f32.c +++ /dev/null @@ -1,221 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_class_marks_example_f32.c -* -* Description: Example code to calculate Minimum, Maximum -* Mean, std and variance of marks obtained in a class -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup ClassMarks Class Marks Example - * - * \par Description: - * \par - * Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance - * and Matrix functions to calculate statistical values of marks obtained in a class. - * - * \note This example also demonstrates the usage of static initialization. - * - * \par Variables Description: - * \par - * \li \c testMarks_f32 points to the marks scored by 20 students in 4 subjects - * \li \c max_marks Maximum of all marks - * \li \c min_marks Minimum of all marks - * \li \c mean Mean of all marks - * \li \c var Variance of the marks - * \li \c std Standard deviation of the marks - * \li \c numStudents Total number of students in the class - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_mat_init_f32() - * - arm_mat_mult_f32() - * - arm_max_f32() - * - arm_min_f32() - * - arm_mean_f32() - * - arm_std_f32() - * - arm_var_f32() - * - * Refer - * \link arm_class_marks_example_f32.c \endlink - * - */ - - -/** \example arm_class_marks_example_f32.c - */ -#include "arm_math.h" - -#if defined(SEMIHOSTING) -#include -#endif - -#define USE_STATIC_INIT - - /* ---------------------------------------------------------------------- -** Global defines -** ------------------------------------------------------------------- */ - -#define TEST_LENGTH_SAMPLES (20*4) - -/* ---------------------------------------------------------------------- -** List of Marks scored by 20 students for 4 subjects -** ------------------------------------------------------------------- */ -const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] = -{ - 42.000000, 37.000000, 81.000000, 28.000000, - 83.000000, 72.000000, 36.000000, 38.000000, - 32.000000, 51.000000, 63.000000, 64.000000, - 97.000000, 82.000000, 95.000000, 90.000000, - 66.000000, 51.000000, 54.000000, 42.000000, - 67.000000, 56.000000, 45.000000, 57.000000, - 67.000000, 69.000000, 35.000000, 52.000000, - 29.000000, 81.000000, 58.000000, 47.000000, - 38.000000, 76.000000, 100.000000, 29.000000, - 33.000000, 47.000000, 29.000000, 50.000000, - 34.000000, 41.000000, 61.000000, 46.000000, - 52.000000, 50.000000, 48.000000, 36.000000, - 47.000000, 55.000000, 44.000000, 40.000000, - 100.000000, 94.000000, 84.000000, 37.000000, - 32.000000, 71.000000, 47.000000, 77.000000, - 31.000000, 50.000000, 49.000000, 35.000000, - 63.000000, 67.000000, 40.000000, 31.000000, - 29.000000, 68.000000, 61.000000, 38.000000, - 31.000000, 28.000000, 28.000000, 76.000000, - 55.000000, 33.000000, 29.000000, 39.000000 -}; - - -/* ---------------------------------------------------------------------- -* Number of subjects X 1 -* ------------------------------------------------------------------- */ -const float32_t testUnity_f32[4] = -{ - 1.000, 1.000, 1.000, 1.000 -}; - - -/* ---------------------------------------------------------------------- -** f32 Output buffer -** ------------------------------------------------------------------- */ -static float32_t testOutput[TEST_LENGTH_SAMPLES]; - - -/* ------------------------------------------------------------------ -* Global defines -*------------------------------------------------------------------- */ -#define NUMSTUDENTS 20 -#define NUMSUBJECTS 4 - -/* ------------------------------------------------------------------ -* Global variables -*------------------------------------------------------------------- */ - - uint32_t numStudents = 20; - uint32_t numSubjects = 4; -float32_t max_marks, min_marks, mean, std, var; - uint32_t student_num; - -/* ---------------------------------------------------------------------------------- -* Main f32 test function. It returns maximum marks secured and student number -* ------------------------------------------------------------------------------- */ - -int32_t main() -{ - -#ifndef USE_STATIC_INIT - - arm_matrix_instance_f32 srcA; - arm_matrix_instance_f32 srcB; - arm_matrix_instance_f32 dstC; - - /* Input and output matrices initializations */ - arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32); - arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32); - arm_mat_init_f32(&dstC, numStudents, 1, testOutput); - -#else - - /* Static Initializations of Input and output matrix sizes and array */ - arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32}; - arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32}; - arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput}; - -#endif - - - /* ---------------------------------------------------------------------- - *Call the Matrix multiplication process function - * ------------------------------------------------------------------- */ - arm_mat_mult_f32(&srcA, &srcB, &dstC); - - /* ---------------------------------------------------------------------- - ** Call the Max function to calculate max marks among numStudents - ** ------------------------------------------------------------------- */ - arm_max_f32(testOutput, numStudents, &max_marks, &student_num); - - /* ---------------------------------------------------------------------- - ** Call the Min function to calculate min marks among numStudents - ** ------------------------------------------------------------------- */ - arm_min_f32(testOutput, numStudents, &min_marks, &student_num); - - /* ---------------------------------------------------------------------- - ** Call the Mean function to calculate mean - ** ------------------------------------------------------------------- */ - arm_mean_f32(testOutput, numStudents, &mean); - - /* ---------------------------------------------------------------------- - ** Call the std function to calculate standard deviation - ** ------------------------------------------------------------------- */ - arm_std_f32(testOutput, numStudents, &std); - - /* ---------------------------------------------------------------------- - ** Call the var function to calculate variance - ** ------------------------------------------------------------------- */ - arm_var_f32(testOutput, numStudents, &var); - -#if defined(SEMIHOSTING) - printf("mean = %f, std = %f\n",mean,std); -#endif - -#if !defined(SEMIHOSTING) - while (1); /* main function does not return */ -#endif -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/Abstract.txt deleted file mode 100644 index 358a4f3..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_convolution_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/CMakeLists.txt deleted file mode 100644 index 55e4041..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_convolution_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_convolution_example) - - -include(config) -configApp(arm_convolution_example ${ROOT}) - -target_sources(arm_convolution_example PRIVATE arm_convolution_example_f32.c math_helper.c) - -### Sources and libs - -target_link_libraries(arm_convolution_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/arm_convolution_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/arm_convolution_example_f32.c deleted file mode 100644 index 3119d31..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/arm_convolution_example_f32.c +++ /dev/null @@ -1,263 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_convolution_example_f32.c -* -* Description: Example code demonstrating Convolution of two input signals using fft. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup ConvolutionExample Convolution Example - * - * \par Description: - * \par - * Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex - * Multiplication, and Support Functions. - * - * \par Algorithm: - * \par - * The convolution theorem states that convolution in the time domain corresponds to - * multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of - * two signals is equal to the product of their individual Fourier transforms. - * The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT). - * \par - * Two input signals, a[n] and b[n], with lengths \c n1 and \c n2 respectively, - * are zero padded so that their lengths become \c N, which is greater than or equal to (n1+n2-1) - * and is a power of 4 as FFT implementation is radix-4. - * The convolution of a[n] and b[n] is obtained by taking the FFT of the input - * signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of - * the multiplied result. - * \par - * This is denoted by the following equations: - * 
 A[k] = FFT(a[n],N)
- * B[k] = FFT(b[n],N)
- * conv(a[n], b[n]) = IFFT(A[k] * B[k], N)
- * where A[k] and B[k] are the N-point FFTs of the signals a[n] - * and b[n] respectively. - * The length of the convolved signal is (n1+n2-1). - * - * \par Block Diagram: - * \par - * \image html Convolution.gif - * - * \par Variables Description: - * \par - * \li \c testInputA_f32 points to the first input sequence - * \li \c srcALen length of the first input sequence - * \li \c testInputB_f32 points to the second input sequence - * \li \c srcBLen length of the second input sequence - * \li \c outLen length of convolution output sequence, (srcALen + srcBLen - 1) - * \li \c AxB points to the output array where the product of individual FFTs of inputs is stored. - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_fill_f32() - * - arm_copy_f32() - * - arm_cfft_radix4_init_f32() - * - arm_cfft_radix4_f32() - * - arm_cmplx_mult_cmplx_f32() - * - * Refer - * \link arm_convolution_example_f32.c \endlink - * - */ - - -/** \example arm_convolution_example_f32.c - */ - -#include "arm_math.h" -#include "math_helper.h" - -#if defined(SEMIHOSTING) -#include -#endif - -/* ---------------------------------------------------------------------- -* Defines each of the tests performed -* ------------------------------------------------------------------- */ -#define MAX_BLOCKSIZE 128 -#define DELTA (0.000001f) -#define SNR_THRESHOLD 90 - -/* ---------------------------------------------------------------------- -* Declare I/O buffers -* ------------------------------------------------------------------- */ -float32_t Ak[MAX_BLOCKSIZE]; /* Input A */ -float32_t Bk[MAX_BLOCKSIZE]; /* Input B */ -float32_t AxB[MAX_BLOCKSIZE * 2]; /* Output */ - -/* ---------------------------------------------------------------------- -* Test input data for Floating point Convolution example for 32-blockSize -* Generated by the MATLAB randn() function -* ------------------------------------------------------------------- */ -float32_t testInputA_f32[64] = -{ - -0.808920, 1.357369, 1.180861, -0.504544, 1.762637, -0.703285, - 1.696966, 0.620571, -0.151093, -0.100235, -0.872382, -0.403579, - -0.860749, -0.382648, -1.052338, 0.128113, -0.646269, 1.093377, - -2.209198, 0.471706, 0.408901, 1.266242, 0.598252, 1.176827, - -0.203421, 0.213596, -0.851964, -0.466958, 0.021841, -0.698938, - -0.604107, 0.461778, -0.318219, 0.942520, 0.577585, 0.417619, - 0.614665, 0.563679, -1.295073, -0.764437, 0.952194, -0.859222, - -0.618554, -2.268542, -1.210592, 1.655853, -2.627219, -0.994249, - -1.374704, 0.343799, 0.025619, 1.227481, -0.708031, 0.069355, - -1.845228, -1.570886, 1.010668, -1.802084, 1.630088, 1.286090, - -0.161050, -0.940794, 0.367961, 0.291907 - -}; - -float32_t testInputB_f32[64] = -{ - 0.933724, 0.046881, 1.316470, 0.438345, 0.332682, 2.094885, - 0.512081, 0.035546, 0.050894, -2.320371, 0.168711, -1.830493, - -0.444834, -1.003242, -0.531494, -1.365600, -0.155420, -0.757692, - -0.431880, -0.380021, 0.096243, -0.695835, 0.558850, -1.648962, - 0.020369, -0.363630, 0.887146, 0.845503, -0.252864, -0.330397, - 1.269131, -1.109295, -1.027876, 0.135940, 0.116721, -0.293399, - -1.349799, 0.166078, -0.802201, 0.369367, -0.964568, -2.266011, - 0.465178, 0.651222, -0.325426, 0.320245, -0.784178, -0.579456, - 0.093374, 0.604778, -0.048225, 0.376297, -0.394412, 0.578182, - -1.218141, -1.387326, 0.692462, -0.631297, 0.153137, -0.638952, - 0.635474, -0.970468, 1.334057, -0.111370 -}; - -const float testRefOutput_f32[127] = -{ - -0.818943, 1.229484, -0.533664, 1.016604, 0.341875, -1.963656, - 5.171476, 3.478033, 7.616361, 6.648384, 0.479069, 1.792012, - -1.295591, -7.447818, 0.315830, -10.657445, -2.483469, -6.524236, - -7.380591, -3.739005, -8.388957, 0.184147, -1.554888, 3.786508, - -1.684421, 5.400610, -1.578126, 7.403361, 8.315999, 2.080267, - 11.077776, 2.749673, 7.138962, 2.748762, 0.660363, 0.981552, - 1.442275, 0.552721, -2.576892, 4.703989, 0.989156, 8.759344, - -0.564825, -3.994680, 0.954710, -5.014144, 6.592329, 1.599488, - -13.979146, -0.391891, -4.453369, -2.311242, -2.948764, 1.761415, - -0.138322, 10.433007, -2.309103, 4.297153, 8.535523, 3.209462, - 8.695819, 5.569919, 2.514304, 5.582029, 2.060199, 0.642280, - 7.024616, 1.686615, -6.481756, 1.343084, -3.526451, 1.099073, - -2.965764, -0.173723, -4.111484, 6.528384, -6.965658, 1.726291, - 1.535172, 11.023435, 2.338401, -4.690188, 1.298210, 3.943885, - 8.407885, 5.168365, 0.684131, 1.559181, 1.859998, 2.852417, - 8.574070, -6.369078, 6.023458, 11.837963, -6.027632, 4.469678, - -6.799093, -2.674048, 6.250367, -6.809971, -3.459360, 9.112410, - -2.711621, -1.336678, 1.564249, -1.564297, -1.296760, 8.904013, - -3.230109, 6.878013, -7.819823, 3.369909, -1.657410, -2.007358, - -4.112825, 1.370685, -3.420525, -6.276605, 3.244873, -3.352638, - 1.545372, 0.902211, 0.197489, -1.408732, 0.523390, 0.348440, 0 -}; - - -/* ---------------------------------------------------------------------- -* Declare Global variables -* ------------------------------------------------------------------- */ -uint32_t srcALen = 64; /* Length of Input A */ -uint32_t srcBLen = 64; /* Length of Input B */ -uint32_t outLen; /* Length of convolution output */ -float32_t snr; /* output SNR */ - -int32_t main(void) -{ - arm_status status; /* Status of the example */ - arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */ - -#if defined(SEMIHOSTING) - printf("START\n"); -#endif - - /* CFFT Structure instance pointer */ - arm_cfft_radix4_instance_f32 *cfft_instance_ptr = - (arm_cfft_radix4_instance_f32*) &cfft_instance; - - /* output length of convolution */ - outLen = srcALen + srcBLen - 1; - - /* Initialise the fft input buffers with all zeros */ - arm_fill_f32(0.0, Ak, MAX_BLOCKSIZE); - arm_fill_f32(0.0, Bk, MAX_BLOCKSIZE); - - /* Copy the input values to the fft input buffers */ - arm_copy_f32(testInputA_f32, Ak, MAX_BLOCKSIZE/2); - arm_copy_f32(testInputB_f32, Bk, MAX_BLOCKSIZE/2); - - /* Initialize the CFFT function to compute 64 point fft */ - status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1); - - /* Transform input a[n] from time domain to frequency domain A[k] */ - arm_cfft_radix4_f32(cfft_instance_ptr, Ak); - /* Transform input b[n] from time domain to frequency domain B[k] */ - arm_cfft_radix4_f32(cfft_instance_ptr, Bk); - - /* Complex Multiplication of the two input buffers in frequency domain */ - arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2); - - /* Initialize the CIFFT function to compute 64 point ifft */ - status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1); - - /* Transform the multiplication output from frequency domain to time domain, - that gives the convolved output. */ - arm_cfft_radix4_f32(cfft_instance_ptr, AxB); - - /* SNR Calculation */ - snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1); - - /* Compare the SNR with threshold to test whether the - computed output is matched with the reference output values. */ - status = (snr <= SNR_THRESHOLD) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS; - - if (status != ARM_MATH_SUCCESS) - { -#if defined (SEMIHOSTING) - printf("FAILURE\n"); -#else - while (1); /* main function does not return */ -#endif - } - else - { -#if defined (SEMIHOSTING) - printf("SUCCESS\n"); -#else - while (1); /* main function does not return */ -#endif - } - -} - - /** \endlink */ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/math_helper.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/math_helper.c deleted file mode 100644 index bcc7a05..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/math_helper.c +++ /dev/null @@ -1,474 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 b -* -* Project: CMSIS DSP Library -* -* Title: math_helper.c -* -* Description: Definition of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/* ---------------------------------------------------------------------- -* Include standard header files -* -------------------------------------------------------------------- */ -#include - -/* ---------------------------------------------------------------------- -* Include project header files -* -------------------------------------------------------------------- */ -#include "math_helper.h" - -/** - * @brief Caluclation of SNR - * @param[in] pRef Pointer to the reference buffer - * @param[in] pTest Pointer to the test buffer - * @param[in] buffSize total number of samples - * @return SNR - * The function Caluclates signal to noise ratio for the reference output - * and test output - */ - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) -{ - float EnergySignal = 0.0, EnergyError = 0.0; - uint32_t i; - float SNR; - int temp; - int *test; - - for (i = 0; i < buffSize; i++) - { - /* Checking for a NAN value in pRef array */ - test = (int *)(&pRef[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - /* Checking for a NAN value in pTest array */ - test = (int *)(&pTest[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - EnergySignal += pRef[i] * pRef[i]; - EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); - } - - /* Checking for a NAN value in EnergyError */ - test = (int *)(&EnergyError); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - - SNR = 10 * log10 (EnergySignal / EnergyError); - - return (SNR); - -} - - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Converts float to fixed in q12.20 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to outputbuffer - * @param[in] numSamples number of samples in the input buffer - * @return none - * The function converts floating point values to fixed point(q12.20) values - */ - -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1048576.0f corresponds to pow(2, 20) */ - pOut[i] = (q31_t) (pIn[i] * 1048576.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 1.0) - { - pOut[i] = 0x000FFFFF; - } - } -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q31 (q31_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q7 (q7_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - - - -/** - * @brief Caluclates number of guard bits - * @param[in] num_adds number of additions - * @return guard bits - * The function Caluclates the number of guard bits - * depending on the numtaps - */ - -uint32_t arm_calc_guard_bits (uint32_t num_adds) -{ - uint32_t i = 1, j = 0; - - if (num_adds == 1) - { - return (0); - } - - while (i < num_adds) - { - i = i * 2; - j++; - } - - return (j); -} - -/** - * @brief Apply guard bits to buffer - * @param[in,out] pIn pointer to input buffer - * @param[in] numSamples number of samples in the input buffer - * @param[in] guard_bits guard bits - * @return none - */ - -void arm_apply_guard_bits (float32_t *pIn, - uint32_t numSamples, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); - } -} - -/** - * @brief Calculates pow(2, numShifts) - * @param[in] numShifts number of shifts - * @return pow(2, numShifts) - */ -uint32_t arm_calc_2pow(uint32_t numShifts) -{ - - uint32_t i, val = 1; - - for (i = 0; i < numShifts; i++) - { - val = val * 2; - } - - return(val); -} - - - -/** - * @brief Converts float to fixed q14 - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 16384.0f corresponds to pow(2, 14) */ - pOut[i] = (q15_t) (pIn[i] * 16384.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFF; - } - - } - -} - - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 536870912.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 4.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - - -/** - * @brief Converts float to fixed q28 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 268435456.0f corresponds to pow(2, 28) */ - pOut[i] = (q31_t) (pIn[i] * 268435456.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 8.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - - -/* - -Conflicting with the new clip functions in CMSIS-DSP and not used -in the examples. - -*/ -#if 0 -/** - * @brief Clip the float values to +/- 1 - * @param[in,out] pIn input buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_clip_f32 (float *pIn, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - if (pIn[i] > 1.0f) - { - pIn[i] = 1.0; - } - else if ( pIn[i] < -1.0f) - { - pIn[i] = -1.0; - } - - } -} - -#endif - - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/math_helper.h b/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/math_helper.h deleted file mode 100644 index b35feb8..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_convolution_example/math_helper.h +++ /dev/null @@ -1,62 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2013 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* -* Title: math_helper.h -* -* Description: Prototypes of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -#ifndef MATH_HELPER_H -#define MATH_HELPER_H - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize); -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); -void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); -void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_guard_bits(uint32_t num_adds); -void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_2pow(uint32_t guard_bits); -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/Abstract.txt deleted file mode 100644 index 79172eb..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_dotproduct_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/CMakeLists.txt deleted file mode 100644 index 8e26a49..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_dotproduct_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_dotproduct_example) - - -include(config) -configApp(arm_dotproduct_example ${ROOT}) - -target_sources(arm_dotproduct_example PRIVATE arm_dotproduct_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_dotproduct_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/arm_dotproduct_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/arm_dotproduct_example_f32.c deleted file mode 100644 index 4b7c51d..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_dotproduct_example/arm_dotproduct_example_f32.c +++ /dev/null @@ -1,189 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_dotproduct_example_f32.c -* -* Description: Example code computing dot product of two vectors. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup DotproductExample Dot Product Example - * - * \par Description: - * \par - * Demonstrates the use of the Multiply and Add functions to perform the dot product. - * The dot product of two vectors is obtained by multiplying corresponding elements - * and summing the products. - - * \par Algorithm: - * \par - * The two input vectors \c A and \c B with length \c n, are multiplied element-by-element - * and then added to obtain dot product. - * \par - * This is denoted by the following equation: - * 
  dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]
- * - * \par Block Diagram: - * \par - * \image html dotProduct.gif - * - * \par Variables Description: - * \par - * \li \c srcA_buf_f32 points to first input vector - * \li \c srcB_buf_f32 points to second input vector - * \li \c testOutput stores dot product of the two input vectors. - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_mult_f32() - * - arm_add_f32() - * - * Refer - * \link arm_dotproduct_example_f32.c \endlink - * - */ - - -/** \example arm_dotproduct_example_f32.c - */ - -#include -#include "arm_math.h" - -#if defined(SEMIHOSTING) -#include -#endif - -/* ---------------------------------------------------------------------- -* Defines each of the tests performed -* ------------------------------------------------------------------- */ -#define MAX_BLOCKSIZE 32 -#define DELTA (0.000001f) - -/* ---------------------------------------------------------------------- -* Test input data for Floating point Dot Product example for 32-blockSize -* Generated by the MATLAB randn() function -* ------------------------------------------------------------------- */ -/* ---------------------------------------------------------------------- -** Test input data of srcA for blockSize 32 -** ------------------------------------------------------------------- */ -float32_t srcA_buf_f32[MAX_BLOCKSIZE] = -{ - -0.4325648115282207, -1.6655843782380970, 0.1253323064748307, - 0.2876764203585489, -1.1464713506814637, 1.1909154656429988, - 1.1891642016521031, -0.0376332765933176, 0.3272923614086541, - 0.1746391428209245, -0.1867085776814394, 0.7257905482933027, - -0.5883165430141887, 2.1831858181971011, -0.1363958830865957, - 0.1139313135208096, 1.0667682113591888, 0.0592814605236053, - -0.0956484054836690, -0.8323494636500225, 0.2944108163926404, - -1.3361818579378040, 0.7143245518189522, 1.6235620644462707, - -0.6917757017022868, 0.8579966728282626, 1.2540014216025324, - -1.5937295764474768, -1.4409644319010200, 0.5711476236581780, - -0.3998855777153632, 0.6899973754643451 -}; - -/* ---------------------------------------------------------------------- -** Test input data of srcB for blockSize 32 -** ------------------------------------------------------------------- */ -float32_t srcB_buf_f32[MAX_BLOCKSIZE] = -{ - 1.7491401329284098, 0.1325982188803279, 0.3252281811989881, - -0.7938091410349637, 0.3149236145048914, -0.5272704888029532, - 0.9322666565031119, 1.1646643544607362, -2.0456694357357357, - -0.6443728590041911, 1.7410657940825480, 0.4867684246821860, - 1.0488288293660140, 1.4885752747099299, 1.2705014969484090, - -1.8561241921210170, 2.1343209047321410, 1.4358467535865909, - -0.9173023332875400, -1.1060770780029008, 0.8105708062681296, - 0.6985430696369063, -0.4015827425012831, 1.2687512030669628, - -0.7836083053674872, 0.2132664971465569, 0.7878984786088954, - 0.8966819356782295, -0.1869172943544062, 1.0131816724341454, - 0.2484350696132857, 0.0596083377937976 -}; - -/* Reference dot product output */ -float32_t refDotProdOut = 5.9273644806352142; - -/* ---------------------------------------------------------------------- -* Declare Global variables -* ------------------------------------------------------------------- */ -float32_t multOutput[MAX_BLOCKSIZE]; /* Intermediate output */ -float32_t testOutput; /* Final ouput */ - -arm_status status; /* Status of the example */ - -int32_t main(void) -{ - uint32_t i; /* Loop counter */ - float32_t diff; /* Difference between reference and test outputs */ - - /* Multiplication of two input buffers */ - arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE); - - /* Accumulate the multiplication output values to - get the dot product of the two inputs */ - for(i=0; i< MAX_BLOCKSIZE; i++) - { - arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1); - } - - /* absolute value of difference between ref and test */ - diff = fabsf(refDotProdOut - testOutput); - - /* Comparison of dot product value with reference */ - status = (diff > DELTA) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS; - - if (status != ARM_MATH_SUCCESS) - { -#if defined (SEMIHOSTING) - printf("FAILURE\n"); -#else - while (1); /* main function does not return */ -#endif - } - else - { -#if defined (SEMIHOSTING) - printf("SUCCESS\n"); -#else - while (1); /* main function does not return */ -#endif - } -} - - /** \endlink */ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/Abstract.txt deleted file mode 100644 index 86a02e4..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_fft_bin_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/CMakeLists.txt deleted file mode 100644 index 445cead..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_fft_bin_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_fft_bin_example) - - -include(config) -configApp(arm_fft_bin_example ${ROOT}) - -target_sources(arm_fft_bin_example PRIVATE arm_fft_bin_data.c arm_fft_bin_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_fft_bin_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/arm_fft_bin_data.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/arm_fft_bin_data.c deleted file mode 100644 index 10f3e12..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/arm_fft_bin_data.c +++ /dev/null @@ -1,308 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_fft_bin_data.c -* -* Description: Data file used for example code -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/* ---------------------------------------------------------------------- -Test Input signal contains 10KHz signal + Uniformly distributed white noise -** ------------------------------------------------------------------- */ - -float32_t testInput_f32_10khz[2048] = -{ --0.865129623056441, 0.000000000000000, -2.655020678073846, 0.000000000000000, 0.600664612949661, 0.000000000000000, 0.080378093886515, 0.000000000000000, --2.899160484012034, 0.000000000000000, 2.563004262857762, 0.000000000000000, 3.078328403304206, 0.000000000000000, 0.105906778385130, 0.000000000000000, -0.048366940168201, 0.000000000000000, -0.145696461188734, 0.000000000000000, -0.023417155362879, 0.000000000000000, 2.127729174988954, 0.000000000000000, --1.176633086028377, 0.000000000000000, 3.690223557991855, 0.000000000000000, -0.622791766173194, 0.000000000000000, 0.722837373872203, 0.000000000000000, -2.739754205367484, 0.000000000000000, -0.062610410524552, 0.000000000000000, -0.891296810967338, 0.000000000000000, -1.845872258871811, 0.000000000000000, -1.195039415434387, 0.000000000000000, -2.177388969045026, 0.000000000000000, 1.078649103637905, 0.000000000000000, 2.570976050490193, 0.000000000000000, --1.383551403404574, 0.000000000000000, 2.392141424058873, 0.000000000000000, 2.858002843205065, 0.000000000000000, -3.682433899725536, 0.000000000000000, --3.488146646451150, 0.000000000000000, 1.323468578888120, 0.000000000000000, -0.099771155430726, 0.000000000000000, 1.561168082500454, 0.000000000000000, -1.025026795103179, 0.000000000000000, 0.928841900171200, 0.000000000000000, 2.930499509864950, 0.000000000000000, 2.013349089766430, 0.000000000000000, -2.381676148486737, 0.000000000000000, -3.081062307950236, 0.000000000000000, -0.389579115537544, 0.000000000000000, 0.181540149166620, 0.000000000000000, --2.601953341353208, 0.000000000000000, 0.333435137783218, 0.000000000000000, -2.812945856162965, 0.000000000000000, 2.649109640172910, 0.000000000000000, --1.003963025744654, 0.000000000000000, 1.552460768755035, 0.000000000000000, 0.088641345335247, 0.000000000000000, -2.519951327113426, 0.000000000000000, --4.341348988610527, 0.000000000000000, 0.557772429359965, 0.000000000000000, -1.671267412948494, 0.000000000000000, 0.733951350960387, 0.000000000000000, -0.409263788034864, 0.000000000000000, 3.566033071952806, 0.000000000000000, 1.882565173848352, 0.000000000000000, -1.106017073793287, 0.000000000000000, -0.154456720778718, 0.000000000000000, -2.513205795512153, 0.000000000000000, 0.310978660939421, 0.000000000000000, 0.579706500111723, 0.000000000000000, -0.000086383683251, 0.000000000000000, -1.311866980897721, 0.000000000000000, 1.840007477574986, 0.000000000000000, -3.253005768451345, 0.000000000000000, -1.462584328739432, 0.000000000000000, 1.610103610851738, 0.000000000000000, 0.761914676858907, 0.000000000000000, 0.974541361089834, 0.000000000000000, -0.686845845885983, 0.000000000000000, 1.849153122025191, 0.000000000000000, 0.787800410401453, 0.000000000000000, -1.187438909666279, 0.000000000000000, --0.754937911044720, 0.000000000000000, 0.084373858395232, 0.000000000000000, -2.600269011710521, 0.000000000000000, -0.962982842142644, 0.000000000000000, --0.369328108540868, 0.000000000000000, 0.810791418361879, 0.000000000000000, 3.587016488699641, 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2.378543590847629, 0.000000000000000, 1.459053407813062, 0.000000000000000, --0.967913907390927, 0.000000000000000, 1.322825200678212, 0.000000000000000, -1.033775820061824, 0.000000000000000, -1.813629552693142, 0.000000000000000, -4.794348161661486, 0.000000000000000, 0.655279811518676, 0.000000000000000, -2.224590138589720, 0.000000000000000, 0.595329481295766, 0.000000000000000, -3.364055988866225, 0.000000000000000, 1.863416422998127, 0.000000000000000, 1.930305751828105, 0.000000000000000, -0.284467053432545, 0.000000000000000, --0.923374905878938, 0.000000000000000, 1.922988234041399, 0.000000000000000, 0.310482143432719, 0.000000000000000, 0.332122302397134, 0.000000000000000, --1.659487472408966, 0.000000000000000, -1.865943507877961, 0.000000000000000, -0.186775297569864, 0.000000000000000, -1.700543850628361, 0.000000000000000, -0.497157959366735, 0.000000000000000, -0.471244843957418, 0.000000000000000, -0.432013753969948, 0.000000000000000, -4.000189880113231, 0.000000000000000, --0.415335170016467, 0.000000000000000, 0.317311950972859, 0.000000000000000, 0.038393428927595, 0.000000000000000, 0.177219909465206, 0.000000000000000, -0.531650958095143, 0.000000000000000, -2.711644985175806, 0.000000000000000, 0.328744077805156, 0.000000000000000, -0.938417707547928, 0.000000000000000, -0.970379584897379, 0.000000000000000, 1.873649473917137, 0.000000000000000, 0.177938226987023, 0.000000000000000, 0.155609346302393, 0.000000000000000, --1.276504241867208, 0.000000000000000, -0.463725075928807, 0.000000000000000, -0.064748250389500, 0.000000000000000, -1.725568534062385, 0.000000000000000, --0.139066584804067, 0.000000000000000, 1.975514554117767, 0.000000000000000, -0.807063199499478, 0.000000000000000, -0.326926659682788, 0.000000000000000, -1.445727032487938, 0.000000000000000, -0.597151107739100, 0.000000000000000, 2.732557531709386, 0.000000000000000, -2.907130934109188, 0.000000000000000, --1.461264832679981, 0.000000000000000, -1.708588604968163, 0.000000000000000, 3.652851925431363, 0.000000000000000, 0.682050868282879, 0.000000000000000, --0.281312579963294, 0.000000000000000, 0.554966483307825, 0.000000000000000, -0.981341739340932, 0.000000000000000, 1.279543331141603, 0.000000000000000, -0.036589747826856, 0.000000000000000, 2.312073745896073, 0.000000000000000, 1.754682200732425, 0.000000000000000, -0.957515875428627, 0.000000000000000, --0.833596942819695, 0.000000000000000, 0.437054368791033, 0.000000000000000, -0.898819399360279, 0.000000000000000, -0.296050580896839, 0.000000000000000, --0.785144257649601, 0.000000000000000, -2.541503089003311, 0.000000000000000, 2.225075846758761, 0.000000000000000, -1.587290487902002, 0.000000000000000, --1.421404172056462, 0.000000000000000, -3.015149802293631, 0.000000000000000, 1.780874288867949, 0.000000000000000, -0.865812740882613, 0.000000000000000, --2.845327531197112, 0.000000000000000, 1.445225867774367, 0.000000000000000, 2.183733236584647, 0.000000000000000, 1.163371072749080, 0.000000000000000, -0.883547693520409, 0.000000000000000, -1.224093106684675, 0.000000000000000, -1.854501116331044, 0.000000000000000, 1.783082089255796, 0.000000000000000, -2.301508706196191, 0.000000000000000, -0.539901944139077, 0.000000000000000, 1.962315832319967, 0.000000000000000, -0.060709041870503, 0.000000000000000, --1.353139923300238, 0.000000000000000, -1.482887537805234, 0.000000000000000, 1.273732601967176, 0.000000000000000, -3.456609915556321, 0.000000000000000, --3.752320586540873, 0.000000000000000, 3.536356614978951, 0.000000000000000, 0.206035952043233, 0.000000000000000, 5.933966913773842, 0.000000000000000, --0.486633898075490, 0.000000000000000, -0.329595089863342, 0.000000000000000, 1.496414153905337, 0.000000000000000, 0.137868749388880, 0.000000000000000, --0.437192030996792, 0.000000000000000, 2.682750615210656, 0.000000000000000, -2.440234892848570, 0.000000000000000, 1.433910252426186, 0.000000000000000, --0.415051506104074, 0.000000000000000, 1.982003013708649, 0.000000000000000, 1.345796609972435, 0.000000000000000, -2.335949513404370, 0.000000000000000, -1.065988867433025, 0.000000000000000, 2.741844905000464, 0.000000000000000, -1.754047930934362, 0.000000000000000, 0.229252730015575, 0.000000000000000, --0.679791016408669, 0.000000000000000, -2.274097820043743, 0.000000000000000, 0.149802252231876, 0.000000000000000, -0.139697151364830, 0.000000000000000, --2.773367420505435, 0.000000000000000, -4.403400246165611, 0.000000000000000, -1.468974515184135, 0.000000000000000, 0.664990623095844, 0.000000000000000, --3.446979775557143, 0.000000000000000, 1.850006428987618, 0.000000000000000, -1.550866747921936, 0.000000000000000, -3.632874882935257, 0.000000000000000, -0.828039662992464, 0.000000000000000, 2.794055182632816, 0.000000000000000, -0.593995716682633, 0.000000000000000, 0.142788156054200, 0.000000000000000, -0.552461945119668, 0.000000000000000, 0.842127129738758, 0.000000000000000, 1.414335509600077, 0.000000000000000, -0.311559241382430, 0.000000000000000, -1.510590844695250, 0.000000000000000, 1.692217183824300, 0.000000000000000, 0.613760285711957, 0.000000000000000, 0.065233463207770, 0.000000000000000, --2.571912893711505, 0.000000000000000, -1.707001531141341, 0.000000000000000, 0.673884968382041, 0.000000000000000, 0.889863883420103, 0.000000000000000, --2.395635435233346, 0.000000000000000, 1.129247296359819, 0.000000000000000, 0.569074704779735, 0.000000000000000, 6.139436017480722, 0.000000000000000, -0.822158309259017, 0.000000000000000, -3.289872016222589, 0.000000000000000, 0.417612988384414, 0.000000000000000, 1.493982103868165, 0.000000000000000, --0.415353391377005, 0.000000000000000, 0.288670764933155, 0.000000000000000, -1.895650228872272, 0.000000000000000, -0.139631694475020, 0.000000000000000, -1.445103299005436, 0.000000000000000, 2.877182243683429, 0.000000000000000, 1.192428490172580, 0.000000000000000, -5.964591921763842, 0.000000000000000, -0.570859795882959, 0.000000000000000, 2.328333316356666, 0.000000000000000, 0.333755014930026, 0.000000000000000, 1.221901577771909, 0.000000000000000, -0.943358697415568, 0.000000000000000, 2.793063983613067, 0.000000000000000, 3.163005066073616, 0.000000000000000, 2.098300664513867, 0.000000000000000, --3.915313164333447, 0.000000000000000, -2.475766769064539, 0.000000000000000, 1.720472044894277, 0.000000000000000, -1.273591949275665, 0.000000000000000, --1.213451272938616, 0.000000000000000, 0.697439404325690, 0.000000000000000, -0.309902287574293, 0.000000000000000, 2.622575852162781, 0.000000000000000, --2.075881936219060, 0.000000000000000, 0.777847545691770, 0.000000000000000, -3.967947986440650, 0.000000000000000, -3.066503371806472, 0.000000000000000, -1.193780625937845, 0.000000000000000, 0.214246579281311, 0.000000000000000, -2.610681491162162, 0.000000000000000, -1.261224183972745, 0.000000000000000, --1.165071748544285, 0.000000000000000, -1.116548474834374, 0.000000000000000, 0.847202164846982, 0.000000000000000, -3.474301529532390, 0.000000000000000, -0.020799541946476, 0.000000000000000, -3.868995473288166, 0.000000000000000, 1.757979409638067, 0.000000000000000, 0.868115130183109, 0.000000000000000, -0.910167436737958, 0.000000000000000, -1.878855115563720, 0.000000000000000, 1.710357104174161, 0.000000000000000, -1.468933980990902, 0.000000000000000, -1.799544171601169, 0.000000000000000, -4.922332880027887, 0.000000000000000, 0.219424548939720, 0.000000000000000, -0.971671113451924, 0.000000000000000, --0.940533475616266, 0.000000000000000, 0.122510114412152, 0.000000000000000, -1.373686254916911, 0.000000000000000, 1.760348103896323, 0.000000000000000, -0.391745067829643, 0.000000000000000, 2.521958505327354, 0.000000000000000, -1.300693516405092, 0.000000000000000, -0.538251788309178, 0.000000000000000, -0.797184135810173, 0.000000000000000, 2.908800548982588, 0.000000000000000, 1.590902251655215, 0.000000000000000, -1.070323714487264, 0.000000000000000, --3.349764443340999, 0.000000000000000, -1.190563529731447, 0.000000000000000, 1.363369471291963, 0.000000000000000, -1.814270299924576, 0.000000000000000, --0.023381588315711, 0.000000000000000, 1.719182048679569, 0.000000000000000, 0.839917213252626, 0.000000000000000, 1.006099633839122, 0.000000000000000, -0.812462674381527, 0.000000000000000, 1.755814336346739, 0.000000000000000, 2.546848681206319, 0.000000000000000, -1.555300208869455, 0.000000000000000, -1.017053811631167, 0.000000000000000, 0.996591039170903, 0.000000000000000, -1.228047247924881, 0.000000000000000, 4.809462271463009, 0.000000000000000, -2.318113116151685, 0.000000000000000, -1.206932520679733, 0.000000000000000, 1.273757685623312, 0.000000000000000, 0.724335352481802, 0.000000000000000, -1.519876652073198, 0.000000000000000, -2.749670314714158, 0.000000000000000, 3.424042481847581, 0.000000000000000, -3.714668360421517, 0.000000000000000, -1.612834197004014, 0.000000000000000, -2.038234723985566, 0.000000000000000, 1.470938786562152, 0.000000000000000, 2.111634918450302, 0.000000000000000, -1.030376670151787, 0.000000000000000, -0.420877189003829, 0.000000000000000, -1.502024800532894, 0.000000000000000, 0.452310749163804, 0.000000000000000, --1.606059382300987, 0.000000000000000, -4.006159967834147, 0.000000000000000, -2.152801208196508, 0.000000000000000, 1.671674089372579, 0.000000000000000, -1.714536333564101, 0.000000000000000, -1.011518543005344, 0.000000000000000, -0.576410282180584, 0.000000000000000, 0.733689809480836, 0.000000000000000, -1.004245602717974, 0.000000000000000, 1.010090391888449, 0.000000000000000, 3.811459513385621, 0.000000000000000, -5.230621089271954, 0.000000000000000, -0.678044861034399, 0.000000000000000, 1.255935859598107, 0.000000000000000, 1.674521701615288, 0.000000000000000, -1.656695216761705, 0.000000000000000, -1.169286028869693, 0.000000000000000, 0.524915416191998, 0.000000000000000, 2.397642885039520, 0.000000000000000, 2.108711400616072, 0.000000000000000, -2.037618211018084, 0.000000000000000, -0.623664553406925, 0.000000000000000, 2.984106170984409, 0.000000000000000, 1.132182737400932, 0.000000000000000, --2.859274340352130, 0.000000000000000, -0.975550071398723, 0.000000000000000, -1.359935119997407, 0.000000000000000, -2.963308211050121, 0.000000000000000, --0.228726662781163, 0.000000000000000, -1.411110379682043, 0.000000000000000, 0.741553355734225, 0.000000000000000, 0.497554254758309, 0.000000000000000, -2.371907950598855, 0.000000000000000, 1.063465168988748, 0.000000000000000, -0.641082692081488, 0.000000000000000, -0.855439878540726, 0.000000000000000, -0.578321738578726, 0.000000000000000, 3.005809768796194, 0.000000000000000, 1.961458699064065, 0.000000000000000, -3.206261663772745, 0.000000000000000, --0.364431989095434, 0.000000000000000, -0.263182496622273, 0.000000000000000, 1.843464680631139, 0.000000000000000, -0.419107530229249, 0.000000000000000, -1.662335873298487, 0.000000000000000, -0.853687563304005, 0.000000000000000, -2.584133404357169, 0.000000000000000, 3.466839568922895, 0.000000000000000, -0.881671345091973, 0.000000000000000, 0.454620014206908, 0.000000000000000, -1.737245187402739, 0.000000000000000, 2.162713238369243, 0.000000000000000, --3.868539002714486, 0.000000000000000, 2.014114855933826, 0.000000000000000, -0.703233831811006, 0.000000000000000, -3.410319935997574, 0.000000000000000, --1.851235811006584, 0.000000000000000, 0.909783907894036, 0.000000000000000, 0.091884002136728, 0.000000000000000, -2.688294201131650, 0.000000000000000, --0.906134178460955, 0.000000000000000, 3.475054609035133, 0.000000000000000, -0.573927964170323, 0.000000000000000, -0.429542937515399, 0.000000000000000, -0.991348618739939, 0.000000000000000, 1.974804904926325, 0.000000000000000, 0.975783450796698, 0.000000000000000, -3.057119549071503, 0.000000000000000, --3.899429237481194, 0.000000000000000, 0.362439009175350, 0.000000000000000, -1.124461670265618, 0.000000000000000, 1.806000360163583, 0.000000000000000, --2.768333362600288, 0.000000000000000, 0.244387897900379, 0.000000000000000, 0.908767296720926, 0.000000000000000, 1.254669374391882, 0.000000000000000, --1.420441929463686, 0.000000000000000, -0.875658895966293, 0.000000000000000, 0.183824603376167, 0.000000000000000, -3.361653917011686, 0.000000000000000, --0.796615630227952, 0.000000000000000, -1.660226542658673, 0.000000000000000, 1.654439358307226, 0.000000000000000, 2.782812946709771, 0.000000000000000, -1.418064412811531, 0.000000000000000, -0.819645647243761, 0.000000000000000, 0.807724772592699, 0.000000000000000, -0.941967976379298, 0.000000000000000, --2.312768306047469, 0.000000000000000, 0.872426936477443, 0.000000000000000, 0.919528961530845, 0.000000000000000, -2.084904575264847, 0.000000000000000, --1.972464868459322, 0.000000000000000, -1.050687203338466, 0.000000000000000, 1.659579707007902, 0.000000000000000, -1.820640014705855, 0.000000000000000, --1.195078061671045, 0.000000000000000, -1.639773173762048, 0.000000000000000, 1.616744338157063, 0.000000000000000, 4.019216096811563, 0.000000000000000, -3.461021102549681, 0.000000000000000, 1.642352734361484, 0.000000000000000, -0.046354693720813, 0.000000000000000, -0.041936252359677, 0.000000000000000, --2.393307519480551, 0.000000000000000, -0.341471634615121, 0.000000000000000, -0.392073595257017, 0.000000000000000, -0.219299018372730, 0.000000000000000, --2.016391579662071, 0.000000000000000, -0.653096251969787, 0.000000000000000, 1.466353155666821, 0.000000000000000, -2.872058864320412, 0.000000000000000, --2.157180779503830, 0.000000000000000, 0.723257479841560, 0.000000000000000, 3.769951308104384, 0.000000000000000, -1.923392042420024, 0.000000000000000, -0.644899359942840, 0.000000000000000, -2.090226891621437, 0.000000000000000, -0.277043982890403, 0.000000000000000, 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0.000000000000000, -4.192139262163992, 0.000000000000000, 3.023496047962126, 0.000000000000000, 1.149775163736637, 0.000000000000000, -2.038151304801731, 0.000000000000000, 3.016122489841263, 0.000000000000000, -4.829481812137012, 0.000000000000000, -1.668436615909279, 0.000000000000000, -0.958586784636918, 0.000000000000000, 1.550652410058678, 0.000000000000000, -1.456305257976716, 0.000000000000000, -0.079588392344731, 0.000000000000000, --2.453213599392345, 0.000000000000000, 0.296795909127105, 0.000000000000000, -0.253426616607643, 0.000000000000000, 1.418937160028195, 0.000000000000000, --1.672949529066915, 0.000000000000000, -1.620990298572947, 0.000000000000000, -1.085103073196045, 0.000000000000000, 0.738606361195386, 0.000000000000000, --2.097831202853255, 0.000000000000000, 2.711952282071310, 0.000000000000000, 1.498539238246888, 0.000000000000000, 1.317457282535915, 0.000000000000000, --0.302765938349717, 0.000000000000000, -0.044623707947201, 0.000000000000000, 2.337405215062395, 0.000000000000000, -3.980689173859100, 0.000000000000000, - - -}; - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/arm_fft_bin_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/arm_fft_bin_example_f32.c deleted file mode 100644 index ff4fd0f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fft_bin_example/arm_fft_bin_example_f32.c +++ /dev/null @@ -1,167 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_fft_bin_example_f32.c -* -* Description: Example code demonstrating calculation of Max energy bin of -* frequency domain of input signal. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup FrequencyBin Frequency Bin Example - * - * \par Description - * \par - * Demonstrates the calculation of the maximum energy bin in the frequency - * domain of the input signal with the use of Complex FFT, Complex - * Magnitude, and Maximum functions. - * - * \par Algorithm: - * \par - * The input test signal contains a 10 kHz signal with uniformly distributed white noise. - * Calculating the FFT of the input signal will give us the maximum energy of the - * bin corresponding to the input frequency of 10 kHz. - * - * \par Block Diagram: - * \image html FFTBin.gif "Block Diagram" - * \par - * The figure below shows the time domain signal of 10 kHz signal with - * uniformly distributed white noise, and the next figure shows the input - * in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal. - * \par - * \image html FFTBinInput.gif "Input signal in Time domain" - * \image html FFTBinOutput.gif "Input signal in Frequency domain" - * - * \par Variables Description: - * \par - * \li \c testInput_f32_10khz points to the input data - * \li \c testOutput points to the output data - * \li \c fftSize length of FFT - * \li \c ifftFlag flag for the selection of CFFT/CIFFT - * \li \c doBitReverse Flag for selection of normal order or bit reversed order - * \li \c refIndex reference index value at which maximum energy of bin ocuurs - * \li \c testIndex calculated index value at which maximum energy of bin ocuurs - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_cfft_f32() - * - arm_cmplx_mag_f32() - * - arm_max_f32() - * - * Refer - * \link arm_fft_bin_example_f32.c \endlink - * - */ - - -/** \example arm_fft_bin_example_f32.c - */ - - -#include "arm_math.h" -#include "arm_const_structs.h" - -#if defined(SEMIHOSTING) -#include -#endif - -#define TEST_LENGTH_SAMPLES 2048 - -/* ------------------------------------------------------------------- -* External Input and Output buffer Declarations for FFT Bin Example -* ------------------------------------------------------------------- */ -extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES]; -static float32_t testOutput[TEST_LENGTH_SAMPLES/2]; - -/* ------------------------------------------------------------------ -* Global variables for FFT Bin Example -* ------------------------------------------------------------------- */ -uint32_t fftSize = 1024; -uint32_t ifftFlag = 0; -uint32_t doBitReverse = 1; -arm_cfft_instance_f32 varInstCfftF32; - -/* Reference index at which max energy of bin ocuurs */ -uint32_t refIndex = 213, testIndex = 0; - -/* ---------------------------------------------------------------------- -* Max magnitude FFT Bin test -* ------------------------------------------------------------------- */ - -int32_t main(void) -{ - - arm_status status; - float32_t maxValue; - - status = ARM_MATH_SUCCESS; - - status=arm_cfft_init_f32(&varInstCfftF32,fftSize); - - /* Process the data through the CFFT/CIFFT module */ - arm_cfft_f32(&varInstCfftF32, testInput_f32_10khz, ifftFlag, doBitReverse); - - /* Process the data through the Complex Magnitude Module for - calculating the magnitude at each bin */ - arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, fftSize); - - /* Calculates maxValue and returns corresponding BIN value */ - arm_max_f32(testOutput, fftSize, &maxValue, &testIndex); - - status = (testIndex != refIndex) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS; - - if (status != ARM_MATH_SUCCESS) - { -#if defined (SEMIHOSTING) - printf("FAILURE\n"); -#else - while (1); /* main function does not return */ -#endif - } - else - { -#if defined (SEMIHOSTING) - printf("SUCCESS\n"); -#else - while (1); /* main function does not return */ -#endif - } -} - - /** \endlink */ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/Abstract.txt deleted file mode 100644 index ea255bc..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_fir_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/CMakeLists.txt deleted file mode 100644 index b6a794c..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_fir_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_fir_example) - - -include(config) -configApp(arm_fir_example ${ROOT}) - -target_sources(arm_fir_example PRIVATE arm_fir_data.c math_helper.c arm_fir_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_fir_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/arm_fir_data.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/arm_fir_data.c deleted file mode 100644 index 3a95fc5..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/arm_fir_data.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_fir_data.c -* -* Description: Data file used for example code -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/* ---------------------------------------------------------------------- -** Test input signal contains 1000Hz + 15000 Hz -** ------------------------------------------------------------------- */ - -float32_t testInput_f32_1kHz_15kHz[320] = -{ -+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, -+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, -+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, --0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, --0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, --0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, -+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, -+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, -+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, -+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, --0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, --0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, -+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, -+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, -+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, -+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, --0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, --0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, --0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, -+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, -+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, --0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, --0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, --0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, -+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, -+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, -+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, -+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, --0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, --0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, --0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, -+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, -+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, -+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, --0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, --0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, --0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, -+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, -+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, -+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -}; - -float32_t refOutput[320] = -{ -+0.0000000000f, -0.0010797829f, -0.0007681386f, -0.0001982932f, +0.0000644313f, +0.0020854271f, +0.0036891871f, +0.0015855941f, --0.0026280805f, -0.0075907658f, -0.0119390538f, -0.0086665968f, +0.0088981202f, +0.0430539279f, +0.0974468742f, +0.1740405600f, -+0.2681416601f, +0.3747720089f, +0.4893362230f, +0.6024154672f, +0.7058740791f, +0.7968348987f, +0.8715901940f, +0.9277881093f, -+0.9682182661f, +0.9934674267f, +1.0012052245f, +0.9925859371f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, -+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, --0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, --0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, --0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, -+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, -+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, -+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, --0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, --0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, --0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, -+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, -+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, -+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, --0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, --0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, --0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, -+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, -+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, -+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, --0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, --0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, --0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, -+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, -+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, -+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, --0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, --0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, --0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, -0.0000000000f, +0.1309866321f, -+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, -+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, -+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, --0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, --0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, --0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, -+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, -+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f -}; - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/arm_fir_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/arm_fir_example_f32.c deleted file mode 100644 index 0978dc1..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/arm_fir_example_f32.c +++ /dev/null @@ -1,262 +0,0 @@ -/* ---------------------------------------------------------------------- - * Copyright (C) 2010-2012 ARM Limited. All rights reserved. - * -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library - * Title: arm_fir_example_f32.c - * - * Description: Example code demonstrating how an FIR filter can be used - * as a low pass filter. - * - * Target Processor: Cortex-M4/Cortex-M3 - * -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup FIRLPF FIR Lowpass Filter Example - * - * \par Description: - * \par - * Removes high frequency signal components from the input using an FIR lowpass filter. - * The example demonstrates how to configure an FIR filter and then pass data through - * it in a block-by-block fashion. - * \image html FIRLPF_signalflow.gif - * - * \par Algorithm: - * \par - * The input signal is a sum of two sine waves: 1 kHz and 15 kHz. - * This is processed by an FIR lowpass filter with cutoff frequency 6 kHz. - * The lowpass filter eliminates the 15 kHz signal leaving only the 1 kHz sine wave at the output. - * \par - * The lowpass filter was designed using MATLAB with a sample rate of 48 kHz and - * a length of 29 points. - * The MATLAB code to generate the filter coefficients is shown below: - * 
- *     h = fir1(28, 6/24);
- *
- * The first argument is the "order" of the filter and is always one less than the desired length. - * The second argument is the normalized cutoff frequency. This is in the range 0 (DC) to 1.0 (Nyquist). - * A 6 kHz cutoff with a Nyquist frequency of 24 kHz lies at a normalized frequency of 6/24 = 0.25. - * The CMSIS FIR filter function requires the coefficients to be in time reversed order. - * 
- *     fliplr(h)
- *
- * The resulting filter coefficients and are shown below. - * Note that the filter is symmetric (a property of linear phase FIR filters) - * and the point of symmetry is sample 14. Thus the filter will have a delay of - * 14 samples for all frequencies. - * \par - * \image html FIRLPF_coeffs.gif - * \par - * The frequency response of the filter is shown next. - * The passband gain of the filter is 1.0 and it reaches 0.5 at the cutoff frequency 6 kHz. - * \par - * \image html FIRLPF_response.gif - * \par - * The input signal is shown below. - * The left hand side shows the signal in the time domain while the right hand side is a frequency domain representation. - * The two sine wave components can be clearly seen. - * \par - * \image html FIRLPF_input.gif - * \par - * The output of the filter is shown below. The 15 kHz component has been eliminated. - * \par - * \image html FIRLPF_output.gif - * - * \par Variables Description: - * \par - * \li \c testInput_f32_1kHz_15kHz points to the input data - * \li \c refOutput points to the reference output data - * \li \c testOutput points to the test output data - * \li \c firStateF32 points to state buffer - * \li \c firCoeffs32 points to coefficient buffer - * \li \c blockSize number of samples processed at a time - * \li \c numBlocks number of frames - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_fir_init_f32() - * - arm_fir_f32() - * - * Refer - * \link arm_fir_example_f32.c \endlink - * - */ - - -/** \example arm_fir_example_f32.c - */ - -/* ---------------------------------------------------------------------- -** Include Files -** ------------------------------------------------------------------- */ - -#include "arm_math.h" -#include "math_helper.h" - -#if defined(SEMIHOSTING) -#include -#endif - - -/* ---------------------------------------------------------------------- -** Macro Defines -** ------------------------------------------------------------------- */ - -#define TEST_LENGTH_SAMPLES 320 -/* - -This SNR is a bit small. Need to understand why -this example is not giving better SNR ... - -*/ -#define SNR_THRESHOLD_F32 75.0f -#define BLOCK_SIZE 32 - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -/* Must be a multiple of 16 */ -#define NUM_TAPS_ARRAY_SIZE 32 -#else -#define NUM_TAPS_ARRAY_SIZE 29 -#endif - -#define NUM_TAPS 29 - -/* ------------------------------------------------------------------- - * The input signal and reference output (computed with MATLAB) - * are defined externally in arm_fir_lpf_data.c. - * ------------------------------------------------------------------- */ - -extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES]; -extern float32_t refOutput[TEST_LENGTH_SAMPLES]; - -/* ------------------------------------------------------------------- - * Declare Test output buffer - * ------------------------------------------------------------------- */ - -static float32_t testOutput[TEST_LENGTH_SAMPLES]; - -/* ------------------------------------------------------------------- - * Declare State buffer of size (numTaps + blockSize - 1) - * ------------------------------------------------------------------- */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -static float32_t firStateF32[2 * BLOCK_SIZE + NUM_TAPS - 1]; -#else -static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1]; -#endif - -/* ---------------------------------------------------------------------- -** FIR Coefficients buffer generated using fir1() MATLAB function. -** fir1(28, 6/24) -** ------------------------------------------------------------------- */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -const float32_t firCoeffs32[NUM_TAPS_ARRAY_SIZE] = { - -0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f, - -0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f, - +0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f, - +0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f, 0.0f,0.0f,0.0f -}; -#else -const float32_t firCoeffs32[NUM_TAPS_ARRAY_SIZE] = { - -0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f, - -0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f, - +0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f, - +0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f -}; -#endif - -/* ------------------------------------------------------------------ - * Global variables for FIR LPF Example - * ------------------------------------------------------------------- */ - -uint32_t blockSize = BLOCK_SIZE; -uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE; - -float32_t snr; - -/* ---------------------------------------------------------------------- - * FIR LPF Example - * ------------------------------------------------------------------- */ - -int32_t main(void) -{ - uint32_t i; - arm_fir_instance_f32 S; - arm_status status; - float32_t *inputF32, *outputF32; - - /* Initialize input and output buffer pointers */ - inputF32 = &testInput_f32_1kHz_15kHz[0]; - outputF32 = &testOutput[0]; - - /* Call FIR init function to initialize the instance structure. */ - arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize); - - /* ---------------------------------------------------------------------- - ** Call the FIR process function for every blockSize samples - ** ------------------------------------------------------------------- */ - - for(i=0; i < numBlocks; i++) - { - arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize); - } - - /* ---------------------------------------------------------------------- - ** Compare the generated output against the reference output computed - ** in MATLAB. - ** ------------------------------------------------------------------- */ - - snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES); - - status = (snr < SNR_THRESHOLD_F32) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS; - - if (status != ARM_MATH_SUCCESS) - { -#if defined (SEMIHOSTING) - printf("FAILURE\n"); -#else - while (1); /* main function does not return */ -#endif - } - else - { -#if defined (SEMIHOSTING) - printf("SUCCESS\n"); -#else - while (1); /* main function does not return */ -#endif - } -} - -/** \endlink */ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/math_helper.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/math_helper.c deleted file mode 100644 index bcc7a05..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/math_helper.c +++ /dev/null @@ -1,474 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 b -* -* Project: CMSIS DSP Library -* -* Title: math_helper.c -* -* Description: Definition of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/* ---------------------------------------------------------------------- -* Include standard header files -* -------------------------------------------------------------------- */ -#include - -/* ---------------------------------------------------------------------- -* Include project header files -* -------------------------------------------------------------------- */ -#include "math_helper.h" - -/** - * @brief Caluclation of SNR - * @param[in] pRef Pointer to the reference buffer - * @param[in] pTest Pointer to the test buffer - * @param[in] buffSize total number of samples - * @return SNR - * The function Caluclates signal to noise ratio for the reference output - * and test output - */ - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) -{ - float EnergySignal = 0.0, EnergyError = 0.0; - uint32_t i; - float SNR; - int temp; - int *test; - - for (i = 0; i < buffSize; i++) - { - /* Checking for a NAN value in pRef array */ - test = (int *)(&pRef[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - /* Checking for a NAN value in pTest array */ - test = (int *)(&pTest[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - EnergySignal += pRef[i] * pRef[i]; - EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); - } - - /* Checking for a NAN value in EnergyError */ - test = (int *)(&EnergyError); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - - SNR = 10 * log10 (EnergySignal / EnergyError); - - return (SNR); - -} - - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Converts float to fixed in q12.20 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to outputbuffer - * @param[in] numSamples number of samples in the input buffer - * @return none - * The function converts floating point values to fixed point(q12.20) values - */ - -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1048576.0f corresponds to pow(2, 20) */ - pOut[i] = (q31_t) (pIn[i] * 1048576.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 1.0) - { - pOut[i] = 0x000FFFFF; - } - } -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q31 (q31_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q7 (q7_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - - - -/** - * @brief Caluclates number of guard bits - * @param[in] num_adds number of additions - * @return guard bits - * The function Caluclates the number of guard bits - * depending on the numtaps - */ - -uint32_t arm_calc_guard_bits (uint32_t num_adds) -{ - uint32_t i = 1, j = 0; - - if (num_adds == 1) - { - return (0); - } - - while (i < num_adds) - { - i = i * 2; - j++; - } - - return (j); -} - -/** - * @brief Apply guard bits to buffer - * @param[in,out] pIn pointer to input buffer - * @param[in] numSamples number of samples in the input buffer - * @param[in] guard_bits guard bits - * @return none - */ - -void arm_apply_guard_bits (float32_t *pIn, - uint32_t numSamples, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); - } -} - -/** - * @brief Calculates pow(2, numShifts) - * @param[in] numShifts number of shifts - * @return pow(2, numShifts) - */ -uint32_t arm_calc_2pow(uint32_t numShifts) -{ - - uint32_t i, val = 1; - - for (i = 0; i < numShifts; i++) - { - val = val * 2; - } - - return(val); -} - - - -/** - * @brief Converts float to fixed q14 - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 16384.0f corresponds to pow(2, 14) */ - pOut[i] = (q15_t) (pIn[i] * 16384.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFF; - } - - } - -} - - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 536870912.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 4.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - - -/** - * @brief Converts float to fixed q28 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 268435456.0f corresponds to pow(2, 28) */ - pOut[i] = (q31_t) (pIn[i] * 268435456.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 8.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - - -/* - -Conflicting with the new clip functions in CMSIS-DSP and not used -in the examples. - -*/ -#if 0 -/** - * @brief Clip the float values to +/- 1 - * @param[in,out] pIn input buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_clip_f32 (float *pIn, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - if (pIn[i] > 1.0f) - { - pIn[i] = 1.0; - } - else if ( pIn[i] < -1.0f) - { - pIn[i] = -1.0; - } - - } -} - -#endif - - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/math_helper.h b/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/math_helper.h deleted file mode 100644 index b35feb8..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/math_helper.h +++ /dev/null @@ -1,62 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2013 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* -* Title: math_helper.h -* -* Description: Prototypes of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -#ifndef MATH_HELPER_H -#define MATH_HELPER_H - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize); -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); -void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); -void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_guard_bits(uint32_t num_adds); -void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_2pow(uint32_t guard_bits); -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/Abstract.txt deleted file mode 100644 index 6379ed8..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_graphic_equalizer_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/CMakeLists.txt deleted file mode 100644 index e5d756f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_graphic_equalizer_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_graphic_equalizer_example) - - -include(config) -configApp(arm_graphic_equalizer_example ${ROOT}) - -target_sources(arm_graphic_equalizer_example PRIVATE math_helper.c arm_graphic_equalizer_data.c arm_graphic_equalizer_example_q31.c) - -### Sources and libs - -target_link_libraries(arm_graphic_equalizer_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_data.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_data.c deleted file mode 100644 index b6ab8c9..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_data.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_graphic_equalizer_data.c -* -* Description: Data file used for example code -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -#include "arm_math.h" - -float32_t testRefOutput_f32[320] = { - -0.000000000000000000, 0.001898396760225296, 0.004215449094772339, 0.007432077080011368, 0.010948467999696732, 0.015026375651359558, 0.019191544502973557, 0.023574527353048325, -0.027919445186853409, 0.032277785241603851, 0.036551639437675476, 0.040732793509960175, 0.044799156486988068, 0.048710610717535019, 0.052476800978183746, 0.056059073656797409, -0.059482168406248093, 0.062726479023694992, 0.065821025520563126, 0.068763464689254761, 0.071577839553356171, 0.074270240962505341, 0.076856281608343124, 0.079344697296619415, -0.081745062023401260, 0.084067162126302719, 0.086318407207727432, 0.088509257882833481, 0.090647127479314804, 0.092742368578910828, 0.094802625477313995, 0.096837285906076431, -0.098853722214698792, 0.100859899073839190, 0.102862443774938580, 0.104867763817310330, 0.106881409883499150, 0.108908228576183320, 0.110952425748109820, 0.113017357885837550, -0.115105822682380680, 0.117219865322113040, 0.119361080229282380, 0.121530555188655850, 0.123729091137647630, 0.125957202166318890, 0.128215309232473370, 0.130503740161657330, -0.132822841405868530, 0.135173004120588300, 0.137554679065942760, 0.139968376606702800, 0.142414685338735580, 0.144894234836101530, 0.147407654672861100, 0.149955596774816510, -0.152538605034351350, 0.155157200992107390, 0.157811731100082400, 0.160502441227436070, 0.163229387253522870, 0.165992442518472670, 0.168791320174932480, 0.171625509858131410, -0.174494370818138120, 0.177397061139345170, 0.180332608520984650, 0.183299910277128220, 0.186297744512557980, 0.189324837177991870, 0.192379791289567950, 0.195461250841617580, -0.198567759245634080, 0.201697919517755510, 0.204850304871797560, 0.208023533225059510, 0.211216274648904800, 0.214427210390567780, 0.217655111104249950, 0.220898788422346120, -0.224157124757766720, 0.227429077029228210, 0.230713658034801480, 0.234009962528944020, 0.237317133694887160, 0.240634419023990630, 0.243961080908775330, 0.247296508401632310, -0.250640105456113820, 0.253991369158029560, 0.257349837571382520, 0.260715119540691380, 0.264086868613958360, 0.267464816570281980, 0.270848698914051060, 0.274238351732492450, -0.277633611112833020, 0.281034380197525020, 0.284440591931343080, 0.287852220237255100, 0.291269283741712570, 0.294691801071166990, 0.298119872808456420, 0.301553562283515930, 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0.645930647850036620, 0.649908289313316350, 0.653883971273899080, 0.657857488840818410, 0.661828581243753430, 0.665797054767608640, -0.669762641191482540, 0.673725124448537830, 0.677684243768453600, 0.681639779359102250, 0.685591462999582290, 0.689539063721895220, 0.693482317030429840, 0.697420965880155560, -0.701354760676622390, 0.705283410847187040, 0.709206689149141310, 0.713124278932809830, 0.717035952955484390, 0.720941375941038130, 0.724840316921472550, 0.728732451796531680, -0.732617516070604320, 0.736495196819305420, 0.740365199744701390, 0.744227230548858640, 0.748080968856811520, 0.751926124095916750, 0.755762357264757160, 0.759589381515979770, -0.763406842947006230, 0.767214450985193250, 0.771011855453252790, 0.774798732250928880, 0.778574761003255840, 0.782339565455913540, 0.786092851310968400, 0.789834223687648770, -0.793563373386859890, 0.797279909253120420, 0.800983514636754990, 0.804673787206411360, 0.808350402861833570, 0.812012966722249980, 0.815661124885082240, 0.819294504821300510, -0.822912722826004030, 0.826515413820743560, 0.830102190375328060, 0.833672653883695600, 0.837226435542106630, 0.840763118118047710, 0.844282336533069610, 0.847783654928207400, -0.851266715675592420, 0.854731071740388870, 0.858176350593566890, 0.861602116376161580, 0.865007970482110980, 0.868393491953611370, 0.871758259832859040, 0.875101849436759950, -0.878423850983381270, 0.881723806262016300, 0.885001312941312790, 0.888255912810564040, 0.891487173736095430, 0.894694659858942030, 0.897877920418977740, 0.901036512106657030, -0.904169965535402300, 0.907277844846248630, 0.910359673202037810, 0.913415014743804930, 0.916443370282649990, 0.919444311410188670, 0.922417331486940380, 0.925361987203359600, -0.928277771919965740, 0.931164238601922990, 0.934020876884460450, 0.936847217381000520, 0.939642757177352910, 0.942407000809907910, 0.945139460265636440, 0.947839632630348210, -0.950507018715143200, 0.953141096979379650, 0.955741371959447860, 0.958307322114706040, 0.960838429629802700, 0.963334184139966960, 0.965794049203395840, 0.968217510730028150, -0.970604017376899720, 0.972953058779239650, 0.975264083594083790, 0.977536566555500030, 0.979769956320524220, 0.981963708996772770, 0.984117280691862110, 0.986230112612247470, -0.988301653414964680, 0.990331344306468960, 0.992318630218505860, 0.994262944906950000, 0.996163722127676010, 0.998020399361848830, 0.999832402914762500, 1.001599155366420700, -1.003320086747407900, 1.004994612187147100, 1.006622135639190700, 1.008202098309993700, 1.009733878076076500, 1.011216927319765100, 1.012650609016418500, 1.014034371823072400, -1.015367589890956900, 1.016649682074785200, 1.017880033701658200, 1.019058048725128200, 1.020183108747005500, 1.021254621446132700, 1.022271949797868700, 1.023234523832798000, - -}; -/* ---------------------------------------------------------------------- -** Test input - logarithmic chirp signal -** ------------------------------------------------------------------- */ - -float32_t testInput_f32[320] = - { - 0.000000000000000061, 0.002622410992047861, 0.005253663973466970, 0.007893770384930297, 0.010542741395035495, 0.013200587895525877, 0.015867320496454066, 0.018542949521290073, -0.021227485001971542, 0.023920936673895138, 0.026623313970853074, 0.029334626019908643, 0.032054881636210709, 0.034784089317753723, 0.037522257240071598, 0.040269393250875855, -0.043025504864628375, 0.045790599257054837, 0.048564683259595690, 0.051347763353792118, 0.054139845665610427, 0.056940935959702531, 0.059751039633601337, 0.062570161711849828, -0.065398306840066575, 0.068235479278943648, 0.071081682898178900, 0.073936921170339814, 0.076801197164660218, 0.079674513540768196, 0.082556872542344922, 0.085448275990715375, -0.088348725278367082, 0.091258221362398390, 0.094176764757897533, 0.097104355531246703, 0.100040993293358240, 0.102986677192832010, 0.105941405909045980, 0.108905177645166230, -0.111877990121087980, 0.114859840566297130, 0.117850725712659680, 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0.993257555083659870, 0.994103086570423680, 0.994894717408374870, 0.995631835818261310, 0.996313827892278070, 0.996940077662846650, 0.997509967173408010, - - }; diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c deleted file mode 100644 index e241b0d..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c +++ /dev/null @@ -1,415 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_graphic_equalizer_example_q31.c -* -* Description: Example showing an audio graphic equalizer constructed -* out of Biquad filters. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup GEQ5Band Graphic Audio Equalizer Example - * - * \par Description: - * \par - * This example demonstrates how a 5-band graphic equalizer can be constructed - * using the Biquad cascade functions. - * A graphic equalizer is used in audio applications to vary the tonal quality - * of the audio. - * - * \par Block Diagram: - * \par - * The design is based on a cascade of 5 filter sections. - * \image html GEQ_signalflow.gif - * Each filter section is 4th order and consists of a cascade of two Biquads. - * Each filter has a nominal gain of 0 dB (1.0 in linear units) and - * boosts or cuts signals within a specific frequency range. - * The edge frequencies between the 5 bands are 100, 500, 2000, and 6000 Hz. - * Each band has an adjustable boost or cut in the range of +/- 9 dB. - * For example, the band that extends from 500 to 2000 Hz has the response shown below: - * \par - * \image html GEQ_bandresponse.gif - * \par - * With 1 dB steps, each filter has a total of 19 different settings. - * The filter coefficients for all possible 19 settings were precomputed - * in MATLAB and stored in a table. With 5 different tables, there are - * a total of 5 x 19 = 95 different 4th order filters. - * All 95 responses are shown below: - * \par - * \image html GEQ_allbandresponse.gif - * \par - * Each 4th order filter has 10 coefficents for a grand total of 950 different filter - * coefficients that must be tabulated. The input and output data is in Q31 format. - * For better noise performance, the two low frequency bands are implemented using the high - * precision 32x64-bit Biquad filters. The remaining 3 high frequency bands use standard - * 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp. - * \par - * \image html GEQ_inputchirp.gif - * \par - * The array bandGains specifies the gain in dB to apply in each band. - * For example, if bandGains={0, -3, 6, 4, -6}; then the output signal will be: - * \par - * \image html GEQ_outputchirp.gif - * \par - * \note The output chirp signal follows the gain or boost of each band. - * \par - * - * \par Variables Description: - * \par - * \li \c testInput_f32 points to the input data - * \li \c testRefOutput_f32 points to the reference output data - * \li \c testOutput points to the test output data - * \li \c inputQ31 temporary input buffer - * \li \c outputQ31 temporary output buffer - * \li \c biquadStateBand1Q31 points to state buffer for band1 - * \li \c biquadStateBand2Q31 points to state buffer for band2 - * \li \c biquadStateBand3Q31 points to state buffer for band3 - * \li \c biquadStateBand4Q31 points to state buffer for band4 - * \li \c biquadStateBand5Q31 points to state buffer for band5 - * \li \c coeffTable points to coefficient buffer for all bands - * \li \c gainDB gain buffer which has gains applied for all the bands - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_biquad_cas_df1_32x64_init_q31() - * - arm_biquad_cas_df1_32x64_q31() - * - arm_biquad_cascade_df1_init_q31() - * - arm_biquad_cascade_df1_q31() - * - arm_scale_q31() - * - arm_scale_f32() - * - arm_float_to_q31() - * - arm_q31_to_float() - * - * Refer - * \link arm_graphic_equalizer_example_q31.c \endlink - * - */ - - -/** \example arm_graphic_equalizer_example_q31.c - */ - - -#include "arm_math.h" -#include "math_helper.h" - -#if defined(SEMIHOSTING) -#include -#endif - -/* Length of the overall data in the test */ -#define TESTLENGTH 320 - -/* Block size for the underlying processing */ -#define BLOCKSIZE 32 - -/* Total number of blocks to run */ -#define NUMBLOCKS (TESTLENGTH/BLOCKSIZE) - -/* Number of 2nd order Biquad stages per filter */ -#define NUMSTAGES 2 - -#define SNR_THRESHOLD_F32 98 - -/* ------------------------------------------------------------------- - * External Declarations for Input and Output buffers - * ------------------------------------------------------------------- */ - -extern float32_t testInput_f32[TESTLENGTH]; -static float32_t testOutput[TESTLENGTH]; - -extern float32_t testRefOutput_f32[TESTLENGTH]; - -/* ---------------------------------------------------------------------- -** Q31 state buffers for Band1, Band2, Band3, Band4, Band5 -** ------------------------------------------------------------------- */ - -static q63_t biquadStateBand1Q31[4 * 2]; -static q63_t biquadStateBand2Q31[4 * 2]; -static q31_t biquadStateBand3Q31[4 * 2]; -static q31_t biquadStateBand4Q31[4 * 2]; -static q31_t biquadStateBand5Q31[4 * 2]; - -/* ---------------------------------------------------------------------- -** Q31 input and output buffers -** ------------------------------------------------------------------- */ - -q31_t inputQ31[BLOCKSIZE]; -q31_t outputQ31[BLOCKSIZE]; - -/* ---------------------------------------------------------------------- -** Entire coefficient table. There are 10 coefficients per 4th order Biquad -** cascade filter. The first 10 coefficients correspond to the -9 dB gain -** setting of band 1; the next 10 coefficient correspond to the -8 dB gain -** setting of band 1; and so on. There are 10*19=190 coefficients in total -** for band 1 (gains = -9, -8, -7, ..., 9). After this come the 190 coefficients -** for band 2. -** -** The coefficients are in Q29 format and require a postShift of 2. -** ------------------------------------------------------------------- */ - -const q31_t coeffTable[950] = { - - /* Band 1, -9 dB gain */ - 535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981, - /* Band 1, -8 dB gain */ - 535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778, - 535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686, - 536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972, - 536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897, - 536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716, - 536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676, - 536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017, - 536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975, - 536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777, - 537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648, - 537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803, - 537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454, - 537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806, - 537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059, - 537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409, - 537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045, - 538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151, - 538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907, - - /* Band 2, -9 dB gain */ - 531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367, - /* Band 2, -8 dB gain */ - 532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122, - 532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090, - 533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573, - 534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887, - 534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373, - 535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399, - 535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368, - 536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724, - 536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953, - 537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588, - 537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208, - 538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437, - 539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946, - 539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450, - 540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700, - 540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484, - 541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621, - 542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956, - 518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571, - 520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158, - 522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225, - 524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221, - 526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897, - 528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319, - 530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872, - 532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254, - 534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474, - 536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839, - 538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937, - 540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621, - 542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987, - 544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351, - 547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226, - 549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298, - 551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401, - 553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495, - 555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644, - 494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750, - 498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942, - 503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028, - 508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289, - 512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811, - 517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485, - 522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012, - 527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882, - 531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352, - 536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420, - 541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786, - 546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816, - 551855042, -951688708, 437975532, 924420027, -431546101, 551855042, -646115970, 311939896, 684931422, -338134495, - 556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389, - 562108672, -970508005, 444858642, 924462435, -433867780, 562108672, -636084967, 304865786, 701601770, -348844597, - 567323959, -980220994, 448496743, 924564764, -435102022, 567323959, -630397020, 301081886, 709566963, -354030710, - 572602539, -990150500, 452277894, 924716482, -436379394, 572602539, -624244471, 297141281, 717293726, -359102767, - 577947763, -1000307125, 456210977, 924914158, -437695705, 577947763, -617615296, 293051155, 724788245, -364060214, - 583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865, - 387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270, - 401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316, - 416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319, - 431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540, - 447786335, -615019650, 241100489, 813828443, -330879528, 447786335, 615019650, 241100489, -813828443, -330879528, - 464326111, -644949597, 253586805, 806879270, -326727141, 464326111, 644949597, 253586805, -806879270, -326727141, - 481482377, -676122557, 266693475, 799776409, -322554559, 481482377, 676122557, 266693475, -799776409, -322554559, - 499276882, -708581728, 280442865, 792519013, -318366296, 499276882, 708581728, 280442865, -792519013, -318366296, - 517732032, -742371685, 294857996, 785106465, -314167221, 517732032, 742371685, 294857996, -785106465, -314167221, - 536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566, - 556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943, - 577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360, - 598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230, - 620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383, - 643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077, - 667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004, - 692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294, - 717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515, - 744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673 - -}; - -/* ---------------------------------------------------------------------- -** Desired gains, in dB, per band -** ------------------------------------------------------------------- */ - -int gainDB[5] = {0, -3, 6, 4, -6}; - -float32_t snr; - - -/* ---------------------------------------------------------------------- - * Graphic equalizer Example - * ------------------------------------------------------------------- */ - -int32_t main(void) -{ - float32_t *inputF32, *outputF32; - arm_biquad_cas_df1_32x64_ins_q31 S1; - arm_biquad_cas_df1_32x64_ins_q31 S2; - arm_biquad_casd_df1_inst_q31 S3; - arm_biquad_casd_df1_inst_q31 S4; - arm_biquad_casd_df1_inst_q31 S5; - int i; - int32_t status; - - inputF32 = &testInput_f32[0]; - outputF32 = &testOutput[0]; - - /* Initialize the state and coefficient buffers for all Biquad sections */ - - arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES, - (q31_t *) &coeffTable[190*0 + 10*(gainDB[0] + 9)], - &biquadStateBand1Q31[0], 2); - - arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES, - (q31_t *) &coeffTable[190*1 + 10*(gainDB[1] + 9)], - &biquadStateBand2Q31[0], 2); - - arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES, - (q31_t *) &coeffTable[190*2 + 10*(gainDB[2] + 9)], - &biquadStateBand3Q31[0], 2); - - arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES, - (q31_t *) &coeffTable[190*3 + 10*(gainDB[3] + 9)], - &biquadStateBand4Q31[0], 2); - - arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES, - (q31_t *) &coeffTable[190*4 + 10*(gainDB[4] + 9)], - &biquadStateBand5Q31[0], 2); - - - /* Call the process functions and needs to change filter coefficients - for varying the gain of each band */ - - for(i=0; i < NUMBLOCKS; i++) - { - - /* ---------------------------------------------------------------------- - ** Convert block of input data from float to Q31 - ** ------------------------------------------------------------------- */ - - arm_float_to_q31(inputF32 + (i*BLOCKSIZE), inputQ31, BLOCKSIZE); - - /* ---------------------------------------------------------------------- - ** Scale down by 1/8. This provides additional headroom so that the - ** graphic EQ can apply gain. - ** ------------------------------------------------------------------- */ - - arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE); - - /* ---------------------------------------------------------------------- - ** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2 - ** ------------------------------------------------------------------- */ - - arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE); - arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE); - - /* ---------------------------------------------------------------------- - ** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5 - ** ------------------------------------------------------------------- */ - - arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE); - arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE); - arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE); - - /* ---------------------------------------------------------------------- - ** Convert Q31 result back to float - ** ------------------------------------------------------------------- */ - - arm_q31_to_float(outputQ31, outputF32 + (i * BLOCKSIZE), BLOCKSIZE); - - /* ---------------------------------------------------------------------- - ** Scale back up - ** ------------------------------------------------------------------- */ - - arm_scale_f32(outputF32 + (i * BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE); - }; - - snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH); - - status = (snr < SNR_THRESHOLD_F32) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS; - - if (status != ARM_MATH_SUCCESS) - { -#if defined (SEMIHOSTING) - printf("FAILURE\n"); -#else - while (1); /* main function does not return */ -#endif - } - else - { -#if defined (SEMIHOSTING) - printf("SUCCESS\n"); -#else - while (1); /* main function does not return */ -#endif - } - -} - -/** \endlink */ - - - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/math_helper.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/math_helper.c deleted file mode 100644 index 095fdc6..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/math_helper.c +++ /dev/null @@ -1,472 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 b -* -* Project: CMSIS DSP Library -* -* Title: math_helper.c -* -* Description: Definition of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/* ---------------------------------------------------------------------- -* Include standard header files -* -------------------------------------------------------------------- */ -#include - -/* ---------------------------------------------------------------------- -* Include project header files -* -------------------------------------------------------------------- */ -#include "math_helper.h" - -/** - * @brief Caluclation of SNR - * @param[in] pRef Pointer to the reference buffer - * @param[in] pTest Pointer to the test buffer - * @param[in] buffSize total number of samples - * @return SNR - * The function Caluclates signal to noise ratio for the reference output - * and test output - */ - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) -{ - float EnergySignal = 0.0, EnergyError = 0.0; - uint32_t i; - float SNR; - int temp; - int *test; - - for (i = 0; i < buffSize; i++) - { - /* Checking for a NAN value in pRef array */ - test = (int *)(&pRef[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - /* Checking for a NAN value in pTest array */ - test = (int *)(&pTest[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - EnergySignal += pRef[i] * pRef[i]; - EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); - } - - /* Checking for a NAN value in EnergyError */ - test = (int *)(&EnergyError); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - - SNR = 10 * log10 (EnergySignal / EnergyError); - - return (SNR); - -} - - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Converts float to fixed in q12.20 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to outputbuffer - * @param[in] numSamples number of samples in the input buffer - * @return none - * The function converts floating point values to fixed point(q12.20) values - */ - -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1048576.0f corresponds to pow(2, 20) */ - pOut[i] = (q31_t) (pIn[i] * 1048576.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 1.0) - { - pOut[i] = 0x000FFFFF; - } - } -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q31 (q31_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q7 (q7_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - - - -/** - * @brief Caluclates number of guard bits - * @param[in] num_adds number of additions - * @return guard bits - * The function Caluclates the number of guard bits - * depending on the numtaps - */ - -uint32_t arm_calc_guard_bits (uint32_t num_adds) -{ - uint32_t i = 1, j = 0; - - if (num_adds == 1) - { - return (0); - } - - while (i < num_adds) - { - i = i * 2; - j++; - } - - return (j); -} - -/** - * @brief Apply guard bits to buffer - * @param[in,out] pIn pointer to input buffer - * @param[in] numSamples number of samples in the input buffer - * @param[in] guard_bits guard bits - * @return none - */ - -void arm_apply_guard_bits (float32_t *pIn, - uint32_t numSamples, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); - } -} - -/** - * @brief Calculates pow(2, numShifts) - * @param[in] numShifts number of shifts - * @return pow(2, numShifts) - */ -uint32_t arm_calc_2pow(uint32_t numShifts) -{ - - uint32_t i, val = 1; - - for (i = 0; i < numShifts; i++) - { - val = val * 2; - } - - return(val); -} - - - -/** - * @brief Converts float to fixed q14 - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 16384.0f corresponds to pow(2, 14) */ - pOut[i] = (q15_t) (pIn[i] * 16384.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFF; - } - - } - -} - - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 536870912.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 4.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - - -/** - * @brief Converts float to fixed q28 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 268435456.0f corresponds to pow(2, 28) */ - pOut[i] = (q31_t) (pIn[i] * 268435456.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 8.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - -/* - -Conflicting with the new clip functions in CMSIS-DSP and not used -in the examples. - -*/ -#if 0 -/** - * @brief Clip the float values to +/- 1 - * @param[in,out] pIn input buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_clip_f32 (float *pIn, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - if (pIn[i] > 1.0f) - { - pIn[i] = 1.0; - } - else if ( pIn[i] < -1.0f) - { - pIn[i] = -1.0; - } - - } -} - - -#endif diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/math_helper.h b/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/math_helper.h deleted file mode 100644 index b35feb8..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example/math_helper.h +++ /dev/null @@ -1,62 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2013 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* -* Title: math_helper.h -* -* Description: Prototypes of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -#ifndef MATH_HELPER_H -#define MATH_HELPER_H - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize); -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); -void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); -void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_guard_bits(uint32_t num_adds); -void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_2pow(uint32_t guard_bits); -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/Abstract.txt deleted file mode 100644 index cc39274..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_linear_interp_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/CMakeLists.txt deleted file mode 100644 index d590a1f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_linear_interp_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_linear_interp_example) - - -include(config) -configApp(arm_linear_interp_example ${ROOT}) - -target_sources(arm_linear_interp_example PRIVATE math_helper.c arm_linear_interp_data.c arm_linear_interp_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_linear_interp_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/arm_linear_interp_data.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/arm_linear_interp_data.c deleted file mode 100644 index 8150f0e..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/arm_linear_interp_data.c +++ /dev/null @@ -1,288 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2020 ARM Limited. All rights reserved. -* -* $Date: 23. March 2020 -* $Revision: V1.7.0 -* -* Project: CMSIS DSP Library -* Title: arm_linear_interp_data.c -* -* Description: Data file used for example. Generation method described -* below -* -* Target Processor: Cortex-M55/Cortex-M7/Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -/* ---------------------------------------------------------------------- -* Table generated from following MATLAB Command -* x = -pi: 0.005 : (2*pi - 0.005); -* y = sin(x); -* where pi value is 3.141592653589793 -* --------------------------------------------------------------------*/ - -const float arm_linear_interep_table[1884] = { - -0.00000000000000012246, -0.00499997916669272461, -0.00999983333416657426, -0.01499943750632833778, -0.01999866669333321897, -0.02499739591471236352, -0.02999550020249558760, -0.03499285460433645967, - -0.03998933418663432049, -0.04498481403766028952, -0.04997916927067827531, -0.05497227502706801550, -0.05996400647944477580, -0.06495423883478267102, -0.06994284733753272643, -0.07492970727274264608, - -0.07991469396917287582, -0.08489768280241610787, -0.08987854919801102627, -0.09485716863455760650, -0.09983341664682836292, -0.10480716882888259367, -0.10977830083717481091, -0.11474668839366414241, - -0.11971220728891958374, -0.12467473338522781778, -0.12963414261969488650, -0.13459031100734822339, -0.13954311464423671540, -0.14449242971052655982, -0.14943813247359924445, -0.15438009929114335228, - -0.15931820661424622720, -0.16425233099048111574, -0.16918234906699605724, -0.17410813759359589081, -0.17902957342582445643, -0.18394653352804138380, -0.18885889497650065749, -0.19376653496242188246, - -0.19866933079506152171, -0.20356715990477816658, -0.20845989984609966661, -0.21334742830078226583, -0.21822962308086962802, -0.22310636213174564468, -0.22797752353518849211, -0.23284298551241677799, - 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-0.02477542545335675514, -0.01977667137792019775, -0.01477742288672922490, -0.00977780496073574201, -}; - - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/arm_linear_interp_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/arm_linear_interp_example_f32.c deleted file mode 100644 index 639a02a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/arm_linear_interp_example_f32.c +++ /dev/null @@ -1,208 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2020 ARM Limited. All rights reserved. -* -* $Date: 23. March 2020 -* $Revision: V1.7.0 -* -* Project: CMSIS DSP Library -* Title: arm_linear_interp_example_f32.c -* -* Description: Example code demonstrating usage of sin function -* and uses linear interpolation to get higher precision -* -* Target Processor: Cortex-M55/Cortex-M7/Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup LinearInterpExample Linear Interpolate Example - * - * CMSIS DSP Software Library -- Linear Interpolate Example - * - * Description - * This example demonstrates usage of linear interpolate modules and fast math modules. - * Method 1 uses fast math sine function to calculate sine values using cubic interpolation and method 2 uses - * linear interpolation function and results are compared to reference output. - * Example shows linear interpolation function can be used to get higher precision compared to fast math sin calculation. - * - * \par Block Diagram: - * \par - * \image html linearInterpExampleMethod1.gif "Method 1: Sine caluclation using fast math" - * \par - * \image html linearInterpExampleMethod2.gif "Method 2: Sine caluclation using interpolation function" - * - * \par Variables Description: - * \par - * \li \c testInputSin_f32 points to the input values for sine calculation - * \li \c testRefSinOutput32_f32 points to the reference values caculated from sin() matlab function - * \li \c testOutput points to output buffer calculation from cubic interpolation - * \li \c testLinIntOutput points to output buffer calculation from linear interpolation - * \li \c snr1 Signal to noise ratio for reference and cubic interpolation output - * \li \c snr2 Signal to noise ratio for reference and linear interpolation output - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_sin_f32() - * - arm_linear_interp_f32() - * - * Refer - * \link arm_linear_interp_example_f32.c \endlink - * - */ - - -/** \example arm_linear_interp_example_f32.c - */ - -#include "arm_math.h" -#include "math_helper.h" - -#if defined(SEMIHOSTING) -#include -#endif - -#define SNR_THRESHOLD 90 -#define TEST_LENGTH_SAMPLES 10 -#define XSPACING (0.005f) - -/* ---------------------------------------------------------------------- -* Test input data for F32 SIN function -* Generated by the MATLAB rand() function -* randn('state', 0) -* xi = (((1/4.18318581819710)* randn(blockSize, 1) * 2* pi)); -* --------------------------------------------------------------------*/ -float32_t testInputSin_f32[TEST_LENGTH_SAMPLES] = -{ - -0.649716504673081170, -2.501723745497831200, - 0.188250329003310100, 0.432092748487532540, - -1.722010988459680800, 1.788766476323060600, - 1.786136060975809500, -0.056525543169408797, - 0.491596272728153760, 0.262309671126153390 -}; - -/*------------------------------------------------------------------------------ -* Reference out of SIN F32 function for Block Size = 10 -* Calculated from sin(testInputSin_f32) -*------------------------------------------------------------------------------*/ -float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES] = -{ - -0.604960695383043530, -0.597090287967934840, - 0.187140422442966500, 0.418772124875992690, - -0.988588831792106880, 0.976338412038794010, - 0.976903856413481100, -0.056495446835214236, - 0.472033731854734240, 0.259311907228582830 -}; - -/*------------------------------------------------------------------------------ -* Method 1: Test out Buffer Calculated from Cubic Interpolation -*------------------------------------------------------------------------------*/ -float32_t testOutput[TEST_LENGTH_SAMPLES]; - -/*------------------------------------------------------------------------------ -* Method 2: Test out buffer Calculated from Linear Interpolation -*------------------------------------------------------------------------------*/ -float32_t testLinIntOutput[TEST_LENGTH_SAMPLES]; - -/*------------------------------------------------------------------------------ -* External table used for linear interpolation -*------------------------------------------------------------------------------*/ -extern const float arm_linear_interep_table[1884]; - -/* ---------------------------------------------------------------------- -* Global Variables for caluclating SNR's for Method1 & Method 2 -* ------------------------------------------------------------------- */ -float32_t snr1; -float32_t snr2; - -/* ---------------------------------------------------------------------------- -* Calculation of Sine values from Cubic Interpolation and Linear interpolation -* ---------------------------------------------------------------------------- */ -int32_t main(void) -{ - uint32_t i; - arm_status status; - - arm_linear_interp_instance_f32 S = {1884, -3.141592653589793238, XSPACING, (float*)&arm_linear_interep_table[0]}; - - /*------------------------------------------------------------------------------ - * Method 1: Test out Calculated from Cubic Interpolation - *------------------------------------------------------------------------------*/ - for(i=0; i< TEST_LENGTH_SAMPLES; i++) - { - testOutput[i] = arm_sin_f32(testInputSin_f32[i]); - } - - /*------------------------------------------------------------------------------ - * Method 2: Test out Calculated from Cubic Interpolation and Linear interpolation - *------------------------------------------------------------------------------*/ - - for(i=0; i< TEST_LENGTH_SAMPLES; i++) - { - testLinIntOutput[i] = arm_linear_interp_f32(&S, testInputSin_f32[i]); - } - - /*------------------------------------------------------------------------------ - * SNR calculation for method 1 - *------------------------------------------------------------------------------*/ - snr1 = arm_snr_f32(testRefSinOutput32_f32, testOutput, 2); - - /*------------------------------------------------------------------------------ - * SNR calculation for method 2 - *------------------------------------------------------------------------------*/ - snr2 = arm_snr_f32(testRefSinOutput32_f32, testLinIntOutput, 2); - - /*------------------------------------------------------------------------------ - * Initialise status depending on SNR calculations - *------------------------------------------------------------------------------*/ - status = (snr2 <= snr1) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS; - - if (status != ARM_MATH_SUCCESS) - { -#if defined (SEMIHOSTING) - printf("FAILURE\n"); -#else - while (1); /* main function does not return */ -#endif - } - else - { -#if defined (SEMIHOSTING) - printf("SUCCESS\n"); -#else - while (1); /* main function does not return */ -#endif - } - -} - - /** \endlink */ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/math_helper.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/math_helper.c deleted file mode 100644 index 7d5db22..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/math_helper.c +++ /dev/null @@ -1,472 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 b -* -* Project: CMSIS DSP Library -* -* Title: math_helper.c -* -* Description: Definition of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/* ---------------------------------------------------------------------- -* Include standard header files -* -------------------------------------------------------------------- */ -#include - -/* ---------------------------------------------------------------------- -* Include project header files -* -------------------------------------------------------------------- */ -#include "math_helper.h" - -/** - * @brief Caluclation of SNR - * @param[in] pRef Pointer to the reference buffer - * @param[in] pTest Pointer to the test buffer - * @param[in] buffSize total number of samples - * @return SNR - * The function Caluclates signal to noise ratio for the reference output - * and test output - */ - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) -{ - float EnergySignal = 0.0, EnergyError = 0.0; - uint32_t i; - float SNR; - int temp; - int *test; - - for (i = 0; i < buffSize; i++) - { - /* Checking for a NAN value in pRef array */ - test = (int *)(&pRef[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - /* Checking for a NAN value in pTest array */ - test = (int *)(&pTest[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - EnergySignal += pRef[i] * pRef[i]; - EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); - } - - /* Checking for a NAN value in EnergyError */ - test = (int *)(&EnergyError); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - - SNR = 10 * log10 (EnergySignal / EnergyError); - - return (SNR); - -} - - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Converts float to fixed in q12.20 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to outputbuffer - * @param[in] numSamples number of samples in the input buffer - * @return none - * The function converts floating point values to fixed point(q12.20) values - */ - -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1048576.0f corresponds to pow(2, 20) */ - pOut[i] = (q31_t) (pIn[i] * 1048576.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 1.0) - { - pOut[i] = 0x000FFFFF; - } - } -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q31 (q31_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q7 (q7_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - - - -/** - * @brief Caluclates number of guard bits - * @param[in] num_adds number of additions - * @return guard bits - * The function Caluclates the number of guard bits - * depending on the numtaps - */ - -uint32_t arm_calc_guard_bits (uint32_t num_adds) -{ - uint32_t i = 1, j = 0; - - if (num_adds == 1) - { - return (0); - } - - while (i < num_adds) - { - i = i * 2; - j++; - } - - return (j); -} - -/** - * @brief Apply guard bits to buffer - * @param[in,out] pIn pointer to input buffer - * @param[in] numSamples number of samples in the input buffer - * @param[in] guard_bits guard bits - * @return none - */ - -void arm_apply_guard_bits (float32_t *pIn, - uint32_t numSamples, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); - } -} - -/** - * @brief Calculates pow(2, numShifts) - * @param[in] numShifts number of shifts - * @return pow(2, numShifts) - */ -uint32_t arm_calc_2pow(uint32_t numShifts) -{ - - uint32_t i, val = 1; - - for (i = 0; i < numShifts; i++) - { - val = val * 2; - } - - return(val); -} - - - -/** - * @brief Converts float to fixed q14 - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 16384.0f corresponds to pow(2, 14) */ - pOut[i] = (q15_t) (pIn[i] * 16384.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFF; - } - - } - -} - - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 536870912.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 4.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - - -/** - * @brief Converts float to fixed q28 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 268435456.0f corresponds to pow(2, 28) */ - pOut[i] = (q31_t) (pIn[i] * 268435456.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 8.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - - -/* - -Conflicting with the new clip functions in CMSIS-DSP and not used -in the examples. - -*/ -#if 0 -/** - * @brief Clip the float values to +/- 1 - * @param[in,out] pIn input buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_clip_f32 (float *pIn, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - if (pIn[i] > 1.0f) - { - pIn[i] = 1.0; - } - else if ( pIn[i] < -1.0f) - { - pIn[i] = -1.0; - } - - } -} - -#endif diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/math_helper.h b/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/math_helper.h deleted file mode 100644 index b35feb8..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_linear_interp_example/math_helper.h +++ /dev/null @@ -1,62 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2013 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* -* Title: math_helper.h -* -* Description: Prototypes of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -#ifndef MATH_HELPER_H -#define MATH_HELPER_H - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize); -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); -void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); -void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_guard_bits(uint32_t num_adds); -void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_2pow(uint32_t guard_bits); -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/Abstract.txt deleted file mode 100644 index 1b89361..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_matrix_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/CMakeLists.txt deleted file mode 100644 index 31a7ab1..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_matrix_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_matrix_example) - - -include(config) -configApp(arm_matrix_example ${ROOT}) - -target_sources(arm_matrix_example PRIVATE math_helper.c arm_matrix_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_matrix_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/arm_matrix_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/arm_matrix_example_f32.c deleted file mode 100644 index 049a300..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/arm_matrix_example_f32.c +++ /dev/null @@ -1,235 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_matrix_example_f32.c -* -* Description: Example code demonstrating least square fit to data -* using matrix functions -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup MatrixExample Matrix Example - * - * \par Description: - * \par - * Demonstrates the use of Matrix Transpose, Matrix Muliplication, and Matrix Inverse - * functions to apply least squares fitting to input data. Least squares fitting is - * the procedure for finding the best-fitting curve that minimizes the sum of the - * squares of the offsets (least square error) from a given set of data. - * - * \par Algorithm: - * \par - * The linear combination of parameters considered is as follows: - * \par - * A * X = B, where \c X is the unknown value and can be estimated - * from \c A & \c B. - * \par - * The least squares estimate \c X is given by the following equation: - * \par - * X = Inverse(AT * A) * AT * B - * - * \par Block Diagram: - * \par - * - * \par Variables Description: - * \par - * \li \c A_f32 input matrix in the linear combination equation - * \li \c B_f32 output matrix in the linear combination equation - * \li \c X_f32 unknown matrix estimated using \c A_f32 & \c B_f32 matrices - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_mat_init_f32() - * - arm_mat_trans_f32() - * - arm_mat_mult_f32() - * - arm_mat_inverse_f32() - * - * Refer - * \link arm_matrix_example_f32.c \endlink - * - */ - - -/** \example arm_matrix_example_f32.c - */ - -#include "arm_math.h" -#include "math_helper.h" - -#if defined(SEMIHOSTING) -#include -#endif - -#define SNR_THRESHOLD 90 - -/* -------------------------------------------------------------------------------- -* Test input data(Cycles) taken from FIR Q15 module for differant cases of blockSize -* and tapSize -* --------------------------------------------------------------------------------- */ - -const float32_t B_f32[4] = -{ - 782.0, 7577.0, 470.0, 4505.0 -}; - -/* -------------------------------------------------------------------------------- -* Formula to fit is C1 + C2 * numTaps + C3 * blockSize + C4 * numTaps * blockSize -* -------------------------------------------------------------------------------- */ - -const float32_t A_f32[16] = -{ - /* Const, numTaps, blockSize, numTaps*blockSize */ - 1.0, 32.0, 4.0, 128.0, - 1.0, 32.0, 64.0, 2048.0, - 1.0, 16.0, 4.0, 64.0, - 1.0, 16.0, 64.0, 1024.0, -}; - - -/* ---------------------------------------------------------------------- -* Temporary buffers for storing intermediate values -* ------------------------------------------------------------------- */ -/* Transpose of A Buffer */ -float32_t AT_f32[16]; -/* (Transpose of A * A) Buffer */ -float32_t ATMA_f32[16]; -/* Inverse(Transpose of A * A) Buffer */ -float32_t ATMAI_f32[16]; -/* Test Output Buffer */ -float32_t X_f32[4]; - -/* ---------------------------------------------------------------------- -* Reference ouput buffer C1, C2, C3 and C4 taken from MATLAB -* ------------------------------------------------------------------- */ -const float32_t xRef_f32[4] = {73.0, 8.0, 21.25, 2.875}; - -float32_t snr; - - -/* ---------------------------------------------------------------------- -* Max magnitude FFT Bin test -* ------------------------------------------------------------------- */ - -int32_t main(void) -{ - - arm_matrix_instance_f32 A; /* Matrix A Instance */ - arm_matrix_instance_f32 AT; /* Matrix AT(A transpose) instance */ - arm_matrix_instance_f32 ATMA; /* Matrix ATMA( AT multiply with A) instance */ - arm_matrix_instance_f32 ATMAI; /* Matrix ATMAI(Inverse of ATMA) instance */ - arm_matrix_instance_f32 B; /* Matrix B instance */ - arm_matrix_instance_f32 X; /* Matrix X(Unknown Matrix) instance */ - - uint32_t srcRows, srcColumns; /* Temporary variables */ - arm_status status; - - /* Initialise A Matrix Instance with numRows, numCols and data array(A_f32) */ - srcRows = 4; - srcColumns = 4; - arm_mat_init_f32(&A, srcRows, srcColumns, (float32_t *)A_f32); - - /* Initialise Matrix Instance AT with numRows, numCols and data array(AT_f32) */ - srcRows = 4; - srcColumns = 4; - arm_mat_init_f32(&AT, srcRows, srcColumns, AT_f32); - - /* calculation of A transpose */ - status = arm_mat_trans_f32(&A, &AT); - - - /* Initialise ATMA Matrix Instance with numRows, numCols and data array(ATMA_f32) */ - srcRows = 4; - srcColumns = 4; - arm_mat_init_f32(&ATMA, srcRows, srcColumns, ATMA_f32); - - /* calculation of AT Multiply with A */ - status = arm_mat_mult_f32(&AT, &A, &ATMA); - - /* Initialise ATMAI Matrix Instance with numRows, numCols and data array(ATMAI_f32) */ - srcRows = 4; - srcColumns = 4; - arm_mat_init_f32(&ATMAI, srcRows, srcColumns, ATMAI_f32); - - /* calculation of Inverse((Transpose(A) * A) */ - status = arm_mat_inverse_f32(&ATMA, &ATMAI); - - /* calculation of (Inverse((Transpose(A) * A)) * Transpose(A)) */ - status = arm_mat_mult_f32(&ATMAI, &AT, &ATMA); - - /* Initialise B Matrix Instance with numRows, numCols and data array(B_f32) */ - srcRows = 4; - srcColumns = 1; - arm_mat_init_f32(&B, srcRows, srcColumns, (float32_t *)B_f32); - - /* Initialise X Matrix Instance with numRows, numCols and data array(X_f32) */ - srcRows = 4; - srcColumns = 1; - arm_mat_init_f32(&X, srcRows, srcColumns, X_f32); - - /* calculation ((Inverse((Transpose(A) * A)) * Transpose(A)) * B) */ - status = arm_mat_mult_f32(&ATMA, &B, &X); - - /* Comparison of reference with test output */ - snr = arm_snr_f32((float32_t *)xRef_f32, X_f32, 4); - - /*------------------------------------------------------------------------------ - * Initialise status depending on SNR calculations - *------------------------------------------------------------------------------*/ - status = (snr < SNR_THRESHOLD) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS; - - if (status != ARM_MATH_SUCCESS) - { -#if defined (SEMIHOSTING) - printf("FAILURE\n"); -#else - while (1); /* main function does not return */ -#endif - } - else - { -#if defined (SEMIHOSTING) - printf("SUCCESS\n"); -#else - while (1); /* main function does not return */ -#endif - } - -} - - /** \endlink */ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/math_helper.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/math_helper.c deleted file mode 100644 index 9ece73c..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/math_helper.c +++ /dev/null @@ -1,473 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 b -* -* Project: CMSIS DSP Library -* -* Title: math_helper.c -* -* Description: Definition of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/* ---------------------------------------------------------------------- -* Include standard header files -* -------------------------------------------------------------------- */ -#include - -/* ---------------------------------------------------------------------- -* Include project header files -* -------------------------------------------------------------------- */ -#include "math_helper.h" - -/** - * @brief Caluclation of SNR - * @param[in] pRef Pointer to the reference buffer - * @param[in] pTest Pointer to the test buffer - * @param[in] buffSize total number of samples - * @return SNR - * The function Caluclates signal to noise ratio for the reference output - * and test output - */ - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) -{ - float EnergySignal = 0.0, EnergyError = 0.0; - uint32_t i; - float SNR; - int temp; - int *test; - - for (i = 0; i < buffSize; i++) - { - /* Checking for a NAN value in pRef array */ - test = (int *)(&pRef[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - /* Checking for a NAN value in pTest array */ - test = (int *)(&pTest[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - EnergySignal += pRef[i] * pRef[i]; - EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); - } - - /* Checking for a NAN value in EnergyError */ - test = (int *)(&EnergyError); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - - SNR = 10 * log10 (EnergySignal / EnergyError); - - return (SNR); - -} - - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Converts float to fixed in q12.20 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to outputbuffer - * @param[in] numSamples number of samples in the input buffer - * @return none - * The function converts floating point values to fixed point(q12.20) values - */ - -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1048576.0f corresponds to pow(2, 20) */ - pOut[i] = (q31_t) (pIn[i] * 1048576.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 1.0) - { - pOut[i] = 0x000FFFFF; - } - } -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q31 (q31_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q7 (q7_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - - - -/** - * @brief Caluclates number of guard bits - * @param[in] num_adds number of additions - * @return guard bits - * The function Caluclates the number of guard bits - * depending on the numtaps - */ - -uint32_t arm_calc_guard_bits (uint32_t num_adds) -{ - uint32_t i = 1, j = 0; - - if (num_adds == 1) - { - return (0); - } - - while (i < num_adds) - { - i = i * 2; - j++; - } - - return (j); -} - -/** - * @brief Apply guard bits to buffer - * @param[in,out] pIn pointer to input buffer - * @param[in] numSamples number of samples in the input buffer - * @param[in] guard_bits guard bits - * @return none - */ - -void arm_apply_guard_bits (float32_t *pIn, - uint32_t numSamples, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); - } -} - -/** - * @brief Calculates pow(2, numShifts) - * @param[in] numShifts number of shifts - * @return pow(2, numShifts) - */ -uint32_t arm_calc_2pow(uint32_t numShifts) -{ - - uint32_t i, val = 1; - - for (i = 0; i < numShifts; i++) - { - val = val * 2; - } - - return(val); -} - - - -/** - * @brief Converts float to fixed q14 - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 16384.0f corresponds to pow(2, 14) */ - pOut[i] = (q15_t) (pIn[i] * 16384.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFF; - } - - } - -} - - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 536870912.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 4.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - - -/** - * @brief Converts float to fixed q28 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 268435456.0f corresponds to pow(2, 28) */ - pOut[i] = (q31_t) (pIn[i] * 268435456.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 8.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - -/* - -Conflicting with the new clip functions in CMSIS-DSP and not used -in the examples. - -*/ -#if 0 -/** - * @brief Clip the float values to +/- 1 - * @param[in,out] pIn input buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_clip_f32 (float *pIn, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - if (pIn[i] > 1.0f) - { - pIn[i] = 1.0; - } - else if ( pIn[i] < -1.0f) - { - pIn[i] = -1.0; - } - - } -} -#endif - - - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/math_helper.h b/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/math_helper.h deleted file mode 100644 index b35feb8..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_matrix_example/math_helper.h +++ /dev/null @@ -1,62 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2013 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* -* Title: math_helper.h -* -* Description: Prototypes of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -#ifndef MATH_HELPER_H -#define MATH_HELPER_H - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize); -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); -void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); -void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_guard_bits(uint32_t num_adds); -void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_2pow(uint32_t guard_bits); -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/Abstract.txt deleted file mode 100644 index c0e70eb..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_signal_converge_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/CMakeLists.txt deleted file mode 100644 index 9124f28..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_signal_convergence_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_signal_convergence_example) - - -include(config) -configApp(arm_signal_convergence_example ${ROOT}) - -target_sources(arm_signal_convergence_example PRIVATE math_helper.c arm_signal_converge_data.c arm_signal_converge_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_signal_convergence_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/arm_signal_converge_data.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/arm_signal_converge_data.c deleted file mode 100644 index 3a2337d..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/arm_signal_converge_data.c +++ /dev/null @@ -1,269 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_signal_converge_data.c -* -* Description: Test input data for Floating point LMS Norm FIR filter -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/* ---------------------------------------------------------------------- -** Test input data for Floating point LMS Norm FIR filter -** Generated by the MATLAB randn() function -** ------------------------------------------------------------------- */ - -float32_t testInput_f32[1536] = -{ --0.432565, -1.665584, 0.125332, 0.287676, -1.146471, 1.190915, 1.189164, -0.037633, -0.327292, 0.174639, -0.186709, 0.725791, -0.588317, 2.183186, -0.136396, 0.113931, -1.066768, 0.059281, -0.095648, -0.832349, 0.294411, -1.336182, 0.714325, 1.623562, --0.691776, 0.857997, 1.254001, -1.593730, -1.440964, 0.571148, -0.399886, 0.689997, -0.815622, 0.711908, 1.290250, 0.668601, 1.190838, -1.202457, -0.019790, -0.156717, --1.604086, 0.257304, -1.056473, 1.415141, -0.805090, 0.528743, 0.219321, -0.921902, --2.170674, -0.059188, -1.010634, 0.614463, 0.507741, 1.692430, 0.591283, -0.643595, -0.380337, -1.009116, -0.019511, -0.048221, 0.000043, -0.317859, 1.095004, -1.873990, -0.428183, 0.895638, 0.730957, 0.577857, 0.040314, 0.677089, 0.568900, -0.255645, --0.377469, -0.295887, -1.475135, -0.234004, 0.118445, 0.314809, 1.443508, -0.350975, -0.623234, 0.799049, 0.940890, -0.992092, 0.212035, 0.237882, -1.007763, -0.742045, -1.082295, -0.131500, 0.389880, 0.087987, -0.635465, -0.559573, 0.443653, -0.949904, -0.781182, 0.568961, -0.821714, -0.265607, -1.187777, -2.202321, 0.986337, -0.518635, -0.327368, 0.234057, 0.021466, -1.003944, -0.947146, -0.374429, -1.185886, -1.055903, -1.472480, 0.055744, -1.217317, -0.041227, -1.128344, -1.349278, -0.261102, 0.953465, -0.128644, 0.656468, -1.167819, -0.460605, -0.262440, -1.213152, -1.319437, 0.931218, -0.011245, -0.645146, 0.805729, 0.231626, -0.989760, 1.339586, 0.289502, 1.478917, -1.138028, -0.684139, -1.291936, -0.072926, -0.330599, -0.843628, 0.497770, 1.488490, --0.546476, -0.846758, -0.246337, 0.663024, -0.854197, -1.201315, -0.119869, -0.065294, -0.485296, -0.595491, -0.149668, -0.434752, -0.079330, 1.535152, -0.606483, -1.347363, -0.469383, -0.903567, 0.035880, -0.627531, 0.535398, 0.552884, -0.203690, -2.054325, -0.132561, 1.592941, 1.018412, -1.580402, -0.078662, -0.681657, -1.024553, -1.234353, -0.288807, -0.429303, 0.055801, -0.367874, -0.464973, 0.370961, 0.728283, 2.112160, --1.357298, -1.022610, 1.037834, -0.389800, -1.381266, 0.315543, 1.553243, 0.707894, -1.957385, 0.504542, 1.864529, -0.339812, -1.139779, -0.211123, 1.190245, -1.116209, -0.635274, -0.601412, 0.551185, -1.099840, 0.085991, -2.004563, -0.493088, 0.462048, --0.321005, 1.236556, -0.631280, -2.325211, -1.231637, 1.055648, -0.113224, 0.379224, -0.944200, -2.120427, -0.644679, -0.704302, -1.018137, -0.182082, 1.521013, -0.038439, -1.227448, -0.696205, 0.007524, -0.782893, 0.586939, -0.251207, 0.480136, 0.668155, --0.078321, 0.889173, 2.309287, 0.524639, -0.011787, 0.913141, 0.055941, -1.107070, -0.485498, -0.005005, -0.276218, 1.276452, 1.863401, -0.522559, 0.103424, -0.807649, -0.680439, -2.364590, 0.990115, 0.218899, 0.261662, 1.213444, -0.274667, -0.133134, --1.270500, -1.663606, -0.703554, 0.280880, -0.541209, -1.333531, 1.072686, -0.712085, --0.011286, -0.000817, -0.249436, 0.396575, -0.264013, -1.664011, -1.028975, 0.243095, --1.256590, -0.347183, -0.941372, -1.174560, -1.021142, -0.401667, 0.173666, -0.116118, -1.064119, -0.245386, -1.517539, 0.009734, 0.071373, 0.316536, 0.499826, 1.278084, --0.547816, 0.260808, -0.013177, -0.580264, 2.136308, -0.257617, -1.409528, 1.770101, -0.325546, -1.119040, 0.620350, 1.269782, -0.896043, 0.135175, -0.139040, -1.163395, -1.183720, -0.015430, 0.536219, -0.716429, -0.655559, 0.314363, 0.106814, 1.848216, --0.275106, 2.212554, 1.508526, -1.945079, -1.680543, -0.573534, -0.185817, 0.008934, -0.836950, -0.722271, -0.721490, -0.201181, -0.020464, 0.278890, 1.058295, 0.621673, --1.750615, 0.697348, 0.811486, 0.636345, 1.310080, 0.327098, -0.672993, -0.149327, --2.449018, 0.473286, 0.116946, -0.591104, -0.654708, -1.080662, -0.047731, 0.379345, --0.330361, -0.499898, -0.035979, -0.174760, -0.957265, 1.292548, 0.440910, 1.280941, --0.497730, -1.118717, 0.807650, 0.041200, -0.756209, -0.089129, -2.008850, 1.083918, --0.981191, -0.688489, 1.339479, -0.909243, -0.412858, -0.506163, 1.619748, 0.080901, --1.081056, -1.124518, 1.735676, 1.937459, 1.635068, -1.255940, -0.213538, -0.198932, -0.307499, -0.572325, -0.977648, -0.446809, 1.082092, 2.372648, 0.229288, -0.266623, -0.701672, -0.487590, 1.862480, 1.106851, -1.227566, -0.669885, 1.340929, 0.388083, -0.393059, -1.707334, 0.227859, 0.685633, -0.636790, -1.002606, -0.185621, -1.054033, --0.071539, 0.279198, 1.373275, 0.179841, -0.542017, 1.634191, 0.825215, 0.230761, -0.671634, -0.508078, 0.856352, 0.268503, 0.624975, -1.047338, 1.535670, 0.434426, --1.917136, 0.469940, 1.274351, 0.638542, 1.380782, 1.319843, -0.909429, -2.305605, -1.788730, 0.390798, 0.020324, -0.405977, -1.534895, 0.221373, -1.374479, -0.839286, --0.208643, 0.755913, 0.375734, -1.345413, 1.481876, 0.032736, 1.870453, -1.208991, --0.782632, -0.767299, -0.107200, -0.977057, -0.963988, -2.379172, -0.838188, 0.257346, --0.183834, -0.167615, -0.116989, 0.168488, -0.501206, -0.705076, 0.508165, -0.420922, -0.229133, -0.959497, -0.146043, 0.744538, -0.890496, 0.139062, -0.236144, -0.075459, --0.358572, -2.077635, -0.143546, 1.393341, 0.651804, -0.377134, -0.661443, 0.248958, --0.383516, -0.528480, 0.055388, 1.253769, -2.520004, 0.584856, -1.008064, 0.944285, --2.423957, -0.223831, 0.058070, -0.424614, -0.202918, -1.513077, -1.126352, -0.815002, -0.366614, -0.586107, 1.537409, 0.140072, -1.862767, -0.454193, -0.652074, 0.103318, --0.220632, -0.279043, -0.733662, -0.064534, -1.444004, 0.612340, -1.323503, -0.661577, --0.146115, 0.248085, -0.076633, 1.738170, 1.621972, 0.626436, 0.091814, -0.807607, --0.461337, -1.405969, -0.374530, -0.470911, 1.751296, 0.753225, 0.064989, -0.292764, -0.082823, 0.766191, 2.236850, 0.326887, 0.863304, 0.679387, 0.554758, 1.001630, -1.259365, 0.044151, -0.314138, 0.226708, 0.996692, 1.215912, -0.542702, 0.912228, --0.172141, -0.335955, 0.541487, 0.932111, -0.570253, -1.498605, -0.050346, 0.553025, -0.083498, 1.577524, -0.330774, 0.795155, -0.784800, -1.263121, 0.666655, -1.392632, --1.300562, -0.605022, -1.488565, 0.558543, -0.277354, -1.293685, -0.888435, -0.986520, --0.071618, -2.414591, -0.694349, -1.391389, 0.329648, 0.598544, 0.147175, -0.101439, --2.634981, 0.028053, -0.876310, -0.265477, -0.327578, -1.158247, 0.580053, 0.239756, --0.350885, 0.892098, 1.578299, -1.108174, -0.025931, -1.110628, 0.750834, 0.500167, --0.517261, -0.559209, -0.753371, 0.925813, -0.248520, -0.149835, -1.258415, 0.312620, -2.690277, 0.289696, -1.422803, 0.246786, -1.435773, 0.148573, -1.693073, 0.719188, -1.141773, 1.551936, 1.383630, -0.758092, 0.442663, 0.911098, -1.074086, 0.201762, -0.762863, -1.288187, -0.952962, 0.778175, -0.006331, 0.524487, 1.364272, 0.482039, --0.787066, 0.751999, -0.166888, -0.816228, 2.094065, 0.080153, -0.937295, 0.635739, -1.682028, 0.593634, 0.790153, 0.105254, -0.158579, 0.870907, -0.194759, 0.075474, --0.526635, -0.685484, -0.268388, -1.188346, 0.248579, 0.102452, -0.041007, -2.247582, --0.510776, 0.249243, 0.369197, 0.179197, -0.037283, -1.603310, 0.339372, -0.131135, -0.485190, 0.598751, -0.086031, 0.325292, -0.335143, -0.322449, -0.382374, -0.953371, -0.233576, 1.235245, -0.578532, -0.501537, 0.722864, 0.039498, 1.541279, -1.701053, --1.033741, -0.763708, 2.176426, 0.431612, -0.443765, 0.029996, -0.315671, 0.977846, -0.018295, 0.817963, 0.702341, -0.231271, -0.113690, 0.127941, -0.799410, -0.238612, --0.089463, -1.023264, 0.937538, -1.131719, -0.710702, -1.169501, 1.065437, -0.680394, --1.725773, 0.813200, 1.441867, 0.672272, 0.138665, -0.859534, -0.752251, 1.229615, -1.150754, -0.608025, 0.806158, 0.217133, -0.373461, -0.832030, 0.286866, -1.818892, --1.573051, 2.015666, -0.071982, 2.628909, -0.243317, 0.173276, 0.923207, -0.178553, --0.521705, 1.431962, -0.870117, 0.807542, -0.510635, 0.743514, 0.847898, -0.829901, -0.532994, 1.032848, -1.052024, 0.362114, -0.036787, -1.227636, -0.275099, -0.160435, --1.083575, -1.954213, -0.909487, -0.005579, -1.723490, 1.263077, -0.600433, -2.063925, -0.110911, 1.487614, 0.053002, 0.161981, -0.026878, 0.173576, 0.882168, 0.182294, -0.755295, 0.508035, 0.131880, 0.280104, -0.982848, -0.944087, -0.013058, 0.354345, --0.894709, 0.812111, 0.109537, 2.731644, 0.411079, -1.306862, 0.383806, 0.499504, --0.510786, 0.234922, -0.597825, 0.020771, 0.419443, 1.191104, 0.771214, -2.644222, -0.285430, 0.826093, -0.008122, 0.858438, 0.774788, 1.305945, 1.231503, 0.958564, --1.654548, -0.990396, 0.685236, -0.974870, -0.606726, 0.686794, 0.020049, 1.063801, --1.341050, 0.479510, -1.633974, -1.442665, 0.293781, -0.140364, -1.130341, -0.292538, --0.582536, -0.896348, 0.248601, -1.489663, 0.313509, -2.025084, 0.528990, 0.343471, -0.758193, -0.691940, 0.680179, -1.072541, 0.899772, -2.123092, 0.284712, -0.733323, --0.773376, 0.151842, -0.336843, 0.970761, -0.107236, 1.013492, -0.475347, 0.068948, -0.398592, 1.116326, 0.620451, -0.287674, -1.371773, -0.685868, 0.331685, -0.997722, -0.291418, 1.107078, 0.244959, 0.164976, 0.406231, 1.215981, 1.448424, -1.025137, -0.205418, 0.588882, -0.264024, 2.495318, 0.855948, -0.850954, 0.811879, 0.700242, -0.759938, -1.712909, 1.537021, -1.609847, 1.109526, -1.109704, 0.385469, 0.965231, -0.818297, 0.037049, -0.926012, -0.111919, -0.803030, -1.665006, -0.901401, 0.588350, -0.554159, -0.415173, 0.061795, 0.457432, 0.199014, 0.257558, 2.080730, -2.277237, -0.339022, 0.289894, 0.662261, -0.580860, 0.887752, 0.171871, 0.848821, 0.963769, -1.321918, -0.064345, 1.317053, 0.228017, -1.429637, -0.149701, -0.504968, -1.729141, --0.417472, -0.614969, 0.720777, 0.339364, 0.882845, 0.284245, -0.145541, -0.089646, -0.289161, 1.164831, 0.805729, -1.355643, 0.120893, -0.222178, 0.571732, -0.300140, -1.134277, -0.179356, -1.467067, 1.395346, 0.440836, 0.565384, -0.693623, 0.833869, --2.237378, 1.097644, -0.001617, -1.614573, -1.228727, 0.207405, 0.220942, -1.006073, --0.453067, 1.399453, -0.461964, 0.032716, 0.798783, 0.896816, 0.137892, -1.619146, --1.646606, 0.428707, -0.737231, 0.564926, -1.384167, 0.460268, 0.629384, 0.379847, --1.013330, -0.347243, 0.441912, -1.590240, -0.701417, -1.077601, 1.002220, 1.729481, -0.709032, -0.747897, 0.228862, -0.223497, -0.853275, 0.345627, 0.109764, -1.133039, --0.683124, -0.277856, 0.654790, -1.248394, -0.597539, -0.481813, 0.983372, 1.762121, -1.427402, 0.911763, 0.326823, 0.069619, -1.499763, -0.418223, -0.021037, 0.228425, --1.008196, -0.664622, 0.558177, -1.188542, -0.775481, 0.271042, 1.534976, -1.052283, -0.625559, -0.797626, -0.313522, -0.602210, 1.259060, 0.858484, -2.105292, -0.360937, -0.553557, -1.556384, -0.206666, -0.425568, 0.493778, -0.870908, 0.079828, -0.521619, --1.413861, -0.384293, -0.457922, -0.291471, -0.301224, -1.588594, 1.094287, 1.324167, --0.126480, -0.737164, 0.213719, -0.400529, 0.064938, -1.757996, 1.686748, 0.327400, -0.715967, 1.598648, -2.064741, -0.743632, 0.176185, 0.527839, -0.553153, 0.298280, --1.226607, -0.189676, -0.301713, 0.956956, -0.533366, -0.901082, -0.892552, 0.278717, --0.745807, 1.603464, 0.574270, 0.320655, -0.151383, 0.315762, 1.343703, -2.237832, -1.292906, -0.378459, 0.002521, 0.884641, 0.582450, -1.614244, -1.503666, 0.573586, --0.910537, -1.631277, -0.359138, -0.397616, -1.161307, -1.109838, 0.290672, -1.910239, -1.314768, 0.665319, -0.275115, -0.023022, -0.907976, -1.043657, 0.373516, 0.901532, -1.278539, -0.128456, 0.612821, 1.956518, 2.266326, -0.373959, 2.238039, -0.159580, --0.703281, 0.563477, -0.050296, 1.163593, 0.658808, -1.550089, -3.029118, 0.540578, --1.008998, 0.908047, 1.582303, -0.979088, 1.007902, 0.158491, -0.586927, 1.574082, --0.516649, 1.227800, 1.583876, -2.088950, 2.949545, 1.356125, 1.050068, -0.767170, --0.257653, -1.371845, -1.267656, -0.894948, 0.589089, 1.842629, 1.347967, -0.491253, --2.177568, 0.237000, -0.735411, -1.779419, 0.448030, 0.581214, 0.856607, -0.266263, --0.417470, -0.205806, -0.174323, 0.217577, 1.684295, 0.119528, 0.650667, 2.080061, --0.339225, 0.730113, 0.293969, -0.849109, -2.533858, -2.378941, -0.346276, -0.610937, --0.408192, -1.415611, 0.227122, 0.207974, -0.719718, 0.757762, -1.643135, -1.056813, --0.251662, -1.298441, 1.233255, 1.494625, 0.235938, -1.404359, 0.658791, -2.556613, --0.534945, 3.202525, 0.439198, -1.149901, 0.886765, -0.283386, 1.035336, -0.364878, -1.341987, 1.008872, 0.213874, -0.299264, 0.255849, -0.190826, -0.079060, 0.699851, --0.796540, -0.801284, -0.007599, -0.726810, -1.490902, 0.870335, -0.265675, -1.566695, --0.394636, -0.143855, -2.334247, -1.357539, -1.815689, 1.108422, -0.142115, 1.112757, -0.559264, 0.478370, -0.679385, 0.284967, -1.332935, -0.723980, -0.663600, 0.198443, --1.794868, -1.387673, 0.197768, 1.469328, 0.366493, -0.442775, -0.048563, 0.077709, -1.957910, -0.072848, 0.938810, -0.079608, -0.800959, 0.309424, 1.051826, -1.664211, --1.090792, -0.191731, 0.463401, -0.924147, -0.649657, 0.622893, -1.335107, 1.047689, -0.863327, -0.642411, 0.660010, 1.294116, 0.314579, 0.859573, 0.128670, 0.016568, --0.072801, -0.994310, -0.747358, -0.030814, 0.988355, -0.599017, 1.476644, -0.813801, -0.645040, -1.309919, -0.867425, -0.474233, 0.222417, 1.871323, 0.110001, -0.411341, -0.511242, -1.199117, -0.096361, 0.445817, -0.295825, -0.167996, 0.179543, 0.421118, -1.677678, 1.996949, 0.696964, -1.366382, 0.363045, -0.567044, -1.044154, 0.697139, -0.484026, -0.193751, -0.378095, -0.886374, -1.840197, -1.628195, -1.173789, -0.415411, -0.175088, 0.229433, -1.240889, 0.700004, 0.426877, 1.454803, -0.510186, -0.006657, --0.525496, 0.717698, 1.088374, 0.500552, 2.771790, -0.160309, 0.429489, -1.966817, --0.546019, -1.888395, -0.107952, -1.316144, -0.672632, -0.902365, -0.154798, 0.947242, -1.550375, 0.429040, -0.560795, 0.179304, -0.771509, -0.943390, -1.407569, -1.906131, --0.065293, 0.672149, 0.206147, -0.008124, 0.020042, -0.558447, 1.886079, -0.219975, --1.414395, -0.302811, -0.569574, -0.121495, -0.390171, -0.844287, -1.737757, -0.449520, --1.547933, -0.095776, 0.907714, 2.369602, 0.519768, 0.410525, 1.052585, 0.428784, -1.295088, -0.186053, 0.130733, -0.657627, -0.759267, -0.595170, 0.812400, 0.069541, --1.833687, 1.827363, 0.654075, -1.544769, -0.375109, 0.207688, -0.765615, -0.106355, -0.338769, 1.033461, -1.404822, -1.030570, -0.643372, 0.170787, 1.344839, 1.936273, -0.741336, 0.811980, -0.142808, -0.099858, -0.800131, 0.493249, 1.237574, 1.295951, --0.278196, 0.217127, 0.630728, -0.548549, 0.229632, 0.355311, 0.521284, -0.615971, -1.345803, 0.974922, -2.377934, -1.092319, -0.325710, -2.012228, 1.567660, 0.233337, -0.646420, -1.129412, 0.197038, 1.696870, 0.726034, 0.792526, 0.603357, -0.058405, --1.108666, 2.144229, -1.352821, 0.457021, 0.391175, 2.073013, -0.323318, 1.468132, --0.502399, 0.209593, 0.754800, -0.948189, 0.613157, 1.760503, 0.088762, 2.595570, --0.675470, 2.786804, -0.016827, 0.271651, -0.914102, -1.951371, -0.317418, 0.588333, -0.828996, -1.674851, -1.922293, -0.436662, 0.044974, 2.416609, -0.309892, 0.187583, -0.947699, -0.525703, -1.115605, -1.592320, 1.174844, 0.485144, 1.645480, -0.454233, -1.008768, 2.049403, 0.602020, 0.017860, -1.610426, 1.238752, 0.683587, -0.780716, -0.530979, 2.134498, 0.354361, 0.231700, 1.287980, -0.013488, -1.333345, -0.556343, -0.755597, -0.911854, 1.371684, 0.245580, 0.118845, 0.384690, -0.070152, -0.578309, -0.469308, 1.299687, 1.634798, -0.702809, 0.807253, -1.027451, 1.294496, 0.014930, -0.218705, 1.713188, -2.078805, 0.112917, -1.086491, -1.558311, 0.637406, -0.404576, --0.403325, 0.084076, -0.435349, -0.562623, 0.878062, -0.814650, -0.258363, 0.493299, --0.802694, -0.008329, 0.627571, 0.154382, 2.580735, -1.306246, 1.023526, 0.777795, --0.833884, -0.586663, 0.065664, -0.012342, -0.076987, -1.558587, 1.702607, -0.468984, -0.094619, 0.287071, 0.919354, 0.510136, 0.245440, -1.400519, 0.969571, 1.593698, --1.437917, -1.534230, -0.074710, 0.081459, -0.843240, -0.564640, -0.028207, -1.243702, -0.733039, 0.059580, 0.149144, 1.595857, -0.777250, 1.550277, 1.055002, -0.166654, -0.314484, 1.419571, 0.327348, 0.475653, 0.398754, -0.072770, 1.314784, 0.978279, -1.722114, -0.412302, 0.565133, 0.739851, 0.220138, 1.312807, 0.629152, -1.107987, --0.447001, -0.725993, 0.354045, -0.506772, -2.103747, -0.664684, 1.450110, -0.329805, -2.701872, -1.634939, -0.536325, 0.547223, 1.492603, -0.455243, -0.496416, 1.235260, -0.040926, 0.748467, 1.230764, 0.304903, 1.077771, 0.765151, -1.319580, -0.509191, -0.555116, -1.957625, -0.760453, -2.443886, -0.659366, -0.114779, 0.300079, -0.583996, --3.073745, 1.551042, -0.407369, 1.428095, -1.353242, 0.903970, 0.541671, -0.465020 -}; - - - -/* ---------------------------------------------------------------------- -** Coefficients for 32-tap filter for Floating point LMS FIR filter -* FIR high pass filter with cutoff freq 9.6kHz (transition 9.6KHz to 11.52KHz) -** ------------------------------------------------------------------- */ -float32_t lmsNormCoeff_f32[32] = { --0.004240, 0.002301, 0.008860, -0.000000, -0.019782, -0.010543, 0.032881, 0.034736, --0.037374, -0.069586, 0.022397, 0.102169, 0.014185, -0.115908, -0.061648, 0.101018, -0.101018, -0.061648, -0.115908, 0.014185, 0.102169, 0.022397, -0.069586, -0.037374, -0.034736, 0.032881, -0.010543, -0.019782, -0.000000, 0.008860, 0.002301, -0.004240 - -}; - -/* ---------------------------------------------------------------------- -** Coefficients for 32-tap filter for Floating point FIR filter -* FIR low pass filter with cutoff freq 24Hz (transition 24Hz to 240Hz) -** ------------------------------------------------------------------- */ -const float32_t FIRCoeff_f32[32] = { -0.004502, 0.005074, 0.006707, 0.009356, 0.012933, 0.017303, 0.022298, 0.027717, -0.033338, 0.038930, 0.044258, 0.049098, 0.053243, 0.056519, 0.058784, 0.059941, -0.059941, 0.058784, 0.056519, 0.053243, 0.049098, 0.044258, 0.038930, 0.033338, -0.027717, 0.022298, 0.017303, 0.012933, 0.009356, 0.006707, 0.005074, 0.004502 - -}; - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/arm_signal_converge_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/arm_signal_converge_example_f32.c deleted file mode 100644 index 7e6d661..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/arm_signal_converge_example_f32.c +++ /dev/null @@ -1,271 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_signal_converge_example_f32.c -* -* Description: Example code demonstrating convergence of an adaptive -* filter. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup SignalConvergence Signal Convergence Example - * - * \par Description: - * \par - * Demonstrates the ability of an adaptive filter to "learn" the transfer function of - * a FIR lowpass filter using the Normalized LMS Filter, Finite Impulse - * Response (FIR) Filter, and Basic Math Functions. - * - * \par Algorithm: - * \par - * The figure below illustrates the signal flow in this example. Uniformly distributed white - * noise is passed through an FIR lowpass filter. The output of the FIR filter serves as the - * reference input of the adaptive filter (normalized LMS filter). The white noise is input - * to the adaptive filter. The adaptive filter learns the transfer function of the FIR filter. - * The filter outputs two signals: (1) the output of the internal adaptive FIR filter, and - * (2) the error signal which is the difference between the adaptive filter and the reference - * output of the FIR filter. Over time as the adaptive filter learns the transfer function - * of the FIR filter, the first output approaches the reference output of the FIR filter, - * and the error signal approaches zero. - * \par - * The adaptive filter converges properly even if the input signal has a large dynamic - * range (i.e., varies from small to large values). The coefficients of the adaptive filter - * are initially zero, and then converge over 1536 samples. The internal function test_signal_converge() - * implements the stopping condition. The function checks if all of the values of the error signal have a - * magnitude below a threshold DELTA. - * - * \par Block Diagram: - * \par - * \image html SignalFlow.gif - * - * - * \par Variables Description: - * \par - * \li \c testInput_f32 points to the input data - * \li \c firStateF32 points to FIR state buffer - * \li \c lmsStateF32 points to Normalised Least mean square FIR filter state buffer - * \li \c FIRCoeff_f32 points to coefficient buffer - * \li \c lmsNormCoeff_f32 points to Normalised Least mean square FIR filter coefficient buffer - * \li \c wire1, wir2, wire3 temporary buffers - * \li \c errOutput, err_signal temporary error buffers - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_lms_norm_init_f32() - * - arm_fir_init_f32() - * - arm_fir_f32() - * - arm_lms_norm_f32() - * - arm_scale_f32() - * - arm_abs_f32() - * - arm_sub_f32() - * - arm_min_f32() - * - arm_copy_f32() - * - * Refer - * \link arm_signal_converge_example_f32.c \endlink - * - */ - - -/** \example arm_signal_converge_example_f32.c - */ - -#include "arm_math.h" -#include "math_helper.h" - -#if defined(SEMIHOSTING) -#include -#endif - -/* ---------------------------------------------------------------------- -** Global defines for the simulation -* ------------------------------------------------------------------- */ - -#define TEST_LENGTH_SAMPLES 1536 -#define NUMTAPS 32 -#define BLOCKSIZE 32 -#define DELTA_ERROR 0.00009f -#define DELTA_COEFF 0.0001f -#define MU 0.5f - -#define NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE) - -/* ---------------------------------------------------------------------- -* Declare FIR state buffers and structure -* ------------------------------------------------------------------- */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -float32_t firStateF32[2 * BLOCKSIZE + NUMTAPS - 1]; -#else -float32_t firStateF32[NUMTAPS + BLOCKSIZE]; -#endif - -arm_fir_instance_f32 LPF_instance; - -/* ---------------------------------------------------------------------- -* Declare LMSNorm state buffers and structure -* ------------------------------------------------------------------- */ - -float32_t lmsStateF32[NUMTAPS + BLOCKSIZE]; -float32_t errOutput[TEST_LENGTH_SAMPLES]; -arm_lms_norm_instance_f32 lmsNorm_instance; - - -/* ---------------------------------------------------------------------- -* Function Declarations for Signal Convergence Example -* ------------------------------------------------------------------- */ - -arm_status test_signal_converge_example( void ); - - -/* ---------------------------------------------------------------------- -* Internal functions -* ------------------------------------------------------------------- */ -arm_status test_signal_converge(float32_t* err_signal, - uint32_t blockSize); - -void getinput(float32_t* input, - uint32_t fr_cnt, - uint32_t blockSize); - -/* ---------------------------------------------------------------------- -* External Declarations for FIR F32 module Test -* ------------------------------------------------------------------- */ -extern float32_t testInput_f32[TEST_LENGTH_SAMPLES]; -extern float32_t lmsNormCoeff_f32[32]; -extern const float32_t FIRCoeff_f32[32]; -extern arm_lms_norm_instance_f32 lmsNorm_instance; - -/* ---------------------------------------------------------------------- -* Declare I/O buffers -* ------------------------------------------------------------------- */ - -float32_t wire1[BLOCKSIZE]; -float32_t wire2[BLOCKSIZE]; -float32_t wire3[BLOCKSIZE]; -float32_t err_signal[BLOCKSIZE]; - -/* ---------------------------------------------------------------------- -* Signal converge test -* ------------------------------------------------------------------- */ - -int32_t main(void) -{ - uint32_t i; - arm_status status; - uint32_t index; - float32_t minValue; - - /* Initialize the LMSNorm data structure */ - arm_lms_norm_init_f32(&lmsNorm_instance, NUMTAPS, lmsNormCoeff_f32, lmsStateF32, MU, BLOCKSIZE); - - /* Initialize the FIR data structure */ - arm_fir_init_f32(&LPF_instance, NUMTAPS, (float32_t *)FIRCoeff_f32, firStateF32, BLOCKSIZE); - - /* ---------------------------------------------------------------------- - * Loop over the frames of data and execute each of the processing - * functions in the system. - * ------------------------------------------------------------------- */ - - for(i=0; i < NUMFRAMES; i++) - { - /* Read the input data - uniformly distributed random noise - into wire1 */ - arm_copy_f32(testInput_f32 + (i * BLOCKSIZE), wire1, BLOCKSIZE); - - /* Execute the FIR processing function. Input wire1 and output wire2 */ - arm_fir_f32(&LPF_instance, wire1, wire2, BLOCKSIZE); - - /* Execute the LMS Norm processing function*/ - - arm_lms_norm_f32(&lmsNorm_instance, /* LMSNorm instance */ - wire1, /* Input signal */ - wire2, /* Reference Signal */ - wire3, /* Converged Signal */ - err_signal, /* Error Signal, this will become small as the signal converges */ - BLOCKSIZE); /* BlockSize */ - - /* apply overall gain */ - arm_scale_f32(wire3, 5, wire3, BLOCKSIZE); /* in-place buffer */ - } - - status = ARM_MATH_SUCCESS; - - /* ------------------------------------------------------------------------------- - * Test whether the error signal has reached towards 0. - * ----------------------------------------------------------------------------- */ - - arm_abs_f32(err_signal, err_signal, BLOCKSIZE); - arm_min_f32(err_signal, BLOCKSIZE, &minValue, &index); - - if (minValue > DELTA_ERROR) - { - status = ARM_MATH_TEST_FAILURE; - } - - /* ---------------------------------------------------------------------- - * Test whether the filter coefficients have converged. - * ------------------------------------------------------------------- */ - - arm_sub_f32((float32_t *)FIRCoeff_f32, lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS); - - arm_abs_f32(lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS); - arm_min_f32(lmsNormCoeff_f32, NUMTAPS, &minValue, &index); - - status = (minValue > DELTA_COEFF) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS; - - if (status != ARM_MATH_SUCCESS) - { -#if defined (SEMIHOSTING) - printf("FAILURE\n"); -#else - while (1); /* main function does not return */ -#endif - } - else - { -#if defined (SEMIHOSTING) - printf("SUCCESS\n"); -#else - while (1); /* main function does not return */ -#endif - } - -} - - /** \endlink */ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/math_helper.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/math_helper.c deleted file mode 100644 index db464cb..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/math_helper.c +++ /dev/null @@ -1,472 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 b -* -* Project: CMSIS DSP Library -* -* Title: math_helper.c -* -* Description: Definition of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/* ---------------------------------------------------------------------- -* Include standard header files -* -------------------------------------------------------------------- */ -#include - -/* ---------------------------------------------------------------------- -* Include project header files -* -------------------------------------------------------------------- */ -#include "math_helper.h" - -/** - * @brief Caluclation of SNR - * @param[in] pRef Pointer to the reference buffer - * @param[in] pTest Pointer to the test buffer - * @param[in] buffSize total number of samples - * @return SNR - * The function Caluclates signal to noise ratio for the reference output - * and test output - */ - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) -{ - float EnergySignal = 0.0, EnergyError = 0.0; - uint32_t i; - float SNR; - int temp; - int *test; - - for (i = 0; i < buffSize; i++) - { - /* Checking for a NAN value in pRef array */ - test = (int *)(&pRef[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - /* Checking for a NAN value in pTest array */ - test = (int *)(&pTest[i]); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - EnergySignal += pRef[i] * pRef[i]; - EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); - } - - /* Checking for a NAN value in EnergyError */ - test = (int *)(&EnergyError); - temp = *test; - - if (temp == 0x7FC00000) - { - return(0); - } - - - SNR = 10 * log10 (EnergySignal / EnergyError); - - return (SNR); - -} - - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Converts float to fixed in q12.20 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to outputbuffer - * @param[in] numSamples number of samples in the input buffer - * @return none - * The function converts floating point values to fixed point(q12.20) values - */ - -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1048576.0f corresponds to pow(2, 20) */ - pOut[i] = (q31_t) (pIn[i] * 1048576.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 1.0) - { - pOut[i] = 0x000FFFFF; - } - } -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Compare MATLAB Reference Output and ARM Test output - * @param[in] pIn Pointer to Ref buffer - * @param[in] pOut Pointer to Test buffer - * @param[in] numSamples number of samples in the buffer - * @return maximum difference - */ - -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - int32_t diff, diffCrnt = 0; - uint32_t maxDiff = 0; - - for (i = 0; i < numSamples; i++) - { - diff = pIn[i] - pOut[i]; - diffCrnt = (diff > 0) ? diff : -diff; - - if (diffCrnt > maxDiff) - { - maxDiff = diffCrnt; - } - } - - return(maxDiff); -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q31 (q31_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - -/** - * @brief Provide guard bits for Input buffer - * @param[in,out] input_buf Pointer to input buffer - * @param[in] blockSize block Size - * @param[in] guard_bits guard bits - * @return none - * The function Provides the guard bits for the buffer - * to avoid overflow - */ - -void arm_provide_guard_bits_q7 (q7_t * input_buf, - uint32_t blockSize, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < blockSize; i++) - { - input_buf[i] = input_buf[i] >> guard_bits; - } -} - - - -/** - * @brief Caluclates number of guard bits - * @param[in] num_adds number of additions - * @return guard bits - * The function Caluclates the number of guard bits - * depending on the numtaps - */ - -uint32_t arm_calc_guard_bits (uint32_t num_adds) -{ - uint32_t i = 1, j = 0; - - if (num_adds == 1) - { - return (0); - } - - while (i < num_adds) - { - i = i * 2; - j++; - } - - return (j); -} - -/** - * @brief Apply guard bits to buffer - * @param[in,out] pIn pointer to input buffer - * @param[in] numSamples number of samples in the input buffer - * @param[in] guard_bits guard bits - * @return none - */ - -void arm_apply_guard_bits (float32_t *pIn, - uint32_t numSamples, - uint32_t guard_bits) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); - } -} - -/** - * @brief Calculates pow(2, numShifts) - * @param[in] numShifts number of shifts - * @return pow(2, numShifts) - */ -uint32_t arm_calc_2pow(uint32_t numShifts) -{ - - uint32_t i, val = 1; - - for (i = 0; i < numShifts; i++) - { - val = val * 2; - } - - return(val); -} - - - -/** - * @brief Converts float to fixed q14 - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 16384.0f corresponds to pow(2, 14) */ - pOut[i] = (q15_t) (pIn[i] * 16384.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFF; - } - - } - -} - - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 2.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - -/** - * @brief Converts float to fixed q30 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 1073741824.0f corresponds to pow(2, 30) */ - pOut[i] = (q31_t) (pIn[i] * 536870912.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 4.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - - -/** - * @brief Converts float to fixed q28 format - * @param[in] pIn pointer to input buffer - * @param[out] pOut pointer to output buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - /* 268435456.0f corresponds to pow(2, 28) */ - pOut[i] = (q31_t) (pIn[i] * 268435456.0f); - - pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; - - if (pIn[i] == (float) 8.0) - { - pOut[i] = 0x7FFFFFFF; - } - } -} - -/* - -Conflicting with the new clip functions in CMSIS-DSP and not used -in the examples. - -*/ -#if 0 -/** - * @brief Clip the float values to +/- 1 - * @param[in,out] pIn input buffer - * @param[in] numSamples number of samples in the buffer - * @return none - * The function converts floating point values to fixed point values - */ - -void arm_clip_f32 (float *pIn, uint32_t numSamples) -{ - uint32_t i; - - for (i = 0; i < numSamples; i++) - { - if (pIn[i] > 1.0f) - { - pIn[i] = 1.0; - } - else if ( pIn[i] < -1.0f) - { - pIn[i] = -1.0; - } - - } -} - -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/math_helper.h b/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/math_helper.h deleted file mode 100644 index b35feb8..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_signal_converge_example/math_helper.h +++ /dev/null @@ -1,62 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2013 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* -* Title: math_helper.h -* -* Description: Prototypes of all helper functions required. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" - -#ifndef MATH_HELPER_H -#define MATH_HELPER_H - -float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize); -void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); -void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); -void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); -void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); -void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_guard_bits(uint32_t num_adds); -void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); -uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); -uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); -uint32_t arm_calc_2pow(uint32_t guard_bits); -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/Abstract.txt deleted file mode 100644 index 59141e8..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_sin_cos_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/CMakeLists.txt deleted file mode 100644 index 8dc8c2c..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_sin_cos_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_sin_cos_example) - - -include(config) -configApp(arm_sin_cos_example ${ROOT}) - -target_sources(arm_sin_cos_example PRIVATE arm_sin_cos_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_sin_cos_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/arm_sin_cos_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/arm_sin_cos_example_f32.c deleted file mode 100644 index 4d409cd..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_sin_cos_example/arm_sin_cos_example_f32.c +++ /dev/null @@ -1,177 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 12. March 2014 -* $Revision: V1.4.3 -* -* Project: CMSIS DSP Library -* Title: arm_sin_cos_example_f32.c -* -* Description: Example code demonstrating sin and cos calculation of input signal. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup SinCosExample SineCosine Example - * - * \par Description: - * \par - * Demonstrates the Pythagorean trignometric identity with the use of Cosine, Sine, Vector - * Multiplication, and Vector Addition functions. - * - * \par Algorithm: - * \par - * Mathematically, the Pythagorean trignometric identity is defined by the following equation: - * 
sin(x) * sin(x) + cos(x) * cos(x) = 1
- * where \c x is the angle in radians. - * - * \par Block Diagram: - * \par - * \image html sinCos.gif - * - * \par Variables Description: - * \par - * \li \c testInput_f32 array of input angle in radians - * \li \c testOutput stores sum of the squares of sine and cosine values of input angle - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_cos_f32() - * - arm_sin_f32() - * - arm_mult_f32() - * - arm_add_f32() - * - * Refer - * \link arm_sin_cos_example_f32.c \endlink - * - */ - - -/** \example arm_sin_cos_example_f32.c - */ - -#include -#include "arm_math.h" - -#if defined(SEMIHOSTING) -#include -#endif - -/* ---------------------------------------------------------------------- -* Defines each of the tests performed -* ------------------------------------------------------------------- */ -#define MAX_BLOCKSIZE 32 -#define DELTA (0.0001f) - - -/* ---------------------------------------------------------------------- -* Test input data for Floating point sin_cos example for 32-blockSize -* Generated by the MATLAB randn() function -* ------------------------------------------------------------------- */ - -const float32_t testInput_f32[MAX_BLOCKSIZE] = -{ - -1.244916875853235400, -4.793533929171324800, 0.360705030233248850, 0.827929644170887320, -3.299532218312426900, 3.427441903227623800, 3.422401784294607700, -0.108308165334010680, - 0.941943896490312180, 0.502609575000365850, -0.537345278736373500, 2.088817392965764500, -1.693168684143455700, 6.283185307179590700, -0.392545884746175080, 0.327893095115825040, - 3.070147440456292300, 0.170611405884662230, -0.275275082396073010, -2.395492805446796300, 0.847311163536506600, -3.845517018083148800, 2.055818378415868300, 4.672594161978930800, - -1.990923030266425800, 2.469305197656249500, 3.609002606064021000, -4.586736582331667500, -4.147080139136136300, 1.643756718868359500, -1.150866392366494800, 1.985805026477433800 - - -}; - -const float32_t testRefOutput_f32 = 1.000000000; - -/* ---------------------------------------------------------------------- -* Declare Global variables -* ------------------------------------------------------------------- */ -uint32_t blockSize = 32; -float32_t testOutput; -float32_t cosOutput; -float32_t sinOutput; -float32_t cosSquareOutput; -float32_t sinSquareOutput; - -/* ---------------------------------------------------------------------- -* Max magnitude FFT Bin test -* ------------------------------------------------------------------- */ - -arm_status status; - -int32_t main(void) -{ - float32_t diff; - uint32_t i; - - for(i=0; i< blockSize; i++) - { - cosOutput = arm_cos_f32(testInput_f32[i]); - sinOutput = arm_sin_f32(testInput_f32[i]); - - arm_mult_f32(&cosOutput, &cosOutput, &cosSquareOutput, 1); - arm_mult_f32(&sinOutput, &sinOutput, &sinSquareOutput, 1); - - arm_add_f32(&cosSquareOutput, &sinSquareOutput, &testOutput, 1); - - /* absolute value of difference between ref and test */ - diff = fabsf(testRefOutput_f32 - testOutput); - - /* Comparison of sin_cos value with reference */ - status = (diff > DELTA) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS; - - if ( status == ARM_MATH_TEST_FAILURE) - { - break; - } - } - - if (status != ARM_MATH_SUCCESS) - { -#if defined (SEMIHOSTING) - printf("FAILURE\n"); -#else - while (1); /* main function does not return */ -#endif - } - else - { -#if defined (SEMIHOSTING) - printf("SUCCESS\n"); -#else - while (1); /* main function does not return */ -#endif - } - -} - - /** \endlink */ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/Abstract.txt deleted file mode 100644 index 82c399d..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_svm_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/CMakeLists.txt deleted file mode 100644 index 1ab1bfb..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_svm_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_svm_example) - - -include(config) -configApp(arm_svm_example ${ROOT}) - -target_sources(arm_svm_example PRIVATE arm_svm_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_svm_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/arm_svm_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/arm_svm_example_f32.c deleted file mode 100644 index a8b5c1c..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_svm_example/arm_svm_example_f32.c +++ /dev/null @@ -1,163 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2019-2020 ARM Limited. All rights reserved. -* -* $Date: 09. December 2019 -* $Revision: V1.0.0 -* -* Project: CMSIS DSP Library -* Title: arm_svm_example_f32.c -* -* Description: Example code demonstrating how to use SVM functions. -* -* Target Processor: Cortex-M/Cortex-A -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup SVMExample SVM Example - * - * \par Description: - * \par - * Demonstrates the use of SVM functions. It is complementing the tutorial - * about classical ML with CMSIS-DSP and python scikit-learn: - * https://developer.arm.com/solutions/machine-learning-on-arm/developer-material/how-to-guides/implement-classical-ml-with-arm-cmsis-dsp-libraries - * - */ - - -/** \example arm_svm_example_f32.c - */ - -#include -#include -#include "arm_math.h" - -/* - The polynomial SVM instance containing all parameters. - Those parameters can be generated with the python library scikit-learn. - */ -arm_svm_polynomial_instance_f32 params; - -/* - Parameters generated by a training of the SVM classifier - using scikit-learn and some random input data. - */ -#define NB_SUPPORT_VECTORS 11 - -/* - Dimension of the vector space. A vector is your feature. - It could, for instance, be the pixels of a picture or the FFT of a signal. - */ -#define VECTOR_DIMENSION 2 - -const float32_t dualCoefficients[NB_SUPPORT_VECTORS]={-0.01628988f, -0.0971605f, - -0.02707579f, 0.0249406f, 0.00223095f, 0.04117345f, - 0.0262687f, 0.00800358f, 0.00581823f, 0.02346904f, 0.00862162f}; /* Dual coefficients */ - -const float32_t supportVectors[NB_SUPPORT_VECTORS*VECTOR_DIMENSION]={ 1.2510991f, 0.47782799f, - -0.32711859f, -1.49880648f, -0.08905047f, 1.31907242f, - 1.14059333f, 2.63443767f, -2.62561524f, 1.02120701f, - -1.2361353f, -2.53145187f, - 2.28308122f, -1.58185875f, 2.73955981f, 0.35759327f, - 0.56662986f, 2.79702016f, - -2.51380816f, 1.29295364f, -0.56658669f, -2.81944734f}; /* Support vectors */ - -/* - Class A is identified with value 0. - Class B is identified with value 1. - - This array is used by the SVM functions to do a conversion and ease the comparison - with the Python code where different values could be used. - */ -const int32_t classes[2]={0,1}; - - -int32_t main(void) -{ - /* Array of input data */ - float32_t in[VECTOR_DIMENSION]; - - /* Result of the classifier */ - int32_t result; - - - /* - Initialization of the SVM instance parameters. - Additional parameters (intercept, degree, coef0 and gamma) are also coming from Python. - */ - arm_svm_polynomial_init_f32(¶ms, - NB_SUPPORT_VECTORS, - VECTOR_DIMENSION, - -1.661719f, /* Intercept */ - dualCoefficients, - supportVectors, - classes, - 3, /* degree */ - 1.100000f, /* Coef0 */ - 0.500000f /* Gamma */ - ); - - - /* - Input data. - It is corresponding to a point inside the first class. - */ - in[0] = 0.4f; - in[1] = 0.1f; - - arm_svm_polynomial_predict_f32(¶ms, in, &result); - - /* Result should be 0 : First class */ -#if defined(SEMIHOSTING) - printf("Result = %d\n", result); -#endif - - /* - This input vector is corresponding to a point inside the second class. - */ - in[0] = 3.0f; - in[1] = 0.0f; - - arm_svm_polynomial_predict_f32(¶ms, in, &result); - - /* Result should be 1 : Second class */ -#if defined(SEMIHOSTING) - printf("Result = %d\n", result); -#endif - -#if !defined(SEMIHOSTING) - while (1); /* main function does not return */ -#endif -} - - - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM0_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM0_config.txt deleted file mode 100644 index 2296d1b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM0_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM3_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM3_config.txt deleted file mode 100644 index 69994ea..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM3_config.txt +++ /dev/null @@ -1,8 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM4_FP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM4_FP_config.txt deleted file mode 100644 index c67eb9b..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM4_FP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM55_FP_MVE_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM55_FP_MVE_config.txt deleted file mode 100644 index 0ca3729..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM55_FP_MVE_config.txt +++ /dev/null @@ -1,25 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -# -cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included -cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU) -cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset -cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM7_SP_config.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM7_SP_config.txt deleted file mode 100644 index c0ace4f..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/ARMCM7_SP_config.txt +++ /dev/null @@ -1,9 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#------------------------------------------------------------------------------ -armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) -armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) -armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) -armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -#------------------------------------------------------------------------------ diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/Abstract.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/Abstract.txt deleted file mode 100644 index 5caf64c..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/Abstract.txt +++ /dev/null @@ -1,10 +0,0 @@ -CMSIS DSP_Lib example arm_variance_example. - -The example is available for different targets: - Cortex-M0 - Cortex-M3 - Cortex-M4 with FPU - Cortex-M7 with single precision FPU - Cortex-M55 with double precision FPU, Integer + Floating Point MVE - -The example is configured for Models Debugger diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/CMakeLists.txt b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/CMakeLists.txt deleted file mode 100644 index 93bdbad..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/CMakeLists.txt +++ /dev/null @@ -1,45 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -project (arm_variance_example VERSION 0.1) - - -# Needed to include the configBoot module -# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) -set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) -set(DSP ${ROOT}/CMSIS/DSP) - -# Add DSP folder to module path -list(APPEND CMAKE_MODULE_PATH ${DSP}) - -################################### -# -# LIBRARIES -# -################################### - -########### -# -# CMSIS DSP -# - -add_subdirectory(../../../Source bin_dsp) - - -################################### -# -# TEST APPLICATION -# -################################### - - -add_executable(arm_variance_example) - - -include(config) -configApp(arm_variance_example ${ROOT}) - -target_sources(arm_variance_example PRIVATE arm_variance_example_f32.c) - -### Sources and libs - -target_link_libraries(arm_variance_example PRIVATE CMSISDSP) - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/startup_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/startup_ARMCM0.c deleted file mode 100644 index d526ced..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/startup_ARMCM0.c +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM0.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[48]; - const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10..31 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/system_ARMCM0.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/system_ARMCM0.c deleted file mode 100644 index d735adf..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/system_ARMCM0.c +++ /dev/null @@ -1,56 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM0.c - * @brief CMSIS Device System Source File for - * ARMCM0 Device - * @version V5.3.1 - * @date 09. July 2018 - ******************************************************************************/ -/* - * Copyright (c) 2009-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM0.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/startup_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/startup_ARMCM3.c deleted file mode 100644 index 94ff186..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/startup_ARMCM3.c +++ /dev/null @@ -1,135 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM3.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void) ; - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Default_Handler(void); -__NO_RETURN void Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/system_ARMCM3.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/system_ARMCM3.c deleted file mode 100644 index 1948453..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/system_ARMCM3.c +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM3.c - * @brief CMSIS Device System Source File for - * ARMCM3 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ARMCM3.h" - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c deleted file mode 100644 index 833d69a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.c +++ /dev/null @@ -1,141 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM4.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c deleted file mode 100644 index d0c3018..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c +++ /dev/null @@ -1,81 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM4.c - * @brief CMSIS Device System Source File for - * ARMCM4 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM4) - #include "ARMCM4.h" -#elif defined (ARMCM4_FP) - #include "ARMCM4_FP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM55/startup_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM55/startup_ARMCM55.c deleted file mode 100644 index a98a49a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM55/startup_ARMCM55.c +++ /dev/null @@ -1,154 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM55.c - * @brief CMSIS Core Device Startup File for ARMCM55 Device - * @version V1.0.0 - * @date 31. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; -extern uint32_t __STACK_LIMIT; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler (void); - void Default_Handler(void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - SecureFault_Handler, /* -9 Secure Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 480 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -__NO_RETURN void Reset_Handler(void) -{ - __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); - - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wmissing-noreturn" -#endif - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#endif - diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM55/system_ARMCM55.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM55/system_ARMCM55.c deleted file mode 100644 index 1e6fda0..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM55/system_ARMCM55.c +++ /dev/null @@ -1,90 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM55.c - * @brief CMSIS Device System Source File for - * ARMCM55 Device - * @version V1.0.0 - * @date 23. March 2020 - ******************************************************************************/ -/* - * Copyright (c) 2009-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM55) - #include "ARMCM55.h" - - #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - #include "partition_ARMCM55.h" - #endif - -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL ( 5000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (5U * XTAL) - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[496]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]); -#endif - -#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \ - (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U)) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - -#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - TZ_SAU_Setup(); -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c deleted file mode 100644 index d024b37..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.c +++ /dev/null @@ -1,143 +0,0 @@ -/****************************************************************************** - * @file startup_ARMCM7.c - * @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device - * @version V2.0.2 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - External References - *----------------------------------------------------------------------------*/ -extern uint32_t __INITIAL_SP; - -extern __NO_RETURN void __PROGRAM_START(void); - -/*---------------------------------------------------------------------------- - Internal References - *----------------------------------------------------------------------------*/ -void __NO_RETURN Default_Handler(void); -void __NO_RETURN Reset_Handler (void); - -/*---------------------------------------------------------------------------- - Exception / Interrupt Handler - *----------------------------------------------------------------------------*/ -/* Exceptions */ -void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void HardFault_Handler (void) __attribute__ ((weak)); -void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - -void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); -void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); - - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpedantic" -#endif - -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = { - (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* -14 NMI Handler */ - HardFault_Handler, /* -13 Hard Fault Handler */ - MemManage_Handler, /* -12 MPU Fault Handler */ - BusFault_Handler, /* -11 Bus Fault Handler */ - UsageFault_Handler, /* -10 Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* -5 SVCall Handler */ - DebugMon_Handler, /* -4 Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* -2 PendSV Handler */ - SysTick_Handler, /* -1 SysTick Handler */ - - /* Interrupts */ - Interrupt0_Handler, /* 0 Interrupt 0 */ - Interrupt1_Handler, /* 1 Interrupt 1 */ - Interrupt2_Handler, /* 2 Interrupt 2 */ - Interrupt3_Handler, /* 3 Interrupt 3 */ - Interrupt4_Handler, /* 4 Interrupt 4 */ - Interrupt5_Handler, /* 5 Interrupt 5 */ - Interrupt6_Handler, /* 6 Interrupt 6 */ - Interrupt7_Handler, /* 7 Interrupt 7 */ - Interrupt8_Handler, /* 8 Interrupt 8 */ - Interrupt9_Handler /* 9 Interrupt 9 */ - /* Interrupts 10 .. 223 are left out */ -}; - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -/*---------------------------------------------------------------------------- - Reset Handler called on controller reset - *----------------------------------------------------------------------------*/ -void Reset_Handler(void) -{ - SystemInit(); /* CMSIS System Initialization */ - __PROGRAM_START(); /* Enter PreMain (C library entry point) */ -} - -/*---------------------------------------------------------------------------- - Hard Fault Handler - *----------------------------------------------------------------------------*/ -__NO_RETURN void HardFault_Handler(void) -{ - while(1); -} - -/*---------------------------------------------------------------------------- - Default Handler for Exceptions / Interrupts - *----------------------------------------------------------------------------*/ -void Default_Handler(void) -{ - while(1); -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c deleted file mode 100644 index 1ef177a..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c +++ /dev/null @@ -1,83 +0,0 @@ -/**************************************************************************//** - * @file system_ARMCM7.c - * @brief CMSIS Device System Source File for - * ARMCM7 Device - * @version V1.0.1 - * @date 15. November 2019 - ******************************************************************************/ -/* - * Copyright (c) 2009-2019 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if defined (ARMCM7) - #include "ARMCM7.h" -#elif defined (ARMCM7_SP) - #include "ARMCM7_SP.h" -#elif defined (ARMCM7_DP) - #include "ARMCM7_DP.h" -#else - #error device not specified! -#endif - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (50000000UL) /* Oscillator frequency */ - -#define SYSTEM_CLOCK (XTAL / 2U) - -/*---------------------------------------------------------------------------- - Exception / Interrupt Vector table - *----------------------------------------------------------------------------*/ -extern const VECTOR_TABLE_Type __VECTOR_TABLE[240]; - - -/*---------------------------------------------------------------------------- - System Core Clock Variable - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ - - -/*---------------------------------------------------------------------------- - System Core Clock update function - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) -{ - SystemCoreClock = SYSTEM_CLOCK; -} - -/*---------------------------------------------------------------------------- - System initialization function - *----------------------------------------------------------------------------*/ -void SystemInit (void) -{ - -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); -#endif - -#if defined (__FPU_USED) && (__FPU_USED == 1U) - SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ - (3U << 11U*2U) ); /* enable CP11 Full Access */ -#endif - -#ifdef UNALIGNED_SUPPORT_DISABLE - SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; -#endif - - SystemCoreClock = SYSTEM_CLOCK; -} diff --git a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/arm_variance_example_f32.c b/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/arm_variance_example_f32.c deleted file mode 100644 index 6a04c32..0000000 --- a/Drivers/CMSIS/DSP/Examples/ARM/arm_variance_example/arm_variance_example_f32.c +++ /dev/null @@ -1,224 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2012 ARM Limited. All rights reserved. -* -* $Date: 17. January 2013 -* $Revision: V1.4.0 -* -* Project: CMSIS DSP Library -* Title: arm_variance_example_f32.c -* -* Description: Example code demonstrating variance calculation of input sequence. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -/** - * @ingroup groupExamples - */ - -/** - * @defgroup VarianceExample Variance Example - * - * \par Description: - * \par - * Demonstrates the use of Basic Math and Support Functions to calculate the variance of an - * input sequence with N samples. Uniformly distributed white noise is taken as input. - * - * \par Algorithm: - * \par - * The variance of a sequence is the mean of the squared deviation of the sequence from its mean. - * \par - * This is denoted by the following equation: - * 
 variance = ((x[0] - x') * (x[0] - x') + (x[1] - x') * (x[1] - x') + ... + * (x[n-1] - x') * (x[n-1] - x')) / (N-1)
- * where, x[n] is the input sequence, N is the number of input samples, and - * x' is the mean value of the input sequence, x[n]. - * \par - * The mean value x' is defined as: - * 
 x' = (x[0] + x[1] + ... + x[n-1]) / N
- * - * \par Block Diagram: - * \par - * \image html Variance.gif - * - * - * \par Variables Description: - * \par - * \li \c testInput_f32 points to the input data - * \li \c wire1, \c wir2, \c wire3 temporary buffers - * \li \c blockSize number of samples processed at a time - * \li \c refVarianceOut reference variance value - * - * \par CMSIS DSP Software Library Functions Used: - * \par - * - arm_dot_prod_f32() - * - arm_mult_f32() - * - arm_sub_f32() - * - arm_fill_f32() - * - arm_copy_f32() - * - * Refer - * \link arm_variance_example_f32.c \endlink - * - */ - - -/** \example arm_variance_example_f32.c - */ - -#include -#include "arm_math.h" - -#if defined(SEMIHOSTING) -#include -#endif - -/* ---------------------------------------------------------------------- -* Defines each of the tests performed -* ------------------------------------------------------------------- */ -#define MAX_BLOCKSIZE 32 -#define DELTA (0.000001f) - - -/* ---------------------------------------------------------------------- -* Declare I/O buffers -* ------------------------------------------------------------------- */ -float32_t wire1[MAX_BLOCKSIZE]; -float32_t wire2[MAX_BLOCKSIZE]; -float32_t wire3[MAX_BLOCKSIZE]; - -/* ---------------------------------------------------------------------- -* Test input data for Floating point Variance example for 32-blockSize -* Generated by the MATLAB randn() function -* ------------------------------------------------------------------- */ - -float32_t testInput_f32[32] = -{ - -0.432564811528221, -1.665584378238097, 0.125332306474831, 0.287676420358549, - -1.146471350681464, 1.190915465642999, 1.189164201652103, -0.037633276593318, - 0.327292361408654, 0.174639142820925, -0.186708577681439, 0.725790548293303, - -0.588316543014189, 2.183185818197101, -0.136395883086596, 0.113931313520810, - 1.066768211359189, 0.059281460523605, -0.095648405483669, -0.832349463650022, - 0.294410816392640, -1.336181857937804, 0.714324551818952, 1.623562064446271, - -0.691775701702287, 0.857996672828263, 1.254001421602532, -1.593729576447477, - -1.440964431901020, 0.571147623658178, -0.399885577715363, 0.689997375464345 - -}; - -/* ---------------------------------------------------------------------- -* Declare Global variables -* ------------------------------------------------------------------- */ -uint32_t blockSize = 32; -float32_t refVarianceOut = 0.903941793931839; - -/* ---------------------------------------------------------------------- -* Variance calculation test -* ------------------------------------------------------------------- */ - -int32_t main(void) -{ - arm_status status; - float32_t mean, oneByBlockSize; - float32_t variance; - float32_t diff; - - status = ARM_MATH_SUCCESS; - -#if defined(SEMIHOSTING) - printf("START\n"); -#endif - - - /* Calculation of mean value of input */ - - /* x' = 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */ - - /* Fill wire1 buffer with 1.0 value */ - arm_fill_f32(1.0, wire1, blockSize); - - /* Calculate the dot product of wire1 and wire2 */ - /* (x(0)* 1 + x(1) * 1 + ...+ x(n-1) * 1) */ - arm_dot_prod_f32(testInput_f32, wire1, blockSize, &mean); - - /* Calculation of 1/blockSize */ - oneByBlockSize = 1.0 / (blockSize); - - /* 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */ - arm_mult_f32(&mean, &oneByBlockSize, &mean, 1); - - - /* Calculation of variance value of input */ - - /* (1/blockSize) * (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */ - - /* Fill wire2 with mean value x' */ - arm_fill_f32(mean, wire2, blockSize); - - /* wire3 contains (x-x') */ - arm_sub_f32(testInput_f32, wire2, wire3, blockSize); - - /* wire2 contains (x-x') */ - arm_copy_f32(wire3, wire2, blockSize); - - /* (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */ - arm_dot_prod_f32(wire2, wire3, blockSize, &variance); - - /* Calculation of 1/blockSize */ - oneByBlockSize = 1.0 / (blockSize - 1); - - /* Calculation of variance */ - arm_mult_f32(&variance, &oneByBlockSize, &variance, 1); - - /* absolute value of difference between ref and test */ - diff = fabsf(refVarianceOut - variance); - - /* Comparison of variance value with reference */ - status = (diff > DELTA) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS; - - if (status != ARM_MATH_SUCCESS) - { -#if defined (SEMIHOSTING) - printf("FAILURE\n"); -#else - while (1); /* main function does not return */ -#endif - } - else - { -#if defined (SEMIHOSTING) - printf("SUCCESS\n"); -#else - while (1); /* main function does not return */ -#endif - } - -} - - /** \endlink */ - - diff --git a/Drivers/CMSIS/DSP/Include/arm_common_tables.h b/Drivers/CMSIS/DSP/Include/arm_common_tables.h deleted file mode 100644 index 46c8a14..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_common_tables.h +++ /dev/null @@ -1,539 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_common_tables.h - * Description: Extern declaration for common tables - * - * @version V1.10.0 - * @date 08 July 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_COMMON_TABLES_H -#define _ARM_COMMON_TABLES_H - -#include "arm_math_types.h" -#include "dsp/fast_math_functions.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - /* Double Precision Float CFFT twiddles */ - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024) - extern const uint16_t armBitRevTable[1024]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_16) - extern const uint64_t twiddleCoefF64_16[32]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_32) - extern const uint64_t twiddleCoefF64_32[64]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_64) - extern const uint64_t twiddleCoefF64_64[128]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_128) - extern const uint64_t twiddleCoefF64_128[256]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_256) - extern const uint64_t twiddleCoefF64_256[512]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_512) - extern const uint64_t twiddleCoefF64_512[1024]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_1024) - extern const uint64_t twiddleCoefF64_1024[2048]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_2048) - extern const uint64_t twiddleCoefF64_2048[4096]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_4096) - extern const uint64_t twiddleCoefF64_4096[8192]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) - extern const float32_t twiddleCoef_16[32]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32) - extern const float32_t twiddleCoef_32[64]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) - extern const float32_t twiddleCoef_64[128]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128) - extern const float32_t twiddleCoef_128[256]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) - extern const float32_t twiddleCoef_256[512]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512) - extern const float32_t twiddleCoef_512[1024]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) - extern const float32_t twiddleCoef_1024[2048]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048) - extern const float32_t twiddleCoef_2048[4096]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) - extern const float32_t twiddleCoef_4096[8192]; - #define twiddleCoef twiddleCoef_4096 - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - /* Q31 */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16) - extern const q31_t twiddleCoef_16_q31[24]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32) - extern const q31_t twiddleCoef_32_q31[48]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) - extern const q31_t twiddleCoef_64_q31[96]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128) - extern const q31_t twiddleCoef_128_q31[192]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) - extern const q31_t twiddleCoef_256_q31[384]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512) - extern const q31_t twiddleCoef_512_q31[768]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) - extern const q31_t twiddleCoef_1024_q31[1536]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) - extern const q31_t twiddleCoef_2048_q31[3072]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) - extern const q31_t twiddleCoef_4096_q31[6144]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) - extern const q15_t twiddleCoef_16_q15[24]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32) - extern const q15_t twiddleCoef_32_q15[48]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) - extern const q15_t twiddleCoef_64_q15[96]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128) - extern const q15_t twiddleCoef_128_q15[192]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) - extern const q15_t twiddleCoef_256_q15[384]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512) - extern const q15_t twiddleCoef_512_q15[768]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) - extern const q15_t twiddleCoef_1024_q15[1536]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) - extern const q15_t twiddleCoef_2048_q15[3072]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) - extern const q15_t twiddleCoef_4096_q15[6144]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - /* Double Precision Float RFFT twiddles */ - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32) - extern const uint64_t twiddleCoefF64_rfft_32[32]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64) - extern const uint64_t twiddleCoefF64_rfft_64[64]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128) - extern const uint64_t twiddleCoefF64_rfft_128[128]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256) - extern const uint64_t twiddleCoefF64_rfft_256[256]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512) - extern const uint64_t twiddleCoefF64_rfft_512[512]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024) - extern const uint64_t twiddleCoefF64_rfft_1024[1024]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048) - extern const uint64_t twiddleCoefF64_rfft_2048[2048]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096) - extern const uint64_t twiddleCoefF64_rfft_4096[4096]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32) - extern const float32_t twiddleCoef_rfft_32[32]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64) - extern const float32_t twiddleCoef_rfft_64[64]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128) - extern const float32_t twiddleCoef_rfft_128[128]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256) - extern const float32_t twiddleCoef_rfft_256[256]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512) - extern const float32_t twiddleCoef_rfft_512[512]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024) - extern const float32_t twiddleCoef_rfft_1024[1024]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048) - extern const float32_t twiddleCoef_rfft_2048[2048]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096) - extern const float32_t twiddleCoef_rfft_4096[4096]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - - /* Double precision floating-point bit reversal tables */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_16) - #define ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH ((uint16_t)12) - extern const uint16_t armBitRevIndexTableF64_16[ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_32) - #define ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH ((uint16_t)24) - extern const uint16_t armBitRevIndexTableF64_32[ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_64) - #define ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH ((uint16_t)56) - extern const uint16_t armBitRevIndexTableF64_64[ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_128) - #define ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH ((uint16_t)112) - extern const uint16_t armBitRevIndexTableF64_128[ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_256) - #define ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH ((uint16_t)240) - extern const uint16_t armBitRevIndexTableF64_256[ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_512) - #define ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH ((uint16_t)480) - extern const uint16_t armBitRevIndexTableF64_512[ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_1024) - #define ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH ((uint16_t)992) - extern const uint16_t armBitRevIndexTableF64_1024[ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_2048) - #define ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH ((uint16_t)1984) - extern const uint16_t armBitRevIndexTableF64_2048[ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_4096) - #define ARMBITREVINDEXTABLEF64_4096_TABLE_LENGTH ((uint16_t)4032) - extern const uint16_t armBitRevIndexTableF64_4096[ARMBITREVINDEXTABLEF64_4096_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - /* floating-point bit reversal tables */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16) - #define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20) - extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32) - #define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48) - extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64) - #define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56) - extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128) - #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208) - extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256) - #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440) - extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512) - #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448) - extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024) - #define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800) - extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048) - #define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808) - extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096) - #define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032) - extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - - /* fixed-point bit reversal tables */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16) - #define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12) - extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32) - #define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24) - extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64) - #define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56) - extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128) - #define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112) - extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256) - #define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240) - extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512) - #define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480) - extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024) - #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992) - extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048) - #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) - extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096) - #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) - extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32) - extern const float32_t realCoefA[8192]; - extern const float32_t realCoefB[8192]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31) - extern const q31_t realCoefAQ31[8192]; - extern const q31_t realCoefBQ31[8192]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15) - extern const q15_t realCoefAQ15[8192]; - extern const q15_t realCoefBQ15[8192]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128) - extern const float32_t Weights_128[256]; - extern const float32_t cos_factors_128[128]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512) - extern const float32_t Weights_512[1024]; - extern const float32_t cos_factors_512[512]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048) - extern const float32_t Weights_2048[4096]; - extern const float32_t cos_factors_2048[2048]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192) - extern const float32_t Weights_8192[16384]; - extern const float32_t cos_factors_8192[8192]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128) - extern const q15_t WeightsQ15_128[256]; - extern const q15_t cos_factorsQ15_128[128]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512) - extern const q15_t WeightsQ15_512[1024]; - extern const q15_t cos_factorsQ15_512[512]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048) - extern const q15_t WeightsQ15_2048[4096]; - extern const q15_t cos_factorsQ15_2048[2048]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192) - extern const q15_t WeightsQ15_8192[16384]; - extern const q15_t cos_factorsQ15_8192[8192]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128) - extern const q31_t WeightsQ31_128[256]; - extern const q31_t cos_factorsQ31_128[128]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512) - extern const q31_t WeightsQ31_512[1024]; - extern const q31_t cos_factorsQ31_512[512]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048) - extern const q31_t WeightsQ31_2048[4096]; - extern const q31_t cos_factorsQ31_2048[2048]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192) - extern const q31_t WeightsQ31_8192[16384]; - extern const q31_t cos_factorsQ31_8192[8192]; - #endif - -#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES) - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15) - extern const q15_t armRecipTableQ15[64]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31) - extern const q31_t armRecipTableQ31[64]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */ - - /* Tables for Fast Math Sine and Cosine */ - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32) - extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31) - extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15) - extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */ - - /* Fast vector sqrt */ - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE) - extern const q31_t sqrtTable_Q31[256]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */ - #endif - - /* Accurate scalar sqrt */ - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q31) - extern const q31_t sqrt_initial_lut_q31[32]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q15) - extern const q15_t sqrt_initial_lut_q15[16]; - #endif - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q15_MVE) - extern const q15_t sqrtTable_Q15[256]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */ - #endif - -#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_TABLES) */ - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) - extern const float32_t exp_tab[8]; - extern const float32_t __logf_lut_f32[8]; -#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -#if (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) -extern const unsigned char hwLUT[256]; -#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */ - -#ifdef __cplusplus -} -#endif - -#endif /* ARM_COMMON_TABLES_H */ - diff --git a/Drivers/CMSIS/DSP/Include/arm_common_tables_f16.h b/Drivers/CMSIS/DSP/Include/arm_common_tables_f16.h deleted file mode 100644 index f6d4101..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_common_tables_f16.h +++ /dev/null @@ -1,132 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_common_tables_f16.h - * Description: Extern declaration for common tables - * - * @version V1.9.0 - * @date 23 April 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_COMMON_TABLES_F16_H -#define _ARM_COMMON_TABLES_F16_H - -#include "arm_math_types_f16.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - - /* F16 */ - #if !defined(__CC_ARM) && defined(ARM_FLOAT16_SUPPORTED) - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_16) - extern const float16_t twiddleCoefF16_16[32]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_32) - extern const float16_t twiddleCoefF16_32[64]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_64) - extern const float16_t twiddleCoefF16_64[128]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_128) - extern const float16_t twiddleCoefF16_128[256]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_256) - extern const float16_t twiddleCoefF16_256[512]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_512) - extern const float16_t twiddleCoefF16_512[1024]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_1024) - extern const float16_t twiddleCoefF16_1024[2048]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048) - extern const float16_t twiddleCoefF16_2048[4096]; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096) - extern const float16_t twiddleCoefF16_4096[8192]; - #define twiddleCoefF16 twiddleCoefF16_4096 - #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_32) - extern const float16_t twiddleCoefF16_rfft_32[32]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_64) - extern const float16_t twiddleCoefF16_rfft_64[64]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_128) - extern const float16_t twiddleCoefF16_rfft_128[128]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_256) - extern const float16_t twiddleCoefF16_rfft_256[256]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_512) - extern const float16_t twiddleCoefF16_rfft_512[512]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_1024) - extern const float16_t twiddleCoefF16_rfft_1024[1024]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_2048) - extern const float16_t twiddleCoefF16_rfft_2048[2048]; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_4096) - extern const float16_t twiddleCoefF16_rfft_4096[4096]; - #endif - - #endif /* ARMAC5 */ - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */ - -#if !defined(__CC_ARM) && defined(ARM_FLOAT16_SUPPORTED) - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) - extern const float16_t exp_tab_f16[8]; - extern const float16_t __logf_lut_f16[8]; -#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) */ -#endif - - -#ifdef __cplusplus -} -#endif - -#endif /* _ARM_COMMON_TABLES_F16_H */ - - diff --git a/Drivers/CMSIS/DSP/Include/arm_const_structs.h b/Drivers/CMSIS/DSP/Include/arm_const_structs.h deleted file mode 100644 index 89700cb..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_const_structs.h +++ /dev/null @@ -1,86 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_const_structs.h - * Description: Constant structs that are initialized for user convenience. - * For example, some can be given as arguments to the arm_cfft_f32() function. - * - * @version V1.10.0 - * @date 08 July 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_CONST_STRUCTS_H -#define _ARM_CONST_STRUCTS_H - -#include "arm_math_types.h" -#include "arm_common_tables.h" -#include "dsp/transform_functions.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len16; - extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len32; - extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len64; - extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len128; - extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len256; - extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len512; - extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len1024; - extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len2048; - extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len4096; - - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; - - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; - - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; - -#ifdef __cplusplus -} -#endif - -#endif - diff --git a/Drivers/CMSIS/DSP/Include/arm_const_structs_f16.h b/Drivers/CMSIS/DSP/Include/arm_const_structs_f16.h deleted file mode 100644 index 00e0360..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_const_structs_f16.h +++ /dev/null @@ -1,77 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_const_structs_f16.h - * Description: Constant structs that are initialized for user convenience. - * For example, some can be given as arguments to the arm_cfft_f16() function. - * - * @version V1.10.0 - * @date 08 July 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_CONST_STRUCTS_F16_H -#define _ARM_CONST_STRUCTS_F16_H - -#include "arm_math_types_f16.h" -#include "arm_common_tables.h" -#include "arm_common_tables_f16.h" -#include "dsp/transform_functions_f16.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if !defined(__CC_ARM) && defined(ARM_FLOAT16_SUPPORTED) - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16)) - extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len16; - #endif - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32)) - extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len32; - #endif - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64)) - extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len64; - #endif - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128)) - extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len128; - #endif - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256)) - extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len256; - #endif - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512)) - extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len512; - #endif - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024)) - extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len1024; - #endif - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048)) - extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len2048; - #endif - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096)) - extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len4096; - #endif -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/Drivers/CMSIS/DSP/Include/arm_helium_utils.h b/Drivers/CMSIS/DSP/Include/arm_helium_utils.h deleted file mode 100644 index 8298eb7..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_helium_utils.h +++ /dev/null @@ -1,753 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_helium_utils.h - * Description: Utility functions for Helium development - * - * @version V1.10.0 - * @date 08 July 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_UTILS_HELIUM_H_ -#define _ARM_UTILS_HELIUM_H_ - - -#ifdef __cplusplus -extern "C" -{ -#endif -/*************************************** - -Definitions available for MVEF and MVEI - -***************************************/ -#if (defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI)) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define INACTIVELANE 0 /* inactive lane content */ - - -#endif /* defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) */ - -/*************************************** - -Definitions available for MVEF only - -***************************************/ -#if (defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) - -__STATIC_FORCEINLINE float32_t vecAddAcrossF32Mve(float32x4_t in) -{ - float32_t acc; - - acc = vgetq_lane(in, 0) + vgetq_lane(in, 1) + - vgetq_lane(in, 2) + vgetq_lane(in, 3); - - return acc; -} - - - - -/* newton initial guess */ -#define INVSQRT_MAGIC_F32 0x5f3759df -#define INV_NEWTON_INIT_F32 0x7EF127EA - - -#define INVSQRT_NEWTON_MVE_F32(invSqrt, xHalf, xStart)\ -{ \ - float32x4_t tmp; \ - \ - /* tmp = xhalf * x * x */ \ - tmp = vmulq(xStart, xStart); \ - tmp = vmulq(tmp, xHalf); \ - /* (1.5f - xhalf * x * x) */ \ - tmp = vsubq(vdupq_n_f32(1.5f), tmp); \ - /* x = x*(1.5f-xhalf*x*x); */ \ - invSqrt = vmulq(tmp, xStart); \ -} -#endif /* defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) */ - - -/*************************************** - -Definitions available for f16 datatype with HW acceleration only - -***************************************/ -#if defined(ARM_FLOAT16_SUPPORTED) -#if defined (ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -__STATIC_FORCEINLINE float16_t vecAddAcrossF16Mve(float16x8_t in) -{ - float16x8_t tmpVec; - _Float16 acc; - - tmpVec = (float16x8_t) vrev32q_s16((int16x8_t) in); - in = vaddq_f16(tmpVec, in); - tmpVec = (float16x8_t) vrev64q_s32((int32x4_t) in); - in = vaddq_f16(tmpVec, in); - acc = (_Float16)vgetq_lane_f16(in, 0) + (_Float16)vgetq_lane_f16(in, 4); - - return acc; -} - -__STATIC_FORCEINLINE float16x8_t __mve_cmplx_sum_intra_vec_f16( - float16x8_t vecIn) -{ - float16x8_t vecTmp, vecOut; - uint32_t tmp; - - vecTmp = (float16x8_t) vrev64q_s32((int32x4_t) vecIn); - // TO TRACK : using canonical addition leads to unefficient code generation for f16 - // vecTmp = vecTmp + vecAccCpx0; - /* - * Compute - * re0+re1 | im0+im1 | re0+re1 | im0+im1 - * re2+re3 | im2+im3 | re2+re3 | im2+im3 - */ - vecTmp = vaddq_f16(vecTmp, vecIn); - vecOut = vecTmp; - /* - * shift left, random tmp insertion in bottom - */ - vecOut = vreinterpretq_f16_s32(vshlcq_s32(vreinterpretq_s32_f16(vecOut) , &tmp, 32)); - /* - * Compute: - * DONTCARE | DONTCARE | re0+re1+re0+re1 |im0+im1+im0+im1 - * re0+re1+re2+re3 | im0+im1+im2+im3 | re2+re3+re2+re3 |im2+im3+im2+im3 - */ - vecOut = vaddq_f16(vecOut, vecTmp); - /* - * Cmplx sum is in 4rd & 5th f16 elt - * return full vector - */ - return vecOut; -} - - -#define mve_cmplx_sum_intra_r_i_f16(vec, Re, Im) \ -{ \ - float16x8_t vecOut = __mve_cmplx_sum_intra_vec_f16(vec); \ - Re = vgetq_lane(vecOut, 4); \ - Im = vgetq_lane(vecOut, 5); \ -} - -__STATIC_FORCEINLINE void mve_cmplx_sum_intra_vec_f16( - float16x8_t vecIn, - float16_t *pOut) -{ - float16x8_t vecOut = __mve_cmplx_sum_intra_vec_f16(vecIn); - /* - * Cmplx sum is in 4rd & 5th f16 elt - * use 32-bit extraction - */ - *(float32_t *) pOut = ((float32x4_t) vecOut)[2]; -} - - -#define INVSQRT_MAGIC_F16 0x59ba /* ( 0x1ba = 0x3759df >> 13) */ - -/* canonical version of INVSQRT_NEWTON_MVE_F16 leads to bad performance */ -#define INVSQRT_NEWTON_MVE_F16(invSqrt, xHalf, xStart) \ -{ \ - float16x8_t tmp; \ - \ - /* tmp = xhalf * x * x */ \ - tmp = vmulq(xStart, xStart); \ - tmp = vmulq(tmp, xHalf); \ - /* (1.5f - xhalf * x * x) */ \ - tmp = vsubq(vdupq_n_f16((float16_t)1.5), tmp); \ - /* x = x*(1.5f-xhalf*x*x); */ \ - invSqrt = vmulq(tmp, xStart); \ -} - -#endif -#endif - -/*************************************** - -Definitions available for MVEI and MVEF only - -***************************************/ -#if (defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI)) && !defined(ARM_MATH_AUTOVECTORIZE) -/* Following functions are used to transpose matrix in f32 and q31 cases */ -__STATIC_INLINE arm_status arm_mat_trans_32bit_2x2_mve( - uint32_t * pDataSrc, - uint32_t * pDataDest) -{ - static const uint32x4_t vecOffs = { 0, 2, 1, 3 }; - /* - * - * | 0 1 | => | 0 2 | - * | 2 3 | | 1 3 | - * - */ - uint32x4_t vecIn = vldrwq_u32((uint32_t const *)pDataSrc); - vstrwq_scatter_shifted_offset_u32(pDataDest, vecOffs, vecIn); - - return (ARM_MATH_SUCCESS); -} - -__STATIC_INLINE arm_status arm_mat_trans_32bit_3x3_mve( - uint32_t * pDataSrc, - uint32_t * pDataDest) -{ - const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; - const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; - /* - * - * | 0 1 2 | | 0 3 6 | 4 x 32 flattened version | 0 3 6 1 | - * | 3 4 5 | => | 1 4 7 | => | 4 7 2 5 | - * | 6 7 8 | | 2 5 8 | (row major) | 8 . . . | - * - */ - uint32x4_t vecIn1 = vldrwq_u32((uint32_t const *) pDataSrc); - uint32x4_t vecIn2 = vldrwq_u32((uint32_t const *) &pDataSrc[4]); - - vstrwq_scatter_shifted_offset_u32(pDataDest, vecOffs1, vecIn1); - vstrwq_scatter_shifted_offset_u32(pDataDest, vecOffs2, vecIn2); - - pDataDest[8] = pDataSrc[8]; - - return (ARM_MATH_SUCCESS); -} - -__STATIC_INLINE arm_status arm_mat_trans_32bit_4x4_mve(uint32_t * pDataSrc, uint32_t * pDataDest) -{ - /* - * 4x4 Matrix transposition - * is 4 x de-interleave operation - * - * 0 1 2 3 0 4 8 12 - * 4 5 6 7 1 5 9 13 - * 8 9 10 11 2 6 10 14 - * 12 13 14 15 3 7 11 15 - */ - - uint32x4x4_t vecIn; - - vecIn = vld4q((uint32_t const *) pDataSrc); - vstrwq(pDataDest, vecIn.val[0]); - pDataDest += 4; - vstrwq(pDataDest, vecIn.val[1]); - pDataDest += 4; - vstrwq(pDataDest, vecIn.val[2]); - pDataDest += 4; - vstrwq(pDataDest, vecIn.val[3]); - - return (ARM_MATH_SUCCESS); -} - - -__STATIC_INLINE arm_status arm_mat_trans_32bit_generic_mve( - uint16_t srcRows, - uint16_t srcCols, - uint32_t * pDataSrc, - uint32_t * pDataDest) -{ - uint32x4_t vecOffs; - uint32_t i; - uint32_t blkCnt; - uint32_t const *pDataC; - uint32_t *pDataDestR; - uint32x4_t vecIn; - - vecOffs = vidupq_u32((uint32_t)0, 1); - vecOffs = vecOffs * srcCols; - - i = srcCols; - do - { - pDataC = (uint32_t const *) pDataSrc; - pDataDestR = pDataDest; - - blkCnt = srcRows >> 2; - while (blkCnt > 0U) - { - vecIn = vldrwq_gather_shifted_offset_u32(pDataC, vecOffs); - vstrwq(pDataDestR, vecIn); - pDataDestR += 4; - pDataC = pDataC + srcCols * 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* - * tail - */ - blkCnt = srcRows & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecIn = vldrwq_gather_shifted_offset_u32(pDataC, vecOffs); - vstrwq_p(pDataDestR, vecIn, p0); - } - - pDataSrc += 1; - pDataDest += srcRows; - } - while (--i); - - return (ARM_MATH_SUCCESS); -} - -__STATIC_INLINE arm_status arm_mat_cmplx_trans_32bit( - uint16_t srcRows, - uint16_t srcCols, - uint32_t *pDataSrc, - uint16_t dstRows, - uint16_t dstCols, - uint32_t *pDataDest) -{ - uint32_t i; - uint32_t const *pDataC; - uint32_t *pDataRow; - uint32_t *pDataDestR, *pDataDestRow; - uint32x4_t vecOffsRef, vecOffsCur; - uint32_t blkCnt; - uint32x4_t vecIn; - -#ifdef ARM_MATH_MATRIX_CHECK - /* - * Check for matrix mismatch condition - */ - if ((srcRows != dstCols) || (srcCols != dstRows)) - { - /* - * Set status as ARM_MATH_SIZE_MISMATCH - */ - return ARM_MATH_SIZE_MISMATCH; - } -#else - (void)dstRows; - (void)dstCols; -#endif - - /* 2x2, 3x3 and 4x4 specialization to be added */ - - vecOffsRef[0] = 0; - vecOffsRef[1] = 1; - vecOffsRef[2] = srcCols << 1; - vecOffsRef[3] = (srcCols << 1) + 1; - - pDataRow = pDataSrc; - pDataDestRow = pDataDest; - i = srcCols; - do - { - pDataC = (uint32_t const *) pDataRow; - pDataDestR = pDataDestRow; - vecOffsCur = vecOffsRef; - - blkCnt = (srcRows * CMPLX_DIM) >> 2; - while (blkCnt > 0U) - { - vecIn = vldrwq_gather_shifted_offset(pDataC, vecOffsCur); - vstrwq(pDataDestR, vecIn); - pDataDestR += 4; - vecOffsCur = vaddq(vecOffsCur, (srcCols << 2)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (srcRows * CMPLX_DIM) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecIn = vldrwq_gather_shifted_offset(pDataC, vecOffsCur); - vstrwq_p(pDataDestR, vecIn, p0); - } - - pDataRow += CMPLX_DIM; - pDataDestRow += (srcRows * CMPLX_DIM); - } - while (--i); - - return (ARM_MATH_SUCCESS); -} - -__STATIC_INLINE arm_status arm_mat_trans_16bit_2x2(uint16_t * pDataSrc, uint16_t * pDataDest) -{ - pDataDest[0] = pDataSrc[0]; - pDataDest[3] = pDataSrc[3]; - pDataDest[2] = pDataSrc[1]; - pDataDest[1] = pDataSrc[2]; - - return (ARM_MATH_SUCCESS); -} - -__STATIC_INLINE arm_status arm_mat_trans_16bit_3x3_mve(uint16_t * pDataSrc, uint16_t * pDataDest) -{ - static const uint16_t stridesTr33[8] = { 0, 3, 6, 1, 4, 7, 2, 5 }; - uint16x8_t vecOffs1; - uint16x8_t vecIn1; - /* - * - * | 0 1 2 | | 0 3 6 | 8 x 16 flattened version | 0 3 6 1 4 7 2 5 | - * | 3 4 5 | => | 1 4 7 | => | 8 . . . . . . . | - * | 6 7 8 | | 2 5 8 | (row major) - * - */ - vecOffs1 = vldrhq_u16((uint16_t const *) stridesTr33); - vecIn1 = vldrhq_u16((uint16_t const *) pDataSrc); - - vstrhq_scatter_shifted_offset_u16(pDataDest, vecOffs1, vecIn1); - - pDataDest[8] = pDataSrc[8]; - - return (ARM_MATH_SUCCESS); -} - - -__STATIC_INLINE arm_status arm_mat_trans_16bit_4x4_mve(uint16_t * pDataSrc, uint16_t * pDataDest) -{ - static const uint16_t stridesTr44_1[8] = { 0, 4, 8, 12, 1, 5, 9, 13 }; - static const uint16_t stridesTr44_2[8] = { 2, 6, 10, 14, 3, 7, 11, 15 }; - uint16x8_t vecOffs1, vecOffs2; - uint16x8_t vecIn1, vecIn2; - uint16_t const * pDataSrcVec = (uint16_t const *) pDataSrc; - - /* - * 4x4 Matrix transposition - * - * | 0 1 2 3 | | 0 4 8 12 | 8 x 16 flattened version - * | 4 5 6 7 | => | 1 5 9 13 | => [0 4 8 12 1 5 9 13] - * | 8 9 10 11 | | 2 6 10 14 | [2 6 10 14 3 7 11 15] - * | 12 13 14 15 | | 3 7 11 15 | - */ - - vecOffs1 = vldrhq_u16((uint16_t const *) stridesTr44_1); - vecOffs2 = vldrhq_u16((uint16_t const *) stridesTr44_2); - vecIn1 = vldrhq_u16(pDataSrcVec); - pDataSrcVec += 8; - vecIn2 = vldrhq_u16(pDataSrcVec); - - vstrhq_scatter_shifted_offset_u16(pDataDest, vecOffs1, vecIn1); - vstrhq_scatter_shifted_offset_u16(pDataDest, vecOffs2, vecIn2); - - - return (ARM_MATH_SUCCESS); -} - - - -__STATIC_INLINE arm_status arm_mat_trans_16bit_generic( - uint16_t srcRows, - uint16_t srcCols, - uint16_t * pDataSrc, - uint16_t * pDataDest) -{ - uint16x8_t vecOffs; - uint32_t i; - uint32_t blkCnt; - uint16_t const *pDataC; - uint16_t *pDataDestR; - uint16x8_t vecIn; - - vecOffs = vidupq_u16((uint32_t)0, 1); - vecOffs = vecOffs * srcCols; - - i = srcCols; - while(i > 0U) - { - pDataC = (uint16_t const *) pDataSrc; - pDataDestR = pDataDest; - - blkCnt = srcRows >> 3; - while (blkCnt > 0U) - { - vecIn = vldrhq_gather_shifted_offset_u16(pDataC, vecOffs); - vstrhq_u16(pDataDestR, vecIn); - pDataDestR += 8; - pDataC = pDataC + srcCols * 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* - * tail - */ - blkCnt = srcRows & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecIn = vldrhq_gather_shifted_offset_u16(pDataC, vecOffs); - vstrhq_p_u16(pDataDestR, vecIn, p0); - } - pDataSrc += 1; - pDataDest += srcRows; - i--; - } - - return (ARM_MATH_SUCCESS); -} - - -__STATIC_INLINE arm_status arm_mat_cmplx_trans_16bit( - uint16_t srcRows, - uint16_t srcCols, - uint16_t *pDataSrc, - uint16_t dstRows, - uint16_t dstCols, - uint16_t *pDataDest) -{ - static const uint16_t loadCmplxCol[8] = { 0, 0, 1, 1, 2, 2, 3, 3 }; - int i; - uint16x8_t vecOffsRef, vecOffsCur; - uint16_t const *pDataC; - uint16_t *pDataRow; - uint16_t *pDataDestR, *pDataDestRow; - uint32_t blkCnt; - uint16x8_t vecIn; - -#ifdef ARM_MATH_MATRIX_CHECK - /* - * Check for matrix mismatch condition - */ - if ((srcRows != dstCols) || (srcCols != dstRows)) - { - /* - * Set status as ARM_MATH_SIZE_MISMATCH - */ - return ARM_MATH_SIZE_MISMATCH; - } -#else - (void)dstRows; - (void)dstCols; -#endif - - /* - * 2x2, 3x3 and 4x4 specialization to be added - */ - - - /* - * build [0, 1, 2xcol, 2xcol+1, 4xcol, 4xcol+1, 6xcol, 6xcol+1] - */ - vecOffsRef = vldrhq_u16((uint16_t const *) loadCmplxCol); - vecOffsRef = vmulq(vecOffsRef, (uint16_t) (srcCols * CMPLX_DIM)) - + viwdupq_u16((uint32_t)0, (uint16_t) 2, 1); - - pDataRow = pDataSrc; - pDataDestRow = pDataDest; - i = srcCols; - do - { - pDataC = (uint16_t const *) pDataRow; - pDataDestR = pDataDestRow; - vecOffsCur = vecOffsRef; - - blkCnt = (srcRows * CMPLX_DIM) >> 3; - while (blkCnt > 0U) - { - vecIn = vldrhq_gather_shifted_offset(pDataC, vecOffsCur); - vstrhq(pDataDestR, vecIn); - pDataDestR+= 8; // VEC_LANES_U16 - vecOffsCur = vaddq(vecOffsCur, (srcCols << 3)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (srcRows * CMPLX_DIM) & 0x7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecIn = vldrhq_gather_shifted_offset(pDataC, vecOffsCur); - vstrhq_p(pDataDestR, vecIn, p0); - } - - pDataRow += CMPLX_DIM; - pDataDestRow += (srcRows * CMPLX_DIM); - } - while (--i); - - return (ARM_MATH_SUCCESS); -} -#endif /* MVEF and MVEI */ - -/*************************************** - -Definitions available for MVEI only - -***************************************/ -#if (defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEI)) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_common_tables.h" - -#define MVE_ASRL_SAT16(acc, shift) ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff) -#define MVE_ASRL_SAT32(acc, shift) ((sqrshrl(acc, -(32-shift)) >> 32) & 0xffffffff) - - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE) -__STATIC_INLINE q31x4_t FAST_VSQRT_Q31(q31x4_t vecIn) -{ - q63x2_t vecTmpLL; - q31x4_t vecTmp0, vecTmp1; - q31_t scale; - q63_t tmp64; - q31x4_t vecNrm, vecDst, vecIdx, vecSignBits; - - - vecSignBits = vclsq(vecIn); - vecSignBits = vbicq_n_s32(vecSignBits, 1); - /* - * in = in << no_of_sign_bits; - */ - vecNrm = vshlq(vecIn, vecSignBits); - /* - * index = in >> 24; - */ - vecIdx = vecNrm >> 24; - vecIdx = vecIdx << 1; - - vecTmp0 = vldrwq_gather_shifted_offset_s32(sqrtTable_Q31, (uint32x4_t)vecIdx); - - vecIdx = vecIdx + 1; - - vecTmp1 = vldrwq_gather_shifted_offset_s32(sqrtTable_Q31, (uint32x4_t)vecIdx); - - vecTmp1 = vqrdmulhq(vecTmp1, vecNrm); - vecTmp0 = vecTmp0 - vecTmp1; - vecTmp1 = vqrdmulhq(vecTmp0, vecTmp0); - vecTmp1 = vqrdmulhq(vecNrm, vecTmp1); - vecTmp1 = vdupq_n_s32(0x18000000) - vecTmp1; - vecTmp0 = vqrdmulhq(vecTmp0, vecTmp1); - vecTmpLL = vmullbq_int(vecNrm, vecTmp0); - - /* - * scale elements 0, 2 - */ - scale = 26 + (vecSignBits[0] >> 1); - tmp64 = asrl(vecTmpLL[0], scale); - vecDst[0] = (q31_t) tmp64; - - scale = 26 + (vecSignBits[2] >> 1); - tmp64 = asrl(vecTmpLL[1], scale); - vecDst[2] = (q31_t) tmp64; - - vecTmpLL = vmulltq_int(vecNrm, vecTmp0); - - /* - * scale elements 1, 3 - */ - scale = 26 + (vecSignBits[1] >> 1); - tmp64 = asrl(vecTmpLL[0], scale); - vecDst[1] = (q31_t) tmp64; - - scale = 26 + (vecSignBits[3] >> 1); - tmp64 = asrl(vecTmpLL[1], scale); - vecDst[3] = (q31_t) tmp64; - /* - * set negative values to 0 - */ - vecDst = vdupq_m(vecDst, 0, vcmpltq_n_s32(vecIn, 0)); - - return vecDst; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q15_MVE) -__STATIC_INLINE q15x8_t FAST_VSQRT_Q15(q15x8_t vecIn) -{ - q31x4_t vecTmpLev, vecTmpLodd, vecSignL; - q15x8_t vecTmp0, vecTmp1; - q15x8_t vecNrm, vecDst, vecIdx, vecSignBits; - - vecDst = vuninitializedq_s16(); - - vecSignBits = vclsq(vecIn); - vecSignBits = vbicq_n_s16(vecSignBits, 1); - /* - * in = in << no_of_sign_bits; - */ - vecNrm = vshlq(vecIn, vecSignBits); - - vecIdx = vecNrm >> 8; - vecIdx = vecIdx << 1; - - vecTmp0 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, (uint16x8_t)vecIdx); - - vecIdx = vecIdx + 1; - - vecTmp1 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, (uint16x8_t)vecIdx); - - vecTmp1 = vqrdmulhq(vecTmp1, vecNrm); - vecTmp0 = vecTmp0 - vecTmp1; - vecTmp1 = vqrdmulhq(vecTmp0, vecTmp0); - vecTmp1 = vqrdmulhq(vecNrm, vecTmp1); - vecTmp1 = vdupq_n_s16(0x1800) - vecTmp1; - vecTmp0 = vqrdmulhq(vecTmp0, vecTmp1); - - vecSignBits = vecSignBits >> 1; - - vecTmpLev = vmullbq_int(vecNrm, vecTmp0); - vecTmpLodd = vmulltq_int(vecNrm, vecTmp0); - - vecTmp0 = vecSignBits + 10; - /* - * negate sign to apply register based vshl - */ - vecTmp0 = -vecTmp0; - - /* - * shift even elements - */ - vecSignL = vmovlbq(vecTmp0); - vecTmpLev = vshlq(vecTmpLev, vecSignL); - /* - * shift odd elements - */ - vecSignL = vmovltq(vecTmp0); - vecTmpLodd = vshlq(vecTmpLodd, vecSignL); - /* - * merge and narrow odd and even parts - */ - vecDst = vmovnbq_s32(vecDst, vecTmpLev); - vecDst = vmovntq_s32(vecDst, vecTmpLodd); - /* - * set negative values to 0 - */ - vecDst = vdupq_m(vecDst, 0, vcmpltq_n_s16(vecIn, 0)); - - return vecDst; -} -#endif - -#endif /* defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEI) */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/Drivers/CMSIS/DSP/Include/arm_math.h b/Drivers/CMSIS/DSP/Include/arm_math.h deleted file mode 100644 index 091888c..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_math.h +++ /dev/null @@ -1,236 +0,0 @@ -/****************************************************************************** - * @file arm_math.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - \mainpage CMSIS DSP Software Library - * - * \section intro Introduction - * - * This user manual describes the CMSIS DSP software library, - * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor - * based devices. - * - * The library is divided into a number of functions each covering a specific category: - * - Basic math functions - * - Fast math functions - * - Complex math functions - * - Filtering functions - * - Matrix functions - * - Transform functions - * - Motor control functions - * - Statistical functions - * - Support functions - * - Interpolation functions - * - Support Vector Machine functions (SVM) - * - Bayes classifier functions - * - Distance functions - * - Quaternion functions - * - * The library has generally separate functions for operating on 8-bit integers, 16-bit integers, - * 32-bit integer and 32-bit floating-point values. - * - * The library is providing vectorized versions of most algorthms for Helium - * and of most f32 algorithms for Neon. - * - * When using a vectorized version, provide a little bit of padding after the end of - * a buffer (3 words) because the vectorized code may read a little bit after the end - * of a buffer. You don't have to modify your buffers but just ensure that the - * end of buffer + padding is not outside of a memory region. - * - * \section using Using the Library - * - * The library is released in source form. It is strongly advised to compile the library using -Ofast to - * have the best performances. - * - * The library functions are declared in the public file arm_math.h which is placed in the Include folder. - * Simply include this file. If you don't want to include everything, you can also rely - * on headers in Include/dsp folder and use only what you need. - * - * \section example Examples - * - * The library ships with a number of examples which demonstrate how to use the library functions. - * - * \section toolchain Toolchain Support - * - * The library is now tested on Fast Models building with cmake. - * Core M0, M4, M7, M33, M55, A32 are tested. - * - * - * \section preprocessor Preprocessor Macros - * - * Each library project have different preprocessor macros. - * - * - ARM_MATH_BIG_ENDIAN: - * - * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets. - * - * - ARM_MATH_MATRIX_CHECK: - * - * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices - * - * - ARM_MATH_ROUNDING: - * - * Define macro ARM_MATH_ROUNDING for rounding on support functions - * - * - ARM_MATH_LOOPUNROLL: - * - * Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions - * - * - ARM_MATH_NEON: - * - * Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions. - * It is not enabled by default when Neon is available because performances are - * dependent on the compiler and target architecture. - * - * - ARM_MATH_NEON_EXPERIMENTAL: - * - * Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of - * of some DSP functions. Experimental Neon versions currently do not have better - * performances than the scalar versions. - * - * - ARM_MATH_HELIUM: - * - * It implies the flags ARM_MATH_MVEF and ARM_MATH_MVEI and ARM_MATH_MVE_FLOAT16. - * - * - ARM_MATH_HELIUM_EXPERIMENTAL: - * - * Only taken into account when ARM_MATH_MVEF, ARM_MATH_MVEI or ARM_MATH_MVE_FLOAT16 are defined. - * Enable some vector versions which may have worse performance than scalar - * depending on the core / compiler configuration. - * - * - ARM_MATH_MVEF: - * - * Select Helium versions of the f32 algorithms. - * It implies ARM_MATH_FLOAT16 and ARM_MATH_MVEI. - * - * - ARM_MATH_MVEI: - * - * Select Helium versions of the int and fixed point algorithms. - * - * - ARM_MATH_MVE_FLOAT16: - * - * MVE Float16 implementations of some algorithms (Requires MVE extension). - * - * - DISABLEFLOAT16: - * - * Disable float16 algorithms when __fp16 is not supported for a - * specific compiler / core configuration. - * This is only valid for scalar. When vector architecture is - * supporting f16 then it can't be disabled. - * - * - ARM_MATH_AUTOVECTORIZE: - * - * With Helium or Neon, disable the use of vectorized code with C intrinsics - * and use pure C instead. The vectorization is then done by the compiler. - * - *
- * \section pack CMSIS-DSP in ARM::CMSIS Pack - * - * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directories: - * |File/Folder |Content | - * |---------------------------------|------------------------------------------------------------------------| - * |\b CMSIS\\Documentation\\DSP | This documentation | - * |\b CMSIS\\DSP\\Examples | Example projects demonstrating the usage of the library functions | - * |\b CMSIS\\DSP\\Include | DSP_Lib include files for using and building the lib - * |\b CMSIS\\DSP\\PrivateInclude | DSP_Lib private include files for building the lib | - * |\b CMSIS\\DSP\\Lib | DSP_Lib binaries | - * |\b CMSIS\\DSP\\Source | DSP_Lib source files | - * - *
- * \section rev Revision History of CMSIS-DSP - * Please refer to \ref ChangeLog_pg. - */ - - - - - - - - - - - -/** - * @defgroup groupExamples Examples - */ - - - - - -#ifndef _ARM_MATH_H -#define _ARM_MATH_H - - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#include "dsp/basic_math_functions.h" -#include "dsp/interpolation_functions.h" -#include "dsp/bayes_functions.h" -#include "dsp/matrix_functions.h" -#include "dsp/complex_math_functions.h" -#include "dsp/statistics_functions.h" -#include "dsp/controller_functions.h" -#include "dsp/support_functions.h" -#include "dsp/distance_functions.h" -#include "dsp/svm_functions.h" -#include "dsp/fast_math_functions.h" -#include "dsp/transform_functions.h" -#include "dsp/filtering_functions.h" -#include "dsp/quaternion_math_functions.h" - - - -#ifdef __cplusplus -extern "C" -{ -#endif - - - - -//#define TABLE_SPACING_Q31 0x400000 -//#define TABLE_SPACING_Q15 0x80 - - - - - -#ifdef __cplusplus -} -#endif - - -#endif /* _ARM_MATH_H */ - -/** - * - * End of file. - */ diff --git a/Drivers/CMSIS/DSP/Include/arm_math_f16.h b/Drivers/CMSIS/DSP/Include/arm_math_f16.h deleted file mode 100644 index c51feb1..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_math_f16.h +++ /dev/null @@ -1,59 +0,0 @@ -/****************************************************************************** - * @file arm_math_f16.h - * @brief Public header file for f16 function of the CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_MATH_F16_H -#define _ARM_MATH_F16_H - -#include "arm_math.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "arm_math_types_f16.h" -#include "dsp/none.h" -#include "dsp/utils.h" -#include "dsp/basic_math_functions_f16.h" -#include "dsp/interpolation_functions_f16.h" -#include "dsp/bayes_functions_f16.h" -#include "dsp/matrix_functions_f16.h" -#include "dsp/complex_math_functions_f16.h" -#include "dsp/statistics_functions_f16.h" -#include "dsp/controller_functions_f16.h" -#include "dsp/support_functions_f16.h" -#include "dsp/distance_functions_f16.h" -#include "dsp/svm_functions_f16.h" -#include "dsp/fast_math_functions_f16.h" -#include "dsp/transform_functions_f16.h" -#include "dsp/filtering_functions_f16.h" - -#ifdef __cplusplus -} -#endif - -#endif /* _ARM_MATH_F16_H */ - - diff --git a/Drivers/CMSIS/DSP/Include/arm_math_memory.h b/Drivers/CMSIS/DSP/Include/arm_math_memory.h deleted file mode 100644 index 043d778..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_math_memory.h +++ /dev/null @@ -1,206 +0,0 @@ -/****************************************************************************** - * @file arm_math_memory.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_MATH_MEMORY_H_ - -#define _ARM_MATH_MEMORY_H_ - -#include "arm_math_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/** - @brief definition to read/write two 16 bit values. - @deprecated - */ -#if defined ( __CC_ARM ) - #define __SIMD32_TYPE int32_t __packed -#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) - #define __SIMD32_TYPE int32_t -#elif defined ( __GNUC__ ) - #define __SIMD32_TYPE int32_t -#elif defined ( __ICCARM__ ) - #define __SIMD32_TYPE int32_t __packed -#elif defined ( __TI_ARM__ ) - #define __SIMD32_TYPE int32_t -#elif defined ( __CSMC__ ) - #define __SIMD32_TYPE int32_t -#elif defined ( __TASKING__ ) - #define __SIMD32_TYPE __un(aligned) int32_t -#elif defined(_MSC_VER ) - #define __SIMD32_TYPE int32_t -#else - #error Unknown compiler -#endif - -#define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr)) -#define __SIMD32_CONST(addr) ( (__SIMD32_TYPE * ) (addr)) -#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr)) -#define __SIMD64(addr) (*( int64_t **) & (addr)) - - -/* SIMD replacement */ - - -/** - @brief Read 2 Q15 from Q15 pointer. - @param[in] pQ15 points to input value - @return Q31 value - */ -__STATIC_FORCEINLINE q31_t read_q15x2 ( - q15_t const * pQ15) -{ - q31_t val; - -#ifdef __ARM_FEATURE_UNALIGNED - memcpy (&val, pQ15, 4); -#else - val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ; -#endif - - return (val); -} - -/** - @brief Read 2 Q15 from Q15 pointer and increment pointer afterwards. - @param[in] pQ15 points to input value - @return Q31 value - */ -#define read_q15x2_ia(pQ15) read_q15x2((*(pQ15) += 2) - 2) - -/** - @brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards. - @param[in] pQ15 points to input value - @return Q31 value - */ -#define read_q15x2_da(pQ15) read_q15x2((*(pQ15) -= 2) + 2) - -/** - @brief Write 2 Q15 to Q15 pointer and increment pointer afterwards. - @param[in] pQ15 points to input value - @param[in] value Q31 value - @return none - */ -__STATIC_FORCEINLINE void write_q15x2_ia ( - q15_t ** pQ15, - q31_t value) -{ - q31_t val = value; -#ifdef __ARM_FEATURE_UNALIGNED - memcpy (*pQ15, &val, 4); -#else - (*pQ15)[0] = (q15_t)(val & 0x0FFFF); - (*pQ15)[1] = (q15_t)((val >> 16) & 0x0FFFF); -#endif - - *pQ15 += 2; -} - -/** - @brief Write 2 Q15 to Q15 pointer. - @param[in] pQ15 points to input value - @param[in] value Q31 value - @return none - */ -__STATIC_FORCEINLINE void write_q15x2 ( - q15_t * pQ15, - q31_t value) -{ - q31_t val = value; - -#ifdef __ARM_FEATURE_UNALIGNED - memcpy (pQ15, &val, 4); -#else - pQ15[0] = (q15_t)(val & 0x0FFFF); - pQ15[1] = (q15_t)(val >> 16); -#endif -} - - -/** - @brief Read 4 Q7 from Q7 pointer - @param[in] pQ7 points to input value - @return Q31 value - */ -__STATIC_FORCEINLINE q31_t read_q7x4 ( - q7_t const * pQ7) -{ - q31_t val; - -#ifdef __ARM_FEATURE_UNALIGNED - memcpy (&val, pQ7, 4); -#else - val =((pQ7[3] & 0x0FF) << 24) | ((pQ7[2] & 0x0FF) << 16) | ((pQ7[1] & 0x0FF) << 8) | (pQ7[0] & 0x0FF); -#endif - return (val); -} - -/** - @brief Read 4 Q7 from Q7 pointer and increment pointer afterwards. - @param[in] pQ7 points to input value - @return Q31 value - */ -#define read_q7x4_ia(pQ7) read_q7x4((*(pQ7) += 4) - 4) - -/** - @brief Read 4 Q7 from Q7 pointer and decrement pointer afterwards. - @param[in] pQ7 points to input value - @return Q31 value - */ -#define read_q7x4_da(pQ7) read_q7x4((*(pQ7) -= 4) + 4) - -/** - @brief Write 4 Q7 to Q7 pointer and increment pointer afterwards. - @param[in] pQ7 points to input value - @param[in] value Q31 value - @return none - */ -__STATIC_FORCEINLINE void write_q7x4_ia ( - q7_t ** pQ7, - q31_t value) -{ - q31_t val = value; -#ifdef __ARM_FEATURE_UNALIGNED - memcpy (*pQ7, &val, 4); -#else - (*pQ7)[0] = (q7_t)(val & 0x0FF); - (*pQ7)[1] = (q7_t)((val >> 8) & 0x0FF); - (*pQ7)[2] = (q7_t)((val >> 16) & 0x0FF); - (*pQ7)[3] = (q7_t)((val >> 24) & 0x0FF); - -#endif - *pQ7 += 4; -} - - -#ifdef __cplusplus -} -#endif - -#endif /*ifndef _ARM_MATH_MEMORY_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/arm_math_types.h b/Drivers/CMSIS/DSP/Include/arm_math_types.h deleted file mode 100644 index d320a9b..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_math_types.h +++ /dev/null @@ -1,616 +0,0 @@ -/****************************************************************************** - * @file arm_math_types.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_MATH_TYPES_H_ - -#define _ARM_MATH_TYPES_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Compiler specific diagnostic adjustment */ -#if defined ( __CC_ARM ) - -#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) - -#elif defined ( __APPLE_CC__ ) - #pragma GCC diagnostic ignored "-Wold-style-cast" - -#elif defined ( __GNUC__ ) - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wsign-conversion" - #pragma GCC diagnostic ignored "-Wconversion" - #pragma GCC diagnostic ignored "-Wunused-parameter" - -#elif defined ( __ICCARM__ ) - -#elif defined ( __TI_ARM__ ) - -#elif defined ( __CSMC__ ) - -#elif defined ( __TASKING__ ) - -#elif defined ( _MSC_VER ) - -#else - #error Unknown compiler -#endif - - -/* Included for instrinsics definitions */ -#if defined (_MSC_VER ) -#include -#define __STATIC_FORCEINLINE static __forceinline -#define __STATIC_INLINE static __inline -#define __ALIGNED(x) __declspec(align(x)) -#elif defined ( __APPLE_CC__ ) -#include -#define __ALIGNED(x) __attribute__((aligned(x))) -#define __STATIC_FORCEINLINE static inline __attribute__((always_inline)) -#define __STATIC_INLINE static inline -#elif defined (__GNUC_PYTHON__) -#include -#define __ALIGNED(x) __attribute__((aligned(x))) -#define __STATIC_FORCEINLINE static inline __attribute__((always_inline)) -#define __STATIC_INLINE static inline - -#else -#include "cmsis_compiler.h" -#endif - - - -#include -#include -#include -#include - -/* evaluate ARM DSP feature */ -#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) - #define ARM_MATH_DSP 1 -#endif - -#if defined(ARM_MATH_NEON) - #if defined(_MSC_VER) && defined(_M_ARM64EC) - #include - #else - #include - #endif - #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && __ARM_FEATURE_FP16_VECTOR_ARITHMETIC - #if !defined(ARM_MATH_NEON_FLOAT16) - #define ARM_MATH_NEON_FLOAT16 - #endif - #endif -#endif - -#if !defined(ARM_MATH_AUTOVECTORIZE) - - -#if defined(__ARM_FEATURE_MVE) -#if __ARM_FEATURE_MVE - #if !defined(ARM_MATH_MVEI) - #define ARM_MATH_MVEI - #endif -#endif - -#if (__ARM_FEATURE_MVE & 2) - #if !defined(ARM_MATH_MVEF) - #define ARM_MATH_MVEF - #endif - #if !defined(ARM_MATH_MVE_FLOAT16) - #define ARM_MATH_MVE_FLOAT16 - #endif -#endif - -#endif /*defined(__ARM_FEATURE_MVE)*/ -#endif /*!defined(ARM_MATH_AUTOVECTORIZE)*/ - - -#if defined (ARM_MATH_HELIUM) - #if !defined(ARM_MATH_MVEF) - #define ARM_MATH_MVEF - #endif - - #if !defined(ARM_MATH_MVEI) - #define ARM_MATH_MVEI - #endif - - #if !defined(ARM_MATH_MVE_FLOAT16) - #define ARM_MATH_MVE_FLOAT16 - #endif -#endif - - - -#if defined ( __CC_ARM ) - /* Enter low optimization region - place directly above function definition */ - #if defined( __ARM_ARCH_7EM__ ) - #define LOW_OPTIMIZATION_ENTER \ - _Pragma ("push") \ - _Pragma ("O1") - #else - #define LOW_OPTIMIZATION_ENTER - #endif - - /* Exit low optimization region - place directly after end of function definition */ - #if defined ( __ARM_ARCH_7EM__ ) - #define LOW_OPTIMIZATION_EXIT \ - _Pragma ("pop") - #else - #define LOW_OPTIMIZATION_EXIT - #endif - - /* Enter low optimization region - place directly above function definition */ - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - - /* Exit low optimization region - place directly after end of function definition */ - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined (__ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined ( __APPLE_CC__ ) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined ( __GNUC__ ) - #define LOW_OPTIMIZATION_ENTER \ - __attribute__(( optimize("-O1") )) - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined ( __ICCARM__ ) - /* Enter low optimization region - place directly above function definition */ - #if defined ( __ARM_ARCH_7EM__ ) - #define LOW_OPTIMIZATION_ENTER \ - _Pragma ("optimize=low") - #else - #define LOW_OPTIMIZATION_ENTER - #endif - - /* Exit low optimization region - place directly after end of function definition */ - #define LOW_OPTIMIZATION_EXIT - - /* Enter low optimization region - place directly above function definition */ - #if defined ( __ARM_ARCH_7EM__ ) - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \ - _Pragma ("optimize=low") - #else - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #endif - - /* Exit low optimization region - place directly after end of function definition */ - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined ( __TI_ARM__ ) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined ( __CSMC__ ) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined ( __TASKING__ ) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined ( _MSC_VER ) || defined(__GNUC_PYTHON__) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT -#endif - - - -/* Compiler specific diagnostic adjustment */ -#if defined ( __CC_ARM ) - -#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) - -#elif defined ( __APPLE_CC__ ) - -#elif defined ( __GNUC__ ) -#pragma GCC diagnostic pop - -#elif defined ( __ICCARM__ ) - -#elif defined ( __TI_ARM__ ) - -#elif defined ( __CSMC__ ) - -#elif defined ( __TASKING__ ) - -#elif defined ( _MSC_VER ) - -#else - #error Unknown compiler -#endif - -#ifdef __cplusplus -} -#endif - -#if defined(__ARM_FEATURE_MVE) && __ARM_FEATURE_MVE -#include -#endif - -#ifdef __cplusplus -extern "C" -{ -#endif - - /** - * @brief 8-bit fractional data type in 1.7 format. - */ - typedef int8_t q7_t; - - /** - * @brief 16-bit fractional data type in 1.15 format. - */ - typedef int16_t q15_t; - - /** - * @brief 32-bit fractional data type in 1.31 format. - */ - typedef int32_t q31_t; - - /** - * @brief 64-bit fractional data type in 1.63 format. - */ - typedef int64_t q63_t; - - /** - * @brief 32-bit floating-point type definition. - */ -#if !defined(__ICCARM__) || !(__ARM_FEATURE_MVE & 2) - typedef float float32_t; -#endif - - /** - * @brief 64-bit floating-point type definition. - */ - typedef double float64_t; - - /** - * @brief vector types - */ -#if defined(ARM_MATH_NEON) || (defined (ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)) - /** - * @brief 64-bit fractional 128-bit vector data type in 1.63 format - */ - typedef int64x2_t q63x2_t; - - /** - * @brief 32-bit fractional 128-bit vector data type in 1.31 format. - */ - typedef int32x4_t q31x4_t; - - /** - * @brief 16-bit fractional 128-bit vector data type with 16-bit alignment in 1.15 format. - */ - typedef __ALIGNED(2) int16x8_t q15x8_t; - - /** - * @brief 8-bit fractional 128-bit vector data type with 8-bit alignment in 1.7 format. - */ - typedef __ALIGNED(1) int8x16_t q7x16_t; - - /** - * @brief 32-bit fractional 128-bit vector pair data type in 1.31 format. - */ - typedef int32x4x2_t q31x4x2_t; - - /** - * @brief 32-bit fractional 128-bit vector quadruplet data type in 1.31 format. - */ - typedef int32x4x4_t q31x4x4_t; - - /** - * @brief 16-bit fractional 128-bit vector pair data type in 1.15 format. - */ - typedef int16x8x2_t q15x8x2_t; - - /** - * @brief 16-bit fractional 128-bit vector quadruplet data type in 1.15 format. - */ - typedef int16x8x4_t q15x8x4_t; - - /** - * @brief 8-bit fractional 128-bit vector pair data type in 1.7 format. - */ - typedef int8x16x2_t q7x16x2_t; - - /** - * @brief 8-bit fractional 128-bit vector quadruplet data type in 1.7 format. - */ - typedef int8x16x4_t q7x16x4_t; - - /** - * @brief 32-bit fractional data type in 9.23 format. - */ - typedef int32_t q23_t; - - /** - * @brief 32-bit fractional 128-bit vector data type in 9.23 format. - */ - typedef int32x4_t q23x4_t; - - /** - * @brief 64-bit status 128-bit vector data type. - */ - typedef int64x2_t status64x2_t; - - /** - * @brief 32-bit status 128-bit vector data type. - */ - typedef int32x4_t status32x4_t; - - /** - * @brief 16-bit status 128-bit vector data type. - */ - typedef int16x8_t status16x8_t; - - /** - * @brief 8-bit status 128-bit vector data type. - */ - typedef int8x16_t status8x16_t; - - -#endif - -#if defined(ARM_MATH_NEON) || (defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)) /* floating point vector*/ - /** - * @brief 32-bit floating-point 128-bit vector type - */ - typedef float32x4_t f32x4_t; - - /** - * @brief 32-bit floating-point 128-bit vector pair data type - */ - typedef float32x4x2_t f32x4x2_t; - - /** - * @brief 32-bit floating-point 128-bit vector quadruplet data type - */ - typedef float32x4x4_t f32x4x4_t; - - /** - * @brief 32-bit ubiquitous 128-bit vector data type - */ - typedef union _any32x4_t - { - float32x4_t f; - int32x4_t i; - } any32x4_t; - -#endif - -#if defined(ARM_MATH_NEON) - /** - * @brief 32-bit fractional 64-bit vector data type in 1.31 format. - */ - typedef int32x2_t q31x2_t; - - /** - * @brief 16-bit fractional 64-bit vector data type in 1.15 format. - */ - typedef __ALIGNED(2) int16x4_t q15x4_t; - - /** - * @brief 8-bit fractional 64-bit vector data type in 1.7 format. - */ - typedef __ALIGNED(1) int8x8_t q7x8_t; - - /** - * @brief 32-bit float 64-bit vector data type. - */ - typedef float32x2_t f32x2_t; - - /** - * @brief 32-bit floating-point 128-bit vector triplet data type - */ - typedef float32x4x3_t f32x4x3_t; - - - /** - * @brief 32-bit fractional 128-bit vector triplet data type in 1.31 format - */ - typedef int32x4x3_t q31x4x3_t; - - /** - * @brief 16-bit fractional 128-bit vector triplet data type in 1.15 format - */ - typedef int16x8x3_t q15x8x3_t; - - /** - * @brief 8-bit fractional 128-bit vector triplet data type in 1.7 format - */ - typedef int8x16x3_t q7x16x3_t; - - /** - * @brief 32-bit floating-point 64-bit vector pair data type - */ - typedef float32x2x2_t f32x2x2_t; - - /** - * @brief 32-bit floating-point 64-bit vector triplet data type - */ - typedef float32x2x3_t f32x2x3_t; - - /** - * @brief 32-bit floating-point 64-bit vector quadruplet data type - */ - typedef float32x2x4_t f32x2x4_t; - - - /** - * @brief 32-bit fractional 64-bit vector pair data type in 1.31 format - */ - typedef int32x2x2_t q31x2x2_t; - - /** - * @brief 32-bit fractional 64-bit vector triplet data type in 1.31 format - */ - typedef int32x2x3_t q31x2x3_t; - - /** - * @brief 32-bit fractional 64-bit vector quadruplet data type in 1.31 format - */ - typedef int32x4x3_t q31x2x4_t; - - /** - * @brief 16-bit fractional 64-bit vector pair data type in 1.15 format - */ - typedef int16x4x2_t q15x4x2_t; - - /** - * @brief 16-bit fractional 64-bit vector triplet data type in 1.15 format - */ - typedef int16x4x2_t q15x4x3_t; - - /** - * @brief 16-bit fractional 64-bit vector quadruplet data type in 1.15 format - */ - typedef int16x4x3_t q15x4x4_t; - - /** - * @brief 8-bit fractional 64-bit vector pair data type in 1.7 format - */ - typedef int8x8x2_t q7x8x2_t; - - /** - * @brief 8-bit fractional 64-bit vector triplet data type in 1.7 format - */ - typedef int8x8x3_t q7x8x3_t; - - /** - * @brief 8-bit fractional 64-bit vector quadruplet data type in 1.7 format - */ - typedef int8x8x4_t q7x8x4_t; - - /** - * @brief 32-bit ubiquitous 64-bit vector data type - */ - typedef union _any32x2_t - { - float32x2_t f; - int32x2_t i; - } any32x2_t; - - - /** - * @brief 32-bit status 64-bit vector data type. - */ - typedef int32x4_t status32x2_t; - - /** - * @brief 16-bit status 64-bit vector data type. - */ - typedef int16x8_t status16x4_t; - - /** - * @brief 8-bit status 64-bit vector data type. - */ - typedef int8x16_t status8x8_t; - -#endif - - - - - -#define F64_MAX ((float64_t)DBL_MAX) -#define F32_MAX ((float32_t)FLT_MAX) - - - -#define F64_MIN (-DBL_MAX) -#define F32_MIN (-FLT_MAX) - - - -#define F64_ABSMAX ((float64_t)DBL_MAX) -#define F32_ABSMAX ((float32_t)FLT_MAX) - - - -#define F64_ABSMIN ((float64_t)0.0) -#define F32_ABSMIN ((float32_t)0.0) - - -#define Q31_MAX ((q31_t)(0x7FFFFFFFL)) -#define Q15_MAX ((q15_t)(0x7FFF)) -#define Q7_MAX ((q7_t)(0x7F)) -#define Q31_MIN ((q31_t)(0x80000000L)) -#define Q15_MIN ((q15_t)(0x8000)) -#define Q7_MIN ((q7_t)(0x80)) - -#define Q31_ABSMAX ((q31_t)(0x7FFFFFFFL)) -#define Q15_ABSMAX ((q15_t)(0x7FFF)) -#define Q7_ABSMAX ((q7_t)(0x7F)) -#define Q31_ABSMIN ((q31_t)0) -#define Q15_ABSMIN ((q15_t)0) -#define Q7_ABSMIN ((q7_t)0) - - /* Dimension C vector space */ - #define CMPLX_DIM 2 - - /** - * @brief Error status returned by some functions in the library. - */ - - typedef enum - { - ARM_MATH_SUCCESS = 0, /**< No error */ - ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */ - ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */ - ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation */ - ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */ - ARM_MATH_SINGULAR = -5, /**< Input matrix is singular and cannot be inverted */ - ARM_MATH_TEST_FAILURE = -6, /**< Test Failed */ - ARM_MATH_DECOMPOSITION_FAILURE = -7 /**< Decomposition Failed */ - } arm_status; - - -#ifdef __cplusplus -} -#endif - -#endif /*ifndef _ARM_MATH_TYPES_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/arm_math_types_f16.h b/Drivers/CMSIS/DSP/Include/arm_math_types_f16.h deleted file mode 100644 index e5d0b55..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_math_types_f16.h +++ /dev/null @@ -1,163 +0,0 @@ -/****************************************************************************** - * @file arm_math_types_f16.h - * @brief Public header file for f16 function of the CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_MATH_TYPES_F16_H -#define _ARM_MATH_TYPES_F16_H - -#include "arm_math_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if !defined( __CC_ARM ) - -/** - * @brief 16-bit floating-point type definition. - * This is already defined in arm_mve.h - * - * This is not fully supported on ARM AC5. - */ - -/* - -Check if the type __fp16 is available. -If it is not available, f16 version of the kernels -won't be built. - -*/ -#if !(__ARM_FEATURE_MVE & 2) - #if !defined(DISABLEFLOAT16) - #if defined(__ARM_FP16_FORMAT_IEEE) || defined(__ARM_FP16_FORMAT_ALTERNATIVE) - typedef __fp16 float16_t; - #define ARM_FLOAT16_SUPPORTED - #endif - #endif -#else - /* When Vector float16, this flag is always defined and can't be disabled */ - #define ARM_FLOAT16_SUPPORTED -#endif - -#if defined(ARM_MATH_NEON) || (defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)) /* floating point vector*/ - -#if defined(ARM_MATH_MVE_FLOAT16) || defined(ARM_MATH_NEON_FLOAT16) - - /** - * @brief 16-bit floating-point 128-bit vector data type - */ - typedef __ALIGNED(2) float16x8_t f16x8_t; - - /** - * @brief 16-bit floating-point 128-bit vector pair data type - */ - typedef float16x8x2_t f16x8x2_t; - - /** - * @brief 16-bit floating-point 128-bit vector quadruplet data type - */ - typedef float16x8x4_t f16x8x4_t; - - /** - * @brief 16-bit ubiquitous 128-bit vector data type - */ - typedef union _any16x8_t - { - float16x8_t f; - int16x8_t i; - } any16x8_t; -#endif - -#endif - -#if defined(ARM_MATH_NEON) - - -#if defined(ARM_MATH_NEON_FLOAT16) - /** - * @brief 16-bit float 64-bit vector data type. - */ - typedef __ALIGNED(2) float16x4_t f16x4_t; - - /** - * @brief 16-bit floating-point 128-bit vector triplet data type - */ - typedef float16x8x3_t f16x8x3_t; - - /** - * @brief 16-bit floating-point 64-bit vector pair data type - */ - typedef float16x4x2_t f16x4x2_t; - - /** - * @brief 16-bit floating-point 64-bit vector triplet data type - */ - typedef float16x4x3_t f16x4x3_t; - - /** - * @brief 16-bit floating-point 64-bit vector quadruplet data type - */ - typedef float16x4x4_t f16x4x4_t; - - /** - * @brief 16-bit ubiquitous 64-bit vector data type - */ - typedef union _any16x4_t - { - float16x4_t f; - int16x4_t i; - } any16x4_t; -#endif - -#endif - - - -#if defined(ARM_FLOAT16_SUPPORTED) - -#if defined(__ICCARM__) - -#define F16INFINITY ((float16_t) INFINITY) - -#else - -#define F16INFINITY ((float16_t)__builtin_inf()) - -#endif - -#define F16_MAX ((float16_t)__FLT16_MAX__) -#define F16_MIN (-(_Float16)__FLT16_MAX__) - -#define F16_ABSMAX ((float16_t)__FLT16_MAX__) -#define F16_ABSMIN ((float16_t)0.0f16) - -#endif /* ARM_FLOAT16_SUPPORTED*/ -#endif /* !defined( __CC_ARM ) */ - -#ifdef __cplusplus -} -#endif - -#endif /* _ARM_MATH_F16_H */ diff --git a/Drivers/CMSIS/DSP/Include/arm_mve_tables.h b/Drivers/CMSIS/DSP/Include/arm_mve_tables.h deleted file mode 100644 index 0f7c1a7..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_mve_tables.h +++ /dev/null @@ -1,231 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mve_tables.h - * Description: common tables like fft twiddle factors, Bitreverse, reciprocal etc - * used for MVE implementation only - * - * @version V1.10.0 - * @date 04 October 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - #ifndef _ARM_MVE_TABLES_H - #define _ARM_MVE_TABLES_H - -#include "arm_math_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - - - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_16_f32[2]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_16_f32[2]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_16_f32[2]; -extern float32_t rearranged_twiddle_stride1_16_f32[8]; -extern float32_t rearranged_twiddle_stride2_16_f32[8]; -extern float32_t rearranged_twiddle_stride3_16_f32[8]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_64_f32[3]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_64_f32[3]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_64_f32[3]; -extern float32_t rearranged_twiddle_stride1_64_f32[40]; -extern float32_t rearranged_twiddle_stride2_64_f32[40]; -extern float32_t rearranged_twiddle_stride3_64_f32[40]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_256_f32[4]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_256_f32[4]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_256_f32[4]; -extern float32_t rearranged_twiddle_stride1_256_f32[168]; -extern float32_t rearranged_twiddle_stride2_256_f32[168]; -extern float32_t rearranged_twiddle_stride3_256_f32[168]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_f32[5]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_f32[5]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_f32[5]; -extern float32_t rearranged_twiddle_stride1_1024_f32[680]; -extern float32_t rearranged_twiddle_stride2_1024_f32[680]; -extern float32_t rearranged_twiddle_stride3_1024_f32[680]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) || defined(ARM_TABLE_TWIDDLECOEF_F32_8192) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_f32[6]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_f32[6]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_f32[6]; -extern float32_t rearranged_twiddle_stride1_4096_f32[2728]; -extern float32_t rearranged_twiddle_stride2_4096_f32[2728]; -extern float32_t rearranged_twiddle_stride3_4096_f32[2728]; -#endif - - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */ - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q31[2]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q31[2]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q31[2]; -extern q31_t rearranged_twiddle_stride1_16_q31[8]; -extern q31_t rearranged_twiddle_stride2_16_q31[8]; -extern q31_t rearranged_twiddle_stride3_16_q31[8]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q31[3]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q31[3]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q31[3]; -extern q31_t rearranged_twiddle_stride1_64_q31[40]; -extern q31_t rearranged_twiddle_stride2_64_q31[40]; -extern q31_t rearranged_twiddle_stride3_64_q31[40]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q31[4]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q31[4]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q31[4]; -extern q31_t rearranged_twiddle_stride1_256_q31[168]; -extern q31_t rearranged_twiddle_stride2_256_q31[168]; -extern q31_t rearranged_twiddle_stride3_256_q31[168]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q31[5]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q31[5]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q31[5]; -extern q31_t rearranged_twiddle_stride1_1024_q31[680]; -extern q31_t rearranged_twiddle_stride2_1024_q31[680]; -extern q31_t rearranged_twiddle_stride3_1024_q31[680]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q31_8192) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q31[6]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q31[6]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q31[6]; -extern q31_t rearranged_twiddle_stride1_4096_q31[2728]; -extern q31_t rearranged_twiddle_stride2_4096_q31[2728]; -extern q31_t rearranged_twiddle_stride3_4096_q31[2728]; -#endif - - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */ - -#endif /* defined(ARM_MATH_MVEI) */ - - - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q15[2]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q15[2]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q15[2]; -extern q15_t rearranged_twiddle_stride1_16_q15[8]; -extern q15_t rearranged_twiddle_stride2_16_q15[8]; -extern q15_t rearranged_twiddle_stride3_16_q15[8]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q15[3]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q15[3]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q15[3]; -extern q15_t rearranged_twiddle_stride1_64_q15[40]; -extern q15_t rearranged_twiddle_stride2_64_q15[40]; -extern q15_t rearranged_twiddle_stride3_64_q15[40]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q15[4]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q15[4]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q15[4]; -extern q15_t rearranged_twiddle_stride1_256_q15[168]; -extern q15_t rearranged_twiddle_stride2_256_q15[168]; -extern q15_t rearranged_twiddle_stride3_256_q15[168]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q15[5]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q15[5]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q15[5]; -extern q15_t rearranged_twiddle_stride1_1024_q15[680]; -extern q15_t rearranged_twiddle_stride2_1024_q15[680]; -extern q15_t rearranged_twiddle_stride3_1024_q15[680]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q15_8192) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q15[6]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q15[6]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q15[6]; -extern q15_t rearranged_twiddle_stride1_4096_q15[2728]; -extern q15_t rearranged_twiddle_stride2_4096_q15[2728]; -extern q15_t rearranged_twiddle_stride3_4096_q15[2728]; -#endif - - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */ - -#endif /* defined(ARM_MATH_MVEI) */ - - - -#ifdef __cplusplus -} -#endif - -#endif /*_ARM_MVE_TABLES_H*/ - diff --git a/Drivers/CMSIS/DSP/Include/arm_mve_tables_f16.h b/Drivers/CMSIS/DSP/Include/arm_mve_tables_f16.h deleted file mode 100644 index 09ec52e..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_mve_tables_f16.h +++ /dev/null @@ -1,109 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mve_tables_f16.h - * Description: common tables like fft twiddle factors, Bitreverse, reciprocal etc - * used for MVE implementation only - * - * @version V1.10.0 - * @date 04 October 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - #ifndef _ARM_MVE_TABLES_F16_H - #define _ARM_MVE_TABLES_F16_H - -#include "arm_math_types_f16.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - - - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_16) || defined(ARM_TABLE_TWIDDLECOEF_F16_32) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_16_f16[2]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_16_f16[2]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_16_f16[2]; -extern float16_t rearranged_twiddle_stride1_16_f16[8]; -extern float16_t rearranged_twiddle_stride2_16_f16[8]; -extern float16_t rearranged_twiddle_stride3_16_f16[8]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_64) || defined(ARM_TABLE_TWIDDLECOEF_F16_128) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_64_f16[3]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_64_f16[3]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_64_f16[3]; -extern float16_t rearranged_twiddle_stride1_64_f16[40]; -extern float16_t rearranged_twiddle_stride2_64_f16[40]; -extern float16_t rearranged_twiddle_stride3_64_f16[40]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_256) || defined(ARM_TABLE_TWIDDLECOEF_F16_512) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_256_f16[4]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_256_f16[4]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_256_f16[4]; -extern float16_t rearranged_twiddle_stride1_256_f16[168]; -extern float16_t rearranged_twiddle_stride2_256_f16[168]; -extern float16_t rearranged_twiddle_stride3_256_f16[168]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_1024) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_f16[5]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_f16[5]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_f16[5]; -extern float16_t rearranged_twiddle_stride1_1024_f16[680]; -extern float16_t rearranged_twiddle_stride2_1024_f16[680]; -extern float16_t rearranged_twiddle_stride3_1024_f16[680]; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096) || defined(ARM_TABLE_TWIDDLECOEF_F16_8192) - -extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_f16[6]; -extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_f16[6]; -extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_f16[6]; -extern float16_t rearranged_twiddle_stride1_4096_f16[2728]; -extern float16_t rearranged_twiddle_stride2_4096_f16[2728]; -extern float16_t rearranged_twiddle_stride3_4096_f16[2728]; -#endif - - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */ - -#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - - -#ifdef __cplusplus -} -#endif - -#endif /*_ARM_MVE_TABLES_F16_H*/ - diff --git a/Drivers/CMSIS/DSP/Include/arm_vec_math.h b/Drivers/CMSIS/DSP/Include/arm_vec_math.h deleted file mode 100644 index 31f9281..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_vec_math.h +++ /dev/null @@ -1,373 +0,0 @@ -/****************************************************************************** - * @file arm_vec_math.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_VEC_MATH_H -#define _ARM_VEC_MATH_H - -#include "arm_math_types.h" -#include "arm_common_tables.h" -#include "arm_helium_utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define INV_NEWTON_INIT_F32 0x7EF127EA - -static const float32_t __logf_rng_f32=0.693147180f; - - -/* fast inverse approximation (3x newton) */ -__STATIC_INLINE f32x4_t vrecip_medprec_f32( - f32x4_t x) -{ - q31x4_t m; - f32x4_t b; - any32x4_t xinv; - f32x4_t ax = vabsq(x); - - xinv.f = ax; - m = 0x3F800000 - (xinv.i & 0x7F800000); - xinv.i = xinv.i + m; - xinv.f = 1.41176471f - 0.47058824f * xinv.f; - xinv.i = xinv.i + m; - - b = 2.0f - xinv.f * ax; - xinv.f = xinv.f * b; - - b = 2.0f - xinv.f * ax; - xinv.f = xinv.f * b; - - b = 2.0f - xinv.f * ax; - xinv.f = xinv.f * b; - - xinv.f = vdupq_m(xinv.f, INFINITY, vcmpeqq(x, 0.0f)); - /* - * restore sign - */ - xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq(x, 0.0f)); - - return xinv.f; -} - -/* fast inverse approximation (4x newton) */ -__STATIC_INLINE f32x4_t vrecip_hiprec_f32( - f32x4_t x) -{ - q31x4_t m; - f32x4_t b; - any32x4_t xinv; - f32x4_t ax = vabsq(x); - - xinv.f = ax; - - m = 0x3F800000 - (xinv.i & 0x7F800000); - xinv.i = xinv.i + m; - xinv.f = 1.41176471f - 0.47058824f * xinv.f; - xinv.i = xinv.i + m; - - b = 2.0f - xinv.f * ax; - xinv.f = xinv.f * b; - - b = 2.0f - xinv.f * ax; - xinv.f = xinv.f * b; - - b = 2.0f - xinv.f * ax; - xinv.f = xinv.f * b; - - b = 2.0f - xinv.f * ax; - xinv.f = xinv.f * b; - - xinv.f = vdupq_m(xinv.f, INFINITY, vcmpeqq(x, 0.0f)); - /* - * restore sign - */ - xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq(x, 0.0f)); - - return xinv.f; -} - -__STATIC_INLINE f32x4_t vdiv_f32( - f32x4_t num, f32x4_t den) -{ - return vmulq(num, vrecip_hiprec_f32(den)); -} - -/** - @brief Single-precision taylor dev. - @param[in] x f32 quad vector input - @param[in] coeffs f32 quad vector coeffs - @return destination f32 quad vector - */ - -__STATIC_INLINE f32x4_t vtaylor_polyq_f32( - f32x4_t x, - const float32_t * coeffs) -{ - f32x4_t A = vfmasq(vdupq_n_f32(coeffs[4]), x, coeffs[0]); - f32x4_t B = vfmasq(vdupq_n_f32(coeffs[6]), x, coeffs[2]); - f32x4_t C = vfmasq(vdupq_n_f32(coeffs[5]), x, coeffs[1]); - f32x4_t D = vfmasq(vdupq_n_f32(coeffs[7]), x, coeffs[3]); - f32x4_t x2 = vmulq(x, x); - f32x4_t x4 = vmulq(x2, x2); - f32x4_t res = vfmaq(vfmaq_f32(A, B, x2), vfmaq_f32(C, D, x2), x4); - - return res; -} - -__STATIC_INLINE f32x4_t vmant_exp_f32( - f32x4_t x, - int32x4_t * e) -{ - any32x4_t r; - int32x4_t n; - - r.f = x; - n = r.i >> 23; - n = n - 127; - r.i = r.i - (n << 23); - - *e = n; - return r.f; -} - - -__STATIC_INLINE f32x4_t vlogq_f32(f32x4_t vecIn) -{ - q31x4_t vecExpUnBiased; - f32x4_t vecTmpFlt0, vecTmpFlt1; - f32x4_t vecAcc0, vecAcc1, vecAcc2, vecAcc3; - f32x4_t vecExpUnBiasedFlt; - - /* - * extract exponent - */ - vecTmpFlt1 = vmant_exp_f32(vecIn, &vecExpUnBiased); - - vecTmpFlt0 = vecTmpFlt1 * vecTmpFlt1; - /* - * a = (__logf_lut_f32[4] * r.f) + (__logf_lut_f32[0]); - */ - vecAcc0 = vdupq_n_f32(__logf_lut_f32[0]); - vecAcc0 = vfmaq(vecAcc0, vecTmpFlt1, __logf_lut_f32[4]); - /* - * b = (__logf_lut_f32[6] * r.f) + (__logf_lut_f32[2]); - */ - vecAcc1 = vdupq_n_f32(__logf_lut_f32[2]); - vecAcc1 = vfmaq(vecAcc1, vecTmpFlt1, __logf_lut_f32[6]); - /* - * c = (__logf_lut_f32[5] * r.f) + (__logf_lut_f32[1]); - */ - vecAcc2 = vdupq_n_f32(__logf_lut_f32[1]); - vecAcc2 = vfmaq(vecAcc2, vecTmpFlt1, __logf_lut_f32[5]); - /* - * d = (__logf_lut_f32[7] * r.f) + (__logf_lut_f32[3]); - */ - vecAcc3 = vdupq_n_f32(__logf_lut_f32[3]); - vecAcc3 = vfmaq(vecAcc3, vecTmpFlt1, __logf_lut_f32[7]); - /* - * a = a + b * xx; - */ - vecAcc0 = vfmaq(vecAcc0, vecAcc1, vecTmpFlt0); - /* - * c = c + d * xx; - */ - vecAcc2 = vfmaq(vecAcc2, vecAcc3, vecTmpFlt0); - /* - * xx = xx * xx; - */ - vecTmpFlt0 = vecTmpFlt0 * vecTmpFlt0; - vecExpUnBiasedFlt = vcvtq_f32_s32(vecExpUnBiased); - /* - * r.f = a + c * xx; - */ - vecAcc0 = vfmaq(vecAcc0, vecAcc2, vecTmpFlt0); - /* - * add exponent - * r.f = r.f + ((float32_t) m) * __logf_rng_f32; - */ - vecAcc0 = vfmaq(vecAcc0, vecExpUnBiasedFlt, __logf_rng_f32); - // set log0 down to -inf - vecAcc0 = vdupq_m(vecAcc0, -INFINITY, vcmpeqq(vecIn, 0.0f)); - return vecAcc0; -} - -__STATIC_INLINE f32x4_t vexpq_f32( - f32x4_t x) -{ - // Perform range reduction [-log(2),log(2)] - int32x4_t m = vcvtq_s32_f32(vmulq_n_f32(x, 1.4426950408f)); - f32x4_t val = vfmsq_f32(x, vcvtq_f32_s32(m), vdupq_n_f32(0.6931471805f)); - - // Polynomial Approximation - f32x4_t poly = vtaylor_polyq_f32(val, exp_tab); - - // Reconstruct - poly = (f32x4_t) (vqaddq_s32((q31x4_t) (poly), vqshlq_n_s32(m, 23))); - - poly = vdupq_m(poly, 0.0f, vcmpltq_n_s32(m, -126)); - return poly; -} - -__STATIC_INLINE f32x4_t arm_vec_exponent_f32(f32x4_t x, int32_t nb) -{ - f32x4_t r = x; - nb--; - while (nb > 0) { - r = vmulq(r, x); - nb--; - } - return (r); -} - -__STATIC_INLINE f32x4_t vrecip_f32(f32x4_t vecIn) -{ - f32x4_t vecSx, vecW, vecTmp; - any32x4_t v; - - vecSx = vabsq(vecIn); - - v.f = vecIn; - v.i = vsubq(vdupq_n_s32(INV_NEWTON_INIT_F32), v.i); - - vecW = vmulq(vecSx, v.f); - - // v.f = v.f * (8 + w * (-28 + w * (56 + w * (-70 + w *(56 + w * (-28 + w * (8 - w))))))); - vecTmp = vsubq(vdupq_n_f32(8.0f), vecW); - vecTmp = vfmasq(vecW, vecTmp, -28.0f); - vecTmp = vfmasq(vecW, vecTmp, 56.0f); - vecTmp = vfmasq(vecW, vecTmp, -70.0f); - vecTmp = vfmasq(vecW, vecTmp, 56.0f); - vecTmp = vfmasq(vecW, vecTmp, -28.0f); - vecTmp = vfmasq(vecW, vecTmp, 8.0f); - v.f = vmulq(v.f, vecTmp); - - v.f = vdupq_m(v.f, INFINITY, vcmpeqq(vecIn, 0.0f)); - /* - * restore sign - */ - v.f = vnegq_m(v.f, v.f, vcmpltq(vecIn, 0.0f)); - return v.f; -} - -__STATIC_INLINE f32x4_t vtanhq_f32( - f32x4_t val) -{ - f32x4_t x = - vminnmq_f32(vmaxnmq_f32(val, vdupq_n_f32(-10.f)), vdupq_n_f32(10.0f)); - f32x4_t exp2x = vexpq_f32(vmulq_n_f32(x, 2.f)); - f32x4_t num = vsubq_n_f32(exp2x, 1.f); - f32x4_t den = vaddq_n_f32(exp2x, 1.f); - f32x4_t tanh = vmulq_f32(num, vrecip_f32(den)); - return tanh; -} - -__STATIC_INLINE f32x4_t vpowq_f32( - f32x4_t val, - f32x4_t n) -{ - return vexpq_f32(vmulq_f32(n, vlogq_f32(val))); -} - -#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)*/ - -#if (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) -#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */ - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "NEMath.h" -/** - * @brief Vectorized integer exponentiation - * @param[in] x value - * @param[in] nb integer exponent >= 1 - * @return x^nb - * - */ -__STATIC_INLINE float32x4_t arm_vec_exponent_f32(float32x4_t x, int32_t nb) -{ - float32x4_t r = x; - nb --; - while(nb > 0) - { - r = vmulq_f32(r , x); - nb--; - } - return(r); -} - - -__STATIC_INLINE float32x4_t __arm_vec_sqrt_f32_neon(float32x4_t x) -{ - float32x4_t x1 = vmaxq_f32(x, vdupq_n_f32(FLT_MIN)); - float32x4_t e = vrsqrteq_f32(x1); - e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e); - e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e); - return vmulq_f32(x, e); -} - -__STATIC_INLINE int16x8_t __arm_vec_sqrt_q15_neon(int16x8_t vec) -{ - float32x4_t tempF; - int32x4_t tempHI,tempLO; - - tempLO = vmovl_s16(vget_low_s16(vec)); - tempF = vcvtq_n_f32_s32(tempLO,15); - tempF = __arm_vec_sqrt_f32_neon(tempF); - tempLO = vcvtq_n_s32_f32(tempF,15); - - tempHI = vmovl_s16(vget_high_s16(vec)); - tempF = vcvtq_n_f32_s32(tempHI,15); - tempF = __arm_vec_sqrt_f32_neon(tempF); - tempHI = vcvtq_n_s32_f32(tempF,15); - - return(vcombine_s16(vqmovn_s32(tempLO),vqmovn_s32(tempHI))); -} - -__STATIC_INLINE int32x4_t __arm_vec_sqrt_q31_neon(int32x4_t vec) -{ - float32x4_t temp; - - temp = vcvtq_n_f32_s32(vec,31); - temp = __arm_vec_sqrt_f32_neon(temp); - return(vcvtq_n_s32_f32(temp,31)); -} - -#endif /* (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -#ifdef __cplusplus -} -#endif - - -#endif /* _ARM_VEC_MATH_H */ - -/** - * - * End of file. - */ diff --git a/Drivers/CMSIS/DSP/Include/arm_vec_math_f16.h b/Drivers/CMSIS/DSP/Include/arm_vec_math_f16.h deleted file mode 100644 index 499b124..0000000 --- a/Drivers/CMSIS/DSP/Include/arm_vec_math_f16.h +++ /dev/null @@ -1,312 +0,0 @@ -/****************************************************************************** - * @file arm_vec_math_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_VEC_MATH_F16_H -#define _ARM_VEC_MATH_F16_H - -#include "arm_math_types_f16.h" -#include "arm_common_tables_f16.h" -#include "arm_helium_utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) - - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - - -static const float16_t __logf_rng_f16=0.693147180f16; - -/* fast inverse approximation (3x newton) */ -__STATIC_INLINE f16x8_t vrecip_medprec_f16( - f16x8_t x) -{ - q15x8_t m; - f16x8_t b; - any16x8_t xinv; - f16x8_t ax = vabsq(x); - - xinv.f = ax; - - m = 0x03c00 - (xinv.i & 0x07c00); - xinv.i = xinv.i + m; - xinv.f = 1.41176471f16 - 0.47058824f16 * xinv.f; - xinv.i = xinv.i + m; - - b = 2.0f16 - xinv.f * ax; - xinv.f = xinv.f * b; - - b = 2.0f16 - xinv.f * ax; - xinv.f = xinv.f * b; - - b = 2.0f16 - xinv.f * ax; - xinv.f = xinv.f * b; - - xinv.f = vdupq_m_n_f16(xinv.f, F16INFINITY, vcmpeqq_n_f16(x, 0.0f)); - /* - * restore sign - */ - xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq_n_f16(x, 0.0f)); - - return xinv.f; -} - -/* fast inverse approximation (4x newton) */ -__STATIC_INLINE f16x8_t vrecip_hiprec_f16( - f16x8_t x) -{ - q15x8_t m; - f16x8_t b; - any16x8_t xinv; - f16x8_t ax = vabsq(x); - - xinv.f = ax; - - m = 0x03c00 - (xinv.i & 0x07c00); - xinv.i = xinv.i + m; - xinv.f = 1.41176471f16 - 0.47058824f16 * xinv.f; - xinv.i = xinv.i + m; - - b = 2.0f16 - xinv.f * ax; - xinv.f = xinv.f * b; - - b = 2.0f16 - xinv.f * ax; - xinv.f = xinv.f * b; - - b = 2.0f16 - xinv.f * ax; - xinv.f = xinv.f * b; - - b = 2.0f16 - xinv.f * ax; - xinv.f = xinv.f * b; - - xinv.f = vdupq_m_n_f16(xinv.f, F16INFINITY, vcmpeqq_n_f16(x, 0.0f)); - /* - * restore sign - */ - xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq_n_f16(x, 0.0f)); - - return xinv.f; -} - -__STATIC_INLINE f16x8_t vdiv_f16( - f16x8_t num, f16x8_t den) -{ - return vmulq(num, vrecip_hiprec_f16(den)); -} - - -/** - @brief Single-precision taylor dev. - @param[in] x f16 vector input - @param[in] coeffs f16 vector coeffs - @return destination f16 vector - */ - -__STATIC_INLINE float16x8_t vtaylor_polyq_f16( - float16x8_t x, - const float16_t * coeffs) -{ - float16x8_t A = vfmasq(vdupq_n_f16(coeffs[4]), x, coeffs[0]); - float16x8_t B = vfmasq(vdupq_n_f16(coeffs[6]), x, coeffs[2]); - float16x8_t C = vfmasq(vdupq_n_f16(coeffs[5]), x, coeffs[1]); - float16x8_t D = vfmasq(vdupq_n_f16(coeffs[7]), x, coeffs[3]); - float16x8_t x2 = vmulq(x, x); - float16x8_t x4 = vmulq(x2, x2); - float16x8_t res = vfmaq(vfmaq_f16(A, B, x2), vfmaq_f16(C, D, x2), x4); - - return res; -} - -#define VMANT_EXP_F16(x) \ - any16x8_t r; \ - int16x8_t n; \ - \ - r.f = x; \ - n = r.i >> 10; \ - n = n - 15; \ - r.i = r.i - (n << 10);\ - \ - vecExpUnBiased = n; \ - vecTmpFlt1 = r.f; - -__STATIC_INLINE float16x8_t vlogq_f16(float16x8_t vecIn) -{ - q15x8_t vecExpUnBiased; - float16x8_t vecTmpFlt0, vecTmpFlt1; - float16x8_t vecAcc0, vecAcc1, vecAcc2, vecAcc3; - float16x8_t vecExpUnBiasedFlt; - - /* - * extract exponent - */ - VMANT_EXP_F16(vecIn); - - vecTmpFlt0 = vecTmpFlt1 * vecTmpFlt1; - /* - * a = (__logf_lut_f16[4] * r.f) + (__logf_lut_f16[0]); - */ - vecAcc0 = vdupq_n_f16(__logf_lut_f16[0]); - vecAcc0 = vfmaq(vecAcc0, vecTmpFlt1, __logf_lut_f16[4]); - /* - * b = (__logf_lut_f16[6] * r.f) + (__logf_lut_f16[2]); - */ - vecAcc1 = vdupq_n_f16(__logf_lut_f16[2]); - vecAcc1 = vfmaq(vecAcc1, vecTmpFlt1, __logf_lut_f16[6]); - /* - * c = (__logf_lut_f16[5] * r.f) + (__logf_lut_f16[1]); - */ - vecAcc2 = vdupq_n_f16(__logf_lut_f16[1]); - vecAcc2 = vfmaq(vecAcc2, vecTmpFlt1, __logf_lut_f16[5]); - /* - * d = (__logf_lut_f16[7] * r.f) + (__logf_lut_f16[3]); - */ - vecAcc3 = vdupq_n_f16(__logf_lut_f16[3]); - vecAcc3 = vfmaq(vecAcc3, vecTmpFlt1, __logf_lut_f16[7]); - /* - * a = a + b * xx; - */ - vecAcc0 = vfmaq(vecAcc0, vecAcc1, vecTmpFlt0); - /* - * c = c + d * xx; - */ - vecAcc2 = vfmaq(vecAcc2, vecAcc3, vecTmpFlt0); - /* - * xx = xx * xx; - */ - vecTmpFlt0 = vecTmpFlt0 * vecTmpFlt0; - vecExpUnBiasedFlt = vcvtq_f16_s16(vecExpUnBiased); - /* - * r.f = a + c * xx; - */ - vecAcc0 = vfmaq(vecAcc0, vecAcc2, vecTmpFlt0); - /* - * add exponent - * r.f = r.f + ((float32_t) m) * __logf_rng_f16; - */ - vecAcc0 = vfmaq(vecAcc0, vecExpUnBiasedFlt, __logf_rng_f16); - // set log0 down to -inf - vecAcc0 = vdupq_m_n_f16(vecAcc0, -(_Float16)F16INFINITY, vcmpeqq_n_f16(vecIn, 0.0f)); - return vecAcc0; -} - -__STATIC_INLINE float16x8_t vexpq_f16( - float16x8_t x) -{ - // Perform range reduction [-log(2),log(2)] - int16x8_t m = vcvtq_s16_f16(vmulq_n_f16(x, 1.4426950408f16)); - float16x8_t val = vfmsq_f16(x, vcvtq_f16_s16(m), vdupq_n_f16(0.6931471805f16)); - - // Polynomial Approximation - float16x8_t poly = vtaylor_polyq_f16(val, exp_tab_f16); - - // Reconstruct - poly = (float16x8_t) (vqaddq_s16((int16x8_t) (poly), vqshlq_n_s16(m, 10))); - - poly = vdupq_m_n_f16(poly, 0.0f16, vcmpltq_n_s16(m, -14)); - return poly; -} - -__STATIC_INLINE float16x8_t arm_vec_exponent_f16(float16x8_t x, int16_t nb) -{ - float16x8_t r = x; - nb--; - while (nb > 0) { - r = vmulq(r, x); - nb--; - } - return (r); -} - -__STATIC_INLINE f16x8_t vpowq_f16( - f16x8_t val, - f16x8_t n) -{ - return vexpq_f16(vmulq_f16(n, vlogq_f16(val))); -} - -#define INV_NEWTON_INIT_F16 0x7773 - -__STATIC_INLINE f16x8_t vrecip_f16(f16x8_t vecIn) -{ - f16x8_t vecSx, vecW, vecTmp; - any16x8_t v; - - vecSx = vabsq(vecIn); - - v.f = vecIn; - v.i = vsubq(vdupq_n_s16(INV_NEWTON_INIT_F16), v.i); - - vecW = vmulq(vecSx, v.f); - - // v.f = v.f * (8 + w * (-28 + w * (56 + w * (-70 + w *(56 + w * (-28 + w * (8 - w))))))); - vecTmp = vsubq(vdupq_n_f16(8.0f16), vecW); - vecTmp = vfmasq_n_f16(vecW, vecTmp, -28.0f16); - vecTmp = vfmasq_n_f16(vecW, vecTmp, 56.0f16); - vecTmp = vfmasq_n_f16(vecW, vecTmp, -70.0f16); - vecTmp = vfmasq_n_f16(vecW, vecTmp, 56.0f16); - vecTmp = vfmasq_n_f16(vecW, vecTmp, -28.0f16); - vecTmp = vfmasq_n_f16(vecW, vecTmp, 8.0f16); - v.f = vmulq(v.f, vecTmp); - - v.f = vdupq_m_n_f16(v.f, F16INFINITY, vcmpeqq_n_f16(vecIn, 0.0f)); - /* - * restore sign - */ - v.f = vnegq_m(v.f, v.f, vcmpltq_n_f16(vecIn, 0.0f)); - return v.f; -} - -__STATIC_INLINE f16x8_t vtanhq_f16( - f16x8_t val) -{ - f16x8_t x = - vminnmq_f16(vmaxnmq_f16(val, vdupq_n_f16(-10.f16)), vdupq_n_f16(10.0f16)); - f16x8_t exp2x = vexpq_f16(vmulq_n_f16(x, 2.f16)); - f16x8_t num = vsubq_n_f16(exp2x, 1.f16); - f16x8_t den = vaddq_n_f16(exp2x, 1.f16); - f16x8_t tanh = vmulq_f16(num, vrecip_f16(den)); - return tanh; -} - -#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)*/ - - - -#ifdef __cplusplus -} -#endif - -#endif /* ARM FLOAT16 SUPPORTED */ - -#endif /* _ARM_VEC_MATH_F16_H */ - -/** - * - * End of file. - */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/basic_math_functions.h b/Drivers/CMSIS/DSP/Include/dsp/basic_math_functions.h deleted file mode 100644 index 70c5049..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/basic_math_functions.h +++ /dev/null @@ -1,880 +0,0 @@ -/****************************************************************************** - * @file basic_math_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _BASIC_MATH_FUNCTIONS_H_ -#define _BASIC_MATH_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/** - * @defgroup groupMath Basic Math Functions - */ - - /** - * @brief Q7 vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Floating-point vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize); - - - -/** - * @brief Floating-point vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ -void arm_mult_f64( -const float64_t * pSrcA, -const float64_t * pSrcB, - float64_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Floating-point vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize); - - - -/** - * @brief Floating-point vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_f64( - const float64_t * pSrcA, - const float64_t * pSrcB, - float64_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Q7 vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Floating-point vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Floating-point vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_f64( - const float64_t * pSrcA, - const float64_t * pSrcB, - float64_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Q7 vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a floating-point vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scale scale factor to be applied - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_f32( - const float32_t * pSrc, - float32_t scale, - float32_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Multiplies a floating-point vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scale scale factor to be applied - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_f64( - const float64_t * pSrc, - float64_t scale, - float64_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Multiplies a Q7 vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_q7( - const q7_t * pSrc, - q7_t scaleFract, - int8_t shift, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a Q15 vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_q15( - const q15_t * pSrc, - q15_t scaleFract, - int8_t shift, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a Q31 vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_q31( - const q31_t * pSrc, - q31_t scaleFract, - int8_t shift, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q7 vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_q7( - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Floating-point vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - -/** - * @brief Floating-point vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ -void arm_abs_f64( -const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Q15 vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Dot product of floating-point vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t blockSize, - float32_t * result); - - - -/** - * @brief Dot product of floating-point vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ -void arm_dot_prod_f64( -const float64_t * pSrcA, -const float64_t * pSrcB, - uint32_t blockSize, - float64_t * result); - - - - /** - * @brief Dot product of Q7 vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - uint32_t blockSize, - q31_t * result); - - - /** - * @brief Dot product of Q15 vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - uint32_t blockSize, - q63_t * result); - - - /** - * @brief Dot product of Q31 vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - uint32_t blockSize, - q63_t * result); - - - /** - * @brief Shifts the elements of a Q7 vector a specified number of bits. - * @param[in] pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_shift_q7( - const q7_t * pSrc, - int8_t shiftBits, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Shifts the elements of a Q15 vector a specified number of bits. - * @param[in] pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_shift_q15( - const q15_t * pSrc, - int8_t shiftBits, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Shifts the elements of a Q31 vector a specified number of bits. - * @param[in] pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_shift_q31( - const q31_t * pSrc, - int8_t shiftBits, - q31_t * pDst, - uint32_t blockSize); - - -/** - * @brief Adds a constant offset to a floating-point vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ -void arm_offset_f64( -const float64_t * pSrc, - float64_t offset, - float64_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Adds a constant offset to a floating-point vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_f32( - const float32_t * pSrc, - float32_t offset, - float32_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Adds a constant offset to a Q7 vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_q7( - const q7_t * pSrc, - q7_t offset, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a Q15 vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_q15( - const q15_t * pSrc, - q15_t offset, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a Q31 vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_q31( - const q31_t * pSrc, - q31_t offset, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a floating-point vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - -/** - * @brief Negates the elements of a floating-point vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ -void arm_negate_f64( -const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Negates the elements of a Q7 vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_q7( - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a Q15 vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a Q31 vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - -/** - * @brief Compute the logical bitwise AND of two fixed-point vectors. - * @param[in] pSrcA points to input vector A - * @param[in] pSrcB points to input vector B - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_and_u16( - const uint16_t * pSrcA, - const uint16_t * pSrcB, - uint16_t * pDst, - uint32_t blockSize); - - /** - * @brief Compute the logical bitwise AND of two fixed-point vectors. - * @param[in] pSrcA points to input vector A - * @param[in] pSrcB points to input vector B - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_and_u32( - const uint32_t * pSrcA, - const uint32_t * pSrcB, - uint32_t * pDst, - uint32_t blockSize); - - /** - * @brief Compute the logical bitwise AND of two fixed-point vectors. - * @param[in] pSrcA points to input vector A - * @param[in] pSrcB points to input vector B - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_and_u8( - const uint8_t * pSrcA, - const uint8_t * pSrcB, - uint8_t * pDst, - uint32_t blockSize); - - /** - * @brief Compute the logical bitwise OR of two fixed-point vectors. - * @param[in] pSrcA points to input vector A - * @param[in] pSrcB points to input vector B - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_or_u16( - const uint16_t * pSrcA, - const uint16_t * pSrcB, - uint16_t * pDst, - uint32_t blockSize); - - /** - * @brief Compute the logical bitwise OR of two fixed-point vectors. - * @param[in] pSrcA points to input vector A - * @param[in] pSrcB points to input vector B - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_or_u32( - const uint32_t * pSrcA, - const uint32_t * pSrcB, - uint32_t * pDst, - uint32_t blockSize); - - /** - * @brief Compute the logical bitwise OR of two fixed-point vectors. - * @param[in] pSrcA points to input vector A - * @param[in] pSrcB points to input vector B - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_or_u8( - const uint8_t * pSrcA, - const uint8_t * pSrcB, - uint8_t * pDst, - uint32_t blockSize); - - /** - * @brief Compute the logical bitwise NOT of a fixed-point vector. - * @param[in] pSrc points to input vector - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_not_u16( - const uint16_t * pSrc, - uint16_t * pDst, - uint32_t blockSize); - - /** - * @brief Compute the logical bitwise NOT of a fixed-point vector. - * @param[in] pSrc points to input vector - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_not_u32( - const uint32_t * pSrc, - uint32_t * pDst, - uint32_t blockSize); - - /** - * @brief Compute the logical bitwise NOT of a fixed-point vector. - * @param[in] pSrc points to input vector - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_not_u8( - const uint8_t * pSrc, - uint8_t * pDst, - uint32_t blockSize); - -/** - * @brief Compute the logical bitwise XOR of two fixed-point vectors. - * @param[in] pSrcA points to input vector A - * @param[in] pSrcB points to input vector B - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_xor_u16( - const uint16_t * pSrcA, - const uint16_t * pSrcB, - uint16_t * pDst, - uint32_t blockSize); - - /** - * @brief Compute the logical bitwise XOR of two fixed-point vectors. - * @param[in] pSrcA points to input vector A - * @param[in] pSrcB points to input vector B - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_xor_u32( - const uint32_t * pSrcA, - const uint32_t * pSrcB, - uint32_t * pDst, - uint32_t blockSize); - - /** - * @brief Compute the logical bitwise XOR of two fixed-point vectors. - * @param[in] pSrcA points to input vector A - * @param[in] pSrcB points to input vector B - * @param[out] pDst points to output vector - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_xor_u8( - const uint8_t * pSrcA, - const uint8_t * pSrcB, - uint8_t * pDst, - uint32_t blockSize); - - /** - @brief Elementwise floating-point clipping - @param[in] pSrc points to input values - @param[out] pDst points to output clipped values - @param[in] low lower bound - @param[in] high higher bound - @param[in] numSamples number of samples to clip - @return none - */ - -void arm_clip_f32(const float32_t * pSrc, - float32_t * pDst, - float32_t low, - float32_t high, - uint32_t numSamples); - - /** - @brief Elementwise fixed-point clipping - @param[in] pSrc points to input values - @param[out] pDst points to output clipped values - @param[in] low lower bound - @param[in] high higher bound - @param[in] numSamples number of samples to clip - @return none - */ - -void arm_clip_q31(const q31_t * pSrc, - q31_t * pDst, - q31_t low, - q31_t high, - uint32_t numSamples); - - /** - @brief Elementwise fixed-point clipping - @param[in] pSrc points to input values - @param[out] pDst points to output clipped values - @param[in] low lower bound - @param[in] high higher bound - @param[in] numSamples number of samples to clip - @return none - */ - -void arm_clip_q15(const q15_t * pSrc, - q15_t * pDst, - q15_t low, - q15_t high, - uint32_t numSamples); - - /** - @brief Elementwise fixed-point clipping - @param[in] pSrc points to input values - @param[out] pDst points to output clipped values - @param[in] low lower bound - @param[in] high higher bound - @param[in] numSamples number of samples to clip - @return none - */ - -void arm_clip_q7(const q7_t * pSrc, - q7_t * pDst, - q7_t low, - q7_t high, - uint32_t numSamples); - - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _BASIC_MATH_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/basic_math_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/basic_math_functions_f16.h deleted file mode 100644 index d49e0ff..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/basic_math_functions_f16.h +++ /dev/null @@ -1,168 +0,0 @@ -/****************************************************************************** - * @file basic_math_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _BASIC_MATH_FUNCTIONS_F16_H_ -#define _BASIC_MATH_FUNCTIONS_F16_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - - -#if defined(ARM_FLOAT16_SUPPORTED) - - - /** - * @brief Floating-point vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t blockSize); - - /** - * @brief Floating-point vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t blockSize); - - /** - * @brief Multiplies a floating-point vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scale scale factor to be applied - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_f16( - const float16_t * pSrc, - float16_t scale, - float16_t * pDst, - uint32_t blockSize); - - /** - * @brief Floating-point vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a floating-point vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_f16( - const float16_t * pSrc, - float16_t offset, - float16_t * pDst, - uint32_t blockSize); - - /** - * @brief Dot product of floating-point vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - uint32_t blockSize, - float16_t * result); - - /** - * @brief Floating-point vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t blockSize); - - /** - * @brief Negates the elements of a floating-point vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize); - - /** - @brief Elementwise floating-point clipping - @param[in] pSrc points to input values - @param[out] pDst points to output clipped values - @param[in] low lower bound - @param[in] high higher bound - @param[in] numSamples number of samples to clip - @return none - */ - -void arm_clip_f16(const float16_t * pSrc, - float16_t * pDst, - float16_t low, - float16_t high, - uint32_t numSamples); - -#endif /* defined(ARM_FLOAT16_SUPPORTED)*/ - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _BASIC_MATH_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/bayes_functions.h b/Drivers/CMSIS/DSP/Include/dsp/bayes_functions.h deleted file mode 100644 index 5b1bdc6..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/bayes_functions.h +++ /dev/null @@ -1,89 +0,0 @@ -/****************************************************************************** - * @file bayes_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _BAYES_FUNCTIONS_H_ -#define _BAYES_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#include "dsp/statistics_functions.h" - -/** - * @defgroup groupBayes Bayesian estimators - * - * Implement the naive gaussian Bayes estimator. - * The training must be done from scikit-learn. - * - * The parameters can be easily - * generated from the scikit-learn object. Some examples are given in - * DSP/Testing/PatternGeneration/Bayes.py - */ - -#ifdef __cplusplus -extern "C" -{ -#endif - -/** - * @brief Instance structure for Naive Gaussian Bayesian estimator. - */ -typedef struct -{ - uint32_t vectorDimension; /**< Dimension of vector space */ - uint32_t numberOfClasses; /**< Number of different classes */ - const float32_t *theta; /**< Mean values for the Gaussians */ - const float32_t *sigma; /**< Variances for the Gaussians */ - const float32_t *classPriors; /**< Class prior probabilities */ - float32_t epsilon; /**< Additive value to variances */ -} arm_gaussian_naive_bayes_instance_f32; - -/** - * @brief Naive Gaussian Bayesian Estimator - * - * @param[in] S points to a naive bayes instance structure - * @param[in] in points to the elements of the input vector. - * @param[out] *pOutputProbabilities points to a buffer of length numberOfClasses containing estimated probabilities - * @param[out] *pBufferB points to a temporary buffer of length numberOfClasses - * @return The predicted class - * - */ - - -uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, - const float32_t * in, - float32_t *pOutputProbabilities, - float32_t *pBufferB); - - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _BAYES_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/bayes_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/bayes_functions_f16.h deleted file mode 100644 index c1b9251..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/bayes_functions_f16.h +++ /dev/null @@ -1,80 +0,0 @@ -/****************************************************************************** - * @file bayes_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.9.0 - * @date 23 April 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _BAYES_FUNCTIONS_F16_H_ -#define _BAYES_FUNCTIONS_F16_H_ - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#include "dsp/statistics_functions_f16.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - * @brief Instance structure for Naive Gaussian Bayesian estimator. - */ -typedef struct -{ - uint32_t vectorDimension; /**< Dimension of vector space */ - uint32_t numberOfClasses; /**< Number of different classes */ - const float16_t *theta; /**< Mean values for the Gaussians */ - const float16_t *sigma; /**< Variances for the Gaussians */ - const float16_t *classPriors; /**< Class prior probabilities */ - float16_t epsilon; /**< Additive value to variances */ -} arm_gaussian_naive_bayes_instance_f16; - -/** - * @brief Naive Gaussian Bayesian Estimator - * - * @param[in] S points to a naive bayes instance structure - * @param[in] in points to the elements of the input vector. - * @param[out] *pOutputProbabilities points to a buffer of length numberOfClasses containing estimated probabilities - * @param[out] *pBufferB points to a temporary buffer of length numberOfClasses - * @return The predicted class - * - */ - - -uint32_t arm_gaussian_naive_bayes_predict_f16(const arm_gaussian_naive_bayes_instance_f16 *S, - const float16_t * in, - float16_t *pOutputProbabilities, - float16_t *pBufferB); - -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _BAYES_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/complex_math_functions.h b/Drivers/CMSIS/DSP/Include/dsp/complex_math_functions.h deleted file mode 100644 index 677eca8..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/complex_math_functions.h +++ /dev/null @@ -1,345 +0,0 @@ -/****************************************************************************** - * @file complex_math_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _COMPLEX_MATH_FUNCTIONS_H_ -#define _COMPLEX_MATH_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" -#include "dsp/fast_math_functions.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -/** - * @defgroup groupCmplxMath Complex Math Functions - * This set of functions operates on complex data vectors. - * The data in the complex arrays is stored in an interleaved fashion - * (real, imag, real, imag, ...). - * In the API functions, the number of samples in a complex array refers - * to the number of complex values; the array contains twice this number of - * real values. - */ - - /** - * @brief Floating-point complex conjugate. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_conj_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples); - - /** - * @brief Q31 complex conjugate. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_conj_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex conjugate. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_conj_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @brief Floating-point complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples); - - - /** - * @brief Floating-point complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples); - - -/** - * @brief Floating-point complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples); - - -/** - * @brief Floating-point complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples); - - /** - * @brief Q15 complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_fast_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex dot product - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] numSamples number of complex samples in each vector - * @param[out] realResult real part of the result returned here - * @param[out] imagResult imaginary part of the result returned here - */ - void arm_cmplx_dot_prod_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - uint32_t numSamples, - q31_t * realResult, - q31_t * imagResult); - - - /** - * @brief Q31 complex dot product - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] numSamples number of complex samples in each vector - * @param[out] realResult real part of the result returned here - * @param[out] imagResult imaginary part of the result returned here - */ - void arm_cmplx_dot_prod_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - uint32_t numSamples, - q63_t * realResult, - q63_t * imagResult); - - - /** - * @brief Floating-point complex dot product - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] numSamples number of complex samples in each vector - * @param[out] realResult real part of the result returned here - * @param[out] imagResult imaginary part of the result returned here - */ - void arm_cmplx_dot_prod_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t numSamples, - float32_t * realResult, - float32_t * imagResult); - - - /** - * @brief Q15 complex-by-real multiplication - * @param[in] pSrcCmplx points to the complex input vector - * @param[in] pSrcReal points to the real input vector - * @param[out] pCmplxDst points to the complex output vector - * @param[in] numSamples number of samples in each vector - */ - void arm_cmplx_mult_real_q15( - const q15_t * pSrcCmplx, - const q15_t * pSrcReal, - q15_t * pCmplxDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex-by-real multiplication - * @param[in] pSrcCmplx points to the complex input vector - * @param[in] pSrcReal points to the real input vector - * @param[out] pCmplxDst points to the complex output vector - * @param[in] numSamples number of samples in each vector - */ - void arm_cmplx_mult_real_q31( - const q31_t * pSrcCmplx, - const q31_t * pSrcReal, - q31_t * pCmplxDst, - uint32_t numSamples); - - - /** - * @brief Floating-point complex-by-real multiplication - * @param[in] pSrcCmplx points to the complex input vector - * @param[in] pSrcReal points to the real input vector - * @param[out] pCmplxDst points to the complex output vector - * @param[in] numSamples number of samples in each vector - */ - void arm_cmplx_mult_real_f32( - const float32_t * pSrcCmplx, - const float32_t * pSrcReal, - float32_t * pCmplxDst, - uint32_t numSamples); - - /** - * @brief Q15 complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_mult_cmplx_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_mult_cmplx_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Floating-point complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_mult_cmplx_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t numSamples); - - - -/** - * @brief Floating-point complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ -void arm_cmplx_mult_cmplx_f64( -const float64_t * pSrcA, -const float64_t * pSrcB, - float64_t * pDst, - uint32_t numSamples); - - - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _COMPLEX_MATH_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/complex_math_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/complex_math_functions_f16.h deleted file mode 100644 index aa8c64d..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/complex_math_functions_f16.h +++ /dev/null @@ -1,123 +0,0 @@ -/****************************************************************************** - * @file complex_math_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.9.0 - * @date 23 April 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _COMPLEX_MATH_FUNCTIONS_F16_H_ -#define _COMPLEX_MATH_FUNCTIONS_F16_H_ - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" -#include "dsp/fast_math_functions_f16.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) - - /** - * @brief Floating-point complex conjugate. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_conj_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t numSamples); - - /** - * @brief Floating-point complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t numSamples); - - /** - * @brief Floating-point complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t numSamples); - - /** - * @brief Floating-point complex dot product - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] numSamples number of complex samples in each vector - * @param[out] realResult real part of the result returned here - * @param[out] imagResult imaginary part of the result returned here - */ - void arm_cmplx_dot_prod_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - uint32_t numSamples, - float16_t * realResult, - float16_t * imagResult); - - /** - * @brief Floating-point complex-by-real multiplication - * @param[in] pSrcCmplx points to the complex input vector - * @param[in] pSrcReal points to the real input vector - * @param[out] pCmplxDst points to the complex output vector - * @param[in] numSamples number of samples in each vector - */ - void arm_cmplx_mult_real_f16( - const float16_t * pSrcCmplx, - const float16_t * pSrcReal, - float16_t * pCmplxDst, - uint32_t numSamples); - - /** - * @brief Floating-point complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_mult_cmplx_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t numSamples); - -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _COMPLEX_MATH_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/controller_functions.h b/Drivers/CMSIS/DSP/Include/dsp/controller_functions.h deleted file mode 100644 index e93d2fd..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/controller_functions.h +++ /dev/null @@ -1,791 +0,0 @@ -/****************************************************************************** - * @file controller_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _CONTROLLER_FUNCTIONS_H_ -#define _CONTROLLER_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - /** - * @brief Macros required for SINE and COSINE Controller functions - */ - -#define CONTROLLER_Q31_SHIFT (32 - 9) - /* 1.31(q31) Fixed value of 2/360 */ - /* -1 to +1 is divided into 360 values so total spacing is (2/360) */ -#define INPUT_SPACING 0xB60B61 - -/** - * @defgroup groupController Controller Functions - */ - - - /** - * @ingroup groupController - */ - - /** - * @addtogroup SinCos - * @{ - */ - -/** - * @brief Floating-point sin_cos function. - * @param[in] theta input value in degrees - * @param[out] pSinVal points to the processed sine output. - * @param[out] pCosVal points to the processed cos output. - */ - void arm_sin_cos_f32( - float32_t theta, - float32_t * pSinVal, - float32_t * pCosVal); - - - /** - * @brief Q31 sin_cos function. - * @param[in] theta scaled input value in degrees - * @param[out] pSinVal points to the processed sine output. - * @param[out] pCosVal points to the processed cosine output. - */ - void arm_sin_cos_q31( - q31_t theta, - q31_t * pSinVal, - q31_t * pCosVal); - - /** - * @} end of SinCos group - */ - - /** - * @ingroup groupController - */ - -/** - * @defgroup PID PID Motor Control - * - * A Proportional Integral Derivative (PID) controller is a generic feedback control - * loop mechanism widely used in industrial control systems. - * A PID controller is the most commonly used type of feedback controller. - * - * This set of functions implements (PID) controllers - * for Q15, Q31, and floating-point data types. The functions operate on a single sample - * of data and each call to the function returns a single processed value. - * S points to an instance of the PID control data structure. in - * is the input sample value. The functions return the output value. - * - * \par Algorithm: - * 
-   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
-   *    A0 = Kp + Ki + Kd
-   *    A1 = (-Kp ) - (2 * Kd )
-   *    A2 = Kd
-   *
- * - * \par - * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant - * - * \par - * \image html PID.gif "Proportional Integral Derivative Controller" - * - * \par - * The PID controller calculates an "error" value as the difference between - * the measured output and the reference input. - * The controller attempts to minimize the error by adjusting the process control inputs. - * The proportional value determines the reaction to the current error, - * the integral value determines the reaction based on the sum of recent errors, - * and the derivative value determines the reaction based on the rate at which the error has been changing. - * - * \par Instance Structure - * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. - * A separate instance structure must be defined for each PID Controller. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Reset Functions - * There is also an associated reset function for each data type which clears the state array. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains. - * - Zeros out the values in the state buffer. - * - * \par - * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the PID Controller functions. - * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - - /** - * @brief Instance structure for the Q15 PID Control. - */ - typedef struct - { - q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ -#if !defined (ARM_MATH_DSP) - q15_t A1; /**< The derived gain A1 = -Kp - 2Kd */ - q15_t A2; /**< The derived gain A1 = Kd. */ -#else - q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/ -#endif - q15_t state[3]; /**< The state array of length 3. */ - q15_t Kp; /**< The proportional gain. */ - q15_t Ki; /**< The integral gain. */ - q15_t Kd; /**< The derivative gain. */ - } arm_pid_instance_q15; - - /** - * @brief Instance structure for the Q31 PID Control. - */ - typedef struct - { - q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ - q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ - q31_t A2; /**< The derived gain, A2 = Kd . */ - q31_t state[3]; /**< The state array of length 3. */ - q31_t Kp; /**< The proportional gain. */ - q31_t Ki; /**< The integral gain. */ - q31_t Kd; /**< The derivative gain. */ - } arm_pid_instance_q31; - - /** - * @brief Instance structure for the floating-point PID Control. - */ - typedef struct - { - float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ - float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ - float32_t A2; /**< The derived gain, A2 = Kd . */ - float32_t state[3]; /**< The state array of length 3. */ - float32_t Kp; /**< The proportional gain. */ - float32_t Ki; /**< The integral gain. */ - float32_t Kd; /**< The derivative gain. */ - } arm_pid_instance_f32; - - - - /** - * @brief Initialization function for the floating-point PID Control. - * @param[in,out] S points to an instance of the PID structure. - * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. - */ - void arm_pid_init_f32( - arm_pid_instance_f32 * S, - int32_t resetStateFlag); - - - /** - * @brief Reset function for the floating-point PID Control. - * @param[in,out] S is an instance of the floating-point PID Control structure - */ - void arm_pid_reset_f32( - arm_pid_instance_f32 * S); - - - /** - * @brief Initialization function for the Q31 PID Control. - * @param[in,out] S points to an instance of the Q15 PID structure. - * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. - */ - void arm_pid_init_q31( - arm_pid_instance_q31 * S, - int32_t resetStateFlag); - - - /** - * @brief Reset function for the Q31 PID Control. - * @param[in,out] S points to an instance of the Q31 PID Control structure - */ - - void arm_pid_reset_q31( - arm_pid_instance_q31 * S); - - - /** - * @brief Initialization function for the Q15 PID Control. - * @param[in,out] S points to an instance of the Q15 PID structure. - * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. - */ - void arm_pid_init_q15( - arm_pid_instance_q15 * S, - int32_t resetStateFlag); - - - /** - * @brief Reset function for the Q15 PID Control. - * @param[in,out] S points to an instance of the q15 PID Control structure - */ - void arm_pid_reset_q15( - arm_pid_instance_q15 * S); - - - - /** - * @addtogroup PID - * @{ - */ - - /** - * @brief Process function for the floating-point PID Control. - * @param[in,out] S is an instance of the floating-point PID Control structure - * @param[in] in input sample to process - * @return processed output sample. - */ - __STATIC_FORCEINLINE float32_t arm_pid_f32( - arm_pid_instance_f32 * S, - float32_t in) - { - float32_t out; - - /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */ - out = (S->A0 * in) + - (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]); - - /* Update state */ - S->state[1] = S->state[0]; - S->state[0] = in; - S->state[2] = out; - - /* return to application */ - return (out); - - } - -/** - @brief Process function for the Q31 PID Control. - @param[in,out] S points to an instance of the Q31 PID Control structure - @param[in] in input sample to process - @return processed output sample. - - \par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around rather than clip. - In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. - After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. - */ -__STATIC_FORCEINLINE q31_t arm_pid_q31( - arm_pid_instance_q31 * S, - q31_t in) - { - q63_t acc; - q31_t out; - - /* acc = A0 * x[n] */ - acc = (q63_t) S->A0 * in; - - /* acc += A1 * x[n-1] */ - acc += (q63_t) S->A1 * S->state[0]; - - /* acc += A2 * x[n-2] */ - acc += (q63_t) S->A2 * S->state[1]; - - /* convert output to 1.31 format to add y[n-1] */ - out = (q31_t) (acc >> 31U); - - /* out += y[n-1] */ - out += S->state[2]; - - /* Update state */ - S->state[1] = S->state[0]; - S->state[0] = in; - S->state[2] = out; - - /* return to application */ - return (out); - } - - -/** - @brief Process function for the Q15 PID Control. - @param[in,out] S points to an instance of the Q15 PID Control structure - @param[in] in input sample to process - @return processed output sample. - - \par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - Lastly, the accumulator is saturated to yield a result in 1.15 format. - */ -__STATIC_FORCEINLINE q15_t arm_pid_q15( - arm_pid_instance_q15 * S, - q15_t in) - { - q63_t acc; - q15_t out; - -#if defined (ARM_MATH_DSP) - /* Implementation of PID controller */ - - /* acc = A0 * x[n] */ - acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in); - - /* acc += A1 * x[n-1] + A2 * x[n-2] */ - acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)read_q15x2 (S->state), (uint64_t)acc); -#else - /* acc = A0 * x[n] */ - acc = ((q31_t) S->A0) * in; - - /* acc += A1 * x[n-1] + A2 * x[n-2] */ - acc += (q31_t) S->A1 * S->state[0]; - acc += (q31_t) S->A2 * S->state[1]; -#endif - - /* acc += y[n-1] */ - acc += (q31_t) S->state[2] << 15; - - /* saturate the output */ - out = (q15_t) (__SSAT((q31_t)(acc >> 15), 16)); - - /* Update state */ - S->state[1] = S->state[0]; - S->state[0] = in; - S->state[2] = out; - - /* return to application */ - return (out); - } - - /** - * @} end of PID group - */ - - /** - * @ingroup groupController - */ - - /** - * @defgroup park Vector Park Transform - * - * Forward Park transform converts the input two-coordinate vector to flux and torque components. - * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents - * from the stationary to the moving reference frame and control the spatial relationship between - * the stator vector current and rotor flux vector. - * If we consider the d axis aligned with the rotor flux, the diagram below shows the - * current vector and the relationship from the two reference frames: - * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame" - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html parkFormula.gif - * where Ialpha and Ibeta are the stator vector components, - * pId and pIq are rotor vector components and cosVal and sinVal are the - * cosine and sine values of theta (rotor flux position). - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Park transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup park - * @{ - */ - - /** - * @brief Floating-point Park transform - * @param[in] Ialpha input two-phase vector coordinate alpha - * @param[in] Ibeta input two-phase vector coordinate beta - * @param[out] pId points to output rotor reference frame d - * @param[out] pIq points to output rotor reference frame q - * @param[in] sinVal sine value of rotation angle theta - * @param[in] cosVal cosine value of rotation angle theta - * @return none - * - * The function implements the forward Park transform. - * - */ - __STATIC_FORCEINLINE void arm_park_f32( - float32_t Ialpha, - float32_t Ibeta, - float32_t * pId, - float32_t * pIq, - float32_t sinVal, - float32_t cosVal) - { - /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */ - *pId = Ialpha * cosVal + Ibeta * sinVal; - - /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */ - *pIq = -Ialpha * sinVal + Ibeta * cosVal; - } - - -/** - @brief Park transform for Q31 version - @param[in] Ialpha input two-phase vector coordinate alpha - @param[in] Ibeta input two-phase vector coordinate beta - @param[out] pId points to output rotor reference frame d - @param[out] pIq points to output rotor reference frame q - @param[in] sinVal sine value of rotation angle theta - @param[in] cosVal cosine value of rotation angle theta - @return none - - \par Scaling and Overflow Behavior - The function is implemented using an internal 32-bit accumulator. - The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - There is saturation on the addition and subtraction, hence there is no risk of overflow. - */ -__STATIC_FORCEINLINE void arm_park_q31( - q31_t Ialpha, - q31_t Ibeta, - q31_t * pId, - q31_t * pIq, - q31_t sinVal, - q31_t cosVal) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - q31_t product3, product4; /* Temporary variables used to store intermediate results */ - - /* Intermediate product is calculated by (Ialpha * cosVal) */ - product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31); - - /* Intermediate product is calculated by (Ibeta * sinVal) */ - product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31); - - - /* Intermediate product is calculated by (Ialpha * sinVal) */ - product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31); - - /* Intermediate product is calculated by (Ibeta * cosVal) */ - product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31); - - /* Calculate pId by adding the two intermediate products 1 and 2 */ - *pId = __QADD(product1, product2); - - /* Calculate pIq by subtracting the two intermediate products 3 from 4 */ - *pIq = __QSUB(product4, product3); - } - - /** - * @} end of park group - */ - - - /** - * @ingroup groupController - */ - - /** - * @defgroup inv_park Vector Inverse Park transform - * Inverse Park transform converts the input flux and torque components to two-coordinate vector. - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html parkInvFormula.gif - * where pIalpha and pIbeta are the stator vector components, - * Id and Iq are rotor vector components and cosVal and sinVal are the - * cosine and sine values of theta (rotor flux position). - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Park transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup inv_park - * @{ - */ - - /** - * @brief Floating-point Inverse Park transform - * @param[in] Id input coordinate of rotor reference frame d - * @param[in] Iq input coordinate of rotor reference frame q - * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - * @param[out] pIbeta points to output two-phase orthogonal vector axis beta - * @param[in] sinVal sine value of rotation angle theta - * @param[in] cosVal cosine value of rotation angle theta - * @return none - */ - __STATIC_FORCEINLINE void arm_inv_park_f32( - float32_t Id, - float32_t Iq, - float32_t * pIalpha, - float32_t * pIbeta, - float32_t sinVal, - float32_t cosVal) - { - /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */ - *pIalpha = Id * cosVal - Iq * sinVal; - - /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */ - *pIbeta = Id * sinVal + Iq * cosVal; - } - - -/** - @brief Inverse Park transform for Q31 version - @param[in] Id input coordinate of rotor reference frame d - @param[in] Iq input coordinate of rotor reference frame q - @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - @param[out] pIbeta points to output two-phase orthogonal vector axis beta - @param[in] sinVal sine value of rotation angle theta - @param[in] cosVal cosine value of rotation angle theta - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 32-bit accumulator. - The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - There is saturation on the addition, hence there is no risk of overflow. - */ -__STATIC_FORCEINLINE void arm_inv_park_q31( - q31_t Id, - q31_t Iq, - q31_t * pIalpha, - q31_t * pIbeta, - q31_t sinVal, - q31_t cosVal) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - q31_t product3, product4; /* Temporary variables used to store intermediate results */ - - /* Intermediate product is calculated by (Id * cosVal) */ - product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31); - - /* Intermediate product is calculated by (Iq * sinVal) */ - product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31); - - - /* Intermediate product is calculated by (Id * sinVal) */ - product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31); - - /* Intermediate product is calculated by (Iq * cosVal) */ - product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31); - - /* Calculate pIalpha by using the two intermediate products 1 and 2 */ - *pIalpha = __QSUB(product1, product2); - - /* Calculate pIbeta by using the two intermediate products 3 and 4 */ - *pIbeta = __QADD(product4, product3); - } - - /** - * @} end of Inverse park group - */ - -/** - * @ingroup groupController - */ - - /** - * @defgroup clarke Vector Clarke Transform - * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector. - * Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents - * in the two-phase orthogonal stator axis Ialpha and Ibeta. - * When Ialpha is superposed with Ia as shown in the figure below - * \image html clarke.gif Stator current space vector and its components in (a,b). - * and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta - * can be calculated using only Ia and Ib. - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html clarkeFormula.gif - * where Ia and Ib are the instantaneous stator phases and - * pIalpha and pIbeta are the two coordinates of time invariant vector. - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Clarke transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup clarke - * @{ - */ - - /** - * - * @brief Floating-point Clarke transform - * @param[in] Ia input three-phase coordinate a - * @param[in] Ib input three-phase coordinate b - * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - * @param[out] pIbeta points to output two-phase orthogonal vector axis beta - * @return none - */ - __STATIC_FORCEINLINE void arm_clarke_f32( - float32_t Ia, - float32_t Ib, - float32_t * pIalpha, - float32_t * pIbeta) - { - /* Calculate pIalpha using the equation, pIalpha = Ia */ - *pIalpha = Ia; - - /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */ - *pIbeta = (0.57735026919f * Ia + 1.15470053838f * Ib); - } - - -/** - @brief Clarke transform for Q31 version - @param[in] Ia input three-phase coordinate a - @param[in] Ib input three-phase coordinate b - @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - @param[out] pIbeta points to output two-phase orthogonal vector axis beta - @return none - - \par Scaling and Overflow Behavior - The function is implemented using an internal 32-bit accumulator. - The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - There is saturation on the addition, hence there is no risk of overflow. - */ -__STATIC_FORCEINLINE void arm_clarke_q31( - q31_t Ia, - q31_t Ib, - q31_t * pIalpha, - q31_t * pIbeta) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - - /* Calculating pIalpha from Ia by equation pIalpha = Ia */ - *pIalpha = Ia; - - /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */ - product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30); - - /* Intermediate product is calculated by (2/sqrt(3) * Ib) */ - product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30); - - /* pIbeta is calculated by adding the intermediate products */ - *pIbeta = __QADD(product1, product2); - } - - /** - * @} end of clarke group - */ - - - /** - * @ingroup groupController - */ - - /** - * @defgroup inv_clarke Vector Inverse Clarke Transform - * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases. - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html clarkeInvFormula.gif - * where pIa and pIb are the instantaneous stator phases and - * Ialpha and Ibeta are the two coordinates of time invariant vector. - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Clarke transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup inv_clarke - * @{ - */ - - /** - * @brief Floating-point Inverse Clarke transform - * @param[in] Ialpha input two-phase orthogonal vector axis alpha - * @param[in] Ibeta input two-phase orthogonal vector axis beta - * @param[out] pIa points to output three-phase coordinate a - * @param[out] pIb points to output three-phase coordinate b - * @return none - */ - __STATIC_FORCEINLINE void arm_inv_clarke_f32( - float32_t Ialpha, - float32_t Ibeta, - float32_t * pIa, - float32_t * pIb) - { - /* Calculating pIa from Ialpha by equation pIa = Ialpha */ - *pIa = Ialpha; - - /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */ - *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta; - } - - -/** - @brief Inverse Clarke transform for Q31 version - @param[in] Ialpha input two-phase orthogonal vector axis alpha - @param[in] Ibeta input two-phase orthogonal vector axis beta - @param[out] pIa points to output three-phase coordinate a - @param[out] pIb points to output three-phase coordinate b - @return none - - \par Scaling and Overflow Behavior - The function is implemented using an internal 32-bit accumulator. - The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - There is saturation on the subtraction, hence there is no risk of overflow. - */ -__STATIC_FORCEINLINE void arm_inv_clarke_q31( - q31_t Ialpha, - q31_t Ibeta, - q31_t * pIa, - q31_t * pIb) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - - /* Calculating pIa from Ialpha by equation pIa = Ialpha */ - *pIa = Ialpha; - - /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */ - product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31); - - /* Intermediate product is calculated by (1/sqrt(3) * pIb) */ - product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31); - - /* pIb is calculated by subtracting the products */ - *pIb = __QSUB(product2, product1); - } - - /** - * @} end of inv_clarke group - */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _CONTROLLER_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/controller_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/controller_functions_f16.h deleted file mode 100644 index 7cbf939..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/controller_functions_f16.h +++ /dev/null @@ -1,41 +0,0 @@ -/****************************************************************************** - * @file controller_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.9.0 - * @date 23 April 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _CONTROLLER_FUNCTIONS_F16_H_ -#define _CONTROLLER_FUNCTIONS_F16_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _CONTROLLER_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/distance_functions.h b/Drivers/CMSIS/DSP/Include/dsp/distance_functions.h deleted file mode 100644 index 003a78b..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/distance_functions.h +++ /dev/null @@ -1,341 +0,0 @@ -/****************************************************************************** - * @file distance_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _DISTANCE_FUNCTIONS_H_ -#define _DISTANCE_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#include "dsp/statistics_functions.h" -#include "dsp/basic_math_functions.h" -#include "dsp/fast_math_functions.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/** - * @defgroup groupDistance Distance functions - * - * Distance functions for use with clustering algorithms. - * There are distance functions for float vectors and boolean vectors. - * - */ - -/* 6.14 bug */ -#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) && (__ARMCC_VERSION < 6150001) - -__attribute__((weak)) float __powisf2(float a, int b); - -#endif - -/** - * @brief Euclidean distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize); - -/** - * @brief Euclidean distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float64_t arm_euclidean_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize); - -/** - * @brief Bray-Curtis distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize); - -/** - * @brief Canberra distance between two vectors - * - * This function may divide by zero when samples pA[i] and pB[i] are both zero. - * The result of the computation will be correct. So the division per zero may be - * ignored. - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize); - - -/** - * @brief Chebyshev distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize); - - -/** - * @brief Chebyshev distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float64_t arm_chebyshev_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize); - - -/** - * @brief Cityblock (Manhattan) distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize); - -/** - * @brief Cityblock (Manhattan) distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float64_t arm_cityblock_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize); - -/** - * @brief Correlation distance between two vectors - * - * The input vectors are modified in place ! - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float32_t arm_correlation_distance_f32(float32_t *pA,float32_t *pB, uint32_t blockSize); - -/** - * @brief Cosine distance between two vectors - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float32_t arm_cosine_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize); - -/** - * @brief Cosine distance between two vectors - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float64_t arm_cosine_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize); - -/** - * @brief Jensen-Shannon distance between two vectors - * - * This function is assuming that elements of second vector are > 0 - * and 0 only when the corresponding element of first vector is 0. - * Otherwise the result of the computation does not make sense - * and for speed reasons, the cases returning NaN or Infinity are not - * managed. - * - * When the function is computing x log (x / y) with x 0 and y 0, - * it will compute the right value (0) but a division per zero will occur - * and shoudl be ignored in client code. - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB,uint32_t blockSize); - -/** - * @brief Minkowski distance between two vectors - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] n Norm order (>= 2) - * @param[in] blockSize vector length - * @return distance - * - */ - - - -float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize); - -/** - * @brief Dice distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] order Distance order - * @param[in] blockSize Number of samples - * @return distance - * - */ - - -float32_t arm_dice_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools); - -/** - * @brief Hamming distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_hamming_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools); - -/** - * @brief Jaccard distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_jaccard_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools); - -/** - * @brief Kulsinski distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_kulsinski_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools); - -/** - * @brief Roger Stanimoto distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_rogerstanimoto_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools); - -/** - * @brief Russell-Rao distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_russellrao_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools); - -/** - * @brief Sokal-Michener distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_sokalmichener_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools); - -/** - * @brief Sokal-Sneath distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_sokalsneath_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools); - -/** - * @brief Yule distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_yule_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools); - - - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _DISTANCE_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/distance_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/distance_functions_f16.h deleted file mode 100644 index 323de2b..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/distance_functions_f16.h +++ /dev/null @@ -1,180 +0,0 @@ -/****************************************************************************** - * @file distance_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _DISTANCE_FUNCTIONS_F16_H_ -#define _DISTANCE_FUNCTIONS_F16_H_ - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -/* 6.14 bug */ -#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) && (__ARMCC_VERSION < 6150001) -/* Defined in minkowski_f32 */ -__attribute__((weak)) float __powisf2(float a, int b); -#endif - -#include "dsp/statistics_functions_f16.h" -#include "dsp/basic_math_functions_f16.h" - -#include "dsp/fast_math_functions_f16.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - * @brief Euclidean distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float16_t arm_euclidean_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize); - -/** - * @brief Bray-Curtis distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float16_t arm_braycurtis_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize); - -/** - * @brief Canberra distance between two vectors - * - * This function may divide by zero when samples pA[i] and pB[i] are both zero. - * The result of the computation will be correct. So the division per zero may be - * ignored. - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float16_t arm_canberra_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize); - - -/** - * @brief Chebyshev distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float16_t arm_chebyshev_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize); - - -/** - * @brief Cityblock (Manhattan) distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float16_t arm_cityblock_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize); - -/** - * @brief Correlation distance between two vectors - * - * The input vectors are modified in place ! - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float16_t arm_correlation_distance_f16(float16_t *pA,float16_t *pB, uint32_t blockSize); - -/** - * @brief Cosine distance between two vectors - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float16_t arm_cosine_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize); - -/** - * @brief Jensen-Shannon distance between two vectors - * - * This function is assuming that elements of second vector are > 0 - * and 0 only when the corresponding element of first vector is 0. - * Otherwise the result of the computation does not make sense - * and for speed reasons, the cases returning NaN or Infinity are not - * managed. - * - * When the function is computing x log (x / y) with x 0 and y 0, - * it will compute the right value (0) but a division per zero will occur - * and shoudl be ignored in client code. - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float16_t arm_jensenshannon_distance_f16(const float16_t *pA,const float16_t *pB,uint32_t blockSize); - -/** - * @brief Minkowski distance between two vectors - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] n Norm order (>= 2) - * @param[in] blockSize vector length - * @return distance - * - */ - - - -float16_t arm_minkowski_distance_f16(const float16_t *pA,const float16_t *pB, int32_t order, uint32_t blockSize); - - -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _DISTANCE_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/fast_math_functions.h b/Drivers/CMSIS/DSP/Include/dsp/fast_math_functions.h deleted file mode 100644 index e38d9a5..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/fast_math_functions.h +++ /dev/null @@ -1,389 +0,0 @@ -/****************************************************************************** - * @file fast_math_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _FAST_MATH_FUNCTIONS_H_ -#define _FAST_MATH_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#include "dsp/basic_math_functions.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - /** - * @brief Macros required for SINE and COSINE Fast math approximations - */ - -#define FAST_MATH_TABLE_SIZE 512 -#define FAST_MATH_Q31_SHIFT (32 - 10) -#define FAST_MATH_Q15_SHIFT (16 - 10) - -#ifndef PI - #define PI 3.14159265358979f -#endif - - -/** - * @defgroup groupFastMath Fast Math Functions - * This set of functions provides a fast approximation to sine, cosine, and square root. - * As compared to most of the other functions in the CMSIS math library, the fast math functions - * operate on individual values and not arrays. - * There are separate functions for Q15, Q31, and floating-point data. - * - */ - - /** - * @ingroup groupFastMath - */ - - -/** - @addtogroup sin - @{ - */ - -/** - * @brief Fast approximation to the trigonometric sine function for floating-point data. - * @param[in] x input value in radians. - * @return sin(x). - */ - float32_t arm_sin_f32( - float32_t x); - - - /** - * @brief Fast approximation to the trigonometric sine function for Q31 data. - * @param[in] x Scaled input value in radians. - * @return sin(x). - */ - q31_t arm_sin_q31( - q31_t x); - - - /** - * @brief Fast approximation to the trigonometric sine function for Q15 data. - * @param[in] x Scaled input value in radians. - * @return sin(x). - */ - q15_t arm_sin_q15( - q15_t x); - -/** - @} end of sin group - */ - -/** - @addtogroup cos - @{ - */ - - /** - * @brief Fast approximation to the trigonometric cosine function for floating-point data. - * @param[in] x input value in radians. - * @return cos(x). - */ - float32_t arm_cos_f32( - float32_t x); - - - /** - * @brief Fast approximation to the trigonometric cosine function for Q31 data. - * @param[in] x Scaled input value in radians. - * @return cos(x). - */ - q31_t arm_cos_q31( - q31_t x); - - - /** - * @brief Fast approximation to the trigonometric cosine function for Q15 data. - * @param[in] x Scaled input value in radians. - * @return cos(x). - */ - q15_t arm_cos_q15( - q15_t x); - -/** - @} end of cos group - */ - - -/** - @brief Floating-point vector of log values. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - void arm_vlog_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - -/** - @brief Floating-point vector of log values. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - void arm_vlog_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize); - - - - /** - * @brief q31 vector of log values. - * @param[in] pSrc points to the input vector in q31 - * @param[out] pDst points to the output vector in q5.26 - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_vlog_q31(const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - /** - * @brief q15 vector of log values. - * @param[in] pSrc points to the input vector in q15 - * @param[out] pDst points to the output vector in q4.11 - * @param[in] blockSize number of samples in each vector - * @return none - */ - void arm_vlog_q15(const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - -/** - @brief Floating-point vector of exp values. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - void arm_vexp_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - -/** - @brief Floating-point vector of exp values. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - void arm_vexp_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize); - - - - /** - * @defgroup SQRT Square Root - * - * Computes the square root of a number. - * There are separate functions for Q15, Q31, and floating-point data types. - * The square root function is computed using the Newton-Raphson algorithm. - * This is an iterative algorithm of the form: - * 
-   *      x1 = x0 - f(x0)/f'(x0)
-   *
- * where x1 is the current estimate, - * x0 is the previous estimate, and - * f'(x0) is the derivative of f() evaluated at x0. - * For the square root function, the algorithm reduces to: - * 
-   *     x0 = in/2                         [initial guess]
-   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
-   *
- */ - - - /** - * @addtogroup SQRT - * @{ - */ - -/** - @brief Floating-point square root function. - @param[in] in input value - @param[out] pOut square root of input value - @return execution status - - \ref ARM_MATH_SUCCESS : input value is positive - - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0 - */ -__STATIC_FORCEINLINE arm_status arm_sqrt_f32( - const float32_t in, - float32_t * pOut) - { - if (in >= 0.0f) - { -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - *pOut = __sqrtf(in); - #else - *pOut = sqrtf(in); - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in)); - #else - *pOut = sqrtf(in); - #endif - -#else - *pOut = sqrtf(in); -#endif - - return (ARM_MATH_SUCCESS); - } - else - { - *pOut = 0.0f; - return (ARM_MATH_ARGUMENT_ERROR); - } - } - - -/** - @brief Q31 square root function. - @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF - @param[out] pOut points to square root of input value - @return execution status - - \ref ARM_MATH_SUCCESS : input value is positive - - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0 - */ -arm_status arm_sqrt_q31( - q31_t in, - q31_t * pOut); - - -/** - @brief Q15 square root function. - @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF - @param[out] pOut points to square root of input value - @return execution status - - \ref ARM_MATH_SUCCESS : input value is positive - - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0 - */ -arm_status arm_sqrt_q15( - q15_t in, - q15_t * pOut); - - - - /** - * @} end of SQRT group - */ - - /** - @brief Fixed point division - @param[in] numerator Numerator - @param[in] denominator Denominator - @param[out] quotient Quotient value normalized between -1.0 and 1.0 - @param[out] shift Shift left value to get the unnormalized quotient - @return error status - - When dividing by 0, an error ARM_MATH_NANINF is returned. And the quotient is forced - to the saturated negative or positive value. - */ - -arm_status arm_divide_q15(q15_t numerator, - q15_t denominator, - q15_t *quotient, - int16_t *shift); - - /** - @brief Fixed point division - @param[in] numerator Numerator - @param[in] denominator Denominator - @param[out] quotient Quotient value normalized between -1.0 and 1.0 - @param[out] shift Shift left value to get the unnormalized quotient - @return error status - - When dividing by 0, an error ARM_MATH_NANINF is returned. And the quotient is forced - to the saturated negative or positive value. - */ - -arm_status arm_divide_q31(q31_t numerator, - q31_t denominator, - q31_t *quotient, - int16_t *shift); - - - - /** - @brief Arc tangent in radian of y/x using sign of x and y to determine right quadrant. - @param[in] y y coordinate - @param[in] x x coordinate - @param[out] result Result - @return error status. - */ - arm_status arm_atan2_f32(float32_t y,float32_t x,float32_t *result); - - - /** - @brief Arc tangent in radian of y/x using sign of x and y to determine right quadrant. - @param[in] y y coordinate - @param[in] x x coordinate - @param[out] result Result in Q2.29 - @return error status. - */ - arm_status arm_atan2_q31(q31_t y,q31_t x,q31_t *result); - - /** - @brief Arc tangent in radian of y/x using sign of x and y to determine right quadrant. - @param[in] y y coordinate - @param[in] x x coordinate - @param[out] result Result in Q2.13 - @return error status. - */ - arm_status arm_atan2_q15(q15_t y,q15_t x,q15_t *result); - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _FAST_MATH_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/fast_math_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/fast_math_functions_f16.h deleted file mode 100644 index 7d7f40a..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/fast_math_functions_f16.h +++ /dev/null @@ -1,125 +0,0 @@ -/****************************************************************************** - * @file fast_math_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _FAST_MATH_FUNCTIONS_F16_H_ -#define _FAST_MATH_FUNCTIONS_F16_H_ - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -/* For sqrt_f32 */ -#include "dsp/fast_math_functions.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) - - /** - * @addtogroup SQRT - * @{ - */ - -/** - @brief Floating-point square root function. - @param[in] in input value - @param[out] pOut square root of input value - @return execution status - - \ref ARM_MATH_SUCCESS : input value is positive - - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0 - */ -__STATIC_FORCEINLINE arm_status arm_sqrt_f16( - float16_t in, - float16_t * pOut) - { - float32_t r; - arm_status status; - status=arm_sqrt_f32((float32_t)in,&r); - *pOut=(float16_t)r; - return(status); - } - - -/** - @} end of SQRT group - */ - -/** - @brief Floating-point vector of log values. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - void arm_vlog_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize); - -/** - @brief Floating-point vector of exp values. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - void arm_vexp_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize); - - /** - @brief Floating-point vector of inverse values. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - void arm_vinverse_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize); - - /** - @brief Arc tangent in radian of y/x using sign of x and y to determine right quadrant. - @param[in] y y coordinate - @param[in] x x coordinate - @param[out] result Result - @return error status. - */ - arm_status arm_atan2_f16(float16_t y,float16_t x,float16_t *result); - -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _FAST_MATH_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/filtering_functions.h b/Drivers/CMSIS/DSP/Include/dsp/filtering_functions.h deleted file mode 100644 index 09c4b11..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/filtering_functions.h +++ /dev/null @@ -1,2529 +0,0 @@ -/****************************************************************************** - * @file filtering_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _FILTERING_FUNCTIONS_H_ -#define _FILTERING_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#include "dsp/support_functions.h" -#include "dsp/fast_math_functions.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - - -#define DELTA_Q31 ((q31_t)(0x100)) -#define DELTA_Q15 ((q15_t)0x5) - -/** - * @defgroup groupFilters Filtering Functions - */ - - /** - * @brief Instance structure for the Q7 FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - q7_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - const q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - } arm_fir_instance_q7; - - /** - * @brief Instance structure for the Q15 FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - } arm_fir_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - } arm_fir_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - } arm_fir_instance_f32; - - /** - * @brief Instance structure for the floating-point FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - float64_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - const float64_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - } arm_fir_instance_f64; - - /** - * @brief Processing function for the Q7 FIR filter. - * @param[in] S points to an instance of the Q7 FIR filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_q7( - const arm_fir_instance_q7 * S, - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - /** - * @brief Initialization function for the Q7 FIR filter. - * @param[in,out] S points to an instance of the Q7 FIR structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed. - * - * For the MVE version, the coefficient length must be a multiple of 16. - * You can pad with zeros if you have less coefficients. - */ - void arm_fir_init_q7( - arm_fir_instance_q7 * S, - uint16_t numTaps, - const q7_t * pCoeffs, - q7_t * pState, - uint32_t blockSize); - - /** - * @brief Processing function for the Q15 FIR filter. - * @param[in] S points to an instance of the Q15 FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_q15( - const arm_fir_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - /** - * @brief Processing function for the fast Q15 FIR filter (fast version). - * @param[in] S points to an instance of the Q15 FIR filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_fast_q15( - const arm_fir_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - /** - * @brief Initialization function for the Q15 FIR filter. - * @param[in,out] S points to an instance of the Q15 FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - * @return The function returns either - * ARM_MATH_SUCCESS if initialization was successful or - * ARM_MATH_ARGUMENT_ERROR if numTaps is not a supported value. - * - * For the MVE version, the coefficient length must be a multiple of 8. - * You can pad with zeros if you have less coefficients. - * - */ - arm_status arm_fir_init_q15( - arm_fir_instance_q15 * S, - uint16_t numTaps, - const q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize); - - /** - * @brief Processing function for the Q31 FIR filter. - * @param[in] S points to an instance of the Q31 FIR filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_q31( - const arm_fir_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - /** - * @brief Processing function for the fast Q31 FIR filter (fast version). - * @param[in] S points to an instance of the Q31 FIR filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_fast_q31( - const arm_fir_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - /** - * @brief Initialization function for the Q31 FIR filter. - * @param[in,out] S points to an instance of the Q31 FIR structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - * - * For the MVE version, the coefficient length must be a multiple of 4. - * You can pad with zeros if you have less coefficients. - */ - void arm_fir_init_q31( - arm_fir_instance_q31 * S, - uint16_t numTaps, - const q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize); - - /** - * @brief Processing function for the floating-point FIR filter. - * @param[in] S points to an instance of the floating-point FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_f32( - const arm_fir_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - /** - * @brief Processing function for the floating-point FIR filter. - * @param[in] S points to an instance of the floating-point FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_f64( - const arm_fir_instance_f64 * S, - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize); - - /** - * @brief Initialization function for the floating-point FIR filter. - * @param[in,out] S points to an instance of the floating-point FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - */ - void arm_fir_init_f32( - arm_fir_instance_f32 * S, - uint16_t numTaps, - const float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize); - - /** - * @brief Initialization function for the floating-point FIR filter. - * @param[in,out] S points to an instance of the floating-point FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - */ - void arm_fir_init_f64( - arm_fir_instance_f64 * S, - uint16_t numTaps, - const float64_t * pCoeffs, - float64_t * pState, - uint32_t blockSize); - - /** - * @brief Instance structure for the Q15 Biquad cascade filter. - */ - typedef struct - { - int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ - const q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ - int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */ - } arm_biquad_casd_df1_inst_q15; - - /** - * @brief Instance structure for the Q31 Biquad cascade filter. - */ - typedef struct - { - uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ - const q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ - uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */ - } arm_biquad_casd_df1_inst_q31; - - /** - * @brief Instance structure for the floating-point Biquad cascade filter. - */ - typedef struct - { - uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ - const float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_casd_df1_inst_f32; - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - /** - * @brief Instance structure for the modified Biquad coefs required by vectorized code. - */ - typedef struct - { - float32_t coeffs[8][4]; /**< Points to the array of modified coefficients. The array is of length 32. There is one per stage */ - } arm_biquad_mod_coef_f32; -#endif - - /** - * @brief Processing function for the Q15 Biquad cascade filter. - * @param[in] S points to an instance of the Q15 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_q15( - const arm_biquad_casd_df1_inst_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - /** - * @brief Initialization function for the Q15 Biquad cascade filter. - * @param[in,out] S points to an instance of the Q15 Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format - */ - void arm_biquad_cascade_df1_init_q15( - arm_biquad_casd_df1_inst_q15 * S, - uint8_t numStages, - const q15_t * pCoeffs, - q15_t * pState, - int8_t postShift); - - /** - * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q15 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_fast_q15( - const arm_biquad_casd_df1_inst_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - /** - * @brief Processing function for the Q31 Biquad cascade filter - * @param[in] S points to an instance of the Q31 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_q31( - const arm_biquad_casd_df1_inst_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - /** - * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q31 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_fast_q31( - const arm_biquad_casd_df1_inst_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - /** - * @brief Initialization function for the Q31 Biquad cascade filter. - * @param[in,out] S points to an instance of the Q31 Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format - */ - void arm_biquad_cascade_df1_init_q31( - arm_biquad_casd_df1_inst_q31 * S, - uint8_t numStages, - const q31_t * pCoeffs, - q31_t * pState, - int8_t postShift); - - /** - * @brief Processing function for the floating-point Biquad cascade filter. - * @param[in] S points to an instance of the floating-point Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_f32( - const arm_biquad_casd_df1_inst_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - /** - * @brief Initialization function for the floating-point Biquad cascade filter. - * @param[in,out] S points to an instance of the floating-point Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pCoeffsMod points to the modified filter coefficients (only MVE version). - * @param[in] pState points to the state buffer. - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - void arm_biquad_cascade_df1_mve_init_f32( - arm_biquad_casd_df1_inst_f32 * S, - uint8_t numStages, - const float32_t * pCoeffs, - arm_biquad_mod_coef_f32 * pCoeffsMod, - float32_t * pState); -#endif - - void arm_biquad_cascade_df1_init_f32( - arm_biquad_casd_df1_inst_f32 * S, - uint8_t numStages, - const float32_t * pCoeffs, - float32_t * pState); - - -/** - * @brief Convolution of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - */ - void arm_conv_f32( - const float32_t * pSrcA, - uint32_t srcALen, - const float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst); - - - /** - * @brief Convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - */ - void arm_conv_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - -/** - * @brief Convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - */ - void arm_conv_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - - /** - * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_fast_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - - /** - * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - */ - void arm_conv_fast_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Convolution of Q31 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_fast_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Convolution of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - */ - void arm_conv_opt_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Convolution of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst); - - - /** - * @brief Partial convolution of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_f32( - const float32_t * pSrcA, - uint32_t srcALen, - const float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Partial convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_fast_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_fast_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Partial convolution of Q31 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_fast_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q7 sequences - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_opt_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2); - - -/** - * @brief Partial convolution of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Instance structure for the Q15 FIR decimator. - */ - typedef struct - { - uint8_t M; /**< decimation factor. */ - uint16_t numTaps; /**< number of coefficients in the filter. */ - const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - } arm_fir_decimate_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR decimator. - */ - typedef struct - { - uint8_t M; /**< decimation factor. */ - uint16_t numTaps; /**< number of coefficients in the filter. */ - const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - } arm_fir_decimate_instance_q31; - -/** - @brief Instance structure for floating-point FIR decimator. - */ -typedef struct - { - uint8_t M; /**< decimation factor. */ - uint16_t numTaps; /**< number of coefficients in the filter. */ - const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - } arm_fir_decimate_instance_f32; - - -/** - @brief Processing function for floating-point FIR decimator. - @param[in] S points to an instance of the floating-point FIR decimator structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - */ -void arm_fir_decimate_f32( - const arm_fir_decimate_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - -/** - @brief Initialization function for the floating-point FIR decimator. - @param[in,out] S points to an instance of the floating-point FIR decimator structure - @param[in] numTaps number of coefficients in the filter - @param[in] M decimation factor - @param[in] pCoeffs points to the filter coefficients - @param[in] pState points to the state buffer - @param[in] blockSize number of input samples to process per call - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of M - */ -arm_status arm_fir_decimate_init_f32( - arm_fir_decimate_instance_f32 * S, - uint16_t numTaps, - uint8_t M, - const float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 FIR decimator. - * @param[in] S points to an instance of the Q15 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_q15( - const arm_fir_decimate_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q15 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_fast_q15( - const arm_fir_decimate_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 FIR decimator. - * @param[in,out] S points to an instance of the Q15 FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - */ - arm_status arm_fir_decimate_init_q15( - arm_fir_decimate_instance_q15 * S, - uint16_t numTaps, - uint8_t M, - const q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 FIR decimator. - * @param[in] S points to an instance of the Q31 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_q31( - const arm_fir_decimate_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - /** - * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q31 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_fast_q31( - const arm_fir_decimate_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR decimator. - * @param[in,out] S points to an instance of the Q31 FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - */ - arm_status arm_fir_decimate_init_q31( - arm_fir_decimate_instance_q31 * S, - uint16_t numTaps, - uint8_t M, - const q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 FIR interpolator. - */ - typedef struct - { - uint8_t L; /**< upsample factor. */ - uint16_t phaseLength; /**< length of each polyphase filter component. */ - const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ - q15_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */ - } arm_fir_interpolate_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR interpolator. - */ - typedef struct - { - uint8_t L; /**< upsample factor. */ - uint16_t phaseLength; /**< length of each polyphase filter component. */ - const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ - q31_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */ - } arm_fir_interpolate_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR interpolator. - */ - typedef struct - { - uint8_t L; /**< upsample factor. */ - uint16_t phaseLength; /**< length of each polyphase filter component. */ - const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ - float32_t *pState; /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */ - } arm_fir_interpolate_instance_f32; - - - /** - * @brief Processing function for the Q15 FIR interpolator. - * @param[in] S points to an instance of the Q15 FIR interpolator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_interpolate_q15( - const arm_fir_interpolate_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 FIR interpolator. - * @param[in,out] S points to an instance of the Q15 FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - */ - arm_status arm_fir_interpolate_init_q15( - arm_fir_interpolate_instance_q15 * S, - uint8_t L, - uint16_t numTaps, - const q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 FIR interpolator. - * @param[in] S points to an instance of the Q15 FIR interpolator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_interpolate_q31( - const arm_fir_interpolate_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR interpolator. - * @param[in,out] S points to an instance of the Q31 FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - */ - arm_status arm_fir_interpolate_init_q31( - arm_fir_interpolate_instance_q31 * S, - uint8_t L, - uint16_t numTaps, - const q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point FIR interpolator. - * @param[in] S points to an instance of the floating-point FIR interpolator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_interpolate_f32( - const arm_fir_interpolate_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point FIR interpolator. - * @param[in,out] S points to an instance of the floating-point FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - */ - arm_status arm_fir_interpolate_init_f32( - arm_fir_interpolate_instance_f32 * S, - uint8_t L, - uint16_t numTaps, - const float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the high precision Q31 Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - q63_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */ - const q31_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */ - } arm_biquad_cas_df1_32x64_ins_q31; - - - /** - * @param[in] S points to an instance of the high precision Q31 Biquad cascade filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cas_df1_32x64_q31( - const arm_biquad_cas_df1_32x64_ins_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @param[in,out] S points to an instance of the high precision Q31 Biquad cascade filter structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] postShift shift to be applied to the output. Varies according to the coefficients format - */ - void arm_biquad_cas_df1_32x64_init_q31( - arm_biquad_cas_df1_32x64_ins_q31 * S, - uint8_t numStages, - const q31_t * pCoeffs, - q63_t * pState, - uint8_t postShift); - - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float32_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */ - const float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_df2T_instance_f32; - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float32_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */ - const float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_stereo_df2T_instance_f32; - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float64_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */ - const float64_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_df2T_instance_f64; - - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df2T_f32( - const arm_biquad_cascade_df2T_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_stereo_df2T_f32( - const arm_biquad_cascade_stereo_df2T_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df2T_f64( - const arm_biquad_cascade_df2T_instance_f64 * S, - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize); - - -#if defined(ARM_MATH_NEON) -/** - @brief Compute new coefficient arrays for use in vectorized filter (Neon only). - @param[in] numStages number of 2nd order stages in the filter. - @param[in] pCoeffs points to the original filter coefficients. - @param[in] pComputedCoeffs points to the new computed coefficients for the vectorized version. - @return none -*/ -void arm_biquad_cascade_df2T_compute_coefs_f32( - uint8_t numStages, - const float32_t * pCoeffs, - float32_t * pComputedCoeffs); -#endif - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_df2T_init_f32( - arm_biquad_cascade_df2T_instance_f32 * S, - uint8_t numStages, - const float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_stereo_df2T_init_f32( - arm_biquad_cascade_stereo_df2T_instance_f32 * S, - uint8_t numStages, - const float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_df2T_init_f64( - arm_biquad_cascade_df2T_instance_f64 * S, - uint8_t numStages, - const float64_t * pCoeffs, - float64_t * pState); - - - /** - * @brief Instance structure for the Q15 FIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of filter stages. */ - q15_t *pState; /**< points to the state variable array. The array is of length numStages. */ - const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ - } arm_fir_lattice_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of filter stages. */ - q31_t *pState; /**< points to the state variable array. The array is of length numStages. */ - const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ - } arm_fir_lattice_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of filter stages. */ - float32_t *pState; /**< points to the state variable array. The array is of length numStages. */ - const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ - } arm_fir_lattice_instance_f32; - - - /** - * @brief Initialization function for the Q15 FIR lattice filter. - * @param[in] S points to an instance of the Q15 FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] pState points to the state buffer. The array is of length numStages. - */ - void arm_fir_lattice_init_q15( - arm_fir_lattice_instance_q15 * S, - uint16_t numStages, - const q15_t * pCoeffs, - q15_t * pState); - - - /** - * @brief Processing function for the Q15 FIR lattice filter. - * @param[in] S points to an instance of the Q15 FIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_lattice_q15( - const arm_fir_lattice_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR lattice filter. - * @param[in] S points to an instance of the Q31 FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] pState points to the state buffer. The array is of length numStages. - */ - void arm_fir_lattice_init_q31( - arm_fir_lattice_instance_q31 * S, - uint16_t numStages, - const q31_t * pCoeffs, - q31_t * pState); - - - /** - * @brief Processing function for the Q31 FIR lattice filter. - * @param[in] S points to an instance of the Q31 FIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_fir_lattice_q31( - const arm_fir_lattice_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - -/** - * @brief Initialization function for the floating-point FIR lattice filter. - * @param[in] S points to an instance of the floating-point FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] pState points to the state buffer. The array is of length numStages. - */ - void arm_fir_lattice_init_f32( - arm_fir_lattice_instance_f32 * S, - uint16_t numStages, - const float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Processing function for the floating-point FIR lattice filter. - * @param[in] S points to an instance of the floating-point FIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_fir_lattice_f32( - const arm_fir_lattice_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 IIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of stages in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */ - q15_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ - q15_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */ - } arm_iir_lattice_instance_q15; - - /** - * @brief Instance structure for the Q31 IIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of stages in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */ - q31_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ - q31_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */ - } arm_iir_lattice_instance_q31; - - /** - * @brief Instance structure for the floating-point IIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of stages in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */ - float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ - float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */ - } arm_iir_lattice_instance_f32; - - - /** - * @brief Processing function for the floating-point IIR lattice filter. - * @param[in] S points to an instance of the floating-point IIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_f32( - const arm_iir_lattice_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point IIR lattice filter. - * @param[in] S points to an instance of the floating-point IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages. - * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1. - * @param[in] pState points to the state buffer. The array is of length numStages+blockSize-1. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_init_f32( - arm_iir_lattice_instance_f32 * S, - uint16_t numStages, - float32_t * pkCoeffs, - float32_t * pvCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 IIR lattice filter. - * @param[in] S points to an instance of the Q31 IIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_q31( - const arm_iir_lattice_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 IIR lattice filter. - * @param[in] S points to an instance of the Q31 IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages. - * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1. - * @param[in] pState points to the state buffer. The array is of length numStages+blockSize. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_init_q31( - arm_iir_lattice_instance_q31 * S, - uint16_t numStages, - q31_t * pkCoeffs, - q31_t * pvCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 IIR lattice filter. - * @param[in] S points to an instance of the Q15 IIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_q15( - const arm_iir_lattice_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - -/** - * @brief Initialization function for the Q15 IIR lattice filter. - * @param[in] S points to an instance of the fixed-point Q15 IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages. - * @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1. - * @param[in] pState points to state buffer. The array is of length numStages+blockSize. - * @param[in] blockSize number of samples to process per call. - */ - void arm_iir_lattice_init_q15( - arm_iir_lattice_instance_q15 * S, - uint16_t numStages, - q15_t * pkCoeffs, - q15_t * pvCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the floating-point LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - float32_t mu; /**< step size that controls filter coefficient updates. */ - } arm_lms_instance_f32; - - - /** - * @brief Processing function for floating-point LMS filter. - * @param[in] S points to an instance of the floating-point LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_f32( - const arm_lms_instance_f32 * S, - const float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for floating-point LMS filter. - * @param[in] S points to an instance of the floating-point LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to the coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_init_f32( - arm_lms_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - float32_t mu, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q15_t mu; /**< step size that controls filter coefficient updates. */ - uint32_t postShift; /**< bit shift applied to coefficients. */ - } arm_lms_instance_q15; - - - /** - * @brief Initialization function for the Q15 LMS filter. - * @param[in] S points to an instance of the Q15 LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to the coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_init_q15( - arm_lms_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - q15_t mu, - uint32_t blockSize, - uint32_t postShift); - - - /** - * @brief Processing function for Q15 LMS filter. - * @param[in] S points to an instance of the Q15 LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_q15( - const arm_lms_instance_q15 * S, - const q15_t * pSrc, - q15_t * pRef, - q15_t * pOut, - q15_t * pErr, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q31 LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q31_t mu; /**< step size that controls filter coefficient updates. */ - uint32_t postShift; /**< bit shift applied to coefficients. */ - } arm_lms_instance_q31; - - - /** - * @brief Processing function for Q31 LMS filter. - * @param[in] S points to an instance of the Q15 LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_q31( - const arm_lms_instance_q31 * S, - const q31_t * pSrc, - q31_t * pRef, - q31_t * pOut, - q31_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for Q31 LMS filter. - * @param[in] S points to an instance of the Q31 LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_init_q31( - arm_lms_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - q31_t mu, - uint32_t blockSize, - uint32_t postShift); - - - /** - * @brief Instance structure for the floating-point normalized LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - float32_t mu; /**< step size that control filter coefficient updates. */ - float32_t energy; /**< saves previous frame energy. */ - float32_t x0; /**< saves previous input sample. */ - } arm_lms_norm_instance_f32; - - - /** - * @brief Processing function for floating-point normalized LMS filter. - * @param[in] S points to an instance of the floating-point normalized LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_f32( - arm_lms_norm_instance_f32 * S, - const float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for floating-point normalized LMS filter. - * @param[in] S points to an instance of the floating-point LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_init_f32( - arm_lms_norm_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - float32_t mu, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q31 normalized LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q31_t mu; /**< step size that controls filter coefficient updates. */ - uint8_t postShift; /**< bit shift applied to coefficients. */ - const q31_t *recipTable; /**< points to the reciprocal initial value table. */ - q31_t energy; /**< saves previous frame energy. */ - q31_t x0; /**< saves previous input sample. */ - } arm_lms_norm_instance_q31; - - - /** - * @brief Processing function for Q31 normalized LMS filter. - * @param[in] S points to an instance of the Q31 normalized LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_q31( - arm_lms_norm_instance_q31 * S, - const q31_t * pSrc, - q31_t * pRef, - q31_t * pOut, - q31_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for Q31 normalized LMS filter. - * @param[in] S points to an instance of the Q31 normalized LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_norm_init_q31( - arm_lms_norm_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - q31_t mu, - uint32_t blockSize, - uint8_t postShift); - - - /** - * @brief Instance structure for the Q15 normalized LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< Number of coefficients in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q15_t mu; /**< step size that controls filter coefficient updates. */ - uint8_t postShift; /**< bit shift applied to coefficients. */ - const q15_t *recipTable; /**< Points to the reciprocal initial value table. */ - q15_t energy; /**< saves previous frame energy. */ - q15_t x0; /**< saves previous input sample. */ - } arm_lms_norm_instance_q15; - - - /** - * @brief Processing function for Q15 normalized LMS filter. - * @param[in] S points to an instance of the Q15 normalized LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_q15( - arm_lms_norm_instance_q15 * S, - const q15_t * pSrc, - q15_t * pRef, - q15_t * pOut, - q15_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for Q15 normalized LMS filter. - * @param[in] S points to an instance of the Q15 normalized LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_norm_init_q15( - arm_lms_norm_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - q15_t mu, - uint32_t blockSize, - uint8_t postShift); - - - /** - * @brief Correlation of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_f32( - const float32_t * pSrcA, - uint32_t srcALen, - const float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst); - - - /** - * @brief Correlation of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_f64( - const float64_t * pSrcA, - uint32_t srcALen, - const float64_t * pSrcB, - uint32_t srcBLen, - float64_t * pDst); - - -/** - @brief Correlation of Q15 sequences - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. -*/ -void arm_correlate_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch); - - -/** - @brief Correlation of Q15 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - -/** - @brief Correlation of Q15 sequences (fast version). - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @return none - */ -void arm_correlate_fast_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - -/** - @brief Correlation of Q15 sequences (fast version). - @param[in] pSrcA points to the first input sequence. - @param[in] srcALen length of the first input sequence. - @param[in] pSrcB points to the second input sequence. - @param[in] srcBLen length of the second input sequence. - @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - */ -void arm_correlate_fast_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch); - - - /** - * @brief Correlation of Q31 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - -/** - @brief Correlation of Q31 sequences (fast version). - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ -void arm_correlate_fast_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Correlation of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - */ - void arm_correlate_opt_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Correlation of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst); - - - /** - * @brief Instance structure for the floating-point sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - float32_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_f32; - - /** - * @brief Instance structure for the Q31 sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - q31_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_q31; - - /** - * @brief Instance structure for the Q15 sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - q15_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_q15; - - /** - * @brief Instance structure for the Q7 sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - q7_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - const q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_q7; - - - /** - * @brief Processing function for the floating-point sparse FIR filter. - * @param[in] S points to an instance of the floating-point sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_f32( - arm_fir_sparse_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - float32_t * pScratchIn, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point sparse FIR filter. - * @param[in,out] S points to an instance of the floating-point sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_f32( - arm_fir_sparse_instance_f32 * S, - uint16_t numTaps, - const float32_t * pCoeffs, - float32_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 sparse FIR filter. - * @param[in] S points to an instance of the Q31 sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_q31( - arm_fir_sparse_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - q31_t * pScratchIn, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 sparse FIR filter. - * @param[in,out] S points to an instance of the Q31 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_q31( - arm_fir_sparse_instance_q31 * S, - uint16_t numTaps, - const q31_t * pCoeffs, - q31_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 sparse FIR filter. - * @param[in] S points to an instance of the Q15 sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] pScratchOut points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_q15( - arm_fir_sparse_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - q15_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 sparse FIR filter. - * @param[in,out] S points to an instance of the Q15 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_q15( - arm_fir_sparse_instance_q15 * S, - uint16_t numTaps, - const q15_t * pCoeffs, - q15_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q7 sparse FIR filter. - * @param[in] S points to an instance of the Q7 sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] pScratchOut points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_q7( - arm_fir_sparse_instance_q7 * S, - const q7_t * pSrc, - q7_t * pDst, - q7_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q7 sparse FIR filter. - * @param[in,out] S points to an instance of the Q7 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_q7( - arm_fir_sparse_instance_q7 * S, - uint16_t numTaps, - const q7_t * pCoeffs, - q7_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - - - - - /** - * @brief floating-point Circular write function. - */ - __STATIC_FORCEINLINE void arm_circularWrite_f32( - int32_t * circBuffer, - int32_t L, - uint16_t * writeOffset, - int32_t bufferInc, - const int32_t * src, - int32_t srcInc, - uint32_t blockSize) - { - uint32_t i = 0U; - int32_t wOffset; - - /* Copy the value of Index pointer that points - * to the current location where the input samples to be copied */ - wOffset = *writeOffset; - - /* Loop over the blockSize */ - i = blockSize; - - while (i > 0U) - { - /* copy the input sample to the circular buffer */ - circBuffer[wOffset] = *src; - - /* Update the input pointer */ - src += srcInc; - - /* Circularly update wOffset. Watch out for positive and negative value */ - wOffset += bufferInc; - if (wOffset >= L) - wOffset -= L; - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *writeOffset = (uint16_t)wOffset; - } - - - - /** - * @brief floating-point Circular Read function. - */ - __STATIC_FORCEINLINE void arm_circularRead_f32( - int32_t * circBuffer, - int32_t L, - int32_t * readOffset, - int32_t bufferInc, - int32_t * dst, - int32_t * dst_base, - int32_t dst_length, - int32_t dstInc, - uint32_t blockSize) - { - uint32_t i = 0U; - int32_t rOffset; - int32_t* dst_end; - - /* Copy the value of Index pointer that points - * to the current location from where the input samples to be read */ - rOffset = *readOffset; - dst_end = dst_base + dst_length; - - /* Loop over the blockSize */ - i = blockSize; - - while (i > 0U) - { - /* copy the sample from the circular buffer to the destination buffer */ - *dst = circBuffer[rOffset]; - - /* Update the input pointer */ - dst += dstInc; - - if (dst == dst_end) - { - dst = dst_base; - } - - /* Circularly update rOffset. Watch out for positive and negative value */ - rOffset += bufferInc; - - if (rOffset >= L) - { - rOffset -= L; - } - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *readOffset = rOffset; - } - - - /** - * @brief Q15 Circular write function. - */ - __STATIC_FORCEINLINE void arm_circularWrite_q15( - q15_t * circBuffer, - int32_t L, - uint16_t * writeOffset, - int32_t bufferInc, - const q15_t * src, - int32_t srcInc, - uint32_t blockSize) - { - uint32_t i = 0U; - int32_t wOffset; - - /* Copy the value of Index pointer that points - * to the current location where the input samples to be copied */ - wOffset = *writeOffset; - - /* Loop over the blockSize */ - i = blockSize; - - while (i > 0U) - { - /* copy the input sample to the circular buffer */ - circBuffer[wOffset] = *src; - - /* Update the input pointer */ - src += srcInc; - - /* Circularly update wOffset. Watch out for positive and negative value */ - wOffset += bufferInc; - if (wOffset >= L) - wOffset -= L; - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *writeOffset = (uint16_t)wOffset; - } - - - /** - * @brief Q15 Circular Read function. - */ - __STATIC_FORCEINLINE void arm_circularRead_q15( - q15_t * circBuffer, - int32_t L, - int32_t * readOffset, - int32_t bufferInc, - q15_t * dst, - q15_t * dst_base, - int32_t dst_length, - int32_t dstInc, - uint32_t blockSize) - { - uint32_t i = 0; - int32_t rOffset; - q15_t* dst_end; - - /* Copy the value of Index pointer that points - * to the current location from where the input samples to be read */ - rOffset = *readOffset; - - dst_end = dst_base + dst_length; - - /* Loop over the blockSize */ - i = blockSize; - - while (i > 0U) - { - /* copy the sample from the circular buffer to the destination buffer */ - *dst = circBuffer[rOffset]; - - /* Update the input pointer */ - dst += dstInc; - - if (dst == dst_end) - { - dst = dst_base; - } - - /* Circularly update wOffset. Watch out for positive and negative value */ - rOffset += bufferInc; - - if (rOffset >= L) - { - rOffset -= L; - } - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *readOffset = rOffset; - } - - - /** - * @brief Q7 Circular write function. - */ - __STATIC_FORCEINLINE void arm_circularWrite_q7( - q7_t * circBuffer, - int32_t L, - uint16_t * writeOffset, - int32_t bufferInc, - const q7_t * src, - int32_t srcInc, - uint32_t blockSize) - { - uint32_t i = 0U; - int32_t wOffset; - - /* Copy the value of Index pointer that points - * to the current location where the input samples to be copied */ - wOffset = *writeOffset; - - /* Loop over the blockSize */ - i = blockSize; - - while (i > 0U) - { - /* copy the input sample to the circular buffer */ - circBuffer[wOffset] = *src; - - /* Update the input pointer */ - src += srcInc; - - /* Circularly update wOffset. Watch out for positive and negative value */ - wOffset += bufferInc; - if (wOffset >= L) - wOffset -= L; - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *writeOffset = (uint16_t)wOffset; - } - - - /** - * @brief Q7 Circular Read function. - */ - __STATIC_FORCEINLINE void arm_circularRead_q7( - q7_t * circBuffer, - int32_t L, - int32_t * readOffset, - int32_t bufferInc, - q7_t * dst, - q7_t * dst_base, - int32_t dst_length, - int32_t dstInc, - uint32_t blockSize) - { - uint32_t i = 0; - int32_t rOffset; - q7_t* dst_end; - - /* Copy the value of Index pointer that points - * to the current location from where the input samples to be read */ - rOffset = *readOffset; - - dst_end = dst_base + dst_length; - - /* Loop over the blockSize */ - i = blockSize; - - while (i > 0U) - { - /* copy the sample from the circular buffer to the destination buffer */ - *dst = circBuffer[rOffset]; - - /* Update the input pointer */ - dst += dstInc; - - if (dst == dst_end) - { - dst = dst_base; - } - - /* Circularly update rOffset. Watch out for positive and negative value */ - rOffset += bufferInc; - - if (rOffset >= L) - { - rOffset -= L; - } - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *readOffset = rOffset; - } - - -/** - @brief Levinson Durbin - @param[in] phi autocovariance vector starting with lag 0 (length is nbCoefs + 1) - @param[out] a autoregressive coefficients - @param[out] err prediction error (variance) - @param[in] nbCoefs number of autoregressive coefficients - @return none - */ -void arm_levinson_durbin_f32(const float32_t *phi, - float32_t *a, - float32_t *err, - int nbCoefs); - - -/** - @brief Levinson Durbin - @param[in] phi autocovariance vector starting with lag 0 (length is nbCoefs + 1) - @param[out] a autoregressive coefficients - @param[out] err prediction error (variance) - @param[in] nbCoefs number of autoregressive coefficients - @return none - */ -void arm_levinson_durbin_q31(const q31_t *phi, - q31_t *a, - q31_t *err, - int nbCoefs); - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _FILTERING_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/filtering_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/filtering_functions_f16.h deleted file mode 100644 index d4aad1e..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/filtering_functions_f16.h +++ /dev/null @@ -1,237 +0,0 @@ -/****************************************************************************** - * @file filtering_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _FILTERING_FUNCTIONS_F16_H_ -#define _FILTERING_FUNCTIONS_F16_H_ - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) - - /** - * @brief Instance structure for the floating-point FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - float16_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - const float16_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - } arm_fir_instance_f16; - - /** - * @brief Initialization function for the floating-point FIR filter. - * @param[in,out] S points to an instance of the floating-point FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - */ - void arm_fir_init_f16( - arm_fir_instance_f16 * S, - uint16_t numTaps, - const float16_t * pCoeffs, - float16_t * pState, - uint32_t blockSize); - - /** - * @brief Processing function for the floating-point FIR filter. - * @param[in] S points to an instance of the floating-point FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_f16( - const arm_fir_instance_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize); - - - /** - * @brief Instance structure for the floating-point Biquad cascade filter. - */ - typedef struct - { - uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float16_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ - const float16_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_casd_df1_inst_f16; - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - /** - * @brief Instance structure for the modified Biquad coefs required by vectorized code. - */ - typedef struct - { - float16_t coeffs[12][8]; /**< Points to the array of modified coefficients. The array is of length 32. There is one per stage */ - } arm_biquad_mod_coef_f16; -#endif - - /** - * @brief Processing function for the floating-point Biquad cascade filter. - * @param[in] S points to an instance of the floating-point Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_f16( - const arm_biquad_casd_df1_inst_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize); - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - void arm_biquad_cascade_df1_mve_init_f16( - arm_biquad_casd_df1_inst_f16 * S, - uint8_t numStages, - const float16_t * pCoeffs, - arm_biquad_mod_coef_f16 * pCoeffsMod, - float16_t * pState); -#endif - - void arm_biquad_cascade_df1_init_f16( - arm_biquad_casd_df1_inst_f16 * S, - uint8_t numStages, - const float16_t * pCoeffs, - float16_t * pState); - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float16_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */ - const float16_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_df2T_instance_f16; - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float16_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */ - const float16_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_stereo_df2T_instance_f16; - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df2T_f16( - const arm_biquad_cascade_df2T_instance_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize); - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_stereo_df2T_f16( - const arm_biquad_cascade_stereo_df2T_instance_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize); - - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_df2T_init_f16( - arm_biquad_cascade_df2T_instance_f16 * S, - uint8_t numStages, - const float16_t * pCoeffs, - float16_t * pState); - - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_stereo_df2T_init_f16( - arm_biquad_cascade_stereo_df2T_instance_f16 * S, - uint8_t numStages, - const float16_t * pCoeffs, - float16_t * pState); - - /** - * @brief Correlation of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_f16( - const float16_t * pSrcA, - uint32_t srcALen, - const float16_t * pSrcB, - uint32_t srcBLen, - float16_t * pDst); - - -/** - @brief Levinson Durbin - @param[in] phi autocovariance vector starting with lag 0 (length is nbCoefs + 1) - @param[out] a autoregressive coefficients - @param[out] err prediction error (variance) - @param[in] nbCoefs number of autoregressive coefficients - @return none - */ -void arm_levinson_durbin_f16(const float16_t *phi, - float16_t *a, - float16_t *err, - int nbCoefs); - -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _FILTERING_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/interpolation_functions.h b/Drivers/CMSIS/DSP/Include/dsp/interpolation_functions.h deleted file mode 100644 index 6f14b3e..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/interpolation_functions.h +++ /dev/null @@ -1,319 +0,0 @@ -/****************************************************************************** - * @file interpolation_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _INTERPOLATION_FUNCTIONS_H_ -#define _INTERPOLATION_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/** - * @defgroup groupInterpolation Interpolation Functions - * These functions perform 1- and 2-dimensional interpolation of data. - * Linear interpolation is used for 1-dimensional data and - * bilinear interpolation is used for 2-dimensional data. - */ - - - /** - * @brief Instance structure for the floating-point Linear Interpolate function. - */ - typedef struct - { - uint32_t nValues; /**< nValues */ - float32_t x1; /**< x1 */ - float32_t xSpacing; /**< xSpacing */ - float32_t *pYData; /**< pointer to the table of Y values */ - } arm_linear_interp_instance_f32; - - /** - * @brief Instance structure for the floating-point bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - float32_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_f32; - - /** - * @brief Instance structure for the Q31 bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - q31_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_q31; - - /** - * @brief Instance structure for the Q15 bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - q15_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_q15; - - /** - * @brief Instance structure for the Q15 bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - q7_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_q7; - - - /** - * @brief Struct for specifying cubic spline type - */ - typedef enum - { - ARM_SPLINE_NATURAL = 0, /**< Natural spline */ - ARM_SPLINE_PARABOLIC_RUNOUT = 1 /**< Parabolic runout spline */ - } arm_spline_type; - - /** - * @brief Instance structure for the floating-point cubic spline interpolation. - */ - typedef struct - { - arm_spline_type type; /**< Type (boundary conditions) */ - const float32_t * x; /**< x values */ - const float32_t * y; /**< y values */ - uint32_t n_x; /**< Number of known data points */ - float32_t * coeffs; /**< Coefficients buffer (b,c, and d) */ - } arm_spline_instance_f32; - - - - - /** - * @ingroup groupInterpolation - */ - - /** - * @addtogroup SplineInterpolate - * @{ - */ - - - /** - * @brief Processing function for the floating-point cubic spline interpolation. - * @param[in] S points to an instance of the floating-point spline structure. - * @param[in] xq points to the x values ot the interpolated data points. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples of output data. - */ - void arm_spline_f32( - arm_spline_instance_f32 * S, - const float32_t * xq, - float32_t * pDst, - uint32_t blockSize); - - /** - * @brief Initialization function for the floating-point cubic spline interpolation. - * @param[in,out] S points to an instance of the floating-point spline structure. - * @param[in] type type of cubic spline interpolation (boundary conditions) - * @param[in] x points to the x values of the known data points. - * @param[in] y points to the y values of the known data points. - * @param[in] n number of known data points. - * @param[in] coeffs coefficients array for b, c, and d - * @param[in] tempBuffer buffer array for internal computations - */ - void arm_spline_init_f32( - arm_spline_instance_f32 * S, - arm_spline_type type, - const float32_t * x, - const float32_t * y, - uint32_t n, - float32_t * coeffs, - float32_t * tempBuffer); - - - /** - * @} end of SplineInterpolate group - */ - - - - /** - * @addtogroup LinearInterpolate - * @{ - */ - - /** - * @brief Process function for the floating-point Linear Interpolation Function. - * @param[in,out] S is an instance of the floating-point Linear Interpolation structure - * @param[in] x input sample to process - * @return y processed output sample. - * - */ - float32_t arm_linear_interp_f32( - arm_linear_interp_instance_f32 * S, - float32_t x); - - /** - * - * @brief Process function for the Q31 Linear Interpolation Function. - * @param[in] pYData pointer to Q31 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - * - */ - q31_t arm_linear_interp_q31( - const q31_t * pYData, - q31_t x, - uint32_t nValues); - - /** - * - * @brief Process function for the Q15 Linear Interpolation Function. - * @param[in] pYData pointer to Q15 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - * - */ - q15_t arm_linear_interp_q15( - const q15_t * pYData, - q31_t x, - uint32_t nValues); - - /** - * - * @brief Process function for the Q7 Linear Interpolation Function. - * @param[in] pYData pointer to Q7 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - */ -q7_t arm_linear_interp_q7( - const q7_t * pYData, - q31_t x, - uint32_t nValues); - - /** - * @} end of LinearInterpolate group - */ - - - - - /** - * @ingroup groupInterpolation - */ - - - /** - * @addtogroup BilinearInterpolate - * @{ - */ - - /** - * @brief Floating-point bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate. - * @param[in] Y interpolation coordinate. - * @return out interpolated value. - */ - float32_t arm_bilinear_interp_f32( - const arm_bilinear_interp_instance_f32 * S, - float32_t X, - float32_t Y); - - /** - * @brief Q31 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - q31_t arm_bilinear_interp_q31( - arm_bilinear_interp_instance_q31 * S, - q31_t X, - q31_t Y); - - - /** - * @brief Q15 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - q15_t arm_bilinear_interp_q15( - arm_bilinear_interp_instance_q15 * S, - q31_t X, - q31_t Y); - - /** - * @brief Q7 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - q7_t arm_bilinear_interp_q7( - arm_bilinear_interp_instance_q7 * S, - q31_t X, - q31_t Y); - /** - * @} end of BilinearInterpolate group - */ - - - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _INTERPOLATION_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/interpolation_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/interpolation_functions_f16.h deleted file mode 100644 index 90f3e85..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/interpolation_functions_f16.h +++ /dev/null @@ -1,107 +0,0 @@ -/****************************************************************************** - * @file interpolation_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _INTERPOLATION_FUNCTIONS_F16_H_ -#define _INTERPOLATION_FUNCTIONS_F16_H_ - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) - -typedef struct -{ - uint32_t nValues; /**< nValues */ - float16_t x1; /**< x1 */ - float16_t xSpacing; /**< xSpacing */ - float16_t *pYData; /**< pointer to the table of Y values */ -} arm_linear_interp_instance_f16; - -/** - * @brief Instance structure for the floating-point bilinear interpolation function. - */ -typedef struct -{ - uint16_t numRows;/**< number of rows in the data table. */ - uint16_t numCols;/**< number of columns in the data table. */ - float16_t *pData; /**< points to the data table. */ -} arm_bilinear_interp_instance_f16; - - /** - * @addtogroup LinearInterpolate - * @{ - */ - - /** - * @brief Process function for the floating-point Linear Interpolation Function. - * @param[in,out] S is an instance of the floating-point Linear Interpolation structure - * @param[in] x input sample to process - * @return y processed output sample. - * - */ - float16_t arm_linear_interp_f16( - arm_linear_interp_instance_f16 * S, - float16_t x); - - /** - * @} end of LinearInterpolate group - */ - -/** - * @addtogroup BilinearInterpolate - * @{ - */ - - /** - * @brief Floating-point bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate. - * @param[in] Y interpolation coordinate. - * @return out interpolated value. - */ - float16_t arm_bilinear_interp_f16( - const arm_bilinear_interp_instance_f16 * S, - float16_t X, - float16_t Y); - - - /** - * @} end of BilinearInterpolate group - */ -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _INTERPOLATION_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/matrix_functions.h b/Drivers/CMSIS/DSP/Include/dsp/matrix_functions.h deleted file mode 100644 index c9a473b..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/matrix_functions.h +++ /dev/null @@ -1,757 +0,0 @@ -/****************************************************************************** - * @file matrix_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _MATRIX_FUNCTIONS_H_ -#define _MATRIX_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -/** - * @defgroup groupMatrix Matrix Functions - * - * This set of functions provides basic matrix math operations. - * The functions operate on matrix data structures. For example, - * the type - * definition for the floating-point matrix structure is shown - * below: - * 
- *     typedef struct
- *     {
- *       uint16_t numRows;     // number of rows of the matrix.
- *       uint16_t numCols;     // number of columns of the matrix.
- *       float32_t *pData;     // points to the data of the matrix.
- *     } arm_matrix_instance_f32;
- *
- * There are similar definitions for Q15 and Q31 data types. - * - * The structure specifies the size of the matrix and then points to - * an array of data. The array is of size numRows X numCols - * and the values are arranged in row order. That is, the - * matrix element (i, j) is stored at: - * 
- *     pData[i*numCols + j]
- *
- * - * \par Init Functions - * There is an associated initialization function for each type of matrix - * data structure. - * The initialization function sets the values of the internal structure fields. - * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15() - * for floating-point, Q31 and Q15 types, respectively. - * - * \par - * Use of the initialization function is optional. However, if initialization function is used - * then the instance structure cannot be placed into a const data section. - * To place the instance structure in a const data - * section, manually initialize the data structure. For example: - * 
- * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
- * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
- * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
- *
- * where nRows specifies the number of rows, nColumns - * specifies the number of columns, and pData points to the - * data array. - * - * \par Size Checking - * By default all of the matrix functions perform size checking on the input and - * output matrices. For example, the matrix addition function verifies that the - * two input matrices and the output matrix all have the same number of rows and - * columns. If the size check fails the functions return: - * 
- *     ARM_MATH_SIZE_MISMATCH
- *
- * Otherwise the functions return - * 
- *     ARM_MATH_SUCCESS
- *
- * There is some overhead associated with this matrix size checking. - * The matrix size checking is enabled via the \#define - * 
- *     ARM_MATH_MATRIX_CHECK
- *
- * within the library project settings. By default this macro is defined - * and size checking is enabled. By changing the project settings and - * undefining this macro size checking is eliminated and the functions - * run a bit faster. With size checking disabled the functions always - * return ARM_MATH_SUCCESS. - */ - - /** - * @brief Instance structure for the floating-point matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - float32_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_f32; - - /** - * @brief Instance structure for the floating-point matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - float64_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_f64; - - /** - * @brief Instance structure for the Q7 matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - q7_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_q7; - - /** - * @brief Instance structure for the Q15 matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - q15_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_q15; - - /** - * @brief Instance structure for the Q31 matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - q31_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_q31; - - /** - * @brief Floating-point matrix addition. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_add_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - /** - * @brief Q15 matrix addition. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_add_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst); - - /** - * @brief Q31 matrix addition. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_add_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - /** - * @brief Floating-point, complex, matrix multiplication. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_cmplx_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - /** - * @brief Q15, complex, matrix multiplication. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_cmplx_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pScratch); - - /** - * @brief Q31, complex, matrix multiplication. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_cmplx_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - /** - * @brief Floating-point matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_trans_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst); - -/** - * @brief Floating-point matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_trans_f64( - const arm_matrix_instance_f64 * pSrc, - arm_matrix_instance_f64 * pDst); - - /** - * @brief Floating-point complex matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_cmplx_trans_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_trans_q15( - const arm_matrix_instance_q15 * pSrc, - arm_matrix_instance_q15 * pDst); - - /** - * @brief Q15 complex matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_cmplx_trans_q15( - const arm_matrix_instance_q15 * pSrc, - arm_matrix_instance_q15 * pDst); - - /** - * @brief Q7 matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_trans_q7( - const arm_matrix_instance_q7 * pSrc, - arm_matrix_instance_q7 * pDst); - - /** - * @brief Q31 matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_trans_q31( - const arm_matrix_instance_q31 * pSrc, - arm_matrix_instance_q31 * pDst); - - /** - * @brief Q31 complex matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_cmplx_trans_q31( - const arm_matrix_instance_q31 * pSrc, - arm_matrix_instance_q31 * pDst); - - /** - * @brief Floating-point matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - /** - * @brief Floating-point matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_f64( - const arm_matrix_instance_f64 * pSrcA, - const arm_matrix_instance_f64 * pSrcB, - arm_matrix_instance_f64 * pDst); - - /** - * @brief Floating-point matrix and vector multiplication - * @param[in] pSrcMat points to the input matrix structure - * @param[in] pVec points to vector - * @param[out] pDst points to output vector - */ -void arm_mat_vec_mult_f32( - const arm_matrix_instance_f32 *pSrcMat, - const float32_t *pVec, - float32_t *pDst); - - /** - * @brief Q7 matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @param[in] pState points to the array for storing intermediate results - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_q7( - const arm_matrix_instance_q7 * pSrcA, - const arm_matrix_instance_q7 * pSrcB, - arm_matrix_instance_q7 * pDst, - q7_t * pState); - - /** - * @brief Q7 matrix and vector multiplication - * @param[in] pSrcMat points to the input matrix structure - * @param[in] pVec points to vector - * @param[out] pDst points to output vector - */ -void arm_mat_vec_mult_q7( - const arm_matrix_instance_q7 *pSrcMat, - const q7_t *pVec, - q7_t *pDst); - - /** - * @brief Q15 matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @param[in] pState points to the array for storing intermediate results - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState); - - /** - * @brief Q15 matrix and vector multiplication - * @param[in] pSrcMat points to the input matrix structure - * @param[in] pVec points to vector - * @param[out] pDst points to output vector - */ -void arm_mat_vec_mult_q15( - const arm_matrix_instance_q15 *pSrcMat, - const q15_t *pVec, - q15_t *pDst); - - /** - * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @param[in] pState points to the array for storing intermediate results - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_fast_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState); - - /** - * @brief Q31 matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - /** - * @brief Q31 matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @param[in] pState points to the array for storing intermediate results - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_opt_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst, - q31_t *pState); - - /** - * @brief Q31 matrix and vector multiplication - * @param[in] pSrcMat points to the input matrix structure - * @param[in] pVec points to vector - * @param[out] pDst points to output vector - */ -void arm_mat_vec_mult_q31( - const arm_matrix_instance_q31 *pSrcMat, - const q31_t *pVec, - q31_t *pDst); - - /** - * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_fast_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - /** - * @brief Floating-point matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_sub_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - /** - * @brief Floating-point matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_sub_f64( - const arm_matrix_instance_f64 * pSrcA, - const arm_matrix_instance_f64 * pSrcB, - arm_matrix_instance_f64 * pDst); - - /** - * @brief Q15 matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_sub_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst); - - /** - * @brief Q31 matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_sub_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - /** - * @brief Floating-point matrix scaling. - * @param[in] pSrc points to the input matrix - * @param[in] scale scale factor - * @param[out] pDst points to the output matrix - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_scale_f32( - const arm_matrix_instance_f32 * pSrc, - float32_t scale, - arm_matrix_instance_f32 * pDst); - - /** - * @brief Q15 matrix scaling. - * @param[in] pSrc points to input matrix - * @param[in] scaleFract fractional portion of the scale factor - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to output matrix - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_scale_q15( - const arm_matrix_instance_q15 * pSrc, - q15_t scaleFract, - int32_t shift, - arm_matrix_instance_q15 * pDst); - - /** - * @brief Q31 matrix scaling. - * @param[in] pSrc points to input matrix - * @param[in] scaleFract fractional portion of the scale factor - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_scale_q31( - const arm_matrix_instance_q31 * pSrc, - q31_t scaleFract, - int32_t shift, - arm_matrix_instance_q31 * pDst); - - /** - * @brief Q31 matrix initialization. - * @param[in,out] S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] pData points to the matrix data array. - */ -void arm_mat_init_q31( - arm_matrix_instance_q31 * S, - uint16_t nRows, - uint16_t nColumns, - q31_t * pData); - - /** - * @brief Q15 matrix initialization. - * @param[in,out] S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] pData points to the matrix data array. - */ -void arm_mat_init_q15( - arm_matrix_instance_q15 * S, - uint16_t nRows, - uint16_t nColumns, - q15_t * pData); - - /** - * @brief Floating-point matrix initialization. - * @param[in,out] S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] pData points to the matrix data array. - */ -void arm_mat_init_f32( - arm_matrix_instance_f32 * S, - uint16_t nRows, - uint16_t nColumns, - float32_t * pData); - - - - /** - * @brief Floating-point matrix inverse. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] dst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR. - */ - arm_status arm_mat_inverse_f32( - const arm_matrix_instance_f32 * src, - arm_matrix_instance_f32 * dst); - - - /** - * @brief Floating-point matrix inverse. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] dst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR. - */ - arm_status arm_mat_inverse_f64( - const arm_matrix_instance_f64 * src, - arm_matrix_instance_f64 * dst); - - /** - * @brief Floating-point Cholesky decomposition of Symmetric Positive Definite Matrix. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] dst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE. - * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition. - * The decomposition is returning a lower triangular matrix. - */ - arm_status arm_mat_cholesky_f64( - const arm_matrix_instance_f64 * src, - arm_matrix_instance_f64 * dst); - - /** - * @brief Floating-point Cholesky decomposition of Symmetric Positive Definite Matrix. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] dst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE. - * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition. - * The decomposition is returning a lower triangular matrix. - */ - arm_status arm_mat_cholesky_f32( - const arm_matrix_instance_f32 * src, - arm_matrix_instance_f32 * dst); - - /** - * @brief Solve UT . X = A where UT is an upper triangular matrix - * @param[in] ut The upper triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of UT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - arm_status arm_mat_solve_upper_triangular_f32( - const arm_matrix_instance_f32 * ut, - const arm_matrix_instance_f32 * a, - arm_matrix_instance_f32 * dst); - - /** - * @brief Solve LT . X = A where LT is a lower triangular matrix - * @param[in] lt The lower triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of LT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - arm_status arm_mat_solve_lower_triangular_f32( - const arm_matrix_instance_f32 * lt, - const arm_matrix_instance_f32 * a, - arm_matrix_instance_f32 * dst); - - - /** - * @brief Solve UT . X = A where UT is an upper triangular matrix - * @param[in] ut The upper triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of UT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - arm_status arm_mat_solve_upper_triangular_f64( - const arm_matrix_instance_f64 * ut, - const arm_matrix_instance_f64 * a, - arm_matrix_instance_f64 * dst); - - /** - * @brief Solve LT . X = A where LT is a lower triangular matrix - * @param[in] lt The lower triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of LT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - arm_status arm_mat_solve_lower_triangular_f64( - const arm_matrix_instance_f64 * lt, - const arm_matrix_instance_f64 * a, - arm_matrix_instance_f64 * dst); - - - /** - * @brief Floating-point LDL decomposition of Symmetric Positive Semi-Definite Matrix. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] l points to the instance of the output floating-point triangular matrix structure. - * @param[out] d points to the instance of the output floating-point diagonal matrix structure. - * @param[out] p points to the instance of the output floating-point permutation vector. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE. - * The decomposition is returning a lower triangular matrix. - */ - arm_status arm_mat_ldlt_f32( - const arm_matrix_instance_f32 * src, - arm_matrix_instance_f32 * l, - arm_matrix_instance_f32 * d, - uint16_t * pp); - - /** - * @brief Floating-point LDL decomposition of Symmetric Positive Semi-Definite Matrix. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] l points to the instance of the output floating-point triangular matrix structure. - * @param[out] d points to the instance of the output floating-point diagonal matrix structure. - * @param[out] p points to the instance of the output floating-point permutation vector. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE. - * The decomposition is returning a lower triangular matrix. - */ - arm_status arm_mat_ldlt_f64( - const arm_matrix_instance_f64 * src, - arm_matrix_instance_f64 * l, - arm_matrix_instance_f64 * d, - uint16_t * pp); - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _MATRIX_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/matrix_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/matrix_functions_f16.h deleted file mode 100644 index ad816d0..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/matrix_functions_f16.h +++ /dev/null @@ -1,221 +0,0 @@ -/****************************************************************************** - * @file matrix_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.9.0 - * @date 23 April 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _MATRIX_FUNCTIONS_F16_H_ -#define _MATRIX_FUNCTIONS_F16_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - /** - * @brief Instance structure for the floating-point matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - float16_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_f16; - - /** - * @brief Floating-point matrix addition. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_add_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst); - - /** - * @brief Floating-point, complex, matrix multiplication. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_cmplx_mult_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst); - - /** - * @brief Floating-point matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_trans_f16( - const arm_matrix_instance_f16 * pSrc, - arm_matrix_instance_f16 * pDst); - - /** - * @brief Floating-point complex matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_cmplx_trans_f16( - const arm_matrix_instance_f16 * pSrc, - arm_matrix_instance_f16 * pDst); - - /** - * @brief Floating-point matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst); - /** - * @brief Floating-point matrix and vector multiplication - * @param[in] pSrcMat points to the input matrix structure - * @param[in] pVec points to vector - * @param[out] pDst points to output vector - */ -void arm_mat_vec_mult_f16( - const arm_matrix_instance_f16 *pSrcMat, - const float16_t *pVec, - float16_t *pDst); - - /** - * @brief Floating-point matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_sub_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst); - - /** - * @brief Floating-point matrix scaling. - * @param[in] pSrc points to the input matrix - * @param[in] scale scale factor - * @param[out] pDst points to the output matrix - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_scale_f16( - const arm_matrix_instance_f16 * pSrc, - float16_t scale, - arm_matrix_instance_f16 * pDst); - - /** - * @brief Floating-point matrix initialization. - * @param[in,out] S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] pData points to the matrix data array. - */ -void arm_mat_init_f16( - arm_matrix_instance_f16 * S, - uint16_t nRows, - uint16_t nColumns, - float16_t * pData); - - - /** - * @brief Floating-point matrix inverse. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] dst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR. - */ - arm_status arm_mat_inverse_f16( - const arm_matrix_instance_f16 * src, - arm_matrix_instance_f16 * dst); - - - /** - * @brief Floating-point Cholesky decomposition of Symmetric Positive Definite Matrix. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] dst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE. - * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition. - * The decomposition is returning a lower triangular matrix. - */ - arm_status arm_mat_cholesky_f16( - const arm_matrix_instance_f16 * src, - arm_matrix_instance_f16 * dst); - - /** - * @brief Solve UT . X = A where UT is an upper triangular matrix - * @param[in] ut The upper triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of UT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - arm_status arm_mat_solve_upper_triangular_f16( - const arm_matrix_instance_f16 * ut, - const arm_matrix_instance_f16 * a, - arm_matrix_instance_f16 * dst); - - /** - * @brief Solve LT . X = A where LT is a lower triangular matrix - * @param[in] lt The lower triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of LT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - arm_status arm_mat_solve_lower_triangular_f16( - const arm_matrix_instance_f16 * lt, - const arm_matrix_instance_f16 * a, - arm_matrix_instance_f16 * dst); - - - -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _MATRIX_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/none.h b/Drivers/CMSIS/DSP/Include/dsp/none.h deleted file mode 100644 index b9c651e..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/none.h +++ /dev/null @@ -1,576 +0,0 @@ -/****************************************************************************** - * @file none.h - * @brief Intrinsincs when no DSP extension available - * @version V1.9.0 - * @date 20. July 2020 - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* - -Definitions in this file are allowing to reuse some versions of the -CMSIS-DSP to build on a core (M0 for instance) or a host where -DSP extension are not available. - -Ideally a pure C version should have been used instead. -But those are not always available or use a restricted set -of intrinsics. - -*/ - -#ifndef _NONE_H_ -#define _NONE_H_ - -#include "arm_math_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - - -/* - -Normally those kind of definitions are in a compiler file -in Core or Core_A. - -But for MSVC compiler it is a bit special. The goal is very specific -to CMSIS-DSP and only to allow the use of this library from other -systems like Python or Matlab. - -MSVC is not going to be used to cross-compile to ARM. So, having a MSVC -compiler file in Core or Core_A would not make sense. - -*/ -#if defined ( _MSC_VER ) || defined(__GNUC_PYTHON__) || defined(__APPLE_CC__) - __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data) - { - if (data == 0U) { return 32U; } - - uint32_t count = 0U; - uint32_t mask = 0x80000000U; - - while ((data & mask) == 0U) - { - count += 1U; - mask = mask >> 1U; - } - return count; - } - - __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) - { - if ((sat >= 1U) && (sat <= 32U)) - { - const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); - const int32_t min = -1 - max ; - if (val > max) - { - return max; - } - else if (val < min) - { - return min; - } - } - return val; - } - - __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) - { - if (sat <= 31U) - { - const uint32_t max = ((1U << sat) - 1U); - if (val > (int32_t)max) - { - return max; - } - else if (val < 0) - { - return 0U; - } - } - return (uint32_t)val; - } - - /** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] op1 Value to rotate - \param [in] op2 Number of Bits to rotate - \return Rotated value - */ -__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) -{ - op2 %= 32U; - if (op2 == 0U) - { - return op1; - } - return (op1 >> op2) | (op1 << (32U - op2)); -} - - -#endif - -/** - * @brief Clips Q63 to Q31 values. - */ - __STATIC_FORCEINLINE q31_t clip_q63_to_q31( - q63_t x) - { - return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? - ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x; - } - - /** - * @brief Clips Q63 to Q15 values. - */ - __STATIC_FORCEINLINE q15_t clip_q63_to_q15( - q63_t x) - { - return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? - ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15); - } - - /** - * @brief Clips Q31 to Q7 values. - */ - __STATIC_FORCEINLINE q7_t clip_q31_to_q7( - q31_t x) - { - return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ? - ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x; - } - - /** - * @brief Clips Q31 to Q15 values. - */ - __STATIC_FORCEINLINE q15_t clip_q31_to_q15( - q31_t x) - { - return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ? - ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x; - } - - /** - * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format. - */ - __STATIC_FORCEINLINE q63_t mult32x64( - q63_t x, - q31_t y) - { - return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) + - (((q63_t) (x >> 32) * y) ) ); - } - -/* SMMLAR */ -#define multAcc_32x32_keep32_R(a, x, y) \ - a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32) - -/* SMMLSR */ -#define multSub_32x32_keep32_R(a, x, y) \ - a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32) - -/* SMMULR */ -#define mult_32x32_keep32_R(a, x, y) \ - a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32) - -/* SMMLA */ -#define multAcc_32x32_keep32(a, x, y) \ - a += (q31_t) (((q63_t) x * y) >> 32) - -/* SMMLS */ -#define multSub_32x32_keep32(a, x, y) \ - a -= (q31_t) (((q63_t) x * y) >> 32) - -/* SMMUL */ -#define mult_32x32_keep32(a, x, y) \ - a = (q31_t) (((q63_t) x * y ) >> 32) - -#ifndef ARM_MATH_DSP - /** - * @brief definition to pack two 16 bit values. - */ - #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \ - (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) ) - #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \ - (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) ) -#endif - - /** - * @brief definition to pack four 8 bit values. - */ -#ifndef ARM_MATH_BIG_ENDIAN - #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \ - (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \ - (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \ - (((int32_t)(v3) << 24) & (int32_t)0xFF000000) ) -#else - #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \ - (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \ - (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \ - (((int32_t)(v0) << 24) & (int32_t)0xFF000000) ) -#endif - - - - -/* - * @brief C custom defined intrinsic functions - */ -#if !defined (ARM_MATH_DSP) - - - /* - * @brief C custom defined QADD8 - */ - __STATIC_FORCEINLINE uint32_t __QADD8( - uint32_t x, - uint32_t y) - { - q31_t r, s, t, u; - - r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; - s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; - t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; - u = __SSAT(((((q31_t)x ) >> 24) + (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; - - return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); - } - - - /* - * @brief C custom defined QSUB8 - */ - __STATIC_FORCEINLINE uint32_t __QSUB8( - uint32_t x, - uint32_t y) - { - q31_t r, s, t, u; - - r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; - s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; - t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; - u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; - - return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); - } - - - /* - * @brief C custom defined QADD16 - */ - __STATIC_FORCEINLINE uint32_t __QADD16( - uint32_t x, - uint32_t y) - { -/* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass! for armCC */ - q31_t r = 0, s = 0; - - r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHADD16 - */ - __STATIC_FORCEINLINE uint32_t __SHADD16( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined QSUB16 - */ - __STATIC_FORCEINLINE uint32_t __QSUB16( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHSUB16 - */ - __STATIC_FORCEINLINE uint32_t __SHSUB16( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined QASX - */ - __STATIC_FORCEINLINE uint32_t __QASX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHASX - */ - __STATIC_FORCEINLINE uint32_t __SHASX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined QSAX - */ - __STATIC_FORCEINLINE uint32_t __QSAX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHSAX - */ - __STATIC_FORCEINLINE uint32_t __SHSAX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SMUSDX - */ - __STATIC_FORCEINLINE uint32_t __SMUSDX( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); - } - - /* - * @brief C custom defined SMUADX - */ - __STATIC_FORCEINLINE uint32_t __SMUADX( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); - } - - - /* - * @brief C custom defined QADD - */ - __STATIC_FORCEINLINE int32_t __QADD( - int32_t x, - int32_t y) - { - return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y))); - } - - - /* - * @brief C custom defined QSUB - */ - __STATIC_FORCEINLINE int32_t __QSUB( - int32_t x, - int32_t y) - { - return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y))); - } - - - /* - * @brief C custom defined SMLAD - */ - __STATIC_FORCEINLINE uint32_t __SMLAD( - uint32_t x, - uint32_t y, - uint32_t sum) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + - ( ((q31_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLADX - */ - __STATIC_FORCEINLINE uint32_t __SMLADX( - uint32_t x, - uint32_t y, - uint32_t sum) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + - ( ((q31_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLSDX - */ - __STATIC_FORCEINLINE uint32_t __SMLSDX( - uint32_t x, - uint32_t y, - uint32_t sum) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + - ( ((q31_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLALD - */ - __STATIC_FORCEINLINE uint64_t __SMLALD( - uint32_t x, - uint32_t y, - uint64_t sum) - { -/* return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */ - return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + - ( ((q63_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLALDX - */ - __STATIC_FORCEINLINE uint64_t __SMLALDX( - uint32_t x, - uint32_t y, - uint64_t sum) - { -/* return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */ - return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + - ( ((q63_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMUAD - */ - __STATIC_FORCEINLINE uint32_t __SMUAD( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); - } - - - /* - * @brief C custom defined SMUSD - */ - __STATIC_FORCEINLINE uint32_t __SMUSD( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) - - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); - } - - - /* - * @brief C custom defined SXTB16 - */ - __STATIC_FORCEINLINE uint32_t __SXTB16( - uint32_t x) - { - return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) | - ((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000) )); - } - - /* - * @brief C custom defined SMMLA - */ - __STATIC_FORCEINLINE int32_t __SMMLA( - int32_t x, - int32_t y, - int32_t sum) - { - return (sum + (int32_t) (((int64_t) x * y) >> 32)); - } - -#endif /* !defined (ARM_MATH_DSP) */ - - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _TRANSFORM_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/quaternion_math_functions.h b/Drivers/CMSIS/DSP/Include/dsp/quaternion_math_functions.h deleted file mode 100644 index 6108865..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/quaternion_math_functions.h +++ /dev/null @@ -1,159 +0,0 @@ -/****************************************************************************** - * @file quaternion_math_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _QUATERNION_MATH_FUNCTIONS_H_ -#define _QUATERNION_MATH_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/** - * @defgroup groupQuaternionMath Quaternion Math Functions - * Functions to operates on quaternions and convert between a - * rotation and quaternion representation. - */ - - -/** - @brief Floating-point quaternion Norm. - @param[in] pInputQuaternions points to the input vector of quaternions - @param[out] pNorms points to the output vector of norms - @param[in] nbQuaternions number of quaternions in each vector - @return none - */ - - - -void arm_quaternion_norm_f32(const float32_t *pInputQuaternions, - float32_t *pNorms, - uint32_t nbQuaternions); - - -/** - @brief Floating-point quaternion inverse. - @param[in] pInputQuaternions points to the input vector of quaternions - @param[out] pInverseQuaternions points to the output vector of inverse quaternions - @param[in] nbQuaternions number of quaternions in each vector - @return none - */ - -void arm_quaternion_inverse_f32(const float32_t *pInputQuaternions, - float32_t *pInverseQuaternions, - uint32_t nbQuaternions); - -/** - @brief Floating-point quaternion conjugates. - @param[in] pInputQuaternions points to the input vector of quaternions - @param[out] pConjugateQuaternions points to the output vector of conjugate quaternions - @param[in] nbQuaternions number of quaternions in each vector - @return none - */ -void arm_quaternion_conjugate_f32(const float32_t *inputQuaternions, - float32_t *pConjugateQuaternions, - uint32_t nbQuaternions); - -/** - @brief Floating-point normalization of quaternions. - @param[in] pInputQuaternions points to the input vector of quaternions - @param[out] pNormalizedQuaternions points to the output vector of normalized quaternions - @param[in] nbQuaternions number of quaternions in each vector - @return none - */ -void arm_quaternion_normalize_f32(const float32_t *inputQuaternions, - float32_t *pNormalizedQuaternions, - uint32_t nbQuaternions); - - -/** - @brief Floating-point product of two quaternions. - @param[in] qa First quaternion - @param[in] qb Second quaternion - @param[out] r Product of two quaternions - @return none - */ -void arm_quaternion_product_single_f32(const float32_t *qa, - const float32_t *qb, - float32_t *r); - -/** - @brief Floating-point elementwise product two quaternions. - @param[in] qa First array of quaternions - @param[in] qb Second array of quaternions - @param[out] r Elementwise product of quaternions - @param[in] nbQuaternions Number of quaternions in the array - @return none - */ -void arm_quaternion_product_f32(const float32_t *qa, - const float32_t *qb, - float32_t *r, - uint32_t nbQuaternions); - -/** - * @brief Conversion of quaternion to equivalent rotation matrix. - * @param[in] pInputQuaternions points to an array of normalized quaternions - * @param[out] pOutputRotations points to an array of 3x3 rotations (in row order) - * @param[in] nbQuaternions in the array - * @return none. - * - * Format of rotation matrix - * \par - * The quaternion a + ib + jc + kd is converted into rotation matrix: - * a^2 + b^2 - c^2 - d^2 2bc - 2ad 2bd + 2ac - * 2bc + 2ad a^2 - b^2 + c^2 - d^2 2cd - 2ab - * 2bd - 2ac 2cd + 2ab a^2 - b^2 - c^2 + d^2 - * - * Rotation matrix is saved in row order : R00 R01 R02 R10 R11 R12 R20 R21 R22 - */ -void arm_quaternion2rotation_f32(const float32_t *pInputQuaternions, - float32_t *pOutputRotations, - uint32_t nbQuaternions); - -/** - * @brief Conversion of a rotation matrix to equivalent quaternion. - * @param[in] pInputRotations points to an array 3x3 rotation matrix (in row order) - * @param[out] pOutputQuaternions points to an array of quaternions - * @param[in] nbQuaternions in the array - * @return none. -*/ -void arm_rotation2quaternion_f32(const float32_t *pInputRotations, - float32_t *pOutputQuaternions, - uint32_t nbQuaternions); - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _QUATERNION_MATH_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/statistics_functions.h b/Drivers/CMSIS/DSP/Include/dsp/statistics_functions.h deleted file mode 100644 index 86c607b..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/statistics_functions.h +++ /dev/null @@ -1,977 +0,0 @@ -/****************************************************************************** - * @file statistics_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _STATISTICS_FUNCTIONS_H_ -#define _STATISTICS_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#include "dsp/basic_math_functions.h" -#include "dsp/fast_math_functions.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/** - * @defgroup groupStats Statistics Functions - */ - -/** - * @brief Computation of the LogSumExp - * - * In probabilistic computations, the dynamic of the probability values can be very - * wide because they come from gaussian functions. - * To avoid underflow and overflow issues, the values are represented by their log. - * In this representation, multiplying the original exp values is easy : their logs are added. - * But adding the original exp values is requiring some special handling and it is the - * goal of the LogSumExp function. - * - * If the values are x1...xn, the function is computing: - * - * ln(exp(x1) + ... + exp(xn)) and the computation is done in such a way that - * rounding issues are minimised. - * - * The max xm of the values is extracted and the function is computing: - * xm + ln(exp(x1 - xm) + ... + exp(xn - xm)) - * - * @param[in] *in Pointer to an array of input values. - * @param[in] blockSize Number of samples in the input array. - * @return LogSumExp - * - */ - - -float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize); - -/** - * @brief Dot product with log arithmetic - * - * Vectors are containing the log of the samples - * - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[in] pTmpBuffer temporary buffer of length blockSize - * @return The log of the dot product . - * - */ - - -float32_t arm_logsumexp_dot_prod_f32(const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t blockSize, - float32_t *pTmpBuffer); - -/** - * @brief Entropy - * - * @param[in] pSrcA Array of input values. - * @param[in] blockSize Number of samples in the input array. - * @return Entropy -Sum(p ln p) - * - */ - - -float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize); - - -/** - * @brief Entropy - * - * @param[in] pSrcA Array of input values. - * @param[in] blockSize Number of samples in the input array. - * @return Entropy -Sum(p ln p) - * - */ - - -float64_t arm_entropy_f64(const float64_t * pSrcA, uint32_t blockSize); - - -/** - * @brief Kullback-Leibler - * - * @param[in] pSrcA Pointer to an array of input values for probability distribution A. - * @param[in] pSrcB Pointer to an array of input values for probability distribution B. - * @param[in] blockSize Number of samples in the input array. - * @return Kullback-Leibler Divergence D(A || B) - * - */ -float32_t arm_kullback_leibler_f32(const float32_t * pSrcA - ,const float32_t * pSrcB - ,uint32_t blockSize); - - -/** - * @brief Kullback-Leibler - * - * @param[in] pSrcA Pointer to an array of input values for probability distribution A. - * @param[in] pSrcB Pointer to an array of input values for probability distribution B. - * @param[in] blockSize Number of samples in the input array. - * @return Kullback-Leibler Divergence D(A || B) - * - */ -float64_t arm_kullback_leibler_f64(const float64_t * pSrcA, - const float64_t * pSrcB, - uint32_t blockSize); - - - /** - * @brief Sum of the squares of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_q31( - const q31_t * pSrc, - uint32_t blockSize, - q63_t * pResult); - - - /** - * @brief Sum of the squares of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Sum of the squares of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult); - - - /** - * @brief Sum of the squares of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_q15( - const q15_t * pSrc, - uint32_t blockSize, - q63_t * pResult); - - - /** - * @brief Sum of the squares of the elements of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_q7( - const q7_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Mean value of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult); - - - /** - * @brief Mean value of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Mean value of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Mean value of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Mean value of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult); - - - /** - * @brief Variance of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Variance of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult); - - - /** - * @brief Variance of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Variance of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Root Mean Square of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_rms_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Root Mean Square of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_rms_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Root Mean Square of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_rms_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Standard deviation of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Standard deviation of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult); - - - /** - * @brief Standard deviation of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Standard deviation of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - - /** - * @brief Minimum value of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] result is output pointer - * @param[in] index is the array index of the minimum value in the input buffer. - */ - void arm_min_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * result, - uint32_t * index); - - /** - * @brief Minimum value of absolute values of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] result is output pointer - * @param[in] index is the array index of the minimum value in the input buffer. - */ - void arm_absmin_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * result, - uint32_t * index); - - /** - * @brief Minimum value of absolute values of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] result is output pointer - */ - void arm_absmin_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * result); - - - /** - * @brief Minimum value of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[in] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex); - -/** - * @brief Minimum value of absolute values of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[in] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_absmin_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex); - - /** - * @brief Minimum value of absolute values of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - */ - void arm_absmin_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Minimum value of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex); - - /** - * @brief Minimum value of absolute values of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_absmin_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex); - - /** - * @brief Minimum value of absolute values of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - */ - void arm_absmin_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Minimum value of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex); - - /** - * @brief Minimum value of absolute values of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_absmin_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex); - - /** - * @brief Minimum value of absolute values of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - */ - void arm_absmin_no_idx_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Minimum value of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult, - uint32_t * pIndex); - - /** - * @brief Minimum value of absolute values of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_absmin_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult, - uint32_t * pIndex); - - /** - * @brief Minimum value of absolute values of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - */ - void arm_absmin_no_idx_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult); - - -/** - * @brief Maximum value of a Q7 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex); - -/** - * @brief Maximum value of absolute values of a Q7 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_absmax_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex); - -/** - * @brief Maximum value of absolute values of a Q7 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - */ - void arm_absmax_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult); - - -/** - * @brief Maximum value of a Q15 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex); - -/** - * @brief Maximum value of absolute values of a Q15 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_absmax_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex); - - /** - * @brief Maximum value of absolute values of a Q15 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - */ - void arm_absmax_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - -/** - * @brief Maximum value of a Q31 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex); - -/** - * @brief Maximum value of absolute values of a Q31 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_absmax_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex); - - /** - * @brief Maximum value of absolute values of a Q31 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - */ - void arm_absmax_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - -/** - * @brief Maximum value of a floating-point vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex); - -/** - * @brief Maximum value of absolute values of a floating-point vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_absmax_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex); - - /** - * @brief Maximum value of absolute values of a floating-point vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - */ - void arm_absmax_no_idx_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - -/** - * @brief Maximum value of a floating-point vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult, - uint32_t * pIndex); - -/** - * @brief Maximum value of absolute values of a floating-point vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_absmax_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult, - uint32_t * pIndex); - -/** - * @brief Maximum value of absolute values of a floating-point vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - */ - void arm_absmax_no_idx_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult); - - /** - @brief Maximum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - void arm_max_no_idx_f32( - const float32_t *pSrc, - uint32_t blockSize, - float32_t *pResult); - - /** - @brief Minimum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - void arm_min_no_idx_f32( - const float32_t *pSrc, - uint32_t blockSize, - float32_t *pResult); - - /** - @brief Maximum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - void arm_max_no_idx_f64( - const float64_t *pSrc, - uint32_t blockSize, - float64_t *pResult); - - /** - @brief Maximum value of a q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - void arm_max_no_idx_q31( - const q31_t *pSrc, - uint32_t blockSize, - q31_t *pResult); - - /** - @brief Maximum value of a q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - void arm_max_no_idx_q15( - const q15_t *pSrc, - uint32_t blockSize, - q15_t *pResult); - - /** - @brief Maximum value of a q7 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - void arm_max_no_idx_q7( - const q7_t *pSrc, - uint32_t blockSize, - q7_t *pResult); - - /** - @brief Minimum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - void arm_min_no_idx_f64( - const float64_t *pSrc, - uint32_t blockSize, - float64_t *pResult); - -/** - @brief Minimum value of a q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - void arm_min_no_idx_q31( - const q31_t *pSrc, - uint32_t blockSize, - q31_t *pResult); - - /** - @brief Minimum value of a q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - void arm_min_no_idx_q15( - const q15_t *pSrc, - uint32_t blockSize, - q15_t *pResult); - - /** - @brief Minimum value of a q7 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - void arm_min_no_idx_q7( - const q7_t *pSrc, - uint32_t blockSize, - q7_t *pResult); - -/** - @brief Mean square error between two Q7 vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean square error - @return none -*/ - -void arm_mse_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - uint32_t blockSize, - q7_t * pResult); - -/** - @brief Mean square error between two Q15 vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean square error - @return none -*/ - -void arm_mse_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - uint32_t blockSize, - q15_t * pResult); - -/** - @brief Mean square error between two Q31 vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean square error - @return none -*/ - -void arm_mse_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - uint32_t blockSize, - q31_t * pResult); - -/** - @brief Mean square error between two single precision float vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean square error - @return none -*/ - -void arm_mse_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t blockSize, - float32_t * pResult); - -/** - @brief Mean square error between two double precision float vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean square error - @return none -*/ - -void arm_mse_f64( - const float64_t * pSrcA, - const float64_t * pSrcB, - uint32_t blockSize, - float64_t * pResult); - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _STATISTICS_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/statistics_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/statistics_functions_f16.h deleted file mode 100644 index 3dbc40b..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/statistics_functions_f16.h +++ /dev/null @@ -1,218 +0,0 @@ -/****************************************************************************** - * @file statistics_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.9.0 - * @date 23 April 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _STATISTICS_FUNCTIONS_F16_H_ -#define _STATISTICS_FUNCTIONS_F16_H_ - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#include "dsp/basic_math_functions_f16.h" -#include "dsp/fast_math_functions_f16.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) - - /** - * @brief Sum of the squares of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult); - - /** - * @brief Mean value of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult); - - /** - * @brief Variance of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult); - - /** - * @brief Root Mean Square of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_rms_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult); - - /** - * @brief Standard deviation of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult); - - /** - * @brief Minimum value of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex); - - /** - * @brief Minimum value of absolute values of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_absmin_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex); - -/** - * @brief Maximum value of a floating-point vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex); - -/** - * @brief Maximum value of absolute values of a floating-point vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_absmax_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex); - -/** - * @brief Entropy - * - * @param[in] pSrcA Array of input values. - * @param[in] blockSize Number of samples in the input array. - * @return Entropy -Sum(p ln p) - * - */ - - -float16_t arm_entropy_f16(const float16_t * pSrcA,uint32_t blockSize); - -float16_t arm_logsumexp_f16(const float16_t *in, uint32_t blockSize); - -/** - * @brief Dot product with log arithmetic - * - * Vectors are containing the log of the samples - * - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[in] pTmpBuffer temporary buffer of length blockSize - * @return The log of the dot product . - * - */ - - -float16_t arm_logsumexp_dot_prod_f16(const float16_t * pSrcA, - const float16_t * pSrcB, - uint32_t blockSize, - float16_t *pTmpBuffer); - -/** - * @brief Kullback-Leibler - * - * @param[in] pSrcA Pointer to an array of input values for probability distribution A. - * @param[in] pSrcB Pointer to an array of input values for probability distribution B. - * @param[in] blockSize Number of samples in the input array. - * @return Kullback-Leibler Divergence D(A || B) - * - */ -float16_t arm_kullback_leibler_f16(const float16_t * pSrcA - ,const float16_t * pSrcB - ,uint32_t blockSize); - -/** - @brief Maximum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - void arm_max_no_idx_f16( - const float16_t *pSrc, - uint32_t blockSize, - float16_t *pResult); - - - -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _STATISTICS_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/support_functions.h b/Drivers/CMSIS/DSP/Include/dsp/support_functions.h deleted file mode 100644 index 5cf3498..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/support_functions.h +++ /dev/null @@ -1,453 +0,0 @@ -/****************************************************************************** - * @file support_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _SUPPORT_FUNCTIONS_H_ -#define _SUPPORT_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -/** - * @defgroup groupSupport Support Functions - */ - - -/** - * @brief Converts the elements of the floating-point vector to Q31 vector. - * @param[in] pSrc points to the floating-point input vector - * @param[out] pDst points to the Q31 output vector - * @param[in] blockSize length of the input vector - */ - void arm_float_to_q31( - const float32_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the floating-point vector to Q15 vector. - * @param[in] pSrc points to the floating-point input vector - * @param[out] pDst points to the Q15 output vector - * @param[in] blockSize length of the input vector - */ - void arm_float_to_q15( - const float32_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the floating-point vector to Q7 vector. - * @param[in] pSrc points to the floating-point input vector - * @param[out] pDst points to the Q7 output vector - * @param[in] blockSize length of the input vector - */ - void arm_float_to_q7( - const float32_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q31 vector to floating-point vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q31_to_float( - const q31_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q31 vector to Q15 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q31_to_q15( - const q31_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q31 vector to Q7 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q31_to_q7( - const q31_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q15 vector to floating-point vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q15_to_float( - const q15_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q15 vector to Q31 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q15_to_q31( - const q15_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q15 vector to Q7 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q15_to_q7( - const q15_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q7 vector to floating-point vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q7_to_float( - const q7_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q7 vector to Q31 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_q7_to_q31( - const q7_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q7 vector to Q15 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_q7_to_q15( - const q7_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - - - - /** - * @brief Struct for specifying sorting algorithm - */ - typedef enum - { - ARM_SORT_BITONIC = 0, - /**< Bitonic sort */ - ARM_SORT_BUBBLE = 1, - /**< Bubble sort */ - ARM_SORT_HEAP = 2, - /**< Heap sort */ - ARM_SORT_INSERTION = 3, - /**< Insertion sort */ - ARM_SORT_QUICK = 4, - /**< Quick sort */ - ARM_SORT_SELECTION = 5 - /**< Selection sort */ - } arm_sort_alg; - - /** - * @brief Struct for specifying sorting algorithm - */ - typedef enum - { - ARM_SORT_DESCENDING = 0, - /**< Descending order (9 to 0) */ - ARM_SORT_ASCENDING = 1 - /**< Ascending order (0 to 9) */ - } arm_sort_dir; - - /** - * @brief Instance structure for the sorting algorithms. - */ - typedef struct - { - arm_sort_alg alg; /**< Sorting algorithm selected */ - arm_sort_dir dir; /**< Sorting order (direction) */ - } arm_sort_instance_f32; - - /** - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_sort_f32( - const arm_sort_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - /** - * @param[in,out] S points to an instance of the sorting structure. - * @param[in] alg Selected algorithm. - * @param[in] dir Sorting order. - */ - void arm_sort_init_f32( - arm_sort_instance_f32 * S, - arm_sort_alg alg, - arm_sort_dir dir); - - /** - * @brief Instance structure for the sorting algorithms. - */ - typedef struct - { - arm_sort_dir dir; /**< Sorting order (direction) */ - float32_t * buffer; /**< Working buffer */ - } arm_merge_sort_instance_f32; - - /** - * @param[in] S points to an instance of the sorting structure. - * @param[in,out] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_merge_sort_f32( - const arm_merge_sort_instance_f32 * S, - float32_t *pSrc, - float32_t *pDst, - uint32_t blockSize); - - /** - * @param[in,out] S points to an instance of the sorting structure. - * @param[in] dir Sorting order. - * @param[in] buffer Working buffer. - */ - void arm_merge_sort_init_f32( - arm_merge_sort_instance_f32 * S, - arm_sort_dir dir, - float32_t * buffer); - - - - /** - * @brief Copies the elements of a floating-point vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Copies the elements of a floating-point vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize); - - - - /** - * @brief Copies the elements of a Q7 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_q7( - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Copies the elements of a Q15 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Copies the elements of a Q31 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a floating-point vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_f32( - float32_t value, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a floating-point vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_f64( - float64_t value, - float64_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a Q7 vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_q7( - q7_t value, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a Q15 vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_q15( - q15_t value, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a Q31 vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_q31( - q31_t value, - q31_t * pDst, - uint32_t blockSize); - - - - - - - -/** - * @brief Weighted sum - * - * - * @param[in] *in Array of input values. - * @param[in] *weigths Weights - * @param[in] blockSize Number of samples in the input array. - * @return Weighted sum - * - */ -float32_t arm_weighted_sum_f32(const float32_t *in - , const float32_t *weigths - , uint32_t blockSize); - - -/** - * @brief Barycenter - * - * - * @param[in] in List of vectors - * @param[in] weights Weights of the vectors - * @param[out] out Barycenter - * @param[in] nbVectors Number of vectors - * @param[in] vecDim Dimension of space (vector dimension) - * @return None - * - */ -void arm_barycenter_f32(const float32_t *in - , const float32_t *weights - , float32_t *out - , uint32_t nbVectors - , uint32_t vecDim); - - - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _SUPPORT_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/support_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/support_functions_f16.h deleted file mode 100644 index e4f2535..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/support_functions_f16.h +++ /dev/null @@ -1,129 +0,0 @@ -/****************************************************************************** - * @file support_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.9.0 - * @date 23 April 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _SUPPORT_FUNCTIONS_F16_H_ -#define _SUPPORT_FUNCTIONS_F16_H_ - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) - - /** - * @brief Copies the elements of a floating-point vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ -void arm_copy_f16(const float16_t * pSrc, float16_t * pDst, uint32_t blockSize); - - /** - * @brief Fills a constant value into a floating-point vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ -void arm_fill_f16(float16_t value, float16_t * pDst, uint32_t blockSize); - -/** - * @brief Converts the elements of the floating-point vector to Q31 vector. - * @param[in] pSrc points to the f16 input vector - * @param[out] pDst points to the q15 output vector - * @param[in] blockSize length of the input vector - */ -void arm_f16_to_q15(const float16_t * pSrc, q15_t * pDst, uint32_t blockSize); - -/** - * @brief Converts the elements of the floating-point vector to Q31 vector. - * @param[in] pSrc points to the q15 input vector - * @param[out] pDst points to the f16 output vector - * @param[in] blockSize length of the input vector - */ -void arm_q15_to_f16(const q15_t * pSrc, float16_t * pDst, uint32_t blockSize); - - -/** - * @brief Converts the elements of the floating-point vector to Q31 vector. - * @param[in] pSrc points to the f32 input vector - * @param[out] pDst points to the f16 output vector - * @param[in] blockSize length of the input vector - */ -void arm_float_to_f16(const float32_t * pSrc, float16_t * pDst, uint32_t blockSize); - -/** - * @brief Converts the elements of the floating-point vector to Q31 vector. - * @param[in] pSrc points to the f16 input vector - * @param[out] pDst points to the f32 output vector - * @param[in] blockSize length of the input vector - */ -void arm_f16_to_float(const float16_t * pSrc, float32_t * pDst, uint32_t blockSize); - -/** - * @brief Weighted sum - * - * - * @param[in] *in Array of input values. - * @param[in] *weigths Weights - * @param[in] blockSize Number of samples in the input array. - * @return Weighted sum - * - */ -float16_t arm_weighted_sum_f16(const float16_t *in - , const float16_t *weigths - , uint32_t blockSize); - -/** - * @brief Barycenter - * - * - * @param[in] in List of vectors - * @param[in] weights Weights of the vectors - * @param[out] out Barycenter - * @param[in] nbVectors Number of vectors - * @param[in] vecDim Dimension of space (vector dimension) - * @return None - * - */ -void arm_barycenter_f16(const float16_t *in - , const float16_t *weights - , float16_t *out - , uint32_t nbVectors - , uint32_t vecDim); - -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _SUPPORT_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/svm_defines.h b/Drivers/CMSIS/DSP/Include/dsp/svm_defines.h deleted file mode 100644 index 4859c7b..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/svm_defines.h +++ /dev/null @@ -1,46 +0,0 @@ -/****************************************************************************** - * @file svm_defines.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _SVM_DEFINES_H_ -#define _SVM_DEFINES_H_ - -/** - * @brief Struct for specifying SVM Kernel - */ -typedef enum -{ - ARM_ML_KERNEL_LINEAR = 0, - /**< Linear kernel */ - ARM_ML_KERNEL_POLYNOMIAL = 1, - /**< Polynomial kernel */ - ARM_ML_KERNEL_RBF = 2, - /**< Radial Basis Function kernel */ - ARM_ML_KERNEL_SIGMOID = 3 - /**< Sigmoid kernel */ -} arm_ml_kernel_type; - -#endif diff --git a/Drivers/CMSIS/DSP/Include/dsp/svm_functions.h b/Drivers/CMSIS/DSP/Include/dsp/svm_functions.h deleted file mode 100644 index d448ddc..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/svm_functions.h +++ /dev/null @@ -1,299 +0,0 @@ -/****************************************************************************** - * @file svm_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _SVM_FUNCTIONS_H_ -#define _SVM_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" -#include "dsp/svm_defines.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#define STEP(x) (x) <= 0 ? 0 : 1 - -/** - * @defgroup groupSVM SVM Functions - * This set of functions is implementing SVM classification on 2 classes. - * The training must be done from scikit-learn. The parameters can be easily - * generated from the scikit-learn object. Some examples are given in - * DSP/Testing/PatternGeneration/SVM.py - * - * If more than 2 classes are needed, the functions in this folder - * will have to be used, as building blocks, to do multi-class classification. - * - * No multi-class classification is provided in this SVM folder. - * - */ - -/** - * @brief Integer exponentiation - * @param[in] x value - * @param[in] nb integer exponent >= 1 - * @return x^nb - * - */ -__STATIC_INLINE float32_t arm_exponent_f32(float32_t x, int32_t nb) -{ - float32_t r = x; - nb --; - while(nb > 0) - { - r = r * x; - nb--; - } - return(r); -} - - - - - -/** - * @brief Instance structure for linear SVM prediction function. - */ -typedef struct -{ - uint32_t nbOfSupportVectors; /**< Number of support vectors */ - uint32_t vectorDimension; /**< Dimension of vector space */ - float32_t intercept; /**< Intercept */ - const float32_t *dualCoefficients; /**< Dual coefficients */ - const float32_t *supportVectors; /**< Support vectors */ - const int32_t *classes; /**< The two SVM classes */ -} arm_svm_linear_instance_f32; - - -/** - * @brief Instance structure for polynomial SVM prediction function. - */ -typedef struct -{ - uint32_t nbOfSupportVectors; /**< Number of support vectors */ - uint32_t vectorDimension; /**< Dimension of vector space */ - float32_t intercept; /**< Intercept */ - const float32_t *dualCoefficients; /**< Dual coefficients */ - const float32_t *supportVectors; /**< Support vectors */ - const int32_t *classes; /**< The two SVM classes */ - int32_t degree; /**< Polynomial degree */ - float32_t coef0; /**< Polynomial constant */ - float32_t gamma; /**< Gamma factor */ -} arm_svm_polynomial_instance_f32; - -/** - * @brief Instance structure for rbf SVM prediction function. - */ -typedef struct -{ - uint32_t nbOfSupportVectors; /**< Number of support vectors */ - uint32_t vectorDimension; /**< Dimension of vector space */ - float32_t intercept; /**< Intercept */ - const float32_t *dualCoefficients; /**< Dual coefficients */ - const float32_t *supportVectors; /**< Support vectors */ - const int32_t *classes; /**< The two SVM classes */ - float32_t gamma; /**< Gamma factor */ -} arm_svm_rbf_instance_f32; - -/** - * @brief Instance structure for sigmoid SVM prediction function. - */ -typedef struct -{ - uint32_t nbOfSupportVectors; /**< Number of support vectors */ - uint32_t vectorDimension; /**< Dimension of vector space */ - float32_t intercept; /**< Intercept */ - const float32_t *dualCoefficients; /**< Dual coefficients */ - const float32_t *supportVectors; /**< Support vectors */ - const int32_t *classes; /**< The two SVM classes */ - float32_t coef0; /**< Independent constant */ - float32_t gamma; /**< Gamma factor */ -} arm_svm_sigmoid_instance_f32; - -/** - * @brief SVM linear instance init function - * @param[in] S Parameters for SVM functions - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @return none. - * - */ - - -void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float32_t intercept, - const float32_t *dualCoefficients, - const float32_t *supportVectors, - const int32_t *classes); - -/** - * @brief SVM linear prediction - * @param[in] S Pointer to an instance of the linear SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ - -void arm_svm_linear_predict_f32(const arm_svm_linear_instance_f32 *S, - const float32_t * in, - int32_t * pResult); - - -/** - * @brief SVM polynomial instance init function - * @param[in] S points to an instance of the polynomial SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] degree Polynomial degree - * @param[in] coef0 coeff0 (scikit-learn terminology) - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - - -void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float32_t intercept, - const float32_t *dualCoefficients, - const float32_t *supportVectors, - const int32_t *classes, - int32_t degree, - float32_t coef0, - float32_t gamma - ); - -/** - * @brief SVM polynomial prediction - * @param[in] S Pointer to an instance of the polynomial SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ -void arm_svm_polynomial_predict_f32(const arm_svm_polynomial_instance_f32 *S, - const float32_t * in, - int32_t * pResult); - - -/** - * @brief SVM radial basis function instance init function - * @param[in] S points to an instance of the polynomial SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - -void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float32_t intercept, - const float32_t *dualCoefficients, - const float32_t *supportVectors, - const int32_t *classes, - float32_t gamma - ); - -/** - * @brief SVM rbf prediction - * @param[in] S Pointer to an instance of the rbf SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult decision value - * @return none. - * - */ -void arm_svm_rbf_predict_f32(const arm_svm_rbf_instance_f32 *S, - const float32_t * in, - int32_t * pResult); - -/** - * @brief SVM sigmoid instance init function - * @param[in] S points to an instance of the rbf SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] coef0 coeff0 (scikit-learn terminology) - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - -void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float32_t intercept, - const float32_t *dualCoefficients, - const float32_t *supportVectors, - const int32_t *classes, - float32_t coef0, - float32_t gamma - ); - -/** - * @brief SVM sigmoid prediction - * @param[in] S Pointer to an instance of the rbf SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ -void arm_svm_sigmoid_predict_f32(const arm_svm_sigmoid_instance_f32 *S, - const float32_t * in, - int32_t * pResult); - - - - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _SVM_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/svm_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/svm_functions_f16.h deleted file mode 100644 index 766e657..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/svm_functions_f16.h +++ /dev/null @@ -1,298 +0,0 @@ -/****************************************************************************** - * @file svm_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.9.0 - * @date 23 April 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _SVM_FUNCTIONS_F16_H_ -#define _SVM_FUNCTIONS_F16_H_ - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" -#include "dsp/svm_defines.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(ARM_FLOAT16_SUPPORTED) - -#define STEP(x) (x) <= 0 ? 0 : 1 - -/** - * @defgroup groupSVM SVM Functions - * This set of functions is implementing SVM classification on 2 classes. - * The training must be done from scikit-learn. The parameters can be easily - * generated from the scikit-learn object. Some examples are given in - * DSP/Testing/PatternGeneration/SVM.py - * - * If more than 2 classes are needed, the functions in this folder - * will have to be used, as building blocks, to do multi-class classification. - * - * No multi-class classification is provided in this SVM folder. - * - */ - -/** - * @brief Integer exponentiation - * @param[in] x value - * @param[in] nb integer exponent >= 1 - * @return x^nb - * - */ -__STATIC_INLINE float16_t arm_exponent_f16(float16_t x, int32_t nb) -{ - float16_t r = x; - nb --; - while(nb > 0) - { - r = r * x; - nb--; - } - return(r); -} - - -/** - * @brief Instance structure for linear SVM prediction function. - */ -typedef struct -{ - uint32_t nbOfSupportVectors; /**< Number of support vectors */ - uint32_t vectorDimension; /**< Dimension of vector space */ - float16_t intercept; /**< Intercept */ - const float16_t *dualCoefficients; /**< Dual coefficients */ - const float16_t *supportVectors; /**< Support vectors */ - const int32_t *classes; /**< The two SVM classes */ -} arm_svm_linear_instance_f16; - - -/** - * @brief Instance structure for polynomial SVM prediction function. - */ -typedef struct -{ - uint32_t nbOfSupportVectors; /**< Number of support vectors */ - uint32_t vectorDimension; /**< Dimension of vector space */ - float16_t intercept; /**< Intercept */ - const float16_t *dualCoefficients; /**< Dual coefficients */ - const float16_t *supportVectors; /**< Support vectors */ - const int32_t *classes; /**< The two SVM classes */ - int32_t degree; /**< Polynomial degree */ - float16_t coef0; /**< Polynomial constant */ - float16_t gamma; /**< Gamma factor */ -} arm_svm_polynomial_instance_f16; - -/** - * @brief Instance structure for rbf SVM prediction function. - */ -typedef struct -{ - uint32_t nbOfSupportVectors; /**< Number of support vectors */ - uint32_t vectorDimension; /**< Dimension of vector space */ - float16_t intercept; /**< Intercept */ - const float16_t *dualCoefficients; /**< Dual coefficients */ - const float16_t *supportVectors; /**< Support vectors */ - const int32_t *classes; /**< The two SVM classes */ - float16_t gamma; /**< Gamma factor */ -} arm_svm_rbf_instance_f16; - -/** - * @brief Instance structure for sigmoid SVM prediction function. - */ -typedef struct -{ - uint32_t nbOfSupportVectors; /**< Number of support vectors */ - uint32_t vectorDimension; /**< Dimension of vector space */ - float16_t intercept; /**< Intercept */ - const float16_t *dualCoefficients; /**< Dual coefficients */ - const float16_t *supportVectors; /**< Support vectors */ - const int32_t *classes; /**< The two SVM classes */ - float16_t coef0; /**< Independent constant */ - float16_t gamma; /**< Gamma factor */ -} arm_svm_sigmoid_instance_f16; - -/** - * @brief SVM linear instance init function - * @param[in] S Parameters for SVM functions - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @return none. - * - */ - - -void arm_svm_linear_init_f16(arm_svm_linear_instance_f16 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float16_t intercept, - const float16_t *dualCoefficients, - const float16_t *supportVectors, - const int32_t *classes); - -/** - * @brief SVM linear prediction - * @param[in] S Pointer to an instance of the linear SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ - -void arm_svm_linear_predict_f16(const arm_svm_linear_instance_f16 *S, - const float16_t * in, - int32_t * pResult); - - -/** - * @brief SVM polynomial instance init function - * @param[in] S points to an instance of the polynomial SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] degree Polynomial degree - * @param[in] coef0 coeff0 (scikit-learn terminology) - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - - -void arm_svm_polynomial_init_f16(arm_svm_polynomial_instance_f16 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float16_t intercept, - const float16_t *dualCoefficients, - const float16_t *supportVectors, - const int32_t *classes, - int32_t degree, - float16_t coef0, - float16_t gamma - ); - -/** - * @brief SVM polynomial prediction - * @param[in] S Pointer to an instance of the polynomial SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ -void arm_svm_polynomial_predict_f16(const arm_svm_polynomial_instance_f16 *S, - const float16_t * in, - int32_t * pResult); - - -/** - * @brief SVM radial basis function instance init function - * @param[in] S points to an instance of the polynomial SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - -void arm_svm_rbf_init_f16(arm_svm_rbf_instance_f16 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float16_t intercept, - const float16_t *dualCoefficients, - const float16_t *supportVectors, - const int32_t *classes, - float16_t gamma - ); - -/** - * @brief SVM rbf prediction - * @param[in] S Pointer to an instance of the rbf SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult decision value - * @return none. - * - */ -void arm_svm_rbf_predict_f16(const arm_svm_rbf_instance_f16 *S, - const float16_t * in, - int32_t * pResult); - -/** - * @brief SVM sigmoid instance init function - * @param[in] S points to an instance of the rbf SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] coef0 coeff0 (scikit-learn terminology) - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - -void arm_svm_sigmoid_init_f16(arm_svm_sigmoid_instance_f16 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float16_t intercept, - const float16_t *dualCoefficients, - const float16_t *supportVectors, - const int32_t *classes, - float16_t coef0, - float16_t gamma - ); - -/** - * @brief SVM sigmoid prediction - * @param[in] S Pointer to an instance of the rbf SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ -void arm_svm_sigmoid_predict_f16(const arm_svm_sigmoid_instance_f16 *S, - const float16_t * in, - int32_t * pResult); - - - -#endif /*defined(ARM_FLOAT16_SUPPORTED)*/ -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _SVM_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/transform_functions.h b/Drivers/CMSIS/DSP/Include/dsp/transform_functions.h deleted file mode 100644 index 3f01388..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/transform_functions.h +++ /dev/null @@ -1,735 +0,0 @@ -/****************************************************************************** - * @file transform_functions.h - * @brief Public header file for CMSIS DSP Library - * @version V1.10.0 - * @date 08 July 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _TRANSFORM_FUNCTIONS_H_ -#define _TRANSFORM_FUNCTIONS_H_ - -#include "arm_math_types.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#include "dsp/basic_math_functions.h" -#include "dsp/complex_math_functions.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/** - * @defgroup groupTransforms Transform Functions - */ - - - /** - * @brief Instance structure for the Q15 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - const q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix2_instance_q15; - -/* Deprecated */ - arm_status arm_cfft_radix2_init_q15( - arm_cfft_radix2_instance_q15 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix2_q15( - const arm_cfft_radix2_instance_q15 * S, - q15_t * pSrc); - - - /** - * @brief Instance structure for the Q15 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - const q15_t *pTwiddle; /**< points to the twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix4_instance_q15; - -/* Deprecated */ - arm_status arm_cfft_radix4_init_q15( - arm_cfft_radix4_instance_q15 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix4_q15( - const arm_cfft_radix4_instance_q15 * S, - q15_t * pSrc); - - /** - * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - const q31_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix2_instance_q31; - -/* Deprecated */ - arm_status arm_cfft_radix2_init_q31( - arm_cfft_radix2_instance_q31 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix2_q31( - const arm_cfft_radix2_instance_q31 * S, - q31_t * pSrc); - - /** - * @brief Instance structure for the Q31 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - const q31_t *pTwiddle; /**< points to the twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix4_instance_q31; - -/* Deprecated */ - void arm_cfft_radix4_q31( - const arm_cfft_radix4_instance_q31 * S, - q31_t * pSrc); - -/* Deprecated */ - arm_status arm_cfft_radix4_init_q31( - arm_cfft_radix4_instance_q31 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - float32_t onebyfftLen; /**< value of 1/fftLen. */ - } arm_cfft_radix2_instance_f32; - - -/* Deprecated */ - arm_status arm_cfft_radix2_init_f32( - arm_cfft_radix2_instance_f32 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix2_f32( - const arm_cfft_radix2_instance_f32 * S, - float32_t * pSrc); - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - float32_t onebyfftLen; /**< value of 1/fftLen. */ - } arm_cfft_radix4_instance_f32; - - - -/* Deprecated */ - arm_status arm_cfft_radix4_init_f32( - arm_cfft_radix4_instance_f32 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix4_f32( - const arm_cfft_radix4_instance_f32 * S, - float32_t * pSrc); - - /** - * @brief Instance structure for the fixed-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const q15_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle pointer (offset 1) */ \ - const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle pointer (offset 2) */ \ - const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle pointer (offset 3) */ \ - const q15_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ \ - const q15_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ \ - const q15_t *rearranged_twiddle_stride3; -#endif - } arm_cfft_instance_q15; - -arm_status arm_cfft_init_q15( - arm_cfft_instance_q15 * S, - uint16_t fftLen); - -void arm_cfft_q15( - const arm_cfft_instance_q15 * S, - q15_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the fixed-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const q31_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle pointer (offset 1) */ \ - const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle pointer (offset 2) */ \ - const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle pointer (offset 3) */ \ - const q31_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ \ - const q31_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ \ - const q31_t *rearranged_twiddle_stride3; -#endif - } arm_cfft_instance_q31; - -arm_status arm_cfft_init_q31( - arm_cfft_instance_q31 * S, - uint16_t fftLen); - -void arm_cfft_q31( - const arm_cfft_instance_q31 * S, - q31_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle pointer (offset 1) */ \ - const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle pointer (offset 2) */ \ - const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle pointer (offset 3) */ \ - const float32_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ \ - const float32_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ \ - const float32_t *rearranged_twiddle_stride3; -#endif - } arm_cfft_instance_f32; - - - - arm_status arm_cfft_init_f32( - arm_cfft_instance_f32 * S, - uint16_t fftLen); - - void arm_cfft_f32( - const arm_cfft_instance_f32 * S, - float32_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - - /** - * @brief Instance structure for the Double Precision Floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const float64_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ - } arm_cfft_instance_f64; - - arm_status arm_cfft_init_f64( - arm_cfft_instance_f64 * S, - uint16_t fftLen); - - void arm_cfft_f64( - const arm_cfft_instance_f64 * S, - float64_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the Q15 RFFT/RIFFT function. - */ - typedef struct - { - uint32_t fftLenReal; /**< length of the real FFT. */ - uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ - uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ - uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - const q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ - const q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - arm_cfft_instance_q15 cfftInst; -#else - const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */ -#endif - } arm_rfft_instance_q15; - - arm_status arm_rfft_init_q15( - arm_rfft_instance_q15 * S, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag); - - void arm_rfft_q15( - const arm_rfft_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst); - - /** - * @brief Instance structure for the Q31 RFFT/RIFFT function. - */ - typedef struct - { - uint32_t fftLenReal; /**< length of the real FFT. */ - uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ - uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ - uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - const q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ - const q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - arm_cfft_instance_q31 cfftInst; -#else - const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */ -#endif - } arm_rfft_instance_q31; - - arm_status arm_rfft_init_q31( - arm_rfft_instance_q31 * S, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag); - - void arm_rfft_q31( - const arm_rfft_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst); - - /** - * @brief Instance structure for the floating-point RFFT/RIFFT function. - */ - typedef struct - { - uint32_t fftLenReal; /**< length of the real FFT. */ - uint16_t fftLenBy2; /**< length of the complex FFT. */ - uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ - uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ - uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - const float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ - const float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ - arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ - } arm_rfft_instance_f32; - - arm_status arm_rfft_init_f32( - arm_rfft_instance_f32 * S, - arm_cfft_radix4_instance_f32 * S_CFFT, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag); - - void arm_rfft_f32( - const arm_rfft_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst); - - /** - * @brief Instance structure for the Double Precision Floating-point RFFT/RIFFT function. - */ -typedef struct - { - arm_cfft_instance_f64 Sint; /**< Internal CFFT structure. */ - uint16_t fftLenRFFT; /**< length of the real sequence */ - const float64_t * pTwiddleRFFT; /**< Twiddle factors real stage */ - } arm_rfft_fast_instance_f64 ; - -arm_status arm_rfft_fast_init_f64 ( - arm_rfft_fast_instance_f64 * S, - uint16_t fftLen); - - -void arm_rfft_fast_f64( - arm_rfft_fast_instance_f64 * S, - float64_t * p, float64_t * pOut, - uint8_t ifftFlag); - - - /** - * @brief Instance structure for the floating-point RFFT/RIFFT function. - */ -typedef struct - { - arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */ - uint16_t fftLenRFFT; /**< length of the real sequence */ - const float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */ - } arm_rfft_fast_instance_f32 ; - -arm_status arm_rfft_fast_init_f32 ( - arm_rfft_fast_instance_f32 * S, - uint16_t fftLen); - - - void arm_rfft_fast_f32( - const arm_rfft_fast_instance_f32 * S, - float32_t * p, float32_t * pOut, - uint8_t ifftFlag); - - /** - * @brief Instance structure for the floating-point DCT4/IDCT4 function. - */ - typedef struct - { - uint16_t N; /**< length of the DCT4. */ - uint16_t Nby2; /**< half of the length of the DCT4. */ - float32_t normalize; /**< normalizing factor. */ - const float32_t *pTwiddle; /**< points to the twiddle factor table. */ - const float32_t *pCosFactor; /**< points to the cosFactor table. */ - arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */ - arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ - } arm_dct4_instance_f32; - - - /** - * @brief Initialization function for the floating-point DCT4/IDCT4. - * @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure. - * @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure. - * @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure. - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length. - */ - arm_status arm_dct4_init_f32( - arm_dct4_instance_f32 * S, - arm_rfft_instance_f32 * S_RFFT, - arm_cfft_radix4_instance_f32 * S_CFFT, - uint16_t N, - uint16_t Nby2, - float32_t normalize); - - - /** - * @brief Processing function for the floating-point DCT4/IDCT4. - * @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure. - * @param[in] pState points to state buffer. - * @param[in,out] pInlineBuffer points to the in-place input and output buffer. - */ - void arm_dct4_f32( - const arm_dct4_instance_f32 * S, - float32_t * pState, - float32_t * pInlineBuffer); - - - /** - * @brief Instance structure for the Q31 DCT4/IDCT4 function. - */ - typedef struct - { - uint16_t N; /**< length of the DCT4. */ - uint16_t Nby2; /**< half of the length of the DCT4. */ - q31_t normalize; /**< normalizing factor. */ - const q31_t *pTwiddle; /**< points to the twiddle factor table. */ - const q31_t *pCosFactor; /**< points to the cosFactor table. */ - arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */ - arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */ - } arm_dct4_instance_q31; - - - /** - * @brief Initialization function for the Q31 DCT4/IDCT4. - * @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure. - * @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure - * @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length. - */ - arm_status arm_dct4_init_q31( - arm_dct4_instance_q31 * S, - arm_rfft_instance_q31 * S_RFFT, - arm_cfft_radix4_instance_q31 * S_CFFT, - uint16_t N, - uint16_t Nby2, - q31_t normalize); - - - /** - * @brief Processing function for the Q31 DCT4/IDCT4. - * @param[in] S points to an instance of the Q31 DCT4 structure. - * @param[in] pState points to state buffer. - * @param[in,out] pInlineBuffer points to the in-place input and output buffer. - */ - void arm_dct4_q31( - const arm_dct4_instance_q31 * S, - q31_t * pState, - q31_t * pInlineBuffer); - - - /** - * @brief Instance structure for the Q15 DCT4/IDCT4 function. - */ - typedef struct - { - uint16_t N; /**< length of the DCT4. */ - uint16_t Nby2; /**< half of the length of the DCT4. */ - q15_t normalize; /**< normalizing factor. */ - const q15_t *pTwiddle; /**< points to the twiddle factor table. */ - const q15_t *pCosFactor; /**< points to the cosFactor table. */ - arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */ - arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */ - } arm_dct4_instance_q15; - - - /** - * @brief Initialization function for the Q15 DCT4/IDCT4. - * @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure. - * @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure. - * @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure. - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length. - */ - arm_status arm_dct4_init_q15( - arm_dct4_instance_q15 * S, - arm_rfft_instance_q15 * S_RFFT, - arm_cfft_radix4_instance_q15 * S_CFFT, - uint16_t N, - uint16_t Nby2, - q15_t normalize); - - - /** - * @brief Processing function for the Q15 DCT4/IDCT4. - * @param[in] S points to an instance of the Q15 DCT4 structure. - * @param[in] pState points to state buffer. - * @param[in,out] pInlineBuffer points to the in-place input and output buffer. - */ - void arm_dct4_q15( - const arm_dct4_instance_q15 * S, - q15_t * pState, - q15_t * pInlineBuffer); - - /** - * @brief Instance structure for the Floating-point MFCC function. - */ -typedef struct - { - const float32_t *dctCoefs; /**< Internal DCT coefficients */ - const float32_t *filterCoefs; /**< Internal Mel filter coefficients */ - const float32_t *windowCoefs; /**< Windowing coefficients */ - const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */ - const uint32_t *filterLengths; /**< Internal Mel filter lengths */ - uint32_t fftLen; /**< FFT length */ - uint32_t nbMelFilters; /**< Number of Mel filters */ - uint32_t nbDctOutputs; /**< Number of DCT outputs */ -#if defined(ARM_MFCC_CFFT_BASED) - /* Implementation of the MFCC is using a CFFT */ - arm_cfft_instance_f32 cfft; /**< Internal CFFT instance */ -#else - /* Implementation of the MFCC is using a RFFT (default) */ - arm_rfft_fast_instance_f32 rfft; -#endif - } arm_mfcc_instance_f32 ; - -arm_status arm_mfcc_init_f32( - arm_mfcc_instance_f32 * S, - uint32_t fftLen, - uint32_t nbMelFilters, - uint32_t nbDctOutputs, - const float32_t *dctCoefs, - const uint32_t *filterPos, - const uint32_t *filterLengths, - const float32_t *filterCoefs, - const float32_t *windowCoefs - ); - - -/** - @brief MFCC F32 - @param[in] S points to the mfcc instance structure - @param[in] pSrc points to the input samples - @param[out] pDst points to the output MFCC values - @param[inout] pTmp points to a temporary buffer of complex - @return none - */ - void arm_mfcc_f32( - const arm_mfcc_instance_f32 * S, - float32_t *pSrc, - float32_t *pDst, - float32_t *pTmp - ); - -typedef struct - { - const q31_t *dctCoefs; /**< Internal DCT coefficients */ - const q31_t *filterCoefs; /**< Internal Mel filter coefficients */ - const q31_t *windowCoefs; /**< Windowing coefficients */ - const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */ - const uint32_t *filterLengths; /**< Internal Mel filter lengths */ - uint32_t fftLen; /**< FFT length */ - uint32_t nbMelFilters; /**< Number of Mel filters */ - uint32_t nbDctOutputs; /**< Number of DCT outputs */ -#if defined(ARM_MFCC_CFFT_BASED) - /* Implementation of the MFCC is using a CFFT */ - arm_cfft_instance_q31 cfft; /**< Internal CFFT instance */ -#else - /* Implementation of the MFCC is using a RFFT (default) */ - arm_rfft_instance_q31 rfft; -#endif - } arm_mfcc_instance_q31 ; - -arm_status arm_mfcc_init_q31( - arm_mfcc_instance_q31 * S, - uint32_t fftLen, - uint32_t nbMelFilters, - uint32_t nbDctOutputs, - const q31_t *dctCoefs, - const uint32_t *filterPos, - const uint32_t *filterLengths, - const q31_t *filterCoefs, - const q31_t *windowCoefs - ); - - -/** - @brief MFCC Q31 - @param[in] S points to the mfcc instance structure - @param[in] pSrc points to the input samples - @param[out] pDst points to the output MFCC values - @param[inout] pTmp points to a temporary buffer of complex - @return none - */ - arm_status arm_mfcc_q31( - const arm_mfcc_instance_q31 * S, - q31_t *pSrc, - q31_t *pDst, - q31_t *pTmp - ); - -typedef struct - { - const q15_t *dctCoefs; /**< Internal DCT coefficients */ - const q15_t *filterCoefs; /**< Internal Mel filter coefficients */ - const q15_t *windowCoefs; /**< Windowing coefficients */ - const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */ - const uint32_t *filterLengths; /**< Internal Mel filter lengths */ - uint32_t fftLen; /**< FFT length */ - uint32_t nbMelFilters; /**< Number of Mel filters */ - uint32_t nbDctOutputs; /**< Number of DCT outputs */ -#if defined(ARM_MFCC_CFFT_BASED) - /* Implementation of the MFCC is using a CFFT */ - arm_cfft_instance_q15 cfft; /**< Internal CFFT instance */ -#else - /* Implementation of the MFCC is using a RFFT (default) */ - arm_rfft_instance_q15 rfft; -#endif - } arm_mfcc_instance_q15 ; - -arm_status arm_mfcc_init_q15( - arm_mfcc_instance_q15 * S, - uint32_t fftLen, - uint32_t nbMelFilters, - uint32_t nbDctOutputs, - const q15_t *dctCoefs, - const uint32_t *filterPos, - const uint32_t *filterLengths, - const q15_t *filterCoefs, - const q15_t *windowCoefs - ); - - -/** - @brief MFCC Q15 - @param[in] S points to the mfcc instance structure - @param[in] pSrc points to the input samples - @param[out] pDst points to the output MFCC values in q8.7 format - @param[inout] pTmp points to a temporary buffer of complex - @return error status - */ - arm_status arm_mfcc_q15( - const arm_mfcc_instance_q15 * S, - q15_t *pSrc, - q15_t *pDst, - q31_t *pTmp - ); - - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _TRANSFORM_FUNCTIONS_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/transform_functions_f16.h b/Drivers/CMSIS/DSP/Include/dsp/transform_functions_f16.h deleted file mode 100644 index 2f77ef0..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/transform_functions_f16.h +++ /dev/null @@ -1,157 +0,0 @@ -/****************************************************************************** - * @file transform_functions_f16.h - * @brief Public header file for CMSIS DSP Library - * @version V1.9.0 - * @date 23 April 2021 - * Target Processor: Cortex-M and Cortex-A cores - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef _TRANSFORM_FUNCTIONS_F16_H_ -#define _TRANSFORM_FUNCTIONS_F16_H_ - -#include "arm_math_types_f16.h" -#include "arm_math_memory.h" - -#include "dsp/none.h" -#include "dsp/utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - - -#if defined(ARM_FLOAT16_SUPPORTED) - - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - const float16_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - float16_t onebyfftLen; /**< value of 1/fftLen. */ - } arm_cfft_radix2_instance_f16; - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - const float16_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - float16_t onebyfftLen; /**< value of 1/fftLen. */ - } arm_cfft_radix4_instance_f16; - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const float16_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle pointer (offset 1) */ \ - const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle pointer (offset 2) */ \ - const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle pointer (offset 3) */ \ - const float16_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ \ - const float16_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ \ - const float16_t *rearranged_twiddle_stride3; -#endif - } arm_cfft_instance_f16; - - - arm_status arm_cfft_init_f16( - arm_cfft_instance_f16 * S, - uint16_t fftLen); - - void arm_cfft_f16( - const arm_cfft_instance_f16 * S, - float16_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the floating-point RFFT/RIFFT function. - */ -typedef struct - { - arm_cfft_instance_f16 Sint; /**< Internal CFFT structure. */ - uint16_t fftLenRFFT; /**< length of the real sequence */ - const float16_t * pTwiddleRFFT; /**< Twiddle factors real stage */ - } arm_rfft_fast_instance_f16 ; - -arm_status arm_rfft_fast_init_f16 ( - arm_rfft_fast_instance_f16 * S, - uint16_t fftLen); - - - void arm_rfft_fast_f16( - const arm_rfft_fast_instance_f16 * S, - float16_t * p, float16_t * pOut, - uint8_t ifftFlag); - -/* Deprecated */ - arm_status arm_cfft_radix4_init_f16( - arm_cfft_radix4_instance_f16 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix4_f16( - const arm_cfft_radix4_instance_f16 * S, - float16_t * pSrc); - - -/* Deprecated */ - arm_status arm_cfft_radix2_init_f16( - arm_cfft_radix2_instance_f16 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix2_f16( - const arm_cfft_radix2_instance_f16 * S, - float16_t * pSrc); - -#endif /* defined(ARM_FLOAT16_SUPPORTED)*/ - -#ifdef __cplusplus -} -#endif - -#endif /* ifndef _TRANSFORM_FUNCTIONS_F16_H_ */ diff --git a/Drivers/CMSIS/DSP/Include/dsp/utils.h b/Drivers/CMSIS/DSP/Include/dsp/utils.h deleted file mode 100644 index 48262bf..0000000 --- a/Drivers/CMSIS/DSP/Include/dsp/utils.h +++ /dev/null @@ -1,240 +0,0 @@ -/****************************************************************************** - * @file arm_math_utils.h - * @brief Public header file for CMSIS DSP Library - * @version V1.9.0 - * @date 20. July 2020 - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_MATH_UTILS_H_ - -#define _ARM_MATH_UTILS_H_ - -#include "arm_math_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - /** - * @brief Macros required for reciprocal calculation in Normalized LMS - */ - -#define INDEX_MASK 0x0000003F - - -#define SQ(x) ((x) * (x)) - -#define ROUND_UP(N, S) ((((N) + (S) - 1) / (S)) * (S)) - - - /** - * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type. - */ - __STATIC_FORCEINLINE uint32_t arm_recip_q31( - q31_t in, - q31_t * dst, - const q31_t * pRecipTable) - { - q31_t out; - uint32_t tempVal; - uint32_t index, i; - uint32_t signBits; - - if (in > 0) - { - signBits = ((uint32_t) (__CLZ( in) - 1)); - } - else - { - signBits = ((uint32_t) (__CLZ(-in) - 1)); - } - - /* Convert input sample to 1.31 format */ - in = (in << signBits); - - /* calculation of index for initial approximated Val */ - index = (uint32_t)(in >> 24); - index = (index & INDEX_MASK); - - /* 1.31 with exp 1 */ - out = pRecipTable[index]; - - /* calculation of reciprocal value */ - /* running approximation for two iterations */ - for (i = 0U; i < 2U; i++) - { - tempVal = (uint32_t) (((q63_t) in * out) >> 31); - tempVal = 0x7FFFFFFFu - tempVal; - /* 1.31 with exp 1 */ - /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */ - out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30); - } - - /* write output */ - *dst = out; - - /* return num of signbits of out = 1/in value */ - return (signBits + 1U); - } - - - /** - * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type. - */ - __STATIC_FORCEINLINE uint32_t arm_recip_q15( - q15_t in, - q15_t * dst, - const q15_t * pRecipTable) - { - q15_t out = 0; - uint32_t tempVal = 0; - uint32_t index = 0, i = 0; - uint32_t signBits = 0; - - if (in > 0) - { - signBits = ((uint32_t)(__CLZ( in) - 17)); - } - else - { - signBits = ((uint32_t)(__CLZ(-in) - 17)); - } - - /* Convert input sample to 1.15 format */ - in = (in << signBits); - - /* calculation of index for initial approximated Val */ - index = (uint32_t)(in >> 8); - index = (index & INDEX_MASK); - - /* 1.15 with exp 1 */ - out = pRecipTable[index]; - - /* calculation of reciprocal value */ - /* running approximation for two iterations */ - for (i = 0U; i < 2U; i++) - { - tempVal = (uint32_t) (((q31_t) in * out) >> 15); - tempVal = 0x7FFFu - tempVal; - /* 1.15 with exp 1 */ - out = (q15_t) (((q31_t) out * tempVal) >> 14); - /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */ - } - - /* write output */ - *dst = out; - - /* return num of signbits of out = 1/in value */ - return (signBits + 1); - } - - -/** - * @brief 64-bit to 32-bit unsigned normalization - * @param[in] in is input unsigned long long value - * @param[out] normalized is the 32-bit normalized value - * @param[out] norm is norm scale - */ -__STATIC_INLINE void arm_norm_64_to_32u(uint64_t in, int32_t * normalized, int32_t *norm) -{ - int32_t n1; - int32_t hi = (int32_t) (in >> 32); - int32_t lo = (int32_t) ((in << 32) >> 32); - - n1 = __CLZ(hi) - 32; - if (!n1) - { - /* - * input fits in 32-bit - */ - n1 = __CLZ(lo); - if (!n1) - { - /* - * MSB set, need to scale down by 1 - */ - *norm = -1; - *normalized = (((uint32_t) lo) >> 1); - } else - { - if (n1 == 32) - { - /* - * input is zero - */ - *norm = 0; - *normalized = 0; - } else - { - /* - * 32-bit normalization - */ - *norm = n1 - 1; - *normalized = lo << *norm; - } - } - } else - { - /* - * input fits in 64-bit - */ - n1 = 1 - n1; - *norm = -n1; - /* - * 64 bit normalization - */ - *normalized = (((uint32_t) lo) >> n1) | (hi << (32 - n1)); - } -} - -__STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) -{ - q31_t result; - uint64_t absNum; - int32_t normalized; - int32_t norm; - - /* - * if sum fits in 32bits - * avoid costly 64-bit division - */ - absNum = num > 0 ? num : -num; - arm_norm_64_to_32u(absNum, &normalized, &norm); - if (norm > 0) - /* - * 32-bit division - */ - result = (q31_t) num / den; - else - /* - * 64-bit division - */ - result = (q31_t) (num / den); - - return result; -} - - -#ifdef __cplusplus -} -#endif - -#endif /*ifndef _ARM_MATH_UTILS_H_ */ diff --git a/Drivers/CMSIS/DSP/PrivateInclude/arm_sorting.h b/Drivers/CMSIS/DSP/PrivateInclude/arm_sorting.h deleted file mode 100644 index d295888..0000000 --- a/Drivers/CMSIS/DSP/PrivateInclude/arm_sorting.h +++ /dev/null @@ -1,200 +0,0 @@ -/****************************************************************************** - * @file arm_sorting.h - * @brief Private header file for CMSIS DSP Library - * @version V1.7.0 - * @date 2019 - ******************************************************************************/ -/* - * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_SORTING_H_ -#define _ARM_SORTING_H_ - -#include "arm_math.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - /** - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_bubble_sort_f32( - const arm_sort_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - /** - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_heap_sort_f32( - const arm_sort_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - /** - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_insertion_sort_f32( - const arm_sort_instance_f32 * S, - float32_t *pSrc, - float32_t* pDst, - uint32_t blockSize); - - /** - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_quick_sort_f32( - const arm_sort_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - /** - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_selection_sort_f32( - const arm_sort_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - /** - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_bitonic_sort_f32( - const arm_sort_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - -#if defined(ARM_MATH_NEON) - -#define vtrn256_128q(a, b) \ -do { \ - float32x4_t vtrn128_temp = a.val[1]; \ - a.val[1] = b.val[0]; \ - b.val[0] = vtrn128_temp ; \ -} while (0) - -#define vtrn128_64q(a, b) \ -do { \ - float32x2_t ab, cd, ef, gh; \ - ab = vget_low_f32(a); \ - ef = vget_low_f32(b); \ - cd = vget_high_f32(a); \ - gh = vget_high_f32(b); \ - a = vcombine_f32(ab, ef); \ - b = vcombine_f32(cd, gh); \ -} while (0) - -#define vtrn256_64q(a, b) \ -do { \ - float32x2_t a_0, a_1, a_2, a_3; \ - float32x2_t b_0, b_1, b_2, b_3; \ - a_0 = vget_low_f32(a.val[0]); \ - a_1 = vget_high_f32(a.val[0]); \ - a_2 = vget_low_f32(a.val[1]); \ - a_3 = vget_high_f32(a.val[1]); \ - b_0 = vget_low_f32(b.val[0]); \ - b_1 = vget_high_f32(b.val[0]); \ - b_2 = vget_low_f32(b.val[1]); \ - b_3 = vget_high_f32(b.val[1]); \ - a.val[0] = vcombine_f32(a_0, b_0); \ - a.val[1] = vcombine_f32(a_2, b_2); \ - b.val[0] = vcombine_f32(a_1, b_1); \ - b.val[1] = vcombine_f32(a_3, b_3); \ -} while (0) - -#define vtrn128_32q(a, b) \ -do { \ - float32x4x2_t vtrn32_tmp = vtrnq_f32((a), (b)); \ - (a) = vtrn32_tmp.val[0]; \ - (b) = vtrn32_tmp.val[1]; \ -} while (0) - -#define vtrn256_32q(a, b) \ -do { \ - float32x4x2_t vtrn32_tmp_1 = vtrnq_f32((a.val[0]), (b.val[0])); \ - float32x4x2_t vtrn32_tmp_2 = vtrnq_f32((a.val[1]), (b.val[1])); \ - a.val[0] = vtrn32_tmp_1.val[0]; \ - a.val[1] = vtrn32_tmp_2.val[0]; \ - b.val[0] = vtrn32_tmp_1.val[1]; \ - b.val[1] = vtrn32_tmp_2.val[1]; \ -} while (0) - -#define vminmaxq(a, b) \ - do { \ - float32x4_t minmax_tmp = (a); \ - (a) = vminq_f32((a), (b)); \ - (b) = vmaxq_f32(minmax_tmp, (b)); \ -} while (0) - -#define vminmax256q(a, b) \ - do { \ - float32x4x2_t minmax256_tmp = (a); \ - a.val[0] = vminq_f32(a.val[0], b.val[0]); \ - a.val[1] = vminq_f32(a.val[1], b.val[1]); \ - b.val[0] = vmaxq_f32(minmax256_tmp.val[0], b.val[0]); \ - b.val[1] = vmaxq_f32(minmax256_tmp.val[1], b.val[1]); \ -} while (0) - -#define vrev128q_f32(a) \ - vcombine_f32(vrev64_f32(vget_high_f32(a)), vrev64_f32(vget_low_f32(a))) - -#define vrev256q_f32(a) \ - do { \ - float32x4_t rev_tmp = vcombine_f32(vrev64_f32(vget_high_f32(a.val[0])), vrev64_f32(vget_low_f32(a.val[0]))); \ - a.val[0] = vcombine_f32(vrev64_f32(vget_high_f32(a.val[1])), vrev64_f32(vget_low_f32(a.val[1]))); \ - a.val[1] = rev_tmp; \ -} while (0) - -#define vldrev128q_f32(a, p) \ - do { \ - a = vld1q_f32(p); \ - a = vrev128q_f32(a); \ -} while (0) - -#endif /* ARM_MATH_NEON */ - -#ifdef __cplusplus -} -#endif - -#endif /* _ARM_SORTING_H */ diff --git a/Drivers/CMSIS/DSP/PrivateInclude/arm_vec_fft.h b/Drivers/CMSIS/DSP/PrivateInclude/arm_vec_fft.h deleted file mode 100644 index a940bde..0000000 --- a/Drivers/CMSIS/DSP/PrivateInclude/arm_vec_fft.h +++ /dev/null @@ -1,325 +0,0 @@ -/****************************************************************************** - * @file arm_vec_fft.h - * @brief Private header file for CMSIS DSP Library - * @version V1.7.0 - * @date 07. January 2020 - ******************************************************************************/ -/* - * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_VEC_FFT_H_ -#define _ARM_VEC_FFT_H_ - -#include "arm_math.h" -#include "arm_helium_utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define MVE_CMPLX_ADD_A_ixB(A, B) vcaddq_rot90(A,B) -#define MVE_CMPLX_SUB_A_ixB(A,B) vcaddq_rot270(A,B) -#define MVE_CMPLX_MULT_FLT_AxB(A,B) vcmlaq_rot90(vcmulq(A, B), A, B) -#define MVE_CMPLX_MULT_FLT_Conj_AxB(A,B) vcmlaq_rot270(vcmulq(A, B), A, B) - -#define MVE_CMPLX_MULT_FX_AxB(A,B,TyA) vqdmladhxq(vqdmlsdhq((TyA)vuninitializedq_s32(), A, B), A, B) -#define MVE_CMPLX_MULT_FX_AxConjB(A,B,TyA) vqdmladhq(vqdmlsdhxq((TyA)vuninitializedq_s32(), A, B), A, B) - -#define MVE_CMPLX_ADD_FX_A_ixB(A, B) vhcaddq_rot90(A,B) -#define MVE_CMPLX_SUB_FX_A_ixB(A,B) vhcaddq_rot270(A,B) - - -/** - @brief In-place 32 bit reversal function for helium - @param[in,out] pSrc points to in-place buffer of unknown 32-bit data type - @param[in] bitRevLen bit reversal table length - @param[in] pBitRevTab points to bit reversal table - @return none -*/ - -__STATIC_INLINE void arm_bitreversal_32_inpl_mve( - uint32_t *pSrc, - const uint16_t bitRevLen, - const uint16_t *pBitRevTab) - -{ - uint64_t *src = (uint64_t *) pSrc; - int32_t blkCnt; /* loop counters */ - uint32x4_t bitRevTabOff; - uint32x4_t one = vdupq_n_u32(1); - uint64x2_t inLow, inHigh; - uint64x2_t bitRevOff1Low, bitRevOff0Low; - uint64x2_t bitRevOff1High, bitRevOff0High; - - /* load scheduling to increase gather load idx update / gather load distance */ - bitRevTabOff = vldrhq_u32(pBitRevTab); - pBitRevTab += 4; - - bitRevOff0Low = vmullbq_int_u32(bitRevTabOff, one); - bitRevOff0High = vmulltq_int_u32(bitRevTabOff, one); - - - blkCnt = bitRevLen / 8; - while (blkCnt > 0) { - bitRevTabOff = vldrhq_u32(pBitRevTab); - pBitRevTab += 4; - - /* 64-bit index expansion */ - bitRevOff1Low = vmullbq_int_u32(bitRevTabOff, one); - bitRevOff1High = vmulltq_int_u32(bitRevTabOff, one); - - inLow = vldrdq_gather_offset_u64(src, bitRevOff0Low); - inHigh = vldrdq_gather_offset_u64(src, bitRevOff0High); - - vstrdq_scatter_offset_u64(src, bitRevOff0Low, inHigh); - vstrdq_scatter_offset_u64(src, bitRevOff0High, inLow); - - - /* unrolled */ - bitRevTabOff = vldrhq_u32(pBitRevTab); - pBitRevTab += 4; - - bitRevOff0Low = vmullbq_int_u32(bitRevTabOff, one); - bitRevOff0High = vmulltq_int_u32(bitRevTabOff, one); - - inLow = vldrdq_gather_offset_u64(src, bitRevOff1Low); - inHigh = vldrdq_gather_offset_u64(src, bitRevOff1High); - - vstrdq_scatter_offset_u64(src, bitRevOff1Low, inHigh); - vstrdq_scatter_offset_u64(src, bitRevOff1High, inLow); - - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - if (bitRevLen & 7) { - /* FFT size = 16 */ - inLow = vldrdq_gather_offset_u64(src, bitRevOff0Low); - inHigh = vldrdq_gather_offset_u64(src, bitRevOff0High); - - vstrdq_scatter_offset_u64(src, bitRevOff0Low, inHigh); - vstrdq_scatter_offset_u64(src, bitRevOff0High, inLow); - } -} - - - -/** - @brief In-place 16 bit reversal function for helium - @param[in,out] pSrc points to in-place buffer of unknown 16-bit data type - @param[in] bitRevLen bit reversal table length - @param[in] pBitRevTab points to bit reversal table - @return none -*/ - -__STATIC_INLINE void arm_bitreversal_16_inpl_mve( - uint16_t *pSrc, - const uint16_t bitRevLen, - const uint16_t *pBitRevTab) - -{ - uint32_t *src = (uint32_t *) pSrc; - int32_t blkCnt; /* loop counters */ - uint32x4_t bitRevTabOff; - uint16x8_t one = vdupq_n_u16(1); - uint32x4_t bitRevOff1Low, bitRevOff0Low; - uint32x4_t bitRevOff1High, bitRevOff0High; - uint32x4_t inLow, inHigh; - - /* load scheduling to increase gather load idx update / gather load distance */ - bitRevTabOff = vldrhq_u16(pBitRevTab); - pBitRevTab += 8; - - bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one); - bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one); - bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3); - bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3); - - blkCnt = (bitRevLen / 16); - while (blkCnt > 0) { - bitRevTabOff = vldrhq_u16(pBitRevTab); - pBitRevTab += 8; - - bitRevOff1Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one); - bitRevOff1High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one); - bitRevOff1Low = vshrq_n_u16((uint16x8_t)bitRevOff1Low, 3); - bitRevOff1High = vshrq_n_u16((uint16x8_t)bitRevOff1High, 3); - - inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff0Low); - inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff0High); - - vstrwq_scatter_shifted_offset_u32(src, bitRevOff0Low, inHigh); - vstrwq_scatter_shifted_offset_u32(src, bitRevOff0High, inLow); - - /* loop unrolling */ - bitRevTabOff = vldrhq_u16(pBitRevTab); - pBitRevTab += 8; - - bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one); - bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one); - bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3); - bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3); - - inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff1Low); - inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff1High); - - vstrwq_scatter_shifted_offset_u32(src, bitRevOff1Low, inHigh); - vstrwq_scatter_shifted_offset_u32(src, bitRevOff1High, inLow); - - blkCnt--; - } - - /* tail handling */ - blkCnt = bitRevLen & 0xf; - if (blkCnt == 8) { - inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff0Low); - inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff0High); - - vstrwq_scatter_shifted_offset_u32(src, bitRevOff0Low, inHigh); - vstrwq_scatter_shifted_offset_u32(src, bitRevOff0High, inLow); - } else if (blkCnt == 12) { - /* FFT 16 special case */ - mve_pred16_t p = vctp16q(4); - - bitRevTabOff = vldrhq_z_u16(pBitRevTab, p); - - inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff0Low); - inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff0High); - - vstrwq_scatter_shifted_offset_u32(src, bitRevOff0Low, inHigh); - vstrwq_scatter_shifted_offset_u32(src, bitRevOff0High, inLow); - - bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one); - bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one); - bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3); - bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3); - - inLow = vldrwq_gather_shifted_offset_z_u32(src, bitRevOff0Low, p); - inHigh = vldrwq_gather_shifted_offset_z_u32(src, bitRevOff0High, p); - - vstrwq_scatter_shifted_offset_p_u32(src, bitRevOff0Low, inHigh, p); - vstrwq_scatter_shifted_offset_p_u32(src, bitRevOff0High, inLow, p); - } -} - -/** - @brief Out-of-place 32 bit reversal function for helium - @param[out] pDst points to destination buffer of unknown 32-bit data type - @param[in] pSrc points to input buffer of unknown 32-bit data type - @param[in] fftLen FFT length - @return none -*/ -__STATIC_INLINE void arm_bitreversal_32_outpl_mve(void *pDst, void *pSrc, uint32_t fftLen) -{ - uint32x4_t idxOffs0, idxOffs1, bitRevOffs0, bitRevOffs1; - uint32_t bitRevPos, blkCnt; - uint32_t *pDst32 = (uint32_t *) pDst; - - /* fwd indexes */ - idxOffs0 = vdupq_n_u32(0); - idxOffs1 = vdupq_n_u32(0); - idxOffs0[0] = 0; idxOffs0[2] = 4; - idxOffs1[0] = 8; idxOffs1[2] = 12; - - bitRevPos = (31 - __CLZ(fftLen)) + 5; - blkCnt = fftLen >> 2; - - /* issued earlier to increase gather load idx update / gather load distance */ - /* bit-reverse fwd indexes */ - bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos); - bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos); - while (blkCnt > 0) { - uint64x2_t vecIn; - - vecIn = vldrdq_gather_offset_u64(pSrc, (uint64x2_t) bitRevOffs0); - idxOffs0 = idxOffs0 + 16; - vst1q(pDst32, (uint32x4_t) vecIn); - pDst32 += 4; - bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos); - - vecIn = vldrdq_gather_offset_u64(pSrc, (uint64x2_t) bitRevOffs1); - idxOffs1 = idxOffs1 + 16; - vst1q(pDst32, (uint32x4_t) vecIn); - pDst32 += 4; - bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos); - - blkCnt--; - } -} - - -/** - @brief Out-of-place 16 bit reversal function for helium - @param[out] pDst points to destination buffer of unknown 16-bit data type - @param[in] pSrc points to input buffer of unknown 16-bit data type - @param[in] fftLen FFT length - @return none -*/ - -__STATIC_INLINE void arm_bitreversal_16_outpl_mve(void *pDst, void *pSrc, uint32_t fftLen) -{ - uint32x4_t idxOffs0, idxOffs1, bitRevOffs0, bitRevOffs1; - uint32_t bitRevPos, blkCnt; - uint16_t *pDst16 = (uint16_t *) pDst; - uint32_t incrIdx = 0; - - /* fwd indexes */ - idxOffs0 = vidupq_wb_u32(&incrIdx, 4); // {0, 4, 8, 12} - idxOffs1 = vidupq_wb_u32(&incrIdx, 4); // {16, 20, 24, 28} - - bitRevPos = (31 - __CLZ(fftLen)) + 4; - blkCnt = fftLen >> 3; - - /* issued earlier to increase gather load idx update / gather load distance */ - /* bit-reverse fwd indexes */ - bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos); - bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos); - while (blkCnt > 0) { - uint32x4_t vecIn; - - vecIn = vldrwq_gather_offset_s32(pSrc, bitRevOffs0); - idxOffs0 = idxOffs0 + 32; - vst1q(pDst16, (uint16x8_t) vecIn); - pDst16 += 8; - bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos); - - vecIn = vldrwq_gather_offset_s32(pSrc, bitRevOffs1); - idxOffs1 = idxOffs1 + 32; - vst1q(pDst16, (uint16x8_t) vecIn); - pDst16 += 8; - bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos); - - blkCnt--; - } -} - - -#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)*/ - - -#ifdef __cplusplus -} -#endif - - -#endif /* _ARM_VEC_FFT_H_ */ diff --git a/Drivers/CMSIS/DSP/PrivateInclude/arm_vec_filtering.h b/Drivers/CMSIS/DSP/PrivateInclude/arm_vec_filtering.h deleted file mode 100644 index 856f500..0000000 --- a/Drivers/CMSIS/DSP/PrivateInclude/arm_vec_filtering.h +++ /dev/null @@ -1,1586 +0,0 @@ -/****************************************************************************** - * @file arm_vec_filtering.h - * @brief Private header file for CMSIS DSP Library - * @version V1.7.0 - * @date 30. October 2019 - ******************************************************************************/ -/* - * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_VEC_FILTERING_H_ -#define _ARM_VEC_FILTERING_H_ - -#include "arm_math.h" -#include "arm_helium_utils.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F32(acc0, acc1, acc2, acc3, pX, pY, count)\ -{ \ - float32_t const *pSrcX, *pSrcY; \ - f32x4_t acc0Vec, acc1Vec, acc2Vec, acc3Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f32(0.0f); \ - acc1Vec = vdupq_n_f32(0.0f); \ - acc2Vec = vdupq_n_f32(0.0f); \ - acc3Vec = vdupq_n_f32(0.0f); \ - pSrcX = (float32_t const *) pX; \ - pSrcY = (float32_t const *) pY; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); \ - pSrcY += 4; \ - xVec = vldrwq_f32(&pSrcX[1]); \ - acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec); \ - xVec = vldrwq_f32(&pSrcX[2]); \ - acc2Vec = vfmaq_f32(acc2Vec, xVec, yVec); \ - xVec = vldrwq_f32(&pSrcX[3]); \ - acc3Vec = vfmaq_f32(acc3Vec, xVec, yVec); \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* loop + tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vld1q(pSrcY); \ - pSrcY += 4; \ - xVec = vldrwq_f32(&pSrcX[1]); \ - acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0); \ - xVec = vldrwq_f32(&pSrcX[2]); \ - acc2Vec = vfmaq_m_f32(acc2Vec, xVec, yVec, p0); \ - xVec = vldrwq_f32(&pSrcX[3]); \ - acc3Vec = vfmaq_m_f32(acc3Vec, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0); \ - } \ - \ - acc0 = vecAddAcrossF32Mve(acc0Vec); \ - acc1 = vecAddAcrossF32Mve(acc1Vec); \ - acc2 = vecAddAcrossF32Mve(acc2Vec); \ - acc3 = vecAddAcrossF32Mve(acc3Vec); \ -} - -#define MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, count) \ -{ \ - float32_t const *pSrcX, *pSrcY; \ - f32x4_t accVec, xVec, yVec; \ - uint32_t k; \ - \ - accVec = vdupq_n_f32(0.0f); \ - pSrcX = (float32_t const *) pX; \ - pSrcY = (float32_t const *) pY; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); \ - pSrcY += 4; \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - accVec = vfmaq_f32(accVec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vld1q(pSrcY); \ - pSrcY += 4; \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - accVec = vfmaq_m_f32(accVec, xVec, yVec, p0);\ - } \ - acc = vecAddAcrossF32Mve(accVec); \ -} - -#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F32(acc0, acc1, pX, pY, count)\ -{ \ - float32_t const *pSrcX, *pSrcY; \ - f32x4_t acc0Vec, acc1Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f32(0.0f); \ - acc1Vec = vdupq_n_f32(0.0f); \ - pSrcX = (float32_t const *) pX; \ - pSrcY = (float32_t const *) pY; \ - k = (count-1) >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); \ - pSrcY += 4; \ - xVec = vldrwq_f32(&pSrcX[1]); \ - acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec); \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires exact number of sample (count-1) */ \ - /* disable extra lanes in final MAC computation */ \ - k = (count-1) % 0x4U; \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vld1q(pSrcY); \ - pSrcY += 4; \ - xVec = vldrwq_f32(&pSrcX[1]); \ - acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0); \ - /* acc0 requires 1 additional sample (count) */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp32q(k+1); \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0); \ - \ - acc0 = vecAddAcrossF32Mve(acc0Vec); \ - acc1 = vecAddAcrossF32Mve(acc1Vec); \ -} - -#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F32(acc0, acc1, pX, pY, count)\ -{ \ - float32_t const *pSrcX, *pSrcY; \ - f32x4_t acc0Vec, acc1Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f32(0.0f); \ - acc1Vec = vdupq_n_f32(0.0f); \ - pSrcX = (float32_t const *) pX; \ - pSrcY = (float32_t const *) pY; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); \ - pSrcY += 4; \ - xVec = vldrwq_f32(&pSrcX[1]); \ - acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec); \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* loop + tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vld1q(pSrcY); \ - pSrcY += 4; \ - xVec = vldrwq_f32(&pSrcX[1]); \ - acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0); \ - } \ - \ - acc0 = vecAddAcrossF32Mve(acc0Vec); \ - acc1 = vecAddAcrossF32Mve(acc1Vec); \ -} - -#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F32(acc0, acc1, pX, pY, count)\ -{ \ - float32_t const *pSrcX, *pSrcY; \ - f32x4_t acc0Vec, acc1Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f32(0.0f); \ - acc1Vec = vdupq_n_f32(0.0f); \ - pSrcX = (float32_t const *) pX; \ - pSrcY = (float32_t const *) pY; \ - k = count >> 2; \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - yVec = vldrwq_f32(&pSrcY[-1]); \ - acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec); \ - yVec = vld1q(pSrcY); \ - pSrcY += 4; \ - acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = count % 0x4U; \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires 1 additional sample */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - mve_pred16_t p0 = vctp32q(k+1); \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - yVec = vldrwq_f32(&pSrcY[-1]); \ - acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec,p0); \ - /* acc0 requires exact number of sample */ \ - /* disable extra lanes in final MAC computation */ \ - p0 = vctp32q(k); \ - yVec = vld1q(pSrcY); \ - pSrcY += 4; \ - acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec,p0); \ - \ - acc0 = vecAddAcrossF32Mve(acc0Vec); \ - acc1 = vecAddAcrossF32Mve(acc1Vec); \ -} - -#define MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_F32(acc0, acc1, pX, pY, count) \ -{ \ - float32_t const *pSrcX; \ - f32x4_t acc0Vec, acc1Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f32(0.0f); \ - acc1Vec = vdupq_n_f32(0.0f); \ - pSrcX = (float32_t const *) pX; \ - k = (count - 1) >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec); \ - pY-=4; \ - xVec = vldrwq_f32(&pSrcX[1]); \ - acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = (count - 1) % 0x4U; \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec); \ - xVec = vldrwq_f32(&pSrcX[1]); \ - acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - p0 = vctp32q(k+1); \ - acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0); \ - \ - acc0 = vecAddAcrossF32Mve(acc0Vec); \ - acc1 = vecAddAcrossF32Mve(acc1Vec); \ -} - -#define MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_F32(acc0, acc1, pX, pY, count) \ -{ \ - float32_t const *pSrcX; \ - f32x4_t acc0Vec, acc1Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f32(0.0f); \ - acc1Vec = vdupq_n_f32(0.0f); \ - pSrcX = (float32_t const *) pX; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec); \ - pY-=4; \ - xVec = vldrwq_f32(&pSrcX[1]); \ - acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec); \ - xVec = vldrwq_f32(&pSrcX[1]); \ - acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0); \ - } \ - acc0 = vecAddAcrossF32Mve(acc0Vec); \ - acc1 = vecAddAcrossF32Mve(acc1Vec); \ -} - -#define MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_F32(acc0, acc1, pX, pY, count)\ -{ \ - float32_t const *pSrcX; \ - const float32_t *pY1 = pY + 1; \ - f32x4_t acc0Vec, acc1Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f32(0.0f); \ - acc1Vec = vdupq_n_f32(0.0f); \ - pSrcX = (float32_t const *) pX; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec); \ - pY-=4; \ - acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec); \ - yVec = vldrwq_gather_shifted_offset_f32(pY1, decrIdxVec); \ - pY1-=4; \ - acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = count % 0x4U; \ - /* use predication to finalize MAC sum */ \ - /* acc0 requires exact number of sample */ \ - /* disable extra lanes in final MAC computation */ \ - mve_pred16_t p0 = vctp32q(k); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec); \ - acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0); \ - yVec = vldrwq_gather_shifted_offset_f32(pY1, decrIdxVec); \ - /* acc1 requires 1 additional sample */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp32q(k+1); \ - acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0); \ - \ - acc0 = vecAddAcrossF32Mve(acc0Vec); \ - acc1 = vecAddAcrossF32Mve(acc1Vec); \ -} - -#define MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count) \ -{ \ - float32_t const *pSrcX; \ - f32x4_t accVec, xVec, yVec; \ - uint32_t k; \ - \ - accVec = vdupq_n_f32(0.0f); \ - pSrcX = (float32_t const *) pX; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec); \ - pY-=4; \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - accVec = vfmaq_f32(accVec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec); \ - accVec = vfmaq_m_f32(accVec, xVec, yVec, p0); \ - } \ - acc = vecAddAcrossF32Mve(accVec); \ -} - -#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)*/ - -#if (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) - -#define MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count) \ -{ \ - q31_t const *pSrcX; \ - q31x4_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q31_t const *) pX; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec); \ - pY-=4; \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc = vmlaldavaq(acc, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec); \ - acc = vmlaldavaq_p(acc, xVec, yVec, p0); \ - } \ - acc = asrl(acc, 31); \ -} - - - -#define MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q31(acc0, acc1, pX, pY, count)\ -{ \ - q31_t const *pSrcX; \ - const q31_t *pY1 = pY + 1; \ - q31x4_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q31_t const *) pX; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec); \ - pY-=4; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - yVec = vldrwq_gather_shifted_offset_s32(pY1, decrIdxVec); \ - pY1-=4; \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = count % 0x4U; \ - /* use predication to finalize MAC sum */ \ - /* acc0 requires exact number of sample */ \ - /* disable extra lanes in final MAC computation */ \ - mve_pred16_t p0 = vctp32q(k); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec); \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - yVec = vldrwq_gather_shifted_offset_s32(pY1, decrIdxVec); \ - /* acc1 requires 1 additional sample */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp32q(k+1); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - \ - acc0 = asrl(acc0, 31); \ - acc1 = asrl(acc1, 31); \ -} - - - - -#define MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q31(acc0, acc1, pX, pY, count) \ -{ \ - q31_t const *pSrcX; \ - q31x4_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q31_t const *) pX; \ - k = (count-1) >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec); \ - pY-=4; \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = (count - 1) % 0x4U; \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires exact number of sample (count-1) */ \ - /* disable extra lanes in final MAC computation */ \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec); \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - /* acc0 requires 1 additional sample (count) */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp32q(k+1); \ - xVec = vld1q(pSrcX); \ - pSrcX += 4; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - \ - acc0 = asrl(acc0, 31); \ - acc1 = asrl(acc1, 31); \ -} - - - -#define MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q31(acc0, acc1, pX, pY, count) \ -{ \ - q31_t const *pSrcX; \ - q31x4_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q31_t const *) pX; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec); \ - pY-=4; \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec); \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - } \ - acc0 = asrl(acc0, 31); \ - acc1 = asrl(acc1, 31); \ -} - - - -#define MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q31(acc0, acc1, acc2, acc3, pX, pY, count) \ -{ \ - q31_t const *pSrcX; \ - q31x4_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q31_t const *) pX; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec); \ - pY-=4; \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vldrwq_s32(&pSrcX[2]); \ - acc2 = vmlaldavaq(acc2, xVec, yVec); \ - xVec = vldrwq_s32(&pSrcX[3]); \ - acc3 = vmlaldavaq(acc3, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec); \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - xVec = vldrwq_s32(&pSrcX[2]); \ - acc2 = vmlaldavaq_p(acc2, xVec, yVec, p0); \ - xVec = vldrwq_s32(&pSrcX[3]); \ - acc3 = vmlaldavaq_p(acc3, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - } \ - acc0 = asrl(acc0, 31); \ - acc1 = asrl(acc1, 31); \ - acc2 = asrl(acc2, 31); \ - acc3 = asrl(acc3, 31); \ -} - -#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q31(acc0, acc1, pX, pY, count)\ -{ \ - q31_t const *pSrcX, *pSrcY; \ - q31x4_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q31_t const *) pX; \ - pSrcY = (q31_t const *) pY; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - yVec = vldrwq_s32(&pSrcY[-1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - yVec = vld1q(pSrcY); pSrcY += 4; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = count % 0x4U; \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires 1 additional sample */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - mve_pred16_t p0 = vctp32q(k+1); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - yVec = vldrwq_s32(&pSrcY[-1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec,p0); \ - /* acc0 requires exact number of sample */ \ - /* disable extra lanes in final MAC computation */ \ - p0 = vctp32q(k); \ - yVec = vld1q(pSrcY); pSrcY += 4; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec,p0); \ - \ - acc0 = asrl(acc0, 31); \ - acc1 = asrl(acc1, 31); \ -} - -#define MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, count)\ -{ \ - q31_t const *pSrcX, *pSrcY; \ - q31x4_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q31_t const *) pX; \ - pSrcY = (q31_t const *) pY; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - yVec = vld1q(pSrcY); pSrcY += 4; \ - acc = vmlaldavaq(acc, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - yVec = vld1q(pSrcY); pSrcY += 4; \ - acc = vmlaldavaq_p(acc, xVec, yVec, p0); \ - } \ - acc = asrl(acc, 31); \ -} - -#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q31(acc0, acc1, acc2, acc3, pX, pY, count)\ -{ \ - q31_t const *pSrcX, *pSrcY; \ - q31x4_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q31_t const *) pX; \ - pSrcY = (q31_t const *) pY; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 4; \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vldrwq_s32(&pSrcX[2]); \ - acc2 = vmlaldavaq(acc2, xVec, yVec); \ - xVec = vldrwq_s32(&pSrcX[3]); \ - acc3 = vmlaldavaq(acc3, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* loop + tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vld1q(pSrcY); pSrcY += 4; \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - xVec = vldrwq_s32(&pSrcX[2]); \ - acc2 = vmlaldavaq_p(acc2, xVec, yVec, p0); \ - xVec = vldrwq_s32(&pSrcX[3]); \ - acc3 = vmlaldavaq_p(acc3, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - } \ - \ - acc0 = asrl(acc0, 31); \ - acc1 = asrl(acc1, 31); \ - acc2 = asrl(acc2, 31); \ - acc3 = asrl(acc3, 31); \ -} - -#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q31(acc0, acc1, pX, pY, count)\ -{ \ - q31_t const *pSrcX, *pSrcY; \ - q31x4_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q31_t const *) pX; \ - pSrcY = (q31_t const *) pY; \ - k = count >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 4; \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* loop + tail predication expected here */ \ - k = count % 0x4U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vld1q(pSrcY); pSrcY += 4; \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - } \ - \ - acc0 = asrl(acc0, 31); \ - acc1 = asrl(acc1, 31); \ -} - -#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q31(acc0, acc1, pX, pY, count)\ -{ \ - q31_t const *pSrcX, *pSrcY; \ - q31x4_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q31_t const *) pX; \ - pSrcY = (q31_t const *) pY; \ - k = (count-1) >> 2; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 4; \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires exact number of sample (count-1) */ \ - /* disable extra lanes in final MAC computation */ \ - k = (count-1) % 0x4U; \ - mve_pred16_t p0 = vctp32q(k); \ - yVec = vld1q(pSrcY); pSrcY += 4; \ - xVec = vldrwq_s32(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - /* acc0 requires 1 additional sample (count) */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp32q(k+1); \ - xVec = vld1q(pSrcX); pSrcX += 4; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - \ - acc0 = asrl(acc0, 31); \ - acc1 = asrl(acc1, 31); \ -} - -#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q15(acc0, acc1, pX, pY, count)\ -{ \ - q15_t const *pSrcX, *pSrcY; \ - q15x8_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q15_t const *) pX; \ - pSrcY = (q15_t const *) pY; \ - k = count >> 3; \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - yVec = vldrhq_s16(&pSrcY[-1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = count % 0x8U; \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires 1 additional sample */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - mve_pred16_t p0 = vctp16q(k+1); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - yVec = vldrhq_s16(&pSrcY[-1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec,p0); \ - /* acc0 requires exact number of sample */ \ - /* disable extra lanes in final MAC computation */ \ - p0 = vctp16q(k); \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec,p0); \ - \ - acc0 = asrl(acc0, 15); \ - acc1 = asrl(acc1, 15); \ - acc0 = __SSAT(acc0, 16); \ - acc1 = __SSAT(acc1, 16); \ -} - -#define MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, count)\ -{ \ - q15_t const *pSrcX, *pSrcY; \ - q15x8_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q15_t const *) pX; \ - pSrcY = (q15_t const *) pY; \ - k = count >> 3; \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - acc = vmlaldavaq(acc, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* tail predication expected here */ \ - k = count % 0x8U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp16q(k); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - acc = vmlaldavaq_p(acc, xVec, yVec, p0); \ - } \ - acc = asrl(acc, 15); \ - acc = __SSAT(acc, 16); \ -} - -#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q15(acc0, acc1, acc2, acc3, pX, pY, count)\ -{ \ - q15_t const *pSrcX, *pSrcY; \ - q15x8_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q15_t const *) pX; \ - pSrcY = (q15_t const *) pY; \ - k = count >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vldrhq_s16(&pSrcX[2]); \ - acc2 = vmlaldavaq(acc2, xVec, yVec); \ - xVec = vldrhq_s16(&pSrcX[3]); \ - acc3 = vmlaldavaq(acc3, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* loop + tail predication expected here */ \ - k = count % 0x8U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp16q(k); \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - xVec = vldrhq_s16(&pSrcX[2]); \ - acc2 = vmlaldavaq_p(acc2, xVec, yVec, p0); \ - xVec = vldrhq_s16(&pSrcX[3]); \ - acc3 = vmlaldavaq_p(acc3, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - } \ - \ - acc0 = asrl(acc0, 15); \ - acc1 = asrl(acc1, 15); \ - acc2 = asrl(acc2, 15); \ - acc3 = asrl(acc3, 15); \ - acc0 = __SSAT(acc0, 16); \ - acc1 = __SSAT(acc1, 16); \ - acc2 = __SSAT(acc2, 16); \ - acc3 = __SSAT(acc3, 16); \ -} - -#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q15(acc0, acc1, pX, pY, count)\ -{ \ - q15_t const *pSrcX, *pSrcY; \ - q15x8_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q15_t const *) pX; \ - pSrcY = (q15_t const *) pY; \ - k = count >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* loop + tail predication expected here */ \ - k = count % 0x8U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp16q(k); \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - } \ - \ - acc0 = asrl(acc0, 15); \ - acc1 = asrl(acc1, 15); \ - acc0 = __SSAT(acc0, 16); \ - acc1 = __SSAT(acc1, 16); \ -} - -#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q15(acc0, acc1, pX, pY, count)\ -{ \ - q15_t const *pSrcX, *pSrcY; \ - q15x8_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q15_t const *) pX; \ - pSrcY = (q15_t const *) pY; \ - k = (count-1) >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires exact number of sample (count-1) */ \ - /* disable extra lanes in final MAC computation */ \ - k = (count-1) % 0x8U; \ - mve_pred16_t p0 = vctp16q(k); \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - /* acc0 requires 1 additional sample (count) */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp16q(k+1); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - \ - acc0 = asrl(acc0, 15); \ - acc1 = asrl(acc1, 15); \ - acc0 = __SSAT(acc0, 16); \ - acc1 = __SSAT(acc1, 16); \ -} - -#define MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q15(acc0, acc1, pX, pY, count)\ -{ \ - q15_t const *pSrcX; \ - const q15_t *pY1 = pY + 1; \ - q15x8_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q15_t const *) pX; \ - k = count >> 3; \ - \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec); \ - pY-=8; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - yVec = vldrhq_gather_shifted_offset_s16(pY1, decrIdxVec); \ - pY1-=8; \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = count % 0x8U; \ - /* use predication to finalize MAC sum */ \ - /* acc0 requires exact number of sample */ \ - /* disable extra lanes in final MAC computation */ \ - mve_pred16_t p0 = vctp16q(k); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec); \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - yVec = vldrhq_gather_shifted_offset_s16(pY1, decrIdxVec); \ - /* acc1 requires 1 additional sample */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp16q(k+1); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - \ - acc0 = asrl(acc0, 15); \ - acc1 = asrl(acc1, 15); \ - acc0 = __SSAT(acc0, 16); \ - acc1 = __SSAT(acc1, 16); \ -} - -#define MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count) \ -{ \ - q15_t const *pSrcX; \ - q15x8_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q15_t const *) pX; \ - k = count >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec); \ - pY-=8; \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc = vmlaldavaq(acc, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x8U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp16q(k); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec); \ - acc = vmlaldavaq_p(acc, xVec, yVec, p0); \ - } \ - acc = asrl(acc, 15); \ - acc = __SSAT(acc, 16); \ -} - -#define MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q15(acc0, acc1, acc2, acc3, pX, pY, count) \ -{ \ - q15_t const *pSrcX; \ - q15x8_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q15_t const *) pX; \ - k = count >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec); \ - pY-=8; \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vldrhq_s16(&pSrcX[2]); \ - acc2 = vmlaldavaq(acc2, xVec, yVec); \ - xVec = vldrhq_s16(&pSrcX[3]); \ - acc3 = vmlaldavaq(acc3, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x8U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp16q(k); \ - yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec); \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - xVec = vldrhq_s16(&pSrcX[2]); \ - acc2 = vmlaldavaq_p(acc2, xVec, yVec, p0); \ - xVec = vldrhq_s16(&pSrcX[3]); \ - acc3 = vmlaldavaq_p(acc3, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - } \ - acc0 = asrl(acc0, 15); \ - acc1 = asrl(acc1, 15); \ - acc2 = asrl(acc2, 15); \ - acc3 = asrl(acc3, 15); \ - acc0 = __SSAT(acc0, 16); \ - acc1 = __SSAT(acc1, 16); \ - acc2 = __SSAT(acc2, 16); \ - acc3 = __SSAT(acc3, 16); \ -} - -#define MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q15(acc0, acc1, pX, pY, count) \ -{ \ - q15_t const *pSrcX; \ - q15x8_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q15_t const *) pX; \ - k = count >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec); \ - pY-=8; \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x8U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp16q(k); \ - yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec); \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - } \ - acc0 = asrl(acc0, 15); \ - acc1 = asrl(acc1, 15); \ - acc0 = __SSAT(acc0, 16); \ - acc1 = __SSAT(acc1, 16); \ -} - -#define MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q15(acc0, acc1, pX, pY, count) \ -{ \ - q15_t const *pSrcX; \ - q15x8_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q15_t const *) pX; \ - k = (count-1) >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec); \ - pY-=8; \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = (count - 1) % 0x8U; \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires exact number of sample (count-1) */ \ - /* disable extra lanes in final MAC computation */ \ - mve_pred16_t p0 = vctp16q(k); \ - yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec); \ - xVec = vldrhq_s16(&pSrcX[1]); \ - acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0); \ - /* acc0 requires 1 additional sample (count) */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp16q(k+1); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0); \ - \ - acc0 = asrl(acc0, 15); \ - acc1 = asrl(acc1, 15); \ - acc0 = __SSAT(acc0, 16); \ - acc1 = __SSAT(acc1, 16); \ -} - -#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q7(acc0, acc1, pX, pY, count)\ -{ \ - q7_t const *pSrcX, *pSrcY; \ - q7x16_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q7_t const *) pX; \ - pSrcY = (q7_t const *) pY; \ - k = count >> 4; \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - yVec = vldrbq_s8(&pSrcY[-1]); \ - acc1 = vmladavaq(acc1, xVec, yVec); \ - yVec = vld1q(pSrcY); pSrcY += 16; \ - acc0 = vmladavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = count % 0x10U; \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires 1 additional sample */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - mve_pred16_t p0 = vctp8q(k+1); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - yVec = vldrbq_s8(&pSrcY[-1]); \ - acc1 = vmladavaq_p(acc1, xVec, yVec,p0); \ - /* acc0 requires exact number of sample */ \ - /* disable extra lanes in final MAC computation */ \ - p0 = vctp8q(k); \ - yVec = vld1q(pSrcY); pSrcY += 16; \ - acc0 = vmladavaq_p(acc0, xVec, yVec,p0); \ - \ - acc0 = (acc0 >> 7); \ - acc1 = (acc1 >> 7); \ - acc0 = __SSAT(acc0, 8); \ - acc1 = __SSAT(acc1, 8); \ -} - -#define MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, count)\ -{ \ - q7_t const *pSrcX, *pSrcY; \ - q7x16_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q7_t const *) pX; \ - pSrcY = (q7_t const *) pY; \ - k = count >> 4; \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - yVec = vld1q(pSrcY); pSrcY += 16; \ - acc = vmladavaq(acc, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* tail predication expected here */ \ - k = count % 0x10U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp8q(k); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - yVec = vld1q(pSrcY); pSrcY += 16; \ - acc = vmladavaq_p(acc, xVec, yVec, p0); \ - } \ - acc =(acc >> 7); \ - acc = __SSAT(acc, 8); \ -} - -#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q7(acc0, acc1, acc2, acc3, pX, pY, count)\ -{ \ - q7_t const *pSrcX, *pSrcY; \ - q7x16_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q7_t const *) pX; \ - pSrcY = (q7_t const *) pY; \ - k = count >> 4; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 16; \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq(acc1, xVec, yVec); \ - xVec = vldrbq_s8(&pSrcX[2]); \ - acc2 = vmladavaq(acc2, xVec, yVec); \ - xVec = vldrbq_s8(&pSrcX[3]); \ - acc3 = vmladavaq(acc3, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* loop + tail predication expected here */ \ - k = count % 0x10U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp8q(k); \ - yVec = vld1q(pSrcY); pSrcY += 16; \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq_p(acc1, xVec, yVec, p0); \ - xVec = vldrbq_s8(&pSrcX[2]); \ - acc2 = vmladavaq_p(acc2, xVec, yVec, p0); \ - xVec = vldrbq_s8(&pSrcX[3]); \ - acc3 = vmladavaq_p(acc3, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq_p(acc0, xVec, yVec, p0); \ - } \ - \ - acc0 = (acc0 >> 7); \ - acc1 = (acc1 >> 7); \ - acc2 = (acc2 >> 7); \ - acc3 = (acc3 >> 7); \ - acc0 = __SSAT(acc0, 8); \ - acc1 = __SSAT(acc1, 8); \ - acc2 = __SSAT(acc2, 8); \ - acc3 = __SSAT(acc3, 8); \ -} - -#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q7(acc0, acc1, pX, pY, count)\ -{ \ - q7_t const *pSrcX, *pSrcY; \ - q7x16_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q7_t const *) pX; \ - pSrcY = (q7_t const *) pY; \ - k = count >> 4; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 16; \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* loop + tail predication expected here */ \ - k = count % 0x10U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp8q(k); \ - yVec = vld1q(pSrcY); pSrcY += 16; \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq_p(acc1, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq_p(acc0, xVec, yVec, p0); \ - } \ - \ - acc0 = (acc0 >> 7); \ - acc1 = (acc1 >> 7); \ - acc0 = __SSAT(acc0, 8); \ - acc1 = __SSAT(acc1, 8); \ -} - -#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q7(acc0, acc1, pX, pY, count)\ -{ \ - q7_t const *pSrcX, *pSrcY; \ - q7x16_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q7_t const *) pX; \ - pSrcY = (q7_t const *) pY; \ - k = (count-1) >> 4; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 16; \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires exact number of sample (count-1) */ \ - /* disable extra lanes in final MAC computation */ \ - k = (count-1) % 0x10U; \ - mve_pred16_t p0 = vctp8q(k); \ - yVec = vld1q(pSrcY); pSrcY += 16; \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq_p(acc1, xVec, yVec, p0); \ - /* acc0 requires 1 additional sample (count) */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp8q(k+1); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq_p(acc0, xVec, yVec, p0); \ - \ - acc0 = (acc0 >> 7); \ - acc1 = (acc1 >> 7); \ - acc0 = __SSAT(acc0, 8); \ - acc1 = __SSAT(acc1, 8); \ -} - -#define MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q7(acc0, acc1, pX, pY, count)\ -{ \ - q7_t const *pSrcX; \ - const q7_t *pY1 = pY + 1; \ - q7x16_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q7_t const *) pX; \ - k = count >> 4; \ - \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - yVec = vldrbq_gather_offset_s8(pY, decrIdxVec); \ - pY-=16; \ - acc0 = vmladavaq(acc0, xVec, yVec); \ - yVec = vldrbq_gather_offset_s8(pY1, decrIdxVec); \ - pY1-=16; \ - acc1 = vmladavaq(acc1, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = count % 0x10U; \ - /* use predication to finalize MAC sum */ \ - /* acc0 requires exact number of sample */ \ - /* disable extra lanes in final MAC computation */ \ - mve_pred16_t p0 = vctp8q(k); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - yVec = vldrbq_gather_offset_s8(pY, decrIdxVec); \ - acc0 = vmladavaq_p(acc0, xVec, yVec, p0); \ - yVec = vldrbq_gather_offset_s8(pY1, decrIdxVec); \ - /* acc1 requires 1 additional sample */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp8q(k+1); \ - acc1 = vmladavaq_p(acc1, xVec, yVec, p0); \ - \ - acc0 = (acc0 >> 7); \ - acc1 = (acc1 >> 7); \ - acc0 = __SSAT(acc0, 8); \ - acc1 = __SSAT(acc1, 8); \ -} - -#define MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count) \ -{ \ - q7_t const *pSrcX; \ - q7x16_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q7_t const *) pX; \ - k = count >> 4; \ - \ - while (k > 0U) \ - { \ - yVec = vldrbq_gather_offset_s8(pY, decrIdxVec); \ - pY-=16; \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc = vmladavaq(acc, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x10U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp8q(k); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - yVec = vldrbq_gather_offset_s8(pY, decrIdxVec); \ - acc = vmladavaq_p(acc, xVec, yVec, p0); \ - } \ - acc = __SSAT(acc >> 7, 8); \ -} - -#define MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q7(acc0, acc1, acc2, acc3, pX, pY, count) \ -{ \ - q7_t const *pSrcX; \ - q7x16_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q7_t const *) pX; \ - k = count >> 4; \ - \ - while (k > 0U) \ - { \ - yVec = vldrbq_gather_offset_s8(pY, decrIdxVec); \ - pY-=16; \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq(acc1, xVec, yVec); \ - xVec = vldrbq_s8(&pSrcX[2]); \ - acc2 = vmladavaq(acc2, xVec, yVec); \ - xVec = vldrbq_s8(&pSrcX[3]); \ - acc3 = vmladavaq(acc3, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x10U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp8q(k); \ - yVec = vldrbq_gather_offset_s8(pY, decrIdxVec); \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq_p(acc1, xVec, yVec, p0); \ - xVec = vldrbq_s8(&pSrcX[2]); \ - acc2 = vmladavaq_p(acc2, xVec, yVec, p0); \ - xVec = vldrbq_s8(&pSrcX[3]); \ - acc3 = vmladavaq_p(acc3, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq_p(acc0, xVec, yVec, p0); \ - } \ - acc0 = __SSAT(acc0 >> 7, 8); \ - acc1 = __SSAT(acc1 >> 7, 8); \ - acc2 = __SSAT(acc2 >> 7, 8); \ - acc3 = __SSAT(acc3 >> 7, 8); \ -} - -#define MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q7(acc0, acc1, pX, pY, count) \ -{ \ - q7_t const *pSrcX; \ - q7x16_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q7_t const *) pX; \ - k = count >> 4; \ - \ - while (k > 0U) \ - { \ - yVec = vldrbq_gather_offset_s8(pY, decrIdxVec); \ - pY-=16; \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x10U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp8q(k); \ - yVec = vldrbq_gather_offset_s8(pY, decrIdxVec); \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq_p(acc1, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq_p(acc0, xVec, yVec, p0); \ - } \ - acc0 = __SSAT(acc0 >> 7, 8); \ - acc1 = __SSAT(acc1 >> 7, 8); \ -} - - -#define MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q7(acc0, acc1, pX, pY, count) \ -{ \ - q7_t const *pSrcX; \ - q7x16_t xVec, yVec; \ - uint32_t k; \ - \ - pSrcX = (q7_t const *) pX; \ - k = (count-1) >> 4; \ - \ - while (k > 0U) \ - { \ - yVec = vldrbq_gather_offset_s8(pY, decrIdxVec); \ - pY-=16; \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq(acc1, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq(acc0, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = (count - 1) % 0x10U; \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires exact number of sample (count-1) */ \ - /* disable extra lanes in final MAC computation */ \ - mve_pred16_t p0 = vctp8q(k); \ - yVec = vldrbq_gather_offset_s8(pY, decrIdxVec); \ - xVec = vldrbq_s8(&pSrcX[1]); \ - acc1 = vmladavaq_p(acc1, xVec, yVec, p0); \ - /* acc0 requires 1 additional sample (count) */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp8q(k+1); \ - xVec = vld1q(pSrcX); pSrcX += 16; \ - acc0 = vmladavaq_p(acc0, xVec, yVec, p0); \ - \ - acc0 = (acc0 >> 7); \ - acc1 = (acc1 >> 7); \ - acc0 = __SSAT(acc0, 8); \ - acc1 = __SSAT(acc1, 8); \ -} - -#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */ - -#ifdef __cplusplus -} -#endif - - -#endif /* _ARM_VEC_FILTERING_H_ */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c deleted file mode 100644 index 9099f2b..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c +++ /dev/null @@ -1,87 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: BasicMathFunctions.c - * Description: Combination of all basic math function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_abs_f32.c" -#include "arm_abs_f64.c" -#include "arm_abs_q15.c" -#include "arm_abs_q31.c" -#include "arm_abs_q7.c" -#include "arm_add_f32.c" -#include "arm_add_f64.c" -#include "arm_add_q15.c" -#include "arm_add_q31.c" -#include "arm_add_q7.c" -#include "arm_and_u16.c" -#include "arm_and_u32.c" -#include "arm_and_u8.c" -#include "arm_dot_prod_f32.c" -#include "arm_dot_prod_f64.c" -#include "arm_dot_prod_q15.c" -#include "arm_dot_prod_q31.c" -#include "arm_dot_prod_q7.c" -#include "arm_mult_f32.c" -#include "arm_mult_f64.c" -#include "arm_mult_q15.c" -#include "arm_mult_q31.c" -#include "arm_mult_q7.c" -#include "arm_negate_f32.c" -#include "arm_negate_f64.c" -#include "arm_negate_q15.c" -#include "arm_negate_q31.c" -#include "arm_negate_q7.c" -#include "arm_not_u16.c" -#include "arm_not_u32.c" -#include "arm_not_u8.c" -#include "arm_offset_f32.c" -#include "arm_offset_f64.c" -#include "arm_offset_q15.c" -#include "arm_offset_q31.c" -#include "arm_offset_q7.c" -#include "arm_or_u16.c" -#include "arm_or_u32.c" -#include "arm_or_u8.c" -#include "arm_scale_f32.c" -#include "arm_scale_f64.c" -#include "arm_scale_q15.c" -#include "arm_scale_q31.c" -#include "arm_scale_q7.c" -#include "arm_shift_q15.c" -#include "arm_shift_q31.c" -#include "arm_shift_q7.c" -#include "arm_sub_f32.c" -#include "arm_sub_f64.c" -#include "arm_sub_q15.c" -#include "arm_sub_q31.c" -#include "arm_sub_q7.c" -#include "arm_xor_u16.c" -#include "arm_xor_u32.c" -#include "arm_xor_u8.c" -#include "arm_clip_f32.c" -#include "arm_clip_q31.c" -#include "arm_clip_q15.c" -#include "arm_clip_q7.c" diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c deleted file mode 100644 index 1c13e02..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c +++ /dev/null @@ -1,37 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: BasicMathFunctionsF16.c - * Description: Combination of all basic math function f16 source files. - * - * $Date: 20. April 2020 - * $Revision: V1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_abs_f16.c" -#include "arm_add_f16.c" -#include "arm_dot_prod_f16.c" -#include "arm_mult_f16.c" -#include "arm_negate_f16.c" -#include "arm_offset_f16.c" -#include "arm_scale_f16.c" -#include "arm_sub_f16.c" -#include "arm_clip_f16.c" diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/CMakeLists.txt deleted file mode 100644 index b506e7c..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/CMakeLists.txt +++ /dev/null @@ -1,41 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPBasicMath) - -include(configLib) -include(configDsp) - -file(GLOB SRCF64 "./*_f64.c") -file(GLOB SRCF32 "./*_f32.c") -file(GLOB SRCF16 "./*_f16.c") -file(GLOB SRCQ31 "./*_q31.c") -file(GLOB SRCQ15 "./*_q15.c") -file(GLOB SRCQ7 "./*_q7.c") - -file(GLOB SRCU32 "./*_u32.c") -file(GLOB SRCU16 "./*_u16.c") -file(GLOB SRCU8 "./*_u8.c") - -add_library(CMSISDSPBasicMath STATIC ${SRCF64}) -target_sources(CMSISDSPBasicMath PRIVATE ${SRCF32}) - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPBasicMath PRIVATE ${SRCF16}) -endif() - -target_sources(CMSISDSPBasicMath PRIVATE ${SRCQ31}) -target_sources(CMSISDSPBasicMath PRIVATE ${SRCQ15}) -target_sources(CMSISDSPBasicMath PRIVATE ${SRCQ7}) - -target_sources(CMSISDSPBasicMath PRIVATE ${SRCU32}) -target_sources(CMSISDSPBasicMath PRIVATE ${SRCU16}) -target_sources(CMSISDSPBasicMath PRIVATE ${SRCU8}) - -configLib(CMSISDSPBasicMath ${ROOT}) -configDsp(CMSISDSPBasicMath ${ROOT}) - -### Includes -target_include_directories(CMSISDSPBasicMath PUBLIC "${DSP}/Include") - - - diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f16.c deleted file mode 100644 index 6d1db1f..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f16.c +++ /dev/null @@ -1,198 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_abs_f16.c - * Description: Floating-point vector absolute value - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions_f16.h" -#include - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicAbs Vector Absolute Value - - Computes the absolute value of a vector on an element-by-element basis. - - 
-      pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.
-
- - The functions support in-place computation allowing the source and - destination pointers to reference the same memory buffer. - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicAbs - @{ - */ - -/** - @brief Floating-point vector absolute value. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_abs_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - f16x8_t vec1; - f16x8_t res; - - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute values and then store the results in the destination buffer. */ - vec1 = vld1q(pSrc); - res = vabsq(vec1); - vst1q(pDst, res); - - /* Increment pointers */ - pSrc += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x7; - - - if (blkCnt > 0U) - { - /* C = |A| */ - mve_pred16_t p0 = vctp16q(blkCnt); - vec1 = vld1q(pSrc); - vstrhq_p(pDst, vabsq(vec1), p0); - } - -} - -#else -#if defined(ARM_FLOAT16_SUPPORTED) -void arm_abs_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_NEON_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - f16x8_t vec1; - f16x8_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute values and then store the results in the destination buffer. */ - vec1 = vld1q_f16(pSrc); - res = vabsq_f16(vec1); - vst1q_f16(pDst, res); - - /* Increment pointers */ - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute and store result in destination buffer. */ - *pDst++ = (_Float16)fabsf((float32_t)*pSrc++); - - *pDst++ = (_Float16)fabsf((float32_t)*pSrc++); - - *pDst++ = (_Float16)fabsf((float32_t)*pSrc++); - - *pDst++ = (_Float16)fabsf((float32_t)*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute and store result in destination buffer. */ - *pDst++ = (_Float16)fabsf((float32_t)*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_FLOAT16_SUPPORTED */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of BasicAbs group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c deleted file mode 100644 index db19a50..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c +++ /dev/null @@ -1,196 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_abs_f32.c - * Description: Floating-point vector absolute value - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" -#include - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicAbs Vector Absolute Value - - Computes the absolute value of a vector on an element-by-element basis. - - 
-      pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.
-
- - The functions support in-place computation allowing the source and - destination pointers to reference the same memory buffer. - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicAbs - @{ - */ - -/** - @brief Floating-point vector absolute value. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_abs_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - f32x4_t vec1; - f32x4_t res; - - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute values and then store the results in the destination buffer. */ - vec1 = vld1q(pSrc); - res = vabsq(vec1); - vst1q(pDst, res); - - /* Increment pointers */ - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - - - if (blkCnt > 0U) - { - /* C = |A| */ - mve_pred16_t p0 = vctp32q(blkCnt); - vec1 = vld1q(pSrc); - vstrwq_p(pDst, vabsq(vec1), p0); - } - -} - -#else -void arm_abs_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t vec1; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute values and then store the results in the destination buffer. */ - vec1 = vld1q_f32(pSrc); - res = vabsq_f32(vec1); - vst1q_f32(pDst, res); - - /* Increment pointers */ - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute and store result in destination buffer. */ - *pDst++ = fabsf(*pSrc++); - - *pDst++ = fabsf(*pSrc++); - - *pDst++ = fabsf(*pSrc++); - - *pDst++ = fabsf(*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute and store result in destination buffer. */ - *pDst++ = fabsf(*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of BasicAbs group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f64.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f64.c deleted file mode 100644 index 62c51d4..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f64.c +++ /dev/null @@ -1,74 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_abs_f64.c - * Description: Floating-point vector absolute value - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" -#include - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicAbs - @{ - */ - -/** - @brief Floating-point vector absolute value. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_abs_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute and store result in destination buffer. */ - *pDst++ = fabs(*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of BasicAbs group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c deleted file mode 100644 index b2ec770..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c +++ /dev/null @@ -1,178 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_abs_q15.c - * Description: Q15 vector absolute value - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicAbs - @{ - */ - -/** - @brief Q15 vector absolute value. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_abs_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* - * C = |A| - * Calculate absolute and then store the results in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vst1q(pDst, vqabsq(vecSrc)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 8; - pDst += 8; - } - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecSrc = vld1q(pSrc); - vstrhq_p(pDst, vqabsq(vecSrc), p0); - } -} - -#else -void arm_abs_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - q15_t in; /* Temporary input variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */ - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in); -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in); -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in); -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */ - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicAbs group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c deleted file mode 100644 index 8322d8e..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c +++ /dev/null @@ -1,208 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_abs_q31.c - * Description: Q31 vector absolute value - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicAbs - @{ - */ - -/** - @brief Q31 vector absolute value. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_abs_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counters */ - q31x4_t vecSrc; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - /* - * C = |A| - * Calculate absolute and then store the results in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vst1q(pDst, vqabsq(vecSrc)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * Advance vector source and destination pointers - */ - pSrc += 4; - pDst += 4; - } - /* - * Tail - */ - blkCnt = blockSize & 3; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecSrc = vld1q(pSrc); - vstrwq_p(pDst, vqabsq(vecSrc), p0); - } -} - -#else -void arm_abs_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t in; /* Temporary variable */ - -#if defined(ARM_MATH_NEON) - int32x4_t vec1; - int32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = |A| */ - /* Calculate absolute and then store the results in the destination buffer. */ - - vec1 = vld1q_s32(pSrc); - res = vqabsq_s32(vec1); - vst1q_s32(pDst, res); - - /* Increment pointers */ - pSrc += 4; - pDst += 4; - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */ - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in); -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in); -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in); -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined (ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */ - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* #if defined (ARM_MATH_MVEI) */ -/** - @} end of BasicAbs group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c deleted file mode 100644 index c910721..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c +++ /dev/null @@ -1,180 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_abs_q7.c - * Description: Q7 vector absolute value - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicAbs - @{ - */ - -/** - @brief Q7 vector absolute value. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Conditions for optimum performance - Input and output buffers should be aligned by 32-bit - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_abs_q7( - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - /* - * C = |A| - * Calculate absolute and then store the results in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vst1q(pDst, vqabsq(vecSrc)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 16; - pDst += 16; - } - /* - * tail - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecSrc = vld1q(pSrc); - vstrbq_p(pDst, vqabsq(vecSrc), p0); - } -} - -#else -void arm_abs_q7( - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - q7_t in; /* Temporary input variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */ - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in); -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in); -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in); -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */ - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = (in > 0) ? in : (q7_t) __QSUB8(0, in); -#else - *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicAbs group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f16.c deleted file mode 100644 index bac1ee9..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f16.c +++ /dev/null @@ -1,169 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_add_f16.c - * Description: Floating-point vector addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions_f16.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicAdd Vector Addition - - Element-by-element addition of two vectors. - - 
-      pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.
-
- - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicAdd - @{ - */ - -/** - @brief Floating-point vector addition. - @param[in] pSrcA points to first input vector - @param[in] pSrcB points to second input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_add_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - f16x8_t vec1; - f16x8_t vec2; - f16x8_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and then store the results in the destination buffer. */ - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - res = vaddq(vec1, vec2); - vst1q(pDst, res); - - /* Increment pointers */ - pSrcA += 8; - pSrcB += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x7; - - if (blkCnt > 0U) - { - /* C = A + B */ - mve_pred16_t p0 = vctp16q(blkCnt); - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - vstrhq_p(pDst, vaddq(vec1,vec2), p0); - } - -} - -#else -#if defined(ARM_FLOAT16_SUPPORTED) -void arm_add_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and store result in destination buffer. */ - *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++); - *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++); - *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++); - *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and store result in destination buffer. */ - *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_FLOAT16_SUPPORTED) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicAdd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c deleted file mode 100644 index 045050e..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c +++ /dev/null @@ -1,199 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_add_f32.c - * Description: Floating-point vector addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicAdd Vector Addition - - Element-by-element addition of two vectors. - - 
-      pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.
-
- - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicAdd - @{ - */ - -/** - @brief Floating-point vector addition. - @param[in] pSrcA points to first input vector - @param[in] pSrcB points to second input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_add_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - f32x4_t vec1; - f32x4_t vec2; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and then store the results in the destination buffer. */ - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - res = vaddq(vec1, vec2); - vst1q(pDst, res); - - /* Increment pointers */ - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - - if (blkCnt > 0U) - { - /* C = A + B */ - mve_pred16_t p0 = vctp32q(blkCnt); - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - vstrwq_p(pDst, vaddq(vec1,vec2), p0); - } - -} - -#else -void arm_add_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t vec1; - f32x4_t vec2; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and then store the results in the destination buffer. */ - vec1 = vld1q_f32(pSrcA); - vec2 = vld1q_f32(pSrcB); - res = vaddq_f32(vec1, vec2); - vst1q_f32(pDst, res); - - /* Increment pointers */ - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and store result in destination buffer. */ - *pDst++ = (*pSrcA++) + (*pSrcB++); - *pDst++ = (*pSrcA++) + (*pSrcB++); - *pDst++ = (*pSrcA++) + (*pSrcB++); - *pDst++ = (*pSrcA++) + (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and store result in destination buffer. */ - *pDst++ = (*pSrcA++) + (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicAdd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f64.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f64.c deleted file mode 100644 index b90d46f..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f64.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_add_f64.c - * Description: Floating-point vector addition - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicAdd - @{ - */ - -/** - @brief Floating-point vector addition. - @param[in] pSrcA points to first input vector - @param[in] pSrcB points to second input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_add_f64( - const float64_t * pSrcA, - const float64_t * pSrcB, - float64_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and store result in destination buffer. */ - *pDst++ = (*pSrcA++) + (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of BasicAdd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c deleted file mode 100644 index 8d55e2d..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c +++ /dev/null @@ -1,176 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_add_q15.c - * Description: Q15 vector addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicAdd - @{ - */ - -/** - @brief Q15 vector addition. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_add_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecA; - q15x8_t vecB; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* - * C = A + B - * Add and then store the results in the destination buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vst1q(pDst, vqaddq(vecA, vecB)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 8; - pSrcB += 8; - pDst += 8; - } - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vstrhq_p(pDst, vqaddq(vecA, vecB), p0); - } -} - -#else -void arm_add_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q31_t inA1, inA2; - q31_t inB1, inB2; -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + B */ - -#if defined (ARM_MATH_DSP) - /* read 2 times 2 samples at a time from sourceA */ - inA1 = read_q15x2_ia (&pSrcA); - inA2 = read_q15x2_ia (&pSrcA); - /* read 2 times 2 samples at a time from sourceB */ - inB1 = read_q15x2_ia (&pSrcB); - inB2 = read_q15x2_ia (&pSrcB); - - /* Add and store 2 times 2 samples at a time */ - write_q15x2_ia (&pDst, __QADD16(inA1, inB1)); - write_q15x2_ia (&pDst, __QADD16(inA2, inB2)); -#else - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16); - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16); - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16); - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and store result in destination buffer. */ -#if defined (ARM_MATH_DSP) - *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++); -#else - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ -/** - @} end of BasicAdd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c deleted file mode 100644 index 8f24abf..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c +++ /dev/null @@ -1,159 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_add_q31.c - * Description: Q31 vector addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicAdd - @{ - */ - -/** - @brief Q31 vector addition. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_add_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - q31x4_t vecA; - q31x4_t vecB; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* - * C = A + B - * Add and then store the results in the destination buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vst1q(pDst, vqaddq(vecA, vecB)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 4; - pSrcB += 4; - pDst += 4; - } - /* - * tail - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vstrwq_p(pDst, vqaddq(vecA, vecB), p0); - } -} - -#else -void arm_add_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and store result in destination buffer. */ - *pDst++ = __QADD(*pSrcA++, *pSrcB++); - - *pDst++ = __QADD(*pSrcA++, *pSrcB++); - - *pDst++ = __QADD(*pSrcA++, *pSrcB++); - - *pDst++ = __QADD(*pSrcA++, *pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and store result in destination buffer. */ - *pDst++ = __QADD(*pSrcA++, *pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -#endif /* defined(ARM_MATH_MVEI) */ -/** - @} end of BasicAdd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c deleted file mode 100644 index e4900c7..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_add_q7.c - * Description: Q7 vector addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicAdd - @{ - */ - -/** - @brief Q7 vector addition. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q7 range [0x80 0x7F] are saturated. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_add_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecA; - q7x16_t vecB; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - /* - * C = A + B - * Add and then store the results in the destination buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vst1q(pDst, vqaddq(vecA, vecB)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 16; - pSrcB += 16; - pDst += 16; - } - /* - * tail - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vstrbq_p(pDst, vqaddq(vecA, vecB), p0); - } -} -#else -void arm_add_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + B */ - -#if defined (ARM_MATH_DSP) - /* Add and store result in destination buffer (4 samples at a time). */ - write_q7x4_ia (&pDst, __QADD8 (read_q7x4_ia (&pSrcA), read_q7x4_ia (&pSrcB))); -#else - *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8); - *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8); - *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8); - *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and store result in destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ + *pSrcB++, 8); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ -/** - @} end of BasicAdd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c deleted file mode 100644 index a5e00f1..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c +++ /dev/null @@ -1,137 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_and_u16.c - * Description: uint16_t bitwise AND - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup And Vector bitwise AND - - Compute the logical bitwise AND. - - There are separate functions for uint32_t, uint16_t, and uint7_t data types. - */ - -/** - @addtogroup And - @{ - */ - -/** - @brief Compute the logical bitwise AND of two fixed-point vectors. - @param[in] pSrcA points to input vector A - @param[in] pSrcB points to input vector B - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_and_u16( - const uint16_t * pSrcA, - const uint16_t * pSrcB, - uint16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint16x8_t vecSrcA, vecSrcB; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vst1q(pDst, vandq_u16(vecSrcA, vecSrcB) ); - - pSrcA += 8; - pSrcB += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 7; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - vstrhq_p(pDst, vandq_u16(vecSrcA, vecSrcB), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint16x8_t vecA, vecB; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - vecA = vld1q_u16(pSrcA); - vecB = vld1q_u16(pSrcB); - - vst1q_u16(pDst, vandq_u16(vecA, vecB) ); - - pSrcA += 8; - pSrcB += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 7; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = (*pSrcA++)&(*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} - -/** - @} end of And group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c deleted file mode 100644 index 9f44175..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_and_u32.c - * Description: uint32_t bitwise AND - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup And - @{ - */ - -/** - @brief Compute the logical bitwise AND of two fixed-point vectors. - @param[in] pSrcA points to input vector A - @param[in] pSrcB points to input vector B - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_and_u32( - const uint32_t * pSrcA, - const uint32_t * pSrcB, - uint32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32x4_t vecSrcA, vecSrcB; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vst1q(pDst, vandq_u32(vecSrcA, vecSrcB) ); - - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 3; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - vstrwq_p(pDst, vandq_u32(vecSrcA, vecSrcB), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32x4_t vecA, vecB; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - vecA = vld1q_u32(pSrcA); - vecB = vld1q_u32(pSrcB); - - vst1q_u32(pDst, vandq_u32(vecA, vecB) ); - - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 3; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = (*pSrcA++)&(*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} - -/** - @} end of And group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c deleted file mode 100644 index e9a7dfd..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_and_u8.c - * Description: uint8_t bitwise AND - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - - -/** - @addtogroup And - @{ - */ - -/** - @brief Compute the logical bitwise AND of two fixed-point vectors. - @param[in] pSrcA points to input vector A - @param[in] pSrcB points to input vector B - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_and_u8( - const uint8_t * pSrcA, - const uint8_t * pSrcB, - uint8_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint8x16_t vecSrcA, vecSrcB; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vst1q(pDst, vandq_u8(vecSrcA, vecSrcB) ); - - pSrcA += 16; - pSrcB += 16; - pDst += 16; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0xF; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - vstrbq_p(pDst, vandq_u8(vecSrcA, vecSrcB), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint8x16_t vecA, vecB; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4U; - - while (blkCnt > 0U) - { - vecA = vld1q_u8(pSrcA); - vecB = vld1q_u8(pSrcB); - - vst1q_u8(pDst, vandq_u8(vecA, vecB) ); - - pSrcA += 16; - pSrcB += 16; - pDst += 16; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0xF; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = (*pSrcA++)&(*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} - -/** - @} end of And group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f16.c deleted file mode 100644 index 76e2cac..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f16.c +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_clip_f16.c - * Description: Floating-point vector addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions_f16.h" - -/** - @ingroup groupMath - */ - - -/** - @addtogroup BasicClip - @{ - */ - -/** - @brief Elementwise floating-point clipping - @param[in] pSrc points to input values - @param[out] pDst points to output clipped values - @param[in] low lower bound - @param[in] high higher bound - @param[in] numSamples number of samples to clip - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_clip_f16(const float16_t * pSrc, - float16_t * pDst, - float16_t low, - float16_t high, - uint32_t numSamples) -{ - uint32_t blkCnt; - f16x8_t curVec0, curVec1; - f16x8_t vecLow, vecHigh; - - vecLow = vdupq_n_f16(low); - vecHigh = vdupq_n_f16(high); - - curVec0 = vld1q(pSrc); - pSrc += 8; - /* - * unrolled x 2 to allow - * vldr/vstr/vmin/vmax - * stall free interleaving - */ - blkCnt = numSamples >> 4; - while (blkCnt--) - { - curVec0 = vmaxnmq(curVec0, vecLow); - curVec1 = vld1q(pSrc); - pSrc += 8; - curVec0 = vminnmq(curVec0, vecHigh); - vst1q(pDst, curVec0); - pDst += 8; - curVec1 = vmaxnmq(curVec1, vecLow); - curVec0 = vld1q(pSrc); - pSrc += 8; - curVec1 = vminnmq(curVec1, vecHigh); - vst1q(pDst, curVec1); - pDst += 8; - } - /* - * Tail handling - */ - blkCnt = numSamples - ((numSamples >> 4) << 4); - if (blkCnt >= 8) - { - curVec0 = vmaxnmq(curVec0, vecLow); - curVec0 = vminnmq(curVec0, vecHigh); - vst1q(pDst, curVec0); - pDst += 8; - curVec0 = vld1q(pSrc); - pSrc += 8; - } - - if (blkCnt > 0) - { - mve_pred16_t p0 = vctp16q(blkCnt & 7); - curVec0 = vmaxnmq(curVec0, vecLow); - curVec0 = vminnmq(curVec0, vecHigh); - vstrhq_p(pDst, curVec0, p0); - } -} - -#else - -#if defined(ARM_FLOAT16_SUPPORTED) - -void arm_clip_f16(const float16_t * pSrc, - float16_t * pDst, - float16_t low, - float16_t high, - uint32_t numSamples) -{ - for (uint32_t i = 0; i < numSamples; i++) - { - if ((_Float16)pSrc[i] > (_Float16)high) - pDst[i] = high; - else if ((_Float16)pSrc[i] < (_Float16)low) - pDst[i] = low; - else - pDst[i] = pSrc[i]; - } -} -#endif /* defined(ARM_FLOAT16_SUPPORTED */ - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - @} end of BasicClip group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f32.c deleted file mode 100644 index 0ee1a41..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f32.c +++ /dev/null @@ -1,144 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_clip_f32.c - * Description: Floating-point vector addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicClip Elementwise clipping - - Element-by-element clipping of a value. - - The value is constrained between 2 bounds. - - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicClip - @{ - */ - -/** - @brief Elementwise floating-point clipping - @param[in] pSrc points to input values - @param[out] pDst points to output clipped values - @param[in] low lower bound - @param[in] high higher bound - @param[in] numSamples number of samples to clip - @return none - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_clip_f32(const float32_t * pSrc, - float32_t * pDst, - float32_t low, - float32_t high, - uint32_t numSamples) -{ - uint32_t blkCnt; - f32x4_t curVec0, curVec1; - f32x4_t vecLow, vecHigh; - - vecLow = vdupq_n_f32(low); - vecHigh = vdupq_n_f32(high); - - curVec0 = vld1q(pSrc); - pSrc += 4; - /* - * unrolled x 2 to allow - * vldr/vstr/vmin/vmax - * stall free interleaving - */ - blkCnt = numSamples >> 3; - while (blkCnt--) - { - curVec0 = vmaxnmq(curVec0, vecLow); - curVec1 = vld1q(pSrc); - pSrc += 4; - curVec0 = vminnmq(curVec0, vecHigh); - vst1q(pDst, curVec0); - pDst += 4; - curVec1 = vmaxnmq(curVec1, vecLow); - curVec0 = vld1q(pSrc); - pSrc += 4; - curVec1 = vminnmq(curVec1, vecHigh); - vst1q(pDst, curVec1); - pDst += 4; - } - /* - * Tail handling - */ - blkCnt = numSamples - ((numSamples >> 3) << 3); - if (blkCnt >= 4) - { - curVec0 = vmaxnmq(curVec0, vecLow); - curVec0 = vminnmq(curVec0, vecHigh); - vst1q(pDst, curVec0); - pDst += 4; - curVec0 = vld1q(pSrc); - pSrc += 4; - } - - if (blkCnt > 0) - { - mve_pred16_t p0 = vctp32q(blkCnt & 3); - curVec0 = vmaxnmq(curVec0, vecLow); - curVec0 = vminnmq(curVec0, vecHigh); - vstrwq_p(pDst, curVec0, p0); - } -} - -#else -void arm_clip_f32(const float32_t * pSrc, - float32_t * pDst, - float32_t low, - float32_t high, - uint32_t numSamples) -{ - uint32_t i; - for (i = 0; i < numSamples; i++) - { - if (pSrc[i] > high) - pDst[i] = high; - else if (pSrc[i] < low) - pDst[i] = low; - else - pDst[i] = pSrc[i]; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicClip group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q15.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q15.c deleted file mode 100644 index 08623ba..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q15.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_clip_q15.c - * Description: Floating-point vector addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - - -/** - @addtogroup BasicClip - @{ - */ - -/** - @brief Elementwise fixed-point clipping - @param[in] pSrc points to input values - @param[out] pDst points to output clipped values - @param[in] low lower bound - @param[in] high higher bound - @param[in] numSamples number of samples to clip - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_clip_q15(const q15_t * pSrc, - q15_t * pDst, - q15_t low, - q15_t high, - uint32_t numSamples) -{ - uint32_t blkCnt; - q15x8_t curVec0, curVec1; - q15x8_t vecLow, vecHigh; - - vecLow = vdupq_n_s16(low); - vecHigh = vdupq_n_s16(high); - - curVec0 = vld1q(pSrc); - pSrc += 8; - /* - * unrolled x 2 to allow - * vldr/vstr/vmin/vmax - * stall free interleaving - */ - blkCnt = numSamples >> 4; - while (blkCnt--) - { - curVec0 = vmaxq(curVec0, vecLow); - curVec1 = vld1q(pSrc); - pSrc += 8; - curVec0 = vminq(curVec0, vecHigh); - vst1q(pDst, curVec0); - pDst += 8; - curVec1 = vmaxq(curVec1, vecLow); - curVec0 = vld1q(pSrc); - pSrc += 8; - curVec1 = vminq(curVec1, vecHigh); - vst1q(pDst, curVec1); - pDst += 8; - } - /* - * Tail handling - */ - blkCnt = numSamples - ((numSamples >> 4) << 4); - if (blkCnt >= 8) - { - curVec0 = vmaxq(curVec0, vecLow); - curVec0 = vminq(curVec0, vecHigh); - vst1q(pDst, curVec0); - pDst += 8; - curVec0 = vld1q(pSrc); - pSrc += 8; - } - - if (blkCnt > 0) - { - mve_pred16_t p0 = vctp16q(blkCnt & 7); - curVec0 = vmaxq(curVec0, vecLow); - curVec0 = vminq(curVec0, vecHigh); - vstrhq_p(pDst, curVec0, p0); - } -} - -#else -void arm_clip_q15(const q15_t * pSrc, - q15_t * pDst, - q15_t low, - q15_t high, - uint32_t numSamples) -{ - uint32_t i; - for (i = 0; i < numSamples; i++) - { - if (pSrc[i] > high) - pDst[i] = high; - else if (pSrc[i] < low) - pDst[i] = low; - else - pDst[i] = pSrc[i]; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicClip group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q31.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q31.c deleted file mode 100644 index 0ddba06..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q31.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_clip_q31.c - * Description: Floating-point vector addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - - -/** - @addtogroup BasicClip - @{ - */ - -/** - @brief Elementwise fixed-point clipping - @param[in] pSrc points to input values - @param[out] pDst points to output clipped values - @param[in] low lower bound - @param[in] high higher bound - @param[in] numSamples number of samples to clip - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_clip_q31(const q31_t * pSrc, - q31_t * pDst, - q31_t low, - q31_t high, - uint32_t numSamples) -{ - uint32_t blkCnt; - q31x4_t curVec0, curVec1; - q31x4_t vecLow, vecHigh; - - vecLow = vdupq_n_s32(low); - vecHigh = vdupq_n_s32(high); - - curVec0 = vld1q(pSrc); - pSrc += 4; - /* - * unrolled x 2 to allow - * vldr/vstr/vmin/vmax - * stall free interleaving - */ - blkCnt = numSamples >> 3; - while (blkCnt--) - { - curVec0 = vmaxq(curVec0, vecLow); - curVec1 = vld1q(pSrc); - pSrc += 4; - curVec0 = vminq(curVec0, vecHigh); - vst1q(pDst, curVec0); - pDst += 4; - curVec1 = vmaxq(curVec1, vecLow); - curVec0 = vld1q(pSrc); - pSrc += 4; - curVec1 = vminq(curVec1, vecHigh); - vst1q(pDst, curVec1); - pDst += 4; - } - /* - * Tail handling - */ - blkCnt = numSamples - ((numSamples >> 3) << 3); - if (blkCnt >= 4) - { - curVec0 = vmaxq(curVec0, vecLow); - curVec0 = vminq(curVec0, vecHigh); - vst1q(pDst, curVec0); - pDst += 4; - curVec0 = vld1q(pSrc); - pSrc += 4; - } - - if (blkCnt > 0) - { - mve_pred16_t p0 = vctp32q(blkCnt & 3); - curVec0 = vmaxq(curVec0, vecLow); - curVec0 = vminq(curVec0, vecHigh); - vstrwq_p(pDst, curVec0, p0); - } -} - -#else -void arm_clip_q31(const q31_t * pSrc, - q31_t * pDst, - q31_t low, - q31_t high, - uint32_t numSamples) -{ - uint32_t i; - for (i = 0; i < numSamples; i++) - { - if (pSrc[i] > high) - pDst[i] = high; - else if (pSrc[i] < low) - pDst[i] = low; - else - pDst[i] = pSrc[i]; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicClip group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q7.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q7.c deleted file mode 100644 index 9b4409d..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q7.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_clip_q7.c - * Description: Floating-point vector addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - - -/** - @addtogroup BasicClip - @{ - */ - -/** - @brief Elementwise fixed-point clipping - @param[in] pSrc points to input values - @param[out] pDst points to output clipped values - @param[in] low lower bound - @param[in] high higher bound - @param[in] numSamples number of samples to clip - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_clip_q7(const q7_t * pSrc, - q7_t * pDst, - q7_t low, - q7_t high, - uint32_t numSamples) -{ - uint32_t blkCnt; - q7x16_t curVec0, curVec1; - q7x16_t vecLow, vecHigh; - - vecLow = vdupq_n_s8(low); - vecHigh = vdupq_n_s8(high); - - curVec0 = vld1q(pSrc); - pSrc += 16; - /* - * unrolled x 2 to allow - * vldr/vstr/vmin/vmax - * stall free interleaving - */ - blkCnt = numSamples >> 5; - while (blkCnt--) - { - curVec0 = vmaxq(curVec0, vecLow); - curVec1 = vld1q(pSrc); - pSrc += 16; - curVec0 = vminq(curVec0, vecHigh); - vst1q(pDst, curVec0); - pDst += 16; - curVec1 = vmaxq(curVec1, vecLow); - curVec0 = vld1q(pSrc); - pSrc += 16; - curVec1 = vminq(curVec1, vecHigh); - vst1q(pDst, curVec1); - pDst += 16; - } - /* - * Tail handling - */ - blkCnt = numSamples - ((numSamples >> 5) << 5); - if (blkCnt >= 16) - { - curVec0 = vmaxq(curVec0, vecLow); - curVec0 = vminq(curVec0, vecHigh); - vst1q(pDst, curVec0); - pDst += 16; - curVec0 = vld1q(pSrc); - pSrc += 16; - } - - if (blkCnt > 0) - { - mve_pred16_t p0 = vctp8q(blkCnt & 0xf); - curVec0 = vmaxq(curVec0, vecLow); - curVec0 = vminq(curVec0, vecHigh); - vstrbq_p(pDst, curVec0, p0); - } -} - -#else -void arm_clip_q7(const q7_t * pSrc, - q7_t * pDst, - q7_t low, - q7_t high, - uint32_t numSamples) -{ - uint32_t i; - for (i = 0; i < numSamples; i++) - { - if (pSrc[i] > high) - pDst[i] = high; - else if (pSrc[i] < low) - pDst[i] = low; - else - pDst[i] = pSrc[i]; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicClip group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f16.c deleted file mode 100644 index 983fdf7..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f16.c +++ /dev/null @@ -1,184 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dot_prod_f16.c - * Description: Floating-point dot product - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions_f16.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicDotProd Vector Dot Product - - Computes the dot product of two vectors. - The vectors are multiplied element-by-element and then summed. - - 
-      sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
-
- - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicDotProd - @{ - */ - -/** - @brief Dot product of floating-point vectors. - @param[in] pSrcA points to the first input vector. - @param[in] pSrcB points to the second input vector. - @param[in] blockSize number of samples in each vector. - @param[out] result output result returned here. - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - -void arm_dot_prod_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - uint32_t blockSize, - float16_t * result) -{ - f16x8_t vecA, vecB; - f16x8_t vecSum; - uint32_t blkCnt; - float16_t sum = 0.0f; - vecSum = vdupq_n_f16(0.0f); - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - while (blkCnt > 0U) - { - /* - * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] - * Calculate dot product and then store the result in a temporary buffer. - * and advance vector source and destination pointers - */ - vecA = vld1q(pSrcA); - pSrcA += 8; - - vecB = vld1q(pSrcB); - pSrcB += 8; - - vecSum = vfmaq(vecSum, vecA, vecB); - /* - * Decrement the blockSize loop counter - */ - blkCnt --; - } - - - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vecSum = vfmaq_m(vecSum, vecA, vecB, p0); - } - - sum = vecAddAcrossF16Mve(vecSum); - - /* Store result in destination buffer */ - *result = sum; - -} - -#else -#if defined(ARM_FLOAT16_SUPPORTED) -void arm_dot_prod_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - uint32_t blockSize, - float16_t * result) -{ - uint32_t blkCnt; /* Loop counter */ - _Float16 sum = 0.0f; /* Temporary return variable */ - - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - /* Calculate dot product and store result in a temporary buffer. */ - sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++); - - sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++); - - sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++); - - sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - /* Calculate dot product and store result in a temporary buffer. */ - sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in destination buffer */ - *result = sum; -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of BasicDotProd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c deleted file mode 100644 index 6e115a2..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c +++ /dev/null @@ -1,228 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dot_prod_f32.c - * Description: Floating-point dot product - * - * $Date: 05 October 2021 - * $Revision: V1.9.1 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicDotProd Vector Dot Product - - Computes the dot product of two vectors. - The vectors are multiplied element-by-element and then summed. - - 
-      sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
-
- - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicDotProd - @{ - */ - -/** - @brief Dot product of floating-point vectors. - @param[in] pSrcA points to the first input vector. - @param[in] pSrcB points to the second input vector. - @param[in] blockSize number of samples in each vector. - @param[out] result output result returned here. - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - -void arm_dot_prod_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t blockSize, - float32_t * result) -{ - f32x4_t vecA, vecB; - f32x4_t vecSum; - uint32_t blkCnt; - float32_t sum = 0.0f; - vecSum = vdupq_n_f32(0.0f); - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - /* - * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] - * Calculate dot product and then store the result in a temporary buffer. - * and advance vector source and destination pointers - */ - vecA = vld1q(pSrcA); - pSrcA += 4; - - vecB = vld1q(pSrcB); - pSrcB += 4; - - vecSum = vfmaq(vecSum, vecA, vecB); - /* - * Decrement the blockSize loop counter - */ - blkCnt --; - } - - - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vecSum = vfmaq_m(vecSum, vecA, vecB, p0); - } - - sum = vecAddAcrossF32Mve(vecSum); - - /* Store result in destination buffer */ - *result = sum; - -} - -#else - -void arm_dot_prod_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t blockSize, - float32_t * result) -{ - uint32_t blkCnt; /* Loop counter */ - float32_t sum = 0.0f; /* Temporary return variable */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t vec1; - f32x4_t vec2; - f32x4_t accum = vdupq_n_f32(0); -#if !defined(__aarch64__) - f32x2_t tmp = vdup_n_f32(0); -#endif - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - vec1 = vld1q_f32(pSrcA); - vec2 = vld1q_f32(pSrcB); - - while (blkCnt > 0U) - { - /* C = A[0]*B[0] + A[1]*B[1] + A[2]*B[2] + ... + A[blockSize-1]*B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - - accum = vmlaq_f32(accum, vec1, vec2); - - /* Increment pointers */ - pSrcA += 4; - pSrcB += 4; - - vec1 = vld1q_f32(pSrcA); - vec2 = vld1q_f32(pSrcB); - - /* Decrement the loop counter */ - blkCnt--; - } - -#if defined(__aarch64__) - sum = vpadds_f32(vpadd_f32(vget_low_f32(accum), vget_high_f32(accum))); -#else - tmp = vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)); - sum = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1); - -#endif - - /* Tail */ - blkCnt = blockSize & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - /* Calculate dot product and store result in a temporary buffer. */ - sum += (*pSrcA++) * (*pSrcB++); - - sum += (*pSrcA++) * (*pSrcB++); - - sum += (*pSrcA++) * (*pSrcB++); - - sum += (*pSrcA++) * (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - /* Calculate dot product and store result in a temporary buffer. */ - sum += (*pSrcA++) * (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in destination buffer */ - *result = sum; -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of BasicDotProd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f64.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f64.c deleted file mode 100644 index 8cc552f..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f64.c +++ /dev/null @@ -1,78 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dot_prod_f64.c - * Description: Floating-point dot product - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicDotProd - @{ - */ - -/** - @brief Dot product of floating-point vectors. - @param[in] pSrcA points to the first input vector. - @param[in] pSrcB points to the second input vector. - @param[in] blockSize number of samples in each vector. - @param[out] result output result returned here. - @return none - */ - -void arm_dot_prod_f64( - const float64_t * pSrcA, - const float64_t * pSrcB, - uint32_t blockSize, - float64_t * result) -{ - uint32_t blkCnt; /* Loop counter */ - float64_t sum = 0.; /* Temporary return variable */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - /* Calculate dot product and store result in a temporary buffer. */ - sum += (*pSrcA++) * (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in destination buffer */ - *result = sum; -} - -/** - @} end of BasicDotProd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c deleted file mode 100644 index 14a8ddd..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c +++ /dev/null @@ -1,172 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dot_prod_q15.c - * Description: Q15 dot product - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicDotProd - @{ - */ - -/** - @brief Dot product of Q15 vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in each vector - @param[out] result output result returned here - @return none - - @par Scaling and Overflow Behavior - The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these - results are added to a 64-bit accumulator in 34.30 format. - Nonsaturating additions are used and given that there are 33 guard bits in the accumulator - there is no risk of overflow. - The return result is in 34.30 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_dot_prod_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - uint32_t blockSize, - q63_t * result) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecA; - q15x8_t vecB; - q63_t sum = 0LL; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* - * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] - * Calculate dot product and then store the result in a temporary buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - sum = vmlaldavaq(sum, vecA, vecB); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 8; - pSrcB += 8; - } - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - sum = vmlaldavaq_p(sum, vecA, vecB, p0); - } - - *result = sum; -} - -#else -void arm_dot_prod_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - uint32_t blockSize, - q63_t * result) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t sum = 0; /* Temporary return variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - -#if defined (ARM_MATH_DSP) - /* Calculate dot product and store result in a temporary buffer. */ - sum = __SMLALD(read_q15x2_ia (&pSrcA), read_q15x2_ia (&pSrcB), sum); - sum = __SMLALD(read_q15x2_ia (&pSrcA), read_q15x2_ia (&pSrcB), sum); -#else - sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++); - sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++); - sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++); - sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - /* Calculate dot product and store result in a temporary buffer. */ -//#if defined (ARM_MATH_DSP) -// sum = __SMLALD(*pSrcA++, *pSrcB++, sum); -//#else - sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++); -//#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in destination buffer in 34.30 format */ - *result = sum; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicDotProd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c deleted file mode 100644 index f36742a..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c +++ /dev/null @@ -1,174 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dot_prod_q31.c - * Description: Q31 dot product - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicDotProd - @{ - */ - -/** - @brief Dot product of Q31 vectors. - @param[in] pSrcA points to the first input vector. - @param[in] pSrcB points to the second input vector. - @param[in] blockSize number of samples in each vector. - @param[out] result output result returned here. - @return none - - @par Scaling and Overflow Behavior - The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these - are truncated to 2.48 format by discarding the lower 14 bits. - The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. - There are 15 guard bits in the accumulator and there is no risk of overflow as long as - the length of the vectors is less than 2^16 elements. - The return result is in 16.48 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_dot_prod_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - uint32_t blockSize, - q63_t * result) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecA; - q31x4_t vecB; - q63_t sum = 0LL; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* - * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] - * Calculate dot product and then store the result in a temporary buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - sum = vrmlaldavhaq(sum, vecA, vecB); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 4; - pSrcB += 4; - } - /* - * tail - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - sum = vrmlaldavhaq_p(sum, vecA, vecB, p0); - } - - /* - * vrmlaldavhaq provides extra intermediate accumulator headroom. - * limiting the need of intermediate scaling - * Scalar variant uses 2.48 accu format by right shifting accumulators by 14. - * 16.48 output conversion is performed outside the loop by scaling accu. by 6 - */ - *result = asrl(sum, (14 - 8)); -} - -#else -void arm_dot_prod_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - uint32_t blockSize, - q63_t * result) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t sum = 0; /* Temporary return variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - /* Calculate dot product and store result in a temporary buffer. */ - sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U; - - sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U; - - sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U; - - sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - /* Calculate dot product and store result in a temporary buffer. */ - sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in destination buffer in 16.48 format */ - *result = sum; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicDotProd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c deleted file mode 100644 index a4923ee..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c +++ /dev/null @@ -1,191 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dot_prod_q7.c - * Description: Q7 dot product - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicDotProd - @{ - */ - -/** - @brief Dot product of Q7 vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in each vector - @param[out] result output result returned here - @return none - - @par Scaling and Overflow Behavior - The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these - results are added to an accumulator in 18.14 format. - Nonsaturating additions are used and there is no danger of wrap around as long as - the vectors are less than 2^18 elements long. - The return result is in 18.14 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_dot_prod_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - uint32_t blockSize, - q31_t * result) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecA; - q7x16_t vecB; - q31_t sum = 0; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - /* - * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] - * Calculate dot product and then store the result in a temporary buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - sum = vmladavaq(sum, vecA, vecB); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 16; - pSrcB += 16; - } - /* - * tail - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - sum = vmladavaq_p(sum, vecA, vecB, p0); - } - - *result = sum; -} -#else -void arm_dot_prod_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - uint32_t blockSize, - q31_t * result) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t sum = 0; /* Temporary return variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q31_t input1, input2; /* Temporary variables */ - q31_t inA1, inA2, inB1, inB2; /* Temporary variables */ -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - -#if defined (ARM_MATH_DSP) - /* read 4 samples at a time from sourceA */ - input1 = read_q7x4_ia (&pSrcA); - /* read 4 samples at a time from sourceB */ - input2 = read_q7x4_ia (&pSrcB); - - /* extract two q7_t samples to q15_t samples */ - inA1 = __SXTB16(__ROR(input1, 8)); - /* extract reminaing two samples */ - inA2 = __SXTB16(input1); - /* extract two q7_t samples to q15_t samples */ - inB1 = __SXTB16(__ROR(input2, 8)); - /* extract reminaing two samples */ - inB2 = __SXTB16(input2); - - /* multiply and accumulate two samples at a time */ - sum = __SMLAD(inA1, inB1, sum); - sum = __SMLAD(inA2, inB2, sum); -#else - sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++); - sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++); - sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++); - sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - - /* Calculate dot product and store result in a temporary buffer. */ -//#if defined (ARM_MATH_DSP) -// sum = __SMLAD(*pSrcA++, *pSrcB++, sum); -//#else - sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++); -//#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in destination buffer in 18.14 format */ - *result = sum; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicDotProd group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f16.c deleted file mode 100644 index b30225a..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f16.c +++ /dev/null @@ -1,171 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mult_f16.c - * Description: Floating-point vector multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions_f16.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicMult Vector Multiplication - - Element-by-element multiplication of two vectors. - - 
-      pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.
-
- - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicMult - @{ - */ - -/** - @brief Floating-point vector multiplication. - @param[in] pSrcA points to the first input vector. - @param[in] pSrcB points to the second input vector. - @param[out] pDst points to the output vector. - @param[in] blockSize number of samples in each vector. - @return none - */ - - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mult_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - f16x8_t vec1; - f16x8_t vec2; - f16x8_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and then store the results in the destination buffer. */ - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - res = vmulq(vec1, vec2); - vst1q(pDst, res); - - /* Increment pointers */ - pSrcA += 8; - pSrcB += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x7; - if (blkCnt > 0U) - { - /* C = A + B */ - mve_pred16_t p0 = vctp16q(blkCnt); - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - vstrhq_p(pDst, vmulq(vec1,vec2), p0); - } - -} - -#else -#if defined(ARM_FLOAT16_SUPPORTED) -void arm_mult_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * B */ - - /* Multiply inputs and store result in destination buffer. */ - *pDst++ = (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++); - - *pDst++ = (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++); - - *pDst++ = (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++); - - *pDst++ = (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A * B */ - - /* Multiply input and store result in destination buffer. */ - *pDst++ = (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c deleted file mode 100644 index 9c61b46..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c +++ /dev/null @@ -1,200 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mult_f32.c - * Description: Floating-point vector multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicMult Vector Multiplication - - Element-by-element multiplication of two vectors. - - 
-      pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.
-
- - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicMult - @{ - */ - -/** - @brief Floating-point vector multiplication. - @param[in] pSrcA points to the first input vector. - @param[in] pSrcB points to the second input vector. - @param[out] pDst points to the output vector. - @param[in] blockSize number of samples in each vector. - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mult_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - f32x4_t vec1; - f32x4_t vec2; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and then store the results in the destination buffer. */ - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - res = vmulq(vec1, vec2); - vst1q(pDst, res); - - /* Increment pointers */ - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - if (blkCnt > 0U) - { - /* C = A + B */ - mve_pred16_t p0 = vctp32q(blkCnt); - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - vstrwq_p(pDst, vmulq(vec1,vec2), p0); - } - -} - -#else -void arm_mult_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t vec1; - f32x4_t vec2; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * B */ - - /* Multiply the inputs and then store the results in the destination buffer. */ - vec1 = vld1q_f32(pSrcA); - vec2 = vld1q_f32(pSrcB); - res = vmulq_f32(vec1, vec2); - vst1q_f32(pDst, res); - - /* Increment pointers */ - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * B */ - - /* Multiply inputs and store result in destination buffer. */ - *pDst++ = (*pSrcA++) * (*pSrcB++); - - *pDst++ = (*pSrcA++) * (*pSrcB++); - - *pDst++ = (*pSrcA++) * (*pSrcB++); - - *pDst++ = (*pSrcA++) * (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C = A * B */ - - /* Multiply input and store result in destination buffer. */ - *pDst++ = (*pSrcA++) * (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f64.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f64.c deleted file mode 100644 index f52d8fc..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f64.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mult_f64.c - * Description: Floating-point vector multiplication - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicMult - @{ - */ - -/** - @brief Floating-point vector multiplication. - @param[in] pSrcA points to the first input vector. - @param[in] pSrcB points to the second input vector. - @param[out] pDst points to the output vector. - @param[in] blockSize number of samples in each vector. - @return none - */ - -void arm_mult_f64( - const float64_t * pSrcA, - const float64_t * pSrcB, - float64_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = A * B */ - - /* Multiply input and store result in destination buffer. */ - *pDst++ = (*pSrcA++) * (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of BasicMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c deleted file mode 100644 index 97b1120..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c +++ /dev/null @@ -1,192 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mult_q15.c - * Description: Q15 vector multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicMult - @{ - */ - -/** - @brief Q15 vector multiplication - @param[in] pSrcA points to first input vector - @param[in] pSrcB points to second input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mult_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecA, vecB; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* - * C = A * B - * Multiply the inputs and then store the results in the destination buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vst1q(pDst, vqdmulhq(vecA, vecB)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 8; - pSrcB += 8; - pDst += 8; - } - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vstrhq_p(pDst, vqdmulhq(vecA, vecB), p0); - } -} - -#else -void arm_mult_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q31_t inA1, inA2, inB1, inB2; /* Temporary input variables */ - q15_t out1, out2, out3, out4; /* Temporary output variables */ - q31_t mul1, mul2, mul3, mul4; /* Temporary variables */ -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * B */ - -#if defined (ARM_MATH_DSP) - /* read 2 samples at a time from sourceA */ - inA1 = read_q15x2_ia (&pSrcA); - /* read 2 samples at a time from sourceB */ - inB1 = read_q15x2_ia (&pSrcB); - /* read 2 samples at a time from sourceA */ - inA2 = read_q15x2_ia (&pSrcA); - /* read 2 samples at a time from sourceB */ - inB2 = read_q15x2_ia (&pSrcB); - - /* multiply mul = sourceA * sourceB */ - mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); - mul2 = (q31_t) ((q15_t) (inA1 ) * (q15_t) (inB1 )); - mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16)); - mul4 = (q31_t) ((q15_t) (inA2 ) * (q15_t) (inB2 )); - - /* saturate result to 16 bit */ - out1 = (q15_t) __SSAT(mul1 >> 15, 16); - out2 = (q15_t) __SSAT(mul2 >> 15, 16); - out3 = (q15_t) __SSAT(mul3 >> 15, 16); - out4 = (q15_t) __SSAT(mul4 >> 15, 16); - - /* store result to destination */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pDst, __PKHBT(out2, out1, 16)); - write_q15x2_ia (&pDst, __PKHBT(out4, out3, 16)); -#else - write_q15x2_ia (&pDst, __PKHBT(out1, out2, 16)); - write_q15x2_ia (&pDst, __PKHBT(out3, out4, 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - -#else - *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); - *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); - *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); - *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A * B */ - - /* Multiply inputs and store result in destination buffer. */ - *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c deleted file mode 100644 index 6219f08..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c +++ /dev/null @@ -1,168 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mult_q31.c - * Description: Q31 vector multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicMult - @{ - */ - -/** - @brief Q31 vector multiplication. - @param[in] pSrcA points to the first input vector. - @param[in] pSrcB points to the second input vector. - @param[out] pDst points to the output vector. - @param[in] blockSize number of samples in each vector. - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mult_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecA, vecB; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* - * C = A * B - * Multiply the inputs and then store the results in the destination buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vst1q(pDst, vqdmulhq(vecA, vecB)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 4; - pSrcB += 4; - pDst += 4; - } - /* - * tail - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vstrwq_p(pDst, vqdmulhq(vecA, vecB), p0); - } -} - -#else -void arm_mult_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t out; /* Temporary output variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * B */ - - /* Multiply inputs and store result in destination buffer. */ - out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32; - out = __SSAT(out, 31); - *pDst++ = out << 1U; - - out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32; - out = __SSAT(out, 31); - *pDst++ = out << 1U; - - out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32; - out = __SSAT(out, 31); - *pDst++ = out << 1U; - - out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32; - out = __SSAT(out, 31); - *pDst++ = out << 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A * B */ - - /* Multiply inputs and store result in destination buffer. */ - out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32; - out = __SSAT(out, 31); - *pDst++ = out << 1U; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c deleted file mode 100644 index f08bb7f..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c +++ /dev/null @@ -1,168 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mult_q7.c - * Description: Q7 vector multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicMult - @{ - */ - -/** - @brief Q7 vector multiplication - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q7 range [0x80 0x7F] are saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mult_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecA, vecB; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - /* - * C = A * B - * Multiply the inputs and then store the results in the destination buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vst1q(pDst, vqdmulhq(vecA, vecB)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 16; - pSrcB += 16; - pDst += 16; - } - /* - * tail - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vstrbq_p(pDst, vqdmulhq(vecA, vecB), p0); - } -} - -#else -void arm_mult_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q7_t out1, out2, out3, out4; /* Temporary output variables */ -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * B */ - -#if defined (ARM_MATH_DSP) - /* Multiply inputs and store results in temporary variables */ - out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - - /* Pack and store result in destination buffer (in single write) */ - write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4)); -#else - *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A * B */ - - /* Multiply input and store result in destination buffer. */ - *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f16.c deleted file mode 100644 index 42e7af3..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f16.c +++ /dev/null @@ -1,166 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_negate_f16.c - * Description: Negates floating-point vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions_f16.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicNegate Vector Negate - - Negates the elements of a vector. - - 
-      pDst[n] = -pSrc[n],   0 <= n < blockSize.
-
- - The functions support in-place computation allowing the source and - destination pointers to reference the same memory buffer. - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicNegate - @{ - */ - -/** - @brief Negates the elements of a floating-point vector. - @param[in] pSrc points to input vector. - @param[out] pDst points to output vector. - @param[in] blockSize number of samples in each vector. - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_negate_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - f16x8_t vec1; - f16x8_t res; - - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute values and then store the results in the destination buffer. */ - vec1 = vld1q(pSrc); - res = vnegq(vec1); - vst1q(pDst, res); - - /* Increment pointers */ - pSrc += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x7; - if (blkCnt > 0U) - { - /* C = |A| */ - mve_pred16_t p0 = vctp16q(blkCnt); - vec1 = vld1q((float16_t const *) pSrc); - vstrhq_p(pDst, vnegq(vec1), p0); - } - -} - -#else -#if defined(ARM_FLOAT16_SUPPORTED) -void arm_negate_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = -A */ - - /* Negate and store result in destination buffer. */ - *pDst++ = -(_Float16)*pSrc++; - - *pDst++ = -(_Float16)*pSrc++; - - *pDst++ = -(_Float16)*pSrc++; - - *pDst++ = -(_Float16)*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = -A */ - - /* Negate and store result in destination buffer. */ - *pDst++ = -(_Float16)*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicNegate group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c deleted file mode 100644 index d2b251f..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c +++ /dev/null @@ -1,192 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_negate_f32.c - * Description: Negates floating-point vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicNegate Vector Negate - - Negates the elements of a vector. - - 
-      pDst[n] = -pSrc[n],   0 <= n < blockSize.
-
- - The functions support in-place computation allowing the source and - destination pointers to reference the same memory buffer. - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicNegate - @{ - */ - -/** - @brief Negates the elements of a floating-point vector. - @param[in] pSrc points to input vector. - @param[out] pDst points to output vector. - @param[in] blockSize number of samples in each vector. - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_negate_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - f32x4_t vec1; - f32x4_t res; - - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - /* C = |A| */ - - /* Calculate absolute values and then store the results in the destination buffer. */ - vec1 = vld1q(pSrc); - res = vnegq(vec1); - vst1q(pDst, res); - - /* Increment pointers */ - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - if (blkCnt > 0U) - { - /* C = |A| */ - mve_pred16_t p0 = vctp32q(blkCnt); - vec1 = vld1q((float32_t const *) pSrc); - vstrwq_p(pDst, vnegq(vec1), p0); - } - -} - -#else -void arm_negate_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t vec1; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = -A */ - - /* Negate and then store the results in the destination buffer. */ - vec1 = vld1q_f32(pSrc); - res = vnegq_f32(vec1); - vst1q_f32(pDst, res); - - /* Increment pointers */ - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = -A */ - - /* Negate and store result in destination buffer. */ - *pDst++ = -*pSrc++; - - *pDst++ = -*pSrc++; - - *pDst++ = -*pSrc++; - - *pDst++ = -*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */ - - while (blkCnt > 0U) - { - /* C = -A */ - - /* Negate and store result in destination buffer. */ - *pDst++ = -*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicNegate group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f64.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f64.c deleted file mode 100644 index b397661..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f64.c +++ /dev/null @@ -1,73 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_negate_f64.c - * Description: Negates floating-point vectors - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicNegate - @{ - */ - -/** - @brief Negates the elements of a floating-point vector. - @param[in] pSrc points to input vector. - @param[out] pDst points to output vector. - @param[in] blockSize number of samples in each vector. - @return none - */ - -void arm_negate_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = -A */ - - /* Negate and store result in destination buffer. */ - *pDst++ = -*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of BasicNegate group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c deleted file mode 100644 index b3c22be..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c +++ /dev/null @@ -1,171 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_negate_q15.c - * Description: Negates Q15 vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicNegate - @{ - */ - -/** - @brief Negates the elements of a Q15 vector. - @param[in] pSrc points to the input vector. - @param[out] pDst points to the output vector. - @param[in] blockSize number of samples in each vector. - @return none - - @par Conditions for optimum performance - Input and output buffers should be aligned by 32-bit - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_negate_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* - * C = -A - * Negate and then store the results in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vst1q(pDst, vqnegq(vecSrc)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 8; - pDst += 8; - } - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecSrc = vld1q(pSrc); - vstrhq_p(pDst, vqnegq(vecSrc), p0); - } -} - -#else -void arm_negate_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - q15_t in; /* Temporary input variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q31_t in1; /* Temporary input variables */ -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = -A */ - -#if defined (ARM_MATH_DSP) - /* Negate and store result in destination buffer (2 samples at a time). */ - in1 = read_q15x2_ia (&pSrc); - write_q15x2_ia (&pDst, __QSUB16(0, in1)); - - in1 = read_q15x2_ia (&pSrc); - write_q15x2_ia (&pDst, __QSUB16(0, in1)); -#else - in = *pSrc++; - *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in; - - in = *pSrc++; - *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in; - - in = *pSrc++; - *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in; - - in = *pSrc++; - *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in; -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = -A */ - - /* Negate and store result in destination buffer. */ - in = *pSrc++; - *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicNegate group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c deleted file mode 100644 index 96ee84c..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c +++ /dev/null @@ -1,178 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_negate_q31.c - * Description: Negates Q31 vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicNegate - @{ - */ - -/** - @brief Negates the elements of a Q31 vector. - @param[in] pSrc points to the input vector. - @param[out] pDst points to the output vector. - @param[in] blockSize number of samples in each vector. - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_negate_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* - * C = -A - * Negate and then store the results in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vst1q(pDst, vqnegq(vecSrc)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 4; - pDst += 4; - } - /* - * tail - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecSrc = vld1q(pSrc); - vstrwq_p(pDst, vqnegq(vecSrc), p0); - } -} - -#else -void arm_negate_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t in; /* Temporary input variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = -A */ - - /* Negate and store result in destination buffer. */ - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __QSUB(0, in); -#else - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __QSUB(0, in); -#else - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __QSUB(0, in); -#else - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; -#endif - - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __QSUB(0, in); -#else - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = -A */ - - /* Negate and store result in destination buffer. */ - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __QSUB(0, in); -#else - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicNegate group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c deleted file mode 100644 index 1dd2a45..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c +++ /dev/null @@ -1,171 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_negate_q7.c - * Description: Negates Q7 vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicNegate - @{ - */ - -/** - @brief Negates the elements of a Q7 vector. - @param[in] pSrc points to the input vector. - @param[out] pDst points to the output vector. - @param[in] blockSize number of samples in each vector. - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - The Q7 value -1 (0x80) is saturated to the maximum allowable positive value 0x7F. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_negate_q7( - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - /* - * C = -A - * Negate and then store the results in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vst1q(pDst, vqnegq(vecSrc)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 16; - pDst += 16; - } - /* - * tail - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecSrc = vld1q(pSrc); - vstrbq_p(pDst, vqnegq(vecSrc), p0); - } -} - -#else -void arm_negate_q7( - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - q7_t in; /* Temporary input variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q31_t in1; /* Temporary input variable */ -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = -A */ - -#if defined (ARM_MATH_DSP) - /* Negate and store result in destination buffer (4 samples at a time). */ - in1 = read_q7x4_ia (&pSrc); - write_q7x4_ia (&pDst, __QSUB8(0, in1)); -#else - in = *pSrc++; - *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in; - - in = *pSrc++; - *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in; - - in = *pSrc++; - *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in; - - in = *pSrc++; - *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in; -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = -A */ - - /* Negate and store result in destination buffer. */ - in = *pSrc++; - -#if defined (ARM_MATH_DSP) - *pDst++ = (q7_t) __QSUB8(0, in); -#else - *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in; -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicNegate group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c deleted file mode 100644 index fc6f23e..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_not_u16.c - * Description: uint16_t bitwise NOT - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup Not Vector bitwise NOT - - Compute the logical bitwise NOT. - - There are separate functions for uint32_t, uint16_t, and uint8_t data types. - */ - -/** - @addtogroup Not - @{ - */ - -/** - @brief Compute the logical bitwise NOT of a fixed-point vector. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_not_u16( - const uint16_t * pSrc, - uint16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint16x8_t vecSrc; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - - while (blkCnt > 0U) - { - vecSrc = vld1q(pSrc); - - vst1q(pDst, vmvnq_u16(vecSrc) ); - - pSrc += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 7; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecSrc = vld1q(pSrc); - vstrhq_p(pDst, vmvnq_u16(vecSrc), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint16x8_t inV; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - inV = vld1q_u16(pSrc); - - vst1q_u16(pDst, vmvnq_u16(inV) ); - - pSrc += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 7; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = ~(*pSrc++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} - -/** - @} end of Not group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c deleted file mode 100644 index f92a4ae..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c +++ /dev/null @@ -1,122 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_not_u32.c - * Description: uint32_t bitwise NOT - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup Not - @{ - */ - -/** - @brief Compute the logical bitwise NOT of a fixed-point vector. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_not_u32( - const uint32_t * pSrc, - uint32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32x4_t vecSrc; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - vecSrc = vld1q(pSrc); - - vst1q(pDst, vmvnq_u32(vecSrc) ); - - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 3; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecSrc = vld1q(pSrc); - vstrwq_p(pDst, vmvnq_u32(vecSrc), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32x4_t inV; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - inV = vld1q_u32(pSrc); - - vst1q_u32(pDst, vmvnq_u32(inV) ); - - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 3; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = ~(*pSrc++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} - -/** - @} end of Not group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c deleted file mode 100644 index b312b97..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c +++ /dev/null @@ -1,122 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_not_u8.c - * Description: uint8_t bitwise NOT - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup Not - @{ - */ - -/** - @brief Compute the logical bitwise NOT of a fixed-point vector. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_not_u8( - const uint8_t * pSrc, - uint8_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint8x16_t vecSrc; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - - while (blkCnt > 0U) - { - vecSrc = vld1q(pSrc); - - vst1q(pDst, vmvnq_u8(vecSrc) ); - - pSrc += 16; - pDst += 16; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0xF; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecSrc = vld1q(pSrc); - vstrbq_p(pDst, vmvnq_u8(vecSrc), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint8x16_t inV; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4U; - - while (blkCnt > 0U) - { - inV = vld1q_u8(pSrc); - - vst1q_u8(pDst, vmvnq_u8(inV) ); - - pSrc += 16; - pDst += 16; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0xF; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = ~(*pSrc++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} - -/** - @} end of Not group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f16.c deleted file mode 100644 index 700911b..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f16.c +++ /dev/null @@ -1,170 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_offset_f16.c - * Description: Floating-point vector offset - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions_f16.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicOffset Vector Offset - - Adds a constant offset to each element of a vector. - - 
-      pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.
-
- - The functions support in-place computation allowing the source and - destination pointers to reference the same memory buffer. - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicOffset - @{ - */ - -/** - @brief Adds a constant offset to a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] offset is the offset to be added - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_offset_f16( - const float16_t * pSrc, - float16_t offset, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - f16x8_t vec1; - f16x8_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and then store the results in the destination buffer. */ - vec1 = vld1q(pSrc); - res = vaddq(vec1,offset); - vst1q(pDst, res); - - /* Increment pointers */ - pSrc += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x7; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vec1 = vld1q((float16_t const *) pSrc); - vstrhq_p(pDst, vaddq(vec1, offset), p0); - } - - -} - -#else -#if defined(ARM_FLOAT16_SUPPORTED) -void arm_offset_f16( - const float16_t * pSrc, - float16_t offset, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and store result in destination buffer. */ - *pDst++ = (_Float16)(*pSrc++) + (_Float16)offset; - - *pDst++ = (_Float16)(*pSrc++) + (_Float16)offset; - - *pDst++ = (_Float16)(*pSrc++) + (_Float16)offset; - - *pDst++ = (_Float16)(*pSrc++) + (_Float16)offset; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and store result in destination buffer. */ - *pDst++ = (_Float16)(*pSrc++) + (_Float16)offset; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicOffset group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c deleted file mode 100644 index c9eb28a..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c +++ /dev/null @@ -1,196 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_offset_f32.c - * Description: Floating-point vector offset - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicOffset Vector Offset - - Adds a constant offset to each element of a vector. - - 
-      pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.
-
- - The functions support in-place computation allowing the source and - destination pointers to reference the same memory buffer. - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicOffset - @{ - */ - -/** - @brief Adds a constant offset to a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] offset is the offset to be added - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_offset_f32( - const float32_t * pSrc, - float32_t offset, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - f32x4_t vec1; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and then store the results in the destination buffer. */ - vec1 = vld1q(pSrc); - res = vaddq(vec1,offset); - vst1q(pDst, res); - - /* Increment pointers */ - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vec1 = vld1q((float32_t const *) pSrc); - vstrwq_p(pDst, vaddq(vec1, offset), p0); - } - - -} - -#else -void arm_offset_f32( - const float32_t * pSrc, - float32_t offset, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t vec1; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and then store the results in the destination buffer. */ - vec1 = vld1q_f32(pSrc); - res = vaddq_f32(vec1,vdupq_n_f32(offset)); - vst1q_f32(pDst, res); - - /* Increment pointers */ - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and store result in destination buffer. */ - *pDst++ = (*pSrc++) + offset; - - *pDst++ = (*pSrc++) + offset; - - *pDst++ = (*pSrc++) + offset; - - *pDst++ = (*pSrc++) + offset; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */ - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and store result in destination buffer. */ - *pDst++ = (*pSrc++) + offset; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicOffset group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f64.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f64.c deleted file mode 100644 index 5aa0f90..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f64.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_offset_f64.c - * Description: Floating-point vector offset - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicOffset - @{ - */ - -/** - @brief Adds a constant offset to a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] offset is the offset to be added - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_offset_f64( - const float64_t * pSrc, - float64_t offset, - float64_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and store result in destination buffer. */ - *pDst++ = (*pSrc++) + offset; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of BasicOffset group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c deleted file mode 100644 index 55c076c..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c +++ /dev/null @@ -1,168 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_offset_q15.c - * Description: Q15 vector offset - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicOffset - @{ - */ - -/** - @brief Adds a constant offset to a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] offset is the offset to be added - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_offset_q15( - const q15_t * pSrc, - q15_t offset, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* - * C = A + offset - * Add offset and then store the result in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vst1q(pDst, vqaddq(vecSrc, offset)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 8; - pDst += 8; - } - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecSrc = vld1q(pSrc); - vstrhq_p(pDst, vqaddq(vecSrc, offset), p0); - } -} - - -#else -void arm_offset_q15( - const q15_t * pSrc, - q15_t offset, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q31_t offset_packed; /* Offset packed to 32 bit */ - - /* Offset is packed to 32 bit in order to use SIMD32 for addition */ - offset_packed = __PKHBT(offset, offset, 16); -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + offset */ - -#if defined (ARM_MATH_DSP) - /* Add offset and store result in destination buffer (2 samples at a time). */ - write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia (&pSrc), offset_packed)); - write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia (&pSrc), offset_packed)); -#else - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16); - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16); - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16); - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and store result in destination buffer. */ -#if defined (ARM_MATH_DSP) - *pDst++ = (q15_t) __QADD16(*pSrc++, offset); -#else - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicOffset group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c deleted file mode 100644 index 828cf45..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c +++ /dev/null @@ -1,159 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_offset_q31.c - * Description: Q31 vector offset - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicOffset - @{ - */ - -/** - @brief Adds a constant offset to a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] offset is the offset to be added - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_offset_q31( - const q31_t * pSrc, - q31_t offset, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* - * C = A + offset - * Add offset and then store the result in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vst1q(pDst, vqaddq(vecSrc, offset)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 4; - pDst += 4; - } - /* - * tail - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecSrc = vld1q(pSrc); - vstrwq_p(pDst, vqaddq(vecSrc, offset), p0); - } -} - -#else -void arm_offset_q31( - const q31_t * pSrc, - q31_t offset, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and store result in destination buffer. */ - *pDst++ = __QADD(*pSrc++, offset); - - *pDst++ = __QADD(*pSrc++, offset); - - *pDst++ = __QADD(*pSrc++, offset); - - *pDst++ = __QADD(*pSrc++, offset); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and store result in destination buffer. */ -#if defined (ARM_MATH_DSP) - *pDst++ = __QADD(*pSrc++, offset); -#else - *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicOffset group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c deleted file mode 100644 index 38a7b5c..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c +++ /dev/null @@ -1,162 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_offset_q7.c - * Description: Q7 vector offset - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicOffset - @{ - */ - -/** - @brief Adds a constant offset to a Q7 vector. - @param[in] pSrc points to the input vector - @param[in] offset is the offset to be added - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q7 range [0x80 0x7F] are saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_offset_q7( - const q7_t * pSrc, - q7_t offset, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - /* - * C = A + offset - * Add offset and then store the result in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vst1q(pDst, vqaddq(vecSrc, offset)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 16; - pDst += 16; - } - /* - * tail - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecSrc = vld1q(pSrc); - vstrbq_p(pDst, vqaddq(vecSrc, offset), p0); - } -} - -#else -void arm_offset_q7( - const q7_t * pSrc, - q7_t offset, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q31_t offset_packed; /* Offset packed to 32 bit */ - - /* Offset is packed to 32 bit in order to use SIMD32 for addition */ - offset_packed = __PACKq7(offset, offset, offset, offset); -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + offset */ - -#if defined (ARM_MATH_DSP) - /* Add offset and store result in destination buffer (4 samples at a time). */ - write_q7x4_ia (&pDst, __QADD8(read_q7x4_ia (&pSrc), offset_packed)); -#else - *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8); - *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8); - *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8); - *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and store result in destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicOffset group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c deleted file mode 100644 index c088ffb..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c +++ /dev/null @@ -1,137 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_or_u16.c - * Description: uint16_t bitwise inclusive OR - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup Or Vector bitwise inclusive OR - - Compute the logical bitwise OR. - - There are separate functions for uint32_t, uint16_t, and uint8_t data types. - */ - -/** - @addtogroup Or - @{ - */ - -/** - @brief Compute the logical bitwise OR of two fixed-point vectors. - @param[in] pSrcA points to input vector A - @param[in] pSrcB points to input vector B - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_or_u16( - const uint16_t * pSrcA, - const uint16_t * pSrcB, - uint16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint16x8_t vecSrcA, vecSrcB; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vst1q(pDst, vorrq_u16(vecSrcA, vecSrcB) ); - - pSrcA += 8; - pSrcB += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 7; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - vstrhq_p(pDst, vorrq_u16(vecSrcA, vecSrcB), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint16x8_t vecA, vecB; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - vecA = vld1q_u16(pSrcA); - vecB = vld1q_u16(pSrcB); - - vst1q_u16(pDst, vorrq_u16(vecA, vecB) ); - - pSrcA += 8; - pSrcB += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 7; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = (*pSrcA++)|(*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} - -/** - @} end of Or group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c deleted file mode 100644 index 2018175..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c +++ /dev/null @@ -1,128 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_or_u32.c - * Description: uint32_t bitwise inclusive OR - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup Or - @{ - */ - -/** - @brief Compute the logical bitwise OR of two fixed-point vectors. - @param[in] pSrcA points to input vector A - @param[in] pSrcB points to input vector B - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_or_u32( - const uint32_t * pSrcA, - const uint32_t * pSrcB, - uint32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32x4_t vecSrcA, vecSrcB; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vst1q(pDst, vorrq_u32(vecSrcA, vecSrcB) ); - - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 3; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - vstrwq_p(pDst, vorrq_u32(vecSrcA, vecSrcB), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32x4_t vecA, vecB; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - vecA = vld1q_u32(pSrcA); - vecB = vld1q_u32(pSrcB); - - vst1q_u32(pDst, vorrq_u32(vecA, vecB) ); - - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 3; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = (*pSrcA++)|(*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} -/** - @} end of Or group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c deleted file mode 100644 index e83c63f..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c +++ /dev/null @@ -1,128 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_or_u8.c - * Description: uint8_t bitwise inclusive OR - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup Or - @{ - */ - -/** - @brief Compute the logical bitwise OR of two fixed-point vectors. - @param[in] pSrcA points to input vector A - @param[in] pSrcB points to input vector B - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_or_u8( - const uint8_t * pSrcA, - const uint8_t * pSrcB, - uint8_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint8x16_t vecSrcA, vecSrcB; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vst1q(pDst, vorrq_u8(vecSrcA, vecSrcB) ); - - pSrcA += 16; - pSrcB += 16; - pDst += 16; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0xF; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - vstrbq_p(pDst, vorrq_u8(vecSrcA, vecSrcB), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint8x16_t vecA, vecB; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4U; - - while (blkCnt > 0U) - { - vecA = vld1q_u8(pSrcA); - vecB = vld1q_u8(pSrcB); - - vst1q_u8(pDst, vorrq_u8(vecA, vecB) ); - - pSrcA += 16; - pSrcB += 16; - pDst += 16; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0xF; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = (*pSrcA++)|(*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} -/** - @} end of Or group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f16.c deleted file mode 100644 index b4262d3..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f16.c +++ /dev/null @@ -1,183 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_scale_f16.c - * Description: Multiplies a floating-point vector by a scalar - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions_f16.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicScale Vector Scale - - Multiply a vector by a scalar value. For floating-point data, the algorithm used is: - - 
-      pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.
-
- - In the fixed-point Q7, Q15, and Q31 functions, scale is represented by - a fractional multiplication scaleFract and an arithmetic shift shift. - The shift allows the gain of the scaling operation to exceed 1.0. - The algorithm used with fixed-point data is: - - 
-      pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.
-
- - The overall scale factor applied to the fixed-point data is - 
-      scale = scaleFract * 2^shift.
-
- - The functions support in-place computation allowing the source and destination - pointers to reference the same memory buffer. - */ - -/** - @addtogroup BasicScale - @{ - */ - -/** - @brief Multiplies a floating-point vector by a scalar. - @param[in] pSrc points to the input vector - @param[in] scale scale factor to be applied - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_scale_f16( - const float16_t * pSrc, - float16_t scale, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - f16x8_t vec1; - f16x8_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and then store the results in the destination buffer. */ - vec1 = vld1q(pSrc); - res = vmulq(vec1,scale); - vst1q(pDst, res); - - /* Increment pointers */ - pSrc += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x7; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vec1 = vld1q((float16_t const *) pSrc); - vstrhq_p(pDst, vmulq(vec1, scale), p0); - } - - -} - -#else -#if defined(ARM_FLOAT16_SUPPORTED) -void arm_scale_f16( - const float16_t *pSrc, - float16_t scale, - float16_t *pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - *pDst++ = (_Float16)(*pSrc++) * (_Float16)scale; - - *pDst++ = (_Float16)(*pSrc++) * (_Float16)scale; - - *pDst++ = (_Float16)(*pSrc++) * (_Float16)scale; - - *pDst++ = (_Float16)(*pSrc++) * (_Float16)scale; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - *pDst++ = (_Float16)(*pSrc++) * (_Float16)scale; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicScale group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c deleted file mode 100644 index 76f3efc..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c +++ /dev/null @@ -1,216 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_scale_f32.c - * Description: Multiplies a floating-point vector by a scalar - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicScale Vector Scale - - Multiply a vector by a scalar value. For floating-point data, the algorithm used is: - - 
-      pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.
-
- - In the fixed-point Q7, Q15, and Q31 functions, scale is represented by - a fractional multiplication scaleFract and an arithmetic shift shift. - The shift allows the gain of the scaling operation to exceed 1.0. - The algorithm used with fixed-point data is: - - 
-      pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.
-
- - The overall scale factor applied to the fixed-point data is - 
-      scale = scaleFract * 2^shift.
-
- - The functions support in-place computation allowing the source and destination - pointers to reference the same memory buffer. - */ - -/** - @addtogroup BasicScale - @{ - */ - -/** - @brief Multiplies a floating-point vector by a scalar. - @param[in] pSrc points to the input vector - @param[in] scale scale factor to be applied - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_scale_f32( - const float32_t * pSrc, - float32_t scale, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - f32x4_t vec1; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + offset */ - - /* Add offset and then store the results in the destination buffer. */ - vec1 = vld1q(pSrc); - res = vmulq(vec1,scale); - vst1q(pDst, res); - - /* Increment pointers */ - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vec1 = vld1q((float32_t const *) pSrc); - vstrwq_p(pDst, vmulq(vec1, scale), p0); - } - - -} - -#else -void arm_scale_f32( - const float32_t *pSrc, - float32_t scale, - float32_t *pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ -#if defined(ARM_MATH_NEON_EXPERIMENTAL) - f32x4_t vec1; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale the input and then store the results in the destination buffer. */ - vec1 = vld1q_f32(pSrc); - res = vmulq_f32(vec1, vdupq_n_f32(scale)); - vst1q_f32(pDst, res); - - /* Increment pointers */ - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - float32_t in1, in2, in3, in4; - - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - in1 = (*pSrc++) * scale; - - in2 = (*pSrc++) * scale; - - in3 = (*pSrc++) * scale; - - in4 = (*pSrc++) * scale; - - *pDst++ = in1; - *pDst++ = in2; - *pDst++ = in3; - *pDst++ = in4; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */ - - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - *pDst++ = (*pSrc++) * scale; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicScale group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f64.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f64.c deleted file mode 100644 index 093d087..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f64.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_scale_f64.c - * Description: Multiplies a floating-point vector by a scalar - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicScale - @{ - */ - -/** - @brief Multiplies a floating-point vector by a scalar. - @param[in] pSrc points to the input vector - @param[in] scale scale factor to be applied - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_scale_f64( - const float64_t *pSrc, - float64_t scale, - float64_t *pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - *pDst++ = (*pSrc++) * scale; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of BasicScale group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c deleted file mode 100644 index f03e41a..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c +++ /dev/null @@ -1,201 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_scale_q15.c - * Description: Multiplies a Q15 vector by a scalar - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicScale - @{ - */ - -/** - @brief Multiplies a Q15 vector by a scalar. - @param[in] pSrc points to the input vector - @param[in] scaleFract fractional portion of the scale value - @param[in] shift number of bits to shift the result by - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The input data *pSrc and scaleFract are in 1.15 format. - These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_scale_q15( - const q15_t * pSrc, - q15_t scaleFract, - int8_t shift, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - q15x8_t vecDst; - - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - - while (blkCnt > 0U) - { - /* - * C = A * scale - * Scale the input and then store the result in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vecDst = vmulhq(vecSrc, vdupq_n_s16(scaleFract)); - vecDst = vqshlq_r(vecDst, shift + 1); - vst1q(pDst, vecDst); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 8; - pDst += 8; - } - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt);; - vecSrc = vld1q(pSrc); - vecDst = vmulhq(vecSrc, vdupq_n_s16(scaleFract)); - vecDst = vqshlq_r(vecDst, shift + 1); - vstrhq_p(pDst, vecDst, p0); - } - -} - - -#else -void arm_scale_q15( - const q15_t *pSrc, - q15_t scaleFract, - int8_t shift, - q15_t *pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - int8_t kShift = 15 - shift; /* Shift to apply after scaling */ - -#if defined (ARM_MATH_LOOPUNROLL) -#if defined (ARM_MATH_DSP) - q31_t inA1, inA2; - q31_t out1, out2, out3, out4; /* Temporary output variables */ - q15_t in1, in2, in3, in4; /* Temporary input variables */ -#endif -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * scale */ - -#if defined (ARM_MATH_DSP) - /* read 2 times 2 samples at a time from source */ - inA1 = read_q15x2_ia (&pSrc); - inA2 = read_q15x2_ia (&pSrc); - - /* Scale inputs and store result in temporary variables - * in single cycle by packing the outputs */ - out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract); - out2 = (q31_t) ((q15_t) (inA1 ) * scaleFract); - out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract); - out4 = (q31_t) ((q15_t) (inA2 ) * scaleFract); - - /* apply shifting */ - out1 = out1 >> kShift; - out2 = out2 >> kShift; - out3 = out3 >> kShift; - out4 = out4 >> kShift; - - /* saturate the output */ - in1 = (q15_t) (__SSAT(out1, 16)); - in2 = (q15_t) (__SSAT(out2, 16)); - in3 = (q15_t) (__SSAT(out3, 16)); - in4 = (q15_t) (__SSAT(out4, 16)); - - /* store result to destination */ - write_q15x2_ia (&pDst, __PKHBT(in2, in1, 16)); - write_q15x2_ia (&pDst, __PKHBT(in4, in3, 16)); -#else - *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16)); - *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16)); - *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16)); - *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16)); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16)); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicScale group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c deleted file mode 100644 index 5631210..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c +++ /dev/null @@ -1,244 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_scale_q31.c - * Description: Multiplies a Q31 vector by a scalar - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicScale - @{ - */ - -/** - @brief Multiplies a Q31 vector by a scalar. - @param[in] pSrc points to the input vector - @param[in] scaleFract fractional portion of the scale value - @param[in] shift number of bits to shift the result by - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The input data *pSrc and scaleFract are in 1.31 format. - These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_scale_q31( - const q31_t * pSrc, - q31_t scaleFract, - int8_t shift, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - q31x4_t vecDst; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* - * C = A * scale - * Scale the input and then store the result in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vecDst = vmulhq(vecSrc, vdupq_n_s32(scaleFract)); - vecDst = vqshlq_r(vecDst, shift + 1); - vst1q(pDst, vecDst); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 4; - pDst += 4; - } - /* - * tail - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecSrc = vld1q(pSrc); - vecDst = vmulhq(vecSrc, vdupq_n_s32(scaleFract)); - vecDst = vqshlq_r(vecDst, shift + 1); - vstrwq_p(pDst, vecDst, p0); - } -} - -#else -void arm_scale_q31( - const q31_t *pSrc, - q31_t scaleFract, - int8_t shift, - q31_t *pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t in, out; /* Temporary variables */ - int8_t kShift = shift + 1; /* Shift to apply after scaling */ - int8_t sign = (kShift & 0x80); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - if (sign == 0U) - { - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - in = *pSrc++; /* read input from source */ - in = ((q63_t) in * scaleFract) >> 32; /* multiply input with scaler value */ - out = in << kShift; /* apply shifting */ - if (in != (out >> kShift)) /* saturate the result */ - out = 0x7FFFFFFF ^ (in >> 31); - *pDst++ = out; /* Store result destination */ - - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - out = in << kShift; - if (in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - *pDst++ = out; - - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - out = in << kShift; - if (in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - *pDst++ = out; - - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - out = in << kShift; - if (in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - *pDst++ = out; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - in = *pSrc++; /* read four inputs from source */ - in = ((q63_t) in * scaleFract) >> 32; /* multiply input with scaler value */ - out = in >> -kShift; /* apply shifting */ - *pDst++ = out; /* Store result destination */ - - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - out = in >> -kShift; - *pDst++ = out; - - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - out = in >> -kShift; - *pDst++ = out; - - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - out = in >> -kShift; - *pDst++ = out; - - /* Decrement loop counter */ - blkCnt--; - } - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - if (sign == 0U) - { - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - out = in << kShift; - if (in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - *pDst++ = out; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - out = in >> -kShift; - *pDst++ = out; - - /* Decrement loop counter */ - blkCnt--; - } - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicScale group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c deleted file mode 100644 index 3ba5697..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c +++ /dev/null @@ -1,186 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_scale_q7.c - * Description: Multiplies a Q7 vector by a scalar - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicScale - @{ - */ - -/** - @brief Multiplies a Q7 vector by a scalar. - @param[in] pSrc points to the input vector - @param[in] scaleFract fractional portion of the scale value - @param[in] shift number of bits to shift the result by - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The input data *pSrc and scaleFract are in 1.7 format. - These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - -void arm_scale_q7( - const q7_t * pSrc, - q7_t scaleFract, - int8_t shift, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q7x16_t vecDst; - - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - - while (blkCnt > 0U) - { - /* - * C = A * scale - * Scale the input and then store the result in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vecDst = vmulhq(vecSrc, vdupq_n_s8(scaleFract)); - vecDst = vqshlq_r(vecDst, shift + 1); - vst1q(pDst, vecDst); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 16; - pDst += 16; - } - /* - * tail - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecSrc = vld1q(pSrc); - vecDst = vmulhq(vecSrc, vdupq_n_s8(scaleFract)); - vecDst = vqshlq_r(vecDst, shift + 1); - vstrbq_p(pDst, vecDst, p0); - } - -} - -#else -void arm_scale_q7( - const q7_t * pSrc, - q7_t scaleFract, - int8_t shift, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - int8_t kShift = 7 - shift; /* Shift to apply after scaling */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q7_t in1, in2, in3, in4; /* Temporary input variables */ - q7_t out1, out2, out3, out4; /* Temporary output variables */ -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * scale */ - -#if defined (ARM_MATH_DSP) - /* Reading 4 inputs from memory */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - /* Scale inputs and store result in the temporary variable. */ - out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8)); - out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8)); - out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8)); - out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8)); - - /* Pack and store result in destination buffer (in single write) */ - write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4)); -#else - *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8)); - *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8)); - *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8)); - *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8)); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A * scale */ - - /* Scale input and store result in destination buffer. */ - *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8)); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicScale group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c deleted file mode 100644 index 58f6f99..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c +++ /dev/null @@ -1,251 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_shift_q15.c - * Description: Shifts the elements of a Q15 vector by a specified number of bits - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicShift - @{ - */ - -/** - @brief Shifts the elements of a Q15 vector a specified number of bits - @param[in] pSrc points to the input vector - @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_shift_q15( - const q15_t * pSrc, - int8_t shiftBits, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - q15x8_t vecDst; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* - * C = A (>> or <<) shiftBits - * Shift the input and then store the result in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vecDst = vqshlq_r(vecSrc, shiftBits); - vst1q(pDst, vecDst); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 8; - pDst += 8; - } - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecSrc = vld1q(pSrc); - vecDst = vqshlq_r(vecSrc, shiftBits); - vstrhq_p(pDst, vecDst, p0); - } -} - -#else -void arm_shift_q15( - const q15_t * pSrc, - int8_t shiftBits, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q15_t in1, in2; /* Temporary input variables */ -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - /* If the shift value is positive then do right shift else left shift */ - if (sign == 0U) - { - while (blkCnt > 0U) - { - /* C = A << shiftBits */ - -#if defined (ARM_MATH_DSP) - /* read 2 samples from source */ - in1 = *pSrc++; - in2 = *pSrc++; - - /* Shift the inputs and then store the results in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pDst, __PKHBT(__SSAT(((q31_t) in1 << shiftBits), 16), - __SSAT(((q31_t) in2 << shiftBits), 16), 16)); -#else - write_q15x2_ia (&pDst, __PKHBT(__SSAT(((q31_t) in2 << shiftBits), 16), - __SSAT(((q31_t) in1 << shiftBits), 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* read 2 samples from source */ - in1 = *pSrc++; - in2 = *pSrc++; - -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pDst, __PKHBT(__SSAT(((q31_t) in1 << shiftBits), 16), - __SSAT(((q31_t) in2 << shiftBits), 16), 16)); -#else - write_q15x2_ia (&pDst, __PKHBT(__SSAT(((q31_t) in2 << shiftBits), 16), - __SSAT(((q31_t) in1 << shiftBits), 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - -#else - *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16); - *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16); - *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16); - *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - while (blkCnt > 0U) - { - /* C = A >> shiftBits */ - -#if defined (ARM_MATH_DSP) - /* read 2 samples from source */ - in1 = *pSrc++; - in2 = *pSrc++; - - /* Shift the inputs and then store the results in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits), - (in2 >> -shiftBits), 16)); -#else - write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits), - (in1 >> -shiftBits), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* read 2 samples from source */ - in1 = *pSrc++; - in2 = *pSrc++; - -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits), - (in2 >> -shiftBits), 16)); -#else - write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits), - (in1 >> -shiftBits), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - -#else - *pDst++ = (*pSrc++ >> -shiftBits); - *pDst++ = (*pSrc++ >> -shiftBits); - *pDst++ = (*pSrc++ >> -shiftBits); - *pDst++ = (*pSrc++ >> -shiftBits); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* If the shift value is positive then do right shift else left shift */ - if (sign == 0U) - { - while (blkCnt > 0U) - { - /* C = A << shiftBits */ - - /* Shift input and store result in destination buffer. */ - *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16); - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - while (blkCnt > 0U) - { - /* C = A >> shiftBits */ - - /* Shift input and store result in destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement loop counter */ - blkCnt--; - } - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicShift group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c deleted file mode 100644 index d128c3a..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c +++ /dev/null @@ -1,232 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_shift_q31.c - * Description: Shifts the elements of a Q31 vector by a specified number of bits - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ -/** - @defgroup BasicShift Vector Shift - - Shifts the elements of a fixed-point vector by a specified number of bits. - There are separate functions for Q7, Q15, and Q31 data types. - The underlying algorithm used is: - - 
-      pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.
-
- - If shift is positive then the elements of the vector are shifted to the left. - If shift is negative then the elements of the vector are shifted to the right. - - The functions support in-place computation allowing the source and destination - pointers to reference the same memory buffer. - */ - -/** - @addtogroup BasicShift - @{ - */ - -/** - @brief Shifts the elements of a Q31 vector a specified number of bits. - @param[in] pSrc points to the input vector - @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in the vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_shift_q31( - const q31_t * pSrc, - int8_t shiftBits, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - q31x4_t vecDst; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* - * C = A (>> or <<) shiftBits - * Shift the input and then store the result in the destination buffer. - */ - vecSrc = vld1q((q31_t const *) pSrc); - vecDst = vqshlq_r(vecSrc, shiftBits); - vst1q(pDst, vecDst); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 4; - pDst += 4; - } - /* - * tail - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecSrc = vld1q((q31_t const *) pSrc); - vecDst = vqshlq_r(vecSrc, shiftBits); - vstrwq_p(pDst, vecDst, p0); - } -} - - -#else -void arm_shift_q31( - const q31_t * pSrc, - int8_t shiftBits, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ - -#if defined (ARM_MATH_LOOPUNROLL) - - q31_t in, out; /* Temporary variables */ - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - /* If the shift value is positive then do right shift else left shift */ - if (sign == 0U) - { - while (blkCnt > 0U) - { - /* C = A << shiftBits */ - - /* Shift input and store result in destination buffer. */ - in = *pSrc++; - out = in << shiftBits; - if (in != (out >> shiftBits)) - out = 0x7FFFFFFF ^ (in >> 31); - *pDst++ = out; - - in = *pSrc++; - out = in << shiftBits; - if (in != (out >> shiftBits)) - out = 0x7FFFFFFF ^ (in >> 31); - *pDst++ = out; - - in = *pSrc++; - out = in << shiftBits; - if (in != (out >> shiftBits)) - out = 0x7FFFFFFF ^ (in >> 31); - *pDst++ = out; - - in = *pSrc++; - out = in << shiftBits; - if (in != (out >> shiftBits)) - out = 0x7FFFFFFF ^ (in >> 31); - *pDst++ = out; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - while (blkCnt > 0U) - { - /* C = A >> shiftBits */ - - /* Shift input and store results in destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - *pDst++ = (*pSrc++ >> -shiftBits); - *pDst++ = (*pSrc++ >> -shiftBits); - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement loop counter */ - blkCnt--; - } - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* If the shift value is positive then do right shift else left shift */ - if (sign == 0U) - { - while (blkCnt > 0U) - { - /* C = A << shiftBits */ - - /* Shift input and store result in destination buffer. */ - *pDst++ = clip_q63_to_q31((q63_t) *pSrc++ << shiftBits); - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - while (blkCnt > 0U) - { - /* C = A >> shiftBits */ - - /* Shift input and store result in destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement loop counter */ - blkCnt--; - } - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicShift group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c deleted file mode 100644 index 25d2390..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c +++ /dev/null @@ -1,225 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_shift_q7.c - * Description: Processing function for the Q7 Shifting - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicShift - @{ - */ - -/** - @brief Shifts the elements of a Q7 vector a specified number of bits - @param[in] pSrc points to the input vector - @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par onditions for optimum performance - Input and output buffers should be aligned by 32-bit - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q7 range [0x80 0x7F] are saturated. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_shift_q7( - const q7_t * pSrc, - int8_t shiftBits, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q7x16_t vecDst; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - /* - * C = A (>> or <<) shiftBits - * Shift the input and then store the result in the destination buffer. - */ - vecSrc = vld1q(pSrc); - vecDst = vqshlq_r(vecSrc, shiftBits); - vst1q(pDst, vecDst); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrc += 16; - pDst += 16; - } - /* - * tail - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecSrc = vld1q(pSrc); - vecDst = vqshlq_r(vecSrc, shiftBits); - vstrbq_p(pDst, vecDst, p0); - } -} - -#else -void arm_shift_q7( - const q7_t * pSrc, - int8_t shiftBits, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q7_t in1, in2, in3, in4; /* Temporary input variables */ -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - /* If the shift value is positive then do right shift else left shift */ - if (sign == 0U) - { - while (blkCnt > 0U) - { - /* C = A << shiftBits */ - -#if defined (ARM_MATH_DSP) - /* Read 4 inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - /* Pack and store result in destination buffer (in single write) */ - write_q7x4_ia (&pDst, __PACKq7(__SSAT(((q15_t) in1 << shiftBits), 8), - __SSAT(((q15_t) in2 << shiftBits), 8), - __SSAT(((q15_t) in3 << shiftBits), 8), - __SSAT(((q15_t) in4 << shiftBits), 8) )); -#else - *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8); - *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8); - *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8); - *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - while (blkCnt > 0U) - { - /* C = A >> shiftBits */ - -#if defined (ARM_MATH_DSP) - /* Read 4 inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - /* Pack and store result in destination buffer (in single write) */ - write_q7x4_ia (&pDst, __PACKq7((in1 >> -shiftBits), - (in2 >> -shiftBits), - (in3 >> -shiftBits), - (in4 >> -shiftBits) )); -#else - *pDst++ = (*pSrc++ >> -shiftBits); - *pDst++ = (*pSrc++ >> -shiftBits); - *pDst++ = (*pSrc++ >> -shiftBits); - *pDst++ = (*pSrc++ >> -shiftBits); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* If the shift value is positive then do right shift else left shift */ - if (sign == 0U) - { - while (blkCnt > 0U) - { - /* C = A << shiftBits */ - - /* Shift input and store result in destination buffer. */ - *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8); - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - while (blkCnt > 0U) - { - /* C = A >> shiftBits */ - - /* Shift input and store result in destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement loop counter */ - blkCnt--; - } - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicShift group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f16.c deleted file mode 100644 index 498eb10..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f16.c +++ /dev/null @@ -1,171 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sub_f16.c - * Description: Floating-point vector subtraction - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions_f16.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicSub Vector Subtraction - - Element-by-element subtraction of two vectors. - - 
-      pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.
-
- - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicSub - @{ - */ - -/** - @brief Floating-point vector subtraction. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_helium_utils.h" - -void arm_sub_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - f16x8_t vec1; - f16x8_t vec2; - f16x8_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and then store the results in the destination buffer. */ - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - res = vsubq(vec1, vec2); - vst1q(pDst, res); - - /* Increment pointers */ - pSrcA += 8; - pSrcB += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x7; - - if (blkCnt > 0U) - { - /* C = A + B */ - mve_pred16_t p0 = vctp16q(blkCnt); - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - vstrhq_p(pDst, vsubq(vec1,vec2), p0); - } - -} - -#else -#if defined(ARM_FLOAT16_SUPPORTED) -void arm_sub_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A - B */ - - /* Subtract and store result in destination buffer. */ - *pDst++ = (_Float16)(*pSrcA++) - (_Float16)(*pSrcB++); - - *pDst++ = (_Float16)(*pSrcA++) - (_Float16)(*pSrcB++); - - *pDst++ = (_Float16)(*pSrcA++) - (_Float16)(*pSrcB++); - - *pDst++ = (_Float16)(*pSrcA++) - (_Float16)(*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A - B */ - - /* Subtract and store result in destination buffer. */ - *pDst++ = (_Float16)(*pSrcA++) - (_Float16)(*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicSub group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c deleted file mode 100644 index 8617450..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c +++ /dev/null @@ -1,202 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sub_f32.c - * Description: Floating-point vector subtraction - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup BasicSub Vector Subtraction - - Element-by-element subtraction of two vectors. - - 
-      pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.
-
- - There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - @addtogroup BasicSub - @{ - */ - -/** - @brief Floating-point vector subtraction. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_sub_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - f32x4_t vec1; - f32x4_t vec2; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A + B */ - - /* Add and then store the results in the destination buffer. */ - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - res = vsubq(vec1, vec2); - vst1q(pDst, res); - - /* Increment pointers */ - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - - if (blkCnt > 0U) - { - /* C = A + B */ - mve_pred16_t p0 = vctp32q(blkCnt); - vec1 = vld1q(pSrcA); - vec2 = vld1q(pSrcB); - vstrwq_p(pDst, vsubq(vec1,vec2), p0); - } - -} - -#else -void arm_sub_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t vec1; - f32x4_t vec2; - f32x4_t res; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A - B */ - - /* Subtract and then store the results in the destination buffer. */ - vec1 = vld1q_f32(pSrcA); - vec2 = vld1q_f32(pSrcB); - res = vsubq_f32(vec1, vec2); - vst1q_f32(pDst, res); - - /* Increment pointers */ - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A - B */ - - /* Subtract and store result in destination buffer. */ - *pDst++ = (*pSrcA++) - (*pSrcB++); - - *pDst++ = (*pSrcA++) - (*pSrcB++); - - *pDst++ = (*pSrcA++) - (*pSrcB++); - - *pDst++ = (*pSrcA++) - (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C = A - B */ - - /* Subtract and store result in destination buffer. */ - *pDst++ = (*pSrcA++) - (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicSub group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f64.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f64.c deleted file mode 100644 index fc6daa6..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f64.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sub_f64.c - * Description: Floating-point vector subtraction - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicSub - @{ - */ - -/** - @brief Floating-point vector subtraction. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_sub_f64( - const float64_t * pSrcA, - const float64_t * pSrcB, - float64_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = A - B */ - - /* Subtract and store result in destination buffer. */ - *pDst++ = (*pSrcA++) - (*pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of BasicSub group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c deleted file mode 100644 index a338f37..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c +++ /dev/null @@ -1,178 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sub_q15.c - * Description: Q15 vector subtraction - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicSub - @{ - */ - -/** - @brief Q15 vector subtraction. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_sub_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecA; - q15x8_t vecB; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* - * C = A - B - * Subtract and then store the results in the destination buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vst1q(pDst, vqsubq(vecA, vecB)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 8; - pSrcB += 8; - pDst += 8; - } - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vstrhq_p(pDst, vqsubq(vecA, vecB), p0); - } -} - - -#else -void arm_sub_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q31_t inA1, inA2; - q31_t inB1, inB2; -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A - B */ - -#if defined (ARM_MATH_DSP) - /* read 2 times 2 samples at a time from sourceA */ - inA1 = read_q15x2_ia (&pSrcA); - inA2 = read_q15x2_ia (&pSrcA); - /* read 2 times 2 samples at a time from sourceB */ - inB1 = read_q15x2_ia (&pSrcB); - inB2 = read_q15x2_ia (&pSrcB); - - /* Subtract and store 2 times 2 samples at a time */ - write_q15x2_ia (&pDst, __QSUB16(inA1, inB1)); - write_q15x2_ia (&pDst, __QSUB16(inA2, inB2)); -#else - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16); - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16); - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16); - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A - B */ - - /* Subtract and store result in destination buffer. */ -#if defined (ARM_MATH_DSP) - *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++); -#else - *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicSub group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c deleted file mode 100644 index 9ca84d0..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c +++ /dev/null @@ -1,159 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sub_q31.c - * Description: Q31 vector subtraction - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicSub - @{ - */ - -/** - @brief Q31 vector subtraction. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_sub_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - q31x4_t vecA; - q31x4_t vecB; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* - * C = A + B - * Add and then store the results in the destination buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vst1q(pDst, vqsubq(vecA, vecB)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 4; - pSrcB += 4; - pDst += 4; - } - /* - * tail - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vstrwq_p(pDst, vqsubq(vecA, vecB), p0); - } -} - -#else -void arm_sub_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A - B */ - - /* Subtract and store result in destination buffer. */ - *pDst++ = __QSUB(*pSrcA++, *pSrcB++); - - *pDst++ = __QSUB(*pSrcA++, *pSrcB++); - - *pDst++ = __QSUB(*pSrcA++, *pSrcB++); - - *pDst++ = __QSUB(*pSrcA++, *pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A - B */ - - /* Subtract and store result in destination buffer. */ - *pDst++ = __QSUB(*pSrcA++, *pSrcB++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicSub group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c deleted file mode 100644 index 3946101..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c +++ /dev/null @@ -1,158 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sub_q7.c - * Description: Q7 vector subtraction - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup BasicSub - @{ - */ - -/** - @brief Q7 vector subtraction. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_sub_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecA; - q7x16_t vecB; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - /* - * C = A - B - * Subtract and then store the results in the destination buffer. - */ - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vst1q(pDst, vqsubq(vecA, vecB)); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - /* - * advance vector source and destination pointers - */ - pSrcA += 16; - pSrcB += 16; - pDst += 16; - } - /* - * tail - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - vstrbq_p(pDst, vqsubq(vecA, vecB), p0); - } -} -#else -void arm_sub_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A - B */ - -#if defined (ARM_MATH_DSP) - /* Subtract and store result in destination buffer (4 samples at a time). */ - write_q7x4_ia (&pDst, __QSUB8(read_q7x4_ia (&pSrcA), read_q7x4_ia (&pSrcB))); -#else - *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8); - *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8); - *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8); - *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A - B */ - - /* Subtract and store result in destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicSub group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c deleted file mode 100644 index f75b619..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c +++ /dev/null @@ -1,137 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_xor_u16.c - * Description: uint16_t bitwise exclusive OR - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @defgroup Xor Vector bitwise exclusive OR - - Compute the logical bitwise XOR. - - There are separate functions for uint32_t, uint16_t, and uint8_t data types. - */ - -/** - @addtogroup Xor - @{ - */ - -/** - @brief Compute the logical bitwise XOR of two fixed-point vectors. - @param[in] pSrcA points to input vector A - @param[in] pSrcB points to input vector B - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_xor_u16( - const uint16_t * pSrcA, - const uint16_t * pSrcB, - uint16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint16x8_t vecSrcA, vecSrcB; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3; - - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vst1q(pDst, veorq_u16(vecSrcA, vecSrcB) ); - - pSrcA += 8; - pSrcB += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 7; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - vstrhq_p(pDst, veorq_u16(vecSrcA, vecSrcB), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint16x8_t vecA, vecB; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - vecA = vld1q_u16(pSrcA); - vecB = vld1q_u16(pSrcB); - - vst1q_u16(pDst, veorq_u16(vecA, vecB) ); - - pSrcA += 8; - pSrcB += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 7; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = (*pSrcA++)^(*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} - -/** - @} end of Xor group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c deleted file mode 100644 index 6216909..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_xor_u32.c - * Description: uint32_t bitwise exclusive OR - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup Xor - @{ - */ - -/** - @brief Compute the logical bitwise XOR of two fixed-point vectors. - @param[in] pSrcA points to input vector A - @param[in] pSrcB points to input vector B - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_xor_u32( - const uint32_t * pSrcA, - const uint32_t * pSrcB, - uint32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32x4_t vecSrcA, vecSrcB; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vst1q(pDst, veorq_u32(vecSrcA, vecSrcB) ); - - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 3; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - vstrwq_p(pDst, veorq_u32(vecSrcA, vecSrcB), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32x4_t vecA, vecB; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - vecA = vld1q_u32(pSrcA); - vecB = vld1q_u32(pSrcB); - - vst1q_u32(pDst, veorq_u32(vecA, vecB) ); - - pSrcA += 4; - pSrcB += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 3; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = (*pSrcA++)^(*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} - -/** - @} end of Xor group - */ diff --git a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c b/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c deleted file mode 100644 index a58bbde..0000000 --- a/Drivers/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_xor_u8.c - * Description: uint8_t bitwise exclusive OR - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/basic_math_functions.h" - -/** - @ingroup groupMath - */ - -/** - @addtogroup Xor - @{ - */ - -/** - @brief Compute the logical bitwise XOR of two fixed-point vectors. - @param[in] pSrcA points to input vector A - @param[in] pSrcB points to input vector B - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ - -void arm_xor_u8( - const uint8_t * pSrcA, - const uint8_t * pSrcB, - uint8_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - uint8x16_t vecSrcA, vecSrcB; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4; - - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vst1q(pDst, veorq_u8(vecSrcA, vecSrcB) ); - - pSrcA += 16; - pSrcB += 16; - pDst += 16; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0xF; - - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - vstrbq_p(pDst, veorq_u8(vecSrcA, vecSrcB), p0); - } -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - uint8x16_t vecA, vecB; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4U; - - while (blkCnt > 0U) - { - vecA = vld1q_u8(pSrcA); - vecB = vld1q_u8(pSrcB); - - vst1q_u8(pDst, veorq_u8(vecA, vecB) ); - - pSrcA += 16; - pSrcB += 16; - pDst += 16; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0xF; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - *pDst++ = (*pSrcA++)^(*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -#endif /* if defined(ARM_MATH_MVEI) */ -} - -/** - @} end of Xor group - */ diff --git a/Drivers/CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c b/Drivers/CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c deleted file mode 100644 index 21c3a26..0000000 --- a/Drivers/CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c +++ /dev/null @@ -1,29 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: BayesFunctions.c - * Description: Combination of all bayes function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_gaussian_naive_bayes_predict_f32.c" diff --git a/Drivers/CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c b/Drivers/CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c deleted file mode 100644 index 9751a36..0000000 --- a/Drivers/CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c +++ /dev/null @@ -1,27 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: BayesFunctions.c - * Description: Combination of all bayes function f16 source files. - * - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_gaussian_naive_bayes_predict_f16.c" diff --git a/Drivers/CMSIS/DSP/Source/BayesFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/BayesFunctions/CMakeLists.txt deleted file mode 100644 index b242c2b..0000000 --- a/Drivers/CMSIS/DSP/Source/BayesFunctions/CMakeLists.txt +++ /dev/null @@ -1,23 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPBayes) - -include(configLib) -include(configDsp) - -file(GLOB SRC "./*_*.c") - -add_library(CMSISDSPBayes STATIC) - -target_sources(CMSISDSPBayes PRIVATE arm_gaussian_naive_bayes_predict_f32.c) - -configLib(CMSISDSPBayes ${ROOT}) -configDsp(CMSISDSPBayes ${ROOT}) - -### Includes -target_include_directories(CMSISDSPBayes PUBLIC "${DSP}/Include") - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPBayes PRIVATE arm_gaussian_naive_bayes_predict_f16.c) -endif() - diff --git a/Drivers/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f16.c b/Drivers/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f16.c deleted file mode 100644 index e95ecbd..0000000 --- a/Drivers/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f16.c +++ /dev/null @@ -1,208 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_naive_gaussian_bayes_predict_f16 - * Description: Naive Gaussian Bayesian Estimator - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/bayes_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -#define PI_F 3.1415926535897932384626433832795f16 - -/** - * @addtogroup groupBayes - * @{ - */ - -/** - * @brief Naive Gaussian Bayesian Estimator - * - * @param[in] *S points to a naive bayes instance structure - * @param[in] *in points to the elements of the input vector. - * @param[out] *pOutputProbabilities points to a buffer of length numberOfClasses containing estimated probabilities - * @param[out] *pBufferB points to a temporary buffer of length numberOfClasses - * @return The predicted class - * - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math_f16.h" - -uint32_t arm_gaussian_naive_bayes_predict_f16(const arm_gaussian_naive_bayes_instance_f16 *S, - const float16_t * in, - float16_t *pOutputProbabilities, - float16_t *pBufferB - ) -{ - uint32_t nbClass; - const float16_t *pTheta = S->theta; - const float16_t *pSigma = S->sigma; - float16_t *buffer = pOutputProbabilities; - const float16_t *pIn = in; - float16_t result; - f16x8_t vsigma; - _Float16 tmp; - f16x8_t vacc1, vacc2; - uint32_t index; - float16_t *logclassPriors=pBufferB; - float16_t *pLogPrior = logclassPriors; - - arm_vlog_f16((float16_t *) S->classPriors, logclassPriors, S->numberOfClasses); - - pTheta = S->theta; - pSigma = S->sigma; - - for (nbClass = 0; nbClass < S->numberOfClasses; nbClass++) { - pIn = in; - - vacc1 = vdupq_n_f16(0.0f16); - vacc2 = vdupq_n_f16(0.0f16); - - uint32_t blkCnt =S->vectorDimension >> 3; - while (blkCnt > 0U) { - f16x8_t vinvSigma, vtmp; - - vsigma = vaddq_n_f16(vld1q(pSigma), S->epsilon); - vacc1 = vaddq(vacc1, vlogq_f16(vmulq_n_f16(vsigma, 2.0f16 * (_Float16)PI))); - - vinvSigma = vrecip_medprec_f16(vsigma); - - vtmp = vsubq(vld1q(pIn), vld1q(pTheta)); - /* squaring */ - vtmp = vmulq(vtmp, vtmp); - - vacc2 = vfmaq(vacc2, vtmp, vinvSigma); - - pIn += 8; - pTheta += 8; - pSigma += 8; - blkCnt--; - } - - blkCnt = S->vectorDimension & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vinvSigma, vtmp; - - vsigma = vaddq_n_f16(vld1q(pSigma), S->epsilon); - vacc1 = - vaddq_m_f16(vacc1, vacc1, vlogq_f16(vmulq_n_f16(vsigma, 2.0f16 * (_Float16)PI)), p0); - - vinvSigma = vrecip_medprec_f16(vsigma); - - vtmp = vsubq(vld1q(pIn), vld1q(pTheta)); - /* squaring */ - vtmp = vmulq(vtmp, vtmp); - - vacc2 = vfmaq_m_f16(vacc2, vtmp, vinvSigma, p0); - - pTheta += blkCnt; - pSigma += blkCnt; - } - - tmp = -0.5f16 * (_Float16)vecAddAcrossF16Mve(vacc1); - tmp -= 0.5f16 * (_Float16)vecAddAcrossF16Mve(vacc2); - - *buffer = tmp + *pLogPrior++; - buffer++; - } - - arm_max_f16(pOutputProbabilities, S->numberOfClasses, &result, &index); - - return (index); -} - -#else - -uint32_t arm_gaussian_naive_bayes_predict_f16(const arm_gaussian_naive_bayes_instance_f16 *S, - const float16_t * in, - float16_t *pOutputProbabilities, - float16_t *pBufferB) -{ - uint32_t nbClass; - uint32_t nbDim; - const float16_t *pPrior = S->classPriors; - const float16_t *pTheta = S->theta; - const float16_t *pSigma = S->sigma; - float16_t *buffer = pOutputProbabilities; - const float16_t *pIn=in; - float16_t result; - _Float16 sigma; - _Float16 tmp; - _Float16 acc1,acc2; - uint32_t index; - (void)pBufferB; - - pTheta=S->theta; - pSigma=S->sigma; - - for(nbClass = 0; nbClass < S->numberOfClasses; nbClass++) - { - - - pIn = in; - - tmp = 0.0f16; - acc1 = 0.0f16; - acc2 = 0.0f16; - for(nbDim = 0; nbDim < S->vectorDimension; nbDim++) - { - sigma = *pSigma + S->epsilon; - acc1 += logf(2.0f16 * (_Float16)PI_F * sigma); - acc2 += (*pIn - *pTheta) * (*pIn - *pTheta) / sigma; - - pIn++; - pTheta++; - pSigma++; - } - - tmp = -0.5f16 * acc1; - tmp -= 0.5f16 * acc2; - - - *buffer = tmp + logf(*pPrior++); - buffer++; - } - - arm_max_f16(pOutputProbabilities,S->numberOfClasses,&result,&index); - - return(index); -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of groupBayes group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c b/Drivers/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c deleted file mode 100644 index 9dd0e67..0000000 --- a/Drivers/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c +++ /dev/null @@ -1,396 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_naive_gaussian_bayes_predict_f32 - * Description: Naive Gaussian Bayesian Estimator - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/bayes_functions.h" -#include -#include - -#define PI_F 3.1415926535897932384626433832795f -#define DPI_F (2.0f*3.1415926535897932384626433832795f) - -/** - * @addtogroup groupBayes - * @{ - */ - -/** - * @brief Naive Gaussian Bayesian Estimator - * - * @param[in] *S points to a naive bayes instance structure - * @param[in] *in points to the elements of the input vector. - * @param[out] *pOutputProbabilities points to a buffer of length numberOfClasses containing estimated probabilities - * @param[out] *pBufferB points to a temporary buffer of length numberOfClasses - * @return The predicted class - * - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, - const float32_t * in, - float32_t *pOutputProbabilities, - float32_t *pBufferB - ) -{ - uint32_t nbClass; - const float32_t *pTheta = S->theta; - const float32_t *pSigma = S->sigma; - float32_t *buffer = pOutputProbabilities; - const float32_t *pIn = in; - float32_t result; - f32x4_t vsigma; - float32_t tmp; - f32x4_t vacc1, vacc2; - uint32_t index; - float32_t *logclassPriors=pBufferB; - float32_t *pLogPrior = logclassPriors; - - arm_vlog_f32((float32_t *) S->classPriors, logclassPriors, S->numberOfClasses); - - pTheta = S->theta; - pSigma = S->sigma; - - for (nbClass = 0; nbClass < S->numberOfClasses; nbClass++) { - pIn = in; - - vacc1 = vdupq_n_f32(0); - vacc2 = vdupq_n_f32(0); - - uint32_t blkCnt =S->vectorDimension >> 2; - while (blkCnt > 0U) { - f32x4_t vinvSigma, vtmp; - - vsigma = vaddq_n_f32(vld1q(pSigma), S->epsilon); - vacc1 = vaddq(vacc1, vlogq_f32(vmulq_n_f32(vsigma, 2.0f * PI))); - - vinvSigma = vrecip_medprec_f32(vsigma); - - vtmp = vsubq(vld1q(pIn), vld1q(pTheta)); - /* squaring */ - vtmp = vmulq(vtmp, vtmp); - - vacc2 = vfmaq(vacc2, vtmp, vinvSigma); - - pIn += 4; - pTheta += 4; - pSigma += 4; - blkCnt--; - } - - blkCnt = S->vectorDimension & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vinvSigma, vtmp; - - vsigma = vaddq_n_f32(vld1q(pSigma), S->epsilon); - vacc1 = - vaddq_m_f32(vacc1, vacc1, vlogq_f32(vmulq_n_f32(vsigma, 2.0f * PI)), p0); - - vinvSigma = vrecip_medprec_f32(vsigma); - - vtmp = vsubq(vld1q(pIn), vld1q(pTheta)); - /* squaring */ - vtmp = vmulq(vtmp, vtmp); - - vacc2 = vfmaq_m_f32(vacc2, vtmp, vinvSigma, p0); - - pTheta += blkCnt; - pSigma += blkCnt; - } - - tmp = -0.5f * vecAddAcrossF32Mve(vacc1); - tmp -= 0.5f * vecAddAcrossF32Mve(vacc2); - - *buffer = tmp + *pLogPrior++; - buffer++; - } - - arm_max_f32(pOutputProbabilities, S->numberOfClasses, &result, &index); - - return (index); -} - -#else - -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" - - - -uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, - const float32_t * in, - float32_t *pOutputProbabilities, - float32_t *pBufferB) -{ - - const float32_t *pPrior = S->classPriors; - - const float32_t *pTheta = S->theta; - const float32_t *pSigma = S->sigma; - - const float32_t *pTheta1 = S->theta + S->vectorDimension; - const float32_t *pSigma1 = S->sigma + S->vectorDimension; - - float32_t *buffer = pOutputProbabilities; - const float32_t *pIn=in; - - float32_t result; - float32_t sigma,sigma1; - float32_t tmp,tmp1; - uint32_t index; - uint32_t vecBlkCnt; - uint32_t classBlkCnt; - float32x4_t epsilonV; - float32x4_t sigmaV,sigmaV1; - float32x4_t tmpV,tmpVb,tmpV1; - float32x2_t tmpV2; - float32x4_t thetaV,thetaV1; - float32x4_t inV; - (void)pBufferB; - - epsilonV = vdupq_n_f32(S->epsilon); - - classBlkCnt = S->numberOfClasses >> 1; - while(classBlkCnt > 0) - { - - - pIn = in; - - tmp = logf(*pPrior++); - tmp1 = logf(*pPrior++); - tmpV = vdupq_n_f32(0.0f); - tmpV1 = vdupq_n_f32(0.0f); - - vecBlkCnt = S->vectorDimension >> 2; - while(vecBlkCnt > 0) - { - sigmaV = vld1q_f32(pSigma); - thetaV = vld1q_f32(pTheta); - - sigmaV1 = vld1q_f32(pSigma1); - thetaV1 = vld1q_f32(pTheta1); - - inV = vld1q_f32(pIn); - - sigmaV = vaddq_f32(sigmaV, epsilonV); - sigmaV1 = vaddq_f32(sigmaV1, epsilonV); - - tmpVb = vmulq_n_f32(sigmaV,DPI_F); - tmpVb = vlogq_f32(tmpVb); - tmpV = vmlsq_n_f32(tmpV,tmpVb,0.5f); - - tmpVb = vmulq_n_f32(sigmaV1,DPI_F); - tmpVb = vlogq_f32(tmpVb); - tmpV1 = vmlsq_n_f32(tmpV1,tmpVb,0.5f); - - tmpVb = vsubq_f32(inV,thetaV); - tmpVb = vmulq_f32(tmpVb,tmpVb); - tmpVb = vmulq_f32(tmpVb, vinvq_f32(sigmaV)); - tmpV = vmlsq_n_f32(tmpV,tmpVb,0.5f); - - tmpVb = vsubq_f32(inV,thetaV1); - tmpVb = vmulq_f32(tmpVb,tmpVb); - tmpVb = vmulq_f32(tmpVb, vinvq_f32(sigmaV1)); - tmpV1 = vmlsq_n_f32(tmpV1,tmpVb,0.5f); - - pIn += 4; - pTheta += 4; - pSigma += 4; - pTheta1 += 4; - pSigma1 += 4; - - vecBlkCnt--; - } - tmpV2 = vpadd_f32(vget_low_f32(tmpV),vget_high_f32(tmpV)); - tmp += vget_lane_f32(tmpV2, 0) + vget_lane_f32(tmpV2, 1); - - tmpV2 = vpadd_f32(vget_low_f32(tmpV1),vget_high_f32(tmpV1)); - tmp1 += vget_lane_f32(tmpV2, 0) + vget_lane_f32(tmpV2, 1); - - vecBlkCnt = S->vectorDimension & 3; - while(vecBlkCnt > 0) - { - sigma = *pSigma + S->epsilon; - sigma1 = *pSigma1 + S->epsilon; - - tmp -= 0.5f*logf(2.0f * PI_F * sigma); - tmp -= 0.5f*(*pIn - *pTheta) * (*pIn - *pTheta) / sigma; - - tmp1 -= 0.5f*logf(2.0f * PI_F * sigma1); - tmp1 -= 0.5f*(*pIn - *pTheta1) * (*pIn - *pTheta1) / sigma1; - - pIn++; - pTheta++; - pSigma++; - pTheta1++; - pSigma1++; - vecBlkCnt--; - } - - *buffer++ = tmp; - *buffer++ = tmp1; - - pSigma += S->vectorDimension; - pTheta += S->vectorDimension; - pSigma1 += S->vectorDimension; - pTheta1 += S->vectorDimension; - - classBlkCnt--; - } - - classBlkCnt = S->numberOfClasses & 1; - - while(classBlkCnt > 0) - { - - - pIn = in; - - tmp = logf(*pPrior++); - tmpV = vdupq_n_f32(0.0f); - - vecBlkCnt = S->vectorDimension >> 2; - while(vecBlkCnt > 0) - { - sigmaV = vld1q_f32(pSigma); - thetaV = vld1q_f32(pTheta); - inV = vld1q_f32(pIn); - - sigmaV = vaddq_f32(sigmaV, epsilonV); - - tmpVb = vmulq_n_f32(sigmaV,DPI_F); - tmpVb = vlogq_f32(tmpVb); - tmpV = vmlsq_n_f32(tmpV,tmpVb,0.5f); - - tmpVb = vsubq_f32(inV,thetaV); - tmpVb = vmulq_f32(tmpVb,tmpVb); - tmpVb = vmulq_f32(tmpVb, vinvq_f32(sigmaV)); - tmpV = vmlsq_n_f32(tmpV,tmpVb,0.5f); - - pIn += 4; - pTheta += 4; - pSigma += 4; - - vecBlkCnt--; - } - tmpV2 = vpadd_f32(vget_low_f32(tmpV),vget_high_f32(tmpV)); - tmp += vget_lane_f32(tmpV2, 0) + vget_lane_f32(tmpV2, 1); - - vecBlkCnt = S->vectorDimension & 3; - while(vecBlkCnt > 0) - { - sigma = *pSigma + S->epsilon; - tmp -= 0.5f*logf(2.0f * PI_F * sigma); - tmp -= 0.5f*(*pIn - *pTheta) * (*pIn - *pTheta) / sigma; - - pIn++; - pTheta++; - pSigma++; - vecBlkCnt--; - } - - *buffer++ = tmp; - - classBlkCnt--; - } - - arm_max_f32(pOutputProbabilities,S->numberOfClasses,&result,&index); - - return(index); -} - -#else - -uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, - const float32_t * in, - float32_t *pOutputProbabilities, - float32_t *pBufferB) -{ - uint32_t nbClass; - uint32_t nbDim; - const float32_t *pPrior = S->classPriors; - const float32_t *pTheta = S->theta; - const float32_t *pSigma = S->sigma; - float32_t *buffer = pOutputProbabilities; - const float32_t *pIn=in; - float32_t result; - float32_t sigma; - float32_t tmp; - float32_t acc1,acc2; - uint32_t index; - - (void)pBufferB; - - pTheta=S->theta; - pSigma=S->sigma; - - for(nbClass = 0; nbClass < S->numberOfClasses; nbClass++) - { - - - pIn = in; - - tmp = 0.0; - acc1 = 0.0f; - acc2 = 0.0f; - for(nbDim = 0; nbDim < S->vectorDimension; nbDim++) - { - sigma = *pSigma + S->epsilon; - acc1 += logf(2.0f * PI_F * sigma); - acc2 += (*pIn - *pTheta) * (*pIn - *pTheta) / sigma; - - pIn++; - pTheta++; - pSigma++; - } - - tmp = -0.5f * acc1; - tmp -= 0.5f * acc2; - - - *buffer = tmp + logf(*pPrior++); - buffer++; - } - - arm_max_f32(pOutputProbabilities,S->numberOfClasses,&result,&index); - - return(index); -} - -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of groupBayes group - */ diff --git a/Drivers/CMSIS/DSP/Source/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/CMakeLists.txt deleted file mode 100644 index 0935490..0000000 --- a/Drivers/CMSIS/DSP/Source/CMakeLists.txt +++ /dev/null @@ -1,310 +0,0 @@ -cmake_minimum_required (VERSION 3.14) -cmake_policy(SET CMP0077 NEW) -project(CMSISDSP) - -# DSP Sources -SET(DSP ${ROOT}/CMSIS/DSP) - -list(APPEND CMAKE_MODULE_PATH ${DSP}/Source) -list(APPEND CMAKE_MODULE_PATH ${DSP}) - - -include(configLib) - - -option(NEON "Neon acceleration" OFF) -option(NEONEXPERIMENTAL "Neon experimental acceleration" OFF) -option(HELIUMEXPERIMENTAL "Helium experimental acceleration" OFF) -option(LOOPUNROLL "Loop unrolling" ON) -option(ROUNDING "Rounding" OFF) -option(MATRIXCHECK "Matrix Checks" OFF) -option(HELIUM "Helium acceleration (MVEF and MVEI supported)" OFF) -option(MVEF "MVEF intrinsics supported" OFF) -option(MVEI "MVEI intrinsics supported" OFF) -option(MVEFLOAT16 "Float16 MVE intrinsics supported" OFF) -option(DISABLEFLOAT16 "Disable building float16 kernels" OFF) -option(HOST "Build for host" OFF) - -# Select which parts of the CMSIS-DSP must be compiled. -# There are some dependencies between the parts but they are not tracked -# by this cmake. So, enabling some functions may require to enable some -# other ones. -option(BASICMATH "Basic Math Functions" ON) -option(COMPLEXMATH "Complex Math Functions" ON) -option(CONTROLLER "Controller Functions" ON) -option(FASTMATH "Fast Math Functions" ON) -option(FILTERING "Filtering Functions" ON) -option(MATRIX "Matrix Functions" ON) -option(STATISTICS "Statistics Functions" ON) -option(SUPPORT "Support Functions" ON) -option(TRANSFORM "Transform Functions" ON) -option(SVM "Support Vector Machine Functions" ON) -option(BAYES "Bayesian Estimators" ON) -option(DISTANCE "Distance Functions" ON) -option(INTERPOLATION "Interpolation Functions" ON) -option(QUATERNIONMATH "Quaternion Math Functions" ON) - -# When OFF it is the default behavior : all tables are included. -option(CONFIGTABLE "Configuration of table allowed" OFF) - -# When CONFIGTABLE is ON, select if all interpolation tables must be included -option(ALLFAST "All interpolation tables included" OFF) -# When CONFIGTABLE is ON, select if all FFT tables must be included -option(ALLFFT "All fft tables included" OFF) - -# Features which require inclusion of a data table. -# Since some tables may be big, the corresponding feature can be -# disabled. -# Those options are taken into account only when CONFIGTABLE is ON -option(ARM_COS_F32 "cos f32" OFF) -option(ARM_COS_Q31 "cos q31" OFF) -option(ARM_COS_Q15 "cos q15" OFF) -option(ARM_SIN_F32 "sin f32" OFF) -option(ARM_SIN_Q31 "sin q31" OFF) -option(ARM_SIN_Q15 "sin q15" OFF) -option(ARM_SIN_COS_F32 "sin cos f32" OFF) -option(ARM_SIN_COS_Q31 "sin cos q31" OFF) - -option(ARM_LMS_NORM_Q31 "lms norm q31" OFF) -option(ARM_LMS_NORM_Q15 "lms norm q15" OFF) - -option(CFFT_F64_16 "cfft f64 16" OFF) -option(CFFT_F64_32 "cfft f64 32" OFF) -option(CFFT_F64_64 "cfft f64 64" OFF) -option(CFFT_F64_128 "cfft f64 128" OFF) -option(CFFT_F64_256 "cfft f64 256" OFF) -option(CFFT_F64_512 "cfft f64 512" OFF) -option(CFFT_F64_1024 "cfft f64 1024" OFF) -option(CFFT_F64_2048 "cfft f64 2048" OFF) -option(CFFT_F64_4096 "cfft f64 4096" OFF) - -option(CFFT_F32_16 "cfft f32 16" OFF) -option(CFFT_F32_32 "cfft f32 32" OFF) -option(CFFT_F32_64 "cfft f32 64" OFF) -option(CFFT_F32_128 "cfft f32 128" OFF) -option(CFFT_F32_256 "cfft f32 256" OFF) -option(CFFT_F32_512 "cfft f32 512" OFF) -option(CFFT_F32_1024 "cfft f32 1024" OFF) -option(CFFT_F32_2048 "cfft f32 2048" OFF) -option(CFFT_F32_4096 "cfft f32 4096" OFF) - -option(CFFT_Q31_16 "cfft q31 16" OFF) -option(CFFT_Q31_32 "cfft q31 32" OFF) -option(CFFT_Q31_64 "cfft q31 64" OFF) -option(CFFT_Q31_128 "cfft q31 128" OFF) -option(CFFT_Q31_256 "cfft q31 256" OFF) -option(CFFT_Q31_512 "cfft q31 512" OFF) -option(CFFT_Q31_1024 "cfft q31 1024" OFF) -option(CFFT_Q31_2048 "cfft q31 2048" OFF) -option(CFFT_Q31_4096 "cfft q31 4096" OFF) - -option(CFFT_Q15_16 "cfft q15 16" OFF) -option(CFFT_Q15_32 "cfft q15 32" OFF) -option(CFFT_Q15_64 "cfft q15 64" OFF) -option(CFFT_Q15_128 "cfft q15 128" OFF) -option(CFFT_Q15_256 "cfft q15 256" OFF) -option(CFFT_Q15_512 "cfft q15 512" OFF) -option(CFFT_Q15_1024 "cfft q15 1024" OFF) -option(CFFT_Q15_2048 "cfft q15 2048" OFF) -option(CFFT_Q15_4096 "cfft q15 4096" OFF) - -option(RFFT_FAST_F32_32 "rfft fast f32 32" OFF) -option(RFFT_FAST_F32_64 "rfft fast f32 64" OFF) -option(RFFT_FAST_F32_128 "rfft fast f32 128" OFF) -option(RFFT_FAST_F32_256 "rfft fast f32 256" OFF) -option(RFFT_FAST_F32_512 "rfft fast f32 512" OFF) -option(RFFT_FAST_F32_1024 "rfft fast f32 1024" OFF) -option(RFFT_FAST_F32_2048 "rfft fast f32 2048" OFF) -option(RFFT_FAST_F32_4096 "rfft fast f32 4096" OFF) - - -option(RFFT_F32_128 "rfft f32 128" OFF) -option(RFFT_F32_512 "rfft f32 512" OFF) -option(RFFT_F32_2048 "rfft f32 2048" OFF) -option(RFFT_F32_8192 "rfft f32 8192" OFF) - -option(RFFT_FAST_F64_32 "rfft fast f64 32" OFF) -option(RFFT_FAST_F64_64 "rfft fast f64 64" OFF) -option(RFFT_FAST_F64_128 "rfft fast f64 128" OFF) -option(RFFT_FAST_F64_256 "rfft fast f64 256" OFF) -option(RFFT_FAST_F64_512 "rfft fast f64 512" OFF) -option(RFFT_FAST_F64_1024 "rfft fast f64 1024" OFF) -option(RFFT_FAST_F64_2048 "rfft fast f64 2048" OFF) -option(RFFT_FAST_F64_4096 "rfft fast f64 4096" OFF) - - -option(RFFT_F64_128 "rfft f64 128" OFF) -option(RFFT_F64_512 "rfft f64 512" OFF) -option(RFFT_F64_2048 "rfft f64 2048" OFF) -option(RFFT_F64_8192 "rfft f64 8192" OFF) - -option(RFFT_FAST_F16_32 "rfft fast f16 32" OFF) -option(RFFT_FAST_F16_64 "rfft fast f16 64" OFF) -option(RFFT_FAST_F16_128 "rfft fast f16 128" OFF) -option(RFFT_FAST_F16_256 "rfft fast f16 256" OFF) -option(RFFT_FAST_F16_512 "rfft fast f16 512" OFF) -option(RFFT_FAST_F16_1024 "rfft fast f16 1024" OFF) -option(RFFT_FAST_F16_2048 "rfft fast f16 2048" OFF) -option(RFFT_FAST_F16_4096 "rfft fast f16 4096" OFF) - -option(RFFT_Q31_32 "rfft q31 32" OFF) -option(RFFT_Q31_64 "rfft q31 64" OFF) -option(RFFT_Q31_128 "rfft q31 128" OFF) -option(RFFT_Q31_256 "rfft q31 256" OFF) -option(RFFT_Q31_512 "rfft q31 512" OFF) -option(RFFT_Q31_1024 "rfft q31 1024" OFF) -option(RFFT_Q31_2048 "rfft q31 2048" OFF) -option(RFFT_Q31_4096 "rfft q31 4096" OFF) -option(RFFT_Q31_8192 "rfft q31 8192" OFF) - -option(RFFT_Q15_32 "rfft q15 32" OFF) -option(RFFT_Q15_64 "rfft q15 64" OFF) -option(RFFT_Q15_128 "rfft q15 128" OFF) -option(RFFT_Q15_256 "rfft q15 256" OFF) -option(RFFT_Q15_512 "rfft q15 512" OFF) -option(RFFT_Q15_1024 "rfft q15 1024" OFF) -option(RFFT_Q15_2048 "rfft q15 2048" OFF) -option(RFFT_Q15_4096 "rfft q15 4096" OFF) -option(RFFT_Q15_8192 "rfft q15 8192" OFF) - -option(DCT4_F32_128 "dct4 f32 128" OFF) -option(DCT4_F32_512 "dct4 f32 512" OFF) -option(DCT4_F32_2048 "dct4 f32 2048" OFF) -option(DCT4_F32_8192 "dct4 f32 8192" OFF) - -option(DCT4_Q31_128 "dct4 q31 128" OFF) -option(DCT4_Q31_512 "dct4 q31 512" OFF) -option(DCT4_Q31_2048 "dct4 q31 2048" OFF) -option(DCT4_Q31_8192 "dct4 q31 8192" OFF) - -option(DCT4_Q15_128 "dct4 q15 128" OFF) -option(DCT4_Q15_512 "dct4 q15 512" OFF) -option(DCT4_Q15_2048 "dct4 q15 2048" OFF) -option(DCT4_Q15_8192 "dct4 q15 8192" OFF) - -option(ARM_CFFT_RADIX2_Q15 "deprecated q15 radix2 cfft" OFF) -option(ARM_CFFT_RADIX4_Q15 "deprecated q15 radix4 cfft" OFF) - -option(ARM_CFFT_RADIX2_Q31 "deprecated q31 radix2 cfft" OFF) -option(ARM_CFFT_RADIX4_Q31 "deprecated q31 radix4 cfft" OFF) - -########################### -# -# CMSIS DSP -# -########################### - - - -add_library(CMSISDSP INTERFACE) - -if (BASICMATH) - add_subdirectory(BasicMathFunctions) - target_link_libraries(CMSISDSP INTERFACE CMSISDSPBasicMath) -endif() - -if (COMPLEXMATH) - add_subdirectory(ComplexMathFunctions) - target_link_libraries(CMSISDSP INTERFACE CMSISDSPComplexMath) -endif() - -if (QUATERNIONMATH) - add_subdirectory(QuaternionMathFunctions) - target_link_libraries(CMSISDSP INTERFACE CMSISDSPQuaternionMath) -endif() - -if (CONTROLLER) - add_subdirectory(ControllerFunctions) - # Fast tables inclusion is allowed - if (CONFIGTABLE) - target_compile_definitions(CMSISDSPController PUBLIC ARM_FAST_ALLOW_TABLES) - endif() - target_link_libraries(CMSISDSP INTERFACE CMSISDSPController) -endif() - -if (FASTMATH) - add_subdirectory(FastMathFunctions) - # Fast tables inclusion is allowed - if (CONFIGTABLE) - target_compile_definitions(CMSISDSPFastMath PUBLIC ARM_FAST_ALLOW_TABLES) - endif() - target_link_libraries(CMSISDSP INTERFACE CMSISDSPFastMath) -endif() - -if (FILTERING) - add_subdirectory(FilteringFunctions) - # Fast tables inclusion is allowed - if (CONFIGTABLE) - target_compile_definitions(CMSISDSPFiltering PUBLIC ARM_FAST_ALLOW_TABLES) - endif() - target_link_libraries(CMSISDSP INTERFACE CMSISDSPFiltering) -endif() - -if (MATRIX) - add_subdirectory(MatrixFunctions) - target_link_libraries(CMSISDSP INTERFACE CMSISDSPMatrix) -endif() - -if (STATISTICS) - add_subdirectory(StatisticsFunctions) - target_link_libraries(CMSISDSP INTERFACE CMSISDSPStatistics) -endif() - -if (SUPPORT) - add_subdirectory(SupportFunctions) - target_link_libraries(CMSISDSP INTERFACE CMSISDSPSupport) -endif() - -if (TRANSFORM) - add_subdirectory(TransformFunctions) - # FFT tables inclusion is allowed - if (CONFIGTABLE) - target_compile_definitions(CMSISDSPTransform PUBLIC ARM_FFT_ALLOW_TABLES) - endif() - target_link_libraries(CMSISDSP INTERFACE CMSISDSPTransform) -endif() - -if (FILTERING OR CONTROLLER OR FASTMATH OR TRANSFORM OR SVM OR DISTANCE) - add_subdirectory(CommonTables) - if (TRANSFORM) - # FFT tables inclusion is allowed - if (CONFIGTABLE) - target_compile_definitions(CMSISDSPCommon PUBLIC ARM_FFT_ALLOW_TABLES) - endif() - endif() - if (FILTERING OR CONTROLLER OR FASTMATH) - # Select which tables to include - if (CONFIGTABLE) - target_compile_definitions(CMSISDSPCommon PUBLIC ARM_FAST_ALLOW_TABLES) - endif() - endif() - target_link_libraries(CMSISDSP INTERFACE CMSISDSPCommon) - # Common project is adding ComputeLibrary tables used by SVM and Distance - # when NEon is ON. -endif() - -if (SVM) - add_subdirectory(SVMFunctions) - target_link_libraries(CMSISDSP INTERFACE CMSISDSPSVM) -endif() - -if (BAYES) - add_subdirectory(BayesFunctions) - target_link_libraries(CMSISDSP INTERFACE CMSISDSPBayes) -endif() - -if (DISTANCE) - add_subdirectory(DistanceFunctions) - target_link_libraries(CMSISDSP INTERFACE CMSISDSPDistance) -endif() - -if (INTERPOLATION) - add_subdirectory(InterpolationFunctions) - target_link_libraries(CMSISDSP INTERFACE CMSISDSPInterpolation) -endif() - -### Includes -target_include_directories(CMSISDSP INTERFACE "${DSP}/Include") - - - diff --git a/Drivers/CMSIS/DSP/Source/CommonTables/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/CommonTables/CMakeLists.txt deleted file mode 100644 index 50e89e8..0000000 --- a/Drivers/CMSIS/DSP/Source/CommonTables/CMakeLists.txt +++ /dev/null @@ -1,52 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPCommon) - -include(configLib) -include(configDsp) - -add_library(CMSISDSPCommon STATIC arm_common_tables.c arm_common_tables_f16.c) - -configLib(CMSISDSPCommon ${ROOT}) -configDsp(CMSISDSPCommon ${ROOT}) - -if (CONFIGTABLE AND ALLFFT) - target_compile_definitions(CMSISDSPCommon PUBLIC ARM_ALL_FFT_TABLES) -endif() - -if (CONFIGTABLE AND ALLFAST) - target_compile_definitions(CMSISDSPCommon PUBLIC ARM_ALL_FAST_TABLES) -endif() - -include(fft) -fft(CMSISDSPCommon) - -include(interpol) -interpol(CMSISDSPCommon) - -target_sources(CMSISDSPCommon PRIVATE arm_const_structs.c) -target_sources(CMSISDSPCommon PRIVATE arm_const_structs_f16.c) - - -### Includes -target_include_directories(CMSISDSPCommon PUBLIC "${DSP}/Include") - -if (NEON OR NEONEXPERIMENTAL) - target_sources(CMSISDSPCommon PRIVATE "${DSP}/ComputeLibrary/Source/arm_cl_tables.c") -endif() - -if (HELIUM OR MVEF) - target_sources(CMSISDSPCommon PRIVATE "${DSP}/Source/CommonTables/arm_mve_tables.c") - target_sources(CMSISDSPCommon PRIVATE "${DSP}/Source/CommonTables/arm_mve_tables_f16.c") -endif() - - -if (WRAPPER) - target_compile_definitions(CMSISDSPCommon PUBLIC ARM_TABLE_BITREV_1024) - target_compile_definitions(CMSISDSPCommon PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096) - target_compile_definitions(CMSISDSPCommon PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_4096) - target_compile_definitions(CMSISDSPCommon PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_4096) - if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) - target_compile_definitions(CMSISDSPCommon PUBLIC ARM_TABLE_TWIDDLECOEF_F16_4096) - endif() -endif() \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/CommonTables/CommonTables.c b/Drivers/CMSIS/DSP/Source/CommonTables/CommonTables.c deleted file mode 100644 index f73d987..0000000 --- a/Drivers/CMSIS/DSP/Source/CommonTables/CommonTables.c +++ /dev/null @@ -1,31 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: CommonTables.c - * Description: Combination of all common table source files. - * - * $Date: 08. January 2020 - * $Revision: V1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_common_tables.c" -#include "arm_const_structs.c" -#include "arm_mve_tables.c" diff --git a/Drivers/CMSIS/DSP/Source/CommonTables/CommonTablesF16.c b/Drivers/CMSIS/DSP/Source/CommonTables/CommonTablesF16.c deleted file mode 100644 index cc822a1..0000000 --- a/Drivers/CMSIS/DSP/Source/CommonTables/CommonTablesF16.c +++ /dev/null @@ -1,31 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: CommonTables.c - * Description: Combination of all common table source files. - * - * $Date: 08. January 2020 - * $Revision: V1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_common_tables_f16.c" -#include "arm_const_structs_f16.c" -#include "arm_mve_tables_f16.c" diff --git a/Drivers/CMSIS/DSP/Source/CommonTables/arm_common_tables.c b/Drivers/CMSIS/DSP/Source/CommonTables/arm_common_tables.c deleted file mode 100644 index ab31aff..0000000 --- a/Drivers/CMSIS/DSP/Source/CommonTables/arm_common_tables.c +++ /dev/null @@ -1,70576 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_common_tables.c - * Description: common tables like fft twiddle factors, Bitreverse, reciprocal etc - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_math_types.h" -#include "arm_common_tables.h" - -/** - @ingroup ComplexFFT - */ - -/** - @addtogroup CFFT_CIFFT Complex FFT Tables - @{ - */ - -/** - @par - Pseudo code for Generation of Bit reversal Table is - @par - 
for (l = 1; l <= N/4; l++)
-  {
-    for (i = 0; i< logN2; i++)
-    {
-      a[i] = l & (1 << i);
-    }
-    for (j = 0; j < logN2; j++)
-    {
-      if (a[j] != 0)
-      y[l] += (1 << ((logN2 - 1) - j));
-    }
-    y[l] = y[l] >> 1;
-   }
- @par - where N = 4096, logN2 = 12 - @par - N is the maximum FFT Size supported -*/ - -/** - @brief Table for bit reversal process -*/ -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024) -const uint16_t armBitRevTable[1024] = { - 0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x080, 0x480, 0x280, - 0x680, 0x180, 0x580, 0x380, 0x780, 0x040, 0x440, 0x240, 0x640, 0x140, - 0x540, 0x340, 0x740, 0x0c0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0, - 0x7c0, 0x020, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0x0a0, - 0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x060, 0x460, 0x260, - 0x660, 0x160, 0x560, 0x360, 0x760, 0x0e0, 0x4e0, 0x2e0, 0x6e0, 0x1e0, - 0x5e0, 0x3e0, 0x7e0, 0x010, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310, - 0x710, 0x090, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x050, - 0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0x0d0, 0x4d0, 0x2d0, - 0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x030, 0x430, 0x230, 0x630, 0x130, - 0x530, 0x330, 0x730, 0x0b0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0, - 0x7b0, 0x070, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0x0f0, - 0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x008, 0x408, 0x208, - 0x608, 0x108, 0x508, 0x308, 0x708, 0x088, 0x488, 0x288, 0x688, 0x188, - 0x588, 0x388, 0x788, 0x048, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348, - 0x748, 0x0c8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x028, - 0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0x0a8, 0x4a8, 0x2a8, - 0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x068, 0x468, 0x268, 0x668, 0x168, - 0x568, 0x368, 0x768, 0x0e8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8, - 0x7e8, 0x018, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x098, - 0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x058, 0x458, 0x258, - 0x658, 0x158, 0x558, 0x358, 0x758, 0x0d8, 0x4d8, 0x2d8, 0x6d8, 0x1d8, - 0x5d8, 0x3d8, 0x7d8, 0x038, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338, - 0x738, 0x0b8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x078, - 0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0x0f8, 0x4f8, 0x2f8, - 0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x004, 0x404, 0x204, 0x604, 0x104, - 0x504, 0x304, 0x704, 0x084, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384, - 0x784, 0x044, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0x0c4, - 0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x024, 0x424, 0x224, - 0x624, 0x124, 0x524, 0x324, 0x724, 0x0a4, 0x4a4, 0x2a4, 0x6a4, 0x1a4, - 0x5a4, 0x3a4, 0x7a4, 0x064, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364, - 0x764, 0x0e4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x014, - 0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x094, 0x494, 0x294, - 0x694, 0x194, 0x594, 0x394, 0x794, 0x054, 0x454, 0x254, 0x654, 0x154, - 0x554, 0x354, 0x754, 0x0d4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4, - 0x7d4, 0x034, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0x0b4, - 0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x074, 0x474, 0x274, - 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for (i = 0; i < N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(double)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(double)N);
-  }
- @par - where N = 16, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const uint64_t twiddleCoefF64_16[32] = { - 0x3ff0000000000000, 0x0000000000000000, // 1, 0' - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268' - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711' - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388' - 0x0000000000000000, 0x3ff0000000000000, // 0, 1' - 0xbfd87de2a6aea963, 0x3fed906bcf328d46, //-0.38268, 0.92388' - 0xbfe6a09e667f3bcc, 0x3fe6a09e667f3bcc, //-0.70711, 0.70711' - 0xbfed906bcf328d46, 0x3fd87de2a6aea963, //-0.92388, 0.38268' - 0xbff0000000000000, 0x0000000000000000, // -1, 0' - 0xbfed906bcf328d46, 0xbfd87de2a6aea963, //-0.92388,-0.38268' - 0xbfe6a09e667f3bcc, 0xbfe6a09e667f3bcc, //-0.70711,-0.70711' - 0xbfd87de2a6aea963, 0xbfed906bcf328d46, //-0.38268,-0.92388' - 0x0000000000000000, 0xbff0000000000000, // 0, -1' - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268,-0.92388' - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711,-0.70711' - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388,-0.38268' -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_32) - -/** - @par - Example code for Double Precision Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/N);
-  }
- @par - where N = 32, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const uint64_t twiddleCoefF64_32[64] = { - 0x3ff0000000000000, 0x0000000000000000, // 1, 0' - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509' - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268' - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557' - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711' - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147' - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388' - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079' - 0x0000000000000000, 0x3ff0000000000000, // 0, 1' - 0xbfc8f8b83c69a60a, 0x3fef6297cff75cb0, //-0.19509, 0.98079' - 0xbfd87de2a6aea963, 0x3fed906bcf328d46, //-0.38268, 0.92388' - 0xbfe1c73b39ae68c8, 0x3fea9b66290ea1a3, //-0.55557, 0.83147' - 0xbfe6a09e667f3bcc, 0x3fe6a09e667f3bcc, //-0.70711, 0.70711' - 0xbfea9b66290ea1a3, 0x3fe1c73b39ae68c8, //-0.83147, 0.55557' - 0xbfed906bcf328d46, 0x3fd87de2a6aea963, //-0.92388, 0.38268' - 0xbfef6297cff75cb0, 0x3fc8f8b83c69a60a, //-0.98079, 0.19509' - 0xbff0000000000000, 0x0000000000000000, // -1, 0' - 0xbfef6297cff75cb0, 0xbfc8f8b83c69a60a, //-0.98079,-0.19509' - 0xbfed906bcf328d46, 0xbfd87de2a6aea963, //-0.92388,-0.38268' - 0xbfea9b66290ea1a3, 0xbfe1c73b39ae68c8, //-0.83147,-0.55557' - 0xbfe6a09e667f3bcc, 0xbfe6a09e667f3bcc, //-0.70711,-0.70711' - 0xbfe1c73b39ae68c8, 0xbfea9b66290ea1a3, //-0.55557,-0.83147' - 0xbfd87de2a6aea963, 0xbfed906bcf328d46, //-0.38268,-0.92388' - 0xbfc8f8b83c69a60a, 0xbfef6297cff75cb0, //-0.19509,-0.98079' - 0x0000000000000000, 0xbff0000000000000, // 0, -1' - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509,-0.98079' - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268,-0.92388' - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557,-0.83147' - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711,-0.70711' - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147,-0.55557' - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388,-0.38268' - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079,-0.19509' -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_64) -/** - @par - Example code for Double Precision Floating-point Twiddle factors Generation: - @par - 
for(i = 0; i < N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 64, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const uint64_t twiddleCoefF64_64[128] = { - 0x3ff0000000000000, 0x0000000000000000, // 1, 0' - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017' - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509' - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028' - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268' - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714' - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557' - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439' - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711' - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301' - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147' - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192' - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388' - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694' - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079' - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, // 0.098017, 0.99518' - 0x0000000000000000, 0x3ff0000000000000, // 0, 1' - 0xbfb917a6bc29b42c, 0x3fefd88da3d12526, //-0.098017, 0.99518' - 0xbfc8f8b83c69a60a, 0x3fef6297cff75cb0, // -0.19509, 0.98079' - 0xbfd294062ed59f05, 0x3fee9f4156c62dda, // -0.29028, 0.95694' - 0xbfd87de2a6aea963, 0x3fed906bcf328d46, // -0.38268, 0.92388' - 0xbfde2b5d3806f63b, 0x3fec38b2f180bdb1, // -0.4714, 0.88192' - 0xbfe1c73b39ae68c8, 0x3fea9b66290ea1a3, // -0.55557, 0.83147' - 0xbfe44cf325091dd6, 0x3fe8bc806b151741, // -0.63439, 0.77301' - 0xbfe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // -0.70711, 0.70711' - 0xbfe8bc806b151741, 0x3fe44cf325091dd6, // -0.77301, 0.63439' - 0xbfea9b66290ea1a3, 0x3fe1c73b39ae68c8, // -0.83147, 0.55557' - 0xbfec38b2f180bdb1, 0x3fde2b5d3806f63b, // -0.88192, 0.4714' - 0xbfed906bcf328d46, 0x3fd87de2a6aea963, // -0.92388, 0.38268' - 0xbfee9f4156c62dda, 0x3fd294062ed59f05, // -0.95694, 0.29028' - 0xbfef6297cff75cb0, 0x3fc8f8b83c69a60a, // -0.98079, 0.19509' - 0xbfefd88da3d12526, 0x3fb917a6bc29b42c, // -0.99518, 0.098017' - 0xbff0000000000000, 0x0000000000000000, // -1, 0' - 0xbfefd88da3d12526, 0xbfb917a6bc29b42c, // -0.99518,-0.098017' - 0xbfef6297cff75cb0, 0xbfc8f8b83c69a60a, // -0.98079, -0.19509' - 0xbfee9f4156c62dda, 0xbfd294062ed59f05, // -0.95694, -0.29028' - 0xbfed906bcf328d46, 0xbfd87de2a6aea963, // -0.92388, -0.38268' - 0xbfec38b2f180bdb1, 0xbfde2b5d3806f63b, // -0.88192, -0.4714' - 0xbfea9b66290ea1a3, 0xbfe1c73b39ae68c8, // -0.83147, -0.55557' - 0xbfe8bc806b151741, 0xbfe44cf325091dd6, // -0.77301, -0.63439' - 0xbfe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // -0.70711, -0.70711' - 0xbfe44cf325091dd6, 0xbfe8bc806b151741, // -0.63439, -0.77301' - 0xbfe1c73b39ae68c8, 0xbfea9b66290ea1a3, // -0.55557, -0.83147' - 0xbfde2b5d3806f63b, 0xbfec38b2f180bdb1, // -0.4714, -0.88192' - 0xbfd87de2a6aea963, 0xbfed906bcf328d46, // -0.38268, -0.92388' - 0xbfd294062ed59f05, 0xbfee9f4156c62dda, // -0.29028, -0.95694' - 0xbfc8f8b83c69a60a, 0xbfef6297cff75cb0, // -0.19509, -0.98079' - 0xbfb917a6bc29b42c, 0xbfefd88da3d12526, //-0.098017, -0.99518' - 0x0000000000000000, 0xbff0000000000000, // 0, -1' - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, // 0.098017, -0.99518' - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079' - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694' - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388' - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192' - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147' - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301' - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711' - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439' - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557' - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714' - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268' - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028' - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509' - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518,-0.098017' - }; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_128) -/** - @par - Example code for Double Precision Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 128, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const uint64_t twiddleCoefF64_128[256] = { - 0x3ff0000000000000, 0x0000000000000000, // 1, 0' - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068' - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017' - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673' - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509' - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298' - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028' - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689' - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268' - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756' - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714' - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141' - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557' - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957' - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439' - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156' - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711' - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095' - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301' - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321' - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147' - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773' - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192' - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399' - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388' - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154' - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694' - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003' - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079' - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918' - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, // 0.098017, 0.99518' - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, // 0.049068, 0.9988' - 0x0000000000000000, 0x3ff0000000000000, // 0, 1' - 0xbfa91f65f10dd814, 0x3feff621e3796d7e, //-0.049068, 0.9988' - 0xbfb917a6bc29b42c, 0x3fefd88da3d12526, //-0.098017, 0.99518' - 0xbfc2c8106e8e613a, 0x3fefa7557f08a517, // -0.14673, 0.98918' - 0xbfc8f8b83c69a60a, 0x3fef6297cff75cb0, // -0.19509, 0.98079' - 0xbfcf19f97b215f1a, 0x3fef0a7efb9230d7, // -0.24298, 0.97003' - 0xbfd294062ed59f05, 0x3fee9f4156c62dda, // -0.29028, 0.95694' - 0xbfd58f9a75ab1fdd, 0x3fee212104f686e5, // -0.33689, 0.94154' - 0xbfd87de2a6aea963, 0x3fed906bcf328d46, // -0.38268, 0.92388' - 0xbfdb5d1009e15cc0, 0x3feced7af43cc773, // -0.42756, 0.90399' - 0xbfde2b5d3806f63b, 0x3fec38b2f180bdb1, // -0.4714, 0.88192' - 0xbfe073879922ffed, 0x3feb728345196e3e, // -0.5141, 0.85773' - 0xbfe1c73b39ae68c8, 0x3fea9b66290ea1a3, // -0.55557, 0.83147' - 0xbfe30ff7fce17035, 0x3fe9b3e047f38741, // -0.5957, 0.80321' - 0xbfe44cf325091dd6, 0x3fe8bc806b151741, // -0.63439, 0.77301' - 0xbfe57d69348cec9f, 0x3fe7b5df226aafb0, // -0.67156, 0.74095' - 0xbfe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // -0.70711, 0.70711' - 0xbfe7b5df226aafb0, 0x3fe57d69348cec9f, // -0.74095, 0.67156' - 0xbfe8bc806b151741, 0x3fe44cf325091dd6, // -0.77301, 0.63439' - 0xbfe9b3e047f38741, 0x3fe30ff7fce17035, // -0.80321, 0.5957' - 0xbfea9b66290ea1a3, 0x3fe1c73b39ae68c8, // -0.83147, 0.55557' - 0xbfeb728345196e3e, 0x3fe073879922ffed, // -0.85773, 0.5141' - 0xbfec38b2f180bdb1, 0x3fde2b5d3806f63b, // -0.88192, 0.4714' - 0xbfeced7af43cc773, 0x3fdb5d1009e15cc0, // -0.90399, 0.42756' - 0xbfed906bcf328d46, 0x3fd87de2a6aea963, // -0.92388, 0.38268' - 0xbfee212104f686e5, 0x3fd58f9a75ab1fdd, // -0.94154, 0.33689' - 0xbfee9f4156c62dda, 0x3fd294062ed59f05, // -0.95694, 0.29028' - 0xbfef0a7efb9230d7, 0x3fcf19f97b215f1a, // -0.97003, 0.24298' - 0xbfef6297cff75cb0, 0x3fc8f8b83c69a60a, // -0.98079, 0.19509' - 0xbfefa7557f08a517, 0x3fc2c8106e8e613a, // -0.98918, 0.14673' - 0xbfefd88da3d12526, 0x3fb917a6bc29b42c, // -0.99518, 0.098017' - 0xbfeff621e3796d7e, 0x3fa91f65f10dd814, // -0.9988, 0.049068' - 0xbff0000000000000, 0x0000000000000000, // -1, 0' - 0xbfeff621e3796d7e, 0xbfa91f65f10dd814, // -0.9988,-0.049068' - 0xbfefd88da3d12526, 0xbfb917a6bc29b42c, // -0.99518,-0.098017' - 0xbfefa7557f08a517, 0xbfc2c8106e8e613a, // -0.98918, -0.14673' - 0xbfef6297cff75cb0, 0xbfc8f8b83c69a60a, // -0.98079, -0.19509' - 0xbfef0a7efb9230d7, 0xbfcf19f97b215f1a, // -0.97003, -0.24298' - 0xbfee9f4156c62dda, 0xbfd294062ed59f05, // -0.95694, -0.29028' - 0xbfee212104f686e5, 0xbfd58f9a75ab1fdd, // -0.94154, -0.33689' - 0xbfed906bcf328d46, 0xbfd87de2a6aea963, // -0.92388, -0.38268' - 0xbfeced7af43cc773, 0xbfdb5d1009e15cc0, // -0.90399, -0.42756' - 0xbfec38b2f180bdb1, 0xbfde2b5d3806f63b, // -0.88192, -0.4714' - 0xbfeb728345196e3e, 0xbfe073879922ffed, // -0.85773, -0.5141' - 0xbfea9b66290ea1a3, 0xbfe1c73b39ae68c8, // -0.83147, -0.55557' - 0xbfe9b3e047f38741, 0xbfe30ff7fce17035, // -0.80321, -0.5957' - 0xbfe8bc806b151741, 0xbfe44cf325091dd6, // -0.77301, -0.63439' - 0xbfe7b5df226aafb0, 0xbfe57d69348cec9f, // -0.74095, -0.67156' - 0xbfe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // -0.70711, -0.70711' - 0xbfe57d69348cec9f, 0xbfe7b5df226aafb0, // -0.67156, -0.74095' - 0xbfe44cf325091dd6, 0xbfe8bc806b151741, // -0.63439, -0.77301' - 0xbfe30ff7fce17035, 0xbfe9b3e047f38741, // -0.5957, -0.80321' - 0xbfe1c73b39ae68c8, 0xbfea9b66290ea1a3, // -0.55557, -0.83147' - 0xbfe073879922ffed, 0xbfeb728345196e3e, // -0.5141, -0.85773' - 0xbfde2b5d3806f63b, 0xbfec38b2f180bdb1, // -0.4714, -0.88192' - 0xbfdb5d1009e15cc0, 0xbfeced7af43cc773, // -0.42756, -0.90399' - 0xbfd87de2a6aea963, 0xbfed906bcf328d46, // -0.38268, -0.92388' - 0xbfd58f9a75ab1fdd, 0xbfee212104f686e5, // -0.33689, -0.94154' - 0xbfd294062ed59f05, 0xbfee9f4156c62dda, // -0.29028, -0.95694' - 0xbfcf19f97b215f1a, 0xbfef0a7efb9230d7, // -0.24298, -0.97003' - 0xbfc8f8b83c69a60a, 0xbfef6297cff75cb0, // -0.19509, -0.98079' - 0xbfc2c8106e8e613a, 0xbfefa7557f08a517, // -0.14673, -0.98918' - 0xbfb917a6bc29b42c, 0xbfefd88da3d12526, //-0.098017, -0.99518' - 0xbfa91f65f10dd814, 0xbfeff621e3796d7e, //-0.049068, -0.9988' - 0x0000000000000000, 0xbff0000000000000, // 0, -1' - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, // 0.049068, -0.9988' - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, // 0.098017, -0.99518' - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918' - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079' - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003' - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694' - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154' - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388' - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399' - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192' - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773' - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147' - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321' - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301' - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095' - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711' - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156' - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439' - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957' - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557' - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141' - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714' - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756' - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268' - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689' - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028' - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298' - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509' - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673' - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518,-0.098017' - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988,-0.049068' -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_256) -/** - @par - Example code for Double Precision Floating-point Twiddle factors Generation: - @par - 
for(i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 256, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const uint64_t twiddleCoefF64_256[512] = { - 0x3ff0000000000000, 0x0000000000000000, // 1, 0 - 0x3feffd886084cd0d, 0x3f992155f7a3667e, // 0.9997, 0.024541 - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068 - 0x3fefe9cdad01883a, 0x3fb2d52092ce19f6, // 0.99729, 0.073565 - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017 - 0x3fefc26470e19fd3, 0x3fbf564e56a9730e, // 0.99248, 0.12241 - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673 - 0x3fef8764fa714ba9, 0x3fc5e214448b3fc6, // 0.98528, 0.17096 - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509 - 0x3fef38f3ac64e589, 0x3fcc0b826a7e4f63, // 0.9757, 0.2191 - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298 - 0x3feed740e7684963, 0x3fd111d262b1f677, // 0.96378, 0.26671 - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028 - 0x3fee6288ec48e112, 0x3fd4135c94176602, // 0.94953, 0.31368 - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689 - 0x3feddb13b6ccc23d, 0x3fd7088530fa459e, // 0.93299, 0.3599 - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268 - 0x3fed4134d14dc93a, 0x3fd9ef7943a8ed8a, // 0.91421, 0.40524 - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756 - 0x3fec954b213411f5, 0x3fdcc66e9931c45d, // 0.89322, 0.44961 - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714 - 0x3febd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // 0.87009, 0.4929 - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141 - 0x3feb090a58150200, 0x3fe11eb3541b4b22, // 0.84485, 0.535 - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557 - 0x3fea29a7a0462782, 0x3fe26d054cdd12df, // 0.81758, 0.57581 - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957 - 0x3fe93a22499263fc, 0x3fe3affa292050b9, // 0.78835, 0.61523 - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439 - 0x3fe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // 0.75721, 0.65317 - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156 - 0x3fe72d0837efff97, 0x3fe610b7551d2cde, // 0.72425, 0.68954 - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711 - 0x3fe610b7551d2cde, 0x3fe72d0837efff97, // 0.68954, 0.72425 - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095 - 0x3fe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // 0.65317, 0.75721 - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301 - 0x3fe3affa292050b9, 0x3fe93a22499263fc, // 0.61523, 0.78835 - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321 - 0x3fe26d054cdd12df, 0x3fea29a7a0462782, // 0.57581, 0.81758 - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147 - 0x3fe11eb3541b4b22, 0x3feb090a58150200, // 0.535, 0.84485 - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773 - 0x3fdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // 0.4929, 0.87009 - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192 - 0x3fdcc66e9931c45d, 0x3fec954b213411f5, // 0.44961, 0.89322 - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399 - 0x3fd9ef7943a8ed8a, 0x3fed4134d14dc93a, // 0.40524, 0.91421 - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388 - 0x3fd7088530fa459e, 0x3feddb13b6ccc23d, // 0.3599, 0.93299 - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154 - 0x3fd4135c94176602, 0x3fee6288ec48e112, // 0.31368, 0.94953 - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694 - 0x3fd111d262b1f677, 0x3feed740e7684963, // 0.26671, 0.96378 - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003 - 0x3fcc0b826a7e4f63, 0x3fef38f3ac64e589, // 0.2191, 0.9757 - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079 - 0x3fc5e214448b3fc6, 0x3fef8764fa714ba9, // 0.17096, 0.98528 - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918 - 0x3fbf564e56a9730e, 0x3fefc26470e19fd3, // 0.12241, 0.99248 - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, // 0.098017, 0.99518 - 0x3fb2d52092ce19f6, 0x3fefe9cdad01883a, // 0.073565, 0.99729 - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, // 0.049068, 0.9988 - 0x3f992155f7a3667e, 0x3feffd886084cd0d, // 0.024541, 0.9997 - 0x0000000000000000, 0x3ff0000000000000, // 0, 1 - 0xbf992155f7a3667e, 0x3feffd886084cd0d, //-0.024541, 0.9997 - 0xbfa91f65f10dd814, 0x3feff621e3796d7e, //-0.049068, 0.9988 - 0xbfb2d52092ce19f6, 0x3fefe9cdad01883a, //-0.073565, 0.99729 - 0xbfb917a6bc29b42c, 0x3fefd88da3d12526, //-0.098017, 0.99518 - 0xbfbf564e56a9730e, 0x3fefc26470e19fd3, // -0.12241, 0.99248 - 0xbfc2c8106e8e613a, 0x3fefa7557f08a517, // -0.14673, 0.98918 - 0xbfc5e214448b3fc6, 0x3fef8764fa714ba9, // -0.17096, 0.98528 - 0xbfc8f8b83c69a60a, 0x3fef6297cff75cb0, // -0.19509, 0.98079 - 0xbfcc0b826a7e4f63, 0x3fef38f3ac64e589, // -0.2191, 0.9757 - 0xbfcf19f97b215f1a, 0x3fef0a7efb9230d7, // -0.24298, 0.97003 - 0xbfd111d262b1f677, 0x3feed740e7684963, // -0.26671, 0.96378 - 0xbfd294062ed59f05, 0x3fee9f4156c62dda, // -0.29028, 0.95694 - 0xbfd4135c94176602, 0x3fee6288ec48e112, // -0.31368, 0.94953 - 0xbfd58f9a75ab1fdd, 0x3fee212104f686e5, // -0.33689, 0.94154 - 0xbfd7088530fa459e, 0x3feddb13b6ccc23d, // -0.3599, 0.93299 - 0xbfd87de2a6aea963, 0x3fed906bcf328d46, // -0.38268, 0.92388 - 0xbfd9ef7943a8ed8a, 0x3fed4134d14dc93a, // -0.40524, 0.91421 - 0xbfdb5d1009e15cc0, 0x3feced7af43cc773, // -0.42756, 0.90399 - 0xbfdcc66e9931c45d, 0x3fec954b213411f5, // -0.44961, 0.89322 - 0xbfde2b5d3806f63b, 0x3fec38b2f180bdb1, // -0.4714, 0.88192 - 0xbfdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // -0.4929, 0.87009 - 0xbfe073879922ffed, 0x3feb728345196e3e, // -0.5141, 0.85773 - 0xbfe11eb3541b4b22, 0x3feb090a58150200, // -0.535, 0.84485 - 0xbfe1c73b39ae68c8, 0x3fea9b66290ea1a3, // -0.55557, 0.83147 - 0xbfe26d054cdd12df, 0x3fea29a7a0462782, // -0.57581, 0.81758 - 0xbfe30ff7fce17035, 0x3fe9b3e047f38741, // -0.5957, 0.80321 - 0xbfe3affa292050b9, 0x3fe93a22499263fc, // -0.61523, 0.78835 - 0xbfe44cf325091dd6, 0x3fe8bc806b151741, // -0.63439, 0.77301 - 0xbfe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // -0.65317, 0.75721 - 0xbfe57d69348cec9f, 0x3fe7b5df226aafb0, // -0.67156, 0.74095 - 0xbfe610b7551d2cde, 0x3fe72d0837efff97, // -0.68954, 0.72425 - 0xbfe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // -0.70711, 0.70711 - 0xbfe72d0837efff97, 0x3fe610b7551d2cde, // -0.72425, 0.68954 - 0xbfe7b5df226aafb0, 0x3fe57d69348cec9f, // -0.74095, 0.67156 - 0xbfe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // -0.75721, 0.65317 - 0xbfe8bc806b151741, 0x3fe44cf325091dd6, // -0.77301, 0.63439 - 0xbfe93a22499263fc, 0x3fe3affa292050b9, // -0.78835, 0.61523 - 0xbfe9b3e047f38741, 0x3fe30ff7fce17035, // -0.80321, 0.5957 - 0xbfea29a7a0462782, 0x3fe26d054cdd12df, // -0.81758, 0.57581 - 0xbfea9b66290ea1a3, 0x3fe1c73b39ae68c8, // -0.83147, 0.55557 - 0xbfeb090a58150200, 0x3fe11eb3541b4b22, // -0.84485, 0.535 - 0xbfeb728345196e3e, 0x3fe073879922ffed, // -0.85773, 0.5141 - 0xbfebd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // -0.87009, 0.4929 - 0xbfec38b2f180bdb1, 0x3fde2b5d3806f63b, // -0.88192, 0.4714 - 0xbfec954b213411f5, 0x3fdcc66e9931c45d, // -0.89322, 0.44961 - 0xbfeced7af43cc773, 0x3fdb5d1009e15cc0, // -0.90399, 0.42756 - 0xbfed4134d14dc93a, 0x3fd9ef7943a8ed8a, // -0.91421, 0.40524 - 0xbfed906bcf328d46, 0x3fd87de2a6aea963, // -0.92388, 0.38268 - 0xbfeddb13b6ccc23d, 0x3fd7088530fa459e, // -0.93299, 0.3599 - 0xbfee212104f686e5, 0x3fd58f9a75ab1fdd, // -0.94154, 0.33689 - 0xbfee6288ec48e112, 0x3fd4135c94176602, // -0.94953, 0.31368 - 0xbfee9f4156c62dda, 0x3fd294062ed59f05, // -0.95694, 0.29028 - 0xbfeed740e7684963, 0x3fd111d262b1f677, // -0.96378, 0.26671 - 0xbfef0a7efb9230d7, 0x3fcf19f97b215f1a, // -0.97003, 0.24298 - 0xbfef38f3ac64e589, 0x3fcc0b826a7e4f63, // -0.9757, 0.2191 - 0xbfef6297cff75cb0, 0x3fc8f8b83c69a60a, // -0.98079, 0.19509 - 0xbfef8764fa714ba9, 0x3fc5e214448b3fc6, // -0.98528, 0.17096 - 0xbfefa7557f08a517, 0x3fc2c8106e8e613a, // -0.98918, 0.14673 - 0xbfefc26470e19fd3, 0x3fbf564e56a9730e, // -0.99248, 0.12241 - 0xbfefd88da3d12526, 0x3fb917a6bc29b42c, // -0.99518, 0.098017 - 0xbfefe9cdad01883a, 0x3fb2d52092ce19f6, // -0.99729, 0.073565 - 0xbfeff621e3796d7e, 0x3fa91f65f10dd814, // -0.9988, 0.049068 - 0xbfeffd886084cd0d, 0x3f992155f7a3667e, // -0.9997, 0.024541 - 0xbff0000000000000, 0x0000000000000000, // -1, 0 - 0xbfeffd886084cd0d, 0xbf992155f7a3667e, // -0.9997,-0.024541 - 0xbfeff621e3796d7e, 0xbfa91f65f10dd814, // -0.9988,-0.049068 - 0xbfefe9cdad01883a, 0xbfb2d52092ce19f6, // -0.99729,-0.073565 - 0xbfefd88da3d12526, 0xbfb917a6bc29b42c, // -0.99518,-0.098017 - 0xbfefc26470e19fd3, 0xbfbf564e56a9730e, // -0.99248, -0.12241 - 0xbfefa7557f08a517, 0xbfc2c8106e8e613a, // -0.98918, -0.14673 - 0xbfef8764fa714ba9, 0xbfc5e214448b3fc6, // -0.98528, -0.17096 - 0xbfef6297cff75cb0, 0xbfc8f8b83c69a60a, // -0.98079, -0.19509 - 0xbfef38f3ac64e589, 0xbfcc0b826a7e4f63, // -0.9757, -0.2191 - 0xbfef0a7efb9230d7, 0xbfcf19f97b215f1a, // -0.97003, -0.24298 - 0xbfeed740e7684963, 0xbfd111d262b1f677, // -0.96378, -0.26671 - 0xbfee9f4156c62dda, 0xbfd294062ed59f05, // -0.95694, -0.29028 - 0xbfee6288ec48e112, 0xbfd4135c94176602, // -0.94953, -0.31368 - 0xbfee212104f686e5, 0xbfd58f9a75ab1fdd, // -0.94154, -0.33689 - 0xbfeddb13b6ccc23d, 0xbfd7088530fa459e, // -0.93299, -0.3599 - 0xbfed906bcf328d46, 0xbfd87de2a6aea963, // -0.92388, -0.38268 - 0xbfed4134d14dc93a, 0xbfd9ef7943a8ed8a, // -0.91421, -0.40524 - 0xbfeced7af43cc773, 0xbfdb5d1009e15cc0, // -0.90399, -0.42756 - 0xbfec954b213411f5, 0xbfdcc66e9931c45d, // -0.89322, -0.44961 - 0xbfec38b2f180bdb1, 0xbfde2b5d3806f63b, // -0.88192, -0.4714 - 0xbfebd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // -0.87009, -0.4929 - 0xbfeb728345196e3e, 0xbfe073879922ffed, // -0.85773, -0.5141 - 0xbfeb090a58150200, 0xbfe11eb3541b4b22, // -0.84485, -0.535 - 0xbfea9b66290ea1a3, 0xbfe1c73b39ae68c8, // -0.83147, -0.55557 - 0xbfea29a7a0462782, 0xbfe26d054cdd12df, // -0.81758, -0.57581 - 0xbfe9b3e047f38741, 0xbfe30ff7fce17035, // -0.80321, -0.5957 - 0xbfe93a22499263fc, 0xbfe3affa292050b9, // -0.78835, -0.61523 - 0xbfe8bc806b151741, 0xbfe44cf325091dd6, // -0.77301, -0.63439 - 0xbfe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // -0.75721, -0.65317 - 0xbfe7b5df226aafb0, 0xbfe57d69348cec9f, // -0.74095, -0.67156 - 0xbfe72d0837efff97, 0xbfe610b7551d2cde, // -0.72425, -0.68954 - 0xbfe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // -0.70711, -0.70711 - 0xbfe610b7551d2cde, 0xbfe72d0837efff97, // -0.68954, -0.72425 - 0xbfe57d69348cec9f, 0xbfe7b5df226aafb0, // -0.67156, -0.74095 - 0xbfe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // -0.65317, -0.75721 - 0xbfe44cf325091dd6, 0xbfe8bc806b151741, // -0.63439, -0.77301 - 0xbfe3affa292050b9, 0xbfe93a22499263fc, // -0.61523, -0.78835 - 0xbfe30ff7fce17035, 0xbfe9b3e047f38741, // -0.5957, -0.80321 - 0xbfe26d054cdd12df, 0xbfea29a7a0462782, // -0.57581, -0.81758 - 0xbfe1c73b39ae68c8, 0xbfea9b66290ea1a3, // -0.55557, -0.83147 - 0xbfe11eb3541b4b22, 0xbfeb090a58150200, // -0.535, -0.84485 - 0xbfe073879922ffed, 0xbfeb728345196e3e, // -0.5141, -0.85773 - 0xbfdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // -0.4929, -0.87009 - 0xbfde2b5d3806f63b, 0xbfec38b2f180bdb1, // -0.4714, -0.88192 - 0xbfdcc66e9931c45d, 0xbfec954b213411f5, // -0.44961, -0.89322 - 0xbfdb5d1009e15cc0, 0xbfeced7af43cc773, // -0.42756, -0.90399 - 0xbfd9ef7943a8ed8a, 0xbfed4134d14dc93a, // -0.40524, -0.91421 - 0xbfd87de2a6aea963, 0xbfed906bcf328d46, // -0.38268, -0.92388 - 0xbfd7088530fa459e, 0xbfeddb13b6ccc23d, // -0.3599, -0.93299 - 0xbfd58f9a75ab1fdd, 0xbfee212104f686e5, // -0.33689, -0.94154 - 0xbfd4135c94176602, 0xbfee6288ec48e112, // -0.31368, -0.94953 - 0xbfd294062ed59f05, 0xbfee9f4156c62dda, // -0.29028, -0.95694 - 0xbfd111d262b1f677, 0xbfeed740e7684963, // -0.26671, -0.96378 - 0xbfcf19f97b215f1a, 0xbfef0a7efb9230d7, // -0.24298, -0.97003 - 0xbfcc0b826a7e4f63, 0xbfef38f3ac64e589, // -0.2191, -0.9757 - 0xbfc8f8b83c69a60a, 0xbfef6297cff75cb0, // -0.19509, -0.98079 - 0xbfc5e214448b3fc6, 0xbfef8764fa714ba9, // -0.17096, -0.98528 - 0xbfc2c8106e8e613a, 0xbfefa7557f08a517, // -0.14673, -0.98918 - 0xbfbf564e56a9730e, 0xbfefc26470e19fd3, // -0.12241, -0.99248 - 0xbfb917a6bc29b42c, 0xbfefd88da3d12526, //-0.098017, -0.99518 - 0xbfb2d52092ce19f6, 0xbfefe9cdad01883a, //-0.073565, -0.99729 - 0xbfa91f65f10dd814, 0xbfeff621e3796d7e, //-0.049068, -0.9988 - 0xbf992155f7a3667e, 0xbfeffd886084cd0d, //-0.024541, -0.9997 - 0x0000000000000000, 0xbff0000000000000, // 0, -1 - 0x3f992155f7a3667e, 0xbfeffd886084cd0d, // 0.024541, -0.9997 - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, // 0.049068, -0.9988 - 0x3fb2d52092ce19f6, 0xbfefe9cdad01883a, // 0.073565, -0.99729 - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, // 0.098017, -0.99518 - 0x3fbf564e56a9730e, 0xbfefc26470e19fd3, // 0.12241, -0.99248 - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918 - 0x3fc5e214448b3fc6, 0xbfef8764fa714ba9, // 0.17096, -0.98528 - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079 - 0x3fcc0b826a7e4f63, 0xbfef38f3ac64e589, // 0.2191, -0.9757 - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003 - 0x3fd111d262b1f677, 0xbfeed740e7684963, // 0.26671, -0.96378 - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694 - 0x3fd4135c94176602, 0xbfee6288ec48e112, // 0.31368, -0.94953 - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154 - 0x3fd7088530fa459e, 0xbfeddb13b6ccc23d, // 0.3599, -0.93299 - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388 - 0x3fd9ef7943a8ed8a, 0xbfed4134d14dc93a, // 0.40524, -0.91421 - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399 - 0x3fdcc66e9931c45d, 0xbfec954b213411f5, // 0.44961, -0.89322 - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192 - 0x3fdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // 0.4929, -0.87009 - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773 - 0x3fe11eb3541b4b22, 0xbfeb090a58150200, // 0.535, -0.84485 - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147 - 0x3fe26d054cdd12df, 0xbfea29a7a0462782, // 0.57581, -0.81758 - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321 - 0x3fe3affa292050b9, 0xbfe93a22499263fc, // 0.61523, -0.78835 - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301 - 0x3fe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // 0.65317, -0.75721 - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095 - 0x3fe610b7551d2cde, 0xbfe72d0837efff97, // 0.68954, -0.72425 - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711 - 0x3fe72d0837efff97, 0xbfe610b7551d2cde, // 0.72425, -0.68954 - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156 - 0x3fe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // 0.75721, -0.65317 - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439 - 0x3fe93a22499263fc, 0xbfe3affa292050b9, // 0.78835, -0.61523 - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957 - 0x3fea29a7a0462782, 0xbfe26d054cdd12df, // 0.81758, -0.57581 - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557 - 0x3feb090a58150200, 0xbfe11eb3541b4b22, // 0.84485, -0.535 - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141 - 0x3febd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // 0.87009, -0.4929 - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714 - 0x3fec954b213411f5, 0xbfdcc66e9931c45d, // 0.89322, -0.44961 - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756 - 0x3fed4134d14dc93a, 0xbfd9ef7943a8ed8a, // 0.91421, -0.40524 - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268 - 0x3feddb13b6ccc23d, 0xbfd7088530fa459e, // 0.93299, -0.3599 - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689 - 0x3fee6288ec48e112, 0xbfd4135c94176602, // 0.94953, -0.31368 - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028 - 0x3feed740e7684963, 0xbfd111d262b1f677, // 0.96378, -0.26671 - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298 - 0x3fef38f3ac64e589, 0xbfcc0b826a7e4f63, // 0.9757, -0.2191 - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509 - 0x3fef8764fa714ba9, 0xbfc5e214448b3fc6, // 0.98528, -0.17096 - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673 - 0x3fefc26470e19fd3, 0xbfbf564e56a9730e, // 0.99248, -0.12241 - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518,-0.098017 - 0x3fefe9cdad01883a, 0xbfb2d52092ce19f6, // 0.99729,-0.073565 - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988,-0.049068 - 0x3feffd886084cd0d, 0xbf992155f7a3667e, // 0.9997,-0.024541 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_512) -/** - @par - Example code for Double Precision Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 512, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const uint64_t twiddleCoefF64_512[1024] = { - 0x3ff0000000000000, 0x0000000000000000, // 1, 0 - 0x3fefff62169b92db, 0x3f8921d1fcdec784, // 0.99992, 0.012272 - 0x3feffd886084cd0d, 0x3f992155f7a3667e, // 0.9997, 0.024541 - 0x3feffa72effef75d, 0x3fa2d865759455cd, // 0.99932, 0.036807 - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068 - 0x3feff095658e71ad, 0x3faf656e79f820e0, // 0.99812, 0.061321 - 0x3fefe9cdad01883a, 0x3fb2d52092ce19f6, // 0.99729, 0.073565 - 0x3fefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // 0.99631, 0.085797 - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017 - 0x3fefce15fd6da67b, 0x3fbc3785c79ec2d5, // 0.99391, 0.11022 - 0x3fefc26470e19fd3, 0x3fbf564e56a9730e, // 0.99248, 0.12241 - 0x3fefb5797195d741, 0x3fc139f0cedaf576, // 0.9909, 0.13458 - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673 - 0x3fef97f924c9099b, 0x3fc45576b1293e5a, // 0.9873, 0.15886 - 0x3fef8764fa714ba9, 0x3fc5e214448b3fc6, // 0.98528, 0.17096 - 0x3fef7599a3a12077, 0x3fc76dd9de50bf31, // 0.98311, 0.18304 - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509 - 0x3fef4e603b0b2f2d, 0x3fca82a025b00451, // 0.97832, 0.20711 - 0x3fef38f3ac64e589, 0x3fcc0b826a7e4f63, // 0.9757, 0.2191 - 0x3fef2252f7763ada, 0x3fcd934fe5454311, // 0.97294, 0.23106 - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298 - 0x3feef178a3e473c2, 0x3fd04fb80e37fdae, // 0.96698, 0.25487 - 0x3feed740e7684963, 0x3fd111d262b1f677, // 0.96378, 0.26671 - 0x3feebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // 0.96043, 0.27852 - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028 - 0x3fee817bab4cd10d, 0x3fd35410c2e18152, // 0.95331, 0.30201 - 0x3fee6288ec48e112, 0x3fd4135c94176602, // 0.94953, 0.31368 - 0x3fee426a4b2bc17e, 0x3fd4d1e24278e76a, // 0.94561, 0.32531 - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689 - 0x3fedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // 0.93734, 0.34842 - 0x3feddb13b6ccc23d, 0x3fd7088530fa459e, // 0.93299, 0.3599 - 0x3fedb6526238a09b, 0x3fd7c3a9311dcce7, // 0.92851, 0.37132 - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268 - 0x3fed696173c9e68b, 0x3fd9372a63bc93d7, // 0.91911, 0.39399 - 0x3fed4134d14dc93a, 0x3fd9ef7943a8ed8a, // 0.91421, 0.40524 - 0x3fed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // 0.90917, 0.41643 - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756 - 0x3fecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // 0.89867, 0.43862 - 0x3fec954b213411f5, 0x3fdcc66e9931c45d, // 0.89322, 0.44961 - 0x3fec678b3488739b, 0x3fdd79775b86e389, // 0.88764, 0.46054 - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714 - 0x3fec08c426725549, 0x3fdedc1952ef78d5, // 0.87607, 0.48218 - 0x3febd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // 0.87009, 0.4929 - 0x3feba5aa673590d2, 0x3fe01cfc874c3eb7, // 0.86397, 0.50354 - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141 - 0x3feb3e4d3ef55712, 0x3fe0c9704d5d898f, // 0.85136, 0.52459 - 0x3feb090a58150200, 0x3fe11eb3541b4b22, // 0.84485, 0.535 - 0x3fead2bc9e21d511, 0x3fe1734d63dedb49, // 0.83822, 0.54532 - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557 - 0x3fea63091b02fae2, 0x3fe21a799933eb58, // 0.82459, 0.56573 - 0x3fea29a7a0462782, 0x3fe26d054cdd12df, // 0.81758, 0.57581 - 0x3fe9ef43ef29af94, 0x3fe2bedb25faf3ea, // 0.81046, 0.5858 - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957 - 0x3fe9777ef4c7d742, 0x3fe36058b10659f3, // 0.79584, 0.60551 - 0x3fe93a22499263fc, 0x3fe3affa292050b9, // 0.78835, 0.61523 - 0x3fe8fbcca3ef940d, 0x3fe3fed9534556d4, // 0.78074, 0.62486 - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439 - 0x3fe87c400fba2ebf, 0x3fe49a449b9b0938, // 0.76517, 0.64383 - 0x3fe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // 0.75721, 0.65317 - 0x3fe7f8ece3571771, 0x3fe5328292a35596, // 0.74914, 0.66242 - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156 - 0x3fe771e75f037261, 0x3fe5c77bbe65018c, // 0.73265, 0.6806 - 0x3fe72d0837efff97, 0x3fe610b7551d2cde, // 0.72425, 0.68954 - 0x3fe6e74454eaa8ae, 0x3fe6591925f0783e, // 0.71573, 0.69838 - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711 - 0x3fe6591925f0783e, 0x3fe6e74454eaa8ae, // 0.69838, 0.71573 - 0x3fe610b7551d2cde, 0x3fe72d0837efff97, // 0.68954, 0.72425 - 0x3fe5c77bbe65018c, 0x3fe771e75f037261, // 0.6806, 0.73265 - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095 - 0x3fe5328292a35596, 0x3fe7f8ece3571771, // 0.66242, 0.74914 - 0x3fe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // 0.65317, 0.75721 - 0x3fe49a449b9b0938, 0x3fe87c400fba2ebf, // 0.64383, 0.76517 - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301 - 0x3fe3fed9534556d4, 0x3fe8fbcca3ef940d, // 0.62486, 0.78074 - 0x3fe3affa292050b9, 0x3fe93a22499263fc, // 0.61523, 0.78835 - 0x3fe36058b10659f3, 0x3fe9777ef4c7d742, // 0.60551, 0.79584 - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321 - 0x3fe2bedb25faf3ea, 0x3fe9ef43ef29af94, // 0.5858, 0.81046 - 0x3fe26d054cdd12df, 0x3fea29a7a0462782, // 0.57581, 0.81758 - 0x3fe21a799933eb58, 0x3fea63091b02fae2, // 0.56573, 0.82459 - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147 - 0x3fe1734d63dedb49, 0x3fead2bc9e21d511, // 0.54532, 0.83822 - 0x3fe11eb3541b4b22, 0x3feb090a58150200, // 0.535, 0.84485 - 0x3fe0c9704d5d898f, 0x3feb3e4d3ef55712, // 0.52459, 0.85136 - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773 - 0x3fe01cfc874c3eb7, 0x3feba5aa673590d2, // 0.50354, 0.86397 - 0x3fdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // 0.4929, 0.87009 - 0x3fdedc1952ef78d5, 0x3fec08c426725549, // 0.48218, 0.87607 - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192 - 0x3fdd79775b86e389, 0x3fec678b3488739b, // 0.46054, 0.88764 - 0x3fdcc66e9931c45d, 0x3fec954b213411f5, // 0.44961, 0.89322 - 0x3fdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // 0.43862, 0.89867 - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399 - 0x3fdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // 0.41643, 0.90917 - 0x3fd9ef7943a8ed8a, 0x3fed4134d14dc93a, // 0.40524, 0.91421 - 0x3fd9372a63bc93d7, 0x3fed696173c9e68b, // 0.39399, 0.91911 - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388 - 0x3fd7c3a9311dcce7, 0x3fedb6526238a09b, // 0.37132, 0.92851 - 0x3fd7088530fa459e, 0x3feddb13b6ccc23d, // 0.3599, 0.93299 - 0x3fd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // 0.34842, 0.93734 - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154 - 0x3fd4d1e24278e76a, 0x3fee426a4b2bc17e, // 0.32531, 0.94561 - 0x3fd4135c94176602, 0x3fee6288ec48e112, // 0.31368, 0.94953 - 0x3fd35410c2e18152, 0x3fee817bab4cd10d, // 0.30201, 0.95331 - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694 - 0x3fd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // 0.27852, 0.96043 - 0x3fd111d262b1f677, 0x3feed740e7684963, // 0.26671, 0.96378 - 0x3fd04fb80e37fdae, 0x3feef178a3e473c2, // 0.25487, 0.96698 - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003 - 0x3fcd934fe5454311, 0x3fef2252f7763ada, // 0.23106, 0.97294 - 0x3fcc0b826a7e4f63, 0x3fef38f3ac64e589, // 0.2191, 0.9757 - 0x3fca82a025b00451, 0x3fef4e603b0b2f2d, // 0.20711, 0.97832 - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079 - 0x3fc76dd9de50bf31, 0x3fef7599a3a12077, // 0.18304, 0.98311 - 0x3fc5e214448b3fc6, 0x3fef8764fa714ba9, // 0.17096, 0.98528 - 0x3fc45576b1293e5a, 0x3fef97f924c9099b, // 0.15886, 0.9873 - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918 - 0x3fc139f0cedaf576, 0x3fefb5797195d741, // 0.13458, 0.9909 - 0x3fbf564e56a9730e, 0x3fefc26470e19fd3, // 0.12241, 0.99248 - 0x3fbc3785c79ec2d5, 0x3fefce15fd6da67b, // 0.11022, 0.99391 - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, // 0.098017, 0.99518 - 0x3fb5f6d00a9aa419, 0x3fefe1cafcbd5b09, // 0.085797, 0.99631 - 0x3fb2d52092ce19f6, 0x3fefe9cdad01883a, // 0.073565, 0.99729 - 0x3faf656e79f820e0, 0x3feff095658e71ad, // 0.061321, 0.99812 - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, // 0.049068, 0.9988 - 0x3fa2d865759455cd, 0x3feffa72effef75d, // 0.036807, 0.99932 - 0x3f992155f7a3667e, 0x3feffd886084cd0d, // 0.024541, 0.9997 - 0x3f8921d1fcdec784, 0x3fefff62169b92db, // 0.012272, 0.99992 - 0x0000000000000000, 0x3ff0000000000000, // 0, 1 - 0xbf8921d1fcdec784, 0x3fefff62169b92db, //-0.012272, 0.99992 - 0xbf992155f7a3667e, 0x3feffd886084cd0d, //-0.024541, 0.9997 - 0xbfa2d865759455cd, 0x3feffa72effef75d, //-0.036807, 0.99932 - 0xbfa91f65f10dd814, 0x3feff621e3796d7e, //-0.049068, 0.9988 - 0xbfaf656e79f820e0, 0x3feff095658e71ad, //-0.061321, 0.99812 - 0xbfb2d52092ce19f6, 0x3fefe9cdad01883a, //-0.073565, 0.99729 - 0xbfb5f6d00a9aa419, 0x3fefe1cafcbd5b09, //-0.085797, 0.99631 - 0xbfb917a6bc29b42c, 0x3fefd88da3d12526, //-0.098017, 0.99518 - 0xbfbc3785c79ec2d5, 0x3fefce15fd6da67b, // -0.11022, 0.99391 - 0xbfbf564e56a9730e, 0x3fefc26470e19fd3, // -0.12241, 0.99248 - 0xbfc139f0cedaf576, 0x3fefb5797195d741, // -0.13458, 0.9909 - 0xbfc2c8106e8e613a, 0x3fefa7557f08a517, // -0.14673, 0.98918 - 0xbfc45576b1293e5a, 0x3fef97f924c9099b, // -0.15886, 0.9873 - 0xbfc5e214448b3fc6, 0x3fef8764fa714ba9, // -0.17096, 0.98528 - 0xbfc76dd9de50bf31, 0x3fef7599a3a12077, // -0.18304, 0.98311 - 0xbfc8f8b83c69a60a, 0x3fef6297cff75cb0, // -0.19509, 0.98079 - 0xbfca82a025b00451, 0x3fef4e603b0b2f2d, // -0.20711, 0.97832 - 0xbfcc0b826a7e4f63, 0x3fef38f3ac64e589, // -0.2191, 0.9757 - 0xbfcd934fe5454311, 0x3fef2252f7763ada, // -0.23106, 0.97294 - 0xbfcf19f97b215f1a, 0x3fef0a7efb9230d7, // -0.24298, 0.97003 - 0xbfd04fb80e37fdae, 0x3feef178a3e473c2, // -0.25487, 0.96698 - 0xbfd111d262b1f677, 0x3feed740e7684963, // -0.26671, 0.96378 - 0xbfd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // -0.27852, 0.96043 - 0xbfd294062ed59f05, 0x3fee9f4156c62dda, // -0.29028, 0.95694 - 0xbfd35410c2e18152, 0x3fee817bab4cd10d, // -0.30201, 0.95331 - 0xbfd4135c94176602, 0x3fee6288ec48e112, // -0.31368, 0.94953 - 0xbfd4d1e24278e76a, 0x3fee426a4b2bc17e, // -0.32531, 0.94561 - 0xbfd58f9a75ab1fdd, 0x3fee212104f686e5, // -0.33689, 0.94154 - 0xbfd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // -0.34842, 0.93734 - 0xbfd7088530fa459e, 0x3feddb13b6ccc23d, // -0.3599, 0.93299 - 0xbfd7c3a9311dcce7, 0x3fedb6526238a09b, // -0.37132, 0.92851 - 0xbfd87de2a6aea963, 0x3fed906bcf328d46, // -0.38268, 0.92388 - 0xbfd9372a63bc93d7, 0x3fed696173c9e68b, // -0.39399, 0.91911 - 0xbfd9ef7943a8ed8a, 0x3fed4134d14dc93a, // -0.40524, 0.91421 - 0xbfdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // -0.41643, 0.90917 - 0xbfdb5d1009e15cc0, 0x3feced7af43cc773, // -0.42756, 0.90399 - 0xbfdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // -0.43862, 0.89867 - 0xbfdcc66e9931c45d, 0x3fec954b213411f5, // -0.44961, 0.89322 - 0xbfdd79775b86e389, 0x3fec678b3488739b, // -0.46054, 0.88764 - 0xbfde2b5d3806f63b, 0x3fec38b2f180bdb1, // -0.4714, 0.88192 - 0xbfdedc1952ef78d5, 0x3fec08c426725549, // -0.48218, 0.87607 - 0xbfdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // -0.4929, 0.87009 - 0xbfe01cfc874c3eb7, 0x3feba5aa673590d2, // -0.50354, 0.86397 - 0xbfe073879922ffed, 0x3feb728345196e3e, // -0.5141, 0.85773 - 0xbfe0c9704d5d898f, 0x3feb3e4d3ef55712, // -0.52459, 0.85136 - 0xbfe11eb3541b4b22, 0x3feb090a58150200, // -0.535, 0.84485 - 0xbfe1734d63dedb49, 0x3fead2bc9e21d511, // -0.54532, 0.83822 - 0xbfe1c73b39ae68c8, 0x3fea9b66290ea1a3, // -0.55557, 0.83147 - 0xbfe21a799933eb58, 0x3fea63091b02fae2, // -0.56573, 0.82459 - 0xbfe26d054cdd12df, 0x3fea29a7a0462782, // -0.57581, 0.81758 - 0xbfe2bedb25faf3ea, 0x3fe9ef43ef29af94, // -0.5858, 0.81046 - 0xbfe30ff7fce17035, 0x3fe9b3e047f38741, // -0.5957, 0.80321 - 0xbfe36058b10659f3, 0x3fe9777ef4c7d742, // -0.60551, 0.79584 - 0xbfe3affa292050b9, 0x3fe93a22499263fc, // -0.61523, 0.78835 - 0xbfe3fed9534556d4, 0x3fe8fbcca3ef940d, // -0.62486, 0.78074 - 0xbfe44cf325091dd6, 0x3fe8bc806b151741, // -0.63439, 0.77301 - 0xbfe49a449b9b0938, 0x3fe87c400fba2ebf, // -0.64383, 0.76517 - 0xbfe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // -0.65317, 0.75721 - 0xbfe5328292a35596, 0x3fe7f8ece3571771, // -0.66242, 0.74914 - 0xbfe57d69348cec9f, 0x3fe7b5df226aafb0, // -0.67156, 0.74095 - 0xbfe5c77bbe65018c, 0x3fe771e75f037261, // -0.6806, 0.73265 - 0xbfe610b7551d2cde, 0x3fe72d0837efff97, // -0.68954, 0.72425 - 0xbfe6591925f0783e, 0x3fe6e74454eaa8ae, // -0.69838, 0.71573 - 0xbfe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // -0.70711, 0.70711 - 0xbfe6e74454eaa8ae, 0x3fe6591925f0783e, // -0.71573, 0.69838 - 0xbfe72d0837efff97, 0x3fe610b7551d2cde, // -0.72425, 0.68954 - 0xbfe771e75f037261, 0x3fe5c77bbe65018c, // -0.73265, 0.6806 - 0xbfe7b5df226aafb0, 0x3fe57d69348cec9f, // -0.74095, 0.67156 - 0xbfe7f8ece3571771, 0x3fe5328292a35596, // -0.74914, 0.66242 - 0xbfe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // -0.75721, 0.65317 - 0xbfe87c400fba2ebf, 0x3fe49a449b9b0938, // -0.76517, 0.64383 - 0xbfe8bc806b151741, 0x3fe44cf325091dd6, // -0.77301, 0.63439 - 0xbfe8fbcca3ef940d, 0x3fe3fed9534556d4, // -0.78074, 0.62486 - 0xbfe93a22499263fc, 0x3fe3affa292050b9, // -0.78835, 0.61523 - 0xbfe9777ef4c7d742, 0x3fe36058b10659f3, // -0.79584, 0.60551 - 0xbfe9b3e047f38741, 0x3fe30ff7fce17035, // -0.80321, 0.5957 - 0xbfe9ef43ef29af94, 0x3fe2bedb25faf3ea, // -0.81046, 0.5858 - 0xbfea29a7a0462782, 0x3fe26d054cdd12df, // -0.81758, 0.57581 - 0xbfea63091b02fae2, 0x3fe21a799933eb58, // -0.82459, 0.56573 - 0xbfea9b66290ea1a3, 0x3fe1c73b39ae68c8, // -0.83147, 0.55557 - 0xbfead2bc9e21d511, 0x3fe1734d63dedb49, // -0.83822, 0.54532 - 0xbfeb090a58150200, 0x3fe11eb3541b4b22, // -0.84485, 0.535 - 0xbfeb3e4d3ef55712, 0x3fe0c9704d5d898f, // -0.85136, 0.52459 - 0xbfeb728345196e3e, 0x3fe073879922ffed, // -0.85773, 0.5141 - 0xbfeba5aa673590d2, 0x3fe01cfc874c3eb7, // -0.86397, 0.50354 - 0xbfebd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // -0.87009, 0.4929 - 0xbfec08c426725549, 0x3fdedc1952ef78d5, // -0.87607, 0.48218 - 0xbfec38b2f180bdb1, 0x3fde2b5d3806f63b, // -0.88192, 0.4714 - 0xbfec678b3488739b, 0x3fdd79775b86e389, // -0.88764, 0.46054 - 0xbfec954b213411f5, 0x3fdcc66e9931c45d, // -0.89322, 0.44961 - 0xbfecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // -0.89867, 0.43862 - 0xbfeced7af43cc773, 0x3fdb5d1009e15cc0, // -0.90399, 0.42756 - 0xbfed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // -0.90917, 0.41643 - 0xbfed4134d14dc93a, 0x3fd9ef7943a8ed8a, // -0.91421, 0.40524 - 0xbfed696173c9e68b, 0x3fd9372a63bc93d7, // -0.91911, 0.39399 - 0xbfed906bcf328d46, 0x3fd87de2a6aea963, // -0.92388, 0.38268 - 0xbfedb6526238a09b, 0x3fd7c3a9311dcce7, // -0.92851, 0.37132 - 0xbfeddb13b6ccc23d, 0x3fd7088530fa459e, // -0.93299, 0.3599 - 0xbfedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // -0.93734, 0.34842 - 0xbfee212104f686e5, 0x3fd58f9a75ab1fdd, // -0.94154, 0.33689 - 0xbfee426a4b2bc17e, 0x3fd4d1e24278e76a, // -0.94561, 0.32531 - 0xbfee6288ec48e112, 0x3fd4135c94176602, // -0.94953, 0.31368 - 0xbfee817bab4cd10d, 0x3fd35410c2e18152, // -0.95331, 0.30201 - 0xbfee9f4156c62dda, 0x3fd294062ed59f05, // -0.95694, 0.29028 - 0xbfeebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // -0.96043, 0.27852 - 0xbfeed740e7684963, 0x3fd111d262b1f677, // -0.96378, 0.26671 - 0xbfeef178a3e473c2, 0x3fd04fb80e37fdae, // -0.96698, 0.25487 - 0xbfef0a7efb9230d7, 0x3fcf19f97b215f1a, // -0.97003, 0.24298 - 0xbfef2252f7763ada, 0x3fcd934fe5454311, // -0.97294, 0.23106 - 0xbfef38f3ac64e589, 0x3fcc0b826a7e4f63, // -0.9757, 0.2191 - 0xbfef4e603b0b2f2d, 0x3fca82a025b00451, // -0.97832, 0.20711 - 0xbfef6297cff75cb0, 0x3fc8f8b83c69a60a, // -0.98079, 0.19509 - 0xbfef7599a3a12077, 0x3fc76dd9de50bf31, // -0.98311, 0.18304 - 0xbfef8764fa714ba9, 0x3fc5e214448b3fc6, // -0.98528, 0.17096 - 0xbfef97f924c9099b, 0x3fc45576b1293e5a, // -0.9873, 0.15886 - 0xbfefa7557f08a517, 0x3fc2c8106e8e613a, // -0.98918, 0.14673 - 0xbfefb5797195d741, 0x3fc139f0cedaf576, // -0.9909, 0.13458 - 0xbfefc26470e19fd3, 0x3fbf564e56a9730e, // -0.99248, 0.12241 - 0xbfefce15fd6da67b, 0x3fbc3785c79ec2d5, // -0.99391, 0.11022 - 0xbfefd88da3d12526, 0x3fb917a6bc29b42c, // -0.99518, 0.098017 - 0xbfefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // -0.99631, 0.085797 - 0xbfefe9cdad01883a, 0x3fb2d52092ce19f6, // -0.99729, 0.073565 - 0xbfeff095658e71ad, 0x3faf656e79f820e0, // -0.99812, 0.061321 - 0xbfeff621e3796d7e, 0x3fa91f65f10dd814, // -0.9988, 0.049068 - 0xbfeffa72effef75d, 0x3fa2d865759455cd, // -0.99932, 0.036807 - 0xbfeffd886084cd0d, 0x3f992155f7a3667e, // -0.9997, 0.024541 - 0xbfefff62169b92db, 0x3f8921d1fcdec784, // -0.99992, 0.012272 - 0xbff0000000000000, 0x0000000000000000, // -1, 0 - 0xbfefff62169b92db, 0xbf8921d1fcdec784, // -0.99992,-0.012272 - 0xbfeffd886084cd0d, 0xbf992155f7a3667e, // -0.9997,-0.024541 - 0xbfeffa72effef75d, 0xbfa2d865759455cd, // -0.99932,-0.036807 - 0xbfeff621e3796d7e, 0xbfa91f65f10dd814, // -0.9988,-0.049068 - 0xbfeff095658e71ad, 0xbfaf656e79f820e0, // -0.99812,-0.061321 - 0xbfefe9cdad01883a, 0xbfb2d52092ce19f6, // -0.99729,-0.073565 - 0xbfefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // -0.99631,-0.085797 - 0xbfefd88da3d12526, 0xbfb917a6bc29b42c, // -0.99518,-0.098017 - 0xbfefce15fd6da67b, 0xbfbc3785c79ec2d5, // -0.99391, -0.11022 - 0xbfefc26470e19fd3, 0xbfbf564e56a9730e, // -0.99248, -0.12241 - 0xbfefb5797195d741, 0xbfc139f0cedaf576, // -0.9909, -0.13458 - 0xbfefa7557f08a517, 0xbfc2c8106e8e613a, // -0.98918, -0.14673 - 0xbfef97f924c9099b, 0xbfc45576b1293e5a, // -0.9873, -0.15886 - 0xbfef8764fa714ba9, 0xbfc5e214448b3fc6, // -0.98528, -0.17096 - 0xbfef7599a3a12077, 0xbfc76dd9de50bf31, // -0.98311, -0.18304 - 0xbfef6297cff75cb0, 0xbfc8f8b83c69a60a, // -0.98079, -0.19509 - 0xbfef4e603b0b2f2d, 0xbfca82a025b00451, // -0.97832, -0.20711 - 0xbfef38f3ac64e589, 0xbfcc0b826a7e4f63, // -0.9757, -0.2191 - 0xbfef2252f7763ada, 0xbfcd934fe5454311, // -0.97294, -0.23106 - 0xbfef0a7efb9230d7, 0xbfcf19f97b215f1a, // -0.97003, -0.24298 - 0xbfeef178a3e473c2, 0xbfd04fb80e37fdae, // -0.96698, -0.25487 - 0xbfeed740e7684963, 0xbfd111d262b1f677, // -0.96378, -0.26671 - 0xbfeebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // -0.96043, -0.27852 - 0xbfee9f4156c62dda, 0xbfd294062ed59f05, // -0.95694, -0.29028 - 0xbfee817bab4cd10d, 0xbfd35410c2e18152, // -0.95331, -0.30201 - 0xbfee6288ec48e112, 0xbfd4135c94176602, // -0.94953, -0.31368 - 0xbfee426a4b2bc17e, 0xbfd4d1e24278e76a, // -0.94561, -0.32531 - 0xbfee212104f686e5, 0xbfd58f9a75ab1fdd, // -0.94154, -0.33689 - 0xbfedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // -0.93734, -0.34842 - 0xbfeddb13b6ccc23d, 0xbfd7088530fa459e, // -0.93299, -0.3599 - 0xbfedb6526238a09b, 0xbfd7c3a9311dcce7, // -0.92851, -0.37132 - 0xbfed906bcf328d46, 0xbfd87de2a6aea963, // -0.92388, -0.38268 - 0xbfed696173c9e68b, 0xbfd9372a63bc93d7, // -0.91911, -0.39399 - 0xbfed4134d14dc93a, 0xbfd9ef7943a8ed8a, // -0.91421, -0.40524 - 0xbfed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // -0.90917, -0.41643 - 0xbfeced7af43cc773, 0xbfdb5d1009e15cc0, // -0.90399, -0.42756 - 0xbfecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // -0.89867, -0.43862 - 0xbfec954b213411f5, 0xbfdcc66e9931c45d, // -0.89322, -0.44961 - 0xbfec678b3488739b, 0xbfdd79775b86e389, // -0.88764, -0.46054 - 0xbfec38b2f180bdb1, 0xbfde2b5d3806f63b, // -0.88192, -0.4714 - 0xbfec08c426725549, 0xbfdedc1952ef78d5, // -0.87607, -0.48218 - 0xbfebd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // -0.87009, -0.4929 - 0xbfeba5aa673590d2, 0xbfe01cfc874c3eb7, // -0.86397, -0.50354 - 0xbfeb728345196e3e, 0xbfe073879922ffed, // -0.85773, -0.5141 - 0xbfeb3e4d3ef55712, 0xbfe0c9704d5d898f, // -0.85136, -0.52459 - 0xbfeb090a58150200, 0xbfe11eb3541b4b22, // -0.84485, -0.535 - 0xbfead2bc9e21d511, 0xbfe1734d63dedb49, // -0.83822, -0.54532 - 0xbfea9b66290ea1a3, 0xbfe1c73b39ae68c8, // -0.83147, -0.55557 - 0xbfea63091b02fae2, 0xbfe21a799933eb58, // -0.82459, -0.56573 - 0xbfea29a7a0462782, 0xbfe26d054cdd12df, // -0.81758, -0.57581 - 0xbfe9ef43ef29af94, 0xbfe2bedb25faf3ea, // -0.81046, -0.5858 - 0xbfe9b3e047f38741, 0xbfe30ff7fce17035, // -0.80321, -0.5957 - 0xbfe9777ef4c7d742, 0xbfe36058b10659f3, // -0.79584, -0.60551 - 0xbfe93a22499263fc, 0xbfe3affa292050b9, // -0.78835, -0.61523 - 0xbfe8fbcca3ef940d, 0xbfe3fed9534556d4, // -0.78074, -0.62486 - 0xbfe8bc806b151741, 0xbfe44cf325091dd6, // -0.77301, -0.63439 - 0xbfe87c400fba2ebf, 0xbfe49a449b9b0938, // -0.76517, -0.64383 - 0xbfe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // -0.75721, -0.65317 - 0xbfe7f8ece3571771, 0xbfe5328292a35596, // -0.74914, -0.66242 - 0xbfe7b5df226aafb0, 0xbfe57d69348cec9f, // -0.74095, -0.67156 - 0xbfe771e75f037261, 0xbfe5c77bbe65018c, // -0.73265, -0.6806 - 0xbfe72d0837efff97, 0xbfe610b7551d2cde, // -0.72425, -0.68954 - 0xbfe6e74454eaa8ae, 0xbfe6591925f0783e, // -0.71573, -0.69838 - 0xbfe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // -0.70711, -0.70711 - 0xbfe6591925f0783e, 0xbfe6e74454eaa8ae, // -0.69838, -0.71573 - 0xbfe610b7551d2cde, 0xbfe72d0837efff97, // -0.68954, -0.72425 - 0xbfe5c77bbe65018c, 0xbfe771e75f037261, // -0.6806, -0.73265 - 0xbfe57d69348cec9f, 0xbfe7b5df226aafb0, // -0.67156, -0.74095 - 0xbfe5328292a35596, 0xbfe7f8ece3571771, // -0.66242, -0.74914 - 0xbfe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // -0.65317, -0.75721 - 0xbfe49a449b9b0938, 0xbfe87c400fba2ebf, // -0.64383, -0.76517 - 0xbfe44cf325091dd6, 0xbfe8bc806b151741, // -0.63439, -0.77301 - 0xbfe3fed9534556d4, 0xbfe8fbcca3ef940d, // -0.62486, -0.78074 - 0xbfe3affa292050b9, 0xbfe93a22499263fc, // -0.61523, -0.78835 - 0xbfe36058b10659f3, 0xbfe9777ef4c7d742, // -0.60551, -0.79584 - 0xbfe30ff7fce17035, 0xbfe9b3e047f38741, // -0.5957, -0.80321 - 0xbfe2bedb25faf3ea, 0xbfe9ef43ef29af94, // -0.5858, -0.81046 - 0xbfe26d054cdd12df, 0xbfea29a7a0462782, // -0.57581, -0.81758 - 0xbfe21a799933eb58, 0xbfea63091b02fae2, // -0.56573, -0.82459 - 0xbfe1c73b39ae68c8, 0xbfea9b66290ea1a3, // -0.55557, -0.83147 - 0xbfe1734d63dedb49, 0xbfead2bc9e21d511, // -0.54532, -0.83822 - 0xbfe11eb3541b4b22, 0xbfeb090a58150200, // -0.535, -0.84485 - 0xbfe0c9704d5d898f, 0xbfeb3e4d3ef55712, // -0.52459, -0.85136 - 0xbfe073879922ffed, 0xbfeb728345196e3e, // -0.5141, -0.85773 - 0xbfe01cfc874c3eb7, 0xbfeba5aa673590d2, // -0.50354, -0.86397 - 0xbfdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // -0.4929, -0.87009 - 0xbfdedc1952ef78d5, 0xbfec08c426725549, // -0.48218, -0.87607 - 0xbfde2b5d3806f63b, 0xbfec38b2f180bdb1, // -0.4714, -0.88192 - 0xbfdd79775b86e389, 0xbfec678b3488739b, // -0.46054, -0.88764 - 0xbfdcc66e9931c45d, 0xbfec954b213411f5, // -0.44961, -0.89322 - 0xbfdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // -0.43862, -0.89867 - 0xbfdb5d1009e15cc0, 0xbfeced7af43cc773, // -0.42756, -0.90399 - 0xbfdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // -0.41643, -0.90917 - 0xbfd9ef7943a8ed8a, 0xbfed4134d14dc93a, // -0.40524, -0.91421 - 0xbfd9372a63bc93d7, 0xbfed696173c9e68b, // -0.39399, -0.91911 - 0xbfd87de2a6aea963, 0xbfed906bcf328d46, // -0.38268, -0.92388 - 0xbfd7c3a9311dcce7, 0xbfedb6526238a09b, // -0.37132, -0.92851 - 0xbfd7088530fa459e, 0xbfeddb13b6ccc23d, // -0.3599, -0.93299 - 0xbfd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // -0.34842, -0.93734 - 0xbfd58f9a75ab1fdd, 0xbfee212104f686e5, // -0.33689, -0.94154 - 0xbfd4d1e24278e76a, 0xbfee426a4b2bc17e, // -0.32531, -0.94561 - 0xbfd4135c94176602, 0xbfee6288ec48e112, // -0.31368, -0.94953 - 0xbfd35410c2e18152, 0xbfee817bab4cd10d, // -0.30201, -0.95331 - 0xbfd294062ed59f05, 0xbfee9f4156c62dda, // -0.29028, -0.95694 - 0xbfd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // -0.27852, -0.96043 - 0xbfd111d262b1f677, 0xbfeed740e7684963, // -0.26671, -0.96378 - 0xbfd04fb80e37fdae, 0xbfeef178a3e473c2, // -0.25487, -0.96698 - 0xbfcf19f97b215f1a, 0xbfef0a7efb9230d7, // -0.24298, -0.97003 - 0xbfcd934fe5454311, 0xbfef2252f7763ada, // -0.23106, -0.97294 - 0xbfcc0b826a7e4f63, 0xbfef38f3ac64e589, // -0.2191, -0.9757 - 0xbfca82a025b00451, 0xbfef4e603b0b2f2d, // -0.20711, -0.97832 - 0xbfc8f8b83c69a60a, 0xbfef6297cff75cb0, // -0.19509, -0.98079 - 0xbfc76dd9de50bf31, 0xbfef7599a3a12077, // -0.18304, -0.98311 - 0xbfc5e214448b3fc6, 0xbfef8764fa714ba9, // -0.17096, -0.98528 - 0xbfc45576b1293e5a, 0xbfef97f924c9099b, // -0.15886, -0.9873 - 0xbfc2c8106e8e613a, 0xbfefa7557f08a517, // -0.14673, -0.98918 - 0xbfc139f0cedaf576, 0xbfefb5797195d741, // -0.13458, -0.9909 - 0xbfbf564e56a9730e, 0xbfefc26470e19fd3, // -0.12241, -0.99248 - 0xbfbc3785c79ec2d5, 0xbfefce15fd6da67b, // -0.11022, -0.99391 - 0xbfb917a6bc29b42c, 0xbfefd88da3d12526, //-0.098017, -0.99518 - 0xbfb5f6d00a9aa419, 0xbfefe1cafcbd5b09, //-0.085797, -0.99631 - 0xbfb2d52092ce19f6, 0xbfefe9cdad01883a, //-0.073565, -0.99729 - 0xbfaf656e79f820e0, 0xbfeff095658e71ad, //-0.061321, -0.99812 - 0xbfa91f65f10dd814, 0xbfeff621e3796d7e, //-0.049068, -0.9988 - 0xbfa2d865759455cd, 0xbfeffa72effef75d, //-0.036807, -0.99932 - 0xbf992155f7a3667e, 0xbfeffd886084cd0d, //-0.024541, -0.9997 - 0xbf8921d1fcdec784, 0xbfefff62169b92db, //-0.012272, -0.99992 - 0x0000000000000000, 0xbff0000000000000, // 0, -1 - 0x3f8921d1fcdec784, 0xbfefff62169b92db, // 0.012272, -0.99992 - 0x3f992155f7a3667e, 0xbfeffd886084cd0d, // 0.024541, -0.9997 - 0x3fa2d865759455cd, 0xbfeffa72effef75d, // 0.036807, -0.99932 - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, // 0.049068, -0.9988 - 0x3faf656e79f820e0, 0xbfeff095658e71ad, // 0.061321, -0.99812 - 0x3fb2d52092ce19f6, 0xbfefe9cdad01883a, // 0.073565, -0.99729 - 0x3fb5f6d00a9aa419, 0xbfefe1cafcbd5b09, // 0.085797, -0.99631 - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, // 0.098017, -0.99518 - 0x3fbc3785c79ec2d5, 0xbfefce15fd6da67b, // 0.11022, -0.99391 - 0x3fbf564e56a9730e, 0xbfefc26470e19fd3, // 0.12241, -0.99248 - 0x3fc139f0cedaf576, 0xbfefb5797195d741, // 0.13458, -0.9909 - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918 - 0x3fc45576b1293e5a, 0xbfef97f924c9099b, // 0.15886, -0.9873 - 0x3fc5e214448b3fc6, 0xbfef8764fa714ba9, // 0.17096, -0.98528 - 0x3fc76dd9de50bf31, 0xbfef7599a3a12077, // 0.18304, -0.98311 - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079 - 0x3fca82a025b00451, 0xbfef4e603b0b2f2d, // 0.20711, -0.97832 - 0x3fcc0b826a7e4f63, 0xbfef38f3ac64e589, // 0.2191, -0.9757 - 0x3fcd934fe5454311, 0xbfef2252f7763ada, // 0.23106, -0.97294 - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003 - 0x3fd04fb80e37fdae, 0xbfeef178a3e473c2, // 0.25487, -0.96698 - 0x3fd111d262b1f677, 0xbfeed740e7684963, // 0.26671, -0.96378 - 0x3fd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // 0.27852, -0.96043 - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694 - 0x3fd35410c2e18152, 0xbfee817bab4cd10d, // 0.30201, -0.95331 - 0x3fd4135c94176602, 0xbfee6288ec48e112, // 0.31368, -0.94953 - 0x3fd4d1e24278e76a, 0xbfee426a4b2bc17e, // 0.32531, -0.94561 - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154 - 0x3fd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // 0.34842, -0.93734 - 0x3fd7088530fa459e, 0xbfeddb13b6ccc23d, // 0.3599, -0.93299 - 0x3fd7c3a9311dcce7, 0xbfedb6526238a09b, // 0.37132, -0.92851 - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388 - 0x3fd9372a63bc93d7, 0xbfed696173c9e68b, // 0.39399, -0.91911 - 0x3fd9ef7943a8ed8a, 0xbfed4134d14dc93a, // 0.40524, -0.91421 - 0x3fdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // 0.41643, -0.90917 - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399 - 0x3fdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // 0.43862, -0.89867 - 0x3fdcc66e9931c45d, 0xbfec954b213411f5, // 0.44961, -0.89322 - 0x3fdd79775b86e389, 0xbfec678b3488739b, // 0.46054, -0.88764 - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192 - 0x3fdedc1952ef78d5, 0xbfec08c426725549, // 0.48218, -0.87607 - 0x3fdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // 0.4929, -0.87009 - 0x3fe01cfc874c3eb7, 0xbfeba5aa673590d2, // 0.50354, -0.86397 - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773 - 0x3fe0c9704d5d898f, 0xbfeb3e4d3ef55712, // 0.52459, -0.85136 - 0x3fe11eb3541b4b22, 0xbfeb090a58150200, // 0.535, -0.84485 - 0x3fe1734d63dedb49, 0xbfead2bc9e21d511, // 0.54532, -0.83822 - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147 - 0x3fe21a799933eb58, 0xbfea63091b02fae2, // 0.56573, -0.82459 - 0x3fe26d054cdd12df, 0xbfea29a7a0462782, // 0.57581, -0.81758 - 0x3fe2bedb25faf3ea, 0xbfe9ef43ef29af94, // 0.5858, -0.81046 - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321 - 0x3fe36058b10659f3, 0xbfe9777ef4c7d742, // 0.60551, -0.79584 - 0x3fe3affa292050b9, 0xbfe93a22499263fc, // 0.61523, -0.78835 - 0x3fe3fed9534556d4, 0xbfe8fbcca3ef940d, // 0.62486, -0.78074 - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301 - 0x3fe49a449b9b0938, 0xbfe87c400fba2ebf, // 0.64383, -0.76517 - 0x3fe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // 0.65317, -0.75721 - 0x3fe5328292a35596, 0xbfe7f8ece3571771, // 0.66242, -0.74914 - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095 - 0x3fe5c77bbe65018c, 0xbfe771e75f037261, // 0.6806, -0.73265 - 0x3fe610b7551d2cde, 0xbfe72d0837efff97, // 0.68954, -0.72425 - 0x3fe6591925f0783e, 0xbfe6e74454eaa8ae, // 0.69838, -0.71573 - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711 - 0x3fe6e74454eaa8ae, 0xbfe6591925f0783e, // 0.71573, -0.69838 - 0x3fe72d0837efff97, 0xbfe610b7551d2cde, // 0.72425, -0.68954 - 0x3fe771e75f037261, 0xbfe5c77bbe65018c, // 0.73265, -0.6806 - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156 - 0x3fe7f8ece3571771, 0xbfe5328292a35596, // 0.74914, -0.66242 - 0x3fe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // 0.75721, -0.65317 - 0x3fe87c400fba2ebf, 0xbfe49a449b9b0938, // 0.76517, -0.64383 - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439 - 0x3fe8fbcca3ef940d, 0xbfe3fed9534556d4, // 0.78074, -0.62486 - 0x3fe93a22499263fc, 0xbfe3affa292050b9, // 0.78835, -0.61523 - 0x3fe9777ef4c7d742, 0xbfe36058b10659f3, // 0.79584, -0.60551 - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957 - 0x3fe9ef43ef29af94, 0xbfe2bedb25faf3ea, // 0.81046, -0.5858 - 0x3fea29a7a0462782, 0xbfe26d054cdd12df, // 0.81758, -0.57581 - 0x3fea63091b02fae2, 0xbfe21a799933eb58, // 0.82459, -0.56573 - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557 - 0x3fead2bc9e21d511, 0xbfe1734d63dedb49, // 0.83822, -0.54532 - 0x3feb090a58150200, 0xbfe11eb3541b4b22, // 0.84485, -0.535 - 0x3feb3e4d3ef55712, 0xbfe0c9704d5d898f, // 0.85136, -0.52459 - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141 - 0x3feba5aa673590d2, 0xbfe01cfc874c3eb7, // 0.86397, -0.50354 - 0x3febd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // 0.87009, -0.4929 - 0x3fec08c426725549, 0xbfdedc1952ef78d5, // 0.87607, -0.48218 - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714 - 0x3fec678b3488739b, 0xbfdd79775b86e389, // 0.88764, -0.46054 - 0x3fec954b213411f5, 0xbfdcc66e9931c45d, // 0.89322, -0.44961 - 0x3fecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // 0.89867, -0.43862 - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756 - 0x3fed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // 0.90917, -0.41643 - 0x3fed4134d14dc93a, 0xbfd9ef7943a8ed8a, // 0.91421, -0.40524 - 0x3fed696173c9e68b, 0xbfd9372a63bc93d7, // 0.91911, -0.39399 - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268 - 0x3fedb6526238a09b, 0xbfd7c3a9311dcce7, // 0.92851, -0.37132 - 0x3feddb13b6ccc23d, 0xbfd7088530fa459e, // 0.93299, -0.3599 - 0x3fedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // 0.93734, -0.34842 - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689 - 0x3fee426a4b2bc17e, 0xbfd4d1e24278e76a, // 0.94561, -0.32531 - 0x3fee6288ec48e112, 0xbfd4135c94176602, // 0.94953, -0.31368 - 0x3fee817bab4cd10d, 0xbfd35410c2e18152, // 0.95331, -0.30201 - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028 - 0x3feebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // 0.96043, -0.27852 - 0x3feed740e7684963, 0xbfd111d262b1f677, // 0.96378, -0.26671 - 0x3feef178a3e473c2, 0xbfd04fb80e37fdae, // 0.96698, -0.25487 - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298 - 0x3fef2252f7763ada, 0xbfcd934fe5454311, // 0.97294, -0.23106 - 0x3fef38f3ac64e589, 0xbfcc0b826a7e4f63, // 0.9757, -0.2191 - 0x3fef4e603b0b2f2d, 0xbfca82a025b00451, // 0.97832, -0.20711 - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509 - 0x3fef7599a3a12077, 0xbfc76dd9de50bf31, // 0.98311, -0.18304 - 0x3fef8764fa714ba9, 0xbfc5e214448b3fc6, // 0.98528, -0.17096 - 0x3fef97f924c9099b, 0xbfc45576b1293e5a, // 0.9873, -0.15886 - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673 - 0x3fefb5797195d741, 0xbfc139f0cedaf576, // 0.9909, -0.13458 - 0x3fefc26470e19fd3, 0xbfbf564e56a9730e, // 0.99248, -0.12241 - 0x3fefce15fd6da67b, 0xbfbc3785c79ec2d5, // 0.99391, -0.11022 - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518,-0.098017 - 0x3fefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // 0.99631,-0.085797 - 0x3fefe9cdad01883a, 0xbfb2d52092ce19f6, // 0.99729,-0.073565 - 0x3feff095658e71ad, 0xbfaf656e79f820e0, // 0.99812,-0.061321 - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988,-0.049068 - 0x3feffa72effef75d, 0xbfa2d865759455cd, // 0.99932,-0.036807 - 0x3feffd886084cd0d, 0xbf992155f7a3667e, // 0.9997,-0.024541 - 0x3fefff62169b92db, 0xbf8921d1fcdec784, // 0.99992,-0.012272 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_1024) -/** - @par - Example code for Double Precision Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 1024, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const uint64_t twiddleCoefF64_1024[2048] = { - 0x3ff0000000000000, 0x0000000000000000, // 1, 0 - 0x3fefffd8858e8a92, 0x3f7921f0fe670071, // 0.99998, 0.0061359 - 0x3fefff62169b92db, 0x3f8921d1fcdec784, // 0.99992, 0.012272 - 0x3feffe9cb44b51a1, 0x3f92d936bbe30efd, // 0.99983, 0.018407 - 0x3feffd886084cd0d, 0x3f992155f7a3667e, // 0.9997, 0.024541 - 0x3feffc251df1d3f8, 0x3f9f693731d1cf01, // 0.99953, 0.030675 - 0x3feffa72effef75d, 0x3fa2d865759455cd, // 0.99932, 0.036807 - 0x3feff871dadb81df, 0x3fa5fc00d290cd43, // 0.99908, 0.042938 - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068 - 0x3feff3830f8d575c, 0x3fac428d12c0d7e3, // 0.99848, 0.055195 - 0x3feff095658e71ad, 0x3faf656e79f820e0, // 0.99812, 0.061321 - 0x3fefed58ecb673c4, 0x3fb1440134d709b2, // 0.99772, 0.067444 - 0x3fefe9cdad01883a, 0x3fb2d52092ce19f6, // 0.99729, 0.073565 - 0x3fefe5f3af2e3940, 0x3fb4661179272096, // 0.99682, 0.079682 - 0x3fefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // 0.99631, 0.085797 - 0x3fefdd539ff1f456, 0x3fb787586a5d5b21, // 0.99577, 0.091909 - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017 - 0x3fefd37914220b84, 0x3fbaa7b724495c04, // 0.99456, 0.10412 - 0x3fefce15fd6da67b, 0x3fbc3785c79ec2d5, // 0.99391, 0.11022 - 0x3fefc8646cfeb721, 0x3fbdc70ecbae9fc8, // 0.99321, 0.11632 - 0x3fefc26470e19fd3, 0x3fbf564e56a9730e, // 0.99248, 0.12241 - 0x3fefbc1617e44186, 0x3fc072a047ba831d, // 0.99171, 0.1285 - 0x3fefb5797195d741, 0x3fc139f0cedaf576, // 0.9909, 0.13458 - 0x3fefae8e8e46cfbb, 0x3fc20116d4ec7bce, // 0.99006, 0.14066 - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673 - 0x3fef9fce55adb2c8, 0x3fc38edbb0cd8d14, // 0.98826, 0.1528 - 0x3fef97f924c9099b, 0x3fc45576b1293e5a, // 0.9873, 0.15886 - 0x3fef8fd5ffae41db, 0x3fc51bdf8597c5f2, // 0.98631, 0.16491 - 0x3fef8764fa714ba9, 0x3fc5e214448b3fc6, // 0.98528, 0.17096 - 0x3fef7ea629e63d6e, 0x3fc6a81304f64ab2, // 0.98421, 0.177 - 0x3fef7599a3a12077, 0x3fc76dd9de50bf31, // 0.98311, 0.18304 - 0x3fef6c3f7df5bbb7, 0x3fc83366e89c64c5, // 0.98196, 0.18907 - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509 - 0x3fef58a2b1789e84, 0x3fc9bdcbf2dc4366, // 0.97957, 0.2011 - 0x3fef4e603b0b2f2d, 0x3fca82a025b00451, // 0.97832, 0.20711 - 0x3fef43d085ff92dd, 0x3fcb4732ef3d6722, // 0.97703, 0.21311 - 0x3fef38f3ac64e589, 0x3fcc0b826a7e4f63, // 0.9757, 0.2191 - 0x3fef2dc9c9089a9d, 0x3fcccf8cb312b286, // 0.97434, 0.22508 - 0x3fef2252f7763ada, 0x3fcd934fe5454311, // 0.97294, 0.23106 - 0x3fef168f53f7205d, 0x3fce56ca1e101a1b, // 0.9715, 0.23702 - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298 - 0x3feefe220c0b95ec, 0x3fcfdcdc1adfedf8, // 0.96852, 0.24893 - 0x3feef178a3e473c2, 0x3fd04fb80e37fdae, // 0.96698, 0.25487 - 0x3feee482e25a9dbc, 0x3fd0b0d9cfdbdb90, // 0.96539, 0.26079 - 0x3feed740e7684963, 0x3fd111d262b1f677, // 0.96378, 0.26671 - 0x3feec9b2d3c3bf84, 0x3fd172a0d7765177, // 0.96212, 0.27262 - 0x3feebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // 0.96043, 0.27852 - 0x3feeadb2e8e7a88e, 0x3fd233bbabc3bb72, // 0.9587, 0.28441 - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028 - 0x3fee9084361df7f3, 0x3fd2f422daec0386, // 0.95514, 0.29615 - 0x3fee817bab4cd10d, 0x3fd35410c2e18152, // 0.95331, 0.30201 - 0x3fee7227db6a9744, 0x3fd3b3cefa0414b7, // 0.95144, 0.30785 - 0x3fee6288ec48e112, 0x3fd4135c94176602, // 0.94953, 0.31368 - 0x3fee529f04729ffc, 0x3fd472b8a5571054, // 0.94759, 0.3195 - 0x3fee426a4b2bc17e, 0x3fd4d1e24278e76a, // 0.94561, 0.32531 - 0x3fee31eae870ce25, 0x3fd530d880af3c24, // 0.94359, 0.33111 - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689 - 0x3fee100cca2980ac, 0x3fd5ee27379ea693, // 0.93946, 0.34266 - 0x3fedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // 0.93734, 0.34842 - 0x3feded05f7de47da, 0x3fd6aa9d7dc77e16, // 0.93518, 0.35416 - 0x3feddb13b6ccc23d, 0x3fd7088530fa459e, // 0.93299, 0.3599 - 0x3fedc8d7cb410260, 0x3fd766340f2418f6, // 0.93077, 0.36561 - 0x3fedb6526238a09b, 0x3fd7c3a9311dcce7, // 0.92851, 0.37132 - 0x3feda383a9668988, 0x3fd820e3b04eaac4, // 0.92621, 0.37701 - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268 - 0x3fed7d0b02b8ecf9, 0x3fd8daa52ec8a4af, // 0.92151, 0.38835 - 0x3fed696173c9e68b, 0x3fd9372a63bc93d7, // 0.91911, 0.39399 - 0x3fed556f52e93eb1, 0x3fd993716141bdfe, // 0.91668, 0.39962 - 0x3fed4134d14dc93a, 0x3fd9ef7943a8ed8a, // 0.91421, 0.40524 - 0x3fed2cb220e0ef9f, 0x3fda4b4127dea1e4, // 0.91171, 0.41084 - 0x3fed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // 0.90917, 0.41643 - 0x3fed02d4feb2bd92, 0x3fdb020d6c7f4009, // 0.9066, 0.422 - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756 - 0x3fecd7d9898b32f6, 0x3fdbb7cf2304bd01, // 0.90135, 0.43309 - 0x3fecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // 0.89867, 0.43862 - 0x3fecabc169a0b901, 0x3fdc6c7f4997000a, // 0.89597, 0.44412 - 0x3fec954b213411f5, 0x3fdcc66e9931c45d, // 0.89322, 0.44961 - 0x3fec7e8e52233cf3, 0x3fdd2016e8e9db5b, // 0.89045, 0.45508 - 0x3fec678b3488739b, 0x3fdd79775b86e389, // 0.88764, 0.46054 - 0x3fec5042012b6907, 0x3fddd28f1481cc58, // 0.8848, 0.46598 - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714 - 0x3fec20de3fa971b0, 0x3fde83e0eaf85113, // 0.87901, 0.4768 - 0x3fec08c426725549, 0x3fdedc1952ef78d5, // 0.87607, 0.48218 - 0x3febf064e15377dd, 0x3fdf3405963fd068, // 0.87309, 0.48755 - 0x3febd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // 0.87009, 0.4929 - 0x3febbed7c49380ea, 0x3fdfe2f64be7120f, // 0.86705, 0.49823 - 0x3feba5aa673590d2, 0x3fe01cfc874c3eb7, // 0.86397, 0.50354 - 0x3feb8c38d27504e9, 0x3fe0485626ae221a, // 0.86087, 0.50883 - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141 - 0x3feb5889fe921405, 0x3fe09e907417c5e1, // 0.85456, 0.51936 - 0x3feb3e4d3ef55712, 0x3fe0c9704d5d898f, // 0.85136, 0.52459 - 0x3feb23cd470013b4, 0x3fe0f426bb2a8e7d, // 0.84812, 0.5298 - 0x3feb090a58150200, 0x3fe11eb3541b4b22, // 0.84485, 0.535 - 0x3feaee04b43c1474, 0x3fe14915af336ceb, // 0.84155, 0.54017 - 0x3fead2bc9e21d511, 0x3fe1734d63dedb49, // 0.83822, 0.54532 - 0x3feab7325916c0d4, 0x3fe19d5a09f2b9b8, // 0.83486, 0.55046 - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557 - 0x3fea7f58529fe69d, 0x3fe1f0f08bbc861b, // 0.82805, 0.56066 - 0x3fea63091b02fae2, 0x3fe21a799933eb58, // 0.82459, 0.56573 - 0x3fea4678c8119ac8, 0x3fe243d5fb98ac1f, // 0.8211, 0.57078 - 0x3fea29a7a0462782, 0x3fe26d054cdd12df, // 0.81758, 0.57581 - 0x3fea0c95eabaf937, 0x3fe2960727629ca8, // 0.81404, 0.58081 - 0x3fe9ef43ef29af94, 0x3fe2bedb25faf3ea, // 0.81046, 0.5858 - 0x3fe9d1b1f5ea80d6, 0x3fe2e780e3e8ea16, // 0.80685, 0.59076 - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957 - 0x3fe995cf2ed80d22, 0x3fe338400d0c8e57, // 0.79954, 0.60062 - 0x3fe9777ef4c7d742, 0x3fe36058b10659f3, // 0.79584, 0.60551 - 0x3fe958efe48e6dd7, 0x3fe3884185dfeb22, // 0.79211, 0.61038 - 0x3fe93a22499263fc, 0x3fe3affa292050b9, // 0.78835, 0.61523 - 0x3fe91b166fd49da2, 0x3fe3d78238c58343, // 0.78456, 0.62006 - 0x3fe8fbcca3ef940d, 0x3fe3fed9534556d4, // 0.78074, 0.62486 - 0x3fe8dc45331698cc, 0x3fe425ff178e6bb1, // 0.77689, 0.62964 - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439 - 0x3fe89c7e9a4dd4ab, 0x3fe473b51b987347, // 0.7691, 0.63912 - 0x3fe87c400fba2ebf, 0x3fe49a449b9b0938, // 0.76517, 0.64383 - 0x3fe85bc51ae958cc, 0x3fe4c0a145ec0004, // 0.7612, 0.64851 - 0x3fe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // 0.75721, 0.65317 - 0x3fe81a1b33b57acc, 0x3fe50cc09f59a09b, // 0.75319, 0.65781 - 0x3fe7f8ece3571771, 0x3fe5328292a35596, // 0.74914, 0.66242 - 0x3fe7d7836cc33db2, 0x3fe5581038975137, // 0.74506, 0.667 - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156 - 0x3fe79400574f55e4, 0x3fe5a28d2a5d7250, // 0.73682, 0.67609 - 0x3fe771e75f037261, 0x3fe5c77bbe65018c, // 0.73265, 0.6806 - 0x3fe74f948da8d28d, 0x3fe5ec3495837074, // 0.72846, 0.68508 - 0x3fe72d0837efff97, 0x3fe610b7551d2cde, // 0.72425, 0.68954 - 0x3fe70a42b3176d7a, 0x3fe63503a31c1be8, // 0.72, 0.69397 - 0x3fe6e74454eaa8ae, 0x3fe6591925f0783e, // 0.71573, 0.69838 - 0x3fe6c40d73c18275, 0x3fe67cf78491af10, // 0.71143, 0.70275 - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711 - 0x3fe67cf78491af10, 0x3fe6c40d73c18275, // 0.70275, 0.71143 - 0x3fe6591925f0783e, 0x3fe6e74454eaa8ae, // 0.69838, 0.71573 - 0x3fe63503a31c1be8, 0x3fe70a42b3176d7a, // 0.69397, 0.72 - 0x3fe610b7551d2cde, 0x3fe72d0837efff97, // 0.68954, 0.72425 - 0x3fe5ec3495837074, 0x3fe74f948da8d28d, // 0.68508, 0.72846 - 0x3fe5c77bbe65018c, 0x3fe771e75f037261, // 0.6806, 0.73265 - 0x3fe5a28d2a5d7250, 0x3fe79400574f55e4, // 0.67609, 0.73682 - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095 - 0x3fe5581038975137, 0x3fe7d7836cc33db2, // 0.667, 0.74506 - 0x3fe5328292a35596, 0x3fe7f8ece3571771, // 0.66242, 0.74914 - 0x3fe50cc09f59a09b, 0x3fe81a1b33b57acc, // 0.65781, 0.75319 - 0x3fe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // 0.65317, 0.75721 - 0x3fe4c0a145ec0004, 0x3fe85bc51ae958cc, // 0.64851, 0.7612 - 0x3fe49a449b9b0938, 0x3fe87c400fba2ebf, // 0.64383, 0.76517 - 0x3fe473b51b987347, 0x3fe89c7e9a4dd4ab, // 0.63912, 0.7691 - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301 - 0x3fe425ff178e6bb1, 0x3fe8dc45331698cc, // 0.62964, 0.77689 - 0x3fe3fed9534556d4, 0x3fe8fbcca3ef940d, // 0.62486, 0.78074 - 0x3fe3d78238c58343, 0x3fe91b166fd49da2, // 0.62006, 0.78456 - 0x3fe3affa292050b9, 0x3fe93a22499263fc, // 0.61523, 0.78835 - 0x3fe3884185dfeb22, 0x3fe958efe48e6dd7, // 0.61038, 0.79211 - 0x3fe36058b10659f3, 0x3fe9777ef4c7d742, // 0.60551, 0.79584 - 0x3fe338400d0c8e57, 0x3fe995cf2ed80d22, // 0.60062, 0.79954 - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321 - 0x3fe2e780e3e8ea16, 0x3fe9d1b1f5ea80d6, // 0.59076, 0.80685 - 0x3fe2bedb25faf3ea, 0x3fe9ef43ef29af94, // 0.5858, 0.81046 - 0x3fe2960727629ca8, 0x3fea0c95eabaf937, // 0.58081, 0.81404 - 0x3fe26d054cdd12df, 0x3fea29a7a0462782, // 0.57581, 0.81758 - 0x3fe243d5fb98ac1f, 0x3fea4678c8119ac8, // 0.57078, 0.8211 - 0x3fe21a799933eb58, 0x3fea63091b02fae2, // 0.56573, 0.82459 - 0x3fe1f0f08bbc861b, 0x3fea7f58529fe69d, // 0.56066, 0.82805 - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147 - 0x3fe19d5a09f2b9b8, 0x3feab7325916c0d4, // 0.55046, 0.83486 - 0x3fe1734d63dedb49, 0x3fead2bc9e21d511, // 0.54532, 0.83822 - 0x3fe14915af336ceb, 0x3feaee04b43c1474, // 0.54017, 0.84155 - 0x3fe11eb3541b4b22, 0x3feb090a58150200, // 0.535, 0.84485 - 0x3fe0f426bb2a8e7d, 0x3feb23cd470013b4, // 0.5298, 0.84812 - 0x3fe0c9704d5d898f, 0x3feb3e4d3ef55712, // 0.52459, 0.85136 - 0x3fe09e907417c5e1, 0x3feb5889fe921405, // 0.51936, 0.85456 - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773 - 0x3fe0485626ae221a, 0x3feb8c38d27504e9, // 0.50883, 0.86087 - 0x3fe01cfc874c3eb7, 0x3feba5aa673590d2, // 0.50354, 0.86397 - 0x3fdfe2f64be7120f, 0x3febbed7c49380ea, // 0.49823, 0.86705 - 0x3fdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // 0.4929, 0.87009 - 0x3fdf3405963fd068, 0x3febf064e15377dd, // 0.48755, 0.87309 - 0x3fdedc1952ef78d5, 0x3fec08c426725549, // 0.48218, 0.87607 - 0x3fde83e0eaf85113, 0x3fec20de3fa971b0, // 0.4768, 0.87901 - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192 - 0x3fddd28f1481cc58, 0x3fec5042012b6907, // 0.46598, 0.8848 - 0x3fdd79775b86e389, 0x3fec678b3488739b, // 0.46054, 0.88764 - 0x3fdd2016e8e9db5b, 0x3fec7e8e52233cf3, // 0.45508, 0.89045 - 0x3fdcc66e9931c45d, 0x3fec954b213411f5, // 0.44961, 0.89322 - 0x3fdc6c7f4997000a, 0x3fecabc169a0b901, // 0.44412, 0.89597 - 0x3fdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // 0.43862, 0.89867 - 0x3fdbb7cf2304bd01, 0x3fecd7d9898b32f6, // 0.43309, 0.90135 - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399 - 0x3fdb020d6c7f4009, 0x3fed02d4feb2bd92, // 0.422, 0.9066 - 0x3fdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // 0.41643, 0.90917 - 0x3fda4b4127dea1e4, 0x3fed2cb220e0ef9f, // 0.41084, 0.91171 - 0x3fd9ef7943a8ed8a, 0x3fed4134d14dc93a, // 0.40524, 0.91421 - 0x3fd993716141bdfe, 0x3fed556f52e93eb1, // 0.39962, 0.91668 - 0x3fd9372a63bc93d7, 0x3fed696173c9e68b, // 0.39399, 0.91911 - 0x3fd8daa52ec8a4af, 0x3fed7d0b02b8ecf9, // 0.38835, 0.92151 - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388 - 0x3fd820e3b04eaac4, 0x3feda383a9668988, // 0.37701, 0.92621 - 0x3fd7c3a9311dcce7, 0x3fedb6526238a09b, // 0.37132, 0.92851 - 0x3fd766340f2418f6, 0x3fedc8d7cb410260, // 0.36561, 0.93077 - 0x3fd7088530fa459e, 0x3feddb13b6ccc23d, // 0.3599, 0.93299 - 0x3fd6aa9d7dc77e16, 0x3feded05f7de47da, // 0.35416, 0.93518 - 0x3fd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // 0.34842, 0.93734 - 0x3fd5ee27379ea693, 0x3fee100cca2980ac, // 0.34266, 0.93946 - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154 - 0x3fd530d880af3c24, 0x3fee31eae870ce25, // 0.33111, 0.94359 - 0x3fd4d1e24278e76a, 0x3fee426a4b2bc17e, // 0.32531, 0.94561 - 0x3fd472b8a5571054, 0x3fee529f04729ffc, // 0.3195, 0.94759 - 0x3fd4135c94176602, 0x3fee6288ec48e112, // 0.31368, 0.94953 - 0x3fd3b3cefa0414b7, 0x3fee7227db6a9744, // 0.30785, 0.95144 - 0x3fd35410c2e18152, 0x3fee817bab4cd10d, // 0.30201, 0.95331 - 0x3fd2f422daec0386, 0x3fee9084361df7f3, // 0.29615, 0.95514 - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694 - 0x3fd233bbabc3bb72, 0x3feeadb2e8e7a88e, // 0.28441, 0.9587 - 0x3fd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // 0.27852, 0.96043 - 0x3fd172a0d7765177, 0x3feec9b2d3c3bf84, // 0.27262, 0.96212 - 0x3fd111d262b1f677, 0x3feed740e7684963, // 0.26671, 0.96378 - 0x3fd0b0d9cfdbdb90, 0x3feee482e25a9dbc, // 0.26079, 0.96539 - 0x3fd04fb80e37fdae, 0x3feef178a3e473c2, // 0.25487, 0.96698 - 0x3fcfdcdc1adfedf8, 0x3feefe220c0b95ec, // 0.24893, 0.96852 - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003 - 0x3fce56ca1e101a1b, 0x3fef168f53f7205d, // 0.23702, 0.9715 - 0x3fcd934fe5454311, 0x3fef2252f7763ada, // 0.23106, 0.97294 - 0x3fcccf8cb312b286, 0x3fef2dc9c9089a9d, // 0.22508, 0.97434 - 0x3fcc0b826a7e4f63, 0x3fef38f3ac64e589, // 0.2191, 0.9757 - 0x3fcb4732ef3d6722, 0x3fef43d085ff92dd, // 0.21311, 0.97703 - 0x3fca82a025b00451, 0x3fef4e603b0b2f2d, // 0.20711, 0.97832 - 0x3fc9bdcbf2dc4366, 0x3fef58a2b1789e84, // 0.2011, 0.97957 - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079 - 0x3fc83366e89c64c5, 0x3fef6c3f7df5bbb7, // 0.18907, 0.98196 - 0x3fc76dd9de50bf31, 0x3fef7599a3a12077, // 0.18304, 0.98311 - 0x3fc6a81304f64ab2, 0x3fef7ea629e63d6e, // 0.177, 0.98421 - 0x3fc5e214448b3fc6, 0x3fef8764fa714ba9, // 0.17096, 0.98528 - 0x3fc51bdf8597c5f2, 0x3fef8fd5ffae41db, // 0.16491, 0.98631 - 0x3fc45576b1293e5a, 0x3fef97f924c9099b, // 0.15886, 0.9873 - 0x3fc38edbb0cd8d14, 0x3fef9fce55adb2c8, // 0.1528, 0.98826 - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918 - 0x3fc20116d4ec7bce, 0x3fefae8e8e46cfbb, // 0.14066, 0.99006 - 0x3fc139f0cedaf576, 0x3fefb5797195d741, // 0.13458, 0.9909 - 0x3fc072a047ba831d, 0x3fefbc1617e44186, // 0.1285, 0.99171 - 0x3fbf564e56a9730e, 0x3fefc26470e19fd3, // 0.12241, 0.99248 - 0x3fbdc70ecbae9fc8, 0x3fefc8646cfeb721, // 0.11632, 0.99321 - 0x3fbc3785c79ec2d5, 0x3fefce15fd6da67b, // 0.11022, 0.99391 - 0x3fbaa7b724495c04, 0x3fefd37914220b84, // 0.10412, 0.99456 - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, // 0.098017, 0.99518 - 0x3fb787586a5d5b21, 0x3fefdd539ff1f456, // 0.091909, 0.99577 - 0x3fb5f6d00a9aa419, 0x3fefe1cafcbd5b09, // 0.085797, 0.99631 - 0x3fb4661179272096, 0x3fefe5f3af2e3940, // 0.079682, 0.99682 - 0x3fb2d52092ce19f6, 0x3fefe9cdad01883a, // 0.073565, 0.99729 - 0x3fb1440134d709b2, 0x3fefed58ecb673c4, // 0.067444, 0.99772 - 0x3faf656e79f820e0, 0x3feff095658e71ad, // 0.061321, 0.99812 - 0x3fac428d12c0d7e3, 0x3feff3830f8d575c, // 0.055195, 0.99848 - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, // 0.049068, 0.9988 - 0x3fa5fc00d290cd43, 0x3feff871dadb81df, // 0.042938, 0.99908 - 0x3fa2d865759455cd, 0x3feffa72effef75d, // 0.036807, 0.99932 - 0x3f9f693731d1cf01, 0x3feffc251df1d3f8, // 0.030675, 0.99953 - 0x3f992155f7a3667e, 0x3feffd886084cd0d, // 0.024541, 0.9997 - 0x3f92d936bbe30efd, 0x3feffe9cb44b51a1, // 0.018407, 0.99983 - 0x3f8921d1fcdec784, 0x3fefff62169b92db, // 0.012272, 0.99992 - 0x3f7921f0fe670071, 0x3fefffd8858e8a92, // 0.0061359, 0.99998 - 0x0000000000000000, 0x3ff0000000000000, // 0, 1 - 0xbf7921f0fe670071, 0x3fefffd8858e8a92, //-0.0061359, 0.99998 - 0xbf8921d1fcdec784, 0x3fefff62169b92db, // -0.012272, 0.99992 - 0xbf92d936bbe30efd, 0x3feffe9cb44b51a1, // -0.018407, 0.99983 - 0xbf992155f7a3667e, 0x3feffd886084cd0d, // -0.024541, 0.9997 - 0xbf9f693731d1cf01, 0x3feffc251df1d3f8, // -0.030675, 0.99953 - 0xbfa2d865759455cd, 0x3feffa72effef75d, // -0.036807, 0.99932 - 0xbfa5fc00d290cd43, 0x3feff871dadb81df, // -0.042938, 0.99908 - 0xbfa91f65f10dd814, 0x3feff621e3796d7e, // -0.049068, 0.9988 - 0xbfac428d12c0d7e3, 0x3feff3830f8d575c, // -0.055195, 0.99848 - 0xbfaf656e79f820e0, 0x3feff095658e71ad, // -0.061321, 0.99812 - 0xbfb1440134d709b2, 0x3fefed58ecb673c4, // -0.067444, 0.99772 - 0xbfb2d52092ce19f6, 0x3fefe9cdad01883a, // -0.073565, 0.99729 - 0xbfb4661179272096, 0x3fefe5f3af2e3940, // -0.079682, 0.99682 - 0xbfb5f6d00a9aa419, 0x3fefe1cafcbd5b09, // -0.085797, 0.99631 - 0xbfb787586a5d5b21, 0x3fefdd539ff1f456, // -0.091909, 0.99577 - 0xbfb917a6bc29b42c, 0x3fefd88da3d12526, // -0.098017, 0.99518 - 0xbfbaa7b724495c04, 0x3fefd37914220b84, // -0.10412, 0.99456 - 0xbfbc3785c79ec2d5, 0x3fefce15fd6da67b, // -0.11022, 0.99391 - 0xbfbdc70ecbae9fc8, 0x3fefc8646cfeb721, // -0.11632, 0.99321 - 0xbfbf564e56a9730e, 0x3fefc26470e19fd3, // -0.12241, 0.99248 - 0xbfc072a047ba831d, 0x3fefbc1617e44186, // -0.1285, 0.99171 - 0xbfc139f0cedaf576, 0x3fefb5797195d741, // -0.13458, 0.9909 - 0xbfc20116d4ec7bce, 0x3fefae8e8e46cfbb, // -0.14066, 0.99006 - 0xbfc2c8106e8e613a, 0x3fefa7557f08a517, // -0.14673, 0.98918 - 0xbfc38edbb0cd8d14, 0x3fef9fce55adb2c8, // -0.1528, 0.98826 - 0xbfc45576b1293e5a, 0x3fef97f924c9099b, // -0.15886, 0.9873 - 0xbfc51bdf8597c5f2, 0x3fef8fd5ffae41db, // -0.16491, 0.98631 - 0xbfc5e214448b3fc6, 0x3fef8764fa714ba9, // -0.17096, 0.98528 - 0xbfc6a81304f64ab2, 0x3fef7ea629e63d6e, // -0.177, 0.98421 - 0xbfc76dd9de50bf31, 0x3fef7599a3a12077, // -0.18304, 0.98311 - 0xbfc83366e89c64c5, 0x3fef6c3f7df5bbb7, // -0.18907, 0.98196 - 0xbfc8f8b83c69a60a, 0x3fef6297cff75cb0, // -0.19509, 0.98079 - 0xbfc9bdcbf2dc4366, 0x3fef58a2b1789e84, // -0.2011, 0.97957 - 0xbfca82a025b00451, 0x3fef4e603b0b2f2d, // -0.20711, 0.97832 - 0xbfcb4732ef3d6722, 0x3fef43d085ff92dd, // -0.21311, 0.97703 - 0xbfcc0b826a7e4f63, 0x3fef38f3ac64e589, // -0.2191, 0.9757 - 0xbfcccf8cb312b286, 0x3fef2dc9c9089a9d, // -0.22508, 0.97434 - 0xbfcd934fe5454311, 0x3fef2252f7763ada, // -0.23106, 0.97294 - 0xbfce56ca1e101a1b, 0x3fef168f53f7205d, // -0.23702, 0.9715 - 0xbfcf19f97b215f1a, 0x3fef0a7efb9230d7, // -0.24298, 0.97003 - 0xbfcfdcdc1adfedf8, 0x3feefe220c0b95ec, // -0.24893, 0.96852 - 0xbfd04fb80e37fdae, 0x3feef178a3e473c2, // -0.25487, 0.96698 - 0xbfd0b0d9cfdbdb90, 0x3feee482e25a9dbc, // -0.26079, 0.96539 - 0xbfd111d262b1f677, 0x3feed740e7684963, // -0.26671, 0.96378 - 0xbfd172a0d7765177, 0x3feec9b2d3c3bf84, // -0.27262, 0.96212 - 0xbfd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // -0.27852, 0.96043 - 0xbfd233bbabc3bb72, 0x3feeadb2e8e7a88e, // -0.28441, 0.9587 - 0xbfd294062ed59f05, 0x3fee9f4156c62dda, // -0.29028, 0.95694 - 0xbfd2f422daec0386, 0x3fee9084361df7f3, // -0.29615, 0.95514 - 0xbfd35410c2e18152, 0x3fee817bab4cd10d, // -0.30201, 0.95331 - 0xbfd3b3cefa0414b7, 0x3fee7227db6a9744, // -0.30785, 0.95144 - 0xbfd4135c94176602, 0x3fee6288ec48e112, // -0.31368, 0.94953 - 0xbfd472b8a5571054, 0x3fee529f04729ffc, // -0.3195, 0.94759 - 0xbfd4d1e24278e76a, 0x3fee426a4b2bc17e, // -0.32531, 0.94561 - 0xbfd530d880af3c24, 0x3fee31eae870ce25, // -0.33111, 0.94359 - 0xbfd58f9a75ab1fdd, 0x3fee212104f686e5, // -0.33689, 0.94154 - 0xbfd5ee27379ea693, 0x3fee100cca2980ac, // -0.34266, 0.93946 - 0xbfd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // -0.34842, 0.93734 - 0xbfd6aa9d7dc77e16, 0x3feded05f7de47da, // -0.35416, 0.93518 - 0xbfd7088530fa459e, 0x3feddb13b6ccc23d, // -0.3599, 0.93299 - 0xbfd766340f2418f6, 0x3fedc8d7cb410260, // -0.36561, 0.93077 - 0xbfd7c3a9311dcce7, 0x3fedb6526238a09b, // -0.37132, 0.92851 - 0xbfd820e3b04eaac4, 0x3feda383a9668988, // -0.37701, 0.92621 - 0xbfd87de2a6aea963, 0x3fed906bcf328d46, // -0.38268, 0.92388 - 0xbfd8daa52ec8a4af, 0x3fed7d0b02b8ecf9, // -0.38835, 0.92151 - 0xbfd9372a63bc93d7, 0x3fed696173c9e68b, // -0.39399, 0.91911 - 0xbfd993716141bdfe, 0x3fed556f52e93eb1, // -0.39962, 0.91668 - 0xbfd9ef7943a8ed8a, 0x3fed4134d14dc93a, // -0.40524, 0.91421 - 0xbfda4b4127dea1e4, 0x3fed2cb220e0ef9f, // -0.41084, 0.91171 - 0xbfdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // -0.41643, 0.90917 - 0xbfdb020d6c7f4009, 0x3fed02d4feb2bd92, // -0.422, 0.9066 - 0xbfdb5d1009e15cc0, 0x3feced7af43cc773, // -0.42756, 0.90399 - 0xbfdbb7cf2304bd01, 0x3fecd7d9898b32f6, // -0.43309, 0.90135 - 0xbfdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // -0.43862, 0.89867 - 0xbfdc6c7f4997000a, 0x3fecabc169a0b901, // -0.44412, 0.89597 - 0xbfdcc66e9931c45d, 0x3fec954b213411f5, // -0.44961, 0.89322 - 0xbfdd2016e8e9db5b, 0x3fec7e8e52233cf3, // -0.45508, 0.89045 - 0xbfdd79775b86e389, 0x3fec678b3488739b, // -0.46054, 0.88764 - 0xbfddd28f1481cc58, 0x3fec5042012b6907, // -0.46598, 0.8848 - 0xbfde2b5d3806f63b, 0x3fec38b2f180bdb1, // -0.4714, 0.88192 - 0xbfde83e0eaf85113, 0x3fec20de3fa971b0, // -0.4768, 0.87901 - 0xbfdedc1952ef78d5, 0x3fec08c426725549, // -0.48218, 0.87607 - 0xbfdf3405963fd068, 0x3febf064e15377dd, // -0.48755, 0.87309 - 0xbfdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // -0.4929, 0.87009 - 0xbfdfe2f64be7120f, 0x3febbed7c49380ea, // -0.49823, 0.86705 - 0xbfe01cfc874c3eb7, 0x3feba5aa673590d2, // -0.50354, 0.86397 - 0xbfe0485626ae221a, 0x3feb8c38d27504e9, // -0.50883, 0.86087 - 0xbfe073879922ffed, 0x3feb728345196e3e, // -0.5141, 0.85773 - 0xbfe09e907417c5e1, 0x3feb5889fe921405, // -0.51936, 0.85456 - 0xbfe0c9704d5d898f, 0x3feb3e4d3ef55712, // -0.52459, 0.85136 - 0xbfe0f426bb2a8e7d, 0x3feb23cd470013b4, // -0.5298, 0.84812 - 0xbfe11eb3541b4b22, 0x3feb090a58150200, // -0.535, 0.84485 - 0xbfe14915af336ceb, 0x3feaee04b43c1474, // -0.54017, 0.84155 - 0xbfe1734d63dedb49, 0x3fead2bc9e21d511, // -0.54532, 0.83822 - 0xbfe19d5a09f2b9b8, 0x3feab7325916c0d4, // -0.55046, 0.83486 - 0xbfe1c73b39ae68c8, 0x3fea9b66290ea1a3, // -0.55557, 0.83147 - 0xbfe1f0f08bbc861b, 0x3fea7f58529fe69d, // -0.56066, 0.82805 - 0xbfe21a799933eb58, 0x3fea63091b02fae2, // -0.56573, 0.82459 - 0xbfe243d5fb98ac1f, 0x3fea4678c8119ac8, // -0.57078, 0.8211 - 0xbfe26d054cdd12df, 0x3fea29a7a0462782, // -0.57581, 0.81758 - 0xbfe2960727629ca8, 0x3fea0c95eabaf937, // -0.58081, 0.81404 - 0xbfe2bedb25faf3ea, 0x3fe9ef43ef29af94, // -0.5858, 0.81046 - 0xbfe2e780e3e8ea16, 0x3fe9d1b1f5ea80d6, // -0.59076, 0.80685 - 0xbfe30ff7fce17035, 0x3fe9b3e047f38741, // -0.5957, 0.80321 - 0xbfe338400d0c8e57, 0x3fe995cf2ed80d22, // -0.60062, 0.79954 - 0xbfe36058b10659f3, 0x3fe9777ef4c7d742, // -0.60551, 0.79584 - 0xbfe3884185dfeb22, 0x3fe958efe48e6dd7, // -0.61038, 0.79211 - 0xbfe3affa292050b9, 0x3fe93a22499263fc, // -0.61523, 0.78835 - 0xbfe3d78238c58343, 0x3fe91b166fd49da2, // -0.62006, 0.78456 - 0xbfe3fed9534556d4, 0x3fe8fbcca3ef940d, // -0.62486, 0.78074 - 0xbfe425ff178e6bb1, 0x3fe8dc45331698cc, // -0.62964, 0.77689 - 0xbfe44cf325091dd6, 0x3fe8bc806b151741, // -0.63439, 0.77301 - 0xbfe473b51b987347, 0x3fe89c7e9a4dd4ab, // -0.63912, 0.7691 - 0xbfe49a449b9b0938, 0x3fe87c400fba2ebf, // -0.64383, 0.76517 - 0xbfe4c0a145ec0004, 0x3fe85bc51ae958cc, // -0.64851, 0.7612 - 0xbfe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // -0.65317, 0.75721 - 0xbfe50cc09f59a09b, 0x3fe81a1b33b57acc, // -0.65781, 0.75319 - 0xbfe5328292a35596, 0x3fe7f8ece3571771, // -0.66242, 0.74914 - 0xbfe5581038975137, 0x3fe7d7836cc33db2, // -0.667, 0.74506 - 0xbfe57d69348cec9f, 0x3fe7b5df226aafb0, // -0.67156, 0.74095 - 0xbfe5a28d2a5d7250, 0x3fe79400574f55e4, // -0.67609, 0.73682 - 0xbfe5c77bbe65018c, 0x3fe771e75f037261, // -0.6806, 0.73265 - 0xbfe5ec3495837074, 0x3fe74f948da8d28d, // -0.68508, 0.72846 - 0xbfe610b7551d2cde, 0x3fe72d0837efff97, // -0.68954, 0.72425 - 0xbfe63503a31c1be8, 0x3fe70a42b3176d7a, // -0.69397, 0.72 - 0xbfe6591925f0783e, 0x3fe6e74454eaa8ae, // -0.69838, 0.71573 - 0xbfe67cf78491af10, 0x3fe6c40d73c18275, // -0.70275, 0.71143 - 0xbfe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // -0.70711, 0.70711 - 0xbfe6c40d73c18275, 0x3fe67cf78491af10, // -0.71143, 0.70275 - 0xbfe6e74454eaa8ae, 0x3fe6591925f0783e, // -0.71573, 0.69838 - 0xbfe70a42b3176d7a, 0x3fe63503a31c1be8, // -0.72, 0.69397 - 0xbfe72d0837efff97, 0x3fe610b7551d2cde, // -0.72425, 0.68954 - 0xbfe74f948da8d28d, 0x3fe5ec3495837074, // -0.72846, 0.68508 - 0xbfe771e75f037261, 0x3fe5c77bbe65018c, // -0.73265, 0.6806 - 0xbfe79400574f55e4, 0x3fe5a28d2a5d7250, // -0.73682, 0.67609 - 0xbfe7b5df226aafb0, 0x3fe57d69348cec9f, // -0.74095, 0.67156 - 0xbfe7d7836cc33db2, 0x3fe5581038975137, // -0.74506, 0.667 - 0xbfe7f8ece3571771, 0x3fe5328292a35596, // -0.74914, 0.66242 - 0xbfe81a1b33b57acc, 0x3fe50cc09f59a09b, // -0.75319, 0.65781 - 0xbfe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // -0.75721, 0.65317 - 0xbfe85bc51ae958cc, 0x3fe4c0a145ec0004, // -0.7612, 0.64851 - 0xbfe87c400fba2ebf, 0x3fe49a449b9b0938, // -0.76517, 0.64383 - 0xbfe89c7e9a4dd4ab, 0x3fe473b51b987347, // -0.7691, 0.63912 - 0xbfe8bc806b151741, 0x3fe44cf325091dd6, // -0.77301, 0.63439 - 0xbfe8dc45331698cc, 0x3fe425ff178e6bb1, // -0.77689, 0.62964 - 0xbfe8fbcca3ef940d, 0x3fe3fed9534556d4, // -0.78074, 0.62486 - 0xbfe91b166fd49da2, 0x3fe3d78238c58343, // -0.78456, 0.62006 - 0xbfe93a22499263fc, 0x3fe3affa292050b9, // -0.78835, 0.61523 - 0xbfe958efe48e6dd7, 0x3fe3884185dfeb22, // -0.79211, 0.61038 - 0xbfe9777ef4c7d742, 0x3fe36058b10659f3, // -0.79584, 0.60551 - 0xbfe995cf2ed80d22, 0x3fe338400d0c8e57, // -0.79954, 0.60062 - 0xbfe9b3e047f38741, 0x3fe30ff7fce17035, // -0.80321, 0.5957 - 0xbfe9d1b1f5ea80d6, 0x3fe2e780e3e8ea16, // -0.80685, 0.59076 - 0xbfe9ef43ef29af94, 0x3fe2bedb25faf3ea, // -0.81046, 0.5858 - 0xbfea0c95eabaf937, 0x3fe2960727629ca8, // -0.81404, 0.58081 - 0xbfea29a7a0462782, 0x3fe26d054cdd12df, // -0.81758, 0.57581 - 0xbfea4678c8119ac8, 0x3fe243d5fb98ac1f, // -0.8211, 0.57078 - 0xbfea63091b02fae2, 0x3fe21a799933eb58, // -0.82459, 0.56573 - 0xbfea7f58529fe69d, 0x3fe1f0f08bbc861b, // -0.82805, 0.56066 - 0xbfea9b66290ea1a3, 0x3fe1c73b39ae68c8, // -0.83147, 0.55557 - 0xbfeab7325916c0d4, 0x3fe19d5a09f2b9b8, // -0.83486, 0.55046 - 0xbfead2bc9e21d511, 0x3fe1734d63dedb49, // -0.83822, 0.54532 - 0xbfeaee04b43c1474, 0x3fe14915af336ceb, // -0.84155, 0.54017 - 0xbfeb090a58150200, 0x3fe11eb3541b4b22, // -0.84485, 0.535 - 0xbfeb23cd470013b4, 0x3fe0f426bb2a8e7d, // -0.84812, 0.5298 - 0xbfeb3e4d3ef55712, 0x3fe0c9704d5d898f, // -0.85136, 0.52459 - 0xbfeb5889fe921405, 0x3fe09e907417c5e1, // -0.85456, 0.51936 - 0xbfeb728345196e3e, 0x3fe073879922ffed, // -0.85773, 0.5141 - 0xbfeb8c38d27504e9, 0x3fe0485626ae221a, // -0.86087, 0.50883 - 0xbfeba5aa673590d2, 0x3fe01cfc874c3eb7, // -0.86397, 0.50354 - 0xbfebbed7c49380ea, 0x3fdfe2f64be7120f, // -0.86705, 0.49823 - 0xbfebd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // -0.87009, 0.4929 - 0xbfebf064e15377dd, 0x3fdf3405963fd068, // -0.87309, 0.48755 - 0xbfec08c426725549, 0x3fdedc1952ef78d5, // -0.87607, 0.48218 - 0xbfec20de3fa971b0, 0x3fde83e0eaf85113, // -0.87901, 0.4768 - 0xbfec38b2f180bdb1, 0x3fde2b5d3806f63b, // -0.88192, 0.4714 - 0xbfec5042012b6907, 0x3fddd28f1481cc58, // -0.8848, 0.46598 - 0xbfec678b3488739b, 0x3fdd79775b86e389, // -0.88764, 0.46054 - 0xbfec7e8e52233cf3, 0x3fdd2016e8e9db5b, // -0.89045, 0.45508 - 0xbfec954b213411f5, 0x3fdcc66e9931c45d, // -0.89322, 0.44961 - 0xbfecabc169a0b901, 0x3fdc6c7f4997000a, // -0.89597, 0.44412 - 0xbfecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // -0.89867, 0.43862 - 0xbfecd7d9898b32f6, 0x3fdbb7cf2304bd01, // -0.90135, 0.43309 - 0xbfeced7af43cc773, 0x3fdb5d1009e15cc0, // -0.90399, 0.42756 - 0xbfed02d4feb2bd92, 0x3fdb020d6c7f4009, // -0.9066, 0.422 - 0xbfed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // -0.90917, 0.41643 - 0xbfed2cb220e0ef9f, 0x3fda4b4127dea1e4, // -0.91171, 0.41084 - 0xbfed4134d14dc93a, 0x3fd9ef7943a8ed8a, // -0.91421, 0.40524 - 0xbfed556f52e93eb1, 0x3fd993716141bdfe, // -0.91668, 0.39962 - 0xbfed696173c9e68b, 0x3fd9372a63bc93d7, // -0.91911, 0.39399 - 0xbfed7d0b02b8ecf9, 0x3fd8daa52ec8a4af, // -0.92151, 0.38835 - 0xbfed906bcf328d46, 0x3fd87de2a6aea963, // -0.92388, 0.38268 - 0xbfeda383a9668988, 0x3fd820e3b04eaac4, // -0.92621, 0.37701 - 0xbfedb6526238a09b, 0x3fd7c3a9311dcce7, // -0.92851, 0.37132 - 0xbfedc8d7cb410260, 0x3fd766340f2418f6, // -0.93077, 0.36561 - 0xbfeddb13b6ccc23d, 0x3fd7088530fa459e, // -0.93299, 0.3599 - 0xbfeded05f7de47da, 0x3fd6aa9d7dc77e16, // -0.93518, 0.35416 - 0xbfedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // -0.93734, 0.34842 - 0xbfee100cca2980ac, 0x3fd5ee27379ea693, // -0.93946, 0.34266 - 0xbfee212104f686e5, 0x3fd58f9a75ab1fdd, // -0.94154, 0.33689 - 0xbfee31eae870ce25, 0x3fd530d880af3c24, // -0.94359, 0.33111 - 0xbfee426a4b2bc17e, 0x3fd4d1e24278e76a, // -0.94561, 0.32531 - 0xbfee529f04729ffc, 0x3fd472b8a5571054, // -0.94759, 0.3195 - 0xbfee6288ec48e112, 0x3fd4135c94176602, // -0.94953, 0.31368 - 0xbfee7227db6a9744, 0x3fd3b3cefa0414b7, // -0.95144, 0.30785 - 0xbfee817bab4cd10d, 0x3fd35410c2e18152, // -0.95331, 0.30201 - 0xbfee9084361df7f3, 0x3fd2f422daec0386, // -0.95514, 0.29615 - 0xbfee9f4156c62dda, 0x3fd294062ed59f05, // -0.95694, 0.29028 - 0xbfeeadb2e8e7a88e, 0x3fd233bbabc3bb72, // -0.9587, 0.28441 - 0xbfeebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // -0.96043, 0.27852 - 0xbfeec9b2d3c3bf84, 0x3fd172a0d7765177, // -0.96212, 0.27262 - 0xbfeed740e7684963, 0x3fd111d262b1f677, // -0.96378, 0.26671 - 0xbfeee482e25a9dbc, 0x3fd0b0d9cfdbdb90, // -0.96539, 0.26079 - 0xbfeef178a3e473c2, 0x3fd04fb80e37fdae, // -0.96698, 0.25487 - 0xbfeefe220c0b95ec, 0x3fcfdcdc1adfedf8, // -0.96852, 0.24893 - 0xbfef0a7efb9230d7, 0x3fcf19f97b215f1a, // -0.97003, 0.24298 - 0xbfef168f53f7205d, 0x3fce56ca1e101a1b, // -0.9715, 0.23702 - 0xbfef2252f7763ada, 0x3fcd934fe5454311, // -0.97294, 0.23106 - 0xbfef2dc9c9089a9d, 0x3fcccf8cb312b286, // -0.97434, 0.22508 - 0xbfef38f3ac64e589, 0x3fcc0b826a7e4f63, // -0.9757, 0.2191 - 0xbfef43d085ff92dd, 0x3fcb4732ef3d6722, // -0.97703, 0.21311 - 0xbfef4e603b0b2f2d, 0x3fca82a025b00451, // -0.97832, 0.20711 - 0xbfef58a2b1789e84, 0x3fc9bdcbf2dc4366, // -0.97957, 0.2011 - 0xbfef6297cff75cb0, 0x3fc8f8b83c69a60a, // -0.98079, 0.19509 - 0xbfef6c3f7df5bbb7, 0x3fc83366e89c64c5, // -0.98196, 0.18907 - 0xbfef7599a3a12077, 0x3fc76dd9de50bf31, // -0.98311, 0.18304 - 0xbfef7ea629e63d6e, 0x3fc6a81304f64ab2, // -0.98421, 0.177 - 0xbfef8764fa714ba9, 0x3fc5e214448b3fc6, // -0.98528, 0.17096 - 0xbfef8fd5ffae41db, 0x3fc51bdf8597c5f2, // -0.98631, 0.16491 - 0xbfef97f924c9099b, 0x3fc45576b1293e5a, // -0.9873, 0.15886 - 0xbfef9fce55adb2c8, 0x3fc38edbb0cd8d14, // -0.98826, 0.1528 - 0xbfefa7557f08a517, 0x3fc2c8106e8e613a, // -0.98918, 0.14673 - 0xbfefae8e8e46cfbb, 0x3fc20116d4ec7bce, // -0.99006, 0.14066 - 0xbfefb5797195d741, 0x3fc139f0cedaf576, // -0.9909, 0.13458 - 0xbfefbc1617e44186, 0x3fc072a047ba831d, // -0.99171, 0.1285 - 0xbfefc26470e19fd3, 0x3fbf564e56a9730e, // -0.99248, 0.12241 - 0xbfefc8646cfeb721, 0x3fbdc70ecbae9fc8, // -0.99321, 0.11632 - 0xbfefce15fd6da67b, 0x3fbc3785c79ec2d5, // -0.99391, 0.11022 - 0xbfefd37914220b84, 0x3fbaa7b724495c04, // -0.99456, 0.10412 - 0xbfefd88da3d12526, 0x3fb917a6bc29b42c, // -0.99518, 0.098017 - 0xbfefdd539ff1f456, 0x3fb787586a5d5b21, // -0.99577, 0.091909 - 0xbfefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // -0.99631, 0.085797 - 0xbfefe5f3af2e3940, 0x3fb4661179272096, // -0.99682, 0.079682 - 0xbfefe9cdad01883a, 0x3fb2d52092ce19f6, // -0.99729, 0.073565 - 0xbfefed58ecb673c4, 0x3fb1440134d709b2, // -0.99772, 0.067444 - 0xbfeff095658e71ad, 0x3faf656e79f820e0, // -0.99812, 0.061321 - 0xbfeff3830f8d575c, 0x3fac428d12c0d7e3, // -0.99848, 0.055195 - 0xbfeff621e3796d7e, 0x3fa91f65f10dd814, // -0.9988, 0.049068 - 0xbfeff871dadb81df, 0x3fa5fc00d290cd43, // -0.99908, 0.042938 - 0xbfeffa72effef75d, 0x3fa2d865759455cd, // -0.99932, 0.036807 - 0xbfeffc251df1d3f8, 0x3f9f693731d1cf01, // -0.99953, 0.030675 - 0xbfeffd886084cd0d, 0x3f992155f7a3667e, // -0.9997, 0.024541 - 0xbfeffe9cb44b51a1, 0x3f92d936bbe30efd, // -0.99983, 0.018407 - 0xbfefff62169b92db, 0x3f8921d1fcdec784, // -0.99992, 0.012272 - 0xbfefffd8858e8a92, 0x3f7921f0fe670071, // -0.99998, 0.0061359 - 0xbff0000000000000, 0x0000000000000000, // -1, 0 - 0xbfefffd8858e8a92, 0xbf7921f0fe670071, // -0.99998,-0.0061359 - 0xbfefff62169b92db, 0xbf8921d1fcdec784, // -0.99992, -0.012272 - 0xbfeffe9cb44b51a1, 0xbf92d936bbe30efd, // -0.99983, -0.018407 - 0xbfeffd886084cd0d, 0xbf992155f7a3667e, // -0.9997, -0.024541 - 0xbfeffc251df1d3f8, 0xbf9f693731d1cf01, // -0.99953, -0.030675 - 0xbfeffa72effef75d, 0xbfa2d865759455cd, // -0.99932, -0.036807 - 0xbfeff871dadb81df, 0xbfa5fc00d290cd43, // -0.99908, -0.042938 - 0xbfeff621e3796d7e, 0xbfa91f65f10dd814, // -0.9988, -0.049068 - 0xbfeff3830f8d575c, 0xbfac428d12c0d7e3, // -0.99848, -0.055195 - 0xbfeff095658e71ad, 0xbfaf656e79f820e0, // -0.99812, -0.061321 - 0xbfefed58ecb673c4, 0xbfb1440134d709b2, // -0.99772, -0.067444 - 0xbfefe9cdad01883a, 0xbfb2d52092ce19f6, // -0.99729, -0.073565 - 0xbfefe5f3af2e3940, 0xbfb4661179272096, // -0.99682, -0.079682 - 0xbfefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // -0.99631, -0.085797 - 0xbfefdd539ff1f456, 0xbfb787586a5d5b21, // -0.99577, -0.091909 - 0xbfefd88da3d12526, 0xbfb917a6bc29b42c, // -0.99518, -0.098017 - 0xbfefd37914220b84, 0xbfbaa7b724495c04, // -0.99456, -0.10412 - 0xbfefce15fd6da67b, 0xbfbc3785c79ec2d5, // -0.99391, -0.11022 - 0xbfefc8646cfeb721, 0xbfbdc70ecbae9fc8, // -0.99321, -0.11632 - 0xbfefc26470e19fd3, 0xbfbf564e56a9730e, // -0.99248, -0.12241 - 0xbfefbc1617e44186, 0xbfc072a047ba831d, // -0.99171, -0.1285 - 0xbfefb5797195d741, 0xbfc139f0cedaf576, // -0.9909, -0.13458 - 0xbfefae8e8e46cfbb, 0xbfc20116d4ec7bce, // -0.99006, -0.14066 - 0xbfefa7557f08a517, 0xbfc2c8106e8e613a, // -0.98918, -0.14673 - 0xbfef9fce55adb2c8, 0xbfc38edbb0cd8d14, // -0.98826, -0.1528 - 0xbfef97f924c9099b, 0xbfc45576b1293e5a, // -0.9873, -0.15886 - 0xbfef8fd5ffae41db, 0xbfc51bdf8597c5f2, // -0.98631, -0.16491 - 0xbfef8764fa714ba9, 0xbfc5e214448b3fc6, // -0.98528, -0.17096 - 0xbfef7ea629e63d6e, 0xbfc6a81304f64ab2, // -0.98421, -0.177 - 0xbfef7599a3a12077, 0xbfc76dd9de50bf31, // -0.98311, -0.18304 - 0xbfef6c3f7df5bbb7, 0xbfc83366e89c64c5, // -0.98196, -0.18907 - 0xbfef6297cff75cb0, 0xbfc8f8b83c69a60a, // -0.98079, -0.19509 - 0xbfef58a2b1789e84, 0xbfc9bdcbf2dc4366, // -0.97957, -0.2011 - 0xbfef4e603b0b2f2d, 0xbfca82a025b00451, // -0.97832, -0.20711 - 0xbfef43d085ff92dd, 0xbfcb4732ef3d6722, // -0.97703, -0.21311 - 0xbfef38f3ac64e589, 0xbfcc0b826a7e4f63, // -0.9757, -0.2191 - 0xbfef2dc9c9089a9d, 0xbfcccf8cb312b286, // -0.97434, -0.22508 - 0xbfef2252f7763ada, 0xbfcd934fe5454311, // -0.97294, -0.23106 - 0xbfef168f53f7205d, 0xbfce56ca1e101a1b, // -0.9715, -0.23702 - 0xbfef0a7efb9230d7, 0xbfcf19f97b215f1a, // -0.97003, -0.24298 - 0xbfeefe220c0b95ec, 0xbfcfdcdc1adfedf8, // -0.96852, -0.24893 - 0xbfeef178a3e473c2, 0xbfd04fb80e37fdae, // -0.96698, -0.25487 - 0xbfeee482e25a9dbc, 0xbfd0b0d9cfdbdb90, // -0.96539, -0.26079 - 0xbfeed740e7684963, 0xbfd111d262b1f677, // -0.96378, -0.26671 - 0xbfeec9b2d3c3bf84, 0xbfd172a0d7765177, // -0.96212, -0.27262 - 0xbfeebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // -0.96043, -0.27852 - 0xbfeeadb2e8e7a88e, 0xbfd233bbabc3bb72, // -0.9587, -0.28441 - 0xbfee9f4156c62dda, 0xbfd294062ed59f05, // -0.95694, -0.29028 - 0xbfee9084361df7f3, 0xbfd2f422daec0386, // -0.95514, -0.29615 - 0xbfee817bab4cd10d, 0xbfd35410c2e18152, // -0.95331, -0.30201 - 0xbfee7227db6a9744, 0xbfd3b3cefa0414b7, // -0.95144, -0.30785 - 0xbfee6288ec48e112, 0xbfd4135c94176602, // -0.94953, -0.31368 - 0xbfee529f04729ffc, 0xbfd472b8a5571054, // -0.94759, -0.3195 - 0xbfee426a4b2bc17e, 0xbfd4d1e24278e76a, // -0.94561, -0.32531 - 0xbfee31eae870ce25, 0xbfd530d880af3c24, // -0.94359, -0.33111 - 0xbfee212104f686e5, 0xbfd58f9a75ab1fdd, // -0.94154, -0.33689 - 0xbfee100cca2980ac, 0xbfd5ee27379ea693, // -0.93946, -0.34266 - 0xbfedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // -0.93734, -0.34842 - 0xbfeded05f7de47da, 0xbfd6aa9d7dc77e16, // -0.93518, -0.35416 - 0xbfeddb13b6ccc23d, 0xbfd7088530fa459e, // -0.93299, -0.3599 - 0xbfedc8d7cb410260, 0xbfd766340f2418f6, // -0.93077, -0.36561 - 0xbfedb6526238a09b, 0xbfd7c3a9311dcce7, // -0.92851, -0.37132 - 0xbfeda383a9668988, 0xbfd820e3b04eaac4, // -0.92621, -0.37701 - 0xbfed906bcf328d46, 0xbfd87de2a6aea963, // -0.92388, -0.38268 - 0xbfed7d0b02b8ecf9, 0xbfd8daa52ec8a4af, // -0.92151, -0.38835 - 0xbfed696173c9e68b, 0xbfd9372a63bc93d7, // -0.91911, -0.39399 - 0xbfed556f52e93eb1, 0xbfd993716141bdfe, // -0.91668, -0.39962 - 0xbfed4134d14dc93a, 0xbfd9ef7943a8ed8a, // -0.91421, -0.40524 - 0xbfed2cb220e0ef9f, 0xbfda4b4127dea1e4, // -0.91171, -0.41084 - 0xbfed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // -0.90917, -0.41643 - 0xbfed02d4feb2bd92, 0xbfdb020d6c7f4009, // -0.9066, -0.422 - 0xbfeced7af43cc773, 0xbfdb5d1009e15cc0, // -0.90399, -0.42756 - 0xbfecd7d9898b32f6, 0xbfdbb7cf2304bd01, // -0.90135, -0.43309 - 0xbfecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // -0.89867, -0.43862 - 0xbfecabc169a0b901, 0xbfdc6c7f4997000a, // -0.89597, -0.44412 - 0xbfec954b213411f5, 0xbfdcc66e9931c45d, // -0.89322, -0.44961 - 0xbfec7e8e52233cf3, 0xbfdd2016e8e9db5b, // -0.89045, -0.45508 - 0xbfec678b3488739b, 0xbfdd79775b86e389, // -0.88764, -0.46054 - 0xbfec5042012b6907, 0xbfddd28f1481cc58, // -0.8848, -0.46598 - 0xbfec38b2f180bdb1, 0xbfde2b5d3806f63b, // -0.88192, -0.4714 - 0xbfec20de3fa971b0, 0xbfde83e0eaf85113, // -0.87901, -0.4768 - 0xbfec08c426725549, 0xbfdedc1952ef78d5, // -0.87607, -0.48218 - 0xbfebf064e15377dd, 0xbfdf3405963fd068, // -0.87309, -0.48755 - 0xbfebd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // -0.87009, -0.4929 - 0xbfebbed7c49380ea, 0xbfdfe2f64be7120f, // -0.86705, -0.49823 - 0xbfeba5aa673590d2, 0xbfe01cfc874c3eb7, // -0.86397, -0.50354 - 0xbfeb8c38d27504e9, 0xbfe0485626ae221a, // -0.86087, -0.50883 - 0xbfeb728345196e3e, 0xbfe073879922ffed, // -0.85773, -0.5141 - 0xbfeb5889fe921405, 0xbfe09e907417c5e1, // -0.85456, -0.51936 - 0xbfeb3e4d3ef55712, 0xbfe0c9704d5d898f, // -0.85136, -0.52459 - 0xbfeb23cd470013b4, 0xbfe0f426bb2a8e7d, // -0.84812, -0.5298 - 0xbfeb090a58150200, 0xbfe11eb3541b4b22, // -0.84485, -0.535 - 0xbfeaee04b43c1474, 0xbfe14915af336ceb, // -0.84155, -0.54017 - 0xbfead2bc9e21d511, 0xbfe1734d63dedb49, // -0.83822, -0.54532 - 0xbfeab7325916c0d4, 0xbfe19d5a09f2b9b8, // -0.83486, -0.55046 - 0xbfea9b66290ea1a3, 0xbfe1c73b39ae68c8, // -0.83147, -0.55557 - 0xbfea7f58529fe69d, 0xbfe1f0f08bbc861b, // -0.82805, -0.56066 - 0xbfea63091b02fae2, 0xbfe21a799933eb58, // -0.82459, -0.56573 - 0xbfea4678c8119ac8, 0xbfe243d5fb98ac1f, // -0.8211, -0.57078 - 0xbfea29a7a0462782, 0xbfe26d054cdd12df, // -0.81758, -0.57581 - 0xbfea0c95eabaf937, 0xbfe2960727629ca8, // -0.81404, -0.58081 - 0xbfe9ef43ef29af94, 0xbfe2bedb25faf3ea, // -0.81046, -0.5858 - 0xbfe9d1b1f5ea80d6, 0xbfe2e780e3e8ea16, // -0.80685, -0.59076 - 0xbfe9b3e047f38741, 0xbfe30ff7fce17035, // -0.80321, -0.5957 - 0xbfe995cf2ed80d22, 0xbfe338400d0c8e57, // -0.79954, -0.60062 - 0xbfe9777ef4c7d742, 0xbfe36058b10659f3, // -0.79584, -0.60551 - 0xbfe958efe48e6dd7, 0xbfe3884185dfeb22, // -0.79211, -0.61038 - 0xbfe93a22499263fc, 0xbfe3affa292050b9, // -0.78835, -0.61523 - 0xbfe91b166fd49da2, 0xbfe3d78238c58343, // -0.78456, -0.62006 - 0xbfe8fbcca3ef940d, 0xbfe3fed9534556d4, // -0.78074, -0.62486 - 0xbfe8dc45331698cc, 0xbfe425ff178e6bb1, // -0.77689, -0.62964 - 0xbfe8bc806b151741, 0xbfe44cf325091dd6, // -0.77301, -0.63439 - 0xbfe89c7e9a4dd4ab, 0xbfe473b51b987347, // -0.7691, -0.63912 - 0xbfe87c400fba2ebf, 0xbfe49a449b9b0938, // -0.76517, -0.64383 - 0xbfe85bc51ae958cc, 0xbfe4c0a145ec0004, // -0.7612, -0.64851 - 0xbfe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // -0.75721, -0.65317 - 0xbfe81a1b33b57acc, 0xbfe50cc09f59a09b, // -0.75319, -0.65781 - 0xbfe7f8ece3571771, 0xbfe5328292a35596, // -0.74914, -0.66242 - 0xbfe7d7836cc33db2, 0xbfe5581038975137, // -0.74506, -0.667 - 0xbfe7b5df226aafb0, 0xbfe57d69348cec9f, // -0.74095, -0.67156 - 0xbfe79400574f55e4, 0xbfe5a28d2a5d7250, // -0.73682, -0.67609 - 0xbfe771e75f037261, 0xbfe5c77bbe65018c, // -0.73265, -0.6806 - 0xbfe74f948da8d28d, 0xbfe5ec3495837074, // -0.72846, -0.68508 - 0xbfe72d0837efff97, 0xbfe610b7551d2cde, // -0.72425, -0.68954 - 0xbfe70a42b3176d7a, 0xbfe63503a31c1be8, // -0.72, -0.69397 - 0xbfe6e74454eaa8ae, 0xbfe6591925f0783e, // -0.71573, -0.69838 - 0xbfe6c40d73c18275, 0xbfe67cf78491af10, // -0.71143, -0.70275 - 0xbfe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // -0.70711, -0.70711 - 0xbfe67cf78491af10, 0xbfe6c40d73c18275, // -0.70275, -0.71143 - 0xbfe6591925f0783e, 0xbfe6e74454eaa8ae, // -0.69838, -0.71573 - 0xbfe63503a31c1be8, 0xbfe70a42b3176d7a, // -0.69397, -0.72 - 0xbfe610b7551d2cde, 0xbfe72d0837efff97, // -0.68954, -0.72425 - 0xbfe5ec3495837074, 0xbfe74f948da8d28d, // -0.68508, -0.72846 - 0xbfe5c77bbe65018c, 0xbfe771e75f037261, // -0.6806, -0.73265 - 0xbfe5a28d2a5d7250, 0xbfe79400574f55e4, // -0.67609, -0.73682 - 0xbfe57d69348cec9f, 0xbfe7b5df226aafb0, // -0.67156, -0.74095 - 0xbfe5581038975137, 0xbfe7d7836cc33db2, // -0.667, -0.74506 - 0xbfe5328292a35596, 0xbfe7f8ece3571771, // -0.66242, -0.74914 - 0xbfe50cc09f59a09b, 0xbfe81a1b33b57acc, // -0.65781, -0.75319 - 0xbfe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // -0.65317, -0.75721 - 0xbfe4c0a145ec0004, 0xbfe85bc51ae958cc, // -0.64851, -0.7612 - 0xbfe49a449b9b0938, 0xbfe87c400fba2ebf, // -0.64383, -0.76517 - 0xbfe473b51b987347, 0xbfe89c7e9a4dd4ab, // -0.63912, -0.7691 - 0xbfe44cf325091dd6, 0xbfe8bc806b151741, // -0.63439, -0.77301 - 0xbfe425ff178e6bb1, 0xbfe8dc45331698cc, // -0.62964, -0.77689 - 0xbfe3fed9534556d4, 0xbfe8fbcca3ef940d, // -0.62486, -0.78074 - 0xbfe3d78238c58343, 0xbfe91b166fd49da2, // -0.62006, -0.78456 - 0xbfe3affa292050b9, 0xbfe93a22499263fc, // -0.61523, -0.78835 - 0xbfe3884185dfeb22, 0xbfe958efe48e6dd7, // -0.61038, -0.79211 - 0xbfe36058b10659f3, 0xbfe9777ef4c7d742, // -0.60551, -0.79584 - 0xbfe338400d0c8e57, 0xbfe995cf2ed80d22, // -0.60062, -0.79954 - 0xbfe30ff7fce17035, 0xbfe9b3e047f38741, // -0.5957, -0.80321 - 0xbfe2e780e3e8ea16, 0xbfe9d1b1f5ea80d6, // -0.59076, -0.80685 - 0xbfe2bedb25faf3ea, 0xbfe9ef43ef29af94, // -0.5858, -0.81046 - 0xbfe2960727629ca8, 0xbfea0c95eabaf937, // -0.58081, -0.81404 - 0xbfe26d054cdd12df, 0xbfea29a7a0462782, // -0.57581, -0.81758 - 0xbfe243d5fb98ac1f, 0xbfea4678c8119ac8, // -0.57078, -0.8211 - 0xbfe21a799933eb58, 0xbfea63091b02fae2, // -0.56573, -0.82459 - 0xbfe1f0f08bbc861b, 0xbfea7f58529fe69d, // -0.56066, -0.82805 - 0xbfe1c73b39ae68c8, 0xbfea9b66290ea1a3, // -0.55557, -0.83147 - 0xbfe19d5a09f2b9b8, 0xbfeab7325916c0d4, // -0.55046, -0.83486 - 0xbfe1734d63dedb49, 0xbfead2bc9e21d511, // -0.54532, -0.83822 - 0xbfe14915af336ceb, 0xbfeaee04b43c1474, // -0.54017, -0.84155 - 0xbfe11eb3541b4b22, 0xbfeb090a58150200, // -0.535, -0.84485 - 0xbfe0f426bb2a8e7d, 0xbfeb23cd470013b4, // -0.5298, -0.84812 - 0xbfe0c9704d5d898f, 0xbfeb3e4d3ef55712, // -0.52459, -0.85136 - 0xbfe09e907417c5e1, 0xbfeb5889fe921405, // -0.51936, -0.85456 - 0xbfe073879922ffed, 0xbfeb728345196e3e, // -0.5141, -0.85773 - 0xbfe0485626ae221a, 0xbfeb8c38d27504e9, // -0.50883, -0.86087 - 0xbfe01cfc874c3eb7, 0xbfeba5aa673590d2, // -0.50354, -0.86397 - 0xbfdfe2f64be7120f, 0xbfebbed7c49380ea, // -0.49823, -0.86705 - 0xbfdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // -0.4929, -0.87009 - 0xbfdf3405963fd068, 0xbfebf064e15377dd, // -0.48755, -0.87309 - 0xbfdedc1952ef78d5, 0xbfec08c426725549, // -0.48218, -0.87607 - 0xbfde83e0eaf85113, 0xbfec20de3fa971b0, // -0.4768, -0.87901 - 0xbfde2b5d3806f63b, 0xbfec38b2f180bdb1, // -0.4714, -0.88192 - 0xbfddd28f1481cc58, 0xbfec5042012b6907, // -0.46598, -0.8848 - 0xbfdd79775b86e389, 0xbfec678b3488739b, // -0.46054, -0.88764 - 0xbfdd2016e8e9db5b, 0xbfec7e8e52233cf3, // -0.45508, -0.89045 - 0xbfdcc66e9931c45d, 0xbfec954b213411f5, // -0.44961, -0.89322 - 0xbfdc6c7f4997000a, 0xbfecabc169a0b901, // -0.44412, -0.89597 - 0xbfdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // -0.43862, -0.89867 - 0xbfdbb7cf2304bd01, 0xbfecd7d9898b32f6, // -0.43309, -0.90135 - 0xbfdb5d1009e15cc0, 0xbfeced7af43cc773, // -0.42756, -0.90399 - 0xbfdb020d6c7f4009, 0xbfed02d4feb2bd92, // -0.422, -0.9066 - 0xbfdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // -0.41643, -0.90917 - 0xbfda4b4127dea1e4, 0xbfed2cb220e0ef9f, // -0.41084, -0.91171 - 0xbfd9ef7943a8ed8a, 0xbfed4134d14dc93a, // -0.40524, -0.91421 - 0xbfd993716141bdfe, 0xbfed556f52e93eb1, // -0.39962, -0.91668 - 0xbfd9372a63bc93d7, 0xbfed696173c9e68b, // -0.39399, -0.91911 - 0xbfd8daa52ec8a4af, 0xbfed7d0b02b8ecf9, // -0.38835, -0.92151 - 0xbfd87de2a6aea963, 0xbfed906bcf328d46, // -0.38268, -0.92388 - 0xbfd820e3b04eaac4, 0xbfeda383a9668988, // -0.37701, -0.92621 - 0xbfd7c3a9311dcce7, 0xbfedb6526238a09b, // -0.37132, -0.92851 - 0xbfd766340f2418f6, 0xbfedc8d7cb410260, // -0.36561, -0.93077 - 0xbfd7088530fa459e, 0xbfeddb13b6ccc23d, // -0.3599, -0.93299 - 0xbfd6aa9d7dc77e16, 0xbfeded05f7de47da, // -0.35416, -0.93518 - 0xbfd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // -0.34842, -0.93734 - 0xbfd5ee27379ea693, 0xbfee100cca2980ac, // -0.34266, -0.93946 - 0xbfd58f9a75ab1fdd, 0xbfee212104f686e5, // -0.33689, -0.94154 - 0xbfd530d880af3c24, 0xbfee31eae870ce25, // -0.33111, -0.94359 - 0xbfd4d1e24278e76a, 0xbfee426a4b2bc17e, // -0.32531, -0.94561 - 0xbfd472b8a5571054, 0xbfee529f04729ffc, // -0.3195, -0.94759 - 0xbfd4135c94176602, 0xbfee6288ec48e112, // -0.31368, -0.94953 - 0xbfd3b3cefa0414b7, 0xbfee7227db6a9744, // -0.30785, -0.95144 - 0xbfd35410c2e18152, 0xbfee817bab4cd10d, // -0.30201, -0.95331 - 0xbfd2f422daec0386, 0xbfee9084361df7f3, // -0.29615, -0.95514 - 0xbfd294062ed59f05, 0xbfee9f4156c62dda, // -0.29028, -0.95694 - 0xbfd233bbabc3bb72, 0xbfeeadb2e8e7a88e, // -0.28441, -0.9587 - 0xbfd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // -0.27852, -0.96043 - 0xbfd172a0d7765177, 0xbfeec9b2d3c3bf84, // -0.27262, -0.96212 - 0xbfd111d262b1f677, 0xbfeed740e7684963, // -0.26671, -0.96378 - 0xbfd0b0d9cfdbdb90, 0xbfeee482e25a9dbc, // -0.26079, -0.96539 - 0xbfd04fb80e37fdae, 0xbfeef178a3e473c2, // -0.25487, -0.96698 - 0xbfcfdcdc1adfedf8, 0xbfeefe220c0b95ec, // -0.24893, -0.96852 - 0xbfcf19f97b215f1a, 0xbfef0a7efb9230d7, // -0.24298, -0.97003 - 0xbfce56ca1e101a1b, 0xbfef168f53f7205d, // -0.23702, -0.9715 - 0xbfcd934fe5454311, 0xbfef2252f7763ada, // -0.23106, -0.97294 - 0xbfcccf8cb312b286, 0xbfef2dc9c9089a9d, // -0.22508, -0.97434 - 0xbfcc0b826a7e4f63, 0xbfef38f3ac64e589, // -0.2191, -0.9757 - 0xbfcb4732ef3d6722, 0xbfef43d085ff92dd, // -0.21311, -0.97703 - 0xbfca82a025b00451, 0xbfef4e603b0b2f2d, // -0.20711, -0.97832 - 0xbfc9bdcbf2dc4366, 0xbfef58a2b1789e84, // -0.2011, -0.97957 - 0xbfc8f8b83c69a60a, 0xbfef6297cff75cb0, // -0.19509, -0.98079 - 0xbfc83366e89c64c5, 0xbfef6c3f7df5bbb7, // -0.18907, -0.98196 - 0xbfc76dd9de50bf31, 0xbfef7599a3a12077, // -0.18304, -0.98311 - 0xbfc6a81304f64ab2, 0xbfef7ea629e63d6e, // -0.177, -0.98421 - 0xbfc5e214448b3fc6, 0xbfef8764fa714ba9, // -0.17096, -0.98528 - 0xbfc51bdf8597c5f2, 0xbfef8fd5ffae41db, // -0.16491, -0.98631 - 0xbfc45576b1293e5a, 0xbfef97f924c9099b, // -0.15886, -0.9873 - 0xbfc38edbb0cd8d14, 0xbfef9fce55adb2c8, // -0.1528, -0.98826 - 0xbfc2c8106e8e613a, 0xbfefa7557f08a517, // -0.14673, -0.98918 - 0xbfc20116d4ec7bce, 0xbfefae8e8e46cfbb, // -0.14066, -0.99006 - 0xbfc139f0cedaf576, 0xbfefb5797195d741, // -0.13458, -0.9909 - 0xbfc072a047ba831d, 0xbfefbc1617e44186, // -0.1285, -0.99171 - 0xbfbf564e56a9730e, 0xbfefc26470e19fd3, // -0.12241, -0.99248 - 0xbfbdc70ecbae9fc8, 0xbfefc8646cfeb721, // -0.11632, -0.99321 - 0xbfbc3785c79ec2d5, 0xbfefce15fd6da67b, // -0.11022, -0.99391 - 0xbfbaa7b724495c04, 0xbfefd37914220b84, // -0.10412, -0.99456 - 0xbfb917a6bc29b42c, 0xbfefd88da3d12526, // -0.098017, -0.99518 - 0xbfb787586a5d5b21, 0xbfefdd539ff1f456, // -0.091909, -0.99577 - 0xbfb5f6d00a9aa419, 0xbfefe1cafcbd5b09, // -0.085797, -0.99631 - 0xbfb4661179272096, 0xbfefe5f3af2e3940, // -0.079682, -0.99682 - 0xbfb2d52092ce19f6, 0xbfefe9cdad01883a, // -0.073565, -0.99729 - 0xbfb1440134d709b2, 0xbfefed58ecb673c4, // -0.067444, -0.99772 - 0xbfaf656e79f820e0, 0xbfeff095658e71ad, // -0.061321, -0.99812 - 0xbfac428d12c0d7e3, 0xbfeff3830f8d575c, // -0.055195, -0.99848 - 0xbfa91f65f10dd814, 0xbfeff621e3796d7e, // -0.049068, -0.9988 - 0xbfa5fc00d290cd43, 0xbfeff871dadb81df, // -0.042938, -0.99908 - 0xbfa2d865759455cd, 0xbfeffa72effef75d, // -0.036807, -0.99932 - 0xbf9f693731d1cf01, 0xbfeffc251df1d3f8, // -0.030675, -0.99953 - 0xbf992155f7a3667e, 0xbfeffd886084cd0d, // -0.024541, -0.9997 - 0xbf92d936bbe30efd, 0xbfeffe9cb44b51a1, // -0.018407, -0.99983 - 0xbf8921d1fcdec784, 0xbfefff62169b92db, // -0.012272, -0.99992 - 0xbf7921f0fe670071, 0xbfefffd8858e8a92, //-0.0061359, -0.99998 - 0x0000000000000000, 0xbff0000000000000, // 0, -1 - 0x3f7921f0fe670071, 0xbfefffd8858e8a92, // 0.0061359, -0.99998 - 0x3f8921d1fcdec784, 0xbfefff62169b92db, // 0.012272, -0.99992 - 0x3f92d936bbe30efd, 0xbfeffe9cb44b51a1, // 0.018407, -0.99983 - 0x3f992155f7a3667e, 0xbfeffd886084cd0d, // 0.024541, -0.9997 - 0x3f9f693731d1cf01, 0xbfeffc251df1d3f8, // 0.030675, -0.99953 - 0x3fa2d865759455cd, 0xbfeffa72effef75d, // 0.036807, -0.99932 - 0x3fa5fc00d290cd43, 0xbfeff871dadb81df, // 0.042938, -0.99908 - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, // 0.049068, -0.9988 - 0x3fac428d12c0d7e3, 0xbfeff3830f8d575c, // 0.055195, -0.99848 - 0x3faf656e79f820e0, 0xbfeff095658e71ad, // 0.061321, -0.99812 - 0x3fb1440134d709b2, 0xbfefed58ecb673c4, // 0.067444, -0.99772 - 0x3fb2d52092ce19f6, 0xbfefe9cdad01883a, // 0.073565, -0.99729 - 0x3fb4661179272096, 0xbfefe5f3af2e3940, // 0.079682, -0.99682 - 0x3fb5f6d00a9aa419, 0xbfefe1cafcbd5b09, // 0.085797, -0.99631 - 0x3fb787586a5d5b21, 0xbfefdd539ff1f456, // 0.091909, -0.99577 - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, // 0.098017, -0.99518 - 0x3fbaa7b724495c04, 0xbfefd37914220b84, // 0.10412, -0.99456 - 0x3fbc3785c79ec2d5, 0xbfefce15fd6da67b, // 0.11022, -0.99391 - 0x3fbdc70ecbae9fc8, 0xbfefc8646cfeb721, // 0.11632, -0.99321 - 0x3fbf564e56a9730e, 0xbfefc26470e19fd3, // 0.12241, -0.99248 - 0x3fc072a047ba831d, 0xbfefbc1617e44186, // 0.1285, -0.99171 - 0x3fc139f0cedaf576, 0xbfefb5797195d741, // 0.13458, -0.9909 - 0x3fc20116d4ec7bce, 0xbfefae8e8e46cfbb, // 0.14066, -0.99006 - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918 - 0x3fc38edbb0cd8d14, 0xbfef9fce55adb2c8, // 0.1528, -0.98826 - 0x3fc45576b1293e5a, 0xbfef97f924c9099b, // 0.15886, -0.9873 - 0x3fc51bdf8597c5f2, 0xbfef8fd5ffae41db, // 0.16491, -0.98631 - 0x3fc5e214448b3fc6, 0xbfef8764fa714ba9, // 0.17096, -0.98528 - 0x3fc6a81304f64ab2, 0xbfef7ea629e63d6e, // 0.177, -0.98421 - 0x3fc76dd9de50bf31, 0xbfef7599a3a12077, // 0.18304, -0.98311 - 0x3fc83366e89c64c5, 0xbfef6c3f7df5bbb7, // 0.18907, -0.98196 - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079 - 0x3fc9bdcbf2dc4366, 0xbfef58a2b1789e84, // 0.2011, -0.97957 - 0x3fca82a025b00451, 0xbfef4e603b0b2f2d, // 0.20711, -0.97832 - 0x3fcb4732ef3d6722, 0xbfef43d085ff92dd, // 0.21311, -0.97703 - 0x3fcc0b826a7e4f63, 0xbfef38f3ac64e589, // 0.2191, -0.9757 - 0x3fcccf8cb312b286, 0xbfef2dc9c9089a9d, // 0.22508, -0.97434 - 0x3fcd934fe5454311, 0xbfef2252f7763ada, // 0.23106, -0.97294 - 0x3fce56ca1e101a1b, 0xbfef168f53f7205d, // 0.23702, -0.9715 - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003 - 0x3fcfdcdc1adfedf8, 0xbfeefe220c0b95ec, // 0.24893, -0.96852 - 0x3fd04fb80e37fdae, 0xbfeef178a3e473c2, // 0.25487, -0.96698 - 0x3fd0b0d9cfdbdb90, 0xbfeee482e25a9dbc, // 0.26079, -0.96539 - 0x3fd111d262b1f677, 0xbfeed740e7684963, // 0.26671, -0.96378 - 0x3fd172a0d7765177, 0xbfeec9b2d3c3bf84, // 0.27262, -0.96212 - 0x3fd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // 0.27852, -0.96043 - 0x3fd233bbabc3bb72, 0xbfeeadb2e8e7a88e, // 0.28441, -0.9587 - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694 - 0x3fd2f422daec0386, 0xbfee9084361df7f3, // 0.29615, -0.95514 - 0x3fd35410c2e18152, 0xbfee817bab4cd10d, // 0.30201, -0.95331 - 0x3fd3b3cefa0414b7, 0xbfee7227db6a9744, // 0.30785, -0.95144 - 0x3fd4135c94176602, 0xbfee6288ec48e112, // 0.31368, -0.94953 - 0x3fd472b8a5571054, 0xbfee529f04729ffc, // 0.3195, -0.94759 - 0x3fd4d1e24278e76a, 0xbfee426a4b2bc17e, // 0.32531, -0.94561 - 0x3fd530d880af3c24, 0xbfee31eae870ce25, // 0.33111, -0.94359 - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154 - 0x3fd5ee27379ea693, 0xbfee100cca2980ac, // 0.34266, -0.93946 - 0x3fd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // 0.34842, -0.93734 - 0x3fd6aa9d7dc77e16, 0xbfeded05f7de47da, // 0.35416, -0.93518 - 0x3fd7088530fa459e, 0xbfeddb13b6ccc23d, // 0.3599, -0.93299 - 0x3fd766340f2418f6, 0xbfedc8d7cb410260, // 0.36561, -0.93077 - 0x3fd7c3a9311dcce7, 0xbfedb6526238a09b, // 0.37132, -0.92851 - 0x3fd820e3b04eaac4, 0xbfeda383a9668988, // 0.37701, -0.92621 - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388 - 0x3fd8daa52ec8a4af, 0xbfed7d0b02b8ecf9, // 0.38835, -0.92151 - 0x3fd9372a63bc93d7, 0xbfed696173c9e68b, // 0.39399, -0.91911 - 0x3fd993716141bdfe, 0xbfed556f52e93eb1, // 0.39962, -0.91668 - 0x3fd9ef7943a8ed8a, 0xbfed4134d14dc93a, // 0.40524, -0.91421 - 0x3fda4b4127dea1e4, 0xbfed2cb220e0ef9f, // 0.41084, -0.91171 - 0x3fdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // 0.41643, -0.90917 - 0x3fdb020d6c7f4009, 0xbfed02d4feb2bd92, // 0.422, -0.9066 - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399 - 0x3fdbb7cf2304bd01, 0xbfecd7d9898b32f6, // 0.43309, -0.90135 - 0x3fdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // 0.43862, -0.89867 - 0x3fdc6c7f4997000a, 0xbfecabc169a0b901, // 0.44412, -0.89597 - 0x3fdcc66e9931c45d, 0xbfec954b213411f5, // 0.44961, -0.89322 - 0x3fdd2016e8e9db5b, 0xbfec7e8e52233cf3, // 0.45508, -0.89045 - 0x3fdd79775b86e389, 0xbfec678b3488739b, // 0.46054, -0.88764 - 0x3fddd28f1481cc58, 0xbfec5042012b6907, // 0.46598, -0.8848 - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192 - 0x3fde83e0eaf85113, 0xbfec20de3fa971b0, // 0.4768, -0.87901 - 0x3fdedc1952ef78d5, 0xbfec08c426725549, // 0.48218, -0.87607 - 0x3fdf3405963fd068, 0xbfebf064e15377dd, // 0.48755, -0.87309 - 0x3fdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // 0.4929, -0.87009 - 0x3fdfe2f64be7120f, 0xbfebbed7c49380ea, // 0.49823, -0.86705 - 0x3fe01cfc874c3eb7, 0xbfeba5aa673590d2, // 0.50354, -0.86397 - 0x3fe0485626ae221a, 0xbfeb8c38d27504e9, // 0.50883, -0.86087 - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773 - 0x3fe09e907417c5e1, 0xbfeb5889fe921405, // 0.51936, -0.85456 - 0x3fe0c9704d5d898f, 0xbfeb3e4d3ef55712, // 0.52459, -0.85136 - 0x3fe0f426bb2a8e7d, 0xbfeb23cd470013b4, // 0.5298, -0.84812 - 0x3fe11eb3541b4b22, 0xbfeb090a58150200, // 0.535, -0.84485 - 0x3fe14915af336ceb, 0xbfeaee04b43c1474, // 0.54017, -0.84155 - 0x3fe1734d63dedb49, 0xbfead2bc9e21d511, // 0.54532, -0.83822 - 0x3fe19d5a09f2b9b8, 0xbfeab7325916c0d4, // 0.55046, -0.83486 - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147 - 0x3fe1f0f08bbc861b, 0xbfea7f58529fe69d, // 0.56066, -0.82805 - 0x3fe21a799933eb58, 0xbfea63091b02fae2, // 0.56573, -0.82459 - 0x3fe243d5fb98ac1f, 0xbfea4678c8119ac8, // 0.57078, -0.8211 - 0x3fe26d054cdd12df, 0xbfea29a7a0462782, // 0.57581, -0.81758 - 0x3fe2960727629ca8, 0xbfea0c95eabaf937, // 0.58081, -0.81404 - 0x3fe2bedb25faf3ea, 0xbfe9ef43ef29af94, // 0.5858, -0.81046 - 0x3fe2e780e3e8ea16, 0xbfe9d1b1f5ea80d6, // 0.59076, -0.80685 - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321 - 0x3fe338400d0c8e57, 0xbfe995cf2ed80d22, // 0.60062, -0.79954 - 0x3fe36058b10659f3, 0xbfe9777ef4c7d742, // 0.60551, -0.79584 - 0x3fe3884185dfeb22, 0xbfe958efe48e6dd7, // 0.61038, -0.79211 - 0x3fe3affa292050b9, 0xbfe93a22499263fc, // 0.61523, -0.78835 - 0x3fe3d78238c58343, 0xbfe91b166fd49da2, // 0.62006, -0.78456 - 0x3fe3fed9534556d4, 0xbfe8fbcca3ef940d, // 0.62486, -0.78074 - 0x3fe425ff178e6bb1, 0xbfe8dc45331698cc, // 0.62964, -0.77689 - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301 - 0x3fe473b51b987347, 0xbfe89c7e9a4dd4ab, // 0.63912, -0.7691 - 0x3fe49a449b9b0938, 0xbfe87c400fba2ebf, // 0.64383, -0.76517 - 0x3fe4c0a145ec0004, 0xbfe85bc51ae958cc, // 0.64851, -0.7612 - 0x3fe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // 0.65317, -0.75721 - 0x3fe50cc09f59a09b, 0xbfe81a1b33b57acc, // 0.65781, -0.75319 - 0x3fe5328292a35596, 0xbfe7f8ece3571771, // 0.66242, -0.74914 - 0x3fe5581038975137, 0xbfe7d7836cc33db2, // 0.667, -0.74506 - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095 - 0x3fe5a28d2a5d7250, 0xbfe79400574f55e4, // 0.67609, -0.73682 - 0x3fe5c77bbe65018c, 0xbfe771e75f037261, // 0.6806, -0.73265 - 0x3fe5ec3495837074, 0xbfe74f948da8d28d, // 0.68508, -0.72846 - 0x3fe610b7551d2cde, 0xbfe72d0837efff97, // 0.68954, -0.72425 - 0x3fe63503a31c1be8, 0xbfe70a42b3176d7a, // 0.69397, -0.72 - 0x3fe6591925f0783e, 0xbfe6e74454eaa8ae, // 0.69838, -0.71573 - 0x3fe67cf78491af10, 0xbfe6c40d73c18275, // 0.70275, -0.71143 - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711 - 0x3fe6c40d73c18275, 0xbfe67cf78491af10, // 0.71143, -0.70275 - 0x3fe6e74454eaa8ae, 0xbfe6591925f0783e, // 0.71573, -0.69838 - 0x3fe70a42b3176d7a, 0xbfe63503a31c1be8, // 0.72, -0.69397 - 0x3fe72d0837efff97, 0xbfe610b7551d2cde, // 0.72425, -0.68954 - 0x3fe74f948da8d28d, 0xbfe5ec3495837074, // 0.72846, -0.68508 - 0x3fe771e75f037261, 0xbfe5c77bbe65018c, // 0.73265, -0.6806 - 0x3fe79400574f55e4, 0xbfe5a28d2a5d7250, // 0.73682, -0.67609 - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156 - 0x3fe7d7836cc33db2, 0xbfe5581038975137, // 0.74506, -0.667 - 0x3fe7f8ece3571771, 0xbfe5328292a35596, // 0.74914, -0.66242 - 0x3fe81a1b33b57acc, 0xbfe50cc09f59a09b, // 0.75319, -0.65781 - 0x3fe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // 0.75721, -0.65317 - 0x3fe85bc51ae958cc, 0xbfe4c0a145ec0004, // 0.7612, -0.64851 - 0x3fe87c400fba2ebf, 0xbfe49a449b9b0938, // 0.76517, -0.64383 - 0x3fe89c7e9a4dd4ab, 0xbfe473b51b987347, // 0.7691, -0.63912 - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439 - 0x3fe8dc45331698cc, 0xbfe425ff178e6bb1, // 0.77689, -0.62964 - 0x3fe8fbcca3ef940d, 0xbfe3fed9534556d4, // 0.78074, -0.62486 - 0x3fe91b166fd49da2, 0xbfe3d78238c58343, // 0.78456, -0.62006 - 0x3fe93a22499263fc, 0xbfe3affa292050b9, // 0.78835, -0.61523 - 0x3fe958efe48e6dd7, 0xbfe3884185dfeb22, // 0.79211, -0.61038 - 0x3fe9777ef4c7d742, 0xbfe36058b10659f3, // 0.79584, -0.60551 - 0x3fe995cf2ed80d22, 0xbfe338400d0c8e57, // 0.79954, -0.60062 - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957 - 0x3fe9d1b1f5ea80d6, 0xbfe2e780e3e8ea16, // 0.80685, -0.59076 - 0x3fe9ef43ef29af94, 0xbfe2bedb25faf3ea, // 0.81046, -0.5858 - 0x3fea0c95eabaf937, 0xbfe2960727629ca8, // 0.81404, -0.58081 - 0x3fea29a7a0462782, 0xbfe26d054cdd12df, // 0.81758, -0.57581 - 0x3fea4678c8119ac8, 0xbfe243d5fb98ac1f, // 0.8211, -0.57078 - 0x3fea63091b02fae2, 0xbfe21a799933eb58, // 0.82459, -0.56573 - 0x3fea7f58529fe69d, 0xbfe1f0f08bbc861b, // 0.82805, -0.56066 - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557 - 0x3feab7325916c0d4, 0xbfe19d5a09f2b9b8, // 0.83486, -0.55046 - 0x3fead2bc9e21d511, 0xbfe1734d63dedb49, // 0.83822, -0.54532 - 0x3feaee04b43c1474, 0xbfe14915af336ceb, // 0.84155, -0.54017 - 0x3feb090a58150200, 0xbfe11eb3541b4b22, // 0.84485, -0.535 - 0x3feb23cd470013b4, 0xbfe0f426bb2a8e7d, // 0.84812, -0.5298 - 0x3feb3e4d3ef55712, 0xbfe0c9704d5d898f, // 0.85136, -0.52459 - 0x3feb5889fe921405, 0xbfe09e907417c5e1, // 0.85456, -0.51936 - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141 - 0x3feb8c38d27504e9, 0xbfe0485626ae221a, // 0.86087, -0.50883 - 0x3feba5aa673590d2, 0xbfe01cfc874c3eb7, // 0.86397, -0.50354 - 0x3febbed7c49380ea, 0xbfdfe2f64be7120f, // 0.86705, -0.49823 - 0x3febd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // 0.87009, -0.4929 - 0x3febf064e15377dd, 0xbfdf3405963fd068, // 0.87309, -0.48755 - 0x3fec08c426725549, 0xbfdedc1952ef78d5, // 0.87607, -0.48218 - 0x3fec20de3fa971b0, 0xbfde83e0eaf85113, // 0.87901, -0.4768 - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714 - 0x3fec5042012b6907, 0xbfddd28f1481cc58, // 0.8848, -0.46598 - 0x3fec678b3488739b, 0xbfdd79775b86e389, // 0.88764, -0.46054 - 0x3fec7e8e52233cf3, 0xbfdd2016e8e9db5b, // 0.89045, -0.45508 - 0x3fec954b213411f5, 0xbfdcc66e9931c45d, // 0.89322, -0.44961 - 0x3fecabc169a0b901, 0xbfdc6c7f4997000a, // 0.89597, -0.44412 - 0x3fecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // 0.89867, -0.43862 - 0x3fecd7d9898b32f6, 0xbfdbb7cf2304bd01, // 0.90135, -0.43309 - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756 - 0x3fed02d4feb2bd92, 0xbfdb020d6c7f4009, // 0.9066, -0.422 - 0x3fed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // 0.90917, -0.41643 - 0x3fed2cb220e0ef9f, 0xbfda4b4127dea1e4, // 0.91171, -0.41084 - 0x3fed4134d14dc93a, 0xbfd9ef7943a8ed8a, // 0.91421, -0.40524 - 0x3fed556f52e93eb1, 0xbfd993716141bdfe, // 0.91668, -0.39962 - 0x3fed696173c9e68b, 0xbfd9372a63bc93d7, // 0.91911, -0.39399 - 0x3fed7d0b02b8ecf9, 0xbfd8daa52ec8a4af, // 0.92151, -0.38835 - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268 - 0x3feda383a9668988, 0xbfd820e3b04eaac4, // 0.92621, -0.37701 - 0x3fedb6526238a09b, 0xbfd7c3a9311dcce7, // 0.92851, -0.37132 - 0x3fedc8d7cb410260, 0xbfd766340f2418f6, // 0.93077, -0.36561 - 0x3feddb13b6ccc23d, 0xbfd7088530fa459e, // 0.93299, -0.3599 - 0x3feded05f7de47da, 0xbfd6aa9d7dc77e16, // 0.93518, -0.35416 - 0x3fedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // 0.93734, -0.34842 - 0x3fee100cca2980ac, 0xbfd5ee27379ea693, // 0.93946, -0.34266 - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689 - 0x3fee31eae870ce25, 0xbfd530d880af3c24, // 0.94359, -0.33111 - 0x3fee426a4b2bc17e, 0xbfd4d1e24278e76a, // 0.94561, -0.32531 - 0x3fee529f04729ffc, 0xbfd472b8a5571054, // 0.94759, -0.3195 - 0x3fee6288ec48e112, 0xbfd4135c94176602, // 0.94953, -0.31368 - 0x3fee7227db6a9744, 0xbfd3b3cefa0414b7, // 0.95144, -0.30785 - 0x3fee817bab4cd10d, 0xbfd35410c2e18152, // 0.95331, -0.30201 - 0x3fee9084361df7f3, 0xbfd2f422daec0386, // 0.95514, -0.29615 - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028 - 0x3feeadb2e8e7a88e, 0xbfd233bbabc3bb72, // 0.9587, -0.28441 - 0x3feebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // 0.96043, -0.27852 - 0x3feec9b2d3c3bf84, 0xbfd172a0d7765177, // 0.96212, -0.27262 - 0x3feed740e7684963, 0xbfd111d262b1f677, // 0.96378, -0.26671 - 0x3feee482e25a9dbc, 0xbfd0b0d9cfdbdb90, // 0.96539, -0.26079 - 0x3feef178a3e473c2, 0xbfd04fb80e37fdae, // 0.96698, -0.25487 - 0x3feefe220c0b95ec, 0xbfcfdcdc1adfedf8, // 0.96852, -0.24893 - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298 - 0x3fef168f53f7205d, 0xbfce56ca1e101a1b, // 0.9715, -0.23702 - 0x3fef2252f7763ada, 0xbfcd934fe5454311, // 0.97294, -0.23106 - 0x3fef2dc9c9089a9d, 0xbfcccf8cb312b286, // 0.97434, -0.22508 - 0x3fef38f3ac64e589, 0xbfcc0b826a7e4f63, // 0.9757, -0.2191 - 0x3fef43d085ff92dd, 0xbfcb4732ef3d6722, // 0.97703, -0.21311 - 0x3fef4e603b0b2f2d, 0xbfca82a025b00451, // 0.97832, -0.20711 - 0x3fef58a2b1789e84, 0xbfc9bdcbf2dc4366, // 0.97957, -0.2011 - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509 - 0x3fef6c3f7df5bbb7, 0xbfc83366e89c64c5, // 0.98196, -0.18907 - 0x3fef7599a3a12077, 0xbfc76dd9de50bf31, // 0.98311, -0.18304 - 0x3fef7ea629e63d6e, 0xbfc6a81304f64ab2, // 0.98421, -0.177 - 0x3fef8764fa714ba9, 0xbfc5e214448b3fc6, // 0.98528, -0.17096 - 0x3fef8fd5ffae41db, 0xbfc51bdf8597c5f2, // 0.98631, -0.16491 - 0x3fef97f924c9099b, 0xbfc45576b1293e5a, // 0.9873, -0.15886 - 0x3fef9fce55adb2c8, 0xbfc38edbb0cd8d14, // 0.98826, -0.1528 - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673 - 0x3fefae8e8e46cfbb, 0xbfc20116d4ec7bce, // 0.99006, -0.14066 - 0x3fefb5797195d741, 0xbfc139f0cedaf576, // 0.9909, -0.13458 - 0x3fefbc1617e44186, 0xbfc072a047ba831d, // 0.99171, -0.1285 - 0x3fefc26470e19fd3, 0xbfbf564e56a9730e, // 0.99248, -0.12241 - 0x3fefc8646cfeb721, 0xbfbdc70ecbae9fc8, // 0.99321, -0.11632 - 0x3fefce15fd6da67b, 0xbfbc3785c79ec2d5, // 0.99391, -0.11022 - 0x3fefd37914220b84, 0xbfbaa7b724495c04, // 0.99456, -0.10412 - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518, -0.098017 - 0x3fefdd539ff1f456, 0xbfb787586a5d5b21, // 0.99577, -0.091909 - 0x3fefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // 0.99631, -0.085797 - 0x3fefe5f3af2e3940, 0xbfb4661179272096, // 0.99682, -0.079682 - 0x3fefe9cdad01883a, 0xbfb2d52092ce19f6, // 0.99729, -0.073565 - 0x3fefed58ecb673c4, 0xbfb1440134d709b2, // 0.99772, -0.067444 - 0x3feff095658e71ad, 0xbfaf656e79f820e0, // 0.99812, -0.061321 - 0x3feff3830f8d575c, 0xbfac428d12c0d7e3, // 0.99848, -0.055195 - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988, -0.049068 - 0x3feff871dadb81df, 0xbfa5fc00d290cd43, // 0.99908, -0.042938 - 0x3feffa72effef75d, 0xbfa2d865759455cd, // 0.99932, -0.036807 - 0x3feffc251df1d3f8, 0xbf9f693731d1cf01, // 0.99953, -0.030675 - 0x3feffd886084cd0d, 0xbf992155f7a3667e, // 0.9997, -0.024541 - 0x3feffe9cb44b51a1, 0xbf92d936bbe30efd, // 0.99983, -0.018407 - 0x3fefff62169b92db, 0xbf8921d1fcdec784, // 0.99992, -0.012272 - 0x3fefffd8858e8a92, 0xbf7921f0fe670071, // 0.99998,-0.0061359 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_2048) -/** - @par - Example code for Double Precision Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 2048, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const uint64_t twiddleCoefF64_2048[4096] = { - 0x3ff0000000000000, 0x0000000000000000, // 1, 0 - 0x3feffff621621d02, 0x3f6921f8becca4ba, // 1, 0.003068 - 0x3fefffd8858e8a92, 0x3f7921f0fe670071, // 0.99998, 0.0061359 - 0x3fefffa72c978c4f, 0x3f82d96b0e509703, // 0.99996, 0.0092038 - 0x3fefff62169b92db, 0x3f8921d1fcdec784, // 0.99992, 0.012272 - 0x3fefff0943c53bd1, 0x3f8f6a296ab997ca, // 0.99988, 0.015339 - 0x3feffe9cb44b51a1, 0x3f92d936bbe30efd, // 0.99983, 0.018407 - 0x3feffe1c6870cb77, 0x3f95fd4d21fab226, // 0.99977, 0.021474 - 0x3feffd886084cd0d, 0x3f992155f7a3667e, // 0.9997, 0.024541 - 0x3feffce09ce2a679, 0x3f9c454f4ce53b1c, // 0.99962, 0.027608 - 0x3feffc251df1d3f8, 0x3f9f693731d1cf01, // 0.99953, 0.030675 - 0x3feffb55e425fdae, 0x3fa14685db42c17e, // 0.99943, 0.033741 - 0x3feffa72effef75d, 0x3fa2d865759455cd, // 0.99932, 0.036807 - 0x3feff97c4208c014, 0x3fa46a396ff86179, // 0.9992, 0.039873 - 0x3feff871dadb81df, 0x3fa5fc00d290cd43, // 0.99908, 0.042938 - 0x3feff753bb1b9164, 0x3fa78dbaa5874685, // 0.99894, 0.046003 - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068 - 0x3feff4dc54b1bed3, 0x3faab101bd5f8317, // 0.99864, 0.052132 - 0x3feff3830f8d575c, 0x3fac428d12c0d7e3, // 0.99848, 0.055195 - 0x3feff21614e131ed, 0x3fadd406f9808ec8, // 0.9983, 0.058258 - 0x3feff095658e71ad, 0x3faf656e79f820e0, // 0.99812, 0.061321 - 0x3fefef0102826191, 0x3fb07b614e463064, // 0.99793, 0.064383 - 0x3fefed58ecb673c4, 0x3fb1440134d709b2, // 0.99772, 0.067444 - 0x3fefeb9d2530410f, 0x3fb20c9674ed444c, // 0.99751, 0.070505 - 0x3fefe9cdad01883a, 0x3fb2d52092ce19f6, // 0.99729, 0.073565 - 0x3fefe7ea85482d60, 0x3fb39d9f12c5a299, // 0.99706, 0.076624 - 0x3fefe5f3af2e3940, 0x3fb4661179272096, // 0.99682, 0.079682 - 0x3fefe3e92be9d886, 0x3fb52e774a4d4d0a, // 0.99657, 0.08274 - 0x3fefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // 0.99631, 0.085797 - 0x3fefdf9922f73307, 0x3fb6bf1b3e79b129, // 0.99604, 0.088854 - 0x3fefdd539ff1f456, 0x3fb787586a5d5b21, // 0.99577, 0.091909 - 0x3fefdafa7514538c, 0x3fb84f8712c130a0, // 0.99548, 0.094963 - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017 - 0x3fefd60d2da75c9e, 0x3fb9dfb6eb24a85c, // 0.99488, 0.10107 - 0x3fefd37914220b84, 0x3fbaa7b724495c04, // 0.99456, 0.10412 - 0x3fefd0d158d86087, 0x3fbb6fa6ec38f64c, // 0.99424, 0.10717 - 0x3fefce15fd6da67b, 0x3fbc3785c79ec2d5, // 0.99391, 0.11022 - 0x3fefcb4703914354, 0x3fbcff533b307dc1, // 0.99356, 0.11327 - 0x3fefc8646cfeb721, 0x3fbdc70ecbae9fc8, // 0.99321, 0.11632 - 0x3fefc56e3b7d9af6, 0x3fbe8eb7fde4aa3e, // 0.99285, 0.11937 - 0x3fefc26470e19fd3, 0x3fbf564e56a9730e, // 0.99248, 0.12241 - 0x3fefbf470f0a8d88, 0x3fc00ee8ad6fb85b, // 0.9921, 0.12545 - 0x3fefbc1617e44186, 0x3fc072a047ba831d, // 0.99171, 0.1285 - 0x3fefb8d18d66adb7, 0x3fc0d64dbcb26786, // 0.99131, 0.13154 - 0x3fefb5797195d741, 0x3fc139f0cedaf576, // 0.9909, 0.13458 - 0x3fefb20dc681d54d, 0x3fc19d8940be24e7, // 0.99049, 0.13762 - 0x3fefae8e8e46cfbb, 0x3fc20116d4ec7bce, // 0.99006, 0.14066 - 0x3fefaafbcb0cfddc, 0x3fc264994dfd340a, // 0.98962, 0.1437 - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673 - 0x3fefa39bac7a1791, 0x3fc32b7bf94516a7, // 0.98872, 0.14976 - 0x3fef9fce55adb2c8, 0x3fc38edbb0cd8d14, // 0.98826, 0.1528 - 0x3fef9bed7cfbde29, 0x3fc3f22f57db4893, // 0.98778, 0.15583 - 0x3fef97f924c9099b, 0x3fc45576b1293e5a, // 0.9873, 0.15886 - 0x3fef93f14f85ac08, 0x3fc4b8b17f79fa88, // 0.98681, 0.16189 - 0x3fef8fd5ffae41db, 0x3fc51bdf8597c5f2, // 0.98631, 0.16491 - 0x3fef8ba737cb4b78, 0x3fc57f008654cbde, // 0.9858, 0.16794 - 0x3fef8764fa714ba9, 0x3fc5e214448b3fc6, // 0.98528, 0.17096 - 0x3fef830f4a40c60c, 0x3fc6451a831d830d, // 0.98475, 0.17398 - 0x3fef7ea629e63d6e, 0x3fc6a81304f64ab2, // 0.98421, 0.177 - 0x3fef7a299c1a322a, 0x3fc70afd8d08c4ff, // 0.98366, 0.18002 - 0x3fef7599a3a12077, 0x3fc76dd9de50bf31, // 0.98311, 0.18304 - 0x3fef70f6434b7eb7, 0x3fc7d0a7bbd2cb1b, // 0.98254, 0.18606 - 0x3fef6c3f7df5bbb7, 0x3fc83366e89c64c5, // 0.98196, 0.18907 - 0x3fef677556883cee, 0x3fc8961727c41804, // 0.98138, 0.19208 - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509 - 0x3fef5da6ed43685d, 0x3fc95b49e9b62af9, // 0.98018, 0.1981 - 0x3fef58a2b1789e84, 0x3fc9bdcbf2dc4366, // 0.97957, 0.2011 - 0x3fef538b1faf2d07, 0x3fca203e1b1831da, // 0.97895, 0.20411 - 0x3fef4e603b0b2f2d, 0x3fca82a025b00451, // 0.97832, 0.20711 - 0x3fef492206bcabb4, 0x3fcae4f1d5f3b9ab, // 0.97768, 0.21011 - 0x3fef43d085ff92dd, 0x3fcb4732ef3d6722, // 0.97703, 0.21311 - 0x3fef3e6bbc1bbc65, 0x3fcba96334f15dad, // 0.97637, 0.21611 - 0x3fef38f3ac64e589, 0x3fcc0b826a7e4f63, // 0.9757, 0.2191 - 0x3fef33685a3aaef0, 0x3fcc6d90535d74dc, // 0.97503, 0.22209 - 0x3fef2dc9c9089a9d, 0x3fcccf8cb312b286, // 0.97434, 0.22508 - 0x3fef2817fc4609ce, 0x3fcd31774d2cbdee, // 0.97364, 0.22807 - 0x3fef2252f7763ada, 0x3fcd934fe5454311, // 0.97294, 0.23106 - 0x3fef1c7abe284708, 0x3fcdf5163f01099a, // 0.97223, 0.23404 - 0x3fef168f53f7205d, 0x3fce56ca1e101a1b, // 0.9715, 0.23702 - 0x3fef1090bc898f5f, 0x3fceb86b462de348, // 0.97077, 0.24 - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298 - 0x3fef045a14cf738c, 0x3fcf7b7480bd3801, // 0.96928, 0.24596 - 0x3feefe220c0b95ec, 0x3fcfdcdc1adfedf8, // 0.96852, 0.24893 - 0x3feef7d6e51ca3c0, 0x3fd01f1806b9fdd2, // 0.96775, 0.2519 - 0x3feef178a3e473c2, 0x3fd04fb80e37fdae, // 0.96698, 0.25487 - 0x3feeeb074c50a544, 0x3fd0804e05eb661e, // 0.96619, 0.25783 - 0x3feee482e25a9dbc, 0x3fd0b0d9cfdbdb90, // 0.96539, 0.26079 - 0x3feeddeb6a078651, 0x3fd0e15b4e1749cd, // 0.96459, 0.26375 - 0x3feed740e7684963, 0x3fd111d262b1f677, // 0.96378, 0.26671 - 0x3feed0835e999009, 0x3fd1423eefc69378, // 0.96295, 0.26967 - 0x3feec9b2d3c3bf84, 0x3fd172a0d7765177, // 0.96212, 0.27262 - 0x3feec2cf4b1af6b2, 0x3fd1a2f7fbe8f243, // 0.96128, 0.27557 - 0x3feebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // 0.96043, 0.27852 - 0x3feeb4cf515b8811, 0x3fd2038583d727bd, // 0.95957, 0.28146 - 0x3feeadb2e8e7a88e, 0x3fd233bbabc3bb72, // 0.9587, 0.28441 - 0x3feea68393e65800, 0x3fd263e6995554ba, // 0.95783, 0.28735 - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028 - 0x3fee97ec36016b30, 0x3fd2c41a4e954520, // 0.95605, 0.29322 - 0x3fee9084361df7f3, 0x3fd2f422daec0386, // 0.95514, 0.29615 - 0x3fee89095bad6025, 0x3fd3241fb638baaf, // 0.95423, 0.29908 - 0x3fee817bab4cd10d, 0x3fd35410c2e18152, // 0.95331, 0.30201 - 0x3fee79db29a5165a, 0x3fd383f5e353b6aa, // 0.95238, 0.30493 - 0x3fee7227db6a9744, 0x3fd3b3cefa0414b7, // 0.95144, 0.30785 - 0x3fee6a61c55d53a7, 0x3fd3e39be96ec271, // 0.95049, 0.31077 - 0x3fee6288ec48e112, 0x3fd4135c94176602, // 0.94953, 0.31368 - 0x3fee5a9d550467d3, 0x3fd44310dc8936f0, // 0.94856, 0.31659 - 0x3fee529f04729ffc, 0x3fd472b8a5571054, // 0.94759, 0.3195 - 0x3fee4a8dff81ce5e, 0x3fd4a253d11b82f3, // 0.9466, 0.32241 - 0x3fee426a4b2bc17e, 0x3fd4d1e24278e76a, // 0.94561, 0.32531 - 0x3fee3a33ec75ce85, 0x3fd50163dc197047, // 0.9446, 0.32821 - 0x3fee31eae870ce25, 0x3fd530d880af3c24, // 0.94359, 0.33111 - 0x3fee298f4439197a, 0x3fd5604012f467b4, // 0.94257, 0.334 - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689 - 0x3fee18a02fdc66d9, 0x3fd5bee78b9db3b6, // 0.94051, 0.33978 - 0x3fee100cca2980ac, 0x3fd5ee27379ea693, // 0.93946, 0.34266 - 0x3fee0766d9280f54, 0x3fd61d595c88c203, // 0.9384, 0.34554 - 0x3fedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // 0.93734, 0.34842 - 0x3fedf5e36a9ba59c, 0x3fd67b949cad63ca, // 0.93627, 0.35129 - 0x3feded05f7de47da, 0x3fd6aa9d7dc77e16, // 0.93518, 0.35416 - 0x3fede4160f6d8d81, 0x3fd6d998638a0cb5, // 0.93409, 0.35703 - 0x3feddb13b6ccc23d, 0x3fd7088530fa459e, // 0.93299, 0.3599 - 0x3fedd1fef38a915a, 0x3fd73763c9261092, // 0.93188, 0.36276 - 0x3fedc8d7cb410260, 0x3fd766340f2418f6, // 0.93077, 0.36561 - 0x3fedbf9e4395759a, 0x3fd794f5e613dfae, // 0.92964, 0.36847 - 0x3fedb6526238a09b, 0x3fd7c3a9311dcce7, // 0.92851, 0.37132 - 0x3fedacf42ce68ab9, 0x3fd7f24dd37341e3, // 0.92736, 0.37416 - 0x3feda383a9668988, 0x3fd820e3b04eaac4, // 0.92621, 0.37701 - 0x3fed9a00dd8b3d46, 0x3fd84f6aaaf3903f, // 0.92505, 0.37985 - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268 - 0x3fed86c48445a450, 0x3fd8ac4b86d5ed44, // 0.9227, 0.38552 - 0x3fed7d0b02b8ecf9, 0x3fd8daa52ec8a4af, // 0.92151, 0.38835 - 0x3fed733f508c0dff, 0x3fd908ef81ef7bd1, // 0.92032, 0.39117 - 0x3fed696173c9e68b, 0x3fd9372a63bc93d7, // 0.91911, 0.39399 - 0x3fed5f7172888a7f, 0x3fd96555b7ab948f, // 0.9179, 0.39681 - 0x3fed556f52e93eb1, 0x3fd993716141bdfe, // 0.91668, 0.39962 - 0x3fed4b5b1b187524, 0x3fd9c17d440df9f2, // 0.91545, 0.40243 - 0x3fed4134d14dc93a, 0x3fd9ef7943a8ed8a, // 0.91421, 0.40524 - 0x3fed36fc7bcbfbdc, 0x3fda1d6543b50ac0, // 0.91296, 0.40804 - 0x3fed2cb220e0ef9f, 0x3fda4b4127dea1e4, // 0.91171, 0.41084 - 0x3fed2255c6e5a4e1, 0x3fda790cd3dbf31a, // 0.91044, 0.41364 - 0x3fed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // 0.90917, 0.41643 - 0x3fed0d672f59d2b9, 0x3fdad473125cdc08, // 0.90789, 0.41922 - 0x3fed02d4feb2bd92, 0x3fdb020d6c7f4009, // 0.9066, 0.422 - 0x3fecf830e8ce467b, 0x3fdb2f971db31972, // 0.9053, 0.42478 - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756 - 0x3fece2b32799a060, 0x3fdb8a7814fd5693, // 0.90267, 0.43033 - 0x3fecd7d9898b32f6, 0x3fdbb7cf2304bd01, // 0.90135, 0.43309 - 0x3fecccee20c2de9f, 0x3fdbe51517ffc0d9, // 0.90002, 0.43586 - 0x3fecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // 0.89867, 0.43862 - 0x3fecb6e20a00da99, 0x3fdc3f6d47263129, // 0.89732, 0.44137 - 0x3fecabc169a0b901, 0x3fdc6c7f4997000a, // 0.89597, 0.44412 - 0x3feca08f19b9c449, 0x3fdc997fc3865388, // 0.8946, 0.44687 - 0x3fec954b213411f5, 0x3fdcc66e9931c45d, // 0.89322, 0.44961 - 0x3fec89f587029c13, 0x3fdcf34baee1cd21, // 0.89184, 0.45235 - 0x3fec7e8e52233cf3, 0x3fdd2016e8e9db5b, // 0.89045, 0.45508 - 0x3fec7315899eaad7, 0x3fdd4cd02ba8609c, // 0.88905, 0.45781 - 0x3fec678b3488739b, 0x3fdd79775b86e389, // 0.88764, 0.46054 - 0x3fec5bef59fef85a, 0x3fdda60c5cfa10d8, // 0.88622, 0.46326 - 0x3fec5042012b6907, 0x3fddd28f1481cc58, // 0.8848, 0.46598 - 0x3fec44833141c004, 0x3fddfeff66a941de, // 0.88336, 0.46869 - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714 - 0x3fec2cd14931e3f1, 0x3fde57a86d3cd824, // 0.88047, 0.4741 - 0x3fec20de3fa971b0, 0x3fde83e0eaf85113, // 0.87901, 0.4768 - 0x3fec14d9dc465e58, 0x3fdeb00695f25620, // 0.87755, 0.47949 - 0x3fec08c426725549, 0x3fdedc1952ef78d5, // 0.87607, 0.48218 - 0x3febfc9d25a1b147, 0x3fdf081906bff7fd, // 0.87459, 0.48487 - 0x3febf064e15377dd, 0x3fdf3405963fd068, // 0.87309, 0.48755 - 0x3febe41b611154c1, 0x3fdf5fdee656cda3, // 0.8716, 0.49023 - 0x3febd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // 0.87009, 0.4929 - 0x3febcb54cb0d2327, 0x3fdfb7575c24d2de, // 0.86857, 0.49557 - 0x3febbed7c49380ea, 0x3fdfe2f64be7120f, // 0.86705, 0.49823 - 0x3febb249a0b6c40d, 0x3fe00740c82b82e0, // 0.86551, 0.50089 - 0x3feba5aa673590d2, 0x3fe01cfc874c3eb7, // 0.86397, 0.50354 - 0x3feb98fa1fd9155e, 0x3fe032ae55edbd95, // 0.86242, 0.50619 - 0x3feb8c38d27504e9, 0x3fe0485626ae221a, // 0.86087, 0.50883 - 0x3feb7f6686e792ea, 0x3fe05df3ec31b8b6, // 0.8593, 0.51147 - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141 - 0x3feb658f14fdbc47, 0x3fe089112032b08c, // 0.85615, 0.51673 - 0x3feb5889fe921405, 0x3fe09e907417c5e1, // 0.85456, 0.51936 - 0x3feb4b7409de7925, 0x3fe0b405878f85ec, // 0.85296, 0.52198 - 0x3feb3e4d3ef55712, 0x3fe0c9704d5d898f, // 0.85136, 0.52459 - 0x3feb3115a5f37bf4, 0x3fe0ded0b84bc4b5, // 0.84974, 0.5272 - 0x3feb23cd470013b4, 0x3fe0f426bb2a8e7d, // 0.84812, 0.5298 - 0x3feb16742a4ca2f5, 0x3fe1097248d0a956, // 0.84649, 0.5324 - 0x3feb090a58150200, 0x3fe11eb3541b4b22, // 0.84485, 0.535 - 0x3feafb8fd89f57b6, 0x3fe133e9cfee254e, // 0.84321, 0.53759 - 0x3feaee04b43c1474, 0x3fe14915af336ceb, // 0.84155, 0.54017 - 0x3feae068f345ecef, 0x3fe15e36e4dbe2bc, // 0.83989, 0.54275 - 0x3fead2bc9e21d511, 0x3fe1734d63dedb49, // 0.83822, 0.54532 - 0x3feac4ffbd3efac8, 0x3fe188591f3a46e5, // 0.83655, 0.54789 - 0x3feab7325916c0d4, 0x3fe19d5a09f2b9b8, // 0.83486, 0.55046 - 0x3feaa9547a2cb98e, 0x3fe1b250171373be, // 0.83317, 0.55302 - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557 - 0x3fea8d676e545ad2, 0x3fe1dc1b64dc4872, // 0.82976, 0.55812 - 0x3fea7f58529fe69d, 0x3fe1f0f08bbc861b, // 0.82805, 0.56066 - 0x3fea7138de9d60f5, 0x3fe205baa17560d6, // 0.82632, 0.5632 - 0x3fea63091b02fae2, 0x3fe21a799933eb58, // 0.82459, 0.56573 - 0x3fea54c91090f524, 0x3fe22f2d662c13e1, // 0.82285, 0.56826 - 0x3fea4678c8119ac8, 0x3fe243d5fb98ac1f, // 0.8211, 0.57078 - 0x3fea38184a593bc6, 0x3fe258734cbb7110, // 0.81935, 0.5733 - 0x3fea29a7a0462782, 0x3fe26d054cdd12df, // 0.81758, 0.57581 - 0x3fea1b26d2c0a75e, 0x3fe2818bef4d3cba, // 0.81581, 0.57831 - 0x3fea0c95eabaf937, 0x3fe2960727629ca8, // 0.81404, 0.58081 - 0x3fe9fdf4f13149de, 0x3fe2aa76e87aeb58, // 0.81225, 0.58331 - 0x3fe9ef43ef29af94, 0x3fe2bedb25faf3ea, // 0.81046, 0.5858 - 0x3fe9e082edb42472, 0x3fe2d333d34e9bb7, // 0.80866, 0.58828 - 0x3fe9d1b1f5ea80d6, 0x3fe2e780e3e8ea16, // 0.80685, 0.59076 - 0x3fe9c2d110f075c3, 0x3fe2fbc24b441015, // 0.80503, 0.59323 - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957 - 0x3fe9a4dfa42b06b2, 0x3fe32421ec49a620, // 0.80138, 0.59816 - 0x3fe995cf2ed80d22, 0x3fe338400d0c8e57, // 0.79954, 0.60062 - 0x3fe986aef1457594, 0x3fe34c5252c14de1, // 0.79769, 0.60307 - 0x3fe9777ef4c7d742, 0x3fe36058b10659f3, // 0.79584, 0.60551 - 0x3fe9683f42bd7fe1, 0x3fe374531b817f8d, // 0.79398, 0.60795 - 0x3fe958efe48e6dd7, 0x3fe3884185dfeb22, // 0.79211, 0.61038 - 0x3fe94990e3ac4a6c, 0x3fe39c23e3d63029, // 0.79023, 0.61281 - 0x3fe93a22499263fc, 0x3fe3affa292050b9, // 0.78835, 0.61523 - 0x3fe92aa41fc5a815, 0x3fe3c3c44981c517, // 0.78646, 0.61765 - 0x3fe91b166fd49da2, 0x3fe3d78238c58343, // 0.78456, 0.62006 - 0x3fe90b7943575efe, 0x3fe3eb33eabe0680, // 0.78265, 0.62246 - 0x3fe8fbcca3ef940d, 0x3fe3fed9534556d4, // 0.78074, 0.62486 - 0x3fe8ec109b486c49, 0x3fe41272663d108c, // 0.77882, 0.62725 - 0x3fe8dc45331698cc, 0x3fe425ff178e6bb1, // 0.77689, 0.62964 - 0x3fe8cc6a75184655, 0x3fe4397f5b2a4380, // 0.77495, 0.63202 - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439 - 0x3fe8ac871ede1d88, 0x3fe4605a692b32a2, // 0.77106, 0.63676 - 0x3fe89c7e9a4dd4ab, 0x3fe473b51b987347, // 0.7691, 0.63912 - 0x3fe88c66e7481ba1, 0x3fe48703306091fe, // 0.76714, 0.64148 - 0x3fe87c400fba2ebf, 0x3fe49a449b9b0938, // 0.76517, 0.64383 - 0x3fe86c0a1d9aa195, 0x3fe4ad79516722f0, // 0.76319, 0.64618 - 0x3fe85bc51ae958cc, 0x3fe4c0a145ec0004, // 0.7612, 0.64851 - 0x3fe84b7111af83f9, 0x3fe4d3bc6d589f80, // 0.75921, 0.65085 - 0x3fe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // 0.75721, 0.65317 - 0x3fe82a9c13f545ff, 0x3fe4f9cc25cca486, // 0.7552, 0.65549 - 0x3fe81a1b33b57acc, 0x3fe50cc09f59a09b, // 0.75319, 0.65781 - 0x3fe8098b756e52fa, 0x3fe51fa81cd99aa6, // 0.75117, 0.66011 - 0x3fe7f8ece3571771, 0x3fe5328292a35596, // 0.74914, 0.66242 - 0x3fe7e83f87b03686, 0x3fe5454ff5159dfb, // 0.7471, 0.66471 - 0x3fe7d7836cc33db2, 0x3fe5581038975137, // 0.74506, 0.667 - 0x3fe7c6b89ce2d333, 0x3fe56ac35197649e, // 0.74301, 0.66928 - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156 - 0x3fe7a4f707bf97d2, 0x3fe59001d5f723df, // 0.73889, 0.67383 - 0x3fe79400574f55e4, 0x3fe5a28d2a5d7250, // 0.73682, 0.67609 - 0x3fe782fb1b90b35b, 0x3fe5b50b264f7448, // 0.73474, 0.67835 - 0x3fe771e75f037261, 0x3fe5c77bbe65018c, // 0.73265, 0.6806 - 0x3fe760c52c304764, 0x3fe5d9dee73e345c, // 0.73056, 0.68285 - 0x3fe74f948da8d28d, 0x3fe5ec3495837074, // 0.72846, 0.68508 - 0x3fe73e558e079942, 0x3fe5fe7cbde56a0f, // 0.72636, 0.68732 - 0x3fe72d0837efff97, 0x3fe610b7551d2cde, // 0.72425, 0.68954 - 0x3fe71bac960e41bf, 0x3fe622e44fec22ff, // 0.72213, 0.69176 - 0x3fe70a42b3176d7a, 0x3fe63503a31c1be8, // 0.72, 0.69397 - 0x3fe6f8ca99c95b75, 0x3fe64715437f535b, // 0.71787, 0.69618 - 0x3fe6e74454eaa8ae, 0x3fe6591925f0783e, // 0.71573, 0.69838 - 0x3fe6d5afef4aafcc, 0x3fe66b0f3f52b386, // 0.71358, 0.70057 - 0x3fe6c40d73c18275, 0x3fe67cf78491af10, // 0.71143, 0.70275 - 0x3fe6b25ced2fe29c, 0x3fe68ed1eaa19c71, // 0.70927, 0.70493 - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711 - 0x3fe68ed1eaa19c71, 0x3fe6b25ced2fe29c, // 0.70493, 0.70927 - 0x3fe67cf78491af10, 0x3fe6c40d73c18275, // 0.70275, 0.71143 - 0x3fe66b0f3f52b386, 0x3fe6d5afef4aafcc, // 0.70057, 0.71358 - 0x3fe6591925f0783e, 0x3fe6e74454eaa8ae, // 0.69838, 0.71573 - 0x3fe64715437f535b, 0x3fe6f8ca99c95b75, // 0.69618, 0.71787 - 0x3fe63503a31c1be8, 0x3fe70a42b3176d7a, // 0.69397, 0.72 - 0x3fe622e44fec22ff, 0x3fe71bac960e41bf, // 0.69176, 0.72213 - 0x3fe610b7551d2cde, 0x3fe72d0837efff97, // 0.68954, 0.72425 - 0x3fe5fe7cbde56a0f, 0x3fe73e558e079942, // 0.68732, 0.72636 - 0x3fe5ec3495837074, 0x3fe74f948da8d28d, // 0.68508, 0.72846 - 0x3fe5d9dee73e345c, 0x3fe760c52c304764, // 0.68285, 0.73056 - 0x3fe5c77bbe65018c, 0x3fe771e75f037261, // 0.6806, 0.73265 - 0x3fe5b50b264f7448, 0x3fe782fb1b90b35b, // 0.67835, 0.73474 - 0x3fe5a28d2a5d7250, 0x3fe79400574f55e4, // 0.67609, 0.73682 - 0x3fe59001d5f723df, 0x3fe7a4f707bf97d2, // 0.67383, 0.73889 - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095 - 0x3fe56ac35197649e, 0x3fe7c6b89ce2d333, // 0.66928, 0.74301 - 0x3fe5581038975137, 0x3fe7d7836cc33db2, // 0.667, 0.74506 - 0x3fe5454ff5159dfb, 0x3fe7e83f87b03686, // 0.66471, 0.7471 - 0x3fe5328292a35596, 0x3fe7f8ece3571771, // 0.66242, 0.74914 - 0x3fe51fa81cd99aa6, 0x3fe8098b756e52fa, // 0.66011, 0.75117 - 0x3fe50cc09f59a09b, 0x3fe81a1b33b57acc, // 0.65781, 0.75319 - 0x3fe4f9cc25cca486, 0x3fe82a9c13f545ff, // 0.65549, 0.7552 - 0x3fe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // 0.65317, 0.75721 - 0x3fe4d3bc6d589f80, 0x3fe84b7111af83f9, // 0.65085, 0.75921 - 0x3fe4c0a145ec0004, 0x3fe85bc51ae958cc, // 0.64851, 0.7612 - 0x3fe4ad79516722f0, 0x3fe86c0a1d9aa195, // 0.64618, 0.76319 - 0x3fe49a449b9b0938, 0x3fe87c400fba2ebf, // 0.64383, 0.76517 - 0x3fe48703306091fe, 0x3fe88c66e7481ba1, // 0.64148, 0.76714 - 0x3fe473b51b987347, 0x3fe89c7e9a4dd4ab, // 0.63912, 0.7691 - 0x3fe4605a692b32a2, 0x3fe8ac871ede1d88, // 0.63676, 0.77106 - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301 - 0x3fe4397f5b2a4380, 0x3fe8cc6a75184655, // 0.63202, 0.77495 - 0x3fe425ff178e6bb1, 0x3fe8dc45331698cc, // 0.62964, 0.77689 - 0x3fe41272663d108c, 0x3fe8ec109b486c49, // 0.62725, 0.77882 - 0x3fe3fed9534556d4, 0x3fe8fbcca3ef940d, // 0.62486, 0.78074 - 0x3fe3eb33eabe0680, 0x3fe90b7943575efe, // 0.62246, 0.78265 - 0x3fe3d78238c58343, 0x3fe91b166fd49da2, // 0.62006, 0.78456 - 0x3fe3c3c44981c517, 0x3fe92aa41fc5a815, // 0.61765, 0.78646 - 0x3fe3affa292050b9, 0x3fe93a22499263fc, // 0.61523, 0.78835 - 0x3fe39c23e3d63029, 0x3fe94990e3ac4a6c, // 0.61281, 0.79023 - 0x3fe3884185dfeb22, 0x3fe958efe48e6dd7, // 0.61038, 0.79211 - 0x3fe374531b817f8d, 0x3fe9683f42bd7fe1, // 0.60795, 0.79398 - 0x3fe36058b10659f3, 0x3fe9777ef4c7d742, // 0.60551, 0.79584 - 0x3fe34c5252c14de1, 0x3fe986aef1457594, // 0.60307, 0.79769 - 0x3fe338400d0c8e57, 0x3fe995cf2ed80d22, // 0.60062, 0.79954 - 0x3fe32421ec49a620, 0x3fe9a4dfa42b06b2, // 0.59816, 0.80138 - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321 - 0x3fe2fbc24b441015, 0x3fe9c2d110f075c3, // 0.59323, 0.80503 - 0x3fe2e780e3e8ea16, 0x3fe9d1b1f5ea80d6, // 0.59076, 0.80685 - 0x3fe2d333d34e9bb7, 0x3fe9e082edb42472, // 0.58828, 0.80866 - 0x3fe2bedb25faf3ea, 0x3fe9ef43ef29af94, // 0.5858, 0.81046 - 0x3fe2aa76e87aeb58, 0x3fe9fdf4f13149de, // 0.58331, 0.81225 - 0x3fe2960727629ca8, 0x3fea0c95eabaf937, // 0.58081, 0.81404 - 0x3fe2818bef4d3cba, 0x3fea1b26d2c0a75e, // 0.57831, 0.81581 - 0x3fe26d054cdd12df, 0x3fea29a7a0462782, // 0.57581, 0.81758 - 0x3fe258734cbb7110, 0x3fea38184a593bc6, // 0.5733, 0.81935 - 0x3fe243d5fb98ac1f, 0x3fea4678c8119ac8, // 0.57078, 0.8211 - 0x3fe22f2d662c13e1, 0x3fea54c91090f524, // 0.56826, 0.82285 - 0x3fe21a799933eb58, 0x3fea63091b02fae2, // 0.56573, 0.82459 - 0x3fe205baa17560d6, 0x3fea7138de9d60f5, // 0.5632, 0.82632 - 0x3fe1f0f08bbc861b, 0x3fea7f58529fe69d, // 0.56066, 0.82805 - 0x3fe1dc1b64dc4872, 0x3fea8d676e545ad2, // 0.55812, 0.82976 - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147 - 0x3fe1b250171373be, 0x3feaa9547a2cb98e, // 0.55302, 0.83317 - 0x3fe19d5a09f2b9b8, 0x3feab7325916c0d4, // 0.55046, 0.83486 - 0x3fe188591f3a46e5, 0x3feac4ffbd3efac8, // 0.54789, 0.83655 - 0x3fe1734d63dedb49, 0x3fead2bc9e21d511, // 0.54532, 0.83822 - 0x3fe15e36e4dbe2bc, 0x3feae068f345ecef, // 0.54275, 0.83989 - 0x3fe14915af336ceb, 0x3feaee04b43c1474, // 0.54017, 0.84155 - 0x3fe133e9cfee254e, 0x3feafb8fd89f57b6, // 0.53759, 0.84321 - 0x3fe11eb3541b4b22, 0x3feb090a58150200, // 0.535, 0.84485 - 0x3fe1097248d0a956, 0x3feb16742a4ca2f5, // 0.5324, 0.84649 - 0x3fe0f426bb2a8e7d, 0x3feb23cd470013b4, // 0.5298, 0.84812 - 0x3fe0ded0b84bc4b5, 0x3feb3115a5f37bf4, // 0.5272, 0.84974 - 0x3fe0c9704d5d898f, 0x3feb3e4d3ef55712, // 0.52459, 0.85136 - 0x3fe0b405878f85ec, 0x3feb4b7409de7925, // 0.52198, 0.85296 - 0x3fe09e907417c5e1, 0x3feb5889fe921405, // 0.51936, 0.85456 - 0x3fe089112032b08c, 0x3feb658f14fdbc47, // 0.51673, 0.85615 - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773 - 0x3fe05df3ec31b8b6, 0x3feb7f6686e792ea, // 0.51147, 0.8593 - 0x3fe0485626ae221a, 0x3feb8c38d27504e9, // 0.50883, 0.86087 - 0x3fe032ae55edbd95, 0x3feb98fa1fd9155e, // 0.50619, 0.86242 - 0x3fe01cfc874c3eb7, 0x3feba5aa673590d2, // 0.50354, 0.86397 - 0x3fe00740c82b82e0, 0x3febb249a0b6c40d, // 0.50089, 0.86551 - 0x3fdfe2f64be7120f, 0x3febbed7c49380ea, // 0.49823, 0.86705 - 0x3fdfb7575c24d2de, 0x3febcb54cb0d2327, // 0.49557, 0.86857 - 0x3fdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // 0.4929, 0.87009 - 0x3fdf5fdee656cda3, 0x3febe41b611154c1, // 0.49023, 0.8716 - 0x3fdf3405963fd068, 0x3febf064e15377dd, // 0.48755, 0.87309 - 0x3fdf081906bff7fd, 0x3febfc9d25a1b147, // 0.48487, 0.87459 - 0x3fdedc1952ef78d5, 0x3fec08c426725549, // 0.48218, 0.87607 - 0x3fdeb00695f25620, 0x3fec14d9dc465e58, // 0.47949, 0.87755 - 0x3fde83e0eaf85113, 0x3fec20de3fa971b0, // 0.4768, 0.87901 - 0x3fde57a86d3cd824, 0x3fec2cd14931e3f1, // 0.4741, 0.88047 - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192 - 0x3fddfeff66a941de, 0x3fec44833141c004, // 0.46869, 0.88336 - 0x3fddd28f1481cc58, 0x3fec5042012b6907, // 0.46598, 0.8848 - 0x3fdda60c5cfa10d8, 0x3fec5bef59fef85a, // 0.46326, 0.88622 - 0x3fdd79775b86e389, 0x3fec678b3488739b, // 0.46054, 0.88764 - 0x3fdd4cd02ba8609c, 0x3fec7315899eaad7, // 0.45781, 0.88905 - 0x3fdd2016e8e9db5b, 0x3fec7e8e52233cf3, // 0.45508, 0.89045 - 0x3fdcf34baee1cd21, 0x3fec89f587029c13, // 0.45235, 0.89184 - 0x3fdcc66e9931c45d, 0x3fec954b213411f5, // 0.44961, 0.89322 - 0x3fdc997fc3865388, 0x3feca08f19b9c449, // 0.44687, 0.8946 - 0x3fdc6c7f4997000a, 0x3fecabc169a0b901, // 0.44412, 0.89597 - 0x3fdc3f6d47263129, 0x3fecb6e20a00da99, // 0.44137, 0.89732 - 0x3fdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // 0.43862, 0.89867 - 0x3fdbe51517ffc0d9, 0x3fecccee20c2de9f, // 0.43586, 0.90002 - 0x3fdbb7cf2304bd01, 0x3fecd7d9898b32f6, // 0.43309, 0.90135 - 0x3fdb8a7814fd5693, 0x3fece2b32799a060, // 0.43033, 0.90267 - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399 - 0x3fdb2f971db31972, 0x3fecf830e8ce467b, // 0.42478, 0.9053 - 0x3fdb020d6c7f4009, 0x3fed02d4feb2bd92, // 0.422, 0.9066 - 0x3fdad473125cdc08, 0x3fed0d672f59d2b9, // 0.41922, 0.90789 - 0x3fdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // 0.41643, 0.90917 - 0x3fda790cd3dbf31a, 0x3fed2255c6e5a4e1, // 0.41364, 0.91044 - 0x3fda4b4127dea1e4, 0x3fed2cb220e0ef9f, // 0.41084, 0.91171 - 0x3fda1d6543b50ac0, 0x3fed36fc7bcbfbdc, // 0.40804, 0.91296 - 0x3fd9ef7943a8ed8a, 0x3fed4134d14dc93a, // 0.40524, 0.91421 - 0x3fd9c17d440df9f2, 0x3fed4b5b1b187524, // 0.40243, 0.91545 - 0x3fd993716141bdfe, 0x3fed556f52e93eb1, // 0.39962, 0.91668 - 0x3fd96555b7ab948f, 0x3fed5f7172888a7f, // 0.39681, 0.9179 - 0x3fd9372a63bc93d7, 0x3fed696173c9e68b, // 0.39399, 0.91911 - 0x3fd908ef81ef7bd1, 0x3fed733f508c0dff, // 0.39117, 0.92032 - 0x3fd8daa52ec8a4af, 0x3fed7d0b02b8ecf9, // 0.38835, 0.92151 - 0x3fd8ac4b86d5ed44, 0x3fed86c48445a450, // 0.38552, 0.9227 - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388 - 0x3fd84f6aaaf3903f, 0x3fed9a00dd8b3d46, // 0.37985, 0.92505 - 0x3fd820e3b04eaac4, 0x3feda383a9668988, // 0.37701, 0.92621 - 0x3fd7f24dd37341e3, 0x3fedacf42ce68ab9, // 0.37416, 0.92736 - 0x3fd7c3a9311dcce7, 0x3fedb6526238a09b, // 0.37132, 0.92851 - 0x3fd794f5e613dfae, 0x3fedbf9e4395759a, // 0.36847, 0.92964 - 0x3fd766340f2418f6, 0x3fedc8d7cb410260, // 0.36561, 0.93077 - 0x3fd73763c9261092, 0x3fedd1fef38a915a, // 0.36276, 0.93188 - 0x3fd7088530fa459e, 0x3feddb13b6ccc23d, // 0.3599, 0.93299 - 0x3fd6d998638a0cb5, 0x3fede4160f6d8d81, // 0.35703, 0.93409 - 0x3fd6aa9d7dc77e16, 0x3feded05f7de47da, // 0.35416, 0.93518 - 0x3fd67b949cad63ca, 0x3fedf5e36a9ba59c, // 0.35129, 0.93627 - 0x3fd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // 0.34842, 0.93734 - 0x3fd61d595c88c203, 0x3fee0766d9280f54, // 0.34554, 0.9384 - 0x3fd5ee27379ea693, 0x3fee100cca2980ac, // 0.34266, 0.93946 - 0x3fd5bee78b9db3b6, 0x3fee18a02fdc66d9, // 0.33978, 0.94051 - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154 - 0x3fd5604012f467b4, 0x3fee298f4439197a, // 0.334, 0.94257 - 0x3fd530d880af3c24, 0x3fee31eae870ce25, // 0.33111, 0.94359 - 0x3fd50163dc197047, 0x3fee3a33ec75ce85, // 0.32821, 0.9446 - 0x3fd4d1e24278e76a, 0x3fee426a4b2bc17e, // 0.32531, 0.94561 - 0x3fd4a253d11b82f3, 0x3fee4a8dff81ce5e, // 0.32241, 0.9466 - 0x3fd472b8a5571054, 0x3fee529f04729ffc, // 0.3195, 0.94759 - 0x3fd44310dc8936f0, 0x3fee5a9d550467d3, // 0.31659, 0.94856 - 0x3fd4135c94176602, 0x3fee6288ec48e112, // 0.31368, 0.94953 - 0x3fd3e39be96ec271, 0x3fee6a61c55d53a7, // 0.31077, 0.95049 - 0x3fd3b3cefa0414b7, 0x3fee7227db6a9744, // 0.30785, 0.95144 - 0x3fd383f5e353b6aa, 0x3fee79db29a5165a, // 0.30493, 0.95238 - 0x3fd35410c2e18152, 0x3fee817bab4cd10d, // 0.30201, 0.95331 - 0x3fd3241fb638baaf, 0x3fee89095bad6025, // 0.29908, 0.95423 - 0x3fd2f422daec0386, 0x3fee9084361df7f3, // 0.29615, 0.95514 - 0x3fd2c41a4e954520, 0x3fee97ec36016b30, // 0.29322, 0.95605 - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694 - 0x3fd263e6995554ba, 0x3feea68393e65800, // 0.28735, 0.95783 - 0x3fd233bbabc3bb72, 0x3feeadb2e8e7a88e, // 0.28441, 0.9587 - 0x3fd2038583d727bd, 0x3feeb4cf515b8811, // 0.28146, 0.95957 - 0x3fd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // 0.27852, 0.96043 - 0x3fd1a2f7fbe8f243, 0x3feec2cf4b1af6b2, // 0.27557, 0.96128 - 0x3fd172a0d7765177, 0x3feec9b2d3c3bf84, // 0.27262, 0.96212 - 0x3fd1423eefc69378, 0x3feed0835e999009, // 0.26967, 0.96295 - 0x3fd111d262b1f677, 0x3feed740e7684963, // 0.26671, 0.96378 - 0x3fd0e15b4e1749cd, 0x3feeddeb6a078651, // 0.26375, 0.96459 - 0x3fd0b0d9cfdbdb90, 0x3feee482e25a9dbc, // 0.26079, 0.96539 - 0x3fd0804e05eb661e, 0x3feeeb074c50a544, // 0.25783, 0.96619 - 0x3fd04fb80e37fdae, 0x3feef178a3e473c2, // 0.25487, 0.96698 - 0x3fd01f1806b9fdd2, 0x3feef7d6e51ca3c0, // 0.2519, 0.96775 - 0x3fcfdcdc1adfedf8, 0x3feefe220c0b95ec, // 0.24893, 0.96852 - 0x3fcf7b7480bd3801, 0x3fef045a14cf738c, // 0.24596, 0.96928 - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003 - 0x3fceb86b462de348, 0x3fef1090bc898f5f, // 0.24, 0.97077 - 0x3fce56ca1e101a1b, 0x3fef168f53f7205d, // 0.23702, 0.9715 - 0x3fcdf5163f01099a, 0x3fef1c7abe284708, // 0.23404, 0.97223 - 0x3fcd934fe5454311, 0x3fef2252f7763ada, // 0.23106, 0.97294 - 0x3fcd31774d2cbdee, 0x3fef2817fc4609ce, // 0.22807, 0.97364 - 0x3fcccf8cb312b286, 0x3fef2dc9c9089a9d, // 0.22508, 0.97434 - 0x3fcc6d90535d74dc, 0x3fef33685a3aaef0, // 0.22209, 0.97503 - 0x3fcc0b826a7e4f63, 0x3fef38f3ac64e589, // 0.2191, 0.9757 - 0x3fcba96334f15dad, 0x3fef3e6bbc1bbc65, // 0.21611, 0.97637 - 0x3fcb4732ef3d6722, 0x3fef43d085ff92dd, // 0.21311, 0.97703 - 0x3fcae4f1d5f3b9ab, 0x3fef492206bcabb4, // 0.21011, 0.97768 - 0x3fca82a025b00451, 0x3fef4e603b0b2f2d, // 0.20711, 0.97832 - 0x3fca203e1b1831da, 0x3fef538b1faf2d07, // 0.20411, 0.97895 - 0x3fc9bdcbf2dc4366, 0x3fef58a2b1789e84, // 0.2011, 0.97957 - 0x3fc95b49e9b62af9, 0x3fef5da6ed43685d, // 0.1981, 0.98018 - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079 - 0x3fc8961727c41804, 0x3fef677556883cee, // 0.19208, 0.98138 - 0x3fc83366e89c64c5, 0x3fef6c3f7df5bbb7, // 0.18907, 0.98196 - 0x3fc7d0a7bbd2cb1b, 0x3fef70f6434b7eb7, // 0.18606, 0.98254 - 0x3fc76dd9de50bf31, 0x3fef7599a3a12077, // 0.18304, 0.98311 - 0x3fc70afd8d08c4ff, 0x3fef7a299c1a322a, // 0.18002, 0.98366 - 0x3fc6a81304f64ab2, 0x3fef7ea629e63d6e, // 0.177, 0.98421 - 0x3fc6451a831d830d, 0x3fef830f4a40c60c, // 0.17398, 0.98475 - 0x3fc5e214448b3fc6, 0x3fef8764fa714ba9, // 0.17096, 0.98528 - 0x3fc57f008654cbde, 0x3fef8ba737cb4b78, // 0.16794, 0.9858 - 0x3fc51bdf8597c5f2, 0x3fef8fd5ffae41db, // 0.16491, 0.98631 - 0x3fc4b8b17f79fa88, 0x3fef93f14f85ac08, // 0.16189, 0.98681 - 0x3fc45576b1293e5a, 0x3fef97f924c9099b, // 0.15886, 0.9873 - 0x3fc3f22f57db4893, 0x3fef9bed7cfbde29, // 0.15583, 0.98778 - 0x3fc38edbb0cd8d14, 0x3fef9fce55adb2c8, // 0.1528, 0.98826 - 0x3fc32b7bf94516a7, 0x3fefa39bac7a1791, // 0.14976, 0.98872 - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918 - 0x3fc264994dfd340a, 0x3fefaafbcb0cfddc, // 0.1437, 0.98962 - 0x3fc20116d4ec7bce, 0x3fefae8e8e46cfbb, // 0.14066, 0.99006 - 0x3fc19d8940be24e7, 0x3fefb20dc681d54d, // 0.13762, 0.99049 - 0x3fc139f0cedaf576, 0x3fefb5797195d741, // 0.13458, 0.9909 - 0x3fc0d64dbcb26786, 0x3fefb8d18d66adb7, // 0.13154, 0.99131 - 0x3fc072a047ba831d, 0x3fefbc1617e44186, // 0.1285, 0.99171 - 0x3fc00ee8ad6fb85b, 0x3fefbf470f0a8d88, // 0.12545, 0.9921 - 0x3fbf564e56a9730e, 0x3fefc26470e19fd3, // 0.12241, 0.99248 - 0x3fbe8eb7fde4aa3e, 0x3fefc56e3b7d9af6, // 0.11937, 0.99285 - 0x3fbdc70ecbae9fc8, 0x3fefc8646cfeb721, // 0.11632, 0.99321 - 0x3fbcff533b307dc1, 0x3fefcb4703914354, // 0.11327, 0.99356 - 0x3fbc3785c79ec2d5, 0x3fefce15fd6da67b, // 0.11022, 0.99391 - 0x3fbb6fa6ec38f64c, 0x3fefd0d158d86087, // 0.10717, 0.99424 - 0x3fbaa7b724495c04, 0x3fefd37914220b84, // 0.10412, 0.99456 - 0x3fb9dfb6eb24a85c, 0x3fefd60d2da75c9e, // 0.10107, 0.99488 - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, // 0.098017, 0.99518 - 0x3fb84f8712c130a0, 0x3fefdafa7514538c, // 0.094963, 0.99548 - 0x3fb787586a5d5b21, 0x3fefdd539ff1f456, // 0.091909, 0.99577 - 0x3fb6bf1b3e79b129, 0x3fefdf9922f73307, // 0.088854, 0.99604 - 0x3fb5f6d00a9aa419, 0x3fefe1cafcbd5b09, // 0.085797, 0.99631 - 0x3fb52e774a4d4d0a, 0x3fefe3e92be9d886, // 0.08274, 0.99657 - 0x3fb4661179272096, 0x3fefe5f3af2e3940, // 0.079682, 0.99682 - 0x3fb39d9f12c5a299, 0x3fefe7ea85482d60, // 0.076624, 0.99706 - 0x3fb2d52092ce19f6, 0x3fefe9cdad01883a, // 0.073565, 0.99729 - 0x3fb20c9674ed444c, 0x3fefeb9d2530410f, // 0.070505, 0.99751 - 0x3fb1440134d709b2, 0x3fefed58ecb673c4, // 0.067444, 0.99772 - 0x3fb07b614e463064, 0x3fefef0102826191, // 0.064383, 0.99793 - 0x3faf656e79f820e0, 0x3feff095658e71ad, // 0.061321, 0.99812 - 0x3fadd406f9808ec8, 0x3feff21614e131ed, // 0.058258, 0.9983 - 0x3fac428d12c0d7e3, 0x3feff3830f8d575c, // 0.055195, 0.99848 - 0x3faab101bd5f8317, 0x3feff4dc54b1bed3, // 0.052132, 0.99864 - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, // 0.049068, 0.9988 - 0x3fa78dbaa5874685, 0x3feff753bb1b9164, // 0.046003, 0.99894 - 0x3fa5fc00d290cd43, 0x3feff871dadb81df, // 0.042938, 0.99908 - 0x3fa46a396ff86179, 0x3feff97c4208c014, // 0.039873, 0.9992 - 0x3fa2d865759455cd, 0x3feffa72effef75d, // 0.036807, 0.99932 - 0x3fa14685db42c17e, 0x3feffb55e425fdae, // 0.033741, 0.99943 - 0x3f9f693731d1cf01, 0x3feffc251df1d3f8, // 0.030675, 0.99953 - 0x3f9c454f4ce53b1c, 0x3feffce09ce2a679, // 0.027608, 0.99962 - 0x3f992155f7a3667e, 0x3feffd886084cd0d, // 0.024541, 0.9997 - 0x3f95fd4d21fab226, 0x3feffe1c6870cb77, // 0.021474, 0.99977 - 0x3f92d936bbe30efd, 0x3feffe9cb44b51a1, // 0.018407, 0.99983 - 0x3f8f6a296ab997ca, 0x3fefff0943c53bd1, // 0.015339, 0.99988 - 0x3f8921d1fcdec784, 0x3fefff62169b92db, // 0.012272, 0.99992 - 0x3f82d96b0e509703, 0x3fefffa72c978c4f, // 0.0092038, 0.99996 - 0x3f7921f0fe670071, 0x3fefffd8858e8a92, // 0.0061359, 0.99998 - 0x3f6921f8becca4ba, 0x3feffff621621d02, // 0.003068, 1 - 0x0000000000000000, 0x3ff0000000000000, // 0, 1 - 0xbf6921f8becca4ba, 0x3feffff621621d02, // -0.003068, 1 - 0xbf7921f0fe670071, 0x3fefffd8858e8a92, //-0.0061359, 0.99998 - 0xbf82d96b0e509703, 0x3fefffa72c978c4f, //-0.0092038, 0.99996 - 0xbf8921d1fcdec784, 0x3fefff62169b92db, // -0.012272, 0.99992 - 0xbf8f6a296ab997ca, 0x3fefff0943c53bd1, // -0.015339, 0.99988 - 0xbf92d936bbe30efd, 0x3feffe9cb44b51a1, // -0.018407, 0.99983 - 0xbf95fd4d21fab226, 0x3feffe1c6870cb77, // -0.021474, 0.99977 - 0xbf992155f7a3667e, 0x3feffd886084cd0d, // -0.024541, 0.9997 - 0xbf9c454f4ce53b1c, 0x3feffce09ce2a679, // -0.027608, 0.99962 - 0xbf9f693731d1cf01, 0x3feffc251df1d3f8, // -0.030675, 0.99953 - 0xbfa14685db42c17e, 0x3feffb55e425fdae, // -0.033741, 0.99943 - 0xbfa2d865759455cd, 0x3feffa72effef75d, // -0.036807, 0.99932 - 0xbfa46a396ff86179, 0x3feff97c4208c014, // -0.039873, 0.9992 - 0xbfa5fc00d290cd43, 0x3feff871dadb81df, // -0.042938, 0.99908 - 0xbfa78dbaa5874685, 0x3feff753bb1b9164, // -0.046003, 0.99894 - 0xbfa91f65f10dd814, 0x3feff621e3796d7e, // -0.049068, 0.9988 - 0xbfaab101bd5f8317, 0x3feff4dc54b1bed3, // -0.052132, 0.99864 - 0xbfac428d12c0d7e3, 0x3feff3830f8d575c, // -0.055195, 0.99848 - 0xbfadd406f9808ec8, 0x3feff21614e131ed, // -0.058258, 0.9983 - 0xbfaf656e79f820e0, 0x3feff095658e71ad, // -0.061321, 0.99812 - 0xbfb07b614e463064, 0x3fefef0102826191, // -0.064383, 0.99793 - 0xbfb1440134d709b2, 0x3fefed58ecb673c4, // -0.067444, 0.99772 - 0xbfb20c9674ed444c, 0x3fefeb9d2530410f, // -0.070505, 0.99751 - 0xbfb2d52092ce19f6, 0x3fefe9cdad01883a, // -0.073565, 0.99729 - 0xbfb39d9f12c5a299, 0x3fefe7ea85482d60, // -0.076624, 0.99706 - 0xbfb4661179272096, 0x3fefe5f3af2e3940, // -0.079682, 0.99682 - 0xbfb52e774a4d4d0a, 0x3fefe3e92be9d886, // -0.08274, 0.99657 - 0xbfb5f6d00a9aa419, 0x3fefe1cafcbd5b09, // -0.085797, 0.99631 - 0xbfb6bf1b3e79b129, 0x3fefdf9922f73307, // -0.088854, 0.99604 - 0xbfb787586a5d5b21, 0x3fefdd539ff1f456, // -0.091909, 0.99577 - 0xbfb84f8712c130a0, 0x3fefdafa7514538c, // -0.094963, 0.99548 - 0xbfb917a6bc29b42c, 0x3fefd88da3d12526, // -0.098017, 0.99518 - 0xbfb9dfb6eb24a85c, 0x3fefd60d2da75c9e, // -0.10107, 0.99488 - 0xbfbaa7b724495c04, 0x3fefd37914220b84, // -0.10412, 0.99456 - 0xbfbb6fa6ec38f64c, 0x3fefd0d158d86087, // -0.10717, 0.99424 - 0xbfbc3785c79ec2d5, 0x3fefce15fd6da67b, // -0.11022, 0.99391 - 0xbfbcff533b307dc1, 0x3fefcb4703914354, // -0.11327, 0.99356 - 0xbfbdc70ecbae9fc8, 0x3fefc8646cfeb721, // -0.11632, 0.99321 - 0xbfbe8eb7fde4aa3e, 0x3fefc56e3b7d9af6, // -0.11937, 0.99285 - 0xbfbf564e56a9730e, 0x3fefc26470e19fd3, // -0.12241, 0.99248 - 0xbfc00ee8ad6fb85b, 0x3fefbf470f0a8d88, // -0.12545, 0.9921 - 0xbfc072a047ba831d, 0x3fefbc1617e44186, // -0.1285, 0.99171 - 0xbfc0d64dbcb26786, 0x3fefb8d18d66adb7, // -0.13154, 0.99131 - 0xbfc139f0cedaf576, 0x3fefb5797195d741, // -0.13458, 0.9909 - 0xbfc19d8940be24e7, 0x3fefb20dc681d54d, // -0.13762, 0.99049 - 0xbfc20116d4ec7bce, 0x3fefae8e8e46cfbb, // -0.14066, 0.99006 - 0xbfc264994dfd340a, 0x3fefaafbcb0cfddc, // -0.1437, 0.98962 - 0xbfc2c8106e8e613a, 0x3fefa7557f08a517, // -0.14673, 0.98918 - 0xbfc32b7bf94516a7, 0x3fefa39bac7a1791, // -0.14976, 0.98872 - 0xbfc38edbb0cd8d14, 0x3fef9fce55adb2c8, // -0.1528, 0.98826 - 0xbfc3f22f57db4893, 0x3fef9bed7cfbde29, // -0.15583, 0.98778 - 0xbfc45576b1293e5a, 0x3fef97f924c9099b, // -0.15886, 0.9873 - 0xbfc4b8b17f79fa88, 0x3fef93f14f85ac08, // -0.16189, 0.98681 - 0xbfc51bdf8597c5f2, 0x3fef8fd5ffae41db, // -0.16491, 0.98631 - 0xbfc57f008654cbde, 0x3fef8ba737cb4b78, // -0.16794, 0.9858 - 0xbfc5e214448b3fc6, 0x3fef8764fa714ba9, // -0.17096, 0.98528 - 0xbfc6451a831d830d, 0x3fef830f4a40c60c, // -0.17398, 0.98475 - 0xbfc6a81304f64ab2, 0x3fef7ea629e63d6e, // -0.177, 0.98421 - 0xbfc70afd8d08c4ff, 0x3fef7a299c1a322a, // -0.18002, 0.98366 - 0xbfc76dd9de50bf31, 0x3fef7599a3a12077, // -0.18304, 0.98311 - 0xbfc7d0a7bbd2cb1b, 0x3fef70f6434b7eb7, // -0.18606, 0.98254 - 0xbfc83366e89c64c5, 0x3fef6c3f7df5bbb7, // -0.18907, 0.98196 - 0xbfc8961727c41804, 0x3fef677556883cee, // -0.19208, 0.98138 - 0xbfc8f8b83c69a60a, 0x3fef6297cff75cb0, // -0.19509, 0.98079 - 0xbfc95b49e9b62af9, 0x3fef5da6ed43685d, // -0.1981, 0.98018 - 0xbfc9bdcbf2dc4366, 0x3fef58a2b1789e84, // -0.2011, 0.97957 - 0xbfca203e1b1831da, 0x3fef538b1faf2d07, // -0.20411, 0.97895 - 0xbfca82a025b00451, 0x3fef4e603b0b2f2d, // -0.20711, 0.97832 - 0xbfcae4f1d5f3b9ab, 0x3fef492206bcabb4, // -0.21011, 0.97768 - 0xbfcb4732ef3d6722, 0x3fef43d085ff92dd, // -0.21311, 0.97703 - 0xbfcba96334f15dad, 0x3fef3e6bbc1bbc65, // -0.21611, 0.97637 - 0xbfcc0b826a7e4f63, 0x3fef38f3ac64e589, // -0.2191, 0.9757 - 0xbfcc6d90535d74dc, 0x3fef33685a3aaef0, // -0.22209, 0.97503 - 0xbfcccf8cb312b286, 0x3fef2dc9c9089a9d, // -0.22508, 0.97434 - 0xbfcd31774d2cbdee, 0x3fef2817fc4609ce, // -0.22807, 0.97364 - 0xbfcd934fe5454311, 0x3fef2252f7763ada, // -0.23106, 0.97294 - 0xbfcdf5163f01099a, 0x3fef1c7abe284708, // -0.23404, 0.97223 - 0xbfce56ca1e101a1b, 0x3fef168f53f7205d, // -0.23702, 0.9715 - 0xbfceb86b462de348, 0x3fef1090bc898f5f, // -0.24, 0.97077 - 0xbfcf19f97b215f1a, 0x3fef0a7efb9230d7, // -0.24298, 0.97003 - 0xbfcf7b7480bd3801, 0x3fef045a14cf738c, // -0.24596, 0.96928 - 0xbfcfdcdc1adfedf8, 0x3feefe220c0b95ec, // -0.24893, 0.96852 - 0xbfd01f1806b9fdd2, 0x3feef7d6e51ca3c0, // -0.2519, 0.96775 - 0xbfd04fb80e37fdae, 0x3feef178a3e473c2, // -0.25487, 0.96698 - 0xbfd0804e05eb661e, 0x3feeeb074c50a544, // -0.25783, 0.96619 - 0xbfd0b0d9cfdbdb90, 0x3feee482e25a9dbc, // -0.26079, 0.96539 - 0xbfd0e15b4e1749cd, 0x3feeddeb6a078651, // -0.26375, 0.96459 - 0xbfd111d262b1f677, 0x3feed740e7684963, // -0.26671, 0.96378 - 0xbfd1423eefc69378, 0x3feed0835e999009, // -0.26967, 0.96295 - 0xbfd172a0d7765177, 0x3feec9b2d3c3bf84, // -0.27262, 0.96212 - 0xbfd1a2f7fbe8f243, 0x3feec2cf4b1af6b2, // -0.27557, 0.96128 - 0xbfd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // -0.27852, 0.96043 - 0xbfd2038583d727bd, 0x3feeb4cf515b8811, // -0.28146, 0.95957 - 0xbfd233bbabc3bb72, 0x3feeadb2e8e7a88e, // -0.28441, 0.9587 - 0xbfd263e6995554ba, 0x3feea68393e65800, // -0.28735, 0.95783 - 0xbfd294062ed59f05, 0x3fee9f4156c62dda, // -0.29028, 0.95694 - 0xbfd2c41a4e954520, 0x3fee97ec36016b30, // -0.29322, 0.95605 - 0xbfd2f422daec0386, 0x3fee9084361df7f3, // -0.29615, 0.95514 - 0xbfd3241fb638baaf, 0x3fee89095bad6025, // -0.29908, 0.95423 - 0xbfd35410c2e18152, 0x3fee817bab4cd10d, // -0.30201, 0.95331 - 0xbfd383f5e353b6aa, 0x3fee79db29a5165a, // -0.30493, 0.95238 - 0xbfd3b3cefa0414b7, 0x3fee7227db6a9744, // -0.30785, 0.95144 - 0xbfd3e39be96ec271, 0x3fee6a61c55d53a7, // -0.31077, 0.95049 - 0xbfd4135c94176602, 0x3fee6288ec48e112, // -0.31368, 0.94953 - 0xbfd44310dc8936f0, 0x3fee5a9d550467d3, // -0.31659, 0.94856 - 0xbfd472b8a5571054, 0x3fee529f04729ffc, // -0.3195, 0.94759 - 0xbfd4a253d11b82f3, 0x3fee4a8dff81ce5e, // -0.32241, 0.9466 - 0xbfd4d1e24278e76a, 0x3fee426a4b2bc17e, // -0.32531, 0.94561 - 0xbfd50163dc197047, 0x3fee3a33ec75ce85, // -0.32821, 0.9446 - 0xbfd530d880af3c24, 0x3fee31eae870ce25, // -0.33111, 0.94359 - 0xbfd5604012f467b4, 0x3fee298f4439197a, // -0.334, 0.94257 - 0xbfd58f9a75ab1fdd, 0x3fee212104f686e5, // -0.33689, 0.94154 - 0xbfd5bee78b9db3b6, 0x3fee18a02fdc66d9, // -0.33978, 0.94051 - 0xbfd5ee27379ea693, 0x3fee100cca2980ac, // -0.34266, 0.93946 - 0xbfd61d595c88c203, 0x3fee0766d9280f54, // -0.34554, 0.9384 - 0xbfd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // -0.34842, 0.93734 - 0xbfd67b949cad63ca, 0x3fedf5e36a9ba59c, // -0.35129, 0.93627 - 0xbfd6aa9d7dc77e16, 0x3feded05f7de47da, // -0.35416, 0.93518 - 0xbfd6d998638a0cb5, 0x3fede4160f6d8d81, // -0.35703, 0.93409 - 0xbfd7088530fa459e, 0x3feddb13b6ccc23d, // -0.3599, 0.93299 - 0xbfd73763c9261092, 0x3fedd1fef38a915a, // -0.36276, 0.93188 - 0xbfd766340f2418f6, 0x3fedc8d7cb410260, // -0.36561, 0.93077 - 0xbfd794f5e613dfae, 0x3fedbf9e4395759a, // -0.36847, 0.92964 - 0xbfd7c3a9311dcce7, 0x3fedb6526238a09b, // -0.37132, 0.92851 - 0xbfd7f24dd37341e3, 0x3fedacf42ce68ab9, // -0.37416, 0.92736 - 0xbfd820e3b04eaac4, 0x3feda383a9668988, // -0.37701, 0.92621 - 0xbfd84f6aaaf3903f, 0x3fed9a00dd8b3d46, // -0.37985, 0.92505 - 0xbfd87de2a6aea963, 0x3fed906bcf328d46, // -0.38268, 0.92388 - 0xbfd8ac4b86d5ed44, 0x3fed86c48445a450, // -0.38552, 0.9227 - 0xbfd8daa52ec8a4af, 0x3fed7d0b02b8ecf9, // -0.38835, 0.92151 - 0xbfd908ef81ef7bd1, 0x3fed733f508c0dff, // -0.39117, 0.92032 - 0xbfd9372a63bc93d7, 0x3fed696173c9e68b, // -0.39399, 0.91911 - 0xbfd96555b7ab948f, 0x3fed5f7172888a7f, // -0.39681, 0.9179 - 0xbfd993716141bdfe, 0x3fed556f52e93eb1, // -0.39962, 0.91668 - 0xbfd9c17d440df9f2, 0x3fed4b5b1b187524, // -0.40243, 0.91545 - 0xbfd9ef7943a8ed8a, 0x3fed4134d14dc93a, // -0.40524, 0.91421 - 0xbfda1d6543b50ac0, 0x3fed36fc7bcbfbdc, // -0.40804, 0.91296 - 0xbfda4b4127dea1e4, 0x3fed2cb220e0ef9f, // -0.41084, 0.91171 - 0xbfda790cd3dbf31a, 0x3fed2255c6e5a4e1, // -0.41364, 0.91044 - 0xbfdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // -0.41643, 0.90917 - 0xbfdad473125cdc08, 0x3fed0d672f59d2b9, // -0.41922, 0.90789 - 0xbfdb020d6c7f4009, 0x3fed02d4feb2bd92, // -0.422, 0.9066 - 0xbfdb2f971db31972, 0x3fecf830e8ce467b, // -0.42478, 0.9053 - 0xbfdb5d1009e15cc0, 0x3feced7af43cc773, // -0.42756, 0.90399 - 0xbfdb8a7814fd5693, 0x3fece2b32799a060, // -0.43033, 0.90267 - 0xbfdbb7cf2304bd01, 0x3fecd7d9898b32f6, // -0.43309, 0.90135 - 0xbfdbe51517ffc0d9, 0x3fecccee20c2de9f, // -0.43586, 0.90002 - 0xbfdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // -0.43862, 0.89867 - 0xbfdc3f6d47263129, 0x3fecb6e20a00da99, // -0.44137, 0.89732 - 0xbfdc6c7f4997000a, 0x3fecabc169a0b901, // -0.44412, 0.89597 - 0xbfdc997fc3865388, 0x3feca08f19b9c449, // -0.44687, 0.8946 - 0xbfdcc66e9931c45d, 0x3fec954b213411f5, // -0.44961, 0.89322 - 0xbfdcf34baee1cd21, 0x3fec89f587029c13, // -0.45235, 0.89184 - 0xbfdd2016e8e9db5b, 0x3fec7e8e52233cf3, // -0.45508, 0.89045 - 0xbfdd4cd02ba8609c, 0x3fec7315899eaad7, // -0.45781, 0.88905 - 0xbfdd79775b86e389, 0x3fec678b3488739b, // -0.46054, 0.88764 - 0xbfdda60c5cfa10d8, 0x3fec5bef59fef85a, // -0.46326, 0.88622 - 0xbfddd28f1481cc58, 0x3fec5042012b6907, // -0.46598, 0.8848 - 0xbfddfeff66a941de, 0x3fec44833141c004, // -0.46869, 0.88336 - 0xbfde2b5d3806f63b, 0x3fec38b2f180bdb1, // -0.4714, 0.88192 - 0xbfde57a86d3cd824, 0x3fec2cd14931e3f1, // -0.4741, 0.88047 - 0xbfde83e0eaf85113, 0x3fec20de3fa971b0, // -0.4768, 0.87901 - 0xbfdeb00695f25620, 0x3fec14d9dc465e58, // -0.47949, 0.87755 - 0xbfdedc1952ef78d5, 0x3fec08c426725549, // -0.48218, 0.87607 - 0xbfdf081906bff7fd, 0x3febfc9d25a1b147, // -0.48487, 0.87459 - 0xbfdf3405963fd068, 0x3febf064e15377dd, // -0.48755, 0.87309 - 0xbfdf5fdee656cda3, 0x3febe41b611154c1, // -0.49023, 0.8716 - 0xbfdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // -0.4929, 0.87009 - 0xbfdfb7575c24d2de, 0x3febcb54cb0d2327, // -0.49557, 0.86857 - 0xbfdfe2f64be7120f, 0x3febbed7c49380ea, // -0.49823, 0.86705 - 0xbfe00740c82b82e0, 0x3febb249a0b6c40d, // -0.50089, 0.86551 - 0xbfe01cfc874c3eb7, 0x3feba5aa673590d2, // -0.50354, 0.86397 - 0xbfe032ae55edbd95, 0x3feb98fa1fd9155e, // -0.50619, 0.86242 - 0xbfe0485626ae221a, 0x3feb8c38d27504e9, // -0.50883, 0.86087 - 0xbfe05df3ec31b8b6, 0x3feb7f6686e792ea, // -0.51147, 0.8593 - 0xbfe073879922ffed, 0x3feb728345196e3e, // -0.5141, 0.85773 - 0xbfe089112032b08c, 0x3feb658f14fdbc47, // -0.51673, 0.85615 - 0xbfe09e907417c5e1, 0x3feb5889fe921405, // -0.51936, 0.85456 - 0xbfe0b405878f85ec, 0x3feb4b7409de7925, // -0.52198, 0.85296 - 0xbfe0c9704d5d898f, 0x3feb3e4d3ef55712, // -0.52459, 0.85136 - 0xbfe0ded0b84bc4b5, 0x3feb3115a5f37bf4, // -0.5272, 0.84974 - 0xbfe0f426bb2a8e7d, 0x3feb23cd470013b4, // -0.5298, 0.84812 - 0xbfe1097248d0a956, 0x3feb16742a4ca2f5, // -0.5324, 0.84649 - 0xbfe11eb3541b4b22, 0x3feb090a58150200, // -0.535, 0.84485 - 0xbfe133e9cfee254e, 0x3feafb8fd89f57b6, // -0.53759, 0.84321 - 0xbfe14915af336ceb, 0x3feaee04b43c1474, // -0.54017, 0.84155 - 0xbfe15e36e4dbe2bc, 0x3feae068f345ecef, // -0.54275, 0.83989 - 0xbfe1734d63dedb49, 0x3fead2bc9e21d511, // -0.54532, 0.83822 - 0xbfe188591f3a46e5, 0x3feac4ffbd3efac8, // -0.54789, 0.83655 - 0xbfe19d5a09f2b9b8, 0x3feab7325916c0d4, // -0.55046, 0.83486 - 0xbfe1b250171373be, 0x3feaa9547a2cb98e, // -0.55302, 0.83317 - 0xbfe1c73b39ae68c8, 0x3fea9b66290ea1a3, // -0.55557, 0.83147 - 0xbfe1dc1b64dc4872, 0x3fea8d676e545ad2, // -0.55812, 0.82976 - 0xbfe1f0f08bbc861b, 0x3fea7f58529fe69d, // -0.56066, 0.82805 - 0xbfe205baa17560d6, 0x3fea7138de9d60f5, // -0.5632, 0.82632 - 0xbfe21a799933eb58, 0x3fea63091b02fae2, // -0.56573, 0.82459 - 0xbfe22f2d662c13e1, 0x3fea54c91090f524, // -0.56826, 0.82285 - 0xbfe243d5fb98ac1f, 0x3fea4678c8119ac8, // -0.57078, 0.8211 - 0xbfe258734cbb7110, 0x3fea38184a593bc6, // -0.5733, 0.81935 - 0xbfe26d054cdd12df, 0x3fea29a7a0462782, // -0.57581, 0.81758 - 0xbfe2818bef4d3cba, 0x3fea1b26d2c0a75e, // -0.57831, 0.81581 - 0xbfe2960727629ca8, 0x3fea0c95eabaf937, // -0.58081, 0.81404 - 0xbfe2aa76e87aeb58, 0x3fe9fdf4f13149de, // -0.58331, 0.81225 - 0xbfe2bedb25faf3ea, 0x3fe9ef43ef29af94, // -0.5858, 0.81046 - 0xbfe2d333d34e9bb7, 0x3fe9e082edb42472, // -0.58828, 0.80866 - 0xbfe2e780e3e8ea16, 0x3fe9d1b1f5ea80d6, // -0.59076, 0.80685 - 0xbfe2fbc24b441015, 0x3fe9c2d110f075c3, // -0.59323, 0.80503 - 0xbfe30ff7fce17035, 0x3fe9b3e047f38741, // -0.5957, 0.80321 - 0xbfe32421ec49a620, 0x3fe9a4dfa42b06b2, // -0.59816, 0.80138 - 0xbfe338400d0c8e57, 0x3fe995cf2ed80d22, // -0.60062, 0.79954 - 0xbfe34c5252c14de1, 0x3fe986aef1457594, // -0.60307, 0.79769 - 0xbfe36058b10659f3, 0x3fe9777ef4c7d742, // -0.60551, 0.79584 - 0xbfe374531b817f8d, 0x3fe9683f42bd7fe1, // -0.60795, 0.79398 - 0xbfe3884185dfeb22, 0x3fe958efe48e6dd7, // -0.61038, 0.79211 - 0xbfe39c23e3d63029, 0x3fe94990e3ac4a6c, // -0.61281, 0.79023 - 0xbfe3affa292050b9, 0x3fe93a22499263fc, // -0.61523, 0.78835 - 0xbfe3c3c44981c517, 0x3fe92aa41fc5a815, // -0.61765, 0.78646 - 0xbfe3d78238c58343, 0x3fe91b166fd49da2, // -0.62006, 0.78456 - 0xbfe3eb33eabe0680, 0x3fe90b7943575efe, // -0.62246, 0.78265 - 0xbfe3fed9534556d4, 0x3fe8fbcca3ef940d, // -0.62486, 0.78074 - 0xbfe41272663d108c, 0x3fe8ec109b486c49, // -0.62725, 0.77882 - 0xbfe425ff178e6bb1, 0x3fe8dc45331698cc, // -0.62964, 0.77689 - 0xbfe4397f5b2a4380, 0x3fe8cc6a75184655, // -0.63202, 0.77495 - 0xbfe44cf325091dd6, 0x3fe8bc806b151741, // -0.63439, 0.77301 - 0xbfe4605a692b32a2, 0x3fe8ac871ede1d88, // -0.63676, 0.77106 - 0xbfe473b51b987347, 0x3fe89c7e9a4dd4ab, // -0.63912, 0.7691 - 0xbfe48703306091fe, 0x3fe88c66e7481ba1, // -0.64148, 0.76714 - 0xbfe49a449b9b0938, 0x3fe87c400fba2ebf, // -0.64383, 0.76517 - 0xbfe4ad79516722f0, 0x3fe86c0a1d9aa195, // -0.64618, 0.76319 - 0xbfe4c0a145ec0004, 0x3fe85bc51ae958cc, // -0.64851, 0.7612 - 0xbfe4d3bc6d589f80, 0x3fe84b7111af83f9, // -0.65085, 0.75921 - 0xbfe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // -0.65317, 0.75721 - 0xbfe4f9cc25cca486, 0x3fe82a9c13f545ff, // -0.65549, 0.7552 - 0xbfe50cc09f59a09b, 0x3fe81a1b33b57acc, // -0.65781, 0.75319 - 0xbfe51fa81cd99aa6, 0x3fe8098b756e52fa, // -0.66011, 0.75117 - 0xbfe5328292a35596, 0x3fe7f8ece3571771, // -0.66242, 0.74914 - 0xbfe5454ff5159dfb, 0x3fe7e83f87b03686, // -0.66471, 0.7471 - 0xbfe5581038975137, 0x3fe7d7836cc33db2, // -0.667, 0.74506 - 0xbfe56ac35197649e, 0x3fe7c6b89ce2d333, // -0.66928, 0.74301 - 0xbfe57d69348cec9f, 0x3fe7b5df226aafb0, // -0.67156, 0.74095 - 0xbfe59001d5f723df, 0x3fe7a4f707bf97d2, // -0.67383, 0.73889 - 0xbfe5a28d2a5d7250, 0x3fe79400574f55e4, // -0.67609, 0.73682 - 0xbfe5b50b264f7448, 0x3fe782fb1b90b35b, // -0.67835, 0.73474 - 0xbfe5c77bbe65018c, 0x3fe771e75f037261, // -0.6806, 0.73265 - 0xbfe5d9dee73e345c, 0x3fe760c52c304764, // -0.68285, 0.73056 - 0xbfe5ec3495837074, 0x3fe74f948da8d28d, // -0.68508, 0.72846 - 0xbfe5fe7cbde56a0f, 0x3fe73e558e079942, // -0.68732, 0.72636 - 0xbfe610b7551d2cde, 0x3fe72d0837efff97, // -0.68954, 0.72425 - 0xbfe622e44fec22ff, 0x3fe71bac960e41bf, // -0.69176, 0.72213 - 0xbfe63503a31c1be8, 0x3fe70a42b3176d7a, // -0.69397, 0.72 - 0xbfe64715437f535b, 0x3fe6f8ca99c95b75, // -0.69618, 0.71787 - 0xbfe6591925f0783e, 0x3fe6e74454eaa8ae, // -0.69838, 0.71573 - 0xbfe66b0f3f52b386, 0x3fe6d5afef4aafcc, // -0.70057, 0.71358 - 0xbfe67cf78491af10, 0x3fe6c40d73c18275, // -0.70275, 0.71143 - 0xbfe68ed1eaa19c71, 0x3fe6b25ced2fe29c, // -0.70493, 0.70927 - 0xbfe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // -0.70711, 0.70711 - 0xbfe6b25ced2fe29c, 0x3fe68ed1eaa19c71, // -0.70927, 0.70493 - 0xbfe6c40d73c18275, 0x3fe67cf78491af10, // -0.71143, 0.70275 - 0xbfe6d5afef4aafcc, 0x3fe66b0f3f52b386, // -0.71358, 0.70057 - 0xbfe6e74454eaa8ae, 0x3fe6591925f0783e, // -0.71573, 0.69838 - 0xbfe6f8ca99c95b75, 0x3fe64715437f535b, // -0.71787, 0.69618 - 0xbfe70a42b3176d7a, 0x3fe63503a31c1be8, // -0.72, 0.69397 - 0xbfe71bac960e41bf, 0x3fe622e44fec22ff, // -0.72213, 0.69176 - 0xbfe72d0837efff97, 0x3fe610b7551d2cde, // -0.72425, 0.68954 - 0xbfe73e558e079942, 0x3fe5fe7cbde56a0f, // -0.72636, 0.68732 - 0xbfe74f948da8d28d, 0x3fe5ec3495837074, // -0.72846, 0.68508 - 0xbfe760c52c304764, 0x3fe5d9dee73e345c, // -0.73056, 0.68285 - 0xbfe771e75f037261, 0x3fe5c77bbe65018c, // -0.73265, 0.6806 - 0xbfe782fb1b90b35b, 0x3fe5b50b264f7448, // -0.73474, 0.67835 - 0xbfe79400574f55e4, 0x3fe5a28d2a5d7250, // -0.73682, 0.67609 - 0xbfe7a4f707bf97d2, 0x3fe59001d5f723df, // -0.73889, 0.67383 - 0xbfe7b5df226aafb0, 0x3fe57d69348cec9f, // -0.74095, 0.67156 - 0xbfe7c6b89ce2d333, 0x3fe56ac35197649e, // -0.74301, 0.66928 - 0xbfe7d7836cc33db2, 0x3fe5581038975137, // -0.74506, 0.667 - 0xbfe7e83f87b03686, 0x3fe5454ff5159dfb, // -0.7471, 0.66471 - 0xbfe7f8ece3571771, 0x3fe5328292a35596, // -0.74914, 0.66242 - 0xbfe8098b756e52fa, 0x3fe51fa81cd99aa6, // -0.75117, 0.66011 - 0xbfe81a1b33b57acc, 0x3fe50cc09f59a09b, // -0.75319, 0.65781 - 0xbfe82a9c13f545ff, 0x3fe4f9cc25cca486, // -0.7552, 0.65549 - 0xbfe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // -0.75721, 0.65317 - 0xbfe84b7111af83f9, 0x3fe4d3bc6d589f80, // -0.75921, 0.65085 - 0xbfe85bc51ae958cc, 0x3fe4c0a145ec0004, // -0.7612, 0.64851 - 0xbfe86c0a1d9aa195, 0x3fe4ad79516722f0, // -0.76319, 0.64618 - 0xbfe87c400fba2ebf, 0x3fe49a449b9b0938, // -0.76517, 0.64383 - 0xbfe88c66e7481ba1, 0x3fe48703306091fe, // -0.76714, 0.64148 - 0xbfe89c7e9a4dd4ab, 0x3fe473b51b987347, // -0.7691, 0.63912 - 0xbfe8ac871ede1d88, 0x3fe4605a692b32a2, // -0.77106, 0.63676 - 0xbfe8bc806b151741, 0x3fe44cf325091dd6, // -0.77301, 0.63439 - 0xbfe8cc6a75184655, 0x3fe4397f5b2a4380, // -0.77495, 0.63202 - 0xbfe8dc45331698cc, 0x3fe425ff178e6bb1, // -0.77689, 0.62964 - 0xbfe8ec109b486c49, 0x3fe41272663d108c, // -0.77882, 0.62725 - 0xbfe8fbcca3ef940d, 0x3fe3fed9534556d4, // -0.78074, 0.62486 - 0xbfe90b7943575efe, 0x3fe3eb33eabe0680, // -0.78265, 0.62246 - 0xbfe91b166fd49da2, 0x3fe3d78238c58343, // -0.78456, 0.62006 - 0xbfe92aa41fc5a815, 0x3fe3c3c44981c517, // -0.78646, 0.61765 - 0xbfe93a22499263fc, 0x3fe3affa292050b9, // -0.78835, 0.61523 - 0xbfe94990e3ac4a6c, 0x3fe39c23e3d63029, // -0.79023, 0.61281 - 0xbfe958efe48e6dd7, 0x3fe3884185dfeb22, // -0.79211, 0.61038 - 0xbfe9683f42bd7fe1, 0x3fe374531b817f8d, // -0.79398, 0.60795 - 0xbfe9777ef4c7d742, 0x3fe36058b10659f3, // -0.79584, 0.60551 - 0xbfe986aef1457594, 0x3fe34c5252c14de1, // -0.79769, 0.60307 - 0xbfe995cf2ed80d22, 0x3fe338400d0c8e57, // -0.79954, 0.60062 - 0xbfe9a4dfa42b06b2, 0x3fe32421ec49a620, // -0.80138, 0.59816 - 0xbfe9b3e047f38741, 0x3fe30ff7fce17035, // -0.80321, 0.5957 - 0xbfe9c2d110f075c3, 0x3fe2fbc24b441015, // -0.80503, 0.59323 - 0xbfe9d1b1f5ea80d6, 0x3fe2e780e3e8ea16, // -0.80685, 0.59076 - 0xbfe9e082edb42472, 0x3fe2d333d34e9bb7, // -0.80866, 0.58828 - 0xbfe9ef43ef29af94, 0x3fe2bedb25faf3ea, // -0.81046, 0.5858 - 0xbfe9fdf4f13149de, 0x3fe2aa76e87aeb58, // -0.81225, 0.58331 - 0xbfea0c95eabaf937, 0x3fe2960727629ca8, // -0.81404, 0.58081 - 0xbfea1b26d2c0a75e, 0x3fe2818bef4d3cba, // -0.81581, 0.57831 - 0xbfea29a7a0462782, 0x3fe26d054cdd12df, // -0.81758, 0.57581 - 0xbfea38184a593bc6, 0x3fe258734cbb7110, // -0.81935, 0.5733 - 0xbfea4678c8119ac8, 0x3fe243d5fb98ac1f, // -0.8211, 0.57078 - 0xbfea54c91090f524, 0x3fe22f2d662c13e1, // -0.82285, 0.56826 - 0xbfea63091b02fae2, 0x3fe21a799933eb58, // -0.82459, 0.56573 - 0xbfea7138de9d60f5, 0x3fe205baa17560d6, // -0.82632, 0.5632 - 0xbfea7f58529fe69d, 0x3fe1f0f08bbc861b, // -0.82805, 0.56066 - 0xbfea8d676e545ad2, 0x3fe1dc1b64dc4872, // -0.82976, 0.55812 - 0xbfea9b66290ea1a3, 0x3fe1c73b39ae68c8, // -0.83147, 0.55557 - 0xbfeaa9547a2cb98e, 0x3fe1b250171373be, // -0.83317, 0.55302 - 0xbfeab7325916c0d4, 0x3fe19d5a09f2b9b8, // -0.83486, 0.55046 - 0xbfeac4ffbd3efac8, 0x3fe188591f3a46e5, // -0.83655, 0.54789 - 0xbfead2bc9e21d511, 0x3fe1734d63dedb49, // -0.83822, 0.54532 - 0xbfeae068f345ecef, 0x3fe15e36e4dbe2bc, // -0.83989, 0.54275 - 0xbfeaee04b43c1474, 0x3fe14915af336ceb, // -0.84155, 0.54017 - 0xbfeafb8fd89f57b6, 0x3fe133e9cfee254e, // -0.84321, 0.53759 - 0xbfeb090a58150200, 0x3fe11eb3541b4b22, // -0.84485, 0.535 - 0xbfeb16742a4ca2f5, 0x3fe1097248d0a956, // -0.84649, 0.5324 - 0xbfeb23cd470013b4, 0x3fe0f426bb2a8e7d, // -0.84812, 0.5298 - 0xbfeb3115a5f37bf4, 0x3fe0ded0b84bc4b5, // -0.84974, 0.5272 - 0xbfeb3e4d3ef55712, 0x3fe0c9704d5d898f, // -0.85136, 0.52459 - 0xbfeb4b7409de7925, 0x3fe0b405878f85ec, // -0.85296, 0.52198 - 0xbfeb5889fe921405, 0x3fe09e907417c5e1, // -0.85456, 0.51936 - 0xbfeb658f14fdbc47, 0x3fe089112032b08c, // -0.85615, 0.51673 - 0xbfeb728345196e3e, 0x3fe073879922ffed, // -0.85773, 0.5141 - 0xbfeb7f6686e792ea, 0x3fe05df3ec31b8b6, // -0.8593, 0.51147 - 0xbfeb8c38d27504e9, 0x3fe0485626ae221a, // -0.86087, 0.50883 - 0xbfeb98fa1fd9155e, 0x3fe032ae55edbd95, // -0.86242, 0.50619 - 0xbfeba5aa673590d2, 0x3fe01cfc874c3eb7, // -0.86397, 0.50354 - 0xbfebb249a0b6c40d, 0x3fe00740c82b82e0, // -0.86551, 0.50089 - 0xbfebbed7c49380ea, 0x3fdfe2f64be7120f, // -0.86705, 0.49823 - 0xbfebcb54cb0d2327, 0x3fdfb7575c24d2de, // -0.86857, 0.49557 - 0xbfebd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // -0.87009, 0.4929 - 0xbfebe41b611154c1, 0x3fdf5fdee656cda3, // -0.8716, 0.49023 - 0xbfebf064e15377dd, 0x3fdf3405963fd068, // -0.87309, 0.48755 - 0xbfebfc9d25a1b147, 0x3fdf081906bff7fd, // -0.87459, 0.48487 - 0xbfec08c426725549, 0x3fdedc1952ef78d5, // -0.87607, 0.48218 - 0xbfec14d9dc465e58, 0x3fdeb00695f25620, // -0.87755, 0.47949 - 0xbfec20de3fa971b0, 0x3fde83e0eaf85113, // -0.87901, 0.4768 - 0xbfec2cd14931e3f1, 0x3fde57a86d3cd824, // -0.88047, 0.4741 - 0xbfec38b2f180bdb1, 0x3fde2b5d3806f63b, // -0.88192, 0.4714 - 0xbfec44833141c004, 0x3fddfeff66a941de, // -0.88336, 0.46869 - 0xbfec5042012b6907, 0x3fddd28f1481cc58, // -0.8848, 0.46598 - 0xbfec5bef59fef85a, 0x3fdda60c5cfa10d8, // -0.88622, 0.46326 - 0xbfec678b3488739b, 0x3fdd79775b86e389, // -0.88764, 0.46054 - 0xbfec7315899eaad7, 0x3fdd4cd02ba8609c, // -0.88905, 0.45781 - 0xbfec7e8e52233cf3, 0x3fdd2016e8e9db5b, // -0.89045, 0.45508 - 0xbfec89f587029c13, 0x3fdcf34baee1cd21, // -0.89184, 0.45235 - 0xbfec954b213411f5, 0x3fdcc66e9931c45d, // -0.89322, 0.44961 - 0xbfeca08f19b9c449, 0x3fdc997fc3865388, // -0.8946, 0.44687 - 0xbfecabc169a0b901, 0x3fdc6c7f4997000a, // -0.89597, 0.44412 - 0xbfecb6e20a00da99, 0x3fdc3f6d47263129, // -0.89732, 0.44137 - 0xbfecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // -0.89867, 0.43862 - 0xbfecccee20c2de9f, 0x3fdbe51517ffc0d9, // -0.90002, 0.43586 - 0xbfecd7d9898b32f6, 0x3fdbb7cf2304bd01, // -0.90135, 0.43309 - 0xbfece2b32799a060, 0x3fdb8a7814fd5693, // -0.90267, 0.43033 - 0xbfeced7af43cc773, 0x3fdb5d1009e15cc0, // -0.90399, 0.42756 - 0xbfecf830e8ce467b, 0x3fdb2f971db31972, // -0.9053, 0.42478 - 0xbfed02d4feb2bd92, 0x3fdb020d6c7f4009, // -0.9066, 0.422 - 0xbfed0d672f59d2b9, 0x3fdad473125cdc08, // -0.90789, 0.41922 - 0xbfed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // -0.90917, 0.41643 - 0xbfed2255c6e5a4e1, 0x3fda790cd3dbf31a, // -0.91044, 0.41364 - 0xbfed2cb220e0ef9f, 0x3fda4b4127dea1e4, // -0.91171, 0.41084 - 0xbfed36fc7bcbfbdc, 0x3fda1d6543b50ac0, // -0.91296, 0.40804 - 0xbfed4134d14dc93a, 0x3fd9ef7943a8ed8a, // -0.91421, 0.40524 - 0xbfed4b5b1b187524, 0x3fd9c17d440df9f2, // -0.91545, 0.40243 - 0xbfed556f52e93eb1, 0x3fd993716141bdfe, // -0.91668, 0.39962 - 0xbfed5f7172888a7f, 0x3fd96555b7ab948f, // -0.9179, 0.39681 - 0xbfed696173c9e68b, 0x3fd9372a63bc93d7, // -0.91911, 0.39399 - 0xbfed733f508c0dff, 0x3fd908ef81ef7bd1, // -0.92032, 0.39117 - 0xbfed7d0b02b8ecf9, 0x3fd8daa52ec8a4af, // -0.92151, 0.38835 - 0xbfed86c48445a450, 0x3fd8ac4b86d5ed44, // -0.9227, 0.38552 - 0xbfed906bcf328d46, 0x3fd87de2a6aea963, // -0.92388, 0.38268 - 0xbfed9a00dd8b3d46, 0x3fd84f6aaaf3903f, // -0.92505, 0.37985 - 0xbfeda383a9668988, 0x3fd820e3b04eaac4, // -0.92621, 0.37701 - 0xbfedacf42ce68ab9, 0x3fd7f24dd37341e3, // -0.92736, 0.37416 - 0xbfedb6526238a09b, 0x3fd7c3a9311dcce7, // -0.92851, 0.37132 - 0xbfedbf9e4395759a, 0x3fd794f5e613dfae, // -0.92964, 0.36847 - 0xbfedc8d7cb410260, 0x3fd766340f2418f6, // -0.93077, 0.36561 - 0xbfedd1fef38a915a, 0x3fd73763c9261092, // -0.93188, 0.36276 - 0xbfeddb13b6ccc23d, 0x3fd7088530fa459e, // -0.93299, 0.3599 - 0xbfede4160f6d8d81, 0x3fd6d998638a0cb5, // -0.93409, 0.35703 - 0xbfeded05f7de47da, 0x3fd6aa9d7dc77e16, // -0.93518, 0.35416 - 0xbfedf5e36a9ba59c, 0x3fd67b949cad63ca, // -0.93627, 0.35129 - 0xbfedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // -0.93734, 0.34842 - 0xbfee0766d9280f54, 0x3fd61d595c88c203, // -0.9384, 0.34554 - 0xbfee100cca2980ac, 0x3fd5ee27379ea693, // -0.93946, 0.34266 - 0xbfee18a02fdc66d9, 0x3fd5bee78b9db3b6, // -0.94051, 0.33978 - 0xbfee212104f686e5, 0x3fd58f9a75ab1fdd, // -0.94154, 0.33689 - 0xbfee298f4439197a, 0x3fd5604012f467b4, // -0.94257, 0.334 - 0xbfee31eae870ce25, 0x3fd530d880af3c24, // -0.94359, 0.33111 - 0xbfee3a33ec75ce85, 0x3fd50163dc197047, // -0.9446, 0.32821 - 0xbfee426a4b2bc17e, 0x3fd4d1e24278e76a, // -0.94561, 0.32531 - 0xbfee4a8dff81ce5e, 0x3fd4a253d11b82f3, // -0.9466, 0.32241 - 0xbfee529f04729ffc, 0x3fd472b8a5571054, // -0.94759, 0.3195 - 0xbfee5a9d550467d3, 0x3fd44310dc8936f0, // -0.94856, 0.31659 - 0xbfee6288ec48e112, 0x3fd4135c94176602, // -0.94953, 0.31368 - 0xbfee6a61c55d53a7, 0x3fd3e39be96ec271, // -0.95049, 0.31077 - 0xbfee7227db6a9744, 0x3fd3b3cefa0414b7, // -0.95144, 0.30785 - 0xbfee79db29a5165a, 0x3fd383f5e353b6aa, // -0.95238, 0.30493 - 0xbfee817bab4cd10d, 0x3fd35410c2e18152, // -0.95331, 0.30201 - 0xbfee89095bad6025, 0x3fd3241fb638baaf, // -0.95423, 0.29908 - 0xbfee9084361df7f3, 0x3fd2f422daec0386, // -0.95514, 0.29615 - 0xbfee97ec36016b30, 0x3fd2c41a4e954520, // -0.95605, 0.29322 - 0xbfee9f4156c62dda, 0x3fd294062ed59f05, // -0.95694, 0.29028 - 0xbfeea68393e65800, 0x3fd263e6995554ba, // -0.95783, 0.28735 - 0xbfeeadb2e8e7a88e, 0x3fd233bbabc3bb72, // -0.9587, 0.28441 - 0xbfeeb4cf515b8811, 0x3fd2038583d727bd, // -0.95957, 0.28146 - 0xbfeebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // -0.96043, 0.27852 - 0xbfeec2cf4b1af6b2, 0x3fd1a2f7fbe8f243, // -0.96128, 0.27557 - 0xbfeec9b2d3c3bf84, 0x3fd172a0d7765177, // -0.96212, 0.27262 - 0xbfeed0835e999009, 0x3fd1423eefc69378, // -0.96295, 0.26967 - 0xbfeed740e7684963, 0x3fd111d262b1f677, // -0.96378, 0.26671 - 0xbfeeddeb6a078651, 0x3fd0e15b4e1749cd, // -0.96459, 0.26375 - 0xbfeee482e25a9dbc, 0x3fd0b0d9cfdbdb90, // -0.96539, 0.26079 - 0xbfeeeb074c50a544, 0x3fd0804e05eb661e, // -0.96619, 0.25783 - 0xbfeef178a3e473c2, 0x3fd04fb80e37fdae, // -0.96698, 0.25487 - 0xbfeef7d6e51ca3c0, 0x3fd01f1806b9fdd2, // -0.96775, 0.2519 - 0xbfeefe220c0b95ec, 0x3fcfdcdc1adfedf8, // -0.96852, 0.24893 - 0xbfef045a14cf738c, 0x3fcf7b7480bd3801, // -0.96928, 0.24596 - 0xbfef0a7efb9230d7, 0x3fcf19f97b215f1a, // -0.97003, 0.24298 - 0xbfef1090bc898f5f, 0x3fceb86b462de348, // -0.97077, 0.24 - 0xbfef168f53f7205d, 0x3fce56ca1e101a1b, // -0.9715, 0.23702 - 0xbfef1c7abe284708, 0x3fcdf5163f01099a, // -0.97223, 0.23404 - 0xbfef2252f7763ada, 0x3fcd934fe5454311, // -0.97294, 0.23106 - 0xbfef2817fc4609ce, 0x3fcd31774d2cbdee, // -0.97364, 0.22807 - 0xbfef2dc9c9089a9d, 0x3fcccf8cb312b286, // -0.97434, 0.22508 - 0xbfef33685a3aaef0, 0x3fcc6d90535d74dc, // -0.97503, 0.22209 - 0xbfef38f3ac64e589, 0x3fcc0b826a7e4f63, // -0.9757, 0.2191 - 0xbfef3e6bbc1bbc65, 0x3fcba96334f15dad, // -0.97637, 0.21611 - 0xbfef43d085ff92dd, 0x3fcb4732ef3d6722, // -0.97703, 0.21311 - 0xbfef492206bcabb4, 0x3fcae4f1d5f3b9ab, // -0.97768, 0.21011 - 0xbfef4e603b0b2f2d, 0x3fca82a025b00451, // -0.97832, 0.20711 - 0xbfef538b1faf2d07, 0x3fca203e1b1831da, // -0.97895, 0.20411 - 0xbfef58a2b1789e84, 0x3fc9bdcbf2dc4366, // -0.97957, 0.2011 - 0xbfef5da6ed43685d, 0x3fc95b49e9b62af9, // -0.98018, 0.1981 - 0xbfef6297cff75cb0, 0x3fc8f8b83c69a60a, // -0.98079, 0.19509 - 0xbfef677556883cee, 0x3fc8961727c41804, // -0.98138, 0.19208 - 0xbfef6c3f7df5bbb7, 0x3fc83366e89c64c5, // -0.98196, 0.18907 - 0xbfef70f6434b7eb7, 0x3fc7d0a7bbd2cb1b, // -0.98254, 0.18606 - 0xbfef7599a3a12077, 0x3fc76dd9de50bf31, // -0.98311, 0.18304 - 0xbfef7a299c1a322a, 0x3fc70afd8d08c4ff, // -0.98366, 0.18002 - 0xbfef7ea629e63d6e, 0x3fc6a81304f64ab2, // -0.98421, 0.177 - 0xbfef830f4a40c60c, 0x3fc6451a831d830d, // -0.98475, 0.17398 - 0xbfef8764fa714ba9, 0x3fc5e214448b3fc6, // -0.98528, 0.17096 - 0xbfef8ba737cb4b78, 0x3fc57f008654cbde, // -0.9858, 0.16794 - 0xbfef8fd5ffae41db, 0x3fc51bdf8597c5f2, // -0.98631, 0.16491 - 0xbfef93f14f85ac08, 0x3fc4b8b17f79fa88, // -0.98681, 0.16189 - 0xbfef97f924c9099b, 0x3fc45576b1293e5a, // -0.9873, 0.15886 - 0xbfef9bed7cfbde29, 0x3fc3f22f57db4893, // -0.98778, 0.15583 - 0xbfef9fce55adb2c8, 0x3fc38edbb0cd8d14, // -0.98826, 0.1528 - 0xbfefa39bac7a1791, 0x3fc32b7bf94516a7, // -0.98872, 0.14976 - 0xbfefa7557f08a517, 0x3fc2c8106e8e613a, // -0.98918, 0.14673 - 0xbfefaafbcb0cfddc, 0x3fc264994dfd340a, // -0.98962, 0.1437 - 0xbfefae8e8e46cfbb, 0x3fc20116d4ec7bce, // -0.99006, 0.14066 - 0xbfefb20dc681d54d, 0x3fc19d8940be24e7, // -0.99049, 0.13762 - 0xbfefb5797195d741, 0x3fc139f0cedaf576, // -0.9909, 0.13458 - 0xbfefb8d18d66adb7, 0x3fc0d64dbcb26786, // -0.99131, 0.13154 - 0xbfefbc1617e44186, 0x3fc072a047ba831d, // -0.99171, 0.1285 - 0xbfefbf470f0a8d88, 0x3fc00ee8ad6fb85b, // -0.9921, 0.12545 - 0xbfefc26470e19fd3, 0x3fbf564e56a9730e, // -0.99248, 0.12241 - 0xbfefc56e3b7d9af6, 0x3fbe8eb7fde4aa3e, // -0.99285, 0.11937 - 0xbfefc8646cfeb721, 0x3fbdc70ecbae9fc8, // -0.99321, 0.11632 - 0xbfefcb4703914354, 0x3fbcff533b307dc1, // -0.99356, 0.11327 - 0xbfefce15fd6da67b, 0x3fbc3785c79ec2d5, // -0.99391, 0.11022 - 0xbfefd0d158d86087, 0x3fbb6fa6ec38f64c, // -0.99424, 0.10717 - 0xbfefd37914220b84, 0x3fbaa7b724495c04, // -0.99456, 0.10412 - 0xbfefd60d2da75c9e, 0x3fb9dfb6eb24a85c, // -0.99488, 0.10107 - 0xbfefd88da3d12526, 0x3fb917a6bc29b42c, // -0.99518, 0.098017 - 0xbfefdafa7514538c, 0x3fb84f8712c130a0, // -0.99548, 0.094963 - 0xbfefdd539ff1f456, 0x3fb787586a5d5b21, // -0.99577, 0.091909 - 0xbfefdf9922f73307, 0x3fb6bf1b3e79b129, // -0.99604, 0.088854 - 0xbfefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // -0.99631, 0.085797 - 0xbfefe3e92be9d886, 0x3fb52e774a4d4d0a, // -0.99657, 0.08274 - 0xbfefe5f3af2e3940, 0x3fb4661179272096, // -0.99682, 0.079682 - 0xbfefe7ea85482d60, 0x3fb39d9f12c5a299, // -0.99706, 0.076624 - 0xbfefe9cdad01883a, 0x3fb2d52092ce19f6, // -0.99729, 0.073565 - 0xbfefeb9d2530410f, 0x3fb20c9674ed444c, // -0.99751, 0.070505 - 0xbfefed58ecb673c4, 0x3fb1440134d709b2, // -0.99772, 0.067444 - 0xbfefef0102826191, 0x3fb07b614e463064, // -0.99793, 0.064383 - 0xbfeff095658e71ad, 0x3faf656e79f820e0, // -0.99812, 0.061321 - 0xbfeff21614e131ed, 0x3fadd406f9808ec8, // -0.9983, 0.058258 - 0xbfeff3830f8d575c, 0x3fac428d12c0d7e3, // -0.99848, 0.055195 - 0xbfeff4dc54b1bed3, 0x3faab101bd5f8317, // -0.99864, 0.052132 - 0xbfeff621e3796d7e, 0x3fa91f65f10dd814, // -0.9988, 0.049068 - 0xbfeff753bb1b9164, 0x3fa78dbaa5874685, // -0.99894, 0.046003 - 0xbfeff871dadb81df, 0x3fa5fc00d290cd43, // -0.99908, 0.042938 - 0xbfeff97c4208c014, 0x3fa46a396ff86179, // -0.9992, 0.039873 - 0xbfeffa72effef75d, 0x3fa2d865759455cd, // -0.99932, 0.036807 - 0xbfeffb55e425fdae, 0x3fa14685db42c17e, // -0.99943, 0.033741 - 0xbfeffc251df1d3f8, 0x3f9f693731d1cf01, // -0.99953, 0.030675 - 0xbfeffce09ce2a679, 0x3f9c454f4ce53b1c, // -0.99962, 0.027608 - 0xbfeffd886084cd0d, 0x3f992155f7a3667e, // -0.9997, 0.024541 - 0xbfeffe1c6870cb77, 0x3f95fd4d21fab226, // -0.99977, 0.021474 - 0xbfeffe9cb44b51a1, 0x3f92d936bbe30efd, // -0.99983, 0.018407 - 0xbfefff0943c53bd1, 0x3f8f6a296ab997ca, // -0.99988, 0.015339 - 0xbfefff62169b92db, 0x3f8921d1fcdec784, // -0.99992, 0.012272 - 0xbfefffa72c978c4f, 0x3f82d96b0e509703, // -0.99996, 0.0092038 - 0xbfefffd8858e8a92, 0x3f7921f0fe670071, // -0.99998, 0.0061359 - 0xbfeffff621621d02, 0x3f6921f8becca4ba, // -1, 0.003068 - 0xbff0000000000000, 0x0000000000000000, // -1, 0 - 0xbfeffff621621d02, 0xbf6921f8becca4ba, // -1, -0.003068 - 0xbfefffd8858e8a92, 0xbf7921f0fe670071, // -0.99998,-0.0061359 - 0xbfefffa72c978c4f, 0xbf82d96b0e509703, // -0.99996,-0.0092038 - 0xbfefff62169b92db, 0xbf8921d1fcdec784, // -0.99992, -0.012272 - 0xbfefff0943c53bd1, 0xbf8f6a296ab997ca, // -0.99988, -0.015339 - 0xbfeffe9cb44b51a1, 0xbf92d936bbe30efd, // -0.99983, -0.018407 - 0xbfeffe1c6870cb77, 0xbf95fd4d21fab226, // -0.99977, -0.021474 - 0xbfeffd886084cd0d, 0xbf992155f7a3667e, // -0.9997, -0.024541 - 0xbfeffce09ce2a679, 0xbf9c454f4ce53b1c, // -0.99962, -0.027608 - 0xbfeffc251df1d3f8, 0xbf9f693731d1cf01, // -0.99953, -0.030675 - 0xbfeffb55e425fdae, 0xbfa14685db42c17e, // -0.99943, -0.033741 - 0xbfeffa72effef75d, 0xbfa2d865759455cd, // -0.99932, -0.036807 - 0xbfeff97c4208c014, 0xbfa46a396ff86179, // -0.9992, -0.039873 - 0xbfeff871dadb81df, 0xbfa5fc00d290cd43, // -0.99908, -0.042938 - 0xbfeff753bb1b9164, 0xbfa78dbaa5874685, // -0.99894, -0.046003 - 0xbfeff621e3796d7e, 0xbfa91f65f10dd814, // -0.9988, -0.049068 - 0xbfeff4dc54b1bed3, 0xbfaab101bd5f8317, // -0.99864, -0.052132 - 0xbfeff3830f8d575c, 0xbfac428d12c0d7e3, // -0.99848, -0.055195 - 0xbfeff21614e131ed, 0xbfadd406f9808ec8, // -0.9983, -0.058258 - 0xbfeff095658e71ad, 0xbfaf656e79f820e0, // -0.99812, -0.061321 - 0xbfefef0102826191, 0xbfb07b614e463064, // -0.99793, -0.064383 - 0xbfefed58ecb673c4, 0xbfb1440134d709b2, // -0.99772, -0.067444 - 0xbfefeb9d2530410f, 0xbfb20c9674ed444c, // -0.99751, -0.070505 - 0xbfefe9cdad01883a, 0xbfb2d52092ce19f6, // -0.99729, -0.073565 - 0xbfefe7ea85482d60, 0xbfb39d9f12c5a299, // -0.99706, -0.076624 - 0xbfefe5f3af2e3940, 0xbfb4661179272096, // -0.99682, -0.079682 - 0xbfefe3e92be9d886, 0xbfb52e774a4d4d0a, // -0.99657, -0.08274 - 0xbfefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // -0.99631, -0.085797 - 0xbfefdf9922f73307, 0xbfb6bf1b3e79b129, // -0.99604, -0.088854 - 0xbfefdd539ff1f456, 0xbfb787586a5d5b21, // -0.99577, -0.091909 - 0xbfefdafa7514538c, 0xbfb84f8712c130a0, // -0.99548, -0.094963 - 0xbfefd88da3d12526, 0xbfb917a6bc29b42c, // -0.99518, -0.098017 - 0xbfefd60d2da75c9e, 0xbfb9dfb6eb24a85c, // -0.99488, -0.10107 - 0xbfefd37914220b84, 0xbfbaa7b724495c04, // -0.99456, -0.10412 - 0xbfefd0d158d86087, 0xbfbb6fa6ec38f64c, // -0.99424, -0.10717 - 0xbfefce15fd6da67b, 0xbfbc3785c79ec2d5, // -0.99391, -0.11022 - 0xbfefcb4703914354, 0xbfbcff533b307dc1, // -0.99356, -0.11327 - 0xbfefc8646cfeb721, 0xbfbdc70ecbae9fc8, // -0.99321, -0.11632 - 0xbfefc56e3b7d9af6, 0xbfbe8eb7fde4aa3e, // -0.99285, -0.11937 - 0xbfefc26470e19fd3, 0xbfbf564e56a9730e, // -0.99248, -0.12241 - 0xbfefbf470f0a8d88, 0xbfc00ee8ad6fb85b, // -0.9921, -0.12545 - 0xbfefbc1617e44186, 0xbfc072a047ba831d, // -0.99171, -0.1285 - 0xbfefb8d18d66adb7, 0xbfc0d64dbcb26786, // -0.99131, -0.13154 - 0xbfefb5797195d741, 0xbfc139f0cedaf576, // -0.9909, -0.13458 - 0xbfefb20dc681d54d, 0xbfc19d8940be24e7, // -0.99049, -0.13762 - 0xbfefae8e8e46cfbb, 0xbfc20116d4ec7bce, // -0.99006, -0.14066 - 0xbfefaafbcb0cfddc, 0xbfc264994dfd340a, // -0.98962, -0.1437 - 0xbfefa7557f08a517, 0xbfc2c8106e8e613a, // -0.98918, -0.14673 - 0xbfefa39bac7a1791, 0xbfc32b7bf94516a7, // -0.98872, -0.14976 - 0xbfef9fce55adb2c8, 0xbfc38edbb0cd8d14, // -0.98826, -0.1528 - 0xbfef9bed7cfbde29, 0xbfc3f22f57db4893, // -0.98778, -0.15583 - 0xbfef97f924c9099b, 0xbfc45576b1293e5a, // -0.9873, -0.15886 - 0xbfef93f14f85ac08, 0xbfc4b8b17f79fa88, // -0.98681, -0.16189 - 0xbfef8fd5ffae41db, 0xbfc51bdf8597c5f2, // -0.98631, -0.16491 - 0xbfef8ba737cb4b78, 0xbfc57f008654cbde, // -0.9858, -0.16794 - 0xbfef8764fa714ba9, 0xbfc5e214448b3fc6, // -0.98528, -0.17096 - 0xbfef830f4a40c60c, 0xbfc6451a831d830d, // -0.98475, -0.17398 - 0xbfef7ea629e63d6e, 0xbfc6a81304f64ab2, // -0.98421, -0.177 - 0xbfef7a299c1a322a, 0xbfc70afd8d08c4ff, // -0.98366, -0.18002 - 0xbfef7599a3a12077, 0xbfc76dd9de50bf31, // -0.98311, -0.18304 - 0xbfef70f6434b7eb7, 0xbfc7d0a7bbd2cb1b, // -0.98254, -0.18606 - 0xbfef6c3f7df5bbb7, 0xbfc83366e89c64c5, // -0.98196, -0.18907 - 0xbfef677556883cee, 0xbfc8961727c41804, // -0.98138, -0.19208 - 0xbfef6297cff75cb0, 0xbfc8f8b83c69a60a, // -0.98079, -0.19509 - 0xbfef5da6ed43685d, 0xbfc95b49e9b62af9, // -0.98018, -0.1981 - 0xbfef58a2b1789e84, 0xbfc9bdcbf2dc4366, // -0.97957, -0.2011 - 0xbfef538b1faf2d07, 0xbfca203e1b1831da, // -0.97895, -0.20411 - 0xbfef4e603b0b2f2d, 0xbfca82a025b00451, // -0.97832, -0.20711 - 0xbfef492206bcabb4, 0xbfcae4f1d5f3b9ab, // -0.97768, -0.21011 - 0xbfef43d085ff92dd, 0xbfcb4732ef3d6722, // -0.97703, -0.21311 - 0xbfef3e6bbc1bbc65, 0xbfcba96334f15dad, // -0.97637, -0.21611 - 0xbfef38f3ac64e589, 0xbfcc0b826a7e4f63, // -0.9757, -0.2191 - 0xbfef33685a3aaef0, 0xbfcc6d90535d74dc, // -0.97503, -0.22209 - 0xbfef2dc9c9089a9d, 0xbfcccf8cb312b286, // -0.97434, -0.22508 - 0xbfef2817fc4609ce, 0xbfcd31774d2cbdee, // -0.97364, -0.22807 - 0xbfef2252f7763ada, 0xbfcd934fe5454311, // -0.97294, -0.23106 - 0xbfef1c7abe284708, 0xbfcdf5163f01099a, // -0.97223, -0.23404 - 0xbfef168f53f7205d, 0xbfce56ca1e101a1b, // -0.9715, -0.23702 - 0xbfef1090bc898f5f, 0xbfceb86b462de348, // -0.97077, -0.24 - 0xbfef0a7efb9230d7, 0xbfcf19f97b215f1a, // -0.97003, -0.24298 - 0xbfef045a14cf738c, 0xbfcf7b7480bd3801, // -0.96928, -0.24596 - 0xbfeefe220c0b95ec, 0xbfcfdcdc1adfedf8, // -0.96852, -0.24893 - 0xbfeef7d6e51ca3c0, 0xbfd01f1806b9fdd2, // -0.96775, -0.2519 - 0xbfeef178a3e473c2, 0xbfd04fb80e37fdae, // -0.96698, -0.25487 - 0xbfeeeb074c50a544, 0xbfd0804e05eb661e, // -0.96619, -0.25783 - 0xbfeee482e25a9dbc, 0xbfd0b0d9cfdbdb90, // -0.96539, -0.26079 - 0xbfeeddeb6a078651, 0xbfd0e15b4e1749cd, // -0.96459, -0.26375 - 0xbfeed740e7684963, 0xbfd111d262b1f677, // -0.96378, -0.26671 - 0xbfeed0835e999009, 0xbfd1423eefc69378, // -0.96295, -0.26967 - 0xbfeec9b2d3c3bf84, 0xbfd172a0d7765177, // -0.96212, -0.27262 - 0xbfeec2cf4b1af6b2, 0xbfd1a2f7fbe8f243, // -0.96128, -0.27557 - 0xbfeebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // -0.96043, -0.27852 - 0xbfeeb4cf515b8811, 0xbfd2038583d727bd, // -0.95957, -0.28146 - 0xbfeeadb2e8e7a88e, 0xbfd233bbabc3bb72, // -0.9587, -0.28441 - 0xbfeea68393e65800, 0xbfd263e6995554ba, // -0.95783, -0.28735 - 0xbfee9f4156c62dda, 0xbfd294062ed59f05, // -0.95694, -0.29028 - 0xbfee97ec36016b30, 0xbfd2c41a4e954520, // -0.95605, -0.29322 - 0xbfee9084361df7f3, 0xbfd2f422daec0386, // -0.95514, -0.29615 - 0xbfee89095bad6025, 0xbfd3241fb638baaf, // -0.95423, -0.29908 - 0xbfee817bab4cd10d, 0xbfd35410c2e18152, // -0.95331, -0.30201 - 0xbfee79db29a5165a, 0xbfd383f5e353b6aa, // -0.95238, -0.30493 - 0xbfee7227db6a9744, 0xbfd3b3cefa0414b7, // -0.95144, -0.30785 - 0xbfee6a61c55d53a7, 0xbfd3e39be96ec271, // -0.95049, -0.31077 - 0xbfee6288ec48e112, 0xbfd4135c94176602, // -0.94953, -0.31368 - 0xbfee5a9d550467d3, 0xbfd44310dc8936f0, // -0.94856, -0.31659 - 0xbfee529f04729ffc, 0xbfd472b8a5571054, // -0.94759, -0.3195 - 0xbfee4a8dff81ce5e, 0xbfd4a253d11b82f3, // -0.9466, -0.32241 - 0xbfee426a4b2bc17e, 0xbfd4d1e24278e76a, // -0.94561, -0.32531 - 0xbfee3a33ec75ce85, 0xbfd50163dc197047, // -0.9446, -0.32821 - 0xbfee31eae870ce25, 0xbfd530d880af3c24, // -0.94359, -0.33111 - 0xbfee298f4439197a, 0xbfd5604012f467b4, // -0.94257, -0.334 - 0xbfee212104f686e5, 0xbfd58f9a75ab1fdd, // -0.94154, -0.33689 - 0xbfee18a02fdc66d9, 0xbfd5bee78b9db3b6, // -0.94051, -0.33978 - 0xbfee100cca2980ac, 0xbfd5ee27379ea693, // -0.93946, -0.34266 - 0xbfee0766d9280f54, 0xbfd61d595c88c203, // -0.9384, -0.34554 - 0xbfedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // -0.93734, -0.34842 - 0xbfedf5e36a9ba59c, 0xbfd67b949cad63ca, // -0.93627, -0.35129 - 0xbfeded05f7de47da, 0xbfd6aa9d7dc77e16, // -0.93518, -0.35416 - 0xbfede4160f6d8d81, 0xbfd6d998638a0cb5, // -0.93409, -0.35703 - 0xbfeddb13b6ccc23d, 0xbfd7088530fa459e, // -0.93299, -0.3599 - 0xbfedd1fef38a915a, 0xbfd73763c9261092, // -0.93188, -0.36276 - 0xbfedc8d7cb410260, 0xbfd766340f2418f6, // -0.93077, -0.36561 - 0xbfedbf9e4395759a, 0xbfd794f5e613dfae, // -0.92964, -0.36847 - 0xbfedb6526238a09b, 0xbfd7c3a9311dcce7, // -0.92851, -0.37132 - 0xbfedacf42ce68ab9, 0xbfd7f24dd37341e3, // -0.92736, -0.37416 - 0xbfeda383a9668988, 0xbfd820e3b04eaac4, // -0.92621, -0.37701 - 0xbfed9a00dd8b3d46, 0xbfd84f6aaaf3903f, // -0.92505, -0.37985 - 0xbfed906bcf328d46, 0xbfd87de2a6aea963, // -0.92388, -0.38268 - 0xbfed86c48445a450, 0xbfd8ac4b86d5ed44, // -0.9227, -0.38552 - 0xbfed7d0b02b8ecf9, 0xbfd8daa52ec8a4af, // -0.92151, -0.38835 - 0xbfed733f508c0dff, 0xbfd908ef81ef7bd1, // -0.92032, -0.39117 - 0xbfed696173c9e68b, 0xbfd9372a63bc93d7, // -0.91911, -0.39399 - 0xbfed5f7172888a7f, 0xbfd96555b7ab948f, // -0.9179, -0.39681 - 0xbfed556f52e93eb1, 0xbfd993716141bdfe, // -0.91668, -0.39962 - 0xbfed4b5b1b187524, 0xbfd9c17d440df9f2, // -0.91545, -0.40243 - 0xbfed4134d14dc93a, 0xbfd9ef7943a8ed8a, // -0.91421, -0.40524 - 0xbfed36fc7bcbfbdc, 0xbfda1d6543b50ac0, // -0.91296, -0.40804 - 0xbfed2cb220e0ef9f, 0xbfda4b4127dea1e4, // -0.91171, -0.41084 - 0xbfed2255c6e5a4e1, 0xbfda790cd3dbf31a, // -0.91044, -0.41364 - 0xbfed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // -0.90917, -0.41643 - 0xbfed0d672f59d2b9, 0xbfdad473125cdc08, // -0.90789, -0.41922 - 0xbfed02d4feb2bd92, 0xbfdb020d6c7f4009, // -0.9066, -0.422 - 0xbfecf830e8ce467b, 0xbfdb2f971db31972, // -0.9053, -0.42478 - 0xbfeced7af43cc773, 0xbfdb5d1009e15cc0, // -0.90399, -0.42756 - 0xbfece2b32799a060, 0xbfdb8a7814fd5693, // -0.90267, -0.43033 - 0xbfecd7d9898b32f6, 0xbfdbb7cf2304bd01, // -0.90135, -0.43309 - 0xbfecccee20c2de9f, 0xbfdbe51517ffc0d9, // -0.90002, -0.43586 - 0xbfecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // -0.89867, -0.43862 - 0xbfecb6e20a00da99, 0xbfdc3f6d47263129, // -0.89732, -0.44137 - 0xbfecabc169a0b901, 0xbfdc6c7f4997000a, // -0.89597, -0.44412 - 0xbfeca08f19b9c449, 0xbfdc997fc3865388, // -0.8946, -0.44687 - 0xbfec954b213411f5, 0xbfdcc66e9931c45d, // -0.89322, -0.44961 - 0xbfec89f587029c13, 0xbfdcf34baee1cd21, // -0.89184, -0.45235 - 0xbfec7e8e52233cf3, 0xbfdd2016e8e9db5b, // -0.89045, -0.45508 - 0xbfec7315899eaad7, 0xbfdd4cd02ba8609c, // -0.88905, -0.45781 - 0xbfec678b3488739b, 0xbfdd79775b86e389, // -0.88764, -0.46054 - 0xbfec5bef59fef85a, 0xbfdda60c5cfa10d8, // -0.88622, -0.46326 - 0xbfec5042012b6907, 0xbfddd28f1481cc58, // -0.8848, -0.46598 - 0xbfec44833141c004, 0xbfddfeff66a941de, // -0.88336, -0.46869 - 0xbfec38b2f180bdb1, 0xbfde2b5d3806f63b, // -0.88192, -0.4714 - 0xbfec2cd14931e3f1, 0xbfde57a86d3cd824, // -0.88047, -0.4741 - 0xbfec20de3fa971b0, 0xbfde83e0eaf85113, // -0.87901, -0.4768 - 0xbfec14d9dc465e58, 0xbfdeb00695f25620, // -0.87755, -0.47949 - 0xbfec08c426725549, 0xbfdedc1952ef78d5, // -0.87607, -0.48218 - 0xbfebfc9d25a1b147, 0xbfdf081906bff7fd, // -0.87459, -0.48487 - 0xbfebf064e15377dd, 0xbfdf3405963fd068, // -0.87309, -0.48755 - 0xbfebe41b611154c1, 0xbfdf5fdee656cda3, // -0.8716, -0.49023 - 0xbfebd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // -0.87009, -0.4929 - 0xbfebcb54cb0d2327, 0xbfdfb7575c24d2de, // -0.86857, -0.49557 - 0xbfebbed7c49380ea, 0xbfdfe2f64be7120f, // -0.86705, -0.49823 - 0xbfebb249a0b6c40d, 0xbfe00740c82b82e0, // -0.86551, -0.50089 - 0xbfeba5aa673590d2, 0xbfe01cfc874c3eb7, // -0.86397, -0.50354 - 0xbfeb98fa1fd9155e, 0xbfe032ae55edbd95, // -0.86242, -0.50619 - 0xbfeb8c38d27504e9, 0xbfe0485626ae221a, // -0.86087, -0.50883 - 0xbfeb7f6686e792ea, 0xbfe05df3ec31b8b6, // -0.8593, -0.51147 - 0xbfeb728345196e3e, 0xbfe073879922ffed, // -0.85773, -0.5141 - 0xbfeb658f14fdbc47, 0xbfe089112032b08c, // -0.85615, -0.51673 - 0xbfeb5889fe921405, 0xbfe09e907417c5e1, // -0.85456, -0.51936 - 0xbfeb4b7409de7925, 0xbfe0b405878f85ec, // -0.85296, -0.52198 - 0xbfeb3e4d3ef55712, 0xbfe0c9704d5d898f, // -0.85136, -0.52459 - 0xbfeb3115a5f37bf4, 0xbfe0ded0b84bc4b5, // -0.84974, -0.5272 - 0xbfeb23cd470013b4, 0xbfe0f426bb2a8e7d, // -0.84812, -0.5298 - 0xbfeb16742a4ca2f5, 0xbfe1097248d0a956, // -0.84649, -0.5324 - 0xbfeb090a58150200, 0xbfe11eb3541b4b22, // -0.84485, -0.535 - 0xbfeafb8fd89f57b6, 0xbfe133e9cfee254e, // -0.84321, -0.53759 - 0xbfeaee04b43c1474, 0xbfe14915af336ceb, // -0.84155, -0.54017 - 0xbfeae068f345ecef, 0xbfe15e36e4dbe2bc, // -0.83989, -0.54275 - 0xbfead2bc9e21d511, 0xbfe1734d63dedb49, // -0.83822, -0.54532 - 0xbfeac4ffbd3efac8, 0xbfe188591f3a46e5, // -0.83655, -0.54789 - 0xbfeab7325916c0d4, 0xbfe19d5a09f2b9b8, // -0.83486, -0.55046 - 0xbfeaa9547a2cb98e, 0xbfe1b250171373be, // -0.83317, -0.55302 - 0xbfea9b66290ea1a3, 0xbfe1c73b39ae68c8, // -0.83147, -0.55557 - 0xbfea8d676e545ad2, 0xbfe1dc1b64dc4872, // -0.82976, -0.55812 - 0xbfea7f58529fe69d, 0xbfe1f0f08bbc861b, // -0.82805, -0.56066 - 0xbfea7138de9d60f5, 0xbfe205baa17560d6, // -0.82632, -0.5632 - 0xbfea63091b02fae2, 0xbfe21a799933eb58, // -0.82459, -0.56573 - 0xbfea54c91090f524, 0xbfe22f2d662c13e1, // -0.82285, -0.56826 - 0xbfea4678c8119ac8, 0xbfe243d5fb98ac1f, // -0.8211, -0.57078 - 0xbfea38184a593bc6, 0xbfe258734cbb7110, // -0.81935, -0.5733 - 0xbfea29a7a0462782, 0xbfe26d054cdd12df, // -0.81758, -0.57581 - 0xbfea1b26d2c0a75e, 0xbfe2818bef4d3cba, // -0.81581, -0.57831 - 0xbfea0c95eabaf937, 0xbfe2960727629ca8, // -0.81404, -0.58081 - 0xbfe9fdf4f13149de, 0xbfe2aa76e87aeb58, // -0.81225, -0.58331 - 0xbfe9ef43ef29af94, 0xbfe2bedb25faf3ea, // -0.81046, -0.5858 - 0xbfe9e082edb42472, 0xbfe2d333d34e9bb7, // -0.80866, -0.58828 - 0xbfe9d1b1f5ea80d6, 0xbfe2e780e3e8ea16, // -0.80685, -0.59076 - 0xbfe9c2d110f075c3, 0xbfe2fbc24b441015, // -0.80503, -0.59323 - 0xbfe9b3e047f38741, 0xbfe30ff7fce17035, // -0.80321, -0.5957 - 0xbfe9a4dfa42b06b2, 0xbfe32421ec49a620, // -0.80138, -0.59816 - 0xbfe995cf2ed80d22, 0xbfe338400d0c8e57, // -0.79954, -0.60062 - 0xbfe986aef1457594, 0xbfe34c5252c14de1, // -0.79769, -0.60307 - 0xbfe9777ef4c7d742, 0xbfe36058b10659f3, // -0.79584, -0.60551 - 0xbfe9683f42bd7fe1, 0xbfe374531b817f8d, // -0.79398, -0.60795 - 0xbfe958efe48e6dd7, 0xbfe3884185dfeb22, // -0.79211, -0.61038 - 0xbfe94990e3ac4a6c, 0xbfe39c23e3d63029, // -0.79023, -0.61281 - 0xbfe93a22499263fc, 0xbfe3affa292050b9, // -0.78835, -0.61523 - 0xbfe92aa41fc5a815, 0xbfe3c3c44981c517, // -0.78646, -0.61765 - 0xbfe91b166fd49da2, 0xbfe3d78238c58343, // -0.78456, -0.62006 - 0xbfe90b7943575efe, 0xbfe3eb33eabe0680, // -0.78265, -0.62246 - 0xbfe8fbcca3ef940d, 0xbfe3fed9534556d4, // -0.78074, -0.62486 - 0xbfe8ec109b486c49, 0xbfe41272663d108c, // -0.77882, -0.62725 - 0xbfe8dc45331698cc, 0xbfe425ff178e6bb1, // -0.77689, -0.62964 - 0xbfe8cc6a75184655, 0xbfe4397f5b2a4380, // -0.77495, -0.63202 - 0xbfe8bc806b151741, 0xbfe44cf325091dd6, // -0.77301, -0.63439 - 0xbfe8ac871ede1d88, 0xbfe4605a692b32a2, // -0.77106, -0.63676 - 0xbfe89c7e9a4dd4ab, 0xbfe473b51b987347, // -0.7691, -0.63912 - 0xbfe88c66e7481ba1, 0xbfe48703306091fe, // -0.76714, -0.64148 - 0xbfe87c400fba2ebf, 0xbfe49a449b9b0938, // -0.76517, -0.64383 - 0xbfe86c0a1d9aa195, 0xbfe4ad79516722f0, // -0.76319, -0.64618 - 0xbfe85bc51ae958cc, 0xbfe4c0a145ec0004, // -0.7612, -0.64851 - 0xbfe84b7111af83f9, 0xbfe4d3bc6d589f80, // -0.75921, -0.65085 - 0xbfe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // -0.75721, -0.65317 - 0xbfe82a9c13f545ff, 0xbfe4f9cc25cca486, // -0.7552, -0.65549 - 0xbfe81a1b33b57acc, 0xbfe50cc09f59a09b, // -0.75319, -0.65781 - 0xbfe8098b756e52fa, 0xbfe51fa81cd99aa6, // -0.75117, -0.66011 - 0xbfe7f8ece3571771, 0xbfe5328292a35596, // -0.74914, -0.66242 - 0xbfe7e83f87b03686, 0xbfe5454ff5159dfb, // -0.7471, -0.66471 - 0xbfe7d7836cc33db2, 0xbfe5581038975137, // -0.74506, -0.667 - 0xbfe7c6b89ce2d333, 0xbfe56ac35197649e, // -0.74301, -0.66928 - 0xbfe7b5df226aafb0, 0xbfe57d69348cec9f, // -0.74095, -0.67156 - 0xbfe7a4f707bf97d2, 0xbfe59001d5f723df, // -0.73889, -0.67383 - 0xbfe79400574f55e4, 0xbfe5a28d2a5d7250, // -0.73682, -0.67609 - 0xbfe782fb1b90b35b, 0xbfe5b50b264f7448, // -0.73474, -0.67835 - 0xbfe771e75f037261, 0xbfe5c77bbe65018c, // -0.73265, -0.6806 - 0xbfe760c52c304764, 0xbfe5d9dee73e345c, // -0.73056, -0.68285 - 0xbfe74f948da8d28d, 0xbfe5ec3495837074, // -0.72846, -0.68508 - 0xbfe73e558e079942, 0xbfe5fe7cbde56a0f, // -0.72636, -0.68732 - 0xbfe72d0837efff97, 0xbfe610b7551d2cde, // -0.72425, -0.68954 - 0xbfe71bac960e41bf, 0xbfe622e44fec22ff, // -0.72213, -0.69176 - 0xbfe70a42b3176d7a, 0xbfe63503a31c1be8, // -0.72, -0.69397 - 0xbfe6f8ca99c95b75, 0xbfe64715437f535b, // -0.71787, -0.69618 - 0xbfe6e74454eaa8ae, 0xbfe6591925f0783e, // -0.71573, -0.69838 - 0xbfe6d5afef4aafcc, 0xbfe66b0f3f52b386, // -0.71358, -0.70057 - 0xbfe6c40d73c18275, 0xbfe67cf78491af10, // -0.71143, -0.70275 - 0xbfe6b25ced2fe29c, 0xbfe68ed1eaa19c71, // -0.70927, -0.70493 - 0xbfe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // -0.70711, -0.70711 - 0xbfe68ed1eaa19c71, 0xbfe6b25ced2fe29c, // -0.70493, -0.70927 - 0xbfe67cf78491af10, 0xbfe6c40d73c18275, // -0.70275, -0.71143 - 0xbfe66b0f3f52b386, 0xbfe6d5afef4aafcc, // -0.70057, -0.71358 - 0xbfe6591925f0783e, 0xbfe6e74454eaa8ae, // -0.69838, -0.71573 - 0xbfe64715437f535b, 0xbfe6f8ca99c95b75, // -0.69618, -0.71787 - 0xbfe63503a31c1be8, 0xbfe70a42b3176d7a, // -0.69397, -0.72 - 0xbfe622e44fec22ff, 0xbfe71bac960e41bf, // -0.69176, -0.72213 - 0xbfe610b7551d2cde, 0xbfe72d0837efff97, // -0.68954, -0.72425 - 0xbfe5fe7cbde56a0f, 0xbfe73e558e079942, // -0.68732, -0.72636 - 0xbfe5ec3495837074, 0xbfe74f948da8d28d, // -0.68508, -0.72846 - 0xbfe5d9dee73e345c, 0xbfe760c52c304764, // -0.68285, -0.73056 - 0xbfe5c77bbe65018c, 0xbfe771e75f037261, // -0.6806, -0.73265 - 0xbfe5b50b264f7448, 0xbfe782fb1b90b35b, // -0.67835, -0.73474 - 0xbfe5a28d2a5d7250, 0xbfe79400574f55e4, // -0.67609, -0.73682 - 0xbfe59001d5f723df, 0xbfe7a4f707bf97d2, // -0.67383, -0.73889 - 0xbfe57d69348cec9f, 0xbfe7b5df226aafb0, // -0.67156, -0.74095 - 0xbfe56ac35197649e, 0xbfe7c6b89ce2d333, // -0.66928, -0.74301 - 0xbfe5581038975137, 0xbfe7d7836cc33db2, // -0.667, -0.74506 - 0xbfe5454ff5159dfb, 0xbfe7e83f87b03686, // -0.66471, -0.7471 - 0xbfe5328292a35596, 0xbfe7f8ece3571771, // -0.66242, -0.74914 - 0xbfe51fa81cd99aa6, 0xbfe8098b756e52fa, // -0.66011, -0.75117 - 0xbfe50cc09f59a09b, 0xbfe81a1b33b57acc, // -0.65781, -0.75319 - 0xbfe4f9cc25cca486, 0xbfe82a9c13f545ff, // -0.65549, -0.7552 - 0xbfe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // -0.65317, -0.75721 - 0xbfe4d3bc6d589f80, 0xbfe84b7111af83f9, // -0.65085, -0.75921 - 0xbfe4c0a145ec0004, 0xbfe85bc51ae958cc, // -0.64851, -0.7612 - 0xbfe4ad79516722f0, 0xbfe86c0a1d9aa195, // -0.64618, -0.76319 - 0xbfe49a449b9b0938, 0xbfe87c400fba2ebf, // -0.64383, -0.76517 - 0xbfe48703306091fe, 0xbfe88c66e7481ba1, // -0.64148, -0.76714 - 0xbfe473b51b987347, 0xbfe89c7e9a4dd4ab, // -0.63912, -0.7691 - 0xbfe4605a692b32a2, 0xbfe8ac871ede1d88, // -0.63676, -0.77106 - 0xbfe44cf325091dd6, 0xbfe8bc806b151741, // -0.63439, -0.77301 - 0xbfe4397f5b2a4380, 0xbfe8cc6a75184655, // -0.63202, -0.77495 - 0xbfe425ff178e6bb1, 0xbfe8dc45331698cc, // -0.62964, -0.77689 - 0xbfe41272663d108c, 0xbfe8ec109b486c49, // -0.62725, -0.77882 - 0xbfe3fed9534556d4, 0xbfe8fbcca3ef940d, // -0.62486, -0.78074 - 0xbfe3eb33eabe0680, 0xbfe90b7943575efe, // -0.62246, -0.78265 - 0xbfe3d78238c58343, 0xbfe91b166fd49da2, // -0.62006, -0.78456 - 0xbfe3c3c44981c517, 0xbfe92aa41fc5a815, // -0.61765, -0.78646 - 0xbfe3affa292050b9, 0xbfe93a22499263fc, // -0.61523, -0.78835 - 0xbfe39c23e3d63029, 0xbfe94990e3ac4a6c, // -0.61281, -0.79023 - 0xbfe3884185dfeb22, 0xbfe958efe48e6dd7, // -0.61038, -0.79211 - 0xbfe374531b817f8d, 0xbfe9683f42bd7fe1, // -0.60795, -0.79398 - 0xbfe36058b10659f3, 0xbfe9777ef4c7d742, // -0.60551, -0.79584 - 0xbfe34c5252c14de1, 0xbfe986aef1457594, // -0.60307, -0.79769 - 0xbfe338400d0c8e57, 0xbfe995cf2ed80d22, // -0.60062, -0.79954 - 0xbfe32421ec49a620, 0xbfe9a4dfa42b06b2, // -0.59816, -0.80138 - 0xbfe30ff7fce17035, 0xbfe9b3e047f38741, // -0.5957, -0.80321 - 0xbfe2fbc24b441015, 0xbfe9c2d110f075c3, // -0.59323, -0.80503 - 0xbfe2e780e3e8ea16, 0xbfe9d1b1f5ea80d6, // -0.59076, -0.80685 - 0xbfe2d333d34e9bb7, 0xbfe9e082edb42472, // -0.58828, -0.80866 - 0xbfe2bedb25faf3ea, 0xbfe9ef43ef29af94, // -0.5858, -0.81046 - 0xbfe2aa76e87aeb58, 0xbfe9fdf4f13149de, // -0.58331, -0.81225 - 0xbfe2960727629ca8, 0xbfea0c95eabaf937, // -0.58081, -0.81404 - 0xbfe2818bef4d3cba, 0xbfea1b26d2c0a75e, // -0.57831, -0.81581 - 0xbfe26d054cdd12df, 0xbfea29a7a0462782, // -0.57581, -0.81758 - 0xbfe258734cbb7110, 0xbfea38184a593bc6, // -0.5733, -0.81935 - 0xbfe243d5fb98ac1f, 0xbfea4678c8119ac8, // -0.57078, -0.8211 - 0xbfe22f2d662c13e1, 0xbfea54c91090f524, // -0.56826, -0.82285 - 0xbfe21a799933eb58, 0xbfea63091b02fae2, // -0.56573, -0.82459 - 0xbfe205baa17560d6, 0xbfea7138de9d60f5, // -0.5632, -0.82632 - 0xbfe1f0f08bbc861b, 0xbfea7f58529fe69d, // -0.56066, -0.82805 - 0xbfe1dc1b64dc4872, 0xbfea8d676e545ad2, // -0.55812, -0.82976 - 0xbfe1c73b39ae68c8, 0xbfea9b66290ea1a3, // -0.55557, -0.83147 - 0xbfe1b250171373be, 0xbfeaa9547a2cb98e, // -0.55302, -0.83317 - 0xbfe19d5a09f2b9b8, 0xbfeab7325916c0d4, // -0.55046, -0.83486 - 0xbfe188591f3a46e5, 0xbfeac4ffbd3efac8, // -0.54789, -0.83655 - 0xbfe1734d63dedb49, 0xbfead2bc9e21d511, // -0.54532, -0.83822 - 0xbfe15e36e4dbe2bc, 0xbfeae068f345ecef, // -0.54275, -0.83989 - 0xbfe14915af336ceb, 0xbfeaee04b43c1474, // -0.54017, -0.84155 - 0xbfe133e9cfee254e, 0xbfeafb8fd89f57b6, // -0.53759, -0.84321 - 0xbfe11eb3541b4b22, 0xbfeb090a58150200, // -0.535, -0.84485 - 0xbfe1097248d0a956, 0xbfeb16742a4ca2f5, // -0.5324, -0.84649 - 0xbfe0f426bb2a8e7d, 0xbfeb23cd470013b4, // -0.5298, -0.84812 - 0xbfe0ded0b84bc4b5, 0xbfeb3115a5f37bf4, // -0.5272, -0.84974 - 0xbfe0c9704d5d898f, 0xbfeb3e4d3ef55712, // -0.52459, -0.85136 - 0xbfe0b405878f85ec, 0xbfeb4b7409de7925, // -0.52198, -0.85296 - 0xbfe09e907417c5e1, 0xbfeb5889fe921405, // -0.51936, -0.85456 - 0xbfe089112032b08c, 0xbfeb658f14fdbc47, // -0.51673, -0.85615 - 0xbfe073879922ffed, 0xbfeb728345196e3e, // -0.5141, -0.85773 - 0xbfe05df3ec31b8b6, 0xbfeb7f6686e792ea, // -0.51147, -0.8593 - 0xbfe0485626ae221a, 0xbfeb8c38d27504e9, // -0.50883, -0.86087 - 0xbfe032ae55edbd95, 0xbfeb98fa1fd9155e, // -0.50619, -0.86242 - 0xbfe01cfc874c3eb7, 0xbfeba5aa673590d2, // -0.50354, -0.86397 - 0xbfe00740c82b82e0, 0xbfebb249a0b6c40d, // -0.50089, -0.86551 - 0xbfdfe2f64be7120f, 0xbfebbed7c49380ea, // -0.49823, -0.86705 - 0xbfdfb7575c24d2de, 0xbfebcb54cb0d2327, // -0.49557, -0.86857 - 0xbfdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // -0.4929, -0.87009 - 0xbfdf5fdee656cda3, 0xbfebe41b611154c1, // -0.49023, -0.8716 - 0xbfdf3405963fd068, 0xbfebf064e15377dd, // -0.48755, -0.87309 - 0xbfdf081906bff7fd, 0xbfebfc9d25a1b147, // -0.48487, -0.87459 - 0xbfdedc1952ef78d5, 0xbfec08c426725549, // -0.48218, -0.87607 - 0xbfdeb00695f25620, 0xbfec14d9dc465e58, // -0.47949, -0.87755 - 0xbfde83e0eaf85113, 0xbfec20de3fa971b0, // -0.4768, -0.87901 - 0xbfde57a86d3cd824, 0xbfec2cd14931e3f1, // -0.4741, -0.88047 - 0xbfde2b5d3806f63b, 0xbfec38b2f180bdb1, // -0.4714, -0.88192 - 0xbfddfeff66a941de, 0xbfec44833141c004, // -0.46869, -0.88336 - 0xbfddd28f1481cc58, 0xbfec5042012b6907, // -0.46598, -0.8848 - 0xbfdda60c5cfa10d8, 0xbfec5bef59fef85a, // -0.46326, -0.88622 - 0xbfdd79775b86e389, 0xbfec678b3488739b, // -0.46054, -0.88764 - 0xbfdd4cd02ba8609c, 0xbfec7315899eaad7, // -0.45781, -0.88905 - 0xbfdd2016e8e9db5b, 0xbfec7e8e52233cf3, // -0.45508, -0.89045 - 0xbfdcf34baee1cd21, 0xbfec89f587029c13, // -0.45235, -0.89184 - 0xbfdcc66e9931c45d, 0xbfec954b213411f5, // -0.44961, -0.89322 - 0xbfdc997fc3865388, 0xbfeca08f19b9c449, // -0.44687, -0.8946 - 0xbfdc6c7f4997000a, 0xbfecabc169a0b901, // -0.44412, -0.89597 - 0xbfdc3f6d47263129, 0xbfecb6e20a00da99, // -0.44137, -0.89732 - 0xbfdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // -0.43862, -0.89867 - 0xbfdbe51517ffc0d9, 0xbfecccee20c2de9f, // -0.43586, -0.90002 - 0xbfdbb7cf2304bd01, 0xbfecd7d9898b32f6, // -0.43309, -0.90135 - 0xbfdb8a7814fd5693, 0xbfece2b32799a060, // -0.43033, -0.90267 - 0xbfdb5d1009e15cc0, 0xbfeced7af43cc773, // -0.42756, -0.90399 - 0xbfdb2f971db31972, 0xbfecf830e8ce467b, // -0.42478, -0.9053 - 0xbfdb020d6c7f4009, 0xbfed02d4feb2bd92, // -0.422, -0.9066 - 0xbfdad473125cdc08, 0xbfed0d672f59d2b9, // -0.41922, -0.90789 - 0xbfdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // -0.41643, -0.90917 - 0xbfda790cd3dbf31a, 0xbfed2255c6e5a4e1, // -0.41364, -0.91044 - 0xbfda4b4127dea1e4, 0xbfed2cb220e0ef9f, // -0.41084, -0.91171 - 0xbfda1d6543b50ac0, 0xbfed36fc7bcbfbdc, // -0.40804, -0.91296 - 0xbfd9ef7943a8ed8a, 0xbfed4134d14dc93a, // -0.40524, -0.91421 - 0xbfd9c17d440df9f2, 0xbfed4b5b1b187524, // -0.40243, -0.91545 - 0xbfd993716141bdfe, 0xbfed556f52e93eb1, // -0.39962, -0.91668 - 0xbfd96555b7ab948f, 0xbfed5f7172888a7f, // -0.39681, -0.9179 - 0xbfd9372a63bc93d7, 0xbfed696173c9e68b, // -0.39399, -0.91911 - 0xbfd908ef81ef7bd1, 0xbfed733f508c0dff, // -0.39117, -0.92032 - 0xbfd8daa52ec8a4af, 0xbfed7d0b02b8ecf9, // -0.38835, -0.92151 - 0xbfd8ac4b86d5ed44, 0xbfed86c48445a450, // -0.38552, -0.9227 - 0xbfd87de2a6aea963, 0xbfed906bcf328d46, // -0.38268, -0.92388 - 0xbfd84f6aaaf3903f, 0xbfed9a00dd8b3d46, // -0.37985, -0.92505 - 0xbfd820e3b04eaac4, 0xbfeda383a9668988, // -0.37701, -0.92621 - 0xbfd7f24dd37341e3, 0xbfedacf42ce68ab9, // -0.37416, -0.92736 - 0xbfd7c3a9311dcce7, 0xbfedb6526238a09b, // -0.37132, -0.92851 - 0xbfd794f5e613dfae, 0xbfedbf9e4395759a, // -0.36847, -0.92964 - 0xbfd766340f2418f6, 0xbfedc8d7cb410260, // -0.36561, -0.93077 - 0xbfd73763c9261092, 0xbfedd1fef38a915a, // -0.36276, -0.93188 - 0xbfd7088530fa459e, 0xbfeddb13b6ccc23d, // -0.3599, -0.93299 - 0xbfd6d998638a0cb5, 0xbfede4160f6d8d81, // -0.35703, -0.93409 - 0xbfd6aa9d7dc77e16, 0xbfeded05f7de47da, // -0.35416, -0.93518 - 0xbfd67b949cad63ca, 0xbfedf5e36a9ba59c, // -0.35129, -0.93627 - 0xbfd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // -0.34842, -0.93734 - 0xbfd61d595c88c203, 0xbfee0766d9280f54, // -0.34554, -0.9384 - 0xbfd5ee27379ea693, 0xbfee100cca2980ac, // -0.34266, -0.93946 - 0xbfd5bee78b9db3b6, 0xbfee18a02fdc66d9, // -0.33978, -0.94051 - 0xbfd58f9a75ab1fdd, 0xbfee212104f686e5, // -0.33689, -0.94154 - 0xbfd5604012f467b4, 0xbfee298f4439197a, // -0.334, -0.94257 - 0xbfd530d880af3c24, 0xbfee31eae870ce25, // -0.33111, -0.94359 - 0xbfd50163dc197047, 0xbfee3a33ec75ce85, // -0.32821, -0.9446 - 0xbfd4d1e24278e76a, 0xbfee426a4b2bc17e, // -0.32531, -0.94561 - 0xbfd4a253d11b82f3, 0xbfee4a8dff81ce5e, // -0.32241, -0.9466 - 0xbfd472b8a5571054, 0xbfee529f04729ffc, // -0.3195, -0.94759 - 0xbfd44310dc8936f0, 0xbfee5a9d550467d3, // -0.31659, -0.94856 - 0xbfd4135c94176602, 0xbfee6288ec48e112, // -0.31368, -0.94953 - 0xbfd3e39be96ec271, 0xbfee6a61c55d53a7, // -0.31077, -0.95049 - 0xbfd3b3cefa0414b7, 0xbfee7227db6a9744, // -0.30785, -0.95144 - 0xbfd383f5e353b6aa, 0xbfee79db29a5165a, // -0.30493, -0.95238 - 0xbfd35410c2e18152, 0xbfee817bab4cd10d, // -0.30201, -0.95331 - 0xbfd3241fb638baaf, 0xbfee89095bad6025, // -0.29908, -0.95423 - 0xbfd2f422daec0386, 0xbfee9084361df7f3, // -0.29615, -0.95514 - 0xbfd2c41a4e954520, 0xbfee97ec36016b30, // -0.29322, -0.95605 - 0xbfd294062ed59f05, 0xbfee9f4156c62dda, // -0.29028, -0.95694 - 0xbfd263e6995554ba, 0xbfeea68393e65800, // -0.28735, -0.95783 - 0xbfd233bbabc3bb72, 0xbfeeadb2e8e7a88e, // -0.28441, -0.9587 - 0xbfd2038583d727bd, 0xbfeeb4cf515b8811, // -0.28146, -0.95957 - 0xbfd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // -0.27852, -0.96043 - 0xbfd1a2f7fbe8f243, 0xbfeec2cf4b1af6b2, // -0.27557, -0.96128 - 0xbfd172a0d7765177, 0xbfeec9b2d3c3bf84, // -0.27262, -0.96212 - 0xbfd1423eefc69378, 0xbfeed0835e999009, // -0.26967, -0.96295 - 0xbfd111d262b1f677, 0xbfeed740e7684963, // -0.26671, -0.96378 - 0xbfd0e15b4e1749cd, 0xbfeeddeb6a078651, // -0.26375, -0.96459 - 0xbfd0b0d9cfdbdb90, 0xbfeee482e25a9dbc, // -0.26079, -0.96539 - 0xbfd0804e05eb661e, 0xbfeeeb074c50a544, // -0.25783, -0.96619 - 0xbfd04fb80e37fdae, 0xbfeef178a3e473c2, // -0.25487, -0.96698 - 0xbfd01f1806b9fdd2, 0xbfeef7d6e51ca3c0, // -0.2519, -0.96775 - 0xbfcfdcdc1adfedf8, 0xbfeefe220c0b95ec, // -0.24893, -0.96852 - 0xbfcf7b7480bd3801, 0xbfef045a14cf738c, // -0.24596, -0.96928 - 0xbfcf19f97b215f1a, 0xbfef0a7efb9230d7, // -0.24298, -0.97003 - 0xbfceb86b462de348, 0xbfef1090bc898f5f, // -0.24, -0.97077 - 0xbfce56ca1e101a1b, 0xbfef168f53f7205d, // -0.23702, -0.9715 - 0xbfcdf5163f01099a, 0xbfef1c7abe284708, // -0.23404, -0.97223 - 0xbfcd934fe5454311, 0xbfef2252f7763ada, // -0.23106, -0.97294 - 0xbfcd31774d2cbdee, 0xbfef2817fc4609ce, // -0.22807, -0.97364 - 0xbfcccf8cb312b286, 0xbfef2dc9c9089a9d, // -0.22508, -0.97434 - 0xbfcc6d90535d74dc, 0xbfef33685a3aaef0, // -0.22209, -0.97503 - 0xbfcc0b826a7e4f63, 0xbfef38f3ac64e589, // -0.2191, -0.9757 - 0xbfcba96334f15dad, 0xbfef3e6bbc1bbc65, // -0.21611, -0.97637 - 0xbfcb4732ef3d6722, 0xbfef43d085ff92dd, // -0.21311, -0.97703 - 0xbfcae4f1d5f3b9ab, 0xbfef492206bcabb4, // -0.21011, -0.97768 - 0xbfca82a025b00451, 0xbfef4e603b0b2f2d, // -0.20711, -0.97832 - 0xbfca203e1b1831da, 0xbfef538b1faf2d07, // -0.20411, -0.97895 - 0xbfc9bdcbf2dc4366, 0xbfef58a2b1789e84, // -0.2011, -0.97957 - 0xbfc95b49e9b62af9, 0xbfef5da6ed43685d, // -0.1981, -0.98018 - 0xbfc8f8b83c69a60a, 0xbfef6297cff75cb0, // -0.19509, -0.98079 - 0xbfc8961727c41804, 0xbfef677556883cee, // -0.19208, -0.98138 - 0xbfc83366e89c64c5, 0xbfef6c3f7df5bbb7, // -0.18907, -0.98196 - 0xbfc7d0a7bbd2cb1b, 0xbfef70f6434b7eb7, // -0.18606, -0.98254 - 0xbfc76dd9de50bf31, 0xbfef7599a3a12077, // -0.18304, -0.98311 - 0xbfc70afd8d08c4ff, 0xbfef7a299c1a322a, // -0.18002, -0.98366 - 0xbfc6a81304f64ab2, 0xbfef7ea629e63d6e, // -0.177, -0.98421 - 0xbfc6451a831d830d, 0xbfef830f4a40c60c, // -0.17398, -0.98475 - 0xbfc5e214448b3fc6, 0xbfef8764fa714ba9, // -0.17096, -0.98528 - 0xbfc57f008654cbde, 0xbfef8ba737cb4b78, // -0.16794, -0.9858 - 0xbfc51bdf8597c5f2, 0xbfef8fd5ffae41db, // -0.16491, -0.98631 - 0xbfc4b8b17f79fa88, 0xbfef93f14f85ac08, // -0.16189, -0.98681 - 0xbfc45576b1293e5a, 0xbfef97f924c9099b, // -0.15886, -0.9873 - 0xbfc3f22f57db4893, 0xbfef9bed7cfbde29, // -0.15583, -0.98778 - 0xbfc38edbb0cd8d14, 0xbfef9fce55adb2c8, // -0.1528, -0.98826 - 0xbfc32b7bf94516a7, 0xbfefa39bac7a1791, // -0.14976, -0.98872 - 0xbfc2c8106e8e613a, 0xbfefa7557f08a517, // -0.14673, -0.98918 - 0xbfc264994dfd340a, 0xbfefaafbcb0cfddc, // -0.1437, -0.98962 - 0xbfc20116d4ec7bce, 0xbfefae8e8e46cfbb, // -0.14066, -0.99006 - 0xbfc19d8940be24e7, 0xbfefb20dc681d54d, // -0.13762, -0.99049 - 0xbfc139f0cedaf576, 0xbfefb5797195d741, // -0.13458, -0.9909 - 0xbfc0d64dbcb26786, 0xbfefb8d18d66adb7, // -0.13154, -0.99131 - 0xbfc072a047ba831d, 0xbfefbc1617e44186, // -0.1285, -0.99171 - 0xbfc00ee8ad6fb85b, 0xbfefbf470f0a8d88, // -0.12545, -0.9921 - 0xbfbf564e56a9730e, 0xbfefc26470e19fd3, // -0.12241, -0.99248 - 0xbfbe8eb7fde4aa3e, 0xbfefc56e3b7d9af6, // -0.11937, -0.99285 - 0xbfbdc70ecbae9fc8, 0xbfefc8646cfeb721, // -0.11632, -0.99321 - 0xbfbcff533b307dc1, 0xbfefcb4703914354, // -0.11327, -0.99356 - 0xbfbc3785c79ec2d5, 0xbfefce15fd6da67b, // -0.11022, -0.99391 - 0xbfbb6fa6ec38f64c, 0xbfefd0d158d86087, // -0.10717, -0.99424 - 0xbfbaa7b724495c04, 0xbfefd37914220b84, // -0.10412, -0.99456 - 0xbfb9dfb6eb24a85c, 0xbfefd60d2da75c9e, // -0.10107, -0.99488 - 0xbfb917a6bc29b42c, 0xbfefd88da3d12526, // -0.098017, -0.99518 - 0xbfb84f8712c130a0, 0xbfefdafa7514538c, // -0.094963, -0.99548 - 0xbfb787586a5d5b21, 0xbfefdd539ff1f456, // -0.091909, -0.99577 - 0xbfb6bf1b3e79b129, 0xbfefdf9922f73307, // -0.088854, -0.99604 - 0xbfb5f6d00a9aa419, 0xbfefe1cafcbd5b09, // -0.085797, -0.99631 - 0xbfb52e774a4d4d0a, 0xbfefe3e92be9d886, // -0.08274, -0.99657 - 0xbfb4661179272096, 0xbfefe5f3af2e3940, // -0.079682, -0.99682 - 0xbfb39d9f12c5a299, 0xbfefe7ea85482d60, // -0.076624, -0.99706 - 0xbfb2d52092ce19f6, 0xbfefe9cdad01883a, // -0.073565, -0.99729 - 0xbfb20c9674ed444c, 0xbfefeb9d2530410f, // -0.070505, -0.99751 - 0xbfb1440134d709b2, 0xbfefed58ecb673c4, // -0.067444, -0.99772 - 0xbfb07b614e463064, 0xbfefef0102826191, // -0.064383, -0.99793 - 0xbfaf656e79f820e0, 0xbfeff095658e71ad, // -0.061321, -0.99812 - 0xbfadd406f9808ec8, 0xbfeff21614e131ed, // -0.058258, -0.9983 - 0xbfac428d12c0d7e3, 0xbfeff3830f8d575c, // -0.055195, -0.99848 - 0xbfaab101bd5f8317, 0xbfeff4dc54b1bed3, // -0.052132, -0.99864 - 0xbfa91f65f10dd814, 0xbfeff621e3796d7e, // -0.049068, -0.9988 - 0xbfa78dbaa5874685, 0xbfeff753bb1b9164, // -0.046003, -0.99894 - 0xbfa5fc00d290cd43, 0xbfeff871dadb81df, // -0.042938, -0.99908 - 0xbfa46a396ff86179, 0xbfeff97c4208c014, // -0.039873, -0.9992 - 0xbfa2d865759455cd, 0xbfeffa72effef75d, // -0.036807, -0.99932 - 0xbfa14685db42c17e, 0xbfeffb55e425fdae, // -0.033741, -0.99943 - 0xbf9f693731d1cf01, 0xbfeffc251df1d3f8, // -0.030675, -0.99953 - 0xbf9c454f4ce53b1c, 0xbfeffce09ce2a679, // -0.027608, -0.99962 - 0xbf992155f7a3667e, 0xbfeffd886084cd0d, // -0.024541, -0.9997 - 0xbf95fd4d21fab226, 0xbfeffe1c6870cb77, // -0.021474, -0.99977 - 0xbf92d936bbe30efd, 0xbfeffe9cb44b51a1, // -0.018407, -0.99983 - 0xbf8f6a296ab997ca, 0xbfefff0943c53bd1, // -0.015339, -0.99988 - 0xbf8921d1fcdec784, 0xbfefff62169b92db, // -0.012272, -0.99992 - 0xbf82d96b0e509703, 0xbfefffa72c978c4f, //-0.0092038, -0.99996 - 0xbf7921f0fe670071, 0xbfefffd8858e8a92, //-0.0061359, -0.99998 - 0xbf6921f8becca4ba, 0xbfeffff621621d02, // -0.003068, -1 - 0x0000000000000000, 0xbff0000000000000, // 0, -1 - 0x3f6921f8becca4ba, 0xbfeffff621621d02, // 0.003068, -1 - 0x3f7921f0fe670071, 0xbfefffd8858e8a92, // 0.0061359, -0.99998 - 0x3f82d96b0e509703, 0xbfefffa72c978c4f, // 0.0092038, -0.99996 - 0x3f8921d1fcdec784, 0xbfefff62169b92db, // 0.012272, -0.99992 - 0x3f8f6a296ab997ca, 0xbfefff0943c53bd1, // 0.015339, -0.99988 - 0x3f92d936bbe30efd, 0xbfeffe9cb44b51a1, // 0.018407, -0.99983 - 0x3f95fd4d21fab226, 0xbfeffe1c6870cb77, // 0.021474, -0.99977 - 0x3f992155f7a3667e, 0xbfeffd886084cd0d, // 0.024541, -0.9997 - 0x3f9c454f4ce53b1c, 0xbfeffce09ce2a679, // 0.027608, -0.99962 - 0x3f9f693731d1cf01, 0xbfeffc251df1d3f8, // 0.030675, -0.99953 - 0x3fa14685db42c17e, 0xbfeffb55e425fdae, // 0.033741, -0.99943 - 0x3fa2d865759455cd, 0xbfeffa72effef75d, // 0.036807, -0.99932 - 0x3fa46a396ff86179, 0xbfeff97c4208c014, // 0.039873, -0.9992 - 0x3fa5fc00d290cd43, 0xbfeff871dadb81df, // 0.042938, -0.99908 - 0x3fa78dbaa5874685, 0xbfeff753bb1b9164, // 0.046003, -0.99894 - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, // 0.049068, -0.9988 - 0x3faab101bd5f8317, 0xbfeff4dc54b1bed3, // 0.052132, -0.99864 - 0x3fac428d12c0d7e3, 0xbfeff3830f8d575c, // 0.055195, -0.99848 - 0x3fadd406f9808ec8, 0xbfeff21614e131ed, // 0.058258, -0.9983 - 0x3faf656e79f820e0, 0xbfeff095658e71ad, // 0.061321, -0.99812 - 0x3fb07b614e463064, 0xbfefef0102826191, // 0.064383, -0.99793 - 0x3fb1440134d709b2, 0xbfefed58ecb673c4, // 0.067444, -0.99772 - 0x3fb20c9674ed444c, 0xbfefeb9d2530410f, // 0.070505, -0.99751 - 0x3fb2d52092ce19f6, 0xbfefe9cdad01883a, // 0.073565, -0.99729 - 0x3fb39d9f12c5a299, 0xbfefe7ea85482d60, // 0.076624, -0.99706 - 0x3fb4661179272096, 0xbfefe5f3af2e3940, // 0.079682, -0.99682 - 0x3fb52e774a4d4d0a, 0xbfefe3e92be9d886, // 0.08274, -0.99657 - 0x3fb5f6d00a9aa419, 0xbfefe1cafcbd5b09, // 0.085797, -0.99631 - 0x3fb6bf1b3e79b129, 0xbfefdf9922f73307, // 0.088854, -0.99604 - 0x3fb787586a5d5b21, 0xbfefdd539ff1f456, // 0.091909, -0.99577 - 0x3fb84f8712c130a0, 0xbfefdafa7514538c, // 0.094963, -0.99548 - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, // 0.098017, -0.99518 - 0x3fb9dfb6eb24a85c, 0xbfefd60d2da75c9e, // 0.10107, -0.99488 - 0x3fbaa7b724495c04, 0xbfefd37914220b84, // 0.10412, -0.99456 - 0x3fbb6fa6ec38f64c, 0xbfefd0d158d86087, // 0.10717, -0.99424 - 0x3fbc3785c79ec2d5, 0xbfefce15fd6da67b, // 0.11022, -0.99391 - 0x3fbcff533b307dc1, 0xbfefcb4703914354, // 0.11327, -0.99356 - 0x3fbdc70ecbae9fc8, 0xbfefc8646cfeb721, // 0.11632, -0.99321 - 0x3fbe8eb7fde4aa3e, 0xbfefc56e3b7d9af6, // 0.11937, -0.99285 - 0x3fbf564e56a9730e, 0xbfefc26470e19fd3, // 0.12241, -0.99248 - 0x3fc00ee8ad6fb85b, 0xbfefbf470f0a8d88, // 0.12545, -0.9921 - 0x3fc072a047ba831d, 0xbfefbc1617e44186, // 0.1285, -0.99171 - 0x3fc0d64dbcb26786, 0xbfefb8d18d66adb7, // 0.13154, -0.99131 - 0x3fc139f0cedaf576, 0xbfefb5797195d741, // 0.13458, -0.9909 - 0x3fc19d8940be24e7, 0xbfefb20dc681d54d, // 0.13762, -0.99049 - 0x3fc20116d4ec7bce, 0xbfefae8e8e46cfbb, // 0.14066, -0.99006 - 0x3fc264994dfd340a, 0xbfefaafbcb0cfddc, // 0.1437, -0.98962 - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918 - 0x3fc32b7bf94516a7, 0xbfefa39bac7a1791, // 0.14976, -0.98872 - 0x3fc38edbb0cd8d14, 0xbfef9fce55adb2c8, // 0.1528, -0.98826 - 0x3fc3f22f57db4893, 0xbfef9bed7cfbde29, // 0.15583, -0.98778 - 0x3fc45576b1293e5a, 0xbfef97f924c9099b, // 0.15886, -0.9873 - 0x3fc4b8b17f79fa88, 0xbfef93f14f85ac08, // 0.16189, -0.98681 - 0x3fc51bdf8597c5f2, 0xbfef8fd5ffae41db, // 0.16491, -0.98631 - 0x3fc57f008654cbde, 0xbfef8ba737cb4b78, // 0.16794, -0.9858 - 0x3fc5e214448b3fc6, 0xbfef8764fa714ba9, // 0.17096, -0.98528 - 0x3fc6451a831d830d, 0xbfef830f4a40c60c, // 0.17398, -0.98475 - 0x3fc6a81304f64ab2, 0xbfef7ea629e63d6e, // 0.177, -0.98421 - 0x3fc70afd8d08c4ff, 0xbfef7a299c1a322a, // 0.18002, -0.98366 - 0x3fc76dd9de50bf31, 0xbfef7599a3a12077, // 0.18304, -0.98311 - 0x3fc7d0a7bbd2cb1b, 0xbfef70f6434b7eb7, // 0.18606, -0.98254 - 0x3fc83366e89c64c5, 0xbfef6c3f7df5bbb7, // 0.18907, -0.98196 - 0x3fc8961727c41804, 0xbfef677556883cee, // 0.19208, -0.98138 - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079 - 0x3fc95b49e9b62af9, 0xbfef5da6ed43685d, // 0.1981, -0.98018 - 0x3fc9bdcbf2dc4366, 0xbfef58a2b1789e84, // 0.2011, -0.97957 - 0x3fca203e1b1831da, 0xbfef538b1faf2d07, // 0.20411, -0.97895 - 0x3fca82a025b00451, 0xbfef4e603b0b2f2d, // 0.20711, -0.97832 - 0x3fcae4f1d5f3b9ab, 0xbfef492206bcabb4, // 0.21011, -0.97768 - 0x3fcb4732ef3d6722, 0xbfef43d085ff92dd, // 0.21311, -0.97703 - 0x3fcba96334f15dad, 0xbfef3e6bbc1bbc65, // 0.21611, -0.97637 - 0x3fcc0b826a7e4f63, 0xbfef38f3ac64e589, // 0.2191, -0.9757 - 0x3fcc6d90535d74dc, 0xbfef33685a3aaef0, // 0.22209, -0.97503 - 0x3fcccf8cb312b286, 0xbfef2dc9c9089a9d, // 0.22508, -0.97434 - 0x3fcd31774d2cbdee, 0xbfef2817fc4609ce, // 0.22807, -0.97364 - 0x3fcd934fe5454311, 0xbfef2252f7763ada, // 0.23106, -0.97294 - 0x3fcdf5163f01099a, 0xbfef1c7abe284708, // 0.23404, -0.97223 - 0x3fce56ca1e101a1b, 0xbfef168f53f7205d, // 0.23702, -0.9715 - 0x3fceb86b462de348, 0xbfef1090bc898f5f, // 0.24, -0.97077 - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003 - 0x3fcf7b7480bd3801, 0xbfef045a14cf738c, // 0.24596, -0.96928 - 0x3fcfdcdc1adfedf8, 0xbfeefe220c0b95ec, // 0.24893, -0.96852 - 0x3fd01f1806b9fdd2, 0xbfeef7d6e51ca3c0, // 0.2519, -0.96775 - 0x3fd04fb80e37fdae, 0xbfeef178a3e473c2, // 0.25487, -0.96698 - 0x3fd0804e05eb661e, 0xbfeeeb074c50a544, // 0.25783, -0.96619 - 0x3fd0b0d9cfdbdb90, 0xbfeee482e25a9dbc, // 0.26079, -0.96539 - 0x3fd0e15b4e1749cd, 0xbfeeddeb6a078651, // 0.26375, -0.96459 - 0x3fd111d262b1f677, 0xbfeed740e7684963, // 0.26671, -0.96378 - 0x3fd1423eefc69378, 0xbfeed0835e999009, // 0.26967, -0.96295 - 0x3fd172a0d7765177, 0xbfeec9b2d3c3bf84, // 0.27262, -0.96212 - 0x3fd1a2f7fbe8f243, 0xbfeec2cf4b1af6b2, // 0.27557, -0.96128 - 0x3fd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // 0.27852, -0.96043 - 0x3fd2038583d727bd, 0xbfeeb4cf515b8811, // 0.28146, -0.95957 - 0x3fd233bbabc3bb72, 0xbfeeadb2e8e7a88e, // 0.28441, -0.9587 - 0x3fd263e6995554ba, 0xbfeea68393e65800, // 0.28735, -0.95783 - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694 - 0x3fd2c41a4e954520, 0xbfee97ec36016b30, // 0.29322, -0.95605 - 0x3fd2f422daec0386, 0xbfee9084361df7f3, // 0.29615, -0.95514 - 0x3fd3241fb638baaf, 0xbfee89095bad6025, // 0.29908, -0.95423 - 0x3fd35410c2e18152, 0xbfee817bab4cd10d, // 0.30201, -0.95331 - 0x3fd383f5e353b6aa, 0xbfee79db29a5165a, // 0.30493, -0.95238 - 0x3fd3b3cefa0414b7, 0xbfee7227db6a9744, // 0.30785, -0.95144 - 0x3fd3e39be96ec271, 0xbfee6a61c55d53a7, // 0.31077, -0.95049 - 0x3fd4135c94176602, 0xbfee6288ec48e112, // 0.31368, -0.94953 - 0x3fd44310dc8936f0, 0xbfee5a9d550467d3, // 0.31659, -0.94856 - 0x3fd472b8a5571054, 0xbfee529f04729ffc, // 0.3195, -0.94759 - 0x3fd4a253d11b82f3, 0xbfee4a8dff81ce5e, // 0.32241, -0.9466 - 0x3fd4d1e24278e76a, 0xbfee426a4b2bc17e, // 0.32531, -0.94561 - 0x3fd50163dc197047, 0xbfee3a33ec75ce85, // 0.32821, -0.9446 - 0x3fd530d880af3c24, 0xbfee31eae870ce25, // 0.33111, -0.94359 - 0x3fd5604012f467b4, 0xbfee298f4439197a, // 0.334, -0.94257 - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154 - 0x3fd5bee78b9db3b6, 0xbfee18a02fdc66d9, // 0.33978, -0.94051 - 0x3fd5ee27379ea693, 0xbfee100cca2980ac, // 0.34266, -0.93946 - 0x3fd61d595c88c203, 0xbfee0766d9280f54, // 0.34554, -0.9384 - 0x3fd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // 0.34842, -0.93734 - 0x3fd67b949cad63ca, 0xbfedf5e36a9ba59c, // 0.35129, -0.93627 - 0x3fd6aa9d7dc77e16, 0xbfeded05f7de47da, // 0.35416, -0.93518 - 0x3fd6d998638a0cb5, 0xbfede4160f6d8d81, // 0.35703, -0.93409 - 0x3fd7088530fa459e, 0xbfeddb13b6ccc23d, // 0.3599, -0.93299 - 0x3fd73763c9261092, 0xbfedd1fef38a915a, // 0.36276, -0.93188 - 0x3fd766340f2418f6, 0xbfedc8d7cb410260, // 0.36561, -0.93077 - 0x3fd794f5e613dfae, 0xbfedbf9e4395759a, // 0.36847, -0.92964 - 0x3fd7c3a9311dcce7, 0xbfedb6526238a09b, // 0.37132, -0.92851 - 0x3fd7f24dd37341e3, 0xbfedacf42ce68ab9, // 0.37416, -0.92736 - 0x3fd820e3b04eaac4, 0xbfeda383a9668988, // 0.37701, -0.92621 - 0x3fd84f6aaaf3903f, 0xbfed9a00dd8b3d46, // 0.37985, -0.92505 - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388 - 0x3fd8ac4b86d5ed44, 0xbfed86c48445a450, // 0.38552, -0.9227 - 0x3fd8daa52ec8a4af, 0xbfed7d0b02b8ecf9, // 0.38835, -0.92151 - 0x3fd908ef81ef7bd1, 0xbfed733f508c0dff, // 0.39117, -0.92032 - 0x3fd9372a63bc93d7, 0xbfed696173c9e68b, // 0.39399, -0.91911 - 0x3fd96555b7ab948f, 0xbfed5f7172888a7f, // 0.39681, -0.9179 - 0x3fd993716141bdfe, 0xbfed556f52e93eb1, // 0.39962, -0.91668 - 0x3fd9c17d440df9f2, 0xbfed4b5b1b187524, // 0.40243, -0.91545 - 0x3fd9ef7943a8ed8a, 0xbfed4134d14dc93a, // 0.40524, -0.91421 - 0x3fda1d6543b50ac0, 0xbfed36fc7bcbfbdc, // 0.40804, -0.91296 - 0x3fda4b4127dea1e4, 0xbfed2cb220e0ef9f, // 0.41084, -0.91171 - 0x3fda790cd3dbf31a, 0xbfed2255c6e5a4e1, // 0.41364, -0.91044 - 0x3fdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // 0.41643, -0.90917 - 0x3fdad473125cdc08, 0xbfed0d672f59d2b9, // 0.41922, -0.90789 - 0x3fdb020d6c7f4009, 0xbfed02d4feb2bd92, // 0.422, -0.9066 - 0x3fdb2f971db31972, 0xbfecf830e8ce467b, // 0.42478, -0.9053 - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399 - 0x3fdb8a7814fd5693, 0xbfece2b32799a060, // 0.43033, -0.90267 - 0x3fdbb7cf2304bd01, 0xbfecd7d9898b32f6, // 0.43309, -0.90135 - 0x3fdbe51517ffc0d9, 0xbfecccee20c2de9f, // 0.43586, -0.90002 - 0x3fdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // 0.43862, -0.89867 - 0x3fdc3f6d47263129, 0xbfecb6e20a00da99, // 0.44137, -0.89732 - 0x3fdc6c7f4997000a, 0xbfecabc169a0b901, // 0.44412, -0.89597 - 0x3fdc997fc3865388, 0xbfeca08f19b9c449, // 0.44687, -0.8946 - 0x3fdcc66e9931c45d, 0xbfec954b213411f5, // 0.44961, -0.89322 - 0x3fdcf34baee1cd21, 0xbfec89f587029c13, // 0.45235, -0.89184 - 0x3fdd2016e8e9db5b, 0xbfec7e8e52233cf3, // 0.45508, -0.89045 - 0x3fdd4cd02ba8609c, 0xbfec7315899eaad7, // 0.45781, -0.88905 - 0x3fdd79775b86e389, 0xbfec678b3488739b, // 0.46054, -0.88764 - 0x3fdda60c5cfa10d8, 0xbfec5bef59fef85a, // 0.46326, -0.88622 - 0x3fddd28f1481cc58, 0xbfec5042012b6907, // 0.46598, -0.8848 - 0x3fddfeff66a941de, 0xbfec44833141c004, // 0.46869, -0.88336 - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192 - 0x3fde57a86d3cd824, 0xbfec2cd14931e3f1, // 0.4741, -0.88047 - 0x3fde83e0eaf85113, 0xbfec20de3fa971b0, // 0.4768, -0.87901 - 0x3fdeb00695f25620, 0xbfec14d9dc465e58, // 0.47949, -0.87755 - 0x3fdedc1952ef78d5, 0xbfec08c426725549, // 0.48218, -0.87607 - 0x3fdf081906bff7fd, 0xbfebfc9d25a1b147, // 0.48487, -0.87459 - 0x3fdf3405963fd068, 0xbfebf064e15377dd, // 0.48755, -0.87309 - 0x3fdf5fdee656cda3, 0xbfebe41b611154c1, // 0.49023, -0.8716 - 0x3fdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // 0.4929, -0.87009 - 0x3fdfb7575c24d2de, 0xbfebcb54cb0d2327, // 0.49557, -0.86857 - 0x3fdfe2f64be7120f, 0xbfebbed7c49380ea, // 0.49823, -0.86705 - 0x3fe00740c82b82e0, 0xbfebb249a0b6c40d, // 0.50089, -0.86551 - 0x3fe01cfc874c3eb7, 0xbfeba5aa673590d2, // 0.50354, -0.86397 - 0x3fe032ae55edbd95, 0xbfeb98fa1fd9155e, // 0.50619, -0.86242 - 0x3fe0485626ae221a, 0xbfeb8c38d27504e9, // 0.50883, -0.86087 - 0x3fe05df3ec31b8b6, 0xbfeb7f6686e792ea, // 0.51147, -0.8593 - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773 - 0x3fe089112032b08c, 0xbfeb658f14fdbc47, // 0.51673, -0.85615 - 0x3fe09e907417c5e1, 0xbfeb5889fe921405, // 0.51936, -0.85456 - 0x3fe0b405878f85ec, 0xbfeb4b7409de7925, // 0.52198, -0.85296 - 0x3fe0c9704d5d898f, 0xbfeb3e4d3ef55712, // 0.52459, -0.85136 - 0x3fe0ded0b84bc4b5, 0xbfeb3115a5f37bf4, // 0.5272, -0.84974 - 0x3fe0f426bb2a8e7d, 0xbfeb23cd470013b4, // 0.5298, -0.84812 - 0x3fe1097248d0a956, 0xbfeb16742a4ca2f5, // 0.5324, -0.84649 - 0x3fe11eb3541b4b22, 0xbfeb090a58150200, // 0.535, -0.84485 - 0x3fe133e9cfee254e, 0xbfeafb8fd89f57b6, // 0.53759, -0.84321 - 0x3fe14915af336ceb, 0xbfeaee04b43c1474, // 0.54017, -0.84155 - 0x3fe15e36e4dbe2bc, 0xbfeae068f345ecef, // 0.54275, -0.83989 - 0x3fe1734d63dedb49, 0xbfead2bc9e21d511, // 0.54532, -0.83822 - 0x3fe188591f3a46e5, 0xbfeac4ffbd3efac8, // 0.54789, -0.83655 - 0x3fe19d5a09f2b9b8, 0xbfeab7325916c0d4, // 0.55046, -0.83486 - 0x3fe1b250171373be, 0xbfeaa9547a2cb98e, // 0.55302, -0.83317 - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147 - 0x3fe1dc1b64dc4872, 0xbfea8d676e545ad2, // 0.55812, -0.82976 - 0x3fe1f0f08bbc861b, 0xbfea7f58529fe69d, // 0.56066, -0.82805 - 0x3fe205baa17560d6, 0xbfea7138de9d60f5, // 0.5632, -0.82632 - 0x3fe21a799933eb58, 0xbfea63091b02fae2, // 0.56573, -0.82459 - 0x3fe22f2d662c13e1, 0xbfea54c91090f524, // 0.56826, -0.82285 - 0x3fe243d5fb98ac1f, 0xbfea4678c8119ac8, // 0.57078, -0.8211 - 0x3fe258734cbb7110, 0xbfea38184a593bc6, // 0.5733, -0.81935 - 0x3fe26d054cdd12df, 0xbfea29a7a0462782, // 0.57581, -0.81758 - 0x3fe2818bef4d3cba, 0xbfea1b26d2c0a75e, // 0.57831, -0.81581 - 0x3fe2960727629ca8, 0xbfea0c95eabaf937, // 0.58081, -0.81404 - 0x3fe2aa76e87aeb58, 0xbfe9fdf4f13149de, // 0.58331, -0.81225 - 0x3fe2bedb25faf3ea, 0xbfe9ef43ef29af94, // 0.5858, -0.81046 - 0x3fe2d333d34e9bb7, 0xbfe9e082edb42472, // 0.58828, -0.80866 - 0x3fe2e780e3e8ea16, 0xbfe9d1b1f5ea80d6, // 0.59076, -0.80685 - 0x3fe2fbc24b441015, 0xbfe9c2d110f075c3, // 0.59323, -0.80503 - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321 - 0x3fe32421ec49a620, 0xbfe9a4dfa42b06b2, // 0.59816, -0.80138 - 0x3fe338400d0c8e57, 0xbfe995cf2ed80d22, // 0.60062, -0.79954 - 0x3fe34c5252c14de1, 0xbfe986aef1457594, // 0.60307, -0.79769 - 0x3fe36058b10659f3, 0xbfe9777ef4c7d742, // 0.60551, -0.79584 - 0x3fe374531b817f8d, 0xbfe9683f42bd7fe1, // 0.60795, -0.79398 - 0x3fe3884185dfeb22, 0xbfe958efe48e6dd7, // 0.61038, -0.79211 - 0x3fe39c23e3d63029, 0xbfe94990e3ac4a6c, // 0.61281, -0.79023 - 0x3fe3affa292050b9, 0xbfe93a22499263fc, // 0.61523, -0.78835 - 0x3fe3c3c44981c517, 0xbfe92aa41fc5a815, // 0.61765, -0.78646 - 0x3fe3d78238c58343, 0xbfe91b166fd49da2, // 0.62006, -0.78456 - 0x3fe3eb33eabe0680, 0xbfe90b7943575efe, // 0.62246, -0.78265 - 0x3fe3fed9534556d4, 0xbfe8fbcca3ef940d, // 0.62486, -0.78074 - 0x3fe41272663d108c, 0xbfe8ec109b486c49, // 0.62725, -0.77882 - 0x3fe425ff178e6bb1, 0xbfe8dc45331698cc, // 0.62964, -0.77689 - 0x3fe4397f5b2a4380, 0xbfe8cc6a75184655, // 0.63202, -0.77495 - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301 - 0x3fe4605a692b32a2, 0xbfe8ac871ede1d88, // 0.63676, -0.77106 - 0x3fe473b51b987347, 0xbfe89c7e9a4dd4ab, // 0.63912, -0.7691 - 0x3fe48703306091fe, 0xbfe88c66e7481ba1, // 0.64148, -0.76714 - 0x3fe49a449b9b0938, 0xbfe87c400fba2ebf, // 0.64383, -0.76517 - 0x3fe4ad79516722f0, 0xbfe86c0a1d9aa195, // 0.64618, -0.76319 - 0x3fe4c0a145ec0004, 0xbfe85bc51ae958cc, // 0.64851, -0.7612 - 0x3fe4d3bc6d589f80, 0xbfe84b7111af83f9, // 0.65085, -0.75921 - 0x3fe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // 0.65317, -0.75721 - 0x3fe4f9cc25cca486, 0xbfe82a9c13f545ff, // 0.65549, -0.7552 - 0x3fe50cc09f59a09b, 0xbfe81a1b33b57acc, // 0.65781, -0.75319 - 0x3fe51fa81cd99aa6, 0xbfe8098b756e52fa, // 0.66011, -0.75117 - 0x3fe5328292a35596, 0xbfe7f8ece3571771, // 0.66242, -0.74914 - 0x3fe5454ff5159dfb, 0xbfe7e83f87b03686, // 0.66471, -0.7471 - 0x3fe5581038975137, 0xbfe7d7836cc33db2, // 0.667, -0.74506 - 0x3fe56ac35197649e, 0xbfe7c6b89ce2d333, // 0.66928, -0.74301 - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095 - 0x3fe59001d5f723df, 0xbfe7a4f707bf97d2, // 0.67383, -0.73889 - 0x3fe5a28d2a5d7250, 0xbfe79400574f55e4, // 0.67609, -0.73682 - 0x3fe5b50b264f7448, 0xbfe782fb1b90b35b, // 0.67835, -0.73474 - 0x3fe5c77bbe65018c, 0xbfe771e75f037261, // 0.6806, -0.73265 - 0x3fe5d9dee73e345c, 0xbfe760c52c304764, // 0.68285, -0.73056 - 0x3fe5ec3495837074, 0xbfe74f948da8d28d, // 0.68508, -0.72846 - 0x3fe5fe7cbde56a0f, 0xbfe73e558e079942, // 0.68732, -0.72636 - 0x3fe610b7551d2cde, 0xbfe72d0837efff97, // 0.68954, -0.72425 - 0x3fe622e44fec22ff, 0xbfe71bac960e41bf, // 0.69176, -0.72213 - 0x3fe63503a31c1be8, 0xbfe70a42b3176d7a, // 0.69397, -0.72 - 0x3fe64715437f535b, 0xbfe6f8ca99c95b75, // 0.69618, -0.71787 - 0x3fe6591925f0783e, 0xbfe6e74454eaa8ae, // 0.69838, -0.71573 - 0x3fe66b0f3f52b386, 0xbfe6d5afef4aafcc, // 0.70057, -0.71358 - 0x3fe67cf78491af10, 0xbfe6c40d73c18275, // 0.70275, -0.71143 - 0x3fe68ed1eaa19c71, 0xbfe6b25ced2fe29c, // 0.70493, -0.70927 - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711 - 0x3fe6b25ced2fe29c, 0xbfe68ed1eaa19c71, // 0.70927, -0.70493 - 0x3fe6c40d73c18275, 0xbfe67cf78491af10, // 0.71143, -0.70275 - 0x3fe6d5afef4aafcc, 0xbfe66b0f3f52b386, // 0.71358, -0.70057 - 0x3fe6e74454eaa8ae, 0xbfe6591925f0783e, // 0.71573, -0.69838 - 0x3fe6f8ca99c95b75, 0xbfe64715437f535b, // 0.71787, -0.69618 - 0x3fe70a42b3176d7a, 0xbfe63503a31c1be8, // 0.72, -0.69397 - 0x3fe71bac960e41bf, 0xbfe622e44fec22ff, // 0.72213, -0.69176 - 0x3fe72d0837efff97, 0xbfe610b7551d2cde, // 0.72425, -0.68954 - 0x3fe73e558e079942, 0xbfe5fe7cbde56a0f, // 0.72636, -0.68732 - 0x3fe74f948da8d28d, 0xbfe5ec3495837074, // 0.72846, -0.68508 - 0x3fe760c52c304764, 0xbfe5d9dee73e345c, // 0.73056, -0.68285 - 0x3fe771e75f037261, 0xbfe5c77bbe65018c, // 0.73265, -0.6806 - 0x3fe782fb1b90b35b, 0xbfe5b50b264f7448, // 0.73474, -0.67835 - 0x3fe79400574f55e4, 0xbfe5a28d2a5d7250, // 0.73682, -0.67609 - 0x3fe7a4f707bf97d2, 0xbfe59001d5f723df, // 0.73889, -0.67383 - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156 - 0x3fe7c6b89ce2d333, 0xbfe56ac35197649e, // 0.74301, -0.66928 - 0x3fe7d7836cc33db2, 0xbfe5581038975137, // 0.74506, -0.667 - 0x3fe7e83f87b03686, 0xbfe5454ff5159dfb, // 0.7471, -0.66471 - 0x3fe7f8ece3571771, 0xbfe5328292a35596, // 0.74914, -0.66242 - 0x3fe8098b756e52fa, 0xbfe51fa81cd99aa6, // 0.75117, -0.66011 - 0x3fe81a1b33b57acc, 0xbfe50cc09f59a09b, // 0.75319, -0.65781 - 0x3fe82a9c13f545ff, 0xbfe4f9cc25cca486, // 0.7552, -0.65549 - 0x3fe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // 0.75721, -0.65317 - 0x3fe84b7111af83f9, 0xbfe4d3bc6d589f80, // 0.75921, -0.65085 - 0x3fe85bc51ae958cc, 0xbfe4c0a145ec0004, // 0.7612, -0.64851 - 0x3fe86c0a1d9aa195, 0xbfe4ad79516722f0, // 0.76319, -0.64618 - 0x3fe87c400fba2ebf, 0xbfe49a449b9b0938, // 0.76517, -0.64383 - 0x3fe88c66e7481ba1, 0xbfe48703306091fe, // 0.76714, -0.64148 - 0x3fe89c7e9a4dd4ab, 0xbfe473b51b987347, // 0.7691, -0.63912 - 0x3fe8ac871ede1d88, 0xbfe4605a692b32a2, // 0.77106, -0.63676 - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439 - 0x3fe8cc6a75184655, 0xbfe4397f5b2a4380, // 0.77495, -0.63202 - 0x3fe8dc45331698cc, 0xbfe425ff178e6bb1, // 0.77689, -0.62964 - 0x3fe8ec109b486c49, 0xbfe41272663d108c, // 0.77882, -0.62725 - 0x3fe8fbcca3ef940d, 0xbfe3fed9534556d4, // 0.78074, -0.62486 - 0x3fe90b7943575efe, 0xbfe3eb33eabe0680, // 0.78265, -0.62246 - 0x3fe91b166fd49da2, 0xbfe3d78238c58343, // 0.78456, -0.62006 - 0x3fe92aa41fc5a815, 0xbfe3c3c44981c517, // 0.78646, -0.61765 - 0x3fe93a22499263fc, 0xbfe3affa292050b9, // 0.78835, -0.61523 - 0x3fe94990e3ac4a6c, 0xbfe39c23e3d63029, // 0.79023, -0.61281 - 0x3fe958efe48e6dd7, 0xbfe3884185dfeb22, // 0.79211, -0.61038 - 0x3fe9683f42bd7fe1, 0xbfe374531b817f8d, // 0.79398, -0.60795 - 0x3fe9777ef4c7d742, 0xbfe36058b10659f3, // 0.79584, -0.60551 - 0x3fe986aef1457594, 0xbfe34c5252c14de1, // 0.79769, -0.60307 - 0x3fe995cf2ed80d22, 0xbfe338400d0c8e57, // 0.79954, -0.60062 - 0x3fe9a4dfa42b06b2, 0xbfe32421ec49a620, // 0.80138, -0.59816 - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957 - 0x3fe9c2d110f075c3, 0xbfe2fbc24b441015, // 0.80503, -0.59323 - 0x3fe9d1b1f5ea80d6, 0xbfe2e780e3e8ea16, // 0.80685, -0.59076 - 0x3fe9e082edb42472, 0xbfe2d333d34e9bb7, // 0.80866, -0.58828 - 0x3fe9ef43ef29af94, 0xbfe2bedb25faf3ea, // 0.81046, -0.5858 - 0x3fe9fdf4f13149de, 0xbfe2aa76e87aeb58, // 0.81225, -0.58331 - 0x3fea0c95eabaf937, 0xbfe2960727629ca8, // 0.81404, -0.58081 - 0x3fea1b26d2c0a75e, 0xbfe2818bef4d3cba, // 0.81581, -0.57831 - 0x3fea29a7a0462782, 0xbfe26d054cdd12df, // 0.81758, -0.57581 - 0x3fea38184a593bc6, 0xbfe258734cbb7110, // 0.81935, -0.5733 - 0x3fea4678c8119ac8, 0xbfe243d5fb98ac1f, // 0.8211, -0.57078 - 0x3fea54c91090f524, 0xbfe22f2d662c13e1, // 0.82285, -0.56826 - 0x3fea63091b02fae2, 0xbfe21a799933eb58, // 0.82459, -0.56573 - 0x3fea7138de9d60f5, 0xbfe205baa17560d6, // 0.82632, -0.5632 - 0x3fea7f58529fe69d, 0xbfe1f0f08bbc861b, // 0.82805, -0.56066 - 0x3fea8d676e545ad2, 0xbfe1dc1b64dc4872, // 0.82976, -0.55812 - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557 - 0x3feaa9547a2cb98e, 0xbfe1b250171373be, // 0.83317, -0.55302 - 0x3feab7325916c0d4, 0xbfe19d5a09f2b9b8, // 0.83486, -0.55046 - 0x3feac4ffbd3efac8, 0xbfe188591f3a46e5, // 0.83655, -0.54789 - 0x3fead2bc9e21d511, 0xbfe1734d63dedb49, // 0.83822, -0.54532 - 0x3feae068f345ecef, 0xbfe15e36e4dbe2bc, // 0.83989, -0.54275 - 0x3feaee04b43c1474, 0xbfe14915af336ceb, // 0.84155, -0.54017 - 0x3feafb8fd89f57b6, 0xbfe133e9cfee254e, // 0.84321, -0.53759 - 0x3feb090a58150200, 0xbfe11eb3541b4b22, // 0.84485, -0.535 - 0x3feb16742a4ca2f5, 0xbfe1097248d0a956, // 0.84649, -0.5324 - 0x3feb23cd470013b4, 0xbfe0f426bb2a8e7d, // 0.84812, -0.5298 - 0x3feb3115a5f37bf4, 0xbfe0ded0b84bc4b5, // 0.84974, -0.5272 - 0x3feb3e4d3ef55712, 0xbfe0c9704d5d898f, // 0.85136, -0.52459 - 0x3feb4b7409de7925, 0xbfe0b405878f85ec, // 0.85296, -0.52198 - 0x3feb5889fe921405, 0xbfe09e907417c5e1, // 0.85456, -0.51936 - 0x3feb658f14fdbc47, 0xbfe089112032b08c, // 0.85615, -0.51673 - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141 - 0x3feb7f6686e792ea, 0xbfe05df3ec31b8b6, // 0.8593, -0.51147 - 0x3feb8c38d27504e9, 0xbfe0485626ae221a, // 0.86087, -0.50883 - 0x3feb98fa1fd9155e, 0xbfe032ae55edbd95, // 0.86242, -0.50619 - 0x3feba5aa673590d2, 0xbfe01cfc874c3eb7, // 0.86397, -0.50354 - 0x3febb249a0b6c40d, 0xbfe00740c82b82e0, // 0.86551, -0.50089 - 0x3febbed7c49380ea, 0xbfdfe2f64be7120f, // 0.86705, -0.49823 - 0x3febcb54cb0d2327, 0xbfdfb7575c24d2de, // 0.86857, -0.49557 - 0x3febd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // 0.87009, -0.4929 - 0x3febe41b611154c1, 0xbfdf5fdee656cda3, // 0.8716, -0.49023 - 0x3febf064e15377dd, 0xbfdf3405963fd068, // 0.87309, -0.48755 - 0x3febfc9d25a1b147, 0xbfdf081906bff7fd, // 0.87459, -0.48487 - 0x3fec08c426725549, 0xbfdedc1952ef78d5, // 0.87607, -0.48218 - 0x3fec14d9dc465e58, 0xbfdeb00695f25620, // 0.87755, -0.47949 - 0x3fec20de3fa971b0, 0xbfde83e0eaf85113, // 0.87901, -0.4768 - 0x3fec2cd14931e3f1, 0xbfde57a86d3cd824, // 0.88047, -0.4741 - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714 - 0x3fec44833141c004, 0xbfddfeff66a941de, // 0.88336, -0.46869 - 0x3fec5042012b6907, 0xbfddd28f1481cc58, // 0.8848, -0.46598 - 0x3fec5bef59fef85a, 0xbfdda60c5cfa10d8, // 0.88622, -0.46326 - 0x3fec678b3488739b, 0xbfdd79775b86e389, // 0.88764, -0.46054 - 0x3fec7315899eaad7, 0xbfdd4cd02ba8609c, // 0.88905, -0.45781 - 0x3fec7e8e52233cf3, 0xbfdd2016e8e9db5b, // 0.89045, -0.45508 - 0x3fec89f587029c13, 0xbfdcf34baee1cd21, // 0.89184, -0.45235 - 0x3fec954b213411f5, 0xbfdcc66e9931c45d, // 0.89322, -0.44961 - 0x3feca08f19b9c449, 0xbfdc997fc3865388, // 0.8946, -0.44687 - 0x3fecabc169a0b901, 0xbfdc6c7f4997000a, // 0.89597, -0.44412 - 0x3fecb6e20a00da99, 0xbfdc3f6d47263129, // 0.89732, -0.44137 - 0x3fecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // 0.89867, -0.43862 - 0x3fecccee20c2de9f, 0xbfdbe51517ffc0d9, // 0.90002, -0.43586 - 0x3fecd7d9898b32f6, 0xbfdbb7cf2304bd01, // 0.90135, -0.43309 - 0x3fece2b32799a060, 0xbfdb8a7814fd5693, // 0.90267, -0.43033 - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756 - 0x3fecf830e8ce467b, 0xbfdb2f971db31972, // 0.9053, -0.42478 - 0x3fed02d4feb2bd92, 0xbfdb020d6c7f4009, // 0.9066, -0.422 - 0x3fed0d672f59d2b9, 0xbfdad473125cdc08, // 0.90789, -0.41922 - 0x3fed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // 0.90917, -0.41643 - 0x3fed2255c6e5a4e1, 0xbfda790cd3dbf31a, // 0.91044, -0.41364 - 0x3fed2cb220e0ef9f, 0xbfda4b4127dea1e4, // 0.91171, -0.41084 - 0x3fed36fc7bcbfbdc, 0xbfda1d6543b50ac0, // 0.91296, -0.40804 - 0x3fed4134d14dc93a, 0xbfd9ef7943a8ed8a, // 0.91421, -0.40524 - 0x3fed4b5b1b187524, 0xbfd9c17d440df9f2, // 0.91545, -0.40243 - 0x3fed556f52e93eb1, 0xbfd993716141bdfe, // 0.91668, -0.39962 - 0x3fed5f7172888a7f, 0xbfd96555b7ab948f, // 0.9179, -0.39681 - 0x3fed696173c9e68b, 0xbfd9372a63bc93d7, // 0.91911, -0.39399 - 0x3fed733f508c0dff, 0xbfd908ef81ef7bd1, // 0.92032, -0.39117 - 0x3fed7d0b02b8ecf9, 0xbfd8daa52ec8a4af, // 0.92151, -0.38835 - 0x3fed86c48445a450, 0xbfd8ac4b86d5ed44, // 0.9227, -0.38552 - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268 - 0x3fed9a00dd8b3d46, 0xbfd84f6aaaf3903f, // 0.92505, -0.37985 - 0x3feda383a9668988, 0xbfd820e3b04eaac4, // 0.92621, -0.37701 - 0x3fedacf42ce68ab9, 0xbfd7f24dd37341e3, // 0.92736, -0.37416 - 0x3fedb6526238a09b, 0xbfd7c3a9311dcce7, // 0.92851, -0.37132 - 0x3fedbf9e4395759a, 0xbfd794f5e613dfae, // 0.92964, -0.36847 - 0x3fedc8d7cb410260, 0xbfd766340f2418f6, // 0.93077, -0.36561 - 0x3fedd1fef38a915a, 0xbfd73763c9261092, // 0.93188, -0.36276 - 0x3feddb13b6ccc23d, 0xbfd7088530fa459e, // 0.93299, -0.3599 - 0x3fede4160f6d8d81, 0xbfd6d998638a0cb5, // 0.93409, -0.35703 - 0x3feded05f7de47da, 0xbfd6aa9d7dc77e16, // 0.93518, -0.35416 - 0x3fedf5e36a9ba59c, 0xbfd67b949cad63ca, // 0.93627, -0.35129 - 0x3fedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // 0.93734, -0.34842 - 0x3fee0766d9280f54, 0xbfd61d595c88c203, // 0.9384, -0.34554 - 0x3fee100cca2980ac, 0xbfd5ee27379ea693, // 0.93946, -0.34266 - 0x3fee18a02fdc66d9, 0xbfd5bee78b9db3b6, // 0.94051, -0.33978 - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689 - 0x3fee298f4439197a, 0xbfd5604012f467b4, // 0.94257, -0.334 - 0x3fee31eae870ce25, 0xbfd530d880af3c24, // 0.94359, -0.33111 - 0x3fee3a33ec75ce85, 0xbfd50163dc197047, // 0.9446, -0.32821 - 0x3fee426a4b2bc17e, 0xbfd4d1e24278e76a, // 0.94561, -0.32531 - 0x3fee4a8dff81ce5e, 0xbfd4a253d11b82f3, // 0.9466, -0.32241 - 0x3fee529f04729ffc, 0xbfd472b8a5571054, // 0.94759, -0.3195 - 0x3fee5a9d550467d3, 0xbfd44310dc8936f0, // 0.94856, -0.31659 - 0x3fee6288ec48e112, 0xbfd4135c94176602, // 0.94953, -0.31368 - 0x3fee6a61c55d53a7, 0xbfd3e39be96ec271, // 0.95049, -0.31077 - 0x3fee7227db6a9744, 0xbfd3b3cefa0414b7, // 0.95144, -0.30785 - 0x3fee79db29a5165a, 0xbfd383f5e353b6aa, // 0.95238, -0.30493 - 0x3fee817bab4cd10d, 0xbfd35410c2e18152, // 0.95331, -0.30201 - 0x3fee89095bad6025, 0xbfd3241fb638baaf, // 0.95423, -0.29908 - 0x3fee9084361df7f3, 0xbfd2f422daec0386, // 0.95514, -0.29615 - 0x3fee97ec36016b30, 0xbfd2c41a4e954520, // 0.95605, -0.29322 - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028 - 0x3feea68393e65800, 0xbfd263e6995554ba, // 0.95783, -0.28735 - 0x3feeadb2e8e7a88e, 0xbfd233bbabc3bb72, // 0.9587, -0.28441 - 0x3feeb4cf515b8811, 0xbfd2038583d727bd, // 0.95957, -0.28146 - 0x3feebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // 0.96043, -0.27852 - 0x3feec2cf4b1af6b2, 0xbfd1a2f7fbe8f243, // 0.96128, -0.27557 - 0x3feec9b2d3c3bf84, 0xbfd172a0d7765177, // 0.96212, -0.27262 - 0x3feed0835e999009, 0xbfd1423eefc69378, // 0.96295, -0.26967 - 0x3feed740e7684963, 0xbfd111d262b1f677, // 0.96378, -0.26671 - 0x3feeddeb6a078651, 0xbfd0e15b4e1749cd, // 0.96459, -0.26375 - 0x3feee482e25a9dbc, 0xbfd0b0d9cfdbdb90, // 0.96539, -0.26079 - 0x3feeeb074c50a544, 0xbfd0804e05eb661e, // 0.96619, -0.25783 - 0x3feef178a3e473c2, 0xbfd04fb80e37fdae, // 0.96698, -0.25487 - 0x3feef7d6e51ca3c0, 0xbfd01f1806b9fdd2, // 0.96775, -0.2519 - 0x3feefe220c0b95ec, 0xbfcfdcdc1adfedf8, // 0.96852, -0.24893 - 0x3fef045a14cf738c, 0xbfcf7b7480bd3801, // 0.96928, -0.24596 - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298 - 0x3fef1090bc898f5f, 0xbfceb86b462de348, // 0.97077, -0.24 - 0x3fef168f53f7205d, 0xbfce56ca1e101a1b, // 0.9715, -0.23702 - 0x3fef1c7abe284708, 0xbfcdf5163f01099a, // 0.97223, -0.23404 - 0x3fef2252f7763ada, 0xbfcd934fe5454311, // 0.97294, -0.23106 - 0x3fef2817fc4609ce, 0xbfcd31774d2cbdee, // 0.97364, -0.22807 - 0x3fef2dc9c9089a9d, 0xbfcccf8cb312b286, // 0.97434, -0.22508 - 0x3fef33685a3aaef0, 0xbfcc6d90535d74dc, // 0.97503, -0.22209 - 0x3fef38f3ac64e589, 0xbfcc0b826a7e4f63, // 0.9757, -0.2191 - 0x3fef3e6bbc1bbc65, 0xbfcba96334f15dad, // 0.97637, -0.21611 - 0x3fef43d085ff92dd, 0xbfcb4732ef3d6722, // 0.97703, -0.21311 - 0x3fef492206bcabb4, 0xbfcae4f1d5f3b9ab, // 0.97768, -0.21011 - 0x3fef4e603b0b2f2d, 0xbfca82a025b00451, // 0.97832, -0.20711 - 0x3fef538b1faf2d07, 0xbfca203e1b1831da, // 0.97895, -0.20411 - 0x3fef58a2b1789e84, 0xbfc9bdcbf2dc4366, // 0.97957, -0.2011 - 0x3fef5da6ed43685d, 0xbfc95b49e9b62af9, // 0.98018, -0.1981 - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509 - 0x3fef677556883cee, 0xbfc8961727c41804, // 0.98138, -0.19208 - 0x3fef6c3f7df5bbb7, 0xbfc83366e89c64c5, // 0.98196, -0.18907 - 0x3fef70f6434b7eb7, 0xbfc7d0a7bbd2cb1b, // 0.98254, -0.18606 - 0x3fef7599a3a12077, 0xbfc76dd9de50bf31, // 0.98311, -0.18304 - 0x3fef7a299c1a322a, 0xbfc70afd8d08c4ff, // 0.98366, -0.18002 - 0x3fef7ea629e63d6e, 0xbfc6a81304f64ab2, // 0.98421, -0.177 - 0x3fef830f4a40c60c, 0xbfc6451a831d830d, // 0.98475, -0.17398 - 0x3fef8764fa714ba9, 0xbfc5e214448b3fc6, // 0.98528, -0.17096 - 0x3fef8ba737cb4b78, 0xbfc57f008654cbde, // 0.9858, -0.16794 - 0x3fef8fd5ffae41db, 0xbfc51bdf8597c5f2, // 0.98631, -0.16491 - 0x3fef93f14f85ac08, 0xbfc4b8b17f79fa88, // 0.98681, -0.16189 - 0x3fef97f924c9099b, 0xbfc45576b1293e5a, // 0.9873, -0.15886 - 0x3fef9bed7cfbde29, 0xbfc3f22f57db4893, // 0.98778, -0.15583 - 0x3fef9fce55adb2c8, 0xbfc38edbb0cd8d14, // 0.98826, -0.1528 - 0x3fefa39bac7a1791, 0xbfc32b7bf94516a7, // 0.98872, -0.14976 - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673 - 0x3fefaafbcb0cfddc, 0xbfc264994dfd340a, // 0.98962, -0.1437 - 0x3fefae8e8e46cfbb, 0xbfc20116d4ec7bce, // 0.99006, -0.14066 - 0x3fefb20dc681d54d, 0xbfc19d8940be24e7, // 0.99049, -0.13762 - 0x3fefb5797195d741, 0xbfc139f0cedaf576, // 0.9909, -0.13458 - 0x3fefb8d18d66adb7, 0xbfc0d64dbcb26786, // 0.99131, -0.13154 - 0x3fefbc1617e44186, 0xbfc072a047ba831d, // 0.99171, -0.1285 - 0x3fefbf470f0a8d88, 0xbfc00ee8ad6fb85b, // 0.9921, -0.12545 - 0x3fefc26470e19fd3, 0xbfbf564e56a9730e, // 0.99248, -0.12241 - 0x3fefc56e3b7d9af6, 0xbfbe8eb7fde4aa3e, // 0.99285, -0.11937 - 0x3fefc8646cfeb721, 0xbfbdc70ecbae9fc8, // 0.99321, -0.11632 - 0x3fefcb4703914354, 0xbfbcff533b307dc1, // 0.99356, -0.11327 - 0x3fefce15fd6da67b, 0xbfbc3785c79ec2d5, // 0.99391, -0.11022 - 0x3fefd0d158d86087, 0xbfbb6fa6ec38f64c, // 0.99424, -0.10717 - 0x3fefd37914220b84, 0xbfbaa7b724495c04, // 0.99456, -0.10412 - 0x3fefd60d2da75c9e, 0xbfb9dfb6eb24a85c, // 0.99488, -0.10107 - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518, -0.098017 - 0x3fefdafa7514538c, 0xbfb84f8712c130a0, // 0.99548, -0.094963 - 0x3fefdd539ff1f456, 0xbfb787586a5d5b21, // 0.99577, -0.091909 - 0x3fefdf9922f73307, 0xbfb6bf1b3e79b129, // 0.99604, -0.088854 - 0x3fefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // 0.99631, -0.085797 - 0x3fefe3e92be9d886, 0xbfb52e774a4d4d0a, // 0.99657, -0.08274 - 0x3fefe5f3af2e3940, 0xbfb4661179272096, // 0.99682, -0.079682 - 0x3fefe7ea85482d60, 0xbfb39d9f12c5a299, // 0.99706, -0.076624 - 0x3fefe9cdad01883a, 0xbfb2d52092ce19f6, // 0.99729, -0.073565 - 0x3fefeb9d2530410f, 0xbfb20c9674ed444c, // 0.99751, -0.070505 - 0x3fefed58ecb673c4, 0xbfb1440134d709b2, // 0.99772, -0.067444 - 0x3fefef0102826191, 0xbfb07b614e463064, // 0.99793, -0.064383 - 0x3feff095658e71ad, 0xbfaf656e79f820e0, // 0.99812, -0.061321 - 0x3feff21614e131ed, 0xbfadd406f9808ec8, // 0.9983, -0.058258 - 0x3feff3830f8d575c, 0xbfac428d12c0d7e3, // 0.99848, -0.055195 - 0x3feff4dc54b1bed3, 0xbfaab101bd5f8317, // 0.99864, -0.052132 - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988, -0.049068 - 0x3feff753bb1b9164, 0xbfa78dbaa5874685, // 0.99894, -0.046003 - 0x3feff871dadb81df, 0xbfa5fc00d290cd43, // 0.99908, -0.042938 - 0x3feff97c4208c014, 0xbfa46a396ff86179, // 0.9992, -0.039873 - 0x3feffa72effef75d, 0xbfa2d865759455cd, // 0.99932, -0.036807 - 0x3feffb55e425fdae, 0xbfa14685db42c17e, // 0.99943, -0.033741 - 0x3feffc251df1d3f8, 0xbf9f693731d1cf01, // 0.99953, -0.030675 - 0x3feffce09ce2a679, 0xbf9c454f4ce53b1c, // 0.99962, -0.027608 - 0x3feffd886084cd0d, 0xbf992155f7a3667e, // 0.9997, -0.024541 - 0x3feffe1c6870cb77, 0xbf95fd4d21fab226, // 0.99977, -0.021474 - 0x3feffe9cb44b51a1, 0xbf92d936bbe30efd, // 0.99983, -0.018407 - 0x3fefff0943c53bd1, 0xbf8f6a296ab997ca, // 0.99988, -0.015339 - 0x3fefff62169b92db, 0xbf8921d1fcdec784, // 0.99992, -0.012272 - 0x3fefffa72c978c4f, 0xbf82d96b0e509703, // 0.99996,-0.0092038 - 0x3fefffd8858e8a92, 0xbf7921f0fe670071, // 0.99998,-0.0061359 - 0x3feffff621621d02, 0xbf6921f8becca4ba, // 1, -0.003068 - -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_4096) -/** - @par - Example code for Double Precision Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 4096, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const uint64_t twiddleCoefF64_4096[8192] = { - 0x3ff0000000000000, 0x0000000000000000, // 1, 0 - 0x3feffffd88586ee6, 0x3f5921faaee6472d, // 1, 0.001534 - 0x3feffff621621d02, 0x3f6921f8becca4ba, // 1, 0.003068 - 0x3fefffe9cb1e2e8d, 0x3f72d97822f996bc, // 0.99999, 0.0046019 - 0x3fefffd8858e8a92, 0x3f7921f0fe670071, // 0.99998, 0.0061359 - 0x3fefffc250b5daef, 0x3f7f6a65f9a2a3c5, // 0.99997, 0.0076698 - 0x3fefffa72c978c4f, 0x3f82d96b0e509703, // 0.99996, 0.0092038 - 0x3fefff871937ce2f, 0x3f85fda037ac05e0, // 0.99994, 0.010738 - 0x3fefff62169b92db, 0x3f8921d1fcdec784, // 0.99992, 0.012272 - 0x3fefff3824c88f6f, 0x3f8c45ffe1e48ad9, // 0.9999, 0.013805 - 0x3fefff0943c53bd1, 0x3f8f6a296ab997ca, // 0.99988, 0.015339 - 0x3feffed57398d2b7, 0x3f9147270dad7132, // 0.99986, 0.016873 - 0x3feffe9cb44b51a1, 0x3f92d936bbe30efd, // 0.99983, 0.018407 - 0x3feffe5f05e578db, 0x3f946b4381fce81c, // 0.9998, 0.01994 - 0x3feffe1c6870cb77, 0x3f95fd4d21fab226, // 0.99977, 0.021474 - 0x3feffdd4dbf78f52, 0x3f978f535ddc9f03, // 0.99974, 0.023008 - 0x3feffd886084cd0d, 0x3f992155f7a3667e, // 0.9997, 0.024541 - 0x3feffd36f624500c, 0x3f9ab354b1504fca, // 0.99966, 0.026075 - 0x3feffce09ce2a679, 0x3f9c454f4ce53b1c, // 0.99962, 0.027608 - 0x3feffc8554cd213a, 0x3f9dd7458c64ab39, // 0.99958, 0.029142 - 0x3feffc251df1d3f8, 0x3f9f693731d1cf01, // 0.99953, 0.030675 - 0x3feffbbff85f9515, 0x3fa07d91ff984580, // 0.99948, 0.032208 - 0x3feffb55e425fdae, 0x3fa14685db42c17e, // 0.99943, 0.033741 - 0x3feffae6e1556998, 0x3fa20f770ceb11c6, // 0.99938, 0.035274 - 0x3feffa72effef75d, 0x3fa2d865759455cd, // 0.99932, 0.036807 - 0x3feff9fa10348837, 0x3fa3a150f6421afc, // 0.99926, 0.03834 - 0x3feff97c4208c014, 0x3fa46a396ff86179, // 0.9992, 0.039873 - 0x3feff8f9858f058b, 0x3fa5331ec3bba0eb, // 0.99914, 0.041406 - 0x3feff871dadb81df, 0x3fa5fc00d290cd43, // 0.99908, 0.042938 - 0x3feff7e5420320f9, 0x3fa6c4df7d7d5b84, // 0.99901, 0.044471 - 0x3feff753bb1b9164, 0x3fa78dbaa5874685, // 0.99894, 0.046003 - 0x3feff6bd463b444d, 0x3fa856922bb513c1, // 0.99887, 0.047535 - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068 - 0x3feff58192ee0358, 0x3fa9e835d6993c87, // 0.99872, 0.0506 - 0x3feff4dc54b1bed3, 0x3faab101bd5f8317, // 0.99864, 0.052132 - 0x3feff43228de1b77, 0x3fab79c986698b78, // 0.99856, 0.053664 - 0x3feff3830f8d575c, 0x3fac428d12c0d7e3, // 0.99848, 0.055195 - 0x3feff2cf08da7321, 0x3fad0b4c436f91d0, // 0.99839, 0.056727 - 0x3feff21614e131ed, 0x3fadd406f9808ec8, // 0.9983, 0.058258 - 0x3feff15833be1965, 0x3fae9cbd15ff5527, // 0.99821, 0.05979 - 0x3feff095658e71ad, 0x3faf656e79f820e0, // 0.99812, 0.061321 - 0x3fefefcdaa704562, 0x3fb0170d833bf421, // 0.99802, 0.062852 - 0x3fefef0102826191, 0x3fb07b614e463064, // 0.99793, 0.064383 - 0x3fefee2f6de455ba, 0x3fb0dfb28ea201e6, // 0.99783, 0.065913 - 0x3fefed58ecb673c4, 0x3fb1440134d709b2, // 0.99772, 0.067444 - 0x3fefec7d7f19cffc, 0x3fb1a84d316d4f8a, // 0.99762, 0.068974 - 0x3fefeb9d2530410f, 0x3fb20c9674ed444c, // 0.99751, 0.070505 - 0x3fefeab7df1c6005, 0x3fb270dcefdfc45b, // 0.9974, 0.072035 - 0x3fefe9cdad01883a, 0x3fb2d52092ce19f6, // 0.99729, 0.073565 - 0x3fefe8de8f03d75c, 0x3fb339614e41ffa5, // 0.99718, 0.075094 - 0x3fefe7ea85482d60, 0x3fb39d9f12c5a299, // 0.99706, 0.076624 - 0x3fefe6f18ff42c84, 0x3fb401d9d0e3a507, // 0.99694, 0.078153 - 0x3fefe5f3af2e3940, 0x3fb4661179272096, // 0.99682, 0.079682 - 0x3fefe4f0e31d7a4a, 0x3fb4ca45fc1ba8b6, // 0.9967, 0.081211 - 0x3fefe3e92be9d886, 0x3fb52e774a4d4d0a, // 0.99657, 0.08274 - 0x3fefe2dc89bbff08, 0x3fb592a554489bc8, // 0.99644, 0.084269 - 0x3fefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // 0.99631, 0.085797 - 0x3fefe0b485181be3, 0x3fb65af75dd0f87b, // 0.99618, 0.087326 - 0x3fefdf9922f73307, 0x3fb6bf1b3e79b129, // 0.99604, 0.088854 - 0x3fefde78d68653fd, 0x3fb7233b9d236e71, // 0.99591, 0.090381 - 0x3fefdd539ff1f456, 0x3fb787586a5d5b21, // 0.99577, 0.091909 - 0x3fefdc297f674ba9, 0x3fb7eb7196b72ee4, // 0.99563, 0.093436 - 0x3fefdafa7514538c, 0x3fb84f8712c130a0, // 0.99548, 0.094963 - 0x3fefd9c68127c78c, 0x3fb8b398cf0c38e0, // 0.99533, 0.09649 - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017 - 0x3fefd74fdd40abbf, 0x3fb97bb0caaba56f, // 0.99503, 0.099544 - 0x3fefd60d2da75c9e, 0x3fb9dfb6eb24a85c, // 0.99488, 0.10107 - 0x3fefd4c59536fae4, 0x3fba43b90e27f3c4, // 0.99472, 0.1026 - 0x3fefd37914220b84, 0x3fbaa7b724495c04, // 0.99456, 0.10412 - 0x3fefd227aa9bd53b, 0x3fbb0bb11e1d5559, // 0.9944, 0.10565 - 0x3fefd0d158d86087, 0x3fbb6fa6ec38f64c, // 0.99424, 0.10717 - 0x3fefcf761f0c77a3, 0x3fbbd3987f31fa0e, // 0.99407, 0.1087 - 0x3fefce15fd6da67b, 0x3fbc3785c79ec2d5, // 0.99391, 0.11022 - 0x3fefccb0f4323aa3, 0x3fbc9b6eb6165c42, // 0.99374, 0.11175 - 0x3fefcb4703914354, 0x3fbcff533b307dc1, // 0.99356, 0.11327 - 0x3fefc9d82bc2915e, 0x3fbd633347858ce4, // 0.99339, 0.11479 - 0x3fefc8646cfeb721, 0x3fbdc70ecbae9fc8, // 0.99321, 0.11632 - 0x3fefc6ebc77f0887, 0x3fbe2ae5b8457f77, // 0.99303, 0.11784 - 0x3fefc56e3b7d9af6, 0x3fbe8eb7fde4aa3e, // 0.99285, 0.11937 - 0x3fefc3ebc935454c, 0x3fbef2858d27561b, // 0.99267, 0.12089 - 0x3fefc26470e19fd3, 0x3fbf564e56a9730e, // 0.99248, 0.12241 - 0x3fefc0d832bf043a, 0x3fbfba124b07ad85, // 0.99229, 0.12393 - 0x3fefbf470f0a8d88, 0x3fc00ee8ad6fb85b, // 0.9921, 0.12545 - 0x3fefbdb106021816, 0x3fc040c5bb67747e, // 0.99191, 0.12698 - 0x3fefbc1617e44186, 0x3fc072a047ba831d, // 0.99171, 0.1285 - 0x3fefba7644f068b5, 0x3fc0a4784ab8bf1d, // 0.99151, 0.13002 - 0x3fefb8d18d66adb7, 0x3fc0d64dbcb26786, // 0.99131, 0.13154 - 0x3fefb727f187f1c7, 0x3fc1082095f820b0, // 0.99111, 0.13306 - 0x3fefb5797195d741, 0x3fc139f0cedaf576, // 0.9909, 0.13458 - 0x3fefb3c60dd2c199, 0x3fc16bbe5fac5865, // 0.9907, 0.1361 - 0x3fefb20dc681d54d, 0x3fc19d8940be24e7, // 0.99049, 0.13762 - 0x3fefb0509be6f7db, 0x3fc1cf516a62a077, // 0.99027, 0.13914 - 0x3fefae8e8e46cfbb, 0x3fc20116d4ec7bce, // 0.99006, 0.14066 - 0x3fefacc79de6c44f, 0x3fc232d978aed413, // 0.98984, 0.14218 - 0x3fefaafbcb0cfddc, 0x3fc264994dfd340a, // 0.98962, 0.1437 - 0x3fefa92b1600657c, 0x3fc296564d2b953e, // 0.9894, 0.14521 - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673 - 0x3fefa57b066e2754, 0x3fc2f9c7aa7a72af, // 0.98895, 0.14825 - 0x3fefa39bac7a1791, 0x3fc32b7bf94516a7, // 0.98872, 0.14976 - 0x3fefa1b7717661d5, 0x3fc35d2d53440db2, // 0.98849, 0.15128 - 0x3fef9fce55adb2c8, 0x3fc38edbb0cd8d14, // 0.98826, 0.1528 - 0x3fef9de0596b77a3, 0x3fc3c0870a383ff6, // 0.98802, 0.15431 - 0x3fef9bed7cfbde29, 0x3fc3f22f57db4893, // 0.98778, 0.15583 - 0x3fef99f5c0abd496, 0x3fc423d4920e4166, // 0.98754, 0.15734 - 0x3fef97f924c9099b, 0x3fc45576b1293e5a, // 0.9873, 0.15886 - 0x3fef95f7a9a1ec47, 0x3fc48715ad84cdf5, // 0.98706, 0.16037 - 0x3fef93f14f85ac08, 0x3fc4b8b17f79fa88, // 0.98681, 0.16189 - 0x3fef91e616c43891, 0x3fc4ea4a1f624b61, // 0.98656, 0.1634 - 0x3fef8fd5ffae41db, 0x3fc51bdf8597c5f2, // 0.98631, 0.16491 - 0x3fef8dc10a95380d, 0x3fc54d71aa74ef02, // 0.98605, 0.16643 - 0x3fef8ba737cb4b78, 0x3fc57f008654cbde, // 0.9858, 0.16794 - 0x3fef898887a36c84, 0x3fc5b08c1192e381, // 0.98554, 0.16945 - 0x3fef8764fa714ba9, 0x3fc5e214448b3fc6, // 0.98528, 0.17096 - 0x3fef853c9089595e, 0x3fc61399179a6e94, // 0.98501, 0.17247 - 0x3fef830f4a40c60c, 0x3fc6451a831d830d, // 0.98475, 0.17398 - 0x3fef80dd27ed8204, 0x3fc676987f7216b8, // 0.98448, 0.17549 - 0x3fef7ea629e63d6e, 0x3fc6a81304f64ab2, // 0.98421, 0.177 - 0x3fef7c6a50826840, 0x3fc6d98a0c08c8da, // 0.98394, 0.17851 - 0x3fef7a299c1a322a, 0x3fc70afd8d08c4ff, // 0.98366, 0.18002 - 0x3fef77e40d068a90, 0x3fc73c6d8055fe0a, // 0.98339, 0.18153 - 0x3fef7599a3a12077, 0x3fc76dd9de50bf31, // 0.98311, 0.18304 - 0x3fef734a60446279, 0x3fc79f429f59e11d, // 0.98282, 0.18455 - 0x3fef70f6434b7eb7, 0x3fc7d0a7bbd2cb1b, // 0.98254, 0.18606 - 0x3fef6e9d4d1262ca, 0x3fc802092c1d744b, // 0.98225, 0.18756 - 0x3fef6c3f7df5bbb7, 0x3fc83366e89c64c5, // 0.98196, 0.18907 - 0x3fef69dcd652f5de, 0x3fc864c0e9b2b6cf, // 0.98167, 0.19057 - 0x3fef677556883cee, 0x3fc8961727c41804, // 0.98138, 0.19208 - 0x3fef6508fef47bd5, 0x3fc8c7699b34ca7e, // 0.98108, 0.19359 - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509 - 0x3fef6021c9f148c2, 0x3fc92a0303c8194f, // 0.98048, 0.19659 - 0x3fef5da6ed43685d, 0x3fc95b49e9b62af9, // 0.98018, 0.1981 - 0x3fef5b273a4fa2d9, 0x3fc98c8ce69a7aec, // 0.97988, 0.1996 - 0x3fef58a2b1789e84, 0x3fc9bdcbf2dc4366, // 0.97957, 0.2011 - 0x3fef56195321c090, 0x3fc9ef0706e35a35, // 0.97926, 0.20261 - 0x3fef538b1faf2d07, 0x3fca203e1b1831da, // 0.97895, 0.20411 - 0x3fef50f81785c6b9, 0x3fca517127e3dabc, // 0.97863, 0.20561 - 0x3fef4e603b0b2f2d, 0x3fca82a025b00451, // 0.97832, 0.20711 - 0x3fef4bc38aa5c694, 0x3fcab3cb0ce6fe44, // 0.978, 0.20861 - 0x3fef492206bcabb4, 0x3fcae4f1d5f3b9ab, // 0.97768, 0.21011 - 0x3fef467bafb7bbe0, 0x3fcb16147941ca2a, // 0.97735, 0.21161 - 0x3fef43d085ff92dd, 0x3fcb4732ef3d6722, // 0.97703, 0.21311 - 0x3fef412089fd8adc, 0x3fcb784d30536cda, // 0.9767, 0.21461 - 0x3fef3e6bbc1bbc65, 0x3fcba96334f15dad, // 0.97637, 0.21611 - 0x3fef3bb21cc4fe47, 0x3fcbda74f5856330, // 0.97604, 0.2176 - 0x3fef38f3ac64e589, 0x3fcc0b826a7e4f63, // 0.9757, 0.2191 - 0x3fef36306b67c556, 0x3fcc3c8b8c4b9dd7, // 0.97536, 0.2206 - 0x3fef33685a3aaef0, 0x3fcc6d90535d74dc, // 0.97503, 0.22209 - 0x3fef309b794b719f, 0x3fcc9e90b824a6a9, // 0.97468, 0.22359 - 0x3fef2dc9c9089a9d, 0x3fcccf8cb312b286, // 0.97434, 0.22508 - 0x3fef2af349e17507, 0x3fcd00843c99c5f9, // 0.97399, 0.22658 - 0x3fef2817fc4609ce, 0x3fcd31774d2cbdee, // 0.97364, 0.22807 - 0x3fef2537e0a71f9f, 0x3fcd6265dd3f27e3, // 0.97329, 0.22957 - 0x3fef2252f7763ada, 0x3fcd934fe5454311, // 0.97294, 0.23106 - 0x3fef1f6941259d7a, 0x3fcdc4355db40195, // 0.97258, 0.23255 - 0x3fef1c7abe284708, 0x3fcdf5163f01099a, // 0.97223, 0.23404 - 0x3fef19876ef1f486, 0x3fce25f281a2b684, // 0.97187, 0.23553 - 0x3fef168f53f7205d, 0x3fce56ca1e101a1b, // 0.9715, 0.23702 - 0x3fef13926dad024e, 0x3fce879d0cc0fdaf, // 0.97114, 0.23851 - 0x3fef1090bc898f5f, 0x3fceb86b462de348, // 0.97077, 0.24 - 0x3fef0d8a410379c5, 0x3fcee934c2d006c7, // 0.9704, 0.24149 - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298 - 0x3fef076eecade0fa, 0x3fcf4ab9679c9f5c, // 0.96966, 0.24447 - 0x3fef045a14cf738c, 0x3fcf7b7480bd3801, // 0.96928, 0.24596 - 0x3fef014074708ed3, 0x3fcfac2abeff57ff, // 0.9689, 0.24744 - 0x3feefe220c0b95ec, 0x3fcfdcdc1adfedf8, // 0.96852, 0.24893 - 0x3feefafedc1ba8b7, 0x3fd006c4466e54af, // 0.96814, 0.25041 - 0x3feef7d6e51ca3c0, 0x3fd01f1806b9fdd2, // 0.96775, 0.2519 - 0x3feef4aa278b2032, 0x3fd037694a928cac, // 0.96737, 0.25338 - 0x3feef178a3e473c2, 0x3fd04fb80e37fdae, // 0.96698, 0.25487 - 0x3feeee425aa6b09a, 0x3fd068044deab002, // 0.96658, 0.25635 - 0x3feeeb074c50a544, 0x3fd0804e05eb661e, // 0.96619, 0.25783 - 0x3feee7c77961dc9e, 0x3fd09895327b465e, // 0.96579, 0.25931 - 0x3feee482e25a9dbc, 0x3fd0b0d9cfdbdb90, // 0.96539, 0.26079 - 0x3feee13987bbebdc, 0x3fd0c91bda4f158d, // 0.96499, 0.26227 - 0x3feeddeb6a078651, 0x3fd0e15b4e1749cd, // 0.96459, 0.26375 - 0x3feeda9889bfe86a, 0x3fd0f998277733f7, // 0.96418, 0.26523 - 0x3feed740e7684963, 0x3fd111d262b1f677, // 0.96378, 0.26671 - 0x3feed3e483849c51, 0x3fd12a09fc0b1b12, // 0.96337, 0.26819 - 0x3feed0835e999009, 0x3fd1423eefc69378, // 0.96295, 0.26967 - 0x3feecd1d792c8f10, 0x3fd15a713a28b9d9, // 0.96254, 0.27115 - 0x3feec9b2d3c3bf84, 0x3fd172a0d7765177, // 0.96212, 0.27262 - 0x3feec6436ee60309, 0x3fd18acdc3f4873a, // 0.9617, 0.2741 - 0x3feec2cf4b1af6b2, 0x3fd1a2f7fbe8f243, // 0.96128, 0.27557 - 0x3feebf5668eaf2ef, 0x3fd1bb1f7b999480, // 0.96086, 0.27705 - 0x3feebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // 0.96043, 0.27852 - 0x3feeb8566b810f2a, 0x3fd1eb6643499fbb, // 0.96, 0.27999 - 0x3feeb4cf515b8811, 0x3fd2038583d727bd, // 0.95957, 0.28146 - 0x3feeb1437af9bb34, 0x3fd21ba1fd3d2623, // 0.95914, 0.28294 - 0x3feeadb2e8e7a88e, 0x3fd233bbabc3bb72, // 0.9587, 0.28441 - 0x3feeaa1d9bb20af3, 0x3fd24bd28bb37672, // 0.95827, 0.28588 - 0x3feea68393e65800, 0x3fd263e6995554ba, // 0.95783, 0.28735 - 0x3feea2e4d212c000, 0x3fd27bf7d0f2c346, // 0.95738, 0.28882 - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028 - 0x3fee9b99229046f8, 0x3fd2ac11af483572, // 0.95649, 0.29175 - 0x3fee97ec36016b30, 0x3fd2c41a4e954520, // 0.95605, 0.29322 - 0x3fee943a91aab4b4, 0x3fd2dc200907fe51, // 0.95559, 0.29469 - 0x3fee9084361df7f3, 0x3fd2f422daec0386, // 0.95514, 0.29615 - 0x3fee8cc923edc388, 0x3fd30c22c08d6a13, // 0.95469, 0.29762 - 0x3fee89095bad6025, 0x3fd3241fb638baaf, // 0.95423, 0.29908 - 0x3fee8544ddf0d075, 0x3fd33c19b83af207, // 0.95377, 0.30054 - 0x3fee817bab4cd10d, 0x3fd35410c2e18152, // 0.95331, 0.30201 - 0x3fee7dadc456d850, 0x3fd36c04d27a4edf, // 0.95284, 0.30347 - 0x3fee79db29a5165a, 0x3fd383f5e353b6aa, // 0.95238, 0.30493 - 0x3fee7603dbce74e9, 0x3fd39be3f1bc8aef, // 0.95191, 0.30639 - 0x3fee7227db6a9744, 0x3fd3b3cefa0414b7, // 0.95144, 0.30785 - 0x3fee6e472911da27, 0x3fd3cbb6f87a146e, // 0.95096, 0.30931 - 0x3fee6a61c55d53a7, 0x3fd3e39be96ec271, // 0.95049, 0.31077 - 0x3fee6677b0e6d31e, 0x3fd3fb7dc932cfa4, // 0.95001, 0.31222 - 0x3fee6288ec48e112, 0x3fd4135c94176602, // 0.94953, 0.31368 - 0x3fee5e95781ebf1c, 0x3fd42b38466e2928, // 0.94905, 0.31514 - 0x3fee5a9d550467d3, 0x3fd44310dc8936f0, // 0.94856, 0.31659 - 0x3fee56a083968eb1, 0x3fd45ae652bb2800, // 0.94807, 0.31805 - 0x3fee529f04729ffc, 0x3fd472b8a5571054, // 0.94759, 0.3195 - 0x3fee4e98d836c0af, 0x3fd48a87d0b07fd7, // 0.94709, 0.32096 - 0x3fee4a8dff81ce5e, 0x3fd4a253d11b82f3, // 0.9466, 0.32241 - 0x3fee467e7af35f23, 0x3fd4ba1ca2eca31c, // 0.94611, 0.32386 - 0x3fee426a4b2bc17e, 0x3fd4d1e24278e76a, // 0.94561, 0.32531 - 0x3fee3e5170cbfc46, 0x3fd4e9a4ac15d520, // 0.94511, 0.32676 - 0x3fee3a33ec75ce85, 0x3fd50163dc197047, // 0.9446, 0.32821 - 0x3fee3611becbaf69, 0x3fd5191fceda3c35, // 0.9441, 0.32966 - 0x3fee31eae870ce25, 0x3fd530d880af3c24, // 0.94359, 0.33111 - 0x3fee2dbf6a0911d9, 0x3fd5488dedeff3be, // 0.94308, 0.33255 - 0x3fee298f4439197a, 0x3fd5604012f467b4, // 0.94257, 0.334 - 0x3fee255a77a63bb8, 0x3fd577eeec151e47, // 0.94206, 0.33545 - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689 - 0x3fee1ce2ecd0c0d8, 0x3fd5a742ac0ff78d, // 0.94103, 0.33833 - 0x3fee18a02fdc66d9, 0x3fd5bee78b9db3b6, // 0.94051, 0.33978 - 0x3fee1458cec1ad83, 0x3fd5d68910aee686, // 0.93998, 0.34122 - 0x3fee100cca2980ac, 0x3fd5ee27379ea693, // 0.93946, 0.34266 - 0x3fee0bbc22bd8349, 0x3fd605c1fcc88f63, // 0.93893, 0.3441 - 0x3fee0766d9280f54, 0x3fd61d595c88c203, // 0.9384, 0.34554 - 0x3fee030cee1435b8, 0x3fd634ed533be58e, // 0.93787, 0.34698 - 0x3fedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // 0.93734, 0.34842 - 0x3fedfa4b3621271d, 0x3fd6640af6f03d9e, // 0.9368, 0.34986 - 0x3fedf5e36a9ba59c, 0x3fd67b949cad63ca, // 0.93627, 0.35129 - 0x3fedf177004b2534, 0x3fd6931acad55f51, // 0.93573, 0.35273 - 0x3feded05f7de47da, 0x3fd6aa9d7dc77e16, // 0.93518, 0.35416 - 0x3fede890520465ce, 0x3fd6c21cb1e39771, // 0.93464, 0.3556 - 0x3fede4160f6d8d81, 0x3fd6d998638a0cb5, // 0.93409, 0.35703 - 0x3feddf9730ca837b, 0x3fd6f1108f1bc9c5, // 0.93354, 0.35846 - 0x3feddb13b6ccc23d, 0x3fd7088530fa459e, // 0.93299, 0.3599 - 0x3fedd68ba2267a25, 0x3fd71ff6458782ec, // 0.93244, 0.36133 - 0x3fedd1fef38a915a, 0x3fd73763c9261092, // 0.93188, 0.36276 - 0x3fedcd6dabaca3a5, 0x3fd74ecdb8390a3e, // 0.93133, 0.36418 - 0x3fedc8d7cb410260, 0x3fd766340f2418f6, // 0.93077, 0.36561 - 0x3fedc43d52fcb453, 0x3fd77d96ca4b73a6, // 0.93021, 0.36704 - 0x3fedbf9e4395759a, 0x3fd794f5e613dfae, // 0.92964, 0.36847 - 0x3fedbafa9dc1b78d, 0x3fd7ac515ee2b172, // 0.92907, 0.36989 - 0x3fedb6526238a09b, 0x3fd7c3a9311dcce7, // 0.92851, 0.37132 - 0x3fedb1a591b20c38, 0x3fd7dafd592ba621, // 0.92794, 0.37274 - 0x3fedacf42ce68ab9, 0x3fd7f24dd37341e3, // 0.92736, 0.37416 - 0x3feda83e348f613b, 0x3fd8099a9c5c362d, // 0.92679, 0.37559 - 0x3feda383a9668988, 0x3fd820e3b04eaac4, // 0.92621, 0.37701 - 0x3fed9ec48c26b1f3, 0x3fd838290bb359c8, // 0.92563, 0.37843 - 0x3fed9a00dd8b3d46, 0x3fd84f6aaaf3903f, // 0.92505, 0.37985 - 0x3fed95389e50429b, 0x3fd866a88a792ea0, // 0.92447, 0.38127 - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268 - 0x3fed8b9a70ef9cb4, 0x3fd89518fbff098e, // 0.92329, 0.3841 - 0x3fed86c48445a450, 0x3fd8ac4b86d5ed44, // 0.9227, 0.38552 - 0x3fed81ea09f38b63, 0x3fd8c37a439f884f, // 0.92211, 0.38693 - 0x3fed7d0b02b8ecf9, 0x3fd8daa52ec8a4af, // 0.92151, 0.38835 - 0x3fed78276f5617c6, 0x3fd8f1cc44bea329, // 0.92092, 0.38976 - 0x3fed733f508c0dff, 0x3fd908ef81ef7bd1, // 0.92032, 0.39117 - 0x3fed6e52a71c8547, 0x3fd9200ee2c9be97, // 0.91972, 0.39258 - 0x3fed696173c9e68b, 0x3fd9372a63bc93d7, // 0.91911, 0.39399 - 0x3fed646bb7574de5, 0x3fd94e420137bce3, // 0.91851, 0.3954 - 0x3fed5f7172888a7f, 0x3fd96555b7ab948f, // 0.9179, 0.39681 - 0x3fed5a72a6221e73, 0x3fd97c6583890fc2, // 0.91729, 0.39822 - 0x3fed556f52e93eb1, 0x3fd993716141bdfe, // 0.91668, 0.39962 - 0x3fed506779a3d2d9, 0x3fd9aa794d47c9ee, // 0.91606, 0.40103 - 0x3fed4b5b1b187524, 0x3fd9c17d440df9f2, // 0.91545, 0.40243 - 0x3fed464a380e7242, 0x3fd9d87d4207b0ab, // 0.91483, 0.40384 - 0x3fed4134d14dc93a, 0x3fd9ef7943a8ed8a, // 0.91421, 0.40524 - 0x3fed3c1ae79f2b4e, 0x3fda067145664d57, // 0.91359, 0.40664 - 0x3fed36fc7bcbfbdc, 0x3fda1d6543b50ac0, // 0.91296, 0.40804 - 0x3fed31d98e9e503a, 0x3fda34553b0afee5, // 0.91234, 0.40944 - 0x3fed2cb220e0ef9f, 0x3fda4b4127dea1e4, // 0.91171, 0.41084 - 0x3fed2786335f52fc, 0x3fda622906a70b63, // 0.91107, 0.41224 - 0x3fed2255c6e5a4e1, 0x3fda790cd3dbf31a, // 0.91044, 0.41364 - 0x3fed1d20dc40c15c, 0x3fda8fec8bf5b166, // 0.90981, 0.41503 - 0x3fed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // 0.90917, 0.41643 - 0x3fed12a98fac410c, 0x3fdabd9faebc3980, // 0.90853, 0.41782 - 0x3fed0d672f59d2b9, 0x3fdad473125cdc08, // 0.90789, 0.41922 - 0x3fed082054168bac, 0x3fdaeb4252ca07ab, // 0.90724, 0.42061 - 0x3fed02d4feb2bd92, 0x3fdb020d6c7f4009, // 0.9066, 0.422 - 0x3fecfd852fff6ad4, 0x3fdb18d45bf8aca6, // 0.90595, 0.42339 - 0x3fecf830e8ce467b, 0x3fdb2f971db31972, // 0.9053, 0.42478 - 0x3fecf2d829f1b40e, 0x3fdb4655ae2bf757, // 0.90464, 0.42617 - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756 - 0x3fece819488344ce, 0x3fdb73c62d520624, // 0.90333, 0.42894 - 0x3fece2b32799a060, 0x3fdb8a7814fd5693, // 0.90267, 0.43033 - 0x3fecdd489254fe65, 0x3fdba125bd63583e, // 0.90201, 0.43171 - 0x3fecd7d9898b32f6, 0x3fdbb7cf2304bd01, // 0.90135, 0.43309 - 0x3fecd2660e12c1e6, 0x3fdbce744262deee, // 0.90068, 0.43448 - 0x3fecccee20c2de9f, 0x3fdbe51517ffc0d9, // 0.90002, 0.43586 - 0x3fecc771c2736c09, 0x3fdbfbb1a05e0edc, // 0.89935, 0.43724 - 0x3fecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // 0.89867, 0.43862 - 0x3fecbc6bb638d10b, 0x3fdc28ddbb6cf145, // 0.898, 0.43999 - 0x3fecb6e20a00da99, 0x3fdc3f6d47263129, // 0.89732, 0.44137 - 0x3fecb153f02fb87d, 0x3fdc55f877b23537, // 0.89665, 0.44275 - 0x3fecabc169a0b901, 0x3fdc6c7f4997000a, // 0.89597, 0.44412 - 0x3feca62a772fd919, 0x3fdc8301b95b40c2, // 0.89528, 0.4455 - 0x3feca08f19b9c449, 0x3fdc997fc3865388, // 0.8946, 0.44687 - 0x3fec9aef521bd480, 0x3fdcaff964a0421d, // 0.89391, 0.44824 - 0x3fec954b213411f5, 0x3fdcc66e9931c45d, // 0.89322, 0.44961 - 0x3fec8fa287e13305, 0x3fdcdcdf5dc440ce, // 0.89253, 0.45098 - 0x3fec89f587029c13, 0x3fdcf34baee1cd21, // 0.89184, 0.45235 - 0x3fec84441f785f61, 0x3fdd09b389152ec1, // 0.89115, 0.45372 - 0x3fec7e8e52233cf3, 0x3fdd2016e8e9db5b, // 0.89045, 0.45508 - 0x3fec78d41fe4a267, 0x3fdd3675caebf962, // 0.88975, 0.45645 - 0x3fec7315899eaad7, 0x3fdd4cd02ba8609c, // 0.88905, 0.45781 - 0x3fec6d5290341eb2, 0x3fdd632607ac9aa9, // 0.88835, 0.45918 - 0x3fec678b3488739b, 0x3fdd79775b86e389, // 0.88764, 0.46054 - 0x3fec61bf777fcc48, 0x3fdd8fc423c62a25, // 0.88693, 0.4619 - 0x3fec5bef59fef85a, 0x3fdda60c5cfa10d8, // 0.88622, 0.46326 - 0x3fec561adceb743e, 0x3fddbc5003b2edf8, // 0.88551, 0.46462 - 0x3fec5042012b6907, 0x3fddd28f1481cc58, // 0.8848, 0.46598 - 0x3fec4a64c7a5ac4c, 0x3fdde8c98bf86bd6, // 0.88408, 0.46733 - 0x3fec44833141c004, 0x3fddfeff66a941de, // 0.88336, 0.46869 - 0x3fec3e9d3ee7d262, 0x3fde1530a12779f4, // 0.88264, 0.47004 - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714 - 0x3fec32c449f60831, 0x3fde418527dc4ffa, // 0.8812, 0.47275 - 0x3fec2cd14931e3f1, 0x3fde57a86d3cd824, // 0.88047, 0.4741 - 0x3fec26d9f01f2eaf, 0x3fde6dc704be97e2, // 0.87974, 0.47545 - 0x3fec20de3fa971b0, 0x3fde83e0eaf85113, // 0.87901, 0.4768 - 0x3fec1ade38bce19b, 0x3fde99f61c817eda, // 0.87828, 0.47815 - 0x3fec14d9dc465e58, 0x3fdeb00695f25620, // 0.87755, 0.47949 - 0x3fec0ed12b3372e9, 0x3fdec61253e3c61b, // 0.87681, 0.48084 - 0x3fec08c426725549, 0x3fdedc1952ef78d5, // 0.87607, 0.48218 - 0x3fec02b2cef1e641, 0x3fdef21b8fafd3b5, // 0.87533, 0.48353 - 0x3febfc9d25a1b147, 0x3fdf081906bff7fd, // 0.87459, 0.48487 - 0x3febf6832b71ec5b, 0x3fdf1e11b4bbc35c, // 0.87384, 0.48621 - 0x3febf064e15377dd, 0x3fdf3405963fd068, // 0.87309, 0.48755 - 0x3febea424837de6d, 0x3fdf49f4a7e97729, // 0.87235, 0.48889 - 0x3febe41b611154c1, 0x3fdf5fdee656cda3, // 0.8716, 0.49023 - 0x3febddf02cd2b983, 0x3fdf75c44e26a852, // 0.87084, 0.49156 - 0x3febd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // 0.87009, 0.4929 - 0x3febd18ce0dc19d6, 0x3fdfa1808c6cf7e0, // 0.86933, 0.49423 - 0x3febcb54cb0d2327, 0x3fdfb7575c24d2de, // 0.86857, 0.49557 - 0x3febc5186bf8361d, 0x3fdfcd2947c1ff57, // 0.86781, 0.4969 - 0x3febbed7c49380ea, 0x3fdfe2f64be7120f, // 0.86705, 0.49823 - 0x3febb892d5d5dad5, 0x3fdff8be6537615e, // 0.86628, 0.49956 - 0x3febb249a0b6c40d, 0x3fe00740c82b82e0, // 0.86551, 0.50089 - 0x3febabfc262e6586, 0x3fe0121fe4f56d2c, // 0.86474, 0.50221 - 0x3feba5aa673590d2, 0x3fe01cfc874c3eb7, // 0.86397, 0.50354 - 0x3feb9f5464c5bffc, 0x3fe027d6ad83287e, // 0.8632, 0.50486 - 0x3feb98fa1fd9155e, 0x3fe032ae55edbd95, // 0.86242, 0.50619 - 0x3feb929b996a5b7f, 0x3fe03d837edff370, // 0.86165, 0.50751 - 0x3feb8c38d27504e9, 0x3fe0485626ae221a, // 0.86087, 0.50883 - 0x3feb85d1cbf52c02, 0x3fe053264bad0483, // 0.86009, 0.51015 - 0x3feb7f6686e792ea, 0x3fe05df3ec31b8b6, // 0.8593, 0.51147 - 0x3feb78f70449a34b, 0x3fe068bf0691c028, // 0.85852, 0.51279 - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141 - 0x3feb6c0b4a55ac17, 0x3fe07e4da23bc102, // 0.85694, 0.51542 - 0x3feb658f14fdbc47, 0x3fe089112032b08c, // 0.85615, 0.51673 - 0x3feb5f0ea611a532, 0x3fe093d2115ee018, // 0.85535, 0.51804 - 0x3feb5889fe921405, 0x3fe09e907417c5e1, // 0.85456, 0.51936 - 0x3feb52011f805c92, 0x3fe0a94c46b53d0b, // 0.85376, 0.52067 - 0x3feb4b7409de7925, 0x3fe0b405878f85ec, // 0.85296, 0.52198 - 0x3feb44e2beaf0a61, 0x3fe0bebc34ff4646, // 0.85216, 0.52328 - 0x3feb3e4d3ef55712, 0x3fe0c9704d5d898f, // 0.85136, 0.52459 - 0x3feb37b38bb54c09, 0x3fe0d421cf03c12b, // 0.85055, 0.5259 - 0x3feb3115a5f37bf4, 0x3fe0ded0b84bc4b5, // 0.84974, 0.5272 - 0x3feb2a738eb51f33, 0x3fe0e97d078fd23b, // 0.84893, 0.5285 - 0x3feb23cd470013b4, 0x3fe0f426bb2a8e7d, // 0.84812, 0.5298 - 0x3feb1d22cfdadcc6, 0x3fe0fecdd1770537, // 0.84731, 0.5311 - 0x3feb16742a4ca2f5, 0x3fe1097248d0a956, // 0.84649, 0.5324 - 0x3feb0fc1575d33db, 0x3fe114141f935545, // 0.84567, 0.5337 - 0x3feb090a58150200, 0x3fe11eb3541b4b22, // 0.84485, 0.535 - 0x3feb024f2d7d24a9, 0x3fe1294fe4c5350a, // 0.84403, 0.53629 - 0x3feafb8fd89f57b6, 0x3fe133e9cfee254e, // 0.84321, 0.53759 - 0x3feaf4cc5a85fb73, 0x3fe13e8113f396c1, // 0.84238, 0.53888 - 0x3feaee04b43c1474, 0x3fe14915af336ceb, // 0.84155, 0.54017 - 0x3feae738e6cd4b67, 0x3fe153a7a00bf453, // 0.84073, 0.54146 - 0x3feae068f345ecef, 0x3fe15e36e4dbe2bc, // 0.83989, 0.54275 - 0x3fead994dab2e979, 0x3fe168c37c025764, // 0.83906, 0.54404 - 0x3fead2bc9e21d511, 0x3fe1734d63dedb49, // 0.83822, 0.54532 - 0x3feacbe03ea0e73b, 0x3fe17dd49ad16161, // 0.83739, 0.54661 - 0x3feac4ffbd3efac8, 0x3fe188591f3a46e5, // 0.83655, 0.54789 - 0x3feabe1b1b0b8dac, 0x3fe192daef7a5386, // 0.83571, 0.54918 - 0x3feab7325916c0d4, 0x3fe19d5a09f2b9b8, // 0.83486, 0.55046 - 0x3feab045787157ff, 0x3fe1a7d66d0516e6, // 0.83402, 0.55174 - 0x3feaa9547a2cb98e, 0x3fe1b250171373be, // 0.83317, 0.55302 - 0x3feaa25f5f5aee60, 0x3fe1bcc706804467, // 0.83232, 0.55429 - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557 - 0x3fea9468d85b20ae, 0x3fe1d1acaf012cc2, // 0.83062, 0.55685 - 0x3fea8d676e545ad2, 0x3fe1dc1b64dc4872, // 0.82976, 0.55812 - 0x3fea8661ec0ee133, 0x3fe1e68759a3e074, // 0.8289, 0.55939 - 0x3fea7f58529fe69d, 0x3fe1f0f08bbc861b, // 0.82805, 0.56066 - 0x3fea784aa31d3f55, 0x3fe1fb56f98b37b8, // 0.82718, 0.56193 - 0x3fea7138de9d60f5, 0x3fe205baa17560d6, // 0.82632, 0.5632 - 0x3fea6a230637623b, 0x3fe2101b81e0da78, // 0.82546, 0.56447 - 0x3fea63091b02fae2, 0x3fe21a799933eb58, // 0.82459, 0.56573 - 0x3fea5beb1e188375, 0x3fe224d4e5d5482e, // 0.82372, 0.567 - 0x3fea54c91090f524, 0x3fe22f2d662c13e1, // 0.82285, 0.56826 - 0x3fea4da2f385e997, 0x3fe23983189fdfd5, // 0.82198, 0.56952 - 0x3fea4678c8119ac8, 0x3fe243d5fb98ac1f, // 0.8211, 0.57078 - 0x3fea3f4a8f4ee2d2, 0x3fe24e260d7ee7c9, // 0.82023, 0.57204 - 0x3fea38184a593bc6, 0x3fe258734cbb7110, // 0.81935, 0.5733 - 0x3fea30e1fa4cbf81, 0x3fe262bdb7b795a2, // 0.81847, 0.57455 - 0x3fea29a7a0462782, 0x3fe26d054cdd12df, // 0.81758, 0.57581 - 0x3fea22693d62ccb9, 0x3fe2774a0a961612, // 0.8167, 0.57706 - 0x3fea1b26d2c0a75e, 0x3fe2818bef4d3cba, // 0.81581, 0.57831 - 0x3fea13e0617e4ec7, 0x3fe28bcaf96d94ba, // 0.81493, 0.57956 - 0x3fea0c95eabaf937, 0x3fe2960727629ca8, // 0.81404, 0.58081 - 0x3fea05476f967bb5, 0x3fe2a040779843fb, // 0.81314, 0.58206 - 0x3fe9fdf4f13149de, 0x3fe2aa76e87aeb58, // 0.81225, 0.58331 - 0x3fe9f69e70ac75bc, 0x3fe2b4aa787764c4, // 0.81135, 0.58455 - 0x3fe9ef43ef29af94, 0x3fe2bedb25faf3ea, // 0.81046, 0.5858 - 0x3fe9e7e56dcb45bd, 0x3fe2c908ef734e57, // 0.80956, 0.58704 - 0x3fe9e082edb42472, 0x3fe2d333d34e9bb7, // 0.80866, 0.58828 - 0x3fe9d91c7007d5a6, 0x3fe2dd5bcffb7616, // 0.80775, 0.58952 - 0x3fe9d1b1f5ea80d6, 0x3fe2e780e3e8ea16, // 0.80685, 0.59076 - 0x3fe9ca438080eadb, 0x3fe2f1a30d86773a, // 0.80594, 0.592 - 0x3fe9c2d110f075c3, 0x3fe2fbc24b441015, // 0.80503, 0.59323 - 0x3fe9bb5aa85f2098, 0x3fe305de9b921a94, // 0.80412, 0.59447 - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957 - 0x3fe9ac61f0d4e247, 0x3fe31a0e6da35e44, // 0.80229, 0.59693 - 0x3fe9a4dfa42b06b2, 0x3fe32421ec49a620, // 0.80138, 0.59816 - 0x3fe99d59631e65d5, 0x3fe32e3277467d6b, // 0.80046, 0.59939 - 0x3fe995cf2ed80d22, 0x3fe338400d0c8e57, // 0.79954, 0.60062 - 0x3fe98e410881a600, 0x3fe3424aac0ef7d6, // 0.79861, 0.60184 - 0x3fe986aef1457594, 0x3fe34c5252c14de1, // 0.79769, 0.60307 - 0x3fe97f18ea4e5c9e, 0x3fe35656ff9799ae, // 0.79676, 0.60429 - 0x3fe9777ef4c7d742, 0x3fe36058b10659f3, // 0.79584, 0.60551 - 0x3fe96fe111ddfce0, 0x3fe36a576582831b, // 0.79491, 0.60673 - 0x3fe9683f42bd7fe1, 0x3fe374531b817f8d, // 0.79398, 0.60795 - 0x3fe960998893ad8c, 0x3fe37e4bd1792fe2, // 0.79304, 0.60917 - 0x3fe958efe48e6dd7, 0x3fe3884185dfeb22, // 0.79211, 0.61038 - 0x3fe9514257dc4335, 0x3fe39234372c7f04, // 0.79117, 0.6116 - 0x3fe94990e3ac4a6c, 0x3fe39c23e3d63029, // 0.79023, 0.61281 - 0x3fe941db892e3a65, 0x3fe3a6108a54ba58, // 0.78929, 0.61402 - 0x3fe93a22499263fc, 0x3fe3affa292050b9, // 0.78835, 0.61523 - 0x3fe932652609b1cf, 0x3fe3b9e0beb19e18, // 0.7874, 0.61644 - 0x3fe92aa41fc5a815, 0x3fe3c3c44981c517, // 0.78646, 0.61765 - 0x3fe922df37f8646a, 0x3fe3cda4c80a6076, // 0.78551, 0.61885 - 0x3fe91b166fd49da2, 0x3fe3d78238c58343, // 0.78456, 0.62006 - 0x3fe91349c88da398, 0x3fe3e15c9a2db922, // 0.7836, 0.62126 - 0x3fe90b7943575efe, 0x3fe3eb33eabe0680, // 0.78265, 0.62246 - 0x3fe903a4e1665133, 0x3fe3f50828f1e8d2, // 0.78169, 0.62366 - 0x3fe8fbcca3ef940d, 0x3fe3fed9534556d4, // 0.78074, 0.62486 - 0x3fe8f3f08c28d9ac, 0x3fe408a76834c0c0, // 0.77978, 0.62606 - 0x3fe8ec109b486c49, 0x3fe41272663d108c, // 0.77882, 0.62725 - 0x3fe8e42cd2852e0a, 0x3fe41c3a4bdbaa26, // 0.77785, 0.62845 - 0x3fe8dc45331698cc, 0x3fe425ff178e6bb1, // 0.77689, 0.62964 - 0x3fe8d459be34bdfa, 0x3fe42fc0c7d3adbb, // 0.77592, 0.63083 - 0x3fe8cc6a75184655, 0x3fe4397f5b2a4380, // 0.77495, 0.63202 - 0x3fe8c47758fa71cb, 0x3fe4433ad0117b1d, // 0.77398, 0.63321 - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439 - 0x3fe8b485aca2a468, 0x3fe456a858917046, // 0.77204, 0.63558 - 0x3fe8ac871ede1d88, 0x3fe4605a692b32a2, // 0.77106, 0.63676 - 0x3fe8a484c3031d50, 0x3fe46a095557a0f1, // 0.77008, 0.63794 - 0x3fe89c7e9a4dd4ab, 0x3fe473b51b987347, // 0.7691, 0.63912 - 0x3fe89474a5fb0a84, 0x3fe47d5dba6fde01, // 0.76812, 0.6403 - 0x3fe88c66e7481ba1, 0x3fe48703306091fe, // 0.76714, 0.64148 - 0x3fe884555f72fa6b, 0x3fe490a57bedbcdf, // 0.76615, 0.64266 - 0x3fe87c400fba2ebf, 0x3fe49a449b9b0938, // 0.76517, 0.64383 - 0x3fe87426f95cd5bd, 0x3fe4a3e08dec9ed6, // 0.76418, 0.645 - 0x3fe86c0a1d9aa195, 0x3fe4ad79516722f0, // 0.76319, 0.64618 - 0x3fe863e97db3d95a, 0x3fe4b70ee48fb869, // 0.7622, 0.64735 - 0x3fe85bc51ae958cc, 0x3fe4c0a145ec0004, // 0.7612, 0.64851 - 0x3fe8539cf67c9029, 0x3fe4ca30740218a3, // 0.76021, 0.64968 - 0x3fe84b7111af83f9, 0x3fe4d3bc6d589f80, // 0.75921, 0.65085 - 0x3fe843416dc4cce2, 0x3fe4dd453076b064, // 0.75821, 0.65201 - 0x3fe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // 0.75721, 0.65317 - 0x3fe832d6eda3a3e0, 0x3fe4f04d0e2859aa, // 0.75621, 0.65433 - 0x3fe82a9c13f545ff, 0x3fe4f9cc25cca486, // 0.7552, 0.65549 - 0x3fe8225d803964e5, 0x3fe503480159ded2, // 0.75419, 0.65665 - 0x3fe81a1b33b57acc, 0x3fe50cc09f59a09b, // 0.75319, 0.65781 - 0x3fe811d52faf94dc, 0x3fe51635fe5601d7, // 0.75218, 0.65896 - 0x3fe8098b756e52fa, 0x3fe51fa81cd99aa6, // 0.75117, 0.66011 - 0x3fe8013e0638e795, 0x3fe52916f96f8388, // 0.75015, 0.66127 - 0x3fe7f8ece3571771, 0x3fe5328292a35596, // 0.74914, 0.66242 - 0x3fe7f0980e113978, 0x3fe53beae7012abe, // 0.74812, 0.66356 - 0x3fe7e83f87b03686, 0x3fe5454ff5159dfb, // 0.7471, 0.66471 - 0x3fe7dfe3517d8937, 0x3fe54eb1bb6dcb8f, // 0.74608, 0.66586 - 0x3fe7d7836cc33db2, 0x3fe5581038975137, // 0.74506, 0.667 - 0x3fe7cf1fdacbf179, 0x3fe5616b6b204e6e, // 0.74403, 0.66814 - 0x3fe7c6b89ce2d333, 0x3fe56ac35197649e, // 0.74301, 0.66928 - 0x3fe7be4db453a27c, 0x3fe57417ea8bb75c, // 0.74198, 0.67042 - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156 - 0x3fe7ad6ce874dbb6, 0x3fe586b72e2b2cfd, // 0.73992, 0.67269 - 0x3fe7a4f707bf97d2, 0x3fe59001d5f723df, // 0.73889, 0.67383 - 0x3fe79c7d8198e56e, 0x3fe599492a81ffbc, // 0.73785, 0.67496 - 0x3fe79400574f55e4, 0x3fe5a28d2a5d7250, // 0.73682, 0.67609 - 0x3fe78b7f8a320a52, 0x3fe5abcdd41bb0d8, // 0.73578, 0.67722 - 0x3fe782fb1b90b35b, 0x3fe5b50b264f7448, // 0.73474, 0.67835 - 0x3fe77a730cbb9100, 0x3fe5be451f8bf980, // 0.7337, 0.67948 - 0x3fe771e75f037261, 0x3fe5c77bbe65018c, // 0.73265, 0.6806 - 0x3fe7695813b9b594, 0x3fe5d0af016ed1d4, // 0.73161, 0.68172 - 0x3fe760c52c304764, 0x3fe5d9dee73e345c, // 0.73056, 0.68285 - 0x3fe7582ea9b9a329, 0x3fe5e30b6e6877f3, // 0.72951, 0.68397 - 0x3fe74f948da8d28d, 0x3fe5ec3495837074, // 0.72846, 0.68508 - 0x3fe746f6d9516d59, 0x3fe5f55a5b2576f8, // 0.72741, 0.6862 - 0x3fe73e558e079942, 0x3fe5fe7cbde56a0f, // 0.72636, 0.68732 - 0x3fe735b0ad2009b2, 0x3fe6079bbc5aadfa, // 0.7253, 0.68843 - 0x3fe72d0837efff97, 0x3fe610b7551d2cde, // 0.72425, 0.68954 - 0x3fe7245c2fcd492a, 0x3fe619cf86c55702, // 0.72319, 0.69065 - 0x3fe71bac960e41bf, 0x3fe622e44fec22ff, // 0.72213, 0.69176 - 0x3fe712f96c09d18d, 0x3fe62bf5af2b0dfd, // 0.72107, 0.69287 - 0x3fe70a42b3176d7a, 0x3fe63503a31c1be8, // 0.72, 0.69397 - 0x3fe701886c8f16e6, 0x3fe63e0e2a59d7aa, // 0.71894, 0.69508 - 0x3fe6f8ca99c95b75, 0x3fe64715437f535b, // 0.71787, 0.69618 - 0x3fe6f0093c1f54de, 0x3fe65018ed28287f, // 0.7168, 0.69728 - 0x3fe6e74454eaa8ae, 0x3fe6591925f0783e, // 0.71573, 0.69838 - 0x3fe6de7be585881d, 0x3fe66215ec74eb91, // 0.71466, 0.69947 - 0x3fe6d5afef4aafcc, 0x3fe66b0f3f52b386, // 0.71358, 0.70057 - 0x3fe6cce07395679f, 0x3fe674051d27896c, // 0.71251, 0.70166 - 0x3fe6c40d73c18275, 0x3fe67cf78491af10, // 0.71143, 0.70275 - 0x3fe6bb36f12b5e06, 0x3fe685e6742feeef, // 0.71035, 0.70385 - 0x3fe6b25ced2fe29c, 0x3fe68ed1eaa19c71, // 0.70927, 0.70493 - 0x3fe6a97f692c82ea, 0x3fe697b9e686941c, // 0.70819, 0.70602 - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711 - 0x3fe697b9e686941c, 0x3fe6a97f692c82ea, // 0.70602, 0.70819 - 0x3fe68ed1eaa19c71, 0x3fe6b25ced2fe29c, // 0.70493, 0.70927 - 0x3fe685e6742feeef, 0x3fe6bb36f12b5e06, // 0.70385, 0.71035 - 0x3fe67cf78491af10, 0x3fe6c40d73c18275, // 0.70275, 0.71143 - 0x3fe674051d27896c, 0x3fe6cce07395679f, // 0.70166, 0.71251 - 0x3fe66b0f3f52b386, 0x3fe6d5afef4aafcc, // 0.70057, 0.71358 - 0x3fe66215ec74eb91, 0x3fe6de7be585881d, // 0.69947, 0.71466 - 0x3fe6591925f0783e, 0x3fe6e74454eaa8ae, // 0.69838, 0.71573 - 0x3fe65018ed28287f, 0x3fe6f0093c1f54de, // 0.69728, 0.7168 - 0x3fe64715437f535b, 0x3fe6f8ca99c95b75, // 0.69618, 0.71787 - 0x3fe63e0e2a59d7aa, 0x3fe701886c8f16e6, // 0.69508, 0.71894 - 0x3fe63503a31c1be8, 0x3fe70a42b3176d7a, // 0.69397, 0.72 - 0x3fe62bf5af2b0dfd, 0x3fe712f96c09d18d, // 0.69287, 0.72107 - 0x3fe622e44fec22ff, 0x3fe71bac960e41bf, // 0.69176, 0.72213 - 0x3fe619cf86c55702, 0x3fe7245c2fcd492a, // 0.69065, 0.72319 - 0x3fe610b7551d2cde, 0x3fe72d0837efff97, // 0.68954, 0.72425 - 0x3fe6079bbc5aadfa, 0x3fe735b0ad2009b2, // 0.68843, 0.7253 - 0x3fe5fe7cbde56a0f, 0x3fe73e558e079942, // 0.68732, 0.72636 - 0x3fe5f55a5b2576f8, 0x3fe746f6d9516d59, // 0.6862, 0.72741 - 0x3fe5ec3495837074, 0x3fe74f948da8d28d, // 0.68508, 0.72846 - 0x3fe5e30b6e6877f3, 0x3fe7582ea9b9a329, // 0.68397, 0.72951 - 0x3fe5d9dee73e345c, 0x3fe760c52c304764, // 0.68285, 0.73056 - 0x3fe5d0af016ed1d4, 0x3fe7695813b9b594, // 0.68172, 0.73161 - 0x3fe5c77bbe65018c, 0x3fe771e75f037261, // 0.6806, 0.73265 - 0x3fe5be451f8bf980, 0x3fe77a730cbb9100, // 0.67948, 0.7337 - 0x3fe5b50b264f7448, 0x3fe782fb1b90b35b, // 0.67835, 0.73474 - 0x3fe5abcdd41bb0d8, 0x3fe78b7f8a320a52, // 0.67722, 0.73578 - 0x3fe5a28d2a5d7250, 0x3fe79400574f55e4, // 0.67609, 0.73682 - 0x3fe599492a81ffbc, 0x3fe79c7d8198e56e, // 0.67496, 0.73785 - 0x3fe59001d5f723df, 0x3fe7a4f707bf97d2, // 0.67383, 0.73889 - 0x3fe586b72e2b2cfd, 0x3fe7ad6ce874dbb6, // 0.67269, 0.73992 - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095 - 0x3fe57417ea8bb75c, 0x3fe7be4db453a27c, // 0.67042, 0.74198 - 0x3fe56ac35197649e, 0x3fe7c6b89ce2d333, // 0.66928, 0.74301 - 0x3fe5616b6b204e6e, 0x3fe7cf1fdacbf179, // 0.66814, 0.74403 - 0x3fe5581038975137, 0x3fe7d7836cc33db2, // 0.667, 0.74506 - 0x3fe54eb1bb6dcb8f, 0x3fe7dfe3517d8937, // 0.66586, 0.74608 - 0x3fe5454ff5159dfb, 0x3fe7e83f87b03686, // 0.66471, 0.7471 - 0x3fe53beae7012abe, 0x3fe7f0980e113978, // 0.66356, 0.74812 - 0x3fe5328292a35596, 0x3fe7f8ece3571771, // 0.66242, 0.74914 - 0x3fe52916f96f8388, 0x3fe8013e0638e795, // 0.66127, 0.75015 - 0x3fe51fa81cd99aa6, 0x3fe8098b756e52fa, // 0.66011, 0.75117 - 0x3fe51635fe5601d7, 0x3fe811d52faf94dc, // 0.65896, 0.75218 - 0x3fe50cc09f59a09b, 0x3fe81a1b33b57acc, // 0.65781, 0.75319 - 0x3fe503480159ded2, 0x3fe8225d803964e5, // 0.65665, 0.75419 - 0x3fe4f9cc25cca486, 0x3fe82a9c13f545ff, // 0.65549, 0.7552 - 0x3fe4f04d0e2859aa, 0x3fe832d6eda3a3e0, // 0.65433, 0.75621 - 0x3fe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // 0.65317, 0.75721 - 0x3fe4dd453076b064, 0x3fe843416dc4cce2, // 0.65201, 0.75821 - 0x3fe4d3bc6d589f80, 0x3fe84b7111af83f9, // 0.65085, 0.75921 - 0x3fe4ca30740218a3, 0x3fe8539cf67c9029, // 0.64968, 0.76021 - 0x3fe4c0a145ec0004, 0x3fe85bc51ae958cc, // 0.64851, 0.7612 - 0x3fe4b70ee48fb869, 0x3fe863e97db3d95a, // 0.64735, 0.7622 - 0x3fe4ad79516722f0, 0x3fe86c0a1d9aa195, // 0.64618, 0.76319 - 0x3fe4a3e08dec9ed6, 0x3fe87426f95cd5bd, // 0.645, 0.76418 - 0x3fe49a449b9b0938, 0x3fe87c400fba2ebf, // 0.64383, 0.76517 - 0x3fe490a57bedbcdf, 0x3fe884555f72fa6b, // 0.64266, 0.76615 - 0x3fe48703306091fe, 0x3fe88c66e7481ba1, // 0.64148, 0.76714 - 0x3fe47d5dba6fde01, 0x3fe89474a5fb0a84, // 0.6403, 0.76812 - 0x3fe473b51b987347, 0x3fe89c7e9a4dd4ab, // 0.63912, 0.7691 - 0x3fe46a095557a0f1, 0x3fe8a484c3031d50, // 0.63794, 0.77008 - 0x3fe4605a692b32a2, 0x3fe8ac871ede1d88, // 0.63676, 0.77106 - 0x3fe456a858917046, 0x3fe8b485aca2a468, // 0.63558, 0.77204 - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301 - 0x3fe4433ad0117b1d, 0x3fe8c47758fa71cb, // 0.63321, 0.77398 - 0x3fe4397f5b2a4380, 0x3fe8cc6a75184655, // 0.63202, 0.77495 - 0x3fe42fc0c7d3adbb, 0x3fe8d459be34bdfa, // 0.63083, 0.77592 - 0x3fe425ff178e6bb1, 0x3fe8dc45331698cc, // 0.62964, 0.77689 - 0x3fe41c3a4bdbaa26, 0x3fe8e42cd2852e0a, // 0.62845, 0.77785 - 0x3fe41272663d108c, 0x3fe8ec109b486c49, // 0.62725, 0.77882 - 0x3fe408a76834c0c0, 0x3fe8f3f08c28d9ac, // 0.62606, 0.77978 - 0x3fe3fed9534556d4, 0x3fe8fbcca3ef940d, // 0.62486, 0.78074 - 0x3fe3f50828f1e8d2, 0x3fe903a4e1665133, // 0.62366, 0.78169 - 0x3fe3eb33eabe0680, 0x3fe90b7943575efe, // 0.62246, 0.78265 - 0x3fe3e15c9a2db922, 0x3fe91349c88da398, // 0.62126, 0.7836 - 0x3fe3d78238c58343, 0x3fe91b166fd49da2, // 0.62006, 0.78456 - 0x3fe3cda4c80a6076, 0x3fe922df37f8646a, // 0.61885, 0.78551 - 0x3fe3c3c44981c517, 0x3fe92aa41fc5a815, // 0.61765, 0.78646 - 0x3fe3b9e0beb19e18, 0x3fe932652609b1cf, // 0.61644, 0.7874 - 0x3fe3affa292050b9, 0x3fe93a22499263fc, // 0.61523, 0.78835 - 0x3fe3a6108a54ba58, 0x3fe941db892e3a65, // 0.61402, 0.78929 - 0x3fe39c23e3d63029, 0x3fe94990e3ac4a6c, // 0.61281, 0.79023 - 0x3fe39234372c7f04, 0x3fe9514257dc4335, // 0.6116, 0.79117 - 0x3fe3884185dfeb22, 0x3fe958efe48e6dd7, // 0.61038, 0.79211 - 0x3fe37e4bd1792fe2, 0x3fe960998893ad8c, // 0.60917, 0.79304 - 0x3fe374531b817f8d, 0x3fe9683f42bd7fe1, // 0.60795, 0.79398 - 0x3fe36a576582831b, 0x3fe96fe111ddfce0, // 0.60673, 0.79491 - 0x3fe36058b10659f3, 0x3fe9777ef4c7d742, // 0.60551, 0.79584 - 0x3fe35656ff9799ae, 0x3fe97f18ea4e5c9e, // 0.60429, 0.79676 - 0x3fe34c5252c14de1, 0x3fe986aef1457594, // 0.60307, 0.79769 - 0x3fe3424aac0ef7d6, 0x3fe98e410881a600, // 0.60184, 0.79861 - 0x3fe338400d0c8e57, 0x3fe995cf2ed80d22, // 0.60062, 0.79954 - 0x3fe32e3277467d6b, 0x3fe99d59631e65d5, // 0.59939, 0.80046 - 0x3fe32421ec49a620, 0x3fe9a4dfa42b06b2, // 0.59816, 0.80138 - 0x3fe31a0e6da35e44, 0x3fe9ac61f0d4e247, // 0.59693, 0.80229 - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321 - 0x3fe305de9b921a94, 0x3fe9bb5aa85f2098, // 0.59447, 0.80412 - 0x3fe2fbc24b441015, 0x3fe9c2d110f075c3, // 0.59323, 0.80503 - 0x3fe2f1a30d86773a, 0x3fe9ca438080eadb, // 0.592, 0.80594 - 0x3fe2e780e3e8ea16, 0x3fe9d1b1f5ea80d6, // 0.59076, 0.80685 - 0x3fe2dd5bcffb7616, 0x3fe9d91c7007d5a6, // 0.58952, 0.80775 - 0x3fe2d333d34e9bb7, 0x3fe9e082edb42472, // 0.58828, 0.80866 - 0x3fe2c908ef734e57, 0x3fe9e7e56dcb45bd, // 0.58704, 0.80956 - 0x3fe2bedb25faf3ea, 0x3fe9ef43ef29af94, // 0.5858, 0.81046 - 0x3fe2b4aa787764c4, 0x3fe9f69e70ac75bc, // 0.58455, 0.81135 - 0x3fe2aa76e87aeb58, 0x3fe9fdf4f13149de, // 0.58331, 0.81225 - 0x3fe2a040779843fb, 0x3fea05476f967bb5, // 0.58206, 0.81314 - 0x3fe2960727629ca8, 0x3fea0c95eabaf937, // 0.58081, 0.81404 - 0x3fe28bcaf96d94ba, 0x3fea13e0617e4ec7, // 0.57956, 0.81493 - 0x3fe2818bef4d3cba, 0x3fea1b26d2c0a75e, // 0.57831, 0.81581 - 0x3fe2774a0a961612, 0x3fea22693d62ccb9, // 0.57706, 0.8167 - 0x3fe26d054cdd12df, 0x3fea29a7a0462782, // 0.57581, 0.81758 - 0x3fe262bdb7b795a2, 0x3fea30e1fa4cbf81, // 0.57455, 0.81847 - 0x3fe258734cbb7110, 0x3fea38184a593bc6, // 0.5733, 0.81935 - 0x3fe24e260d7ee7c9, 0x3fea3f4a8f4ee2d2, // 0.57204, 0.82023 - 0x3fe243d5fb98ac1f, 0x3fea4678c8119ac8, // 0.57078, 0.8211 - 0x3fe23983189fdfd5, 0x3fea4da2f385e997, // 0.56952, 0.82198 - 0x3fe22f2d662c13e1, 0x3fea54c91090f524, // 0.56826, 0.82285 - 0x3fe224d4e5d5482e, 0x3fea5beb1e188375, // 0.567, 0.82372 - 0x3fe21a799933eb58, 0x3fea63091b02fae2, // 0.56573, 0.82459 - 0x3fe2101b81e0da78, 0x3fea6a230637623b, // 0.56447, 0.82546 - 0x3fe205baa17560d6, 0x3fea7138de9d60f5, // 0.5632, 0.82632 - 0x3fe1fb56f98b37b8, 0x3fea784aa31d3f55, // 0.56193, 0.82718 - 0x3fe1f0f08bbc861b, 0x3fea7f58529fe69d, // 0.56066, 0.82805 - 0x3fe1e68759a3e074, 0x3fea8661ec0ee133, // 0.55939, 0.8289 - 0x3fe1dc1b64dc4872, 0x3fea8d676e545ad2, // 0.55812, 0.82976 - 0x3fe1d1acaf012cc2, 0x3fea9468d85b20ae, // 0.55685, 0.83062 - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147 - 0x3fe1bcc706804467, 0x3feaa25f5f5aee60, // 0.55429, 0.83232 - 0x3fe1b250171373be, 0x3feaa9547a2cb98e, // 0.55302, 0.83317 - 0x3fe1a7d66d0516e6, 0x3feab045787157ff, // 0.55174, 0.83402 - 0x3fe19d5a09f2b9b8, 0x3feab7325916c0d4, // 0.55046, 0.83486 - 0x3fe192daef7a5386, 0x3feabe1b1b0b8dac, // 0.54918, 0.83571 - 0x3fe188591f3a46e5, 0x3feac4ffbd3efac8, // 0.54789, 0.83655 - 0x3fe17dd49ad16161, 0x3feacbe03ea0e73b, // 0.54661, 0.83739 - 0x3fe1734d63dedb49, 0x3fead2bc9e21d511, // 0.54532, 0.83822 - 0x3fe168c37c025764, 0x3fead994dab2e979, // 0.54404, 0.83906 - 0x3fe15e36e4dbe2bc, 0x3feae068f345ecef, // 0.54275, 0.83989 - 0x3fe153a7a00bf453, 0x3feae738e6cd4b67, // 0.54146, 0.84073 - 0x3fe14915af336ceb, 0x3feaee04b43c1474, // 0.54017, 0.84155 - 0x3fe13e8113f396c1, 0x3feaf4cc5a85fb73, // 0.53888, 0.84238 - 0x3fe133e9cfee254e, 0x3feafb8fd89f57b6, // 0.53759, 0.84321 - 0x3fe1294fe4c5350a, 0x3feb024f2d7d24a9, // 0.53629, 0.84403 - 0x3fe11eb3541b4b22, 0x3feb090a58150200, // 0.535, 0.84485 - 0x3fe114141f935545, 0x3feb0fc1575d33db, // 0.5337, 0.84567 - 0x3fe1097248d0a956, 0x3feb16742a4ca2f5, // 0.5324, 0.84649 - 0x3fe0fecdd1770537, 0x3feb1d22cfdadcc6, // 0.5311, 0.84731 - 0x3fe0f426bb2a8e7d, 0x3feb23cd470013b4, // 0.5298, 0.84812 - 0x3fe0e97d078fd23b, 0x3feb2a738eb51f33, // 0.5285, 0.84893 - 0x3fe0ded0b84bc4b5, 0x3feb3115a5f37bf4, // 0.5272, 0.84974 - 0x3fe0d421cf03c12b, 0x3feb37b38bb54c09, // 0.5259, 0.85055 - 0x3fe0c9704d5d898f, 0x3feb3e4d3ef55712, // 0.52459, 0.85136 - 0x3fe0bebc34ff4646, 0x3feb44e2beaf0a61, // 0.52328, 0.85216 - 0x3fe0b405878f85ec, 0x3feb4b7409de7925, // 0.52198, 0.85296 - 0x3fe0a94c46b53d0b, 0x3feb52011f805c92, // 0.52067, 0.85376 - 0x3fe09e907417c5e1, 0x3feb5889fe921405, // 0.51936, 0.85456 - 0x3fe093d2115ee018, 0x3feb5f0ea611a532, // 0.51804, 0.85535 - 0x3fe089112032b08c, 0x3feb658f14fdbc47, // 0.51673, 0.85615 - 0x3fe07e4da23bc102, 0x3feb6c0b4a55ac17, // 0.51542, 0.85694 - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773 - 0x3fe068bf0691c028, 0x3feb78f70449a34b, // 0.51279, 0.85852 - 0x3fe05df3ec31b8b6, 0x3feb7f6686e792ea, // 0.51147, 0.8593 - 0x3fe053264bad0483, 0x3feb85d1cbf52c02, // 0.51015, 0.86009 - 0x3fe0485626ae221a, 0x3feb8c38d27504e9, // 0.50883, 0.86087 - 0x3fe03d837edff370, 0x3feb929b996a5b7f, // 0.50751, 0.86165 - 0x3fe032ae55edbd95, 0x3feb98fa1fd9155e, // 0.50619, 0.86242 - 0x3fe027d6ad83287e, 0x3feb9f5464c5bffc, // 0.50486, 0.8632 - 0x3fe01cfc874c3eb7, 0x3feba5aa673590d2, // 0.50354, 0.86397 - 0x3fe0121fe4f56d2c, 0x3febabfc262e6586, // 0.50221, 0.86474 - 0x3fe00740c82b82e0, 0x3febb249a0b6c40d, // 0.50089, 0.86551 - 0x3fdff8be6537615e, 0x3febb892d5d5dad5, // 0.49956, 0.86628 - 0x3fdfe2f64be7120f, 0x3febbed7c49380ea, // 0.49823, 0.86705 - 0x3fdfcd2947c1ff57, 0x3febc5186bf8361d, // 0.4969, 0.86781 - 0x3fdfb7575c24d2de, 0x3febcb54cb0d2327, // 0.49557, 0.86857 - 0x3fdfa1808c6cf7e0, 0x3febd18ce0dc19d6, // 0.49423, 0.86933 - 0x3fdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // 0.4929, 0.87009 - 0x3fdf75c44e26a852, 0x3febddf02cd2b983, // 0.49156, 0.87084 - 0x3fdf5fdee656cda3, 0x3febe41b611154c1, // 0.49023, 0.8716 - 0x3fdf49f4a7e97729, 0x3febea424837de6d, // 0.48889, 0.87235 - 0x3fdf3405963fd068, 0x3febf064e15377dd, // 0.48755, 0.87309 - 0x3fdf1e11b4bbc35c, 0x3febf6832b71ec5b, // 0.48621, 0.87384 - 0x3fdf081906bff7fd, 0x3febfc9d25a1b147, // 0.48487, 0.87459 - 0x3fdef21b8fafd3b5, 0x3fec02b2cef1e641, // 0.48353, 0.87533 - 0x3fdedc1952ef78d5, 0x3fec08c426725549, // 0.48218, 0.87607 - 0x3fdec61253e3c61b, 0x3fec0ed12b3372e9, // 0.48084, 0.87681 - 0x3fdeb00695f25620, 0x3fec14d9dc465e58, // 0.47949, 0.87755 - 0x3fde99f61c817eda, 0x3fec1ade38bce19b, // 0.47815, 0.87828 - 0x3fde83e0eaf85113, 0x3fec20de3fa971b0, // 0.4768, 0.87901 - 0x3fde6dc704be97e2, 0x3fec26d9f01f2eaf, // 0.47545, 0.87974 - 0x3fde57a86d3cd824, 0x3fec2cd14931e3f1, // 0.4741, 0.88047 - 0x3fde418527dc4ffa, 0x3fec32c449f60831, // 0.47275, 0.8812 - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192 - 0x3fde1530a12779f4, 0x3fec3e9d3ee7d262, // 0.47004, 0.88264 - 0x3fddfeff66a941de, 0x3fec44833141c004, // 0.46869, 0.88336 - 0x3fdde8c98bf86bd6, 0x3fec4a64c7a5ac4c, // 0.46733, 0.88408 - 0x3fddd28f1481cc58, 0x3fec5042012b6907, // 0.46598, 0.8848 - 0x3fddbc5003b2edf8, 0x3fec561adceb743e, // 0.46462, 0.88551 - 0x3fdda60c5cfa10d8, 0x3fec5bef59fef85a, // 0.46326, 0.88622 - 0x3fdd8fc423c62a25, 0x3fec61bf777fcc48, // 0.4619, 0.88693 - 0x3fdd79775b86e389, 0x3fec678b3488739b, // 0.46054, 0.88764 - 0x3fdd632607ac9aa9, 0x3fec6d5290341eb2, // 0.45918, 0.88835 - 0x3fdd4cd02ba8609c, 0x3fec7315899eaad7, // 0.45781, 0.88905 - 0x3fdd3675caebf962, 0x3fec78d41fe4a267, // 0.45645, 0.88975 - 0x3fdd2016e8e9db5b, 0x3fec7e8e52233cf3, // 0.45508, 0.89045 - 0x3fdd09b389152ec1, 0x3fec84441f785f61, // 0.45372, 0.89115 - 0x3fdcf34baee1cd21, 0x3fec89f587029c13, // 0.45235, 0.89184 - 0x3fdcdcdf5dc440ce, 0x3fec8fa287e13305, // 0.45098, 0.89253 - 0x3fdcc66e9931c45d, 0x3fec954b213411f5, // 0.44961, 0.89322 - 0x3fdcaff964a0421d, 0x3fec9aef521bd480, // 0.44824, 0.89391 - 0x3fdc997fc3865388, 0x3feca08f19b9c449, // 0.44687, 0.8946 - 0x3fdc8301b95b40c2, 0x3feca62a772fd919, // 0.4455, 0.89528 - 0x3fdc6c7f4997000a, 0x3fecabc169a0b901, // 0.44412, 0.89597 - 0x3fdc55f877b23537, 0x3fecb153f02fb87d, // 0.44275, 0.89665 - 0x3fdc3f6d47263129, 0x3fecb6e20a00da99, // 0.44137, 0.89732 - 0x3fdc28ddbb6cf145, 0x3fecbc6bb638d10b, // 0.43999, 0.898 - 0x3fdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // 0.43862, 0.89867 - 0x3fdbfbb1a05e0edc, 0x3fecc771c2736c09, // 0.43724, 0.89935 - 0x3fdbe51517ffc0d9, 0x3fecccee20c2de9f, // 0.43586, 0.90002 - 0x3fdbce744262deee, 0x3fecd2660e12c1e6, // 0.43448, 0.90068 - 0x3fdbb7cf2304bd01, 0x3fecd7d9898b32f6, // 0.43309, 0.90135 - 0x3fdba125bd63583e, 0x3fecdd489254fe65, // 0.43171, 0.90201 - 0x3fdb8a7814fd5693, 0x3fece2b32799a060, // 0.43033, 0.90267 - 0x3fdb73c62d520624, 0x3fece819488344ce, // 0.42894, 0.90333 - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399 - 0x3fdb4655ae2bf757, 0x3fecf2d829f1b40e, // 0.42617, 0.90464 - 0x3fdb2f971db31972, 0x3fecf830e8ce467b, // 0.42478, 0.9053 - 0x3fdb18d45bf8aca6, 0x3fecfd852fff6ad4, // 0.42339, 0.90595 - 0x3fdb020d6c7f4009, 0x3fed02d4feb2bd92, // 0.422, 0.9066 - 0x3fdaeb4252ca07ab, 0x3fed082054168bac, // 0.42061, 0.90724 - 0x3fdad473125cdc08, 0x3fed0d672f59d2b9, // 0.41922, 0.90789 - 0x3fdabd9faebc3980, 0x3fed12a98fac410c, // 0.41782, 0.90853 - 0x3fdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // 0.41643, 0.90917 - 0x3fda8fec8bf5b166, 0x3fed1d20dc40c15c, // 0.41503, 0.90981 - 0x3fda790cd3dbf31a, 0x3fed2255c6e5a4e1, // 0.41364, 0.91044 - 0x3fda622906a70b63, 0x3fed2786335f52fc, // 0.41224, 0.91107 - 0x3fda4b4127dea1e4, 0x3fed2cb220e0ef9f, // 0.41084, 0.91171 - 0x3fda34553b0afee5, 0x3fed31d98e9e503a, // 0.40944, 0.91234 - 0x3fda1d6543b50ac0, 0x3fed36fc7bcbfbdc, // 0.40804, 0.91296 - 0x3fda067145664d57, 0x3fed3c1ae79f2b4e, // 0.40664, 0.91359 - 0x3fd9ef7943a8ed8a, 0x3fed4134d14dc93a, // 0.40524, 0.91421 - 0x3fd9d87d4207b0ab, 0x3fed464a380e7242, // 0.40384, 0.91483 - 0x3fd9c17d440df9f2, 0x3fed4b5b1b187524, // 0.40243, 0.91545 - 0x3fd9aa794d47c9ee, 0x3fed506779a3d2d9, // 0.40103, 0.91606 - 0x3fd993716141bdfe, 0x3fed556f52e93eb1, // 0.39962, 0.91668 - 0x3fd97c6583890fc2, 0x3fed5a72a6221e73, // 0.39822, 0.91729 - 0x3fd96555b7ab948f, 0x3fed5f7172888a7f, // 0.39681, 0.9179 - 0x3fd94e420137bce3, 0x3fed646bb7574de5, // 0.3954, 0.91851 - 0x3fd9372a63bc93d7, 0x3fed696173c9e68b, // 0.39399, 0.91911 - 0x3fd9200ee2c9be97, 0x3fed6e52a71c8547, // 0.39258, 0.91972 - 0x3fd908ef81ef7bd1, 0x3fed733f508c0dff, // 0.39117, 0.92032 - 0x3fd8f1cc44bea329, 0x3fed78276f5617c6, // 0.38976, 0.92092 - 0x3fd8daa52ec8a4af, 0x3fed7d0b02b8ecf9, // 0.38835, 0.92151 - 0x3fd8c37a439f884f, 0x3fed81ea09f38b63, // 0.38693, 0.92211 - 0x3fd8ac4b86d5ed44, 0x3fed86c48445a450, // 0.38552, 0.9227 - 0x3fd89518fbff098e, 0x3fed8b9a70ef9cb4, // 0.3841, 0.92329 - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388 - 0x3fd866a88a792ea0, 0x3fed95389e50429b, // 0.38127, 0.92447 - 0x3fd84f6aaaf3903f, 0x3fed9a00dd8b3d46, // 0.37985, 0.92505 - 0x3fd838290bb359c8, 0x3fed9ec48c26b1f3, // 0.37843, 0.92563 - 0x3fd820e3b04eaac4, 0x3feda383a9668988, // 0.37701, 0.92621 - 0x3fd8099a9c5c362d, 0x3feda83e348f613b, // 0.37559, 0.92679 - 0x3fd7f24dd37341e3, 0x3fedacf42ce68ab9, // 0.37416, 0.92736 - 0x3fd7dafd592ba621, 0x3fedb1a591b20c38, // 0.37274, 0.92794 - 0x3fd7c3a9311dcce7, 0x3fedb6526238a09b, // 0.37132, 0.92851 - 0x3fd7ac515ee2b172, 0x3fedbafa9dc1b78d, // 0.36989, 0.92907 - 0x3fd794f5e613dfae, 0x3fedbf9e4395759a, // 0.36847, 0.92964 - 0x3fd77d96ca4b73a6, 0x3fedc43d52fcb453, // 0.36704, 0.93021 - 0x3fd766340f2418f6, 0x3fedc8d7cb410260, // 0.36561, 0.93077 - 0x3fd74ecdb8390a3e, 0x3fedcd6dabaca3a5, // 0.36418, 0.93133 - 0x3fd73763c9261092, 0x3fedd1fef38a915a, // 0.36276, 0.93188 - 0x3fd71ff6458782ec, 0x3fedd68ba2267a25, // 0.36133, 0.93244 - 0x3fd7088530fa459e, 0x3feddb13b6ccc23d, // 0.3599, 0.93299 - 0x3fd6f1108f1bc9c5, 0x3feddf9730ca837b, // 0.35846, 0.93354 - 0x3fd6d998638a0cb5, 0x3fede4160f6d8d81, // 0.35703, 0.93409 - 0x3fd6c21cb1e39771, 0x3fede890520465ce, // 0.3556, 0.93464 - 0x3fd6aa9d7dc77e16, 0x3feded05f7de47da, // 0.35416, 0.93518 - 0x3fd6931acad55f51, 0x3fedf177004b2534, // 0.35273, 0.93573 - 0x3fd67b949cad63ca, 0x3fedf5e36a9ba59c, // 0.35129, 0.93627 - 0x3fd6640af6f03d9e, 0x3fedfa4b3621271d, // 0.34986, 0.9368 - 0x3fd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // 0.34842, 0.93734 - 0x3fd634ed533be58e, 0x3fee030cee1435b8, // 0.34698, 0.93787 - 0x3fd61d595c88c203, 0x3fee0766d9280f54, // 0.34554, 0.9384 - 0x3fd605c1fcc88f63, 0x3fee0bbc22bd8349, // 0.3441, 0.93893 - 0x3fd5ee27379ea693, 0x3fee100cca2980ac, // 0.34266, 0.93946 - 0x3fd5d68910aee686, 0x3fee1458cec1ad83, // 0.34122, 0.93998 - 0x3fd5bee78b9db3b6, 0x3fee18a02fdc66d9, // 0.33978, 0.94051 - 0x3fd5a742ac0ff78d, 0x3fee1ce2ecd0c0d8, // 0.33833, 0.94103 - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154 - 0x3fd577eeec151e47, 0x3fee255a77a63bb8, // 0.33545, 0.94206 - 0x3fd5604012f467b4, 0x3fee298f4439197a, // 0.334, 0.94257 - 0x3fd5488dedeff3be, 0x3fee2dbf6a0911d9, // 0.33255, 0.94308 - 0x3fd530d880af3c24, 0x3fee31eae870ce25, // 0.33111, 0.94359 - 0x3fd5191fceda3c35, 0x3fee3611becbaf69, // 0.32966, 0.9441 - 0x3fd50163dc197047, 0x3fee3a33ec75ce85, // 0.32821, 0.9446 - 0x3fd4e9a4ac15d520, 0x3fee3e5170cbfc46, // 0.32676, 0.94511 - 0x3fd4d1e24278e76a, 0x3fee426a4b2bc17e, // 0.32531, 0.94561 - 0x3fd4ba1ca2eca31c, 0x3fee467e7af35f23, // 0.32386, 0.94611 - 0x3fd4a253d11b82f3, 0x3fee4a8dff81ce5e, // 0.32241, 0.9466 - 0x3fd48a87d0b07fd7, 0x3fee4e98d836c0af, // 0.32096, 0.94709 - 0x3fd472b8a5571054, 0x3fee529f04729ffc, // 0.3195, 0.94759 - 0x3fd45ae652bb2800, 0x3fee56a083968eb1, // 0.31805, 0.94807 - 0x3fd44310dc8936f0, 0x3fee5a9d550467d3, // 0.31659, 0.94856 - 0x3fd42b38466e2928, 0x3fee5e95781ebf1c, // 0.31514, 0.94905 - 0x3fd4135c94176602, 0x3fee6288ec48e112, // 0.31368, 0.94953 - 0x3fd3fb7dc932cfa4, 0x3fee6677b0e6d31e, // 0.31222, 0.95001 - 0x3fd3e39be96ec271, 0x3fee6a61c55d53a7, // 0.31077, 0.95049 - 0x3fd3cbb6f87a146e, 0x3fee6e472911da27, // 0.30931, 0.95096 - 0x3fd3b3cefa0414b7, 0x3fee7227db6a9744, // 0.30785, 0.95144 - 0x3fd39be3f1bc8aef, 0x3fee7603dbce74e9, // 0.30639, 0.95191 - 0x3fd383f5e353b6aa, 0x3fee79db29a5165a, // 0.30493, 0.95238 - 0x3fd36c04d27a4edf, 0x3fee7dadc456d850, // 0.30347, 0.95284 - 0x3fd35410c2e18152, 0x3fee817bab4cd10d, // 0.30201, 0.95331 - 0x3fd33c19b83af207, 0x3fee8544ddf0d075, // 0.30054, 0.95377 - 0x3fd3241fb638baaf, 0x3fee89095bad6025, // 0.29908, 0.95423 - 0x3fd30c22c08d6a13, 0x3fee8cc923edc388, // 0.29762, 0.95469 - 0x3fd2f422daec0386, 0x3fee9084361df7f3, // 0.29615, 0.95514 - 0x3fd2dc200907fe51, 0x3fee943a91aab4b4, // 0.29469, 0.95559 - 0x3fd2c41a4e954520, 0x3fee97ec36016b30, // 0.29322, 0.95605 - 0x3fd2ac11af483572, 0x3fee9b99229046f8, // 0.29175, 0.95649 - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694 - 0x3fd27bf7d0f2c346, 0x3feea2e4d212c000, // 0.28882, 0.95738 - 0x3fd263e6995554ba, 0x3feea68393e65800, // 0.28735, 0.95783 - 0x3fd24bd28bb37672, 0x3feeaa1d9bb20af3, // 0.28588, 0.95827 - 0x3fd233bbabc3bb72, 0x3feeadb2e8e7a88e, // 0.28441, 0.9587 - 0x3fd21ba1fd3d2623, 0x3feeb1437af9bb34, // 0.28294, 0.95914 - 0x3fd2038583d727bd, 0x3feeb4cf515b8811, // 0.28146, 0.95957 - 0x3fd1eb6643499fbb, 0x3feeb8566b810f2a, // 0.27999, 0.96 - 0x3fd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // 0.27852, 0.96043 - 0x3fd1bb1f7b999480, 0x3feebf5668eaf2ef, // 0.27705, 0.96086 - 0x3fd1a2f7fbe8f243, 0x3feec2cf4b1af6b2, // 0.27557, 0.96128 - 0x3fd18acdc3f4873a, 0x3feec6436ee60309, // 0.2741, 0.9617 - 0x3fd172a0d7765177, 0x3feec9b2d3c3bf84, // 0.27262, 0.96212 - 0x3fd15a713a28b9d9, 0x3feecd1d792c8f10, // 0.27115, 0.96254 - 0x3fd1423eefc69378, 0x3feed0835e999009, // 0.26967, 0.96295 - 0x3fd12a09fc0b1b12, 0x3feed3e483849c51, // 0.26819, 0.96337 - 0x3fd111d262b1f677, 0x3feed740e7684963, // 0.26671, 0.96378 - 0x3fd0f998277733f7, 0x3feeda9889bfe86a, // 0.26523, 0.96418 - 0x3fd0e15b4e1749cd, 0x3feeddeb6a078651, // 0.26375, 0.96459 - 0x3fd0c91bda4f158d, 0x3feee13987bbebdc, // 0.26227, 0.96499 - 0x3fd0b0d9cfdbdb90, 0x3feee482e25a9dbc, // 0.26079, 0.96539 - 0x3fd09895327b465e, 0x3feee7c77961dc9e, // 0.25931, 0.96579 - 0x3fd0804e05eb661e, 0x3feeeb074c50a544, // 0.25783, 0.96619 - 0x3fd068044deab002, 0x3feeee425aa6b09a, // 0.25635, 0.96658 - 0x3fd04fb80e37fdae, 0x3feef178a3e473c2, // 0.25487, 0.96698 - 0x3fd037694a928cac, 0x3feef4aa278b2032, // 0.25338, 0.96737 - 0x3fd01f1806b9fdd2, 0x3feef7d6e51ca3c0, // 0.2519, 0.96775 - 0x3fd006c4466e54af, 0x3feefafedc1ba8b7, // 0.25041, 0.96814 - 0x3fcfdcdc1adfedf8, 0x3feefe220c0b95ec, // 0.24893, 0.96852 - 0x3fcfac2abeff57ff, 0x3fef014074708ed3, // 0.24744, 0.9689 - 0x3fcf7b7480bd3801, 0x3fef045a14cf738c, // 0.24596, 0.96928 - 0x3fcf4ab9679c9f5c, 0x3fef076eecade0fa, // 0.24447, 0.96966 - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003 - 0x3fcee934c2d006c7, 0x3fef0d8a410379c5, // 0.24149, 0.9704 - 0x3fceb86b462de348, 0x3fef1090bc898f5f, // 0.24, 0.97077 - 0x3fce879d0cc0fdaf, 0x3fef13926dad024e, // 0.23851, 0.97114 - 0x3fce56ca1e101a1b, 0x3fef168f53f7205d, // 0.23702, 0.9715 - 0x3fce25f281a2b684, 0x3fef19876ef1f486, // 0.23553, 0.97187 - 0x3fcdf5163f01099a, 0x3fef1c7abe284708, // 0.23404, 0.97223 - 0x3fcdc4355db40195, 0x3fef1f6941259d7a, // 0.23255, 0.97258 - 0x3fcd934fe5454311, 0x3fef2252f7763ada, // 0.23106, 0.97294 - 0x3fcd6265dd3f27e3, 0x3fef2537e0a71f9f, // 0.22957, 0.97329 - 0x3fcd31774d2cbdee, 0x3fef2817fc4609ce, // 0.22807, 0.97364 - 0x3fcd00843c99c5f9, 0x3fef2af349e17507, // 0.22658, 0.97399 - 0x3fcccf8cb312b286, 0x3fef2dc9c9089a9d, // 0.22508, 0.97434 - 0x3fcc9e90b824a6a9, 0x3fef309b794b719f, // 0.22359, 0.97468 - 0x3fcc6d90535d74dc, 0x3fef33685a3aaef0, // 0.22209, 0.97503 - 0x3fcc3c8b8c4b9dd7, 0x3fef36306b67c556, // 0.2206, 0.97536 - 0x3fcc0b826a7e4f63, 0x3fef38f3ac64e589, // 0.2191, 0.9757 - 0x3fcbda74f5856330, 0x3fef3bb21cc4fe47, // 0.2176, 0.97604 - 0x3fcba96334f15dad, 0x3fef3e6bbc1bbc65, // 0.21611, 0.97637 - 0x3fcb784d30536cda, 0x3fef412089fd8adc, // 0.21461, 0.9767 - 0x3fcb4732ef3d6722, 0x3fef43d085ff92dd, // 0.21311, 0.97703 - 0x3fcb16147941ca2a, 0x3fef467bafb7bbe0, // 0.21161, 0.97735 - 0x3fcae4f1d5f3b9ab, 0x3fef492206bcabb4, // 0.21011, 0.97768 - 0x3fcab3cb0ce6fe44, 0x3fef4bc38aa5c694, // 0.20861, 0.978 - 0x3fca82a025b00451, 0x3fef4e603b0b2f2d, // 0.20711, 0.97832 - 0x3fca517127e3dabc, 0x3fef50f81785c6b9, // 0.20561, 0.97863 - 0x3fca203e1b1831da, 0x3fef538b1faf2d07, // 0.20411, 0.97895 - 0x3fc9ef0706e35a35, 0x3fef56195321c090, // 0.20261, 0.97926 - 0x3fc9bdcbf2dc4366, 0x3fef58a2b1789e84, // 0.2011, 0.97957 - 0x3fc98c8ce69a7aec, 0x3fef5b273a4fa2d9, // 0.1996, 0.97988 - 0x3fc95b49e9b62af9, 0x3fef5da6ed43685d, // 0.1981, 0.98018 - 0x3fc92a0303c8194f, 0x3fef6021c9f148c2, // 0.19659, 0.98048 - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079 - 0x3fc8c7699b34ca7e, 0x3fef6508fef47bd5, // 0.19359, 0.98108 - 0x3fc8961727c41804, 0x3fef677556883cee, // 0.19208, 0.98138 - 0x3fc864c0e9b2b6cf, 0x3fef69dcd652f5de, // 0.19057, 0.98167 - 0x3fc83366e89c64c5, 0x3fef6c3f7df5bbb7, // 0.18907, 0.98196 - 0x3fc802092c1d744b, 0x3fef6e9d4d1262ca, // 0.18756, 0.98225 - 0x3fc7d0a7bbd2cb1b, 0x3fef70f6434b7eb7, // 0.18606, 0.98254 - 0x3fc79f429f59e11d, 0x3fef734a60446279, // 0.18455, 0.98282 - 0x3fc76dd9de50bf31, 0x3fef7599a3a12077, // 0.18304, 0.98311 - 0x3fc73c6d8055fe0a, 0x3fef77e40d068a90, // 0.18153, 0.98339 - 0x3fc70afd8d08c4ff, 0x3fef7a299c1a322a, // 0.18002, 0.98366 - 0x3fc6d98a0c08c8da, 0x3fef7c6a50826840, // 0.17851, 0.98394 - 0x3fc6a81304f64ab2, 0x3fef7ea629e63d6e, // 0.177, 0.98421 - 0x3fc676987f7216b8, 0x3fef80dd27ed8204, // 0.17549, 0.98448 - 0x3fc6451a831d830d, 0x3fef830f4a40c60c, // 0.17398, 0.98475 - 0x3fc61399179a6e94, 0x3fef853c9089595e, // 0.17247, 0.98501 - 0x3fc5e214448b3fc6, 0x3fef8764fa714ba9, // 0.17096, 0.98528 - 0x3fc5b08c1192e381, 0x3fef898887a36c84, // 0.16945, 0.98554 - 0x3fc57f008654cbde, 0x3fef8ba737cb4b78, // 0.16794, 0.9858 - 0x3fc54d71aa74ef02, 0x3fef8dc10a95380d, // 0.16643, 0.98605 - 0x3fc51bdf8597c5f2, 0x3fef8fd5ffae41db, // 0.16491, 0.98631 - 0x3fc4ea4a1f624b61, 0x3fef91e616c43891, // 0.1634, 0.98656 - 0x3fc4b8b17f79fa88, 0x3fef93f14f85ac08, // 0.16189, 0.98681 - 0x3fc48715ad84cdf5, 0x3fef95f7a9a1ec47, // 0.16037, 0.98706 - 0x3fc45576b1293e5a, 0x3fef97f924c9099b, // 0.15886, 0.9873 - 0x3fc423d4920e4166, 0x3fef99f5c0abd496, // 0.15734, 0.98754 - 0x3fc3f22f57db4893, 0x3fef9bed7cfbde29, // 0.15583, 0.98778 - 0x3fc3c0870a383ff6, 0x3fef9de0596b77a3, // 0.15431, 0.98802 - 0x3fc38edbb0cd8d14, 0x3fef9fce55adb2c8, // 0.1528, 0.98826 - 0x3fc35d2d53440db2, 0x3fefa1b7717661d5, // 0.15128, 0.98849 - 0x3fc32b7bf94516a7, 0x3fefa39bac7a1791, // 0.14976, 0.98872 - 0x3fc2f9c7aa7a72af, 0x3fefa57b066e2754, // 0.14825, 0.98895 - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918 - 0x3fc296564d2b953e, 0x3fefa92b1600657c, // 0.14521, 0.9894 - 0x3fc264994dfd340a, 0x3fefaafbcb0cfddc, // 0.1437, 0.98962 - 0x3fc232d978aed413, 0x3fefacc79de6c44f, // 0.14218, 0.98984 - 0x3fc20116d4ec7bce, 0x3fefae8e8e46cfbb, // 0.14066, 0.99006 - 0x3fc1cf516a62a077, 0x3fefb0509be6f7db, // 0.13914, 0.99027 - 0x3fc19d8940be24e7, 0x3fefb20dc681d54d, // 0.13762, 0.99049 - 0x3fc16bbe5fac5865, 0x3fefb3c60dd2c199, // 0.1361, 0.9907 - 0x3fc139f0cedaf576, 0x3fefb5797195d741, // 0.13458, 0.9909 - 0x3fc1082095f820b0, 0x3fefb727f187f1c7, // 0.13306, 0.99111 - 0x3fc0d64dbcb26786, 0x3fefb8d18d66adb7, // 0.13154, 0.99131 - 0x3fc0a4784ab8bf1d, 0x3fefba7644f068b5, // 0.13002, 0.99151 - 0x3fc072a047ba831d, 0x3fefbc1617e44186, // 0.1285, 0.99171 - 0x3fc040c5bb67747e, 0x3fefbdb106021816, // 0.12698, 0.99191 - 0x3fc00ee8ad6fb85b, 0x3fefbf470f0a8d88, // 0.12545, 0.9921 - 0x3fbfba124b07ad85, 0x3fefc0d832bf043a, // 0.12393, 0.99229 - 0x3fbf564e56a9730e, 0x3fefc26470e19fd3, // 0.12241, 0.99248 - 0x3fbef2858d27561b, 0x3fefc3ebc935454c, // 0.12089, 0.99267 - 0x3fbe8eb7fde4aa3e, 0x3fefc56e3b7d9af6, // 0.11937, 0.99285 - 0x3fbe2ae5b8457f77, 0x3fefc6ebc77f0887, // 0.11784, 0.99303 - 0x3fbdc70ecbae9fc8, 0x3fefc8646cfeb721, // 0.11632, 0.99321 - 0x3fbd633347858ce4, 0x3fefc9d82bc2915e, // 0.11479, 0.99339 - 0x3fbcff533b307dc1, 0x3fefcb4703914354, // 0.11327, 0.99356 - 0x3fbc9b6eb6165c42, 0x3fefccb0f4323aa3, // 0.11175, 0.99374 - 0x3fbc3785c79ec2d5, 0x3fefce15fd6da67b, // 0.11022, 0.99391 - 0x3fbbd3987f31fa0e, 0x3fefcf761f0c77a3, // 0.1087, 0.99407 - 0x3fbb6fa6ec38f64c, 0x3fefd0d158d86087, // 0.10717, 0.99424 - 0x3fbb0bb11e1d5559, 0x3fefd227aa9bd53b, // 0.10565, 0.9944 - 0x3fbaa7b724495c04, 0x3fefd37914220b84, // 0.10412, 0.99456 - 0x3fba43b90e27f3c4, 0x3fefd4c59536fae4, // 0.1026, 0.99472 - 0x3fb9dfb6eb24a85c, 0x3fefd60d2da75c9e, // 0.10107, 0.99488 - 0x3fb97bb0caaba56f, 0x3fefd74fdd40abbf, // 0.099544, 0.99503 - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, // 0.098017, 0.99518 - 0x3fb8b398cf0c38e0, 0x3fefd9c68127c78c, // 0.09649, 0.99533 - 0x3fb84f8712c130a0, 0x3fefdafa7514538c, // 0.094963, 0.99548 - 0x3fb7eb7196b72ee4, 0x3fefdc297f674ba9, // 0.093436, 0.99563 - 0x3fb787586a5d5b21, 0x3fefdd539ff1f456, // 0.091909, 0.99577 - 0x3fb7233b9d236e71, 0x3fefde78d68653fd, // 0.090381, 0.99591 - 0x3fb6bf1b3e79b129, 0x3fefdf9922f73307, // 0.088854, 0.99604 - 0x3fb65af75dd0f87b, 0x3fefe0b485181be3, // 0.087326, 0.99618 - 0x3fb5f6d00a9aa419, 0x3fefe1cafcbd5b09, // 0.085797, 0.99631 - 0x3fb592a554489bc8, 0x3fefe2dc89bbff08, // 0.084269, 0.99644 - 0x3fb52e774a4d4d0a, 0x3fefe3e92be9d886, // 0.08274, 0.99657 - 0x3fb4ca45fc1ba8b6, 0x3fefe4f0e31d7a4a, // 0.081211, 0.9967 - 0x3fb4661179272096, 0x3fefe5f3af2e3940, // 0.079682, 0.99682 - 0x3fb401d9d0e3a507, 0x3fefe6f18ff42c84, // 0.078153, 0.99694 - 0x3fb39d9f12c5a299, 0x3fefe7ea85482d60, // 0.076624, 0.99706 - 0x3fb339614e41ffa5, 0x3fefe8de8f03d75c, // 0.075094, 0.99718 - 0x3fb2d52092ce19f6, 0x3fefe9cdad01883a, // 0.073565, 0.99729 - 0x3fb270dcefdfc45b, 0x3fefeab7df1c6005, // 0.072035, 0.9974 - 0x3fb20c9674ed444c, 0x3fefeb9d2530410f, // 0.070505, 0.99751 - 0x3fb1a84d316d4f8a, 0x3fefec7d7f19cffc, // 0.068974, 0.99762 - 0x3fb1440134d709b2, 0x3fefed58ecb673c4, // 0.067444, 0.99772 - 0x3fb0dfb28ea201e6, 0x3fefee2f6de455ba, // 0.065913, 0.99783 - 0x3fb07b614e463064, 0x3fefef0102826191, // 0.064383, 0.99793 - 0x3fb0170d833bf421, 0x3fefefcdaa704562, // 0.062852, 0.99802 - 0x3faf656e79f820e0, 0x3feff095658e71ad, // 0.061321, 0.99812 - 0x3fae9cbd15ff5527, 0x3feff15833be1965, // 0.05979, 0.99821 - 0x3fadd406f9808ec8, 0x3feff21614e131ed, // 0.058258, 0.9983 - 0x3fad0b4c436f91d0, 0x3feff2cf08da7321, // 0.056727, 0.99839 - 0x3fac428d12c0d7e3, 0x3feff3830f8d575c, // 0.055195, 0.99848 - 0x3fab79c986698b78, 0x3feff43228de1b77, // 0.053664, 0.99856 - 0x3faab101bd5f8317, 0x3feff4dc54b1bed3, // 0.052132, 0.99864 - 0x3fa9e835d6993c87, 0x3feff58192ee0358, // 0.0506, 0.99872 - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, // 0.049068, 0.9988 - 0x3fa856922bb513c1, 0x3feff6bd463b444d, // 0.047535, 0.99887 - 0x3fa78dbaa5874685, 0x3feff753bb1b9164, // 0.046003, 0.99894 - 0x3fa6c4df7d7d5b84, 0x3feff7e5420320f9, // 0.044471, 0.99901 - 0x3fa5fc00d290cd43, 0x3feff871dadb81df, // 0.042938, 0.99908 - 0x3fa5331ec3bba0eb, 0x3feff8f9858f058b, // 0.041406, 0.99914 - 0x3fa46a396ff86179, 0x3feff97c4208c014, // 0.039873, 0.9992 - 0x3fa3a150f6421afc, 0x3feff9fa10348837, // 0.03834, 0.99926 - 0x3fa2d865759455cd, 0x3feffa72effef75d, // 0.036807, 0.99932 - 0x3fa20f770ceb11c6, 0x3feffae6e1556998, // 0.035274, 0.99938 - 0x3fa14685db42c17e, 0x3feffb55e425fdae, // 0.033741, 0.99943 - 0x3fa07d91ff984580, 0x3feffbbff85f9515, // 0.032208, 0.99948 - 0x3f9f693731d1cf01, 0x3feffc251df1d3f8, // 0.030675, 0.99953 - 0x3f9dd7458c64ab39, 0x3feffc8554cd213a, // 0.029142, 0.99958 - 0x3f9c454f4ce53b1c, 0x3feffce09ce2a679, // 0.027608, 0.99962 - 0x3f9ab354b1504fca, 0x3feffd36f624500c, // 0.026075, 0.99966 - 0x3f992155f7a3667e, 0x3feffd886084cd0d, // 0.024541, 0.9997 - 0x3f978f535ddc9f03, 0x3feffdd4dbf78f52, // 0.023008, 0.99974 - 0x3f95fd4d21fab226, 0x3feffe1c6870cb77, // 0.021474, 0.99977 - 0x3f946b4381fce81c, 0x3feffe5f05e578db, // 0.01994, 0.9998 - 0x3f92d936bbe30efd, 0x3feffe9cb44b51a1, // 0.018407, 0.99983 - 0x3f9147270dad7132, 0x3feffed57398d2b7, // 0.016873, 0.99986 - 0x3f8f6a296ab997ca, 0x3fefff0943c53bd1, // 0.015339, 0.99988 - 0x3f8c45ffe1e48ad9, 0x3fefff3824c88f6f, // 0.013805, 0.9999 - 0x3f8921d1fcdec784, 0x3fefff62169b92db, // 0.012272, 0.99992 - 0x3f85fda037ac05e0, 0x3fefff871937ce2f, // 0.010738, 0.99994 - 0x3f82d96b0e509703, 0x3fefffa72c978c4f, // 0.0092038, 0.99996 - 0x3f7f6a65f9a2a3c5, 0x3fefffc250b5daef, // 0.0076698, 0.99997 - 0x3f7921f0fe670071, 0x3fefffd8858e8a92, // 0.0061359, 0.99998 - 0x3f72d97822f996bc, 0x3fefffe9cb1e2e8d, // 0.0046019, 0.99999 - 0x3f6921f8becca4ba, 0x3feffff621621d02, // 0.003068, 1 - 0x3f5921faaee6472d, 0x3feffffd88586ee6, // 0.001534, 1 - 0x0000000000000000, 0x3ff0000000000000, // 0, 1 - 0xbf5921faaee6472d, 0x3feffffd88586ee6, // -0.001534, 1 - 0xbf6921f8becca4ba, 0x3feffff621621d02, // -0.003068, 1 - 0xbf72d97822f996bc, 0x3fefffe9cb1e2e8d, //-0.0046019, 0.99999 - 0xbf7921f0fe670071, 0x3fefffd8858e8a92, //-0.0061359, 0.99998 - 0xbf7f6a65f9a2a3c5, 0x3fefffc250b5daef, //-0.0076698, 0.99997 - 0xbf82d96b0e509703, 0x3fefffa72c978c4f, //-0.0092038, 0.99996 - 0xbf85fda037ac05e0, 0x3fefff871937ce2f, // -0.010738, 0.99994 - 0xbf8921d1fcdec784, 0x3fefff62169b92db, // -0.012272, 0.99992 - 0xbf8c45ffe1e48ad9, 0x3fefff3824c88f6f, // -0.013805, 0.9999 - 0xbf8f6a296ab997ca, 0x3fefff0943c53bd1, // -0.015339, 0.99988 - 0xbf9147270dad7132, 0x3feffed57398d2b7, // -0.016873, 0.99986 - 0xbf92d936bbe30efd, 0x3feffe9cb44b51a1, // -0.018407, 0.99983 - 0xbf946b4381fce81c, 0x3feffe5f05e578db, // -0.01994, 0.9998 - 0xbf95fd4d21fab226, 0x3feffe1c6870cb77, // -0.021474, 0.99977 - 0xbf978f535ddc9f03, 0x3feffdd4dbf78f52, // -0.023008, 0.99974 - 0xbf992155f7a3667e, 0x3feffd886084cd0d, // -0.024541, 0.9997 - 0xbf9ab354b1504fca, 0x3feffd36f624500c, // -0.026075, 0.99966 - 0xbf9c454f4ce53b1c, 0x3feffce09ce2a679, // -0.027608, 0.99962 - 0xbf9dd7458c64ab39, 0x3feffc8554cd213a, // -0.029142, 0.99958 - 0xbf9f693731d1cf01, 0x3feffc251df1d3f8, // -0.030675, 0.99953 - 0xbfa07d91ff984580, 0x3feffbbff85f9515, // -0.032208, 0.99948 - 0xbfa14685db42c17e, 0x3feffb55e425fdae, // -0.033741, 0.99943 - 0xbfa20f770ceb11c6, 0x3feffae6e1556998, // -0.035274, 0.99938 - 0xbfa2d865759455cd, 0x3feffa72effef75d, // -0.036807, 0.99932 - 0xbfa3a150f6421afc, 0x3feff9fa10348837, // -0.03834, 0.99926 - 0xbfa46a396ff86179, 0x3feff97c4208c014, // -0.039873, 0.9992 - 0xbfa5331ec3bba0eb, 0x3feff8f9858f058b, // -0.041406, 0.99914 - 0xbfa5fc00d290cd43, 0x3feff871dadb81df, // -0.042938, 0.99908 - 0xbfa6c4df7d7d5b84, 0x3feff7e5420320f9, // -0.044471, 0.99901 - 0xbfa78dbaa5874685, 0x3feff753bb1b9164, // -0.046003, 0.99894 - 0xbfa856922bb513c1, 0x3feff6bd463b444d, // -0.047535, 0.99887 - 0xbfa91f65f10dd814, 0x3feff621e3796d7e, // -0.049068, 0.9988 - 0xbfa9e835d6993c87, 0x3feff58192ee0358, // -0.0506, 0.99872 - 0xbfaab101bd5f8317, 0x3feff4dc54b1bed3, // -0.052132, 0.99864 - 0xbfab79c986698b78, 0x3feff43228de1b77, // -0.053664, 0.99856 - 0xbfac428d12c0d7e3, 0x3feff3830f8d575c, // -0.055195, 0.99848 - 0xbfad0b4c436f91d0, 0x3feff2cf08da7321, // -0.056727, 0.99839 - 0xbfadd406f9808ec8, 0x3feff21614e131ed, // -0.058258, 0.9983 - 0xbfae9cbd15ff5527, 0x3feff15833be1965, // -0.05979, 0.99821 - 0xbfaf656e79f820e0, 0x3feff095658e71ad, // -0.061321, 0.99812 - 0xbfb0170d833bf421, 0x3fefefcdaa704562, // -0.062852, 0.99802 - 0xbfb07b614e463064, 0x3fefef0102826191, // -0.064383, 0.99793 - 0xbfb0dfb28ea201e6, 0x3fefee2f6de455ba, // -0.065913, 0.99783 - 0xbfb1440134d709b2, 0x3fefed58ecb673c4, // -0.067444, 0.99772 - 0xbfb1a84d316d4f8a, 0x3fefec7d7f19cffc, // -0.068974, 0.99762 - 0xbfb20c9674ed444c, 0x3fefeb9d2530410f, // -0.070505, 0.99751 - 0xbfb270dcefdfc45b, 0x3fefeab7df1c6005, // -0.072035, 0.9974 - 0xbfb2d52092ce19f6, 0x3fefe9cdad01883a, // -0.073565, 0.99729 - 0xbfb339614e41ffa5, 0x3fefe8de8f03d75c, // -0.075094, 0.99718 - 0xbfb39d9f12c5a299, 0x3fefe7ea85482d60, // -0.076624, 0.99706 - 0xbfb401d9d0e3a507, 0x3fefe6f18ff42c84, // -0.078153, 0.99694 - 0xbfb4661179272096, 0x3fefe5f3af2e3940, // -0.079682, 0.99682 - 0xbfb4ca45fc1ba8b6, 0x3fefe4f0e31d7a4a, // -0.081211, 0.9967 - 0xbfb52e774a4d4d0a, 0x3fefe3e92be9d886, // -0.08274, 0.99657 - 0xbfb592a554489bc8, 0x3fefe2dc89bbff08, // -0.084269, 0.99644 - 0xbfb5f6d00a9aa419, 0x3fefe1cafcbd5b09, // -0.085797, 0.99631 - 0xbfb65af75dd0f87b, 0x3fefe0b485181be3, // -0.087326, 0.99618 - 0xbfb6bf1b3e79b129, 0x3fefdf9922f73307, // -0.088854, 0.99604 - 0xbfb7233b9d236e71, 0x3fefde78d68653fd, // -0.090381, 0.99591 - 0xbfb787586a5d5b21, 0x3fefdd539ff1f456, // -0.091909, 0.99577 - 0xbfb7eb7196b72ee4, 0x3fefdc297f674ba9, // -0.093436, 0.99563 - 0xbfb84f8712c130a0, 0x3fefdafa7514538c, // -0.094963, 0.99548 - 0xbfb8b398cf0c38e0, 0x3fefd9c68127c78c, // -0.09649, 0.99533 - 0xbfb917a6bc29b42c, 0x3fefd88da3d12526, // -0.098017, 0.99518 - 0xbfb97bb0caaba56f, 0x3fefd74fdd40abbf, // -0.099544, 0.99503 - 0xbfb9dfb6eb24a85c, 0x3fefd60d2da75c9e, // -0.10107, 0.99488 - 0xbfba43b90e27f3c4, 0x3fefd4c59536fae4, // -0.1026, 0.99472 - 0xbfbaa7b724495c04, 0x3fefd37914220b84, // -0.10412, 0.99456 - 0xbfbb0bb11e1d5559, 0x3fefd227aa9bd53b, // -0.10565, 0.9944 - 0xbfbb6fa6ec38f64c, 0x3fefd0d158d86087, // -0.10717, 0.99424 - 0xbfbbd3987f31fa0e, 0x3fefcf761f0c77a3, // -0.1087, 0.99407 - 0xbfbc3785c79ec2d5, 0x3fefce15fd6da67b, // -0.11022, 0.99391 - 0xbfbc9b6eb6165c42, 0x3fefccb0f4323aa3, // -0.11175, 0.99374 - 0xbfbcff533b307dc1, 0x3fefcb4703914354, // -0.11327, 0.99356 - 0xbfbd633347858ce4, 0x3fefc9d82bc2915e, // -0.11479, 0.99339 - 0xbfbdc70ecbae9fc8, 0x3fefc8646cfeb721, // -0.11632, 0.99321 - 0xbfbe2ae5b8457f77, 0x3fefc6ebc77f0887, // -0.11784, 0.99303 - 0xbfbe8eb7fde4aa3e, 0x3fefc56e3b7d9af6, // -0.11937, 0.99285 - 0xbfbef2858d27561b, 0x3fefc3ebc935454c, // -0.12089, 0.99267 - 0xbfbf564e56a9730e, 0x3fefc26470e19fd3, // -0.12241, 0.99248 - 0xbfbfba124b07ad85, 0x3fefc0d832bf043a, // -0.12393, 0.99229 - 0xbfc00ee8ad6fb85b, 0x3fefbf470f0a8d88, // -0.12545, 0.9921 - 0xbfc040c5bb67747e, 0x3fefbdb106021816, // -0.12698, 0.99191 - 0xbfc072a047ba831d, 0x3fefbc1617e44186, // -0.1285, 0.99171 - 0xbfc0a4784ab8bf1d, 0x3fefba7644f068b5, // -0.13002, 0.99151 - 0xbfc0d64dbcb26786, 0x3fefb8d18d66adb7, // -0.13154, 0.99131 - 0xbfc1082095f820b0, 0x3fefb727f187f1c7, // -0.13306, 0.99111 - 0xbfc139f0cedaf576, 0x3fefb5797195d741, // -0.13458, 0.9909 - 0xbfc16bbe5fac5865, 0x3fefb3c60dd2c199, // -0.1361, 0.9907 - 0xbfc19d8940be24e7, 0x3fefb20dc681d54d, // -0.13762, 0.99049 - 0xbfc1cf516a62a077, 0x3fefb0509be6f7db, // -0.13914, 0.99027 - 0xbfc20116d4ec7bce, 0x3fefae8e8e46cfbb, // -0.14066, 0.99006 - 0xbfc232d978aed413, 0x3fefacc79de6c44f, // -0.14218, 0.98984 - 0xbfc264994dfd340a, 0x3fefaafbcb0cfddc, // -0.1437, 0.98962 - 0xbfc296564d2b953e, 0x3fefa92b1600657c, // -0.14521, 0.9894 - 0xbfc2c8106e8e613a, 0x3fefa7557f08a517, // -0.14673, 0.98918 - 0xbfc2f9c7aa7a72af, 0x3fefa57b066e2754, // -0.14825, 0.98895 - 0xbfc32b7bf94516a7, 0x3fefa39bac7a1791, // -0.14976, 0.98872 - 0xbfc35d2d53440db2, 0x3fefa1b7717661d5, // -0.15128, 0.98849 - 0xbfc38edbb0cd8d14, 0x3fef9fce55adb2c8, // -0.1528, 0.98826 - 0xbfc3c0870a383ff6, 0x3fef9de0596b77a3, // -0.15431, 0.98802 - 0xbfc3f22f57db4893, 0x3fef9bed7cfbde29, // -0.15583, 0.98778 - 0xbfc423d4920e4166, 0x3fef99f5c0abd496, // -0.15734, 0.98754 - 0xbfc45576b1293e5a, 0x3fef97f924c9099b, // -0.15886, 0.9873 - 0xbfc48715ad84cdf5, 0x3fef95f7a9a1ec47, // -0.16037, 0.98706 - 0xbfc4b8b17f79fa88, 0x3fef93f14f85ac08, // -0.16189, 0.98681 - 0xbfc4ea4a1f624b61, 0x3fef91e616c43891, // -0.1634, 0.98656 - 0xbfc51bdf8597c5f2, 0x3fef8fd5ffae41db, // -0.16491, 0.98631 - 0xbfc54d71aa74ef02, 0x3fef8dc10a95380d, // -0.16643, 0.98605 - 0xbfc57f008654cbde, 0x3fef8ba737cb4b78, // -0.16794, 0.9858 - 0xbfc5b08c1192e381, 0x3fef898887a36c84, // -0.16945, 0.98554 - 0xbfc5e214448b3fc6, 0x3fef8764fa714ba9, // -0.17096, 0.98528 - 0xbfc61399179a6e94, 0x3fef853c9089595e, // -0.17247, 0.98501 - 0xbfc6451a831d830d, 0x3fef830f4a40c60c, // -0.17398, 0.98475 - 0xbfc676987f7216b8, 0x3fef80dd27ed8204, // -0.17549, 0.98448 - 0xbfc6a81304f64ab2, 0x3fef7ea629e63d6e, // -0.177, 0.98421 - 0xbfc6d98a0c08c8da, 0x3fef7c6a50826840, // -0.17851, 0.98394 - 0xbfc70afd8d08c4ff, 0x3fef7a299c1a322a, // -0.18002, 0.98366 - 0xbfc73c6d8055fe0a, 0x3fef77e40d068a90, // -0.18153, 0.98339 - 0xbfc76dd9de50bf31, 0x3fef7599a3a12077, // -0.18304, 0.98311 - 0xbfc79f429f59e11d, 0x3fef734a60446279, // -0.18455, 0.98282 - 0xbfc7d0a7bbd2cb1b, 0x3fef70f6434b7eb7, // -0.18606, 0.98254 - 0xbfc802092c1d744b, 0x3fef6e9d4d1262ca, // -0.18756, 0.98225 - 0xbfc83366e89c64c5, 0x3fef6c3f7df5bbb7, // -0.18907, 0.98196 - 0xbfc864c0e9b2b6cf, 0x3fef69dcd652f5de, // -0.19057, 0.98167 - 0xbfc8961727c41804, 0x3fef677556883cee, // -0.19208, 0.98138 - 0xbfc8c7699b34ca7e, 0x3fef6508fef47bd5, // -0.19359, 0.98108 - 0xbfc8f8b83c69a60a, 0x3fef6297cff75cb0, // -0.19509, 0.98079 - 0xbfc92a0303c8194f, 0x3fef6021c9f148c2, // -0.19659, 0.98048 - 0xbfc95b49e9b62af9, 0x3fef5da6ed43685d, // -0.1981, 0.98018 - 0xbfc98c8ce69a7aec, 0x3fef5b273a4fa2d9, // -0.1996, 0.97988 - 0xbfc9bdcbf2dc4366, 0x3fef58a2b1789e84, // -0.2011, 0.97957 - 0xbfc9ef0706e35a35, 0x3fef56195321c090, // -0.20261, 0.97926 - 0xbfca203e1b1831da, 0x3fef538b1faf2d07, // -0.20411, 0.97895 - 0xbfca517127e3dabc, 0x3fef50f81785c6b9, // -0.20561, 0.97863 - 0xbfca82a025b00451, 0x3fef4e603b0b2f2d, // -0.20711, 0.97832 - 0xbfcab3cb0ce6fe44, 0x3fef4bc38aa5c694, // -0.20861, 0.978 - 0xbfcae4f1d5f3b9ab, 0x3fef492206bcabb4, // -0.21011, 0.97768 - 0xbfcb16147941ca2a, 0x3fef467bafb7bbe0, // -0.21161, 0.97735 - 0xbfcb4732ef3d6722, 0x3fef43d085ff92dd, // -0.21311, 0.97703 - 0xbfcb784d30536cda, 0x3fef412089fd8adc, // -0.21461, 0.9767 - 0xbfcba96334f15dad, 0x3fef3e6bbc1bbc65, // -0.21611, 0.97637 - 0xbfcbda74f5856330, 0x3fef3bb21cc4fe47, // -0.2176, 0.97604 - 0xbfcc0b826a7e4f63, 0x3fef38f3ac64e589, // -0.2191, 0.9757 - 0xbfcc3c8b8c4b9dd7, 0x3fef36306b67c556, // -0.2206, 0.97536 - 0xbfcc6d90535d74dc, 0x3fef33685a3aaef0, // -0.22209, 0.97503 - 0xbfcc9e90b824a6a9, 0x3fef309b794b719f, // -0.22359, 0.97468 - 0xbfcccf8cb312b286, 0x3fef2dc9c9089a9d, // -0.22508, 0.97434 - 0xbfcd00843c99c5f9, 0x3fef2af349e17507, // -0.22658, 0.97399 - 0xbfcd31774d2cbdee, 0x3fef2817fc4609ce, // -0.22807, 0.97364 - 0xbfcd6265dd3f27e3, 0x3fef2537e0a71f9f, // -0.22957, 0.97329 - 0xbfcd934fe5454311, 0x3fef2252f7763ada, // -0.23106, 0.97294 - 0xbfcdc4355db40195, 0x3fef1f6941259d7a, // -0.23255, 0.97258 - 0xbfcdf5163f01099a, 0x3fef1c7abe284708, // -0.23404, 0.97223 - 0xbfce25f281a2b684, 0x3fef19876ef1f486, // -0.23553, 0.97187 - 0xbfce56ca1e101a1b, 0x3fef168f53f7205d, // -0.23702, 0.9715 - 0xbfce879d0cc0fdaf, 0x3fef13926dad024e, // -0.23851, 0.97114 - 0xbfceb86b462de348, 0x3fef1090bc898f5f, // -0.24, 0.97077 - 0xbfcee934c2d006c7, 0x3fef0d8a410379c5, // -0.24149, 0.9704 - 0xbfcf19f97b215f1a, 0x3fef0a7efb9230d7, // -0.24298, 0.97003 - 0xbfcf4ab9679c9f5c, 0x3fef076eecade0fa, // -0.24447, 0.96966 - 0xbfcf7b7480bd3801, 0x3fef045a14cf738c, // -0.24596, 0.96928 - 0xbfcfac2abeff57ff, 0x3fef014074708ed3, // -0.24744, 0.9689 - 0xbfcfdcdc1adfedf8, 0x3feefe220c0b95ec, // -0.24893, 0.96852 - 0xbfd006c4466e54af, 0x3feefafedc1ba8b7, // -0.25041, 0.96814 - 0xbfd01f1806b9fdd2, 0x3feef7d6e51ca3c0, // -0.2519, 0.96775 - 0xbfd037694a928cac, 0x3feef4aa278b2032, // -0.25338, 0.96737 - 0xbfd04fb80e37fdae, 0x3feef178a3e473c2, // -0.25487, 0.96698 - 0xbfd068044deab002, 0x3feeee425aa6b09a, // -0.25635, 0.96658 - 0xbfd0804e05eb661e, 0x3feeeb074c50a544, // -0.25783, 0.96619 - 0xbfd09895327b465e, 0x3feee7c77961dc9e, // -0.25931, 0.96579 - 0xbfd0b0d9cfdbdb90, 0x3feee482e25a9dbc, // -0.26079, 0.96539 - 0xbfd0c91bda4f158d, 0x3feee13987bbebdc, // -0.26227, 0.96499 - 0xbfd0e15b4e1749cd, 0x3feeddeb6a078651, // -0.26375, 0.96459 - 0xbfd0f998277733f7, 0x3feeda9889bfe86a, // -0.26523, 0.96418 - 0xbfd111d262b1f677, 0x3feed740e7684963, // -0.26671, 0.96378 - 0xbfd12a09fc0b1b12, 0x3feed3e483849c51, // -0.26819, 0.96337 - 0xbfd1423eefc69378, 0x3feed0835e999009, // -0.26967, 0.96295 - 0xbfd15a713a28b9d9, 0x3feecd1d792c8f10, // -0.27115, 0.96254 - 0xbfd172a0d7765177, 0x3feec9b2d3c3bf84, // -0.27262, 0.96212 - 0xbfd18acdc3f4873a, 0x3feec6436ee60309, // -0.2741, 0.9617 - 0xbfd1a2f7fbe8f243, 0x3feec2cf4b1af6b2, // -0.27557, 0.96128 - 0xbfd1bb1f7b999480, 0x3feebf5668eaf2ef, // -0.27705, 0.96086 - 0xbfd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // -0.27852, 0.96043 - 0xbfd1eb6643499fbb, 0x3feeb8566b810f2a, // -0.27999, 0.96 - 0xbfd2038583d727bd, 0x3feeb4cf515b8811, // -0.28146, 0.95957 - 0xbfd21ba1fd3d2623, 0x3feeb1437af9bb34, // -0.28294, 0.95914 - 0xbfd233bbabc3bb72, 0x3feeadb2e8e7a88e, // -0.28441, 0.9587 - 0xbfd24bd28bb37672, 0x3feeaa1d9bb20af3, // -0.28588, 0.95827 - 0xbfd263e6995554ba, 0x3feea68393e65800, // -0.28735, 0.95783 - 0xbfd27bf7d0f2c346, 0x3feea2e4d212c000, // -0.28882, 0.95738 - 0xbfd294062ed59f05, 0x3fee9f4156c62dda, // -0.29028, 0.95694 - 0xbfd2ac11af483572, 0x3fee9b99229046f8, // -0.29175, 0.95649 - 0xbfd2c41a4e954520, 0x3fee97ec36016b30, // -0.29322, 0.95605 - 0xbfd2dc200907fe51, 0x3fee943a91aab4b4, // -0.29469, 0.95559 - 0xbfd2f422daec0386, 0x3fee9084361df7f3, // -0.29615, 0.95514 - 0xbfd30c22c08d6a13, 0x3fee8cc923edc388, // -0.29762, 0.95469 - 0xbfd3241fb638baaf, 0x3fee89095bad6025, // -0.29908, 0.95423 - 0xbfd33c19b83af207, 0x3fee8544ddf0d075, // -0.30054, 0.95377 - 0xbfd35410c2e18152, 0x3fee817bab4cd10d, // -0.30201, 0.95331 - 0xbfd36c04d27a4edf, 0x3fee7dadc456d850, // -0.30347, 0.95284 - 0xbfd383f5e353b6aa, 0x3fee79db29a5165a, // -0.30493, 0.95238 - 0xbfd39be3f1bc8aef, 0x3fee7603dbce74e9, // -0.30639, 0.95191 - 0xbfd3b3cefa0414b7, 0x3fee7227db6a9744, // -0.30785, 0.95144 - 0xbfd3cbb6f87a146e, 0x3fee6e472911da27, // -0.30931, 0.95096 - 0xbfd3e39be96ec271, 0x3fee6a61c55d53a7, // -0.31077, 0.95049 - 0xbfd3fb7dc932cfa4, 0x3fee6677b0e6d31e, // -0.31222, 0.95001 - 0xbfd4135c94176602, 0x3fee6288ec48e112, // -0.31368, 0.94953 - 0xbfd42b38466e2928, 0x3fee5e95781ebf1c, // -0.31514, 0.94905 - 0xbfd44310dc8936f0, 0x3fee5a9d550467d3, // -0.31659, 0.94856 - 0xbfd45ae652bb2800, 0x3fee56a083968eb1, // -0.31805, 0.94807 - 0xbfd472b8a5571054, 0x3fee529f04729ffc, // -0.3195, 0.94759 - 0xbfd48a87d0b07fd7, 0x3fee4e98d836c0af, // -0.32096, 0.94709 - 0xbfd4a253d11b82f3, 0x3fee4a8dff81ce5e, // -0.32241, 0.9466 - 0xbfd4ba1ca2eca31c, 0x3fee467e7af35f23, // -0.32386, 0.94611 - 0xbfd4d1e24278e76a, 0x3fee426a4b2bc17e, // -0.32531, 0.94561 - 0xbfd4e9a4ac15d520, 0x3fee3e5170cbfc46, // -0.32676, 0.94511 - 0xbfd50163dc197047, 0x3fee3a33ec75ce85, // -0.32821, 0.9446 - 0xbfd5191fceda3c35, 0x3fee3611becbaf69, // -0.32966, 0.9441 - 0xbfd530d880af3c24, 0x3fee31eae870ce25, // -0.33111, 0.94359 - 0xbfd5488dedeff3be, 0x3fee2dbf6a0911d9, // -0.33255, 0.94308 - 0xbfd5604012f467b4, 0x3fee298f4439197a, // -0.334, 0.94257 - 0xbfd577eeec151e47, 0x3fee255a77a63bb8, // -0.33545, 0.94206 - 0xbfd58f9a75ab1fdd, 0x3fee212104f686e5, // -0.33689, 0.94154 - 0xbfd5a742ac0ff78d, 0x3fee1ce2ecd0c0d8, // -0.33833, 0.94103 - 0xbfd5bee78b9db3b6, 0x3fee18a02fdc66d9, // -0.33978, 0.94051 - 0xbfd5d68910aee686, 0x3fee1458cec1ad83, // -0.34122, 0.93998 - 0xbfd5ee27379ea693, 0x3fee100cca2980ac, // -0.34266, 0.93946 - 0xbfd605c1fcc88f63, 0x3fee0bbc22bd8349, // -0.3441, 0.93893 - 0xbfd61d595c88c203, 0x3fee0766d9280f54, // -0.34554, 0.9384 - 0xbfd634ed533be58e, 0x3fee030cee1435b8, // -0.34698, 0.93787 - 0xbfd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // -0.34842, 0.93734 - 0xbfd6640af6f03d9e, 0x3fedfa4b3621271d, // -0.34986, 0.9368 - 0xbfd67b949cad63ca, 0x3fedf5e36a9ba59c, // -0.35129, 0.93627 - 0xbfd6931acad55f51, 0x3fedf177004b2534, // -0.35273, 0.93573 - 0xbfd6aa9d7dc77e16, 0x3feded05f7de47da, // -0.35416, 0.93518 - 0xbfd6c21cb1e39771, 0x3fede890520465ce, // -0.3556, 0.93464 - 0xbfd6d998638a0cb5, 0x3fede4160f6d8d81, // -0.35703, 0.93409 - 0xbfd6f1108f1bc9c5, 0x3feddf9730ca837b, // -0.35846, 0.93354 - 0xbfd7088530fa459e, 0x3feddb13b6ccc23d, // -0.3599, 0.93299 - 0xbfd71ff6458782ec, 0x3fedd68ba2267a25, // -0.36133, 0.93244 - 0xbfd73763c9261092, 0x3fedd1fef38a915a, // -0.36276, 0.93188 - 0xbfd74ecdb8390a3e, 0x3fedcd6dabaca3a5, // -0.36418, 0.93133 - 0xbfd766340f2418f6, 0x3fedc8d7cb410260, // -0.36561, 0.93077 - 0xbfd77d96ca4b73a6, 0x3fedc43d52fcb453, // -0.36704, 0.93021 - 0xbfd794f5e613dfae, 0x3fedbf9e4395759a, // -0.36847, 0.92964 - 0xbfd7ac515ee2b172, 0x3fedbafa9dc1b78d, // -0.36989, 0.92907 - 0xbfd7c3a9311dcce7, 0x3fedb6526238a09b, // -0.37132, 0.92851 - 0xbfd7dafd592ba621, 0x3fedb1a591b20c38, // -0.37274, 0.92794 - 0xbfd7f24dd37341e3, 0x3fedacf42ce68ab9, // -0.37416, 0.92736 - 0xbfd8099a9c5c362d, 0x3feda83e348f613b, // -0.37559, 0.92679 - 0xbfd820e3b04eaac4, 0x3feda383a9668988, // -0.37701, 0.92621 - 0xbfd838290bb359c8, 0x3fed9ec48c26b1f3, // -0.37843, 0.92563 - 0xbfd84f6aaaf3903f, 0x3fed9a00dd8b3d46, // -0.37985, 0.92505 - 0xbfd866a88a792ea0, 0x3fed95389e50429b, // -0.38127, 0.92447 - 0xbfd87de2a6aea963, 0x3fed906bcf328d46, // -0.38268, 0.92388 - 0xbfd89518fbff098e, 0x3fed8b9a70ef9cb4, // -0.3841, 0.92329 - 0xbfd8ac4b86d5ed44, 0x3fed86c48445a450, // -0.38552, 0.9227 - 0xbfd8c37a439f884f, 0x3fed81ea09f38b63, // -0.38693, 0.92211 - 0xbfd8daa52ec8a4af, 0x3fed7d0b02b8ecf9, // -0.38835, 0.92151 - 0xbfd8f1cc44bea329, 0x3fed78276f5617c6, // -0.38976, 0.92092 - 0xbfd908ef81ef7bd1, 0x3fed733f508c0dff, // -0.39117, 0.92032 - 0xbfd9200ee2c9be97, 0x3fed6e52a71c8547, // -0.39258, 0.91972 - 0xbfd9372a63bc93d7, 0x3fed696173c9e68b, // -0.39399, 0.91911 - 0xbfd94e420137bce3, 0x3fed646bb7574de5, // -0.3954, 0.91851 - 0xbfd96555b7ab948f, 0x3fed5f7172888a7f, // -0.39681, 0.9179 - 0xbfd97c6583890fc2, 0x3fed5a72a6221e73, // -0.39822, 0.91729 - 0xbfd993716141bdfe, 0x3fed556f52e93eb1, // -0.39962, 0.91668 - 0xbfd9aa794d47c9ee, 0x3fed506779a3d2d9, // -0.40103, 0.91606 - 0xbfd9c17d440df9f2, 0x3fed4b5b1b187524, // -0.40243, 0.91545 - 0xbfd9d87d4207b0ab, 0x3fed464a380e7242, // -0.40384, 0.91483 - 0xbfd9ef7943a8ed8a, 0x3fed4134d14dc93a, // -0.40524, 0.91421 - 0xbfda067145664d57, 0x3fed3c1ae79f2b4e, // -0.40664, 0.91359 - 0xbfda1d6543b50ac0, 0x3fed36fc7bcbfbdc, // -0.40804, 0.91296 - 0xbfda34553b0afee5, 0x3fed31d98e9e503a, // -0.40944, 0.91234 - 0xbfda4b4127dea1e4, 0x3fed2cb220e0ef9f, // -0.41084, 0.91171 - 0xbfda622906a70b63, 0x3fed2786335f52fc, // -0.41224, 0.91107 - 0xbfda790cd3dbf31a, 0x3fed2255c6e5a4e1, // -0.41364, 0.91044 - 0xbfda8fec8bf5b166, 0x3fed1d20dc40c15c, // -0.41503, 0.90981 - 0xbfdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // -0.41643, 0.90917 - 0xbfdabd9faebc3980, 0x3fed12a98fac410c, // -0.41782, 0.90853 - 0xbfdad473125cdc08, 0x3fed0d672f59d2b9, // -0.41922, 0.90789 - 0xbfdaeb4252ca07ab, 0x3fed082054168bac, // -0.42061, 0.90724 - 0xbfdb020d6c7f4009, 0x3fed02d4feb2bd92, // -0.422, 0.9066 - 0xbfdb18d45bf8aca6, 0x3fecfd852fff6ad4, // -0.42339, 0.90595 - 0xbfdb2f971db31972, 0x3fecf830e8ce467b, // -0.42478, 0.9053 - 0xbfdb4655ae2bf757, 0x3fecf2d829f1b40e, // -0.42617, 0.90464 - 0xbfdb5d1009e15cc0, 0x3feced7af43cc773, // -0.42756, 0.90399 - 0xbfdb73c62d520624, 0x3fece819488344ce, // -0.42894, 0.90333 - 0xbfdb8a7814fd5693, 0x3fece2b32799a060, // -0.43033, 0.90267 - 0xbfdba125bd63583e, 0x3fecdd489254fe65, // -0.43171, 0.90201 - 0xbfdbb7cf2304bd01, 0x3fecd7d9898b32f6, // -0.43309, 0.90135 - 0xbfdbce744262deee, 0x3fecd2660e12c1e6, // -0.43448, 0.90068 - 0xbfdbe51517ffc0d9, 0x3fecccee20c2de9f, // -0.43586, 0.90002 - 0xbfdbfbb1a05e0edc, 0x3fecc771c2736c09, // -0.43724, 0.89935 - 0xbfdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // -0.43862, 0.89867 - 0xbfdc28ddbb6cf145, 0x3fecbc6bb638d10b, // -0.43999, 0.898 - 0xbfdc3f6d47263129, 0x3fecb6e20a00da99, // -0.44137, 0.89732 - 0xbfdc55f877b23537, 0x3fecb153f02fb87d, // -0.44275, 0.89665 - 0xbfdc6c7f4997000a, 0x3fecabc169a0b901, // -0.44412, 0.89597 - 0xbfdc8301b95b40c2, 0x3feca62a772fd919, // -0.4455, 0.89528 - 0xbfdc997fc3865388, 0x3feca08f19b9c449, // -0.44687, 0.8946 - 0xbfdcaff964a0421d, 0x3fec9aef521bd480, // -0.44824, 0.89391 - 0xbfdcc66e9931c45d, 0x3fec954b213411f5, // -0.44961, 0.89322 - 0xbfdcdcdf5dc440ce, 0x3fec8fa287e13305, // -0.45098, 0.89253 - 0xbfdcf34baee1cd21, 0x3fec89f587029c13, // -0.45235, 0.89184 - 0xbfdd09b389152ec1, 0x3fec84441f785f61, // -0.45372, 0.89115 - 0xbfdd2016e8e9db5b, 0x3fec7e8e52233cf3, // -0.45508, 0.89045 - 0xbfdd3675caebf962, 0x3fec78d41fe4a267, // -0.45645, 0.88975 - 0xbfdd4cd02ba8609c, 0x3fec7315899eaad7, // -0.45781, 0.88905 - 0xbfdd632607ac9aa9, 0x3fec6d5290341eb2, // -0.45918, 0.88835 - 0xbfdd79775b86e389, 0x3fec678b3488739b, // -0.46054, 0.88764 - 0xbfdd8fc423c62a25, 0x3fec61bf777fcc48, // -0.4619, 0.88693 - 0xbfdda60c5cfa10d8, 0x3fec5bef59fef85a, // -0.46326, 0.88622 - 0xbfddbc5003b2edf8, 0x3fec561adceb743e, // -0.46462, 0.88551 - 0xbfddd28f1481cc58, 0x3fec5042012b6907, // -0.46598, 0.8848 - 0xbfdde8c98bf86bd6, 0x3fec4a64c7a5ac4c, // -0.46733, 0.88408 - 0xbfddfeff66a941de, 0x3fec44833141c004, // -0.46869, 0.88336 - 0xbfde1530a12779f4, 0x3fec3e9d3ee7d262, // -0.47004, 0.88264 - 0xbfde2b5d3806f63b, 0x3fec38b2f180bdb1, // -0.4714, 0.88192 - 0xbfde418527dc4ffa, 0x3fec32c449f60831, // -0.47275, 0.8812 - 0xbfde57a86d3cd824, 0x3fec2cd14931e3f1, // -0.4741, 0.88047 - 0xbfde6dc704be97e2, 0x3fec26d9f01f2eaf, // -0.47545, 0.87974 - 0xbfde83e0eaf85113, 0x3fec20de3fa971b0, // -0.4768, 0.87901 - 0xbfde99f61c817eda, 0x3fec1ade38bce19b, // -0.47815, 0.87828 - 0xbfdeb00695f25620, 0x3fec14d9dc465e58, // -0.47949, 0.87755 - 0xbfdec61253e3c61b, 0x3fec0ed12b3372e9, // -0.48084, 0.87681 - 0xbfdedc1952ef78d5, 0x3fec08c426725549, // -0.48218, 0.87607 - 0xbfdef21b8fafd3b5, 0x3fec02b2cef1e641, // -0.48353, 0.87533 - 0xbfdf081906bff7fd, 0x3febfc9d25a1b147, // -0.48487, 0.87459 - 0xbfdf1e11b4bbc35c, 0x3febf6832b71ec5b, // -0.48621, 0.87384 - 0xbfdf3405963fd068, 0x3febf064e15377dd, // -0.48755, 0.87309 - 0xbfdf49f4a7e97729, 0x3febea424837de6d, // -0.48889, 0.87235 - 0xbfdf5fdee656cda3, 0x3febe41b611154c1, // -0.49023, 0.8716 - 0xbfdf75c44e26a852, 0x3febddf02cd2b983, // -0.49156, 0.87084 - 0xbfdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // -0.4929, 0.87009 - 0xbfdfa1808c6cf7e0, 0x3febd18ce0dc19d6, // -0.49423, 0.86933 - 0xbfdfb7575c24d2de, 0x3febcb54cb0d2327, // -0.49557, 0.86857 - 0xbfdfcd2947c1ff57, 0x3febc5186bf8361d, // -0.4969, 0.86781 - 0xbfdfe2f64be7120f, 0x3febbed7c49380ea, // -0.49823, 0.86705 - 0xbfdff8be6537615e, 0x3febb892d5d5dad5, // -0.49956, 0.86628 - 0xbfe00740c82b82e0, 0x3febb249a0b6c40d, // -0.50089, 0.86551 - 0xbfe0121fe4f56d2c, 0x3febabfc262e6586, // -0.50221, 0.86474 - 0xbfe01cfc874c3eb7, 0x3feba5aa673590d2, // -0.50354, 0.86397 - 0xbfe027d6ad83287e, 0x3feb9f5464c5bffc, // -0.50486, 0.8632 - 0xbfe032ae55edbd95, 0x3feb98fa1fd9155e, // -0.50619, 0.86242 - 0xbfe03d837edff370, 0x3feb929b996a5b7f, // -0.50751, 0.86165 - 0xbfe0485626ae221a, 0x3feb8c38d27504e9, // -0.50883, 0.86087 - 0xbfe053264bad0483, 0x3feb85d1cbf52c02, // -0.51015, 0.86009 - 0xbfe05df3ec31b8b6, 0x3feb7f6686e792ea, // -0.51147, 0.8593 - 0xbfe068bf0691c028, 0x3feb78f70449a34b, // -0.51279, 0.85852 - 0xbfe073879922ffed, 0x3feb728345196e3e, // -0.5141, 0.85773 - 0xbfe07e4da23bc102, 0x3feb6c0b4a55ac17, // -0.51542, 0.85694 - 0xbfe089112032b08c, 0x3feb658f14fdbc47, // -0.51673, 0.85615 - 0xbfe093d2115ee018, 0x3feb5f0ea611a532, // -0.51804, 0.85535 - 0xbfe09e907417c5e1, 0x3feb5889fe921405, // -0.51936, 0.85456 - 0xbfe0a94c46b53d0b, 0x3feb52011f805c92, // -0.52067, 0.85376 - 0xbfe0b405878f85ec, 0x3feb4b7409de7925, // -0.52198, 0.85296 - 0xbfe0bebc34ff4646, 0x3feb44e2beaf0a61, // -0.52328, 0.85216 - 0xbfe0c9704d5d898f, 0x3feb3e4d3ef55712, // -0.52459, 0.85136 - 0xbfe0d421cf03c12b, 0x3feb37b38bb54c09, // -0.5259, 0.85055 - 0xbfe0ded0b84bc4b5, 0x3feb3115a5f37bf4, // -0.5272, 0.84974 - 0xbfe0e97d078fd23b, 0x3feb2a738eb51f33, // -0.5285, 0.84893 - 0xbfe0f426bb2a8e7d, 0x3feb23cd470013b4, // -0.5298, 0.84812 - 0xbfe0fecdd1770537, 0x3feb1d22cfdadcc6, // -0.5311, 0.84731 - 0xbfe1097248d0a956, 0x3feb16742a4ca2f5, // -0.5324, 0.84649 - 0xbfe114141f935545, 0x3feb0fc1575d33db, // -0.5337, 0.84567 - 0xbfe11eb3541b4b22, 0x3feb090a58150200, // -0.535, 0.84485 - 0xbfe1294fe4c5350a, 0x3feb024f2d7d24a9, // -0.53629, 0.84403 - 0xbfe133e9cfee254e, 0x3feafb8fd89f57b6, // -0.53759, 0.84321 - 0xbfe13e8113f396c1, 0x3feaf4cc5a85fb73, // -0.53888, 0.84238 - 0xbfe14915af336ceb, 0x3feaee04b43c1474, // -0.54017, 0.84155 - 0xbfe153a7a00bf453, 0x3feae738e6cd4b67, // -0.54146, 0.84073 - 0xbfe15e36e4dbe2bc, 0x3feae068f345ecef, // -0.54275, 0.83989 - 0xbfe168c37c025764, 0x3fead994dab2e979, // -0.54404, 0.83906 - 0xbfe1734d63dedb49, 0x3fead2bc9e21d511, // -0.54532, 0.83822 - 0xbfe17dd49ad16161, 0x3feacbe03ea0e73b, // -0.54661, 0.83739 - 0xbfe188591f3a46e5, 0x3feac4ffbd3efac8, // -0.54789, 0.83655 - 0xbfe192daef7a5386, 0x3feabe1b1b0b8dac, // -0.54918, 0.83571 - 0xbfe19d5a09f2b9b8, 0x3feab7325916c0d4, // -0.55046, 0.83486 - 0xbfe1a7d66d0516e6, 0x3feab045787157ff, // -0.55174, 0.83402 - 0xbfe1b250171373be, 0x3feaa9547a2cb98e, // -0.55302, 0.83317 - 0xbfe1bcc706804467, 0x3feaa25f5f5aee60, // -0.55429, 0.83232 - 0xbfe1c73b39ae68c8, 0x3fea9b66290ea1a3, // -0.55557, 0.83147 - 0xbfe1d1acaf012cc2, 0x3fea9468d85b20ae, // -0.55685, 0.83062 - 0xbfe1dc1b64dc4872, 0x3fea8d676e545ad2, // -0.55812, 0.82976 - 0xbfe1e68759a3e074, 0x3fea8661ec0ee133, // -0.55939, 0.8289 - 0xbfe1f0f08bbc861b, 0x3fea7f58529fe69d, // -0.56066, 0.82805 - 0xbfe1fb56f98b37b8, 0x3fea784aa31d3f55, // -0.56193, 0.82718 - 0xbfe205baa17560d6, 0x3fea7138de9d60f5, // -0.5632, 0.82632 - 0xbfe2101b81e0da78, 0x3fea6a230637623b, // -0.56447, 0.82546 - 0xbfe21a799933eb58, 0x3fea63091b02fae2, // -0.56573, 0.82459 - 0xbfe224d4e5d5482e, 0x3fea5beb1e188375, // -0.567, 0.82372 - 0xbfe22f2d662c13e1, 0x3fea54c91090f524, // -0.56826, 0.82285 - 0xbfe23983189fdfd5, 0x3fea4da2f385e997, // -0.56952, 0.82198 - 0xbfe243d5fb98ac1f, 0x3fea4678c8119ac8, // -0.57078, 0.8211 - 0xbfe24e260d7ee7c9, 0x3fea3f4a8f4ee2d2, // -0.57204, 0.82023 - 0xbfe258734cbb7110, 0x3fea38184a593bc6, // -0.5733, 0.81935 - 0xbfe262bdb7b795a2, 0x3fea30e1fa4cbf81, // -0.57455, 0.81847 - 0xbfe26d054cdd12df, 0x3fea29a7a0462782, // -0.57581, 0.81758 - 0xbfe2774a0a961612, 0x3fea22693d62ccb9, // -0.57706, 0.8167 - 0xbfe2818bef4d3cba, 0x3fea1b26d2c0a75e, // -0.57831, 0.81581 - 0xbfe28bcaf96d94ba, 0x3fea13e0617e4ec7, // -0.57956, 0.81493 - 0xbfe2960727629ca8, 0x3fea0c95eabaf937, // -0.58081, 0.81404 - 0xbfe2a040779843fb, 0x3fea05476f967bb5, // -0.58206, 0.81314 - 0xbfe2aa76e87aeb58, 0x3fe9fdf4f13149de, // -0.58331, 0.81225 - 0xbfe2b4aa787764c4, 0x3fe9f69e70ac75bc, // -0.58455, 0.81135 - 0xbfe2bedb25faf3ea, 0x3fe9ef43ef29af94, // -0.5858, 0.81046 - 0xbfe2c908ef734e57, 0x3fe9e7e56dcb45bd, // -0.58704, 0.80956 - 0xbfe2d333d34e9bb7, 0x3fe9e082edb42472, // -0.58828, 0.80866 - 0xbfe2dd5bcffb7616, 0x3fe9d91c7007d5a6, // -0.58952, 0.80775 - 0xbfe2e780e3e8ea16, 0x3fe9d1b1f5ea80d6, // -0.59076, 0.80685 - 0xbfe2f1a30d86773a, 0x3fe9ca438080eadb, // -0.592, 0.80594 - 0xbfe2fbc24b441015, 0x3fe9c2d110f075c3, // -0.59323, 0.80503 - 0xbfe305de9b921a94, 0x3fe9bb5aa85f2098, // -0.59447, 0.80412 - 0xbfe30ff7fce17035, 0x3fe9b3e047f38741, // -0.5957, 0.80321 - 0xbfe31a0e6da35e44, 0x3fe9ac61f0d4e247, // -0.59693, 0.80229 - 0xbfe32421ec49a620, 0x3fe9a4dfa42b06b2, // -0.59816, 0.80138 - 0xbfe32e3277467d6b, 0x3fe99d59631e65d5, // -0.59939, 0.80046 - 0xbfe338400d0c8e57, 0x3fe995cf2ed80d22, // -0.60062, 0.79954 - 0xbfe3424aac0ef7d6, 0x3fe98e410881a600, // -0.60184, 0.79861 - 0xbfe34c5252c14de1, 0x3fe986aef1457594, // -0.60307, 0.79769 - 0xbfe35656ff9799ae, 0x3fe97f18ea4e5c9e, // -0.60429, 0.79676 - 0xbfe36058b10659f3, 0x3fe9777ef4c7d742, // -0.60551, 0.79584 - 0xbfe36a576582831b, 0x3fe96fe111ddfce0, // -0.60673, 0.79491 - 0xbfe374531b817f8d, 0x3fe9683f42bd7fe1, // -0.60795, 0.79398 - 0xbfe37e4bd1792fe2, 0x3fe960998893ad8c, // -0.60917, 0.79304 - 0xbfe3884185dfeb22, 0x3fe958efe48e6dd7, // -0.61038, 0.79211 - 0xbfe39234372c7f04, 0x3fe9514257dc4335, // -0.6116, 0.79117 - 0xbfe39c23e3d63029, 0x3fe94990e3ac4a6c, // -0.61281, 0.79023 - 0xbfe3a6108a54ba58, 0x3fe941db892e3a65, // -0.61402, 0.78929 - 0xbfe3affa292050b9, 0x3fe93a22499263fc, // -0.61523, 0.78835 - 0xbfe3b9e0beb19e18, 0x3fe932652609b1cf, // -0.61644, 0.7874 - 0xbfe3c3c44981c517, 0x3fe92aa41fc5a815, // -0.61765, 0.78646 - 0xbfe3cda4c80a6076, 0x3fe922df37f8646a, // -0.61885, 0.78551 - 0xbfe3d78238c58343, 0x3fe91b166fd49da2, // -0.62006, 0.78456 - 0xbfe3e15c9a2db922, 0x3fe91349c88da398, // -0.62126, 0.7836 - 0xbfe3eb33eabe0680, 0x3fe90b7943575efe, // -0.62246, 0.78265 - 0xbfe3f50828f1e8d2, 0x3fe903a4e1665133, // -0.62366, 0.78169 - 0xbfe3fed9534556d4, 0x3fe8fbcca3ef940d, // -0.62486, 0.78074 - 0xbfe408a76834c0c0, 0x3fe8f3f08c28d9ac, // -0.62606, 0.77978 - 0xbfe41272663d108c, 0x3fe8ec109b486c49, // -0.62725, 0.77882 - 0xbfe41c3a4bdbaa26, 0x3fe8e42cd2852e0a, // -0.62845, 0.77785 - 0xbfe425ff178e6bb1, 0x3fe8dc45331698cc, // -0.62964, 0.77689 - 0xbfe42fc0c7d3adbb, 0x3fe8d459be34bdfa, // -0.63083, 0.77592 - 0xbfe4397f5b2a4380, 0x3fe8cc6a75184655, // -0.63202, 0.77495 - 0xbfe4433ad0117b1d, 0x3fe8c47758fa71cb, // -0.63321, 0.77398 - 0xbfe44cf325091dd6, 0x3fe8bc806b151741, // -0.63439, 0.77301 - 0xbfe456a858917046, 0x3fe8b485aca2a468, // -0.63558, 0.77204 - 0xbfe4605a692b32a2, 0x3fe8ac871ede1d88, // -0.63676, 0.77106 - 0xbfe46a095557a0f1, 0x3fe8a484c3031d50, // -0.63794, 0.77008 - 0xbfe473b51b987347, 0x3fe89c7e9a4dd4ab, // -0.63912, 0.7691 - 0xbfe47d5dba6fde01, 0x3fe89474a5fb0a84, // -0.6403, 0.76812 - 0xbfe48703306091fe, 0x3fe88c66e7481ba1, // -0.64148, 0.76714 - 0xbfe490a57bedbcdf, 0x3fe884555f72fa6b, // -0.64266, 0.76615 - 0xbfe49a449b9b0938, 0x3fe87c400fba2ebf, // -0.64383, 0.76517 - 0xbfe4a3e08dec9ed6, 0x3fe87426f95cd5bd, // -0.645, 0.76418 - 0xbfe4ad79516722f0, 0x3fe86c0a1d9aa195, // -0.64618, 0.76319 - 0xbfe4b70ee48fb869, 0x3fe863e97db3d95a, // -0.64735, 0.7622 - 0xbfe4c0a145ec0004, 0x3fe85bc51ae958cc, // -0.64851, 0.7612 - 0xbfe4ca30740218a3, 0x3fe8539cf67c9029, // -0.64968, 0.76021 - 0xbfe4d3bc6d589f80, 0x3fe84b7111af83f9, // -0.65085, 0.75921 - 0xbfe4dd453076b064, 0x3fe843416dc4cce2, // -0.65201, 0.75821 - 0xbfe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // -0.65317, 0.75721 - 0xbfe4f04d0e2859aa, 0x3fe832d6eda3a3e0, // -0.65433, 0.75621 - 0xbfe4f9cc25cca486, 0x3fe82a9c13f545ff, // -0.65549, 0.7552 - 0xbfe503480159ded2, 0x3fe8225d803964e5, // -0.65665, 0.75419 - 0xbfe50cc09f59a09b, 0x3fe81a1b33b57acc, // -0.65781, 0.75319 - 0xbfe51635fe5601d7, 0x3fe811d52faf94dc, // -0.65896, 0.75218 - 0xbfe51fa81cd99aa6, 0x3fe8098b756e52fa, // -0.66011, 0.75117 - 0xbfe52916f96f8388, 0x3fe8013e0638e795, // -0.66127, 0.75015 - 0xbfe5328292a35596, 0x3fe7f8ece3571771, // -0.66242, 0.74914 - 0xbfe53beae7012abe, 0x3fe7f0980e113978, // -0.66356, 0.74812 - 0xbfe5454ff5159dfb, 0x3fe7e83f87b03686, // -0.66471, 0.7471 - 0xbfe54eb1bb6dcb8f, 0x3fe7dfe3517d8937, // -0.66586, 0.74608 - 0xbfe5581038975137, 0x3fe7d7836cc33db2, // -0.667, 0.74506 - 0xbfe5616b6b204e6e, 0x3fe7cf1fdacbf179, // -0.66814, 0.74403 - 0xbfe56ac35197649e, 0x3fe7c6b89ce2d333, // -0.66928, 0.74301 - 0xbfe57417ea8bb75c, 0x3fe7be4db453a27c, // -0.67042, 0.74198 - 0xbfe57d69348cec9f, 0x3fe7b5df226aafb0, // -0.67156, 0.74095 - 0xbfe586b72e2b2cfd, 0x3fe7ad6ce874dbb6, // -0.67269, 0.73992 - 0xbfe59001d5f723df, 0x3fe7a4f707bf97d2, // -0.67383, 0.73889 - 0xbfe599492a81ffbc, 0x3fe79c7d8198e56e, // -0.67496, 0.73785 - 0xbfe5a28d2a5d7250, 0x3fe79400574f55e4, // -0.67609, 0.73682 - 0xbfe5abcdd41bb0d8, 0x3fe78b7f8a320a52, // -0.67722, 0.73578 - 0xbfe5b50b264f7448, 0x3fe782fb1b90b35b, // -0.67835, 0.73474 - 0xbfe5be451f8bf980, 0x3fe77a730cbb9100, // -0.67948, 0.7337 - 0xbfe5c77bbe65018c, 0x3fe771e75f037261, // -0.6806, 0.73265 - 0xbfe5d0af016ed1d4, 0x3fe7695813b9b594, // -0.68172, 0.73161 - 0xbfe5d9dee73e345c, 0x3fe760c52c304764, // -0.68285, 0.73056 - 0xbfe5e30b6e6877f3, 0x3fe7582ea9b9a329, // -0.68397, 0.72951 - 0xbfe5ec3495837074, 0x3fe74f948da8d28d, // -0.68508, 0.72846 - 0xbfe5f55a5b2576f8, 0x3fe746f6d9516d59, // -0.6862, 0.72741 - 0xbfe5fe7cbde56a0f, 0x3fe73e558e079942, // -0.68732, 0.72636 - 0xbfe6079bbc5aadfa, 0x3fe735b0ad2009b2, // -0.68843, 0.7253 - 0xbfe610b7551d2cde, 0x3fe72d0837efff97, // -0.68954, 0.72425 - 0xbfe619cf86c55702, 0x3fe7245c2fcd492a, // -0.69065, 0.72319 - 0xbfe622e44fec22ff, 0x3fe71bac960e41bf, // -0.69176, 0.72213 - 0xbfe62bf5af2b0dfd, 0x3fe712f96c09d18d, // -0.69287, 0.72107 - 0xbfe63503a31c1be8, 0x3fe70a42b3176d7a, // -0.69397, 0.72 - 0xbfe63e0e2a59d7aa, 0x3fe701886c8f16e6, // -0.69508, 0.71894 - 0xbfe64715437f535b, 0x3fe6f8ca99c95b75, // -0.69618, 0.71787 - 0xbfe65018ed28287f, 0x3fe6f0093c1f54de, // -0.69728, 0.7168 - 0xbfe6591925f0783e, 0x3fe6e74454eaa8ae, // -0.69838, 0.71573 - 0xbfe66215ec74eb91, 0x3fe6de7be585881d, // -0.69947, 0.71466 - 0xbfe66b0f3f52b386, 0x3fe6d5afef4aafcc, // -0.70057, 0.71358 - 0xbfe674051d27896c, 0x3fe6cce07395679f, // -0.70166, 0.71251 - 0xbfe67cf78491af10, 0x3fe6c40d73c18275, // -0.70275, 0.71143 - 0xbfe685e6742feeef, 0x3fe6bb36f12b5e06, // -0.70385, 0.71035 - 0xbfe68ed1eaa19c71, 0x3fe6b25ced2fe29c, // -0.70493, 0.70927 - 0xbfe697b9e686941c, 0x3fe6a97f692c82ea, // -0.70602, 0.70819 - 0xbfe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // -0.70711, 0.70711 - 0xbfe6a97f692c82ea, 0x3fe697b9e686941c, // -0.70819, 0.70602 - 0xbfe6b25ced2fe29c, 0x3fe68ed1eaa19c71, // -0.70927, 0.70493 - 0xbfe6bb36f12b5e06, 0x3fe685e6742feeef, // -0.71035, 0.70385 - 0xbfe6c40d73c18275, 0x3fe67cf78491af10, // -0.71143, 0.70275 - 0xbfe6cce07395679f, 0x3fe674051d27896c, // -0.71251, 0.70166 - 0xbfe6d5afef4aafcc, 0x3fe66b0f3f52b386, // -0.71358, 0.70057 - 0xbfe6de7be585881d, 0x3fe66215ec74eb91, // -0.71466, 0.69947 - 0xbfe6e74454eaa8ae, 0x3fe6591925f0783e, // -0.71573, 0.69838 - 0xbfe6f0093c1f54de, 0x3fe65018ed28287f, // -0.7168, 0.69728 - 0xbfe6f8ca99c95b75, 0x3fe64715437f535b, // -0.71787, 0.69618 - 0xbfe701886c8f16e6, 0x3fe63e0e2a59d7aa, // -0.71894, 0.69508 - 0xbfe70a42b3176d7a, 0x3fe63503a31c1be8, // -0.72, 0.69397 - 0xbfe712f96c09d18d, 0x3fe62bf5af2b0dfd, // -0.72107, 0.69287 - 0xbfe71bac960e41bf, 0x3fe622e44fec22ff, // -0.72213, 0.69176 - 0xbfe7245c2fcd492a, 0x3fe619cf86c55702, // -0.72319, 0.69065 - 0xbfe72d0837efff97, 0x3fe610b7551d2cde, // -0.72425, 0.68954 - 0xbfe735b0ad2009b2, 0x3fe6079bbc5aadfa, // -0.7253, 0.68843 - 0xbfe73e558e079942, 0x3fe5fe7cbde56a0f, // -0.72636, 0.68732 - 0xbfe746f6d9516d59, 0x3fe5f55a5b2576f8, // -0.72741, 0.6862 - 0xbfe74f948da8d28d, 0x3fe5ec3495837074, // -0.72846, 0.68508 - 0xbfe7582ea9b9a329, 0x3fe5e30b6e6877f3, // -0.72951, 0.68397 - 0xbfe760c52c304764, 0x3fe5d9dee73e345c, // -0.73056, 0.68285 - 0xbfe7695813b9b594, 0x3fe5d0af016ed1d4, // -0.73161, 0.68172 - 0xbfe771e75f037261, 0x3fe5c77bbe65018c, // -0.73265, 0.6806 - 0xbfe77a730cbb9100, 0x3fe5be451f8bf980, // -0.7337, 0.67948 - 0xbfe782fb1b90b35b, 0x3fe5b50b264f7448, // -0.73474, 0.67835 - 0xbfe78b7f8a320a52, 0x3fe5abcdd41bb0d8, // -0.73578, 0.67722 - 0xbfe79400574f55e4, 0x3fe5a28d2a5d7250, // -0.73682, 0.67609 - 0xbfe79c7d8198e56e, 0x3fe599492a81ffbc, // -0.73785, 0.67496 - 0xbfe7a4f707bf97d2, 0x3fe59001d5f723df, // -0.73889, 0.67383 - 0xbfe7ad6ce874dbb6, 0x3fe586b72e2b2cfd, // -0.73992, 0.67269 - 0xbfe7b5df226aafb0, 0x3fe57d69348cec9f, // -0.74095, 0.67156 - 0xbfe7be4db453a27c, 0x3fe57417ea8bb75c, // -0.74198, 0.67042 - 0xbfe7c6b89ce2d333, 0x3fe56ac35197649e, // -0.74301, 0.66928 - 0xbfe7cf1fdacbf179, 0x3fe5616b6b204e6e, // -0.74403, 0.66814 - 0xbfe7d7836cc33db2, 0x3fe5581038975137, // -0.74506, 0.667 - 0xbfe7dfe3517d8937, 0x3fe54eb1bb6dcb8f, // -0.74608, 0.66586 - 0xbfe7e83f87b03686, 0x3fe5454ff5159dfb, // -0.7471, 0.66471 - 0xbfe7f0980e113978, 0x3fe53beae7012abe, // -0.74812, 0.66356 - 0xbfe7f8ece3571771, 0x3fe5328292a35596, // -0.74914, 0.66242 - 0xbfe8013e0638e795, 0x3fe52916f96f8388, // -0.75015, 0.66127 - 0xbfe8098b756e52fa, 0x3fe51fa81cd99aa6, // -0.75117, 0.66011 - 0xbfe811d52faf94dc, 0x3fe51635fe5601d7, // -0.75218, 0.65896 - 0xbfe81a1b33b57acc, 0x3fe50cc09f59a09b, // -0.75319, 0.65781 - 0xbfe8225d803964e5, 0x3fe503480159ded2, // -0.75419, 0.65665 - 0xbfe82a9c13f545ff, 0x3fe4f9cc25cca486, // -0.7552, 0.65549 - 0xbfe832d6eda3a3e0, 0x3fe4f04d0e2859aa, // -0.75621, 0.65433 - 0xbfe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // -0.75721, 0.65317 - 0xbfe843416dc4cce2, 0x3fe4dd453076b064, // -0.75821, 0.65201 - 0xbfe84b7111af83f9, 0x3fe4d3bc6d589f80, // -0.75921, 0.65085 - 0xbfe8539cf67c9029, 0x3fe4ca30740218a3, // -0.76021, 0.64968 - 0xbfe85bc51ae958cc, 0x3fe4c0a145ec0004, // -0.7612, 0.64851 - 0xbfe863e97db3d95a, 0x3fe4b70ee48fb869, // -0.7622, 0.64735 - 0xbfe86c0a1d9aa195, 0x3fe4ad79516722f0, // -0.76319, 0.64618 - 0xbfe87426f95cd5bd, 0x3fe4a3e08dec9ed6, // -0.76418, 0.645 - 0xbfe87c400fba2ebf, 0x3fe49a449b9b0938, // -0.76517, 0.64383 - 0xbfe884555f72fa6b, 0x3fe490a57bedbcdf, // -0.76615, 0.64266 - 0xbfe88c66e7481ba1, 0x3fe48703306091fe, // -0.76714, 0.64148 - 0xbfe89474a5fb0a84, 0x3fe47d5dba6fde01, // -0.76812, 0.6403 - 0xbfe89c7e9a4dd4ab, 0x3fe473b51b987347, // -0.7691, 0.63912 - 0xbfe8a484c3031d50, 0x3fe46a095557a0f1, // -0.77008, 0.63794 - 0xbfe8ac871ede1d88, 0x3fe4605a692b32a2, // -0.77106, 0.63676 - 0xbfe8b485aca2a468, 0x3fe456a858917046, // -0.77204, 0.63558 - 0xbfe8bc806b151741, 0x3fe44cf325091dd6, // -0.77301, 0.63439 - 0xbfe8c47758fa71cb, 0x3fe4433ad0117b1d, // -0.77398, 0.63321 - 0xbfe8cc6a75184655, 0x3fe4397f5b2a4380, // -0.77495, 0.63202 - 0xbfe8d459be34bdfa, 0x3fe42fc0c7d3adbb, // -0.77592, 0.63083 - 0xbfe8dc45331698cc, 0x3fe425ff178e6bb1, // -0.77689, 0.62964 - 0xbfe8e42cd2852e0a, 0x3fe41c3a4bdbaa26, // -0.77785, 0.62845 - 0xbfe8ec109b486c49, 0x3fe41272663d108c, // -0.77882, 0.62725 - 0xbfe8f3f08c28d9ac, 0x3fe408a76834c0c0, // -0.77978, 0.62606 - 0xbfe8fbcca3ef940d, 0x3fe3fed9534556d4, // -0.78074, 0.62486 - 0xbfe903a4e1665133, 0x3fe3f50828f1e8d2, // -0.78169, 0.62366 - 0xbfe90b7943575efe, 0x3fe3eb33eabe0680, // -0.78265, 0.62246 - 0xbfe91349c88da398, 0x3fe3e15c9a2db922, // -0.7836, 0.62126 - 0xbfe91b166fd49da2, 0x3fe3d78238c58343, // -0.78456, 0.62006 - 0xbfe922df37f8646a, 0x3fe3cda4c80a6076, // -0.78551, 0.61885 - 0xbfe92aa41fc5a815, 0x3fe3c3c44981c517, // -0.78646, 0.61765 - 0xbfe932652609b1cf, 0x3fe3b9e0beb19e18, // -0.7874, 0.61644 - 0xbfe93a22499263fc, 0x3fe3affa292050b9, // -0.78835, 0.61523 - 0xbfe941db892e3a65, 0x3fe3a6108a54ba58, // -0.78929, 0.61402 - 0xbfe94990e3ac4a6c, 0x3fe39c23e3d63029, // -0.79023, 0.61281 - 0xbfe9514257dc4335, 0x3fe39234372c7f04, // -0.79117, 0.6116 - 0xbfe958efe48e6dd7, 0x3fe3884185dfeb22, // -0.79211, 0.61038 - 0xbfe960998893ad8c, 0x3fe37e4bd1792fe2, // -0.79304, 0.60917 - 0xbfe9683f42bd7fe1, 0x3fe374531b817f8d, // -0.79398, 0.60795 - 0xbfe96fe111ddfce0, 0x3fe36a576582831b, // -0.79491, 0.60673 - 0xbfe9777ef4c7d742, 0x3fe36058b10659f3, // -0.79584, 0.60551 - 0xbfe97f18ea4e5c9e, 0x3fe35656ff9799ae, // -0.79676, 0.60429 - 0xbfe986aef1457594, 0x3fe34c5252c14de1, // -0.79769, 0.60307 - 0xbfe98e410881a600, 0x3fe3424aac0ef7d6, // -0.79861, 0.60184 - 0xbfe995cf2ed80d22, 0x3fe338400d0c8e57, // -0.79954, 0.60062 - 0xbfe99d59631e65d5, 0x3fe32e3277467d6b, // -0.80046, 0.59939 - 0xbfe9a4dfa42b06b2, 0x3fe32421ec49a620, // -0.80138, 0.59816 - 0xbfe9ac61f0d4e247, 0x3fe31a0e6da35e44, // -0.80229, 0.59693 - 0xbfe9b3e047f38741, 0x3fe30ff7fce17035, // -0.80321, 0.5957 - 0xbfe9bb5aa85f2098, 0x3fe305de9b921a94, // -0.80412, 0.59447 - 0xbfe9c2d110f075c3, 0x3fe2fbc24b441015, // -0.80503, 0.59323 - 0xbfe9ca438080eadb, 0x3fe2f1a30d86773a, // -0.80594, 0.592 - 0xbfe9d1b1f5ea80d6, 0x3fe2e780e3e8ea16, // -0.80685, 0.59076 - 0xbfe9d91c7007d5a6, 0x3fe2dd5bcffb7616, // -0.80775, 0.58952 - 0xbfe9e082edb42472, 0x3fe2d333d34e9bb7, // -0.80866, 0.58828 - 0xbfe9e7e56dcb45bd, 0x3fe2c908ef734e57, // -0.80956, 0.58704 - 0xbfe9ef43ef29af94, 0x3fe2bedb25faf3ea, // -0.81046, 0.5858 - 0xbfe9f69e70ac75bc, 0x3fe2b4aa787764c4, // -0.81135, 0.58455 - 0xbfe9fdf4f13149de, 0x3fe2aa76e87aeb58, // -0.81225, 0.58331 - 0xbfea05476f967bb5, 0x3fe2a040779843fb, // -0.81314, 0.58206 - 0xbfea0c95eabaf937, 0x3fe2960727629ca8, // -0.81404, 0.58081 - 0xbfea13e0617e4ec7, 0x3fe28bcaf96d94ba, // -0.81493, 0.57956 - 0xbfea1b26d2c0a75e, 0x3fe2818bef4d3cba, // -0.81581, 0.57831 - 0xbfea22693d62ccb9, 0x3fe2774a0a961612, // -0.8167, 0.57706 - 0xbfea29a7a0462782, 0x3fe26d054cdd12df, // -0.81758, 0.57581 - 0xbfea30e1fa4cbf81, 0x3fe262bdb7b795a2, // -0.81847, 0.57455 - 0xbfea38184a593bc6, 0x3fe258734cbb7110, // -0.81935, 0.5733 - 0xbfea3f4a8f4ee2d2, 0x3fe24e260d7ee7c9, // -0.82023, 0.57204 - 0xbfea4678c8119ac8, 0x3fe243d5fb98ac1f, // -0.8211, 0.57078 - 0xbfea4da2f385e997, 0x3fe23983189fdfd5, // -0.82198, 0.56952 - 0xbfea54c91090f524, 0x3fe22f2d662c13e1, // -0.82285, 0.56826 - 0xbfea5beb1e188375, 0x3fe224d4e5d5482e, // -0.82372, 0.567 - 0xbfea63091b02fae2, 0x3fe21a799933eb58, // -0.82459, 0.56573 - 0xbfea6a230637623b, 0x3fe2101b81e0da78, // -0.82546, 0.56447 - 0xbfea7138de9d60f5, 0x3fe205baa17560d6, // -0.82632, 0.5632 - 0xbfea784aa31d3f55, 0x3fe1fb56f98b37b8, // -0.82718, 0.56193 - 0xbfea7f58529fe69d, 0x3fe1f0f08bbc861b, // -0.82805, 0.56066 - 0xbfea8661ec0ee133, 0x3fe1e68759a3e074, // -0.8289, 0.55939 - 0xbfea8d676e545ad2, 0x3fe1dc1b64dc4872, // -0.82976, 0.55812 - 0xbfea9468d85b20ae, 0x3fe1d1acaf012cc2, // -0.83062, 0.55685 - 0xbfea9b66290ea1a3, 0x3fe1c73b39ae68c8, // -0.83147, 0.55557 - 0xbfeaa25f5f5aee60, 0x3fe1bcc706804467, // -0.83232, 0.55429 - 0xbfeaa9547a2cb98e, 0x3fe1b250171373be, // -0.83317, 0.55302 - 0xbfeab045787157ff, 0x3fe1a7d66d0516e6, // -0.83402, 0.55174 - 0xbfeab7325916c0d4, 0x3fe19d5a09f2b9b8, // -0.83486, 0.55046 - 0xbfeabe1b1b0b8dac, 0x3fe192daef7a5386, // -0.83571, 0.54918 - 0xbfeac4ffbd3efac8, 0x3fe188591f3a46e5, // -0.83655, 0.54789 - 0xbfeacbe03ea0e73b, 0x3fe17dd49ad16161, // -0.83739, 0.54661 - 0xbfead2bc9e21d511, 0x3fe1734d63dedb49, // -0.83822, 0.54532 - 0xbfead994dab2e979, 0x3fe168c37c025764, // -0.83906, 0.54404 - 0xbfeae068f345ecef, 0x3fe15e36e4dbe2bc, // -0.83989, 0.54275 - 0xbfeae738e6cd4b67, 0x3fe153a7a00bf453, // -0.84073, 0.54146 - 0xbfeaee04b43c1474, 0x3fe14915af336ceb, // -0.84155, 0.54017 - 0xbfeaf4cc5a85fb73, 0x3fe13e8113f396c1, // -0.84238, 0.53888 - 0xbfeafb8fd89f57b6, 0x3fe133e9cfee254e, // -0.84321, 0.53759 - 0xbfeb024f2d7d24a9, 0x3fe1294fe4c5350a, // -0.84403, 0.53629 - 0xbfeb090a58150200, 0x3fe11eb3541b4b22, // -0.84485, 0.535 - 0xbfeb0fc1575d33db, 0x3fe114141f935545, // -0.84567, 0.5337 - 0xbfeb16742a4ca2f5, 0x3fe1097248d0a956, // -0.84649, 0.5324 - 0xbfeb1d22cfdadcc6, 0x3fe0fecdd1770537, // -0.84731, 0.5311 - 0xbfeb23cd470013b4, 0x3fe0f426bb2a8e7d, // -0.84812, 0.5298 - 0xbfeb2a738eb51f33, 0x3fe0e97d078fd23b, // -0.84893, 0.5285 - 0xbfeb3115a5f37bf4, 0x3fe0ded0b84bc4b5, // -0.84974, 0.5272 - 0xbfeb37b38bb54c09, 0x3fe0d421cf03c12b, // -0.85055, 0.5259 - 0xbfeb3e4d3ef55712, 0x3fe0c9704d5d898f, // -0.85136, 0.52459 - 0xbfeb44e2beaf0a61, 0x3fe0bebc34ff4646, // -0.85216, 0.52328 - 0xbfeb4b7409de7925, 0x3fe0b405878f85ec, // -0.85296, 0.52198 - 0xbfeb52011f805c92, 0x3fe0a94c46b53d0b, // -0.85376, 0.52067 - 0xbfeb5889fe921405, 0x3fe09e907417c5e1, // -0.85456, 0.51936 - 0xbfeb5f0ea611a532, 0x3fe093d2115ee018, // -0.85535, 0.51804 - 0xbfeb658f14fdbc47, 0x3fe089112032b08c, // -0.85615, 0.51673 - 0xbfeb6c0b4a55ac17, 0x3fe07e4da23bc102, // -0.85694, 0.51542 - 0xbfeb728345196e3e, 0x3fe073879922ffed, // -0.85773, 0.5141 - 0xbfeb78f70449a34b, 0x3fe068bf0691c028, // -0.85852, 0.51279 - 0xbfeb7f6686e792ea, 0x3fe05df3ec31b8b6, // -0.8593, 0.51147 - 0xbfeb85d1cbf52c02, 0x3fe053264bad0483, // -0.86009, 0.51015 - 0xbfeb8c38d27504e9, 0x3fe0485626ae221a, // -0.86087, 0.50883 - 0xbfeb929b996a5b7f, 0x3fe03d837edff370, // -0.86165, 0.50751 - 0xbfeb98fa1fd9155e, 0x3fe032ae55edbd95, // -0.86242, 0.50619 - 0xbfeb9f5464c5bffc, 0x3fe027d6ad83287e, // -0.8632, 0.50486 - 0xbfeba5aa673590d2, 0x3fe01cfc874c3eb7, // -0.86397, 0.50354 - 0xbfebabfc262e6586, 0x3fe0121fe4f56d2c, // -0.86474, 0.50221 - 0xbfebb249a0b6c40d, 0x3fe00740c82b82e0, // -0.86551, 0.50089 - 0xbfebb892d5d5dad5, 0x3fdff8be6537615e, // -0.86628, 0.49956 - 0xbfebbed7c49380ea, 0x3fdfe2f64be7120f, // -0.86705, 0.49823 - 0xbfebc5186bf8361d, 0x3fdfcd2947c1ff57, // -0.86781, 0.4969 - 0xbfebcb54cb0d2327, 0x3fdfb7575c24d2de, // -0.86857, 0.49557 - 0xbfebd18ce0dc19d6, 0x3fdfa1808c6cf7e0, // -0.86933, 0.49423 - 0xbfebd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // -0.87009, 0.4929 - 0xbfebddf02cd2b983, 0x3fdf75c44e26a852, // -0.87084, 0.49156 - 0xbfebe41b611154c1, 0x3fdf5fdee656cda3, // -0.8716, 0.49023 - 0xbfebea424837de6d, 0x3fdf49f4a7e97729, // -0.87235, 0.48889 - 0xbfebf064e15377dd, 0x3fdf3405963fd068, // -0.87309, 0.48755 - 0xbfebf6832b71ec5b, 0x3fdf1e11b4bbc35c, // -0.87384, 0.48621 - 0xbfebfc9d25a1b147, 0x3fdf081906bff7fd, // -0.87459, 0.48487 - 0xbfec02b2cef1e641, 0x3fdef21b8fafd3b5, // -0.87533, 0.48353 - 0xbfec08c426725549, 0x3fdedc1952ef78d5, // -0.87607, 0.48218 - 0xbfec0ed12b3372e9, 0x3fdec61253e3c61b, // -0.87681, 0.48084 - 0xbfec14d9dc465e58, 0x3fdeb00695f25620, // -0.87755, 0.47949 - 0xbfec1ade38bce19b, 0x3fde99f61c817eda, // -0.87828, 0.47815 - 0xbfec20de3fa971b0, 0x3fde83e0eaf85113, // -0.87901, 0.4768 - 0xbfec26d9f01f2eaf, 0x3fde6dc704be97e2, // -0.87974, 0.47545 - 0xbfec2cd14931e3f1, 0x3fde57a86d3cd824, // -0.88047, 0.4741 - 0xbfec32c449f60831, 0x3fde418527dc4ffa, // -0.8812, 0.47275 - 0xbfec38b2f180bdb1, 0x3fde2b5d3806f63b, // -0.88192, 0.4714 - 0xbfec3e9d3ee7d262, 0x3fde1530a12779f4, // -0.88264, 0.47004 - 0xbfec44833141c004, 0x3fddfeff66a941de, // -0.88336, 0.46869 - 0xbfec4a64c7a5ac4c, 0x3fdde8c98bf86bd6, // -0.88408, 0.46733 - 0xbfec5042012b6907, 0x3fddd28f1481cc58, // -0.8848, 0.46598 - 0xbfec561adceb743e, 0x3fddbc5003b2edf8, // -0.88551, 0.46462 - 0xbfec5bef59fef85a, 0x3fdda60c5cfa10d8, // -0.88622, 0.46326 - 0xbfec61bf777fcc48, 0x3fdd8fc423c62a25, // -0.88693, 0.4619 - 0xbfec678b3488739b, 0x3fdd79775b86e389, // -0.88764, 0.46054 - 0xbfec6d5290341eb2, 0x3fdd632607ac9aa9, // -0.88835, 0.45918 - 0xbfec7315899eaad7, 0x3fdd4cd02ba8609c, // -0.88905, 0.45781 - 0xbfec78d41fe4a267, 0x3fdd3675caebf962, // -0.88975, 0.45645 - 0xbfec7e8e52233cf3, 0x3fdd2016e8e9db5b, // -0.89045, 0.45508 - 0xbfec84441f785f61, 0x3fdd09b389152ec1, // -0.89115, 0.45372 - 0xbfec89f587029c13, 0x3fdcf34baee1cd21, // -0.89184, 0.45235 - 0xbfec8fa287e13305, 0x3fdcdcdf5dc440ce, // -0.89253, 0.45098 - 0xbfec954b213411f5, 0x3fdcc66e9931c45d, // -0.89322, 0.44961 - 0xbfec9aef521bd480, 0x3fdcaff964a0421d, // -0.89391, 0.44824 - 0xbfeca08f19b9c449, 0x3fdc997fc3865388, // -0.8946, 0.44687 - 0xbfeca62a772fd919, 0x3fdc8301b95b40c2, // -0.89528, 0.4455 - 0xbfecabc169a0b901, 0x3fdc6c7f4997000a, // -0.89597, 0.44412 - 0xbfecb153f02fb87d, 0x3fdc55f877b23537, // -0.89665, 0.44275 - 0xbfecb6e20a00da99, 0x3fdc3f6d47263129, // -0.89732, 0.44137 - 0xbfecbc6bb638d10b, 0x3fdc28ddbb6cf145, // -0.898, 0.43999 - 0xbfecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // -0.89867, 0.43862 - 0xbfecc771c2736c09, 0x3fdbfbb1a05e0edc, // -0.89935, 0.43724 - 0xbfecccee20c2de9f, 0x3fdbe51517ffc0d9, // -0.90002, 0.43586 - 0xbfecd2660e12c1e6, 0x3fdbce744262deee, // -0.90068, 0.43448 - 0xbfecd7d9898b32f6, 0x3fdbb7cf2304bd01, // -0.90135, 0.43309 - 0xbfecdd489254fe65, 0x3fdba125bd63583e, // -0.90201, 0.43171 - 0xbfece2b32799a060, 0x3fdb8a7814fd5693, // -0.90267, 0.43033 - 0xbfece819488344ce, 0x3fdb73c62d520624, // -0.90333, 0.42894 - 0xbfeced7af43cc773, 0x3fdb5d1009e15cc0, // -0.90399, 0.42756 - 0xbfecf2d829f1b40e, 0x3fdb4655ae2bf757, // -0.90464, 0.42617 - 0xbfecf830e8ce467b, 0x3fdb2f971db31972, // -0.9053, 0.42478 - 0xbfecfd852fff6ad4, 0x3fdb18d45bf8aca6, // -0.90595, 0.42339 - 0xbfed02d4feb2bd92, 0x3fdb020d6c7f4009, // -0.9066, 0.422 - 0xbfed082054168bac, 0x3fdaeb4252ca07ab, // -0.90724, 0.42061 - 0xbfed0d672f59d2b9, 0x3fdad473125cdc08, // -0.90789, 0.41922 - 0xbfed12a98fac410c, 0x3fdabd9faebc3980, // -0.90853, 0.41782 - 0xbfed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // -0.90917, 0.41643 - 0xbfed1d20dc40c15c, 0x3fda8fec8bf5b166, // -0.90981, 0.41503 - 0xbfed2255c6e5a4e1, 0x3fda790cd3dbf31a, // -0.91044, 0.41364 - 0xbfed2786335f52fc, 0x3fda622906a70b63, // -0.91107, 0.41224 - 0xbfed2cb220e0ef9f, 0x3fda4b4127dea1e4, // -0.91171, 0.41084 - 0xbfed31d98e9e503a, 0x3fda34553b0afee5, // -0.91234, 0.40944 - 0xbfed36fc7bcbfbdc, 0x3fda1d6543b50ac0, // -0.91296, 0.40804 - 0xbfed3c1ae79f2b4e, 0x3fda067145664d57, // -0.91359, 0.40664 - 0xbfed4134d14dc93a, 0x3fd9ef7943a8ed8a, // -0.91421, 0.40524 - 0xbfed464a380e7242, 0x3fd9d87d4207b0ab, // -0.91483, 0.40384 - 0xbfed4b5b1b187524, 0x3fd9c17d440df9f2, // -0.91545, 0.40243 - 0xbfed506779a3d2d9, 0x3fd9aa794d47c9ee, // -0.91606, 0.40103 - 0xbfed556f52e93eb1, 0x3fd993716141bdfe, // -0.91668, 0.39962 - 0xbfed5a72a6221e73, 0x3fd97c6583890fc2, // -0.91729, 0.39822 - 0xbfed5f7172888a7f, 0x3fd96555b7ab948f, // -0.9179, 0.39681 - 0xbfed646bb7574de5, 0x3fd94e420137bce3, // -0.91851, 0.3954 - 0xbfed696173c9e68b, 0x3fd9372a63bc93d7, // -0.91911, 0.39399 - 0xbfed6e52a71c8547, 0x3fd9200ee2c9be97, // -0.91972, 0.39258 - 0xbfed733f508c0dff, 0x3fd908ef81ef7bd1, // -0.92032, 0.39117 - 0xbfed78276f5617c6, 0x3fd8f1cc44bea329, // -0.92092, 0.38976 - 0xbfed7d0b02b8ecf9, 0x3fd8daa52ec8a4af, // -0.92151, 0.38835 - 0xbfed81ea09f38b63, 0x3fd8c37a439f884f, // -0.92211, 0.38693 - 0xbfed86c48445a450, 0x3fd8ac4b86d5ed44, // -0.9227, 0.38552 - 0xbfed8b9a70ef9cb4, 0x3fd89518fbff098e, // -0.92329, 0.3841 - 0xbfed906bcf328d46, 0x3fd87de2a6aea963, // -0.92388, 0.38268 - 0xbfed95389e50429b, 0x3fd866a88a792ea0, // -0.92447, 0.38127 - 0xbfed9a00dd8b3d46, 0x3fd84f6aaaf3903f, // -0.92505, 0.37985 - 0xbfed9ec48c26b1f3, 0x3fd838290bb359c8, // -0.92563, 0.37843 - 0xbfeda383a9668988, 0x3fd820e3b04eaac4, // -0.92621, 0.37701 - 0xbfeda83e348f613b, 0x3fd8099a9c5c362d, // -0.92679, 0.37559 - 0xbfedacf42ce68ab9, 0x3fd7f24dd37341e3, // -0.92736, 0.37416 - 0xbfedb1a591b20c38, 0x3fd7dafd592ba621, // -0.92794, 0.37274 - 0xbfedb6526238a09b, 0x3fd7c3a9311dcce7, // -0.92851, 0.37132 - 0xbfedbafa9dc1b78d, 0x3fd7ac515ee2b172, // -0.92907, 0.36989 - 0xbfedbf9e4395759a, 0x3fd794f5e613dfae, // -0.92964, 0.36847 - 0xbfedc43d52fcb453, 0x3fd77d96ca4b73a6, // -0.93021, 0.36704 - 0xbfedc8d7cb410260, 0x3fd766340f2418f6, // -0.93077, 0.36561 - 0xbfedcd6dabaca3a5, 0x3fd74ecdb8390a3e, // -0.93133, 0.36418 - 0xbfedd1fef38a915a, 0x3fd73763c9261092, // -0.93188, 0.36276 - 0xbfedd68ba2267a25, 0x3fd71ff6458782ec, // -0.93244, 0.36133 - 0xbfeddb13b6ccc23d, 0x3fd7088530fa459e, // -0.93299, 0.3599 - 0xbfeddf9730ca837b, 0x3fd6f1108f1bc9c5, // -0.93354, 0.35846 - 0xbfede4160f6d8d81, 0x3fd6d998638a0cb5, // -0.93409, 0.35703 - 0xbfede890520465ce, 0x3fd6c21cb1e39771, // -0.93464, 0.3556 - 0xbfeded05f7de47da, 0x3fd6aa9d7dc77e16, // -0.93518, 0.35416 - 0xbfedf177004b2534, 0x3fd6931acad55f51, // -0.93573, 0.35273 - 0xbfedf5e36a9ba59c, 0x3fd67b949cad63ca, // -0.93627, 0.35129 - 0xbfedfa4b3621271d, 0x3fd6640af6f03d9e, // -0.9368, 0.34986 - 0xbfedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // -0.93734, 0.34842 - 0xbfee030cee1435b8, 0x3fd634ed533be58e, // -0.93787, 0.34698 - 0xbfee0766d9280f54, 0x3fd61d595c88c203, // -0.9384, 0.34554 - 0xbfee0bbc22bd8349, 0x3fd605c1fcc88f63, // -0.93893, 0.3441 - 0xbfee100cca2980ac, 0x3fd5ee27379ea693, // -0.93946, 0.34266 - 0xbfee1458cec1ad83, 0x3fd5d68910aee686, // -0.93998, 0.34122 - 0xbfee18a02fdc66d9, 0x3fd5bee78b9db3b6, // -0.94051, 0.33978 - 0xbfee1ce2ecd0c0d8, 0x3fd5a742ac0ff78d, // -0.94103, 0.33833 - 0xbfee212104f686e5, 0x3fd58f9a75ab1fdd, // -0.94154, 0.33689 - 0xbfee255a77a63bb8, 0x3fd577eeec151e47, // -0.94206, 0.33545 - 0xbfee298f4439197a, 0x3fd5604012f467b4, // -0.94257, 0.334 - 0xbfee2dbf6a0911d9, 0x3fd5488dedeff3be, // -0.94308, 0.33255 - 0xbfee31eae870ce25, 0x3fd530d880af3c24, // -0.94359, 0.33111 - 0xbfee3611becbaf69, 0x3fd5191fceda3c35, // -0.9441, 0.32966 - 0xbfee3a33ec75ce85, 0x3fd50163dc197047, // -0.9446, 0.32821 - 0xbfee3e5170cbfc46, 0x3fd4e9a4ac15d520, // -0.94511, 0.32676 - 0xbfee426a4b2bc17e, 0x3fd4d1e24278e76a, // -0.94561, 0.32531 - 0xbfee467e7af35f23, 0x3fd4ba1ca2eca31c, // -0.94611, 0.32386 - 0xbfee4a8dff81ce5e, 0x3fd4a253d11b82f3, // -0.9466, 0.32241 - 0xbfee4e98d836c0af, 0x3fd48a87d0b07fd7, // -0.94709, 0.32096 - 0xbfee529f04729ffc, 0x3fd472b8a5571054, // -0.94759, 0.3195 - 0xbfee56a083968eb1, 0x3fd45ae652bb2800, // -0.94807, 0.31805 - 0xbfee5a9d550467d3, 0x3fd44310dc8936f0, // -0.94856, 0.31659 - 0xbfee5e95781ebf1c, 0x3fd42b38466e2928, // -0.94905, 0.31514 - 0xbfee6288ec48e112, 0x3fd4135c94176602, // -0.94953, 0.31368 - 0xbfee6677b0e6d31e, 0x3fd3fb7dc932cfa4, // -0.95001, 0.31222 - 0xbfee6a61c55d53a7, 0x3fd3e39be96ec271, // -0.95049, 0.31077 - 0xbfee6e472911da27, 0x3fd3cbb6f87a146e, // -0.95096, 0.30931 - 0xbfee7227db6a9744, 0x3fd3b3cefa0414b7, // -0.95144, 0.30785 - 0xbfee7603dbce74e9, 0x3fd39be3f1bc8aef, // -0.95191, 0.30639 - 0xbfee79db29a5165a, 0x3fd383f5e353b6aa, // -0.95238, 0.30493 - 0xbfee7dadc456d850, 0x3fd36c04d27a4edf, // -0.95284, 0.30347 - 0xbfee817bab4cd10d, 0x3fd35410c2e18152, // -0.95331, 0.30201 - 0xbfee8544ddf0d075, 0x3fd33c19b83af207, // -0.95377, 0.30054 - 0xbfee89095bad6025, 0x3fd3241fb638baaf, // -0.95423, 0.29908 - 0xbfee8cc923edc388, 0x3fd30c22c08d6a13, // -0.95469, 0.29762 - 0xbfee9084361df7f3, 0x3fd2f422daec0386, // -0.95514, 0.29615 - 0xbfee943a91aab4b4, 0x3fd2dc200907fe51, // -0.95559, 0.29469 - 0xbfee97ec36016b30, 0x3fd2c41a4e954520, // -0.95605, 0.29322 - 0xbfee9b99229046f8, 0x3fd2ac11af483572, // -0.95649, 0.29175 - 0xbfee9f4156c62dda, 0x3fd294062ed59f05, // -0.95694, 0.29028 - 0xbfeea2e4d212c000, 0x3fd27bf7d0f2c346, // -0.95738, 0.28882 - 0xbfeea68393e65800, 0x3fd263e6995554ba, // -0.95783, 0.28735 - 0xbfeeaa1d9bb20af3, 0x3fd24bd28bb37672, // -0.95827, 0.28588 - 0xbfeeadb2e8e7a88e, 0x3fd233bbabc3bb72, // -0.9587, 0.28441 - 0xbfeeb1437af9bb34, 0x3fd21ba1fd3d2623, // -0.95914, 0.28294 - 0xbfeeb4cf515b8811, 0x3fd2038583d727bd, // -0.95957, 0.28146 - 0xbfeeb8566b810f2a, 0x3fd1eb6643499fbb, // -0.96, 0.27999 - 0xbfeebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // -0.96043, 0.27852 - 0xbfeebf5668eaf2ef, 0x3fd1bb1f7b999480, // -0.96086, 0.27705 - 0xbfeec2cf4b1af6b2, 0x3fd1a2f7fbe8f243, // -0.96128, 0.27557 - 0xbfeec6436ee60309, 0x3fd18acdc3f4873a, // -0.9617, 0.2741 - 0xbfeec9b2d3c3bf84, 0x3fd172a0d7765177, // -0.96212, 0.27262 - 0xbfeecd1d792c8f10, 0x3fd15a713a28b9d9, // -0.96254, 0.27115 - 0xbfeed0835e999009, 0x3fd1423eefc69378, // -0.96295, 0.26967 - 0xbfeed3e483849c51, 0x3fd12a09fc0b1b12, // -0.96337, 0.26819 - 0xbfeed740e7684963, 0x3fd111d262b1f677, // -0.96378, 0.26671 - 0xbfeeda9889bfe86a, 0x3fd0f998277733f7, // -0.96418, 0.26523 - 0xbfeeddeb6a078651, 0x3fd0e15b4e1749cd, // -0.96459, 0.26375 - 0xbfeee13987bbebdc, 0x3fd0c91bda4f158d, // -0.96499, 0.26227 - 0xbfeee482e25a9dbc, 0x3fd0b0d9cfdbdb90, // -0.96539, 0.26079 - 0xbfeee7c77961dc9e, 0x3fd09895327b465e, // -0.96579, 0.25931 - 0xbfeeeb074c50a544, 0x3fd0804e05eb661e, // -0.96619, 0.25783 - 0xbfeeee425aa6b09a, 0x3fd068044deab002, // -0.96658, 0.25635 - 0xbfeef178a3e473c2, 0x3fd04fb80e37fdae, // -0.96698, 0.25487 - 0xbfeef4aa278b2032, 0x3fd037694a928cac, // -0.96737, 0.25338 - 0xbfeef7d6e51ca3c0, 0x3fd01f1806b9fdd2, // -0.96775, 0.2519 - 0xbfeefafedc1ba8b7, 0x3fd006c4466e54af, // -0.96814, 0.25041 - 0xbfeefe220c0b95ec, 0x3fcfdcdc1adfedf8, // -0.96852, 0.24893 - 0xbfef014074708ed3, 0x3fcfac2abeff57ff, // -0.9689, 0.24744 - 0xbfef045a14cf738c, 0x3fcf7b7480bd3801, // -0.96928, 0.24596 - 0xbfef076eecade0fa, 0x3fcf4ab9679c9f5c, // -0.96966, 0.24447 - 0xbfef0a7efb9230d7, 0x3fcf19f97b215f1a, // -0.97003, 0.24298 - 0xbfef0d8a410379c5, 0x3fcee934c2d006c7, // -0.9704, 0.24149 - 0xbfef1090bc898f5f, 0x3fceb86b462de348, // -0.97077, 0.24 - 0xbfef13926dad024e, 0x3fce879d0cc0fdaf, // -0.97114, 0.23851 - 0xbfef168f53f7205d, 0x3fce56ca1e101a1b, // -0.9715, 0.23702 - 0xbfef19876ef1f486, 0x3fce25f281a2b684, // -0.97187, 0.23553 - 0xbfef1c7abe284708, 0x3fcdf5163f01099a, // -0.97223, 0.23404 - 0xbfef1f6941259d7a, 0x3fcdc4355db40195, // -0.97258, 0.23255 - 0xbfef2252f7763ada, 0x3fcd934fe5454311, // -0.97294, 0.23106 - 0xbfef2537e0a71f9f, 0x3fcd6265dd3f27e3, // -0.97329, 0.22957 - 0xbfef2817fc4609ce, 0x3fcd31774d2cbdee, // -0.97364, 0.22807 - 0xbfef2af349e17507, 0x3fcd00843c99c5f9, // -0.97399, 0.22658 - 0xbfef2dc9c9089a9d, 0x3fcccf8cb312b286, // -0.97434, 0.22508 - 0xbfef309b794b719f, 0x3fcc9e90b824a6a9, // -0.97468, 0.22359 - 0xbfef33685a3aaef0, 0x3fcc6d90535d74dc, // -0.97503, 0.22209 - 0xbfef36306b67c556, 0x3fcc3c8b8c4b9dd7, // -0.97536, 0.2206 - 0xbfef38f3ac64e589, 0x3fcc0b826a7e4f63, // -0.9757, 0.2191 - 0xbfef3bb21cc4fe47, 0x3fcbda74f5856330, // -0.97604, 0.2176 - 0xbfef3e6bbc1bbc65, 0x3fcba96334f15dad, // -0.97637, 0.21611 - 0xbfef412089fd8adc, 0x3fcb784d30536cda, // -0.9767, 0.21461 - 0xbfef43d085ff92dd, 0x3fcb4732ef3d6722, // -0.97703, 0.21311 - 0xbfef467bafb7bbe0, 0x3fcb16147941ca2a, // -0.97735, 0.21161 - 0xbfef492206bcabb4, 0x3fcae4f1d5f3b9ab, // -0.97768, 0.21011 - 0xbfef4bc38aa5c694, 0x3fcab3cb0ce6fe44, // -0.978, 0.20861 - 0xbfef4e603b0b2f2d, 0x3fca82a025b00451, // -0.97832, 0.20711 - 0xbfef50f81785c6b9, 0x3fca517127e3dabc, // -0.97863, 0.20561 - 0xbfef538b1faf2d07, 0x3fca203e1b1831da, // -0.97895, 0.20411 - 0xbfef56195321c090, 0x3fc9ef0706e35a35, // -0.97926, 0.20261 - 0xbfef58a2b1789e84, 0x3fc9bdcbf2dc4366, // -0.97957, 0.2011 - 0xbfef5b273a4fa2d9, 0x3fc98c8ce69a7aec, // -0.97988, 0.1996 - 0xbfef5da6ed43685d, 0x3fc95b49e9b62af9, // -0.98018, 0.1981 - 0xbfef6021c9f148c2, 0x3fc92a0303c8194f, // -0.98048, 0.19659 - 0xbfef6297cff75cb0, 0x3fc8f8b83c69a60a, // -0.98079, 0.19509 - 0xbfef6508fef47bd5, 0x3fc8c7699b34ca7e, // -0.98108, 0.19359 - 0xbfef677556883cee, 0x3fc8961727c41804, // -0.98138, 0.19208 - 0xbfef69dcd652f5de, 0x3fc864c0e9b2b6cf, // -0.98167, 0.19057 - 0xbfef6c3f7df5bbb7, 0x3fc83366e89c64c5, // -0.98196, 0.18907 - 0xbfef6e9d4d1262ca, 0x3fc802092c1d744b, // -0.98225, 0.18756 - 0xbfef70f6434b7eb7, 0x3fc7d0a7bbd2cb1b, // -0.98254, 0.18606 - 0xbfef734a60446279, 0x3fc79f429f59e11d, // -0.98282, 0.18455 - 0xbfef7599a3a12077, 0x3fc76dd9de50bf31, // -0.98311, 0.18304 - 0xbfef77e40d068a90, 0x3fc73c6d8055fe0a, // -0.98339, 0.18153 - 0xbfef7a299c1a322a, 0x3fc70afd8d08c4ff, // -0.98366, 0.18002 - 0xbfef7c6a50826840, 0x3fc6d98a0c08c8da, // -0.98394, 0.17851 - 0xbfef7ea629e63d6e, 0x3fc6a81304f64ab2, // -0.98421, 0.177 - 0xbfef80dd27ed8204, 0x3fc676987f7216b8, // -0.98448, 0.17549 - 0xbfef830f4a40c60c, 0x3fc6451a831d830d, // -0.98475, 0.17398 - 0xbfef853c9089595e, 0x3fc61399179a6e94, // -0.98501, 0.17247 - 0xbfef8764fa714ba9, 0x3fc5e214448b3fc6, // -0.98528, 0.17096 - 0xbfef898887a36c84, 0x3fc5b08c1192e381, // -0.98554, 0.16945 - 0xbfef8ba737cb4b78, 0x3fc57f008654cbde, // -0.9858, 0.16794 - 0xbfef8dc10a95380d, 0x3fc54d71aa74ef02, // -0.98605, 0.16643 - 0xbfef8fd5ffae41db, 0x3fc51bdf8597c5f2, // -0.98631, 0.16491 - 0xbfef91e616c43891, 0x3fc4ea4a1f624b61, // -0.98656, 0.1634 - 0xbfef93f14f85ac08, 0x3fc4b8b17f79fa88, // -0.98681, 0.16189 - 0xbfef95f7a9a1ec47, 0x3fc48715ad84cdf5, // -0.98706, 0.16037 - 0xbfef97f924c9099b, 0x3fc45576b1293e5a, // -0.9873, 0.15886 - 0xbfef99f5c0abd496, 0x3fc423d4920e4166, // -0.98754, 0.15734 - 0xbfef9bed7cfbde29, 0x3fc3f22f57db4893, // -0.98778, 0.15583 - 0xbfef9de0596b77a3, 0x3fc3c0870a383ff6, // -0.98802, 0.15431 - 0xbfef9fce55adb2c8, 0x3fc38edbb0cd8d14, // -0.98826, 0.1528 - 0xbfefa1b7717661d5, 0x3fc35d2d53440db2, // -0.98849, 0.15128 - 0xbfefa39bac7a1791, 0x3fc32b7bf94516a7, // -0.98872, 0.14976 - 0xbfefa57b066e2754, 0x3fc2f9c7aa7a72af, // -0.98895, 0.14825 - 0xbfefa7557f08a517, 0x3fc2c8106e8e613a, // -0.98918, 0.14673 - 0xbfefa92b1600657c, 0x3fc296564d2b953e, // -0.9894, 0.14521 - 0xbfefaafbcb0cfddc, 0x3fc264994dfd340a, // -0.98962, 0.1437 - 0xbfefacc79de6c44f, 0x3fc232d978aed413, // -0.98984, 0.14218 - 0xbfefae8e8e46cfbb, 0x3fc20116d4ec7bce, // -0.99006, 0.14066 - 0xbfefb0509be6f7db, 0x3fc1cf516a62a077, // -0.99027, 0.13914 - 0xbfefb20dc681d54d, 0x3fc19d8940be24e7, // -0.99049, 0.13762 - 0xbfefb3c60dd2c199, 0x3fc16bbe5fac5865, // -0.9907, 0.1361 - 0xbfefb5797195d741, 0x3fc139f0cedaf576, // -0.9909, 0.13458 - 0xbfefb727f187f1c7, 0x3fc1082095f820b0, // -0.99111, 0.13306 - 0xbfefb8d18d66adb7, 0x3fc0d64dbcb26786, // -0.99131, 0.13154 - 0xbfefba7644f068b5, 0x3fc0a4784ab8bf1d, // -0.99151, 0.13002 - 0xbfefbc1617e44186, 0x3fc072a047ba831d, // -0.99171, 0.1285 - 0xbfefbdb106021816, 0x3fc040c5bb67747e, // -0.99191, 0.12698 - 0xbfefbf470f0a8d88, 0x3fc00ee8ad6fb85b, // -0.9921, 0.12545 - 0xbfefc0d832bf043a, 0x3fbfba124b07ad85, // -0.99229, 0.12393 - 0xbfefc26470e19fd3, 0x3fbf564e56a9730e, // -0.99248, 0.12241 - 0xbfefc3ebc935454c, 0x3fbef2858d27561b, // -0.99267, 0.12089 - 0xbfefc56e3b7d9af6, 0x3fbe8eb7fde4aa3e, // -0.99285, 0.11937 - 0xbfefc6ebc77f0887, 0x3fbe2ae5b8457f77, // -0.99303, 0.11784 - 0xbfefc8646cfeb721, 0x3fbdc70ecbae9fc8, // -0.99321, 0.11632 - 0xbfefc9d82bc2915e, 0x3fbd633347858ce4, // -0.99339, 0.11479 - 0xbfefcb4703914354, 0x3fbcff533b307dc1, // -0.99356, 0.11327 - 0xbfefccb0f4323aa3, 0x3fbc9b6eb6165c42, // -0.99374, 0.11175 - 0xbfefce15fd6da67b, 0x3fbc3785c79ec2d5, // -0.99391, 0.11022 - 0xbfefcf761f0c77a3, 0x3fbbd3987f31fa0e, // -0.99407, 0.1087 - 0xbfefd0d158d86087, 0x3fbb6fa6ec38f64c, // -0.99424, 0.10717 - 0xbfefd227aa9bd53b, 0x3fbb0bb11e1d5559, // -0.9944, 0.10565 - 0xbfefd37914220b84, 0x3fbaa7b724495c04, // -0.99456, 0.10412 - 0xbfefd4c59536fae4, 0x3fba43b90e27f3c4, // -0.99472, 0.1026 - 0xbfefd60d2da75c9e, 0x3fb9dfb6eb24a85c, // -0.99488, 0.10107 - 0xbfefd74fdd40abbf, 0x3fb97bb0caaba56f, // -0.99503, 0.099544 - 0xbfefd88da3d12526, 0x3fb917a6bc29b42c, // -0.99518, 0.098017 - 0xbfefd9c68127c78c, 0x3fb8b398cf0c38e0, // -0.99533, 0.09649 - 0xbfefdafa7514538c, 0x3fb84f8712c130a0, // -0.99548, 0.094963 - 0xbfefdc297f674ba9, 0x3fb7eb7196b72ee4, // -0.99563, 0.093436 - 0xbfefdd539ff1f456, 0x3fb787586a5d5b21, // -0.99577, 0.091909 - 0xbfefde78d68653fd, 0x3fb7233b9d236e71, // -0.99591, 0.090381 - 0xbfefdf9922f73307, 0x3fb6bf1b3e79b129, // -0.99604, 0.088854 - 0xbfefe0b485181be3, 0x3fb65af75dd0f87b, // -0.99618, 0.087326 - 0xbfefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // -0.99631, 0.085797 - 0xbfefe2dc89bbff08, 0x3fb592a554489bc8, // -0.99644, 0.084269 - 0xbfefe3e92be9d886, 0x3fb52e774a4d4d0a, // -0.99657, 0.08274 - 0xbfefe4f0e31d7a4a, 0x3fb4ca45fc1ba8b6, // -0.9967, 0.081211 - 0xbfefe5f3af2e3940, 0x3fb4661179272096, // -0.99682, 0.079682 - 0xbfefe6f18ff42c84, 0x3fb401d9d0e3a507, // -0.99694, 0.078153 - 0xbfefe7ea85482d60, 0x3fb39d9f12c5a299, // -0.99706, 0.076624 - 0xbfefe8de8f03d75c, 0x3fb339614e41ffa5, // -0.99718, 0.075094 - 0xbfefe9cdad01883a, 0x3fb2d52092ce19f6, // -0.99729, 0.073565 - 0xbfefeab7df1c6005, 0x3fb270dcefdfc45b, // -0.9974, 0.072035 - 0xbfefeb9d2530410f, 0x3fb20c9674ed444c, // -0.99751, 0.070505 - 0xbfefec7d7f19cffc, 0x3fb1a84d316d4f8a, // -0.99762, 0.068974 - 0xbfefed58ecb673c4, 0x3fb1440134d709b2, // -0.99772, 0.067444 - 0xbfefee2f6de455ba, 0x3fb0dfb28ea201e6, // -0.99783, 0.065913 - 0xbfefef0102826191, 0x3fb07b614e463064, // -0.99793, 0.064383 - 0xbfefefcdaa704562, 0x3fb0170d833bf421, // -0.99802, 0.062852 - 0xbfeff095658e71ad, 0x3faf656e79f820e0, // -0.99812, 0.061321 - 0xbfeff15833be1965, 0x3fae9cbd15ff5527, // -0.99821, 0.05979 - 0xbfeff21614e131ed, 0x3fadd406f9808ec8, // -0.9983, 0.058258 - 0xbfeff2cf08da7321, 0x3fad0b4c436f91d0, // -0.99839, 0.056727 - 0xbfeff3830f8d575c, 0x3fac428d12c0d7e3, // -0.99848, 0.055195 - 0xbfeff43228de1b77, 0x3fab79c986698b78, // -0.99856, 0.053664 - 0xbfeff4dc54b1bed3, 0x3faab101bd5f8317, // -0.99864, 0.052132 - 0xbfeff58192ee0358, 0x3fa9e835d6993c87, // -0.99872, 0.0506 - 0xbfeff621e3796d7e, 0x3fa91f65f10dd814, // -0.9988, 0.049068 - 0xbfeff6bd463b444d, 0x3fa856922bb513c1, // -0.99887, 0.047535 - 0xbfeff753bb1b9164, 0x3fa78dbaa5874685, // -0.99894, 0.046003 - 0xbfeff7e5420320f9, 0x3fa6c4df7d7d5b84, // -0.99901, 0.044471 - 0xbfeff871dadb81df, 0x3fa5fc00d290cd43, // -0.99908, 0.042938 - 0xbfeff8f9858f058b, 0x3fa5331ec3bba0eb, // -0.99914, 0.041406 - 0xbfeff97c4208c014, 0x3fa46a396ff86179, // -0.9992, 0.039873 - 0xbfeff9fa10348837, 0x3fa3a150f6421afc, // -0.99926, 0.03834 - 0xbfeffa72effef75d, 0x3fa2d865759455cd, // -0.99932, 0.036807 - 0xbfeffae6e1556998, 0x3fa20f770ceb11c6, // -0.99938, 0.035274 - 0xbfeffb55e425fdae, 0x3fa14685db42c17e, // -0.99943, 0.033741 - 0xbfeffbbff85f9515, 0x3fa07d91ff984580, // -0.99948, 0.032208 - 0xbfeffc251df1d3f8, 0x3f9f693731d1cf01, // -0.99953, 0.030675 - 0xbfeffc8554cd213a, 0x3f9dd7458c64ab39, // -0.99958, 0.029142 - 0xbfeffce09ce2a679, 0x3f9c454f4ce53b1c, // -0.99962, 0.027608 - 0xbfeffd36f624500c, 0x3f9ab354b1504fca, // -0.99966, 0.026075 - 0xbfeffd886084cd0d, 0x3f992155f7a3667e, // -0.9997, 0.024541 - 0xbfeffdd4dbf78f52, 0x3f978f535ddc9f03, // -0.99974, 0.023008 - 0xbfeffe1c6870cb77, 0x3f95fd4d21fab226, // -0.99977, 0.021474 - 0xbfeffe5f05e578db, 0x3f946b4381fce81c, // -0.9998, 0.01994 - 0xbfeffe9cb44b51a1, 0x3f92d936bbe30efd, // -0.99983, 0.018407 - 0xbfeffed57398d2b7, 0x3f9147270dad7132, // -0.99986, 0.016873 - 0xbfefff0943c53bd1, 0x3f8f6a296ab997ca, // -0.99988, 0.015339 - 0xbfefff3824c88f6f, 0x3f8c45ffe1e48ad9, // -0.9999, 0.013805 - 0xbfefff62169b92db, 0x3f8921d1fcdec784, // -0.99992, 0.012272 - 0xbfefff871937ce2f, 0x3f85fda037ac05e0, // -0.99994, 0.010738 - 0xbfefffa72c978c4f, 0x3f82d96b0e509703, // -0.99996, 0.0092038 - 0xbfefffc250b5daef, 0x3f7f6a65f9a2a3c5, // -0.99997, 0.0076698 - 0xbfefffd8858e8a92, 0x3f7921f0fe670071, // -0.99998, 0.0061359 - 0xbfefffe9cb1e2e8d, 0x3f72d97822f996bc, // -0.99999, 0.0046019 - 0xbfeffff621621d02, 0x3f6921f8becca4ba, // -1, 0.003068 - 0xbfeffffd88586ee6, 0x3f5921faaee6472d, // -1, 0.001534 - 0xbff0000000000000, 0x0000000000000000, // -1, 0 - 0xbfeffffd88586ee6, 0xbf5921faaee6472d, // -1, -0.001534 - 0xbfeffff621621d02, 0xbf6921f8becca4ba, // -1, -0.003068 - 0xbfefffe9cb1e2e8d, 0xbf72d97822f996bc, // -0.99999,-0.0046019 - 0xbfefffd8858e8a92, 0xbf7921f0fe670071, // -0.99998,-0.0061359 - 0xbfefffc250b5daef, 0xbf7f6a65f9a2a3c5, // -0.99997,-0.0076698 - 0xbfefffa72c978c4f, 0xbf82d96b0e509703, // -0.99996,-0.0092038 - 0xbfefff871937ce2f, 0xbf85fda037ac05e0, // -0.99994, -0.010738 - 0xbfefff62169b92db, 0xbf8921d1fcdec784, // -0.99992, -0.012272 - 0xbfefff3824c88f6f, 0xbf8c45ffe1e48ad9, // -0.9999, -0.013805 - 0xbfefff0943c53bd1, 0xbf8f6a296ab997ca, // -0.99988, -0.015339 - 0xbfeffed57398d2b7, 0xbf9147270dad7132, // -0.99986, -0.016873 - 0xbfeffe9cb44b51a1, 0xbf92d936bbe30efd, // -0.99983, -0.018407 - 0xbfeffe5f05e578db, 0xbf946b4381fce81c, // -0.9998, -0.01994 - 0xbfeffe1c6870cb77, 0xbf95fd4d21fab226, // -0.99977, -0.021474 - 0xbfeffdd4dbf78f52, 0xbf978f535ddc9f03, // -0.99974, -0.023008 - 0xbfeffd886084cd0d, 0xbf992155f7a3667e, // -0.9997, -0.024541 - 0xbfeffd36f624500c, 0xbf9ab354b1504fca, // -0.99966, -0.026075 - 0xbfeffce09ce2a679, 0xbf9c454f4ce53b1c, // -0.99962, -0.027608 - 0xbfeffc8554cd213a, 0xbf9dd7458c64ab39, // -0.99958, -0.029142 - 0xbfeffc251df1d3f8, 0xbf9f693731d1cf01, // -0.99953, -0.030675 - 0xbfeffbbff85f9515, 0xbfa07d91ff984580, // -0.99948, -0.032208 - 0xbfeffb55e425fdae, 0xbfa14685db42c17e, // -0.99943, -0.033741 - 0xbfeffae6e1556998, 0xbfa20f770ceb11c6, // -0.99938, -0.035274 - 0xbfeffa72effef75d, 0xbfa2d865759455cd, // -0.99932, -0.036807 - 0xbfeff9fa10348837, 0xbfa3a150f6421afc, // -0.99926, -0.03834 - 0xbfeff97c4208c014, 0xbfa46a396ff86179, // -0.9992, -0.039873 - 0xbfeff8f9858f058b, 0xbfa5331ec3bba0eb, // -0.99914, -0.041406 - 0xbfeff871dadb81df, 0xbfa5fc00d290cd43, // -0.99908, -0.042938 - 0xbfeff7e5420320f9, 0xbfa6c4df7d7d5b84, // -0.99901, -0.044471 - 0xbfeff753bb1b9164, 0xbfa78dbaa5874685, // -0.99894, -0.046003 - 0xbfeff6bd463b444d, 0xbfa856922bb513c1, // -0.99887, -0.047535 - 0xbfeff621e3796d7e, 0xbfa91f65f10dd814, // -0.9988, -0.049068 - 0xbfeff58192ee0358, 0xbfa9e835d6993c87, // -0.99872, -0.0506 - 0xbfeff4dc54b1bed3, 0xbfaab101bd5f8317, // -0.99864, -0.052132 - 0xbfeff43228de1b77, 0xbfab79c986698b78, // -0.99856, -0.053664 - 0xbfeff3830f8d575c, 0xbfac428d12c0d7e3, // -0.99848, -0.055195 - 0xbfeff2cf08da7321, 0xbfad0b4c436f91d0, // -0.99839, -0.056727 - 0xbfeff21614e131ed, 0xbfadd406f9808ec8, // -0.9983, -0.058258 - 0xbfeff15833be1965, 0xbfae9cbd15ff5527, // -0.99821, -0.05979 - 0xbfeff095658e71ad, 0xbfaf656e79f820e0, // -0.99812, -0.061321 - 0xbfefefcdaa704562, 0xbfb0170d833bf421, // -0.99802, -0.062852 - 0xbfefef0102826191, 0xbfb07b614e463064, // -0.99793, -0.064383 - 0xbfefee2f6de455ba, 0xbfb0dfb28ea201e6, // -0.99783, -0.065913 - 0xbfefed58ecb673c4, 0xbfb1440134d709b2, // -0.99772, -0.067444 - 0xbfefec7d7f19cffc, 0xbfb1a84d316d4f8a, // -0.99762, -0.068974 - 0xbfefeb9d2530410f, 0xbfb20c9674ed444c, // -0.99751, -0.070505 - 0xbfefeab7df1c6005, 0xbfb270dcefdfc45b, // -0.9974, -0.072035 - 0xbfefe9cdad01883a, 0xbfb2d52092ce19f6, // -0.99729, -0.073565 - 0xbfefe8de8f03d75c, 0xbfb339614e41ffa5, // -0.99718, -0.075094 - 0xbfefe7ea85482d60, 0xbfb39d9f12c5a299, // -0.99706, -0.076624 - 0xbfefe6f18ff42c84, 0xbfb401d9d0e3a507, // -0.99694, -0.078153 - 0xbfefe5f3af2e3940, 0xbfb4661179272096, // -0.99682, -0.079682 - 0xbfefe4f0e31d7a4a, 0xbfb4ca45fc1ba8b6, // -0.9967, -0.081211 - 0xbfefe3e92be9d886, 0xbfb52e774a4d4d0a, // -0.99657, -0.08274 - 0xbfefe2dc89bbff08, 0xbfb592a554489bc8, // -0.99644, -0.084269 - 0xbfefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // -0.99631, -0.085797 - 0xbfefe0b485181be3, 0xbfb65af75dd0f87b, // -0.99618, -0.087326 - 0xbfefdf9922f73307, 0xbfb6bf1b3e79b129, // -0.99604, -0.088854 - 0xbfefde78d68653fd, 0xbfb7233b9d236e71, // -0.99591, -0.090381 - 0xbfefdd539ff1f456, 0xbfb787586a5d5b21, // -0.99577, -0.091909 - 0xbfefdc297f674ba9, 0xbfb7eb7196b72ee4, // -0.99563, -0.093436 - 0xbfefdafa7514538c, 0xbfb84f8712c130a0, // -0.99548, -0.094963 - 0xbfefd9c68127c78c, 0xbfb8b398cf0c38e0, // -0.99533, -0.09649 - 0xbfefd88da3d12526, 0xbfb917a6bc29b42c, // -0.99518, -0.098017 - 0xbfefd74fdd40abbf, 0xbfb97bb0caaba56f, // -0.99503, -0.099544 - 0xbfefd60d2da75c9e, 0xbfb9dfb6eb24a85c, // -0.99488, -0.10107 - 0xbfefd4c59536fae4, 0xbfba43b90e27f3c4, // -0.99472, -0.1026 - 0xbfefd37914220b84, 0xbfbaa7b724495c04, // -0.99456, -0.10412 - 0xbfefd227aa9bd53b, 0xbfbb0bb11e1d5559, // -0.9944, -0.10565 - 0xbfefd0d158d86087, 0xbfbb6fa6ec38f64c, // -0.99424, -0.10717 - 0xbfefcf761f0c77a3, 0xbfbbd3987f31fa0e, // -0.99407, -0.1087 - 0xbfefce15fd6da67b, 0xbfbc3785c79ec2d5, // -0.99391, -0.11022 - 0xbfefccb0f4323aa3, 0xbfbc9b6eb6165c42, // -0.99374, -0.11175 - 0xbfefcb4703914354, 0xbfbcff533b307dc1, // -0.99356, -0.11327 - 0xbfefc9d82bc2915e, 0xbfbd633347858ce4, // -0.99339, -0.11479 - 0xbfefc8646cfeb721, 0xbfbdc70ecbae9fc8, // -0.99321, -0.11632 - 0xbfefc6ebc77f0887, 0xbfbe2ae5b8457f77, // -0.99303, -0.11784 - 0xbfefc56e3b7d9af6, 0xbfbe8eb7fde4aa3e, // -0.99285, -0.11937 - 0xbfefc3ebc935454c, 0xbfbef2858d27561b, // -0.99267, -0.12089 - 0xbfefc26470e19fd3, 0xbfbf564e56a9730e, // -0.99248, -0.12241 - 0xbfefc0d832bf043a, 0xbfbfba124b07ad85, // -0.99229, -0.12393 - 0xbfefbf470f0a8d88, 0xbfc00ee8ad6fb85b, // -0.9921, -0.12545 - 0xbfefbdb106021816, 0xbfc040c5bb67747e, // -0.99191, -0.12698 - 0xbfefbc1617e44186, 0xbfc072a047ba831d, // -0.99171, -0.1285 - 0xbfefba7644f068b5, 0xbfc0a4784ab8bf1d, // -0.99151, -0.13002 - 0xbfefb8d18d66adb7, 0xbfc0d64dbcb26786, // -0.99131, -0.13154 - 0xbfefb727f187f1c7, 0xbfc1082095f820b0, // -0.99111, -0.13306 - 0xbfefb5797195d741, 0xbfc139f0cedaf576, // -0.9909, -0.13458 - 0xbfefb3c60dd2c199, 0xbfc16bbe5fac5865, // -0.9907, -0.1361 - 0xbfefb20dc681d54d, 0xbfc19d8940be24e7, // -0.99049, -0.13762 - 0xbfefb0509be6f7db, 0xbfc1cf516a62a077, // -0.99027, -0.13914 - 0xbfefae8e8e46cfbb, 0xbfc20116d4ec7bce, // -0.99006, -0.14066 - 0xbfefacc79de6c44f, 0xbfc232d978aed413, // -0.98984, -0.14218 - 0xbfefaafbcb0cfddc, 0xbfc264994dfd340a, // -0.98962, -0.1437 - 0xbfefa92b1600657c, 0xbfc296564d2b953e, // -0.9894, -0.14521 - 0xbfefa7557f08a517, 0xbfc2c8106e8e613a, // -0.98918, -0.14673 - 0xbfefa57b066e2754, 0xbfc2f9c7aa7a72af, // -0.98895, -0.14825 - 0xbfefa39bac7a1791, 0xbfc32b7bf94516a7, // -0.98872, -0.14976 - 0xbfefa1b7717661d5, 0xbfc35d2d53440db2, // -0.98849, -0.15128 - 0xbfef9fce55adb2c8, 0xbfc38edbb0cd8d14, // -0.98826, -0.1528 - 0xbfef9de0596b77a3, 0xbfc3c0870a383ff6, // -0.98802, -0.15431 - 0xbfef9bed7cfbde29, 0xbfc3f22f57db4893, // -0.98778, -0.15583 - 0xbfef99f5c0abd496, 0xbfc423d4920e4166, // -0.98754, -0.15734 - 0xbfef97f924c9099b, 0xbfc45576b1293e5a, // -0.9873, -0.15886 - 0xbfef95f7a9a1ec47, 0xbfc48715ad84cdf5, // -0.98706, -0.16037 - 0xbfef93f14f85ac08, 0xbfc4b8b17f79fa88, // -0.98681, -0.16189 - 0xbfef91e616c43891, 0xbfc4ea4a1f624b61, // -0.98656, -0.1634 - 0xbfef8fd5ffae41db, 0xbfc51bdf8597c5f2, // -0.98631, -0.16491 - 0xbfef8dc10a95380d, 0xbfc54d71aa74ef02, // -0.98605, -0.16643 - 0xbfef8ba737cb4b78, 0xbfc57f008654cbde, // -0.9858, -0.16794 - 0xbfef898887a36c84, 0xbfc5b08c1192e381, // -0.98554, -0.16945 - 0xbfef8764fa714ba9, 0xbfc5e214448b3fc6, // -0.98528, -0.17096 - 0xbfef853c9089595e, 0xbfc61399179a6e94, // -0.98501, -0.17247 - 0xbfef830f4a40c60c, 0xbfc6451a831d830d, // -0.98475, -0.17398 - 0xbfef80dd27ed8204, 0xbfc676987f7216b8, // -0.98448, -0.17549 - 0xbfef7ea629e63d6e, 0xbfc6a81304f64ab2, // -0.98421, -0.177 - 0xbfef7c6a50826840, 0xbfc6d98a0c08c8da, // -0.98394, -0.17851 - 0xbfef7a299c1a322a, 0xbfc70afd8d08c4ff, // -0.98366, -0.18002 - 0xbfef77e40d068a90, 0xbfc73c6d8055fe0a, // -0.98339, -0.18153 - 0xbfef7599a3a12077, 0xbfc76dd9de50bf31, // -0.98311, -0.18304 - 0xbfef734a60446279, 0xbfc79f429f59e11d, // -0.98282, -0.18455 - 0xbfef70f6434b7eb7, 0xbfc7d0a7bbd2cb1b, // -0.98254, -0.18606 - 0xbfef6e9d4d1262ca, 0xbfc802092c1d744b, // -0.98225, -0.18756 - 0xbfef6c3f7df5bbb7, 0xbfc83366e89c64c5, // -0.98196, -0.18907 - 0xbfef69dcd652f5de, 0xbfc864c0e9b2b6cf, // -0.98167, -0.19057 - 0xbfef677556883cee, 0xbfc8961727c41804, // -0.98138, -0.19208 - 0xbfef6508fef47bd5, 0xbfc8c7699b34ca7e, // -0.98108, -0.19359 - 0xbfef6297cff75cb0, 0xbfc8f8b83c69a60a, // -0.98079, -0.19509 - 0xbfef6021c9f148c2, 0xbfc92a0303c8194f, // -0.98048, -0.19659 - 0xbfef5da6ed43685d, 0xbfc95b49e9b62af9, // -0.98018, -0.1981 - 0xbfef5b273a4fa2d9, 0xbfc98c8ce69a7aec, // -0.97988, -0.1996 - 0xbfef58a2b1789e84, 0xbfc9bdcbf2dc4366, // -0.97957, -0.2011 - 0xbfef56195321c090, 0xbfc9ef0706e35a35, // -0.97926, -0.20261 - 0xbfef538b1faf2d07, 0xbfca203e1b1831da, // -0.97895, -0.20411 - 0xbfef50f81785c6b9, 0xbfca517127e3dabc, // -0.97863, -0.20561 - 0xbfef4e603b0b2f2d, 0xbfca82a025b00451, // -0.97832, -0.20711 - 0xbfef4bc38aa5c694, 0xbfcab3cb0ce6fe44, // -0.978, -0.20861 - 0xbfef492206bcabb4, 0xbfcae4f1d5f3b9ab, // -0.97768, -0.21011 - 0xbfef467bafb7bbe0, 0xbfcb16147941ca2a, // -0.97735, -0.21161 - 0xbfef43d085ff92dd, 0xbfcb4732ef3d6722, // -0.97703, -0.21311 - 0xbfef412089fd8adc, 0xbfcb784d30536cda, // -0.9767, -0.21461 - 0xbfef3e6bbc1bbc65, 0xbfcba96334f15dad, // -0.97637, -0.21611 - 0xbfef3bb21cc4fe47, 0xbfcbda74f5856330, // -0.97604, -0.2176 - 0xbfef38f3ac64e589, 0xbfcc0b826a7e4f63, // -0.9757, -0.2191 - 0xbfef36306b67c556, 0xbfcc3c8b8c4b9dd7, // -0.97536, -0.2206 - 0xbfef33685a3aaef0, 0xbfcc6d90535d74dc, // -0.97503, -0.22209 - 0xbfef309b794b719f, 0xbfcc9e90b824a6a9, // -0.97468, -0.22359 - 0xbfef2dc9c9089a9d, 0xbfcccf8cb312b286, // -0.97434, -0.22508 - 0xbfef2af349e17507, 0xbfcd00843c99c5f9, // -0.97399, -0.22658 - 0xbfef2817fc4609ce, 0xbfcd31774d2cbdee, // -0.97364, -0.22807 - 0xbfef2537e0a71f9f, 0xbfcd6265dd3f27e3, // -0.97329, -0.22957 - 0xbfef2252f7763ada, 0xbfcd934fe5454311, // -0.97294, -0.23106 - 0xbfef1f6941259d7a, 0xbfcdc4355db40195, // -0.97258, -0.23255 - 0xbfef1c7abe284708, 0xbfcdf5163f01099a, // -0.97223, -0.23404 - 0xbfef19876ef1f486, 0xbfce25f281a2b684, // -0.97187, -0.23553 - 0xbfef168f53f7205d, 0xbfce56ca1e101a1b, // -0.9715, -0.23702 - 0xbfef13926dad024e, 0xbfce879d0cc0fdaf, // -0.97114, -0.23851 - 0xbfef1090bc898f5f, 0xbfceb86b462de348, // -0.97077, -0.24 - 0xbfef0d8a410379c5, 0xbfcee934c2d006c7, // -0.9704, -0.24149 - 0xbfef0a7efb9230d7, 0xbfcf19f97b215f1a, // -0.97003, -0.24298 - 0xbfef076eecade0fa, 0xbfcf4ab9679c9f5c, // -0.96966, -0.24447 - 0xbfef045a14cf738c, 0xbfcf7b7480bd3801, // -0.96928, -0.24596 - 0xbfef014074708ed3, 0xbfcfac2abeff57ff, // -0.9689, -0.24744 - 0xbfeefe220c0b95ec, 0xbfcfdcdc1adfedf8, // -0.96852, -0.24893 - 0xbfeefafedc1ba8b7, 0xbfd006c4466e54af, // -0.96814, -0.25041 - 0xbfeef7d6e51ca3c0, 0xbfd01f1806b9fdd2, // -0.96775, -0.2519 - 0xbfeef4aa278b2032, 0xbfd037694a928cac, // -0.96737, -0.25338 - 0xbfeef178a3e473c2, 0xbfd04fb80e37fdae, // -0.96698, -0.25487 - 0xbfeeee425aa6b09a, 0xbfd068044deab002, // -0.96658, -0.25635 - 0xbfeeeb074c50a544, 0xbfd0804e05eb661e, // -0.96619, -0.25783 - 0xbfeee7c77961dc9e, 0xbfd09895327b465e, // -0.96579, -0.25931 - 0xbfeee482e25a9dbc, 0xbfd0b0d9cfdbdb90, // -0.96539, -0.26079 - 0xbfeee13987bbebdc, 0xbfd0c91bda4f158d, // -0.96499, -0.26227 - 0xbfeeddeb6a078651, 0xbfd0e15b4e1749cd, // -0.96459, -0.26375 - 0xbfeeda9889bfe86a, 0xbfd0f998277733f7, // -0.96418, -0.26523 - 0xbfeed740e7684963, 0xbfd111d262b1f677, // -0.96378, -0.26671 - 0xbfeed3e483849c51, 0xbfd12a09fc0b1b12, // -0.96337, -0.26819 - 0xbfeed0835e999009, 0xbfd1423eefc69378, // -0.96295, -0.26967 - 0xbfeecd1d792c8f10, 0xbfd15a713a28b9d9, // -0.96254, -0.27115 - 0xbfeec9b2d3c3bf84, 0xbfd172a0d7765177, // -0.96212, -0.27262 - 0xbfeec6436ee60309, 0xbfd18acdc3f4873a, // -0.9617, -0.2741 - 0xbfeec2cf4b1af6b2, 0xbfd1a2f7fbe8f243, // -0.96128, -0.27557 - 0xbfeebf5668eaf2ef, 0xbfd1bb1f7b999480, // -0.96086, -0.27705 - 0xbfeebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // -0.96043, -0.27852 - 0xbfeeb8566b810f2a, 0xbfd1eb6643499fbb, // -0.96, -0.27999 - 0xbfeeb4cf515b8811, 0xbfd2038583d727bd, // -0.95957, -0.28146 - 0xbfeeb1437af9bb34, 0xbfd21ba1fd3d2623, // -0.95914, -0.28294 - 0xbfeeadb2e8e7a88e, 0xbfd233bbabc3bb72, // -0.9587, -0.28441 - 0xbfeeaa1d9bb20af3, 0xbfd24bd28bb37672, // -0.95827, -0.28588 - 0xbfeea68393e65800, 0xbfd263e6995554ba, // -0.95783, -0.28735 - 0xbfeea2e4d212c000, 0xbfd27bf7d0f2c346, // -0.95738, -0.28882 - 0xbfee9f4156c62dda, 0xbfd294062ed59f05, // -0.95694, -0.29028 - 0xbfee9b99229046f8, 0xbfd2ac11af483572, // -0.95649, -0.29175 - 0xbfee97ec36016b30, 0xbfd2c41a4e954520, // -0.95605, -0.29322 - 0xbfee943a91aab4b4, 0xbfd2dc200907fe51, // -0.95559, -0.29469 - 0xbfee9084361df7f3, 0xbfd2f422daec0386, // -0.95514, -0.29615 - 0xbfee8cc923edc388, 0xbfd30c22c08d6a13, // -0.95469, -0.29762 - 0xbfee89095bad6025, 0xbfd3241fb638baaf, // -0.95423, -0.29908 - 0xbfee8544ddf0d075, 0xbfd33c19b83af207, // -0.95377, -0.30054 - 0xbfee817bab4cd10d, 0xbfd35410c2e18152, // -0.95331, -0.30201 - 0xbfee7dadc456d850, 0xbfd36c04d27a4edf, // -0.95284, -0.30347 - 0xbfee79db29a5165a, 0xbfd383f5e353b6aa, // -0.95238, -0.30493 - 0xbfee7603dbce74e9, 0xbfd39be3f1bc8aef, // -0.95191, -0.30639 - 0xbfee7227db6a9744, 0xbfd3b3cefa0414b7, // -0.95144, -0.30785 - 0xbfee6e472911da27, 0xbfd3cbb6f87a146e, // -0.95096, -0.30931 - 0xbfee6a61c55d53a7, 0xbfd3e39be96ec271, // -0.95049, -0.31077 - 0xbfee6677b0e6d31e, 0xbfd3fb7dc932cfa4, // -0.95001, -0.31222 - 0xbfee6288ec48e112, 0xbfd4135c94176602, // -0.94953, -0.31368 - 0xbfee5e95781ebf1c, 0xbfd42b38466e2928, // -0.94905, -0.31514 - 0xbfee5a9d550467d3, 0xbfd44310dc8936f0, // -0.94856, -0.31659 - 0xbfee56a083968eb1, 0xbfd45ae652bb2800, // -0.94807, -0.31805 - 0xbfee529f04729ffc, 0xbfd472b8a5571054, // -0.94759, -0.3195 - 0xbfee4e98d836c0af, 0xbfd48a87d0b07fd7, // -0.94709, -0.32096 - 0xbfee4a8dff81ce5e, 0xbfd4a253d11b82f3, // -0.9466, -0.32241 - 0xbfee467e7af35f23, 0xbfd4ba1ca2eca31c, // -0.94611, -0.32386 - 0xbfee426a4b2bc17e, 0xbfd4d1e24278e76a, // -0.94561, -0.32531 - 0xbfee3e5170cbfc46, 0xbfd4e9a4ac15d520, // -0.94511, -0.32676 - 0xbfee3a33ec75ce85, 0xbfd50163dc197047, // -0.9446, -0.32821 - 0xbfee3611becbaf69, 0xbfd5191fceda3c35, // -0.9441, -0.32966 - 0xbfee31eae870ce25, 0xbfd530d880af3c24, // -0.94359, -0.33111 - 0xbfee2dbf6a0911d9, 0xbfd5488dedeff3be, // -0.94308, -0.33255 - 0xbfee298f4439197a, 0xbfd5604012f467b4, // -0.94257, -0.334 - 0xbfee255a77a63bb8, 0xbfd577eeec151e47, // -0.94206, -0.33545 - 0xbfee212104f686e5, 0xbfd58f9a75ab1fdd, // -0.94154, -0.33689 - 0xbfee1ce2ecd0c0d8, 0xbfd5a742ac0ff78d, // -0.94103, -0.33833 - 0xbfee18a02fdc66d9, 0xbfd5bee78b9db3b6, // -0.94051, -0.33978 - 0xbfee1458cec1ad83, 0xbfd5d68910aee686, // -0.93998, -0.34122 - 0xbfee100cca2980ac, 0xbfd5ee27379ea693, // -0.93946, -0.34266 - 0xbfee0bbc22bd8349, 0xbfd605c1fcc88f63, // -0.93893, -0.3441 - 0xbfee0766d9280f54, 0xbfd61d595c88c203, // -0.9384, -0.34554 - 0xbfee030cee1435b8, 0xbfd634ed533be58e, // -0.93787, -0.34698 - 0xbfedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // -0.93734, -0.34842 - 0xbfedfa4b3621271d, 0xbfd6640af6f03d9e, // -0.9368, -0.34986 - 0xbfedf5e36a9ba59c, 0xbfd67b949cad63ca, // -0.93627, -0.35129 - 0xbfedf177004b2534, 0xbfd6931acad55f51, // -0.93573, -0.35273 - 0xbfeded05f7de47da, 0xbfd6aa9d7dc77e16, // -0.93518, -0.35416 - 0xbfede890520465ce, 0xbfd6c21cb1e39771, // -0.93464, -0.3556 - 0xbfede4160f6d8d81, 0xbfd6d998638a0cb5, // -0.93409, -0.35703 - 0xbfeddf9730ca837b, 0xbfd6f1108f1bc9c5, // -0.93354, -0.35846 - 0xbfeddb13b6ccc23d, 0xbfd7088530fa459e, // -0.93299, -0.3599 - 0xbfedd68ba2267a25, 0xbfd71ff6458782ec, // -0.93244, -0.36133 - 0xbfedd1fef38a915a, 0xbfd73763c9261092, // -0.93188, -0.36276 - 0xbfedcd6dabaca3a5, 0xbfd74ecdb8390a3e, // -0.93133, -0.36418 - 0xbfedc8d7cb410260, 0xbfd766340f2418f6, // -0.93077, -0.36561 - 0xbfedc43d52fcb453, 0xbfd77d96ca4b73a6, // -0.93021, -0.36704 - 0xbfedbf9e4395759a, 0xbfd794f5e613dfae, // -0.92964, -0.36847 - 0xbfedbafa9dc1b78d, 0xbfd7ac515ee2b172, // -0.92907, -0.36989 - 0xbfedb6526238a09b, 0xbfd7c3a9311dcce7, // -0.92851, -0.37132 - 0xbfedb1a591b20c38, 0xbfd7dafd592ba621, // -0.92794, -0.37274 - 0xbfedacf42ce68ab9, 0xbfd7f24dd37341e3, // -0.92736, -0.37416 - 0xbfeda83e348f613b, 0xbfd8099a9c5c362d, // -0.92679, -0.37559 - 0xbfeda383a9668988, 0xbfd820e3b04eaac4, // -0.92621, -0.37701 - 0xbfed9ec48c26b1f3, 0xbfd838290bb359c8, // -0.92563, -0.37843 - 0xbfed9a00dd8b3d46, 0xbfd84f6aaaf3903f, // -0.92505, -0.37985 - 0xbfed95389e50429b, 0xbfd866a88a792ea0, // -0.92447, -0.38127 - 0xbfed906bcf328d46, 0xbfd87de2a6aea963, // -0.92388, -0.38268 - 0xbfed8b9a70ef9cb4, 0xbfd89518fbff098e, // -0.92329, -0.3841 - 0xbfed86c48445a450, 0xbfd8ac4b86d5ed44, // -0.9227, -0.38552 - 0xbfed81ea09f38b63, 0xbfd8c37a439f884f, // -0.92211, -0.38693 - 0xbfed7d0b02b8ecf9, 0xbfd8daa52ec8a4af, // -0.92151, -0.38835 - 0xbfed78276f5617c6, 0xbfd8f1cc44bea329, // -0.92092, -0.38976 - 0xbfed733f508c0dff, 0xbfd908ef81ef7bd1, // -0.92032, -0.39117 - 0xbfed6e52a71c8547, 0xbfd9200ee2c9be97, // -0.91972, -0.39258 - 0xbfed696173c9e68b, 0xbfd9372a63bc93d7, // -0.91911, -0.39399 - 0xbfed646bb7574de5, 0xbfd94e420137bce3, // -0.91851, -0.3954 - 0xbfed5f7172888a7f, 0xbfd96555b7ab948f, // -0.9179, -0.39681 - 0xbfed5a72a6221e73, 0xbfd97c6583890fc2, // -0.91729, -0.39822 - 0xbfed556f52e93eb1, 0xbfd993716141bdfe, // -0.91668, -0.39962 - 0xbfed506779a3d2d9, 0xbfd9aa794d47c9ee, // -0.91606, -0.40103 - 0xbfed4b5b1b187524, 0xbfd9c17d440df9f2, // -0.91545, -0.40243 - 0xbfed464a380e7242, 0xbfd9d87d4207b0ab, // -0.91483, -0.40384 - 0xbfed4134d14dc93a, 0xbfd9ef7943a8ed8a, // -0.91421, -0.40524 - 0xbfed3c1ae79f2b4e, 0xbfda067145664d57, // -0.91359, -0.40664 - 0xbfed36fc7bcbfbdc, 0xbfda1d6543b50ac0, // -0.91296, -0.40804 - 0xbfed31d98e9e503a, 0xbfda34553b0afee5, // -0.91234, -0.40944 - 0xbfed2cb220e0ef9f, 0xbfda4b4127dea1e4, // -0.91171, -0.41084 - 0xbfed2786335f52fc, 0xbfda622906a70b63, // -0.91107, -0.41224 - 0xbfed2255c6e5a4e1, 0xbfda790cd3dbf31a, // -0.91044, -0.41364 - 0xbfed1d20dc40c15c, 0xbfda8fec8bf5b166, // -0.90981, -0.41503 - 0xbfed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // -0.90917, -0.41643 - 0xbfed12a98fac410c, 0xbfdabd9faebc3980, // -0.90853, -0.41782 - 0xbfed0d672f59d2b9, 0xbfdad473125cdc08, // -0.90789, -0.41922 - 0xbfed082054168bac, 0xbfdaeb4252ca07ab, // -0.90724, -0.42061 - 0xbfed02d4feb2bd92, 0xbfdb020d6c7f4009, // -0.9066, -0.422 - 0xbfecfd852fff6ad4, 0xbfdb18d45bf8aca6, // -0.90595, -0.42339 - 0xbfecf830e8ce467b, 0xbfdb2f971db31972, // -0.9053, -0.42478 - 0xbfecf2d829f1b40e, 0xbfdb4655ae2bf757, // -0.90464, -0.42617 - 0xbfeced7af43cc773, 0xbfdb5d1009e15cc0, // -0.90399, -0.42756 - 0xbfece819488344ce, 0xbfdb73c62d520624, // -0.90333, -0.42894 - 0xbfece2b32799a060, 0xbfdb8a7814fd5693, // -0.90267, -0.43033 - 0xbfecdd489254fe65, 0xbfdba125bd63583e, // -0.90201, -0.43171 - 0xbfecd7d9898b32f6, 0xbfdbb7cf2304bd01, // -0.90135, -0.43309 - 0xbfecd2660e12c1e6, 0xbfdbce744262deee, // -0.90068, -0.43448 - 0xbfecccee20c2de9f, 0xbfdbe51517ffc0d9, // -0.90002, -0.43586 - 0xbfecc771c2736c09, 0xbfdbfbb1a05e0edc, // -0.89935, -0.43724 - 0xbfecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // -0.89867, -0.43862 - 0xbfecbc6bb638d10b, 0xbfdc28ddbb6cf145, // -0.898, -0.43999 - 0xbfecb6e20a00da99, 0xbfdc3f6d47263129, // -0.89732, -0.44137 - 0xbfecb153f02fb87d, 0xbfdc55f877b23537, // -0.89665, -0.44275 - 0xbfecabc169a0b901, 0xbfdc6c7f4997000a, // -0.89597, -0.44412 - 0xbfeca62a772fd919, 0xbfdc8301b95b40c2, // -0.89528, -0.4455 - 0xbfeca08f19b9c449, 0xbfdc997fc3865388, // -0.8946, -0.44687 - 0xbfec9aef521bd480, 0xbfdcaff964a0421d, // -0.89391, -0.44824 - 0xbfec954b213411f5, 0xbfdcc66e9931c45d, // -0.89322, -0.44961 - 0xbfec8fa287e13305, 0xbfdcdcdf5dc440ce, // -0.89253, -0.45098 - 0xbfec89f587029c13, 0xbfdcf34baee1cd21, // -0.89184, -0.45235 - 0xbfec84441f785f61, 0xbfdd09b389152ec1, // -0.89115, -0.45372 - 0xbfec7e8e52233cf3, 0xbfdd2016e8e9db5b, // -0.89045, -0.45508 - 0xbfec78d41fe4a267, 0xbfdd3675caebf962, // -0.88975, -0.45645 - 0xbfec7315899eaad7, 0xbfdd4cd02ba8609c, // -0.88905, -0.45781 - 0xbfec6d5290341eb2, 0xbfdd632607ac9aa9, // -0.88835, -0.45918 - 0xbfec678b3488739b, 0xbfdd79775b86e389, // -0.88764, -0.46054 - 0xbfec61bf777fcc48, 0xbfdd8fc423c62a25, // -0.88693, -0.4619 - 0xbfec5bef59fef85a, 0xbfdda60c5cfa10d8, // -0.88622, -0.46326 - 0xbfec561adceb743e, 0xbfddbc5003b2edf8, // -0.88551, -0.46462 - 0xbfec5042012b6907, 0xbfddd28f1481cc58, // -0.8848, -0.46598 - 0xbfec4a64c7a5ac4c, 0xbfdde8c98bf86bd6, // -0.88408, -0.46733 - 0xbfec44833141c004, 0xbfddfeff66a941de, // -0.88336, -0.46869 - 0xbfec3e9d3ee7d262, 0xbfde1530a12779f4, // -0.88264, -0.47004 - 0xbfec38b2f180bdb1, 0xbfde2b5d3806f63b, // -0.88192, -0.4714 - 0xbfec32c449f60831, 0xbfde418527dc4ffa, // -0.8812, -0.47275 - 0xbfec2cd14931e3f1, 0xbfde57a86d3cd824, // -0.88047, -0.4741 - 0xbfec26d9f01f2eaf, 0xbfde6dc704be97e2, // -0.87974, -0.47545 - 0xbfec20de3fa971b0, 0xbfde83e0eaf85113, // -0.87901, -0.4768 - 0xbfec1ade38bce19b, 0xbfde99f61c817eda, // -0.87828, -0.47815 - 0xbfec14d9dc465e58, 0xbfdeb00695f25620, // -0.87755, -0.47949 - 0xbfec0ed12b3372e9, 0xbfdec61253e3c61b, // -0.87681, -0.48084 - 0xbfec08c426725549, 0xbfdedc1952ef78d5, // -0.87607, -0.48218 - 0xbfec02b2cef1e641, 0xbfdef21b8fafd3b5, // -0.87533, -0.48353 - 0xbfebfc9d25a1b147, 0xbfdf081906bff7fd, // -0.87459, -0.48487 - 0xbfebf6832b71ec5b, 0xbfdf1e11b4bbc35c, // -0.87384, -0.48621 - 0xbfebf064e15377dd, 0xbfdf3405963fd068, // -0.87309, -0.48755 - 0xbfebea424837de6d, 0xbfdf49f4a7e97729, // -0.87235, -0.48889 - 0xbfebe41b611154c1, 0xbfdf5fdee656cda3, // -0.8716, -0.49023 - 0xbfebddf02cd2b983, 0xbfdf75c44e26a852, // -0.87084, -0.49156 - 0xbfebd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // -0.87009, -0.4929 - 0xbfebd18ce0dc19d6, 0xbfdfa1808c6cf7e0, // -0.86933, -0.49423 - 0xbfebcb54cb0d2327, 0xbfdfb7575c24d2de, // -0.86857, -0.49557 - 0xbfebc5186bf8361d, 0xbfdfcd2947c1ff57, // -0.86781, -0.4969 - 0xbfebbed7c49380ea, 0xbfdfe2f64be7120f, // -0.86705, -0.49823 - 0xbfebb892d5d5dad5, 0xbfdff8be6537615e, // -0.86628, -0.49956 - 0xbfebb249a0b6c40d, 0xbfe00740c82b82e0, // -0.86551, -0.50089 - 0xbfebabfc262e6586, 0xbfe0121fe4f56d2c, // -0.86474, -0.50221 - 0xbfeba5aa673590d2, 0xbfe01cfc874c3eb7, // -0.86397, -0.50354 - 0xbfeb9f5464c5bffc, 0xbfe027d6ad83287e, // -0.8632, -0.50486 - 0xbfeb98fa1fd9155e, 0xbfe032ae55edbd95, // -0.86242, -0.50619 - 0xbfeb929b996a5b7f, 0xbfe03d837edff370, // -0.86165, -0.50751 - 0xbfeb8c38d27504e9, 0xbfe0485626ae221a, // -0.86087, -0.50883 - 0xbfeb85d1cbf52c02, 0xbfe053264bad0483, // -0.86009, -0.51015 - 0xbfeb7f6686e792ea, 0xbfe05df3ec31b8b6, // -0.8593, -0.51147 - 0xbfeb78f70449a34b, 0xbfe068bf0691c028, // -0.85852, -0.51279 - 0xbfeb728345196e3e, 0xbfe073879922ffed, // -0.85773, -0.5141 - 0xbfeb6c0b4a55ac17, 0xbfe07e4da23bc102, // -0.85694, -0.51542 - 0xbfeb658f14fdbc47, 0xbfe089112032b08c, // -0.85615, -0.51673 - 0xbfeb5f0ea611a532, 0xbfe093d2115ee018, // -0.85535, -0.51804 - 0xbfeb5889fe921405, 0xbfe09e907417c5e1, // -0.85456, -0.51936 - 0xbfeb52011f805c92, 0xbfe0a94c46b53d0b, // -0.85376, -0.52067 - 0xbfeb4b7409de7925, 0xbfe0b405878f85ec, // -0.85296, -0.52198 - 0xbfeb44e2beaf0a61, 0xbfe0bebc34ff4646, // -0.85216, -0.52328 - 0xbfeb3e4d3ef55712, 0xbfe0c9704d5d898f, // -0.85136, -0.52459 - 0xbfeb37b38bb54c09, 0xbfe0d421cf03c12b, // -0.85055, -0.5259 - 0xbfeb3115a5f37bf4, 0xbfe0ded0b84bc4b5, // -0.84974, -0.5272 - 0xbfeb2a738eb51f33, 0xbfe0e97d078fd23b, // -0.84893, -0.5285 - 0xbfeb23cd470013b4, 0xbfe0f426bb2a8e7d, // -0.84812, -0.5298 - 0xbfeb1d22cfdadcc6, 0xbfe0fecdd1770537, // -0.84731, -0.5311 - 0xbfeb16742a4ca2f5, 0xbfe1097248d0a956, // -0.84649, -0.5324 - 0xbfeb0fc1575d33db, 0xbfe114141f935545, // -0.84567, -0.5337 - 0xbfeb090a58150200, 0xbfe11eb3541b4b22, // -0.84485, -0.535 - 0xbfeb024f2d7d24a9, 0xbfe1294fe4c5350a, // -0.84403, -0.53629 - 0xbfeafb8fd89f57b6, 0xbfe133e9cfee254e, // -0.84321, -0.53759 - 0xbfeaf4cc5a85fb73, 0xbfe13e8113f396c1, // -0.84238, -0.53888 - 0xbfeaee04b43c1474, 0xbfe14915af336ceb, // -0.84155, -0.54017 - 0xbfeae738e6cd4b67, 0xbfe153a7a00bf453, // -0.84073, -0.54146 - 0xbfeae068f345ecef, 0xbfe15e36e4dbe2bc, // -0.83989, -0.54275 - 0xbfead994dab2e979, 0xbfe168c37c025764, // -0.83906, -0.54404 - 0xbfead2bc9e21d511, 0xbfe1734d63dedb49, // -0.83822, -0.54532 - 0xbfeacbe03ea0e73b, 0xbfe17dd49ad16161, // -0.83739, -0.54661 - 0xbfeac4ffbd3efac8, 0xbfe188591f3a46e5, // -0.83655, -0.54789 - 0xbfeabe1b1b0b8dac, 0xbfe192daef7a5386, // -0.83571, -0.54918 - 0xbfeab7325916c0d4, 0xbfe19d5a09f2b9b8, // -0.83486, -0.55046 - 0xbfeab045787157ff, 0xbfe1a7d66d0516e6, // -0.83402, -0.55174 - 0xbfeaa9547a2cb98e, 0xbfe1b250171373be, // -0.83317, -0.55302 - 0xbfeaa25f5f5aee60, 0xbfe1bcc706804467, // -0.83232, -0.55429 - 0xbfea9b66290ea1a3, 0xbfe1c73b39ae68c8, // -0.83147, -0.55557 - 0xbfea9468d85b20ae, 0xbfe1d1acaf012cc2, // -0.83062, -0.55685 - 0xbfea8d676e545ad2, 0xbfe1dc1b64dc4872, // -0.82976, -0.55812 - 0xbfea8661ec0ee133, 0xbfe1e68759a3e074, // -0.8289, -0.55939 - 0xbfea7f58529fe69d, 0xbfe1f0f08bbc861b, // -0.82805, -0.56066 - 0xbfea784aa31d3f55, 0xbfe1fb56f98b37b8, // -0.82718, -0.56193 - 0xbfea7138de9d60f5, 0xbfe205baa17560d6, // -0.82632, -0.5632 - 0xbfea6a230637623b, 0xbfe2101b81e0da78, // -0.82546, -0.56447 - 0xbfea63091b02fae2, 0xbfe21a799933eb58, // -0.82459, -0.56573 - 0xbfea5beb1e188375, 0xbfe224d4e5d5482e, // -0.82372, -0.567 - 0xbfea54c91090f524, 0xbfe22f2d662c13e1, // -0.82285, -0.56826 - 0xbfea4da2f385e997, 0xbfe23983189fdfd5, // -0.82198, -0.56952 - 0xbfea4678c8119ac8, 0xbfe243d5fb98ac1f, // -0.8211, -0.57078 - 0xbfea3f4a8f4ee2d2, 0xbfe24e260d7ee7c9, // -0.82023, -0.57204 - 0xbfea38184a593bc6, 0xbfe258734cbb7110, // -0.81935, -0.5733 - 0xbfea30e1fa4cbf81, 0xbfe262bdb7b795a2, // -0.81847, -0.57455 - 0xbfea29a7a0462782, 0xbfe26d054cdd12df, // -0.81758, -0.57581 - 0xbfea22693d62ccb9, 0xbfe2774a0a961612, // -0.8167, -0.57706 - 0xbfea1b26d2c0a75e, 0xbfe2818bef4d3cba, // -0.81581, -0.57831 - 0xbfea13e0617e4ec7, 0xbfe28bcaf96d94ba, // -0.81493, -0.57956 - 0xbfea0c95eabaf937, 0xbfe2960727629ca8, // -0.81404, -0.58081 - 0xbfea05476f967bb5, 0xbfe2a040779843fb, // -0.81314, -0.58206 - 0xbfe9fdf4f13149de, 0xbfe2aa76e87aeb58, // -0.81225, -0.58331 - 0xbfe9f69e70ac75bc, 0xbfe2b4aa787764c4, // -0.81135, -0.58455 - 0xbfe9ef43ef29af94, 0xbfe2bedb25faf3ea, // -0.81046, -0.5858 - 0xbfe9e7e56dcb45bd, 0xbfe2c908ef734e57, // -0.80956, -0.58704 - 0xbfe9e082edb42472, 0xbfe2d333d34e9bb7, // -0.80866, -0.58828 - 0xbfe9d91c7007d5a6, 0xbfe2dd5bcffb7616, // -0.80775, -0.58952 - 0xbfe9d1b1f5ea80d6, 0xbfe2e780e3e8ea16, // -0.80685, -0.59076 - 0xbfe9ca438080eadb, 0xbfe2f1a30d86773a, // -0.80594, -0.592 - 0xbfe9c2d110f075c3, 0xbfe2fbc24b441015, // -0.80503, -0.59323 - 0xbfe9bb5aa85f2098, 0xbfe305de9b921a94, // -0.80412, -0.59447 - 0xbfe9b3e047f38741, 0xbfe30ff7fce17035, // -0.80321, -0.5957 - 0xbfe9ac61f0d4e247, 0xbfe31a0e6da35e44, // -0.80229, -0.59693 - 0xbfe9a4dfa42b06b2, 0xbfe32421ec49a620, // -0.80138, -0.59816 - 0xbfe99d59631e65d5, 0xbfe32e3277467d6b, // -0.80046, -0.59939 - 0xbfe995cf2ed80d22, 0xbfe338400d0c8e57, // -0.79954, -0.60062 - 0xbfe98e410881a600, 0xbfe3424aac0ef7d6, // -0.79861, -0.60184 - 0xbfe986aef1457594, 0xbfe34c5252c14de1, // -0.79769, -0.60307 - 0xbfe97f18ea4e5c9e, 0xbfe35656ff9799ae, // -0.79676, -0.60429 - 0xbfe9777ef4c7d742, 0xbfe36058b10659f3, // -0.79584, -0.60551 - 0xbfe96fe111ddfce0, 0xbfe36a576582831b, // -0.79491, -0.60673 - 0xbfe9683f42bd7fe1, 0xbfe374531b817f8d, // -0.79398, -0.60795 - 0xbfe960998893ad8c, 0xbfe37e4bd1792fe2, // -0.79304, -0.60917 - 0xbfe958efe48e6dd7, 0xbfe3884185dfeb22, // -0.79211, -0.61038 - 0xbfe9514257dc4335, 0xbfe39234372c7f04, // -0.79117, -0.6116 - 0xbfe94990e3ac4a6c, 0xbfe39c23e3d63029, // -0.79023, -0.61281 - 0xbfe941db892e3a65, 0xbfe3a6108a54ba58, // -0.78929, -0.61402 - 0xbfe93a22499263fc, 0xbfe3affa292050b9, // -0.78835, -0.61523 - 0xbfe932652609b1cf, 0xbfe3b9e0beb19e18, // -0.7874, -0.61644 - 0xbfe92aa41fc5a815, 0xbfe3c3c44981c517, // -0.78646, -0.61765 - 0xbfe922df37f8646a, 0xbfe3cda4c80a6076, // -0.78551, -0.61885 - 0xbfe91b166fd49da2, 0xbfe3d78238c58343, // -0.78456, -0.62006 - 0xbfe91349c88da398, 0xbfe3e15c9a2db922, // -0.7836, -0.62126 - 0xbfe90b7943575efe, 0xbfe3eb33eabe0680, // -0.78265, -0.62246 - 0xbfe903a4e1665133, 0xbfe3f50828f1e8d2, // -0.78169, -0.62366 - 0xbfe8fbcca3ef940d, 0xbfe3fed9534556d4, // -0.78074, -0.62486 - 0xbfe8f3f08c28d9ac, 0xbfe408a76834c0c0, // -0.77978, -0.62606 - 0xbfe8ec109b486c49, 0xbfe41272663d108c, // -0.77882, -0.62725 - 0xbfe8e42cd2852e0a, 0xbfe41c3a4bdbaa26, // -0.77785, -0.62845 - 0xbfe8dc45331698cc, 0xbfe425ff178e6bb1, // -0.77689, -0.62964 - 0xbfe8d459be34bdfa, 0xbfe42fc0c7d3adbb, // -0.77592, -0.63083 - 0xbfe8cc6a75184655, 0xbfe4397f5b2a4380, // -0.77495, -0.63202 - 0xbfe8c47758fa71cb, 0xbfe4433ad0117b1d, // -0.77398, -0.63321 - 0xbfe8bc806b151741, 0xbfe44cf325091dd6, // -0.77301, -0.63439 - 0xbfe8b485aca2a468, 0xbfe456a858917046, // -0.77204, -0.63558 - 0xbfe8ac871ede1d88, 0xbfe4605a692b32a2, // -0.77106, -0.63676 - 0xbfe8a484c3031d50, 0xbfe46a095557a0f1, // -0.77008, -0.63794 - 0xbfe89c7e9a4dd4ab, 0xbfe473b51b987347, // -0.7691, -0.63912 - 0xbfe89474a5fb0a84, 0xbfe47d5dba6fde01, // -0.76812, -0.6403 - 0xbfe88c66e7481ba1, 0xbfe48703306091fe, // -0.76714, -0.64148 - 0xbfe884555f72fa6b, 0xbfe490a57bedbcdf, // -0.76615, -0.64266 - 0xbfe87c400fba2ebf, 0xbfe49a449b9b0938, // -0.76517, -0.64383 - 0xbfe87426f95cd5bd, 0xbfe4a3e08dec9ed6, // -0.76418, -0.645 - 0xbfe86c0a1d9aa195, 0xbfe4ad79516722f0, // -0.76319, -0.64618 - 0xbfe863e97db3d95a, 0xbfe4b70ee48fb869, // -0.7622, -0.64735 - 0xbfe85bc51ae958cc, 0xbfe4c0a145ec0004, // -0.7612, -0.64851 - 0xbfe8539cf67c9029, 0xbfe4ca30740218a3, // -0.76021, -0.64968 - 0xbfe84b7111af83f9, 0xbfe4d3bc6d589f80, // -0.75921, -0.65085 - 0xbfe843416dc4cce2, 0xbfe4dd453076b064, // -0.75821, -0.65201 - 0xbfe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // -0.75721, -0.65317 - 0xbfe832d6eda3a3e0, 0xbfe4f04d0e2859aa, // -0.75621, -0.65433 - 0xbfe82a9c13f545ff, 0xbfe4f9cc25cca486, // -0.7552, -0.65549 - 0xbfe8225d803964e5, 0xbfe503480159ded2, // -0.75419, -0.65665 - 0xbfe81a1b33b57acc, 0xbfe50cc09f59a09b, // -0.75319, -0.65781 - 0xbfe811d52faf94dc, 0xbfe51635fe5601d7, // -0.75218, -0.65896 - 0xbfe8098b756e52fa, 0xbfe51fa81cd99aa6, // -0.75117, -0.66011 - 0xbfe8013e0638e795, 0xbfe52916f96f8388, // -0.75015, -0.66127 - 0xbfe7f8ece3571771, 0xbfe5328292a35596, // -0.74914, -0.66242 - 0xbfe7f0980e113978, 0xbfe53beae7012abe, // -0.74812, -0.66356 - 0xbfe7e83f87b03686, 0xbfe5454ff5159dfb, // -0.7471, -0.66471 - 0xbfe7dfe3517d8937, 0xbfe54eb1bb6dcb8f, // -0.74608, -0.66586 - 0xbfe7d7836cc33db2, 0xbfe5581038975137, // -0.74506, -0.667 - 0xbfe7cf1fdacbf179, 0xbfe5616b6b204e6e, // -0.74403, -0.66814 - 0xbfe7c6b89ce2d333, 0xbfe56ac35197649e, // -0.74301, -0.66928 - 0xbfe7be4db453a27c, 0xbfe57417ea8bb75c, // -0.74198, -0.67042 - 0xbfe7b5df226aafb0, 0xbfe57d69348cec9f, // -0.74095, -0.67156 - 0xbfe7ad6ce874dbb6, 0xbfe586b72e2b2cfd, // -0.73992, -0.67269 - 0xbfe7a4f707bf97d2, 0xbfe59001d5f723df, // -0.73889, -0.67383 - 0xbfe79c7d8198e56e, 0xbfe599492a81ffbc, // -0.73785, -0.67496 - 0xbfe79400574f55e4, 0xbfe5a28d2a5d7250, // -0.73682, -0.67609 - 0xbfe78b7f8a320a52, 0xbfe5abcdd41bb0d8, // -0.73578, -0.67722 - 0xbfe782fb1b90b35b, 0xbfe5b50b264f7448, // -0.73474, -0.67835 - 0xbfe77a730cbb9100, 0xbfe5be451f8bf980, // -0.7337, -0.67948 - 0xbfe771e75f037261, 0xbfe5c77bbe65018c, // -0.73265, -0.6806 - 0xbfe7695813b9b594, 0xbfe5d0af016ed1d4, // -0.73161, -0.68172 - 0xbfe760c52c304764, 0xbfe5d9dee73e345c, // -0.73056, -0.68285 - 0xbfe7582ea9b9a329, 0xbfe5e30b6e6877f3, // -0.72951, -0.68397 - 0xbfe74f948da8d28d, 0xbfe5ec3495837074, // -0.72846, -0.68508 - 0xbfe746f6d9516d59, 0xbfe5f55a5b2576f8, // -0.72741, -0.6862 - 0xbfe73e558e079942, 0xbfe5fe7cbde56a0f, // -0.72636, -0.68732 - 0xbfe735b0ad2009b2, 0xbfe6079bbc5aadfa, // -0.7253, -0.68843 - 0xbfe72d0837efff97, 0xbfe610b7551d2cde, // -0.72425, -0.68954 - 0xbfe7245c2fcd492a, 0xbfe619cf86c55702, // -0.72319, -0.69065 - 0xbfe71bac960e41bf, 0xbfe622e44fec22ff, // -0.72213, -0.69176 - 0xbfe712f96c09d18d, 0xbfe62bf5af2b0dfd, // -0.72107, -0.69287 - 0xbfe70a42b3176d7a, 0xbfe63503a31c1be8, // -0.72, -0.69397 - 0xbfe701886c8f16e6, 0xbfe63e0e2a59d7aa, // -0.71894, -0.69508 - 0xbfe6f8ca99c95b75, 0xbfe64715437f535b, // -0.71787, -0.69618 - 0xbfe6f0093c1f54de, 0xbfe65018ed28287f, // -0.7168, -0.69728 - 0xbfe6e74454eaa8ae, 0xbfe6591925f0783e, // -0.71573, -0.69838 - 0xbfe6de7be585881d, 0xbfe66215ec74eb91, // -0.71466, -0.69947 - 0xbfe6d5afef4aafcc, 0xbfe66b0f3f52b386, // -0.71358, -0.70057 - 0xbfe6cce07395679f, 0xbfe674051d27896c, // -0.71251, -0.70166 - 0xbfe6c40d73c18275, 0xbfe67cf78491af10, // -0.71143, -0.70275 - 0xbfe6bb36f12b5e06, 0xbfe685e6742feeef, // -0.71035, -0.70385 - 0xbfe6b25ced2fe29c, 0xbfe68ed1eaa19c71, // -0.70927, -0.70493 - 0xbfe6a97f692c82ea, 0xbfe697b9e686941c, // -0.70819, -0.70602 - 0xbfe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // -0.70711, -0.70711 - 0xbfe697b9e686941c, 0xbfe6a97f692c82ea, // -0.70602, -0.70819 - 0xbfe68ed1eaa19c71, 0xbfe6b25ced2fe29c, // -0.70493, -0.70927 - 0xbfe685e6742feeef, 0xbfe6bb36f12b5e06, // -0.70385, -0.71035 - 0xbfe67cf78491af10, 0xbfe6c40d73c18275, // -0.70275, -0.71143 - 0xbfe674051d27896c, 0xbfe6cce07395679f, // -0.70166, -0.71251 - 0xbfe66b0f3f52b386, 0xbfe6d5afef4aafcc, // -0.70057, -0.71358 - 0xbfe66215ec74eb91, 0xbfe6de7be585881d, // -0.69947, -0.71466 - 0xbfe6591925f0783e, 0xbfe6e74454eaa8ae, // -0.69838, -0.71573 - 0xbfe65018ed28287f, 0xbfe6f0093c1f54de, // -0.69728, -0.7168 - 0xbfe64715437f535b, 0xbfe6f8ca99c95b75, // -0.69618, -0.71787 - 0xbfe63e0e2a59d7aa, 0xbfe701886c8f16e6, // -0.69508, -0.71894 - 0xbfe63503a31c1be8, 0xbfe70a42b3176d7a, // -0.69397, -0.72 - 0xbfe62bf5af2b0dfd, 0xbfe712f96c09d18d, // -0.69287, -0.72107 - 0xbfe622e44fec22ff, 0xbfe71bac960e41bf, // -0.69176, -0.72213 - 0xbfe619cf86c55702, 0xbfe7245c2fcd492a, // -0.69065, -0.72319 - 0xbfe610b7551d2cde, 0xbfe72d0837efff97, // -0.68954, -0.72425 - 0xbfe6079bbc5aadfa, 0xbfe735b0ad2009b2, // -0.68843, -0.7253 - 0xbfe5fe7cbde56a0f, 0xbfe73e558e079942, // -0.68732, -0.72636 - 0xbfe5f55a5b2576f8, 0xbfe746f6d9516d59, // -0.6862, -0.72741 - 0xbfe5ec3495837074, 0xbfe74f948da8d28d, // -0.68508, -0.72846 - 0xbfe5e30b6e6877f3, 0xbfe7582ea9b9a329, // -0.68397, -0.72951 - 0xbfe5d9dee73e345c, 0xbfe760c52c304764, // -0.68285, -0.73056 - 0xbfe5d0af016ed1d4, 0xbfe7695813b9b594, // -0.68172, -0.73161 - 0xbfe5c77bbe65018c, 0xbfe771e75f037261, // -0.6806, -0.73265 - 0xbfe5be451f8bf980, 0xbfe77a730cbb9100, // -0.67948, -0.7337 - 0xbfe5b50b264f7448, 0xbfe782fb1b90b35b, // -0.67835, -0.73474 - 0xbfe5abcdd41bb0d8, 0xbfe78b7f8a320a52, // -0.67722, -0.73578 - 0xbfe5a28d2a5d7250, 0xbfe79400574f55e4, // -0.67609, -0.73682 - 0xbfe599492a81ffbc, 0xbfe79c7d8198e56e, // -0.67496, -0.73785 - 0xbfe59001d5f723df, 0xbfe7a4f707bf97d2, // -0.67383, -0.73889 - 0xbfe586b72e2b2cfd, 0xbfe7ad6ce874dbb6, // -0.67269, -0.73992 - 0xbfe57d69348cec9f, 0xbfe7b5df226aafb0, // -0.67156, -0.74095 - 0xbfe57417ea8bb75c, 0xbfe7be4db453a27c, // -0.67042, -0.74198 - 0xbfe56ac35197649e, 0xbfe7c6b89ce2d333, // -0.66928, -0.74301 - 0xbfe5616b6b204e6e, 0xbfe7cf1fdacbf179, // -0.66814, -0.74403 - 0xbfe5581038975137, 0xbfe7d7836cc33db2, // -0.667, -0.74506 - 0xbfe54eb1bb6dcb8f, 0xbfe7dfe3517d8937, // -0.66586, -0.74608 - 0xbfe5454ff5159dfb, 0xbfe7e83f87b03686, // -0.66471, -0.7471 - 0xbfe53beae7012abe, 0xbfe7f0980e113978, // -0.66356, -0.74812 - 0xbfe5328292a35596, 0xbfe7f8ece3571771, // -0.66242, -0.74914 - 0xbfe52916f96f8388, 0xbfe8013e0638e795, // -0.66127, -0.75015 - 0xbfe51fa81cd99aa6, 0xbfe8098b756e52fa, // -0.66011, -0.75117 - 0xbfe51635fe5601d7, 0xbfe811d52faf94dc, // -0.65896, -0.75218 - 0xbfe50cc09f59a09b, 0xbfe81a1b33b57acc, // -0.65781, -0.75319 - 0xbfe503480159ded2, 0xbfe8225d803964e5, // -0.65665, -0.75419 - 0xbfe4f9cc25cca486, 0xbfe82a9c13f545ff, // -0.65549, -0.7552 - 0xbfe4f04d0e2859aa, 0xbfe832d6eda3a3e0, // -0.65433, -0.75621 - 0xbfe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // -0.65317, -0.75721 - 0xbfe4dd453076b064, 0xbfe843416dc4cce2, // -0.65201, -0.75821 - 0xbfe4d3bc6d589f80, 0xbfe84b7111af83f9, // -0.65085, -0.75921 - 0xbfe4ca30740218a3, 0xbfe8539cf67c9029, // -0.64968, -0.76021 - 0xbfe4c0a145ec0004, 0xbfe85bc51ae958cc, // -0.64851, -0.7612 - 0xbfe4b70ee48fb869, 0xbfe863e97db3d95a, // -0.64735, -0.7622 - 0xbfe4ad79516722f0, 0xbfe86c0a1d9aa195, // -0.64618, -0.76319 - 0xbfe4a3e08dec9ed6, 0xbfe87426f95cd5bd, // -0.645, -0.76418 - 0xbfe49a449b9b0938, 0xbfe87c400fba2ebf, // -0.64383, -0.76517 - 0xbfe490a57bedbcdf, 0xbfe884555f72fa6b, // -0.64266, -0.76615 - 0xbfe48703306091fe, 0xbfe88c66e7481ba1, // -0.64148, -0.76714 - 0xbfe47d5dba6fde01, 0xbfe89474a5fb0a84, // -0.6403, -0.76812 - 0xbfe473b51b987347, 0xbfe89c7e9a4dd4ab, // -0.63912, -0.7691 - 0xbfe46a095557a0f1, 0xbfe8a484c3031d50, // -0.63794, -0.77008 - 0xbfe4605a692b32a2, 0xbfe8ac871ede1d88, // -0.63676, -0.77106 - 0xbfe456a858917046, 0xbfe8b485aca2a468, // -0.63558, -0.77204 - 0xbfe44cf325091dd6, 0xbfe8bc806b151741, // -0.63439, -0.77301 - 0xbfe4433ad0117b1d, 0xbfe8c47758fa71cb, // -0.63321, -0.77398 - 0xbfe4397f5b2a4380, 0xbfe8cc6a75184655, // -0.63202, -0.77495 - 0xbfe42fc0c7d3adbb, 0xbfe8d459be34bdfa, // -0.63083, -0.77592 - 0xbfe425ff178e6bb1, 0xbfe8dc45331698cc, // -0.62964, -0.77689 - 0xbfe41c3a4bdbaa26, 0xbfe8e42cd2852e0a, // -0.62845, -0.77785 - 0xbfe41272663d108c, 0xbfe8ec109b486c49, // -0.62725, -0.77882 - 0xbfe408a76834c0c0, 0xbfe8f3f08c28d9ac, // -0.62606, -0.77978 - 0xbfe3fed9534556d4, 0xbfe8fbcca3ef940d, // -0.62486, -0.78074 - 0xbfe3f50828f1e8d2, 0xbfe903a4e1665133, // -0.62366, -0.78169 - 0xbfe3eb33eabe0680, 0xbfe90b7943575efe, // -0.62246, -0.78265 - 0xbfe3e15c9a2db922, 0xbfe91349c88da398, // -0.62126, -0.7836 - 0xbfe3d78238c58343, 0xbfe91b166fd49da2, // -0.62006, -0.78456 - 0xbfe3cda4c80a6076, 0xbfe922df37f8646a, // -0.61885, -0.78551 - 0xbfe3c3c44981c517, 0xbfe92aa41fc5a815, // -0.61765, -0.78646 - 0xbfe3b9e0beb19e18, 0xbfe932652609b1cf, // -0.61644, -0.7874 - 0xbfe3affa292050b9, 0xbfe93a22499263fc, // -0.61523, -0.78835 - 0xbfe3a6108a54ba58, 0xbfe941db892e3a65, // -0.61402, -0.78929 - 0xbfe39c23e3d63029, 0xbfe94990e3ac4a6c, // -0.61281, -0.79023 - 0xbfe39234372c7f04, 0xbfe9514257dc4335, // -0.6116, -0.79117 - 0xbfe3884185dfeb22, 0xbfe958efe48e6dd7, // -0.61038, -0.79211 - 0xbfe37e4bd1792fe2, 0xbfe960998893ad8c, // -0.60917, -0.79304 - 0xbfe374531b817f8d, 0xbfe9683f42bd7fe1, // -0.60795, -0.79398 - 0xbfe36a576582831b, 0xbfe96fe111ddfce0, // -0.60673, -0.79491 - 0xbfe36058b10659f3, 0xbfe9777ef4c7d742, // -0.60551, -0.79584 - 0xbfe35656ff9799ae, 0xbfe97f18ea4e5c9e, // -0.60429, -0.79676 - 0xbfe34c5252c14de1, 0xbfe986aef1457594, // -0.60307, -0.79769 - 0xbfe3424aac0ef7d6, 0xbfe98e410881a600, // -0.60184, -0.79861 - 0xbfe338400d0c8e57, 0xbfe995cf2ed80d22, // -0.60062, -0.79954 - 0xbfe32e3277467d6b, 0xbfe99d59631e65d5, // -0.59939, -0.80046 - 0xbfe32421ec49a620, 0xbfe9a4dfa42b06b2, // -0.59816, -0.80138 - 0xbfe31a0e6da35e44, 0xbfe9ac61f0d4e247, // -0.59693, -0.80229 - 0xbfe30ff7fce17035, 0xbfe9b3e047f38741, // -0.5957, -0.80321 - 0xbfe305de9b921a94, 0xbfe9bb5aa85f2098, // -0.59447, -0.80412 - 0xbfe2fbc24b441015, 0xbfe9c2d110f075c3, // -0.59323, -0.80503 - 0xbfe2f1a30d86773a, 0xbfe9ca438080eadb, // -0.592, -0.80594 - 0xbfe2e780e3e8ea16, 0xbfe9d1b1f5ea80d6, // -0.59076, -0.80685 - 0xbfe2dd5bcffb7616, 0xbfe9d91c7007d5a6, // -0.58952, -0.80775 - 0xbfe2d333d34e9bb7, 0xbfe9e082edb42472, // -0.58828, -0.80866 - 0xbfe2c908ef734e57, 0xbfe9e7e56dcb45bd, // -0.58704, -0.80956 - 0xbfe2bedb25faf3ea, 0xbfe9ef43ef29af94, // -0.5858, -0.81046 - 0xbfe2b4aa787764c4, 0xbfe9f69e70ac75bc, // -0.58455, -0.81135 - 0xbfe2aa76e87aeb58, 0xbfe9fdf4f13149de, // -0.58331, -0.81225 - 0xbfe2a040779843fb, 0xbfea05476f967bb5, // -0.58206, -0.81314 - 0xbfe2960727629ca8, 0xbfea0c95eabaf937, // -0.58081, -0.81404 - 0xbfe28bcaf96d94ba, 0xbfea13e0617e4ec7, // -0.57956, -0.81493 - 0xbfe2818bef4d3cba, 0xbfea1b26d2c0a75e, // -0.57831, -0.81581 - 0xbfe2774a0a961612, 0xbfea22693d62ccb9, // -0.57706, -0.8167 - 0xbfe26d054cdd12df, 0xbfea29a7a0462782, // -0.57581, -0.81758 - 0xbfe262bdb7b795a2, 0xbfea30e1fa4cbf81, // -0.57455, -0.81847 - 0xbfe258734cbb7110, 0xbfea38184a593bc6, // -0.5733, -0.81935 - 0xbfe24e260d7ee7c9, 0xbfea3f4a8f4ee2d2, // -0.57204, -0.82023 - 0xbfe243d5fb98ac1f, 0xbfea4678c8119ac8, // -0.57078, -0.8211 - 0xbfe23983189fdfd5, 0xbfea4da2f385e997, // -0.56952, -0.82198 - 0xbfe22f2d662c13e1, 0xbfea54c91090f524, // -0.56826, -0.82285 - 0xbfe224d4e5d5482e, 0xbfea5beb1e188375, // -0.567, -0.82372 - 0xbfe21a799933eb58, 0xbfea63091b02fae2, // -0.56573, -0.82459 - 0xbfe2101b81e0da78, 0xbfea6a230637623b, // -0.56447, -0.82546 - 0xbfe205baa17560d6, 0xbfea7138de9d60f5, // -0.5632, -0.82632 - 0xbfe1fb56f98b37b8, 0xbfea784aa31d3f55, // -0.56193, -0.82718 - 0xbfe1f0f08bbc861b, 0xbfea7f58529fe69d, // -0.56066, -0.82805 - 0xbfe1e68759a3e074, 0xbfea8661ec0ee133, // -0.55939, -0.8289 - 0xbfe1dc1b64dc4872, 0xbfea8d676e545ad2, // -0.55812, -0.82976 - 0xbfe1d1acaf012cc2, 0xbfea9468d85b20ae, // -0.55685, -0.83062 - 0xbfe1c73b39ae68c8, 0xbfea9b66290ea1a3, // -0.55557, -0.83147 - 0xbfe1bcc706804467, 0xbfeaa25f5f5aee60, // -0.55429, -0.83232 - 0xbfe1b250171373be, 0xbfeaa9547a2cb98e, // -0.55302, -0.83317 - 0xbfe1a7d66d0516e6, 0xbfeab045787157ff, // -0.55174, -0.83402 - 0xbfe19d5a09f2b9b8, 0xbfeab7325916c0d4, // -0.55046, -0.83486 - 0xbfe192daef7a5386, 0xbfeabe1b1b0b8dac, // -0.54918, -0.83571 - 0xbfe188591f3a46e5, 0xbfeac4ffbd3efac8, // -0.54789, -0.83655 - 0xbfe17dd49ad16161, 0xbfeacbe03ea0e73b, // -0.54661, -0.83739 - 0xbfe1734d63dedb49, 0xbfead2bc9e21d511, // -0.54532, -0.83822 - 0xbfe168c37c025764, 0xbfead994dab2e979, // -0.54404, -0.83906 - 0xbfe15e36e4dbe2bc, 0xbfeae068f345ecef, // -0.54275, -0.83989 - 0xbfe153a7a00bf453, 0xbfeae738e6cd4b67, // -0.54146, -0.84073 - 0xbfe14915af336ceb, 0xbfeaee04b43c1474, // -0.54017, -0.84155 - 0xbfe13e8113f396c1, 0xbfeaf4cc5a85fb73, // -0.53888, -0.84238 - 0xbfe133e9cfee254e, 0xbfeafb8fd89f57b6, // -0.53759, -0.84321 - 0xbfe1294fe4c5350a, 0xbfeb024f2d7d24a9, // -0.53629, -0.84403 - 0xbfe11eb3541b4b22, 0xbfeb090a58150200, // -0.535, -0.84485 - 0xbfe114141f935545, 0xbfeb0fc1575d33db, // -0.5337, -0.84567 - 0xbfe1097248d0a956, 0xbfeb16742a4ca2f5, // -0.5324, -0.84649 - 0xbfe0fecdd1770537, 0xbfeb1d22cfdadcc6, // -0.5311, -0.84731 - 0xbfe0f426bb2a8e7d, 0xbfeb23cd470013b4, // -0.5298, -0.84812 - 0xbfe0e97d078fd23b, 0xbfeb2a738eb51f33, // -0.5285, -0.84893 - 0xbfe0ded0b84bc4b5, 0xbfeb3115a5f37bf4, // -0.5272, -0.84974 - 0xbfe0d421cf03c12b, 0xbfeb37b38bb54c09, // -0.5259, -0.85055 - 0xbfe0c9704d5d898f, 0xbfeb3e4d3ef55712, // -0.52459, -0.85136 - 0xbfe0bebc34ff4646, 0xbfeb44e2beaf0a61, // -0.52328, -0.85216 - 0xbfe0b405878f85ec, 0xbfeb4b7409de7925, // -0.52198, -0.85296 - 0xbfe0a94c46b53d0b, 0xbfeb52011f805c92, // -0.52067, -0.85376 - 0xbfe09e907417c5e1, 0xbfeb5889fe921405, // -0.51936, -0.85456 - 0xbfe093d2115ee018, 0xbfeb5f0ea611a532, // -0.51804, -0.85535 - 0xbfe089112032b08c, 0xbfeb658f14fdbc47, // -0.51673, -0.85615 - 0xbfe07e4da23bc102, 0xbfeb6c0b4a55ac17, // -0.51542, -0.85694 - 0xbfe073879922ffed, 0xbfeb728345196e3e, // -0.5141, -0.85773 - 0xbfe068bf0691c028, 0xbfeb78f70449a34b, // -0.51279, -0.85852 - 0xbfe05df3ec31b8b6, 0xbfeb7f6686e792ea, // -0.51147, -0.8593 - 0xbfe053264bad0483, 0xbfeb85d1cbf52c02, // -0.51015, -0.86009 - 0xbfe0485626ae221a, 0xbfeb8c38d27504e9, // -0.50883, -0.86087 - 0xbfe03d837edff370, 0xbfeb929b996a5b7f, // -0.50751, -0.86165 - 0xbfe032ae55edbd95, 0xbfeb98fa1fd9155e, // -0.50619, -0.86242 - 0xbfe027d6ad83287e, 0xbfeb9f5464c5bffc, // -0.50486, -0.8632 - 0xbfe01cfc874c3eb7, 0xbfeba5aa673590d2, // -0.50354, -0.86397 - 0xbfe0121fe4f56d2c, 0xbfebabfc262e6586, // -0.50221, -0.86474 - 0xbfe00740c82b82e0, 0xbfebb249a0b6c40d, // -0.50089, -0.86551 - 0xbfdff8be6537615e, 0xbfebb892d5d5dad5, // -0.49956, -0.86628 - 0xbfdfe2f64be7120f, 0xbfebbed7c49380ea, // -0.49823, -0.86705 - 0xbfdfcd2947c1ff57, 0xbfebc5186bf8361d, // -0.4969, -0.86781 - 0xbfdfb7575c24d2de, 0xbfebcb54cb0d2327, // -0.49557, -0.86857 - 0xbfdfa1808c6cf7e0, 0xbfebd18ce0dc19d6, // -0.49423, -0.86933 - 0xbfdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // -0.4929, -0.87009 - 0xbfdf75c44e26a852, 0xbfebddf02cd2b983, // -0.49156, -0.87084 - 0xbfdf5fdee656cda3, 0xbfebe41b611154c1, // -0.49023, -0.8716 - 0xbfdf49f4a7e97729, 0xbfebea424837de6d, // -0.48889, -0.87235 - 0xbfdf3405963fd068, 0xbfebf064e15377dd, // -0.48755, -0.87309 - 0xbfdf1e11b4bbc35c, 0xbfebf6832b71ec5b, // -0.48621, -0.87384 - 0xbfdf081906bff7fd, 0xbfebfc9d25a1b147, // -0.48487, -0.87459 - 0xbfdef21b8fafd3b5, 0xbfec02b2cef1e641, // -0.48353, -0.87533 - 0xbfdedc1952ef78d5, 0xbfec08c426725549, // -0.48218, -0.87607 - 0xbfdec61253e3c61b, 0xbfec0ed12b3372e9, // -0.48084, -0.87681 - 0xbfdeb00695f25620, 0xbfec14d9dc465e58, // -0.47949, -0.87755 - 0xbfde99f61c817eda, 0xbfec1ade38bce19b, // -0.47815, -0.87828 - 0xbfde83e0eaf85113, 0xbfec20de3fa971b0, // -0.4768, -0.87901 - 0xbfde6dc704be97e2, 0xbfec26d9f01f2eaf, // -0.47545, -0.87974 - 0xbfde57a86d3cd824, 0xbfec2cd14931e3f1, // -0.4741, -0.88047 - 0xbfde418527dc4ffa, 0xbfec32c449f60831, // -0.47275, -0.8812 - 0xbfde2b5d3806f63b, 0xbfec38b2f180bdb1, // -0.4714, -0.88192 - 0xbfde1530a12779f4, 0xbfec3e9d3ee7d262, // -0.47004, -0.88264 - 0xbfddfeff66a941de, 0xbfec44833141c004, // -0.46869, -0.88336 - 0xbfdde8c98bf86bd6, 0xbfec4a64c7a5ac4c, // -0.46733, -0.88408 - 0xbfddd28f1481cc58, 0xbfec5042012b6907, // -0.46598, -0.8848 - 0xbfddbc5003b2edf8, 0xbfec561adceb743e, // -0.46462, -0.88551 - 0xbfdda60c5cfa10d8, 0xbfec5bef59fef85a, // -0.46326, -0.88622 - 0xbfdd8fc423c62a25, 0xbfec61bf777fcc48, // -0.4619, -0.88693 - 0xbfdd79775b86e389, 0xbfec678b3488739b, // -0.46054, -0.88764 - 0xbfdd632607ac9aa9, 0xbfec6d5290341eb2, // -0.45918, -0.88835 - 0xbfdd4cd02ba8609c, 0xbfec7315899eaad7, // -0.45781, -0.88905 - 0xbfdd3675caebf962, 0xbfec78d41fe4a267, // -0.45645, -0.88975 - 0xbfdd2016e8e9db5b, 0xbfec7e8e52233cf3, // -0.45508, -0.89045 - 0xbfdd09b389152ec1, 0xbfec84441f785f61, // -0.45372, -0.89115 - 0xbfdcf34baee1cd21, 0xbfec89f587029c13, // -0.45235, -0.89184 - 0xbfdcdcdf5dc440ce, 0xbfec8fa287e13305, // -0.45098, -0.89253 - 0xbfdcc66e9931c45d, 0xbfec954b213411f5, // -0.44961, -0.89322 - 0xbfdcaff964a0421d, 0xbfec9aef521bd480, // -0.44824, -0.89391 - 0xbfdc997fc3865388, 0xbfeca08f19b9c449, // -0.44687, -0.8946 - 0xbfdc8301b95b40c2, 0xbfeca62a772fd919, // -0.4455, -0.89528 - 0xbfdc6c7f4997000a, 0xbfecabc169a0b901, // -0.44412, -0.89597 - 0xbfdc55f877b23537, 0xbfecb153f02fb87d, // -0.44275, -0.89665 - 0xbfdc3f6d47263129, 0xbfecb6e20a00da99, // -0.44137, -0.89732 - 0xbfdc28ddbb6cf145, 0xbfecbc6bb638d10b, // -0.43999, -0.898 - 0xbfdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // -0.43862, -0.89867 - 0xbfdbfbb1a05e0edc, 0xbfecc771c2736c09, // -0.43724, -0.89935 - 0xbfdbe51517ffc0d9, 0xbfecccee20c2de9f, // -0.43586, -0.90002 - 0xbfdbce744262deee, 0xbfecd2660e12c1e6, // -0.43448, -0.90068 - 0xbfdbb7cf2304bd01, 0xbfecd7d9898b32f6, // -0.43309, -0.90135 - 0xbfdba125bd63583e, 0xbfecdd489254fe65, // -0.43171, -0.90201 - 0xbfdb8a7814fd5693, 0xbfece2b32799a060, // -0.43033, -0.90267 - 0xbfdb73c62d520624, 0xbfece819488344ce, // -0.42894, -0.90333 - 0xbfdb5d1009e15cc0, 0xbfeced7af43cc773, // -0.42756, -0.90399 - 0xbfdb4655ae2bf757, 0xbfecf2d829f1b40e, // -0.42617, -0.90464 - 0xbfdb2f971db31972, 0xbfecf830e8ce467b, // -0.42478, -0.9053 - 0xbfdb18d45bf8aca6, 0xbfecfd852fff6ad4, // -0.42339, -0.90595 - 0xbfdb020d6c7f4009, 0xbfed02d4feb2bd92, // -0.422, -0.9066 - 0xbfdaeb4252ca07ab, 0xbfed082054168bac, // -0.42061, -0.90724 - 0xbfdad473125cdc08, 0xbfed0d672f59d2b9, // -0.41922, -0.90789 - 0xbfdabd9faebc3980, 0xbfed12a98fac410c, // -0.41782, -0.90853 - 0xbfdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // -0.41643, -0.90917 - 0xbfda8fec8bf5b166, 0xbfed1d20dc40c15c, // -0.41503, -0.90981 - 0xbfda790cd3dbf31a, 0xbfed2255c6e5a4e1, // -0.41364, -0.91044 - 0xbfda622906a70b63, 0xbfed2786335f52fc, // -0.41224, -0.91107 - 0xbfda4b4127dea1e4, 0xbfed2cb220e0ef9f, // -0.41084, -0.91171 - 0xbfda34553b0afee5, 0xbfed31d98e9e503a, // -0.40944, -0.91234 - 0xbfda1d6543b50ac0, 0xbfed36fc7bcbfbdc, // -0.40804, -0.91296 - 0xbfda067145664d57, 0xbfed3c1ae79f2b4e, // -0.40664, -0.91359 - 0xbfd9ef7943a8ed8a, 0xbfed4134d14dc93a, // -0.40524, -0.91421 - 0xbfd9d87d4207b0ab, 0xbfed464a380e7242, // -0.40384, -0.91483 - 0xbfd9c17d440df9f2, 0xbfed4b5b1b187524, // -0.40243, -0.91545 - 0xbfd9aa794d47c9ee, 0xbfed506779a3d2d9, // -0.40103, -0.91606 - 0xbfd993716141bdfe, 0xbfed556f52e93eb1, // -0.39962, -0.91668 - 0xbfd97c6583890fc2, 0xbfed5a72a6221e73, // -0.39822, -0.91729 - 0xbfd96555b7ab948f, 0xbfed5f7172888a7f, // -0.39681, -0.9179 - 0xbfd94e420137bce3, 0xbfed646bb7574de5, // -0.3954, -0.91851 - 0xbfd9372a63bc93d7, 0xbfed696173c9e68b, // -0.39399, -0.91911 - 0xbfd9200ee2c9be97, 0xbfed6e52a71c8547, // -0.39258, -0.91972 - 0xbfd908ef81ef7bd1, 0xbfed733f508c0dff, // -0.39117, -0.92032 - 0xbfd8f1cc44bea329, 0xbfed78276f5617c6, // -0.38976, -0.92092 - 0xbfd8daa52ec8a4af, 0xbfed7d0b02b8ecf9, // -0.38835, -0.92151 - 0xbfd8c37a439f884f, 0xbfed81ea09f38b63, // -0.38693, -0.92211 - 0xbfd8ac4b86d5ed44, 0xbfed86c48445a450, // -0.38552, -0.9227 - 0xbfd89518fbff098e, 0xbfed8b9a70ef9cb4, // -0.3841, -0.92329 - 0xbfd87de2a6aea963, 0xbfed906bcf328d46, // -0.38268, -0.92388 - 0xbfd866a88a792ea0, 0xbfed95389e50429b, // -0.38127, -0.92447 - 0xbfd84f6aaaf3903f, 0xbfed9a00dd8b3d46, // -0.37985, -0.92505 - 0xbfd838290bb359c8, 0xbfed9ec48c26b1f3, // -0.37843, -0.92563 - 0xbfd820e3b04eaac4, 0xbfeda383a9668988, // -0.37701, -0.92621 - 0xbfd8099a9c5c362d, 0xbfeda83e348f613b, // -0.37559, -0.92679 - 0xbfd7f24dd37341e3, 0xbfedacf42ce68ab9, // -0.37416, -0.92736 - 0xbfd7dafd592ba621, 0xbfedb1a591b20c38, // -0.37274, -0.92794 - 0xbfd7c3a9311dcce7, 0xbfedb6526238a09b, // -0.37132, -0.92851 - 0xbfd7ac515ee2b172, 0xbfedbafa9dc1b78d, // -0.36989, -0.92907 - 0xbfd794f5e613dfae, 0xbfedbf9e4395759a, // -0.36847, -0.92964 - 0xbfd77d96ca4b73a6, 0xbfedc43d52fcb453, // -0.36704, -0.93021 - 0xbfd766340f2418f6, 0xbfedc8d7cb410260, // -0.36561, -0.93077 - 0xbfd74ecdb8390a3e, 0xbfedcd6dabaca3a5, // -0.36418, -0.93133 - 0xbfd73763c9261092, 0xbfedd1fef38a915a, // -0.36276, -0.93188 - 0xbfd71ff6458782ec, 0xbfedd68ba2267a25, // -0.36133, -0.93244 - 0xbfd7088530fa459e, 0xbfeddb13b6ccc23d, // -0.3599, -0.93299 - 0xbfd6f1108f1bc9c5, 0xbfeddf9730ca837b, // -0.35846, -0.93354 - 0xbfd6d998638a0cb5, 0xbfede4160f6d8d81, // -0.35703, -0.93409 - 0xbfd6c21cb1e39771, 0xbfede890520465ce, // -0.3556, -0.93464 - 0xbfd6aa9d7dc77e16, 0xbfeded05f7de47da, // -0.35416, -0.93518 - 0xbfd6931acad55f51, 0xbfedf177004b2534, // -0.35273, -0.93573 - 0xbfd67b949cad63ca, 0xbfedf5e36a9ba59c, // -0.35129, -0.93627 - 0xbfd6640af6f03d9e, 0xbfedfa4b3621271d, // -0.34986, -0.9368 - 0xbfd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // -0.34842, -0.93734 - 0xbfd634ed533be58e, 0xbfee030cee1435b8, // -0.34698, -0.93787 - 0xbfd61d595c88c203, 0xbfee0766d9280f54, // -0.34554, -0.9384 - 0xbfd605c1fcc88f63, 0xbfee0bbc22bd8349, // -0.3441, -0.93893 - 0xbfd5ee27379ea693, 0xbfee100cca2980ac, // -0.34266, -0.93946 - 0xbfd5d68910aee686, 0xbfee1458cec1ad83, // -0.34122, -0.93998 - 0xbfd5bee78b9db3b6, 0xbfee18a02fdc66d9, // -0.33978, -0.94051 - 0xbfd5a742ac0ff78d, 0xbfee1ce2ecd0c0d8, // -0.33833, -0.94103 - 0xbfd58f9a75ab1fdd, 0xbfee212104f686e5, // -0.33689, -0.94154 - 0xbfd577eeec151e47, 0xbfee255a77a63bb8, // -0.33545, -0.94206 - 0xbfd5604012f467b4, 0xbfee298f4439197a, // -0.334, -0.94257 - 0xbfd5488dedeff3be, 0xbfee2dbf6a0911d9, // -0.33255, -0.94308 - 0xbfd530d880af3c24, 0xbfee31eae870ce25, // -0.33111, -0.94359 - 0xbfd5191fceda3c35, 0xbfee3611becbaf69, // -0.32966, -0.9441 - 0xbfd50163dc197047, 0xbfee3a33ec75ce85, // -0.32821, -0.9446 - 0xbfd4e9a4ac15d520, 0xbfee3e5170cbfc46, // -0.32676, -0.94511 - 0xbfd4d1e24278e76a, 0xbfee426a4b2bc17e, // -0.32531, -0.94561 - 0xbfd4ba1ca2eca31c, 0xbfee467e7af35f23, // -0.32386, -0.94611 - 0xbfd4a253d11b82f3, 0xbfee4a8dff81ce5e, // -0.32241, -0.9466 - 0xbfd48a87d0b07fd7, 0xbfee4e98d836c0af, // -0.32096, -0.94709 - 0xbfd472b8a5571054, 0xbfee529f04729ffc, // -0.3195, -0.94759 - 0xbfd45ae652bb2800, 0xbfee56a083968eb1, // -0.31805, -0.94807 - 0xbfd44310dc8936f0, 0xbfee5a9d550467d3, // -0.31659, -0.94856 - 0xbfd42b38466e2928, 0xbfee5e95781ebf1c, // -0.31514, -0.94905 - 0xbfd4135c94176602, 0xbfee6288ec48e112, // -0.31368, -0.94953 - 0xbfd3fb7dc932cfa4, 0xbfee6677b0e6d31e, // -0.31222, -0.95001 - 0xbfd3e39be96ec271, 0xbfee6a61c55d53a7, // -0.31077, -0.95049 - 0xbfd3cbb6f87a146e, 0xbfee6e472911da27, // -0.30931, -0.95096 - 0xbfd3b3cefa0414b7, 0xbfee7227db6a9744, // -0.30785, -0.95144 - 0xbfd39be3f1bc8aef, 0xbfee7603dbce74e9, // -0.30639, -0.95191 - 0xbfd383f5e353b6aa, 0xbfee79db29a5165a, // -0.30493, -0.95238 - 0xbfd36c04d27a4edf, 0xbfee7dadc456d850, // -0.30347, -0.95284 - 0xbfd35410c2e18152, 0xbfee817bab4cd10d, // -0.30201, -0.95331 - 0xbfd33c19b83af207, 0xbfee8544ddf0d075, // -0.30054, -0.95377 - 0xbfd3241fb638baaf, 0xbfee89095bad6025, // -0.29908, -0.95423 - 0xbfd30c22c08d6a13, 0xbfee8cc923edc388, // -0.29762, -0.95469 - 0xbfd2f422daec0386, 0xbfee9084361df7f3, // -0.29615, -0.95514 - 0xbfd2dc200907fe51, 0xbfee943a91aab4b4, // -0.29469, -0.95559 - 0xbfd2c41a4e954520, 0xbfee97ec36016b30, // -0.29322, -0.95605 - 0xbfd2ac11af483572, 0xbfee9b99229046f8, // -0.29175, -0.95649 - 0xbfd294062ed59f05, 0xbfee9f4156c62dda, // -0.29028, -0.95694 - 0xbfd27bf7d0f2c346, 0xbfeea2e4d212c000, // -0.28882, -0.95738 - 0xbfd263e6995554ba, 0xbfeea68393e65800, // -0.28735, -0.95783 - 0xbfd24bd28bb37672, 0xbfeeaa1d9bb20af3, // -0.28588, -0.95827 - 0xbfd233bbabc3bb72, 0xbfeeadb2e8e7a88e, // -0.28441, -0.9587 - 0xbfd21ba1fd3d2623, 0xbfeeb1437af9bb34, // -0.28294, -0.95914 - 0xbfd2038583d727bd, 0xbfeeb4cf515b8811, // -0.28146, -0.95957 - 0xbfd1eb6643499fbb, 0xbfeeb8566b810f2a, // -0.27999, -0.96 - 0xbfd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // -0.27852, -0.96043 - 0xbfd1bb1f7b999480, 0xbfeebf5668eaf2ef, // -0.27705, -0.96086 - 0xbfd1a2f7fbe8f243, 0xbfeec2cf4b1af6b2, // -0.27557, -0.96128 - 0xbfd18acdc3f4873a, 0xbfeec6436ee60309, // -0.2741, -0.9617 - 0xbfd172a0d7765177, 0xbfeec9b2d3c3bf84, // -0.27262, -0.96212 - 0xbfd15a713a28b9d9, 0xbfeecd1d792c8f10, // -0.27115, -0.96254 - 0xbfd1423eefc69378, 0xbfeed0835e999009, // -0.26967, -0.96295 - 0xbfd12a09fc0b1b12, 0xbfeed3e483849c51, // -0.26819, -0.96337 - 0xbfd111d262b1f677, 0xbfeed740e7684963, // -0.26671, -0.96378 - 0xbfd0f998277733f7, 0xbfeeda9889bfe86a, // -0.26523, -0.96418 - 0xbfd0e15b4e1749cd, 0xbfeeddeb6a078651, // -0.26375, -0.96459 - 0xbfd0c91bda4f158d, 0xbfeee13987bbebdc, // -0.26227, -0.96499 - 0xbfd0b0d9cfdbdb90, 0xbfeee482e25a9dbc, // -0.26079, -0.96539 - 0xbfd09895327b465e, 0xbfeee7c77961dc9e, // -0.25931, -0.96579 - 0xbfd0804e05eb661e, 0xbfeeeb074c50a544, // -0.25783, -0.96619 - 0xbfd068044deab002, 0xbfeeee425aa6b09a, // -0.25635, -0.96658 - 0xbfd04fb80e37fdae, 0xbfeef178a3e473c2, // -0.25487, -0.96698 - 0xbfd037694a928cac, 0xbfeef4aa278b2032, // -0.25338, -0.96737 - 0xbfd01f1806b9fdd2, 0xbfeef7d6e51ca3c0, // -0.2519, -0.96775 - 0xbfd006c4466e54af, 0xbfeefafedc1ba8b7, // -0.25041, -0.96814 - 0xbfcfdcdc1adfedf8, 0xbfeefe220c0b95ec, // -0.24893, -0.96852 - 0xbfcfac2abeff57ff, 0xbfef014074708ed3, // -0.24744, -0.9689 - 0xbfcf7b7480bd3801, 0xbfef045a14cf738c, // -0.24596, -0.96928 - 0xbfcf4ab9679c9f5c, 0xbfef076eecade0fa, // -0.24447, -0.96966 - 0xbfcf19f97b215f1a, 0xbfef0a7efb9230d7, // -0.24298, -0.97003 - 0xbfcee934c2d006c7, 0xbfef0d8a410379c5, // -0.24149, -0.9704 - 0xbfceb86b462de348, 0xbfef1090bc898f5f, // -0.24, -0.97077 - 0xbfce879d0cc0fdaf, 0xbfef13926dad024e, // -0.23851, -0.97114 - 0xbfce56ca1e101a1b, 0xbfef168f53f7205d, // -0.23702, -0.9715 - 0xbfce25f281a2b684, 0xbfef19876ef1f486, // -0.23553, -0.97187 - 0xbfcdf5163f01099a, 0xbfef1c7abe284708, // -0.23404, -0.97223 - 0xbfcdc4355db40195, 0xbfef1f6941259d7a, // -0.23255, -0.97258 - 0xbfcd934fe5454311, 0xbfef2252f7763ada, // -0.23106, -0.97294 - 0xbfcd6265dd3f27e3, 0xbfef2537e0a71f9f, // -0.22957, -0.97329 - 0xbfcd31774d2cbdee, 0xbfef2817fc4609ce, // -0.22807, -0.97364 - 0xbfcd00843c99c5f9, 0xbfef2af349e17507, // -0.22658, -0.97399 - 0xbfcccf8cb312b286, 0xbfef2dc9c9089a9d, // -0.22508, -0.97434 - 0xbfcc9e90b824a6a9, 0xbfef309b794b719f, // -0.22359, -0.97468 - 0xbfcc6d90535d74dc, 0xbfef33685a3aaef0, // -0.22209, -0.97503 - 0xbfcc3c8b8c4b9dd7, 0xbfef36306b67c556, // -0.2206, -0.97536 - 0xbfcc0b826a7e4f63, 0xbfef38f3ac64e589, // -0.2191, -0.9757 - 0xbfcbda74f5856330, 0xbfef3bb21cc4fe47, // -0.2176, -0.97604 - 0xbfcba96334f15dad, 0xbfef3e6bbc1bbc65, // -0.21611, -0.97637 - 0xbfcb784d30536cda, 0xbfef412089fd8adc, // -0.21461, -0.9767 - 0xbfcb4732ef3d6722, 0xbfef43d085ff92dd, // -0.21311, -0.97703 - 0xbfcb16147941ca2a, 0xbfef467bafb7bbe0, // -0.21161, -0.97735 - 0xbfcae4f1d5f3b9ab, 0xbfef492206bcabb4, // -0.21011, -0.97768 - 0xbfcab3cb0ce6fe44, 0xbfef4bc38aa5c694, // -0.20861, -0.978 - 0xbfca82a025b00451, 0xbfef4e603b0b2f2d, // -0.20711, -0.97832 - 0xbfca517127e3dabc, 0xbfef50f81785c6b9, // -0.20561, -0.97863 - 0xbfca203e1b1831da, 0xbfef538b1faf2d07, // -0.20411, -0.97895 - 0xbfc9ef0706e35a35, 0xbfef56195321c090, // -0.20261, -0.97926 - 0xbfc9bdcbf2dc4366, 0xbfef58a2b1789e84, // -0.2011, -0.97957 - 0xbfc98c8ce69a7aec, 0xbfef5b273a4fa2d9, // -0.1996, -0.97988 - 0xbfc95b49e9b62af9, 0xbfef5da6ed43685d, // -0.1981, -0.98018 - 0xbfc92a0303c8194f, 0xbfef6021c9f148c2, // -0.19659, -0.98048 - 0xbfc8f8b83c69a60a, 0xbfef6297cff75cb0, // -0.19509, -0.98079 - 0xbfc8c7699b34ca7e, 0xbfef6508fef47bd5, // -0.19359, -0.98108 - 0xbfc8961727c41804, 0xbfef677556883cee, // -0.19208, -0.98138 - 0xbfc864c0e9b2b6cf, 0xbfef69dcd652f5de, // -0.19057, -0.98167 - 0xbfc83366e89c64c5, 0xbfef6c3f7df5bbb7, // -0.18907, -0.98196 - 0xbfc802092c1d744b, 0xbfef6e9d4d1262ca, // -0.18756, -0.98225 - 0xbfc7d0a7bbd2cb1b, 0xbfef70f6434b7eb7, // -0.18606, -0.98254 - 0xbfc79f429f59e11d, 0xbfef734a60446279, // -0.18455, -0.98282 - 0xbfc76dd9de50bf31, 0xbfef7599a3a12077, // -0.18304, -0.98311 - 0xbfc73c6d8055fe0a, 0xbfef77e40d068a90, // -0.18153, -0.98339 - 0xbfc70afd8d08c4ff, 0xbfef7a299c1a322a, // -0.18002, -0.98366 - 0xbfc6d98a0c08c8da, 0xbfef7c6a50826840, // -0.17851, -0.98394 - 0xbfc6a81304f64ab2, 0xbfef7ea629e63d6e, // -0.177, -0.98421 - 0xbfc676987f7216b8, 0xbfef80dd27ed8204, // -0.17549, -0.98448 - 0xbfc6451a831d830d, 0xbfef830f4a40c60c, // -0.17398, -0.98475 - 0xbfc61399179a6e94, 0xbfef853c9089595e, // -0.17247, -0.98501 - 0xbfc5e214448b3fc6, 0xbfef8764fa714ba9, // -0.17096, -0.98528 - 0xbfc5b08c1192e381, 0xbfef898887a36c84, // -0.16945, -0.98554 - 0xbfc57f008654cbde, 0xbfef8ba737cb4b78, // -0.16794, -0.9858 - 0xbfc54d71aa74ef02, 0xbfef8dc10a95380d, // -0.16643, -0.98605 - 0xbfc51bdf8597c5f2, 0xbfef8fd5ffae41db, // -0.16491, -0.98631 - 0xbfc4ea4a1f624b61, 0xbfef91e616c43891, // -0.1634, -0.98656 - 0xbfc4b8b17f79fa88, 0xbfef93f14f85ac08, // -0.16189, -0.98681 - 0xbfc48715ad84cdf5, 0xbfef95f7a9a1ec47, // -0.16037, -0.98706 - 0xbfc45576b1293e5a, 0xbfef97f924c9099b, // -0.15886, -0.9873 - 0xbfc423d4920e4166, 0xbfef99f5c0abd496, // -0.15734, -0.98754 - 0xbfc3f22f57db4893, 0xbfef9bed7cfbde29, // -0.15583, -0.98778 - 0xbfc3c0870a383ff6, 0xbfef9de0596b77a3, // -0.15431, -0.98802 - 0xbfc38edbb0cd8d14, 0xbfef9fce55adb2c8, // -0.1528, -0.98826 - 0xbfc35d2d53440db2, 0xbfefa1b7717661d5, // -0.15128, -0.98849 - 0xbfc32b7bf94516a7, 0xbfefa39bac7a1791, // -0.14976, -0.98872 - 0xbfc2f9c7aa7a72af, 0xbfefa57b066e2754, // -0.14825, -0.98895 - 0xbfc2c8106e8e613a, 0xbfefa7557f08a517, // -0.14673, -0.98918 - 0xbfc296564d2b953e, 0xbfefa92b1600657c, // -0.14521, -0.9894 - 0xbfc264994dfd340a, 0xbfefaafbcb0cfddc, // -0.1437, -0.98962 - 0xbfc232d978aed413, 0xbfefacc79de6c44f, // -0.14218, -0.98984 - 0xbfc20116d4ec7bce, 0xbfefae8e8e46cfbb, // -0.14066, -0.99006 - 0xbfc1cf516a62a077, 0xbfefb0509be6f7db, // -0.13914, -0.99027 - 0xbfc19d8940be24e7, 0xbfefb20dc681d54d, // -0.13762, -0.99049 - 0xbfc16bbe5fac5865, 0xbfefb3c60dd2c199, // -0.1361, -0.9907 - 0xbfc139f0cedaf576, 0xbfefb5797195d741, // -0.13458, -0.9909 - 0xbfc1082095f820b0, 0xbfefb727f187f1c7, // -0.13306, -0.99111 - 0xbfc0d64dbcb26786, 0xbfefb8d18d66adb7, // -0.13154, -0.99131 - 0xbfc0a4784ab8bf1d, 0xbfefba7644f068b5, // -0.13002, -0.99151 - 0xbfc072a047ba831d, 0xbfefbc1617e44186, // -0.1285, -0.99171 - 0xbfc040c5bb67747e, 0xbfefbdb106021816, // -0.12698, -0.99191 - 0xbfc00ee8ad6fb85b, 0xbfefbf470f0a8d88, // -0.12545, -0.9921 - 0xbfbfba124b07ad85, 0xbfefc0d832bf043a, // -0.12393, -0.99229 - 0xbfbf564e56a9730e, 0xbfefc26470e19fd3, // -0.12241, -0.99248 - 0xbfbef2858d27561b, 0xbfefc3ebc935454c, // -0.12089, -0.99267 - 0xbfbe8eb7fde4aa3e, 0xbfefc56e3b7d9af6, // -0.11937, -0.99285 - 0xbfbe2ae5b8457f77, 0xbfefc6ebc77f0887, // -0.11784, -0.99303 - 0xbfbdc70ecbae9fc8, 0xbfefc8646cfeb721, // -0.11632, -0.99321 - 0xbfbd633347858ce4, 0xbfefc9d82bc2915e, // -0.11479, -0.99339 - 0xbfbcff533b307dc1, 0xbfefcb4703914354, // -0.11327, -0.99356 - 0xbfbc9b6eb6165c42, 0xbfefccb0f4323aa3, // -0.11175, -0.99374 - 0xbfbc3785c79ec2d5, 0xbfefce15fd6da67b, // -0.11022, -0.99391 - 0xbfbbd3987f31fa0e, 0xbfefcf761f0c77a3, // -0.1087, -0.99407 - 0xbfbb6fa6ec38f64c, 0xbfefd0d158d86087, // -0.10717, -0.99424 - 0xbfbb0bb11e1d5559, 0xbfefd227aa9bd53b, // -0.10565, -0.9944 - 0xbfbaa7b724495c04, 0xbfefd37914220b84, // -0.10412, -0.99456 - 0xbfba43b90e27f3c4, 0xbfefd4c59536fae4, // -0.1026, -0.99472 - 0xbfb9dfb6eb24a85c, 0xbfefd60d2da75c9e, // -0.10107, -0.99488 - 0xbfb97bb0caaba56f, 0xbfefd74fdd40abbf, // -0.099544, -0.99503 - 0xbfb917a6bc29b42c, 0xbfefd88da3d12526, // -0.098017, -0.99518 - 0xbfb8b398cf0c38e0, 0xbfefd9c68127c78c, // -0.09649, -0.99533 - 0xbfb84f8712c130a0, 0xbfefdafa7514538c, // -0.094963, -0.99548 - 0xbfb7eb7196b72ee4, 0xbfefdc297f674ba9, // -0.093436, -0.99563 - 0xbfb787586a5d5b21, 0xbfefdd539ff1f456, // -0.091909, -0.99577 - 0xbfb7233b9d236e71, 0xbfefde78d68653fd, // -0.090381, -0.99591 - 0xbfb6bf1b3e79b129, 0xbfefdf9922f73307, // -0.088854, -0.99604 - 0xbfb65af75dd0f87b, 0xbfefe0b485181be3, // -0.087326, -0.99618 - 0xbfb5f6d00a9aa419, 0xbfefe1cafcbd5b09, // -0.085797, -0.99631 - 0xbfb592a554489bc8, 0xbfefe2dc89bbff08, // -0.084269, -0.99644 - 0xbfb52e774a4d4d0a, 0xbfefe3e92be9d886, // -0.08274, -0.99657 - 0xbfb4ca45fc1ba8b6, 0xbfefe4f0e31d7a4a, // -0.081211, -0.9967 - 0xbfb4661179272096, 0xbfefe5f3af2e3940, // -0.079682, -0.99682 - 0xbfb401d9d0e3a507, 0xbfefe6f18ff42c84, // -0.078153, -0.99694 - 0xbfb39d9f12c5a299, 0xbfefe7ea85482d60, // -0.076624, -0.99706 - 0xbfb339614e41ffa5, 0xbfefe8de8f03d75c, // -0.075094, -0.99718 - 0xbfb2d52092ce19f6, 0xbfefe9cdad01883a, // -0.073565, -0.99729 - 0xbfb270dcefdfc45b, 0xbfefeab7df1c6005, // -0.072035, -0.9974 - 0xbfb20c9674ed444c, 0xbfefeb9d2530410f, // -0.070505, -0.99751 - 0xbfb1a84d316d4f8a, 0xbfefec7d7f19cffc, // -0.068974, -0.99762 - 0xbfb1440134d709b2, 0xbfefed58ecb673c4, // -0.067444, -0.99772 - 0xbfb0dfb28ea201e6, 0xbfefee2f6de455ba, // -0.065913, -0.99783 - 0xbfb07b614e463064, 0xbfefef0102826191, // -0.064383, -0.99793 - 0xbfb0170d833bf421, 0xbfefefcdaa704562, // -0.062852, -0.99802 - 0xbfaf656e79f820e0, 0xbfeff095658e71ad, // -0.061321, -0.99812 - 0xbfae9cbd15ff5527, 0xbfeff15833be1965, // -0.05979, -0.99821 - 0xbfadd406f9808ec8, 0xbfeff21614e131ed, // -0.058258, -0.9983 - 0xbfad0b4c436f91d0, 0xbfeff2cf08da7321, // -0.056727, -0.99839 - 0xbfac428d12c0d7e3, 0xbfeff3830f8d575c, // -0.055195, -0.99848 - 0xbfab79c986698b78, 0xbfeff43228de1b77, // -0.053664, -0.99856 - 0xbfaab101bd5f8317, 0xbfeff4dc54b1bed3, // -0.052132, -0.99864 - 0xbfa9e835d6993c87, 0xbfeff58192ee0358, // -0.0506, -0.99872 - 0xbfa91f65f10dd814, 0xbfeff621e3796d7e, // -0.049068, -0.9988 - 0xbfa856922bb513c1, 0xbfeff6bd463b444d, // -0.047535, -0.99887 - 0xbfa78dbaa5874685, 0xbfeff753bb1b9164, // -0.046003, -0.99894 - 0xbfa6c4df7d7d5b84, 0xbfeff7e5420320f9, // -0.044471, -0.99901 - 0xbfa5fc00d290cd43, 0xbfeff871dadb81df, // -0.042938, -0.99908 - 0xbfa5331ec3bba0eb, 0xbfeff8f9858f058b, // -0.041406, -0.99914 - 0xbfa46a396ff86179, 0xbfeff97c4208c014, // -0.039873, -0.9992 - 0xbfa3a150f6421afc, 0xbfeff9fa10348837, // -0.03834, -0.99926 - 0xbfa2d865759455cd, 0xbfeffa72effef75d, // -0.036807, -0.99932 - 0xbfa20f770ceb11c6, 0xbfeffae6e1556998, // -0.035274, -0.99938 - 0xbfa14685db42c17e, 0xbfeffb55e425fdae, // -0.033741, -0.99943 - 0xbfa07d91ff984580, 0xbfeffbbff85f9515, // -0.032208, -0.99948 - 0xbf9f693731d1cf01, 0xbfeffc251df1d3f8, // -0.030675, -0.99953 - 0xbf9dd7458c64ab39, 0xbfeffc8554cd213a, // -0.029142, -0.99958 - 0xbf9c454f4ce53b1c, 0xbfeffce09ce2a679, // -0.027608, -0.99962 - 0xbf9ab354b1504fca, 0xbfeffd36f624500c, // -0.026075, -0.99966 - 0xbf992155f7a3667e, 0xbfeffd886084cd0d, // -0.024541, -0.9997 - 0xbf978f535ddc9f03, 0xbfeffdd4dbf78f52, // -0.023008, -0.99974 - 0xbf95fd4d21fab226, 0xbfeffe1c6870cb77, // -0.021474, -0.99977 - 0xbf946b4381fce81c, 0xbfeffe5f05e578db, // -0.01994, -0.9998 - 0xbf92d936bbe30efd, 0xbfeffe9cb44b51a1, // -0.018407, -0.99983 - 0xbf9147270dad7132, 0xbfeffed57398d2b7, // -0.016873, -0.99986 - 0xbf8f6a296ab997ca, 0xbfefff0943c53bd1, // -0.015339, -0.99988 - 0xbf8c45ffe1e48ad9, 0xbfefff3824c88f6f, // -0.013805, -0.9999 - 0xbf8921d1fcdec784, 0xbfefff62169b92db, // -0.012272, -0.99992 - 0xbf85fda037ac05e0, 0xbfefff871937ce2f, // -0.010738, -0.99994 - 0xbf82d96b0e509703, 0xbfefffa72c978c4f, //-0.0092038, -0.99996 - 0xbf7f6a65f9a2a3c5, 0xbfefffc250b5daef, //-0.0076698, -0.99997 - 0xbf7921f0fe670071, 0xbfefffd8858e8a92, //-0.0061359, -0.99998 - 0xbf72d97822f996bc, 0xbfefffe9cb1e2e8d, //-0.0046019, -0.99999 - 0xbf6921f8becca4ba, 0xbfeffff621621d02, // -0.003068, -1 - 0xbf5921faaee6472d, 0xbfeffffd88586ee6, // -0.001534, -1 - 0x0000000000000000, 0xbff0000000000000, // 0, -1 - 0x3f5921faaee6472d, 0xbfeffffd88586ee6, // 0.001534, -1 - 0x3f6921f8becca4ba, 0xbfeffff621621d02, // 0.003068, -1 - 0x3f72d97822f996bc, 0xbfefffe9cb1e2e8d, // 0.0046019, -0.99999 - 0x3f7921f0fe670071, 0xbfefffd8858e8a92, // 0.0061359, -0.99998 - 0x3f7f6a65f9a2a3c5, 0xbfefffc250b5daef, // 0.0076698, -0.99997 - 0x3f82d96b0e509703, 0xbfefffa72c978c4f, // 0.0092038, -0.99996 - 0x3f85fda037ac05e0, 0xbfefff871937ce2f, // 0.010738, -0.99994 - 0x3f8921d1fcdec784, 0xbfefff62169b92db, // 0.012272, -0.99992 - 0x3f8c45ffe1e48ad9, 0xbfefff3824c88f6f, // 0.013805, -0.9999 - 0x3f8f6a296ab997ca, 0xbfefff0943c53bd1, // 0.015339, -0.99988 - 0x3f9147270dad7132, 0xbfeffed57398d2b7, // 0.016873, -0.99986 - 0x3f92d936bbe30efd, 0xbfeffe9cb44b51a1, // 0.018407, -0.99983 - 0x3f946b4381fce81c, 0xbfeffe5f05e578db, // 0.01994, -0.9998 - 0x3f95fd4d21fab226, 0xbfeffe1c6870cb77, // 0.021474, -0.99977 - 0x3f978f535ddc9f03, 0xbfeffdd4dbf78f52, // 0.023008, -0.99974 - 0x3f992155f7a3667e, 0xbfeffd886084cd0d, // 0.024541, -0.9997 - 0x3f9ab354b1504fca, 0xbfeffd36f624500c, // 0.026075, -0.99966 - 0x3f9c454f4ce53b1c, 0xbfeffce09ce2a679, // 0.027608, -0.99962 - 0x3f9dd7458c64ab39, 0xbfeffc8554cd213a, // 0.029142, -0.99958 - 0x3f9f693731d1cf01, 0xbfeffc251df1d3f8, // 0.030675, -0.99953 - 0x3fa07d91ff984580, 0xbfeffbbff85f9515, // 0.032208, -0.99948 - 0x3fa14685db42c17e, 0xbfeffb55e425fdae, // 0.033741, -0.99943 - 0x3fa20f770ceb11c6, 0xbfeffae6e1556998, // 0.035274, -0.99938 - 0x3fa2d865759455cd, 0xbfeffa72effef75d, // 0.036807, -0.99932 - 0x3fa3a150f6421afc, 0xbfeff9fa10348837, // 0.03834, -0.99926 - 0x3fa46a396ff86179, 0xbfeff97c4208c014, // 0.039873, -0.9992 - 0x3fa5331ec3bba0eb, 0xbfeff8f9858f058b, // 0.041406, -0.99914 - 0x3fa5fc00d290cd43, 0xbfeff871dadb81df, // 0.042938, -0.99908 - 0x3fa6c4df7d7d5b84, 0xbfeff7e5420320f9, // 0.044471, -0.99901 - 0x3fa78dbaa5874685, 0xbfeff753bb1b9164, // 0.046003, -0.99894 - 0x3fa856922bb513c1, 0xbfeff6bd463b444d, // 0.047535, -0.99887 - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, // 0.049068, -0.9988 - 0x3fa9e835d6993c87, 0xbfeff58192ee0358, // 0.0506, -0.99872 - 0x3faab101bd5f8317, 0xbfeff4dc54b1bed3, // 0.052132, -0.99864 - 0x3fab79c986698b78, 0xbfeff43228de1b77, // 0.053664, -0.99856 - 0x3fac428d12c0d7e3, 0xbfeff3830f8d575c, // 0.055195, -0.99848 - 0x3fad0b4c436f91d0, 0xbfeff2cf08da7321, // 0.056727, -0.99839 - 0x3fadd406f9808ec8, 0xbfeff21614e131ed, // 0.058258, -0.9983 - 0x3fae9cbd15ff5527, 0xbfeff15833be1965, // 0.05979, -0.99821 - 0x3faf656e79f820e0, 0xbfeff095658e71ad, // 0.061321, -0.99812 - 0x3fb0170d833bf421, 0xbfefefcdaa704562, // 0.062852, -0.99802 - 0x3fb07b614e463064, 0xbfefef0102826191, // 0.064383, -0.99793 - 0x3fb0dfb28ea201e6, 0xbfefee2f6de455ba, // 0.065913, -0.99783 - 0x3fb1440134d709b2, 0xbfefed58ecb673c4, // 0.067444, -0.99772 - 0x3fb1a84d316d4f8a, 0xbfefec7d7f19cffc, // 0.068974, -0.99762 - 0x3fb20c9674ed444c, 0xbfefeb9d2530410f, // 0.070505, -0.99751 - 0x3fb270dcefdfc45b, 0xbfefeab7df1c6005, // 0.072035, -0.9974 - 0x3fb2d52092ce19f6, 0xbfefe9cdad01883a, // 0.073565, -0.99729 - 0x3fb339614e41ffa5, 0xbfefe8de8f03d75c, // 0.075094, -0.99718 - 0x3fb39d9f12c5a299, 0xbfefe7ea85482d60, // 0.076624, -0.99706 - 0x3fb401d9d0e3a507, 0xbfefe6f18ff42c84, // 0.078153, -0.99694 - 0x3fb4661179272096, 0xbfefe5f3af2e3940, // 0.079682, -0.99682 - 0x3fb4ca45fc1ba8b6, 0xbfefe4f0e31d7a4a, // 0.081211, -0.9967 - 0x3fb52e774a4d4d0a, 0xbfefe3e92be9d886, // 0.08274, -0.99657 - 0x3fb592a554489bc8, 0xbfefe2dc89bbff08, // 0.084269, -0.99644 - 0x3fb5f6d00a9aa419, 0xbfefe1cafcbd5b09, // 0.085797, -0.99631 - 0x3fb65af75dd0f87b, 0xbfefe0b485181be3, // 0.087326, -0.99618 - 0x3fb6bf1b3e79b129, 0xbfefdf9922f73307, // 0.088854, -0.99604 - 0x3fb7233b9d236e71, 0xbfefde78d68653fd, // 0.090381, -0.99591 - 0x3fb787586a5d5b21, 0xbfefdd539ff1f456, // 0.091909, -0.99577 - 0x3fb7eb7196b72ee4, 0xbfefdc297f674ba9, // 0.093436, -0.99563 - 0x3fb84f8712c130a0, 0xbfefdafa7514538c, // 0.094963, -0.99548 - 0x3fb8b398cf0c38e0, 0xbfefd9c68127c78c, // 0.09649, -0.99533 - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, // 0.098017, -0.99518 - 0x3fb97bb0caaba56f, 0xbfefd74fdd40abbf, // 0.099544, -0.99503 - 0x3fb9dfb6eb24a85c, 0xbfefd60d2da75c9e, // 0.10107, -0.99488 - 0x3fba43b90e27f3c4, 0xbfefd4c59536fae4, // 0.1026, -0.99472 - 0x3fbaa7b724495c04, 0xbfefd37914220b84, // 0.10412, -0.99456 - 0x3fbb0bb11e1d5559, 0xbfefd227aa9bd53b, // 0.10565, -0.9944 - 0x3fbb6fa6ec38f64c, 0xbfefd0d158d86087, // 0.10717, -0.99424 - 0x3fbbd3987f31fa0e, 0xbfefcf761f0c77a3, // 0.1087, -0.99407 - 0x3fbc3785c79ec2d5, 0xbfefce15fd6da67b, // 0.11022, -0.99391 - 0x3fbc9b6eb6165c42, 0xbfefccb0f4323aa3, // 0.11175, -0.99374 - 0x3fbcff533b307dc1, 0xbfefcb4703914354, // 0.11327, -0.99356 - 0x3fbd633347858ce4, 0xbfefc9d82bc2915e, // 0.11479, -0.99339 - 0x3fbdc70ecbae9fc8, 0xbfefc8646cfeb721, // 0.11632, -0.99321 - 0x3fbe2ae5b8457f77, 0xbfefc6ebc77f0887, // 0.11784, -0.99303 - 0x3fbe8eb7fde4aa3e, 0xbfefc56e3b7d9af6, // 0.11937, -0.99285 - 0x3fbef2858d27561b, 0xbfefc3ebc935454c, // 0.12089, -0.99267 - 0x3fbf564e56a9730e, 0xbfefc26470e19fd3, // 0.12241, -0.99248 - 0x3fbfba124b07ad85, 0xbfefc0d832bf043a, // 0.12393, -0.99229 - 0x3fc00ee8ad6fb85b, 0xbfefbf470f0a8d88, // 0.12545, -0.9921 - 0x3fc040c5bb67747e, 0xbfefbdb106021816, // 0.12698, -0.99191 - 0x3fc072a047ba831d, 0xbfefbc1617e44186, // 0.1285, -0.99171 - 0x3fc0a4784ab8bf1d, 0xbfefba7644f068b5, // 0.13002, -0.99151 - 0x3fc0d64dbcb26786, 0xbfefb8d18d66adb7, // 0.13154, -0.99131 - 0x3fc1082095f820b0, 0xbfefb727f187f1c7, // 0.13306, -0.99111 - 0x3fc139f0cedaf576, 0xbfefb5797195d741, // 0.13458, -0.9909 - 0x3fc16bbe5fac5865, 0xbfefb3c60dd2c199, // 0.1361, -0.9907 - 0x3fc19d8940be24e7, 0xbfefb20dc681d54d, // 0.13762, -0.99049 - 0x3fc1cf516a62a077, 0xbfefb0509be6f7db, // 0.13914, -0.99027 - 0x3fc20116d4ec7bce, 0xbfefae8e8e46cfbb, // 0.14066, -0.99006 - 0x3fc232d978aed413, 0xbfefacc79de6c44f, // 0.14218, -0.98984 - 0x3fc264994dfd340a, 0xbfefaafbcb0cfddc, // 0.1437, -0.98962 - 0x3fc296564d2b953e, 0xbfefa92b1600657c, // 0.14521, -0.9894 - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918 - 0x3fc2f9c7aa7a72af, 0xbfefa57b066e2754, // 0.14825, -0.98895 - 0x3fc32b7bf94516a7, 0xbfefa39bac7a1791, // 0.14976, -0.98872 - 0x3fc35d2d53440db2, 0xbfefa1b7717661d5, // 0.15128, -0.98849 - 0x3fc38edbb0cd8d14, 0xbfef9fce55adb2c8, // 0.1528, -0.98826 - 0x3fc3c0870a383ff6, 0xbfef9de0596b77a3, // 0.15431, -0.98802 - 0x3fc3f22f57db4893, 0xbfef9bed7cfbde29, // 0.15583, -0.98778 - 0x3fc423d4920e4166, 0xbfef99f5c0abd496, // 0.15734, -0.98754 - 0x3fc45576b1293e5a, 0xbfef97f924c9099b, // 0.15886, -0.9873 - 0x3fc48715ad84cdf5, 0xbfef95f7a9a1ec47, // 0.16037, -0.98706 - 0x3fc4b8b17f79fa88, 0xbfef93f14f85ac08, // 0.16189, -0.98681 - 0x3fc4ea4a1f624b61, 0xbfef91e616c43891, // 0.1634, -0.98656 - 0x3fc51bdf8597c5f2, 0xbfef8fd5ffae41db, // 0.16491, -0.98631 - 0x3fc54d71aa74ef02, 0xbfef8dc10a95380d, // 0.16643, -0.98605 - 0x3fc57f008654cbde, 0xbfef8ba737cb4b78, // 0.16794, -0.9858 - 0x3fc5b08c1192e381, 0xbfef898887a36c84, // 0.16945, -0.98554 - 0x3fc5e214448b3fc6, 0xbfef8764fa714ba9, // 0.17096, -0.98528 - 0x3fc61399179a6e94, 0xbfef853c9089595e, // 0.17247, -0.98501 - 0x3fc6451a831d830d, 0xbfef830f4a40c60c, // 0.17398, -0.98475 - 0x3fc676987f7216b8, 0xbfef80dd27ed8204, // 0.17549, -0.98448 - 0x3fc6a81304f64ab2, 0xbfef7ea629e63d6e, // 0.177, -0.98421 - 0x3fc6d98a0c08c8da, 0xbfef7c6a50826840, // 0.17851, -0.98394 - 0x3fc70afd8d08c4ff, 0xbfef7a299c1a322a, // 0.18002, -0.98366 - 0x3fc73c6d8055fe0a, 0xbfef77e40d068a90, // 0.18153, -0.98339 - 0x3fc76dd9de50bf31, 0xbfef7599a3a12077, // 0.18304, -0.98311 - 0x3fc79f429f59e11d, 0xbfef734a60446279, // 0.18455, -0.98282 - 0x3fc7d0a7bbd2cb1b, 0xbfef70f6434b7eb7, // 0.18606, -0.98254 - 0x3fc802092c1d744b, 0xbfef6e9d4d1262ca, // 0.18756, -0.98225 - 0x3fc83366e89c64c5, 0xbfef6c3f7df5bbb7, // 0.18907, -0.98196 - 0x3fc864c0e9b2b6cf, 0xbfef69dcd652f5de, // 0.19057, -0.98167 - 0x3fc8961727c41804, 0xbfef677556883cee, // 0.19208, -0.98138 - 0x3fc8c7699b34ca7e, 0xbfef6508fef47bd5, // 0.19359, -0.98108 - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079 - 0x3fc92a0303c8194f, 0xbfef6021c9f148c2, // 0.19659, -0.98048 - 0x3fc95b49e9b62af9, 0xbfef5da6ed43685d, // 0.1981, -0.98018 - 0x3fc98c8ce69a7aec, 0xbfef5b273a4fa2d9, // 0.1996, -0.97988 - 0x3fc9bdcbf2dc4366, 0xbfef58a2b1789e84, // 0.2011, -0.97957 - 0x3fc9ef0706e35a35, 0xbfef56195321c090, // 0.20261, -0.97926 - 0x3fca203e1b1831da, 0xbfef538b1faf2d07, // 0.20411, -0.97895 - 0x3fca517127e3dabc, 0xbfef50f81785c6b9, // 0.20561, -0.97863 - 0x3fca82a025b00451, 0xbfef4e603b0b2f2d, // 0.20711, -0.97832 - 0x3fcab3cb0ce6fe44, 0xbfef4bc38aa5c694, // 0.20861, -0.978 - 0x3fcae4f1d5f3b9ab, 0xbfef492206bcabb4, // 0.21011, -0.97768 - 0x3fcb16147941ca2a, 0xbfef467bafb7bbe0, // 0.21161, -0.97735 - 0x3fcb4732ef3d6722, 0xbfef43d085ff92dd, // 0.21311, -0.97703 - 0x3fcb784d30536cda, 0xbfef412089fd8adc, // 0.21461, -0.9767 - 0x3fcba96334f15dad, 0xbfef3e6bbc1bbc65, // 0.21611, -0.97637 - 0x3fcbda74f5856330, 0xbfef3bb21cc4fe47, // 0.2176, -0.97604 - 0x3fcc0b826a7e4f63, 0xbfef38f3ac64e589, // 0.2191, -0.9757 - 0x3fcc3c8b8c4b9dd7, 0xbfef36306b67c556, // 0.2206, -0.97536 - 0x3fcc6d90535d74dc, 0xbfef33685a3aaef0, // 0.22209, -0.97503 - 0x3fcc9e90b824a6a9, 0xbfef309b794b719f, // 0.22359, -0.97468 - 0x3fcccf8cb312b286, 0xbfef2dc9c9089a9d, // 0.22508, -0.97434 - 0x3fcd00843c99c5f9, 0xbfef2af349e17507, // 0.22658, -0.97399 - 0x3fcd31774d2cbdee, 0xbfef2817fc4609ce, // 0.22807, -0.97364 - 0x3fcd6265dd3f27e3, 0xbfef2537e0a71f9f, // 0.22957, -0.97329 - 0x3fcd934fe5454311, 0xbfef2252f7763ada, // 0.23106, -0.97294 - 0x3fcdc4355db40195, 0xbfef1f6941259d7a, // 0.23255, -0.97258 - 0x3fcdf5163f01099a, 0xbfef1c7abe284708, // 0.23404, -0.97223 - 0x3fce25f281a2b684, 0xbfef19876ef1f486, // 0.23553, -0.97187 - 0x3fce56ca1e101a1b, 0xbfef168f53f7205d, // 0.23702, -0.9715 - 0x3fce879d0cc0fdaf, 0xbfef13926dad024e, // 0.23851, -0.97114 - 0x3fceb86b462de348, 0xbfef1090bc898f5f, // 0.24, -0.97077 - 0x3fcee934c2d006c7, 0xbfef0d8a410379c5, // 0.24149, -0.9704 - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003 - 0x3fcf4ab9679c9f5c, 0xbfef076eecade0fa, // 0.24447, -0.96966 - 0x3fcf7b7480bd3801, 0xbfef045a14cf738c, // 0.24596, -0.96928 - 0x3fcfac2abeff57ff, 0xbfef014074708ed3, // 0.24744, -0.9689 - 0x3fcfdcdc1adfedf8, 0xbfeefe220c0b95ec, // 0.24893, -0.96852 - 0x3fd006c4466e54af, 0xbfeefafedc1ba8b7, // 0.25041, -0.96814 - 0x3fd01f1806b9fdd2, 0xbfeef7d6e51ca3c0, // 0.2519, -0.96775 - 0x3fd037694a928cac, 0xbfeef4aa278b2032, // 0.25338, -0.96737 - 0x3fd04fb80e37fdae, 0xbfeef178a3e473c2, // 0.25487, -0.96698 - 0x3fd068044deab002, 0xbfeeee425aa6b09a, // 0.25635, -0.96658 - 0x3fd0804e05eb661e, 0xbfeeeb074c50a544, // 0.25783, -0.96619 - 0x3fd09895327b465e, 0xbfeee7c77961dc9e, // 0.25931, -0.96579 - 0x3fd0b0d9cfdbdb90, 0xbfeee482e25a9dbc, // 0.26079, -0.96539 - 0x3fd0c91bda4f158d, 0xbfeee13987bbebdc, // 0.26227, -0.96499 - 0x3fd0e15b4e1749cd, 0xbfeeddeb6a078651, // 0.26375, -0.96459 - 0x3fd0f998277733f7, 0xbfeeda9889bfe86a, // 0.26523, -0.96418 - 0x3fd111d262b1f677, 0xbfeed740e7684963, // 0.26671, -0.96378 - 0x3fd12a09fc0b1b12, 0xbfeed3e483849c51, // 0.26819, -0.96337 - 0x3fd1423eefc69378, 0xbfeed0835e999009, // 0.26967, -0.96295 - 0x3fd15a713a28b9d9, 0xbfeecd1d792c8f10, // 0.27115, -0.96254 - 0x3fd172a0d7765177, 0xbfeec9b2d3c3bf84, // 0.27262, -0.96212 - 0x3fd18acdc3f4873a, 0xbfeec6436ee60309, // 0.2741, -0.9617 - 0x3fd1a2f7fbe8f243, 0xbfeec2cf4b1af6b2, // 0.27557, -0.96128 - 0x3fd1bb1f7b999480, 0xbfeebf5668eaf2ef, // 0.27705, -0.96086 - 0x3fd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // 0.27852, -0.96043 - 0x3fd1eb6643499fbb, 0xbfeeb8566b810f2a, // 0.27999, -0.96 - 0x3fd2038583d727bd, 0xbfeeb4cf515b8811, // 0.28146, -0.95957 - 0x3fd21ba1fd3d2623, 0xbfeeb1437af9bb34, // 0.28294, -0.95914 - 0x3fd233bbabc3bb72, 0xbfeeadb2e8e7a88e, // 0.28441, -0.9587 - 0x3fd24bd28bb37672, 0xbfeeaa1d9bb20af3, // 0.28588, -0.95827 - 0x3fd263e6995554ba, 0xbfeea68393e65800, // 0.28735, -0.95783 - 0x3fd27bf7d0f2c346, 0xbfeea2e4d212c000, // 0.28882, -0.95738 - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694 - 0x3fd2ac11af483572, 0xbfee9b99229046f8, // 0.29175, -0.95649 - 0x3fd2c41a4e954520, 0xbfee97ec36016b30, // 0.29322, -0.95605 - 0x3fd2dc200907fe51, 0xbfee943a91aab4b4, // 0.29469, -0.95559 - 0x3fd2f422daec0386, 0xbfee9084361df7f3, // 0.29615, -0.95514 - 0x3fd30c22c08d6a13, 0xbfee8cc923edc388, // 0.29762, -0.95469 - 0x3fd3241fb638baaf, 0xbfee89095bad6025, // 0.29908, -0.95423 - 0x3fd33c19b83af207, 0xbfee8544ddf0d075, // 0.30054, -0.95377 - 0x3fd35410c2e18152, 0xbfee817bab4cd10d, // 0.30201, -0.95331 - 0x3fd36c04d27a4edf, 0xbfee7dadc456d850, // 0.30347, -0.95284 - 0x3fd383f5e353b6aa, 0xbfee79db29a5165a, // 0.30493, -0.95238 - 0x3fd39be3f1bc8aef, 0xbfee7603dbce74e9, // 0.30639, -0.95191 - 0x3fd3b3cefa0414b7, 0xbfee7227db6a9744, // 0.30785, -0.95144 - 0x3fd3cbb6f87a146e, 0xbfee6e472911da27, // 0.30931, -0.95096 - 0x3fd3e39be96ec271, 0xbfee6a61c55d53a7, // 0.31077, -0.95049 - 0x3fd3fb7dc932cfa4, 0xbfee6677b0e6d31e, // 0.31222, -0.95001 - 0x3fd4135c94176602, 0xbfee6288ec48e112, // 0.31368, -0.94953 - 0x3fd42b38466e2928, 0xbfee5e95781ebf1c, // 0.31514, -0.94905 - 0x3fd44310dc8936f0, 0xbfee5a9d550467d3, // 0.31659, -0.94856 - 0x3fd45ae652bb2800, 0xbfee56a083968eb1, // 0.31805, -0.94807 - 0x3fd472b8a5571054, 0xbfee529f04729ffc, // 0.3195, -0.94759 - 0x3fd48a87d0b07fd7, 0xbfee4e98d836c0af, // 0.32096, -0.94709 - 0x3fd4a253d11b82f3, 0xbfee4a8dff81ce5e, // 0.32241, -0.9466 - 0x3fd4ba1ca2eca31c, 0xbfee467e7af35f23, // 0.32386, -0.94611 - 0x3fd4d1e24278e76a, 0xbfee426a4b2bc17e, // 0.32531, -0.94561 - 0x3fd4e9a4ac15d520, 0xbfee3e5170cbfc46, // 0.32676, -0.94511 - 0x3fd50163dc197047, 0xbfee3a33ec75ce85, // 0.32821, -0.9446 - 0x3fd5191fceda3c35, 0xbfee3611becbaf69, // 0.32966, -0.9441 - 0x3fd530d880af3c24, 0xbfee31eae870ce25, // 0.33111, -0.94359 - 0x3fd5488dedeff3be, 0xbfee2dbf6a0911d9, // 0.33255, -0.94308 - 0x3fd5604012f467b4, 0xbfee298f4439197a, // 0.334, -0.94257 - 0x3fd577eeec151e47, 0xbfee255a77a63bb8, // 0.33545, -0.94206 - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154 - 0x3fd5a742ac0ff78d, 0xbfee1ce2ecd0c0d8, // 0.33833, -0.94103 - 0x3fd5bee78b9db3b6, 0xbfee18a02fdc66d9, // 0.33978, -0.94051 - 0x3fd5d68910aee686, 0xbfee1458cec1ad83, // 0.34122, -0.93998 - 0x3fd5ee27379ea693, 0xbfee100cca2980ac, // 0.34266, -0.93946 - 0x3fd605c1fcc88f63, 0xbfee0bbc22bd8349, // 0.3441, -0.93893 - 0x3fd61d595c88c203, 0xbfee0766d9280f54, // 0.34554, -0.9384 - 0x3fd634ed533be58e, 0xbfee030cee1435b8, // 0.34698, -0.93787 - 0x3fd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // 0.34842, -0.93734 - 0x3fd6640af6f03d9e, 0xbfedfa4b3621271d, // 0.34986, -0.9368 - 0x3fd67b949cad63ca, 0xbfedf5e36a9ba59c, // 0.35129, -0.93627 - 0x3fd6931acad55f51, 0xbfedf177004b2534, // 0.35273, -0.93573 - 0x3fd6aa9d7dc77e16, 0xbfeded05f7de47da, // 0.35416, -0.93518 - 0x3fd6c21cb1e39771, 0xbfede890520465ce, // 0.3556, -0.93464 - 0x3fd6d998638a0cb5, 0xbfede4160f6d8d81, // 0.35703, -0.93409 - 0x3fd6f1108f1bc9c5, 0xbfeddf9730ca837b, // 0.35846, -0.93354 - 0x3fd7088530fa459e, 0xbfeddb13b6ccc23d, // 0.3599, -0.93299 - 0x3fd71ff6458782ec, 0xbfedd68ba2267a25, // 0.36133, -0.93244 - 0x3fd73763c9261092, 0xbfedd1fef38a915a, // 0.36276, -0.93188 - 0x3fd74ecdb8390a3e, 0xbfedcd6dabaca3a5, // 0.36418, -0.93133 - 0x3fd766340f2418f6, 0xbfedc8d7cb410260, // 0.36561, -0.93077 - 0x3fd77d96ca4b73a6, 0xbfedc43d52fcb453, // 0.36704, -0.93021 - 0x3fd794f5e613dfae, 0xbfedbf9e4395759a, // 0.36847, -0.92964 - 0x3fd7ac515ee2b172, 0xbfedbafa9dc1b78d, // 0.36989, -0.92907 - 0x3fd7c3a9311dcce7, 0xbfedb6526238a09b, // 0.37132, -0.92851 - 0x3fd7dafd592ba621, 0xbfedb1a591b20c38, // 0.37274, -0.92794 - 0x3fd7f24dd37341e3, 0xbfedacf42ce68ab9, // 0.37416, -0.92736 - 0x3fd8099a9c5c362d, 0xbfeda83e348f613b, // 0.37559, -0.92679 - 0x3fd820e3b04eaac4, 0xbfeda383a9668988, // 0.37701, -0.92621 - 0x3fd838290bb359c8, 0xbfed9ec48c26b1f3, // 0.37843, -0.92563 - 0x3fd84f6aaaf3903f, 0xbfed9a00dd8b3d46, // 0.37985, -0.92505 - 0x3fd866a88a792ea0, 0xbfed95389e50429b, // 0.38127, -0.92447 - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388 - 0x3fd89518fbff098e, 0xbfed8b9a70ef9cb4, // 0.3841, -0.92329 - 0x3fd8ac4b86d5ed44, 0xbfed86c48445a450, // 0.38552, -0.9227 - 0x3fd8c37a439f884f, 0xbfed81ea09f38b63, // 0.38693, -0.92211 - 0x3fd8daa52ec8a4af, 0xbfed7d0b02b8ecf9, // 0.38835, -0.92151 - 0x3fd8f1cc44bea329, 0xbfed78276f5617c6, // 0.38976, -0.92092 - 0x3fd908ef81ef7bd1, 0xbfed733f508c0dff, // 0.39117, -0.92032 - 0x3fd9200ee2c9be97, 0xbfed6e52a71c8547, // 0.39258, -0.91972 - 0x3fd9372a63bc93d7, 0xbfed696173c9e68b, // 0.39399, -0.91911 - 0x3fd94e420137bce3, 0xbfed646bb7574de5, // 0.3954, -0.91851 - 0x3fd96555b7ab948f, 0xbfed5f7172888a7f, // 0.39681, -0.9179 - 0x3fd97c6583890fc2, 0xbfed5a72a6221e73, // 0.39822, -0.91729 - 0x3fd993716141bdfe, 0xbfed556f52e93eb1, // 0.39962, -0.91668 - 0x3fd9aa794d47c9ee, 0xbfed506779a3d2d9, // 0.40103, -0.91606 - 0x3fd9c17d440df9f2, 0xbfed4b5b1b187524, // 0.40243, -0.91545 - 0x3fd9d87d4207b0ab, 0xbfed464a380e7242, // 0.40384, -0.91483 - 0x3fd9ef7943a8ed8a, 0xbfed4134d14dc93a, // 0.40524, -0.91421 - 0x3fda067145664d57, 0xbfed3c1ae79f2b4e, // 0.40664, -0.91359 - 0x3fda1d6543b50ac0, 0xbfed36fc7bcbfbdc, // 0.40804, -0.91296 - 0x3fda34553b0afee5, 0xbfed31d98e9e503a, // 0.40944, -0.91234 - 0x3fda4b4127dea1e4, 0xbfed2cb220e0ef9f, // 0.41084, -0.91171 - 0x3fda622906a70b63, 0xbfed2786335f52fc, // 0.41224, -0.91107 - 0x3fda790cd3dbf31a, 0xbfed2255c6e5a4e1, // 0.41364, -0.91044 - 0x3fda8fec8bf5b166, 0xbfed1d20dc40c15c, // 0.41503, -0.90981 - 0x3fdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // 0.41643, -0.90917 - 0x3fdabd9faebc3980, 0xbfed12a98fac410c, // 0.41782, -0.90853 - 0x3fdad473125cdc08, 0xbfed0d672f59d2b9, // 0.41922, -0.90789 - 0x3fdaeb4252ca07ab, 0xbfed082054168bac, // 0.42061, -0.90724 - 0x3fdb020d6c7f4009, 0xbfed02d4feb2bd92, // 0.422, -0.9066 - 0x3fdb18d45bf8aca6, 0xbfecfd852fff6ad4, // 0.42339, -0.90595 - 0x3fdb2f971db31972, 0xbfecf830e8ce467b, // 0.42478, -0.9053 - 0x3fdb4655ae2bf757, 0xbfecf2d829f1b40e, // 0.42617, -0.90464 - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399 - 0x3fdb73c62d520624, 0xbfece819488344ce, // 0.42894, -0.90333 - 0x3fdb8a7814fd5693, 0xbfece2b32799a060, // 0.43033, -0.90267 - 0x3fdba125bd63583e, 0xbfecdd489254fe65, // 0.43171, -0.90201 - 0x3fdbb7cf2304bd01, 0xbfecd7d9898b32f6, // 0.43309, -0.90135 - 0x3fdbce744262deee, 0xbfecd2660e12c1e6, // 0.43448, -0.90068 - 0x3fdbe51517ffc0d9, 0xbfecccee20c2de9f, // 0.43586, -0.90002 - 0x3fdbfbb1a05e0edc, 0xbfecc771c2736c09, // 0.43724, -0.89935 - 0x3fdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // 0.43862, -0.89867 - 0x3fdc28ddbb6cf145, 0xbfecbc6bb638d10b, // 0.43999, -0.898 - 0x3fdc3f6d47263129, 0xbfecb6e20a00da99, // 0.44137, -0.89732 - 0x3fdc55f877b23537, 0xbfecb153f02fb87d, // 0.44275, -0.89665 - 0x3fdc6c7f4997000a, 0xbfecabc169a0b901, // 0.44412, -0.89597 - 0x3fdc8301b95b40c2, 0xbfeca62a772fd919, // 0.4455, -0.89528 - 0x3fdc997fc3865388, 0xbfeca08f19b9c449, // 0.44687, -0.8946 - 0x3fdcaff964a0421d, 0xbfec9aef521bd480, // 0.44824, -0.89391 - 0x3fdcc66e9931c45d, 0xbfec954b213411f5, // 0.44961, -0.89322 - 0x3fdcdcdf5dc440ce, 0xbfec8fa287e13305, // 0.45098, -0.89253 - 0x3fdcf34baee1cd21, 0xbfec89f587029c13, // 0.45235, -0.89184 - 0x3fdd09b389152ec1, 0xbfec84441f785f61, // 0.45372, -0.89115 - 0x3fdd2016e8e9db5b, 0xbfec7e8e52233cf3, // 0.45508, -0.89045 - 0x3fdd3675caebf962, 0xbfec78d41fe4a267, // 0.45645, -0.88975 - 0x3fdd4cd02ba8609c, 0xbfec7315899eaad7, // 0.45781, -0.88905 - 0x3fdd632607ac9aa9, 0xbfec6d5290341eb2, // 0.45918, -0.88835 - 0x3fdd79775b86e389, 0xbfec678b3488739b, // 0.46054, -0.88764 - 0x3fdd8fc423c62a25, 0xbfec61bf777fcc48, // 0.4619, -0.88693 - 0x3fdda60c5cfa10d8, 0xbfec5bef59fef85a, // 0.46326, -0.88622 - 0x3fddbc5003b2edf8, 0xbfec561adceb743e, // 0.46462, -0.88551 - 0x3fddd28f1481cc58, 0xbfec5042012b6907, // 0.46598, -0.8848 - 0x3fdde8c98bf86bd6, 0xbfec4a64c7a5ac4c, // 0.46733, -0.88408 - 0x3fddfeff66a941de, 0xbfec44833141c004, // 0.46869, -0.88336 - 0x3fde1530a12779f4, 0xbfec3e9d3ee7d262, // 0.47004, -0.88264 - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192 - 0x3fde418527dc4ffa, 0xbfec32c449f60831, // 0.47275, -0.8812 - 0x3fde57a86d3cd824, 0xbfec2cd14931e3f1, // 0.4741, -0.88047 - 0x3fde6dc704be97e2, 0xbfec26d9f01f2eaf, // 0.47545, -0.87974 - 0x3fde83e0eaf85113, 0xbfec20de3fa971b0, // 0.4768, -0.87901 - 0x3fde99f61c817eda, 0xbfec1ade38bce19b, // 0.47815, -0.87828 - 0x3fdeb00695f25620, 0xbfec14d9dc465e58, // 0.47949, -0.87755 - 0x3fdec61253e3c61b, 0xbfec0ed12b3372e9, // 0.48084, -0.87681 - 0x3fdedc1952ef78d5, 0xbfec08c426725549, // 0.48218, -0.87607 - 0x3fdef21b8fafd3b5, 0xbfec02b2cef1e641, // 0.48353, -0.87533 - 0x3fdf081906bff7fd, 0xbfebfc9d25a1b147, // 0.48487, -0.87459 - 0x3fdf1e11b4bbc35c, 0xbfebf6832b71ec5b, // 0.48621, -0.87384 - 0x3fdf3405963fd068, 0xbfebf064e15377dd, // 0.48755, -0.87309 - 0x3fdf49f4a7e97729, 0xbfebea424837de6d, // 0.48889, -0.87235 - 0x3fdf5fdee656cda3, 0xbfebe41b611154c1, // 0.49023, -0.8716 - 0x3fdf75c44e26a852, 0xbfebddf02cd2b983, // 0.49156, -0.87084 - 0x3fdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // 0.4929, -0.87009 - 0x3fdfa1808c6cf7e0, 0xbfebd18ce0dc19d6, // 0.49423, -0.86933 - 0x3fdfb7575c24d2de, 0xbfebcb54cb0d2327, // 0.49557, -0.86857 - 0x3fdfcd2947c1ff57, 0xbfebc5186bf8361d, // 0.4969, -0.86781 - 0x3fdfe2f64be7120f, 0xbfebbed7c49380ea, // 0.49823, -0.86705 - 0x3fdff8be6537615e, 0xbfebb892d5d5dad5, // 0.49956, -0.86628 - 0x3fe00740c82b82e0, 0xbfebb249a0b6c40d, // 0.50089, -0.86551 - 0x3fe0121fe4f56d2c, 0xbfebabfc262e6586, // 0.50221, -0.86474 - 0x3fe01cfc874c3eb7, 0xbfeba5aa673590d2, // 0.50354, -0.86397 - 0x3fe027d6ad83287e, 0xbfeb9f5464c5bffc, // 0.50486, -0.8632 - 0x3fe032ae55edbd95, 0xbfeb98fa1fd9155e, // 0.50619, -0.86242 - 0x3fe03d837edff370, 0xbfeb929b996a5b7f, // 0.50751, -0.86165 - 0x3fe0485626ae221a, 0xbfeb8c38d27504e9, // 0.50883, -0.86087 - 0x3fe053264bad0483, 0xbfeb85d1cbf52c02, // 0.51015, -0.86009 - 0x3fe05df3ec31b8b6, 0xbfeb7f6686e792ea, // 0.51147, -0.8593 - 0x3fe068bf0691c028, 0xbfeb78f70449a34b, // 0.51279, -0.85852 - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773 - 0x3fe07e4da23bc102, 0xbfeb6c0b4a55ac17, // 0.51542, -0.85694 - 0x3fe089112032b08c, 0xbfeb658f14fdbc47, // 0.51673, -0.85615 - 0x3fe093d2115ee018, 0xbfeb5f0ea611a532, // 0.51804, -0.85535 - 0x3fe09e907417c5e1, 0xbfeb5889fe921405, // 0.51936, -0.85456 - 0x3fe0a94c46b53d0b, 0xbfeb52011f805c92, // 0.52067, -0.85376 - 0x3fe0b405878f85ec, 0xbfeb4b7409de7925, // 0.52198, -0.85296 - 0x3fe0bebc34ff4646, 0xbfeb44e2beaf0a61, // 0.52328, -0.85216 - 0x3fe0c9704d5d898f, 0xbfeb3e4d3ef55712, // 0.52459, -0.85136 - 0x3fe0d421cf03c12b, 0xbfeb37b38bb54c09, // 0.5259, -0.85055 - 0x3fe0ded0b84bc4b5, 0xbfeb3115a5f37bf4, // 0.5272, -0.84974 - 0x3fe0e97d078fd23b, 0xbfeb2a738eb51f33, // 0.5285, -0.84893 - 0x3fe0f426bb2a8e7d, 0xbfeb23cd470013b4, // 0.5298, -0.84812 - 0x3fe0fecdd1770537, 0xbfeb1d22cfdadcc6, // 0.5311, -0.84731 - 0x3fe1097248d0a956, 0xbfeb16742a4ca2f5, // 0.5324, -0.84649 - 0x3fe114141f935545, 0xbfeb0fc1575d33db, // 0.5337, -0.84567 - 0x3fe11eb3541b4b22, 0xbfeb090a58150200, // 0.535, -0.84485 - 0x3fe1294fe4c5350a, 0xbfeb024f2d7d24a9, // 0.53629, -0.84403 - 0x3fe133e9cfee254e, 0xbfeafb8fd89f57b6, // 0.53759, -0.84321 - 0x3fe13e8113f396c1, 0xbfeaf4cc5a85fb73, // 0.53888, -0.84238 - 0x3fe14915af336ceb, 0xbfeaee04b43c1474, // 0.54017, -0.84155 - 0x3fe153a7a00bf453, 0xbfeae738e6cd4b67, // 0.54146, -0.84073 - 0x3fe15e36e4dbe2bc, 0xbfeae068f345ecef, // 0.54275, -0.83989 - 0x3fe168c37c025764, 0xbfead994dab2e979, // 0.54404, -0.83906 - 0x3fe1734d63dedb49, 0xbfead2bc9e21d511, // 0.54532, -0.83822 - 0x3fe17dd49ad16161, 0xbfeacbe03ea0e73b, // 0.54661, -0.83739 - 0x3fe188591f3a46e5, 0xbfeac4ffbd3efac8, // 0.54789, -0.83655 - 0x3fe192daef7a5386, 0xbfeabe1b1b0b8dac, // 0.54918, -0.83571 - 0x3fe19d5a09f2b9b8, 0xbfeab7325916c0d4, // 0.55046, -0.83486 - 0x3fe1a7d66d0516e6, 0xbfeab045787157ff, // 0.55174, -0.83402 - 0x3fe1b250171373be, 0xbfeaa9547a2cb98e, // 0.55302, -0.83317 - 0x3fe1bcc706804467, 0xbfeaa25f5f5aee60, // 0.55429, -0.83232 - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147 - 0x3fe1d1acaf012cc2, 0xbfea9468d85b20ae, // 0.55685, -0.83062 - 0x3fe1dc1b64dc4872, 0xbfea8d676e545ad2, // 0.55812, -0.82976 - 0x3fe1e68759a3e074, 0xbfea8661ec0ee133, // 0.55939, -0.8289 - 0x3fe1f0f08bbc861b, 0xbfea7f58529fe69d, // 0.56066, -0.82805 - 0x3fe1fb56f98b37b8, 0xbfea784aa31d3f55, // 0.56193, -0.82718 - 0x3fe205baa17560d6, 0xbfea7138de9d60f5, // 0.5632, -0.82632 - 0x3fe2101b81e0da78, 0xbfea6a230637623b, // 0.56447, -0.82546 - 0x3fe21a799933eb58, 0xbfea63091b02fae2, // 0.56573, -0.82459 - 0x3fe224d4e5d5482e, 0xbfea5beb1e188375, // 0.567, -0.82372 - 0x3fe22f2d662c13e1, 0xbfea54c91090f524, // 0.56826, -0.82285 - 0x3fe23983189fdfd5, 0xbfea4da2f385e997, // 0.56952, -0.82198 - 0x3fe243d5fb98ac1f, 0xbfea4678c8119ac8, // 0.57078, -0.8211 - 0x3fe24e260d7ee7c9, 0xbfea3f4a8f4ee2d2, // 0.57204, -0.82023 - 0x3fe258734cbb7110, 0xbfea38184a593bc6, // 0.5733, -0.81935 - 0x3fe262bdb7b795a2, 0xbfea30e1fa4cbf81, // 0.57455, -0.81847 - 0x3fe26d054cdd12df, 0xbfea29a7a0462782, // 0.57581, -0.81758 - 0x3fe2774a0a961612, 0xbfea22693d62ccb9, // 0.57706, -0.8167 - 0x3fe2818bef4d3cba, 0xbfea1b26d2c0a75e, // 0.57831, -0.81581 - 0x3fe28bcaf96d94ba, 0xbfea13e0617e4ec7, // 0.57956, -0.81493 - 0x3fe2960727629ca8, 0xbfea0c95eabaf937, // 0.58081, -0.81404 - 0x3fe2a040779843fb, 0xbfea05476f967bb5, // 0.58206, -0.81314 - 0x3fe2aa76e87aeb58, 0xbfe9fdf4f13149de, // 0.58331, -0.81225 - 0x3fe2b4aa787764c4, 0xbfe9f69e70ac75bc, // 0.58455, -0.81135 - 0x3fe2bedb25faf3ea, 0xbfe9ef43ef29af94, // 0.5858, -0.81046 - 0x3fe2c908ef734e57, 0xbfe9e7e56dcb45bd, // 0.58704, -0.80956 - 0x3fe2d333d34e9bb7, 0xbfe9e082edb42472, // 0.58828, -0.80866 - 0x3fe2dd5bcffb7616, 0xbfe9d91c7007d5a6, // 0.58952, -0.80775 - 0x3fe2e780e3e8ea16, 0xbfe9d1b1f5ea80d6, // 0.59076, -0.80685 - 0x3fe2f1a30d86773a, 0xbfe9ca438080eadb, // 0.592, -0.80594 - 0x3fe2fbc24b441015, 0xbfe9c2d110f075c3, // 0.59323, -0.80503 - 0x3fe305de9b921a94, 0xbfe9bb5aa85f2098, // 0.59447, -0.80412 - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321 - 0x3fe31a0e6da35e44, 0xbfe9ac61f0d4e247, // 0.59693, -0.80229 - 0x3fe32421ec49a620, 0xbfe9a4dfa42b06b2, // 0.59816, -0.80138 - 0x3fe32e3277467d6b, 0xbfe99d59631e65d5, // 0.59939, -0.80046 - 0x3fe338400d0c8e57, 0xbfe995cf2ed80d22, // 0.60062, -0.79954 - 0x3fe3424aac0ef7d6, 0xbfe98e410881a600, // 0.60184, -0.79861 - 0x3fe34c5252c14de1, 0xbfe986aef1457594, // 0.60307, -0.79769 - 0x3fe35656ff9799ae, 0xbfe97f18ea4e5c9e, // 0.60429, -0.79676 - 0x3fe36058b10659f3, 0xbfe9777ef4c7d742, // 0.60551, -0.79584 - 0x3fe36a576582831b, 0xbfe96fe111ddfce0, // 0.60673, -0.79491 - 0x3fe374531b817f8d, 0xbfe9683f42bd7fe1, // 0.60795, -0.79398 - 0x3fe37e4bd1792fe2, 0xbfe960998893ad8c, // 0.60917, -0.79304 - 0x3fe3884185dfeb22, 0xbfe958efe48e6dd7, // 0.61038, -0.79211 - 0x3fe39234372c7f04, 0xbfe9514257dc4335, // 0.6116, -0.79117 - 0x3fe39c23e3d63029, 0xbfe94990e3ac4a6c, // 0.61281, -0.79023 - 0x3fe3a6108a54ba58, 0xbfe941db892e3a65, // 0.61402, -0.78929 - 0x3fe3affa292050b9, 0xbfe93a22499263fc, // 0.61523, -0.78835 - 0x3fe3b9e0beb19e18, 0xbfe932652609b1cf, // 0.61644, -0.7874 - 0x3fe3c3c44981c517, 0xbfe92aa41fc5a815, // 0.61765, -0.78646 - 0x3fe3cda4c80a6076, 0xbfe922df37f8646a, // 0.61885, -0.78551 - 0x3fe3d78238c58343, 0xbfe91b166fd49da2, // 0.62006, -0.78456 - 0x3fe3e15c9a2db922, 0xbfe91349c88da398, // 0.62126, -0.7836 - 0x3fe3eb33eabe0680, 0xbfe90b7943575efe, // 0.62246, -0.78265 - 0x3fe3f50828f1e8d2, 0xbfe903a4e1665133, // 0.62366, -0.78169 - 0x3fe3fed9534556d4, 0xbfe8fbcca3ef940d, // 0.62486, -0.78074 - 0x3fe408a76834c0c0, 0xbfe8f3f08c28d9ac, // 0.62606, -0.77978 - 0x3fe41272663d108c, 0xbfe8ec109b486c49, // 0.62725, -0.77882 - 0x3fe41c3a4bdbaa26, 0xbfe8e42cd2852e0a, // 0.62845, -0.77785 - 0x3fe425ff178e6bb1, 0xbfe8dc45331698cc, // 0.62964, -0.77689 - 0x3fe42fc0c7d3adbb, 0xbfe8d459be34bdfa, // 0.63083, -0.77592 - 0x3fe4397f5b2a4380, 0xbfe8cc6a75184655, // 0.63202, -0.77495 - 0x3fe4433ad0117b1d, 0xbfe8c47758fa71cb, // 0.63321, -0.77398 - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301 - 0x3fe456a858917046, 0xbfe8b485aca2a468, // 0.63558, -0.77204 - 0x3fe4605a692b32a2, 0xbfe8ac871ede1d88, // 0.63676, -0.77106 - 0x3fe46a095557a0f1, 0xbfe8a484c3031d50, // 0.63794, -0.77008 - 0x3fe473b51b987347, 0xbfe89c7e9a4dd4ab, // 0.63912, -0.7691 - 0x3fe47d5dba6fde01, 0xbfe89474a5fb0a84, // 0.6403, -0.76812 - 0x3fe48703306091fe, 0xbfe88c66e7481ba1, // 0.64148, -0.76714 - 0x3fe490a57bedbcdf, 0xbfe884555f72fa6b, // 0.64266, -0.76615 - 0x3fe49a449b9b0938, 0xbfe87c400fba2ebf, // 0.64383, -0.76517 - 0x3fe4a3e08dec9ed6, 0xbfe87426f95cd5bd, // 0.645, -0.76418 - 0x3fe4ad79516722f0, 0xbfe86c0a1d9aa195, // 0.64618, -0.76319 - 0x3fe4b70ee48fb869, 0xbfe863e97db3d95a, // 0.64735, -0.7622 - 0x3fe4c0a145ec0004, 0xbfe85bc51ae958cc, // 0.64851, -0.7612 - 0x3fe4ca30740218a3, 0xbfe8539cf67c9029, // 0.64968, -0.76021 - 0x3fe4d3bc6d589f80, 0xbfe84b7111af83f9, // 0.65085, -0.75921 - 0x3fe4dd453076b064, 0xbfe843416dc4cce2, // 0.65201, -0.75821 - 0x3fe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // 0.65317, -0.75721 - 0x3fe4f04d0e2859aa, 0xbfe832d6eda3a3e0, // 0.65433, -0.75621 - 0x3fe4f9cc25cca486, 0xbfe82a9c13f545ff, // 0.65549, -0.7552 - 0x3fe503480159ded2, 0xbfe8225d803964e5, // 0.65665, -0.75419 - 0x3fe50cc09f59a09b, 0xbfe81a1b33b57acc, // 0.65781, -0.75319 - 0x3fe51635fe5601d7, 0xbfe811d52faf94dc, // 0.65896, -0.75218 - 0x3fe51fa81cd99aa6, 0xbfe8098b756e52fa, // 0.66011, -0.75117 - 0x3fe52916f96f8388, 0xbfe8013e0638e795, // 0.66127, -0.75015 - 0x3fe5328292a35596, 0xbfe7f8ece3571771, // 0.66242, -0.74914 - 0x3fe53beae7012abe, 0xbfe7f0980e113978, // 0.66356, -0.74812 - 0x3fe5454ff5159dfb, 0xbfe7e83f87b03686, // 0.66471, -0.7471 - 0x3fe54eb1bb6dcb8f, 0xbfe7dfe3517d8937, // 0.66586, -0.74608 - 0x3fe5581038975137, 0xbfe7d7836cc33db2, // 0.667, -0.74506 - 0x3fe5616b6b204e6e, 0xbfe7cf1fdacbf179, // 0.66814, -0.74403 - 0x3fe56ac35197649e, 0xbfe7c6b89ce2d333, // 0.66928, -0.74301 - 0x3fe57417ea8bb75c, 0xbfe7be4db453a27c, // 0.67042, -0.74198 - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095 - 0x3fe586b72e2b2cfd, 0xbfe7ad6ce874dbb6, // 0.67269, -0.73992 - 0x3fe59001d5f723df, 0xbfe7a4f707bf97d2, // 0.67383, -0.73889 - 0x3fe599492a81ffbc, 0xbfe79c7d8198e56e, // 0.67496, -0.73785 - 0x3fe5a28d2a5d7250, 0xbfe79400574f55e4, // 0.67609, -0.73682 - 0x3fe5abcdd41bb0d8, 0xbfe78b7f8a320a52, // 0.67722, -0.73578 - 0x3fe5b50b264f7448, 0xbfe782fb1b90b35b, // 0.67835, -0.73474 - 0x3fe5be451f8bf980, 0xbfe77a730cbb9100, // 0.67948, -0.7337 - 0x3fe5c77bbe65018c, 0xbfe771e75f037261, // 0.6806, -0.73265 - 0x3fe5d0af016ed1d4, 0xbfe7695813b9b594, // 0.68172, -0.73161 - 0x3fe5d9dee73e345c, 0xbfe760c52c304764, // 0.68285, -0.73056 - 0x3fe5e30b6e6877f3, 0xbfe7582ea9b9a329, // 0.68397, -0.72951 - 0x3fe5ec3495837074, 0xbfe74f948da8d28d, // 0.68508, -0.72846 - 0x3fe5f55a5b2576f8, 0xbfe746f6d9516d59, // 0.6862, -0.72741 - 0x3fe5fe7cbde56a0f, 0xbfe73e558e079942, // 0.68732, -0.72636 - 0x3fe6079bbc5aadfa, 0xbfe735b0ad2009b2, // 0.68843, -0.7253 - 0x3fe610b7551d2cde, 0xbfe72d0837efff97, // 0.68954, -0.72425 - 0x3fe619cf86c55702, 0xbfe7245c2fcd492a, // 0.69065, -0.72319 - 0x3fe622e44fec22ff, 0xbfe71bac960e41bf, // 0.69176, -0.72213 - 0x3fe62bf5af2b0dfd, 0xbfe712f96c09d18d, // 0.69287, -0.72107 - 0x3fe63503a31c1be8, 0xbfe70a42b3176d7a, // 0.69397, -0.72 - 0x3fe63e0e2a59d7aa, 0xbfe701886c8f16e6, // 0.69508, -0.71894 - 0x3fe64715437f535b, 0xbfe6f8ca99c95b75, // 0.69618, -0.71787 - 0x3fe65018ed28287f, 0xbfe6f0093c1f54de, // 0.69728, -0.7168 - 0x3fe6591925f0783e, 0xbfe6e74454eaa8ae, // 0.69838, -0.71573 - 0x3fe66215ec74eb91, 0xbfe6de7be585881d, // 0.69947, -0.71466 - 0x3fe66b0f3f52b386, 0xbfe6d5afef4aafcc, // 0.70057, -0.71358 - 0x3fe674051d27896c, 0xbfe6cce07395679f, // 0.70166, -0.71251 - 0x3fe67cf78491af10, 0xbfe6c40d73c18275, // 0.70275, -0.71143 - 0x3fe685e6742feeef, 0xbfe6bb36f12b5e06, // 0.70385, -0.71035 - 0x3fe68ed1eaa19c71, 0xbfe6b25ced2fe29c, // 0.70493, -0.70927 - 0x3fe697b9e686941c, 0xbfe6a97f692c82ea, // 0.70602, -0.70819 - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711 - 0x3fe6a97f692c82ea, 0xbfe697b9e686941c, // 0.70819, -0.70602 - 0x3fe6b25ced2fe29c, 0xbfe68ed1eaa19c71, // 0.70927, -0.70493 - 0x3fe6bb36f12b5e06, 0xbfe685e6742feeef, // 0.71035, -0.70385 - 0x3fe6c40d73c18275, 0xbfe67cf78491af10, // 0.71143, -0.70275 - 0x3fe6cce07395679f, 0xbfe674051d27896c, // 0.71251, -0.70166 - 0x3fe6d5afef4aafcc, 0xbfe66b0f3f52b386, // 0.71358, -0.70057 - 0x3fe6de7be585881d, 0xbfe66215ec74eb91, // 0.71466, -0.69947 - 0x3fe6e74454eaa8ae, 0xbfe6591925f0783e, // 0.71573, -0.69838 - 0x3fe6f0093c1f54de, 0xbfe65018ed28287f, // 0.7168, -0.69728 - 0x3fe6f8ca99c95b75, 0xbfe64715437f535b, // 0.71787, -0.69618 - 0x3fe701886c8f16e6, 0xbfe63e0e2a59d7aa, // 0.71894, -0.69508 - 0x3fe70a42b3176d7a, 0xbfe63503a31c1be8, // 0.72, -0.69397 - 0x3fe712f96c09d18d, 0xbfe62bf5af2b0dfd, // 0.72107, -0.69287 - 0x3fe71bac960e41bf, 0xbfe622e44fec22ff, // 0.72213, -0.69176 - 0x3fe7245c2fcd492a, 0xbfe619cf86c55702, // 0.72319, -0.69065 - 0x3fe72d0837efff97, 0xbfe610b7551d2cde, // 0.72425, -0.68954 - 0x3fe735b0ad2009b2, 0xbfe6079bbc5aadfa, // 0.7253, -0.68843 - 0x3fe73e558e079942, 0xbfe5fe7cbde56a0f, // 0.72636, -0.68732 - 0x3fe746f6d9516d59, 0xbfe5f55a5b2576f8, // 0.72741, -0.6862 - 0x3fe74f948da8d28d, 0xbfe5ec3495837074, // 0.72846, -0.68508 - 0x3fe7582ea9b9a329, 0xbfe5e30b6e6877f3, // 0.72951, -0.68397 - 0x3fe760c52c304764, 0xbfe5d9dee73e345c, // 0.73056, -0.68285 - 0x3fe7695813b9b594, 0xbfe5d0af016ed1d4, // 0.73161, -0.68172 - 0x3fe771e75f037261, 0xbfe5c77bbe65018c, // 0.73265, -0.6806 - 0x3fe77a730cbb9100, 0xbfe5be451f8bf980, // 0.7337, -0.67948 - 0x3fe782fb1b90b35b, 0xbfe5b50b264f7448, // 0.73474, -0.67835 - 0x3fe78b7f8a320a52, 0xbfe5abcdd41bb0d8, // 0.73578, -0.67722 - 0x3fe79400574f55e4, 0xbfe5a28d2a5d7250, // 0.73682, -0.67609 - 0x3fe79c7d8198e56e, 0xbfe599492a81ffbc, // 0.73785, -0.67496 - 0x3fe7a4f707bf97d2, 0xbfe59001d5f723df, // 0.73889, -0.67383 - 0x3fe7ad6ce874dbb6, 0xbfe586b72e2b2cfd, // 0.73992, -0.67269 - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156 - 0x3fe7be4db453a27c, 0xbfe57417ea8bb75c, // 0.74198, -0.67042 - 0x3fe7c6b89ce2d333, 0xbfe56ac35197649e, // 0.74301, -0.66928 - 0x3fe7cf1fdacbf179, 0xbfe5616b6b204e6e, // 0.74403, -0.66814 - 0x3fe7d7836cc33db2, 0xbfe5581038975137, // 0.74506, -0.667 - 0x3fe7dfe3517d8937, 0xbfe54eb1bb6dcb8f, // 0.74608, -0.66586 - 0x3fe7e83f87b03686, 0xbfe5454ff5159dfb, // 0.7471, -0.66471 - 0x3fe7f0980e113978, 0xbfe53beae7012abe, // 0.74812, -0.66356 - 0x3fe7f8ece3571771, 0xbfe5328292a35596, // 0.74914, -0.66242 - 0x3fe8013e0638e795, 0xbfe52916f96f8388, // 0.75015, -0.66127 - 0x3fe8098b756e52fa, 0xbfe51fa81cd99aa6, // 0.75117, -0.66011 - 0x3fe811d52faf94dc, 0xbfe51635fe5601d7, // 0.75218, -0.65896 - 0x3fe81a1b33b57acc, 0xbfe50cc09f59a09b, // 0.75319, -0.65781 - 0x3fe8225d803964e5, 0xbfe503480159ded2, // 0.75419, -0.65665 - 0x3fe82a9c13f545ff, 0xbfe4f9cc25cca486, // 0.7552, -0.65549 - 0x3fe832d6eda3a3e0, 0xbfe4f04d0e2859aa, // 0.75621, -0.65433 - 0x3fe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // 0.75721, -0.65317 - 0x3fe843416dc4cce2, 0xbfe4dd453076b064, // 0.75821, -0.65201 - 0x3fe84b7111af83f9, 0xbfe4d3bc6d589f80, // 0.75921, -0.65085 - 0x3fe8539cf67c9029, 0xbfe4ca30740218a3, // 0.76021, -0.64968 - 0x3fe85bc51ae958cc, 0xbfe4c0a145ec0004, // 0.7612, -0.64851 - 0x3fe863e97db3d95a, 0xbfe4b70ee48fb869, // 0.7622, -0.64735 - 0x3fe86c0a1d9aa195, 0xbfe4ad79516722f0, // 0.76319, -0.64618 - 0x3fe87426f95cd5bd, 0xbfe4a3e08dec9ed6, // 0.76418, -0.645 - 0x3fe87c400fba2ebf, 0xbfe49a449b9b0938, // 0.76517, -0.64383 - 0x3fe884555f72fa6b, 0xbfe490a57bedbcdf, // 0.76615, -0.64266 - 0x3fe88c66e7481ba1, 0xbfe48703306091fe, // 0.76714, -0.64148 - 0x3fe89474a5fb0a84, 0xbfe47d5dba6fde01, // 0.76812, -0.6403 - 0x3fe89c7e9a4dd4ab, 0xbfe473b51b987347, // 0.7691, -0.63912 - 0x3fe8a484c3031d50, 0xbfe46a095557a0f1, // 0.77008, -0.63794 - 0x3fe8ac871ede1d88, 0xbfe4605a692b32a2, // 0.77106, -0.63676 - 0x3fe8b485aca2a468, 0xbfe456a858917046, // 0.77204, -0.63558 - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439 - 0x3fe8c47758fa71cb, 0xbfe4433ad0117b1d, // 0.77398, -0.63321 - 0x3fe8cc6a75184655, 0xbfe4397f5b2a4380, // 0.77495, -0.63202 - 0x3fe8d459be34bdfa, 0xbfe42fc0c7d3adbb, // 0.77592, -0.63083 - 0x3fe8dc45331698cc, 0xbfe425ff178e6bb1, // 0.77689, -0.62964 - 0x3fe8e42cd2852e0a, 0xbfe41c3a4bdbaa26, // 0.77785, -0.62845 - 0x3fe8ec109b486c49, 0xbfe41272663d108c, // 0.77882, -0.62725 - 0x3fe8f3f08c28d9ac, 0xbfe408a76834c0c0, // 0.77978, -0.62606 - 0x3fe8fbcca3ef940d, 0xbfe3fed9534556d4, // 0.78074, -0.62486 - 0x3fe903a4e1665133, 0xbfe3f50828f1e8d2, // 0.78169, -0.62366 - 0x3fe90b7943575efe, 0xbfe3eb33eabe0680, // 0.78265, -0.62246 - 0x3fe91349c88da398, 0xbfe3e15c9a2db922, // 0.7836, -0.62126 - 0x3fe91b166fd49da2, 0xbfe3d78238c58343, // 0.78456, -0.62006 - 0x3fe922df37f8646a, 0xbfe3cda4c80a6076, // 0.78551, -0.61885 - 0x3fe92aa41fc5a815, 0xbfe3c3c44981c517, // 0.78646, -0.61765 - 0x3fe932652609b1cf, 0xbfe3b9e0beb19e18, // 0.7874, -0.61644 - 0x3fe93a22499263fc, 0xbfe3affa292050b9, // 0.78835, -0.61523 - 0x3fe941db892e3a65, 0xbfe3a6108a54ba58, // 0.78929, -0.61402 - 0x3fe94990e3ac4a6c, 0xbfe39c23e3d63029, // 0.79023, -0.61281 - 0x3fe9514257dc4335, 0xbfe39234372c7f04, // 0.79117, -0.6116 - 0x3fe958efe48e6dd7, 0xbfe3884185dfeb22, // 0.79211, -0.61038 - 0x3fe960998893ad8c, 0xbfe37e4bd1792fe2, // 0.79304, -0.60917 - 0x3fe9683f42bd7fe1, 0xbfe374531b817f8d, // 0.79398, -0.60795 - 0x3fe96fe111ddfce0, 0xbfe36a576582831b, // 0.79491, -0.60673 - 0x3fe9777ef4c7d742, 0xbfe36058b10659f3, // 0.79584, -0.60551 - 0x3fe97f18ea4e5c9e, 0xbfe35656ff9799ae, // 0.79676, -0.60429 - 0x3fe986aef1457594, 0xbfe34c5252c14de1, // 0.79769, -0.60307 - 0x3fe98e410881a600, 0xbfe3424aac0ef7d6, // 0.79861, -0.60184 - 0x3fe995cf2ed80d22, 0xbfe338400d0c8e57, // 0.79954, -0.60062 - 0x3fe99d59631e65d5, 0xbfe32e3277467d6b, // 0.80046, -0.59939 - 0x3fe9a4dfa42b06b2, 0xbfe32421ec49a620, // 0.80138, -0.59816 - 0x3fe9ac61f0d4e247, 0xbfe31a0e6da35e44, // 0.80229, -0.59693 - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957 - 0x3fe9bb5aa85f2098, 0xbfe305de9b921a94, // 0.80412, -0.59447 - 0x3fe9c2d110f075c3, 0xbfe2fbc24b441015, // 0.80503, -0.59323 - 0x3fe9ca438080eadb, 0xbfe2f1a30d86773a, // 0.80594, -0.592 - 0x3fe9d1b1f5ea80d6, 0xbfe2e780e3e8ea16, // 0.80685, -0.59076 - 0x3fe9d91c7007d5a6, 0xbfe2dd5bcffb7616, // 0.80775, -0.58952 - 0x3fe9e082edb42472, 0xbfe2d333d34e9bb7, // 0.80866, -0.58828 - 0x3fe9e7e56dcb45bd, 0xbfe2c908ef734e57, // 0.80956, -0.58704 - 0x3fe9ef43ef29af94, 0xbfe2bedb25faf3ea, // 0.81046, -0.5858 - 0x3fe9f69e70ac75bc, 0xbfe2b4aa787764c4, // 0.81135, -0.58455 - 0x3fe9fdf4f13149de, 0xbfe2aa76e87aeb58, // 0.81225, -0.58331 - 0x3fea05476f967bb5, 0xbfe2a040779843fb, // 0.81314, -0.58206 - 0x3fea0c95eabaf937, 0xbfe2960727629ca8, // 0.81404, -0.58081 - 0x3fea13e0617e4ec7, 0xbfe28bcaf96d94ba, // 0.81493, -0.57956 - 0x3fea1b26d2c0a75e, 0xbfe2818bef4d3cba, // 0.81581, -0.57831 - 0x3fea22693d62ccb9, 0xbfe2774a0a961612, // 0.8167, -0.57706 - 0x3fea29a7a0462782, 0xbfe26d054cdd12df, // 0.81758, -0.57581 - 0x3fea30e1fa4cbf81, 0xbfe262bdb7b795a2, // 0.81847, -0.57455 - 0x3fea38184a593bc6, 0xbfe258734cbb7110, // 0.81935, -0.5733 - 0x3fea3f4a8f4ee2d2, 0xbfe24e260d7ee7c9, // 0.82023, -0.57204 - 0x3fea4678c8119ac8, 0xbfe243d5fb98ac1f, // 0.8211, -0.57078 - 0x3fea4da2f385e997, 0xbfe23983189fdfd5, // 0.82198, -0.56952 - 0x3fea54c91090f524, 0xbfe22f2d662c13e1, // 0.82285, -0.56826 - 0x3fea5beb1e188375, 0xbfe224d4e5d5482e, // 0.82372, -0.567 - 0x3fea63091b02fae2, 0xbfe21a799933eb58, // 0.82459, -0.56573 - 0x3fea6a230637623b, 0xbfe2101b81e0da78, // 0.82546, -0.56447 - 0x3fea7138de9d60f5, 0xbfe205baa17560d6, // 0.82632, -0.5632 - 0x3fea784aa31d3f55, 0xbfe1fb56f98b37b8, // 0.82718, -0.56193 - 0x3fea7f58529fe69d, 0xbfe1f0f08bbc861b, // 0.82805, -0.56066 - 0x3fea8661ec0ee133, 0xbfe1e68759a3e074, // 0.8289, -0.55939 - 0x3fea8d676e545ad2, 0xbfe1dc1b64dc4872, // 0.82976, -0.55812 - 0x3fea9468d85b20ae, 0xbfe1d1acaf012cc2, // 0.83062, -0.55685 - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557 - 0x3feaa25f5f5aee60, 0xbfe1bcc706804467, // 0.83232, -0.55429 - 0x3feaa9547a2cb98e, 0xbfe1b250171373be, // 0.83317, -0.55302 - 0x3feab045787157ff, 0xbfe1a7d66d0516e6, // 0.83402, -0.55174 - 0x3feab7325916c0d4, 0xbfe19d5a09f2b9b8, // 0.83486, -0.55046 - 0x3feabe1b1b0b8dac, 0xbfe192daef7a5386, // 0.83571, -0.54918 - 0x3feac4ffbd3efac8, 0xbfe188591f3a46e5, // 0.83655, -0.54789 - 0x3feacbe03ea0e73b, 0xbfe17dd49ad16161, // 0.83739, -0.54661 - 0x3fead2bc9e21d511, 0xbfe1734d63dedb49, // 0.83822, -0.54532 - 0x3fead994dab2e979, 0xbfe168c37c025764, // 0.83906, -0.54404 - 0x3feae068f345ecef, 0xbfe15e36e4dbe2bc, // 0.83989, -0.54275 - 0x3feae738e6cd4b67, 0xbfe153a7a00bf453, // 0.84073, -0.54146 - 0x3feaee04b43c1474, 0xbfe14915af336ceb, // 0.84155, -0.54017 - 0x3feaf4cc5a85fb73, 0xbfe13e8113f396c1, // 0.84238, -0.53888 - 0x3feafb8fd89f57b6, 0xbfe133e9cfee254e, // 0.84321, -0.53759 - 0x3feb024f2d7d24a9, 0xbfe1294fe4c5350a, // 0.84403, -0.53629 - 0x3feb090a58150200, 0xbfe11eb3541b4b22, // 0.84485, -0.535 - 0x3feb0fc1575d33db, 0xbfe114141f935545, // 0.84567, -0.5337 - 0x3feb16742a4ca2f5, 0xbfe1097248d0a956, // 0.84649, -0.5324 - 0x3feb1d22cfdadcc6, 0xbfe0fecdd1770537, // 0.84731, -0.5311 - 0x3feb23cd470013b4, 0xbfe0f426bb2a8e7d, // 0.84812, -0.5298 - 0x3feb2a738eb51f33, 0xbfe0e97d078fd23b, // 0.84893, -0.5285 - 0x3feb3115a5f37bf4, 0xbfe0ded0b84bc4b5, // 0.84974, -0.5272 - 0x3feb37b38bb54c09, 0xbfe0d421cf03c12b, // 0.85055, -0.5259 - 0x3feb3e4d3ef55712, 0xbfe0c9704d5d898f, // 0.85136, -0.52459 - 0x3feb44e2beaf0a61, 0xbfe0bebc34ff4646, // 0.85216, -0.52328 - 0x3feb4b7409de7925, 0xbfe0b405878f85ec, // 0.85296, -0.52198 - 0x3feb52011f805c92, 0xbfe0a94c46b53d0b, // 0.85376, -0.52067 - 0x3feb5889fe921405, 0xbfe09e907417c5e1, // 0.85456, -0.51936 - 0x3feb5f0ea611a532, 0xbfe093d2115ee018, // 0.85535, -0.51804 - 0x3feb658f14fdbc47, 0xbfe089112032b08c, // 0.85615, -0.51673 - 0x3feb6c0b4a55ac17, 0xbfe07e4da23bc102, // 0.85694, -0.51542 - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141 - 0x3feb78f70449a34b, 0xbfe068bf0691c028, // 0.85852, -0.51279 - 0x3feb7f6686e792ea, 0xbfe05df3ec31b8b6, // 0.8593, -0.51147 - 0x3feb85d1cbf52c02, 0xbfe053264bad0483, // 0.86009, -0.51015 - 0x3feb8c38d27504e9, 0xbfe0485626ae221a, // 0.86087, -0.50883 - 0x3feb929b996a5b7f, 0xbfe03d837edff370, // 0.86165, -0.50751 - 0x3feb98fa1fd9155e, 0xbfe032ae55edbd95, // 0.86242, -0.50619 - 0x3feb9f5464c5bffc, 0xbfe027d6ad83287e, // 0.8632, -0.50486 - 0x3feba5aa673590d2, 0xbfe01cfc874c3eb7, // 0.86397, -0.50354 - 0x3febabfc262e6586, 0xbfe0121fe4f56d2c, // 0.86474, -0.50221 - 0x3febb249a0b6c40d, 0xbfe00740c82b82e0, // 0.86551, -0.50089 - 0x3febb892d5d5dad5, 0xbfdff8be6537615e, // 0.86628, -0.49956 - 0x3febbed7c49380ea, 0xbfdfe2f64be7120f, // 0.86705, -0.49823 - 0x3febc5186bf8361d, 0xbfdfcd2947c1ff57, // 0.86781, -0.4969 - 0x3febcb54cb0d2327, 0xbfdfb7575c24d2de, // 0.86857, -0.49557 - 0x3febd18ce0dc19d6, 0xbfdfa1808c6cf7e0, // 0.86933, -0.49423 - 0x3febd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // 0.87009, -0.4929 - 0x3febddf02cd2b983, 0xbfdf75c44e26a852, // 0.87084, -0.49156 - 0x3febe41b611154c1, 0xbfdf5fdee656cda3, // 0.8716, -0.49023 - 0x3febea424837de6d, 0xbfdf49f4a7e97729, // 0.87235, -0.48889 - 0x3febf064e15377dd, 0xbfdf3405963fd068, // 0.87309, -0.48755 - 0x3febf6832b71ec5b, 0xbfdf1e11b4bbc35c, // 0.87384, -0.48621 - 0x3febfc9d25a1b147, 0xbfdf081906bff7fd, // 0.87459, -0.48487 - 0x3fec02b2cef1e641, 0xbfdef21b8fafd3b5, // 0.87533, -0.48353 - 0x3fec08c426725549, 0xbfdedc1952ef78d5, // 0.87607, -0.48218 - 0x3fec0ed12b3372e9, 0xbfdec61253e3c61b, // 0.87681, -0.48084 - 0x3fec14d9dc465e58, 0xbfdeb00695f25620, // 0.87755, -0.47949 - 0x3fec1ade38bce19b, 0xbfde99f61c817eda, // 0.87828, -0.47815 - 0x3fec20de3fa971b0, 0xbfde83e0eaf85113, // 0.87901, -0.4768 - 0x3fec26d9f01f2eaf, 0xbfde6dc704be97e2, // 0.87974, -0.47545 - 0x3fec2cd14931e3f1, 0xbfde57a86d3cd824, // 0.88047, -0.4741 - 0x3fec32c449f60831, 0xbfde418527dc4ffa, // 0.8812, -0.47275 - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714 - 0x3fec3e9d3ee7d262, 0xbfde1530a12779f4, // 0.88264, -0.47004 - 0x3fec44833141c004, 0xbfddfeff66a941de, // 0.88336, -0.46869 - 0x3fec4a64c7a5ac4c, 0xbfdde8c98bf86bd6, // 0.88408, -0.46733 - 0x3fec5042012b6907, 0xbfddd28f1481cc58, // 0.8848, -0.46598 - 0x3fec561adceb743e, 0xbfddbc5003b2edf8, // 0.88551, -0.46462 - 0x3fec5bef59fef85a, 0xbfdda60c5cfa10d8, // 0.88622, -0.46326 - 0x3fec61bf777fcc48, 0xbfdd8fc423c62a25, // 0.88693, -0.4619 - 0x3fec678b3488739b, 0xbfdd79775b86e389, // 0.88764, -0.46054 - 0x3fec6d5290341eb2, 0xbfdd632607ac9aa9, // 0.88835, -0.45918 - 0x3fec7315899eaad7, 0xbfdd4cd02ba8609c, // 0.88905, -0.45781 - 0x3fec78d41fe4a267, 0xbfdd3675caebf962, // 0.88975, -0.45645 - 0x3fec7e8e52233cf3, 0xbfdd2016e8e9db5b, // 0.89045, -0.45508 - 0x3fec84441f785f61, 0xbfdd09b389152ec1, // 0.89115, -0.45372 - 0x3fec89f587029c13, 0xbfdcf34baee1cd21, // 0.89184, -0.45235 - 0x3fec8fa287e13305, 0xbfdcdcdf5dc440ce, // 0.89253, -0.45098 - 0x3fec954b213411f5, 0xbfdcc66e9931c45d, // 0.89322, -0.44961 - 0x3fec9aef521bd480, 0xbfdcaff964a0421d, // 0.89391, -0.44824 - 0x3feca08f19b9c449, 0xbfdc997fc3865388, // 0.8946, -0.44687 - 0x3feca62a772fd919, 0xbfdc8301b95b40c2, // 0.89528, -0.4455 - 0x3fecabc169a0b901, 0xbfdc6c7f4997000a, // 0.89597, -0.44412 - 0x3fecb153f02fb87d, 0xbfdc55f877b23537, // 0.89665, -0.44275 - 0x3fecb6e20a00da99, 0xbfdc3f6d47263129, // 0.89732, -0.44137 - 0x3fecbc6bb638d10b, 0xbfdc28ddbb6cf145, // 0.898, -0.43999 - 0x3fecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // 0.89867, -0.43862 - 0x3fecc771c2736c09, 0xbfdbfbb1a05e0edc, // 0.89935, -0.43724 - 0x3fecccee20c2de9f, 0xbfdbe51517ffc0d9, // 0.90002, -0.43586 - 0x3fecd2660e12c1e6, 0xbfdbce744262deee, // 0.90068, -0.43448 - 0x3fecd7d9898b32f6, 0xbfdbb7cf2304bd01, // 0.90135, -0.43309 - 0x3fecdd489254fe65, 0xbfdba125bd63583e, // 0.90201, -0.43171 - 0x3fece2b32799a060, 0xbfdb8a7814fd5693, // 0.90267, -0.43033 - 0x3fece819488344ce, 0xbfdb73c62d520624, // 0.90333, -0.42894 - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756 - 0x3fecf2d829f1b40e, 0xbfdb4655ae2bf757, // 0.90464, -0.42617 - 0x3fecf830e8ce467b, 0xbfdb2f971db31972, // 0.9053, -0.42478 - 0x3fecfd852fff6ad4, 0xbfdb18d45bf8aca6, // 0.90595, -0.42339 - 0x3fed02d4feb2bd92, 0xbfdb020d6c7f4009, // 0.9066, -0.422 - 0x3fed082054168bac, 0xbfdaeb4252ca07ab, // 0.90724, -0.42061 - 0x3fed0d672f59d2b9, 0xbfdad473125cdc08, // 0.90789, -0.41922 - 0x3fed12a98fac410c, 0xbfdabd9faebc3980, // 0.90853, -0.41782 - 0x3fed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // 0.90917, -0.41643 - 0x3fed1d20dc40c15c, 0xbfda8fec8bf5b166, // 0.90981, -0.41503 - 0x3fed2255c6e5a4e1, 0xbfda790cd3dbf31a, // 0.91044, -0.41364 - 0x3fed2786335f52fc, 0xbfda622906a70b63, // 0.91107, -0.41224 - 0x3fed2cb220e0ef9f, 0xbfda4b4127dea1e4, // 0.91171, -0.41084 - 0x3fed31d98e9e503a, 0xbfda34553b0afee5, // 0.91234, -0.40944 - 0x3fed36fc7bcbfbdc, 0xbfda1d6543b50ac0, // 0.91296, -0.40804 - 0x3fed3c1ae79f2b4e, 0xbfda067145664d57, // 0.91359, -0.40664 - 0x3fed4134d14dc93a, 0xbfd9ef7943a8ed8a, // 0.91421, -0.40524 - 0x3fed464a380e7242, 0xbfd9d87d4207b0ab, // 0.91483, -0.40384 - 0x3fed4b5b1b187524, 0xbfd9c17d440df9f2, // 0.91545, -0.40243 - 0x3fed506779a3d2d9, 0xbfd9aa794d47c9ee, // 0.91606, -0.40103 - 0x3fed556f52e93eb1, 0xbfd993716141bdfe, // 0.91668, -0.39962 - 0x3fed5a72a6221e73, 0xbfd97c6583890fc2, // 0.91729, -0.39822 - 0x3fed5f7172888a7f, 0xbfd96555b7ab948f, // 0.9179, -0.39681 - 0x3fed646bb7574de5, 0xbfd94e420137bce3, // 0.91851, -0.3954 - 0x3fed696173c9e68b, 0xbfd9372a63bc93d7, // 0.91911, -0.39399 - 0x3fed6e52a71c8547, 0xbfd9200ee2c9be97, // 0.91972, -0.39258 - 0x3fed733f508c0dff, 0xbfd908ef81ef7bd1, // 0.92032, -0.39117 - 0x3fed78276f5617c6, 0xbfd8f1cc44bea329, // 0.92092, -0.38976 - 0x3fed7d0b02b8ecf9, 0xbfd8daa52ec8a4af, // 0.92151, -0.38835 - 0x3fed81ea09f38b63, 0xbfd8c37a439f884f, // 0.92211, -0.38693 - 0x3fed86c48445a450, 0xbfd8ac4b86d5ed44, // 0.9227, -0.38552 - 0x3fed8b9a70ef9cb4, 0xbfd89518fbff098e, // 0.92329, -0.3841 - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268 - 0x3fed95389e50429b, 0xbfd866a88a792ea0, // 0.92447, -0.38127 - 0x3fed9a00dd8b3d46, 0xbfd84f6aaaf3903f, // 0.92505, -0.37985 - 0x3fed9ec48c26b1f3, 0xbfd838290bb359c8, // 0.92563, -0.37843 - 0x3feda383a9668988, 0xbfd820e3b04eaac4, // 0.92621, -0.37701 - 0x3feda83e348f613b, 0xbfd8099a9c5c362d, // 0.92679, -0.37559 - 0x3fedacf42ce68ab9, 0xbfd7f24dd37341e3, // 0.92736, -0.37416 - 0x3fedb1a591b20c38, 0xbfd7dafd592ba621, // 0.92794, -0.37274 - 0x3fedb6526238a09b, 0xbfd7c3a9311dcce7, // 0.92851, -0.37132 - 0x3fedbafa9dc1b78d, 0xbfd7ac515ee2b172, // 0.92907, -0.36989 - 0x3fedbf9e4395759a, 0xbfd794f5e613dfae, // 0.92964, -0.36847 - 0x3fedc43d52fcb453, 0xbfd77d96ca4b73a6, // 0.93021, -0.36704 - 0x3fedc8d7cb410260, 0xbfd766340f2418f6, // 0.93077, -0.36561 - 0x3fedcd6dabaca3a5, 0xbfd74ecdb8390a3e, // 0.93133, -0.36418 - 0x3fedd1fef38a915a, 0xbfd73763c9261092, // 0.93188, -0.36276 - 0x3fedd68ba2267a25, 0xbfd71ff6458782ec, // 0.93244, -0.36133 - 0x3feddb13b6ccc23d, 0xbfd7088530fa459e, // 0.93299, -0.3599 - 0x3feddf9730ca837b, 0xbfd6f1108f1bc9c5, // 0.93354, -0.35846 - 0x3fede4160f6d8d81, 0xbfd6d998638a0cb5, // 0.93409, -0.35703 - 0x3fede890520465ce, 0xbfd6c21cb1e39771, // 0.93464, -0.3556 - 0x3feded05f7de47da, 0xbfd6aa9d7dc77e16, // 0.93518, -0.35416 - 0x3fedf177004b2534, 0xbfd6931acad55f51, // 0.93573, -0.35273 - 0x3fedf5e36a9ba59c, 0xbfd67b949cad63ca, // 0.93627, -0.35129 - 0x3fedfa4b3621271d, 0xbfd6640af6f03d9e, // 0.9368, -0.34986 - 0x3fedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // 0.93734, -0.34842 - 0x3fee030cee1435b8, 0xbfd634ed533be58e, // 0.93787, -0.34698 - 0x3fee0766d9280f54, 0xbfd61d595c88c203, // 0.9384, -0.34554 - 0x3fee0bbc22bd8349, 0xbfd605c1fcc88f63, // 0.93893, -0.3441 - 0x3fee100cca2980ac, 0xbfd5ee27379ea693, // 0.93946, -0.34266 - 0x3fee1458cec1ad83, 0xbfd5d68910aee686, // 0.93998, -0.34122 - 0x3fee18a02fdc66d9, 0xbfd5bee78b9db3b6, // 0.94051, -0.33978 - 0x3fee1ce2ecd0c0d8, 0xbfd5a742ac0ff78d, // 0.94103, -0.33833 - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689 - 0x3fee255a77a63bb8, 0xbfd577eeec151e47, // 0.94206, -0.33545 - 0x3fee298f4439197a, 0xbfd5604012f467b4, // 0.94257, -0.334 - 0x3fee2dbf6a0911d9, 0xbfd5488dedeff3be, // 0.94308, -0.33255 - 0x3fee31eae870ce25, 0xbfd530d880af3c24, // 0.94359, -0.33111 - 0x3fee3611becbaf69, 0xbfd5191fceda3c35, // 0.9441, -0.32966 - 0x3fee3a33ec75ce85, 0xbfd50163dc197047, // 0.9446, -0.32821 - 0x3fee3e5170cbfc46, 0xbfd4e9a4ac15d520, // 0.94511, -0.32676 - 0x3fee426a4b2bc17e, 0xbfd4d1e24278e76a, // 0.94561, -0.32531 - 0x3fee467e7af35f23, 0xbfd4ba1ca2eca31c, // 0.94611, -0.32386 - 0x3fee4a8dff81ce5e, 0xbfd4a253d11b82f3, // 0.9466, -0.32241 - 0x3fee4e98d836c0af, 0xbfd48a87d0b07fd7, // 0.94709, -0.32096 - 0x3fee529f04729ffc, 0xbfd472b8a5571054, // 0.94759, -0.3195 - 0x3fee56a083968eb1, 0xbfd45ae652bb2800, // 0.94807, -0.31805 - 0x3fee5a9d550467d3, 0xbfd44310dc8936f0, // 0.94856, -0.31659 - 0x3fee5e95781ebf1c, 0xbfd42b38466e2928, // 0.94905, -0.31514 - 0x3fee6288ec48e112, 0xbfd4135c94176602, // 0.94953, -0.31368 - 0x3fee6677b0e6d31e, 0xbfd3fb7dc932cfa4, // 0.95001, -0.31222 - 0x3fee6a61c55d53a7, 0xbfd3e39be96ec271, // 0.95049, -0.31077 - 0x3fee6e472911da27, 0xbfd3cbb6f87a146e, // 0.95096, -0.30931 - 0x3fee7227db6a9744, 0xbfd3b3cefa0414b7, // 0.95144, -0.30785 - 0x3fee7603dbce74e9, 0xbfd39be3f1bc8aef, // 0.95191, -0.30639 - 0x3fee79db29a5165a, 0xbfd383f5e353b6aa, // 0.95238, -0.30493 - 0x3fee7dadc456d850, 0xbfd36c04d27a4edf, // 0.95284, -0.30347 - 0x3fee817bab4cd10d, 0xbfd35410c2e18152, // 0.95331, -0.30201 - 0x3fee8544ddf0d075, 0xbfd33c19b83af207, // 0.95377, -0.30054 - 0x3fee89095bad6025, 0xbfd3241fb638baaf, // 0.95423, -0.29908 - 0x3fee8cc923edc388, 0xbfd30c22c08d6a13, // 0.95469, -0.29762 - 0x3fee9084361df7f3, 0xbfd2f422daec0386, // 0.95514, -0.29615 - 0x3fee943a91aab4b4, 0xbfd2dc200907fe51, // 0.95559, -0.29469 - 0x3fee97ec36016b30, 0xbfd2c41a4e954520, // 0.95605, -0.29322 - 0x3fee9b99229046f8, 0xbfd2ac11af483572, // 0.95649, -0.29175 - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028 - 0x3feea2e4d212c000, 0xbfd27bf7d0f2c346, // 0.95738, -0.28882 - 0x3feea68393e65800, 0xbfd263e6995554ba, // 0.95783, -0.28735 - 0x3feeaa1d9bb20af3, 0xbfd24bd28bb37672, // 0.95827, -0.28588 - 0x3feeadb2e8e7a88e, 0xbfd233bbabc3bb72, // 0.9587, -0.28441 - 0x3feeb1437af9bb34, 0xbfd21ba1fd3d2623, // 0.95914, -0.28294 - 0x3feeb4cf515b8811, 0xbfd2038583d727bd, // 0.95957, -0.28146 - 0x3feeb8566b810f2a, 0xbfd1eb6643499fbb, // 0.96, -0.27999 - 0x3feebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // 0.96043, -0.27852 - 0x3feebf5668eaf2ef, 0xbfd1bb1f7b999480, // 0.96086, -0.27705 - 0x3feec2cf4b1af6b2, 0xbfd1a2f7fbe8f243, // 0.96128, -0.27557 - 0x3feec6436ee60309, 0xbfd18acdc3f4873a, // 0.9617, -0.2741 - 0x3feec9b2d3c3bf84, 0xbfd172a0d7765177, // 0.96212, -0.27262 - 0x3feecd1d792c8f10, 0xbfd15a713a28b9d9, // 0.96254, -0.27115 - 0x3feed0835e999009, 0xbfd1423eefc69378, // 0.96295, -0.26967 - 0x3feed3e483849c51, 0xbfd12a09fc0b1b12, // 0.96337, -0.26819 - 0x3feed740e7684963, 0xbfd111d262b1f677, // 0.96378, -0.26671 - 0x3feeda9889bfe86a, 0xbfd0f998277733f7, // 0.96418, -0.26523 - 0x3feeddeb6a078651, 0xbfd0e15b4e1749cd, // 0.96459, -0.26375 - 0x3feee13987bbebdc, 0xbfd0c91bda4f158d, // 0.96499, -0.26227 - 0x3feee482e25a9dbc, 0xbfd0b0d9cfdbdb90, // 0.96539, -0.26079 - 0x3feee7c77961dc9e, 0xbfd09895327b465e, // 0.96579, -0.25931 - 0x3feeeb074c50a544, 0xbfd0804e05eb661e, // 0.96619, -0.25783 - 0x3feeee425aa6b09a, 0xbfd068044deab002, // 0.96658, -0.25635 - 0x3feef178a3e473c2, 0xbfd04fb80e37fdae, // 0.96698, -0.25487 - 0x3feef4aa278b2032, 0xbfd037694a928cac, // 0.96737, -0.25338 - 0x3feef7d6e51ca3c0, 0xbfd01f1806b9fdd2, // 0.96775, -0.2519 - 0x3feefafedc1ba8b7, 0xbfd006c4466e54af, // 0.96814, -0.25041 - 0x3feefe220c0b95ec, 0xbfcfdcdc1adfedf8, // 0.96852, -0.24893 - 0x3fef014074708ed3, 0xbfcfac2abeff57ff, // 0.9689, -0.24744 - 0x3fef045a14cf738c, 0xbfcf7b7480bd3801, // 0.96928, -0.24596 - 0x3fef076eecade0fa, 0xbfcf4ab9679c9f5c, // 0.96966, -0.24447 - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298 - 0x3fef0d8a410379c5, 0xbfcee934c2d006c7, // 0.9704, -0.24149 - 0x3fef1090bc898f5f, 0xbfceb86b462de348, // 0.97077, -0.24 - 0x3fef13926dad024e, 0xbfce879d0cc0fdaf, // 0.97114, -0.23851 - 0x3fef168f53f7205d, 0xbfce56ca1e101a1b, // 0.9715, -0.23702 - 0x3fef19876ef1f486, 0xbfce25f281a2b684, // 0.97187, -0.23553 - 0x3fef1c7abe284708, 0xbfcdf5163f01099a, // 0.97223, -0.23404 - 0x3fef1f6941259d7a, 0xbfcdc4355db40195, // 0.97258, -0.23255 - 0x3fef2252f7763ada, 0xbfcd934fe5454311, // 0.97294, -0.23106 - 0x3fef2537e0a71f9f, 0xbfcd6265dd3f27e3, // 0.97329, -0.22957 - 0x3fef2817fc4609ce, 0xbfcd31774d2cbdee, // 0.97364, -0.22807 - 0x3fef2af349e17507, 0xbfcd00843c99c5f9, // 0.97399, -0.22658 - 0x3fef2dc9c9089a9d, 0xbfcccf8cb312b286, // 0.97434, -0.22508 - 0x3fef309b794b719f, 0xbfcc9e90b824a6a9, // 0.97468, -0.22359 - 0x3fef33685a3aaef0, 0xbfcc6d90535d74dc, // 0.97503, -0.22209 - 0x3fef36306b67c556, 0xbfcc3c8b8c4b9dd7, // 0.97536, -0.2206 - 0x3fef38f3ac64e589, 0xbfcc0b826a7e4f63, // 0.9757, -0.2191 - 0x3fef3bb21cc4fe47, 0xbfcbda74f5856330, // 0.97604, -0.2176 - 0x3fef3e6bbc1bbc65, 0xbfcba96334f15dad, // 0.97637, -0.21611 - 0x3fef412089fd8adc, 0xbfcb784d30536cda, // 0.9767, -0.21461 - 0x3fef43d085ff92dd, 0xbfcb4732ef3d6722, // 0.97703, -0.21311 - 0x3fef467bafb7bbe0, 0xbfcb16147941ca2a, // 0.97735, -0.21161 - 0x3fef492206bcabb4, 0xbfcae4f1d5f3b9ab, // 0.97768, -0.21011 - 0x3fef4bc38aa5c694, 0xbfcab3cb0ce6fe44, // 0.978, -0.20861 - 0x3fef4e603b0b2f2d, 0xbfca82a025b00451, // 0.97832, -0.20711 - 0x3fef50f81785c6b9, 0xbfca517127e3dabc, // 0.97863, -0.20561 - 0x3fef538b1faf2d07, 0xbfca203e1b1831da, // 0.97895, -0.20411 - 0x3fef56195321c090, 0xbfc9ef0706e35a35, // 0.97926, -0.20261 - 0x3fef58a2b1789e84, 0xbfc9bdcbf2dc4366, // 0.97957, -0.2011 - 0x3fef5b273a4fa2d9, 0xbfc98c8ce69a7aec, // 0.97988, -0.1996 - 0x3fef5da6ed43685d, 0xbfc95b49e9b62af9, // 0.98018, -0.1981 - 0x3fef6021c9f148c2, 0xbfc92a0303c8194f, // 0.98048, -0.19659 - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509 - 0x3fef6508fef47bd5, 0xbfc8c7699b34ca7e, // 0.98108, -0.19359 - 0x3fef677556883cee, 0xbfc8961727c41804, // 0.98138, -0.19208 - 0x3fef69dcd652f5de, 0xbfc864c0e9b2b6cf, // 0.98167, -0.19057 - 0x3fef6c3f7df5bbb7, 0xbfc83366e89c64c5, // 0.98196, -0.18907 - 0x3fef6e9d4d1262ca, 0xbfc802092c1d744b, // 0.98225, -0.18756 - 0x3fef70f6434b7eb7, 0xbfc7d0a7bbd2cb1b, // 0.98254, -0.18606 - 0x3fef734a60446279, 0xbfc79f429f59e11d, // 0.98282, -0.18455 - 0x3fef7599a3a12077, 0xbfc76dd9de50bf31, // 0.98311, -0.18304 - 0x3fef77e40d068a90, 0xbfc73c6d8055fe0a, // 0.98339, -0.18153 - 0x3fef7a299c1a322a, 0xbfc70afd8d08c4ff, // 0.98366, -0.18002 - 0x3fef7c6a50826840, 0xbfc6d98a0c08c8da, // 0.98394, -0.17851 - 0x3fef7ea629e63d6e, 0xbfc6a81304f64ab2, // 0.98421, -0.177 - 0x3fef80dd27ed8204, 0xbfc676987f7216b8, // 0.98448, -0.17549 - 0x3fef830f4a40c60c, 0xbfc6451a831d830d, // 0.98475, -0.17398 - 0x3fef853c9089595e, 0xbfc61399179a6e94, // 0.98501, -0.17247 - 0x3fef8764fa714ba9, 0xbfc5e214448b3fc6, // 0.98528, -0.17096 - 0x3fef898887a36c84, 0xbfc5b08c1192e381, // 0.98554, -0.16945 - 0x3fef8ba737cb4b78, 0xbfc57f008654cbde, // 0.9858, -0.16794 - 0x3fef8dc10a95380d, 0xbfc54d71aa74ef02, // 0.98605, -0.16643 - 0x3fef8fd5ffae41db, 0xbfc51bdf8597c5f2, // 0.98631, -0.16491 - 0x3fef91e616c43891, 0xbfc4ea4a1f624b61, // 0.98656, -0.1634 - 0x3fef93f14f85ac08, 0xbfc4b8b17f79fa88, // 0.98681, -0.16189 - 0x3fef95f7a9a1ec47, 0xbfc48715ad84cdf5, // 0.98706, -0.16037 - 0x3fef97f924c9099b, 0xbfc45576b1293e5a, // 0.9873, -0.15886 - 0x3fef99f5c0abd496, 0xbfc423d4920e4166, // 0.98754, -0.15734 - 0x3fef9bed7cfbde29, 0xbfc3f22f57db4893, // 0.98778, -0.15583 - 0x3fef9de0596b77a3, 0xbfc3c0870a383ff6, // 0.98802, -0.15431 - 0x3fef9fce55adb2c8, 0xbfc38edbb0cd8d14, // 0.98826, -0.1528 - 0x3fefa1b7717661d5, 0xbfc35d2d53440db2, // 0.98849, -0.15128 - 0x3fefa39bac7a1791, 0xbfc32b7bf94516a7, // 0.98872, -0.14976 - 0x3fefa57b066e2754, 0xbfc2f9c7aa7a72af, // 0.98895, -0.14825 - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673 - 0x3fefa92b1600657c, 0xbfc296564d2b953e, // 0.9894, -0.14521 - 0x3fefaafbcb0cfddc, 0xbfc264994dfd340a, // 0.98962, -0.1437 - 0x3fefacc79de6c44f, 0xbfc232d978aed413, // 0.98984, -0.14218 - 0x3fefae8e8e46cfbb, 0xbfc20116d4ec7bce, // 0.99006, -0.14066 - 0x3fefb0509be6f7db, 0xbfc1cf516a62a077, // 0.99027, -0.13914 - 0x3fefb20dc681d54d, 0xbfc19d8940be24e7, // 0.99049, -0.13762 - 0x3fefb3c60dd2c199, 0xbfc16bbe5fac5865, // 0.9907, -0.1361 - 0x3fefb5797195d741, 0xbfc139f0cedaf576, // 0.9909, -0.13458 - 0x3fefb727f187f1c7, 0xbfc1082095f820b0, // 0.99111, -0.13306 - 0x3fefb8d18d66adb7, 0xbfc0d64dbcb26786, // 0.99131, -0.13154 - 0x3fefba7644f068b5, 0xbfc0a4784ab8bf1d, // 0.99151, -0.13002 - 0x3fefbc1617e44186, 0xbfc072a047ba831d, // 0.99171, -0.1285 - 0x3fefbdb106021816, 0xbfc040c5bb67747e, // 0.99191, -0.12698 - 0x3fefbf470f0a8d88, 0xbfc00ee8ad6fb85b, // 0.9921, -0.12545 - 0x3fefc0d832bf043a, 0xbfbfba124b07ad85, // 0.99229, -0.12393 - 0x3fefc26470e19fd3, 0xbfbf564e56a9730e, // 0.99248, -0.12241 - 0x3fefc3ebc935454c, 0xbfbef2858d27561b, // 0.99267, -0.12089 - 0x3fefc56e3b7d9af6, 0xbfbe8eb7fde4aa3e, // 0.99285, -0.11937 - 0x3fefc6ebc77f0887, 0xbfbe2ae5b8457f77, // 0.99303, -0.11784 - 0x3fefc8646cfeb721, 0xbfbdc70ecbae9fc8, // 0.99321, -0.11632 - 0x3fefc9d82bc2915e, 0xbfbd633347858ce4, // 0.99339, -0.11479 - 0x3fefcb4703914354, 0xbfbcff533b307dc1, // 0.99356, -0.11327 - 0x3fefccb0f4323aa3, 0xbfbc9b6eb6165c42, // 0.99374, -0.11175 - 0x3fefce15fd6da67b, 0xbfbc3785c79ec2d5, // 0.99391, -0.11022 - 0x3fefcf761f0c77a3, 0xbfbbd3987f31fa0e, // 0.99407, -0.1087 - 0x3fefd0d158d86087, 0xbfbb6fa6ec38f64c, // 0.99424, -0.10717 - 0x3fefd227aa9bd53b, 0xbfbb0bb11e1d5559, // 0.9944, -0.10565 - 0x3fefd37914220b84, 0xbfbaa7b724495c04, // 0.99456, -0.10412 - 0x3fefd4c59536fae4, 0xbfba43b90e27f3c4, // 0.99472, -0.1026 - 0x3fefd60d2da75c9e, 0xbfb9dfb6eb24a85c, // 0.99488, -0.10107 - 0x3fefd74fdd40abbf, 0xbfb97bb0caaba56f, // 0.99503, -0.099544 - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518, -0.098017 - 0x3fefd9c68127c78c, 0xbfb8b398cf0c38e0, // 0.99533, -0.09649 - 0x3fefdafa7514538c, 0xbfb84f8712c130a0, // 0.99548, -0.094963 - 0x3fefdc297f674ba9, 0xbfb7eb7196b72ee4, // 0.99563, -0.093436 - 0x3fefdd539ff1f456, 0xbfb787586a5d5b21, // 0.99577, -0.091909 - 0x3fefde78d68653fd, 0xbfb7233b9d236e71, // 0.99591, -0.090381 - 0x3fefdf9922f73307, 0xbfb6bf1b3e79b129, // 0.99604, -0.088854 - 0x3fefe0b485181be3, 0xbfb65af75dd0f87b, // 0.99618, -0.087326 - 0x3fefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // 0.99631, -0.085797 - 0x3fefe2dc89bbff08, 0xbfb592a554489bc8, // 0.99644, -0.084269 - 0x3fefe3e92be9d886, 0xbfb52e774a4d4d0a, // 0.99657, -0.08274 - 0x3fefe4f0e31d7a4a, 0xbfb4ca45fc1ba8b6, // 0.9967, -0.081211 - 0x3fefe5f3af2e3940, 0xbfb4661179272096, // 0.99682, -0.079682 - 0x3fefe6f18ff42c84, 0xbfb401d9d0e3a507, // 0.99694, -0.078153 - 0x3fefe7ea85482d60, 0xbfb39d9f12c5a299, // 0.99706, -0.076624 - 0x3fefe8de8f03d75c, 0xbfb339614e41ffa5, // 0.99718, -0.075094 - 0x3fefe9cdad01883a, 0xbfb2d52092ce19f6, // 0.99729, -0.073565 - 0x3fefeab7df1c6005, 0xbfb270dcefdfc45b, // 0.9974, -0.072035 - 0x3fefeb9d2530410f, 0xbfb20c9674ed444c, // 0.99751, -0.070505 - 0x3fefec7d7f19cffc, 0xbfb1a84d316d4f8a, // 0.99762, -0.068974 - 0x3fefed58ecb673c4, 0xbfb1440134d709b2, // 0.99772, -0.067444 - 0x3fefee2f6de455ba, 0xbfb0dfb28ea201e6, // 0.99783, -0.065913 - 0x3fefef0102826191, 0xbfb07b614e463064, // 0.99793, -0.064383 - 0x3fefefcdaa704562, 0xbfb0170d833bf421, // 0.99802, -0.062852 - 0x3feff095658e71ad, 0xbfaf656e79f820e0, // 0.99812, -0.061321 - 0x3feff15833be1965, 0xbfae9cbd15ff5527, // 0.99821, -0.05979 - 0x3feff21614e131ed, 0xbfadd406f9808ec8, // 0.9983, -0.058258 - 0x3feff2cf08da7321, 0xbfad0b4c436f91d0, // 0.99839, -0.056727 - 0x3feff3830f8d575c, 0xbfac428d12c0d7e3, // 0.99848, -0.055195 - 0x3feff43228de1b77, 0xbfab79c986698b78, // 0.99856, -0.053664 - 0x3feff4dc54b1bed3, 0xbfaab101bd5f8317, // 0.99864, -0.052132 - 0x3feff58192ee0358, 0xbfa9e835d6993c87, // 0.99872, -0.0506 - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988, -0.049068 - 0x3feff6bd463b444d, 0xbfa856922bb513c1, // 0.99887, -0.047535 - 0x3feff753bb1b9164, 0xbfa78dbaa5874685, // 0.99894, -0.046003 - 0x3feff7e5420320f9, 0xbfa6c4df7d7d5b84, // 0.99901, -0.044471 - 0x3feff871dadb81df, 0xbfa5fc00d290cd43, // 0.99908, -0.042938 - 0x3feff8f9858f058b, 0xbfa5331ec3bba0eb, // 0.99914, -0.041406 - 0x3feff97c4208c014, 0xbfa46a396ff86179, // 0.9992, -0.039873 - 0x3feff9fa10348837, 0xbfa3a150f6421afc, // 0.99926, -0.03834 - 0x3feffa72effef75d, 0xbfa2d865759455cd, // 0.99932, -0.036807 - 0x3feffae6e1556998, 0xbfa20f770ceb11c6, // 0.99938, -0.035274 - 0x3feffb55e425fdae, 0xbfa14685db42c17e, // 0.99943, -0.033741 - 0x3feffbbff85f9515, 0xbfa07d91ff984580, // 0.99948, -0.032208 - 0x3feffc251df1d3f8, 0xbf9f693731d1cf01, // 0.99953, -0.030675 - 0x3feffc8554cd213a, 0xbf9dd7458c64ab39, // 0.99958, -0.029142 - 0x3feffce09ce2a679, 0xbf9c454f4ce53b1c, // 0.99962, -0.027608 - 0x3feffd36f624500c, 0xbf9ab354b1504fca, // 0.99966, -0.026075 - 0x3feffd886084cd0d, 0xbf992155f7a3667e, // 0.9997, -0.024541 - 0x3feffdd4dbf78f52, 0xbf978f535ddc9f03, // 0.99974, -0.023008 - 0x3feffe1c6870cb77, 0xbf95fd4d21fab226, // 0.99977, -0.021474 - 0x3feffe5f05e578db, 0xbf946b4381fce81c, // 0.9998, -0.01994 - 0x3feffe9cb44b51a1, 0xbf92d936bbe30efd, // 0.99983, -0.018407 - 0x3feffed57398d2b7, 0xbf9147270dad7132, // 0.99986, -0.016873 - 0x3fefff0943c53bd1, 0xbf8f6a296ab997ca, // 0.99988, -0.015339 - 0x3fefff3824c88f6f, 0xbf8c45ffe1e48ad9, // 0.9999, -0.013805 - 0x3fefff62169b92db, 0xbf8921d1fcdec784, // 0.99992, -0.012272 - 0x3fefff871937ce2f, 0xbf85fda037ac05e0, // 0.99994, -0.010738 - 0x3fefffa72c978c4f, 0xbf82d96b0e509703, // 0.99996,-0.0092038 - 0x3fefffc250b5daef, 0xbf7f6a65f9a2a3c5, // 0.99997,-0.0076698 - 0x3fefffd8858e8a92, 0xbf7921f0fe670071, // 0.99998,-0.0061359 - 0x3fefffe9cb1e2e8d, 0xbf72d97822f996bc, // 0.99999,-0.0046019 - 0x3feffff621621d02, 0xbf6921f8becca4ba, // 1, -0.003068 - 0x3feffffd88586ee6, 0xbf5921faaee6472d, // 1, -0.001534 - - -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) -/** - @par - Example code for Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i < N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 16, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const float32_t twiddleCoef_16[32] = { - 1.000000000f, 0.000000000f, - 0.923879533f, 0.382683432f, - 0.707106781f, 0.707106781f, - 0.382683432f, 0.923879533f, - 0.000000000f, 1.000000000f, - -0.382683432f, 0.923879533f, - -0.707106781f, 0.707106781f, - -0.923879533f, 0.382683432f, - -1.000000000f, 0.000000000f, - -0.923879533f, -0.382683432f, - -0.707106781f, -0.707106781f, - -0.382683432f, -0.923879533f, - -0.000000000f, -1.000000000f, - 0.382683432f, -0.923879533f, - 0.707106781f, -0.707106781f, - 0.923879533f, -0.382683432f -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32) - -/** - @par - Example code for Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 32, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const float32_t twiddleCoef_32[64] = { - 1.000000000f, 0.000000000f, - 0.980785280f, 0.195090322f, - 0.923879533f, 0.382683432f, - 0.831469612f, 0.555570233f, - 0.707106781f, 0.707106781f, - 0.555570233f, 0.831469612f, - 0.382683432f, 0.923879533f, - 0.195090322f, 0.980785280f, - 0.000000000f, 1.000000000f, - -0.195090322f, 0.980785280f, - -0.382683432f, 0.923879533f, - -0.555570233f, 0.831469612f, - -0.707106781f, 0.707106781f, - -0.831469612f, 0.555570233f, - -0.923879533f, 0.382683432f, - -0.980785280f, 0.195090322f, - -1.000000000f, 0.000000000f, - -0.980785280f, -0.195090322f, - -0.923879533f, -0.382683432f, - -0.831469612f, -0.555570233f, - -0.707106781f, -0.707106781f, - -0.555570233f, -0.831469612f, - -0.382683432f, -0.923879533f, - -0.195090322f, -0.980785280f, - -0.000000000f, -1.000000000f, - 0.195090322f, -0.980785280f, - 0.382683432f, -0.923879533f, - 0.555570233f, -0.831469612f, - 0.707106781f, -0.707106781f, - 0.831469612f, -0.555570233f, - 0.923879533f, -0.382683432f, - 0.980785280f, -0.195090322f -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) -/** - @par - Example code for Floating-point Twiddle factors Generation: - @par - 
for(i = 0; i < N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 64, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const float32_t twiddleCoef_64[128] = { - 1.000000000f, 0.000000000f, - 0.995184727f, 0.098017140f, - 0.980785280f, 0.195090322f, - 0.956940336f, 0.290284677f, - 0.923879533f, 0.382683432f, - 0.881921264f, 0.471396737f, - 0.831469612f, 0.555570233f, - 0.773010453f, 0.634393284f, - 0.707106781f, 0.707106781f, - 0.634393284f, 0.773010453f, - 0.555570233f, 0.831469612f, - 0.471396737f, 0.881921264f, - 0.382683432f, 0.923879533f, - 0.290284677f, 0.956940336f, - 0.195090322f, 0.980785280f, - 0.098017140f, 0.995184727f, - 0.000000000f, 1.000000000f, - -0.098017140f, 0.995184727f, - -0.195090322f, 0.980785280f, - -0.290284677f, 0.956940336f, - -0.382683432f, 0.923879533f, - -0.471396737f, 0.881921264f, - -0.555570233f, 0.831469612f, - -0.634393284f, 0.773010453f, - -0.707106781f, 0.707106781f, - -0.773010453f, 0.634393284f, - -0.831469612f, 0.555570233f, - -0.881921264f, 0.471396737f, - -0.923879533f, 0.382683432f, - -0.956940336f, 0.290284677f, - -0.980785280f, 0.195090322f, - -0.995184727f, 0.098017140f, - -1.000000000f, 0.000000000f, - -0.995184727f, -0.098017140f, - -0.980785280f, -0.195090322f, - -0.956940336f, -0.290284677f, - -0.923879533f, -0.382683432f, - -0.881921264f, -0.471396737f, - -0.831469612f, -0.555570233f, - -0.773010453f, -0.634393284f, - -0.707106781f, -0.707106781f, - -0.634393284f, -0.773010453f, - -0.555570233f, -0.831469612f, - -0.471396737f, -0.881921264f, - -0.382683432f, -0.923879533f, - -0.290284677f, -0.956940336f, - -0.195090322f, -0.980785280f, - -0.098017140f, -0.995184727f, - -0.000000000f, -1.000000000f, - 0.098017140f, -0.995184727f, - 0.195090322f, -0.980785280f, - 0.290284677f, -0.956940336f, - 0.382683432f, -0.923879533f, - 0.471396737f, -0.881921264f, - 0.555570233f, -0.831469612f, - 0.634393284f, -0.773010453f, - 0.707106781f, -0.707106781f, - 0.773010453f, -0.634393284f, - 0.831469612f, -0.555570233f, - 0.881921264f, -0.471396737f, - 0.923879533f, -0.382683432f, - 0.956940336f, -0.290284677f, - 0.980785280f, -0.195090322f, - 0.995184727f, -0.098017140f -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128) -/** - @par - Example code for Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 128, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const float32_t twiddleCoef_128[256] = { - 1.000000000f, 0.000000000f, - 0.998795456f, 0.049067674f, - 0.995184727f, 0.098017140f, - 0.989176510f, 0.146730474f, - 0.980785280f, 0.195090322f, - 0.970031253f, 0.242980180f, - 0.956940336f, 0.290284677f, - 0.941544065f, 0.336889853f, - 0.923879533f, 0.382683432f, - 0.903989293f, 0.427555093f, - 0.881921264f, 0.471396737f, - 0.857728610f, 0.514102744f, - 0.831469612f, 0.555570233f, - 0.803207531f, 0.595699304f, - 0.773010453f, 0.634393284f, - 0.740951125f, 0.671558955f, - 0.707106781f, 0.707106781f, - 0.671558955f, 0.740951125f, - 0.634393284f, 0.773010453f, - 0.595699304f, 0.803207531f, - 0.555570233f, 0.831469612f, - 0.514102744f, 0.857728610f, - 0.471396737f, 0.881921264f, - 0.427555093f, 0.903989293f, - 0.382683432f, 0.923879533f, - 0.336889853f, 0.941544065f, - 0.290284677f, 0.956940336f, - 0.242980180f, 0.970031253f, - 0.195090322f, 0.980785280f, - 0.146730474f, 0.989176510f, - 0.098017140f, 0.995184727f, - 0.049067674f, 0.998795456f, - 0.000000000f, 1.000000000f, - -0.049067674f, 0.998795456f, - -0.098017140f, 0.995184727f, - -0.146730474f, 0.989176510f, - -0.195090322f, 0.980785280f, - -0.242980180f, 0.970031253f, - -0.290284677f, 0.956940336f, - -0.336889853f, 0.941544065f, - -0.382683432f, 0.923879533f, - -0.427555093f, 0.903989293f, - -0.471396737f, 0.881921264f, - -0.514102744f, 0.857728610f, - -0.555570233f, 0.831469612f, - -0.595699304f, 0.803207531f, - -0.634393284f, 0.773010453f, - -0.671558955f, 0.740951125f, - -0.707106781f, 0.707106781f, - -0.740951125f, 0.671558955f, - -0.773010453f, 0.634393284f, - -0.803207531f, 0.595699304f, - -0.831469612f, 0.555570233f, - -0.857728610f, 0.514102744f, - -0.881921264f, 0.471396737f, - -0.903989293f, 0.427555093f, - -0.923879533f, 0.382683432f, - -0.941544065f, 0.336889853f, - -0.956940336f, 0.290284677f, - -0.970031253f, 0.242980180f, - -0.980785280f, 0.195090322f, - -0.989176510f, 0.146730474f, - -0.995184727f, 0.098017140f, - -0.998795456f, 0.049067674f, - -1.000000000f, 0.000000000f, - -0.998795456f, -0.049067674f, - -0.995184727f, -0.098017140f, - -0.989176510f, -0.146730474f, - -0.980785280f, -0.195090322f, - -0.970031253f, -0.242980180f, - -0.956940336f, -0.290284677f, - -0.941544065f, -0.336889853f, - -0.923879533f, -0.382683432f, - -0.903989293f, -0.427555093f, - -0.881921264f, -0.471396737f, - -0.857728610f, -0.514102744f, - -0.831469612f, -0.555570233f, - -0.803207531f, -0.595699304f, - -0.773010453f, -0.634393284f, - -0.740951125f, -0.671558955f, - -0.707106781f, -0.707106781f, - -0.671558955f, -0.740951125f, - -0.634393284f, -0.773010453f, - -0.595699304f, -0.803207531f, - -0.555570233f, -0.831469612f, - -0.514102744f, -0.857728610f, - -0.471396737f, -0.881921264f, - -0.427555093f, -0.903989293f, - -0.382683432f, -0.923879533f, - -0.336889853f, -0.941544065f, - -0.290284677f, -0.956940336f, - -0.242980180f, -0.970031253f, - -0.195090322f, -0.980785280f, - -0.146730474f, -0.989176510f, - -0.098017140f, -0.995184727f, - -0.049067674f, -0.998795456f, - -0.000000000f, -1.000000000f, - 0.049067674f, -0.998795456f, - 0.098017140f, -0.995184727f, - 0.146730474f, -0.989176510f, - 0.195090322f, -0.980785280f, - 0.242980180f, -0.970031253f, - 0.290284677f, -0.956940336f, - 0.336889853f, -0.941544065f, - 0.382683432f, -0.923879533f, - 0.427555093f, -0.903989293f, - 0.471396737f, -0.881921264f, - 0.514102744f, -0.857728610f, - 0.555570233f, -0.831469612f, - 0.595699304f, -0.803207531f, - 0.634393284f, -0.773010453f, - 0.671558955f, -0.740951125f, - 0.707106781f, -0.707106781f, - 0.740951125f, -0.671558955f, - 0.773010453f, -0.634393284f, - 0.803207531f, -0.595699304f, - 0.831469612f, -0.555570233f, - 0.857728610f, -0.514102744f, - 0.881921264f, -0.471396737f, - 0.903989293f, -0.427555093f, - 0.923879533f, -0.382683432f, - 0.941544065f, -0.336889853f, - 0.956940336f, -0.290284677f, - 0.970031253f, -0.242980180f, - 0.980785280f, -0.195090322f, - 0.989176510f, -0.146730474f, - 0.995184727f, -0.098017140f, - 0.998795456f, -0.049067674f -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) -/** - @par - Example code for Floating-point Twiddle factors Generation: - @par - 
for(i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 256, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const float32_t twiddleCoef_256[512] = { - 1.000000000f, 0.000000000f, - 0.999698819f, 0.024541229f, - 0.998795456f, 0.049067674f, - 0.997290457f, 0.073564564f, - 0.995184727f, 0.098017140f, - 0.992479535f, 0.122410675f, - 0.989176510f, 0.146730474f, - 0.985277642f, 0.170961889f, - 0.980785280f, 0.195090322f, - 0.975702130f, 0.219101240f, - 0.970031253f, 0.242980180f, - 0.963776066f, 0.266712757f, - 0.956940336f, 0.290284677f, - 0.949528181f, 0.313681740f, - 0.941544065f, 0.336889853f, - 0.932992799f, 0.359895037f, - 0.923879533f, 0.382683432f, - 0.914209756f, 0.405241314f, - 0.903989293f, 0.427555093f, - 0.893224301f, 0.449611330f, - 0.881921264f, 0.471396737f, - 0.870086991f, 0.492898192f, - 0.857728610f, 0.514102744f, - 0.844853565f, 0.534997620f, - 0.831469612f, 0.555570233f, - 0.817584813f, 0.575808191f, - 0.803207531f, 0.595699304f, - 0.788346428f, 0.615231591f, - 0.773010453f, 0.634393284f, - 0.757208847f, 0.653172843f, - 0.740951125f, 0.671558955f, - 0.724247083f, 0.689540545f, - 0.707106781f, 0.707106781f, - 0.689540545f, 0.724247083f, - 0.671558955f, 0.740951125f, - 0.653172843f, 0.757208847f, - 0.634393284f, 0.773010453f, - 0.615231591f, 0.788346428f, - 0.595699304f, 0.803207531f, - 0.575808191f, 0.817584813f, - 0.555570233f, 0.831469612f, - 0.534997620f, 0.844853565f, - 0.514102744f, 0.857728610f, - 0.492898192f, 0.870086991f, - 0.471396737f, 0.881921264f, - 0.449611330f, 0.893224301f, - 0.427555093f, 0.903989293f, - 0.405241314f, 0.914209756f, - 0.382683432f, 0.923879533f, - 0.359895037f, 0.932992799f, - 0.336889853f, 0.941544065f, - 0.313681740f, 0.949528181f, - 0.290284677f, 0.956940336f, - 0.266712757f, 0.963776066f, - 0.242980180f, 0.970031253f, - 0.219101240f, 0.975702130f, - 0.195090322f, 0.980785280f, - 0.170961889f, 0.985277642f, - 0.146730474f, 0.989176510f, - 0.122410675f, 0.992479535f, - 0.098017140f, 0.995184727f, - 0.073564564f, 0.997290457f, - 0.049067674f, 0.998795456f, - 0.024541229f, 0.999698819f, - 0.000000000f, 1.000000000f, - -0.024541229f, 0.999698819f, - -0.049067674f, 0.998795456f, - -0.073564564f, 0.997290457f, - -0.098017140f, 0.995184727f, - -0.122410675f, 0.992479535f, - -0.146730474f, 0.989176510f, - -0.170961889f, 0.985277642f, - -0.195090322f, 0.980785280f, - -0.219101240f, 0.975702130f, - -0.242980180f, 0.970031253f, - -0.266712757f, 0.963776066f, - -0.290284677f, 0.956940336f, - -0.313681740f, 0.949528181f, - -0.336889853f, 0.941544065f, - -0.359895037f, 0.932992799f, - -0.382683432f, 0.923879533f, - -0.405241314f, 0.914209756f, - -0.427555093f, 0.903989293f, - -0.449611330f, 0.893224301f, - -0.471396737f, 0.881921264f, - -0.492898192f, 0.870086991f, - -0.514102744f, 0.857728610f, - -0.534997620f, 0.844853565f, - -0.555570233f, 0.831469612f, - -0.575808191f, 0.817584813f, - -0.595699304f, 0.803207531f, - -0.615231591f, 0.788346428f, - -0.634393284f, 0.773010453f, - -0.653172843f, 0.757208847f, - -0.671558955f, 0.740951125f, - -0.689540545f, 0.724247083f, - -0.707106781f, 0.707106781f, - -0.724247083f, 0.689540545f, - -0.740951125f, 0.671558955f, - -0.757208847f, 0.653172843f, - -0.773010453f, 0.634393284f, - -0.788346428f, 0.615231591f, - -0.803207531f, 0.595699304f, - -0.817584813f, 0.575808191f, - -0.831469612f, 0.555570233f, - -0.844853565f, 0.534997620f, - -0.857728610f, 0.514102744f, - -0.870086991f, 0.492898192f, - -0.881921264f, 0.471396737f, - -0.893224301f, 0.449611330f, - -0.903989293f, 0.427555093f, - -0.914209756f, 0.405241314f, - -0.923879533f, 0.382683432f, - -0.932992799f, 0.359895037f, - -0.941544065f, 0.336889853f, - -0.949528181f, 0.313681740f, - -0.956940336f, 0.290284677f, - -0.963776066f, 0.266712757f, - -0.970031253f, 0.242980180f, - -0.975702130f, 0.219101240f, - -0.980785280f, 0.195090322f, - -0.985277642f, 0.170961889f, - -0.989176510f, 0.146730474f, - -0.992479535f, 0.122410675f, - -0.995184727f, 0.098017140f, - -0.997290457f, 0.073564564f, - -0.998795456f, 0.049067674f, - -0.999698819f, 0.024541229f, - -1.000000000f, 0.000000000f, - -0.999698819f, -0.024541229f, - -0.998795456f, -0.049067674f, - -0.997290457f, -0.073564564f, - -0.995184727f, -0.098017140f, - -0.992479535f, -0.122410675f, - -0.989176510f, -0.146730474f, - -0.985277642f, -0.170961889f, - -0.980785280f, -0.195090322f, - -0.975702130f, -0.219101240f, - -0.970031253f, -0.242980180f, - -0.963776066f, -0.266712757f, - -0.956940336f, -0.290284677f, - -0.949528181f, -0.313681740f, - -0.941544065f, -0.336889853f, - -0.932992799f, -0.359895037f, - -0.923879533f, -0.382683432f, - -0.914209756f, -0.405241314f, - -0.903989293f, -0.427555093f, - -0.893224301f, -0.449611330f, - -0.881921264f, -0.471396737f, - -0.870086991f, -0.492898192f, - -0.857728610f, -0.514102744f, - -0.844853565f, -0.534997620f, - -0.831469612f, -0.555570233f, - -0.817584813f, -0.575808191f, - -0.803207531f, -0.595699304f, - -0.788346428f, -0.615231591f, - -0.773010453f, -0.634393284f, - -0.757208847f, -0.653172843f, - -0.740951125f, -0.671558955f, - -0.724247083f, -0.689540545f, - -0.707106781f, -0.707106781f, - -0.689540545f, -0.724247083f, - -0.671558955f, -0.740951125f, - -0.653172843f, -0.757208847f, - -0.634393284f, -0.773010453f, - -0.615231591f, -0.788346428f, - -0.595699304f, -0.803207531f, - -0.575808191f, -0.817584813f, - -0.555570233f, -0.831469612f, - -0.534997620f, -0.844853565f, - -0.514102744f, -0.857728610f, - -0.492898192f, -0.870086991f, - -0.471396737f, -0.881921264f, - -0.449611330f, -0.893224301f, - -0.427555093f, -0.903989293f, - -0.405241314f, -0.914209756f, - -0.382683432f, -0.923879533f, - -0.359895037f, -0.932992799f, - -0.336889853f, -0.941544065f, - -0.313681740f, -0.949528181f, - -0.290284677f, -0.956940336f, - -0.266712757f, -0.963776066f, - -0.242980180f, -0.970031253f, - -0.219101240f, -0.975702130f, - -0.195090322f, -0.980785280f, - -0.170961889f, -0.985277642f, - -0.146730474f, -0.989176510f, - -0.122410675f, -0.992479535f, - -0.098017140f, -0.995184727f, - -0.073564564f, -0.997290457f, - -0.049067674f, -0.998795456f, - -0.024541229f, -0.999698819f, - -0.000000000f, -1.000000000f, - 0.024541229f, -0.999698819f, - 0.049067674f, -0.998795456f, - 0.073564564f, -0.997290457f, - 0.098017140f, -0.995184727f, - 0.122410675f, -0.992479535f, - 0.146730474f, -0.989176510f, - 0.170961889f, -0.985277642f, - 0.195090322f, -0.980785280f, - 0.219101240f, -0.975702130f, - 0.242980180f, -0.970031253f, - 0.266712757f, -0.963776066f, - 0.290284677f, -0.956940336f, - 0.313681740f, -0.949528181f, - 0.336889853f, -0.941544065f, - 0.359895037f, -0.932992799f, - 0.382683432f, -0.923879533f, - 0.405241314f, -0.914209756f, - 0.427555093f, -0.903989293f, - 0.449611330f, -0.893224301f, - 0.471396737f, -0.881921264f, - 0.492898192f, -0.870086991f, - 0.514102744f, -0.857728610f, - 0.534997620f, -0.844853565f, - 0.555570233f, -0.831469612f, - 0.575808191f, -0.817584813f, - 0.595699304f, -0.803207531f, - 0.615231591f, -0.788346428f, - 0.634393284f, -0.773010453f, - 0.653172843f, -0.757208847f, - 0.671558955f, -0.740951125f, - 0.689540545f, -0.724247083f, - 0.707106781f, -0.707106781f, - 0.724247083f, -0.689540545f, - 0.740951125f, -0.671558955f, - 0.757208847f, -0.653172843f, - 0.773010453f, -0.634393284f, - 0.788346428f, -0.615231591f, - 0.803207531f, -0.595699304f, - 0.817584813f, -0.575808191f, - 0.831469612f, -0.555570233f, - 0.844853565f, -0.534997620f, - 0.857728610f, -0.514102744f, - 0.870086991f, -0.492898192f, - 0.881921264f, -0.471396737f, - 0.893224301f, -0.449611330f, - 0.903989293f, -0.427555093f, - 0.914209756f, -0.405241314f, - 0.923879533f, -0.382683432f, - 0.932992799f, -0.359895037f, - 0.941544065f, -0.336889853f, - 0.949528181f, -0.313681740f, - 0.956940336f, -0.290284677f, - 0.963776066f, -0.266712757f, - 0.970031253f, -0.242980180f, - 0.975702130f, -0.219101240f, - 0.980785280f, -0.195090322f, - 0.985277642f, -0.170961889f, - 0.989176510f, -0.146730474f, - 0.992479535f, -0.122410675f, - 0.995184727f, -0.098017140f, - 0.997290457f, -0.073564564f, - 0.998795456f, -0.049067674f, - 0.999698819f, -0.024541229f -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512) -/** - @par - Example code for Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 512, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const float32_t twiddleCoef_512[1024] = { - 1.000000000f, 0.000000000f, - 0.999924702f, 0.012271538f, - 0.999698819f, 0.024541229f, - 0.999322385f, 0.036807223f, - 0.998795456f, 0.049067674f, - 0.998118113f, 0.061320736f, - 0.997290457f, 0.073564564f, - 0.996312612f, 0.085797312f, - 0.995184727f, 0.098017140f, - 0.993906970f, 0.110222207f, - 0.992479535f, 0.122410675f, - 0.990902635f, 0.134580709f, - 0.989176510f, 0.146730474f, - 0.987301418f, 0.158858143f, - 0.985277642f, 0.170961889f, - 0.983105487f, 0.183039888f, - 0.980785280f, 0.195090322f, - 0.978317371f, 0.207111376f, - 0.975702130f, 0.219101240f, - 0.972939952f, 0.231058108f, - 0.970031253f, 0.242980180f, - 0.966976471f, 0.254865660f, - 0.963776066f, 0.266712757f, - 0.960430519f, 0.278519689f, - 0.956940336f, 0.290284677f, - 0.953306040f, 0.302005949f, - 0.949528181f, 0.313681740f, - 0.945607325f, 0.325310292f, - 0.941544065f, 0.336889853f, - 0.937339012f, 0.348418680f, - 0.932992799f, 0.359895037f, - 0.928506080f, 0.371317194f, - 0.923879533f, 0.382683432f, - 0.919113852f, 0.393992040f, - 0.914209756f, 0.405241314f, - 0.909167983f, 0.416429560f, - 0.903989293f, 0.427555093f, - 0.898674466f, 0.438616239f, - 0.893224301f, 0.449611330f, - 0.887639620f, 0.460538711f, - 0.881921264f, 0.471396737f, - 0.876070094f, 0.482183772f, - 0.870086991f, 0.492898192f, - 0.863972856f, 0.503538384f, - 0.857728610f, 0.514102744f, - 0.851355193f, 0.524589683f, - 0.844853565f, 0.534997620f, - 0.838224706f, 0.545324988f, - 0.831469612f, 0.555570233f, - 0.824589303f, 0.565731811f, - 0.817584813f, 0.575808191f, - 0.810457198f, 0.585797857f, - 0.803207531f, 0.595699304f, - 0.795836905f, 0.605511041f, - 0.788346428f, 0.615231591f, - 0.780737229f, 0.624859488f, - 0.773010453f, 0.634393284f, - 0.765167266f, 0.643831543f, - 0.757208847f, 0.653172843f, - 0.749136395f, 0.662415778f, - 0.740951125f, 0.671558955f, - 0.732654272f, 0.680600998f, - 0.724247083f, 0.689540545f, - 0.715730825f, 0.698376249f, - 0.707106781f, 0.707106781f, - 0.698376249f, 0.715730825f, - 0.689540545f, 0.724247083f, - 0.680600998f, 0.732654272f, - 0.671558955f, 0.740951125f, - 0.662415778f, 0.749136395f, - 0.653172843f, 0.757208847f, - 0.643831543f, 0.765167266f, - 0.634393284f, 0.773010453f, - 0.624859488f, 0.780737229f, - 0.615231591f, 0.788346428f, - 0.605511041f, 0.795836905f, - 0.595699304f, 0.803207531f, - 0.585797857f, 0.810457198f, - 0.575808191f, 0.817584813f, - 0.565731811f, 0.824589303f, - 0.555570233f, 0.831469612f, - 0.545324988f, 0.838224706f, - 0.534997620f, 0.844853565f, - 0.524589683f, 0.851355193f, - 0.514102744f, 0.857728610f, - 0.503538384f, 0.863972856f, - 0.492898192f, 0.870086991f, - 0.482183772f, 0.876070094f, - 0.471396737f, 0.881921264f, - 0.460538711f, 0.887639620f, - 0.449611330f, 0.893224301f, - 0.438616239f, 0.898674466f, - 0.427555093f, 0.903989293f, - 0.416429560f, 0.909167983f, - 0.405241314f, 0.914209756f, - 0.393992040f, 0.919113852f, - 0.382683432f, 0.923879533f, - 0.371317194f, 0.928506080f, - 0.359895037f, 0.932992799f, - 0.348418680f, 0.937339012f, - 0.336889853f, 0.941544065f, - 0.325310292f, 0.945607325f, - 0.313681740f, 0.949528181f, - 0.302005949f, 0.953306040f, - 0.290284677f, 0.956940336f, - 0.278519689f, 0.960430519f, - 0.266712757f, 0.963776066f, - 0.254865660f, 0.966976471f, - 0.242980180f, 0.970031253f, - 0.231058108f, 0.972939952f, - 0.219101240f, 0.975702130f, - 0.207111376f, 0.978317371f, - 0.195090322f, 0.980785280f, - 0.183039888f, 0.983105487f, - 0.170961889f, 0.985277642f, - 0.158858143f, 0.987301418f, - 0.146730474f, 0.989176510f, - 0.134580709f, 0.990902635f, - 0.122410675f, 0.992479535f, - 0.110222207f, 0.993906970f, - 0.098017140f, 0.995184727f, - 0.085797312f, 0.996312612f, - 0.073564564f, 0.997290457f, - 0.061320736f, 0.998118113f, - 0.049067674f, 0.998795456f, - 0.036807223f, 0.999322385f, - 0.024541229f, 0.999698819f, - 0.012271538f, 0.999924702f, - 0.000000000f, 1.000000000f, - -0.012271538f, 0.999924702f, - -0.024541229f, 0.999698819f, - -0.036807223f, 0.999322385f, - -0.049067674f, 0.998795456f, - -0.061320736f, 0.998118113f, - -0.073564564f, 0.997290457f, - -0.085797312f, 0.996312612f, - -0.098017140f, 0.995184727f, - -0.110222207f, 0.993906970f, - -0.122410675f, 0.992479535f, - -0.134580709f, 0.990902635f, - -0.146730474f, 0.989176510f, - -0.158858143f, 0.987301418f, - -0.170961889f, 0.985277642f, - -0.183039888f, 0.983105487f, - -0.195090322f, 0.980785280f, - -0.207111376f, 0.978317371f, - -0.219101240f, 0.975702130f, - -0.231058108f, 0.972939952f, - -0.242980180f, 0.970031253f, - -0.254865660f, 0.966976471f, - -0.266712757f, 0.963776066f, - -0.278519689f, 0.960430519f, - -0.290284677f, 0.956940336f, - -0.302005949f, 0.953306040f, - -0.313681740f, 0.949528181f, - -0.325310292f, 0.945607325f, - -0.336889853f, 0.941544065f, - -0.348418680f, 0.937339012f, - -0.359895037f, 0.932992799f, - -0.371317194f, 0.928506080f, - -0.382683432f, 0.923879533f, - -0.393992040f, 0.919113852f, - -0.405241314f, 0.914209756f, - -0.416429560f, 0.909167983f, - -0.427555093f, 0.903989293f, - -0.438616239f, 0.898674466f, - -0.449611330f, 0.893224301f, - -0.460538711f, 0.887639620f, - -0.471396737f, 0.881921264f, - -0.482183772f, 0.876070094f, - -0.492898192f, 0.870086991f, - -0.503538384f, 0.863972856f, - -0.514102744f, 0.857728610f, - -0.524589683f, 0.851355193f, - -0.534997620f, 0.844853565f, - -0.545324988f, 0.838224706f, - -0.555570233f, 0.831469612f, - -0.565731811f, 0.824589303f, - -0.575808191f, 0.817584813f, - -0.585797857f, 0.810457198f, - -0.595699304f, 0.803207531f, - -0.605511041f, 0.795836905f, - -0.615231591f, 0.788346428f, - -0.624859488f, 0.780737229f, - -0.634393284f, 0.773010453f, - -0.643831543f, 0.765167266f, - -0.653172843f, 0.757208847f, - -0.662415778f, 0.749136395f, - -0.671558955f, 0.740951125f, - -0.680600998f, 0.732654272f, - -0.689540545f, 0.724247083f, - -0.698376249f, 0.715730825f, - -0.707106781f, 0.707106781f, - -0.715730825f, 0.698376249f, - -0.724247083f, 0.689540545f, - -0.732654272f, 0.680600998f, - -0.740951125f, 0.671558955f, - -0.749136395f, 0.662415778f, - -0.757208847f, 0.653172843f, - -0.765167266f, 0.643831543f, - -0.773010453f, 0.634393284f, - -0.780737229f, 0.624859488f, - -0.788346428f, 0.615231591f, - -0.795836905f, 0.605511041f, - -0.803207531f, 0.595699304f, - -0.810457198f, 0.585797857f, - -0.817584813f, 0.575808191f, - -0.824589303f, 0.565731811f, - -0.831469612f, 0.555570233f, - -0.838224706f, 0.545324988f, - -0.844853565f, 0.534997620f, - -0.851355193f, 0.524589683f, - -0.857728610f, 0.514102744f, - -0.863972856f, 0.503538384f, - -0.870086991f, 0.492898192f, - -0.876070094f, 0.482183772f, - -0.881921264f, 0.471396737f, - -0.887639620f, 0.460538711f, - -0.893224301f, 0.449611330f, - -0.898674466f, 0.438616239f, - -0.903989293f, 0.427555093f, - -0.909167983f, 0.416429560f, - -0.914209756f, 0.405241314f, - -0.919113852f, 0.393992040f, - -0.923879533f, 0.382683432f, - -0.928506080f, 0.371317194f, - -0.932992799f, 0.359895037f, - -0.937339012f, 0.348418680f, - -0.941544065f, 0.336889853f, - -0.945607325f, 0.325310292f, - -0.949528181f, 0.313681740f, - -0.953306040f, 0.302005949f, - -0.956940336f, 0.290284677f, - -0.960430519f, 0.278519689f, - -0.963776066f, 0.266712757f, - -0.966976471f, 0.254865660f, - -0.970031253f, 0.242980180f, - -0.972939952f, 0.231058108f, - -0.975702130f, 0.219101240f, - -0.978317371f, 0.207111376f, - -0.980785280f, 0.195090322f, - -0.983105487f, 0.183039888f, - -0.985277642f, 0.170961889f, - -0.987301418f, 0.158858143f, - -0.989176510f, 0.146730474f, - -0.990902635f, 0.134580709f, - -0.992479535f, 0.122410675f, - -0.993906970f, 0.110222207f, - -0.995184727f, 0.098017140f, - -0.996312612f, 0.085797312f, - -0.997290457f, 0.073564564f, - -0.998118113f, 0.061320736f, - -0.998795456f, 0.049067674f, - -0.999322385f, 0.036807223f, - -0.999698819f, 0.024541229f, - -0.999924702f, 0.012271538f, - -1.000000000f, 0.000000000f, - -0.999924702f, -0.012271538f, - -0.999698819f, -0.024541229f, - -0.999322385f, -0.036807223f, - -0.998795456f, -0.049067674f, - -0.998118113f, -0.061320736f, - -0.997290457f, -0.073564564f, - -0.996312612f, -0.085797312f, - -0.995184727f, -0.098017140f, - -0.993906970f, -0.110222207f, - -0.992479535f, -0.122410675f, - -0.990902635f, -0.134580709f, - -0.989176510f, -0.146730474f, - -0.987301418f, -0.158858143f, - -0.985277642f, -0.170961889f, - -0.983105487f, -0.183039888f, - -0.980785280f, -0.195090322f, - -0.978317371f, -0.207111376f, - -0.975702130f, -0.219101240f, - -0.972939952f, -0.231058108f, - -0.970031253f, -0.242980180f, - -0.966976471f, -0.254865660f, - -0.963776066f, -0.266712757f, - -0.960430519f, -0.278519689f, - -0.956940336f, -0.290284677f, - -0.953306040f, -0.302005949f, - -0.949528181f, -0.313681740f, - -0.945607325f, -0.325310292f, - -0.941544065f, -0.336889853f, - -0.937339012f, -0.348418680f, - -0.932992799f, -0.359895037f, - -0.928506080f, -0.371317194f, - -0.923879533f, -0.382683432f, - -0.919113852f, -0.393992040f, - -0.914209756f, -0.405241314f, - -0.909167983f, -0.416429560f, - -0.903989293f, -0.427555093f, - -0.898674466f, -0.438616239f, - -0.893224301f, -0.449611330f, - -0.887639620f, -0.460538711f, - -0.881921264f, -0.471396737f, - -0.876070094f, -0.482183772f, - -0.870086991f, -0.492898192f, - -0.863972856f, -0.503538384f, - -0.857728610f, -0.514102744f, - -0.851355193f, -0.524589683f, - -0.844853565f, -0.534997620f, - -0.838224706f, -0.545324988f, - -0.831469612f, -0.555570233f, - -0.824589303f, -0.565731811f, - -0.817584813f, -0.575808191f, - -0.810457198f, -0.585797857f, - -0.803207531f, -0.595699304f, - -0.795836905f, -0.605511041f, - -0.788346428f, -0.615231591f, - -0.780737229f, -0.624859488f, - -0.773010453f, -0.634393284f, - -0.765167266f, -0.643831543f, - -0.757208847f, -0.653172843f, - -0.749136395f, -0.662415778f, - -0.740951125f, -0.671558955f, - -0.732654272f, -0.680600998f, - -0.724247083f, -0.689540545f, - -0.715730825f, -0.698376249f, - -0.707106781f, -0.707106781f, - -0.698376249f, -0.715730825f, - -0.689540545f, -0.724247083f, - -0.680600998f, -0.732654272f, - -0.671558955f, -0.740951125f, - -0.662415778f, -0.749136395f, - -0.653172843f, -0.757208847f, - -0.643831543f, -0.765167266f, - -0.634393284f, -0.773010453f, - -0.624859488f, -0.780737229f, - -0.615231591f, -0.788346428f, - -0.605511041f, -0.795836905f, - -0.595699304f, -0.803207531f, - -0.585797857f, -0.810457198f, - -0.575808191f, -0.817584813f, - -0.565731811f, -0.824589303f, - -0.555570233f, -0.831469612f, - -0.545324988f, -0.838224706f, - -0.534997620f, -0.844853565f, - -0.524589683f, -0.851355193f, - -0.514102744f, -0.857728610f, - -0.503538384f, -0.863972856f, - -0.492898192f, -0.870086991f, - -0.482183772f, -0.876070094f, - -0.471396737f, -0.881921264f, - -0.460538711f, -0.887639620f, - -0.449611330f, -0.893224301f, - -0.438616239f, -0.898674466f, - -0.427555093f, -0.903989293f, - -0.416429560f, -0.909167983f, - -0.405241314f, -0.914209756f, - -0.393992040f, -0.919113852f, - -0.382683432f, -0.923879533f, - -0.371317194f, -0.928506080f, - -0.359895037f, -0.932992799f, - -0.348418680f, -0.937339012f, - -0.336889853f, -0.941544065f, - -0.325310292f, -0.945607325f, - -0.313681740f, -0.949528181f, - -0.302005949f, -0.953306040f, - -0.290284677f, -0.956940336f, - -0.278519689f, -0.960430519f, - -0.266712757f, -0.963776066f, - -0.254865660f, -0.966976471f, - -0.242980180f, -0.970031253f, - -0.231058108f, -0.972939952f, - -0.219101240f, -0.975702130f, - -0.207111376f, -0.978317371f, - -0.195090322f, -0.980785280f, - -0.183039888f, -0.983105487f, - -0.170961889f, -0.985277642f, - -0.158858143f, -0.987301418f, - -0.146730474f, -0.989176510f, - -0.134580709f, -0.990902635f, - -0.122410675f, -0.992479535f, - -0.110222207f, -0.993906970f, - -0.098017140f, -0.995184727f, - -0.085797312f, -0.996312612f, - -0.073564564f, -0.997290457f, - -0.061320736f, -0.998118113f, - -0.049067674f, -0.998795456f, - -0.036807223f, -0.999322385f, - -0.024541229f, -0.999698819f, - -0.012271538f, -0.999924702f, - -0.000000000f, -1.000000000f, - 0.012271538f, -0.999924702f, - 0.024541229f, -0.999698819f, - 0.036807223f, -0.999322385f, - 0.049067674f, -0.998795456f, - 0.061320736f, -0.998118113f, - 0.073564564f, -0.997290457f, - 0.085797312f, -0.996312612f, - 0.098017140f, -0.995184727f, - 0.110222207f, -0.993906970f, - 0.122410675f, -0.992479535f, - 0.134580709f, -0.990902635f, - 0.146730474f, -0.989176510f, - 0.158858143f, -0.987301418f, - 0.170961889f, -0.985277642f, - 0.183039888f, -0.983105487f, - 0.195090322f, -0.980785280f, - 0.207111376f, -0.978317371f, - 0.219101240f, -0.975702130f, - 0.231058108f, -0.972939952f, - 0.242980180f, -0.970031253f, - 0.254865660f, -0.966976471f, - 0.266712757f, -0.963776066f, - 0.278519689f, -0.960430519f, - 0.290284677f, -0.956940336f, - 0.302005949f, -0.953306040f, - 0.313681740f, -0.949528181f, - 0.325310292f, -0.945607325f, - 0.336889853f, -0.941544065f, - 0.348418680f, -0.937339012f, - 0.359895037f, -0.932992799f, - 0.371317194f, -0.928506080f, - 0.382683432f, -0.923879533f, - 0.393992040f, -0.919113852f, - 0.405241314f, -0.914209756f, - 0.416429560f, -0.909167983f, - 0.427555093f, -0.903989293f, - 0.438616239f, -0.898674466f, - 0.449611330f, -0.893224301f, - 0.460538711f, -0.887639620f, - 0.471396737f, -0.881921264f, - 0.482183772f, -0.876070094f, - 0.492898192f, -0.870086991f, - 0.503538384f, -0.863972856f, - 0.514102744f, -0.857728610f, - 0.524589683f, -0.851355193f, - 0.534997620f, -0.844853565f, - 0.545324988f, -0.838224706f, - 0.555570233f, -0.831469612f, - 0.565731811f, -0.824589303f, - 0.575808191f, -0.817584813f, - 0.585797857f, -0.810457198f, - 0.595699304f, -0.803207531f, - 0.605511041f, -0.795836905f, - 0.615231591f, -0.788346428f, - 0.624859488f, -0.780737229f, - 0.634393284f, -0.773010453f, - 0.643831543f, -0.765167266f, - 0.653172843f, -0.757208847f, - 0.662415778f, -0.749136395f, - 0.671558955f, -0.740951125f, - 0.680600998f, -0.732654272f, - 0.689540545f, -0.724247083f, - 0.698376249f, -0.715730825f, - 0.707106781f, -0.707106781f, - 0.715730825f, -0.698376249f, - 0.724247083f, -0.689540545f, - 0.732654272f, -0.680600998f, - 0.740951125f, -0.671558955f, - 0.749136395f, -0.662415778f, - 0.757208847f, -0.653172843f, - 0.765167266f, -0.643831543f, - 0.773010453f, -0.634393284f, - 0.780737229f, -0.624859488f, - 0.788346428f, -0.615231591f, - 0.795836905f, -0.605511041f, - 0.803207531f, -0.595699304f, - 0.810457198f, -0.585797857f, - 0.817584813f, -0.575808191f, - 0.824589303f, -0.565731811f, - 0.831469612f, -0.555570233f, - 0.838224706f, -0.545324988f, - 0.844853565f, -0.534997620f, - 0.851355193f, -0.524589683f, - 0.857728610f, -0.514102744f, - 0.863972856f, -0.503538384f, - 0.870086991f, -0.492898192f, - 0.876070094f, -0.482183772f, - 0.881921264f, -0.471396737f, - 0.887639620f, -0.460538711f, - 0.893224301f, -0.449611330f, - 0.898674466f, -0.438616239f, - 0.903989293f, -0.427555093f, - 0.909167983f, -0.416429560f, - 0.914209756f, -0.405241314f, - 0.919113852f, -0.393992040f, - 0.923879533f, -0.382683432f, - 0.928506080f, -0.371317194f, - 0.932992799f, -0.359895037f, - 0.937339012f, -0.348418680f, - 0.941544065f, -0.336889853f, - 0.945607325f, -0.325310292f, - 0.949528181f, -0.313681740f, - 0.953306040f, -0.302005949f, - 0.956940336f, -0.290284677f, - 0.960430519f, -0.278519689f, - 0.963776066f, -0.266712757f, - 0.966976471f, -0.254865660f, - 0.970031253f, -0.242980180f, - 0.972939952f, -0.231058108f, - 0.975702130f, -0.219101240f, - 0.978317371f, -0.207111376f, - 0.980785280f, -0.195090322f, - 0.983105487f, -0.183039888f, - 0.985277642f, -0.170961889f, - 0.987301418f, -0.158858143f, - 0.989176510f, -0.146730474f, - 0.990902635f, -0.134580709f, - 0.992479535f, -0.122410675f, - 0.993906970f, -0.110222207f, - 0.995184727f, -0.098017140f, - 0.996312612f, -0.085797312f, - 0.997290457f, -0.073564564f, - 0.998118113f, -0.061320736f, - 0.998795456f, -0.049067674f, - 0.999322385f, -0.036807223f, - 0.999698819f, -0.024541229f, - 0.999924702f, -0.012271538f -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) -/** - @par - Example code for Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 1024, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const float32_t twiddleCoef_1024[2048] = { - 1.000000000f, 0.000000000f, - 0.999981175f, 0.006135885f, - 0.999924702f, 0.012271538f, - 0.999830582f, 0.018406730f, - 0.999698819f, 0.024541229f, - 0.999529418f, 0.030674803f, - 0.999322385f, 0.036807223f, - 0.999077728f, 0.042938257f, - 0.998795456f, 0.049067674f, - 0.998475581f, 0.055195244f, - 0.998118113f, 0.061320736f, - 0.997723067f, 0.067443920f, - 0.997290457f, 0.073564564f, - 0.996820299f, 0.079682438f, - 0.996312612f, 0.085797312f, - 0.995767414f, 0.091908956f, - 0.995184727f, 0.098017140f, - 0.994564571f, 0.104121634f, - 0.993906970f, 0.110222207f, - 0.993211949f, 0.116318631f, - 0.992479535f, 0.122410675f, - 0.991709754f, 0.128498111f, - 0.990902635f, 0.134580709f, - 0.990058210f, 0.140658239f, - 0.989176510f, 0.146730474f, - 0.988257568f, 0.152797185f, - 0.987301418f, 0.158858143f, - 0.986308097f, 0.164913120f, - 0.985277642f, 0.170961889f, - 0.984210092f, 0.177004220f, - 0.983105487f, 0.183039888f, - 0.981963869f, 0.189068664f, - 0.980785280f, 0.195090322f, - 0.979569766f, 0.201104635f, - 0.978317371f, 0.207111376f, - 0.977028143f, 0.213110320f, - 0.975702130f, 0.219101240f, - 0.974339383f, 0.225083911f, - 0.972939952f, 0.231058108f, - 0.971503891f, 0.237023606f, - 0.970031253f, 0.242980180f, - 0.968522094f, 0.248927606f, - 0.966976471f, 0.254865660f, - 0.965394442f, 0.260794118f, - 0.963776066f, 0.266712757f, - 0.962121404f, 0.272621355f, - 0.960430519f, 0.278519689f, - 0.958703475f, 0.284407537f, - 0.956940336f, 0.290284677f, - 0.955141168f, 0.296150888f, - 0.953306040f, 0.302005949f, - 0.951435021f, 0.307849640f, - 0.949528181f, 0.313681740f, - 0.947585591f, 0.319502031f, - 0.945607325f, 0.325310292f, - 0.943593458f, 0.331106306f, - 0.941544065f, 0.336889853f, - 0.939459224f, 0.342660717f, - 0.937339012f, 0.348418680f, - 0.935183510f, 0.354163525f, - 0.932992799f, 0.359895037f, - 0.930766961f, 0.365612998f, - 0.928506080f, 0.371317194f, - 0.926210242f, 0.377007410f, - 0.923879533f, 0.382683432f, - 0.921514039f, 0.388345047f, - 0.919113852f, 0.393992040f, - 0.916679060f, 0.399624200f, - 0.914209756f, 0.405241314f, - 0.911706032f, 0.410843171f, - 0.909167983f, 0.416429560f, - 0.906595705f, 0.422000271f, - 0.903989293f, 0.427555093f, - 0.901348847f, 0.433093819f, - 0.898674466f, 0.438616239f, - 0.895966250f, 0.444122145f, - 0.893224301f, 0.449611330f, - 0.890448723f, 0.455083587f, - 0.887639620f, 0.460538711f, - 0.884797098f, 0.465976496f, - 0.881921264f, 0.471396737f, - 0.879012226f, 0.476799230f, - 0.876070094f, 0.482183772f, - 0.873094978f, 0.487550160f, - 0.870086991f, 0.492898192f, - 0.867046246f, 0.498227667f, - 0.863972856f, 0.503538384f, - 0.860866939f, 0.508830143f, - 0.857728610f, 0.514102744f, - 0.854557988f, 0.519355990f, - 0.851355193f, 0.524589683f, - 0.848120345f, 0.529803625f, - 0.844853565f, 0.534997620f, - 0.841554977f, 0.540171473f, - 0.838224706f, 0.545324988f, - 0.834862875f, 0.550457973f, - 0.831469612f, 0.555570233f, - 0.828045045f, 0.560661576f, - 0.824589303f, 0.565731811f, - 0.821102515f, 0.570780746f, - 0.817584813f, 0.575808191f, - 0.814036330f, 0.580813958f, - 0.810457198f, 0.585797857f, - 0.806847554f, 0.590759702f, - 0.803207531f, 0.595699304f, - 0.799537269f, 0.600616479f, - 0.795836905f, 0.605511041f, - 0.792106577f, 0.610382806f, - 0.788346428f, 0.615231591f, - 0.784556597f, 0.620057212f, - 0.780737229f, 0.624859488f, - 0.776888466f, 0.629638239f, - 0.773010453f, 0.634393284f, - 0.769103338f, 0.639124445f, - 0.765167266f, 0.643831543f, - 0.761202385f, 0.648514401f, - 0.757208847f, 0.653172843f, - 0.753186799f, 0.657806693f, - 0.749136395f, 0.662415778f, - 0.745057785f, 0.666999922f, - 0.740951125f, 0.671558955f, - 0.736816569f, 0.676092704f, - 0.732654272f, 0.680600998f, - 0.728464390f, 0.685083668f, - 0.724247083f, 0.689540545f, - 0.720002508f, 0.693971461f, - 0.715730825f, 0.698376249f, - 0.711432196f, 0.702754744f, - 0.707106781f, 0.707106781f, - 0.702754744f, 0.711432196f, - 0.698376249f, 0.715730825f, - 0.693971461f, 0.720002508f, - 0.689540545f, 0.724247083f, - 0.685083668f, 0.728464390f, - 0.680600998f, 0.732654272f, - 0.676092704f, 0.736816569f, - 0.671558955f, 0.740951125f, - 0.666999922f, 0.745057785f, - 0.662415778f, 0.749136395f, - 0.657806693f, 0.753186799f, - 0.653172843f, 0.757208847f, - 0.648514401f, 0.761202385f, - 0.643831543f, 0.765167266f, - 0.639124445f, 0.769103338f, - 0.634393284f, 0.773010453f, - 0.629638239f, 0.776888466f, - 0.624859488f, 0.780737229f, - 0.620057212f, 0.784556597f, - 0.615231591f, 0.788346428f, - 0.610382806f, 0.792106577f, - 0.605511041f, 0.795836905f, - 0.600616479f, 0.799537269f, - 0.595699304f, 0.803207531f, - 0.590759702f, 0.806847554f, - 0.585797857f, 0.810457198f, - 0.580813958f, 0.814036330f, - 0.575808191f, 0.817584813f, - 0.570780746f, 0.821102515f, - 0.565731811f, 0.824589303f, - 0.560661576f, 0.828045045f, - 0.555570233f, 0.831469612f, - 0.550457973f, 0.834862875f, - 0.545324988f, 0.838224706f, - 0.540171473f, 0.841554977f, - 0.534997620f, 0.844853565f, - 0.529803625f, 0.848120345f, - 0.524589683f, 0.851355193f, - 0.519355990f, 0.854557988f, - 0.514102744f, 0.857728610f, - 0.508830143f, 0.860866939f, - 0.503538384f, 0.863972856f, - 0.498227667f, 0.867046246f, - 0.492898192f, 0.870086991f, - 0.487550160f, 0.873094978f, - 0.482183772f, 0.876070094f, - 0.476799230f, 0.879012226f, - 0.471396737f, 0.881921264f, - 0.465976496f, 0.884797098f, - 0.460538711f, 0.887639620f, - 0.455083587f, 0.890448723f, - 0.449611330f, 0.893224301f, - 0.444122145f, 0.895966250f, - 0.438616239f, 0.898674466f, - 0.433093819f, 0.901348847f, - 0.427555093f, 0.903989293f, - 0.422000271f, 0.906595705f, - 0.416429560f, 0.909167983f, - 0.410843171f, 0.911706032f, - 0.405241314f, 0.914209756f, - 0.399624200f, 0.916679060f, - 0.393992040f, 0.919113852f, - 0.388345047f, 0.921514039f, - 0.382683432f, 0.923879533f, - 0.377007410f, 0.926210242f, - 0.371317194f, 0.928506080f, - 0.365612998f, 0.930766961f, - 0.359895037f, 0.932992799f, - 0.354163525f, 0.935183510f, - 0.348418680f, 0.937339012f, - 0.342660717f, 0.939459224f, - 0.336889853f, 0.941544065f, - 0.331106306f, 0.943593458f, - 0.325310292f, 0.945607325f, - 0.319502031f, 0.947585591f, - 0.313681740f, 0.949528181f, - 0.307849640f, 0.951435021f, - 0.302005949f, 0.953306040f, - 0.296150888f, 0.955141168f, - 0.290284677f, 0.956940336f, - 0.284407537f, 0.958703475f, - 0.278519689f, 0.960430519f, - 0.272621355f, 0.962121404f, - 0.266712757f, 0.963776066f, - 0.260794118f, 0.965394442f, - 0.254865660f, 0.966976471f, - 0.248927606f, 0.968522094f, - 0.242980180f, 0.970031253f, - 0.237023606f, 0.971503891f, - 0.231058108f, 0.972939952f, - 0.225083911f, 0.974339383f, - 0.219101240f, 0.975702130f, - 0.213110320f, 0.977028143f, - 0.207111376f, 0.978317371f, - 0.201104635f, 0.979569766f, - 0.195090322f, 0.980785280f, - 0.189068664f, 0.981963869f, - 0.183039888f, 0.983105487f, - 0.177004220f, 0.984210092f, - 0.170961889f, 0.985277642f, - 0.164913120f, 0.986308097f, - 0.158858143f, 0.987301418f, - 0.152797185f, 0.988257568f, - 0.146730474f, 0.989176510f, - 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0.999077728f, -0.042938257f, - 0.999322385f, -0.036807223f, - 0.999529418f, -0.030674803f, - 0.999698819f, -0.024541229f, - 0.999830582f, -0.018406730f, - 0.999924702f, -0.012271538f, - 0.999981175f, -0.006135885f -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048) -/** - @par - Example code for Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 2048, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const float32_t twiddleCoef_2048[4096] = { - 1.000000000f, 0.000000000f, - 0.999995294f, 0.003067957f, - 0.999981175f, 0.006135885f, - 0.999957645f, 0.009203755f, - 0.999924702f, 0.012271538f, - 0.999882347f, 0.015339206f, - 0.999830582f, 0.018406730f, - 0.999769405f, 0.021474080f, - 0.999698819f, 0.024541229f, - 0.999618822f, 0.027608146f, - 0.999529418f, 0.030674803f, - 0.999430605f, 0.033741172f, - 0.999322385f, 0.036807223f, - 0.999204759f, 0.039872928f, - 0.999077728f, 0.042938257f, - 0.998941293f, 0.046003182f, - 0.998795456f, 0.049067674f, - 0.998640218f, 0.052131705f, - 0.998475581f, 0.055195244f, - 0.998301545f, 0.058258265f, - 0.998118113f, 0.061320736f, - 0.997925286f, 0.064382631f, - 0.997723067f, 0.067443920f, - 0.997511456f, 0.070504573f, - 0.997290457f, 0.073564564f, - 0.997060070f, 0.076623861f, - 0.996820299f, 0.079682438f, - 0.996571146f, 0.082740265f, - 0.996312612f, 0.085797312f, - 0.996044701f, 0.088853553f, - 0.995767414f, 0.091908956f, - 0.995480755f, 0.094963495f, - 0.995184727f, 0.098017140f, - 0.994879331f, 0.101069863f, - 0.994564571f, 0.104121634f, - 0.994240449f, 0.107172425f, - 0.993906970f, 0.110222207f, - 0.993564136f, 0.113270952f, - 0.993211949f, 0.116318631f, - 0.992850414f, 0.119365215f, - 0.992479535f, 0.122410675f, - 0.992099313f, 0.125454983f, - 0.991709754f, 0.128498111f, - 0.991310860f, 0.131540029f, - 0.990902635f, 0.134580709f, - 0.990485084f, 0.137620122f, - 0.990058210f, 0.140658239f, - 0.989622017f, 0.143695033f, - 0.989176510f, 0.146730474f, - 0.988721692f, 0.149764535f, - 0.988257568f, 0.152797185f, - 0.987784142f, 0.155828398f, - 0.987301418f, 0.158858143f, - 0.986809402f, 0.161886394f, - 0.986308097f, 0.164913120f, - 0.985797509f, 0.167938295f, - 0.985277642f, 0.170961889f, - 0.984748502f, 0.173983873f, - 0.984210092f, 0.177004220f, - 0.983662419f, 0.180022901f, - 0.983105487f, 0.183039888f, - 0.982539302f, 0.186055152f, - 0.981963869f, 0.189068664f, - 0.981379193f, 0.192080397f, - 0.980785280f, 0.195090322f, - 0.980182136f, 0.198098411f, - 0.979569766f, 0.201104635f, - 0.978948175f, 0.204108966f, - 0.978317371f, 0.207111376f, - 0.977677358f, 0.210111837f, - 0.977028143f, 0.213110320f, - 0.976369731f, 0.216106797f, - 0.975702130f, 0.219101240f, - 0.975025345f, 0.222093621f, - 0.974339383f, 0.225083911f, - 0.973644250f, 0.228072083f, - 0.972939952f, 0.231058108f, - 0.972226497f, 0.234041959f, - 0.971503891f, 0.237023606f, - 0.970772141f, 0.240003022f, - 0.970031253f, 0.242980180f, - 0.969281235f, 0.245955050f, - 0.968522094f, 0.248927606f, - 0.967753837f, 0.251897818f, - 0.966976471f, 0.254865660f, - 0.966190003f, 0.257831102f, - 0.965394442f, 0.260794118f, - 0.964589793f, 0.263754679f, - 0.963776066f, 0.266712757f, - 0.962953267f, 0.269668326f, - 0.962121404f, 0.272621355f, - 0.961280486f, 0.275571819f, - 0.960430519f, 0.278519689f, - 0.959571513f, 0.281464938f, - 0.958703475f, 0.284407537f, - 0.957826413f, 0.287347460f, - 0.956940336f, 0.290284677f, - 0.956045251f, 0.293219163f, - 0.955141168f, 0.296150888f, - 0.954228095f, 0.299079826f, - 0.953306040f, 0.302005949f, - 0.952375013f, 0.304929230f, - 0.951435021f, 0.307849640f, - 0.950486074f, 0.310767153f, - 0.949528181f, 0.313681740f, - 0.948561350f, 0.316593376f, - 0.947585591f, 0.319502031f, - 0.946600913f, 0.322407679f, - 0.945607325f, 0.325310292f, - 0.944604837f, 0.328209844f, - 0.943593458f, 0.331106306f, - 0.942573198f, 0.333999651f, - 0.941544065f, 0.336889853f, - 0.940506071f, 0.339776884f, - 0.939459224f, 0.342660717f, - 0.938403534f, 0.345541325f, - 0.937339012f, 0.348418680f, - 0.936265667f, 0.351292756f, - 0.935183510f, 0.354163525f, - 0.934092550f, 0.357030961f, - 0.932992799f, 0.359895037f, - 0.931884266f, 0.362755724f, - 0.930766961f, 0.365612998f, - 0.929640896f, 0.368466830f, - 0.928506080f, 0.371317194f, - 0.927362526f, 0.374164063f, - 0.926210242f, 0.377007410f, - 0.925049241f, 0.379847209f, - 0.923879533f, 0.382683432f, - 0.922701128f, 0.385516054f, - 0.921514039f, 0.388345047f, - 0.920318277f, 0.391170384f, - 0.919113852f, 0.393992040f, - 0.917900776f, 0.396809987f, - 0.916679060f, 0.399624200f, - 0.915448716f, 0.402434651f, - 0.914209756f, 0.405241314f, - 0.912962190f, 0.408044163f, - 0.911706032f, 0.410843171f, - 0.910441292f, 0.413638312f, - 0.909167983f, 0.416429560f, - 0.907886116f, 0.419216888f, - 0.906595705f, 0.422000271f, - 0.905296759f, 0.424779681f, - 0.903989293f, 0.427555093f, - 0.902673318f, 0.430326481f, - 0.901348847f, 0.433093819f, - 0.900015892f, 0.435857080f, - 0.898674466f, 0.438616239f, - 0.897324581f, 0.441371269f, - 0.895966250f, 0.444122145f, - 0.894599486f, 0.446868840f, - 0.893224301f, 0.449611330f, - 0.891840709f, 0.452349587f, - 0.890448723f, 0.455083587f, - 0.889048356f, 0.457813304f, - 0.887639620f, 0.460538711f, - 0.886222530f, 0.463259784f, - 0.884797098f, 0.465976496f, - 0.883363339f, 0.468688822f, - 0.881921264f, 0.471396737f, - 0.880470889f, 0.474100215f, - 0.879012226f, 0.476799230f, - 0.877545290f, 0.479493758f, - 0.876070094f, 0.482183772f, - 0.874586652f, 0.484869248f, - 0.873094978f, 0.487550160f, - 0.871595087f, 0.490226483f, - 0.870086991f, 0.492898192f, - 0.868570706f, 0.495565262f, - 0.867046246f, 0.498227667f, - 0.865513624f, 0.500885383f, - 0.863972856f, 0.503538384f, - 0.862423956f, 0.506186645f, - 0.860866939f, 0.508830143f, - 0.859301818f, 0.511468850f, - 0.857728610f, 0.514102744f, - 0.856147328f, 0.516731799f, - 0.854557988f, 0.519355990f, - 0.852960605f, 0.521975293f, - 0.851355193f, 0.524589683f, - 0.849741768f, 0.527199135f, - 0.848120345f, 0.529803625f, - 0.846490939f, 0.532403128f, - 0.844853565f, 0.534997620f, - 0.843208240f, 0.537587076f, - 0.841554977f, 0.540171473f, - 0.839893794f, 0.542750785f, - 0.838224706f, 0.545324988f, - 0.836547727f, 0.547894059f, - 0.834862875f, 0.550457973f, - 0.833170165f, 0.553016706f, - 0.831469612f, 0.555570233f, - 0.829761234f, 0.558118531f, - 0.828045045f, 0.560661576f, - 0.826321063f, 0.563199344f, - 0.824589303f, 0.565731811f, - 0.822849781f, 0.568258953f, - 0.821102515f, 0.570780746f, - 0.819347520f, 0.573297167f, - 0.817584813f, 0.575808191f, - 0.815814411f, 0.578313796f, - 0.814036330f, 0.580813958f, - 0.812250587f, 0.583308653f, - 0.810457198f, 0.585797857f, - 0.808656182f, 0.588281548f, - 0.806847554f, 0.590759702f, - 0.805031331f, 0.593232295f, - 0.803207531f, 0.595699304f, - 0.801376172f, 0.598160707f, - 0.799537269f, 0.600616479f, - 0.797690841f, 0.603066599f, - 0.795836905f, 0.605511041f, - 0.793975478f, 0.607949785f, - 0.792106577f, 0.610382806f, - 0.790230221f, 0.612810082f, - 0.788346428f, 0.615231591f, - 0.786455214f, 0.617647308f, - 0.784556597f, 0.620057212f, - 0.782650596f, 0.622461279f, - 0.780737229f, 0.624859488f, - 0.778816512f, 0.627251815f, - 0.776888466f, 0.629638239f, - 0.774953107f, 0.632018736f, - 0.773010453f, 0.634393284f, - 0.771060524f, 0.636761861f, - 0.769103338f, 0.639124445f, - 0.767138912f, 0.641481013f, - 0.765167266f, 0.643831543f, - 0.763188417f, 0.646176013f, - 0.761202385f, 0.648514401f, - 0.759209189f, 0.650846685f, - 0.757208847f, 0.653172843f, - 0.755201377f, 0.655492853f, - 0.753186799f, 0.657806693f, - 0.751165132f, 0.660114342f, - 0.749136395f, 0.662415778f, - 0.747100606f, 0.664710978f, - 0.745057785f, 0.666999922f, - 0.743007952f, 0.669282588f, - 0.740951125f, 0.671558955f, - 0.738887324f, 0.673829000f, - 0.736816569f, 0.676092704f, - 0.734738878f, 0.678350043f, - 0.732654272f, 0.680600998f, - 0.730562769f, 0.682845546f, - 0.728464390f, 0.685083668f, - 0.726359155f, 0.687315341f, - 0.724247083f, 0.689540545f, - 0.722128194f, 0.691759258f, - 0.720002508f, 0.693971461f, - 0.717870045f, 0.696177131f, - 0.715730825f, 0.698376249f, - 0.713584869f, 0.700568794f, - 0.711432196f, 0.702754744f, - 0.709272826f, 0.704934080f, - 0.707106781f, 0.707106781f, - 0.704934080f, 0.709272826f, - 0.702754744f, 0.711432196f, - 0.700568794f, 0.713584869f, - 0.698376249f, 0.715730825f, - 0.696177131f, 0.717870045f, - 0.693971461f, 0.720002508f, - 0.691759258f, 0.722128194f, - 0.689540545f, 0.724247083f, - 0.687315341f, 0.726359155f, - 0.685083668f, 0.728464390f, - 0.682845546f, 0.730562769f, - 0.680600998f, 0.732654272f, - 0.678350043f, 0.734738878f, - 0.676092704f, 0.736816569f, - 0.673829000f, 0.738887324f, - 0.671558955f, 0.740951125f, - 0.669282588f, 0.743007952f, - 0.666999922f, 0.745057785f, - 0.664710978f, 0.747100606f, - 0.662415778f, 0.749136395f, - 0.660114342f, 0.751165132f, - 0.657806693f, 0.753186799f, - 0.655492853f, 0.755201377f, - 0.653172843f, 0.757208847f, - 0.650846685f, 0.759209189f, - 0.648514401f, 0.761202385f, - 0.646176013f, 0.763188417f, - 0.643831543f, 0.765167266f, - 0.641481013f, 0.767138912f, - 0.639124445f, 0.769103338f, - 0.636761861f, 0.771060524f, - 0.634393284f, 0.773010453f, - 0.632018736f, 0.774953107f, - 0.629638239f, 0.776888466f, - 0.627251815f, 0.778816512f, - 0.624859488f, 0.780737229f, - 0.622461279f, 0.782650596f, - 0.620057212f, 0.784556597f, - 0.617647308f, 0.786455214f, - 0.615231591f, 0.788346428f, - 0.612810082f, 0.790230221f, - 0.610382806f, 0.792106577f, - 0.607949785f, 0.793975478f, - 0.605511041f, 0.795836905f, - 0.603066599f, 0.797690841f, - 0.600616479f, 0.799537269f, - 0.598160707f, 0.801376172f, - 0.595699304f, 0.803207531f, - 0.593232295f, 0.805031331f, - 0.590759702f, 0.806847554f, - 0.588281548f, 0.808656182f, - 0.585797857f, 0.810457198f, - 0.583308653f, 0.812250587f, - 0.580813958f, 0.814036330f, - 0.578313796f, 0.815814411f, - 0.575808191f, 0.817584813f, - 0.573297167f, 0.819347520f, - 0.570780746f, 0.821102515f, - 0.568258953f, 0.822849781f, - 0.565731811f, 0.824589303f, - 0.563199344f, 0.826321063f, - 0.560661576f, 0.828045045f, - 0.558118531f, 0.829761234f, - 0.555570233f, 0.831469612f, - 0.553016706f, 0.833170165f, - 0.550457973f, 0.834862875f, - 0.547894059f, 0.836547727f, - 0.545324988f, 0.838224706f, - 0.542750785f, 0.839893794f, - 0.540171473f, 0.841554977f, - 0.537587076f, 0.843208240f, - 0.534997620f, 0.844853565f, - 0.532403128f, 0.846490939f, - 0.529803625f, 0.848120345f, - 0.527199135f, 0.849741768f, - 0.524589683f, 0.851355193f, - 0.521975293f, 0.852960605f, - 0.519355990f, 0.854557988f, - 0.516731799f, 0.856147328f, - 0.514102744f, 0.857728610f, - 0.511468850f, 0.859301818f, - 0.508830143f, 0.860866939f, - 0.506186645f, 0.862423956f, - 0.503538384f, 0.863972856f, - 0.500885383f, 0.865513624f, - 0.498227667f, 0.867046246f, - 0.495565262f, 0.868570706f, - 0.492898192f, 0.870086991f, - 0.490226483f, 0.871595087f, - 0.487550160f, 0.873094978f, - 0.484869248f, 0.874586652f, - 0.482183772f, 0.876070094f, - 0.479493758f, 0.877545290f, - 0.476799230f, 0.879012226f, - 0.474100215f, 0.880470889f, - 0.471396737f, 0.881921264f, - 0.468688822f, 0.883363339f, - 0.465976496f, 0.884797098f, - 0.463259784f, 0.886222530f, - 0.460538711f, 0.887639620f, - 0.457813304f, 0.889048356f, - 0.455083587f, 0.890448723f, - 0.452349587f, 0.891840709f, - 0.449611330f, 0.893224301f, - 0.446868840f, 0.894599486f, - 0.444122145f, 0.895966250f, - 0.441371269f, 0.897324581f, - 0.438616239f, 0.898674466f, - 0.435857080f, 0.900015892f, - 0.433093819f, 0.901348847f, - 0.430326481f, 0.902673318f, - 0.427555093f, 0.903989293f, - 0.424779681f, 0.905296759f, - 0.422000271f, 0.906595705f, - 0.419216888f, 0.907886116f, - 0.416429560f, 0.909167983f, - 0.413638312f, 0.910441292f, - 0.410843171f, 0.911706032f, - 0.408044163f, 0.912962190f, - 0.405241314f, 0.914209756f, - 0.402434651f, 0.915448716f, - 0.399624200f, 0.916679060f, - 0.396809987f, 0.917900776f, - 0.393992040f, 0.919113852f, - 0.391170384f, 0.920318277f, - 0.388345047f, 0.921514039f, - 0.385516054f, 0.922701128f, - 0.382683432f, 0.923879533f, - 0.379847209f, 0.925049241f, - 0.377007410f, 0.926210242f, - 0.374164063f, 0.927362526f, - 0.371317194f, 0.928506080f, - 0.368466830f, 0.929640896f, - 0.365612998f, 0.930766961f, - 0.362755724f, 0.931884266f, - 0.359895037f, 0.932992799f, - 0.357030961f, 0.934092550f, - 0.354163525f, 0.935183510f, - 0.351292756f, 0.936265667f, - 0.348418680f, 0.937339012f, - 0.345541325f, 0.938403534f, - 0.342660717f, 0.939459224f, - 0.339776884f, 0.940506071f, - 0.336889853f, 0.941544065f, - 0.333999651f, 0.942573198f, - 0.331106306f, 0.943593458f, - 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0.974339383f, -0.225083911f, - 0.975025345f, -0.222093621f, - 0.975702130f, -0.219101240f, - 0.976369731f, -0.216106797f, - 0.977028143f, -0.213110320f, - 0.977677358f, -0.210111837f, - 0.978317371f, -0.207111376f, - 0.978948175f, -0.204108966f, - 0.979569766f, -0.201104635f, - 0.980182136f, -0.198098411f, - 0.980785280f, -0.195090322f, - 0.981379193f, -0.192080397f, - 0.981963869f, -0.189068664f, - 0.982539302f, -0.186055152f, - 0.983105487f, -0.183039888f, - 0.983662419f, -0.180022901f, - 0.984210092f, -0.177004220f, - 0.984748502f, -0.173983873f, - 0.985277642f, -0.170961889f, - 0.985797509f, -0.167938295f, - 0.986308097f, -0.164913120f, - 0.986809402f, -0.161886394f, - 0.987301418f, -0.158858143f, - 0.987784142f, -0.155828398f, - 0.988257568f, -0.152797185f, - 0.988721692f, -0.149764535f, - 0.989176510f, -0.146730474f, - 0.989622017f, -0.143695033f, - 0.990058210f, -0.140658239f, - 0.990485084f, -0.137620122f, - 0.990902635f, -0.134580709f, - 0.991310860f, -0.131540029f, - 0.991709754f, -0.128498111f, - 0.992099313f, -0.125454983f, - 0.992479535f, -0.122410675f, - 0.992850414f, -0.119365215f, - 0.993211949f, -0.116318631f, - 0.993564136f, -0.113270952f, - 0.993906970f, -0.110222207f, - 0.994240449f, -0.107172425f, - 0.994564571f, -0.104121634f, - 0.994879331f, -0.101069863f, - 0.995184727f, -0.098017140f, - 0.995480755f, -0.094963495f, - 0.995767414f, -0.091908956f, - 0.996044701f, -0.088853553f, - 0.996312612f, -0.085797312f, - 0.996571146f, -0.082740265f, - 0.996820299f, -0.079682438f, - 0.997060070f, -0.076623861f, - 0.997290457f, -0.073564564f, - 0.997511456f, -0.070504573f, - 0.997723067f, -0.067443920f, - 0.997925286f, -0.064382631f, - 0.998118113f, -0.061320736f, - 0.998301545f, -0.058258265f, - 0.998475581f, -0.055195244f, - 0.998640218f, -0.052131705f, - 0.998795456f, -0.049067674f, - 0.998941293f, -0.046003182f, - 0.999077728f, -0.042938257f, - 0.999204759f, -0.039872928f, - 0.999322385f, -0.036807223f, - 0.999430605f, -0.033741172f, - 0.999529418f, -0.030674803f, - 0.999618822f, -0.027608146f, - 0.999698819f, -0.024541229f, - 0.999769405f, -0.021474080f, - 0.999830582f, -0.018406730f, - 0.999882347f, -0.015339206f, - 0.999924702f, -0.012271538f, - 0.999957645f, -0.009203755f, - 0.999981175f, -0.006135885f, - 0.999995294f, -0.003067957f -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) -/** - @par - Example code for Floating-point Twiddle factors Generation: - @par - 
for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 4096, PI = 3.14159265358979 - @par - Cos and Sin values are in interleaved fashion -*/ -const float32_t twiddleCoef_4096[8192] = { - 1.000000000f, 0.000000000f, - 0.999998823f, 0.001533980f, - 0.999995294f, 0.003067957f, - 0.999989411f, 0.004601926f, - 0.999981175f, 0.006135885f, - 0.999970586f, 0.007669829f, - 0.999957645f, 0.009203755f, - 0.999942350f, 0.010737659f, - 0.999924702f, 0.012271538f, - 0.999904701f, 0.013805389f, - 0.999882347f, 0.015339206f, - 0.999857641f, 0.016872988f, - 0.999830582f, 0.018406730f, - 0.999801170f, 0.019940429f, - 0.999769405f, 0.021474080f, - 0.999735288f, 0.023007681f, - 0.999698819f, 0.024541229f, - 0.999659997f, 0.026074718f, - 0.999618822f, 0.027608146f, - 0.999575296f, 0.029141509f, - 0.999529418f, 0.030674803f, - 0.999481187f, 0.032208025f, - 0.999430605f, 0.033741172f, - 0.999377670f, 0.035274239f, - 0.999322385f, 0.036807223f, - 0.999264747f, 0.038340120f, - 0.999204759f, 0.039872928f, - 0.999142419f, 0.041405641f, - 0.999077728f, 0.042938257f, - 0.999010686f, 0.044470772f, - 0.998941293f, 0.046003182f, - 0.998869550f, 0.047535484f, - 0.998795456f, 0.049067674f, - 0.998719012f, 0.050599749f, - 0.998640218f, 0.052131705f, - 0.998559074f, 0.053663538f, - 0.998475581f, 0.055195244f, - 0.998389737f, 0.056726821f, - 0.998301545f, 0.058258265f, - 0.998211003f, 0.059789571f, - 0.998118113f, 0.061320736f, - 0.998022874f, 0.062851758f, - 0.997925286f, 0.064382631f, - 0.997825350f, 0.065913353f, - 0.997723067f, 0.067443920f, - 0.997618435f, 0.068974328f, - 0.997511456f, 0.070504573f, - 0.997402130f, 0.072034653f, - 0.997290457f, 0.073564564f, - 0.997176437f, 0.075094301f, - 0.997060070f, 0.076623861f, - 0.996941358f, 0.078153242f, - 0.996820299f, 0.079682438f, - 0.996696895f, 0.081211447f, - 0.996571146f, 0.082740265f, - 0.996443051f, 0.084268888f, - 0.996312612f, 0.085797312f, - 0.996179829f, 0.087325535f, - 0.996044701f, 0.088853553f, - 0.995907229f, 0.090381361f, - 0.995767414f, 0.091908956f, - 0.995625256f, 0.093436336f, - 0.995480755f, 0.094963495f, - 0.995333912f, 0.096490431f, - 0.995184727f, 0.098017140f, - 0.995033199f, 0.099543619f, - 0.994879331f, 0.101069863f, - 0.994723121f, 0.102595869f, - 0.994564571f, 0.104121634f, - 0.994403680f, 0.105647154f, - 0.994240449f, 0.107172425f, - 0.994074879f, 0.108697444f, - 0.993906970f, 0.110222207f, - 0.993736722f, 0.111746711f, - 0.993564136f, 0.113270952f, - 0.993389211f, 0.114794927f, - 0.993211949f, 0.116318631f, - 0.993032350f, 0.117842062f, - 0.992850414f, 0.119365215f, - 0.992666142f, 0.120888087f, - 0.992479535f, 0.122410675f, - 0.992290591f, 0.123932975f, - 0.992099313f, 0.125454983f, - 0.991905700f, 0.126976696f, - 0.991709754f, 0.128498111f, - 0.991511473f, 0.130019223f, - 0.991310860f, 0.131540029f, - 0.991107914f, 0.133060525f, - 0.990902635f, 0.134580709f, - 0.990695025f, 0.136100575f, - 0.990485084f, 0.137620122f, - 0.990272812f, 0.139139344f, - 0.990058210f, 0.140658239f, - 0.989841278f, 0.142176804f, - 0.989622017f, 0.143695033f, - 0.989400428f, 0.145212925f, - 0.989176510f, 0.146730474f, - 0.988950265f, 0.148247679f, - 0.988721692f, 0.149764535f, - 0.988490793f, 0.151281038f, - 0.988257568f, 0.152797185f, - 0.988022017f, 0.154312973f, - 0.987784142f, 0.155828398f, - 0.987543942f, 0.157343456f, - 0.987301418f, 0.158858143f, - 0.987056571f, 0.160372457f, - 0.986809402f, 0.161886394f, - 0.986559910f, 0.163399949f, - 0.986308097f, 0.164913120f, - 0.986053963f, 0.166425904f, - 0.985797509f, 0.167938295f, - 0.985538735f, 0.169450291f, - 0.985277642f, 0.170961889f, - 0.985014231f, 0.172473084f, - 0.984748502f, 0.173983873f, - 0.984480455f, 0.175494253f, - 0.984210092f, 0.177004220f, - 0.983937413f, 0.178513771f, - 0.983662419f, 0.180022901f, - 0.983385110f, 0.181531608f, - 0.983105487f, 0.183039888f, - 0.982823551f, 0.184547737f, - 0.982539302f, 0.186055152f, - 0.982252741f, 0.187562129f, - 0.981963869f, 0.189068664f, - 0.981672686f, 0.190574755f, - 0.981379193f, 0.192080397f, - 0.981083391f, 0.193585587f, - 0.980785280f, 0.195090322f, - 0.980484862f, 0.196594598f, - 0.980182136f, 0.198098411f, - 0.979877104f, 0.199601758f, - 0.979569766f, 0.201104635f, - 0.979260123f, 0.202607039f, - 0.978948175f, 0.204108966f, - 0.978633924f, 0.205610413f, - 0.978317371f, 0.207111376f, - 0.977998515f, 0.208611852f, - 0.977677358f, 0.210111837f, - 0.977353900f, 0.211611327f, - 0.977028143f, 0.213110320f, - 0.976700086f, 0.214608811f, - 0.976369731f, 0.216106797f, - 0.976037079f, 0.217604275f, - 0.975702130f, 0.219101240f, - 0.975364885f, 0.220597690f, - 0.975025345f, 0.222093621f, - 0.974683511f, 0.223589029f, - 0.974339383f, 0.225083911f, - 0.973992962f, 0.226578264f, - 0.973644250f, 0.228072083f, - 0.973293246f, 0.229565366f, - 0.972939952f, 0.231058108f, - 0.972584369f, 0.232550307f, - 0.972226497f, 0.234041959f, - 0.971866337f, 0.235533059f, - 0.971503891f, 0.237023606f, - 0.971139158f, 0.238513595f, - 0.970772141f, 0.240003022f, - 0.970402839f, 0.241491885f, - 0.970031253f, 0.242980180f, - 0.969657385f, 0.244467903f, - 0.969281235f, 0.245955050f, - 0.968902805f, 0.247441619f, - 0.968522094f, 0.248927606f, - 0.968139105f, 0.250413007f, - 0.967753837f, 0.251897818f, - 0.967366292f, 0.253382037f, - 0.966976471f, 0.254865660f, - 0.966584374f, 0.256348682f, - 0.966190003f, 0.257831102f, - 0.965793359f, 0.259312915f, - 0.965394442f, 0.260794118f, - 0.964993253f, 0.262274707f, - 0.964589793f, 0.263754679f, - 0.964184064f, 0.265234030f, - 0.963776066f, 0.266712757f, - 0.963365800f, 0.268190857f, - 0.962953267f, 0.269668326f, - 0.962538468f, 0.271145160f, - 0.962121404f, 0.272621355f, - 0.961702077f, 0.274096910f, - 0.961280486f, 0.275571819f, - 0.960856633f, 0.277046080f, - 0.960430519f, 0.278519689f, - 0.960002146f, 0.279992643f, - 0.959571513f, 0.281464938f, - 0.959138622f, 0.282936570f, - 0.958703475f, 0.284407537f, - 0.958266071f, 0.285877835f, - 0.957826413f, 0.287347460f, - 0.957384501f, 0.288816408f, - 0.956940336f, 0.290284677f, - 0.956493919f, 0.291752263f, - 0.956045251f, 0.293219163f, - 0.955594334f, 0.294685372f, - 0.955141168f, 0.296150888f, - 0.954685755f, 0.297615707f, - 0.954228095f, 0.299079826f, - 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0.975702130f, -0.219101240f, - 0.976037079f, -0.217604275f, - 0.976369731f, -0.216106797f, - 0.976700086f, -0.214608811f, - 0.977028143f, -0.213110320f, - 0.977353900f, -0.211611327f, - 0.977677358f, -0.210111837f, - 0.977998515f, -0.208611852f, - 0.978317371f, -0.207111376f, - 0.978633924f, -0.205610413f, - 0.978948175f, -0.204108966f, - 0.979260123f, -0.202607039f, - 0.979569766f, -0.201104635f, - 0.979877104f, -0.199601758f, - 0.980182136f, -0.198098411f, - 0.980484862f, -0.196594598f, - 0.980785280f, -0.195090322f, - 0.981083391f, -0.193585587f, - 0.981379193f, -0.192080397f, - 0.981672686f, -0.190574755f, - 0.981963869f, -0.189068664f, - 0.982252741f, -0.187562129f, - 0.982539302f, -0.186055152f, - 0.982823551f, -0.184547737f, - 0.983105487f, -0.183039888f, - 0.983385110f, -0.181531608f, - 0.983662419f, -0.180022901f, - 0.983937413f, -0.178513771f, - 0.984210092f, -0.177004220f, - 0.984480455f, -0.175494253f, - 0.984748502f, -0.173983873f, - 0.985014231f, -0.172473084f, - 0.985277642f, -0.170961889f, - 0.985538735f, -0.169450291f, - 0.985797509f, -0.167938295f, - 0.986053963f, -0.166425904f, - 0.986308097f, -0.164913120f, - 0.986559910f, -0.163399949f, - 0.986809402f, -0.161886394f, - 0.987056571f, -0.160372457f, - 0.987301418f, -0.158858143f, - 0.987543942f, -0.157343456f, - 0.987784142f, -0.155828398f, - 0.988022017f, -0.154312973f, - 0.988257568f, -0.152797185f, - 0.988490793f, -0.151281038f, - 0.988721692f, -0.149764535f, - 0.988950265f, -0.148247679f, - 0.989176510f, -0.146730474f, - 0.989400428f, -0.145212925f, - 0.989622017f, -0.143695033f, - 0.989841278f, -0.142176804f, - 0.990058210f, -0.140658239f, - 0.990272812f, -0.139139344f, - 0.990485084f, -0.137620122f, - 0.990695025f, -0.136100575f, - 0.990902635f, -0.134580709f, - 0.991107914f, -0.133060525f, - 0.991310860f, -0.131540029f, - 0.991511473f, -0.130019223f, - 0.991709754f, -0.128498111f, - 0.991905700f, -0.126976696f, - 0.992099313f, -0.125454983f, - 0.992290591f, -0.123932975f, - 0.992479535f, -0.122410675f, - 0.992666142f, -0.120888087f, - 0.992850414f, -0.119365215f, - 0.993032350f, -0.117842062f, - 0.993211949f, -0.116318631f, - 0.993389211f, -0.114794927f, - 0.993564136f, -0.113270952f, - 0.993736722f, -0.111746711f, - 0.993906970f, -0.110222207f, - 0.994074879f, -0.108697444f, - 0.994240449f, -0.107172425f, - 0.994403680f, -0.105647154f, - 0.994564571f, -0.104121634f, - 0.994723121f, -0.102595869f, - 0.994879331f, -0.101069863f, - 0.995033199f, -0.099543619f, - 0.995184727f, -0.098017140f, - 0.995333912f, -0.096490431f, - 0.995480755f, -0.094963495f, - 0.995625256f, -0.093436336f, - 0.995767414f, -0.091908956f, - 0.995907229f, -0.090381361f, - 0.996044701f, -0.088853553f, - 0.996179829f, -0.087325535f, - 0.996312612f, -0.085797312f, - 0.996443051f, -0.084268888f, - 0.996571146f, -0.082740265f, - 0.996696895f, -0.081211447f, - 0.996820299f, -0.079682438f, - 0.996941358f, -0.078153242f, - 0.997060070f, -0.076623861f, - 0.997176437f, -0.075094301f, - 0.997290457f, -0.073564564f, - 0.997402130f, -0.072034653f, - 0.997511456f, -0.070504573f, - 0.997618435f, -0.068974328f, - 0.997723067f, -0.067443920f, - 0.997825350f, -0.065913353f, - 0.997925286f, -0.064382631f, - 0.998022874f, -0.062851758f, - 0.998118113f, -0.061320736f, - 0.998211003f, -0.059789571f, - 0.998301545f, -0.058258265f, - 0.998389737f, -0.056726821f, - 0.998475581f, -0.055195244f, - 0.998559074f, -0.053663538f, - 0.998640218f, -0.052131705f, - 0.998719012f, -0.050599749f, - 0.998795456f, -0.049067674f, - 0.998869550f, -0.047535484f, - 0.998941293f, -0.046003182f, - 0.999010686f, -0.044470772f, - 0.999077728f, -0.042938257f, - 0.999142419f, -0.041405641f, - 0.999204759f, -0.039872928f, - 0.999264747f, -0.038340120f, - 0.999322385f, -0.036807223f, - 0.999377670f, -0.035274239f, - 0.999430605f, -0.033741172f, - 0.999481187f, -0.032208025f, - 0.999529418f, -0.030674803f, - 0.999575296f, -0.029141509f, - 0.999618822f, -0.027608146f, - 0.999659997f, -0.026074718f, - 0.999698819f, -0.024541229f, - 0.999735288f, -0.023007681f, - 0.999769405f, -0.021474080f, - 0.999801170f, -0.019940429f, - 0.999830582f, -0.018406730f, - 0.999857641f, -0.016872988f, - 0.999882347f, -0.015339206f, - 0.999904701f, -0.013805389f, - 0.999924702f, -0.012271538f, - 0.999942350f, -0.010737659f, - 0.999957645f, -0.009203755f, - 0.999970586f, -0.007669829f, - 0.999981175f, -0.006135885f, - 0.999989411f, -0.004601926f, - 0.999995294f, -0.003067957f, - 0.999998823f, -0.001533980f -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - - -/** - @brief Q31 Twiddle factors Table -*/ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16) -/** - @par - Example code for Q31 Twiddle factors Generation:: - @par - 
 for(i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 16, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to Q31(Fixed point 1.31): - round(twiddleCoefQ31(i) * pow(2, 31)) - */ -const q31_t twiddleCoef_16_q31[24] = { - (q31_t)0x7FFFFFFF, (q31_t)0x00000000, - (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, - (q31_t)0x5A82799A, (q31_t)0x5A82799A, - (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, - (q31_t)0x00000000, (q31_t)0x7FFFFFFF, - (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, - (q31_t)0xA57D8666, (q31_t)0x5A82799A, - (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, - (q31_t)0x80000000, (q31_t)0x00000000, - (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, - (q31_t)0xA57D8666, (q31_t)0xA57D8666, - (q31_t)0xCF043AB2, (q31_t)0x89BE50C3 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32) -/** - @par - Example code for Q31 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 32, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to Q31(Fixed point 1.31): - round(twiddleCoefQ31(i) * pow(2, 31)) - */ -const q31_t twiddleCoef_32_q31[48] = { - (q31_t)0x7FFFFFFF, (q31_t)0x00000000, - (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, - (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, - (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, - (q31_t)0x5A82799A, (q31_t)0x5A82799A, - (q31_t)0x471CECE6, (q31_t)0x6A6D98A4, - (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, - (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, - (q31_t)0x00000000, (q31_t)0x7FFFFFFF, - (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, - (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, - (q31_t)0xB8E31319, (q31_t)0x6A6D98A4, - (q31_t)0xA57D8666, (q31_t)0x5A82799A, - (q31_t)0x9592675B, (q31_t)0x471CECE6, - (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, - (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, - (q31_t)0x80000000, (q31_t)0x00000000, - (q31_t)0x8275A0C0, (q31_t)0xE70747C3, - (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, - (q31_t)0x9592675B, (q31_t)0xB8E31319, - (q31_t)0xA57D8666, (q31_t)0xA57D8666, - (q31_t)0xB8E31319, (q31_t)0x9592675B, - (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, - (q31_t)0xE70747C3, (q31_t)0x8275A0C0 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) -/** - @par - Example code for Q31 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 64, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to Q31(Fixed point 1.31): - round(twiddleCoefQ31(i) * pow(2, 31)) - */ -const q31_t twiddleCoef_64_q31[96] = { - (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7F62368F, - (q31_t)0x0C8BD35E, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, - (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7641AF3C, - (q31_t)0x30FBC54D, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70, - (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x62F201AC, - (q31_t)0x5133CC94, (q31_t)0x5A82799A, (q31_t)0x5A82799A, - (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x471CECE6, - (q31_t)0x6A6D98A4, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6, - (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x25280C5D, - (q31_t)0x7A7D055B, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, - (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x00000000, - (q31_t)0x7FFFFFFF, (q31_t)0xF3742CA1, (q31_t)0x7F62368F, - (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xDAD7F3A2, - (q31_t)0x7A7D055B, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, - (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xB8E31319, - (q31_t)0x6A6D98A4, (q31_t)0xAECC336B, (q31_t)0x62F201AC, - (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0x9D0DFE53, - (q31_t)0x5133CC94, (q31_t)0x9592675B, (q31_t)0x471CECE6, - (q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x89BE50C3, - (q31_t)0x30FBC54D, (q31_t)0x8582FAA4, (q31_t)0x25280C5D, - (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x809DC970, - (q31_t)0x0C8BD35E, (q31_t)0x80000000, (q31_t)0x00000000, - (q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x8275A0C0, - (q31_t)0xE70747C3, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2, - (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8F1D343A, - (q31_t)0xC3A9458F, (q31_t)0x9592675B, (q31_t)0xB8E31319, - (q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0xA57D8666, - (q31_t)0xA57D8666, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53, - (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xC3A9458F, - (q31_t)0x8F1D343A, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, - (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xE70747C3, - (q31_t)0x8275A0C0, (q31_t)0xF3742CA1, (q31_t)0x809DC970 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128) -/** - @par - Example code for Q31 Twiddle factors Generation:: - @par - 
for (i = 0; i < 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 128, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to Q31(Fixed point 1.31): - round(twiddleCoefQ31(i) * pow(2, 31)) - */ -const q31_t twiddleCoef_128_q31[192] = { - (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FD8878D, - (q31_t)0x0647D97C, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E, - (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7D8A5F3F, - (q31_t)0x18F8B83C, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B, - (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x78848413, - (q31_t)0x2B1F34EB, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, - (q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x70E2CBC6, - (q31_t)0x3C56BA70, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64, - (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x66CF811F, - (q31_t)0x4C3FDFF3, (q31_t)0x62F201AC, (q31_t)0x5133CC94, - (q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5A82799A, - (q31_t)0x5A82799A, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89, - (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4C3FDFF3, - (q31_t)0x66CF811F, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4, - (q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x3C56BA70, - (q31_t)0x70E2CBC6, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0, - (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2B1F34EB, - (q31_t)0x78848413, (q31_t)0x25280C5D, (q31_t)0x7A7D055B, - (q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x18F8B83C, - (q31_t)0x7D8A5F3F, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC, - (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0647D97C, - (q31_t)0x7FD8878D, (q31_t)0x00000000, (q31_t)0x7FFFFFFF, - (q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF3742CA1, - (q31_t)0x7F62368F, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC, - (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE0E60684, - (q31_t)0x7C29FBEE, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B, - (q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xCF043AB2, - (q31_t)0x7641AF3C, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0, - (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xBE31E19B, - (q31_t)0x6DCA0D14, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4, - (q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xAECC336B, - (q31_t)0x62F201AC, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89, - (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA1288376, - (q31_t)0x55F5A4D2, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94, - (q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9592675B, - (q31_t)0x471CECE6, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64, - (q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8C4A142F, - (q31_t)0x36BA2013, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, - (q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8582FAA4, - (q31_t)0x25280C5D, (q31_t)0x83D60411, (q31_t)0x1F19F97B, - (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x8162AA03, - (q31_t)0x12C8106E, (q31_t)0x809DC970, (q31_t)0x0C8BD35E, - (q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80000000, - (q31_t)0x00000000, (q31_t)0x80277872, (q31_t)0xF9B82683, - (q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x8162AA03, - (q31_t)0xED37EF91, (q31_t)0x8275A0C0, (q31_t)0xE70747C3, - (q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x8582FAA4, - (q31_t)0xDAD7F3A2, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14, - (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8C4A142F, - (q31_t)0xC945DFEC, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F, - (q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9592675B, - (q31_t)0xB8E31319, (q31_t)0x99307EE0, (q31_t)0xB3C0200C, - (q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0xA1288376, - (q31_t)0xAA0A5B2D, (q31_t)0xA57D8666, (q31_t)0xA57D8666, - (q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAECC336B, - (q31_t)0x9D0DFE53, (q31_t)0xB3C0200C, (q31_t)0x99307EE0, - (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBE31E19B, - (q31_t)0x9235F2EB, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A, - (q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCF043AB2, - (q31_t)0x89BE50C3, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC, - (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xE0E60684, - (q31_t)0x83D60411, (q31_t)0xE70747C3, (q31_t)0x8275A0C0, - (q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xF3742CA1, - (q31_t)0x809DC970, (q31_t)0xF9B82683, (q31_t)0x80277872 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) -/** - @par - Example code for Q31 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 256, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to Q31(Fixed point 1.31): - round(twiddleCoefQ31(i) * pow(2, 31)) - - */ -const q31_t twiddleCoef_256_q31[384] = { - (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FF62182, - (q31_t)0x03242ABF, (q31_t)0x7FD8878D, (q31_t)0x0647D97C, - (q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F62368F, - (q31_t)0x0C8BD35E, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B, - (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E1D93E9, - (q31_t)0x15E21444, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, - (q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7C29FBEE, - (q31_t)0x1F19F97B, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5, - (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x798A23B1, - (q31_t)0x2826B928, (q31_t)0x78848413, (q31_t)0x2B1F34EB, - (q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x7641AF3C, - (q31_t)0x30FBC54D, (q31_t)0x7504D345, (q31_t)0x33DEF287, - (q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x72552C84, - (q31_t)0x398CDD32, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70, - (q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6DCA0D14, - (q31_t)0x41CE1E64, (q31_t)0x6C242960, (q31_t)0x447ACD50, - (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x68A69E81, - (q31_t)0x49B41533, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3, - (q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x62F201AC, - (q31_t)0x5133CC94, (q31_t)0x60EC3830, (q31_t)0x539B2AEF, - (q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5CB420DF, - (q31_t)0x5842DD54, (q31_t)0x5A82799A, (q31_t)0x5A82799A, - (q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x55F5A4D2, - (q31_t)0x5ED77C89, (q31_t)0x539B2AEF, (q31_t)0x60EC3830, - (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4EBFE8A4, - (q31_t)0x64E88926, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F, - (q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x471CECE6, - (q31_t)0x6A6D98A4, (q31_t)0x447ACD50, (q31_t)0x6C242960, - (q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x3F1749B7, - (q31_t)0x6F5F02B1, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6, - (q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x36BA2013, - (q31_t)0x73B5EBD0, (q31_t)0x33DEF287, (q31_t)0x7504D345, - (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2E110A62, - (q31_t)0x776C4EDB, (q31_t)0x2B1F34EB, (q31_t)0x78848413, - (q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x25280C5D, - (q31_t)0x7A7D055B, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D, - (q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1C0B826A, - (q31_t)0x7CE3CEB1, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, - (q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x12C8106E, - (q31_t)0x7E9D55FC, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3, - (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x096A9049, - (q31_t)0x7FA736B4, (q31_t)0x0647D97C, (q31_t)0x7FD8878D, - (q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x00000000, - (q31_t)0x7FFFFFFF, (q31_t)0xFCDBD541, (q31_t)0x7FF62182, - (q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF6956FB6, - (q31_t)0x7FA736B4, (q31_t)0xF3742CA1, (q31_t)0x7F62368F, - (q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xED37EF91, - (q31_t)0x7E9D55FC, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9, - (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE3F47D95, - (q31_t)0x7CE3CEB1, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE, - (q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDAD7F3A2, - (q31_t)0x7A7D055B, (q31_t)0xD7D946D7, (q31_t)0x798A23B1, - (q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD1EEF59E, - (q31_t)0x776C4EDB, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, - (q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xC945DFEC, - (q31_t)0x73B5EBD0, (q31_t)0xC67322CD, (q31_t)0x72552C84, - (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC0E8B648, - (q31_t)0x6F5F02B1, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14, - (q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xB8E31319, - (q31_t)0x6A6D98A4, (q31_t)0xB64BEACC, (q31_t)0x68A69E81, - (q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB140175B, - (q31_t)0x64E88926, (q31_t)0xAECC336B, (q31_t)0x62F201AC, - (q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAA0A5B2D, - (q31_t)0x5ED77C89, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF, - (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA34BDF20, - (q31_t)0x5842DD54, (q31_t)0xA1288376, (q31_t)0x55F5A4D2, - (q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9D0DFE53, - (q31_t)0x5133CC94, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4, - (q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9759617E, - (q31_t)0x49B41533, (q31_t)0x9592675B, (q31_t)0x471CECE6, - (q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9235F2EB, - (q31_t)0x41CE1E64, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7, - (q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8DAAD37B, - (q31_t)0x398CDD32, (q31_t)0x8C4A142F, (q31_t)0x36BA2013, - (q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x89BE50C3, - (q31_t)0x30FBC54D, (q31_t)0x8893B124, (q31_t)0x2E110A62, - (q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8675DC4E, - (q31_t)0x2826B928, (q31_t)0x8582FAA4, (q31_t)0x25280C5D, - (q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x83D60411, - (q31_t)0x1F19F97B, (q31_t)0x831C314E, (q31_t)0x1C0B826A, - (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x81E26C16, - (q31_t)0x15E21444, (q31_t)0x8162AA03, (q31_t)0x12C8106E, - (q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x809DC970, - (q31_t)0x0C8BD35E, (q31_t)0x8058C94C, (q31_t)0x096A9049, - (q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x8009DE7D, - (q31_t)0x03242ABF, (q31_t)0x80000000, (q31_t)0x00000000, - (q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x80277872, - (q31_t)0xF9B82683, (q31_t)0x8058C94C, (q31_t)0xF6956FB6, - (q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80F66E3C, - (q31_t)0xF054D8D4, (q31_t)0x8162AA03, (q31_t)0xED37EF91, - (q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x8275A0C0, - (q31_t)0xE70747C3, (q31_t)0x831C314E, (q31_t)0xE3F47D95, - (q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x84A2FC62, - (q31_t)0xDDDC5B3A, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2, - (q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x877B7BEC, - (q31_t)0xD4E0CB14, (q31_t)0x8893B124, (q31_t)0xD1EEF59E, - (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8AFB2CBA, - (q31_t)0xCC210D78, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC, - (q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8F1D343A, - (q31_t)0xC3A9458F, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648, - (q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x93DBD69F, - (q31_t)0xBB8532AF, (q31_t)0x9592675B, (q31_t)0xB8E31319, - (q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x99307EE0, - (q31_t)0xB3C0200C, (q31_t)0x9B1776D9, (q31_t)0xB140175B, - (q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9F13C7D0, - (q31_t)0xAC64D510, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D, - (q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA57D8666, - (q31_t)0xA57D8666, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20, - (q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAC64D510, - (q31_t)0x9F13C7D0, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53, - (q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB3C0200C, - (q31_t)0x99307EE0, (q31_t)0xB64BEACC, (q31_t)0x9759617E, - (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBB8532AF, - (q31_t)0x93DBD69F, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB, - (q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC3A9458F, - (q31_t)0x8F1D343A, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B, - (q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCC210D78, - (q31_t)0x8AFB2CBA, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, - (q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD4E0CB14, - (q31_t)0x877B7BEC, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E, - (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDDDC5B3A, - (q31_t)0x84A2FC62, (q31_t)0xE0E60684, (q31_t)0x83D60411, - (q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE70747C3, - (q31_t)0x8275A0C0, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16, - (q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xF054D8D4, - (q31_t)0x80F66E3C, (q31_t)0xF3742CA1, (q31_t)0x809DC970, - (q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF9B82683, - (q31_t)0x80277872, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512) -/** - @par - Example code for Q31 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 512, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to Q31(Fixed point 1.31): - round(twiddleCoefQ31(i) * pow(2, 31)) - - */ -const q31_t twiddleCoef_512_q31[768] = { - (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFD885A, - (q31_t)0x01921D1F, (q31_t)0x7FF62182, (q31_t)0x03242ABF, - (q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FD8878D, - (q31_t)0x0647D97C, (q31_t)0x7FC25596, (q31_t)0x07D95B9E, - (q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F872BF3, - (q31_t)0x0AFB6805, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E, - (q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F0991C3, - (q31_t)0x0FAB272B, (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE, - (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E5FE493, - (q31_t)0x145576B1, (q31_t)0x7E1D93E9, (q31_t)0x15E21444, - (q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7D8A5F3F, - (q31_t)0x18F8B83C, (q31_t)0x7D3980EC, (q31_t)0x1A82A025, - (q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7C894BDD, - (q31_t)0x1D934FE5, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B, - (q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7B5D039D, - (q31_t)0x2223A4C5, (q31_t)0x7AEF6323, (q31_t)0x23A6887E, - (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A05EEAD, - (q31_t)0x26A82185, (q31_t)0x798A23B1, (q31_t)0x2826B928, - (q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78848413, - (q31_t)0x2B1F34EB, (q31_t)0x77FAB988, (q31_t)0x2C98FBBA, - (q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x76D94988, - (q31_t)0x2F875262, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, - (q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7504D345, - (q31_t)0x33DEF287, (q31_t)0x745F9DD1, (q31_t)0x354D9056, - (q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x7307C3D0, - (q31_t)0x382493B0, (q31_t)0x72552C84, (q31_t)0x398CDD32, - (q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x70E2CBC6, - (q31_t)0x3C56BA70, (q31_t)0x70231099, (q31_t)0x3DB832A5, - (q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6E96A99C, - (q31_t)0x4073F21D, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64, - (q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6C242960, - (q31_t)0x447ACD50, (q31_t)0x6B4AF278, (q31_t)0x45CD358F, - (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x698C246C, - (q31_t)0x4869E664, (q31_t)0x68A69E81, (q31_t)0x49B41533, - (q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x66CF811F, - (q31_t)0x4C3FDFF3, (q31_t)0x65DDFBD3, (q31_t)0x4D8162C4, - (q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x63EF328F, - (q31_t)0x4FFB654D, (q31_t)0x62F201AC, (q31_t)0x5133CC94, - (q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x60EC3830, - (q31_t)0x539B2AEF, (q31_t)0x5FE3B38D, (q31_t)0x54CA0A4A, - (q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5DC79D7C, - (q31_t)0x571DEEF9, (q31_t)0x5CB420DF, (q31_t)0x5842DD54, - (q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5A82799A, - (q31_t)0x5A82799A, (q31_t)0x59646497, (q31_t)0x5B9D1153, - (q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x571DEEF9, - (q31_t)0x5DC79D7C, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89, - (q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x539B2AEF, - (q31_t)0x60EC3830, (q31_t)0x5269126E, (q31_t)0x61F1003E, - (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4FFB654D, - (q31_t)0x63EF328F, (q31_t)0x4EBFE8A4, (q31_t)0x64E88926, - (q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4C3FDFF3, - (q31_t)0x66CF811F, (q31_t)0x4AFB6C97, (q31_t)0x67BD0FBC, - (q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x4869E664, - (q31_t)0x698C246C, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4, - (q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x447ACD50, - (q31_t)0x6C242960, (q31_t)0x4325C135, (q31_t)0x6CF934FB, - (q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4073F21D, - (q31_t)0x6E96A99C, (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1, - (q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3C56BA70, - (q31_t)0x70E2CBC6, (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2, - (q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x382493B0, - (q31_t)0x7307C3D0, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0, - (q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x33DEF287, - (q31_t)0x7504D345, (q31_t)0x326E54C7, (q31_t)0x75A585CF, - (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2F875262, - (q31_t)0x76D94988, (q31_t)0x2E110A62, (q31_t)0x776C4EDB, - (q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2B1F34EB, - (q31_t)0x78848413, (q31_t)0x29A3C484, (q31_t)0x7909A92C, - (q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x26A82185, - (q31_t)0x7A05EEAD, (q31_t)0x25280C5D, (q31_t)0x7A7D055B, - (q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x2223A4C5, - (q31_t)0x7B5D039D, (q31_t)0x209F701C, (q31_t)0x7BC5E28F, - (q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1D934FE5, - (q31_t)0x7C894BDD, (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1, - (q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x18F8B83C, - (q31_t)0x7D8A5F3F, (q31_t)0x176DD9DE, (q31_t)0x7DD6668E, - (q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x145576B1, - (q31_t)0x7E5FE493, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC, - (q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x0FAB272B, - (q31_t)0x7F0991C3, (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5, - (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0AFB6805, - (q31_t)0x7F872BF3, (q31_t)0x096A9049, (q31_t)0x7FA736B4, - (q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x0647D97C, - (q31_t)0x7FD8878D, (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0, - (q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x01921D1F, - (q31_t)0x7FFD885A, (q31_t)0x00000000, (q31_t)0x7FFFFFFF, - (q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFCDBD541, - (q31_t)0x7FF62182, (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0, - (q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF826A461, - (q31_t)0x7FC25596, (q31_t)0xF6956FB6, (q31_t)0x7FA736B4, - (q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF3742CA1, - (q31_t)0x7F62368F, (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5, - (q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEEC60F31, - (q31_t)0x7ED5E5C6, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC, - (q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEA1DEBBB, - (q31_t)0x7E1D93E9, (q31_t)0xE8922621, (q31_t)0x7DD6668E, - (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE57D5FDA, - (q31_t)0x7D3980EC, (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1, - (q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE0E60684, - (q31_t)0x7C29FBEE, (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F, - (q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDC597781, - (q31_t)0x7AEF6323, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B, - (q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD7D946D7, - (q31_t)0x798A23B1, (q31_t)0xD65C3B7B, (q31_t)0x7909A92C, - (q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD3670445, - (q31_t)0x77FAB988, (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB, - (q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xCF043AB2, - (q31_t)0x7641AF3C, (q31_t)0xCD91AB38, (q31_t)0x75A585CF, - (q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCAB26FA9, - (q31_t)0x745F9DD1, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0, - (q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC67322CD, - (q31_t)0x72552C84, (q31_t)0xC50D1148, (q31_t)0x719E2CD2, - (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC247CD5A, - (q31_t)0x70231099, (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1, - (q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBE31E19B, - (q31_t)0x6DCA0D14, (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB, - (q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBA32CA70, - (q31_t)0x6B4AF278, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4, - (q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB64BEACC, - (q31_t)0x68A69E81, (q31_t)0xB5049368, (q31_t)0x67BD0FBC, - (q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB27E9D3B, - (q31_t)0x65DDFBD3, (q31_t)0xB140175B, (q31_t)0x64E88926, - (q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAECC336B, - (q31_t)0x62F201AC, (q31_t)0xAD96ED91, (q31_t)0x61F1003E, - (q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAB35F5B5, - (q31_t)0x5FE3B38D, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89, - (q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA7BD22AB, - (q31_t)0x5CB420DF, (q31_t)0xA69B9B68, (q31_t)0x5B9D1153, - (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA462EEAC, - (q31_t)0x59646497, (q31_t)0xA34BDF20, (q31_t)0x5842DD54, - (q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1288376, - (q31_t)0x55F5A4D2, (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A, - (q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9E0EFFC1, - (q31_t)0x5269126E, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94, - (q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9B1776D9, - (q31_t)0x4EBFE8A4, (q31_t)0x9A22042C, (q31_t)0x4D8162C4, - (q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9842F043, - (q31_t)0x4AFB6C97, (q31_t)0x9759617E, (q31_t)0x49B41533, - (q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x9592675B, - (q31_t)0x471CECE6, (q31_t)0x94B50D87, (q31_t)0x45CD358F, - (q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9306CB04, - (q31_t)0x4325C135, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64, - (q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x90A0FD4E, - (q31_t)0x3F1749B7, (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5, - (q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8E61D32D, - (q31_t)0x3AF2EEB7, (q31_t)0x8DAAD37B, (q31_t)0x398CDD32, - (q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8C4A142F, - (q31_t)0x36BA2013, (q31_t)0x8BA0622F, (q31_t)0x354D9056, - (q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8A5A7A30, - (q31_t)0x326E54C7, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, - (q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x8893B124, - (q31_t)0x2E110A62, (q31_t)0x88054677, (q31_t)0x2C98FBBA, - (q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x86F656D3, - (q31_t)0x29A3C484, (q31_t)0x8675DC4E, (q31_t)0x2826B928, - (q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x8582FAA4, - (q31_t)0x25280C5D, (q31_t)0x85109CDC, (q31_t)0x23A6887E, - (q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x843A1D70, - (q31_t)0x209F701C, (q31_t)0x83D60411, (q31_t)0x1F19F97B, - (q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x831C314E, - (q31_t)0x1C0B826A, (q31_t)0x82C67F13, (q31_t)0x1A82A025, - (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x82299971, - (q31_t)0x176DD9DE, (q31_t)0x81E26C16, (q31_t)0x15E21444, - (q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x8162AA03, - (q31_t)0x12C8106E, (q31_t)0x812A1A39, (q31_t)0x1139F0CE, - (q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80C7A80A, - (q31_t)0x0E1BC2E3, (q31_t)0x809DC970, (q31_t)0x0C8BD35E, - (q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x8058C94C, - (q31_t)0x096A9049, (q31_t)0x803DAA69, (q31_t)0x07D95B9E, - (q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80163440, - (q31_t)0x04B6195D, (q31_t)0x8009DE7D, (q31_t)0x03242ABF, - (q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x80000000, - (q31_t)0x00000000, (q31_t)0x800277A5, (q31_t)0xFE6DE2E0, - (q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x80163440, - (q31_t)0xFB49E6A2, (q31_t)0x80277872, (q31_t)0xF9B82683, - (q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8058C94C, - (q31_t)0xF6956FB6, (q31_t)0x8078D40D, (q31_t)0xF50497FA, - (q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80C7A80A, - (q31_t)0xF1E43D1C, (q31_t)0x80F66E3C, (q31_t)0xF054D8D4, - (q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8162AA03, - (q31_t)0xED37EF91, (q31_t)0x81A01B6C, (q31_t)0xEBAA894E, - (q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x82299971, - (q31_t)0xE8922621, (q31_t)0x8275A0C0, (q31_t)0xE70747C3, - (q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x831C314E, - (q31_t)0xE3F47D95, (q31_t)0x8376B422, (q31_t)0xE26CB01A, - (q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x843A1D70, - (q31_t)0xDF608FE3, (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A, - (q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x8582FAA4, - (q31_t)0xDAD7F3A2, (q31_t)0x85FA1152, (q31_t)0xD957DE7A, - (q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86F656D3, - (q31_t)0xD65C3B7B, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14, - (q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x8893B124, - (q31_t)0xD1EEF59E, (q31_t)0x8926B677, (q31_t)0xD078AD9D, - (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8A5A7A30, - (q31_t)0xCD91AB38, (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78, - (q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8C4A142F, - (q31_t)0xC945DFEC, (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50, - (q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8E61D32D, - (q31_t)0xC50D1148, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F, - (q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x90A0FD4E, - (q31_t)0xC0E8B648, (q31_t)0x91695663, (q31_t)0xBF8C0DE2, - (q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9306CB04, - (q31_t)0xBCDA3ECA, (q31_t)0x93DBD69F, (q31_t)0xBB8532AF, - (q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x9592675B, - (q31_t)0xB8E31319, (q31_t)0x9673DB94, (q31_t)0xB796199B, - (q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x9842F043, - (q31_t)0xB5049368, (q31_t)0x99307EE0, (q31_t)0xB3C0200C, - (q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9B1776D9, - (q31_t)0xB140175B, (q31_t)0x9C10CD70, (q31_t)0xB0049AB2, - (q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9E0EFFC1, - (q31_t)0xAD96ED91, (q31_t)0x9F13C7D0, (q31_t)0xAC64D510, - (q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA1288376, - (q31_t)0xAA0A5B2D, (q31_t)0xA2386283, (q31_t)0xA8E21106, - (q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA462EEAC, - (q31_t)0xA69B9B68, (q31_t)0xA57D8666, (q31_t)0xA57D8666, - (q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA7BD22AB, - (q31_t)0xA34BDF20, (q31_t)0xA8E21106, (q31_t)0xA2386283, - (q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAB35F5B5, - (q31_t)0xA01C4C72, (q31_t)0xAC64D510, (q31_t)0x9F13C7D0, - (q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xAECC336B, - (q31_t)0x9D0DFE53, (q31_t)0xB0049AB2, (q31_t)0x9C10CD70, - (q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB27E9D3B, - (q31_t)0x9A22042C, (q31_t)0xB3C0200C, (q31_t)0x99307EE0, - (q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB64BEACC, - (q31_t)0x9759617E, (q31_t)0xB796199B, (q31_t)0x9673DB94, - (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBA32CA70, - (q31_t)0x94B50D87, (q31_t)0xBB8532AF, (q31_t)0x93DBD69F, - (q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBE31E19B, - (q31_t)0x9235F2EB, (q31_t)0xBF8C0DE2, (q31_t)0x91695663, - (q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC247CD5A, - (q31_t)0x8FDCEF66, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A, - (q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC67322CD, - (q31_t)0x8DAAD37B, (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30, - (q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCAB26FA9, - (q31_t)0x8BA0622F, (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA, - (q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCF043AB2, - (q31_t)0x89BE50C3, (q31_t)0xD078AD9D, (q31_t)0x8926B677, - (q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD3670445, - (q31_t)0x88054677, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC, - (q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD7D946D7, - (q31_t)0x8675DC4E, (q31_t)0xD957DE7A, (q31_t)0x85FA1152, - (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDC597781, - (q31_t)0x85109CDC, (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62, - (q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xE0E60684, - (q31_t)0x83D60411, (q31_t)0xE26CB01A, (q31_t)0x8376B422, - (q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE57D5FDA, - (q31_t)0x82C67F13, (q31_t)0xE70747C3, (q31_t)0x8275A0C0, - (q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xEA1DEBBB, - (q31_t)0x81E26C16, (q31_t)0xEBAA894E, (q31_t)0x81A01B6C, - (q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xEEC60F31, - (q31_t)0x812A1A39, (q31_t)0xF054D8D4, (q31_t)0x80F66E3C, - (q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF3742CA1, - (q31_t)0x809DC970, (q31_t)0xF50497FA, (q31_t)0x8078D40D, - (q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF826A461, - (q31_t)0x803DAA69, (q31_t)0xF9B82683, (q31_t)0x80277872, - (q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFCDBD541, - (q31_t)0x8009DE7D, (q31_t)0xFE6DE2E0, (q31_t)0x800277A5 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) -/** - @par - Example code for Q31 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 1024, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to Q31(Fixed point 1.31): - round(twiddleCoefQ31(i) * pow(2, 31)) - - */ -const q31_t twiddleCoef_1024_q31[1536] = { - (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFF6216, - (q31_t)0x00C90F88, (q31_t)0x7FFD885A, (q31_t)0x01921D1F, - (q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF62182, - (q31_t)0x03242ABF, (q31_t)0x7FF09477, (q31_t)0x03ED26E6, - (q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE1C76B, - (q31_t)0x057F0034, (q31_t)0x7FD8878D, (q31_t)0x0647D97C, - (q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FC25596, - (q31_t)0x07D95B9E, (q31_t)0x7FB563B2, (q31_t)0x08A2009A, - (q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F97CEBC, - (q31_t)0x0A3308BC, (q31_t)0x7F872BF3, (q31_t)0x0AFB6805, - (q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F62368F, - (q31_t)0x0C8BD35E, (q31_t)0x7F4DE450, (q31_t)0x0D53DB92, - (q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F2191B4, - (q31_t)0x0EE38765, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B, - (q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7ED5E5C6, - (q31_t)0x1139F0CE, (q31_t)0x7EBA3A39, (q31_t)0x120116D4, - (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E7F3956, - (q31_t)0x138EDBB0, (q31_t)0x7E5FE493, (q31_t)0x145576B1, - (q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E1D93E9, - (q31_t)0x15E21444, (q31_t)0x7DFA98A7, (q31_t)0x16A81305, - (q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DB0FDF7, - (q31_t)0x183366E8, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, - (q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D3980EC, - (q31_t)0x1A82A025, (q31_t)0x7D0F4218, (q31_t)0x1B4732EF, - (q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CB72724, - (q31_t)0x1CCF8CB3, (q31_t)0x7C894BDD, (q31_t)0x1D934FE5, - (q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C29FBEE, - (q31_t)0x1F19F97B, (q31_t)0x7BF88830, (q31_t)0x1FDCDC1A, - (q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7B920B89, - (q31_t)0x2161B39F, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5, - (q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7AEF6323, - (q31_t)0x23A6887E, (q31_t)0x7AB6CBA3, (q31_t)0x24677757, - (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A4210D8, - (q31_t)0x25E845B5, (q31_t)0x7A05EEAD, (q31_t)0x26A82185, - (q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x798A23B1, - (q31_t)0x2826B928, (q31_t)0x794A7C11, (q31_t)0x28E5714A, - (q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78C7ABA1, - (q31_t)0x2A61B101, (q31_t)0x78848413, (q31_t)0x2B1F34EB, - (q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x77FAB988, - (q31_t)0x2C98FBBA, (q31_t)0x77B417DF, (q31_t)0x2D553AFB, - (q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x77235F2D, - (q31_t)0x2ECC681E, (q31_t)0x76D94988, (q31_t)0x2F875262, - (q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x7641AF3C, - (q31_t)0x30FBC54D, (q31_t)0x75F42C0A, (q31_t)0x31B54A5D, - (q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7555BD4B, - (q31_t)0x3326E2C2, (q31_t)0x7504D345, (q31_t)0x33DEF287, - (q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x745F9DD1, - (q31_t)0x354D9056, (q31_t)0x740B53FA, (q31_t)0x36041AD9, - (q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x735F6626, - (q31_t)0x376F9E46, (q31_t)0x7307C3D0, (q31_t)0x382493B0, - (q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x72552C84, - (q31_t)0x398CDD32, (q31_t)0x71FA3948, (q31_t)0x3A402DD1, - (q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x71410804, - (q31_t)0x3BA51E29, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70, - (q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x70231099, - (q31_t)0x3DB832A5, (q31_t)0x6FC19385, (q31_t)0x3E680B2C, - (q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6EFB5F12, - (q31_t)0x3FC5EC97, (q31_t)0x6E96A99C, (q31_t)0x4073F21D, - (q31_t)0x6E30E349, (q31_t)0x4121589A, (q31_t)0x6DCA0D14, - (q31_t)0x41CE1E64, (q31_t)0x6D6227FA, (q31_t)0x427A41D0, - (q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6C8F351C, - (q31_t)0x43D09AEC, (q31_t)0x6C242960, (q31_t)0x447ACD50, - (q31_t)0x6BB812D0, (q31_t)0x452456BC, (q31_t)0x6B4AF278, - (q31_t)0x45CD358F, (q31_t)0x6ADCC964, (q31_t)0x46756827, - (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x69FD614A, - (q31_t)0x47C3C22E, (q31_t)0x698C246C, (q31_t)0x4869E664, - (q31_t)0x6919E320, (q31_t)0x490F57EE, (q31_t)0x68A69E81, - (q31_t)0x49B41533, (q31_t)0x683257AA, (q31_t)0x4A581C9D, - (q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x6746C7D7, - (q31_t)0x4B9E038F, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3, - (q31_t)0x66573CBB, (q31_t)0x4CE10034, (q31_t)0x65DDFBD3, - (q31_t)0x4D8162C4, (q31_t)0x6563BF92, (q31_t)0x4E210617, - (q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x646C59BF, - (q31_t)0x4F5E08E3, (q31_t)0x63EF328F, (q31_t)0x4FFB654D, - (q31_t)0x637114CC, (q31_t)0x5097FC5E, (q31_t)0x62F201AC, - (q31_t)0x5133CC94, (q31_t)0x6271FA69, (q31_t)0x51CED46E, - (q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x616F146B, - (q31_t)0x53028517, (q31_t)0x60EC3830, (q31_t)0x539B2AEF, - (q31_t)0x60686CCE, (q31_t)0x5433027D, (q31_t)0x5FE3B38D, - (q31_t)0x54CA0A4A, (q31_t)0x5F5E0DB3, (q31_t)0x556040E2, - (q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5E50015D, - (q31_t)0x568A34A9, (q31_t)0x5DC79D7C, (q31_t)0x571DEEF9, - (q31_t)0x5D3E5236, (q31_t)0x57B0D256, (q31_t)0x5CB420DF, - (q31_t)0x5842DD54, (q31_t)0x5C290ACC, (q31_t)0x58D40E8C, - (q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B1035CF, - (q31_t)0x59F3DE12, (q31_t)0x5A82799A, (q31_t)0x5A82799A, - (q31_t)0x59F3DE12, (q31_t)0x5B1035CF, (q31_t)0x59646497, - (q31_t)0x5B9D1153, (q31_t)0x58D40E8C, (q31_t)0x5C290ACC, - (q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x57B0D256, - (q31_t)0x5D3E5236, (q31_t)0x571DEEF9, (q31_t)0x5DC79D7C, - (q31_t)0x568A34A9, (q31_t)0x5E50015D, (q31_t)0x55F5A4D2, - (q31_t)0x5ED77C89, (q31_t)0x556040E2, (q31_t)0x5F5E0DB3, - (q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x5433027D, - (q31_t)0x60686CCE, (q31_t)0x539B2AEF, (q31_t)0x60EC3830, - (q31_t)0x53028517, (q31_t)0x616F146B, (q31_t)0x5269126E, - (q31_t)0x61F1003E, (q31_t)0x51CED46E, (q31_t)0x6271FA69, - (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x5097FC5E, - (q31_t)0x637114CC, (q31_t)0x4FFB654D, (q31_t)0x63EF328F, - (q31_t)0x4F5E08E3, (q31_t)0x646C59BF, (q31_t)0x4EBFE8A4, - (q31_t)0x64E88926, (q31_t)0x4E210617, (q31_t)0x6563BF92, - (q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4CE10034, - (q31_t)0x66573CBB, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F, - (q31_t)0x4B9E038F, (q31_t)0x6746C7D7, (q31_t)0x4AFB6C97, - (q31_t)0x67BD0FBC, (q31_t)0x4A581C9D, (q31_t)0x683257AA, - (q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x490F57EE, - (q31_t)0x6919E320, (q31_t)0x4869E664, (q31_t)0x698C246C, - (q31_t)0x47C3C22E, (q31_t)0x69FD614A, (q31_t)0x471CECE6, - (q31_t)0x6A6D98A4, (q31_t)0x46756827, (q31_t)0x6ADCC964, - (q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x452456BC, - (q31_t)0x6BB812D0, (q31_t)0x447ACD50, (q31_t)0x6C242960, - (q31_t)0x43D09AEC, (q31_t)0x6C8F351C, (q31_t)0x4325C135, - (q31_t)0x6CF934FB, (q31_t)0x427A41D0, (q31_t)0x6D6227FA, - (q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4121589A, - (q31_t)0x6E30E349, (q31_t)0x4073F21D, (q31_t)0x6E96A99C, - (q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12, (q31_t)0x3F1749B7, - (q31_t)0x6F5F02B1, (q31_t)0x3E680B2C, (q31_t)0x6FC19385, - (q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D07C1D5, - (q31_t)0x708378FE, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6, - (q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3AF2EEB7, - (q31_t)0x719E2CD2, (q31_t)0x3A402DD1, (q31_t)0x71FA3948, - (q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x38D8FE93, - (q31_t)0x72AF05A6, (q31_t)0x382493B0, (q31_t)0x7307C3D0, - (q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x36BA2013, - (q31_t)0x73B5EBD0, (q31_t)0x36041AD9, (q31_t)0x740B53FA, - (q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x3496824F, - (q31_t)0x74B2C883, (q31_t)0x33DEF287, (q31_t)0x7504D345, - (q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x326E54C7, - (q31_t)0x75A585CF, (q31_t)0x31B54A5D, (q31_t)0x75F42C0A, - (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x3041C760, - (q31_t)0x768E0EA5, (q31_t)0x2F875262, (q31_t)0x76D94988, - (q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E110A62, - (q31_t)0x776C4EDB, (q31_t)0x2D553AFB, (q31_t)0x77B417DF, - (q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2BDC4E6F, - (q31_t)0x78403328, (q31_t)0x2B1F34EB, (q31_t)0x78848413, - (q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x29A3C484, - (q31_t)0x7909A92C, (q31_t)0x28E5714A, (q31_t)0x794A7C11, - (q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27679DF4, - (q31_t)0x79C89F6D, (q31_t)0x26A82185, (q31_t)0x7A05EEAD, - (q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x25280C5D, - (q31_t)0x7A7D055B, (q31_t)0x24677757, (q31_t)0x7AB6CBA3, - (q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x22E541AE, - (q31_t)0x7B26CB4F, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D, - (q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x209F701C, - (q31_t)0x7BC5E28F, (q31_t)0x1FDCDC1A, (q31_t)0x7BF88830, - (q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1E56CA1E, - (q31_t)0x7C5A3D4F, (q31_t)0x1D934FE5, (q31_t)0x7C894BDD, - (q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C0B826A, - (q31_t)0x7CE3CEB1, (q31_t)0x1B4732EF, (q31_t)0x7D0F4218, - (q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x19BDCBF2, - (q31_t)0x7D628AC5, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, - (q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x176DD9DE, - (q31_t)0x7DD6668E, (q31_t)0x16A81305, (q31_t)0x7DFA98A7, - (q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x151BDF85, - (q31_t)0x7E3F57FE, (q31_t)0x145576B1, (q31_t)0x7E5FE493, - (q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x12C8106E, - (q31_t)0x7E9D55FC, (q31_t)0x120116D4, (q31_t)0x7EBA3A39, - (q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x1072A047, - (q31_t)0x7EF0585F, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3, - (q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0E1BC2E3, - (q31_t)0x7F3857F5, (q31_t)0x0D53DB92, (q31_t)0x7F4DE450, - (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0BC3AC35, - (q31_t)0x7F754E7F, (q31_t)0x0AFB6805, (q31_t)0x7F872BF3, - (q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x096A9049, - (q31_t)0x7FA736B4, (q31_t)0x08A2009A, (q31_t)0x7FB563B2, - (q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x0710A344, - (q31_t)0x7FCE0C3E, (q31_t)0x0647D97C, (q31_t)0x7FD8878D, - (q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x04B6195D, - (q31_t)0x7FE9CBC0, (q31_t)0x03ED26E6, (q31_t)0x7FF09477, - (q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x025B26D7, - (q31_t)0x7FFA72D1, (q31_t)0x01921D1F, (q31_t)0x7FFD885A, - (q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x00000000, - (q31_t)0x7FFFFFFF, (q31_t)0xFF36F078, (q31_t)0x7FFF6216, - (q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFDA4D928, - (q31_t)0x7FFA72D1, (q31_t)0xFCDBD541, (q31_t)0x7FF62182, - (q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFB49E6A2, - (q31_t)0x7FE9CBC0, (q31_t)0xFA80FFCB, (q31_t)0x7FE1C76B, - (q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF8EF5CBB, - (q31_t)0x7FCE0C3E, (q31_t)0xF826A461, (q31_t)0x7FC25596, - (q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF6956FB6, - (q31_t)0x7FA736B4, (q31_t)0xF5CCF743, (q31_t)0x7F97CEBC, - (q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF43C53CA, - (q31_t)0x7F754E7F, (q31_t)0xF3742CA1, (q31_t)0x7F62368F, - (q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF1E43D1C, - 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(q31_t)0x91695663, (q31_t)0xC03A1368, (q31_t)0x9104A0ED, - (q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC197F4D3, - (q31_t)0x903E6C7A, (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66, - (q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC3A9458F, - (q31_t)0x8F1D343A, (q31_t)0xC45AE1D7, (q31_t)0x8EBEF7FB, - (q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC5BFD22E, - (q31_t)0x8E05C6B7, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B, - (q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7DB6C50, - (q31_t)0x8CF83C30, (q31_t)0xC89061BA, (q31_t)0x8CA099D9, - (q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC9FBE527, - (q31_t)0x8BF4AC05, (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F, - (q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCC210D78, - (q31_t)0x8AFB2CBA, (q31_t)0xCCD91D3D, (q31_t)0x8AAA42B4, - (q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCE4AB5A2, - (q31_t)0x8A0BD3F5, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, - (q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xD078AD9D, - (q31_t)0x8926B677, (q31_t)0xD13397E1, (q31_t)0x88DCA0D3, - (q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD2AAC504, - (q31_t)0x884BE820, (q31_t)0xD3670445, (q31_t)0x88054677, - (q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD4E0CB14, - (q31_t)0x877B7BEC, (q31_t)0xD59E4EFE, (q31_t)0x8738545E, - (q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD71A8EB5, - (q31_t)0x86B583EE, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E, - (q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD957DE7A, - (q31_t)0x85FA1152, (q31_t)0xDA17BA4A, (q31_t)0x85BDEF27, - (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB9888A8, - (q31_t)0x8549345C, (q31_t)0xDC597781, (q31_t)0x85109CDC, - (q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDDDC5B3A, - (q31_t)0x84A2FC62, (q31_t)0xDE9E4C60, (q31_t)0x846DF476, - (q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xE02323E5, - (q31_t)0x840777CF, (q31_t)0xE0E60684, (q31_t)0x83D60411, - (q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE26CB01A, - (q31_t)0x8376B422, (q31_t)0xE330734C, (q31_t)0x8348D8DB, - (q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4B8CD10, - (q31_t)0x82F0BDE8, (q31_t)0xE57D5FDA, (q31_t)0x82C67F13, - (q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE70747C3, - (q31_t)0x8275A0C0, (q31_t)0xE7CC9917, (q31_t)0x824F0208, - (q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE957ECFB, - (q31_t)0x82056758, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16, - (q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEBAA894E, - (q31_t)0x81A01B6C, (q31_t)0xEC71244F, (q31_t)0x8180C6A9, - (q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xEDFEE92B, - (q31_t)0x8145C5C6, (q31_t)0xEEC60F31, (q31_t)0x812A1A39, - (q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xF054D8D4, - (q31_t)0x80F66E3C, (q31_t)0xF11C789A, (q31_t)0x80DE6E4C, - (q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF2AC246D, - (q31_t)0x80B21BAF, (q31_t)0xF3742CA1, (q31_t)0x809DC970, - (q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF50497FA, - (q31_t)0x8078D40D, (q31_t)0xF5CCF743, (q31_t)0x80683143, - (q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF75DFF65, - (q31_t)0x804A9C4D, (q31_t)0xF826A461, (q31_t)0x803DAA69, - (q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF9B82683, - (q31_t)0x80277872, (q31_t)0xFA80FFCB, (q31_t)0x801E3894, - (q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFC12D919, - (q31_t)0x800F6B88, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D, - (q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFE6DE2E0, - (q31_t)0x800277A5, (q31_t)0xFF36F078, (q31_t)0x80009DE9 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) -/** - @par - Example code for Q31 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 2048, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to Q31(Fixed point 1.31): - round(twiddleCoefQ31(i) * pow(2, 31)) - */ -const q31_t twiddleCoef_2048_q31[3072] = { - (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFD885, - (q31_t)0x006487E3, (q31_t)0x7FFF6216, (q31_t)0x00C90F88, - (q31_t)0x7FFE9CB2, (q31_t)0x012D96B0, (q31_t)0x7FFD885A, - (q31_t)0x01921D1F, (q31_t)0x7FFC250F, (q31_t)0x01F6A296, - (q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF871A1, - (q31_t)0x02BFA9A4, (q31_t)0x7FF62182, (q31_t)0x03242ABF, - (q31_t)0x7FF38273, (q31_t)0x0388A9E9, (q31_t)0x7FF09477, - (q31_t)0x03ED26E6, (q31_t)0x7FED5790, (q31_t)0x0451A176, - (q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE5F108, - (q31_t)0x051A8E5C, (q31_t)0x7FE1C76B, (q31_t)0x057F0034, - (q31_t)0x7FDD4EEC, (q31_t)0x05E36EA9, (q31_t)0x7FD8878D, - (q31_t)0x0647D97C, (q31_t)0x7FD37152, (q31_t)0x06AC406F, - (q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FC85853, - (q31_t)0x077501BE, (q31_t)0x7FC25596, (q31_t)0x07D95B9E, - (q31_t)0x7FBC040A, (q31_t)0x083DB0A7, (q31_t)0x7FB563B2, - (q31_t)0x08A2009A, (q31_t)0x7FAE7494, (q31_t)0x09064B3A, - (q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F9FAA15, - (q31_t)0x09CECF89, (q31_t)0x7F97CEBC, (q31_t)0x0A3308BC, - (q31_t)0x7F8FA4AF, (q31_t)0x0A973BA5, (q31_t)0x7F872BF3, - (q31_t)0x0AFB6805, (q31_t)0x7F7E648B, (q31_t)0x0B5F8D9F, - (q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F6BE9D4, - (q31_t)0x0C27C389, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E, - (q31_t)0x7F5834B6, (q31_t)0x0CEFDB75, (q31_t)0x7F4DE450, - (q31_t)0x0D53DB92, (q31_t)0x7F434563, (q31_t)0x0DB7D376, - (q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F2D1C0E, - (q31_t)0x0E7FA99D, (q31_t)0x7F2191B4, (q31_t)0x0EE38765, - (q31_t)0x7F15B8EE, (q31_t)0x0F475BFE, (q31_t)0x7F0991C3, - (q31_t)0x0FAB272B, (q31_t)0x7EFD1C3C, (q31_t)0x100EE8AD, - (q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7EE34635, - (q31_t)0x10D64DBC, (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE, - (q31_t)0x7EC8371A, (q31_t)0x119D8940, (q31_t)0x7EBA3A39, - (q31_t)0x120116D4, (q31_t)0x7EABEF2C, (q31_t)0x1264994E, - (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E8E6EB1, - (q31_t)0x132B7BF9, (q31_t)0x7E7F3956, (q31_t)0x138EDBB0, - (q31_t)0x7E6FB5F3, (q31_t)0x13F22F57, (q31_t)0x7E5FE493, - (q31_t)0x145576B1, (q31_t)0x7E4FC53E, (q31_t)0x14B8B17F, - (q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E2E9CDF, - (q31_t)0x157F0086, (q31_t)0x7E1D93E9, (q31_t)0x15E21444, - (q31_t)0x7E0C3D29, (q31_t)0x16451A83, (q31_t)0x7DFA98A7, - (q31_t)0x16A81305, (q31_t)0x7DE8A670, (q31_t)0x170AFD8D, - (q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DC3D90D, - (q31_t)0x17D0A7BB, (q31_t)0x7DB0FDF7, (q31_t)0x183366E8, - (q31_t)0x7D9DD55A, (q31_t)0x18961727, (q31_t)0x7D8A5F3F, - (q31_t)0x18F8B83C, (q31_t)0x7D769BB5, (q31_t)0x195B49E9, - (q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D4E2C7E, - (q31_t)0x1A203E1B, (q31_t)0x7D3980EC, (q31_t)0x1A82A025, - (q31_t)0x7D24881A, (q31_t)0x1AE4F1D6, (q31_t)0x7D0F4218, - (q31_t)0x1B4732EF, (q31_t)0x7CF9AEF0, (q31_t)0x1BA96334, - (q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CCDA168, - (q31_t)0x1C6D9053, (q31_t)0x7CB72724, (q31_t)0x1CCF8CB3, - (q31_t)0x7CA05FF1, (q31_t)0x1D31774D, (q31_t)0x7C894BDD, - (q31_t)0x1D934FE5, (q31_t)0x7C71EAF8, (q31_t)0x1DF5163F, - (q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C4242F2, - (q31_t)0x1EB86B46, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B, - (q31_t)0x7C116853, (q31_t)0x1F7B7480, (q31_t)0x7BF88830, - (q31_t)0x1FDCDC1A, (q31_t)0x7BDF5B94, (q31_t)0x203E300D, - (q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7BAC1D31, - (q31_t)0x21009C0B, (q31_t)0x7B920B89, (q31_t)0x2161B39F, - (q31_t)0x7B77ADA8, (q31_t)0x21C2B69C, (q31_t)0x7B5D039D, - (q31_t)0x2223A4C5, (q31_t)0x7B420D7A, (q31_t)0x22847DDF, - (q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7B0B3D2C, - (q31_t)0x2345EFF7, (q31_t)0x7AEF6323, (q31_t)0x23A6887E, - (q31_t)0x7AD33D45, (q31_t)0x24070B07, (q31_t)0x7AB6CBA3, - (q31_t)0x24677757, (q31_t)0x7A9A0E4F, (q31_t)0x24C7CD32, - (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A5FB0D8, - (q31_t)0x2588349D, (q31_t)0x7A4210D8, (q31_t)0x25E845B5, - (q31_t)0x7A24256E, (q31_t)0x26483F6C, (q31_t)0x7A05EEAD, - (q31_t)0x26A82185, (q31_t)0x79E76CA6, (q31_t)0x2707EBC6, - (q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x79A98715, - (q31_t)0x27C737D2, (q31_t)0x798A23B1, (q31_t)0x2826B928, - (q31_t)0x796A7554, (q31_t)0x288621B9, (q31_t)0x794A7C11, - (q31_t)0x28E5714A, (q31_t)0x792A37FE, (q31_t)0x2944A7A2, - (q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78E8CFB1, - (q31_t)0x2A02C7B8, (q31_t)0x78C7ABA1, (q31_t)0x2A61B101, - (q31_t)0x78A63D10, (q31_t)0x2AC08025, (q31_t)0x78848413, - (q31_t)0x2B1F34EB, (q31_t)0x786280BF, (q31_t)0x2B7DCF17, - (q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x781D9B64, - (q31_t)0x2C3AB2B9, (q31_t)0x77FAB988, (q31_t)0x2C98FBBA, - (q31_t)0x77D78DAA, (q31_t)0x2CF72939, (q31_t)0x77B417DF, - (q31_t)0x2D553AFB, (q31_t)0x7790583D, (q31_t)0x2DB330C7, - (q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x7747FBCE, - (q31_t)0x2E6EC792, (q31_t)0x77235F2D, (q31_t)0x2ECC681E, - (q31_t)0x76FE790E, (q31_t)0x2F29EBCC, (q31_t)0x76D94988, - (q31_t)0x2F875262, (q31_t)0x76B3D0B3, (q31_t)0x2FE49BA6, - (q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x76680376, - (q31_t)0x309ED555, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, - (q31_t)0x761B1211, (q31_t)0x3158970D, (q31_t)0x75F42C0A, - (q31_t)0x31B54A5D, (q31_t)0x75CCFD42, (q31_t)0x3211DF03, - (q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x757DC5CA, - (q31_t)0x32CAAB6F, (q31_t)0x7555BD4B, (q31_t)0x3326E2C2, - (q31_t)0x752D6C6C, (q31_t)0x3382FA88, (q31_t)0x7504D345, - (q31_t)0x33DEF287, (q31_t)0x74DBF1EF, (q31_t)0x343ACA87, - (q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x7489571B, - (q31_t)0x34F219A7, (q31_t)0x745F9DD1, (q31_t)0x354D9056, - (q31_t)0x74359CBD, (q31_t)0x35A8E624, (q31_t)0x740B53FA, - (q31_t)0x36041AD9, (q31_t)0x73E0C3A3, (q31_t)0x365F2E3B, - (q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x738ACC9E, - (q31_t)0x3714F02A, (q31_t)0x735F6626, (q31_t)0x376F9E46, - (q31_t)0x7333B883, (q31_t)0x37CA2A30, (q31_t)0x7307C3D0, - (q31_t)0x382493B0, (q31_t)0x72DB8828, (q31_t)0x387EDA8E, - (q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x72823C66, - (q31_t)0x3932FF87, (q31_t)0x72552C84, (q31_t)0x398CDD32, - (q31_t)0x7227D61C, (q31_t)0x39E6975D, (q31_t)0x71FA3948, - (q31_t)0x3A402DD1, (q31_t)0x71CC5626, (q31_t)0x3A99A057, - (q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x716FBD68, - (q31_t)0x3B4C18BA, (q31_t)0x71410804, (q31_t)0x3BA51E29, - (q31_t)0x71120CC5, (q31_t)0x3BFDFECD, (q31_t)0x70E2CBC6, - (q31_t)0x3C56BA70, (q31_t)0x70B34524, (q31_t)0x3CAF50DA, - (q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x70536771, - (q31_t)0x3D600D2B, (q31_t)0x70231099, (q31_t)0x3DB832A5, - (q31_t)0x6FF27496, (q31_t)0x3E10320D, (q31_t)0x6FC19385, - (q31_t)0x3E680B2C, (q31_t)0x6F906D84, (q31_t)0x3EBFBDCC, - (q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6F2D532C, - (q31_t)0x3F6EAEB8, (q31_t)0x6EFB5F12, (q31_t)0x3FC5EC97, - (q31_t)0x6EC92682, (q31_t)0x401D0320, (q31_t)0x6E96A99C, - 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(q31_t)0xA27CEB4F, (q31_t)0xA8988463, (q31_t)0xA2C1ADC9, - (q31_t)0xA84F2DA9, (q31_t)0xA306A9C7, (q31_t)0xA8060D08, - (q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA3914DA7, - (q31_t)0xA7746EC0, (q31_t)0xA3D6F533, (q31_t)0xA72BF173, - (q31_t)0xA41CD598, (q31_t)0xA6E3AAF2, (q31_t)0xA462EEAC, - (q31_t)0xA69B9B68, (q31_t)0xA4A94042, (q31_t)0xA653C302, - (q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA5368C4B, - (q31_t)0xA5C4B855, (q31_t)0xA57D8666, (q31_t)0xA57D8666, - (q31_t)0xA5C4B855, (q31_t)0xA5368C4B, (q31_t)0xA60C21ED, - (q31_t)0xA4EFCA31, (q31_t)0xA653C302, (q31_t)0xA4A94042, - (q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA6E3AAF2, - (q31_t)0xA41CD598, (q31_t)0xA72BF173, (q31_t)0xA3D6F533, - (q31_t)0xA7746EC0, (q31_t)0xA3914DA7, (q31_t)0xA7BD22AB, - (q31_t)0xA34BDF20, (q31_t)0xA8060D08, (q31_t)0xA306A9C7, - (q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA8988463, - (q31_t)0xA27CEB4F, (q31_t)0xA8E21106, (q31_t)0xA2386283, - (q31_t)0xA92BD366, (q31_t)0xA1F41391, (q31_t)0xA975CB56, - (q31_t)0xA1AFFEA2, (q31_t)0xA9BFF8A8, (q31_t)0xA16C23E1, - (q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA54F2B9, - (q31_t)0xA0E51D8C, (q31_t)0xAA9FBF1D, (q31_t)0xA0A1F24C, - (q31_t)0xAAEAC02B, (q31_t)0xA05F01E1, (q31_t)0xAB35F5B5, - (q31_t)0xA01C4C72, (q31_t)0xAB815F8C, (q31_t)0x9FD9D22A, - (q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xAC18CF68, - (q31_t)0x9F558FB0, (q31_t)0xAC64D510, (q31_t)0x9F13C7D0, - (q31_t)0xACB10E4A, (q31_t)0x9ED23BB9, (q31_t)0xACFD7AE8, - (q31_t)0x9E90EB94, (q31_t)0xAD4A1ABA, (q31_t)0x9E4FD789, - (q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xADE3F33E, - (q31_t)0x9DCE6462, (q31_t)0xAE312B91, (q31_t)0x9D8E0596, - (q31_t)0xAE7E965B, (q31_t)0x9D4DE384, (q31_t)0xAECC336B, - (q31_t)0x9D0DFE53, (q31_t)0xAF1A0293, (q31_t)0x9CCE562B, - (q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xAFB63667, - (q31_t)0x9C4FBD92, (q31_t)0xB0049AB2, (q31_t)0x9C10CD70, - (q31_t)0xB0533055, (q31_t)0x9BD21AF2, (q31_t)0xB0A1F71C, - (q31_t)0x9B93A640, (q31_t)0xB0F0EEDA, (q31_t)0x9B556F80, - (q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB18F7070, - (q31_t)0x9AD9BC71, (q31_t)0xB1DEF9E8, (q31_t)0x9A9C406D, - (q31_t)0xB22EB392, (q31_t)0x9A5F02F5, (q31_t)0xB27E9D3B, - (q31_t)0x9A22042C, (q31_t)0xB2CEB6B5, (q31_t)0x99E5443A, - (q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB36F784E, - (q31_t)0x996C816F, (q31_t)0xB3C0200C, (q31_t)0x99307EE0, - (q31_t)0xB410F6D2, (q31_t)0x98F4BBBC, (q31_t)0xB461FC70, - (q31_t)0x98B93828, (q31_t)0xB4B330B2, (q31_t)0x987DF449, - (q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB556245E, - (q31_t)0x98082C3B, (q31_t)0xB5A7E362, (q31_t)0x97CDA855, - (q31_t)0xB5F9D042, (q31_t)0x979364B5, (q31_t)0xB64BEACC, - (q31_t)0x9759617E, (q31_t)0xB69E32CD, (q31_t)0x971F9ED6, - (q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB7434A67, - (q31_t)0x96ACDBBD, (q31_t)0xB796199B, (q31_t)0x9673DB94, - (q31_t)0xB7E9157A, (q31_t)0x963B1C85, (q31_t)0xB83C3DD1, - (q31_t)0x96029EB5, (q31_t)0xB88F926C, (q31_t)0x95CA6246, - (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB936BFA3, - (q31_t)0x955AAE17, (q31_t)0xB98A97D8, (q31_t)0x9523369B, - (q31_t)0xB9DE9B83, (q31_t)0x94EC010B, (q31_t)0xBA32CA70, - (q31_t)0x94B50D87, (q31_t)0xBA87246C, (q31_t)0x947E5C32, - (q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB3058C0, - (q31_t)0x9411C09D, (q31_t)0xBB8532AF, (q31_t)0x93DBD69F, - (q31_t)0xBBDA36DC, (q31_t)0x93A62F56, (q31_t)0xBC2F6513, - (q31_t)0x9370CAE4, (q31_t)0xBC84BD1E, (q31_t)0x933BA968, - (q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD2FE9E1, - (q31_t)0x92D22FD8, (q31_t)0xBD85BE2F, (q31_t)0x929DD805, - (q31_t)0xBDDBBB7F, (q31_t)0x9269C3AC, (q31_t)0xBE31E19B, - (q31_t)0x9235F2EB, (q31_t)0xBE88304F, (q31_t)0x920265E4, - (q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF3546A8, - (q31_t)0x919C1780, (q31_t)0xBF8C0DE2, (q31_t)0x91695663, - (q31_t)0xBFE2FCDF, (q31_t)0x9136D97D, (q31_t)0xC03A1368, - (q31_t)0x9104A0ED, (q31_t)0xC0915147, (q31_t)0x90D2ACD3, - (q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC1404233, - (q31_t)0x906F927B, (q31_t)0xC197F4D3, (q31_t)0x903E6C7A, - (q31_t)0xC1EFCDF2, (q31_t)0x900D8B69, (q31_t)0xC247CD5A, - (q31_t)0x8FDCEF66, (q31_t)0xC29FF2D4, (q31_t)0x8FAC988E, - (q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC350AF25, - (q31_t)0x8F4CBADB, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A, - (q31_t)0xC4020132, (q31_t)0x8EEDF33B, (q31_t)0xC45AE1D7, - (q31_t)0x8EBEF7FB, (q31_t)0xC4B3E746, (q31_t)0x8E904298, - (q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC5665FA8, - (q31_t)0x8E33A9D9, (q31_t)0xC5BFD22E, (q31_t)0x8E05C6B7, - (q31_t)0xC61968A2, (q31_t)0x8DD829E4, (q31_t)0xC67322CD, - (q31_t)0x8DAAD37B, (q31_t)0xC6CD0079, (q31_t)0x8D7DC399, - (q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7812571, - (q31_t)0x8D2477D8, (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30, - (q31_t)0xC835D5D0, (q31_t)0x8CCC477D, (q31_t)0xC89061BA, - (q31_t)0x8CA099D9, (q31_t)0xC8EB0FD6, (q31_t)0x8C753361, - (q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC9A0D1C4, - (q31_t)0x8C1F3C5C, (q31_t)0xC9FBE527, (q31_t)0x8BF4AC05, - (q31_t)0xCA5719DB, (q31_t)0x8BCA6342, (q31_t)0xCAB26FA9, - (q31_t)0x8BA0622F, (q31_t)0xCB0DE658, (q31_t)0x8B76A8E4, - (q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCBC53578, - (q31_t)0x8B240E10, (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA, - (q31_t)0xCC7D0577, (q31_t)0x8AD29393, (q31_t)0xCCD91D3D, - (q31_t)0x8AAA42B4, (q31_t)0xCD355490, (q31_t)0x8A823A35, - (q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCDEE20FC, - (q31_t)0x8A3302BD, (q31_t)0xCE4AB5A2, (q31_t)0x8A0BD3F5, - (q31_t)0xCEA768F2, (q31_t)0x89E4EDEE, (q31_t)0xCF043AB2, - (q31_t)0x89BE50C3, (q31_t)0xCF612AAA, (q31_t)0x8997FC89, - (q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xD01B6459, - (q31_t)0x894C2F4C, (q31_t)0xD078AD9D, (q31_t)0x8926B677, - (q31_t)0xD0D61433, (q31_t)0x890186F1, (q31_t)0xD13397E1, - (q31_t)0x88DCA0D3, (q31_t)0xD191386D, (q31_t)0x88B80431, - (q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD24CCF38, - (q31_t)0x886FA7C2, (q31_t)0xD2AAC504, (q31_t)0x884BE820, - (q31_t)0xD308D6C6, (q31_t)0x88287255, (q31_t)0xD3670445, - (q31_t)0x88054677, (q31_t)0xD3C54D46, (q31_t)0x87E2649B, - (q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD48230E8, - (q31_t)0x879D7F40, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC, - (q31_t)0xD53F7FDA, (q31_t)0x8759C2EF, (q31_t)0xD59E4EFE, - (q31_t)0x8738545E, (q31_t)0xD5FD3847, (q31_t)0x8717304E, - (q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD6BB585D, - (q31_t)0x86D5C802, (q31_t)0xD71A8EB5, (q31_t)0x86B583EE, - (q31_t)0xD779DE46, (q31_t)0x86958AAB, (q31_t)0xD7D946D7, - (q31_t)0x8675DC4E, (q31_t)0xD838C82D, (q31_t)0x865678EA, - (q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD8F81439, - (q31_t)0x86189359, (q31_t)0xD957DE7A, (q31_t)0x85FA1152, - (q31_t)0xD9B7C093, (q31_t)0x85DBDA91, (q31_t)0xDA17BA4A, - (q31_t)0x85BDEF27, (q31_t)0xDA77CB62, (q31_t)0x85A04F28, - (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB3832CD, - (q31_t)0x8565F1B0, (q31_t)0xDB9888A8, (q31_t)0x8549345C, - (q31_t)0xDBF8F4F8, (q31_t)0x852CC2BA, (q31_t)0xDC597781, - (q31_t)0x85109CDC, (q31_t)0xDCBA1008, (q31_t)0x84F4C2D3, - (q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDD7B8220, - (q31_t)0x84BDF285, (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62, - (q31_t)0xDE3D4963, (q31_t)0x84885257, (q31_t)0xDE9E4C60, - (q31_t)0x846DF476, (q31_t)0xDEFF63F4, (q31_t)0x8453E2CE, - (q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xDFC1CFF2, - (q31_t)0x8420A46B, (q31_t)0xE02323E5, (q31_t)0x840777CF, - (q31_t)0xE0848B7F, (q31_t)0x83EE97AC, (q31_t)0xE0E60684, - (q31_t)0x83D60411, (q31_t)0xE14794B9, (q31_t)0x83BDBD0D, - (q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE20AE9C1, - (q31_t)0x838E1507, (q31_t)0xE26CB01A, (q31_t)0x8376B422, - (q31_t)0xE2CE88B2, (q31_t)0x835FA00E, (q31_t)0xE330734C, - (q31_t)0x8348D8DB, (q31_t)0xE3926FAC, (q31_t)0x83325E97, - (q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4569CCB, - (q31_t)0x8306510F, (q31_t)0xE4B8CD10, (q31_t)0x82F0BDE8, - (q31_t)0xE51B0E2A, (q31_t)0x82DB77E5, (q31_t)0xE57D5FDA, - (q31_t)0x82C67F13, (q31_t)0xE5DFC1E4, (q31_t)0x82B1D381, - (q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE6A4B616, - (q31_t)0x8289644A, (q31_t)0xE70747C3, (q31_t)0x8275A0C0, - (q31_t)0xE769E8D8, (q31_t)0x82622AA5, (q31_t)0xE7CC9917, - (q31_t)0x824F0208, (q31_t)0xE82F5844, (q31_t)0x823C26F2, - (q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE8F50273, - (q31_t)0x8217598F, (q31_t)0xE957ECFB, (q31_t)0x82056758, - (q31_t)0xE9BAE57C, (q31_t)0x81F3C2D7, (q31_t)0xEA1DEBBB, - (q31_t)0x81E26C16, (q31_t)0xEA80FF79, (q31_t)0x81D16320, - (q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEB474E80, - (q31_t)0x81B03AC1, (q31_t)0xEBAA894E, (q31_t)0x81A01B6C, - (q31_t)0xEC0DD0A8, (q31_t)0x81904A0C, (q31_t)0xEC71244F, - (q31_t)0x8180C6A9, (q31_t)0xECD48406, (q31_t)0x8171914E, - (q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xED9B66B2, - (q31_t)0x815410D3, (q31_t)0xEDFEE92B, (q31_t)0x8145C5C6, - (q31_t)0xEE6276BF, (q31_t)0x8137C8E6, (q31_t)0xEEC60F31, - (q31_t)0x812A1A39, (q31_t)0xEF29B243, (q31_t)0x811CB9CA, - (q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xEFF11752, - (q31_t)0x8102E3C3, (q31_t)0xF054D8D4, (q31_t)0x80F66E3C, - (q31_t)0xF0B8A401, (q31_t)0x80EA4712, (q31_t)0xF11C789A, - (q31_t)0x80DE6E4C, (q31_t)0xF1805662, (q31_t)0x80D2E3F1, - (q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF2482C89, - (q31_t)0x80BCBA9C, (q31_t)0xF2AC246D, (q31_t)0x80B21BAF, - (q31_t)0xF310248A, (q31_t)0x80A7CB49, (q31_t)0xF3742CA1, - (q31_t)0x809DC970, (q31_t)0xF3D83C76, (q31_t)0x8094162B, - (q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF4A07260, - (q31_t)0x80819B74, (q31_t)0xF50497FA, (q31_t)0x8078D40D, - (q31_t)0xF568C45A, (q31_t)0x80705B50, (q31_t)0xF5CCF743, - (q31_t)0x80683143, (q31_t)0xF6313076, (q31_t)0x806055EA, - (q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF6F9B4C5, - (q31_t)0x80518B6B, (q31_t)0xF75DFF65, (q31_t)0x804A9C4D, - (q31_t)0xF7C24F58, (q31_t)0x8043FBF6, (q31_t)0xF826A461, - (q31_t)0x803DAA69, (q31_t)0xF88AFE41, (q31_t)0x8037A7AC, - (q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF953BF90, - (q31_t)0x802C8EAD, (q31_t)0xF9B82683, (q31_t)0x80277872, - (q31_t)0xFA1C9156, (q31_t)0x8022B113, (q31_t)0xFA80FFCB, - (q31_t)0x801E3894, (q31_t)0xFAE571A4, (q31_t)0x801A0EF7, - (q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFBAE5E89, - (q31_t)0x8012A86F, (q31_t)0xFC12D919, (q31_t)0x800F6B88, - (q31_t)0xFC775616, (q31_t)0x800C7D8C, (q31_t)0xFCDBD541, - (q31_t)0x8009DE7D, (q31_t)0xFD40565B, (q31_t)0x80078E5E, - (q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFE095D69, - (q31_t)0x8003DAF0, (q31_t)0xFE6DE2E0, (q31_t)0x800277A5, - (q31_t)0xFED2694F, (q31_t)0x8001634D, (q31_t)0xFF36F078, - (q31_t)0x80009DE9, (q31_t)0xFF9B781D, (q31_t)0x8000277A -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) -/** - @par - Example code for Q31 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 4096, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to Q31(Fixed point 1.31): - round(twiddleCoefQ31(i) * pow(2, 31)) - */ -const q31_t twiddleCoef_4096_q31[6144] = -{ - (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFF621, - (q31_t)0x003243F5, (q31_t)0x7FFFD885, (q31_t)0x006487E3, - (q31_t)0x7FFFA72C, (q31_t)0x0096CBC1, (q31_t)0x7FFF6216, - (q31_t)0x00C90F88, (q31_t)0x7FFF0942, (q31_t)0x00FB532F, - (q31_t)0x7FFE9CB2, (q31_t)0x012D96B0, (q31_t)0x7FFE1C64, - (q31_t)0x015FDA03, (q31_t)0x7FFD885A, (q31_t)0x01921D1F, - (q31_t)0x7FFCE093, (q31_t)0x01C45FFE, (q31_t)0x7FFC250F, - (q31_t)0x01F6A296, (q31_t)0x7FFB55CE, (q31_t)0x0228E4E1, - (q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF97C17, - (q31_t)0x028D6870, (q31_t)0x7FF871A1, (q31_t)0x02BFA9A4, - (q31_t)0x7FF7536F, (q31_t)0x02F1EA6B, (q31_t)0x7FF62182, - (q31_t)0x03242ABF, (q31_t)0x7FF4DBD8, (q31_t)0x03566A96, - (q31_t)0x7FF38273, (q31_t)0x0388A9E9, (q31_t)0x7FF21553, - (q31_t)0x03BAE8B1, (q31_t)0x7FF09477, (q31_t)0x03ED26E6, - (q31_t)0x7FEEFFE1, (q31_t)0x041F647F, (q31_t)0x7FED5790, - (q31_t)0x0451A176, (q31_t)0x7FEB9B85, (q31_t)0x0483DDC3, - (q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE7E840, - (q31_t)0x04E8543D, (q31_t)0x7FE5F108, (q31_t)0x051A8E5C, - (q31_t)0x7FE3E616, (q31_t)0x054CC7B0, (q31_t)0x7FE1C76B, - (q31_t)0x057F0034, (q31_t)0x7FDF9508, (q31_t)0x05B137DF, - (q31_t)0x7FDD4EEC, (q31_t)0x05E36EA9, (q31_t)0x7FDAF518, - (q31_t)0x0615A48A, (q31_t)0x7FD8878D, (q31_t)0x0647D97C, - (q31_t)0x7FD6064B, (q31_t)0x067A0D75, (q31_t)0x7FD37152, - (q31_t)0x06AC406F, (q31_t)0x7FD0C8A3, (q31_t)0x06DE7261, - (q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FCB3C23, - (q31_t)0x0742D310, (q31_t)0x7FC85853, (q31_t)0x077501BE, - (q31_t)0x7FC560CF, (q31_t)0x07A72F45, (q31_t)0x7FC25596, - (q31_t)0x07D95B9E, (q31_t)0x7FBF36A9, (q31_t)0x080B86C1, - (q31_t)0x7FBC040A, (q31_t)0x083DB0A7, (q31_t)0x7FB8BDB7, - (q31_t)0x086FD947, (q31_t)0x7FB563B2, (q31_t)0x08A2009A, - (q31_t)0x7FB1F5FC, (q31_t)0x08D42698, (q31_t)0x7FAE7494, - (q31_t)0x09064B3A, (q31_t)0x7FAADF7C, (q31_t)0x09386E77, - (q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7FA37A3C, - (q31_t)0x099CB0A7, (q31_t)0x7F9FAA15, (q31_t)0x09CECF89, - (q31_t)0x7F9BC63F, (q31_t)0x0A00ECE8, (q31_t)0x7F97CEBC, - (q31_t)0x0A3308BC, (q31_t)0x7F93C38C, (q31_t)0x0A6522FE, - (q31_t)0x7F8FA4AF, (q31_t)0x0A973BA5, (q31_t)0x7F8B7226, - (q31_t)0x0AC952AA, (q31_t)0x7F872BF3, (q31_t)0x0AFB6805, - (q31_t)0x7F82D214, (q31_t)0x0B2D7BAE, (q31_t)0x7F7E648B, - (q31_t)0x0B5F8D9F, (q31_t)0x7F79E35A, (q31_t)0x0B919DCE, - (q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F70A5FD, - (q31_t)0x0BF5B8CB, (q31_t)0x7F6BE9D4, (q31_t)0x0C27C389, - (q31_t)0x7F671A04, (q31_t)0x0C59CC67, (q31_t)0x7F62368F, - (q31_t)0x0C8BD35E, (q31_t)0x7F5D3F75, (q31_t)0x0CBDD865, - (q31_t)0x7F5834B6, (q31_t)0x0CEFDB75, (q31_t)0x7F531654, - (q31_t)0x0D21DC87, (q31_t)0x7F4DE450, (q31_t)0x0D53DB92, - (q31_t)0x7F489EAA, (q31_t)0x0D85D88F, (q31_t)0x7F434563, - (q31_t)0x0DB7D376, (q31_t)0x7F3DD87C, (q31_t)0x0DE9CC3F, - (q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F32C3D0, - (q31_t)0x0E4DB75B, (q31_t)0x7F2D1C0E, (q31_t)0x0E7FA99D, - (q31_t)0x7F2760AF, (q31_t)0x0EB199A3, (q31_t)0x7F2191B4, - (q31_t)0x0EE38765, (q31_t)0x7F1BAF1E, (q31_t)0x0F1572DC, - (q31_t)0x7F15B8EE, (q31_t)0x0F475BFE, (q31_t)0x7F0FAF24, - (q31_t)0x0F7942C6, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B, - (q31_t)0x7F0360CB, (q31_t)0x0FDD0925, (q31_t)0x7EFD1C3C, - (q31_t)0x100EE8AD, (q31_t)0x7EF6C418, (q31_t)0x1040C5BB, - (q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7EE9D913, - (q31_t)0x10A4784A, (q31_t)0x7EE34635, (q31_t)0x10D64DBC, - (q31_t)0x7EDC9FC6, (q31_t)0x11082096, (q31_t)0x7ED5E5C6, - (q31_t)0x1139F0CE, (q31_t)0x7ECF1837, (q31_t)0x116BBE5F, - (q31_t)0x7EC8371A, (q31_t)0x119D8940, (q31_t)0x7EC1426F, - (q31_t)0x11CF516A, (q31_t)0x7EBA3A39, (q31_t)0x120116D4, - (q31_t)0x7EB31E77, (q31_t)0x1232D978, (q31_t)0x7EABEF2C, - (q31_t)0x1264994E, (q31_t)0x7EA4AC58, (q31_t)0x1296564D, - (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E95EC19, - (q31_t)0x12F9C7AA, (q31_t)0x7E8E6EB1, (q31_t)0x132B7BF9, - (q31_t)0x7E86DDC5, (q31_t)0x135D2D53, (q31_t)0x7E7F3956, - (q31_t)0x138EDBB0, (q31_t)0x7E778165, (q31_t)0x13C0870A, - (q31_t)0x7E6FB5F3, (q31_t)0x13F22F57, (q31_t)0x7E67D702, - (q31_t)0x1423D492, (q31_t)0x7E5FE493, (q31_t)0x145576B1, - (q31_t)0x7E57DEA6, (q31_t)0x148715AD, (q31_t)0x7E4FC53E, - (q31_t)0x14B8B17F, (q31_t)0x7E47985B, (q31_t)0x14EA4A1F, - (q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E37042A, - (q31_t)0x154D71AA, (q31_t)0x7E2E9CDF, (q31_t)0x157F0086, - (q31_t)0x7E26221E, (q31_t)0x15B08C11, (q31_t)0x7E1D93E9, - (q31_t)0x15E21444, (q31_t)0x7E14F242, (q31_t)0x16139917, - (q31_t)0x7E0C3D29, (q31_t)0x16451A83, (q31_t)0x7E03749F, - (q31_t)0x1676987F, (q31_t)0x7DFA98A7, (q31_t)0x16A81305, - (q31_t)0x7DF1A942, (q31_t)0x16D98A0C, (q31_t)0x7DE8A670, - (q31_t)0x170AFD8D, (q31_t)0x7DDF9034, (q31_t)0x173C6D80, - (q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DCD2981, - (q31_t)0x179F429F, (q31_t)0x7DC3D90D, (q31_t)0x17D0A7BB, - (q31_t)0x7DBA7534, (q31_t)0x1802092C, (q31_t)0x7DB0FDF7, - (q31_t)0x183366E8, (q31_t)0x7DA77359, (q31_t)0x1864C0E9, - (q31_t)0x7D9DD55A, (q31_t)0x18961727, (q31_t)0x7D9423FB, - (q31_t)0x18C7699B, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, - (q31_t)0x7D808727, (q31_t)0x192A0303, (q31_t)0x7D769BB5, - (q31_t)0x195B49E9, (q31_t)0x7D6C9CE9, (q31_t)0x198C8CE6, - (q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D58654C, - (q31_t)0x19EF0706, (q31_t)0x7D4E2C7E, (q31_t)0x1A203E1B, - (q31_t)0x7D43E05E, (q31_t)0x1A517127, (q31_t)0x7D3980EC, - (q31_t)0x1A82A025, (q31_t)0x7D2F0E2A, (q31_t)0x1AB3CB0C, - (q31_t)0x7D24881A, (q31_t)0x1AE4F1D6, (q31_t)0x7D19EEBE, - (q31_t)0x1B161479, (q31_t)0x7D0F4218, (q31_t)0x1B4732EF, - (q31_t)0x7D048228, (q31_t)0x1B784D30, (q31_t)0x7CF9AEF0, - (q31_t)0x1BA96334, (q31_t)0x7CEEC873, (q31_t)0x1BDA74F5, - (q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CD8C1AD, - (q31_t)0x1C3C8B8C, (q31_t)0x7CCDA168, (q31_t)0x1C6D9053, - (q31_t)0x7CC26DE5, (q31_t)0x1C9E90B8, (q31_t)0x7CB72724, - (q31_t)0x1CCF8CB3, (q31_t)0x7CABCD27, (q31_t)0x1D00843C, - (q31_t)0x7CA05FF1, (q31_t)0x1D31774D, (q31_t)0x7C94DF82, - (q31_t)0x1D6265DD, (q31_t)0x7C894BDD, (q31_t)0x1D934FE5, - (q31_t)0x7C7DA504, (q31_t)0x1DC4355D, (q31_t)0x7C71EAF8, - (q31_t)0x1DF5163F, (q31_t)0x7C661DBB, (q31_t)0x1E25F281, - (q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C4E49B6, - (q31_t)0x1E879D0C, (q31_t)0x7C4242F2, (q31_t)0x1EB86B46, - (q31_t)0x7C362904, (q31_t)0x1EE934C2, (q31_t)0x7C29FBEE, - (q31_t)0x1F19F97B, (q31_t)0x7C1DBBB2, (q31_t)0x1F4AB967, - (q31_t)0x7C116853, (q31_t)0x1F7B7480, (q31_t)0x7C0501D1, - (q31_t)0x1FAC2ABF, (q31_t)0x7BF88830, (q31_t)0x1FDCDC1A, - (q31_t)0x7BEBFB70, (q31_t)0x200D888C, (q31_t)0x7BDF5B94, - (q31_t)0x203E300D, (q31_t)0x7BD2A89E, (q31_t)0x206ED295, - (q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7BB9096A, - (q31_t)0x20D0089B, (q31_t)0x7BAC1D31, (q31_t)0x21009C0B, - (q31_t)0x7B9F1DE5, (q31_t)0x21312A65, (q31_t)0x7B920B89, - (q31_t)0x2161B39F, (q31_t)0x7B84E61E, (q31_t)0x219237B4, - (q31_t)0x7B77ADA8, (q31_t)0x21C2B69C, (q31_t)0x7B6A6227, - (q31_t)0x21F3304E, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5, - (q31_t)0x7B4F920E, (q31_t)0x225413F8, (q31_t)0x7B420D7A, - (q31_t)0x22847DDF, (q31_t)0x7B3475E4, (q31_t)0x22B4E274, - (q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7B190DBB, - (q31_t)0x23159B87, (q31_t)0x7B0B3D2C, (q31_t)0x2345EFF7, - (q31_t)0x7AFD59A3, (q31_t)0x23763EF7, (q31_t)0x7AEF6323, - (q31_t)0x23A6887E, (q31_t)0x7AE159AE, (q31_t)0x23D6CC86, - (q31_t)0x7AD33D45, (q31_t)0x24070B07, (q31_t)0x7AC50DEB, - (q31_t)0x243743FA, (q31_t)0x7AB6CBA3, (q31_t)0x24677757, - (q31_t)0x7AA8766E, (q31_t)0x2497A517, (q31_t)0x7A9A0E4F, - (q31_t)0x24C7CD32, (q31_t)0x7A8B9348, (q31_t)0x24F7EFA1, - (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A6E648A, - (q31_t)0x2558235E, (q31_t)0x7A5FB0D8, (q31_t)0x2588349D, - (q31_t)0x7A50EA46, (q31_t)0x25B84012, (q31_t)0x7A4210D8, - (q31_t)0x25E845B5, (q31_t)0x7A33248F, (q31_t)0x26184581, - (q31_t)0x7A24256E, (q31_t)0x26483F6C, (q31_t)0x7A151377, - (q31_t)0x26783370, (q31_t)0x7A05EEAD, (q31_t)0x26A82185, - (q31_t)0x79F6B711, (q31_t)0x26D809A5, (q31_t)0x79E76CA6, - (q31_t)0x2707EBC6, (q31_t)0x79D80F6F, (q31_t)0x2737C7E3, - (q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x79B91CA4, - (q31_t)0x27976DF1, (q31_t)0x79A98715, (q31_t)0x27C737D2, - (q31_t)0x7999DEC3, (q31_t)0x27F6FB92, (q31_t)0x798A23B1, - (q31_t)0x2826B928, (q31_t)0x797A55E0, (q31_t)0x2856708C, - (q31_t)0x796A7554, (q31_t)0x288621B9, (q31_t)0x795A820E, - (q31_t)0x28B5CCA5, (q31_t)0x794A7C11, (q31_t)0x28E5714A, - (q31_t)0x793A6360, (q31_t)0x29150FA1, (q31_t)0x792A37FE, - (q31_t)0x2944A7A2, (q31_t)0x7919F9EB, (q31_t)0x29743945, - (q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78F945C3, - (q31_t)0x29D34958, (q31_t)0x78E8CFB1, (q31_t)0x2A02C7B8, - (q31_t)0x78D846FB, (q31_t)0x2A323F9D, (q31_t)0x78C7ABA1, - (q31_t)0x2A61B101, (q31_t)0x78B6FDA8, (q31_t)0x2A911BDB, - (q31_t)0x78A63D10, (q31_t)0x2AC08025, (q31_t)0x789569DE, - (q31_t)0x2AEFDDD8, (q31_t)0x78848413, (q31_t)0x2B1F34EB, - (q31_t)0x78738BB3, (q31_t)0x2B4E8558, (q31_t)0x786280BF, - (q31_t)0x2B7DCF17, (q31_t)0x7851633B, (q31_t)0x2BAD1221, - (q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x782EF08B, - (q31_t)0x2C0B83F9, (q31_t)0x781D9B64, (q31_t)0x2C3AB2B9, - (q31_t)0x780C33B8, (q31_t)0x2C69DAA6, (q31_t)0x77FAB988, - (q31_t)0x2C98FBBA, (q31_t)0x77E92CD8, (q31_t)0x2CC815ED, - (q31_t)0x77D78DAA, (q31_t)0x2CF72939, (q31_t)0x77C5DC01, - (q31_t)0x2D263595, (q31_t)0x77B417DF, (q31_t)0x2D553AFB, - (q31_t)0x77A24148, (q31_t)0x2D843963, (q31_t)0x7790583D, - (q31_t)0x2DB330C7, (q31_t)0x777E5CC3, (q31_t)0x2DE2211E, - (q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x775A2E88, - (q31_t)0x2E3FEC8B, (q31_t)0x7747FBCE, (q31_t)0x2E6EC792, - (q31_t)0x7735B6AE, (q31_t)0x2E9D9B70, (q31_t)0x77235F2D, - (q31_t)0x2ECC681E, (q31_t)0x7710F54B, (q31_t)0x2EFB2D94, - (q31_t)0x76FE790E, (q31_t)0x2F29EBCC, (q31_t)0x76EBEA77, - (q31_t)0x2F58A2BD, (q31_t)0x76D94988, (q31_t)0x2F875262, - (q31_t)0x76C69646, (q31_t)0x2FB5FAB2, (q31_t)0x76B3D0B3, - (q31_t)0x2FE49BA6, (q31_t)0x76A0F8D2, (q31_t)0x30133538, - (q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x767B1230, - (q31_t)0x30705217, (q31_t)0x76680376, (q31_t)0x309ED555, - (q31_t)0x7654E279, (q31_t)0x30CD5114, (q31_t)0x7641AF3C, - (q31_t)0x30FBC54D, (q31_t)0x762E69C3, (q31_t)0x312A31F8, - (q31_t)0x761B1211, (q31_t)0x3158970D, (q31_t)0x7607A827, - (q31_t)0x3186F487, (q31_t)0x75F42C0A, (q31_t)0x31B54A5D, - (q31_t)0x75E09DBD, (q31_t)0x31E39889, (q31_t)0x75CCFD42, - (q31_t)0x3211DF03, (q31_t)0x75B94A9C, (q31_t)0x32401DC5, - (q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7591AEDD, - (q31_t)0x329C8402, (q31_t)0x757DC5CA, (q31_t)0x32CAAB6F, - (q31_t)0x7569CA98, (q31_t)0x32F8CB07, (q31_t)0x7555BD4B, - (q31_t)0x3326E2C2, (q31_t)0x75419DE6, (q31_t)0x3354F29A, - (q31_t)0x752D6C6C, (q31_t)0x3382FA88, (q31_t)0x751928E0, - (q31_t)0x33B0FA84, (q31_t)0x7504D345, (q31_t)0x33DEF287, - (q31_t)0x74F06B9E, (q31_t)0x340CE28A, (q31_t)0x74DBF1EF, - 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(q31_t)0x815B53A8, (q31_t)0xED9B66B2, (q31_t)0x815410D3, - (q31_t)0xEDCD2687, (q31_t)0x814CE188, (q31_t)0xEDFEE92B, - (q31_t)0x8145C5C6, (q31_t)0xEE30AE95, (q31_t)0x813EBD90, - (q31_t)0xEE6276BF, (q31_t)0x8137C8E6, (q31_t)0xEE9441A0, - (q31_t)0x8130E7C8, (q31_t)0xEEC60F31, (q31_t)0x812A1A39, - (q31_t)0xEEF7DF6A, (q31_t)0x81236039, (q31_t)0xEF29B243, - (q31_t)0x811CB9CA, (q31_t)0xEF5B87B5, (q31_t)0x811626EC, - (q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xEFBF3A44, - (q31_t)0x81093BE8, (q31_t)0xEFF11752, (q31_t)0x8102E3C3, - (q31_t)0xF022F6DA, (q31_t)0x80FC9F35, (q31_t)0xF054D8D4, - (q31_t)0x80F66E3C, (q31_t)0xF086BD39, (q31_t)0x80F050DB, - (q31_t)0xF0B8A401, (q31_t)0x80EA4712, (q31_t)0xF0EA8D23, - (q31_t)0x80E450E2, (q31_t)0xF11C789A, (q31_t)0x80DE6E4C, - (q31_t)0xF14E665C, (q31_t)0x80D89F51, (q31_t)0xF1805662, - (q31_t)0x80D2E3F1, (q31_t)0xF1B248A5, (q31_t)0x80CD3C2F, - (q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF21633C0, - (q31_t)0x80C22783, (q31_t)0xF2482C89, (q31_t)0x80BCBA9C, - (q31_t)0xF27A2770, (q31_t)0x80B76155, (q31_t)0xF2AC246D, - (q31_t)0x80B21BAF, (q31_t)0xF2DE2378, (q31_t)0x80ACE9AB, - (q31_t)0xF310248A, (q31_t)0x80A7CB49, (q31_t)0xF342279A, - (q31_t)0x80A2C08B, (q31_t)0xF3742CA1, (q31_t)0x809DC970, - (q31_t)0xF3A63398, (q31_t)0x8098E5FB, (q31_t)0xF3D83C76, - (q31_t)0x8094162B, (q31_t)0xF40A4734, (q31_t)0x808F5A02, - (q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF46E6231, - (q31_t)0x80861CA5, (q31_t)0xF4A07260, (q31_t)0x80819B74, - (q31_t)0xF4D28451, (q31_t)0x807D2DEB, (q31_t)0xF50497FA, - (q31_t)0x8078D40D, (q31_t)0xF536AD55, (q31_t)0x80748DD9, - (q31_t)0xF568C45A, (q31_t)0x80705B50, (q31_t)0xF59ADD01, - (q31_t)0x806C3C73, (q31_t)0xF5CCF743, (q31_t)0x80683143, - (q31_t)0xF5FF1317, (q31_t)0x806439C0, (q31_t)0xF6313076, - (q31_t)0x806055EA, (q31_t)0xF6634F58, (q31_t)0x805C85C3, - (q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF6C79188, - (q31_t)0x80552083, (q31_t)0xF6F9B4C5, (q31_t)0x80518B6B, - (q31_t)0xF72BD967, (q31_t)0x804E0A03, (q31_t)0xF75DFF65, - (q31_t)0x804A9C4D, (q31_t)0xF79026B8, (q31_t)0x80474248, - (q31_t)0xF7C24F58, (q31_t)0x8043FBF6, (q31_t)0xF7F4793E, - (q31_t)0x8040C956, (q31_t)0xF826A461, (q31_t)0x803DAA69, - (q31_t)0xF858D0BA, (q31_t)0x803A9F31, (q31_t)0xF88AFE41, - (q31_t)0x8037A7AC, (q31_t)0xF8BD2CEF, (q31_t)0x8034C3DC, - (q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF9218D9E, - (q31_t)0x802F375C, (q31_t)0xF953BF90, (q31_t)0x802C8EAD, - (q31_t)0xF985F28A, (q31_t)0x8029F9B4, (q31_t)0xF9B82683, - (q31_t)0x80277872, (q31_t)0xF9EA5B75, (q31_t)0x80250AE7, - (q31_t)0xFA1C9156, (q31_t)0x8022B113, (q31_t)0xFA4EC820, - (q31_t)0x80206AF8, (q31_t)0xFA80FFCB, (q31_t)0x801E3894, - (q31_t)0xFAB3384F, (q31_t)0x801C19E9, (q31_t)0xFAE571A4, - (q31_t)0x801A0EF7, (q31_t)0xFB17ABC2, (q31_t)0x801817BF, - (q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFB7C223C, - (q31_t)0x8014647A, (q31_t)0xFBAE5E89, (q31_t)0x8012A86F, - (q31_t)0xFBE09B80, (q31_t)0x8011001E, (q31_t)0xFC12D919, - (q31_t)0x800F6B88, (q31_t)0xFC45174E, (q31_t)0x800DEAAC, - (q31_t)0xFC775616, (q31_t)0x800C7D8C, (q31_t)0xFCA99569, - (q31_t)0x800B2427, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D, - (q31_t)0xFD0E1594, (q31_t)0x8008AC90, (q31_t)0xFD40565B, - (q31_t)0x80078E5E, (q31_t)0xFD72978F, (q31_t)0x800683E8, - (q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFDD71B1E, - (q31_t)0x8004AA31, (q31_t)0xFE095D69, (q31_t)0x8003DAF0, - (q31_t)0xFE3BA001, (q31_t)0x80031F6C, (q31_t)0xFE6DE2E0, - (q31_t)0x800277A5, (q31_t)0xFEA025FC, (q31_t)0x8001E39B, - (q31_t)0xFED2694F, (q31_t)0x8001634D, (q31_t)0xFF04ACD0, - (q31_t)0x8000F6BD, (q31_t)0xFF36F078, (q31_t)0x80009DE9, - (q31_t)0xFF69343E, (q31_t)0x800058D3, (q31_t)0xFF9B781D, - (q31_t)0x8000277A, (q31_t)0xFFCDBC0A, (q31_t)0x800009DE -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -/** - @brief q15 Twiddle factors Table -*/ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) - -/** - @par - Example code for q15 Twiddle factors Generation:: - @par - 
fori = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 16, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to q15(Fixed point 1.15): - round(twiddleCoefq15(i) * pow(2, 15)) - */ -const q15_t twiddleCoef_16_q15[24] = { - (q15_t)0x7FFF, (q15_t)0x0000, - (q15_t)0x7641, (q15_t)0x30FB, - (q15_t)0x5A82, (q15_t)0x5A82, - (q15_t)0x30FB, (q15_t)0x7641, - (q15_t)0x0000, (q15_t)0x7FFF, - (q15_t)0xCF04, (q15_t)0x7641, - (q15_t)0xA57D, (q15_t)0x5A82, - (q15_t)0x89BE, (q15_t)0x30FB, - (q15_t)0x8000, (q15_t)0x0000, - (q15_t)0x89BE, (q15_t)0xCF04, - (q15_t)0xA57D, (q15_t)0xA57D, - (q15_t)0xCF04, (q15_t)0x89BE -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32) -/** - @par - Example code for q15 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 32, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to q15(Fixed point 1.15): - round(twiddleCoefq15(i) * pow(2, 15)) - */ -const q15_t twiddleCoef_32_q15[48] = { - (q15_t)0x7FFF, (q15_t)0x0000, - (q15_t)0x7D8A, (q15_t)0x18F8, - (q15_t)0x7641, (q15_t)0x30FB, - (q15_t)0x6A6D, (q15_t)0x471C, - (q15_t)0x5A82, (q15_t)0x5A82, - (q15_t)0x471C, (q15_t)0x6A6D, - (q15_t)0x30FB, (q15_t)0x7641, - (q15_t)0x18F8, (q15_t)0x7D8A, - (q15_t)0x0000, (q15_t)0x7FFF, - (q15_t)0xE707, (q15_t)0x7D8A, - (q15_t)0xCF04, (q15_t)0x7641, - (q15_t)0xB8E3, (q15_t)0x6A6D, - (q15_t)0xA57D, (q15_t)0x5A82, - (q15_t)0x9592, (q15_t)0x471C, - (q15_t)0x89BE, (q15_t)0x30FB, - (q15_t)0x8275, (q15_t)0x18F8, - (q15_t)0x8000, (q15_t)0x0000, - (q15_t)0x8275, (q15_t)0xE707, - (q15_t)0x89BE, (q15_t)0xCF04, - (q15_t)0x9592, (q15_t)0xB8E3, - (q15_t)0xA57D, (q15_t)0xA57D, - (q15_t)0xB8E3, (q15_t)0x9592, - (q15_t)0xCF04, (q15_t)0x89BE, - (q15_t)0xE707, (q15_t)0x8275 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) -/** - @par - Example code for q15 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 64, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to q15(Fixed point 1.15): - round(twiddleCoefq15(i) * pow(2, 15)) - */ -const q15_t twiddleCoef_64_q15[96] = { - (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7F62, (q15_t)0x0C8B, - (q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7A7D, (q15_t)0x2528, - (q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x70E2, (q15_t)0x3C56, - (q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x62F2, (q15_t)0x5133, - (q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5133, (q15_t)0x62F2, - (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x3C56, (q15_t)0x70E2, - (q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2528, (q15_t)0x7A7D, - (q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x0C8B, (q15_t)0x7F62, - (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xF374, (q15_t)0x7F62, - (q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xDAD7, (q15_t)0x7A7D, - (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xC3A9, (q15_t)0x70E2, - (q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xAECC, (q15_t)0x62F2, - (q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0x9D0D, (q15_t)0x5133, - (q15_t)0x9592, (q15_t)0x471C, (q15_t)0x8F1D, (q15_t)0x3C56, - (q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8582, (q15_t)0x2528, - (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x809D, (q15_t)0x0C8B, - (q15_t)0x8000, (q15_t)0x0000, (q15_t)0x809D, (q15_t)0xF374, - (q15_t)0x8275, (q15_t)0xE707, (q15_t)0x8582, (q15_t)0xDAD7, - (q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8F1D, (q15_t)0xC3A9, - (q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9D0D, (q15_t)0xAECC, - (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xAECC, (q15_t)0x9D0D, - (q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xC3A9, (q15_t)0x8F1D, - (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xDAD7, (q15_t)0x8582, - (q15_t)0xE707, (q15_t)0x8275, (q15_t)0xF374, (q15_t)0x809D -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128) -/** - @par - Example code for q15 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 128, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to q15(Fixed point 1.15): - round(twiddleCoefq15(i) * pow(2, 15)) - */ -const q15_t twiddleCoef_128_q15[192] = { - (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FD8, (q15_t)0x0647, - (q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7E9D, (q15_t)0x12C8, - (q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7C29, (q15_t)0x1F19, - (q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7884, (q15_t)0x2B1F, - (q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x73B5, (q15_t)0x36BA, - (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6DCA, (q15_t)0x41CE, - (q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x66CF, (q15_t)0x4C3F, - (q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x5ED7, (q15_t)0x55F5, - (q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x55F5, (q15_t)0x5ED7, - (q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4C3F, (q15_t)0x66CF, - (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x41CE, (q15_t)0x6DCA, - (q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x36BA, (q15_t)0x73B5, - (q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2B1F, (q15_t)0x7884, - (q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x1F19, (q15_t)0x7C29, - (q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x12C8, (q15_t)0x7E9D, - (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0647, (q15_t)0x7FD8, - (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xF9B8, (q15_t)0x7FD8, - (q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xED37, (q15_t)0x7E9D, - (q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE0E6, (q15_t)0x7C29, - (q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD4E0, (q15_t)0x7884, - (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xC945, (q15_t)0x73B5, - (q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xBE31, (q15_t)0x6DCA, - (q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB3C0, (q15_t)0x66CF, - (q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAA0A, (q15_t)0x5ED7, - (q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA128, (q15_t)0x55F5, - (q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9930, (q15_t)0x4C3F, - (q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9235, (q15_t)0x41CE, - (q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8C4A, (q15_t)0x36BA, - (q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x877B, (q15_t)0x2B1F, - (q15_t)0x8582, (q15_t)0x2528, (q15_t)0x83D6, (q15_t)0x1F19, - (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8162, (q15_t)0x12C8, - (q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8027, (q15_t)0x0647, - (q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8027, (q15_t)0xF9B8, - (q15_t)0x809D, (q15_t)0xF374, (q15_t)0x8162, (q15_t)0xED37, - (q15_t)0x8275, (q15_t)0xE707, (q15_t)0x83D6, (q15_t)0xE0E6, - (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x877B, (q15_t)0xD4E0, - (q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8C4A, (q15_t)0xC945, - (q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x9235, (q15_t)0xBE31, - (q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9930, (q15_t)0xB3C0, - (q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0xA128, (q15_t)0xAA0A, - (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xAA0A, (q15_t)0xA128, - (q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB3C0, (q15_t)0x9930, - (q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBE31, (q15_t)0x9235, - (q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC945, (q15_t)0x8C4A, - (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD4E0, (q15_t)0x877B, - (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xE0E6, (q15_t)0x83D6, - (q15_t)0xE707, (q15_t)0x8275, (q15_t)0xED37, (q15_t)0x8162, - (q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF9B8, (q15_t)0x8027 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) -/** - @par - Example code for q15 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 256, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to q15(Fixed point 1.15): - round(twiddleCoefq15(i) * pow(2, 15)) - */ -const q15_t twiddleCoef_256_q15[384] = { - (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FF6, (q15_t)0x0324, - (q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FA7, (q15_t)0x096A, - (q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F09, (q15_t)0x0FAB, - (q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E1D, (q15_t)0x15E2, - (q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7CE3, (q15_t)0x1C0B, - (q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7B5D, (q15_t)0x2223, - (q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x798A, (q15_t)0x2826, - (q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x776C, (q15_t)0x2E11, - (q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x7504, (q15_t)0x33DE, - (q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x7255, (q15_t)0x398C, - (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6F5F, (q15_t)0x3F17, - (q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6C24, (q15_t)0x447A, - (q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x68A6, (q15_t)0x49B4, - (q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x64E8, (q15_t)0x4EBF, - (q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x60EC, (q15_t)0x539B, - (q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5CB4, (q15_t)0x5842, - (q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5842, (q15_t)0x5CB4, - (q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x539B, (q15_t)0x60EC, - (q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4EBF, (q15_t)0x64E8, - (q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x49B4, (q15_t)0x68A6, - (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x447A, (q15_t)0x6C24, - (q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x3F17, (q15_t)0x6F5F, - (q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x398C, (q15_t)0x7255, - (q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x33DE, (q15_t)0x7504, - (q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2E11, (q15_t)0x776C, - (q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2826, (q15_t)0x798A, - (q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x2223, (q15_t)0x7B5D, - (q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1C0B, (q15_t)0x7CE3, - (q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x15E2, (q15_t)0x7E1D, - (q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x0FAB, (q15_t)0x7F09, - (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x096A, (q15_t)0x7FA7, - (q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x0324, (q15_t)0x7FF6, - (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFCDB, (q15_t)0x7FF6, - (q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF695, (q15_t)0x7FA7, - (q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF054, (q15_t)0x7F09, - (q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEA1D, (q15_t)0x7E1D, - (q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE3F4, (q15_t)0x7CE3, - (q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xDDDC, (q15_t)0x7B5D, - (q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD7D9, (q15_t)0x798A, - (q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD1EE, (q15_t)0x776C, - (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCC21, (q15_t)0x7504, - (q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC673, (q15_t)0x7255, - (q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC0E8, (q15_t)0x6F5F, - (q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBB85, (q15_t)0x6C24, - (q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB64B, (q15_t)0x68A6, - (q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB140, (q15_t)0x64E8, - (q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAC64, (q15_t)0x60EC, - (q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA7BD, (q15_t)0x5CB4, - (q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA34B, (q15_t)0x5842, - (q15_t)0xA128, (q15_t)0x55F5, (q15_t)0x9F13, (q15_t)0x539B, - (q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9B17, (q15_t)0x4EBF, - (q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9759, (q15_t)0x49B4, - (q15_t)0x9592, (q15_t)0x471C, (q15_t)0x93DB, (q15_t)0x447A, - (q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x90A0, (q15_t)0x3F17, - (q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8DAA, (q15_t)0x398C, - (q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8AFB, (q15_t)0x33DE, - (q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8893, (q15_t)0x2E11, - (q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8675, (q15_t)0x2826, - (q15_t)0x8582, (q15_t)0x2528, (q15_t)0x84A2, (q15_t)0x2223, - (q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x831C, (q15_t)0x1C0B, - (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x81E2, (q15_t)0x15E2, - (q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x80F6, (q15_t)0x0FAB, - (q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8058, (q15_t)0x096A, - (q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8009, (q15_t)0x0324, - (q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8009, (q15_t)0xFCDB, - (q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8058, (q15_t)0xF695, - (q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80F6, (q15_t)0xF054, - (q15_t)0x8162, (q15_t)0xED37, (q15_t)0x81E2, (q15_t)0xEA1D, - (q15_t)0x8275, (q15_t)0xE707, (q15_t)0x831C, (q15_t)0xE3F4, - (q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x84A2, (q15_t)0xDDDC, - (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x8675, (q15_t)0xD7D9, - (q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x8893, (q15_t)0xD1EE, - (q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8AFB, (q15_t)0xCC21, - (q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8DAA, (q15_t)0xC673, - (q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x90A0, (q15_t)0xC0E8, - (q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x93DB, (q15_t)0xBB85, - (q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9759, (q15_t)0xB64B, - (q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x9B17, (q15_t)0xB140, - (q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9F13, (q15_t)0xAC64, - (q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA34B, (q15_t)0xA7BD, - (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA7BD, (q15_t)0xA34B, - (q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAC64, (q15_t)0x9F13, - (q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB140, (q15_t)0x9B17, - (q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB64B, (q15_t)0x9759, - (q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBB85, (q15_t)0x93DB, - (q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xC0E8, (q15_t)0x90A0, - (q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC673, (q15_t)0x8DAA, - (q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xCC21, (q15_t)0x8AFB, - (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD1EE, (q15_t)0x8893, - (q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD7D9, (q15_t)0x8675, - (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDDDC, (q15_t)0x84A2, - (q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE3F4, (q15_t)0x831C, - (q15_t)0xE707, (q15_t)0x8275, (q15_t)0xEA1D, (q15_t)0x81E2, - (q15_t)0xED37, (q15_t)0x8162, (q15_t)0xF054, (q15_t)0x80F6, - (q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF695, (q15_t)0x8058, - (q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFCDB, (q15_t)0x8009 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512) -/** - @par - Example code for q15 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 512, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to q15(Fixed point 1.15): - round(twiddleCoefq15(i) * pow(2, 15)) - */ -const q15_t twiddleCoef_512_q15[768] = { - (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFD, (q15_t)0x0192, - (q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FE9, (q15_t)0x04B6, - (q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FC2, (q15_t)0x07D9, - (q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F87, (q15_t)0x0AFB, - (q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F38, (q15_t)0x0E1B, - (q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7ED5, (q15_t)0x1139, - (q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E5F, (q15_t)0x1455, - (q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7DD6, (q15_t)0x176D, - (q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D39, (q15_t)0x1A82, - (q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7C89, (q15_t)0x1D93, - (q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7BC5, (q15_t)0x209F, - (q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7AEF, (q15_t)0x23A6, - (q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A05, (q15_t)0x26A8, - (q15_t)0x798A, (q15_t)0x2826, (q15_t)0x7909, (q15_t)0x29A3, - (q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x77FA, (q15_t)0x2C98, - (q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x76D9, (q15_t)0x2F87, - (q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x75A5, (q15_t)0x326E, - (q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x745F, (q15_t)0x354D, - (q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x7307, (q15_t)0x3824, - (q15_t)0x7255, (q15_t)0x398C, (q15_t)0x719E, (q15_t)0x3AF2, - (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x7023, (q15_t)0x3DB8, - (q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6E96, (q15_t)0x4073, - (q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6CF9, (q15_t)0x4325, - (q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6B4A, (q15_t)0x45CD, - (q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x698C, (q15_t)0x4869, - (q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x67BD, (q15_t)0x4AFB, - (q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x65DD, (q15_t)0x4D81, - (q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x63EF, (q15_t)0x4FFB, - (q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x61F1, (q15_t)0x5269, - (q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x5FE3, (q15_t)0x54CA, - (q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5DC7, (q15_t)0x571D, - (q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5B9D, (q15_t)0x5964, - (q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5964, (q15_t)0x5B9D, - (q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x571D, (q15_t)0x5DC7, - (q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x54CA, (q15_t)0x5FE3, - (q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5269, (q15_t)0x61F1, - (q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4FFB, (q15_t)0x63EF, - (q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4D81, (q15_t)0x65DD, - (q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4AFB, (q15_t)0x67BD, - (q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x4869, (q15_t)0x698C, - (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x45CD, (q15_t)0x6B4A, - (q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4325, (q15_t)0x6CF9, - (q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4073, (q15_t)0x6E96, - (q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3DB8, (q15_t)0x7023, - (q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3AF2, (q15_t)0x719E, - (q15_t)0x398C, (q15_t)0x7255, (q15_t)0x3824, (q15_t)0x7307, - (q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x354D, (q15_t)0x745F, - (q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x326E, (q15_t)0x75A5, - (q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2F87, (q15_t)0x76D9, - (q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2C98, (q15_t)0x77FA, - (q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x29A3, (q15_t)0x7909, - (q15_t)0x2826, (q15_t)0x798A, (q15_t)0x26A8, (q15_t)0x7A05, - (q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x23A6, (q15_t)0x7AEF, - (q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x209F, (q15_t)0x7BC5, - (q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1D93, (q15_t)0x7C89, - (q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1A82, (q15_t)0x7D39, - (q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x176D, (q15_t)0x7DD6, - (q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x1455, (q15_t)0x7E5F, - (q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1139, (q15_t)0x7ED5, - (q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0E1B, (q15_t)0x7F38, - (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0AFB, (q15_t)0x7F87, - (q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x07D9, (q15_t)0x7FC2, - (q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x04B6, (q15_t)0x7FE9, - (q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x0192, (q15_t)0x7FFD, - (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFE6D, (q15_t)0x7FFD, - (q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFB49, (q15_t)0x7FE9, - (q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF826, (q15_t)0x7FC2, - (q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF504, (q15_t)0x7F87, - (q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF1E4, (q15_t)0x7F38, - (q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEEC6, (q15_t)0x7ED5, - (q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEBAA, (q15_t)0x7E5F, - (q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE892, (q15_t)0x7DD6, - (q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE57D, (q15_t)0x7D39, - (q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE26C, (q15_t)0x7C89, - (q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xDF60, (q15_t)0x7BC5, - (q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDC59, (q15_t)0x7AEF, - (q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD957, (q15_t)0x7A05, - (q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD65C, (q15_t)0x7909, - (q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD367, (q15_t)0x77FA, - (q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD078, (q15_t)0x76D9, - (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCD91, (q15_t)0x75A5, - (q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCAB2, (q15_t)0x745F, - (q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC7DB, (q15_t)0x7307, - (q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC50D, (q15_t)0x719E, - (q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC247, (q15_t)0x7023, - (q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xBF8C, (q15_t)0x6E96, - (q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBCDA, (q15_t)0x6CF9, - (q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBA32, (q15_t)0x6B4A, - (q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB796, (q15_t)0x698C, - (q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB504, (q15_t)0x67BD, - (q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB27E, (q15_t)0x65DD, - (q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB004, (q15_t)0x63EF, - (q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAD96, (q15_t)0x61F1, - (q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAB35, (q15_t)0x5FE3, - (q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA8E2, (q15_t)0x5DC7, - (q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA69B, (q15_t)0x5B9D, - (q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA462, (q15_t)0x5964, - (q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA238, (q15_t)0x571D, - (q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA01C, (q15_t)0x54CA, - (q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9E0E, (q15_t)0x5269, - (q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9C10, (q15_t)0x4FFB, - (q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9A22, (q15_t)0x4D81, - (q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9842, (q15_t)0x4AFB, - (q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x9673, (q15_t)0x4869, - (q15_t)0x9592, (q15_t)0x471C, (q15_t)0x94B5, (q15_t)0x45CD, - (q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x9306, (q15_t)0x4325, - (q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x9169, (q15_t)0x4073, - (q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x8FDC, (q15_t)0x3DB8, - (q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8E61, (q15_t)0x3AF2, - (q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8CF8, (q15_t)0x3824, - (q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8BA0, (q15_t)0x354D, - (q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8A5A, (q15_t)0x326E, - (q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8926, (q15_t)0x2F87, - (q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x8805, (q15_t)0x2C98, - (q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x86F6, (q15_t)0x29A3, - (q15_t)0x8675, (q15_t)0x2826, (q15_t)0x85FA, (q15_t)0x26A8, - (q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8510, (q15_t)0x23A6, - (q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x843A, (q15_t)0x209F, - (q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x8376, (q15_t)0x1D93, - (q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x82C6, (q15_t)0x1A82, - (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8229, (q15_t)0x176D, - (q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81A0, (q15_t)0x1455, - (q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x812A, (q15_t)0x1139, - (q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80C7, (q15_t)0x0E1B, - (q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8078, (q15_t)0x0AFB, - (q15_t)0x8058, (q15_t)0x096A, (q15_t)0x803D, (q15_t)0x07D9, - (q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8016, (q15_t)0x04B6, - (q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8002, (q15_t)0x0192, - (q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8002, (q15_t)0xFE6D, - (q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x8016, (q15_t)0xFB49, - (q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x803D, (q15_t)0xF826, - (q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8078, (q15_t)0xF504, - (q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80C7, (q15_t)0xF1E4, - (q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x812A, (q15_t)0xEEC6, - (q15_t)0x8162, (q15_t)0xED37, (q15_t)0x81A0, (q15_t)0xEBAA, - (q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8229, (q15_t)0xE892, - (q15_t)0x8275, (q15_t)0xE707, (q15_t)0x82C6, (q15_t)0xE57D, - (q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8376, (q15_t)0xE26C, - (q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x843A, (q15_t)0xDF60, - (q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x8510, (q15_t)0xDC59, - (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85FA, (q15_t)0xD957, - (q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x86F6, (q15_t)0xD65C, - (q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x8805, (q15_t)0xD367, - (q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x8926, (q15_t)0xD078, - (q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8A5A, (q15_t)0xCD91, - (q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8BA0, (q15_t)0xCAB2, - (q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8CF8, (q15_t)0xC7DB, - (q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8E61, (q15_t)0xC50D, - (q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8FDC, (q15_t)0xC247, - (q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x9169, (q15_t)0xBF8C, - (q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9306, (q15_t)0xBCDA, - (q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x94B5, (q15_t)0xBA32, - (q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9673, (q15_t)0xB796, - (q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9842, (q15_t)0xB504, - (q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x9A22, (q15_t)0xB27E, - (q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9C10, (q15_t)0xB004, - (q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9E0E, (q15_t)0xAD96, - (q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0xA01C, (q15_t)0xAB35, - (q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA238, (q15_t)0xA8E2, - (q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA462, (q15_t)0xA69B, - (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA69B, (q15_t)0xA462, - (q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA8E2, (q15_t)0xA238, - (q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAB35, (q15_t)0xA01C, - (q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xAD96, (q15_t)0x9E0E, - (q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB004, (q15_t)0x9C10, - (q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB27E, (q15_t)0x9A22, - (q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB504, (q15_t)0x9842, - (q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB796, (q15_t)0x9673, - (q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBA32, (q15_t)0x94B5, - (q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBCDA, (q15_t)0x9306, - (q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBF8C, (q15_t)0x9169, - (q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC247, (q15_t)0x8FDC, - (q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC50D, (q15_t)0x8E61, - (q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC7DB, (q15_t)0x8CF8, - (q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xCAB2, (q15_t)0x8BA0, - (q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCD91, (q15_t)0x8A5A, - (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD078, (q15_t)0x8926, - (q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD367, (q15_t)0x8805, - (q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD65C, (q15_t)0x86F6, - (q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD957, (q15_t)0x85FA, - (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDC59, (q15_t)0x8510, - (q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDF60, (q15_t)0x843A, - (q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE26C, (q15_t)0x8376, - (q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE57D, (q15_t)0x82C6, - (q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE892, (q15_t)0x8229, - (q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEBAA, (q15_t)0x81A0, - (q15_t)0xED37, (q15_t)0x8162, (q15_t)0xEEC6, (q15_t)0x812A, - (q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF1E4, (q15_t)0x80C7, - (q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF504, (q15_t)0x8078, - (q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF826, (q15_t)0x803D, - (q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFB49, (q15_t)0x8016, - (q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFE6D, (q15_t)0x8002 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) -/** - @par - Example code for q15 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 1024, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to q15(Fixed point 1.15): - round(twiddleCoefq15(i) * pow(2, 15)) - - */ -const q15_t twiddleCoef_1024_q15[1536] = { - (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x00C9, - (q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFA, (q15_t)0x025B, - (q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF0, (q15_t)0x03ED, - (q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE1, (q15_t)0x057F, - (q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FCE, (q15_t)0x0710, - (q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FB5, (q15_t)0x08A2, - (q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F97, (q15_t)0x0A33, - (q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F75, (q15_t)0x0BC3, - (q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F4D, (q15_t)0x0D53, - (q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F21, (q15_t)0x0EE3, - (q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7EF0, (q15_t)0x1072, - (q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7EBA, (q15_t)0x1201, - (q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E7F, (q15_t)0x138E, - (q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E3F, (q15_t)0x151B, - (q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7DFA, (q15_t)0x16A8, - (q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DB0, (q15_t)0x1833, - (q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D62, (q15_t)0x19BD, - (q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D0F, (q15_t)0x1B47, - (q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CB7, (q15_t)0x1CCF, - (q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C5A, (q15_t)0x1E56, - (q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7BF8, (q15_t)0x1FDC, - (q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7B92, (q15_t)0x2161, - (q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B26, (q15_t)0x22E5, - (q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AB6, (q15_t)0x2467, - (q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A42, (q15_t)0x25E8, - (q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79C8, (q15_t)0x2767, - (q15_t)0x798A, (q15_t)0x2826, (q15_t)0x794A, (q15_t)0x28E5, - (q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78C7, (q15_t)0x2A61, - (q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7840, (q15_t)0x2BDC, - (q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77B4, (q15_t)0x2D55, - (q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x7723, (q15_t)0x2ECC, - (q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x768E, (q15_t)0x3041, - (q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x75F4, (q15_t)0x31B5, - (q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x7555, (q15_t)0x3326, - (q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74B2, (q15_t)0x3496, - (q15_t)0x745F, (q15_t)0x354D, (q15_t)0x740B, (q15_t)0x3604, - (q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x735F, (q15_t)0x376F, - (q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72AF, (q15_t)0x38D8, - (q15_t)0x7255, (q15_t)0x398C, (q15_t)0x71FA, (q15_t)0x3A40, - (q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x7141, (q15_t)0x3BA5, - (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x7083, (q15_t)0x3D07, - (q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x6FC1, (q15_t)0x3E68, - (q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6EFB, (q15_t)0x3FC5, - (q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E30, (q15_t)0x4121, - (q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6D62, (q15_t)0x427A, - (q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6C8F, (q15_t)0x43D0, - (q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6BB8, (q15_t)0x4524, - (q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6ADC, (q15_t)0x4675, - (q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x69FD, (q15_t)0x47C3, - (q15_t)0x698C, (q15_t)0x4869, (q15_t)0x6919, (q15_t)0x490F, - (q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x6832, (q15_t)0x4A58, - (q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x6746, (q15_t)0x4B9E, - (q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x6657, (q15_t)0x4CE1, - (q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x6563, (q15_t)0x4E21, - (q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x646C, (q15_t)0x4F5E, - (q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x6371, (q15_t)0x5097, - (q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x6271, (q15_t)0x51CE, - (q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x616F, (q15_t)0x5302, - (q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x6068, (q15_t)0x5433, - (q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5F5E, (q15_t)0x5560, - (q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5E50, (q15_t)0x568A, - (q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5D3E, (q15_t)0x57B0, - (q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C29, (q15_t)0x58D4, - (q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B10, (q15_t)0x59F3, - (q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x59F3, (q15_t)0x5B10, - (q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x58D4, (q15_t)0x5C29, - (q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x57B0, (q15_t)0x5D3E, - (q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x568A, (q15_t)0x5E50, - (q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x5560, (q15_t)0x5F5E, - (q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x5433, (q15_t)0x6068, - (q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5302, (q15_t)0x616F, - (q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x51CE, (q15_t)0x6271, - (q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x5097, (q15_t)0x6371, - (q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4F5E, (q15_t)0x646C, - (q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E21, (q15_t)0x6563, - (q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4CE1, (q15_t)0x6657, - (q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4B9E, (q15_t)0x6746, - (q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4A58, (q15_t)0x6832, - (q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x490F, (q15_t)0x6919, - (q15_t)0x4869, (q15_t)0x698C, (q15_t)0x47C3, (q15_t)0x69FD, - (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x4675, (q15_t)0x6ADC, - (q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x4524, (q15_t)0x6BB8, - (q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x43D0, (q15_t)0x6C8F, - (q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x427A, (q15_t)0x6D62, - (q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4121, (q15_t)0x6E30, - (q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x3FC5, (q15_t)0x6EFB, - (q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3E68, (q15_t)0x6FC1, - (q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D07, (q15_t)0x7083, - (q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3BA5, (q15_t)0x7141, - (q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3A40, (q15_t)0x71FA, - (q15_t)0x398C, (q15_t)0x7255, (q15_t)0x38D8, (q15_t)0x72AF, - (q15_t)0x3824, (q15_t)0x7307, (q15_t)0x376F, (q15_t)0x735F, - (q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x3604, (q15_t)0x740B, - (q15_t)0x354D, (q15_t)0x745F, (q15_t)0x3496, (q15_t)0x74B2, - (q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x3326, (q15_t)0x7555, - (q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x31B5, (q15_t)0x75F4, - (q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x3041, (q15_t)0x768E, - (q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2ECC, (q15_t)0x7723, - (q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2D55, (q15_t)0x77B4, - (q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2BDC, (q15_t)0x7840, - (q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2A61, (q15_t)0x78C7, - (q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x28E5, (q15_t)0x794A, - (q15_t)0x2826, (q15_t)0x798A, (q15_t)0x2767, (q15_t)0x79C8, - (q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x25E8, (q15_t)0x7A42, - (q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x2467, (q15_t)0x7AB6, - (q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x22E5, (q15_t)0x7B26, - (q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x2161, (q15_t)0x7B92, - (q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x1FDC, (q15_t)0x7BF8, - (q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1E56, (q15_t)0x7C5A, - (q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1CCF, (q15_t)0x7CB7, - (q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1B47, (q15_t)0x7D0F, - (q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x19BD, (q15_t)0x7D62, - (q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x1833, (q15_t)0x7DB0, - (q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x16A8, (q15_t)0x7DFA, - (q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x151B, (q15_t)0x7E3F, - (q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x138E, (q15_t)0x7E7F, - (q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1201, (q15_t)0x7EBA, - (q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x1072, (q15_t)0x7EF0, - (q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0EE3, (q15_t)0x7F21, - (q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0D53, (q15_t)0x7F4D, - (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0BC3, (q15_t)0x7F75, - (q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0A33, (q15_t)0x7F97, - (q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x08A2, (q15_t)0x7FB5, - (q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x0710, (q15_t)0x7FCE, - (q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x057F, (q15_t)0x7FE1, - (q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x03ED, (q15_t)0x7FF0, - (q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x025B, (q15_t)0x7FFA, - (q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x00C9, (q15_t)0x7FFF, - (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFF36, (q15_t)0x7FFF, - (q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFDA4, (q15_t)0x7FFA, - (q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFC12, (q15_t)0x7FF0, - (q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFA80, (q15_t)0x7FE1, - (q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF8EF, (q15_t)0x7FCE, - (q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF75D, (q15_t)0x7FB5, - (q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF5CC, (q15_t)0x7F97, - (q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF43C, (q15_t)0x7F75, - (q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF2AC, (q15_t)0x7F4D, - (q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF11C, (q15_t)0x7F21, - (q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEF8D, (q15_t)0x7EF0, - (q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEDFE, (q15_t)0x7EBA, - (q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEC71, (q15_t)0x7E7F, - (q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEAE4, (q15_t)0x7E3F, - (q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE957, (q15_t)0x7DFA, - (q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE7CC, (q15_t)0x7DB0, - (q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE642, (q15_t)0x7D62, - (q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE4B8, (q15_t)0x7D0F, - (q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE330, (q15_t)0x7CB7, - (q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE1A9, (q15_t)0x7C5A, - (q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE023, (q15_t)0x7BF8, - (q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDE9E, (q15_t)0x7B92, - (q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDD1A, (q15_t)0x7B26, - (q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDB98, (q15_t)0x7AB6, - (q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDA17, (q15_t)0x7A42, - (q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD898, (q15_t)0x79C8, - (q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD71A, (q15_t)0x794A, - (q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD59E, (q15_t)0x78C7, - (q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD423, (q15_t)0x7840, - (q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD2AA, (q15_t)0x77B4, - (q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD133, (q15_t)0x7723, - (q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xCFBE, (q15_t)0x768E, - (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCE4A, (q15_t)0x75F4, - (q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCCD9, (q15_t)0x7555, - (q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCB69, (q15_t)0x74B2, - (q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xC9FB, (q15_t)0x740B, - (q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC890, (q15_t)0x735F, - (q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC727, (q15_t)0x72AF, - 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(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x8180, (q15_t)0xEC71, - (q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81C0, (q15_t)0xEAE4, - (q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8205, (q15_t)0xE957, - (q15_t)0x8229, (q15_t)0xE892, (q15_t)0x824F, (q15_t)0xE7CC, - (q15_t)0x8275, (q15_t)0xE707, (q15_t)0x829D, (q15_t)0xE642, - (q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82F0, (q15_t)0xE4B8, - (q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8348, (q15_t)0xE330, - (q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x83A5, (q15_t)0xE1A9, - (q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x8407, (q15_t)0xE023, - (q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x846D, (q15_t)0xDE9E, - (q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84D9, (q15_t)0xDD1A, - (q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x8549, (q15_t)0xDB98, - (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85BD, (q15_t)0xDA17, - (q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8637, (q15_t)0xD898, - (q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x86B5, (q15_t)0xD71A, - (q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8738, (q15_t)0xD59E, - (q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x87BF, (q15_t)0xD423, - (q15_t)0x8805, (q15_t)0xD367, (q15_t)0x884B, (q15_t)0xD2AA, - (q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88DC, (q15_t)0xD133, - (q15_t)0x8926, (q15_t)0xD078, (q15_t)0x8971, (q15_t)0xCFBE, - (q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8A0B, (q15_t)0xCE4A, - (q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8AAA, (q15_t)0xCCD9, - (q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B4D, (q15_t)0xCB69, - (q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BF4, (q15_t)0xC9FB, - (q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8CA0, (q15_t)0xC890, - (q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D50, (q15_t)0xC727, - (q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8E05, (q15_t)0xC5BF, - (q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8EBE, (q15_t)0xC45A, - (q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F7C, (q15_t)0xC2F8, - (q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x903E, (q15_t)0xC197, - (q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x9104, (q15_t)0xC03A, - (q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x91CF, (q15_t)0xBEDE, - (q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x929D, (q15_t)0xBD85, - (q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x9370, (q15_t)0xBC2F, - (q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x9447, (q15_t)0xBADB, - (q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x9523, (q15_t)0xB98A, - (q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9602, (q15_t)0xB83C, - (q15_t)0x9673, (q15_t)0xB796, (q15_t)0x96E6, (q15_t)0xB6F0, - (q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x97CD, (q15_t)0xB5A7, - (q15_t)0x9842, (q15_t)0xB504, (q15_t)0x98B9, (q15_t)0xB461, - (q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x99A8, (q15_t)0xB31E, - (q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A9C, (q15_t)0xB1DE, - (q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B93, (q15_t)0xB0A1, - (q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C8E, (q15_t)0xAF68, - (q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D8E, (q15_t)0xAE31, - (q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E90, (q15_t)0xACFD, - (q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F97, (q15_t)0xABCC, - (q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA0A1, (q15_t)0xAA9F, - (q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA1AF, (q15_t)0xA975, - (q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA2C1, (q15_t)0xA84F, - (q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA3D6, (q15_t)0xA72B, - (q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA4EF, (q15_t)0xA60C, - (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA60C, (q15_t)0xA4EF, - (q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA72B, (q15_t)0xA3D6, - (q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA84F, (q15_t)0xA2C1, - (q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA975, (q15_t)0xA1AF, - (q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA9F, (q15_t)0xA0A1, - (q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xABCC, (q15_t)0x9F97, - (q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xACFD, (q15_t)0x9E90, - (q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xAE31, (q15_t)0x9D8E, - (q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAF68, (q15_t)0x9C8E, - (q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB0A1, (q15_t)0x9B93, - (q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB1DE, (q15_t)0x9A9C, - (q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB31E, (q15_t)0x99A8, - (q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB461, (q15_t)0x98B9, - (q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB5A7, (q15_t)0x97CD, - (q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB6F0, (q15_t)0x96E6, - (q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB83C, (q15_t)0x9602, - (q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB98A, (q15_t)0x9523, - (q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBADB, (q15_t)0x9447, - (q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBC2F, (q15_t)0x9370, - (q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD85, (q15_t)0x929D, - (q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBEDE, (q15_t)0x91CF, - (q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xC03A, (q15_t)0x9104, - (q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC197, (q15_t)0x903E, - (q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC2F8, (q15_t)0x8F7C, - (q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC45A, (q15_t)0x8EBE, - (q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC5BF, (q15_t)0x8E05, - (q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC727, (q15_t)0x8D50, - (q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC890, (q15_t)0x8CA0, - (q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC9FB, (q15_t)0x8BF4, - (q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCB69, (q15_t)0x8B4D, - (q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCCD9, (q15_t)0x8AAA, - (q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCE4A, (q15_t)0x8A0B, - (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCFBE, (q15_t)0x8971, - (q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD133, (q15_t)0x88DC, - (q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD2AA, (q15_t)0x884B, - (q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD423, (q15_t)0x87BF, - (q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD59E, (q15_t)0x8738, - (q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD71A, (q15_t)0x86B5, - (q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD898, (q15_t)0x8637, - (q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xDA17, (q15_t)0x85BD, - (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB98, (q15_t)0x8549, - (q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDD1A, (q15_t)0x84D9, - (q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE9E, (q15_t)0x846D, - (q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xE023, (q15_t)0x8407, - (q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE1A9, (q15_t)0x83A5, - (q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE330, (q15_t)0x8348, - (q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE4B8, (q15_t)0x82F0, - (q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE642, (q15_t)0x829D, - (q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE7CC, (q15_t)0x824F, - (q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE957, (q15_t)0x8205, - (q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEAE4, (q15_t)0x81C0, - (q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEC71, (q15_t)0x8180, - (q15_t)0xED37, (q15_t)0x8162, (q15_t)0xEDFE, (q15_t)0x8145, - (q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEF8D, (q15_t)0x810F, - (q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF11C, (q15_t)0x80DE, - (q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF2AC, (q15_t)0x80B2, - (q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF43C, (q15_t)0x808A, - (q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF5CC, (q15_t)0x8068, - (q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF75D, (q15_t)0x804A, - (q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF8EF, (q15_t)0x8031, - (q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFA80, (q15_t)0x801E, - (q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFC12, (q15_t)0x800F, - (q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFDA4, (q15_t)0x8005, - (q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFF36, (q15_t)0x8000 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) -/** - @par - Example code for q15 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 2048, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to q15(Fixed point 1.15): - round(twiddleCoefq15(i) * pow(2, 15)) - */ -const q15_t twiddleCoef_2048_q15[3072] = { - (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0064, - (q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFE, (q15_t)0x012D, - (q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFC, (q15_t)0x01F6, - (q15_t)0x7FFA, (q15_t)0x025B, (q15_t)0x7FF8, (q15_t)0x02BF, - (q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF3, (q15_t)0x0388, - (q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FED, (q15_t)0x0451, - (q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE5, (q15_t)0x051A, - (q15_t)0x7FE1, (q15_t)0x057F, (q15_t)0x7FDD, (q15_t)0x05E3, - (q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FD3, (q15_t)0x06AC, - (q15_t)0x7FCE, (q15_t)0x0710, (q15_t)0x7FC8, (q15_t)0x0775, - (q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FBC, (q15_t)0x083D, - (q15_t)0x7FB5, (q15_t)0x08A2, (q15_t)0x7FAE, (q15_t)0x0906, - (q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F9F, (q15_t)0x09CE, - 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(q15_t)0x8EBE, (q15_t)0xC45A, (q15_t)0x8EED, (q15_t)0xC402, - (q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F4C, (q15_t)0xC350, - (q15_t)0x8F7C, (q15_t)0xC2F8, (q15_t)0x8FAC, (q15_t)0xC29F, - (q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x900D, (q15_t)0xC1EF, - (q15_t)0x903E, (q15_t)0xC197, (q15_t)0x906F, (q15_t)0xC140, - (q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x90D2, (q15_t)0xC091, - (q15_t)0x9104, (q15_t)0xC03A, (q15_t)0x9136, (q15_t)0xBFE2, - (q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x919C, (q15_t)0xBF35, - (q15_t)0x91CF, (q15_t)0xBEDE, (q15_t)0x9202, (q15_t)0xBE88, - (q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9269, (q15_t)0xBDDB, - (q15_t)0x929D, (q15_t)0xBD85, (q15_t)0x92D2, (q15_t)0xBD2F, - (q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x933B, (q15_t)0xBC84, - (q15_t)0x9370, (q15_t)0xBC2F, (q15_t)0x93A6, (q15_t)0xBBDA, - (q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x9411, (q15_t)0xBB30, - (q15_t)0x9447, (q15_t)0xBADB, (q15_t)0x947E, (q15_t)0xBA87, - (q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x94EC, (q15_t)0xB9DE, - (q15_t)0x9523, (q15_t)0xB98A, (q15_t)0x955A, (q15_t)0xB936, - (q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x95CA, (q15_t)0xB88F, - (q15_t)0x9602, (q15_t)0xB83C, (q15_t)0x963B, (q15_t)0xB7E9, - (q15_t)0x9673, (q15_t)0xB796, (q15_t)0x96AC, (q15_t)0xB743, - (q15_t)0x96E6, (q15_t)0xB6F0, (q15_t)0x971F, (q15_t)0xB69E, - (q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9793, (q15_t)0xB5F9, - (q15_t)0x97CD, (q15_t)0xB5A7, (q15_t)0x9808, (q15_t)0xB556, - (q15_t)0x9842, (q15_t)0xB504, (q15_t)0x987D, (q15_t)0xB4B3, - (q15_t)0x98B9, (q15_t)0xB461, (q15_t)0x98F4, (q15_t)0xB410, - (q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x996C, (q15_t)0xB36F, - (q15_t)0x99A8, (q15_t)0xB31E, (q15_t)0x99E5, (q15_t)0xB2CE, - (q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A5F, (q15_t)0xB22E, - (q15_t)0x9A9C, (q15_t)0xB1DE, (q15_t)0x9AD9, (q15_t)0xB18F, - (q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B55, (q15_t)0xB0F0, - (q15_t)0x9B93, (q15_t)0xB0A1, (q15_t)0x9BD2, (q15_t)0xB053, - (q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C4F, (q15_t)0xAFB6, - (q15_t)0x9C8E, (q15_t)0xAF68, (q15_t)0x9CCE, (q15_t)0xAF1A, - (q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D4D, (q15_t)0xAE7E, - (q15_t)0x9D8E, (q15_t)0xAE31, (q15_t)0x9DCE, (q15_t)0xADE3, - (q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E4F, (q15_t)0xAD4A, - (q15_t)0x9E90, (q15_t)0xACFD, (q15_t)0x9ED2, (q15_t)0xACB1, - (q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F55, (q15_t)0xAC18, - (q15_t)0x9F97, (q15_t)0xABCC, (q15_t)0x9FD9, (q15_t)0xAB81, - (q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA05F, (q15_t)0xAAEA, - (q15_t)0xA0A1, (q15_t)0xAA9F, (q15_t)0xA0E5, (q15_t)0xAA54, - (q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA16C, (q15_t)0xA9BF, - (q15_t)0xA1AF, (q15_t)0xA975, (q15_t)0xA1F4, (q15_t)0xA92B, - (q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA27C, (q15_t)0xA898, - (q15_t)0xA2C1, (q15_t)0xA84F, (q15_t)0xA306, (q15_t)0xA806, - (q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA391, (q15_t)0xA774, - (q15_t)0xA3D6, (q15_t)0xA72B, (q15_t)0xA41C, (q15_t)0xA6E3, - (q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA4A9, (q15_t)0xA653, - (q15_t)0xA4EF, (q15_t)0xA60C, (q15_t)0xA536, (q15_t)0xA5C4, - (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA5C4, (q15_t)0xA536, - (q15_t)0xA60C, (q15_t)0xA4EF, (q15_t)0xA653, (q15_t)0xA4A9, - (q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA6E3, (q15_t)0xA41C, - (q15_t)0xA72B, (q15_t)0xA3D6, (q15_t)0xA774, (q15_t)0xA391, - (q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA806, (q15_t)0xA306, - (q15_t)0xA84F, (q15_t)0xA2C1, (q15_t)0xA898, (q15_t)0xA27C, - (q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA92B, (q15_t)0xA1F4, - (q15_t)0xA975, (q15_t)0xA1AF, (q15_t)0xA9BF, (q15_t)0xA16C, - (q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA54, (q15_t)0xA0E5, - (q15_t)0xAA9F, (q15_t)0xA0A1, (q15_t)0xAAEA, (q15_t)0xA05F, - (q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xAB81, (q15_t)0x9FD9, - (q15_t)0xABCC, (q15_t)0x9F97, (q15_t)0xAC18, (q15_t)0x9F55, - (q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xACB1, (q15_t)0x9ED2, - (q15_t)0xACFD, (q15_t)0x9E90, (q15_t)0xAD4A, (q15_t)0x9E4F, - (q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xADE3, (q15_t)0x9DCE, - (q15_t)0xAE31, (q15_t)0x9D8E, (q15_t)0xAE7E, (q15_t)0x9D4D, - (q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAF1A, (q15_t)0x9CCE, - (q15_t)0xAF68, (q15_t)0x9C8E, (q15_t)0xAFB6, (q15_t)0x9C4F, - (q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB053, (q15_t)0x9BD2, - (q15_t)0xB0A1, (q15_t)0x9B93, (q15_t)0xB0F0, (q15_t)0x9B55, - (q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB18F, (q15_t)0x9AD9, - (q15_t)0xB1DE, (q15_t)0x9A9C, (q15_t)0xB22E, (q15_t)0x9A5F, - (q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB2CE, (q15_t)0x99E5, - (q15_t)0xB31E, (q15_t)0x99A8, (q15_t)0xB36F, (q15_t)0x996C, - (q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB410, (q15_t)0x98F4, - (q15_t)0xB461, (q15_t)0x98B9, (q15_t)0xB4B3, (q15_t)0x987D, - (q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB556, (q15_t)0x9808, - (q15_t)0xB5A7, (q15_t)0x97CD, (q15_t)0xB5F9, (q15_t)0x9793, - (q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB69E, (q15_t)0x971F, - (q15_t)0xB6F0, (q15_t)0x96E6, (q15_t)0xB743, (q15_t)0x96AC, - (q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB7E9, (q15_t)0x963B, - (q15_t)0xB83C, (q15_t)0x9602, (q15_t)0xB88F, (q15_t)0x95CA, - (q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB936, (q15_t)0x955A, - (q15_t)0xB98A, (q15_t)0x9523, (q15_t)0xB9DE, (q15_t)0x94EC, - (q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBA87, (q15_t)0x947E, - (q15_t)0xBADB, (q15_t)0x9447, (q15_t)0xBB30, (q15_t)0x9411, - (q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBBDA, (q15_t)0x93A6, - (q15_t)0xBC2F, (q15_t)0x9370, (q15_t)0xBC84, (q15_t)0x933B, - (q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD2F, (q15_t)0x92D2, - (q15_t)0xBD85, (q15_t)0x929D, (q15_t)0xBDDB, (q15_t)0x9269, - (q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBE88, (q15_t)0x9202, - (q15_t)0xBEDE, (q15_t)0x91CF, (q15_t)0xBF35, (q15_t)0x919C, - (q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xBFE2, (q15_t)0x9136, - (q15_t)0xC03A, (q15_t)0x9104, (q15_t)0xC091, (q15_t)0x90D2, - (q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC140, (q15_t)0x906F, - (q15_t)0xC197, (q15_t)0x903E, (q15_t)0xC1EF, (q15_t)0x900D, - (q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC29F, (q15_t)0x8FAC, - (q15_t)0xC2F8, (q15_t)0x8F7C, (q15_t)0xC350, (q15_t)0x8F4C, - (q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC402, (q15_t)0x8EED, - (q15_t)0xC45A, (q15_t)0x8EBE, (q15_t)0xC4B3, (q15_t)0x8E90, - (q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC566, (q15_t)0x8E33, - (q15_t)0xC5BF, (q15_t)0x8E05, (q15_t)0xC619, (q15_t)0x8DD8, - (q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC6CD, (q15_t)0x8D7D, - (q15_t)0xC727, (q15_t)0x8D50, (q15_t)0xC781, (q15_t)0x8D24, - (q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC835, (q15_t)0x8CCC, - (q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC8EB, (q15_t)0x8C75, - (q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC9A0, (q15_t)0x8C1F, - (q15_t)0xC9FB, (q15_t)0x8BF4, (q15_t)0xCA57, (q15_t)0x8BCA, - (q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCB0D, (q15_t)0x8B76, - (q15_t)0xCB69, (q15_t)0x8B4D, (q15_t)0xCBC5, (q15_t)0x8B24, - (q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCC7D, (q15_t)0x8AD2, - (q15_t)0xCCD9, (q15_t)0x8AAA, (q15_t)0xCD35, (q15_t)0x8A82, - (q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCDEE, (q15_t)0x8A33, - (q15_t)0xCE4A, (q15_t)0x8A0B, (q15_t)0xCEA7, (q15_t)0x89E4, - (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCF61, (q15_t)0x8997, - (q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xD01B, (q15_t)0x894C, - (q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD0D6, (q15_t)0x8901, - (q15_t)0xD133, (q15_t)0x88DC, (q15_t)0xD191, (q15_t)0x88B8, - (q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD24C, (q15_t)0x886F, - (q15_t)0xD2AA, (q15_t)0x884B, (q15_t)0xD308, (q15_t)0x8828, - (q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD3C5, (q15_t)0x87E2, - (q15_t)0xD423, (q15_t)0x87BF, (q15_t)0xD482, (q15_t)0x879D, - (q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD53F, (q15_t)0x8759, - (q15_t)0xD59E, (q15_t)0x8738, (q15_t)0xD5FD, (q15_t)0x8717, - (q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD6BB, (q15_t)0x86D5, - (q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD779, (q15_t)0x8695, - (q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD838, (q15_t)0x8656, - (q15_t)0xD898, (q15_t)0x8637, (q15_t)0xD8F8, (q15_t)0x8618, - (q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xD9B7, (q15_t)0x85DB, - (q15_t)0xDA17, (q15_t)0x85BD, (q15_t)0xDA77, (q15_t)0x85A0, - (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB38, (q15_t)0x8565, - (q15_t)0xDB98, (q15_t)0x8549, (q15_t)0xDBF8, (q15_t)0x852C, - (q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDCBA, (q15_t)0x84F4, - (q15_t)0xDD1A, (q15_t)0x84D9, (q15_t)0xDD7B, (q15_t)0x84BD, - (q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE3D, (q15_t)0x8488, - (q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDEFF, (q15_t)0x8453, - (q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xDFC1, (q15_t)0x8420, - (q15_t)0xE023, (q15_t)0x8407, (q15_t)0xE084, (q15_t)0x83EE, - (q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE147, (q15_t)0x83BD, - (q15_t)0xE1A9, (q15_t)0x83A5, (q15_t)0xE20A, (q15_t)0x838E, - (q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE2CE, (q15_t)0x835F, - (q15_t)0xE330, (q15_t)0x8348, (q15_t)0xE392, (q15_t)0x8332, - (q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE456, (q15_t)0x8306, - (q15_t)0xE4B8, (q15_t)0x82F0, (q15_t)0xE51B, (q15_t)0x82DB, - (q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE5DF, (q15_t)0x82B1, - (q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE6A4, (q15_t)0x8289, - (q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE769, (q15_t)0x8262, - (q15_t)0xE7CC, (q15_t)0x824F, (q15_t)0xE82F, (q15_t)0x823C, - (q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE8F5, (q15_t)0x8217, - (q15_t)0xE957, (q15_t)0x8205, (q15_t)0xE9BA, (q15_t)0x81F3, - (q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEA80, (q15_t)0x81D1, - (q15_t)0xEAE4, (q15_t)0x81C0, (q15_t)0xEB47, (q15_t)0x81B0, - (q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEC0D, (q15_t)0x8190, - (q15_t)0xEC71, (q15_t)0x8180, (q15_t)0xECD4, (q15_t)0x8171, - (q15_t)0xED37, (q15_t)0x8162, (q15_t)0xED9B, (q15_t)0x8154, - (q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEE62, (q15_t)0x8137, - (q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEF29, (q15_t)0x811C, - (q15_t)0xEF8D, (q15_t)0x810F, (q15_t)0xEFF1, (q15_t)0x8102, - (q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF0B8, (q15_t)0x80EA, - (q15_t)0xF11C, (q15_t)0x80DE, (q15_t)0xF180, (q15_t)0x80D2, - (q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF248, (q15_t)0x80BC, - (q15_t)0xF2AC, (q15_t)0x80B2, (q15_t)0xF310, (q15_t)0x80A7, - (q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF3D8, (q15_t)0x8094, - (q15_t)0xF43C, (q15_t)0x808A, (q15_t)0xF4A0, (q15_t)0x8081, - (q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF568, (q15_t)0x8070, - (q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF631, (q15_t)0x8060, - (q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF6F9, (q15_t)0x8051, - (q15_t)0xF75D, (q15_t)0x804A, (q15_t)0xF7C2, (q15_t)0x8043, - (q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF88A, (q15_t)0x8037, - (q15_t)0xF8EF, (q15_t)0x8031, (q15_t)0xF953, (q15_t)0x802C, - (q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFA1C, (q15_t)0x8022, - (q15_t)0xFA80, (q15_t)0x801E, (q15_t)0xFAE5, (q15_t)0x801A, - (q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFBAE, (q15_t)0x8012, - (q15_t)0xFC12, (q15_t)0x800F, (q15_t)0xFC77, (q15_t)0x800C, - (q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFD40, (q15_t)0x8007, - (q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFE09, (q15_t)0x8003, - (q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFED2, (q15_t)0x8001, - (q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF9B, (q15_t)0x8000 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) -/** - @par - Example code for q15 Twiddle factors Generation:: - @par - 
for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  }
- @par - where N = 4096, PI = 3.14159265358979 - @par - Cos and Sin values are interleaved fashion - @par - Convert Floating point to q15(Fixed point 1.15): - round(twiddleCoefq15(i) * pow(2, 15)) - */ -const q15_t twiddleCoef_4096_q15[6144] = -{ - (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0032, - (q15_t)0x7FFF, (q15_t)0x0064, (q15_t)0x7FFF, (q15_t)0x0096, - (q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x00FB, - (q15_t)0x7FFE, (q15_t)0x012D, (q15_t)0x7FFE, (q15_t)0x015F, - (q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFC, (q15_t)0x01C4, - (q15_t)0x7FFC, (q15_t)0x01F6, (q15_t)0x7FFB, (q15_t)0x0228, - (q15_t)0x7FFA, (q15_t)0x025B, (q15_t)0x7FF9, (q15_t)0x028D, - (q15_t)0x7FF8, (q15_t)0x02BF, (q15_t)0x7FF7, (q15_t)0x02F1, - (q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF4, (q15_t)0x0356, - (q15_t)0x7FF3, (q15_t)0x0388, (q15_t)0x7FF2, (q15_t)0x03BA, - (q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FEE, (q15_t)0x041F, - (q15_t)0x7FED, (q15_t)0x0451, (q15_t)0x7FEB, (q15_t)0x0483, - (q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE7, (q15_t)0x04E8, - (q15_t)0x7FE5, (q15_t)0x051A, (q15_t)0x7FE3, (q15_t)0x054C, - (q15_t)0x7FE1, (q15_t)0x057F, (q15_t)0x7FDF, (q15_t)0x05B1, - (q15_t)0x7FDD, (q15_t)0x05E3, (q15_t)0x7FDA, (q15_t)0x0615, - (q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FD6, (q15_t)0x067A, - (q15_t)0x7FD3, (q15_t)0x06AC, (q15_t)0x7FD0, (q15_t)0x06DE, - (q15_t)0x7FCE, (q15_t)0x0710, (q15_t)0x7FCB, (q15_t)0x0742, - (q15_t)0x7FC8, (q15_t)0x0775, (q15_t)0x7FC5, (q15_t)0x07A7, - (q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FBF, (q15_t)0x080B, - (q15_t)0x7FBC, (q15_t)0x083D, (q15_t)0x7FB8, (q15_t)0x086F, - (q15_t)0x7FB5, (q15_t)0x08A2, (q15_t)0x7FB1, (q15_t)0x08D4, - (q15_t)0x7FAE, (q15_t)0x0906, (q15_t)0x7FAA, (q15_t)0x0938, - (q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7FA3, (q15_t)0x099C, - (q15_t)0x7F9F, (q15_t)0x09CE, (q15_t)0x7F9B, (q15_t)0x0A00, - (q15_t)0x7F97, (q15_t)0x0A33, (q15_t)0x7F93, (q15_t)0x0A65, - (q15_t)0x7F8F, (q15_t)0x0A97, (q15_t)0x7F8B, (q15_t)0x0AC9, - (q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F82, (q15_t)0x0B2D, - (q15_t)0x7F7E, (q15_t)0x0B5F, (q15_t)0x7F79, (q15_t)0x0B91, - (q15_t)0x7F75, (q15_t)0x0BC3, (q15_t)0x7F70, (q15_t)0x0BF5, - (q15_t)0x7F6B, (q15_t)0x0C27, (q15_t)0x7F67, (q15_t)0x0C59, - (q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F5D, (q15_t)0x0CBD, - (q15_t)0x7F58, (q15_t)0x0CEF, (q15_t)0x7F53, (q15_t)0x0D21, - (q15_t)0x7F4D, (q15_t)0x0D53, (q15_t)0x7F48, (q15_t)0x0D85, - (q15_t)0x7F43, (q15_t)0x0DB7, (q15_t)0x7F3D, (q15_t)0x0DE9, - (q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F32, (q15_t)0x0E4D, - (q15_t)0x7F2D, (q15_t)0x0E7F, (q15_t)0x7F27, (q15_t)0x0EB1, - (q15_t)0x7F21, (q15_t)0x0EE3, (q15_t)0x7F1B, (q15_t)0x0F15, - (q15_t)0x7F15, (q15_t)0x0F47, (q15_t)0x7F0F, (q15_t)0x0F79, - (q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7F03, (q15_t)0x0FDD, - (q15_t)0x7EFD, (q15_t)0x100E, (q15_t)0x7EF6, (q15_t)0x1040, - (q15_t)0x7EF0, (q15_t)0x1072, (q15_t)0x7EE9, (q15_t)0x10A4, - (q15_t)0x7EE3, (q15_t)0x10D6, (q15_t)0x7EDC, (q15_t)0x1108, - (q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7ECF, (q15_t)0x116B, - (q15_t)0x7EC8, (q15_t)0x119D, (q15_t)0x7EC1, (q15_t)0x11CF, - (q15_t)0x7EBA, (q15_t)0x1201, (q15_t)0x7EB3, (q15_t)0x1232, - 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(q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC8BD, (q15_t)0x8C8A, - (q15_t)0xC8EB, (q15_t)0x8C75, (q15_t)0xC918, (q15_t)0x8C5F, - (q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC973, (q15_t)0x8C34, - (q15_t)0xC9A0, (q15_t)0x8C1F, (q15_t)0xC9CE, (q15_t)0x8C09, - (q15_t)0xC9FB, (q15_t)0x8BF4, (q15_t)0xCA29, (q15_t)0x8BDF, - (q15_t)0xCA57, (q15_t)0x8BCA, (q15_t)0xCA84, (q15_t)0x8BB5, - (q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCAE0, (q15_t)0x8B8B, - (q15_t)0xCB0D, (q15_t)0x8B76, (q15_t)0xCB3B, (q15_t)0x8B61, - (q15_t)0xCB69, (q15_t)0x8B4D, (q15_t)0xCB97, (q15_t)0x8B38, - (q15_t)0xCBC5, (q15_t)0x8B24, (q15_t)0xCBF3, (q15_t)0x8B0F, - (q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCC4F, (q15_t)0x8AE6, - (q15_t)0xCC7D, (q15_t)0x8AD2, (q15_t)0xCCAB, (q15_t)0x8ABE, - (q15_t)0xCCD9, (q15_t)0x8AAA, (q15_t)0xCD07, (q15_t)0x8A96, - (q15_t)0xCD35, (q15_t)0x8A82, (q15_t)0xCD63, (q15_t)0x8A6E, - (q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCDBF, (q15_t)0x8A46, - (q15_t)0xCDEE, (q15_t)0x8A33, (q15_t)0xCE1C, (q15_t)0x8A1F, - (q15_t)0xCE4A, (q15_t)0x8A0B, (q15_t)0xCE79, (q15_t)0x89F8, - (q15_t)0xCEA7, (q15_t)0x89E4, (q15_t)0xCED5, (q15_t)0x89D1, - (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCF32, (q15_t)0x89AB, - (q15_t)0xCF61, (q15_t)0x8997, (q15_t)0xCF8F, (q15_t)0x8984, - (q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xCFEC, (q15_t)0x895F, - (q15_t)0xD01B, (q15_t)0x894C, (q15_t)0xD04A, (q15_t)0x8939, - (q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD0A7, (q15_t)0x8914, - (q15_t)0xD0D6, (q15_t)0x8901, (q15_t)0xD104, (q15_t)0x88EF, - (q15_t)0xD133, (q15_t)0x88DC, (q15_t)0xD162, (q15_t)0x88CA, - (q15_t)0xD191, (q15_t)0x88B8, (q15_t)0xD1C0, (q15_t)0x88A5, - (q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD21D, (q15_t)0x8881, - (q15_t)0xD24C, (q15_t)0x886F, (q15_t)0xD27B, (q15_t)0x885D, - (q15_t)0xD2AA, (q15_t)0x884B, (q15_t)0xD2D9, (q15_t)0x883A, - (q15_t)0xD308, (q15_t)0x8828, (q15_t)0xD337, (q15_t)0x8816, - (q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD396, (q15_t)0x87F3, - (q15_t)0xD3C5, (q15_t)0x87E2, (q15_t)0xD3F4, (q15_t)0x87D1, - (q15_t)0xD423, (q15_t)0x87BF, (q15_t)0xD452, (q15_t)0x87AE, - (q15_t)0xD482, (q15_t)0x879D, (q15_t)0xD4B1, (q15_t)0x878C, - (q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD510, (q15_t)0x876A, - (q15_t)0xD53F, (q15_t)0x8759, (q15_t)0xD56E, (q15_t)0x8749, - (q15_t)0xD59E, (q15_t)0x8738, (q15_t)0xD5CD, (q15_t)0x8727, - (q15_t)0xD5FD, (q15_t)0x8717, (q15_t)0xD62C, (q15_t)0x8706, - (q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD68B, (q15_t)0x86E6, - (q15_t)0xD6BB, (q15_t)0x86D5, (q15_t)0xD6EA, (q15_t)0x86C5, - (q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD74A, (q15_t)0x86A5, - (q15_t)0xD779, (q15_t)0x8695, (q15_t)0xD7A9, (q15_t)0x8685, - (q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD809, (q15_t)0x8666, - (q15_t)0xD838, (q15_t)0x8656, (q15_t)0xD868, (q15_t)0x8646, - (q15_t)0xD898, (q15_t)0x8637, (q15_t)0xD8C8, (q15_t)0x8627, - (q15_t)0xD8F8, (q15_t)0x8618, (q15_t)0xD927, (q15_t)0x8609, - (q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xD987, (q15_t)0x85EA, - (q15_t)0xD9B7, (q15_t)0x85DB, (q15_t)0xD9E7, (q15_t)0x85CC, - (q15_t)0xDA17, (q15_t)0x85BD, (q15_t)0xDA47, (q15_t)0x85AF, - (q15_t)0xDA77, (q15_t)0x85A0, (q15_t)0xDAA7, (q15_t)0x8591, - (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB08, (q15_t)0x8574, - (q15_t)0xDB38, (q15_t)0x8565, (q15_t)0xDB68, (q15_t)0x8557, - (q15_t)0xDB98, (q15_t)0x8549, (q15_t)0xDBC8, (q15_t)0x853A, - (q15_t)0xDBF8, (q15_t)0x852C, (q15_t)0xDC29, (q15_t)0x851E, - (q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDC89, (q15_t)0x8502, - (q15_t)0xDCBA, (q15_t)0x84F4, (q15_t)0xDCEA, (q15_t)0x84E6, - (q15_t)0xDD1A, (q15_t)0x84D9, (q15_t)0xDD4B, (q15_t)0x84CB, - (q15_t)0xDD7B, (q15_t)0x84BD, (q15_t)0xDDAB, (q15_t)0x84B0, - (q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE0C, (q15_t)0x8495, - (q15_t)0xDE3D, (q15_t)0x8488, (q15_t)0xDE6D, (q15_t)0x847B, - (q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDECE, (q15_t)0x8460, - (q15_t)0xDEFF, (q15_t)0x8453, (q15_t)0xDF2F, (q15_t)0x8446, - (q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xDF91, (q15_t)0x842D, - (q15_t)0xDFC1, (q15_t)0x8420, (q15_t)0xDFF2, (q15_t)0x8414, - (q15_t)0xE023, (q15_t)0x8407, (q15_t)0xE053, (q15_t)0x83FA, - (q15_t)0xE084, (q15_t)0x83EE, (q15_t)0xE0B5, (q15_t)0x83E2, - (q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE116, (q15_t)0x83C9, - (q15_t)0xE147, (q15_t)0x83BD, (q15_t)0xE178, (q15_t)0x83B1, - (q15_t)0xE1A9, (q15_t)0x83A5, (q15_t)0xE1DA, (q15_t)0x8399, - (q15_t)0xE20A, (q15_t)0x838E, (q15_t)0xE23B, (q15_t)0x8382, - (q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE29D, (q15_t)0x836B, - (q15_t)0xE2CE, (q15_t)0x835F, (q15_t)0xE2FF, (q15_t)0x8354, - (q15_t)0xE330, (q15_t)0x8348, (q15_t)0xE361, (q15_t)0x833D, - (q15_t)0xE392, (q15_t)0x8332, (q15_t)0xE3C3, (q15_t)0x8327, - (q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE425, (q15_t)0x8311, - (q15_t)0xE456, (q15_t)0x8306, (q15_t)0xE487, (q15_t)0x82FB, - (q15_t)0xE4B8, (q15_t)0x82F0, (q15_t)0xE4E9, (q15_t)0x82E6, - (q15_t)0xE51B, (q15_t)0x82DB, (q15_t)0xE54C, (q15_t)0x82D0, - (q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE5AE, (q15_t)0x82BC, - (q15_t)0xE5DF, (q15_t)0x82B1, (q15_t)0xE610, (q15_t)0x82A7, - (q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE673, (q15_t)0x8293, - (q15_t)0xE6A4, (q15_t)0x8289, (q15_t)0xE6D5, (q15_t)0x827F, - (q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE738, (q15_t)0x826B, - (q15_t)0xE769, (q15_t)0x8262, (q15_t)0xE79B, (q15_t)0x8258, - (q15_t)0xE7CC, (q15_t)0x824F, (q15_t)0xE7FD, (q15_t)0x8245, - (q15_t)0xE82F, (q15_t)0x823C, (q15_t)0xE860, (q15_t)0x8232, - (q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE8C3, (q15_t)0x8220, - (q15_t)0xE8F5, (q15_t)0x8217, (q15_t)0xE926, (q15_t)0x820E, - (q15_t)0xE957, (q15_t)0x8205, (q15_t)0xE989, (q15_t)0x81FC, - (q15_t)0xE9BA, (q15_t)0x81F3, (q15_t)0xE9EC, (q15_t)0x81EB, - (q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEA4F, (q15_t)0x81D9, - (q15_t)0xEA80, (q15_t)0x81D1, (q15_t)0xEAB2, (q15_t)0x81C8, - (q15_t)0xEAE4, (q15_t)0x81C0, (q15_t)0xEB15, (q15_t)0x81B8, - (q15_t)0xEB47, (q15_t)0x81B0, (q15_t)0xEB78, (q15_t)0x81A8, - (q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEBDC, (q15_t)0x8198, - (q15_t)0xEC0D, (q15_t)0x8190, (q15_t)0xEC3F, (q15_t)0x8188, - (q15_t)0xEC71, (q15_t)0x8180, (q15_t)0xECA2, (q15_t)0x8179, - (q15_t)0xECD4, (q15_t)0x8171, (q15_t)0xED06, (q15_t)0x816A, - (q15_t)0xED37, (q15_t)0x8162, (q15_t)0xED69, (q15_t)0x815B, - (q15_t)0xED9B, (q15_t)0x8154, (q15_t)0xEDCD, (q15_t)0x814C, - (q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEE30, (q15_t)0x813E, - (q15_t)0xEE62, (q15_t)0x8137, (q15_t)0xEE94, (q15_t)0x8130, - (q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEEF7, (q15_t)0x8123, - (q15_t)0xEF29, (q15_t)0x811C, (q15_t)0xEF5B, (q15_t)0x8116, - (q15_t)0xEF8D, (q15_t)0x810F, (q15_t)0xEFBF, (q15_t)0x8109, - (q15_t)0xEFF1, (q15_t)0x8102, (q15_t)0xF022, (q15_t)0x80FC, - (q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF086, (q15_t)0x80F0, - (q15_t)0xF0B8, (q15_t)0x80EA, (q15_t)0xF0EA, (q15_t)0x80E4, - (q15_t)0xF11C, (q15_t)0x80DE, (q15_t)0xF14E, (q15_t)0x80D8, - (q15_t)0xF180, (q15_t)0x80D2, (q15_t)0xF1B2, (q15_t)0x80CD, - (q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF216, (q15_t)0x80C2, - (q15_t)0xF248, (q15_t)0x80BC, (q15_t)0xF27A, (q15_t)0x80B7, - (q15_t)0xF2AC, (q15_t)0x80B2, (q15_t)0xF2DE, (q15_t)0x80AC, - (q15_t)0xF310, (q15_t)0x80A7, (q15_t)0xF342, (q15_t)0x80A2, - (q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF3A6, (q15_t)0x8098, - (q15_t)0xF3D8, (q15_t)0x8094, (q15_t)0xF40A, (q15_t)0x808F, - (q15_t)0xF43C, (q15_t)0x808A, (q15_t)0xF46E, (q15_t)0x8086, - (q15_t)0xF4A0, (q15_t)0x8081, (q15_t)0xF4D2, (q15_t)0x807D, - (q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF536, (q15_t)0x8074, - (q15_t)0xF568, (q15_t)0x8070, (q15_t)0xF59A, (q15_t)0x806C, - (q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF5FF, (q15_t)0x8064, - (q15_t)0xF631, (q15_t)0x8060, (q15_t)0xF663, (q15_t)0x805C, - (q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF6C7, (q15_t)0x8055, - (q15_t)0xF6F9, (q15_t)0x8051, (q15_t)0xF72B, (q15_t)0x804E, - (q15_t)0xF75D, (q15_t)0x804A, (q15_t)0xF790, (q15_t)0x8047, - (q15_t)0xF7C2, (q15_t)0x8043, (q15_t)0xF7F4, (q15_t)0x8040, - (q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF858, (q15_t)0x803A, - (q15_t)0xF88A, (q15_t)0x8037, (q15_t)0xF8BD, (q15_t)0x8034, - (q15_t)0xF8EF, (q15_t)0x8031, (q15_t)0xF921, (q15_t)0x802F, - (q15_t)0xF953, (q15_t)0x802C, (q15_t)0xF985, (q15_t)0x8029, - (q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xF9EA, (q15_t)0x8025, - (q15_t)0xFA1C, (q15_t)0x8022, (q15_t)0xFA4E, (q15_t)0x8020, - (q15_t)0xFA80, (q15_t)0x801E, (q15_t)0xFAB3, (q15_t)0x801C, - (q15_t)0xFAE5, (q15_t)0x801A, (q15_t)0xFB17, (q15_t)0x8018, - (q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFB7C, (q15_t)0x8014, - (q15_t)0xFBAE, (q15_t)0x8012, (q15_t)0xFBE0, (q15_t)0x8011, - (q15_t)0xFC12, (q15_t)0x800F, (q15_t)0xFC45, (q15_t)0x800D, - (q15_t)0xFC77, (q15_t)0x800C, (q15_t)0xFCA9, (q15_t)0x800B, - (q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFD0E, (q15_t)0x8008, - (q15_t)0xFD40, (q15_t)0x8007, (q15_t)0xFD72, (q15_t)0x8006, - (q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFDD7, (q15_t)0x8004, - (q15_t)0xFE09, (q15_t)0x8003, (q15_t)0xFE3B, (q15_t)0x8003, - (q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFEA0, (q15_t)0x8001, - (q15_t)0xFED2, (q15_t)0x8001, (q15_t)0xFF04, (q15_t)0x8000, - (q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF69, (q15_t)0x8000, - (q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFFCD, (q15_t)0x8000 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -/** - @} end of CFFT_CIFFT group -*/ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_16) - -const uint16_t armBitRevIndexTableF64_16[ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH] = -{ - /* radix 4, size 12 */ - 8,64, 16,32, 24,96, 40,80, 56,112, 88,104 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_32) -const uint16_t armBitRevIndexTableF64_32[ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH] = -{ - /* 4x2, size 24 */ - 8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144, - 88,208, 104,176, 120,240, 152,200, 184,232 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_64) -const uint16_t armBitRevIndexTableF64_64[ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH] = -{ - /* radix 4, size 56 */ - 8,256, 16,128, 24,384, 32,64, 40,320, 48,192, 56,448, 72,288, 80,160, 88,416, 104,352, - 112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432, - 232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_128) -const uint16_t armBitRevIndexTableF64_128[ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH] = -{ - /* 4x2, size 112 */ - 8,512, 16,256, 24,768, 32,128, 40,640, 48,384, 56,896, 72,576, 80,320, 88,832, 96,192, - 104,704, 112,448, 120,960, 136,544, 144,288, 152,800, 168,672, 176,416, 184,928, 200,608, - 208,352, 216,864, 232,736, 240,480, 248,992, 264,528, 280,784, 296,656, 304,400, 312,912, - 328,592, 344,848, 360,720, 368,464, 376,976, 392,560, 408,816, 424,688, 440,944, 456,624, - 472,880, 488,752, 504,1008, 536,776, 552,648, 568,904, 600,840, 616,712, 632,968, - 664,808, 696,936, 728,872, 760,1000, 824,920, 888,984 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_256) -const uint16_t armBitRevIndexTableF64_256[ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH] = -{ - /* radix 4, size 240 */ - 8,1024, 16,512, 24,1536, 32,256, 40,1280, 48,768, 56,1792, 64,128, 72,1152, 80,640, - 88,1664, 96,384, 104,1408, 112,896, 120,1920, 136,1088, 144,576, 152,1600, 160,320, - 168,1344, 176,832, 184,1856, 200,1216, 208,704, 216,1728, 224,448, 232,1472, 240,960, - 248,1984, 264,1056, 272,544, 280,1568, 296,1312, 304,800, 312,1824, 328,1184, 336,672, - 344,1696, 352,416, 360,1440, 368,928, 376,1952, 392,1120, 400,608, 408,1632, 424,1376, - 432,864, 440,1888, 456,1248, 464,736, 472,1760, 488,1504, 496,992, 504,2016, 520,1040, - 536,1552, 552,1296, 560,784, 568,1808, 584,1168, 592,656, 600,1680, 616,1424, 624,912, - 632,1936, 648,1104, 664,1616, 680,1360, 688,848, 696,1872, 712,1232, 728,1744, 744,1488, - 752,976, 760,2000, 776,1072, 792,1584, 808,1328, 824,1840, 840,1200, 856,1712, 872,1456, - 880,944, 888,1968, 904,1136, 920,1648, 936,1392, 952,1904, 968,1264, 984,1776, 1000,1520, - 1016,2032, 1048,1544, 1064,1288, 1080,1800, 1096,1160, 1112,1672, 1128,1416, 1144,1928, - 1176,1608, 1192,1352, 1208,1864, 1240,1736, 1256,1480, 1272,1992, 1304,1576, 1336,1832, - 1368,1704, 1384,1448, 1400,1960, 1432,1640, 1464,1896, 1496,1768, 1528,2024, 1592,1816, - 1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_512) -const uint16_t armBitRevIndexTableF64_512[ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH] = -{ - /* 4x2, size 480 */ - 8,2048, 16,1024, 24,3072, 32,512, 40,2560, 48,1536, 56,3584, 64,256, 72,2304, 80,1280, - 88,3328, 96,768, 104,2816, 112,1792, 120,3840, 136,2176, 144,1152, 152,3200, 160,640, - 168,2688, 176,1664, 184,3712, 192,384, 200,2432, 208,1408, 216,3456, 224,896, 232,2944, - 240,1920, 248,3968, 264,2112, 272,1088, 280,3136, 288,576, 296,2624, 304,1600, 312,3648, - 328,2368, 336,1344, 344,3392, 352,832, 360,2880, 368,1856, 376,3904, 392,2240, 400,1216, - 408,3264, 416,704, 424,2752, 432,1728, 440,3776, 456,2496, 464,1472, 472,3520, 480,960, - 488,3008, 496,1984, 504,4032, 520,2080, 528,1056, 536,3104, 552,2592, 560,1568, 568,3616, - 584,2336, 592,1312, 600,3360, 608,800, 616,2848, 624,1824, 632,3872, 648,2208, 656,1184, - 664,3232, 680,2720, 688,1696, 696,3744, 712,2464, 720,1440, 728,3488, 736,928, 744,2976, - 752,1952, 760,4000, 776,2144, 784,1120, 792,3168, 808,2656, 816,1632, 824,3680, 840,2400, - 848,1376, 856,3424, 872,2912, 880,1888, 888,3936, 904,2272, 912,1248, 920,3296, 936,2784, - 944,1760, 952,3808, 968,2528, 976,1504, 984,3552, 1000,3040, 1008,2016, 1016,4064, - 1032,2064, 1048,3088, 1064,2576, 1072,1552, 1080,3600, 1096,2320, 1104,1296, 1112,3344, - 1128,2832, 1136,1808, 1144,3856, 1160,2192, 1176,3216, 1192,2704, 1200,1680, 1208,3728, - 1224,2448, 1232,1424, 1240,3472, 1256,2960, 1264,1936, 1272,3984, 1288,2128, 1304,3152, - 1320,2640, 1328,1616, 1336,3664, 1352,2384, 1368,3408, 1384,2896, 1392,1872, 1400,3920, - 1416,2256, 1432,3280, 1448,2768, 1456,1744, 1464,3792, 1480,2512, 1496,3536, 1512,3024, - 1520,2000, 1528,4048, 1544,2096, 1560,3120, 1576,2608, 1592,3632, 1608,2352, 1624,3376, - 1640,2864, 1648,1840, 1656,3888, 1672,2224, 1688,3248, 1704,2736, 1720,3760, 1736,2480, - 1752,3504, 1768,2992, 1776,1968, 1784,4016, 1800,2160, 1816,3184, 1832,2672, 1848,3696, - 1864,2416, 1880,3440, 1896,2928, 1912,3952, 1928,2288, 1944,3312, 1960,2800, 1976,3824, - 1992,2544, 2008,3568, 2024,3056, 2040,4080, 2072,3080, 2088,2568, 2104,3592, 2120,2312, - 2136,3336, 2152,2824, 2168,3848, 2200,3208, 2216,2696, 2232,3720, 2248,2440, 2264,3464, - 2280,2952, 2296,3976, 2328,3144, 2344,2632, 2360,3656, 2392,3400, 2408,2888, 2424,3912, - 2456,3272, 2472,2760, 2488,3784, 2520,3528, 2536,3016, 2552,4040, 2584,3112, 2616,3624, - 2648,3368, 2664,2856, 2680,3880, 2712,3240, 2744,3752, 2776,3496, 2792,2984, 2808,4008, - 2840,3176, 2872,3688, 2904,3432, 2936,3944, 2968,3304, 3000,3816, 3032,3560, 3064,4072, - 3128,3608, 3160,3352, 3192,3864, 3256,3736, 3288,3480, 3320,3992, 3384,3672, 3448,3928, - 3512,3800, 3576,4056, 3704,3896, 3832,4024 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_1024) -const uint16_t armBitRevIndexTableF64_1024[ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH] = -{ - /* radix 4, size 992 */ - 8,4096, 16,2048, 24,6144, 32,1024, 40,5120, 48,3072, 56,7168, 64,512, 72,4608, - 80,2560, 88,6656, 96,1536, 104,5632, 112,3584, 120,7680, 128,256, 136,4352, - 144,2304, 152,6400, 160,1280, 168,5376, 176,3328, 184,7424, 192,768, 200,4864, - 208,2816, 216,6912, 224,1792, 232,5888, 240,3840, 248,7936, 264,4224, 272,2176, - 280,6272, 288,1152, 296,5248, 304,3200, 312,7296, 320,640, 328,4736, 336,2688, - 344,6784, 352,1664, 360,5760, 368,3712, 376,7808, 392,4480, 400,2432, 408,6528, - 416,1408, 424,5504, 432,3456, 440,7552, 448,896, 456,4992, 464,2944, 472,7040, - 480,1920, 488,6016, 496,3968, 504,8064, 520,4160, 528,2112, 536,6208, 544,1088, - 552,5184, 560,3136, 568,7232, 584,4672, 592,2624, 600,6720, 608,1600, 616,5696, - 624,3648, 632,7744, 648,4416, 656,2368, 664,6464, 672,1344, 680,5440, 688,3392, - 696,7488, 704,832, 712,4928, 720,2880, 728,6976, 736,1856, 744,5952, 752,3904, - 760,8000, 776,4288, 784,2240, 792,6336, 800,1216, 808,5312, 816,3264, 824,7360, - 840,4800, 848,2752, 856,6848, 864,1728, 872,5824, 880,3776, 888,7872, 904,4544, - 912,2496, 920,6592, 928,1472, 936,5568, 944,3520, 952,7616, 968,5056, 976,3008, - 984,7104, 992,1984, 1000,6080, 1008,4032, 1016,8128, 1032,4128, 1040,2080, - 1048,6176, 1064,5152, 1072,3104, 1080,7200, 1096,4640, 1104,2592, 1112,6688, - 1120,1568, 1128,5664, 1136,3616, 1144,7712, 1160,4384, 1168,2336, 1176,6432, - 1184,1312, 1192,5408, 1200,3360, 1208,7456, 1224,4896, 1232,2848, 1240,6944, - 1248,1824, 1256,5920, 1264,3872, 1272,7968, 1288,4256, 1296,2208, 1304,6304, - 1320,5280, 1328,3232, 1336,7328, 1352,4768, 1360,2720, 1368,6816, 1376,1696, - 1384,5792, 1392,3744, 1400,7840, 1416,4512, 1424,2464, 1432,6560, 1448,5536, - 1456,3488, 1464,7584, 1480,5024, 1488,2976, 1496,7072, 1504,1952, 1512,6048, - 1520,4000, 1528,8096, 1544,4192, 1552,2144, 1560,6240, 1576,5216, 1584,3168, - 1592,7264, 1608,4704, 1616,2656, 1624,6752, 1640,5728, 1648,3680, 1656,7776, - 1672,4448, 1680,2400, 1688,6496, 1704,5472, 1712,3424, 1720,7520, 1736,4960, - 1744,2912, 1752,7008, 1760,1888, 1768,5984, 1776,3936, 1784,8032, 1800,4320, - 1808,2272, 1816,6368, 1832,5344, 1840,3296, 1848,7392, 1864,4832, 1872,2784, - 1880,6880, 1896,5856, 1904,3808, 1912,7904, 1928,4576, 1936,2528, 1944,6624, - 1960,5600, 1968,3552, 1976,7648, 1992,5088, 2000,3040, 2008,7136, 2024,6112, - 2032,4064, 2040,8160, 2056,4112, 2072,6160, 2088,5136, 2096,3088, 2104,7184, - 2120,4624, 2128,2576, 2136,6672, 2152,5648, 2160,3600, 2168,7696, 2184,4368, - 2192,2320, 2200,6416, 2216,5392, 2224,3344, 2232,7440, 2248,4880, 2256,2832, - 2264,6928, 2280,5904, 2288,3856, 2296,7952, 2312,4240, 2328,6288, 2344,5264, - 2352,3216, 2360,7312, 2376,4752, 2384,2704, 2392,6800, 2408,5776, 2416,3728, - 2424,7824, 2440,4496, 2456,6544, 2472,5520, 2480,3472, 2488,7568, 2504,5008, - 2512,2960, 2520,7056, 2536,6032, 2544,3984, 2552,8080, 2568,4176, 2584,6224, - 2600,5200, 2608,3152, 2616,7248, 2632,4688, 2648,6736, 2664,5712, 2672,3664, - 2680,7760, 2696,4432, 2712,6480, 2728,5456, 2736,3408, 2744,7504, 2760,4944, - 2768,2896, 2776,6992, 2792,5968, 2800,3920, 2808,8016, 2824,4304, 2840,6352, - 2856,5328, 2864,3280, 2872,7376, 2888,4816, 2904,6864, 2920,5840, 2928,3792, - 2936,7888, 2952,4560, 2968,6608, 2984,5584, 2992,3536, 3000,7632, 3016,5072, - 3032,7120, 3048,6096, 3056,4048, 3064,8144, 3080,4144, 3096,6192, 3112,5168, - 3128,7216, 3144,4656, 3160,6704, 3176,5680, 3184,3632, 3192,7728, 3208,4400, - 3224,6448, 3240,5424, 3248,3376, 3256,7472, 3272,4912, 3288,6960, 3304,5936, - 3312,3888, 3320,7984, 3336,4272, 3352,6320, 3368,5296, 3384,7344, 3400,4784, - 3416,6832, 3432,5808, 3440,3760, 3448,7856, 3464,4528, 3480,6576, 3496,5552, - 3512,7600, 3528,5040, 3544,7088, 3560,6064, 3568,4016, 3576,8112, 3592,4208, - 3608,6256, 3624,5232, 3640,7280, 3656,4720, 3672,6768, 3688,5744, 3704,7792, - 3720,4464, 3736,6512, 3752,5488, 3768,7536, 3784,4976, 3800,7024, 3816,6000, - 3824,3952, 3832,8048, 3848,4336, 3864,6384, 3880,5360, 3896,7408, 3912,4848, - 3928,6896, 3944,5872, 3960,7920, 3976,4592, 3992,6640, 4008,5616, 4024,7664, - 4040,5104, 4056,7152, 4072,6128, 4088,8176, 4120,6152, 4136,5128, 4152,7176, - 4168,4616, 4184,6664, 4200,5640, 4216,7688, 4232,4360, 4248,6408, 4264,5384, - 4280,7432, 4296,4872, 4312,6920, 4328,5896, 4344,7944, 4376,6280, 4392,5256, - 4408,7304, 4424,4744, 4440,6792, 4456,5768, 4472,7816, 4504,6536, 4520,5512, - 4536,7560, 4552,5000, 4568,7048, 4584,6024, 4600,8072, 4632,6216, 4648,5192, - 4664,7240, 4696,6728, 4712,5704, 4728,7752, 4760,6472, 4776,5448, 4792,7496, - 4808,4936, 4824,6984, 4840,5960, 4856,8008, 4888,6344, 4904,5320, 4920,7368, - 4952,6856, 4968,5832, 4984,7880, 5016,6600, 5032,5576, 5048,7624, 5080,7112, - 5096,6088, 5112,8136, 5144,6184, 5176,7208, 5208,6696, 5224,5672, 5240,7720, - 5272,6440, 5288,5416, 5304,7464, 5336,6952, 5352,5928, 5368,7976, 5400,6312, - 5432,7336, 5464,6824, 5480,5800, 5496,7848, 5528,6568, 5560,7592, 5592,7080, - 5608,6056, 5624,8104, 5656,6248, 5688,7272, 5720,6760, 5752,7784, 5784,6504, - 5816,7528, 5848,7016, 5864,5992, 5880,8040, 5912,6376, 5944,7400, 5976,6888, - 6008,7912, 6040,6632, 6072,7656, 6104,7144, 6136,8168, 6200,7192, 6232,6680, - 6264,7704, 6296,6424, 6328,7448, 6360,6936, 6392,7960, 6456,7320, 6488,6808, - 6520,7832, 6584,7576, 6616,7064, 6648,8088, 6712,7256, 6776,7768, 6840,7512, - 6872,7000, 6904,8024, 6968,7384, 7032,7896, 7096,7640, 7160,8152, 7288,7736, - 7352,7480, 7416,7992, 7544,7864, 7672,8120, 7928,8056 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_2048) -const uint16_t armBitRevIndexTableF64_2048[ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH] = -{ - /* 4x2, size 1984 */ - 8,8192, 16,4096, 24,12288, 32,2048, 40,10240, 48,6144, 56,14336, 64,1024, - 72,9216, 80,5120, 88,13312, 96,3072, 104,11264, 112,7168, 120,15360, 128,512, - 136,8704, 144,4608, 152,12800, 160,2560, 168,10752, 176,6656, 184,14848, - 192,1536, 200,9728, 208,5632, 216,13824, 224,3584, 232,11776, 240,7680, - 248,15872, 264,8448, 272,4352, 280,12544, 288,2304, 296,10496, 304,6400, - 312,14592, 320,1280, 328,9472, 336,5376, 344,13568, 352,3328, 360,11520, - 368,7424, 376,15616, 384,768, 392,8960, 400,4864, 408,13056, 416,2816, - 424,11008, 432,6912, 440,15104, 448,1792, 456,9984, 464,5888, 472,14080, - 480,3840, 488,12032, 496,7936, 504,16128, 520,8320, 528,4224, 536,12416, - 544,2176, 552,10368, 560,6272, 568,14464, 576,1152, 584,9344, 592,5248, - 600,13440, 608,3200, 616,11392, 624,7296, 632,15488, 648,8832, 656,4736, - 664,12928, 672,2688, 680,10880, 688,6784, 696,14976, 704,1664, 712,9856, - 720,5760, 728,13952, 736,3712, 744,11904, 752,7808, 760,16000, 776,8576, - 784,4480, 792,12672, 800,2432, 808,10624, 816,6528, 824,14720, 832,1408, - 840,9600, 848,5504, 856,13696, 864,3456, 872,11648, 880,7552, 888,15744, - 904,9088, 912,4992, 920,13184, 928,2944, 936,11136, 944,7040, 952,15232, - 960,1920, 968,10112, 976,6016, 984,14208, 992,3968, 1000,12160, 1008,8064, - 1016,16256, 1032,8256, 1040,4160, 1048,12352, 1056,2112, 1064,10304, 1072,6208, - 1080,14400, 1096,9280, 1104,5184, 1112,13376, 1120,3136, 1128,11328, 1136,7232, - 1144,15424, 1160,8768, 1168,4672, 1176,12864, 1184,2624, 1192,10816, 1200,6720, - 1208,14912, 1216,1600, 1224,9792, 1232,5696, 1240,13888, 1248,3648, 1256,11840, - 1264,7744, 1272,15936, 1288,8512, 1296,4416, 1304,12608, 1312,2368, 1320,10560, - 1328,6464, 1336,14656, 1352,9536, 1360,5440, 1368,13632, 1376,3392, 1384,11584, - 1392,7488, 1400,15680, 1416,9024, 1424,4928, 1432,13120, 1440,2880, 1448,11072, - 1456,6976, 1464,15168, 1472,1856, 1480,10048, 1488,5952, 1496,14144, 1504,3904, - 1512,12096, 1520,8000, 1528,16192, 1544,8384, 1552,4288, 1560,12480, 1568,2240, - 1576,10432, 1584,6336, 1592,14528, 1608,9408, 1616,5312, 1624,13504, 1632,3264, - 1640,11456, 1648,7360, 1656,15552, 1672,8896, 1680,4800, 1688,12992, 1696,2752, - 1704,10944, 1712,6848, 1720,15040, 1736,9920, 1744,5824, 1752,14016, 1760,3776, - 1768,11968, 1776,7872, 1784,16064, 1800,8640, 1808,4544, 1816,12736, 1824,2496, - 1832,10688, 1840,6592, 1848,14784, 1864,9664, 1872,5568, 1880,13760, 1888,3520, - 1896,11712, 1904,7616, 1912,15808, 1928,9152, 1936,5056, 1944,13248, 1952,3008, - 1960,11200, 1968,7104, 1976,15296, 1992,10176, 2000,6080, 2008,14272, 2016,4032, - 2024,12224, 2032,8128, 2040,16320, 2056,8224, 2064,4128, 2072,12320, 2088,10272, - 2096,6176, 2104,14368, 2120,9248, 2128,5152, 2136,13344, 2144,3104, 2152,11296, - 2160,7200, 2168,15392, 2184,8736, 2192,4640, 2200,12832, 2208,2592, 2216,10784, - 2224,6688, 2232,14880, 2248,9760, 2256,5664, 2264,13856, 2272,3616, 2280,11808, - 2288,7712, 2296,15904, 2312,8480, 2320,4384, 2328,12576, 2344,10528, 2352,6432, - 2360,14624, 2376,9504, 2384,5408, 2392,13600, 2400,3360, 2408,11552, 2416,7456, - 2424,15648, 2440,8992, 2448,4896, 2456,13088, 2464,2848, 2472,11040, 2480,6944, - 2488,15136, 2504,10016, 2512,5920, 2520,14112, 2528,3872, 2536,12064, 2544,7968, - 2552,16160, 2568,8352, 2576,4256, 2584,12448, 2600,10400, 2608,6304, 2616,14496, - 2632,9376, 2640,5280, 2648,13472, 2656,3232, 2664,11424, 2672,7328, 2680,15520, - 2696,8864, 2704,4768, 2712,12960, 2728,10912, 2736,6816, 2744,15008, 2760,9888, - 2768,5792, 2776,13984, 2784,3744, 2792,11936, 2800,7840, 2808,16032, 2824,8608, - 2832,4512, 2840,12704, 2856,10656, 2864,6560, 2872,14752, 2888,9632, 2896,5536, - 2904,13728, 2912,3488, 2920,11680, 2928,7584, 2936,15776, 2952,9120, 2960,5024, - 2968,13216, 2984,11168, 2992,7072, 3000,15264, 3016,10144, 3024,6048, - 3032,14240, 3040,4000, 3048,12192, 3056,8096, 3064,16288, 3080,8288, 3088,4192, - 3096,12384, 3112,10336, 3120,6240, 3128,14432, 3144,9312, 3152,5216, 3160,13408, - 3176,11360, 3184,7264, 3192,15456, 3208,8800, 3216,4704, 3224,12896, 3240,10848, - 3248,6752, 3256,14944, 3272,9824, 3280,5728, 3288,13920, 3296,3680, 3304,11872, - 3312,7776, 3320,15968, 3336,8544, 3344,4448, 3352,12640, 3368,10592, 3376,6496, - 3384,14688, 3400,9568, 3408,5472, 3416,13664, 3432,11616, 3440,7520, 3448,15712, - 3464,9056, 3472,4960, 3480,13152, 3496,11104, 3504,7008, 3512,15200, 3528,10080, - 3536,5984, 3544,14176, 3552,3936, 3560,12128, 3568,8032, 3576,16224, 3592,8416, - 3600,4320, 3608,12512, 3624,10464, 3632,6368, 3640,14560, 3656,9440, 3664,5344, - 3672,13536, 3688,11488, 3696,7392, 3704,15584, 3720,8928, 3728,4832, 3736,13024, - 3752,10976, 3760,6880, 3768,15072, 3784,9952, 3792,5856, 3800,14048, 3816,12000, - 3824,7904, 3832,16096, 3848,8672, 3856,4576, 3864,12768, 3880,10720, 3888,6624, - 3896,14816, 3912,9696, 3920,5600, 3928,13792, 3944,11744, 3952,7648, 3960,15840, - 3976,9184, 3984,5088, 3992,13280, 4008,11232, 4016,7136, 4024,15328, 4040,10208, - 4048,6112, 4056,14304, 4072,12256, 4080,8160, 4088,16352, 4104,8208, 4120,12304, - 4136,10256, 4144,6160, 4152,14352, 4168,9232, 4176,5136, 4184,13328, 4200,11280, - 4208,7184, 4216,15376, 4232,8720, 4240,4624, 4248,12816, 4264,10768, 4272,6672, - 4280,14864, 4296,9744, 4304,5648, 4312,13840, 4328,11792, 4336,7696, 4344,15888, - 4360,8464, 4376,12560, 4392,10512, 4400,6416, 4408,14608, 4424,9488, 4432,5392, - 4440,13584, 4456,11536, 4464,7440, 4472,15632, 4488,8976, 4496,4880, 4504,13072, - 4520,11024, 4528,6928, 4536,15120, 4552,10000, 4560,5904, 4568,14096, - 4584,12048, 4592,7952, 4600,16144, 4616,8336, 4632,12432, 4648,10384, 4656,6288, - 4664,14480, 4680,9360, 4688,5264, 4696,13456, 4712,11408, 4720,7312, 4728,15504, - 4744,8848, 4760,12944, 4776,10896, 4784,6800, 4792,14992, 4808,9872, 4816,5776, - 4824,13968, 4840,11920, 4848,7824, 4856,16016, 4872,8592, 4888,12688, - 4904,10640, 4912,6544, 4920,14736, 4936,9616, 4944,5520, 4952,13712, 4968,11664, - 4976,7568, 4984,15760, 5000,9104, 5016,13200, 5032,11152, 5040,7056, 5048,15248, - 5064,10128, 5072,6032, 5080,14224, 5096,12176, 5104,8080, 5112,16272, 5128,8272, - 5144,12368, 5160,10320, 5168,6224, 5176,14416, 5192,9296, 5208,13392, - 5224,11344, 5232,7248, 5240,15440, 5256,8784, 5272,12880, 5288,10832, 5296,6736, - 5304,14928, 5320,9808, 5328,5712, 5336,13904, 5352,11856, 5360,7760, 5368,15952, - 5384,8528, 5400,12624, 5416,10576, 5424,6480, 5432,14672, 5448,9552, 5464,13648, - 5480,11600, 5488,7504, 5496,15696, 5512,9040, 5528,13136, 5544,11088, 5552,6992, - 5560,15184, 5576,10064, 5584,5968, 5592,14160, 5608,12112, 5616,8016, - 5624,16208, 5640,8400, 5656,12496, 5672,10448, 5680,6352, 5688,14544, 5704,9424, - 5720,13520, 5736,11472, 5744,7376, 5752,15568, 5768,8912, 5784,13008, - 5800,10960, 5808,6864, 5816,15056, 5832,9936, 5848,14032, 5864,11984, 5872,7888, - 5880,16080, 5896,8656, 5912,12752, 5928,10704, 5936,6608, 5944,14800, 5960,9680, - 5976,13776, 5992,11728, 6000,7632, 6008,15824, 6024,9168, 6040,13264, - 6056,11216, 6064,7120, 6072,15312, 6088,10192, 6104,14288, 6120,12240, - 6128,8144, 6136,16336, 6152,8240, 6168,12336, 6184,10288, 6200,14384, 6216,9264, - 6232,13360, 6248,11312, 6256,7216, 6264,15408, 6280,8752, 6296,12848, - 6312,10800, 6320,6704, 6328,14896, 6344,9776, 6360,13872, 6376,11824, 6384,7728, - 6392,15920, 6408,8496, 6424,12592, 6440,10544, 6456,14640, 6472,9520, - 6488,13616, 6504,11568, 6512,7472, 6520,15664, 6536,9008, 6552,13104, - 6568,11056, 6576,6960, 6584,15152, 6600,10032, 6616,14128, 6632,12080, - 6640,7984, 6648,16176, 6664,8368, 6680,12464, 6696,10416, 6712,14512, 6728,9392, - 6744,13488, 6760,11440, 6768,7344, 6776,15536, 6792,8880, 6808,12976, - 6824,10928, 6840,15024, 6856,9904, 6872,14000, 6888,11952, 6896,7856, - 6904,16048, 6920,8624, 6936,12720, 6952,10672, 6968,14768, 6984,9648, - 7000,13744, 7016,11696, 7024,7600, 7032,15792, 7048,9136, 7064,13232, - 7080,11184, 7096,15280, 7112,10160, 7128,14256, 7144,12208, 7152,8112, - 7160,16304, 7176,8304, 7192,12400, 7208,10352, 7224,14448, 7240,9328, - 7256,13424, 7272,11376, 7288,15472, 7304,8816, 7320,12912, 7336,10864, - 7352,14960, 7368,9840, 7384,13936, 7400,11888, 7408,7792, 7416,15984, 7432,8560, - 7448,12656, 7464,10608, 7480,14704, 7496,9584, 7512,13680, 7528,11632, - 7544,15728, 7560,9072, 7576,13168, 7592,11120, 7608,15216, 7624,10096, - 7640,14192, 7656,12144, 7664,8048, 7672,16240, 7688,8432, 7704,12528, - 7720,10480, 7736,14576, 7752,9456, 7768,13552, 7784,11504, 7800,15600, - 7816,8944, 7832,13040, 7848,10992, 7864,15088, 7880,9968, 7896,14064, - 7912,12016, 7928,16112, 7944,8688, 7960,12784, 7976,10736, 7992,14832, - 8008,9712, 8024,13808, 8040,11760, 8056,15856, 8072,9200, 8088,13296, - 8104,11248, 8120,15344, 8136,10224, 8152,14320, 8168,12272, 8184,16368, - 8216,12296, 8232,10248, 8248,14344, 8264,9224, 8280,13320, 8296,11272, - 8312,15368, 8328,8712, 8344,12808, 8360,10760, 8376,14856, 8392,9736, - 8408,13832, 8424,11784, 8440,15880, 8472,12552, 8488,10504, 8504,14600, - 8520,9480, 8536,13576, 8552,11528, 8568,15624, 8584,8968, 8600,13064, - 8616,11016, 8632,15112, 8648,9992, 8664,14088, 8680,12040, 8696,16136, - 8728,12424, 8744,10376, 8760,14472, 8776,9352, 8792,13448, 8808,11400, - 8824,15496, 8856,12936, 8872,10888, 8888,14984, 8904,9864, 8920,13960, - 8936,11912, 8952,16008, 8984,12680, 9000,10632, 9016,14728, 9032,9608, - 9048,13704, 9064,11656, 9080,15752, 9112,13192, 9128,11144, 9144,15240, - 9160,10120, 9176,14216, 9192,12168, 9208,16264, 9240,12360, 9256,10312, - 9272,14408, 9304,13384, 9320,11336, 9336,15432, 9368,12872, 9384,10824, - 9400,14920, 9416,9800, 9432,13896, 9448,11848, 9464,15944, 9496,12616, - 9512,10568, 9528,14664, 9560,13640, 9576,11592, 9592,15688, 9624,13128, - 9640,11080, 9656,15176, 9672,10056, 9688,14152, 9704,12104, 9720,16200, - 9752,12488, 9768,10440, 9784,14536, 9816,13512, 9832,11464, 9848,15560, - 9880,13000, 9896,10952, 9912,15048, 9944,14024, 9960,11976, 9976,16072, - 10008,12744, 10024,10696, 10040,14792, 10072,13768, 10088,11720, 10104,15816, - 10136,13256, 10152,11208, 10168,15304, 10200,14280, 10216,12232, 10232,16328, - 10264,12328, 10296,14376, 10328,13352, 10344,11304, 10360,15400, 10392,12840, - 10408,10792, 10424,14888, 10456,13864, 10472,11816, 10488,15912, 10520,12584, - 10552,14632, 10584,13608, 10600,11560, 10616,15656, 10648,13096, 10664,11048, - 10680,15144, 10712,14120, 10728,12072, 10744,16168, 10776,12456, 10808,14504, - 10840,13480, 10856,11432, 10872,15528, 10904,12968, 10936,15016, 10968,13992, - 10984,11944, 11000,16040, 11032,12712, 11064,14760, 11096,13736, 11112,11688, - 11128,15784, 11160,13224, 11192,15272, 11224,14248, 11240,12200, 11256,16296, - 11288,12392, 11320,14440, 11352,13416, 11384,15464, 11416,12904, 11448,14952, - 11480,13928, 11496,11880, 11512,15976, 11544,12648, 11576,14696, 11608,13672, - 11640,15720, 11672,13160, 11704,15208, 11736,14184, 11752,12136, 11768,16232, - 11800,12520, 11832,14568, 11864,13544, 11896,15592, 11928,13032, 11960,15080, - 11992,14056, 12024,16104, 12056,12776, 12088,14824, 12120,13800, 12152,15848, - 12184,13288, 12216,15336, 12248,14312, 12280,16360, 12344,14360, 12376,13336, - 12408,15384, 12440,12824, 12472,14872, 12504,13848, 12536,15896, 12600,14616, - 12632,13592, 12664,15640, 12696,13080, 12728,15128, 12760,14104, 12792,16152, - 12856,14488, 12888,13464, 12920,15512, 12984,15000, 13016,13976, 13048,16024, - 13112,14744, 13144,13720, 13176,15768, 13240,15256, 13272,14232, 13304,16280, - 13368,14424, 13432,15448, 13496,14936, 13528,13912, 13560,15960, 13624,14680, - 13688,15704, 13752,15192, 13784,14168, 13816,16216, 13880,14552, 13944,15576, - 14008,15064, 14072,16088, 14136,14808, 14200,15832, 14264,15320, 14328,16344, - 14456,15416, 14520,14904, 14584,15928, 14712,15672, 14776,15160, 14840,16184, - 14968,15544, 15096,16056, 15224,15800, 15352,16312, 15608,15992, 15864,16248 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_4096) -const uint16_t armBitRevIndexTableF64_4096[ARMBITREVINDEXTABLEF64_4096_TABLE_LENGTH] = -{ - /* radix 4, size 4032 */ - 8,16384, 16,8192, 24,24576, 32,4096, 40,20480, 48,12288, 56,28672, 64,2048, - 72,18432, 80,10240, 88,26624, 96,6144, 104,22528, 112,14336, 120,30720, - 128,1024, 136,17408, 144,9216, 152,25600, 160,5120, 168,21504, 176,13312, - 184,29696, 192,3072, 200,19456, 208,11264, 216,27648, 224,7168, 232,23552, - 240,15360, 248,31744, 256,512, 264,16896, 272,8704, 280,25088, 288,4608, - 296,20992, 304,12800, 312,29184, 320,2560, 328,18944, 336,10752, 344,27136, - 352,6656, 360,23040, 368,14848, 376,31232, 384,1536, 392,17920, 400,9728, - 408,26112, 416,5632, 424,22016, 432,13824, 440,30208, 448,3584, 456,19968, - 464,11776, 472,28160, 480,7680, 488,24064, 496,15872, 504,32256, 520,16640, - 528,8448, 536,24832, 544,4352, 552,20736, 560,12544, 568,28928, 576,2304, - 584,18688, 592,10496, 600,26880, 608,6400, 616,22784, 624,14592, 632,30976, - 640,1280, 648,17664, 656,9472, 664,25856, 672,5376, 680,21760, 688,13568, - 696,29952, 704,3328, 712,19712, 720,11520, 728,27904, 736,7424, 744,23808, - 752,15616, 760,32000, 776,17152, 784,8960, 792,25344, 800,4864, 808,21248, - 816,13056, 824,29440, 832,2816, 840,19200, 848,11008, 856,27392, 864,6912, - 872,23296, 880,15104, 888,31488, 896,1792, 904,18176, 912,9984, 920,26368, - 928,5888, 936,22272, 944,14080, 952,30464, 960,3840, 968,20224, 976,12032, - 984,28416, 992,7936, 1000,24320, 1008,16128, 1016,32512, 1032,16512, 1040,8320, - 1048,24704, 1056,4224, 1064,20608, 1072,12416, 1080,28800, 1088,2176, - 1096,18560, 1104,10368, 1112,26752, 1120,6272, 1128,22656, 1136,14464, - 1144,30848, 1160,17536, 1168,9344, 1176,25728, 1184,5248, 1192,21632, - 1200,13440, 1208,29824, 1216,3200, 1224,19584, 1232,11392, 1240,27776, - 1248,7296, 1256,23680, 1264,15488, 1272,31872, 1288,17024, 1296,8832, - 1304,25216, 1312,4736, 1320,21120, 1328,12928, 1336,29312, 1344,2688, - 1352,19072, 1360,10880, 1368,27264, 1376,6784, 1384,23168, 1392,14976, - 1400,31360, 1408,1664, 1416,18048, 1424,9856, 1432,26240, 1440,5760, 1448,22144, - 1456,13952, 1464,30336, 1472,3712, 1480,20096, 1488,11904, 1496,28288, - 1504,7808, 1512,24192, 1520,16000, 1528,32384, 1544,16768, 1552,8576, - 1560,24960, 1568,4480, 1576,20864, 1584,12672, 1592,29056, 1600,2432, - 1608,18816, 1616,10624, 1624,27008, 1632,6528, 1640,22912, 1648,14720, - 1656,31104, 1672,17792, 1680,9600, 1688,25984, 1696,5504, 1704,21888, - 1712,13696, 1720,30080, 1728,3456, 1736,19840, 1744,11648, 1752,28032, - 1760,7552, 1768,23936, 1776,15744, 1784,32128, 1800,17280, 1808,9088, - 1816,25472, 1824,4992, 1832,21376, 1840,13184, 1848,29568, 1856,2944, - 1864,19328, 1872,11136, 1880,27520, 1888,7040, 1896,23424, 1904,15232, - 1912,31616, 1928,18304, 1936,10112, 1944,26496, 1952,6016, 1960,22400, - 1968,14208, 1976,30592, 1984,3968, 1992,20352, 2000,12160, 2008,28544, - 2016,8064, 2024,24448, 2032,16256, 2040,32640, 2056,16448, 2064,8256, - 2072,24640, 2080,4160, 2088,20544, 2096,12352, 2104,28736, 2120,18496, - 2128,10304, 2136,26688, 2144,6208, 2152,22592, 2160,14400, 2168,30784, - 2184,17472, 2192,9280, 2200,25664, 2208,5184, 2216,21568, 2224,13376, - 2232,29760, 2240,3136, 2248,19520, 2256,11328, 2264,27712, 2272,7232, - 2280,23616, 2288,15424, 2296,31808, 2312,16960, 2320,8768, 2328,25152, - 2336,4672, 2344,21056, 2352,12864, 2360,29248, 2368,2624, 2376,19008, - 2384,10816, 2392,27200, 2400,6720, 2408,23104, 2416,14912, 2424,31296, - 2440,17984, 2448,9792, 2456,26176, 2464,5696, 2472,22080, 2480,13888, - 2488,30272, 2496,3648, 2504,20032, 2512,11840, 2520,28224, 2528,7744, - 2536,24128, 2544,15936, 2552,32320, 2568,16704, 2576,8512, 2584,24896, - 2592,4416, 2600,20800, 2608,12608, 2616,28992, 2632,18752, 2640,10560, - 2648,26944, 2656,6464, 2664,22848, 2672,14656, 2680,31040, 2696,17728, - 2704,9536, 2712,25920, 2720,5440, 2728,21824, 2736,13632, 2744,30016, 2752,3392, - 2760,19776, 2768,11584, 2776,27968, 2784,7488, 2792,23872, 2800,15680, - 2808,32064, 2824,17216, 2832,9024, 2840,25408, 2848,4928, 2856,21312, - 2864,13120, 2872,29504, 2888,19264, 2896,11072, 2904,27456, 2912,6976, - 2920,23360, 2928,15168, 2936,31552, 2952,18240, 2960,10048, 2968,26432, - 2976,5952, 2984,22336, 2992,14144, 3000,30528, 3008,3904, 3016,20288, - 3024,12096, 3032,28480, 3040,8000, 3048,24384, 3056,16192, 3064,32576, - 3080,16576, 3088,8384, 3096,24768, 3104,4288, 3112,20672, 3120,12480, - 3128,28864, 3144,18624, 3152,10432, 3160,26816, 3168,6336, 3176,22720, - 3184,14528, 3192,30912, 3208,17600, 3216,9408, 3224,25792, 3232,5312, - 3240,21696, 3248,13504, 3256,29888, 3272,19648, 3280,11456, 3288,27840, - 3296,7360, 3304,23744, 3312,15552, 3320,31936, 3336,17088, 3344,8896, - 3352,25280, 3360,4800, 3368,21184, 3376,12992, 3384,29376, 3400,19136, - 3408,10944, 3416,27328, 3424,6848, 3432,23232, 3440,15040, 3448,31424, - 3464,18112, 3472,9920, 3480,26304, 3488,5824, 3496,22208, 3504,14016, - 3512,30400, 3520,3776, 3528,20160, 3536,11968, 3544,28352, 3552,7872, - 3560,24256, 3568,16064, 3576,32448, 3592,16832, 3600,8640, 3608,25024, - 3616,4544, 3624,20928, 3632,12736, 3640,29120, 3656,18880, 3664,10688, - 3672,27072, 3680,6592, 3688,22976, 3696,14784, 3704,31168, 3720,17856, - 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14744,26224, 14760,22128, 14776,30320, 14792,20080, 14808,28272, 14824,24176, - 14832,15984, 14840,32368, 14856,16752, 14872,24944, 14888,20848, 14904,29040, - 14920,18800, 14936,26992, 14952,22896, 14968,31088, 14984,17776, 15000,25968, - 15016,21872, 15032,30064, 15048,19824, 15064,28016, 15080,23920, 15088,15728, - 15096,32112, 15112,17264, 15128,25456, 15144,21360, 15160,29552, 15176,19312, - 15192,27504, 15208,23408, 15224,31600, 15240,18288, 15256,26480, 15272,22384, - 15288,30576, 15304,20336, 15320,28528, 15336,24432, 15344,16240, 15352,32624, - 15368,16624, 15384,24816, 15400,20720, 15416,28912, 15432,18672, 15448,26864, - 15464,22768, 15480,30960, 15496,17648, 15512,25840, 15528,21744, 15544,29936, - 15560,19696, 15576,27888, 15592,23792, 15608,31984, 15624,17136, 15640,25328, - 15656,21232, 15672,29424, 15688,19184, 15704,27376, 15720,23280, 15736,31472, - 15752,18160, 15768,26352, 15784,22256, 15800,30448, 15816,20208, 15832,28400, - 15848,24304, 15856,16112, 15864,32496, 15880,16880, 15896,25072, 15912,20976, - 15928,29168, 15944,18928, 15960,27120, 15976,23024, 15992,31216, 16008,17904, - 16024,26096, 16040,22000, 16056,30192, 16072,19952, 16088,28144, 16104,24048, - 16120,32240, 16136,17392, 16152,25584, 16168,21488, 16184,29680, 16200,19440, - 16216,27632, 16232,23536, 16248,31728, 16264,18416, 16280,26608, 16296,22512, - 16312,30704, 16328,20464, 16344,28656, 16360,24560, 16376,32752, 16408,24584, - 16424,20488, 16440,28680, 16456,18440, 16472,26632, 16488,22536, 16504,30728, - 16520,17416, 16536,25608, 16552,21512, 16568,29704, 16584,19464, 16600,27656, - 16616,23560, 16632,31752, 16648,16904, 16664,25096, 16680,21000, 16696,29192, - 16712,18952, 16728,27144, 16744,23048, 16760,31240, 16776,17928, 16792,26120, - 16808,22024, 16824,30216, 16840,19976, 16856,28168, 16872,24072, 16888,32264, - 16920,24840, 16936,20744, 16952,28936, 16968,18696, 16984,26888, 17000,22792, - 17016,30984, 17032,17672, 17048,25864, 17064,21768, 17080,29960, 17096,19720, - 17112,27912, 17128,23816, 17144,32008, 17176,25352, 17192,21256, 17208,29448, - 17224,19208, 17240,27400, 17256,23304, 17272,31496, 17288,18184, 17304,26376, - 17320,22280, 17336,30472, 17352,20232, 17368,28424, 17384,24328, 17400,32520, - 17432,24712, 17448,20616, 17464,28808, 17480,18568, 17496,26760, 17512,22664, - 17528,30856, 17560,25736, 17576,21640, 17592,29832, 17608,19592, 17624,27784, - 17640,23688, 17656,31880, 17688,25224, 17704,21128, 17720,29320, 17736,19080, - 17752,27272, 17768,23176, 17784,31368, 17800,18056, 17816,26248, 17832,22152, - 17848,30344, 17864,20104, 17880,28296, 17896,24200, 17912,32392, 17944,24968, - 17960,20872, 17976,29064, 17992,18824, 18008,27016, 18024,22920, 18040,31112, - 18072,25992, 18088,21896, 18104,30088, 18120,19848, 18136,28040, 18152,23944, - 18168,32136, 18200,25480, 18216,21384, 18232,29576, 18248,19336, 18264,27528, - 18280,23432, 18296,31624, 18328,26504, 18344,22408, 18360,30600, 18376,20360, - 18392,28552, 18408,24456, 18424,32648, 18456,24648, 18472,20552, 18488,28744, - 18520,26696, 18536,22600, 18552,30792, 18584,25672, 18600,21576, 18616,29768, - 18632,19528, 18648,27720, 18664,23624, 18680,31816, 18712,25160, 18728,21064, - 18744,29256, 18760,19016, 18776,27208, 18792,23112, 18808,31304, 18840,26184, - 18856,22088, 18872,30280, 18888,20040, 18904,28232, 18920,24136, 18936,32328, - 18968,24904, 18984,20808, 19000,29000, 19032,26952, 19048,22856, 19064,31048, - 19096,25928, 19112,21832, 19128,30024, 19144,19784, 19160,27976, 19176,23880, - 19192,32072, 19224,25416, 19240,21320, 19256,29512, 19288,27464, 19304,23368, - 19320,31560, 19352,26440, 19368,22344, 19384,30536, 19400,20296, 19416,28488, - 19432,24392, 19448,32584, 19480,24776, 19496,20680, 19512,28872, 19544,26824, - 19560,22728, 19576,30920, 19608,25800, 19624,21704, 19640,29896, 19672,27848, - 19688,23752, 19704,31944, 19736,25288, 19752,21192, 19768,29384, 19800,27336, - 19816,23240, 19832,31432, 19864,26312, 19880,22216, 19896,30408, 19912,20168, - 19928,28360, 19944,24264, 19960,32456, 19992,25032, 20008,20936, 20024,29128, - 20056,27080, 20072,22984, 20088,31176, 20120,26056, 20136,21960, 20152,30152, - 20184,28104, 20200,24008, 20216,32200, 20248,25544, 20264,21448, 20280,29640, - 20312,27592, 20328,23496, 20344,31688, 20376,26568, 20392,22472, 20408,30664, - 20440,28616, 20456,24520, 20472,32712, 20504,24616, 20536,28712, 20568,26664, - 20584,22568, 20600,30760, 20632,25640, 20648,21544, 20664,29736, 20696,27688, - 20712,23592, 20728,31784, 20760,25128, 20776,21032, 20792,29224, 20824,27176, - 20840,23080, 20856,31272, 20888,26152, 20904,22056, 20920,30248, 20952,28200, - 20968,24104, 20984,32296, 21016,24872, 21048,28968, 21080,26920, 21096,22824, - 21112,31016, 21144,25896, 21160,21800, 21176,29992, 21208,27944, 21224,23848, - 21240,32040, 21272,25384, 21304,29480, 21336,27432, 21352,23336, 21368,31528, - 21400,26408, 21416,22312, 21432,30504, 21464,28456, 21480,24360, 21496,32552, - 21528,24744, 21560,28840, 21592,26792, 21608,22696, 21624,30888, 21656,25768, - 21688,29864, 21720,27816, 21736,23720, 21752,31912, 21784,25256, 21816,29352, - 21848,27304, 21864,23208, 21880,31400, 21912,26280, 21928,22184, 21944,30376, - 21976,28328, 21992,24232, 22008,32424, 22040,25000, 22072,29096, 22104,27048, - 22120,22952, 22136,31144, 22168,26024, 22200,30120, 22232,28072, 22248,23976, - 22264,32168, 22296,25512, 22328,29608, 22360,27560, 22376,23464, 22392,31656, - 22424,26536, 22456,30632, 22488,28584, 22504,24488, 22520,32680, 22552,24680, - 22584,28776, 22616,26728, 22648,30824, 22680,25704, 22712,29800, 22744,27752, - 22760,23656, 22776,31848, 22808,25192, 22840,29288, 22872,27240, 22888,23144, - 22904,31336, 22936,26216, 22968,30312, 23000,28264, 23016,24168, 23032,32360, - 23064,24936, 23096,29032, 23128,26984, 23160,31080, 23192,25960, 23224,30056, - 23256,28008, 23272,23912, 23288,32104, 23320,25448, 23352,29544, 23384,27496, - 23416,31592, 23448,26472, 23480,30568, 23512,28520, 23528,24424, 23544,32616, - 23576,24808, 23608,28904, 23640,26856, 23672,30952, 23704,25832, 23736,29928, - 23768,27880, 23800,31976, 23832,25320, 23864,29416, 23896,27368, 23928,31464, - 23960,26344, 23992,30440, 24024,28392, 24040,24296, 24056,32488, 24088,25064, - 24120,29160, 24152,27112, 24184,31208, 24216,26088, 24248,30184, 24280,28136, - 24312,32232, 24344,25576, 24376,29672, 24408,27624, 24440,31720, 24472,26600, - 24504,30696, 24536,28648, 24568,32744, 24632,28696, 24664,26648, 24696,30744, - 24728,25624, 24760,29720, 24792,27672, 24824,31768, 24856,25112, 24888,29208, - 24920,27160, 24952,31256, 24984,26136, 25016,30232, 25048,28184, 25080,32280, - 25144,28952, 25176,26904, 25208,31000, 25240,25880, 25272,29976, 25304,27928, - 25336,32024, 25400,29464, 25432,27416, 25464,31512, 25496,26392, 25528,30488, - 25560,28440, 25592,32536, 25656,28824, 25688,26776, 25720,30872, 25784,29848, - 25816,27800, 25848,31896, 25912,29336, 25944,27288, 25976,31384, 26008,26264, - 26040,30360, 26072,28312, 26104,32408, 26168,29080, 26200,27032, 26232,31128, - 26296,30104, 26328,28056, 26360,32152, 26424,29592, 26456,27544, 26488,31640, - 26552,30616, 26584,28568, 26616,32664, 26680,28760, 26744,30808, 26808,29784, - 26840,27736, 26872,31832, 26936,29272, 26968,27224, 27000,31320, 27064,30296, - 27096,28248, 27128,32344, 27192,29016, 27256,31064, 27320,30040, 27352,27992, - 27384,32088, 27448,29528, 27512,31576, 27576,30552, 27608,28504, 27640,32600, - 27704,28888, 27768,30936, 27832,29912, 27896,31960, 27960,29400, 28024,31448, - 28088,30424, 28120,28376, 28152,32472, 28216,29144, 28280,31192, 28344,30168, - 28408,32216, 28472,29656, 28536,31704, 28600,30680, 28664,32728, 28792,30776, - 28856,29752, 28920,31800, 28984,29240, 29048,31288, 29112,30264, 29176,32312, - 29304,31032, 29368,30008, 29432,32056, 29560,31544, 29624,30520, 29688,32568, - 29816,30904, 29944,31928, 30072,31416, 30136,30392, 30200,32440, 30328,31160, - 30456,32184, 30584,31672, 30712,32696, 30968,31864, 31096,31352, 31224,32376, - 31480,32120, 31736,32632, 32248,32504 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16) - -const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH] = -{ - /* 8x2, size 20 */ - 8,64, 24,72, 16,64, 40,80, 32,64, 56,88, 48,72, 88,104, 72,96, 104,112 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32) - -const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH] = -{ - /* 8x4, size 48 */ - 8,64, 16,128, 24,192, 32,64, 40,72, 48,136, 56,200, 64,128, 72,80, 88,208, - 80,144, 96,192, 104,208, 112,152, 120,216, 136,192, 144,160, 168,208, - 152,224, 176,208, 184,232, 216,240, 200,224, 232,240 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64) - -const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH] = -{ - /* radix 8, size 56 */ - 8,64, 16,128, 24,192, 32,256, 40,320, 48,384, 56,448, 80,136, 88,200, - 96,264, 104,328, 112,392, 120,456, 152,208, 160,272, 168,336, 176,400, - 184,464, 224,280, 232,344, 240,408, 248,472, 296,352, 304,416, 312,480, - 368,424, 376,488, 440,496 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128) - -const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] = -{ - /* 8x2, size 208 */ - 8,512, 16,64, 24,576, 32,128, 40,640, 48,192, 56,704, 64,256, 72,768, - 80,320, 88,832, 96,384, 104,896, 112,448, 120,960, 128,512, 136,520, - 144,768, 152,584, 160,520, 168,648, 176,200, 184,712, 192,264, 200,776, - 208,328, 216,840, 224,392, 232,904, 240,456, 248,968, 264,528, 272,320, - 280,592, 288,768, 296,656, 304,328, 312,720, 328,784, 344,848, 352,400, - 360,912, 368,464, 376,976, 384,576, 392,536, 400,832, 408,600, 416,584, - 424,664, 432,840, 440,728, 448,592, 456,792, 464,848, 472,856, 480,600, - 488,920, 496,856, 504,984, 520,544, 528,576, 536,608, 552,672, 560,608, - 568,736, 576,768, 584,800, 592,832, 600,864, 608,800, 616,928, 624,864, - 632,992, 648,672, 656,896, 664,928, 688,904, 696,744, 704,896, 712,808, - 720,912, 728,872, 736,928, 744,936, 752,920, 760,1000, 776,800, 784,832, - 792,864, 808,904, 816,864, 824,920, 840,864, 856,880, 872,944, 888,1008, - 904,928, 912,960, 920,992, 944,968, 952,1000, 968,992, 984,1008 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256) - -const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] = -{ - /* 8x4, size 440 */ - 8,512, 16,1024, 24,1536, 32,64, 40,576, 48,1088, 56,1600, 64,128, 72,640, - 80,1152, 88,1664, 96,192, 104,704, 112,1216, 120,1728, 128,256, 136,768, - 144,1280, 152,1792, 160,320, 168,832, 176,1344, 184,1856, 192,384, - 200,896, 208,1408, 216,1920, 224,448, 232,960, 240,1472, 248,1984, - 256,512, 264,520, 272,1032, 280,1544, 288,640, 296,584, 304,1096, 312,1608, - 320,768, 328,648, 336,1160, 344,1672, 352,896, 360,712, 368,1224, 376,1736, - 384,520, 392,776, 400,1288, 408,1800, 416,648, 424,840, 432,1352, 440,1864, - 448,776, 456,904, 464,1416, 472,1928, 480,904, 488,968, 496,1480, 504,1992, - 520,528, 512,1024, 528,1040, 536,1552, 544,1152, 552,592, 560,1104, - 568,1616, 576,1280, 584,656, 592,1168, 600,1680, 608,1408, 616,720, - 624,1232, 632,1744, 640,1032, 648,784, 656,1296, 664,1808, 672,1160, - 680,848, 688,1360, 696,1872, 704,1288, 712,912, 720,1424, 728,1936, - 736,1416, 744,976, 752,1488, 760,2000, 768,1536, 776,1552, 784,1048, - 792,1560, 800,1664, 808,1680, 816,1112, 824,1624, 832,1792, 840,1808, - 848,1176, 856,1688, 864,1920, 872,1936, 880,1240, 888,1752, 896,1544, - 904,1560, 912,1304, 920,1816, 928,1672, 936,1688, 944,1368, 952,1880, - 960,1800, 968,1816, 976,1432, 984,1944, 992,1928, 1000,1944, 1008,1496, - 1016,2008, 1032,1152, 1040,1056, 1048,1568, 1064,1408, 1072,1120, - 1080,1632, 1088,1536, 1096,1160, 1104,1184, 1112,1696, 1120,1552, - 1128,1416, 1136,1248, 1144,1760, 1160,1664, 1168,1312, 1176,1824, - 1184,1544, 1192,1920, 1200,1376, 1208,1888, 1216,1568, 1224,1672, - 1232,1440, 1240,1952, 1248,1560, 1256,1928, 1264,1504, 1272,2016, - 1288,1312, 1296,1408, 1304,1576, 1320,1424, 1328,1416, 1336,1640, - 1344,1792, 1352,1824, 1360,1920, 1368,1704, 1376,1800, 1384,1432, - 1392,1928, 1400,1768, 1416,1680, 1432,1832, 1440,1576, 1448,1936, - 1456,1832, 1464,1896, 1472,1808, 1480,1688, 1488,1936, 1496,1960, - 1504,1816, 1512,1944, 1520,1944, 1528,2024, 1560,1584, 1592,1648, - 1600,1792, 1608,1920, 1616,1800, 1624,1712, 1632,1808, 1640,1936, - 1648,1816, 1656,1776, 1672,1696, 1688,1840, 1704,1952, 1712,1928, - 1720,1904, 1728,1824, 1736,1952, 1744,1832, 1752,1968, 1760,1840, - 1768,1960, 1776,1944, 1784,2032, 1864,1872, 1848,1944, 1872,1888, - 1880,1904, 1888,1984, 1896,2000, 1912,2032, 1904,2016, 1976,2032, - 1960,1968, 2008,2032, 1992,2016, 2024,2032 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512) - -const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] = -{ - /* radix 8, size 448 */ - 8,512, 16,1024, 24,1536, 32,2048, 40,2560, 48,3072, 56,3584, 72,576, - 80,1088, 88,1600, 96,2112, 104,2624, 112,3136, 120,3648, 136,640, 144,1152, - 152,1664, 160,2176, 168,2688, 176,3200, 184,3712, 200,704, 208,1216, - 216,1728, 224,2240, 232,2752, 240,3264, 248,3776, 264,768, 272,1280, - 280,1792, 288,2304, 296,2816, 304,3328, 312,3840, 328,832, 336,1344, - 344,1856, 352,2368, 360,2880, 368,3392, 376,3904, 392,896, 400,1408, - 408,1920, 416,2432, 424,2944, 432,3456, 440,3968, 456,960, 464,1472, - 472,1984, 480,2496, 488,3008, 496,3520, 504,4032, 528,1032, 536,1544, - 544,2056, 552,2568, 560,3080, 568,3592, 592,1096, 600,1608, 608,2120, - 616,2632, 624,3144, 632,3656, 656,1160, 664,1672, 672,2184, 680,2696, - 688,3208, 696,3720, 720,1224, 728,1736, 736,2248, 744,2760, 752,3272, - 760,3784, 784,1288, 792,1800, 800,2312, 808,2824, 816,3336, 824,3848, - 848,1352, 856,1864, 864,2376, 872,2888, 880,3400, 888,3912, 912,1416, - 920,1928, 928,2440, 936,2952, 944,3464, 952,3976, 976,1480, 984,1992, - 992,2504, 1000,3016, 1008,3528, 1016,4040, 1048,1552, 1056,2064, 1064,2576, - 1072,3088, 1080,3600, 1112,1616, 1120,2128, 1128,2640, 1136,3152, - 1144,3664, 1176,1680, 1184,2192, 1192,2704, 1200,3216, 1208,3728, - 1240,1744, 1248,2256, 1256,2768, 1264,3280, 1272,3792, 1304,1808, - 1312,2320, 1320,2832, 1328,3344, 1336,3856, 1368,1872, 1376,2384, - 1384,2896, 1392,3408, 1400,3920, 1432,1936, 1440,2448, 1448,2960, - 1456,3472, 1464,3984, 1496,2000, 1504,2512, 1512,3024, 1520,3536, - 1528,4048, 1568,2072, 1576,2584, 1584,3096, 1592,3608, 1632,2136, - 1640,2648, 1648,3160, 1656,3672, 1696,2200, 1704,2712, 1712,3224, - 1720,3736, 1760,2264, 1768,2776, 1776,3288, 1784,3800, 1824,2328, - 1832,2840, 1840,3352, 1848,3864, 1888,2392, 1896,2904, 1904,3416, - 1912,3928, 1952,2456, 1960,2968, 1968,3480, 1976,3992, 2016,2520, - 2024,3032, 2032,3544, 2040,4056, 2088,2592, 2096,3104, 2104,3616, - 2152,2656, 2160,3168, 2168,3680, 2216,2720, 2224,3232, 2232,3744, - 2280,2784, 2288,3296, 2296,3808, 2344,2848, 2352,3360, 2360,3872, - 2408,2912, 2416,3424, 2424,3936, 2472,2976, 2480,3488, 2488,4000, - 2536,3040, 2544,3552, 2552,4064, 2608,3112, 2616,3624, 2672,3176, - 2680,3688, 2736,3240, 2744,3752, 2800,3304, 2808,3816, 2864,3368, - 2872,3880, 2928,3432, 2936,3944, 2992,3496, 3000,4008, 3056,3560, - 3064,4072, 3128,3632, 3192,3696, 3256,3760, 3320,3824, 3384,3888, - 3448,3952, 3512,4016, 3576,4080 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024) - -const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH] = -{ - /* 8x2, size 1800 */ - 8,4096, 16,512, 24,4608, 32,1024, 40,5120, 48,1536, 56,5632, 64,2048, - 72,6144, 80,2560, 88,6656, 96,3072, 104,7168, 112,3584, 120,7680, 128,2048, - 136,4160, 144,576, 152,4672, 160,1088, 168,5184, 176,1600, 184,5696, - 192,2112, 200,6208, 208,2624, 216,6720, 224,3136, 232,7232, 240,3648, - 248,7744, 256,2048, 264,4224, 272,640, 280,4736, 288,1152, 296,5248, - 304,1664, 312,5760, 320,2176, 328,6272, 336,2688, 344,6784, 352,3200, - 360,7296, 368,3712, 376,7808, 384,2112, 392,4288, 400,704, 408,4800, - 416,1216, 424,5312, 432,1728, 440,5824, 448,2240, 456,6336, 464,2752, - 472,6848, 480,3264, 488,7360, 496,3776, 504,7872, 512,2048, 520,4352, - 528,768, 536,4864, 544,1280, 552,5376, 560,1792, 568,5888, 576,2304, - 584,6400, 592,2816, 600,6912, 608,3328, 616,7424, 624,3840, 632,7936, - 640,2176, 648,4416, 656,832, 664,4928, 672,1344, 680,5440, 688,1856, - 696,5952, 704,2368, 712,6464, 720,2880, 728,6976, 736,3392, 744,7488, - 752,3904, 760,8000, 768,2112, 776,4480, 784,896, 792,4992, 800,1408, - 808,5504, 816,1920, 824,6016, 832,2432, 840,6528, 848,2944, 856,7040, - 864,3456, 872,7552, 880,3968, 888,8064, 896,2240, 904,4544, 912,960, - 920,5056, 928,1472, 936,5568, 944,1984, 952,6080, 960,2496, 968,6592, - 976,3008, 984,7104, 992,3520, 1000,7616, 1008,4032, 1016,8128, 1024,4096, - 1032,4104, 1040,4352, 1048,4616, 1056,4104, 1064,5128, 1072,1544, - 1080,5640, 1088,2056, 1096,6152, 1104,2568, 1112,6664, 1120,3080, - 1128,7176, 1136,3592, 1144,7688, 1152,6144, 1160,4168, 1168,6400, - 1176,4680, 1184,6152, 1192,5192, 1200,1608, 1208,5704, 1216,2120, - 1224,6216, 1232,2632, 1240,6728, 1248,3144, 1256,7240, 1264,3656, - 1272,7752, 1280,4160, 1288,4232, 1296,4416, 1304,4744, 1312,4168, - 1320,5256, 1328,1672, 1336,5768, 1344,2184, 1352,6280, 1360,2696, - 1368,6792, 1376,3208, 1384,7304, 1392,3720, 1400,7816, 1408,6208, - 1416,4296, 1424,6464, 1432,4808, 1440,6216, 1448,5320, 1456,1736, - 1464,5832, 1472,2248, 1480,6344, 1488,2760, 1496,6856, 1504,3272, - 1512,7368, 1520,3784, 1528,7880, 1536,4224, 1544,4360, 1552,4480, - 1560,4872, 1568,4232, 1576,5384, 1584,1800, 1592,5896, 1600,2312, - 1608,6408, 1616,2824, 1624,6920, 1632,3336, 1640,7432, 1648,3848, - 1656,7944, 1664,6272, 1672,4424, 1680,6528, 1688,4936, 1696,6280, - 1704,5448, 1712,1864, 1720,5960, 1728,2376, 1736,6472, 1744,2888, - 1752,6984, 1760,3400, 1768,7496, 1776,3912, 1784,8008, 1792,4288, - 1800,4488, 1808,4544, 1816,5000, 1824,4296, 1832,5512, 1840,1928, - 1848,6024, 1856,2440, 1864,6536, 1872,2952, 1880,7048, 1888,3464, - 1896,7560, 1904,3976, 1912,8072, 1920,6336, 1928,4552, 1936,6592, - 1944,5064, 1952,6344, 1960,5576, 1968,1992, 1976,6088, 1984,2504, - 1992,6600, 2000,3016, 2008,7112, 2016,3528, 2024,7624, 2032,4040, - 2040,8136, 2056,4112, 2064,2112, 2072,4624, 2080,4352, 2088,5136, - 2096,4480, 2104,5648, 2120,6160, 2128,2576, 2136,6672, 2144,3088, - 2152,7184, 2160,3600, 2168,7696, 2176,2560, 2184,4176, 2192,2816, - 2200,4688, 2208,2568, 2216,5200, 2224,2824, 2232,5712, 2240,2576, - 2248,6224, 2256,2640, 2264,6736, 2272,3152, 2280,7248, 2288,3664, - 2296,7760, 2312,4240, 2320,2432, 2328,4752, 2336,6400, 2344,5264, - 2352,6528, 2360,5776, 2368,2816, 2376,6288, 2384,2704, 2392,6800, - 2400,3216, 2408,7312, 2416,3728, 2424,7824, 2432,2624, 2440,4304, - 2448,2880, 2456,4816, 2464,2632, 2472,5328, 2480,2888, 2488,5840, - 2496,2640, 2504,6352, 2512,2768, 2520,6864, 2528,3280, 2536,7376, - 2544,3792, 2552,7888, 2568,4368, 2584,4880, 2592,4416, 2600,5392, - 2608,4544, 2616,5904, 2632,6416, 2640,2832, 2648,6928, 2656,3344, - 2664,7440, 2672,3856, 2680,7952, 2696,4432, 2704,2944, 2712,4944, - 2720,4432, 2728,5456, 2736,2952, 2744,5968, 2752,2944, 2760,6480, - 2768,2896, 2776,6992, 2784,3408, 2792,7504, 2800,3920, 2808,8016, - 2824,4496, 2840,5008, 2848,6464, 2856,5520, 2864,6592, 2872,6032, - 2888,6544, 2896,2960, 2904,7056, 2912,3472, 2920,7568, 2928,3984, - 2936,8080, 2952,4560, 2960,3008, 2968,5072, 2976,6480, 2984,5584, - 2992,3016, 3000,6096, 3016,6608, 3032,7120, 3040,3536, 3048,7632, - 3056,4048, 3064,8144, 3072,4608, 3080,4120, 3088,4864, 3096,4632, - 3104,4616, 3112,5144, 3120,4872, 3128,5656, 3136,4624, 3144,6168, - 3152,4880, 3160,6680, 3168,4632, 3176,7192, 3184,3608, 3192,7704, - 3200,6656, 3208,4184, 3216,6912, 3224,4696, 3232,6664, 3240,5208, - 3248,6920, 3256,5720, 3264,6672, 3272,6232, 3280,6928, 3288,6744, - 3296,6680, 3304,7256, 3312,3672, 3320,7768, 3328,4672, 3336,4248, - 3344,4928, 3352,4760, 3360,4680, 3368,5272, 3376,4936, 3384,5784, - 3392,4688, 3400,6296, 3408,4944, 3416,6808, 3424,4696, 3432,7320, - 3440,3736, 3448,7832, 3456,6720, 3464,4312, 3472,6976, 3480,4824, - 3488,6728, 3496,5336, 3504,6984, 3512,5848, 3520,6736, 3528,6360, - 3536,6992, 3544,6872, 3552,6744, 3560,7384, 3568,3800, 3576,7896, - 3584,4736, 3592,4376, 3600,4992, 3608,4888, 3616,4744, 3624,5400, - 3632,5000, 3640,5912, 3648,4752, 3656,6424, 3664,5008, 3672,6936, - 3680,4760, 3688,7448, 3696,3864, 3704,7960, 3712,6784, 3720,4440, - 3728,7040, 3736,4952, 3744,6792, 3752,5464, 3760,7048, 3768,5976, - 3776,6800, 3784,6488, 3792,7056, 3800,7000, 3808,6808, 3816,7512, - 3824,3928, 3832,8024, 3840,4800, 3848,4504, 3856,5056, 3864,5016, - 3872,4808, 3880,5528, 3888,5064, 3896,6040, 3904,4816, 3912,6552, - 3920,5072, 3928,7064, 3936,4824, 3944,7576, 3952,3992, 3960,8088, - 3968,6848, 3976,4568, 3984,7104, 3992,5080, 4000,6856, 4008,5592, - 4016,7112, 4024,6104, 4032,6864, 4040,6616, 4048,7120, 4056,7128, - 4064,6872, 4072,7640, 4080,7128, 4088,8152, 4104,4128, 4112,4160, - 4120,4640, 4136,5152, 4144,4232, 4152,5664, 4160,4352, 4168,6176, - 4176,4416, 4184,6688, 4192,4616, 4200,7200, 4208,4744, 4216,7712, - 4224,4608, 4232,4616, 4240,4672, 4248,4704, 4256,4640, 4264,5216, - 4272,4704, 4280,5728, 4288,4864, 4296,6240, 4304,4928, 4312,6752, - 4320,4632, 4328,7264, 4336,4760, 4344,7776, 4360,4640, 4368,4416, - 4376,4768, 4384,6152, 4392,5280, 4400,6280, 4408,5792, 4424,6304, - 4440,6816, 4448,6664, 4456,7328, 4464,6792, 4472,7840, 4480,4624, - 4488,4632, 4496,4688, 4504,4832, 4512,6168, 4520,5344, 4528,6296, - 4536,5856, 4544,4880, 4552,6368, 4560,4944, 4568,6880, 4576,6680, - 4584,7392, 4592,6808, 4600,7904, 4608,6144, 4616,6152, 4624,6208, - 4632,4896, 4640,6176, 4648,5408, 4656,6240, 4664,5920, 4672,6400, - 4680,6432, 4688,6464, 4696,6944, 4704,6432, 4712,7456, 4720,4808, - 4728,7968, 4736,6656, 4744,6664, 4752,6720, 4760,4960, 4768,6688, - 4776,5472, 4784,6752, 4792,5984, 4800,6912, 4808,6496, 4816,6976, - 4824,7008, 4832,6944, 4840,7520, 4848,7008, 4856,8032, 4864,6160, - 4872,6168, 4880,6224, 4888,5024, 4896,6216, 4904,5536, 4912,6344, - 4920,6048, 4928,6416, 4936,6560, 4944,6480, 4952,7072, 4960,6728, - 4968,7584, 4976,6856, 4984,8096, 4992,6672, 5000,6680, 5008,6736, - 5016,5088, 5024,6232, 5032,5600, 5040,6360, 5048,6112, 5056,6928, - 5064,6624, 5072,6992, 5080,7136, 5088,6744, 5096,7648, 5104,6872, - 5112,8160, 5128,5152, 5136,5376, 5144,5408, 5168,5384, 5176,5672, - 5184,5376, 5192,6184, 5200,5392, 5208,6696, 5216,5408, 5224,7208, - 5232,5400, 5240,7720, 5248,7168, 5256,7200, 5264,7424, 5272,7456, - 5280,7176, 5288,7208, 5296,7432, 5304,5736, 5312,7184, 5320,6248, - 5328,7440, 5336,6760, 5344,7192, 5352,7272, 5360,7448, 5368,7784, - 5384,5408, 5392,5440, 5400,5472, 5408,6184, 5416,7208, 5424,5448, - 5432,5800, 5448,6312, 5464,6824, 5472,6696, 5480,7336, 5488,6824, - 5496,7848, 5504,7232, 5512,7264, 5520,7488, 5528,7520, 5536,7240, - 5544,7272, 5552,7496, 5560,5864, 5568,7248, 5576,6376, 5584,7504, - 5592,6888, 5600,7256, 5608,7400, 5616,7512, 5624,7912, 5632,7168, - 5640,7176, 5648,7232, 5656,7240, 5664,7200, 5672,7208, 5680,7264, - 5688,5928, 5696,7424, 5704,6440, 5712,7488, 5720,6952, 5728,7456, - 5736,7464, 5744,7520, 5752,7976, 5760,7296, 5768,7328, 5776,7552, - 5784,7584, 5792,7304, 5800,7336, 5808,7560, 5816,5992, 5824,7312, - 5832,6504, 5840,7568, 5848,7016, 5856,7320, 5864,7528, 5872,7576, - 5880,8040, 5888,7184, 5896,7192, 5904,7248, 5912,7256, 5920,6248, - 5928,7272, 5936,6376, 5944,6056, 5952,7440, 5960,6568, 5968,7504, - 5976,7080, 5984,6760, 5992,7592, 6000,6888, 6008,8104, 6016,7360, - 6024,7392, 6032,7616, 6040,7648, 6048,7368, 6056,7400, 6064,7624, - 6072,6120, 6080,7376, 6088,6632, 6096,7632, 6104,7144, 6112,7384, - 6120,7656, 6128,7640, 6136,8168, 6168,6240, 6192,6216, 6200,7264, - 6232,6704, 6248,7216, 6256,6680, 6264,7728, 6272,6656, 6280,6664, - 6288,6912, 6296,6496, 6304,6688, 6312,6696, 6320,6944, 6328,7520, - 6336,6672, 6344,6680, 6352,6928, 6360,6768, 6368,6704, 6376,7280, - 6384,6744, 6392,7792, 6408,6432, 6424,6752, 6440,7432, 6448,6536, - 6456,7560, 6472,6944, 6488,6832, 6496,6920, 6504,7344, 6512,7048, - 6520,7856, 6528,6720, 6536,6728, 6544,6976, 6552,7008, 6560,6752, - 6568,7448, 6576,7008, 6584,7576, 6592,6736, 6600,6744, 6608,6992, - 6616,6896, 6624,6936, 6632,7408, 6640,7064, 6648,7920, 6712,7280, - 6744,6960, 6760,7472, 6768,6936, 6776,7984, 6800,6848, 6808,6856, - 6832,6880, 6840,6888, 6848,7040, 6856,7048, 6864,7104, 6872,7024, - 6880,7072, 6888,7536, 6896,7136, 6904,8048, 6952,7496, 6968,7624, - 6984,7008, 7000,7088, 7016,7600, 7024,7112, 7032,8112, 7056,7104, - 7064,7112, 7080,7512, 7088,7136, 7096,7640, 7128,7152, 7144,7664, - 7160,8176, 7176,7200, 7192,7216, 7224,7272, 7240,7264, 7256,7280, - 7288,7736, 7296,7680, 7304,7712, 7312,7936, 7320,7968, 7328,7688, - 7336,7720, 7344,7944, 7352,7976, 7360,7696, 7368,7728, 7376,7952, - 7384,7984, 7392,7704, 7400,7736, 7408,7960, 7416,7800, 7432,7456, - 7448,7472, 7480,7592, 7496,7520, 7512,7536, 7528,7976, 7544,7864, - 7552,7744, 7560,7776, 7568,8000, 7576,8032, 7584,7752, 7592,7784, - 7600,8008, 7608,8040, 7616,7760, 7624,7792, 7632,8016, 7640,8048, - 7648,7768, 7656,7800, 7664,8024, 7672,7928, 7688,7712, 7704,7728, - 7752,7776, 7768,7792, 7800,7992, 7816,7840, 7824,8064, 7832,8096, - 7856,8072, 7864,8104, 7872,8064, 7880,8072, 7888,8080, 7896,8112, - 7904,8096, 7912,8104, 7920,8088, 7928,8056, 7944,7968, 7960,7984, - 8008,8032, 8024,8048, 8056,8120, 8072,8096, 8080,8128, 8088,8160, - 8112,8136, 8120,8168, 8136,8160, 8152,8176 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048) - -const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH] = -{ - /* 8x2, size 3808 */ - 8,4096, 16,8192, 24,12288, 32,512, 40,4608, 48,8704, 56,12800, 64,1024, - 72,5120, 80,9216, 88,13312, 96,1536, 104,5632, 112,9728, 120,13824, - 128,2048, 136,6144, 144,10240, 152,14336, 160,2560, 168,6656, 176,10752, - 184,14848, 192,3072, 200,7168, 208,11264, 216,15360, 224,3584, 232,7680, - 240,11776, 248,15872, 256,1024, 264,4160, 272,8256, 280,12352, 288,576, - 296,4672, 304,8768, 312,12864, 320,1088, 328,5184, 336,9280, 344,13376, - 352,1600, 360,5696, 368,9792, 376,13888, 384,2112, 392,6208, 400,10304, - 408,14400, 416,2624, 424,6720, 432,10816, 440,14912, 448,3136, 456,7232, - 464,11328, 472,15424, 480,3648, 488,7744, 496,11840, 504,15936, 512,2048, - 520,4224, 528,8320, 536,12416, 544,640, 552,4736, 560,8832, 568,12928, - 576,1152, 584,5248, 592,9344, 600,13440, 608,1664, 616,5760, 624,9856, - 632,13952, 640,2176, 648,6272, 656,10368, 664,14464, 672,2688, 680,6784, - 688,10880, 696,14976, 704,3200, 712,7296, 720,11392, 728,15488, 736,3712, - 744,7808, 752,11904, 760,16000, 768,3072, 776,4288, 784,8384, 792,12480, - 800,3200, 808,4800, 816,8896, 824,12992, 832,1216, 840,5312, 848,9408, - 856,13504, 864,1728, 872,5824, 880,9920, 888,14016, 896,2240, 904,6336, - 912,10432, 920,14528, 928,2752, 936,6848, 944,10944, 952,15040, 960,3264, - 968,7360, 976,11456, 984,15552, 992,3776, 1000,7872, 1008,11968, 1016,16064, - 1032,4352, 1040,8448, 1048,12544, 1056,3072, 1064,4864, 1072,8960, - 1080,13056, 1088,1280, 1096,5376, 1104,9472, 1112,13568, 1120,1792, - 1128,5888, 1136,9984, 1144,14080, 1152,2304, 1160,6400, 1168,10496, - 1176,14592, 1184,2816, 1192,6912, 1200,11008, 1208,15104, 1216,3328, - 1224,7424, 1232,11520, 1240,15616, 1248,3840, 1256,7936, 1264,12032, - 1272,16128, 1288,4416, 1296,8512, 1304,12608, 1312,3328, 1320,4928, - 1328,9024, 1336,13120, 1352,5440, 1360,9536, 1368,13632, 1376,1856, - 1384,5952, 1392,10048, 1400,14144, 1408,2368, 1416,6464, 1424,10560, - 1432,14656, 1440,2880, 1448,6976, 1456,11072, 1464,15168, 1472,3392, - 1480,7488, 1488,11584, 1496,15680, 1504,3904, 1512,8000, 1520,12096, - 1528,16192, 1536,2112, 1544,4480, 1552,8576, 1560,12672, 1568,2240, - 1576,4992, 1584,9088, 1592,13184, 1600,2368, 1608,5504, 1616,9600, - 1624,13696, 1632,1920, 1640,6016, 1648,10112, 1656,14208, 1664,2432, - 1672,6528, 1680,10624, 1688,14720, 1696,2944, 1704,7040, 1712,11136, - 1720,15232, 1728,3456, 1736,7552, 1744,11648, 1752,15744, 1760,3968, - 1768,8064, 1776,12160, 1784,16256, 1792,3136, 1800,4544, 1808,8640, - 1816,12736, 1824,3264, 1832,5056, 1840,9152, 1848,13248, 1856,3392, - 1864,5568, 1872,9664, 1880,13760, 1888,1984, 1896,6080, 1904,10176, - 1912,14272, 1920,2496, 1928,6592, 1936,10688, 1944,14784, 1952,3008, - 1960,7104, 1968,11200, 1976,15296, 1984,3520, 1992,7616, 2000,11712, - 2008,15808, 2016,4032, 2024,8128, 2032,12224, 2040,16320, 2048,4096, - 2056,4104, 2064,8200, 2072,12296, 2080,4224, 2088,4616, 2096,8712, - 2104,12808, 2112,4352, 2120,5128, 2128,9224, 2136,13320, 2144,4480, - 2152,5640, 2160,9736, 2168,13832, 2176,4104, 2184,6152, 2192,10248, - 2200,14344, 2208,2568, 2216,6664, 2224,10760, 2232,14856, 2240,3080, - 2248,7176, 2256,11272, 2264,15368, 2272,3592, 2280,7688, 2288,11784, - 2296,15880, 2304,5120, 2312,4168, 2320,8264, 2328,12360, 2336,5248, - 2344,4680, 2352,8776, 2360,12872, 2368,5376, 2376,5192, 2384,9288, - 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10024,11656, 10032,13592, 10040,13280, 10048,13632, 10056,13760, - 10064,13640, 10072,13792, 10080,13648, 10088,11720, 10096,10208, - 10104,14304, 10112,13600, 10120,13704, 10128,10720, 10136,14816, - 10144,13400, 10152,15752, 10160,11232, 10168,15328, 10176,13664, - 10184,13768, 10192,11744, 10200,15840, 10208,13656, 10216,15816, - 10224,12256, 10232,16352, 10248,10272, 10256,10368, 10264,12328, - 10280,10384, 10288,10376, 10296,12840, 10304,11264, 10312,11296, - 10320,11392, 10328,13352, 10336,11272, 10344,10448, 10352,11400, - 10360,13864, 10376,12432, 10392,14376, 10400,12328, 10408,14480, - 10416,10792, 10424,14888, 10432,11280, 10440,12496, 10448,11304, - 10456,15400, 10464,11288, 10472,14544, 10480,11816, 10488,15912, - 10496,11264, 10504,11272, 10512,11280, 10520,12392, 10528,11296, - 10536,10640, 10544,12496, 10552,12904, 10560,11328, 10568,11360, - 10576,11456, 10584,13416, 10592,11336, 10600,10704, 10608,11464, - 10616,13928, 10624,11392, 10632,12688, 10640,11304, 10648,14440, - 10656,13352, 10664,14736, 10672,10856, 10680,14952, 10688,11344, - 10696,12752, 10704,11368, 10712,15464, 10720,11352, 10728,14800, - 10736,11880, 10744,15976, 10752,14336, 10760,14368, 10768,14464, - 10776,12456, 10784,14344, 10792,14376, 10800,14472, 10808,12968, - 10816,15360, 10824,15392, 10832,15488, 10840,13480, 10848,15368, - 10856,15400, 10864,15496, 10872,13992, 10880,14352, 10888,12440, - 10896,14480, 10904,14504, 10912,14360, 10920,14488, 10928,14488, - 10936,15016, 10944,15376, 10952,12504, 10960,11432, 10968,15528, - 10976,15384, 10984,14552, 10992,11944, 11000,16040, 11008,14400, - 11016,14432, 11024,14528, 11032,12520, 11040,14408, 11048,14440, - 11056,14536, 11064,13032, 11072,15424, 11080,15456, 11088,15552, - 11096,13544, 11104,15432, 11112,15464, 11120,15560, 11128,14056, - 11136,14416, 11144,12696, 11152,14544, 11160,14568, 11168,14424, - 11176,14744, 11184,14552, 11192,15080, 11200,15440, 11208,12760, - 11216,11496, 11224,15592, 11232,15448, 11240,14808, 11248,12008, - 11256,16104, 11272,11296, 11280,11392, 11288,12584, 11304,11408, - 11312,12688, 11320,13096, 11328,11520, 11336,11552, 11344,11648, - 11352,13608, 11360,11528, 11368,11472, 11376,11656, 11384,14120, - 11400,13456, 11416,14632, 11424,12392, 11432,15504, 11440,14440, - 11448,15144, 11456,11536, 11464,13520, 11472,11560, 11480,15656, - 11488,11544, 11496,15568, 11504,12072, 11512,16168, 11528,11552, - 11536,11648, 11544,12648, 11560,11664, 11568,12752, 11576,13160, - 11592,11616, 11600,11712, 11608,13672, 11624,11728, 11632,11720, - 11640,14184, 11656,13712, 11672,14696, 11680,13416, 11688,15760, - 11696,15464, 11704,15208, 11720,13776, 11736,15720, 11744,13672, - 11752,15824, 11760,12136, 11768,16232, 11776,14592, 11784,14624, - 11792,14720, 11800,12712, 11808,14600, 11816,14632, 11824,14728, - 11832,13224, 11840,15616, 11848,15648, 11856,15744, 11864,13736, - 11872,15624, 11880,15656, 11888,15752, 11896,14248, 11904,14608, - 11912,13464, 11920,14736, 11928,14760, 11936,14616, 11944,15512, - 11952,14744, 11960,15272, 11968,15632, 11976,13528, 11984,15760, - 11992,15784, 12000,15640, 12008,15576, 12016,12200, 12024,16296, - 12032,14656, 12040,14688, 12048,14784, 12056,12776, 12064,14664, - 12072,14696, 12080,14792, 12088,13288, 12096,15680, 12104,15712, - 12112,15808, 12120,13800, 12128,15688, 12136,15720, 12144,15816, - 12152,14312, 12160,14672, 12168,13720, 12176,14800, 12184,14824, - 12192,14680, 12200,15768, 12208,14808, 12216,15336, 12224,15696, - 12232,13784, 12240,15824, 12248,15848, 12256,15704, 12264,15832, - 12272,15832, 12280,16360, 12312,12336, 12344,12848, 12352,12544, - 12360,12552, 12368,12560, 12376,13360, 12384,12576, 12392,12584, - 12400,13336, 12408,13872, 12424,12448, 12440,14384, 12456,14496, - 12464,14472, 12472,14896, 12480,12672, 12488,12512, 12496,12688, - 12504,15408, 12512,12680, 12520,14560, 12528,14728, 12536,15920, - 12544,13312, 12552,13320, 12560,13328, 12568,13336, 12576,13344, - 12584,13352, 12592,13360, 12600,12912, 12608,13568, 12616,13576, - 12624,13584, 12632,13424, 12640,13600, 12648,13608, 12656,13400, - 12664,13936, 12672,13440, 12680,12704, 12688,13456, 12696,14448, - 12704,13448, 12712,14752, 12720,15496, 12728,14960, 12736,13696, - 12744,12768, 12752,13712, 12760,15472, 12768,13704, 12776,14816, - 12784,15752, 12792,15984, 12800,14336, 12808,14464, 12816,14344, - 12824,14472, 12832,14352, 12840,14480, 12848,14360, 12856,12976, - 12864,14400, 12872,14528, 12880,14408, 12888,13488, 12896,14416, - 12904,14544, 12912,14424, 12920,14000, 12928,14368, 12936,14496, - 12944,14376, 12952,14512, 12960,14384, 12968,14504, 12976,14488, - 12984,15024, 12992,14432, 13000,14560, 13008,14440, 13016,15536, - 13024,14448, 13032,14568, 13040,14744, 13048,16048, 13056,14592, - 13064,14720, 13072,14600, 13080,14728, 13088,14608, 13096,14736, - 13104,14616, 13112,14744, 13120,14656, 13128,14784, 13136,14664, - 13144,13552, 13152,14672, 13160,14800, 13168,14680, 13176,14064, - 13184,14624, 13192,14752, 13200,14632, 13208,14576, 13216,13464, - 13224,14760, 13232,15512, 13240,15088, 13248,14688, 13256,14816, - 13264,14696, 13272,15600, 13280,13720, 13288,14824, 13296,15768, - 13304,16112, 13336,13360, 13368,14616, 13376,13568, 13384,13576, - 13392,13584, 13400,13616, 13408,13600, 13416,13608, 13424,13592, - 13432,14128, 13448,13472, 13464,14640, 13480,15520, 13488,14536, - 13496,15152, 13504,13696, 13512,13536, 13520,13712, 13528,15664, - 13536,13704, 13544,15584, 13552,14792, 13560,16176, 13592,13616, - 13624,14680, 13656,13680, 13688,14192, 13704,13728, 13720,14704, - 13736,15776, 13744,15560, 13752,15216, 13768,13792, 13784,15728, - 13800,15840, 13808,15816, 13816,16240, 13824,15360, 13832,15488, - 13840,15368, 13848,15496, 13856,15376, 13864,15504, 13872,15384, - 13880,15512, 13888,15424, 13896,15552, 13904,15432, 13912,15560, - 13920,15440, 13928,15568, 13936,15448, 13944,14256, 13952,15392, - 13960,15520, 13968,15400, 13976,14768, 13984,15408, 13992,15528, - 14000,14552, 14008,15280, 14016,15456, 14024,15584, 14032,15464, - 14040,15792, 14048,15472, 14056,15592, 14064,14808, 14072,16304, - 14080,15616, 14088,15744, 14096,15624, 14104,15752, 14112,15632, - 14120,15760, 14128,15640, 14136,15768, 14144,15680, 14152,15808, - 14160,15688, 14168,15816, 14176,15696, 14184,15824, 14192,15704, - 14200,14320, 14208,15648, 14216,15776, 14224,15656, 14232,14832, - 14240,15664, 14248,15784, 14256,15576, 14264,15344, 14272,15712, - 14280,15840, 14288,15720, 14296,15856, 14304,15728, 14312,15848, - 14320,15832, 14328,16368, 14392,14488, 14400,14592, 14408,14600, - 14416,14608, 14424,14616, 14432,14624, 14440,14632, 14448,14640, - 14456,15512, 14504,14512, 14520,14904, 14528,14720, 14536,14728, - 14544,14736, 14552,15416, 14560,14752, 14568,14576, 14584,15928, - 14576,14760, 14592,15360, 14600,15368, 14608,15376, 14616,15384, - 14624,15392, 14632,15400, 14640,15408, 14648,15416, 14656,15616, - 14664,15624, 14672,15632, 14680,15640, 14688,15648, 14696,15656, - 14704,15664, 14712,15576, 14720,15488, 14728,15496, 14736,15504, - 14744,15512, 14752,15520, 14760,14768, 14776,14968, 14768,15528, - 14784,15744, 14792,15752, 14800,15760, 14808,15480, 14816,15776, - 14824,14832, 14840,15992, 14832,15784, 14856,14864, 14864,14880, - 14872,14896, 14880,14976, 14888,14992, 14896,15008, 14904,15024, - 14912,15104, 14920,15120, 14928,15136, 14936,15152, 14944,15232, - 14952,15248, 14960,15264, 14968,15280, 14984,15008, 15000,15024, - 15016,15024, 15040,15112, 15048,15128, 15056,15144, 15064,15544, - 15072,15240, 15080,15256, 15088,15272, 15096,16056, 15104,15872, - 15112,15888, 15120,15904, 15128,15920, 15136,16000, 15144,16016, - 15152,16032, 15160,16048, 15168,16128, 15176,16144, 15184,16160, - 15192,16176, 15200,16256, 15208,16272, 15216,16288, 15224,16304, - 15232,15880, 15240,15896, 15248,15912, 15256,15928, 15264,16008, - 15272,16024, 15280,16040, 15288,16056, 15296,16136, 15304,16152, - 15312,16168, 15320,15608, 15328,16264, 15336,16280, 15344,16296, - 15352,16120, 15416,15512, 15424,15616, 15432,15624, 15440,15632, - 15448,15640, 15456,15648, 15464,15656, 15472,15664, 15480,15768, - 15528,15536, 15544,16048, 15552,15744, 15560,15752, 15568,15760, - 15576,15672, 15584,15776, 15592,15600, 15600,15784, 15608,16184, - 15672,15768, 15736,15832, 15784,15792, 15800,16304, 15848,15856, - 15880,16000, 15864,16248, 15888,16000, 15896,16008, 15904,16000, - 15912,16016, 15920,16008, 15928,16024, 15936,16128, 15944,16160, - 15952,16256, 15960,16288, 15968,16136, 15976,16168, 15984,16264, - 15992,16296, 16008,16032, 16024,16040, 16064,16144, 16040,16048, - 16072,16176, 16080,16272, 16088,16304, 16096,16152, 16104,16184, - 16112,16280, 16136,16256, 16120,16312, 16144,16256, 16152,16264, - 16160,16256, 16168,16272, 16176,16264, 16184,16280, 16200,16208, - 16208,16224, 16216,16240, 16224,16320, 16232,16336, 16240,16352, - 16248,16368, 16264,16288, 16280,16296, 16296,16304, 16344,16368, - 16328,16352, 16360,16368 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096) - -const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH] = -{ - /* radix 8, size 4032 */ - 8,4096, 16,8192, 24,12288, 32,16384, 40,20480, 48,24576, 56,28672, 64,512, - 72,4608, 80,8704, 88,12800, 96,16896, 104,20992, 112,25088, 120,29184, - 128,1024, 136,5120, 144,9216, 152,13312, 160,17408, 168,21504, 176,25600, - 184,29696, 192,1536, 200,5632, 208,9728, 216,13824, 224,17920, 232,22016, - 240,26112, 248,30208, 256,2048, 264,6144, 272,10240, 280,14336, 288,18432, - 296,22528, 304,26624, 312,30720, 320,2560, 328,6656, 336,10752, 344,14848, - 352,18944, 360,23040, 368,27136, 376,31232, 384,3072, 392,7168, 400,11264, - 408,15360, 416,19456, 424,23552, 432,27648, 440,31744, 448,3584, 456,7680, - 464,11776, 472,15872, 480,19968, 488,24064, 496,28160, 504,32256, 520,4160, - 528,8256, 536,12352, 544,16448, 552,20544, 560,24640, 568,28736, 584,4672, - 592,8768, 600,12864, 608,16960, 616,21056, 624,25152, 632,29248, 640,1088, - 648,5184, 656,9280, 664,13376, 672,17472, 680,21568, 688,25664, 696,29760, - 704,1600, 712,5696, 720,9792, 728,13888, 736,17984, 744,22080, 752,26176, - 760,30272, 768,2112, 776,6208, 784,10304, 792,14400, 800,18496, 808,22592, - 816,26688, 824,30784, 832,2624, 840,6720, 848,10816, 856,14912, 864,19008, - 872,23104, 880,27200, 888,31296, 896,3136, 904,7232, 912,11328, 920,15424, - 928,19520, 936,23616, 944,27712, 952,31808, 960,3648, 968,7744, 976,11840, - 984,15936, 992,20032, 1000,24128, 1008,28224, 1016,32320, 1032,4224, - 1040,8320, 1048,12416, 1056,16512, 1064,20608, 1072,24704, 1080,28800, - 1096,4736, 1104,8832, 1112,12928, 1120,17024, 1128,21120, 1136,25216, - 1144,29312, 1160,5248, 1168,9344, 1176,13440, 1184,17536, 1192,21632, - 1200,25728, 1208,29824, 1216,1664, 1224,5760, 1232,9856, 1240,13952, - 1248,18048, 1256,22144, 1264,26240, 1272,30336, 1280,2176, 1288,6272, - 1296,10368, 1304,14464, 1312,18560, 1320,22656, 1328,26752, 1336,30848, - 1344,2688, 1352,6784, 1360,10880, 1368,14976, 1376,19072, 1384,23168, - 1392,27264, 1400,31360, 1408,3200, 1416,7296, 1424,11392, 1432,15488, - 1440,19584, 1448,23680, 1456,27776, 1464,31872, 1472,3712, 1480,7808, - 1488,11904, 1496,16000, 1504,20096, 1512,24192, 1520,28288, 1528,32384, - 1544,4288, 1552,8384, 1560,12480, 1568,16576, 1576,20672, 1584,24768, - 1592,28864, 1608,4800, 1616,8896, 1624,12992, 1632,17088, 1640,21184, - 1648,25280, 1656,29376, 1672,5312, 1680,9408, 1688,13504, 1696,17600, - 1704,21696, 1712,25792, 1720,29888, 1736,5824, 1744,9920, 1752,14016, - 1760,18112, 1768,22208, 1776,26304, 1784,30400, 1792,2240, 1800,6336, - 1808,10432, 1816,14528, 1824,18624, 1832,22720, 1840,26816, 1848,30912, - 1856,2752, 1864,6848, 1872,10944, 1880,15040, 1888,19136, 1896,23232, - 1904,27328, 1912,31424, 1920,3264, 1928,7360, 1936,11456, 1944,15552, - 1952,19648, 1960,23744, 1968,27840, 1976,31936, 1984,3776, 1992,7872, - 2000,11968, 2008,16064, 2016,20160, 2024,24256, 2032,28352, 2040,32448, - 2056,4352, 2064,8448, 2072,12544, 2080,16640, 2088,20736, 2096,24832, - 2104,28928, 2120,4864, 2128,8960, 2136,13056, 2144,17152, 2152,21248, - 2160,25344, 2168,29440, 2184,5376, 2192,9472, 2200,13568, 2208,17664, - 2216,21760, 2224,25856, 2232,29952, 2248,5888, 2256,9984, 2264,14080, - 2272,18176, 2280,22272, 2288,26368, 2296,30464, 2312,6400, 2320,10496, - 2328,14592, 2336,18688, 2344,22784, 2352,26880, 2360,30976, 2368,2816, - 2376,6912, 2384,11008, 2392,15104, 2400,19200, 2408,23296, 2416,27392, - 2424,31488, 2432,3328, 2440,7424, 2448,11520, 2456,15616, 2464,19712, - 2472,23808, 2480,27904, 2488,32000, 2496,3840, 2504,7936, 2512,12032, - 2520,16128, 2528,20224, 2536,24320, 2544,28416, 2552,32512, 2568,4416, - 2576,8512, 2584,12608, 2592,16704, 2600,20800, 2608,24896, 2616,28992, - 2632,4928, 2640,9024, 2648,13120, 2656,17216, 2664,21312, 2672,25408, - 2680,29504, 2696,5440, 2704,9536, 2712,13632, 2720,17728, 2728,21824, - 2736,25920, 2744,30016, 2760,5952, 2768,10048, 2776,14144, 2784,18240, - 2792,22336, 2800,26432, 2808,30528, 2824,6464, 2832,10560, 2840,14656, - 2848,18752, 2856,22848, 2864,26944, 2872,31040, 2888,6976, 2896,11072, - 2904,15168, 2912,19264, 2920,23360, 2928,27456, 2936,31552, 2944,3392, - 2952,7488, 2960,11584, 2968,15680, 2976,19776, 2984,23872, 2992,27968, - 3000,32064, 3008,3904, 3016,8000, 3024,12096, 3032,16192, 3040,20288, - 3048,24384, 3056,28480, 3064,32576, 3080,4480, 3088,8576, 3096,12672, - 3104,16768, 3112,20864, 3120,24960, 3128,29056, 3144,4992, 3152,9088, - 3160,13184, 3168,17280, 3176,21376, 3184,25472, 3192,29568, 3208,5504, - 3216,9600, 3224,13696, 3232,17792, 3240,21888, 3248,25984, 3256,30080, - 3272,6016, 3280,10112, 3288,14208, 3296,18304, 3304,22400, 3312,26496, - 3320,30592, 3336,6528, 3344,10624, 3352,14720, 3360,18816, 3368,22912, - 3376,27008, 3384,31104, 3400,7040, 3408,11136, 3416,15232, 3424,19328, - 3432,23424, 3440,27520, 3448,31616, 3464,7552, 3472,11648, 3480,15744, - 3488,19840, 3496,23936, 3504,28032, 3512,32128, 3520,3968, 3528,8064, - 3536,12160, 3544,16256, 3552,20352, 3560,24448, 3568,28544, 3576,32640, - 3592,4544, 3600,8640, 3608,12736, 3616,16832, 3624,20928, 3632,25024, - 3640,29120, 3656,5056, 3664,9152, 3672,13248, 3680,17344, 3688,21440, - 3696,25536, 3704,29632, 3720,5568, 3728,9664, 3736,13760, 3744,17856, - 3752,21952, 3760,26048, 3768,30144, 3784,6080, 3792,10176, 3800,14272, - 3808,18368, 3816,22464, 3824,26560, 3832,30656, 3848,6592, 3856,10688, - 3864,14784, 3872,18880, 3880,22976, 3888,27072, 3896,31168, 3912,7104, - 3920,11200, 3928,15296, 3936,19392, 3944,23488, 3952,27584, 3960,31680, - 3976,7616, 3984,11712, 3992,15808, 4000,19904, 4008,24000, 4016,28096, - 4024,32192, 4040,8128, 4048,12224, 4056,16320, 4064,20416, 4072,24512, - 4080,28608, 4088,32704, 4112,8200, 4120,12296, 4128,16392, 4136,20488, - 4144,24584, 4152,28680, 4168,4616, 4176,8712, 4184,12808, 4192,16904, - 4200,21000, 4208,25096, 4216,29192, 4232,5128, 4240,9224, 4248,13320, - 4256,17416, 4264,21512, 4272,25608, 4280,29704, 4296,5640, 4304,9736, - 4312,13832, 4320,17928, 4328,22024, 4336,26120, 4344,30216, 4360,6152, - 4368,10248, 4376,14344, 4384,18440, 4392,22536, 4400,26632, 4408,30728, - 4424,6664, 4432,10760, 4440,14856, 4448,18952, 4456,23048, 4464,27144, - 4472,31240, 4488,7176, 4496,11272, 4504,15368, 4512,19464, 4520,23560, - 4528,27656, 4536,31752, 4552,7688, 4560,11784, 4568,15880, 4576,19976, - 4584,24072, 4592,28168, 4600,32264, 4624,8264, 4632,12360, 4640,16456, - 4648,20552, 4656,24648, 4664,28744, 4688,8776, 4696,12872, 4704,16968, - 4712,21064, 4720,25160, 4728,29256, 4744,5192, 4752,9288, 4760,13384, - 4768,17480, 4776,21576, 4784,25672, 4792,29768, 4808,5704, 4816,9800, - 4824,13896, 4832,17992, 4840,22088, 4848,26184, 4856,30280, 4872,6216, - 4880,10312, 4888,14408, 4896,18504, 4904,22600, 4912,26696, 4920,30792, - 4936,6728, 4944,10824, 4952,14920, 4960,19016, 4968,23112, 4976,27208, - 4984,31304, 5000,7240, 5008,11336, 5016,15432, 5024,19528, 5032,23624, - 5040,27720, 5048,31816, 5064,7752, 5072,11848, 5080,15944, 5088,20040, - 5096,24136, 5104,28232, 5112,32328, 5136,8328, 5144,12424, 5152,16520, - 5160,20616, 5168,24712, 5176,28808, 5200,8840, 5208,12936, 5216,17032, - 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16816,27680, 16824,31776, 16864,20000, 16872,24096, 16880,28192, - 16888,32288, 16936,20576, 16944,24672, 16952,28768, 17000,21088, - 17008,25184, 17016,29280, 17056,17504, 17064,21600, 17072,25696, - 17080,29792, 17120,18016, 17128,22112, 17136,26208, 17144,30304, - 17184,18528, 17192,22624, 17200,26720, 17208,30816, 17248,19040, - 17256,23136, 17264,27232, 17272,31328, 17312,19552, 17320,23648, - 17328,27744, 17336,31840, 17376,20064, 17384,24160, 17392,28256, - 17400,32352, 17448,20640, 17456,24736, 17464,28832, 17512,21152, - 17520,25248, 17528,29344, 17576,21664, 17584,25760, 17592,29856, - 17632,18080, 17640,22176, 17648,26272, 17656,30368, 17696,18592, - 17704,22688, 17712,26784, 17720,30880, 17760,19104, 17768,23200, - 17776,27296, 17784,31392, 17824,19616, 17832,23712, 17840,27808, - 17848,31904, 17888,20128, 17896,24224, 17904,28320, 17912,32416, - 17960,20704, 17968,24800, 17976,28896, 18024,21216, 18032,25312, - 18040,29408, 18088,21728, 18096,25824, 18104,29920, 18152,22240, - 18160,26336, 18168,30432, 18208,18656, 18216,22752, 18224,26848, - 18232,30944, 18272,19168, 18280,23264, 18288,27360, 18296,31456, - 18336,19680, 18344,23776, 18352,27872, 18360,31968, 18400,20192, - 18408,24288, 18416,28384, 18424,32480, 18472,20768, 18480,24864, - 18488,28960, 18536,21280, 18544,25376, 18552,29472, 18600,21792, - 18608,25888, 18616,29984, 18664,22304, 18672,26400, 18680,30496, - 18728,22816, 18736,26912, 18744,31008, 18784,19232, 18792,23328, - 18800,27424, 18808,31520, 18848,19744, 18856,23840, 18864,27936, - 18872,32032, 18912,20256, 18920,24352, 18928,28448, 18936,32544, - 18984,20832, 18992,24928, 19000,29024, 19048,21344, 19056,25440, - 19064,29536, 19112,21856, 19120,25952, 19128,30048, 19176,22368, - 19184,26464, 19192,30560, 19240,22880, 19248,26976, 19256,31072, - 19304,23392, 19312,27488, 19320,31584, 19360,19808, 19368,23904, - 19376,28000, 19384,32096, 19424,20320, 19432,24416, 19440,28512, - 19448,32608, 19496,20896, 19504,24992, 19512,29088, 19560,21408, - 19568,25504, 19576,29600, 19624,21920, 19632,26016, 19640,30112, - 19688,22432, 19696,26528, 19704,30624, 19752,22944, 19760,27040, - 19768,31136, 19816,23456, 19824,27552, 19832,31648, 19880,23968, - 19888,28064, 19896,32160, 19936,20384, 19944,24480, 19952,28576, - 19960,32672, 20008,20960, 20016,25056, 20024,29152, 20072,21472, - 20080,25568, 20088,29664, 20136,21984, 20144,26080, 20152,30176, - 20200,22496, 20208,26592, 20216,30688, 20264,23008, 20272,27104, - 20280,31200, 20328,23520, 20336,27616, 20344,31712, 20392,24032, - 20400,28128, 20408,32224, 20456,24544, 20464,28640, 20472,32736, - 20528,24616, 20536,28712, 20584,21032, 20592,25128, 20600,29224, - 20648,21544, 20656,25640, 20664,29736, 20712,22056, 20720,26152, - 20728,30248, 20776,22568, 20784,26664, 20792,30760, 20840,23080, - 20848,27176, 20856,31272, 20904,23592, 20912,27688, 20920,31784, - 20968,24104, 20976,28200, 20984,32296, 21040,24680, 21048,28776, - 21104,25192, 21112,29288, 21160,21608, 21168,25704, 21176,29800, - 21224,22120, 21232,26216, 21240,30312, 21288,22632, 21296,26728, - 21304,30824, 21352,23144, 21360,27240, 21368,31336, 21416,23656, - 21424,27752, 21432,31848, 21480,24168, 21488,28264, 21496,32360, - 21552,24744, 21560,28840, 21616,25256, 21624,29352, 21680,25768, - 21688,29864, 21736,22184, 21744,26280, 21752,30376, 21800,22696, - 21808,26792, 21816,30888, 21864,23208, 21872,27304, 21880,31400, - 21928,23720, 21936,27816, 21944,31912, 21992,24232, 22000,28328, - 22008,32424, 22064,24808, 22072,28904, 22128,25320, 22136,29416, - 22192,25832, 22200,29928, 22256,26344, 22264,30440, 22312,22760, - 22320,26856, 22328,30952, 22376,23272, 22384,27368, 22392,31464, - 22440,23784, 22448,27880, 22456,31976, 22504,24296, 22512,28392, - 22520,32488, 22576,24872, 22584,28968, 22640,25384, 22648,29480, - 22704,25896, 22712,29992, 22768,26408, 22776,30504, 22832,26920, - 22840,31016, 22888,23336, 22896,27432, 22904,31528, 22952,23848, - 22960,27944, 22968,32040, 23016,24360, 23024,28456, 23032,32552, - 23088,24936, 23096,29032, 23152,25448, 23160,29544, 23216,25960, - 23224,30056, 23280,26472, 23288,30568, 23344,26984, 23352,31080, - 23408,27496, 23416,31592, 23464,23912, 23472,28008, 23480,32104, - 23528,24424, 23536,28520, 23544,32616, 23600,25000, 23608,29096, - 23664,25512, 23672,29608, 23728,26024, 23736,30120, 23792,26536, - 23800,30632, 23856,27048, 23864,31144, 23920,27560, 23928,31656, - 23984,28072, 23992,32168, 24040,24488, 24048,28584, 24056,32680, - 24112,25064, 24120,29160, 24176,25576, 24184,29672, 24240,26088, - 24248,30184, 24304,26600, 24312,30696, 24368,27112, 24376,31208, - 24432,27624, 24440,31720, 24496,28136, 24504,32232, 24560,28648, - 24568,32744, 24632,28720, 24688,25136, 24696,29232, 24752,25648, - 24760,29744, 24816,26160, 24824,30256, 24880,26672, 24888,30768, - 24944,27184, 24952,31280, 25008,27696, 25016,31792, 25072,28208, - 25080,32304, 25144,28784, 25208,29296, 25264,25712, 25272,29808, - 25328,26224, 25336,30320, 25392,26736, 25400,30832, 25456,27248, - 25464,31344, 25520,27760, 25528,31856, 25584,28272, 25592,32368, - 25656,28848, 25720,29360, 25784,29872, 25840,26288, 25848,30384, - 25904,26800, 25912,30896, 25968,27312, 25976,31408, 26032,27824, - 26040,31920, 26096,28336, 26104,32432, 26168,28912, 26232,29424, - 26296,29936, 26360,30448, 26416,26864, 26424,30960, 26480,27376, - 26488,31472, 26544,27888, 26552,31984, 26608,28400, 26616,32496, - 26680,28976, 26744,29488, 26808,30000, 26872,30512, 26936,31024, - 26992,27440, 27000,31536, 27056,27952, 27064,32048, 27120,28464, - 27128,32560, 27192,29040, 27256,29552, 27320,30064, 27384,30576, - 27448,31088, 27512,31600, 27568,28016, 27576,32112, 27632,28528, - 27640,32624, 27704,29104, 27768,29616, 27832,30128, 27896,30640, - 27960,31152, 28024,31664, 28088,32176, 28144,28592, 28152,32688, - 28216,29168, 28280,29680, 28344,30192, 28408,30704, 28472,31216, - 28536,31728, 28600,32240, 28664,32752, 28792,29240, 28856,29752, - 28920,30264, 28984,30776, 29048,31288, 29112,31800, 29176,32312, - 29368,29816, 29432,30328, 29496,30840, 29560,31352, 29624,31864, - 29688,32376, 29944,30392, 30008,30904, 30072,31416, 30136,31928, - 30200,32440, 30520,30968, 30584,31480, 30648,31992, 30712,32504, - 31096,31544, 31160,32056, 31224,32568, 31672,32120, 31736,32632, - 32248,32696 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16) - -const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH] = -{ - /* radix 4, size 12 */ - 8,64, 16,32, 24,96, 40,80, 56,112, 88,104 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32) -const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH] = -{ - /* 4x2, size 24 */ - 8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144, - 88,208, 104,176, 120,240, 152,200, 184,232 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64) -const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH] = -{ - /* radix 4, size 56 */ - 8,256, 16,128, 24,384, 32,64, 40,320, 48,192, 56,448, 72,288, 80,160, 88,416, 104,352, - 112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432, - 232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128) -const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH] = -{ - /* 4x2, size 112 */ - 8,512, 16,256, 24,768, 32,128, 40,640, 48,384, 56,896, 72,576, 80,320, 88,832, 96,192, - 104,704, 112,448, 120,960, 136,544, 144,288, 152,800, 168,672, 176,416, 184,928, 200,608, - 208,352, 216,864, 232,736, 240,480, 248,992, 264,528, 280,784, 296,656, 304,400, 312,912, - 328,592, 344,848, 360,720, 368,464, 376,976, 392,560, 408,816, 424,688, 440,944, 456,624, - 472,880, 488,752, 504,1008, 536,776, 552,648, 568,904, 600,840, 616,712, 632,968, - 664,808, 696,936, 728,872, 760,1000, 824,920, 888,984 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256) -const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH] = -{ - /* radix 4, size 240 */ - 8,1024, 16,512, 24,1536, 32,256, 40,1280, 48,768, 56,1792, 64,128, 72,1152, 80,640, - 88,1664, 96,384, 104,1408, 112,896, 120,1920, 136,1088, 144,576, 152,1600, 160,320, - 168,1344, 176,832, 184,1856, 200,1216, 208,704, 216,1728, 224,448, 232,1472, 240,960, - 248,1984, 264,1056, 272,544, 280,1568, 296,1312, 304,800, 312,1824, 328,1184, 336,672, - 344,1696, 352,416, 360,1440, 368,928, 376,1952, 392,1120, 400,608, 408,1632, 424,1376, - 432,864, 440,1888, 456,1248, 464,736, 472,1760, 488,1504, 496,992, 504,2016, 520,1040, - 536,1552, 552,1296, 560,784, 568,1808, 584,1168, 592,656, 600,1680, 616,1424, 624,912, - 632,1936, 648,1104, 664,1616, 680,1360, 688,848, 696,1872, 712,1232, 728,1744, 744,1488, - 752,976, 760,2000, 776,1072, 792,1584, 808,1328, 824,1840, 840,1200, 856,1712, 872,1456, - 880,944, 888,1968, 904,1136, 920,1648, 936,1392, 952,1904, 968,1264, 984,1776, 1000,1520, - 1016,2032, 1048,1544, 1064,1288, 1080,1800, 1096,1160, 1112,1672, 1128,1416, 1144,1928, - 1176,1608, 1192,1352, 1208,1864, 1240,1736, 1256,1480, 1272,1992, 1304,1576, 1336,1832, - 1368,1704, 1384,1448, 1400,1960, 1432,1640, 1464,1896, 1496,1768, 1528,2024, 1592,1816, - 1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512) -const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH] = -{ - /* 4x2, size 480 */ - 8,2048, 16,1024, 24,3072, 32,512, 40,2560, 48,1536, 56,3584, 64,256, 72,2304, 80,1280, - 88,3328, 96,768, 104,2816, 112,1792, 120,3840, 136,2176, 144,1152, 152,3200, 160,640, - 168,2688, 176,1664, 184,3712, 192,384, 200,2432, 208,1408, 216,3456, 224,896, 232,2944, - 240,1920, 248,3968, 264,2112, 272,1088, 280,3136, 288,576, 296,2624, 304,1600, 312,3648, - 328,2368, 336,1344, 344,3392, 352,832, 360,2880, 368,1856, 376,3904, 392,2240, 400,1216, - 408,3264, 416,704, 424,2752, 432,1728, 440,3776, 456,2496, 464,1472, 472,3520, 480,960, - 488,3008, 496,1984, 504,4032, 520,2080, 528,1056, 536,3104, 552,2592, 560,1568, 568,3616, - 584,2336, 592,1312, 600,3360, 608,800, 616,2848, 624,1824, 632,3872, 648,2208, 656,1184, - 664,3232, 680,2720, 688,1696, 696,3744, 712,2464, 720,1440, 728,3488, 736,928, 744,2976, - 752,1952, 760,4000, 776,2144, 784,1120, 792,3168, 808,2656, 816,1632, 824,3680, 840,2400, - 848,1376, 856,3424, 872,2912, 880,1888, 888,3936, 904,2272, 912,1248, 920,3296, 936,2784, - 944,1760, 952,3808, 968,2528, 976,1504, 984,3552, 1000,3040, 1008,2016, 1016,4064, - 1032,2064, 1048,3088, 1064,2576, 1072,1552, 1080,3600, 1096,2320, 1104,1296, 1112,3344, - 1128,2832, 1136,1808, 1144,3856, 1160,2192, 1176,3216, 1192,2704, 1200,1680, 1208,3728, - 1224,2448, 1232,1424, 1240,3472, 1256,2960, 1264,1936, 1272,3984, 1288,2128, 1304,3152, - 1320,2640, 1328,1616, 1336,3664, 1352,2384, 1368,3408, 1384,2896, 1392,1872, 1400,3920, - 1416,2256, 1432,3280, 1448,2768, 1456,1744, 1464,3792, 1480,2512, 1496,3536, 1512,3024, - 1520,2000, 1528,4048, 1544,2096, 1560,3120, 1576,2608, 1592,3632, 1608,2352, 1624,3376, - 1640,2864, 1648,1840, 1656,3888, 1672,2224, 1688,3248, 1704,2736, 1720,3760, 1736,2480, - 1752,3504, 1768,2992, 1776,1968, 1784,4016, 1800,2160, 1816,3184, 1832,2672, 1848,3696, - 1864,2416, 1880,3440, 1896,2928, 1912,3952, 1928,2288, 1944,3312, 1960,2800, 1976,3824, - 1992,2544, 2008,3568, 2024,3056, 2040,4080, 2072,3080, 2088,2568, 2104,3592, 2120,2312, - 2136,3336, 2152,2824, 2168,3848, 2200,3208, 2216,2696, 2232,3720, 2248,2440, 2264,3464, - 2280,2952, 2296,3976, 2328,3144, 2344,2632, 2360,3656, 2392,3400, 2408,2888, 2424,3912, - 2456,3272, 2472,2760, 2488,3784, 2520,3528, 2536,3016, 2552,4040, 2584,3112, 2616,3624, - 2648,3368, 2664,2856, 2680,3880, 2712,3240, 2744,3752, 2776,3496, 2792,2984, 2808,4008, - 2840,3176, 2872,3688, 2904,3432, 2936,3944, 2968,3304, 3000,3816, 3032,3560, 3064,4072, - 3128,3608, 3160,3352, 3192,3864, 3256,3736, 3288,3480, 3320,3992, 3384,3672, 3448,3928, - 3512,3800, 3576,4056, 3704,3896, 3832,4024 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024) -const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH] = -{ - /* radix 4, size 992 */ - 8,4096, 16,2048, 24,6144, 32,1024, 40,5120, 48,3072, 56,7168, 64,512, 72,4608, - 80,2560, 88,6656, 96,1536, 104,5632, 112,3584, 120,7680, 128,256, 136,4352, - 144,2304, 152,6400, 160,1280, 168,5376, 176,3328, 184,7424, 192,768, 200,4864, - 208,2816, 216,6912, 224,1792, 232,5888, 240,3840, 248,7936, 264,4224, 272,2176, - 280,6272, 288,1152, 296,5248, 304,3200, 312,7296, 320,640, 328,4736, 336,2688, - 344,6784, 352,1664, 360,5760, 368,3712, 376,7808, 392,4480, 400,2432, 408,6528, - 416,1408, 424,5504, 432,3456, 440,7552, 448,896, 456,4992, 464,2944, 472,7040, - 480,1920, 488,6016, 496,3968, 504,8064, 520,4160, 528,2112, 536,6208, 544,1088, - 552,5184, 560,3136, 568,7232, 584,4672, 592,2624, 600,6720, 608,1600, 616,5696, - 624,3648, 632,7744, 648,4416, 656,2368, 664,6464, 672,1344, 680,5440, 688,3392, - 696,7488, 704,832, 712,4928, 720,2880, 728,6976, 736,1856, 744,5952, 752,3904, - 760,8000, 776,4288, 784,2240, 792,6336, 800,1216, 808,5312, 816,3264, 824,7360, - 840,4800, 848,2752, 856,6848, 864,1728, 872,5824, 880,3776, 888,7872, 904,4544, - 912,2496, 920,6592, 928,1472, 936,5568, 944,3520, 952,7616, 968,5056, 976,3008, - 984,7104, 992,1984, 1000,6080, 1008,4032, 1016,8128, 1032,4128, 1040,2080, - 1048,6176, 1064,5152, 1072,3104, 1080,7200, 1096,4640, 1104,2592, 1112,6688, - 1120,1568, 1128,5664, 1136,3616, 1144,7712, 1160,4384, 1168,2336, 1176,6432, - 1184,1312, 1192,5408, 1200,3360, 1208,7456, 1224,4896, 1232,2848, 1240,6944, - 1248,1824, 1256,5920, 1264,3872, 1272,7968, 1288,4256, 1296,2208, 1304,6304, - 1320,5280, 1328,3232, 1336,7328, 1352,4768, 1360,2720, 1368,6816, 1376,1696, - 1384,5792, 1392,3744, 1400,7840, 1416,4512, 1424,2464, 1432,6560, 1448,5536, - 1456,3488, 1464,7584, 1480,5024, 1488,2976, 1496,7072, 1504,1952, 1512,6048, - 1520,4000, 1528,8096, 1544,4192, 1552,2144, 1560,6240, 1576,5216, 1584,3168, - 1592,7264, 1608,4704, 1616,2656, 1624,6752, 1640,5728, 1648,3680, 1656,7776, - 1672,4448, 1680,2400, 1688,6496, 1704,5472, 1712,3424, 1720,7520, 1736,4960, - 1744,2912, 1752,7008, 1760,1888, 1768,5984, 1776,3936, 1784,8032, 1800,4320, - 1808,2272, 1816,6368, 1832,5344, 1840,3296, 1848,7392, 1864,4832, 1872,2784, - 1880,6880, 1896,5856, 1904,3808, 1912,7904, 1928,4576, 1936,2528, 1944,6624, - 1960,5600, 1968,3552, 1976,7648, 1992,5088, 2000,3040, 2008,7136, 2024,6112, - 2032,4064, 2040,8160, 2056,4112, 2072,6160, 2088,5136, 2096,3088, 2104,7184, - 2120,4624, 2128,2576, 2136,6672, 2152,5648, 2160,3600, 2168,7696, 2184,4368, - 2192,2320, 2200,6416, 2216,5392, 2224,3344, 2232,7440, 2248,4880, 2256,2832, - 2264,6928, 2280,5904, 2288,3856, 2296,7952, 2312,4240, 2328,6288, 2344,5264, - 2352,3216, 2360,7312, 2376,4752, 2384,2704, 2392,6800, 2408,5776, 2416,3728, - 2424,7824, 2440,4496, 2456,6544, 2472,5520, 2480,3472, 2488,7568, 2504,5008, - 2512,2960, 2520,7056, 2536,6032, 2544,3984, 2552,8080, 2568,4176, 2584,6224, - 2600,5200, 2608,3152, 2616,7248, 2632,4688, 2648,6736, 2664,5712, 2672,3664, - 2680,7760, 2696,4432, 2712,6480, 2728,5456, 2736,3408, 2744,7504, 2760,4944, - 2768,2896, 2776,6992, 2792,5968, 2800,3920, 2808,8016, 2824,4304, 2840,6352, - 2856,5328, 2864,3280, 2872,7376, 2888,4816, 2904,6864, 2920,5840, 2928,3792, - 2936,7888, 2952,4560, 2968,6608, 2984,5584, 2992,3536, 3000,7632, 3016,5072, - 3032,7120, 3048,6096, 3056,4048, 3064,8144, 3080,4144, 3096,6192, 3112,5168, - 3128,7216, 3144,4656, 3160,6704, 3176,5680, 3184,3632, 3192,7728, 3208,4400, - 3224,6448, 3240,5424, 3248,3376, 3256,7472, 3272,4912, 3288,6960, 3304,5936, - 3312,3888, 3320,7984, 3336,4272, 3352,6320, 3368,5296, 3384,7344, 3400,4784, - 3416,6832, 3432,5808, 3440,3760, 3448,7856, 3464,4528, 3480,6576, 3496,5552, - 3512,7600, 3528,5040, 3544,7088, 3560,6064, 3568,4016, 3576,8112, 3592,4208, - 3608,6256, 3624,5232, 3640,7280, 3656,4720, 3672,6768, 3688,5744, 3704,7792, - 3720,4464, 3736,6512, 3752,5488, 3768,7536, 3784,4976, 3800,7024, 3816,6000, - 3824,3952, 3832,8048, 3848,4336, 3864,6384, 3880,5360, 3896,7408, 3912,4848, - 3928,6896, 3944,5872, 3960,7920, 3976,4592, 3992,6640, 4008,5616, 4024,7664, - 4040,5104, 4056,7152, 4072,6128, 4088,8176, 4120,6152, 4136,5128, 4152,7176, - 4168,4616, 4184,6664, 4200,5640, 4216,7688, 4232,4360, 4248,6408, 4264,5384, - 4280,7432, 4296,4872, 4312,6920, 4328,5896, 4344,7944, 4376,6280, 4392,5256, - 4408,7304, 4424,4744, 4440,6792, 4456,5768, 4472,7816, 4504,6536, 4520,5512, - 4536,7560, 4552,5000, 4568,7048, 4584,6024, 4600,8072, 4632,6216, 4648,5192, - 4664,7240, 4696,6728, 4712,5704, 4728,7752, 4760,6472, 4776,5448, 4792,7496, - 4808,4936, 4824,6984, 4840,5960, 4856,8008, 4888,6344, 4904,5320, 4920,7368, - 4952,6856, 4968,5832, 4984,7880, 5016,6600, 5032,5576, 5048,7624, 5080,7112, - 5096,6088, 5112,8136, 5144,6184, 5176,7208, 5208,6696, 5224,5672, 5240,7720, - 5272,6440, 5288,5416, 5304,7464, 5336,6952, 5352,5928, 5368,7976, 5400,6312, - 5432,7336, 5464,6824, 5480,5800, 5496,7848, 5528,6568, 5560,7592, 5592,7080, - 5608,6056, 5624,8104, 5656,6248, 5688,7272, 5720,6760, 5752,7784, 5784,6504, - 5816,7528, 5848,7016, 5864,5992, 5880,8040, 5912,6376, 5944,7400, 5976,6888, - 6008,7912, 6040,6632, 6072,7656, 6104,7144, 6136,8168, 6200,7192, 6232,6680, - 6264,7704, 6296,6424, 6328,7448, 6360,6936, 6392,7960, 6456,7320, 6488,6808, - 6520,7832, 6584,7576, 6616,7064, 6648,8088, 6712,7256, 6776,7768, 6840,7512, - 6872,7000, 6904,8024, 6968,7384, 7032,7896, 7096,7640, 7160,8152, 7288,7736, - 7352,7480, 7416,7992, 7544,7864, 7672,8120, 7928,8056 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048) -const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH] = -{ - /* 4x2, size 1984 */ - 8,8192, 16,4096, 24,12288, 32,2048, 40,10240, 48,6144, 56,14336, 64,1024, - 72,9216, 80,5120, 88,13312, 96,3072, 104,11264, 112,7168, 120,15360, 128,512, - 136,8704, 144,4608, 152,12800, 160,2560, 168,10752, 176,6656, 184,14848, - 192,1536, 200,9728, 208,5632, 216,13824, 224,3584, 232,11776, 240,7680, - 248,15872, 264,8448, 272,4352, 280,12544, 288,2304, 296,10496, 304,6400, - 312,14592, 320,1280, 328,9472, 336,5376, 344,13568, 352,3328, 360,11520, - 368,7424, 376,15616, 384,768, 392,8960, 400,4864, 408,13056, 416,2816, - 424,11008, 432,6912, 440,15104, 448,1792, 456,9984, 464,5888, 472,14080, - 480,3840, 488,12032, 496,7936, 504,16128, 520,8320, 528,4224, 536,12416, - 544,2176, 552,10368, 560,6272, 568,14464, 576,1152, 584,9344, 592,5248, - 600,13440, 608,3200, 616,11392, 624,7296, 632,15488, 648,8832, 656,4736, - 664,12928, 672,2688, 680,10880, 688,6784, 696,14976, 704,1664, 712,9856, - 720,5760, 728,13952, 736,3712, 744,11904, 752,7808, 760,16000, 776,8576, - 784,4480, 792,12672, 800,2432, 808,10624, 816,6528, 824,14720, 832,1408, - 840,9600, 848,5504, 856,13696, 864,3456, 872,11648, 880,7552, 888,15744, - 904,9088, 912,4992, 920,13184, 928,2944, 936,11136, 944,7040, 952,15232, - 960,1920, 968,10112, 976,6016, 984,14208, 992,3968, 1000,12160, 1008,8064, - 1016,16256, 1032,8256, 1040,4160, 1048,12352, 1056,2112, 1064,10304, 1072,6208, - 1080,14400, 1096,9280, 1104,5184, 1112,13376, 1120,3136, 1128,11328, 1136,7232, - 1144,15424, 1160,8768, 1168,4672, 1176,12864, 1184,2624, 1192,10816, 1200,6720, - 1208,14912, 1216,1600, 1224,9792, 1232,5696, 1240,13888, 1248,3648, 1256,11840, - 1264,7744, 1272,15936, 1288,8512, 1296,4416, 1304,12608, 1312,2368, 1320,10560, - 1328,6464, 1336,14656, 1352,9536, 1360,5440, 1368,13632, 1376,3392, 1384,11584, - 1392,7488, 1400,15680, 1416,9024, 1424,4928, 1432,13120, 1440,2880, 1448,11072, - 1456,6976, 1464,15168, 1472,1856, 1480,10048, 1488,5952, 1496,14144, 1504,3904, - 1512,12096, 1520,8000, 1528,16192, 1544,8384, 1552,4288, 1560,12480, 1568,2240, - 1576,10432, 1584,6336, 1592,14528, 1608,9408, 1616,5312, 1624,13504, 1632,3264, - 1640,11456, 1648,7360, 1656,15552, 1672,8896, 1680,4800, 1688,12992, 1696,2752, - 1704,10944, 1712,6848, 1720,15040, 1736,9920, 1744,5824, 1752,14016, 1760,3776, - 1768,11968, 1776,7872, 1784,16064, 1800,8640, 1808,4544, 1816,12736, 1824,2496, - 1832,10688, 1840,6592, 1848,14784, 1864,9664, 1872,5568, 1880,13760, 1888,3520, - 1896,11712, 1904,7616, 1912,15808, 1928,9152, 1936,5056, 1944,13248, 1952,3008, - 1960,11200, 1968,7104, 1976,15296, 1992,10176, 2000,6080, 2008,14272, 2016,4032, - 2024,12224, 2032,8128, 2040,16320, 2056,8224, 2064,4128, 2072,12320, 2088,10272, - 2096,6176, 2104,14368, 2120,9248, 2128,5152, 2136,13344, 2144,3104, 2152,11296, - 2160,7200, 2168,15392, 2184,8736, 2192,4640, 2200,12832, 2208,2592, 2216,10784, - 2224,6688, 2232,14880, 2248,9760, 2256,5664, 2264,13856, 2272,3616, 2280,11808, - 2288,7712, 2296,15904, 2312,8480, 2320,4384, 2328,12576, 2344,10528, 2352,6432, - 2360,14624, 2376,9504, 2384,5408, 2392,13600, 2400,3360, 2408,11552, 2416,7456, - 2424,15648, 2440,8992, 2448,4896, 2456,13088, 2464,2848, 2472,11040, 2480,6944, - 2488,15136, 2504,10016, 2512,5920, 2520,14112, 2528,3872, 2536,12064, 2544,7968, - 2552,16160, 2568,8352, 2576,4256, 2584,12448, 2600,10400, 2608,6304, 2616,14496, - 2632,9376, 2640,5280, 2648,13472, 2656,3232, 2664,11424, 2672,7328, 2680,15520, - 2696,8864, 2704,4768, 2712,12960, 2728,10912, 2736,6816, 2744,15008, 2760,9888, - 2768,5792, 2776,13984, 2784,3744, 2792,11936, 2800,7840, 2808,16032, 2824,8608, - 2832,4512, 2840,12704, 2856,10656, 2864,6560, 2872,14752, 2888,9632, 2896,5536, - 2904,13728, 2912,3488, 2920,11680, 2928,7584, 2936,15776, 2952,9120, 2960,5024, - 2968,13216, 2984,11168, 2992,7072, 3000,15264, 3016,10144, 3024,6048, - 3032,14240, 3040,4000, 3048,12192, 3056,8096, 3064,16288, 3080,8288, 3088,4192, - 3096,12384, 3112,10336, 3120,6240, 3128,14432, 3144,9312, 3152,5216, 3160,13408, - 3176,11360, 3184,7264, 3192,15456, 3208,8800, 3216,4704, 3224,12896, 3240,10848, - 3248,6752, 3256,14944, 3272,9824, 3280,5728, 3288,13920, 3296,3680, 3304,11872, - 3312,7776, 3320,15968, 3336,8544, 3344,4448, 3352,12640, 3368,10592, 3376,6496, - 3384,14688, 3400,9568, 3408,5472, 3416,13664, 3432,11616, 3440,7520, 3448,15712, - 3464,9056, 3472,4960, 3480,13152, 3496,11104, 3504,7008, 3512,15200, 3528,10080, - 3536,5984, 3544,14176, 3552,3936, 3560,12128, 3568,8032, 3576,16224, 3592,8416, - 3600,4320, 3608,12512, 3624,10464, 3632,6368, 3640,14560, 3656,9440, 3664,5344, - 3672,13536, 3688,11488, 3696,7392, 3704,15584, 3720,8928, 3728,4832, 3736,13024, - 3752,10976, 3760,6880, 3768,15072, 3784,9952, 3792,5856, 3800,14048, 3816,12000, - 3824,7904, 3832,16096, 3848,8672, 3856,4576, 3864,12768, 3880,10720, 3888,6624, - 3896,14816, 3912,9696, 3920,5600, 3928,13792, 3944,11744, 3952,7648, 3960,15840, - 3976,9184, 3984,5088, 3992,13280, 4008,11232, 4016,7136, 4024,15328, 4040,10208, - 4048,6112, 4056,14304, 4072,12256, 4080,8160, 4088,16352, 4104,8208, 4120,12304, - 4136,10256, 4144,6160, 4152,14352, 4168,9232, 4176,5136, 4184,13328, 4200,11280, - 4208,7184, 4216,15376, 4232,8720, 4240,4624, 4248,12816, 4264,10768, 4272,6672, - 4280,14864, 4296,9744, 4304,5648, 4312,13840, 4328,11792, 4336,7696, 4344,15888, - 4360,8464, 4376,12560, 4392,10512, 4400,6416, 4408,14608, 4424,9488, 4432,5392, - 4440,13584, 4456,11536, 4464,7440, 4472,15632, 4488,8976, 4496,4880, 4504,13072, - 4520,11024, 4528,6928, 4536,15120, 4552,10000, 4560,5904, 4568,14096, - 4584,12048, 4592,7952, 4600,16144, 4616,8336, 4632,12432, 4648,10384, 4656,6288, - 4664,14480, 4680,9360, 4688,5264, 4696,13456, 4712,11408, 4720,7312, 4728,15504, - 4744,8848, 4760,12944, 4776,10896, 4784,6800, 4792,14992, 4808,9872, 4816,5776, - 4824,13968, 4840,11920, 4848,7824, 4856,16016, 4872,8592, 4888,12688, - 4904,10640, 4912,6544, 4920,14736, 4936,9616, 4944,5520, 4952,13712, 4968,11664, - 4976,7568, 4984,15760, 5000,9104, 5016,13200, 5032,11152, 5040,7056, 5048,15248, - 5064,10128, 5072,6032, 5080,14224, 5096,12176, 5104,8080, 5112,16272, 5128,8272, - 5144,12368, 5160,10320, 5168,6224, 5176,14416, 5192,9296, 5208,13392, - 5224,11344, 5232,7248, 5240,15440, 5256,8784, 5272,12880, 5288,10832, 5296,6736, - 5304,14928, 5320,9808, 5328,5712, 5336,13904, 5352,11856, 5360,7760, 5368,15952, - 5384,8528, 5400,12624, 5416,10576, 5424,6480, 5432,14672, 5448,9552, 5464,13648, - 5480,11600, 5488,7504, 5496,15696, 5512,9040, 5528,13136, 5544,11088, 5552,6992, - 5560,15184, 5576,10064, 5584,5968, 5592,14160, 5608,12112, 5616,8016, - 5624,16208, 5640,8400, 5656,12496, 5672,10448, 5680,6352, 5688,14544, 5704,9424, - 5720,13520, 5736,11472, 5744,7376, 5752,15568, 5768,8912, 5784,13008, - 5800,10960, 5808,6864, 5816,15056, 5832,9936, 5848,14032, 5864,11984, 5872,7888, - 5880,16080, 5896,8656, 5912,12752, 5928,10704, 5936,6608, 5944,14800, 5960,9680, - 5976,13776, 5992,11728, 6000,7632, 6008,15824, 6024,9168, 6040,13264, - 6056,11216, 6064,7120, 6072,15312, 6088,10192, 6104,14288, 6120,12240, - 6128,8144, 6136,16336, 6152,8240, 6168,12336, 6184,10288, 6200,14384, 6216,9264, - 6232,13360, 6248,11312, 6256,7216, 6264,15408, 6280,8752, 6296,12848, - 6312,10800, 6320,6704, 6328,14896, 6344,9776, 6360,13872, 6376,11824, 6384,7728, - 6392,15920, 6408,8496, 6424,12592, 6440,10544, 6456,14640, 6472,9520, - 6488,13616, 6504,11568, 6512,7472, 6520,15664, 6536,9008, 6552,13104, - 6568,11056, 6576,6960, 6584,15152, 6600,10032, 6616,14128, 6632,12080, - 6640,7984, 6648,16176, 6664,8368, 6680,12464, 6696,10416, 6712,14512, 6728,9392, - 6744,13488, 6760,11440, 6768,7344, 6776,15536, 6792,8880, 6808,12976, - 6824,10928, 6840,15024, 6856,9904, 6872,14000, 6888,11952, 6896,7856, - 6904,16048, 6920,8624, 6936,12720, 6952,10672, 6968,14768, 6984,9648, - 7000,13744, 7016,11696, 7024,7600, 7032,15792, 7048,9136, 7064,13232, - 7080,11184, 7096,15280, 7112,10160, 7128,14256, 7144,12208, 7152,8112, - 7160,16304, 7176,8304, 7192,12400, 7208,10352, 7224,14448, 7240,9328, - 7256,13424, 7272,11376, 7288,15472, 7304,8816, 7320,12912, 7336,10864, - 7352,14960, 7368,9840, 7384,13936, 7400,11888, 7408,7792, 7416,15984, 7432,8560, - 7448,12656, 7464,10608, 7480,14704, 7496,9584, 7512,13680, 7528,11632, - 7544,15728, 7560,9072, 7576,13168, 7592,11120, 7608,15216, 7624,10096, - 7640,14192, 7656,12144, 7664,8048, 7672,16240, 7688,8432, 7704,12528, - 7720,10480, 7736,14576, 7752,9456, 7768,13552, 7784,11504, 7800,15600, - 7816,8944, 7832,13040, 7848,10992, 7864,15088, 7880,9968, 7896,14064, - 7912,12016, 7928,16112, 7944,8688, 7960,12784, 7976,10736, 7992,14832, - 8008,9712, 8024,13808, 8040,11760, 8056,15856, 8072,9200, 8088,13296, - 8104,11248, 8120,15344, 8136,10224, 8152,14320, 8168,12272, 8184,16368, - 8216,12296, 8232,10248, 8248,14344, 8264,9224, 8280,13320, 8296,11272, - 8312,15368, 8328,8712, 8344,12808, 8360,10760, 8376,14856, 8392,9736, - 8408,13832, 8424,11784, 8440,15880, 8472,12552, 8488,10504, 8504,14600, - 8520,9480, 8536,13576, 8552,11528, 8568,15624, 8584,8968, 8600,13064, - 8616,11016, 8632,15112, 8648,9992, 8664,14088, 8680,12040, 8696,16136, - 8728,12424, 8744,10376, 8760,14472, 8776,9352, 8792,13448, 8808,11400, - 8824,15496, 8856,12936, 8872,10888, 8888,14984, 8904,9864, 8920,13960, - 8936,11912, 8952,16008, 8984,12680, 9000,10632, 9016,14728, 9032,9608, - 9048,13704, 9064,11656, 9080,15752, 9112,13192, 9128,11144, 9144,15240, - 9160,10120, 9176,14216, 9192,12168, 9208,16264, 9240,12360, 9256,10312, - 9272,14408, 9304,13384, 9320,11336, 9336,15432, 9368,12872, 9384,10824, - 9400,14920, 9416,9800, 9432,13896, 9448,11848, 9464,15944, 9496,12616, - 9512,10568, 9528,14664, 9560,13640, 9576,11592, 9592,15688, 9624,13128, - 9640,11080, 9656,15176, 9672,10056, 9688,14152, 9704,12104, 9720,16200, - 9752,12488, 9768,10440, 9784,14536, 9816,13512, 9832,11464, 9848,15560, - 9880,13000, 9896,10952, 9912,15048, 9944,14024, 9960,11976, 9976,16072, - 10008,12744, 10024,10696, 10040,14792, 10072,13768, 10088,11720, 10104,15816, - 10136,13256, 10152,11208, 10168,15304, 10200,14280, 10216,12232, 10232,16328, - 10264,12328, 10296,14376, 10328,13352, 10344,11304, 10360,15400, 10392,12840, - 10408,10792, 10424,14888, 10456,13864, 10472,11816, 10488,15912, 10520,12584, - 10552,14632, 10584,13608, 10600,11560, 10616,15656, 10648,13096, 10664,11048, - 10680,15144, 10712,14120, 10728,12072, 10744,16168, 10776,12456, 10808,14504, - 10840,13480, 10856,11432, 10872,15528, 10904,12968, 10936,15016, 10968,13992, - 10984,11944, 11000,16040, 11032,12712, 11064,14760, 11096,13736, 11112,11688, - 11128,15784, 11160,13224, 11192,15272, 11224,14248, 11240,12200, 11256,16296, - 11288,12392, 11320,14440, 11352,13416, 11384,15464, 11416,12904, 11448,14952, - 11480,13928, 11496,11880, 11512,15976, 11544,12648, 11576,14696, 11608,13672, - 11640,15720, 11672,13160, 11704,15208, 11736,14184, 11752,12136, 11768,16232, - 11800,12520, 11832,14568, 11864,13544, 11896,15592, 11928,13032, 11960,15080, - 11992,14056, 12024,16104, 12056,12776, 12088,14824, 12120,13800, 12152,15848, - 12184,13288, 12216,15336, 12248,14312, 12280,16360, 12344,14360, 12376,13336, - 12408,15384, 12440,12824, 12472,14872, 12504,13848, 12536,15896, 12600,14616, - 12632,13592, 12664,15640, 12696,13080, 12728,15128, 12760,14104, 12792,16152, - 12856,14488, 12888,13464, 12920,15512, 12984,15000, 13016,13976, 13048,16024, - 13112,14744, 13144,13720, 13176,15768, 13240,15256, 13272,14232, 13304,16280, - 13368,14424, 13432,15448, 13496,14936, 13528,13912, 13560,15960, 13624,14680, - 13688,15704, 13752,15192, 13784,14168, 13816,16216, 13880,14552, 13944,15576, - 14008,15064, 14072,16088, 14136,14808, 14200,15832, 14264,15320, 14328,16344, - 14456,15416, 14520,14904, 14584,15928, 14712,15672, 14776,15160, 14840,16184, - 14968,15544, 15096,16056, 15224,15800, 15352,16312, 15608,15992, 15864,16248 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096) -const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH] = -{ - /* radix 4, size 4032 */ - 8,16384, 16,8192, 24,24576, 32,4096, 40,20480, 48,12288, 56,28672, 64,2048, - 72,18432, 80,10240, 88,26624, 96,6144, 104,22528, 112,14336, 120,30720, - 128,1024, 136,17408, 144,9216, 152,25600, 160,5120, 168,21504, 176,13312, - 184,29696, 192,3072, 200,19456, 208,11264, 216,27648, 224,7168, 232,23552, - 240,15360, 248,31744, 256,512, 264,16896, 272,8704, 280,25088, 288,4608, - 296,20992, 304,12800, 312,29184, 320,2560, 328,18944, 336,10752, 344,27136, - 352,6656, 360,23040, 368,14848, 376,31232, 384,1536, 392,17920, 400,9728, - 408,26112, 416,5632, 424,22016, 432,13824, 440,30208, 448,3584, 456,19968, - 464,11776, 472,28160, 480,7680, 488,24064, 496,15872, 504,32256, 520,16640, - 528,8448, 536,24832, 544,4352, 552,20736, 560,12544, 568,28928, 576,2304, - 584,18688, 592,10496, 600,26880, 608,6400, 616,22784, 624,14592, 632,30976, - 640,1280, 648,17664, 656,9472, 664,25856, 672,5376, 680,21760, 688,13568, - 696,29952, 704,3328, 712,19712, 720,11520, 728,27904, 736,7424, 744,23808, - 752,15616, 760,32000, 776,17152, 784,8960, 792,25344, 800,4864, 808,21248, - 816,13056, 824,29440, 832,2816, 840,19200, 848,11008, 856,27392, 864,6912, - 872,23296, 880,15104, 888,31488, 896,1792, 904,18176, 912,9984, 920,26368, - 928,5888, 936,22272, 944,14080, 952,30464, 960,3840, 968,20224, 976,12032, - 984,28416, 992,7936, 1000,24320, 1008,16128, 1016,32512, 1032,16512, 1040,8320, - 1048,24704, 1056,4224, 1064,20608, 1072,12416, 1080,28800, 1088,2176, - 1096,18560, 1104,10368, 1112,26752, 1120,6272, 1128,22656, 1136,14464, - 1144,30848, 1160,17536, 1168,9344, 1176,25728, 1184,5248, 1192,21632, - 1200,13440, 1208,29824, 1216,3200, 1224,19584, 1232,11392, 1240,27776, - 1248,7296, 1256,23680, 1264,15488, 1272,31872, 1288,17024, 1296,8832, - 1304,25216, 1312,4736, 1320,21120, 1328,12928, 1336,29312, 1344,2688, - 1352,19072, 1360,10880, 1368,27264, 1376,6784, 1384,23168, 1392,14976, - 1400,31360, 1408,1664, 1416,18048, 1424,9856, 1432,26240, 1440,5760, 1448,22144, - 1456,13952, 1464,30336, 1472,3712, 1480,20096, 1488,11904, 1496,28288, - 1504,7808, 1512,24192, 1520,16000, 1528,32384, 1544,16768, 1552,8576, - 1560,24960, 1568,4480, 1576,20864, 1584,12672, 1592,29056, 1600,2432, - 1608,18816, 1616,10624, 1624,27008, 1632,6528, 1640,22912, 1648,14720, - 1656,31104, 1672,17792, 1680,9600, 1688,25984, 1696,5504, 1704,21888, - 1712,13696, 1720,30080, 1728,3456, 1736,19840, 1744,11648, 1752,28032, - 1760,7552, 1768,23936, 1776,15744, 1784,32128, 1800,17280, 1808,9088, - 1816,25472, 1824,4992, 1832,21376, 1840,13184, 1848,29568, 1856,2944, - 1864,19328, 1872,11136, 1880,27520, 1888,7040, 1896,23424, 1904,15232, - 1912,31616, 1928,18304, 1936,10112, 1944,26496, 1952,6016, 1960,22400, - 1968,14208, 1976,30592, 1984,3968, 1992,20352, 2000,12160, 2008,28544, - 2016,8064, 2024,24448, 2032,16256, 2040,32640, 2056,16448, 2064,8256, - 2072,24640, 2080,4160, 2088,20544, 2096,12352, 2104,28736, 2120,18496, - 2128,10304, 2136,26688, 2144,6208, 2152,22592, 2160,14400, 2168,30784, - 2184,17472, 2192,9280, 2200,25664, 2208,5184, 2216,21568, 2224,13376, - 2232,29760, 2240,3136, 2248,19520, 2256,11328, 2264,27712, 2272,7232, - 2280,23616, 2288,15424, 2296,31808, 2312,16960, 2320,8768, 2328,25152, - 2336,4672, 2344,21056, 2352,12864, 2360,29248, 2368,2624, 2376,19008, - 2384,10816, 2392,27200, 2400,6720, 2408,23104, 2416,14912, 2424,31296, - 2440,17984, 2448,9792, 2456,26176, 2464,5696, 2472,22080, 2480,13888, - 2488,30272, 2496,3648, 2504,20032, 2512,11840, 2520,28224, 2528,7744, - 2536,24128, 2544,15936, 2552,32320, 2568,16704, 2576,8512, 2584,24896, - 2592,4416, 2600,20800, 2608,12608, 2616,28992, 2632,18752, 2640,10560, - 2648,26944, 2656,6464, 2664,22848, 2672,14656, 2680,31040, 2696,17728, - 2704,9536, 2712,25920, 2720,5440, 2728,21824, 2736,13632, 2744,30016, 2752,3392, - 2760,19776, 2768,11584, 2776,27968, 2784,7488, 2792,23872, 2800,15680, - 2808,32064, 2824,17216, 2832,9024, 2840,25408, 2848,4928, 2856,21312, - 2864,13120, 2872,29504, 2888,19264, 2896,11072, 2904,27456, 2912,6976, - 2920,23360, 2928,15168, 2936,31552, 2952,18240, 2960,10048, 2968,26432, - 2976,5952, 2984,22336, 2992,14144, 3000,30528, 3008,3904, 3016,20288, - 3024,12096, 3032,28480, 3040,8000, 3048,24384, 3056,16192, 3064,32576, - 3080,16576, 3088,8384, 3096,24768, 3104,4288, 3112,20672, 3120,12480, - 3128,28864, 3144,18624, 3152,10432, 3160,26816, 3168,6336, 3176,22720, - 3184,14528, 3192,30912, 3208,17600, 3216,9408, 3224,25792, 3232,5312, - 3240,21696, 3248,13504, 3256,29888, 3272,19648, 3280,11456, 3288,27840, - 3296,7360, 3304,23744, 3312,15552, 3320,31936, 3336,17088, 3344,8896, - 3352,25280, 3360,4800, 3368,21184, 3376,12992, 3384,29376, 3400,19136, - 3408,10944, 3416,27328, 3424,6848, 3432,23232, 3440,15040, 3448,31424, - 3464,18112, 3472,9920, 3480,26304, 3488,5824, 3496,22208, 3504,14016, - 3512,30400, 3520,3776, 3528,20160, 3536,11968, 3544,28352, 3552,7872, - 3560,24256, 3568,16064, 3576,32448, 3592,16832, 3600,8640, 3608,25024, - 3616,4544, 3624,20928, 3632,12736, 3640,29120, 3656,18880, 3664,10688, - 3672,27072, 3680,6592, 3688,22976, 3696,14784, 3704,31168, 3720,17856, - 3728,9664, 3736,26048, 3744,5568, 3752,21952, 3760,13760, 3768,30144, - 3784,19904, 3792,11712, 3800,28096, 3808,7616, 3816,24000, 3824,15808, - 3832,32192, 3848,17344, 3856,9152, 3864,25536, 3872,5056, 3880,21440, - 3888,13248, 3896,29632, 3912,19392, 3920,11200, 3928,27584, 3936,7104, - 3944,23488, 3952,15296, 3960,31680, 3976,18368, 3984,10176, 3992,26560, - 4000,6080, 4008,22464, 4016,14272, 4024,30656, 4040,20416, 4048,12224, - 4056,28608, 4064,8128, 4072,24512, 4080,16320, 4088,32704, 4104,16416, - 4112,8224, 4120,24608, 4136,20512, 4144,12320, 4152,28704, 4168,18464, - 4176,10272, 4184,26656, 4192,6176, 4200,22560, 4208,14368, 4216,30752, - 4232,17440, 4240,9248, 4248,25632, 4256,5152, 4264,21536, 4272,13344, - 4280,29728, 4296,19488, 4304,11296, 4312,27680, 4320,7200, 4328,23584, - 4336,15392, 4344,31776, 4360,16928, 4368,8736, 4376,25120, 4384,4640, - 4392,21024, 4400,12832, 4408,29216, 4424,18976, 4432,10784, 4440,27168, - 4448,6688, 4456,23072, 4464,14880, 4472,31264, 4488,17952, 4496,9760, - 4504,26144, 4512,5664, 4520,22048, 4528,13856, 4536,30240, 4552,20000, - 4560,11808, 4568,28192, 4576,7712, 4584,24096, 4592,15904, 4600,32288, - 4616,16672, 4624,8480, 4632,24864, 4648,20768, 4656,12576, 4664,28960, - 4680,18720, 4688,10528, 4696,26912, 4704,6432, 4712,22816, 4720,14624, - 4728,31008, 4744,17696, 4752,9504, 4760,25888, 4768,5408, 4776,21792, - 4784,13600, 4792,29984, 4808,19744, 4816,11552, 4824,27936, 4832,7456, - 4840,23840, 4848,15648, 4856,32032, 4872,17184, 4880,8992, 4888,25376, - 4904,21280, 4912,13088, 4920,29472, 4936,19232, 4944,11040, 4952,27424, - 4960,6944, 4968,23328, 4976,15136, 4984,31520, 5000,18208, 5008,10016, - 5016,26400, 5024,5920, 5032,22304, 5040,14112, 5048,30496, 5064,20256, - 5072,12064, 5080,28448, 5088,7968, 5096,24352, 5104,16160, 5112,32544, - 5128,16544, 5136,8352, 5144,24736, 5160,20640, 5168,12448, 5176,28832, - 5192,18592, 5200,10400, 5208,26784, 5216,6304, 5224,22688, 5232,14496, - 5240,30880, 5256,17568, 5264,9376, 5272,25760, 5288,21664, 5296,13472, - 5304,29856, 5320,19616, 5328,11424, 5336,27808, 5344,7328, 5352,23712, - 5360,15520, 5368,31904, 5384,17056, 5392,8864, 5400,25248, 5416,21152, - 5424,12960, 5432,29344, 5448,19104, 5456,10912, 5464,27296, 5472,6816, - 5480,23200, 5488,15008, 5496,31392, 5512,18080, 5520,9888, 5528,26272, - 5536,5792, 5544,22176, 5552,13984, 5560,30368, 5576,20128, 5584,11936, - 5592,28320, 5600,7840, 5608,24224, 5616,16032, 5624,32416, 5640,16800, - 5648,8608, 5656,24992, 5672,20896, 5680,12704, 5688,29088, 5704,18848, - 5712,10656, 5720,27040, 5728,6560, 5736,22944, 5744,14752, 5752,31136, - 5768,17824, 5776,9632, 5784,26016, 5800,21920, 5808,13728, 5816,30112, - 5832,19872, 5840,11680, 5848,28064, 5856,7584, 5864,23968, 5872,15776, - 5880,32160, 5896,17312, 5904,9120, 5912,25504, 5928,21408, 5936,13216, - 5944,29600, 5960,19360, 5968,11168, 5976,27552, 5984,7072, 5992,23456, - 6000,15264, 6008,31648, 6024,18336, 6032,10144, 6040,26528, 6056,22432, - 6064,14240, 6072,30624, 6088,20384, 6096,12192, 6104,28576, 6112,8096, - 6120,24480, 6128,16288, 6136,32672, 6152,16480, 6160,8288, 6168,24672, - 6184,20576, 6192,12384, 6200,28768, 6216,18528, 6224,10336, 6232,26720, - 6248,22624, 6256,14432, 6264,30816, 6280,17504, 6288,9312, 6296,25696, - 6312,21600, 6320,13408, 6328,29792, 6344,19552, 6352,11360, 6360,27744, - 6368,7264, 6376,23648, 6384,15456, 6392,31840, 6408,16992, 6416,8800, - 6424,25184, 6440,21088, 6448,12896, 6456,29280, 6472,19040, 6480,10848, - 6488,27232, 6496,6752, 6504,23136, 6512,14944, 6520,31328, 6536,18016, - 6544,9824, 6552,26208, 6568,22112, 6576,13920, 6584,30304, 6600,20064, - 6608,11872, 6616,28256, 6624,7776, 6632,24160, 6640,15968, 6648,32352, - 6664,16736, 6672,8544, 6680,24928, 6696,20832, 6704,12640, 6712,29024, - 6728,18784, 6736,10592, 6744,26976, 6760,22880, 6768,14688, 6776,31072, - 6792,17760, 6800,9568, 6808,25952, 6824,21856, 6832,13664, 6840,30048, - 6856,19808, 6864,11616, 6872,28000, 6880,7520, 6888,23904, 6896,15712, - 6904,32096, 6920,17248, 6928,9056, 6936,25440, 6952,21344, 6960,13152, - 6968,29536, 6984,19296, 6992,11104, 7000,27488, 7016,23392, 7024,15200, - 7032,31584, 7048,18272, 7056,10080, 7064,26464, 7080,22368, 7088,14176, - 7096,30560, 7112,20320, 7120,12128, 7128,28512, 7136,8032, 7144,24416, - 7152,16224, 7160,32608, 7176,16608, 7184,8416, 7192,24800, 7208,20704, - 7216,12512, 7224,28896, 7240,18656, 7248,10464, 7256,26848, 7272,22752, - 7280,14560, 7288,30944, 7304,17632, 7312,9440, 7320,25824, 7336,21728, - 7344,13536, 7352,29920, 7368,19680, 7376,11488, 7384,27872, 7400,23776, - 7408,15584, 7416,31968, 7432,17120, 7440,8928, 7448,25312, 7464,21216, - 7472,13024, 7480,29408, 7496,19168, 7504,10976, 7512,27360, 7528,23264, - 7536,15072, 7544,31456, 7560,18144, 7568,9952, 7576,26336, 7592,22240, - 7600,14048, 7608,30432, 7624,20192, 7632,12000, 7640,28384, 7648,7904, - 7656,24288, 7664,16096, 7672,32480, 7688,16864, 7696,8672, 7704,25056, - 7720,20960, 7728,12768, 7736,29152, 7752,18912, 7760,10720, 7768,27104, - 7784,23008, 7792,14816, 7800,31200, 7816,17888, 7824,9696, 7832,26080, - 7848,21984, 7856,13792, 7864,30176, 7880,19936, 7888,11744, 7896,28128, - 7912,24032, 7920,15840, 7928,32224, 7944,17376, 7952,9184, 7960,25568, - 7976,21472, 7984,13280, 7992,29664, 8008,19424, 8016,11232, 8024,27616, - 8040,23520, 8048,15328, 8056,31712, 8072,18400, 8080,10208, 8088,26592, - 8104,22496, 8112,14304, 8120,30688, 8136,20448, 8144,12256, 8152,28640, - 8168,24544, 8176,16352, 8184,32736, 8200,16400, 8216,24592, 8232,20496, - 8240,12304, 8248,28688, 8264,18448, 8272,10256, 8280,26640, 8296,22544, - 8304,14352, 8312,30736, 8328,17424, 8336,9232, 8344,25616, 8360,21520, - 8368,13328, 8376,29712, 8392,19472, 8400,11280, 8408,27664, 8424,23568, - 8432,15376, 8440,31760, 8456,16912, 8464,8720, 8472,25104, 8488,21008, - 8496,12816, 8504,29200, 8520,18960, 8528,10768, 8536,27152, 8552,23056, - 8560,14864, 8568,31248, 8584,17936, 8592,9744, 8600,26128, 8616,22032, - 8624,13840, 8632,30224, 8648,19984, 8656,11792, 8664,28176, 8680,24080, - 8688,15888, 8696,32272, 8712,16656, 8728,24848, 8744,20752, 8752,12560, - 8760,28944, 8776,18704, 8784,10512, 8792,26896, 8808,22800, 8816,14608, - 8824,30992, 8840,17680, 8848,9488, 8856,25872, 8872,21776, 8880,13584, - 8888,29968, 8904,19728, 8912,11536, 8920,27920, 8936,23824, 8944,15632, - 8952,32016, 8968,17168, 8984,25360, 9000,21264, 9008,13072, 9016,29456, - 9032,19216, 9040,11024, 9048,27408, 9064,23312, 9072,15120, 9080,31504, - 9096,18192, 9104,10000, 9112,26384, 9128,22288, 9136,14096, 9144,30480, - 9160,20240, 9168,12048, 9176,28432, 9192,24336, 9200,16144, 9208,32528, - 9224,16528, 9240,24720, 9256,20624, 9264,12432, 9272,28816, 9288,18576, - 9296,10384, 9304,26768, 9320,22672, 9328,14480, 9336,30864, 9352,17552, - 9368,25744, 9384,21648, 9392,13456, 9400,29840, 9416,19600, 9424,11408, - 9432,27792, 9448,23696, 9456,15504, 9464,31888, 9480,17040, 9496,25232, - 9512,21136, 9520,12944, 9528,29328, 9544,19088, 9552,10896, 9560,27280, - 9576,23184, 9584,14992, 9592,31376, 9608,18064, 9616,9872, 9624,26256, - 9640,22160, 9648,13968, 9656,30352, 9672,20112, 9680,11920, 9688,28304, - 9704,24208, 9712,16016, 9720,32400, 9736,16784, 9752,24976, 9768,20880, - 9776,12688, 9784,29072, 9800,18832, 9808,10640, 9816,27024, 9832,22928, - 9840,14736, 9848,31120, 9864,17808, 9880,26000, 9896,21904, 9904,13712, - 9912,30096, 9928,19856, 9936,11664, 9944,28048, 9960,23952, 9968,15760, - 9976,32144, 9992,17296, 10008,25488, 10024,21392, 10032,13200, 10040,29584, - 10056,19344, 10064,11152, 10072,27536, 10088,23440, 10096,15248, 10104,31632, - 10120,18320, 10136,26512, 10152,22416, 10160,14224, 10168,30608, 10184,20368, - 10192,12176, 10200,28560, 10216,24464, 10224,16272, 10232,32656, 10248,16464, - 10264,24656, 10280,20560, 10288,12368, 10296,28752, 10312,18512, 10328,26704, - 10344,22608, 10352,14416, 10360,30800, 10376,17488, 10392,25680, 10408,21584, - 10416,13392, 10424,29776, 10440,19536, 10448,11344, 10456,27728, 10472,23632, - 10480,15440, 10488,31824, 10504,16976, 10520,25168, 10536,21072, 10544,12880, - 10552,29264, 10568,19024, 10576,10832, 10584,27216, 10600,23120, 10608,14928, - 10616,31312, 10632,18000, 10648,26192, 10664,22096, 10672,13904, 10680,30288, - 10696,20048, 10704,11856, 10712,28240, 10728,24144, 10736,15952, 10744,32336, - 10760,16720, 10776,24912, 10792,20816, 10800,12624, 10808,29008, 10824,18768, - 10840,26960, 10856,22864, 10864,14672, 10872,31056, 10888,17744, 10904,25936, - 10920,21840, 10928,13648, 10936,30032, 10952,19792, 10960,11600, 10968,27984, - 10984,23888, 10992,15696, 11000,32080, 11016,17232, 11032,25424, 11048,21328, - 11056,13136, 11064,29520, 11080,19280, 11096,27472, 11112,23376, 11120,15184, - 11128,31568, 11144,18256, 11160,26448, 11176,22352, 11184,14160, 11192,30544, - 11208,20304, 11216,12112, 11224,28496, 11240,24400, 11248,16208, 11256,32592, - 11272,16592, 11288,24784, 11304,20688, 11312,12496, 11320,28880, 11336,18640, - 11352,26832, 11368,22736, 11376,14544, 11384,30928, 11400,17616, 11416,25808, - 11432,21712, 11440,13520, 11448,29904, 11464,19664, 11480,27856, 11496,23760, - 11504,15568, 11512,31952, 11528,17104, 11544,25296, 11560,21200, 11568,13008, - 11576,29392, 11592,19152, 11608,27344, 11624,23248, 11632,15056, 11640,31440, - 11656,18128, 11672,26320, 11688,22224, 11696,14032, 11704,30416, 11720,20176, - 11728,11984, 11736,28368, 11752,24272, 11760,16080, 11768,32464, 11784,16848, - 11800,25040, 11816,20944, 11824,12752, 11832,29136, 11848,18896, 11864,27088, - 11880,22992, 11888,14800, 11896,31184, 11912,17872, 11928,26064, 11944,21968, - 11952,13776, 11960,30160, 11976,19920, 11992,28112, 12008,24016, 12016,15824, - 12024,32208, 12040,17360, 12056,25552, 12072,21456, 12080,13264, 12088,29648, - 12104,19408, 12120,27600, 12136,23504, 12144,15312, 12152,31696, 12168,18384, - 12184,26576, 12200,22480, 12208,14288, 12216,30672, 12232,20432, 12248,28624, - 12264,24528, 12272,16336, 12280,32720, 12296,16432, 12312,24624, 12328,20528, - 12344,28720, 12360,18480, 12376,26672, 12392,22576, 12400,14384, 12408,30768, - 12424,17456, 12440,25648, 12456,21552, 12464,13360, 12472,29744, 12488,19504, - 12504,27696, 12520,23600, 12528,15408, 12536,31792, 12552,16944, 12568,25136, - 12584,21040, 12592,12848, 12600,29232, 12616,18992, 12632,27184, 12648,23088, - 12656,14896, 12664,31280, 12680,17968, 12696,26160, 12712,22064, 12720,13872, - 12728,30256, 12744,20016, 12760,28208, 12776,24112, 12784,15920, 12792,32304, - 12808,16688, 12824,24880, 12840,20784, 12856,28976, 12872,18736, 12888,26928, - 12904,22832, 12912,14640, 12920,31024, 12936,17712, 12952,25904, 12968,21808, - 12976,13616, 12984,30000, 13000,19760, 13016,27952, 13032,23856, 13040,15664, - 13048,32048, 13064,17200, 13080,25392, 13096,21296, 13112,29488, 13128,19248, - 13144,27440, 13160,23344, 13168,15152, 13176,31536, 13192,18224, 13208,26416, - 13224,22320, 13232,14128, 13240,30512, 13256,20272, 13272,28464, 13288,24368, - 13296,16176, 13304,32560, 13320,16560, 13336,24752, 13352,20656, 13368,28848, - 13384,18608, 13400,26800, 13416,22704, 13424,14512, 13432,30896, 13448,17584, - 13464,25776, 13480,21680, 13496,29872, 13512,19632, 13528,27824, 13544,23728, - 13552,15536, 13560,31920, 13576,17072, 13592,25264, 13608,21168, 13624,29360, - 13640,19120, 13656,27312, 13672,23216, 13680,15024, 13688,31408, 13704,18096, - 13720,26288, 13736,22192, 13744,14000, 13752,30384, 13768,20144, 13784,28336, - 13800,24240, 13808,16048, 13816,32432, 13832,16816, 13848,25008, 13864,20912, - 13880,29104, 13896,18864, 13912,27056, 13928,22960, 13936,14768, 13944,31152, - 13960,17840, 13976,26032, 13992,21936, 14008,30128, 14024,19888, 14040,28080, - 14056,23984, 14064,15792, 14072,32176, 14088,17328, 14104,25520, 14120,21424, - 14136,29616, 14152,19376, 14168,27568, 14184,23472, 14192,15280, 14200,31664, - 14216,18352, 14232,26544, 14248,22448, 14264,30640, 14280,20400, 14296,28592, - 14312,24496, 14320,16304, 14328,32688, 14344,16496, 14360,24688, 14376,20592, - 14392,28784, 14408,18544, 14424,26736, 14440,22640, 14456,30832, 14472,17520, - 14488,25712, 14504,21616, 14520,29808, 14536,19568, 14552,27760, 14568,23664, - 14576,15472, 14584,31856, 14600,17008, 14616,25200, 14632,21104, 14648,29296, - 14664,19056, 14680,27248, 14696,23152, 14704,14960, 14712,31344, 14728,18032, - 14744,26224, 14760,22128, 14776,30320, 14792,20080, 14808,28272, 14824,24176, - 14832,15984, 14840,32368, 14856,16752, 14872,24944, 14888,20848, 14904,29040, - 14920,18800, 14936,26992, 14952,22896, 14968,31088, 14984,17776, 15000,25968, - 15016,21872, 15032,30064, 15048,19824, 15064,28016, 15080,23920, 15088,15728, - 15096,32112, 15112,17264, 15128,25456, 15144,21360, 15160,29552, 15176,19312, - 15192,27504, 15208,23408, 15224,31600, 15240,18288, 15256,26480, 15272,22384, - 15288,30576, 15304,20336, 15320,28528, 15336,24432, 15344,16240, 15352,32624, - 15368,16624, 15384,24816, 15400,20720, 15416,28912, 15432,18672, 15448,26864, - 15464,22768, 15480,30960, 15496,17648, 15512,25840, 15528,21744, 15544,29936, - 15560,19696, 15576,27888, 15592,23792, 15608,31984, 15624,17136, 15640,25328, - 15656,21232, 15672,29424, 15688,19184, 15704,27376, 15720,23280, 15736,31472, - 15752,18160, 15768,26352, 15784,22256, 15800,30448, 15816,20208, 15832,28400, - 15848,24304, 15856,16112, 15864,32496, 15880,16880, 15896,25072, 15912,20976, - 15928,29168, 15944,18928, 15960,27120, 15976,23024, 15992,31216, 16008,17904, - 16024,26096, 16040,22000, 16056,30192, 16072,19952, 16088,28144, 16104,24048, - 16120,32240, 16136,17392, 16152,25584, 16168,21488, 16184,29680, 16200,19440, - 16216,27632, 16232,23536, 16248,31728, 16264,18416, 16280,26608, 16296,22512, - 16312,30704, 16328,20464, 16344,28656, 16360,24560, 16376,32752, 16408,24584, - 16424,20488, 16440,28680, 16456,18440, 16472,26632, 16488,22536, 16504,30728, - 16520,17416, 16536,25608, 16552,21512, 16568,29704, 16584,19464, 16600,27656, - 16616,23560, 16632,31752, 16648,16904, 16664,25096, 16680,21000, 16696,29192, - 16712,18952, 16728,27144, 16744,23048, 16760,31240, 16776,17928, 16792,26120, - 16808,22024, 16824,30216, 16840,19976, 16856,28168, 16872,24072, 16888,32264, - 16920,24840, 16936,20744, 16952,28936, 16968,18696, 16984,26888, 17000,22792, - 17016,30984, 17032,17672, 17048,25864, 17064,21768, 17080,29960, 17096,19720, - 17112,27912, 17128,23816, 17144,32008, 17176,25352, 17192,21256, 17208,29448, - 17224,19208, 17240,27400, 17256,23304, 17272,31496, 17288,18184, 17304,26376, - 17320,22280, 17336,30472, 17352,20232, 17368,28424, 17384,24328, 17400,32520, - 17432,24712, 17448,20616, 17464,28808, 17480,18568, 17496,26760, 17512,22664, - 17528,30856, 17560,25736, 17576,21640, 17592,29832, 17608,19592, 17624,27784, - 17640,23688, 17656,31880, 17688,25224, 17704,21128, 17720,29320, 17736,19080, - 17752,27272, 17768,23176, 17784,31368, 17800,18056, 17816,26248, 17832,22152, - 17848,30344, 17864,20104, 17880,28296, 17896,24200, 17912,32392, 17944,24968, - 17960,20872, 17976,29064, 17992,18824, 18008,27016, 18024,22920, 18040,31112, - 18072,25992, 18088,21896, 18104,30088, 18120,19848, 18136,28040, 18152,23944, - 18168,32136, 18200,25480, 18216,21384, 18232,29576, 18248,19336, 18264,27528, - 18280,23432, 18296,31624, 18328,26504, 18344,22408, 18360,30600, 18376,20360, - 18392,28552, 18408,24456, 18424,32648, 18456,24648, 18472,20552, 18488,28744, - 18520,26696, 18536,22600, 18552,30792, 18584,25672, 18600,21576, 18616,29768, - 18632,19528, 18648,27720, 18664,23624, 18680,31816, 18712,25160, 18728,21064, - 18744,29256, 18760,19016, 18776,27208, 18792,23112, 18808,31304, 18840,26184, - 18856,22088, 18872,30280, 18888,20040, 18904,28232, 18920,24136, 18936,32328, - 18968,24904, 18984,20808, 19000,29000, 19032,26952, 19048,22856, 19064,31048, - 19096,25928, 19112,21832, 19128,30024, 19144,19784, 19160,27976, 19176,23880, - 19192,32072, 19224,25416, 19240,21320, 19256,29512, 19288,27464, 19304,23368, - 19320,31560, 19352,26440, 19368,22344, 19384,30536, 19400,20296, 19416,28488, - 19432,24392, 19448,32584, 19480,24776, 19496,20680, 19512,28872, 19544,26824, - 19560,22728, 19576,30920, 19608,25800, 19624,21704, 19640,29896, 19672,27848, - 19688,23752, 19704,31944, 19736,25288, 19752,21192, 19768,29384, 19800,27336, - 19816,23240, 19832,31432, 19864,26312, 19880,22216, 19896,30408, 19912,20168, - 19928,28360, 19944,24264, 19960,32456, 19992,25032, 20008,20936, 20024,29128, - 20056,27080, 20072,22984, 20088,31176, 20120,26056, 20136,21960, 20152,30152, - 20184,28104, 20200,24008, 20216,32200, 20248,25544, 20264,21448, 20280,29640, - 20312,27592, 20328,23496, 20344,31688, 20376,26568, 20392,22472, 20408,30664, - 20440,28616, 20456,24520, 20472,32712, 20504,24616, 20536,28712, 20568,26664, - 20584,22568, 20600,30760, 20632,25640, 20648,21544, 20664,29736, 20696,27688, - 20712,23592, 20728,31784, 20760,25128, 20776,21032, 20792,29224, 20824,27176, - 20840,23080, 20856,31272, 20888,26152, 20904,22056, 20920,30248, 20952,28200, - 20968,24104, 20984,32296, 21016,24872, 21048,28968, 21080,26920, 21096,22824, - 21112,31016, 21144,25896, 21160,21800, 21176,29992, 21208,27944, 21224,23848, - 21240,32040, 21272,25384, 21304,29480, 21336,27432, 21352,23336, 21368,31528, - 21400,26408, 21416,22312, 21432,30504, 21464,28456, 21480,24360, 21496,32552, - 21528,24744, 21560,28840, 21592,26792, 21608,22696, 21624,30888, 21656,25768, - 21688,29864, 21720,27816, 21736,23720, 21752,31912, 21784,25256, 21816,29352, - 21848,27304, 21864,23208, 21880,31400, 21912,26280, 21928,22184, 21944,30376, - 21976,28328, 21992,24232, 22008,32424, 22040,25000, 22072,29096, 22104,27048, - 22120,22952, 22136,31144, 22168,26024, 22200,30120, 22232,28072, 22248,23976, - 22264,32168, 22296,25512, 22328,29608, 22360,27560, 22376,23464, 22392,31656, - 22424,26536, 22456,30632, 22488,28584, 22504,24488, 22520,32680, 22552,24680, - 22584,28776, 22616,26728, 22648,30824, 22680,25704, 22712,29800, 22744,27752, - 22760,23656, 22776,31848, 22808,25192, 22840,29288, 22872,27240, 22888,23144, - 22904,31336, 22936,26216, 22968,30312, 23000,28264, 23016,24168, 23032,32360, - 23064,24936, 23096,29032, 23128,26984, 23160,31080, 23192,25960, 23224,30056, - 23256,28008, 23272,23912, 23288,32104, 23320,25448, 23352,29544, 23384,27496, - 23416,31592, 23448,26472, 23480,30568, 23512,28520, 23528,24424, 23544,32616, - 23576,24808, 23608,28904, 23640,26856, 23672,30952, 23704,25832, 23736,29928, - 23768,27880, 23800,31976, 23832,25320, 23864,29416, 23896,27368, 23928,31464, - 23960,26344, 23992,30440, 24024,28392, 24040,24296, 24056,32488, 24088,25064, - 24120,29160, 24152,27112, 24184,31208, 24216,26088, 24248,30184, 24280,28136, - 24312,32232, 24344,25576, 24376,29672, 24408,27624, 24440,31720, 24472,26600, - 24504,30696, 24536,28648, 24568,32744, 24632,28696, 24664,26648, 24696,30744, - 24728,25624, 24760,29720, 24792,27672, 24824,31768, 24856,25112, 24888,29208, - 24920,27160, 24952,31256, 24984,26136, 25016,30232, 25048,28184, 25080,32280, - 25144,28952, 25176,26904, 25208,31000, 25240,25880, 25272,29976, 25304,27928, - 25336,32024, 25400,29464, 25432,27416, 25464,31512, 25496,26392, 25528,30488, - 25560,28440, 25592,32536, 25656,28824, 25688,26776, 25720,30872, 25784,29848, - 25816,27800, 25848,31896, 25912,29336, 25944,27288, 25976,31384, 26008,26264, - 26040,30360, 26072,28312, 26104,32408, 26168,29080, 26200,27032, 26232,31128, - 26296,30104, 26328,28056, 26360,32152, 26424,29592, 26456,27544, 26488,31640, - 26552,30616, 26584,28568, 26616,32664, 26680,28760, 26744,30808, 26808,29784, - 26840,27736, 26872,31832, 26936,29272, 26968,27224, 27000,31320, 27064,30296, - 27096,28248, 27128,32344, 27192,29016, 27256,31064, 27320,30040, 27352,27992, - 27384,32088, 27448,29528, 27512,31576, 27576,30552, 27608,28504, 27640,32600, - 27704,28888, 27768,30936, 27832,29912, 27896,31960, 27960,29400, 28024,31448, - 28088,30424, 28120,28376, 28152,32472, 28216,29144, 28280,31192, 28344,30168, - 28408,32216, 28472,29656, 28536,31704, 28600,30680, 28664,32728, 28792,30776, - 28856,29752, 28920,31800, 28984,29240, 29048,31288, 29112,30264, 29176,32312, - 29304,31032, 29368,30008, 29432,32056, 29560,31544, 29624,30520, 29688,32568, - 29816,30904, 29944,31928, 30072,31416, 30136,30392, 30200,32440, 30328,31160, - 30456,32184, 30584,31672, 30712,32696, 30968,31864, 31096,31352, 31224,32376, - 31480,32120, 31736,32632, 32248,32504 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32) -/** - @par - Example code for Double Precision Floating-point RFFT Twiddle factors Generation: - @par - 
TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).'
- @par - Real and Imag values are in interleaved fashion -*/ -const uint64_t twiddleCoefF64_rfft_32[32] = { - 0x0000000000000000, 0x3ff0000000000000, // 0, 1 - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, //0.19509, 0.98079 - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, //0.38268, 0.92388 - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, //0.55557, 0.83147 - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, //0.70711, 0.70711 - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, //0.83147, 0.55557 - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, //0.92388, 0.38268 - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, //0.98079, 0.19509 - 0x3ff0000000000000, 0x0000000000000000, // 1, 0 - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, //0.98079,-0.19509 - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, //0.92388,-0.38268 - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, //0.83147,-0.55557 - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, //0.70711,-0.70711 - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, //0.55557,-0.83147 - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, //0.38268,-0.92388 - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, //0.19509,-0.98079 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64) -const uint64_t twiddleCoefF64_rfft_64[64] = { - 0x0000000000000000, 0x3ff0000000000000, // 0, 1' - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, //0.098017, 0.99518' - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079' - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694' - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388' - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192' - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147' - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301' - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711' - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439' - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557' - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714' - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268' - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028' - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509' - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017' - 0x3ff0000000000000, 0x0000000000000000, // 1, 0' - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518,-0.098017' - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509' - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028' - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268' - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714' - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557' - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439' - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711' - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301' - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147' - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192' - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388' - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694' - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079' - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, //0.098017, -0.99518' -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128) -const uint64_t twiddleCoefF64_rfft_128[128] = { - 0x0000000000000000, 0x3ff0000000000000, // 0, 1' - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, //0.049068, 0.9988' - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, //0.098017, 0.99518' - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918' - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079' - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003' - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694' - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154' - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388' - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399' - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192' - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773' - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147' - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321' - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301' - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095' - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711' - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156' - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439' - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957' - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557' - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141' - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714' - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756' - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268' - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689' - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028' - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298' - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509' - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673' - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017' - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068' - 0x3ff0000000000000, 0x0000000000000000, // 1, 0' - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988,-0.049068' - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518,-0.098017' - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673' - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509' - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298' - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028' - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689' - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268' - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756' - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714' - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141' - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557' - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957' - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439' - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156' - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711' - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095' - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301' - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321' - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147' - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773' - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192' - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399' - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388' - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154' - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694' - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003' - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079' - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918' - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, //0.098017, -0.99518' - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, //0.049068, -0.9988' -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256) -const uint64_t twiddleCoefF64_rfft_256[256] = { - 0x0000000000000000, 0x3ff0000000000000, // 0, 1 - 0x3f992155f7a3667e, 0x3feffd886084cd0d, //0.024541, 0.9997 - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, //0.049068, 0.9988 - 0x3fb2d52092ce19f6, 0x3fefe9cdad01883a, //0.073565, 0.99729 - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, //0.098017, 0.99518 - 0x3fbf564e56a9730e, 0x3fefc26470e19fd3, // 0.12241, 0.99248 - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918 - 0x3fc5e214448b3fc6, 0x3fef8764fa714ba9, // 0.17096, 0.98528 - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079 - 0x3fcc0b826a7e4f63, 0x3fef38f3ac64e589, // 0.2191, 0.9757 - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003 - 0x3fd111d262b1f677, 0x3feed740e7684963, // 0.26671, 0.96378 - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694 - 0x3fd4135c94176602, 0x3fee6288ec48e112, // 0.31368, 0.94953 - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154 - 0x3fd7088530fa459e, 0x3feddb13b6ccc23d, // 0.3599, 0.93299 - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388 - 0x3fd9ef7943a8ed8a, 0x3fed4134d14dc93a, // 0.40524, 0.91421 - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399 - 0x3fdcc66e9931c45d, 0x3fec954b213411f5, // 0.44961, 0.89322 - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192 - 0x3fdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // 0.4929, 0.87009 - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773 - 0x3fe11eb3541b4b22, 0x3feb090a58150200, // 0.535, 0.84485 - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147 - 0x3fe26d054cdd12df, 0x3fea29a7a0462782, // 0.57581, 0.81758 - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321 - 0x3fe3affa292050b9, 0x3fe93a22499263fc, // 0.61523, 0.78835 - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301 - 0x3fe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // 0.65317, 0.75721 - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095 - 0x3fe610b7551d2cde, 0x3fe72d0837efff97, // 0.68954, 0.72425 - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711 - 0x3fe72d0837efff97, 0x3fe610b7551d2cde, // 0.72425, 0.68954 - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156 - 0x3fe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // 0.75721, 0.65317 - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439 - 0x3fe93a22499263fc, 0x3fe3affa292050b9, // 0.78835, 0.61523 - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957 - 0x3fea29a7a0462782, 0x3fe26d054cdd12df, // 0.81758, 0.57581 - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557 - 0x3feb090a58150200, 0x3fe11eb3541b4b22, // 0.84485, 0.535 - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141 - 0x3febd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // 0.87009, 0.4929 - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714 - 0x3fec954b213411f5, 0x3fdcc66e9931c45d, // 0.89322, 0.44961 - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756 - 0x3fed4134d14dc93a, 0x3fd9ef7943a8ed8a, // 0.91421, 0.40524 - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268 - 0x3feddb13b6ccc23d, 0x3fd7088530fa459e, // 0.93299, 0.3599 - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689 - 0x3fee6288ec48e112, 0x3fd4135c94176602, // 0.94953, 0.31368 - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028 - 0x3feed740e7684963, 0x3fd111d262b1f677, // 0.96378, 0.26671 - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298 - 0x3fef38f3ac64e589, 0x3fcc0b826a7e4f63, // 0.9757, 0.2191 - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509 - 0x3fef8764fa714ba9, 0x3fc5e214448b3fc6, // 0.98528, 0.17096 - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673 - 0x3fefc26470e19fd3, 0x3fbf564e56a9730e, // 0.99248, 0.12241 - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017 - 0x3fefe9cdad01883a, 0x3fb2d52092ce19f6, // 0.99729, 0.073565 - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068 - 0x3feffd886084cd0d, 0x3f992155f7a3667e, // 0.9997, 0.024541 - 0x3ff0000000000000, 0x0000000000000000, // 1, 0 - 0x3feffd886084cd0d, 0xbf992155f7a3667e, // 0.9997,-0.024541 - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988,-0.049068 - 0x3fefe9cdad01883a, 0xbfb2d52092ce19f6, // 0.99729,-0.073565 - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518,-0.098017 - 0x3fefc26470e19fd3, 0xbfbf564e56a9730e, // 0.99248, -0.12241 - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673 - 0x3fef8764fa714ba9, 0xbfc5e214448b3fc6, // 0.98528, -0.17096 - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509 - 0x3fef38f3ac64e589, 0xbfcc0b826a7e4f63, // 0.9757, -0.2191 - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298 - 0x3feed740e7684963, 0xbfd111d262b1f677, // 0.96378, -0.26671 - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028 - 0x3fee6288ec48e112, 0xbfd4135c94176602, // 0.94953, -0.31368 - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689 - 0x3feddb13b6ccc23d, 0xbfd7088530fa459e, // 0.93299, -0.3599 - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268 - 0x3fed4134d14dc93a, 0xbfd9ef7943a8ed8a, // 0.91421, -0.40524 - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756 - 0x3fec954b213411f5, 0xbfdcc66e9931c45d, // 0.89322, -0.44961 - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714 - 0x3febd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // 0.87009, -0.4929 - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141 - 0x3feb090a58150200, 0xbfe11eb3541b4b22, // 0.84485, -0.535 - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557 - 0x3fea29a7a0462782, 0xbfe26d054cdd12df, // 0.81758, -0.57581 - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957 - 0x3fe93a22499263fc, 0xbfe3affa292050b9, // 0.78835, -0.61523 - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439 - 0x3fe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // 0.75721, -0.65317 - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156 - 0x3fe72d0837efff97, 0xbfe610b7551d2cde, // 0.72425, -0.68954 - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711 - 0x3fe610b7551d2cde, 0xbfe72d0837efff97, // 0.68954, -0.72425 - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095 - 0x3fe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // 0.65317, -0.75721 - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301 - 0x3fe3affa292050b9, 0xbfe93a22499263fc, // 0.61523, -0.78835 - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321 - 0x3fe26d054cdd12df, 0xbfea29a7a0462782, // 0.57581, -0.81758 - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147 - 0x3fe11eb3541b4b22, 0xbfeb090a58150200, // 0.535, -0.84485 - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773 - 0x3fdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // 0.4929, -0.87009 - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192 - 0x3fdcc66e9931c45d, 0xbfec954b213411f5, // 0.44961, -0.89322 - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399 - 0x3fd9ef7943a8ed8a, 0xbfed4134d14dc93a, // 0.40524, -0.91421 - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388 - 0x3fd7088530fa459e, 0xbfeddb13b6ccc23d, // 0.3599, -0.93299 - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154 - 0x3fd4135c94176602, 0xbfee6288ec48e112, // 0.31368, -0.94953 - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694 - 0x3fd111d262b1f677, 0xbfeed740e7684963, // 0.26671, -0.96378 - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003 - 0x3fcc0b826a7e4f63, 0xbfef38f3ac64e589, // 0.2191, -0.9757 - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079 - 0x3fc5e214448b3fc6, 0xbfef8764fa714ba9, // 0.17096, -0.98528 - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918 - 0x3fbf564e56a9730e, 0xbfefc26470e19fd3, // 0.12241, -0.99248 - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, //0.098017, -0.99518 - 0x3fb2d52092ce19f6, 0xbfefe9cdad01883a, //0.073565, -0.99729 - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, //0.049068, -0.9988' - 0x3f992155f7a3667e, 0xbfeffd886084cd0d, //0.024541, -0.9997 - - -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512) -const uint64_t twiddleCoefF64_rfft_512[512] = { - 0x0000000000000000, 0x3ff0000000000000, // 0, 1' - 0x3f8921d1fcdec784, 0x3fefff62169b92db, //0.012272, 0.99992' - 0x3f992155f7a3667e, 0x3feffd886084cd0d, //0.024541, 0.9997' - 0x3fa2d865759455cd, 0x3feffa72effef75d, //0.036807, 0.99932' - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, //0.049068, 0.9988' - 0x3faf656e79f820e0, 0x3feff095658e71ad, //0.061321, 0.99812' - 0x3fb2d52092ce19f6, 0x3fefe9cdad01883a, //0.073565, 0.99729' - 0x3fb5f6d00a9aa419, 0x3fefe1cafcbd5b09, //0.085797, 0.99631' - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, //0.098017, 0.99518' - 0x3fbc3785c79ec2d5, 0x3fefce15fd6da67b, // 0.11022, 0.99391' - 0x3fbf564e56a9730e, 0x3fefc26470e19fd3, // 0.12241, 0.99248' - 0x3fc139f0cedaf576, 0x3fefb5797195d741, // 0.13458, 0.9909' - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918' - 0x3fc45576b1293e5a, 0x3fef97f924c9099b, // 0.15886, 0.9873' - 0x3fc5e214448b3fc6, 0x3fef8764fa714ba9, // 0.17096, 0.98528' - 0x3fc76dd9de50bf31, 0x3fef7599a3a12077, // 0.18304, 0.98311' - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079' - 0x3fca82a025b00451, 0x3fef4e603b0b2f2d, // 0.20711, 0.97832' - 0x3fcc0b826a7e4f63, 0x3fef38f3ac64e589, // 0.2191, 0.9757' - 0x3fcd934fe5454311, 0x3fef2252f7763ada, // 0.23106, 0.97294' - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003' - 0x3fd04fb80e37fdae, 0x3feef178a3e473c2, // 0.25487, 0.96698' - 0x3fd111d262b1f677, 0x3feed740e7684963, // 0.26671, 0.96378' - 0x3fd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // 0.27852, 0.96043' - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694' - 0x3fd35410c2e18152, 0x3fee817bab4cd10d, // 0.30201, 0.95331' - 0x3fd4135c94176602, 0x3fee6288ec48e112, // 0.31368, 0.94953' - 0x3fd4d1e24278e76a, 0x3fee426a4b2bc17e, // 0.32531, 0.94561' - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154' - 0x3fd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // 0.34842, 0.93734' - 0x3fd7088530fa459e, 0x3feddb13b6ccc23d, // 0.3599, 0.93299' - 0x3fd7c3a9311dcce7, 0x3fedb6526238a09b, // 0.37132, 0.92851' - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388' - 0x3fd9372a63bc93d7, 0x3fed696173c9e68b, // 0.39399, 0.91911' - 0x3fd9ef7943a8ed8a, 0x3fed4134d14dc93a, // 0.40524, 0.91421' - 0x3fdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // 0.41643, 0.90917' - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399' - 0x3fdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // 0.43862, 0.89867' - 0x3fdcc66e9931c45d, 0x3fec954b213411f5, // 0.44961, 0.89322' - 0x3fdd79775b86e389, 0x3fec678b3488739b, // 0.46054, 0.88764' - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192' - 0x3fdedc1952ef78d5, 0x3fec08c426725549, // 0.48218, 0.87607' - 0x3fdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // 0.4929, 0.87009' - 0x3fe01cfc874c3eb7, 0x3feba5aa673590d2, // 0.50354, 0.86397' - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773' - 0x3fe0c9704d5d898f, 0x3feb3e4d3ef55712, // 0.52459, 0.85136' - 0x3fe11eb3541b4b22, 0x3feb090a58150200, // 0.535, 0.84485' - 0x3fe1734d63dedb49, 0x3fead2bc9e21d511, // 0.54532, 0.83822' - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147' - 0x3fe21a799933eb58, 0x3fea63091b02fae2, // 0.56573, 0.82459' - 0x3fe26d054cdd12df, 0x3fea29a7a0462782, // 0.57581, 0.81758' - 0x3fe2bedb25faf3ea, 0x3fe9ef43ef29af94, // 0.5858, 0.81046' - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321' - 0x3fe36058b10659f3, 0x3fe9777ef4c7d742, // 0.60551, 0.79584' - 0x3fe3affa292050b9, 0x3fe93a22499263fc, // 0.61523, 0.78835' - 0x3fe3fed9534556d4, 0x3fe8fbcca3ef940d, // 0.62486, 0.78074' - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301' - 0x3fe49a449b9b0938, 0x3fe87c400fba2ebf, // 0.64383, 0.76517' - 0x3fe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // 0.65317, 0.75721' - 0x3fe5328292a35596, 0x3fe7f8ece3571771, // 0.66242, 0.74914' - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095' - 0x3fe5c77bbe65018c, 0x3fe771e75f037261, // 0.6806, 0.73265' - 0x3fe610b7551d2cde, 0x3fe72d0837efff97, // 0.68954, 0.72425' - 0x3fe6591925f0783e, 0x3fe6e74454eaa8ae, // 0.69838, 0.71573' - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711' - 0x3fe6e74454eaa8ae, 0x3fe6591925f0783e, // 0.71573, 0.69838' - 0x3fe72d0837efff97, 0x3fe610b7551d2cde, // 0.72425, 0.68954' - 0x3fe771e75f037261, 0x3fe5c77bbe65018c, // 0.73265, 0.6806' - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156' - 0x3fe7f8ece3571771, 0x3fe5328292a35596, // 0.74914, 0.66242' - 0x3fe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // 0.75721, 0.65317' - 0x3fe87c400fba2ebf, 0x3fe49a449b9b0938, // 0.76517, 0.64383' - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439' - 0x3fe8fbcca3ef940d, 0x3fe3fed9534556d4, // 0.78074, 0.62486' - 0x3fe93a22499263fc, 0x3fe3affa292050b9, // 0.78835, 0.61523' - 0x3fe9777ef4c7d742, 0x3fe36058b10659f3, // 0.79584, 0.60551' - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957' - 0x3fe9ef43ef29af94, 0x3fe2bedb25faf3ea, // 0.81046, 0.5858' - 0x3fea29a7a0462782, 0x3fe26d054cdd12df, // 0.81758, 0.57581' - 0x3fea63091b02fae2, 0x3fe21a799933eb58, // 0.82459, 0.56573' - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557' - 0x3fead2bc9e21d511, 0x3fe1734d63dedb49, // 0.83822, 0.54532' - 0x3feb090a58150200, 0x3fe11eb3541b4b22, // 0.84485, 0.535' - 0x3feb3e4d3ef55712, 0x3fe0c9704d5d898f, // 0.85136, 0.52459' - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141' - 0x3feba5aa673590d2, 0x3fe01cfc874c3eb7, // 0.86397, 0.50354' - 0x3febd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // 0.87009, 0.4929' - 0x3fec08c426725549, 0x3fdedc1952ef78d5, // 0.87607, 0.48218' - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714' - 0x3fec678b3488739b, 0x3fdd79775b86e389, // 0.88764, 0.46054' - 0x3fec954b213411f5, 0x3fdcc66e9931c45d, // 0.89322, 0.44961' - 0x3fecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // 0.89867, 0.43862' - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756' - 0x3fed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // 0.90917, 0.41643' - 0x3fed4134d14dc93a, 0x3fd9ef7943a8ed8a, // 0.91421, 0.40524' - 0x3fed696173c9e68b, 0x3fd9372a63bc93d7, // 0.91911, 0.39399' - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268' - 0x3fedb6526238a09b, 0x3fd7c3a9311dcce7, // 0.92851, 0.37132' - 0x3feddb13b6ccc23d, 0x3fd7088530fa459e, // 0.93299, 0.3599' - 0x3fedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // 0.93734, 0.34842' - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689' - 0x3fee426a4b2bc17e, 0x3fd4d1e24278e76a, // 0.94561, 0.32531' - 0x3fee6288ec48e112, 0x3fd4135c94176602, // 0.94953, 0.31368' - 0x3fee817bab4cd10d, 0x3fd35410c2e18152, // 0.95331, 0.30201' - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028' - 0x3feebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // 0.96043, 0.27852' - 0x3feed740e7684963, 0x3fd111d262b1f677, // 0.96378, 0.26671' - 0x3feef178a3e473c2, 0x3fd04fb80e37fdae, // 0.96698, 0.25487' - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298' - 0x3fef2252f7763ada, 0x3fcd934fe5454311, // 0.97294, 0.23106' - 0x3fef38f3ac64e589, 0x3fcc0b826a7e4f63, // 0.9757, 0.2191' - 0x3fef4e603b0b2f2d, 0x3fca82a025b00451, // 0.97832, 0.20711' - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509' - 0x3fef7599a3a12077, 0x3fc76dd9de50bf31, // 0.98311, 0.18304' - 0x3fef8764fa714ba9, 0x3fc5e214448b3fc6, // 0.98528, 0.17096' - 0x3fef97f924c9099b, 0x3fc45576b1293e5a, // 0.9873, 0.15886' - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673' - 0x3fefb5797195d741, 0x3fc139f0cedaf576, // 0.9909, 0.13458' - 0x3fefc26470e19fd3, 0x3fbf564e56a9730e, // 0.99248, 0.12241' - 0x3fefce15fd6da67b, 0x3fbc3785c79ec2d5, // 0.99391, 0.11022' - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017' - 0x3fefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // 0.99631, 0.085797' - 0x3fefe9cdad01883a, 0x3fb2d52092ce19f6, // 0.99729, 0.073565' - 0x3feff095658e71ad, 0x3faf656e79f820e0, // 0.99812, 0.061321' - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068' - 0x3feffa72effef75d, 0x3fa2d865759455cd, // 0.99932, 0.036807' - 0x3feffd886084cd0d, 0x3f992155f7a3667e, // 0.9997, 0.024541' - 0x3fefff62169b92db, 0x3f8921d1fcdec784, // 0.99992, 0.012272' - 0x3ff0000000000000, 0x0000000000000000, // 1, 0' - 0x3fefff62169b92db, 0xbf8921d1fcdec784, // 0.99992,-0.012272' - 0x3feffd886084cd0d, 0xbf992155f7a3667e, // 0.9997,-0.024541' - 0x3feffa72effef75d, 0xbfa2d865759455cd, // 0.99932,-0.036807' - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988,-0.049068' - 0x3feff095658e71ad, 0xbfaf656e79f820e0, // 0.99812,-0.061321' - 0x3fefe9cdad01883a, 0xbfb2d52092ce19f6, // 0.99729,-0.073565' - 0x3fefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // 0.99631,-0.085797' - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518,-0.098017' - 0x3fefce15fd6da67b, 0xbfbc3785c79ec2d5, // 0.99391, -0.11022' - 0x3fefc26470e19fd3, 0xbfbf564e56a9730e, // 0.99248, -0.12241' - 0x3fefb5797195d741, 0xbfc139f0cedaf576, // 0.9909, -0.13458' - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673' - 0x3fef97f924c9099b, 0xbfc45576b1293e5a, // 0.9873, -0.15886' - 0x3fef8764fa714ba9, 0xbfc5e214448b3fc6, // 0.98528, -0.17096' - 0x3fef7599a3a12077, 0xbfc76dd9de50bf31, // 0.98311, -0.18304' - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509' - 0x3fef4e603b0b2f2d, 0xbfca82a025b00451, // 0.97832, -0.20711' - 0x3fef38f3ac64e589, 0xbfcc0b826a7e4f63, // 0.9757, -0.2191' - 0x3fef2252f7763ada, 0xbfcd934fe5454311, // 0.97294, -0.23106' - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298' - 0x3feef178a3e473c2, 0xbfd04fb80e37fdae, // 0.96698, -0.25487' - 0x3feed740e7684963, 0xbfd111d262b1f677, // 0.96378, -0.26671' - 0x3feebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // 0.96043, -0.27852' - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028' - 0x3fee817bab4cd10d, 0xbfd35410c2e18152, // 0.95331, -0.30201' - 0x3fee6288ec48e112, 0xbfd4135c94176602, // 0.94953, -0.31368' - 0x3fee426a4b2bc17e, 0xbfd4d1e24278e76a, // 0.94561, -0.32531' - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689' - 0x3fedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // 0.93734, -0.34842' - 0x3feddb13b6ccc23d, 0xbfd7088530fa459e, // 0.93299, -0.3599' - 0x3fedb6526238a09b, 0xbfd7c3a9311dcce7, // 0.92851, -0.37132' - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268' - 0x3fed696173c9e68b, 0xbfd9372a63bc93d7, // 0.91911, -0.39399' - 0x3fed4134d14dc93a, 0xbfd9ef7943a8ed8a, // 0.91421, -0.40524' - 0x3fed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // 0.90917, -0.41643' - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756' - 0x3fecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // 0.89867, -0.43862' - 0x3fec954b213411f5, 0xbfdcc66e9931c45d, // 0.89322, -0.44961' - 0x3fec678b3488739b, 0xbfdd79775b86e389, // 0.88764, -0.46054' - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714' - 0x3fec08c426725549, 0xbfdedc1952ef78d5, // 0.87607, -0.48218' - 0x3febd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // 0.87009, -0.4929' - 0x3feba5aa673590d2, 0xbfe01cfc874c3eb7, // 0.86397, -0.50354' - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141' - 0x3feb3e4d3ef55712, 0xbfe0c9704d5d898f, // 0.85136, -0.52459' - 0x3feb090a58150200, 0xbfe11eb3541b4b22, // 0.84485, -0.535' - 0x3fead2bc9e21d511, 0xbfe1734d63dedb49, // 0.83822, -0.54532' - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557' - 0x3fea63091b02fae2, 0xbfe21a799933eb58, // 0.82459, -0.56573' - 0x3fea29a7a0462782, 0xbfe26d054cdd12df, // 0.81758, -0.57581' - 0x3fe9ef43ef29af94, 0xbfe2bedb25faf3ea, // 0.81046, -0.5858' - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957' - 0x3fe9777ef4c7d742, 0xbfe36058b10659f3, // 0.79584, -0.60551' - 0x3fe93a22499263fc, 0xbfe3affa292050b9, // 0.78835, -0.61523' - 0x3fe8fbcca3ef940d, 0xbfe3fed9534556d4, // 0.78074, -0.62486' - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439' - 0x3fe87c400fba2ebf, 0xbfe49a449b9b0938, // 0.76517, -0.64383' - 0x3fe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // 0.75721, -0.65317' - 0x3fe7f8ece3571771, 0xbfe5328292a35596, // 0.74914, -0.66242' - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156' - 0x3fe771e75f037261, 0xbfe5c77bbe65018c, // 0.73265, -0.6806' - 0x3fe72d0837efff97, 0xbfe610b7551d2cde, // 0.72425, -0.68954' - 0x3fe6e74454eaa8ae, 0xbfe6591925f0783e, // 0.71573, -0.69838' - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711' - 0x3fe6591925f0783e, 0xbfe6e74454eaa8ae, // 0.69838, -0.71573' - 0x3fe610b7551d2cde, 0xbfe72d0837efff97, // 0.68954, -0.72425' - 0x3fe5c77bbe65018c, 0xbfe771e75f037261, // 0.6806, -0.73265' - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095' - 0x3fe5328292a35596, 0xbfe7f8ece3571771, // 0.66242, -0.74914' - 0x3fe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // 0.65317, -0.75721' - 0x3fe49a449b9b0938, 0xbfe87c400fba2ebf, // 0.64383, -0.76517' - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301' - 0x3fe3fed9534556d4, 0xbfe8fbcca3ef940d, // 0.62486, -0.78074' - 0x3fe3affa292050b9, 0xbfe93a22499263fc, // 0.61523, -0.78835' - 0x3fe36058b10659f3, 0xbfe9777ef4c7d742, // 0.60551, -0.79584' - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321' - 0x3fe2bedb25faf3ea, 0xbfe9ef43ef29af94, // 0.5858, -0.81046' - 0x3fe26d054cdd12df, 0xbfea29a7a0462782, // 0.57581, -0.81758' - 0x3fe21a799933eb58, 0xbfea63091b02fae2, // 0.56573, -0.82459' - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147' - 0x3fe1734d63dedb49, 0xbfead2bc9e21d511, // 0.54532, -0.83822' - 0x3fe11eb3541b4b22, 0xbfeb090a58150200, // 0.535, -0.84485' - 0x3fe0c9704d5d898f, 0xbfeb3e4d3ef55712, // 0.52459, -0.85136' - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773' - 0x3fe01cfc874c3eb7, 0xbfeba5aa673590d2, // 0.50354, -0.86397' - 0x3fdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // 0.4929, -0.87009' - 0x3fdedc1952ef78d5, 0xbfec08c426725549, // 0.48218, -0.87607' - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192' - 0x3fdd79775b86e389, 0xbfec678b3488739b, // 0.46054, -0.88764' - 0x3fdcc66e9931c45d, 0xbfec954b213411f5, // 0.44961, -0.89322' - 0x3fdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // 0.43862, -0.89867' - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399' - 0x3fdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // 0.41643, -0.90917' - 0x3fd9ef7943a8ed8a, 0xbfed4134d14dc93a, // 0.40524, -0.91421' - 0x3fd9372a63bc93d7, 0xbfed696173c9e68b, // 0.39399, -0.91911' - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388' - 0x3fd7c3a9311dcce7, 0xbfedb6526238a09b, // 0.37132, -0.92851' - 0x3fd7088530fa459e, 0xbfeddb13b6ccc23d, // 0.3599, -0.93299' - 0x3fd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // 0.34842, -0.93734' - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154' - 0x3fd4d1e24278e76a, 0xbfee426a4b2bc17e, // 0.32531, -0.94561' - 0x3fd4135c94176602, 0xbfee6288ec48e112, // 0.31368, -0.94953' - 0x3fd35410c2e18152, 0xbfee817bab4cd10d, // 0.30201, -0.95331' - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694' - 0x3fd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // 0.27852, -0.96043' - 0x3fd111d262b1f677, 0xbfeed740e7684963, // 0.26671, -0.96378' - 0x3fd04fb80e37fdae, 0xbfeef178a3e473c2, // 0.25487, -0.96698' - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003' - 0x3fcd934fe5454311, 0xbfef2252f7763ada, // 0.23106, -0.97294' - 0x3fcc0b826a7e4f63, 0xbfef38f3ac64e589, // 0.2191, -0.9757' - 0x3fca82a025b00451, 0xbfef4e603b0b2f2d, // 0.20711, -0.97832' - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079' - 0x3fc76dd9de50bf31, 0xbfef7599a3a12077, // 0.18304, -0.98311' - 0x3fc5e214448b3fc6, 0xbfef8764fa714ba9, // 0.17096, -0.98528' - 0x3fc45576b1293e5a, 0xbfef97f924c9099b, // 0.15886, -0.9873' - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918' - 0x3fc139f0cedaf576, 0xbfefb5797195d741, // 0.13458, -0.9909' - 0x3fbf564e56a9730e, 0xbfefc26470e19fd3, // 0.12241, -0.99248' - 0x3fbc3785c79ec2d5, 0xbfefce15fd6da67b, // 0.11022, -0.99391' - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, //0.098017, -0.99518' - 0x3fb5f6d00a9aa419, 0xbfefe1cafcbd5b09, //0.085797, -0.99631' - 0x3fb2d52092ce19f6, 0xbfefe9cdad01883a, //0.073565, -0.99729' - 0x3faf656e79f820e0, 0xbfeff095658e71ad, //0.061321, -0.99812' - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, //0.049068, -0.9988' - 0x3fa2d865759455cd, 0xbfeffa72effef75d, //0.036807, -0.99932' - 0x3f992155f7a3667e, 0xbfeffd886084cd0d, //0.024541, -0.9997' - 0x3f8921d1fcdec784, 0xbfefff62169b92db, //0.012272, -0.99992' - - -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024) -const uint64_t twiddleCoefF64_rfft_1024[1024] = { - 0x0000000000000000, 0x3ff0000000000000, // 0, 1' - 0x3f7921f0fe670071, 0x3fefffd8858e8a92, //0.0061359, 0.99998' - 0x3f8921d1fcdec784, 0x3fefff62169b92db, // 0.012272, 0.99992' - 0x3f92d936bbe30efd, 0x3feffe9cb44b51a1, // 0.018407, 0.99983' - 0x3f992155f7a3667e, 0x3feffd886084cd0d, // 0.024541, 0.9997' - 0x3f9f693731d1cf01, 0x3feffc251df1d3f8, // 0.030675, 0.99953' - 0x3fa2d865759455cd, 0x3feffa72effef75d, // 0.036807, 0.99932' - 0x3fa5fc00d290cd43, 0x3feff871dadb81df, // 0.042938, 0.99908' - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, // 0.049068, 0.9988' - 0x3fac428d12c0d7e3, 0x3feff3830f8d575c, // 0.055195, 0.99848' - 0x3faf656e79f820e0, 0x3feff095658e71ad, // 0.061321, 0.99812' - 0x3fb1440134d709b2, 0x3fefed58ecb673c4, // 0.067444, 0.99772' - 0x3fb2d52092ce19f6, 0x3fefe9cdad01883a, // 0.073565, 0.99729' - 0x3fb4661179272096, 0x3fefe5f3af2e3940, // 0.079682, 0.99682' - 0x3fb5f6d00a9aa419, 0x3fefe1cafcbd5b09, // 0.085797, 0.99631' - 0x3fb787586a5d5b21, 0x3fefdd539ff1f456, // 0.091909, 0.99577' - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, // 0.098017, 0.99518' - 0x3fbaa7b724495c04, 0x3fefd37914220b84, // 0.10412, 0.99456' - 0x3fbc3785c79ec2d5, 0x3fefce15fd6da67b, // 0.11022, 0.99391' - 0x3fbdc70ecbae9fc8, 0x3fefc8646cfeb721, // 0.11632, 0.99321' - 0x3fbf564e56a9730e, 0x3fefc26470e19fd3, // 0.12241, 0.99248' - 0x3fc072a047ba831d, 0x3fefbc1617e44186, // 0.1285, 0.99171' - 0x3fc139f0cedaf576, 0x3fefb5797195d741, // 0.13458, 0.9909' - 0x3fc20116d4ec7bce, 0x3fefae8e8e46cfbb, // 0.14066, 0.99006' - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918' - 0x3fc38edbb0cd8d14, 0x3fef9fce55adb2c8, // 0.1528, 0.98826' - 0x3fc45576b1293e5a, 0x3fef97f924c9099b, // 0.15886, 0.9873' - 0x3fc51bdf8597c5f2, 0x3fef8fd5ffae41db, // 0.16491, 0.98631' - 0x3fc5e214448b3fc6, 0x3fef8764fa714ba9, // 0.17096, 0.98528' - 0x3fc6a81304f64ab2, 0x3fef7ea629e63d6e, // 0.177, 0.98421' - 0x3fc76dd9de50bf31, 0x3fef7599a3a12077, // 0.18304, 0.98311' - 0x3fc83366e89c64c5, 0x3fef6c3f7df5bbb7, // 0.18907, 0.98196' - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079' - 0x3fc9bdcbf2dc4366, 0x3fef58a2b1789e84, // 0.2011, 0.97957' - 0x3fca82a025b00451, 0x3fef4e603b0b2f2d, // 0.20711, 0.97832' - 0x3fcb4732ef3d6722, 0x3fef43d085ff92dd, // 0.21311, 0.97703' - 0x3fcc0b826a7e4f63, 0x3fef38f3ac64e589, // 0.2191, 0.9757' - 0x3fcccf8cb312b286, 0x3fef2dc9c9089a9d, // 0.22508, 0.97434' - 0x3fcd934fe5454311, 0x3fef2252f7763ada, // 0.23106, 0.97294' - 0x3fce56ca1e101a1b, 0x3fef168f53f7205d, // 0.23702, 0.9715' - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003' - 0x3fcfdcdc1adfedf8, 0x3feefe220c0b95ec, // 0.24893, 0.96852' - 0x3fd04fb80e37fdae, 0x3feef178a3e473c2, // 0.25487, 0.96698' - 0x3fd0b0d9cfdbdb90, 0x3feee482e25a9dbc, // 0.26079, 0.96539' - 0x3fd111d262b1f677, 0x3feed740e7684963, // 0.26671, 0.96378' - 0x3fd172a0d7765177, 0x3feec9b2d3c3bf84, // 0.27262, 0.96212' - 0x3fd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // 0.27852, 0.96043' - 0x3fd233bbabc3bb72, 0x3feeadb2e8e7a88e, // 0.28441, 0.9587' - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694' - 0x3fd2f422daec0386, 0x3fee9084361df7f3, // 0.29615, 0.95514' - 0x3fd35410c2e18152, 0x3fee817bab4cd10d, // 0.30201, 0.95331' - 0x3fd3b3cefa0414b7, 0x3fee7227db6a9744, // 0.30785, 0.95144' - 0x3fd4135c94176602, 0x3fee6288ec48e112, // 0.31368, 0.94953' - 0x3fd472b8a5571054, 0x3fee529f04729ffc, // 0.3195, 0.94759' - 0x3fd4d1e24278e76a, 0x3fee426a4b2bc17e, // 0.32531, 0.94561' - 0x3fd530d880af3c24, 0x3fee31eae870ce25, // 0.33111, 0.94359' - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154' - 0x3fd5ee27379ea693, 0x3fee100cca2980ac, // 0.34266, 0.93946' - 0x3fd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // 0.34842, 0.93734' - 0x3fd6aa9d7dc77e16, 0x3feded05f7de47da, // 0.35416, 0.93518' - 0x3fd7088530fa459e, 0x3feddb13b6ccc23d, // 0.3599, 0.93299' - 0x3fd766340f2418f6, 0x3fedc8d7cb410260, // 0.36561, 0.93077' - 0x3fd7c3a9311dcce7, 0x3fedb6526238a09b, // 0.37132, 0.92851' - 0x3fd820e3b04eaac4, 0x3feda383a9668988, // 0.37701, 0.92621' - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388' - 0x3fd8daa52ec8a4af, 0x3fed7d0b02b8ecf9, // 0.38835, 0.92151' - 0x3fd9372a63bc93d7, 0x3fed696173c9e68b, // 0.39399, 0.91911' - 0x3fd993716141bdfe, 0x3fed556f52e93eb1, // 0.39962, 0.91668' - 0x3fd9ef7943a8ed8a, 0x3fed4134d14dc93a, // 0.40524, 0.91421' - 0x3fda4b4127dea1e4, 0x3fed2cb220e0ef9f, // 0.41084, 0.91171' - 0x3fdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // 0.41643, 0.90917' - 0x3fdb020d6c7f4009, 0x3fed02d4feb2bd92, // 0.422, 0.9066' - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399' - 0x3fdbb7cf2304bd01, 0x3fecd7d9898b32f6, // 0.43309, 0.90135' - 0x3fdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // 0.43862, 0.89867' - 0x3fdc6c7f4997000a, 0x3fecabc169a0b901, // 0.44412, 0.89597' - 0x3fdcc66e9931c45d, 0x3fec954b213411f5, // 0.44961, 0.89322' - 0x3fdd2016e8e9db5b, 0x3fec7e8e52233cf3, // 0.45508, 0.89045' - 0x3fdd79775b86e389, 0x3fec678b3488739b, // 0.46054, 0.88764' - 0x3fddd28f1481cc58, 0x3fec5042012b6907, // 0.46598, 0.8848' - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192' - 0x3fde83e0eaf85113, 0x3fec20de3fa971b0, // 0.4768, 0.87901' - 0x3fdedc1952ef78d5, 0x3fec08c426725549, // 0.48218, 0.87607' - 0x3fdf3405963fd068, 0x3febf064e15377dd, // 0.48755, 0.87309' - 0x3fdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // 0.4929, 0.87009' - 0x3fdfe2f64be7120f, 0x3febbed7c49380ea, // 0.49823, 0.86705' - 0x3fe01cfc874c3eb7, 0x3feba5aa673590d2, // 0.50354, 0.86397' - 0x3fe0485626ae221a, 0x3feb8c38d27504e9, // 0.50883, 0.86087' - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773' - 0x3fe09e907417c5e1, 0x3feb5889fe921405, // 0.51936, 0.85456' - 0x3fe0c9704d5d898f, 0x3feb3e4d3ef55712, // 0.52459, 0.85136' - 0x3fe0f426bb2a8e7d, 0x3feb23cd470013b4, // 0.5298, 0.84812' - 0x3fe11eb3541b4b22, 0x3feb090a58150200, // 0.535, 0.84485' - 0x3fe14915af336ceb, 0x3feaee04b43c1474, // 0.54017, 0.84155' - 0x3fe1734d63dedb49, 0x3fead2bc9e21d511, // 0.54532, 0.83822' - 0x3fe19d5a09f2b9b8, 0x3feab7325916c0d4, // 0.55046, 0.83486' - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147' - 0x3fe1f0f08bbc861b, 0x3fea7f58529fe69d, // 0.56066, 0.82805' - 0x3fe21a799933eb58, 0x3fea63091b02fae2, // 0.56573, 0.82459' - 0x3fe243d5fb98ac1f, 0x3fea4678c8119ac8, // 0.57078, 0.8211' - 0x3fe26d054cdd12df, 0x3fea29a7a0462782, // 0.57581, 0.81758' - 0x3fe2960727629ca8, 0x3fea0c95eabaf937, // 0.58081, 0.81404' - 0x3fe2bedb25faf3ea, 0x3fe9ef43ef29af94, // 0.5858, 0.81046' - 0x3fe2e780e3e8ea16, 0x3fe9d1b1f5ea80d6, // 0.59076, 0.80685' - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321' - 0x3fe338400d0c8e57, 0x3fe995cf2ed80d22, // 0.60062, 0.79954' - 0x3fe36058b10659f3, 0x3fe9777ef4c7d742, // 0.60551, 0.79584' - 0x3fe3884185dfeb22, 0x3fe958efe48e6dd7, // 0.61038, 0.79211' - 0x3fe3affa292050b9, 0x3fe93a22499263fc, // 0.61523, 0.78835' - 0x3fe3d78238c58343, 0x3fe91b166fd49da2, // 0.62006, 0.78456' - 0x3fe3fed9534556d4, 0x3fe8fbcca3ef940d, // 0.62486, 0.78074' - 0x3fe425ff178e6bb1, 0x3fe8dc45331698cc, // 0.62964, 0.77689' - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301' - 0x3fe473b51b987347, 0x3fe89c7e9a4dd4ab, // 0.63912, 0.7691' - 0x3fe49a449b9b0938, 0x3fe87c400fba2ebf, // 0.64383, 0.76517' - 0x3fe4c0a145ec0004, 0x3fe85bc51ae958cc, // 0.64851, 0.7612' - 0x3fe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // 0.65317, 0.75721' - 0x3fe50cc09f59a09b, 0x3fe81a1b33b57acc, // 0.65781, 0.75319' - 0x3fe5328292a35596, 0x3fe7f8ece3571771, // 0.66242, 0.74914' - 0x3fe5581038975137, 0x3fe7d7836cc33db2, // 0.667, 0.74506' - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095' - 0x3fe5a28d2a5d7250, 0x3fe79400574f55e4, // 0.67609, 0.73682' - 0x3fe5c77bbe65018c, 0x3fe771e75f037261, // 0.6806, 0.73265' - 0x3fe5ec3495837074, 0x3fe74f948da8d28d, // 0.68508, 0.72846' - 0x3fe610b7551d2cde, 0x3fe72d0837efff97, // 0.68954, 0.72425' - 0x3fe63503a31c1be8, 0x3fe70a42b3176d7a, // 0.69397, 0.72' - 0x3fe6591925f0783e, 0x3fe6e74454eaa8ae, // 0.69838, 0.71573' - 0x3fe67cf78491af10, 0x3fe6c40d73c18275, // 0.70275, 0.71143' - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711' - 0x3fe6c40d73c18275, 0x3fe67cf78491af10, // 0.71143, 0.70275' - 0x3fe6e74454eaa8ae, 0x3fe6591925f0783e, // 0.71573, 0.69838' - 0x3fe70a42b3176d7a, 0x3fe63503a31c1be8, // 0.72, 0.69397' - 0x3fe72d0837efff97, 0x3fe610b7551d2cde, // 0.72425, 0.68954' - 0x3fe74f948da8d28d, 0x3fe5ec3495837074, // 0.72846, 0.68508' - 0x3fe771e75f037261, 0x3fe5c77bbe65018c, // 0.73265, 0.6806' - 0x3fe79400574f55e4, 0x3fe5a28d2a5d7250, // 0.73682, 0.67609' - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156' - 0x3fe7d7836cc33db2, 0x3fe5581038975137, // 0.74506, 0.667' - 0x3fe7f8ece3571771, 0x3fe5328292a35596, // 0.74914, 0.66242' - 0x3fe81a1b33b57acc, 0x3fe50cc09f59a09b, // 0.75319, 0.65781' - 0x3fe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // 0.75721, 0.65317' - 0x3fe85bc51ae958cc, 0x3fe4c0a145ec0004, // 0.7612, 0.64851' - 0x3fe87c400fba2ebf, 0x3fe49a449b9b0938, // 0.76517, 0.64383' - 0x3fe89c7e9a4dd4ab, 0x3fe473b51b987347, // 0.7691, 0.63912' - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439' - 0x3fe8dc45331698cc, 0x3fe425ff178e6bb1, // 0.77689, 0.62964' - 0x3fe8fbcca3ef940d, 0x3fe3fed9534556d4, // 0.78074, 0.62486' - 0x3fe91b166fd49da2, 0x3fe3d78238c58343, // 0.78456, 0.62006' - 0x3fe93a22499263fc, 0x3fe3affa292050b9, // 0.78835, 0.61523' - 0x3fe958efe48e6dd7, 0x3fe3884185dfeb22, // 0.79211, 0.61038' - 0x3fe9777ef4c7d742, 0x3fe36058b10659f3, // 0.79584, 0.60551' - 0x3fe995cf2ed80d22, 0x3fe338400d0c8e57, // 0.79954, 0.60062' - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957' - 0x3fe9d1b1f5ea80d6, 0x3fe2e780e3e8ea16, // 0.80685, 0.59076' - 0x3fe9ef43ef29af94, 0x3fe2bedb25faf3ea, // 0.81046, 0.5858' - 0x3fea0c95eabaf937, 0x3fe2960727629ca8, // 0.81404, 0.58081' - 0x3fea29a7a0462782, 0x3fe26d054cdd12df, // 0.81758, 0.57581' - 0x3fea4678c8119ac8, 0x3fe243d5fb98ac1f, // 0.8211, 0.57078' - 0x3fea63091b02fae2, 0x3fe21a799933eb58, // 0.82459, 0.56573' - 0x3fea7f58529fe69d, 0x3fe1f0f08bbc861b, // 0.82805, 0.56066' - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557' - 0x3feab7325916c0d4, 0x3fe19d5a09f2b9b8, // 0.83486, 0.55046' - 0x3fead2bc9e21d511, 0x3fe1734d63dedb49, // 0.83822, 0.54532' - 0x3feaee04b43c1474, 0x3fe14915af336ceb, // 0.84155, 0.54017' - 0x3feb090a58150200, 0x3fe11eb3541b4b22, // 0.84485, 0.535' - 0x3feb23cd470013b4, 0x3fe0f426bb2a8e7d, // 0.84812, 0.5298' - 0x3feb3e4d3ef55712, 0x3fe0c9704d5d898f, // 0.85136, 0.52459' - 0x3feb5889fe921405, 0x3fe09e907417c5e1, // 0.85456, 0.51936' - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141' - 0x3feb8c38d27504e9, 0x3fe0485626ae221a, // 0.86087, 0.50883' - 0x3feba5aa673590d2, 0x3fe01cfc874c3eb7, // 0.86397, 0.50354' - 0x3febbed7c49380ea, 0x3fdfe2f64be7120f, // 0.86705, 0.49823' - 0x3febd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // 0.87009, 0.4929' - 0x3febf064e15377dd, 0x3fdf3405963fd068, // 0.87309, 0.48755' - 0x3fec08c426725549, 0x3fdedc1952ef78d5, // 0.87607, 0.48218' - 0x3fec20de3fa971b0, 0x3fde83e0eaf85113, // 0.87901, 0.4768' - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714' - 0x3fec5042012b6907, 0x3fddd28f1481cc58, // 0.8848, 0.46598' - 0x3fec678b3488739b, 0x3fdd79775b86e389, // 0.88764, 0.46054' - 0x3fec7e8e52233cf3, 0x3fdd2016e8e9db5b, // 0.89045, 0.45508' - 0x3fec954b213411f5, 0x3fdcc66e9931c45d, // 0.89322, 0.44961' - 0x3fecabc169a0b901, 0x3fdc6c7f4997000a, // 0.89597, 0.44412' - 0x3fecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // 0.89867, 0.43862' - 0x3fecd7d9898b32f6, 0x3fdbb7cf2304bd01, // 0.90135, 0.43309' - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756' - 0x3fed02d4feb2bd92, 0x3fdb020d6c7f4009, // 0.9066, 0.422' - 0x3fed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // 0.90917, 0.41643' - 0x3fed2cb220e0ef9f, 0x3fda4b4127dea1e4, // 0.91171, 0.41084' - 0x3fed4134d14dc93a, 0x3fd9ef7943a8ed8a, // 0.91421, 0.40524' - 0x3fed556f52e93eb1, 0x3fd993716141bdfe, // 0.91668, 0.39962' - 0x3fed696173c9e68b, 0x3fd9372a63bc93d7, // 0.91911, 0.39399' - 0x3fed7d0b02b8ecf9, 0x3fd8daa52ec8a4af, // 0.92151, 0.38835' - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268' - 0x3feda383a9668988, 0x3fd820e3b04eaac4, // 0.92621, 0.37701' - 0x3fedb6526238a09b, 0x3fd7c3a9311dcce7, // 0.92851, 0.37132' - 0x3fedc8d7cb410260, 0x3fd766340f2418f6, // 0.93077, 0.36561' - 0x3feddb13b6ccc23d, 0x3fd7088530fa459e, // 0.93299, 0.3599' - 0x3feded05f7de47da, 0x3fd6aa9d7dc77e16, // 0.93518, 0.35416' - 0x3fedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // 0.93734, 0.34842' - 0x3fee100cca2980ac, 0x3fd5ee27379ea693, // 0.93946, 0.34266' - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689' - 0x3fee31eae870ce25, 0x3fd530d880af3c24, // 0.94359, 0.33111' - 0x3fee426a4b2bc17e, 0x3fd4d1e24278e76a, // 0.94561, 0.32531' - 0x3fee529f04729ffc, 0x3fd472b8a5571054, // 0.94759, 0.3195' - 0x3fee6288ec48e112, 0x3fd4135c94176602, // 0.94953, 0.31368' - 0x3fee7227db6a9744, 0x3fd3b3cefa0414b7, // 0.95144, 0.30785' - 0x3fee817bab4cd10d, 0x3fd35410c2e18152, // 0.95331, 0.30201' - 0x3fee9084361df7f3, 0x3fd2f422daec0386, // 0.95514, 0.29615' - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028' - 0x3feeadb2e8e7a88e, 0x3fd233bbabc3bb72, // 0.9587, 0.28441' - 0x3feebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // 0.96043, 0.27852' - 0x3feec9b2d3c3bf84, 0x3fd172a0d7765177, // 0.96212, 0.27262' - 0x3feed740e7684963, 0x3fd111d262b1f677, // 0.96378, 0.26671' - 0x3feee482e25a9dbc, 0x3fd0b0d9cfdbdb90, // 0.96539, 0.26079' - 0x3feef178a3e473c2, 0x3fd04fb80e37fdae, // 0.96698, 0.25487' - 0x3feefe220c0b95ec, 0x3fcfdcdc1adfedf8, // 0.96852, 0.24893' - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298' - 0x3fef168f53f7205d, 0x3fce56ca1e101a1b, // 0.9715, 0.23702' - 0x3fef2252f7763ada, 0x3fcd934fe5454311, // 0.97294, 0.23106' - 0x3fef2dc9c9089a9d, 0x3fcccf8cb312b286, // 0.97434, 0.22508' - 0x3fef38f3ac64e589, 0x3fcc0b826a7e4f63, // 0.9757, 0.2191' - 0x3fef43d085ff92dd, 0x3fcb4732ef3d6722, // 0.97703, 0.21311' - 0x3fef4e603b0b2f2d, 0x3fca82a025b00451, // 0.97832, 0.20711' - 0x3fef58a2b1789e84, 0x3fc9bdcbf2dc4366, // 0.97957, 0.2011' - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509' - 0x3fef6c3f7df5bbb7, 0x3fc83366e89c64c5, // 0.98196, 0.18907' - 0x3fef7599a3a12077, 0x3fc76dd9de50bf31, // 0.98311, 0.18304' - 0x3fef7ea629e63d6e, 0x3fc6a81304f64ab2, // 0.98421, 0.177' - 0x3fef8764fa714ba9, 0x3fc5e214448b3fc6, // 0.98528, 0.17096' - 0x3fef8fd5ffae41db, 0x3fc51bdf8597c5f2, // 0.98631, 0.16491' - 0x3fef97f924c9099b, 0x3fc45576b1293e5a, // 0.9873, 0.15886' - 0x3fef9fce55adb2c8, 0x3fc38edbb0cd8d14, // 0.98826, 0.1528' - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673' - 0x3fefae8e8e46cfbb, 0x3fc20116d4ec7bce, // 0.99006, 0.14066' - 0x3fefb5797195d741, 0x3fc139f0cedaf576, // 0.9909, 0.13458' - 0x3fefbc1617e44186, 0x3fc072a047ba831d, // 0.99171, 0.1285' - 0x3fefc26470e19fd3, 0x3fbf564e56a9730e, // 0.99248, 0.12241' - 0x3fefc8646cfeb721, 0x3fbdc70ecbae9fc8, // 0.99321, 0.11632' - 0x3fefce15fd6da67b, 0x3fbc3785c79ec2d5, // 0.99391, 0.11022' - 0x3fefd37914220b84, 0x3fbaa7b724495c04, // 0.99456, 0.10412' - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017' - 0x3fefdd539ff1f456, 0x3fb787586a5d5b21, // 0.99577, 0.091909' - 0x3fefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // 0.99631, 0.085797' - 0x3fefe5f3af2e3940, 0x3fb4661179272096, // 0.99682, 0.079682' - 0x3fefe9cdad01883a, 0x3fb2d52092ce19f6, // 0.99729, 0.073565' - 0x3fefed58ecb673c4, 0x3fb1440134d709b2, // 0.99772, 0.067444' - 0x3feff095658e71ad, 0x3faf656e79f820e0, // 0.99812, 0.061321' - 0x3feff3830f8d575c, 0x3fac428d12c0d7e3, // 0.99848, 0.055195' - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068' - 0x3feff871dadb81df, 0x3fa5fc00d290cd43, // 0.99908, 0.042938' - 0x3feffa72effef75d, 0x3fa2d865759455cd, // 0.99932, 0.036807' - 0x3feffc251df1d3f8, 0x3f9f693731d1cf01, // 0.99953, 0.030675' - 0x3feffd886084cd0d, 0x3f992155f7a3667e, // 0.9997, 0.024541' - 0x3feffe9cb44b51a1, 0x3f92d936bbe30efd, // 0.99983, 0.018407' - 0x3fefff62169b92db, 0x3f8921d1fcdec784, // 0.99992, 0.012272' - 0x3fefffd8858e8a92, 0x3f7921f0fe670071, // 0.99998, 0.0061359' - 0x3ff0000000000000, 0x0000000000000000, // 1, 0' - 0x3fefffd8858e8a92, 0xbf7921f0fe670071, // 0.99998,-0.0061359' - 0x3fefff62169b92db, 0xbf8921d1fcdec784, // 0.99992, -0.012272' - 0x3feffe9cb44b51a1, 0xbf92d936bbe30efd, // 0.99983, -0.018407' - 0x3feffd886084cd0d, 0xbf992155f7a3667e, // 0.9997, -0.024541' - 0x3feffc251df1d3f8, 0xbf9f693731d1cf01, // 0.99953, -0.030675' - 0x3feffa72effef75d, 0xbfa2d865759455cd, // 0.99932, -0.036807' - 0x3feff871dadb81df, 0xbfa5fc00d290cd43, // 0.99908, -0.042938' - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988, -0.049068' - 0x3feff3830f8d575c, 0xbfac428d12c0d7e3, // 0.99848, -0.055195' - 0x3feff095658e71ad, 0xbfaf656e79f820e0, // 0.99812, -0.061321' - 0x3fefed58ecb673c4, 0xbfb1440134d709b2, // 0.99772, -0.067444' - 0x3fefe9cdad01883a, 0xbfb2d52092ce19f6, // 0.99729, -0.073565' - 0x3fefe5f3af2e3940, 0xbfb4661179272096, // 0.99682, -0.079682' - 0x3fefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // 0.99631, -0.085797' - 0x3fefdd539ff1f456, 0xbfb787586a5d5b21, // 0.99577, -0.091909' - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518, -0.098017' - 0x3fefd37914220b84, 0xbfbaa7b724495c04, // 0.99456, -0.10412' - 0x3fefce15fd6da67b, 0xbfbc3785c79ec2d5, // 0.99391, -0.11022' - 0x3fefc8646cfeb721, 0xbfbdc70ecbae9fc8, // 0.99321, -0.11632' - 0x3fefc26470e19fd3, 0xbfbf564e56a9730e, // 0.99248, -0.12241' - 0x3fefbc1617e44186, 0xbfc072a047ba831d, // 0.99171, -0.1285' - 0x3fefb5797195d741, 0xbfc139f0cedaf576, // 0.9909, -0.13458' - 0x3fefae8e8e46cfbb, 0xbfc20116d4ec7bce, // 0.99006, -0.14066' - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673' - 0x3fef9fce55adb2c8, 0xbfc38edbb0cd8d14, // 0.98826, -0.1528' - 0x3fef97f924c9099b, 0xbfc45576b1293e5a, // 0.9873, -0.15886' - 0x3fef8fd5ffae41db, 0xbfc51bdf8597c5f2, // 0.98631, -0.16491' - 0x3fef8764fa714ba9, 0xbfc5e214448b3fc6, // 0.98528, -0.17096' - 0x3fef7ea629e63d6e, 0xbfc6a81304f64ab2, // 0.98421, -0.177' - 0x3fef7599a3a12077, 0xbfc76dd9de50bf31, // 0.98311, -0.18304' - 0x3fef6c3f7df5bbb7, 0xbfc83366e89c64c5, // 0.98196, -0.18907' - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509' - 0x3fef58a2b1789e84, 0xbfc9bdcbf2dc4366, // 0.97957, -0.2011' - 0x3fef4e603b0b2f2d, 0xbfca82a025b00451, // 0.97832, -0.20711' - 0x3fef43d085ff92dd, 0xbfcb4732ef3d6722, // 0.97703, -0.21311' - 0x3fef38f3ac64e589, 0xbfcc0b826a7e4f63, // 0.9757, -0.2191' - 0x3fef2dc9c9089a9d, 0xbfcccf8cb312b286, // 0.97434, -0.22508' - 0x3fef2252f7763ada, 0xbfcd934fe5454311, // 0.97294, -0.23106' - 0x3fef168f53f7205d, 0xbfce56ca1e101a1b, // 0.9715, -0.23702' - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298' - 0x3feefe220c0b95ec, 0xbfcfdcdc1adfedf8, // 0.96852, -0.24893' - 0x3feef178a3e473c2, 0xbfd04fb80e37fdae, // 0.96698, -0.25487' - 0x3feee482e25a9dbc, 0xbfd0b0d9cfdbdb90, // 0.96539, -0.26079' - 0x3feed740e7684963, 0xbfd111d262b1f677, // 0.96378, -0.26671' - 0x3feec9b2d3c3bf84, 0xbfd172a0d7765177, // 0.96212, -0.27262' - 0x3feebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // 0.96043, -0.27852' - 0x3feeadb2e8e7a88e, 0xbfd233bbabc3bb72, // 0.9587, -0.28441' - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028' - 0x3fee9084361df7f3, 0xbfd2f422daec0386, // 0.95514, -0.29615' - 0x3fee817bab4cd10d, 0xbfd35410c2e18152, // 0.95331, -0.30201' - 0x3fee7227db6a9744, 0xbfd3b3cefa0414b7, // 0.95144, -0.30785' - 0x3fee6288ec48e112, 0xbfd4135c94176602, // 0.94953, -0.31368' - 0x3fee529f04729ffc, 0xbfd472b8a5571054, // 0.94759, -0.3195' - 0x3fee426a4b2bc17e, 0xbfd4d1e24278e76a, // 0.94561, -0.32531' - 0x3fee31eae870ce25, 0xbfd530d880af3c24, // 0.94359, -0.33111' - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689' - 0x3fee100cca2980ac, 0xbfd5ee27379ea693, // 0.93946, -0.34266' - 0x3fedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // 0.93734, -0.34842' - 0x3feded05f7de47da, 0xbfd6aa9d7dc77e16, // 0.93518, -0.35416' - 0x3feddb13b6ccc23d, 0xbfd7088530fa459e, // 0.93299, -0.3599' - 0x3fedc8d7cb410260, 0xbfd766340f2418f6, // 0.93077, -0.36561' - 0x3fedb6526238a09b, 0xbfd7c3a9311dcce7, // 0.92851, -0.37132' - 0x3feda383a9668988, 0xbfd820e3b04eaac4, // 0.92621, -0.37701' - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268' - 0x3fed7d0b02b8ecf9, 0xbfd8daa52ec8a4af, // 0.92151, -0.38835' - 0x3fed696173c9e68b, 0xbfd9372a63bc93d7, // 0.91911, -0.39399' - 0x3fed556f52e93eb1, 0xbfd993716141bdfe, // 0.91668, -0.39962' - 0x3fed4134d14dc93a, 0xbfd9ef7943a8ed8a, // 0.91421, -0.40524' - 0x3fed2cb220e0ef9f, 0xbfda4b4127dea1e4, // 0.91171, -0.41084' - 0x3fed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // 0.90917, -0.41643' - 0x3fed02d4feb2bd92, 0xbfdb020d6c7f4009, // 0.9066, -0.422' - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756' - 0x3fecd7d9898b32f6, 0xbfdbb7cf2304bd01, // 0.90135, -0.43309' - 0x3fecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // 0.89867, -0.43862' - 0x3fecabc169a0b901, 0xbfdc6c7f4997000a, // 0.89597, -0.44412' - 0x3fec954b213411f5, 0xbfdcc66e9931c45d, // 0.89322, -0.44961' - 0x3fec7e8e52233cf3, 0xbfdd2016e8e9db5b, // 0.89045, -0.45508' - 0x3fec678b3488739b, 0xbfdd79775b86e389, // 0.88764, -0.46054' - 0x3fec5042012b6907, 0xbfddd28f1481cc58, // 0.8848, -0.46598' - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714' - 0x3fec20de3fa971b0, 0xbfde83e0eaf85113, // 0.87901, -0.4768' - 0x3fec08c426725549, 0xbfdedc1952ef78d5, // 0.87607, -0.48218' - 0x3febf064e15377dd, 0xbfdf3405963fd068, // 0.87309, -0.48755' - 0x3febd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // 0.87009, -0.4929' - 0x3febbed7c49380ea, 0xbfdfe2f64be7120f, // 0.86705, -0.49823' - 0x3feba5aa673590d2, 0xbfe01cfc874c3eb7, // 0.86397, -0.50354' - 0x3feb8c38d27504e9, 0xbfe0485626ae221a, // 0.86087, -0.50883' - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141' - 0x3feb5889fe921405, 0xbfe09e907417c5e1, // 0.85456, -0.51936' - 0x3feb3e4d3ef55712, 0xbfe0c9704d5d898f, // 0.85136, -0.52459' - 0x3feb23cd470013b4, 0xbfe0f426bb2a8e7d, // 0.84812, -0.5298' - 0x3feb090a58150200, 0xbfe11eb3541b4b22, // 0.84485, -0.535' - 0x3feaee04b43c1474, 0xbfe14915af336ceb, // 0.84155, -0.54017' - 0x3fead2bc9e21d511, 0xbfe1734d63dedb49, // 0.83822, -0.54532' - 0x3feab7325916c0d4, 0xbfe19d5a09f2b9b8, // 0.83486, -0.55046' - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557' - 0x3fea7f58529fe69d, 0xbfe1f0f08bbc861b, // 0.82805, -0.56066' - 0x3fea63091b02fae2, 0xbfe21a799933eb58, // 0.82459, -0.56573' - 0x3fea4678c8119ac8, 0xbfe243d5fb98ac1f, // 0.8211, -0.57078' - 0x3fea29a7a0462782, 0xbfe26d054cdd12df, // 0.81758, -0.57581' - 0x3fea0c95eabaf937, 0xbfe2960727629ca8, // 0.81404, -0.58081' - 0x3fe9ef43ef29af94, 0xbfe2bedb25faf3ea, // 0.81046, -0.5858' - 0x3fe9d1b1f5ea80d6, 0xbfe2e780e3e8ea16, // 0.80685, -0.59076' - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957' - 0x3fe995cf2ed80d22, 0xbfe338400d0c8e57, // 0.79954, -0.60062' - 0x3fe9777ef4c7d742, 0xbfe36058b10659f3, // 0.79584, -0.60551' - 0x3fe958efe48e6dd7, 0xbfe3884185dfeb22, // 0.79211, -0.61038' - 0x3fe93a22499263fc, 0xbfe3affa292050b9, // 0.78835, -0.61523' - 0x3fe91b166fd49da2, 0xbfe3d78238c58343, // 0.78456, -0.62006' - 0x3fe8fbcca3ef940d, 0xbfe3fed9534556d4, // 0.78074, -0.62486' - 0x3fe8dc45331698cc, 0xbfe425ff178e6bb1, // 0.77689, -0.62964' - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439' - 0x3fe89c7e9a4dd4ab, 0xbfe473b51b987347, // 0.7691, -0.63912' - 0x3fe87c400fba2ebf, 0xbfe49a449b9b0938, // 0.76517, -0.64383' - 0x3fe85bc51ae958cc, 0xbfe4c0a145ec0004, // 0.7612, -0.64851' - 0x3fe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // 0.75721, -0.65317' - 0x3fe81a1b33b57acc, 0xbfe50cc09f59a09b, // 0.75319, -0.65781' - 0x3fe7f8ece3571771, 0xbfe5328292a35596, // 0.74914, -0.66242' - 0x3fe7d7836cc33db2, 0xbfe5581038975137, // 0.74506, -0.667' - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156' - 0x3fe79400574f55e4, 0xbfe5a28d2a5d7250, // 0.73682, -0.67609' - 0x3fe771e75f037261, 0xbfe5c77bbe65018c, // 0.73265, -0.6806' - 0x3fe74f948da8d28d, 0xbfe5ec3495837074, // 0.72846, -0.68508' - 0x3fe72d0837efff97, 0xbfe610b7551d2cde, // 0.72425, -0.68954' - 0x3fe70a42b3176d7a, 0xbfe63503a31c1be8, // 0.72, -0.69397' - 0x3fe6e74454eaa8ae, 0xbfe6591925f0783e, // 0.71573, -0.69838' - 0x3fe6c40d73c18275, 0xbfe67cf78491af10, // 0.71143, -0.70275' - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711' - 0x3fe67cf78491af10, 0xbfe6c40d73c18275, // 0.70275, -0.71143' - 0x3fe6591925f0783e, 0xbfe6e74454eaa8ae, // 0.69838, -0.71573' - 0x3fe63503a31c1be8, 0xbfe70a42b3176d7a, // 0.69397, -0.72' - 0x3fe610b7551d2cde, 0xbfe72d0837efff97, // 0.68954, -0.72425' - 0x3fe5ec3495837074, 0xbfe74f948da8d28d, // 0.68508, -0.72846' - 0x3fe5c77bbe65018c, 0xbfe771e75f037261, // 0.6806, -0.73265' - 0x3fe5a28d2a5d7250, 0xbfe79400574f55e4, // 0.67609, -0.73682' - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095' - 0x3fe5581038975137, 0xbfe7d7836cc33db2, // 0.667, -0.74506' - 0x3fe5328292a35596, 0xbfe7f8ece3571771, // 0.66242, -0.74914' - 0x3fe50cc09f59a09b, 0xbfe81a1b33b57acc, // 0.65781, -0.75319' - 0x3fe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // 0.65317, -0.75721' - 0x3fe4c0a145ec0004, 0xbfe85bc51ae958cc, // 0.64851, -0.7612' - 0x3fe49a449b9b0938, 0xbfe87c400fba2ebf, // 0.64383, -0.76517' - 0x3fe473b51b987347, 0xbfe89c7e9a4dd4ab, // 0.63912, -0.7691' - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301' - 0x3fe425ff178e6bb1, 0xbfe8dc45331698cc, // 0.62964, -0.77689' - 0x3fe3fed9534556d4, 0xbfe8fbcca3ef940d, // 0.62486, -0.78074' - 0x3fe3d78238c58343, 0xbfe91b166fd49da2, // 0.62006, -0.78456' - 0x3fe3affa292050b9, 0xbfe93a22499263fc, // 0.61523, -0.78835' - 0x3fe3884185dfeb22, 0xbfe958efe48e6dd7, // 0.61038, -0.79211' - 0x3fe36058b10659f3, 0xbfe9777ef4c7d742, // 0.60551, -0.79584' - 0x3fe338400d0c8e57, 0xbfe995cf2ed80d22, // 0.60062, -0.79954' - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321' - 0x3fe2e780e3e8ea16, 0xbfe9d1b1f5ea80d6, // 0.59076, -0.80685' - 0x3fe2bedb25faf3ea, 0xbfe9ef43ef29af94, // 0.5858, -0.81046' - 0x3fe2960727629ca8, 0xbfea0c95eabaf937, // 0.58081, -0.81404' - 0x3fe26d054cdd12df, 0xbfea29a7a0462782, // 0.57581, -0.81758' - 0x3fe243d5fb98ac1f, 0xbfea4678c8119ac8, // 0.57078, -0.8211' - 0x3fe21a799933eb58, 0xbfea63091b02fae2, // 0.56573, -0.82459' - 0x3fe1f0f08bbc861b, 0xbfea7f58529fe69d, // 0.56066, -0.82805' - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147' - 0x3fe19d5a09f2b9b8, 0xbfeab7325916c0d4, // 0.55046, -0.83486' - 0x3fe1734d63dedb49, 0xbfead2bc9e21d511, // 0.54532, -0.83822' - 0x3fe14915af336ceb, 0xbfeaee04b43c1474, // 0.54017, -0.84155' - 0x3fe11eb3541b4b22, 0xbfeb090a58150200, // 0.535, -0.84485' - 0x3fe0f426bb2a8e7d, 0xbfeb23cd470013b4, // 0.5298, -0.84812' - 0x3fe0c9704d5d898f, 0xbfeb3e4d3ef55712, // 0.52459, -0.85136' - 0x3fe09e907417c5e1, 0xbfeb5889fe921405, // 0.51936, -0.85456' - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773' - 0x3fe0485626ae221a, 0xbfeb8c38d27504e9, // 0.50883, -0.86087' - 0x3fe01cfc874c3eb7, 0xbfeba5aa673590d2, // 0.50354, -0.86397' - 0x3fdfe2f64be7120f, 0xbfebbed7c49380ea, // 0.49823, -0.86705' - 0x3fdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // 0.4929, -0.87009' - 0x3fdf3405963fd068, 0xbfebf064e15377dd, // 0.48755, -0.87309' - 0x3fdedc1952ef78d5, 0xbfec08c426725549, // 0.48218, -0.87607' - 0x3fde83e0eaf85113, 0xbfec20de3fa971b0, // 0.4768, -0.87901' - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192' - 0x3fddd28f1481cc58, 0xbfec5042012b6907, // 0.46598, -0.8848' - 0x3fdd79775b86e389, 0xbfec678b3488739b, // 0.46054, -0.88764' - 0x3fdd2016e8e9db5b, 0xbfec7e8e52233cf3, // 0.45508, -0.89045' - 0x3fdcc66e9931c45d, 0xbfec954b213411f5, // 0.44961, -0.89322' - 0x3fdc6c7f4997000a, 0xbfecabc169a0b901, // 0.44412, -0.89597' - 0x3fdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // 0.43862, -0.89867' - 0x3fdbb7cf2304bd01, 0xbfecd7d9898b32f6, // 0.43309, -0.90135' - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399' - 0x3fdb020d6c7f4009, 0xbfed02d4feb2bd92, // 0.422, -0.9066' - 0x3fdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // 0.41643, -0.90917' - 0x3fda4b4127dea1e4, 0xbfed2cb220e0ef9f, // 0.41084, -0.91171' - 0x3fd9ef7943a8ed8a, 0xbfed4134d14dc93a, // 0.40524, -0.91421' - 0x3fd993716141bdfe, 0xbfed556f52e93eb1, // 0.39962, -0.91668' - 0x3fd9372a63bc93d7, 0xbfed696173c9e68b, // 0.39399, -0.91911' - 0x3fd8daa52ec8a4af, 0xbfed7d0b02b8ecf9, // 0.38835, -0.92151' - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388' - 0x3fd820e3b04eaac4, 0xbfeda383a9668988, // 0.37701, -0.92621' - 0x3fd7c3a9311dcce7, 0xbfedb6526238a09b, // 0.37132, -0.92851' - 0x3fd766340f2418f6, 0xbfedc8d7cb410260, // 0.36561, -0.93077' - 0x3fd7088530fa459e, 0xbfeddb13b6ccc23d, // 0.3599, -0.93299' - 0x3fd6aa9d7dc77e16, 0xbfeded05f7de47da, // 0.35416, -0.93518' - 0x3fd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // 0.34842, -0.93734' - 0x3fd5ee27379ea693, 0xbfee100cca2980ac, // 0.34266, -0.93946' - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154' - 0x3fd530d880af3c24, 0xbfee31eae870ce25, // 0.33111, -0.94359' - 0x3fd4d1e24278e76a, 0xbfee426a4b2bc17e, // 0.32531, -0.94561' - 0x3fd472b8a5571054, 0xbfee529f04729ffc, // 0.3195, -0.94759' - 0x3fd4135c94176602, 0xbfee6288ec48e112, // 0.31368, -0.94953' - 0x3fd3b3cefa0414b7, 0xbfee7227db6a9744, // 0.30785, -0.95144' - 0x3fd35410c2e18152, 0xbfee817bab4cd10d, // 0.30201, -0.95331' - 0x3fd2f422daec0386, 0xbfee9084361df7f3, // 0.29615, -0.95514' - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694' - 0x3fd233bbabc3bb72, 0xbfeeadb2e8e7a88e, // 0.28441, -0.9587' - 0x3fd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // 0.27852, -0.96043' - 0x3fd172a0d7765177, 0xbfeec9b2d3c3bf84, // 0.27262, -0.96212' - 0x3fd111d262b1f677, 0xbfeed740e7684963, // 0.26671, -0.96378' - 0x3fd0b0d9cfdbdb90, 0xbfeee482e25a9dbc, // 0.26079, -0.96539' - 0x3fd04fb80e37fdae, 0xbfeef178a3e473c2, // 0.25487, -0.96698' - 0x3fcfdcdc1adfedf8, 0xbfeefe220c0b95ec, // 0.24893, -0.96852' - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003' - 0x3fce56ca1e101a1b, 0xbfef168f53f7205d, // 0.23702, -0.9715' - 0x3fcd934fe5454311, 0xbfef2252f7763ada, // 0.23106, -0.97294' - 0x3fcccf8cb312b286, 0xbfef2dc9c9089a9d, // 0.22508, -0.97434' - 0x3fcc0b826a7e4f63, 0xbfef38f3ac64e589, // 0.2191, -0.9757' - 0x3fcb4732ef3d6722, 0xbfef43d085ff92dd, // 0.21311, -0.97703' - 0x3fca82a025b00451, 0xbfef4e603b0b2f2d, // 0.20711, -0.97832' - 0x3fc9bdcbf2dc4366, 0xbfef58a2b1789e84, // 0.2011, -0.97957' - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079' - 0x3fc83366e89c64c5, 0xbfef6c3f7df5bbb7, // 0.18907, -0.98196' - 0x3fc76dd9de50bf31, 0xbfef7599a3a12077, // 0.18304, -0.98311' - 0x3fc6a81304f64ab2, 0xbfef7ea629e63d6e, // 0.177, -0.98421' - 0x3fc5e214448b3fc6, 0xbfef8764fa714ba9, // 0.17096, -0.98528' - 0x3fc51bdf8597c5f2, 0xbfef8fd5ffae41db, // 0.16491, -0.98631' - 0x3fc45576b1293e5a, 0xbfef97f924c9099b, // 0.15886, -0.9873' - 0x3fc38edbb0cd8d14, 0xbfef9fce55adb2c8, // 0.1528, -0.98826' - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918' - 0x3fc20116d4ec7bce, 0xbfefae8e8e46cfbb, // 0.14066, -0.99006' - 0x3fc139f0cedaf576, 0xbfefb5797195d741, // 0.13458, -0.9909' - 0x3fc072a047ba831d, 0xbfefbc1617e44186, // 0.1285, -0.99171' - 0x3fbf564e56a9730e, 0xbfefc26470e19fd3, // 0.12241, -0.99248' - 0x3fbdc70ecbae9fc8, 0xbfefc8646cfeb721, // 0.11632, -0.99321' - 0x3fbc3785c79ec2d5, 0xbfefce15fd6da67b, // 0.11022, -0.99391' - 0x3fbaa7b724495c04, 0xbfefd37914220b84, // 0.10412, -0.99456' - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, // 0.098017, -0.99518' - 0x3fb787586a5d5b21, 0xbfefdd539ff1f456, // 0.091909, -0.99577' - 0x3fb5f6d00a9aa419, 0xbfefe1cafcbd5b09, // 0.085797, -0.99631' - 0x3fb4661179272096, 0xbfefe5f3af2e3940, // 0.079682, -0.99682' - 0x3fb2d52092ce19f6, 0xbfefe9cdad01883a, // 0.073565, -0.99729' - 0x3fb1440134d709b2, 0xbfefed58ecb673c4, // 0.067444, -0.99772' - 0x3faf656e79f820e0, 0xbfeff095658e71ad, // 0.061321, -0.99812' - 0x3fac428d12c0d7e3, 0xbfeff3830f8d575c, // 0.055195, -0.99848' - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, // 0.049068, -0.9988' - 0x3fa5fc00d290cd43, 0xbfeff871dadb81df, // 0.042938, -0.99908' - 0x3fa2d865759455cd, 0xbfeffa72effef75d, // 0.036807, -0.99932' - 0x3f9f693731d1cf01, 0xbfeffc251df1d3f8, // 0.030675, -0.99953' - 0x3f992155f7a3667e, 0xbfeffd886084cd0d, // 0.024541, -0.9997' - 0x3f92d936bbe30efd, 0xbfeffe9cb44b51a1, // 0.018407, -0.99983' - 0x3f8921d1fcdec784, 0xbfefff62169b92db, // 0.012272, -0.99992' - 0x3f7921f0fe670071, 0xbfefffd8858e8a92, //0.0061359, -0.99998' -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048) -const uint64_t twiddleCoefF64_rfft_2048[2048] = { - 0x0000000000000000, 0x3ff0000000000000, // 0, 1 - 0x3f6921f8becca4ba, 0x3feffff621621d02, // 0.003068, 1 - 0x3f7921f0fe670071, 0x3fefffd8858e8a92, //0.0061359, 0.99998 - 0x3f82d96b0e509703, 0x3fefffa72c978c4f, //0.0092038, 0.99996 - 0x3f8921d1fcdec784, 0x3fefff62169b92db, // 0.012272, 0.99992 - 0x3f8f6a296ab997ca, 0x3fefff0943c53bd1, // 0.015339, 0.99988 - 0x3f92d936bbe30efd, 0x3feffe9cb44b51a1, // 0.018407, 0.99983 - 0x3f95fd4d21fab226, 0x3feffe1c6870cb77, // 0.021474, 0.99977 - 0x3f992155f7a3667e, 0x3feffd886084cd0d, // 0.024541, 0.9997 - 0x3f9c454f4ce53b1c, 0x3feffce09ce2a679, // 0.027608, 0.99962 - 0x3f9f693731d1cf01, 0x3feffc251df1d3f8, // 0.030675, 0.99953 - 0x3fa14685db42c17e, 0x3feffb55e425fdae, // 0.033741, 0.99943 - 0x3fa2d865759455cd, 0x3feffa72effef75d, // 0.036807, 0.99932 - 0x3fa46a396ff86179, 0x3feff97c4208c014, // 0.039873, 0.9992 - 0x3fa5fc00d290cd43, 0x3feff871dadb81df, // 0.042938, 0.99908 - 0x3fa78dbaa5874685, 0x3feff753bb1b9164, // 0.046003, 0.99894 - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, // 0.049068, 0.9988 - 0x3faab101bd5f8317, 0x3feff4dc54b1bed3, // 0.052132, 0.99864 - 0x3fac428d12c0d7e3, 0x3feff3830f8d575c, // 0.055195, 0.99848 - 0x3fadd406f9808ec8, 0x3feff21614e131ed, // 0.058258, 0.9983 - 0x3faf656e79f820e0, 0x3feff095658e71ad, // 0.061321, 0.99812 - 0x3fb07b614e463064, 0x3fefef0102826191, // 0.064383, 0.99793 - 0x3fb1440134d709b2, 0x3fefed58ecb673c4, // 0.067444, 0.99772 - 0x3fb20c9674ed444c, 0x3fefeb9d2530410f, // 0.070505, 0.99751 - 0x3fb2d52092ce19f6, 0x3fefe9cdad01883a, // 0.073565, 0.99729 - 0x3fb39d9f12c5a299, 0x3fefe7ea85482d60, // 0.076624, 0.99706 - 0x3fb4661179272096, 0x3fefe5f3af2e3940, // 0.079682, 0.99682 - 0x3fb52e774a4d4d0a, 0x3fefe3e92be9d886, // 0.08274, 0.99657 - 0x3fb5f6d00a9aa419, 0x3fefe1cafcbd5b09, // 0.085797, 0.99631 - 0x3fb6bf1b3e79b129, 0x3fefdf9922f73307, // 0.088854, 0.99604 - 0x3fb787586a5d5b21, 0x3fefdd539ff1f456, // 0.091909, 0.99577 - 0x3fb84f8712c130a0, 0x3fefdafa7514538c, // 0.094963, 0.99548 - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, // 0.098017, 0.99518 - 0x3fb9dfb6eb24a85c, 0x3fefd60d2da75c9e, // 0.10107, 0.99488 - 0x3fbaa7b724495c04, 0x3fefd37914220b84, // 0.10412, 0.99456 - 0x3fbb6fa6ec38f64c, 0x3fefd0d158d86087, // 0.10717, 0.99424 - 0x3fbc3785c79ec2d5, 0x3fefce15fd6da67b, // 0.11022, 0.99391 - 0x3fbcff533b307dc1, 0x3fefcb4703914354, // 0.11327, 0.99356 - 0x3fbdc70ecbae9fc8, 0x3fefc8646cfeb721, // 0.11632, 0.99321 - 0x3fbe8eb7fde4aa3e, 0x3fefc56e3b7d9af6, // 0.11937, 0.99285 - 0x3fbf564e56a9730e, 0x3fefc26470e19fd3, // 0.12241, 0.99248 - 0x3fc00ee8ad6fb85b, 0x3fefbf470f0a8d88, // 0.12545, 0.9921 - 0x3fc072a047ba831d, 0x3fefbc1617e44186, // 0.1285, 0.99171 - 0x3fc0d64dbcb26786, 0x3fefb8d18d66adb7, // 0.13154, 0.99131 - 0x3fc139f0cedaf576, 0x3fefb5797195d741, // 0.13458, 0.9909 - 0x3fc19d8940be24e7, 0x3fefb20dc681d54d, // 0.13762, 0.99049 - 0x3fc20116d4ec7bce, 0x3fefae8e8e46cfbb, // 0.14066, 0.99006 - 0x3fc264994dfd340a, 0x3fefaafbcb0cfddc, // 0.1437, 0.98962 - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918 - 0x3fc32b7bf94516a7, 0x3fefa39bac7a1791, // 0.14976, 0.98872 - 0x3fc38edbb0cd8d14, 0x3fef9fce55adb2c8, // 0.1528, 0.98826 - 0x3fc3f22f57db4893, 0x3fef9bed7cfbde29, // 0.15583, 0.98778 - 0x3fc45576b1293e5a, 0x3fef97f924c9099b, // 0.15886, 0.9873 - 0x3fc4b8b17f79fa88, 0x3fef93f14f85ac08, // 0.16189, 0.98681 - 0x3fc51bdf8597c5f2, 0x3fef8fd5ffae41db, // 0.16491, 0.98631 - 0x3fc57f008654cbde, 0x3fef8ba737cb4b78, // 0.16794, 0.9858 - 0x3fc5e214448b3fc6, 0x3fef8764fa714ba9, // 0.17096, 0.98528 - 0x3fc6451a831d830d, 0x3fef830f4a40c60c, // 0.17398, 0.98475 - 0x3fc6a81304f64ab2, 0x3fef7ea629e63d6e, // 0.177, 0.98421 - 0x3fc70afd8d08c4ff, 0x3fef7a299c1a322a, // 0.18002, 0.98366 - 0x3fc76dd9de50bf31, 0x3fef7599a3a12077, // 0.18304, 0.98311 - 0x3fc7d0a7bbd2cb1b, 0x3fef70f6434b7eb7, // 0.18606, 0.98254 - 0x3fc83366e89c64c5, 0x3fef6c3f7df5bbb7, // 0.18907, 0.98196 - 0x3fc8961727c41804, 0x3fef677556883cee, // 0.19208, 0.98138 - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079 - 0x3fc95b49e9b62af9, 0x3fef5da6ed43685d, // 0.1981, 0.98018 - 0x3fc9bdcbf2dc4366, 0x3fef58a2b1789e84, // 0.2011, 0.97957 - 0x3fca203e1b1831da, 0x3fef538b1faf2d07, // 0.20411, 0.97895 - 0x3fca82a025b00451, 0x3fef4e603b0b2f2d, // 0.20711, 0.97832 - 0x3fcae4f1d5f3b9ab, 0x3fef492206bcabb4, // 0.21011, 0.97768 - 0x3fcb4732ef3d6722, 0x3fef43d085ff92dd, // 0.21311, 0.97703 - 0x3fcba96334f15dad, 0x3fef3e6bbc1bbc65, // 0.21611, 0.97637 - 0x3fcc0b826a7e4f63, 0x3fef38f3ac64e589, // 0.2191, 0.9757 - 0x3fcc6d90535d74dc, 0x3fef33685a3aaef0, // 0.22209, 0.97503 - 0x3fcccf8cb312b286, 0x3fef2dc9c9089a9d, // 0.22508, 0.97434 - 0x3fcd31774d2cbdee, 0x3fef2817fc4609ce, // 0.22807, 0.97364 - 0x3fcd934fe5454311, 0x3fef2252f7763ada, // 0.23106, 0.97294 - 0x3fcdf5163f01099a, 0x3fef1c7abe284708, // 0.23404, 0.97223 - 0x3fce56ca1e101a1b, 0x3fef168f53f7205d, // 0.23702, 0.9715 - 0x3fceb86b462de348, 0x3fef1090bc898f5f, // 0.24, 0.97077 - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003 - 0x3fcf7b7480bd3801, 0x3fef045a14cf738c, // 0.24596, 0.96928 - 0x3fcfdcdc1adfedf8, 0x3feefe220c0b95ec, // 0.24893, 0.96852 - 0x3fd01f1806b9fdd2, 0x3feef7d6e51ca3c0, // 0.2519, 0.96775 - 0x3fd04fb80e37fdae, 0x3feef178a3e473c2, // 0.25487, 0.96698 - 0x3fd0804e05eb661e, 0x3feeeb074c50a544, // 0.25783, 0.96619 - 0x3fd0b0d9cfdbdb90, 0x3feee482e25a9dbc, // 0.26079, 0.96539 - 0x3fd0e15b4e1749cd, 0x3feeddeb6a078651, // 0.26375, 0.96459 - 0x3fd111d262b1f677, 0x3feed740e7684963, // 0.26671, 0.96378 - 0x3fd1423eefc69378, 0x3feed0835e999009, // 0.26967, 0.96295 - 0x3fd172a0d7765177, 0x3feec9b2d3c3bf84, // 0.27262, 0.96212 - 0x3fd1a2f7fbe8f243, 0x3feec2cf4b1af6b2, // 0.27557, 0.96128 - 0x3fd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // 0.27852, 0.96043 - 0x3fd2038583d727bd, 0x3feeb4cf515b8811, // 0.28146, 0.95957 - 0x3fd233bbabc3bb72, 0x3feeadb2e8e7a88e, // 0.28441, 0.9587 - 0x3fd263e6995554ba, 0x3feea68393e65800, // 0.28735, 0.95783 - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694 - 0x3fd2c41a4e954520, 0x3fee97ec36016b30, // 0.29322, 0.95605 - 0x3fd2f422daec0386, 0x3fee9084361df7f3, // 0.29615, 0.95514 - 0x3fd3241fb638baaf, 0x3fee89095bad6025, // 0.29908, 0.95423 - 0x3fd35410c2e18152, 0x3fee817bab4cd10d, // 0.30201, 0.95331 - 0x3fd383f5e353b6aa, 0x3fee79db29a5165a, // 0.30493, 0.95238 - 0x3fd3b3cefa0414b7, 0x3fee7227db6a9744, // 0.30785, 0.95144 - 0x3fd3e39be96ec271, 0x3fee6a61c55d53a7, // 0.31077, 0.95049 - 0x3fd4135c94176602, 0x3fee6288ec48e112, // 0.31368, 0.94953 - 0x3fd44310dc8936f0, 0x3fee5a9d550467d3, // 0.31659, 0.94856 - 0x3fd472b8a5571054, 0x3fee529f04729ffc, // 0.3195, 0.94759 - 0x3fd4a253d11b82f3, 0x3fee4a8dff81ce5e, // 0.32241, 0.9466 - 0x3fd4d1e24278e76a, 0x3fee426a4b2bc17e, // 0.32531, 0.94561 - 0x3fd50163dc197047, 0x3fee3a33ec75ce85, // 0.32821, 0.9446 - 0x3fd530d880af3c24, 0x3fee31eae870ce25, // 0.33111, 0.94359 - 0x3fd5604012f467b4, 0x3fee298f4439197a, // 0.334, 0.94257 - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154 - 0x3fd5bee78b9db3b6, 0x3fee18a02fdc66d9, // 0.33978, 0.94051 - 0x3fd5ee27379ea693, 0x3fee100cca2980ac, // 0.34266, 0.93946 - 0x3fd61d595c88c203, 0x3fee0766d9280f54, // 0.34554, 0.9384 - 0x3fd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // 0.34842, 0.93734 - 0x3fd67b949cad63ca, 0x3fedf5e36a9ba59c, // 0.35129, 0.93627 - 0x3fd6aa9d7dc77e16, 0x3feded05f7de47da, // 0.35416, 0.93518 - 0x3fd6d998638a0cb5, 0x3fede4160f6d8d81, // 0.35703, 0.93409 - 0x3fd7088530fa459e, 0x3feddb13b6ccc23d, // 0.3599, 0.93299 - 0x3fd73763c9261092, 0x3fedd1fef38a915a, // 0.36276, 0.93188 - 0x3fd766340f2418f6, 0x3fedc8d7cb410260, // 0.36561, 0.93077 - 0x3fd794f5e613dfae, 0x3fedbf9e4395759a, // 0.36847, 0.92964 - 0x3fd7c3a9311dcce7, 0x3fedb6526238a09b, // 0.37132, 0.92851 - 0x3fd7f24dd37341e3, 0x3fedacf42ce68ab9, // 0.37416, 0.92736 - 0x3fd820e3b04eaac4, 0x3feda383a9668988, // 0.37701, 0.92621 - 0x3fd84f6aaaf3903f, 0x3fed9a00dd8b3d46, // 0.37985, 0.92505 - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388 - 0x3fd8ac4b86d5ed44, 0x3fed86c48445a450, // 0.38552, 0.9227 - 0x3fd8daa52ec8a4af, 0x3fed7d0b02b8ecf9, // 0.38835, 0.92151 - 0x3fd908ef81ef7bd1, 0x3fed733f508c0dff, // 0.39117, 0.92032 - 0x3fd9372a63bc93d7, 0x3fed696173c9e68b, // 0.39399, 0.91911 - 0x3fd96555b7ab948f, 0x3fed5f7172888a7f, // 0.39681, 0.9179 - 0x3fd993716141bdfe, 0x3fed556f52e93eb1, // 0.39962, 0.91668 - 0x3fd9c17d440df9f2, 0x3fed4b5b1b187524, // 0.40243, 0.91545 - 0x3fd9ef7943a8ed8a, 0x3fed4134d14dc93a, // 0.40524, 0.91421 - 0x3fda1d6543b50ac0, 0x3fed36fc7bcbfbdc, // 0.40804, 0.91296 - 0x3fda4b4127dea1e4, 0x3fed2cb220e0ef9f, // 0.41084, 0.91171 - 0x3fda790cd3dbf31a, 0x3fed2255c6e5a4e1, // 0.41364, 0.91044 - 0x3fdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // 0.41643, 0.90917 - 0x3fdad473125cdc08, 0x3fed0d672f59d2b9, // 0.41922, 0.90789 - 0x3fdb020d6c7f4009, 0x3fed02d4feb2bd92, // 0.422, 0.9066 - 0x3fdb2f971db31972, 0x3fecf830e8ce467b, // 0.42478, 0.9053 - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399 - 0x3fdb8a7814fd5693, 0x3fece2b32799a060, // 0.43033, 0.90267 - 0x3fdbb7cf2304bd01, 0x3fecd7d9898b32f6, // 0.43309, 0.90135 - 0x3fdbe51517ffc0d9, 0x3fecccee20c2de9f, // 0.43586, 0.90002 - 0x3fdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // 0.43862, 0.89867 - 0x3fdc3f6d47263129, 0x3fecb6e20a00da99, // 0.44137, 0.89732 - 0x3fdc6c7f4997000a, 0x3fecabc169a0b901, // 0.44412, 0.89597 - 0x3fdc997fc3865388, 0x3feca08f19b9c449, // 0.44687, 0.8946 - 0x3fdcc66e9931c45d, 0x3fec954b213411f5, // 0.44961, 0.89322 - 0x3fdcf34baee1cd21, 0x3fec89f587029c13, // 0.45235, 0.89184 - 0x3fdd2016e8e9db5b, 0x3fec7e8e52233cf3, // 0.45508, 0.89045 - 0x3fdd4cd02ba8609c, 0x3fec7315899eaad7, // 0.45781, 0.88905 - 0x3fdd79775b86e389, 0x3fec678b3488739b, // 0.46054, 0.88764 - 0x3fdda60c5cfa10d8, 0x3fec5bef59fef85a, // 0.46326, 0.88622 - 0x3fddd28f1481cc58, 0x3fec5042012b6907, // 0.46598, 0.8848 - 0x3fddfeff66a941de, 0x3fec44833141c004, // 0.46869, 0.88336 - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192 - 0x3fde57a86d3cd824, 0x3fec2cd14931e3f1, // 0.4741, 0.88047 - 0x3fde83e0eaf85113, 0x3fec20de3fa971b0, // 0.4768, 0.87901 - 0x3fdeb00695f25620, 0x3fec14d9dc465e58, // 0.47949, 0.87755 - 0x3fdedc1952ef78d5, 0x3fec08c426725549, // 0.48218, 0.87607 - 0x3fdf081906bff7fd, 0x3febfc9d25a1b147, // 0.48487, 0.87459 - 0x3fdf3405963fd068, 0x3febf064e15377dd, // 0.48755, 0.87309 - 0x3fdf5fdee656cda3, 0x3febe41b611154c1, // 0.49023, 0.8716 - 0x3fdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // 0.4929, 0.87009 - 0x3fdfb7575c24d2de, 0x3febcb54cb0d2327, // 0.49557, 0.86857 - 0x3fdfe2f64be7120f, 0x3febbed7c49380ea, // 0.49823, 0.86705 - 0x3fe00740c82b82e0, 0x3febb249a0b6c40d, // 0.50089, 0.86551 - 0x3fe01cfc874c3eb7, 0x3feba5aa673590d2, // 0.50354, 0.86397 - 0x3fe032ae55edbd95, 0x3feb98fa1fd9155e, // 0.50619, 0.86242 - 0x3fe0485626ae221a, 0x3feb8c38d27504e9, // 0.50883, 0.86087 - 0x3fe05df3ec31b8b6, 0x3feb7f6686e792ea, // 0.51147, 0.8593 - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773 - 0x3fe089112032b08c, 0x3feb658f14fdbc47, // 0.51673, 0.85615 - 0x3fe09e907417c5e1, 0x3feb5889fe921405, // 0.51936, 0.85456 - 0x3fe0b405878f85ec, 0x3feb4b7409de7925, // 0.52198, 0.85296 - 0x3fe0c9704d5d898f, 0x3feb3e4d3ef55712, // 0.52459, 0.85136 - 0x3fe0ded0b84bc4b5, 0x3feb3115a5f37bf4, // 0.5272, 0.84974 - 0x3fe0f426bb2a8e7d, 0x3feb23cd470013b4, // 0.5298, 0.84812 - 0x3fe1097248d0a956, 0x3feb16742a4ca2f5, // 0.5324, 0.84649 - 0x3fe11eb3541b4b22, 0x3feb090a58150200, // 0.535, 0.84485 - 0x3fe133e9cfee254e, 0x3feafb8fd89f57b6, // 0.53759, 0.84321 - 0x3fe14915af336ceb, 0x3feaee04b43c1474, // 0.54017, 0.84155 - 0x3fe15e36e4dbe2bc, 0x3feae068f345ecef, // 0.54275, 0.83989 - 0x3fe1734d63dedb49, 0x3fead2bc9e21d511, // 0.54532, 0.83822 - 0x3fe188591f3a46e5, 0x3feac4ffbd3efac8, // 0.54789, 0.83655 - 0x3fe19d5a09f2b9b8, 0x3feab7325916c0d4, // 0.55046, 0.83486 - 0x3fe1b250171373be, 0x3feaa9547a2cb98e, // 0.55302, 0.83317 - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147 - 0x3fe1dc1b64dc4872, 0x3fea8d676e545ad2, // 0.55812, 0.82976 - 0x3fe1f0f08bbc861b, 0x3fea7f58529fe69d, // 0.56066, 0.82805 - 0x3fe205baa17560d6, 0x3fea7138de9d60f5, // 0.5632, 0.82632 - 0x3fe21a799933eb58, 0x3fea63091b02fae2, // 0.56573, 0.82459 - 0x3fe22f2d662c13e1, 0x3fea54c91090f524, // 0.56826, 0.82285 - 0x3fe243d5fb98ac1f, 0x3fea4678c8119ac8, // 0.57078, 0.8211 - 0x3fe258734cbb7110, 0x3fea38184a593bc6, // 0.5733, 0.81935 - 0x3fe26d054cdd12df, 0x3fea29a7a0462782, // 0.57581, 0.81758 - 0x3fe2818bef4d3cba, 0x3fea1b26d2c0a75e, // 0.57831, 0.81581 - 0x3fe2960727629ca8, 0x3fea0c95eabaf937, // 0.58081, 0.81404 - 0x3fe2aa76e87aeb58, 0x3fe9fdf4f13149de, // 0.58331, 0.81225 - 0x3fe2bedb25faf3ea, 0x3fe9ef43ef29af94, // 0.5858, 0.81046 - 0x3fe2d333d34e9bb7, 0x3fe9e082edb42472, // 0.58828, 0.80866 - 0x3fe2e780e3e8ea16, 0x3fe9d1b1f5ea80d6, // 0.59076, 0.80685 - 0x3fe2fbc24b441015, 0x3fe9c2d110f075c3, // 0.59323, 0.80503 - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321 - 0x3fe32421ec49a620, 0x3fe9a4dfa42b06b2, // 0.59816, 0.80138 - 0x3fe338400d0c8e57, 0x3fe995cf2ed80d22, // 0.60062, 0.79954 - 0x3fe34c5252c14de1, 0x3fe986aef1457594, // 0.60307, 0.79769 - 0x3fe36058b10659f3, 0x3fe9777ef4c7d742, // 0.60551, 0.79584 - 0x3fe374531b817f8d, 0x3fe9683f42bd7fe1, // 0.60795, 0.79398 - 0x3fe3884185dfeb22, 0x3fe958efe48e6dd7, // 0.61038, 0.79211 - 0x3fe39c23e3d63029, 0x3fe94990e3ac4a6c, // 0.61281, 0.79023 - 0x3fe3affa292050b9, 0x3fe93a22499263fc, // 0.61523, 0.78835 - 0x3fe3c3c44981c517, 0x3fe92aa41fc5a815, // 0.61765, 0.78646 - 0x3fe3d78238c58343, 0x3fe91b166fd49da2, // 0.62006, 0.78456 - 0x3fe3eb33eabe0680, 0x3fe90b7943575efe, // 0.62246, 0.78265 - 0x3fe3fed9534556d4, 0x3fe8fbcca3ef940d, // 0.62486, 0.78074 - 0x3fe41272663d108c, 0x3fe8ec109b486c49, // 0.62725, 0.77882 - 0x3fe425ff178e6bb1, 0x3fe8dc45331698cc, // 0.62964, 0.77689 - 0x3fe4397f5b2a4380, 0x3fe8cc6a75184655, // 0.63202, 0.77495 - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301 - 0x3fe4605a692b32a2, 0x3fe8ac871ede1d88, // 0.63676, 0.77106 - 0x3fe473b51b987347, 0x3fe89c7e9a4dd4ab, // 0.63912, 0.7691 - 0x3fe48703306091fe, 0x3fe88c66e7481ba1, // 0.64148, 0.76714 - 0x3fe49a449b9b0938, 0x3fe87c400fba2ebf, // 0.64383, 0.76517 - 0x3fe4ad79516722f0, 0x3fe86c0a1d9aa195, // 0.64618, 0.76319 - 0x3fe4c0a145ec0004, 0x3fe85bc51ae958cc, // 0.64851, 0.7612 - 0x3fe4d3bc6d589f80, 0x3fe84b7111af83f9, // 0.65085, 0.75921 - 0x3fe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // 0.65317, 0.75721 - 0x3fe4f9cc25cca486, 0x3fe82a9c13f545ff, // 0.65549, 0.7552 - 0x3fe50cc09f59a09b, 0x3fe81a1b33b57acc, // 0.65781, 0.75319 - 0x3fe51fa81cd99aa6, 0x3fe8098b756e52fa, // 0.66011, 0.75117 - 0x3fe5328292a35596, 0x3fe7f8ece3571771, // 0.66242, 0.74914 - 0x3fe5454ff5159dfb, 0x3fe7e83f87b03686, // 0.66471, 0.7471 - 0x3fe5581038975137, 0x3fe7d7836cc33db2, // 0.667, 0.74506 - 0x3fe56ac35197649e, 0x3fe7c6b89ce2d333, // 0.66928, 0.74301 - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095 - 0x3fe59001d5f723df, 0x3fe7a4f707bf97d2, // 0.67383, 0.73889 - 0x3fe5a28d2a5d7250, 0x3fe79400574f55e4, // 0.67609, 0.73682 - 0x3fe5b50b264f7448, 0x3fe782fb1b90b35b, // 0.67835, 0.73474 - 0x3fe5c77bbe65018c, 0x3fe771e75f037261, // 0.6806, 0.73265 - 0x3fe5d9dee73e345c, 0x3fe760c52c304764, // 0.68285, 0.73056 - 0x3fe5ec3495837074, 0x3fe74f948da8d28d, // 0.68508, 0.72846 - 0x3fe5fe7cbde56a0f, 0x3fe73e558e079942, // 0.68732, 0.72636 - 0x3fe610b7551d2cde, 0x3fe72d0837efff97, // 0.68954, 0.72425 - 0x3fe622e44fec22ff, 0x3fe71bac960e41bf, // 0.69176, 0.72213 - 0x3fe63503a31c1be8, 0x3fe70a42b3176d7a, // 0.69397, 0.72 - 0x3fe64715437f535b, 0x3fe6f8ca99c95b75, // 0.69618, 0.71787 - 0x3fe6591925f0783e, 0x3fe6e74454eaa8ae, // 0.69838, 0.71573 - 0x3fe66b0f3f52b386, 0x3fe6d5afef4aafcc, // 0.70057, 0.71358 - 0x3fe67cf78491af10, 0x3fe6c40d73c18275, // 0.70275, 0.71143 - 0x3fe68ed1eaa19c71, 0x3fe6b25ced2fe29c, // 0.70493, 0.70927 - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711 - 0x3fe6b25ced2fe29c, 0x3fe68ed1eaa19c71, // 0.70927, 0.70493 - 0x3fe6c40d73c18275, 0x3fe67cf78491af10, // 0.71143, 0.70275 - 0x3fe6d5afef4aafcc, 0x3fe66b0f3f52b386, // 0.71358, 0.70057 - 0x3fe6e74454eaa8ae, 0x3fe6591925f0783e, // 0.71573, 0.69838 - 0x3fe6f8ca99c95b75, 0x3fe64715437f535b, // 0.71787, 0.69618 - 0x3fe70a42b3176d7a, 0x3fe63503a31c1be8, // 0.72, 0.69397 - 0x3fe71bac960e41bf, 0x3fe622e44fec22ff, // 0.72213, 0.69176 - 0x3fe72d0837efff97, 0x3fe610b7551d2cde, // 0.72425, 0.68954 - 0x3fe73e558e079942, 0x3fe5fe7cbde56a0f, // 0.72636, 0.68732 - 0x3fe74f948da8d28d, 0x3fe5ec3495837074, // 0.72846, 0.68508 - 0x3fe760c52c304764, 0x3fe5d9dee73e345c, // 0.73056, 0.68285 - 0x3fe771e75f037261, 0x3fe5c77bbe65018c, // 0.73265, 0.6806 - 0x3fe782fb1b90b35b, 0x3fe5b50b264f7448, // 0.73474, 0.67835 - 0x3fe79400574f55e4, 0x3fe5a28d2a5d7250, // 0.73682, 0.67609 - 0x3fe7a4f707bf97d2, 0x3fe59001d5f723df, // 0.73889, 0.67383 - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156 - 0x3fe7c6b89ce2d333, 0x3fe56ac35197649e, // 0.74301, 0.66928 - 0x3fe7d7836cc33db2, 0x3fe5581038975137, // 0.74506, 0.667 - 0x3fe7e83f87b03686, 0x3fe5454ff5159dfb, // 0.7471, 0.66471 - 0x3fe7f8ece3571771, 0x3fe5328292a35596, // 0.74914, 0.66242 - 0x3fe8098b756e52fa, 0x3fe51fa81cd99aa6, // 0.75117, 0.66011 - 0x3fe81a1b33b57acc, 0x3fe50cc09f59a09b, // 0.75319, 0.65781 - 0x3fe82a9c13f545ff, 0x3fe4f9cc25cca486, // 0.7552, 0.65549 - 0x3fe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // 0.75721, 0.65317 - 0x3fe84b7111af83f9, 0x3fe4d3bc6d589f80, // 0.75921, 0.65085 - 0x3fe85bc51ae958cc, 0x3fe4c0a145ec0004, // 0.7612, 0.64851 - 0x3fe86c0a1d9aa195, 0x3fe4ad79516722f0, // 0.76319, 0.64618 - 0x3fe87c400fba2ebf, 0x3fe49a449b9b0938, // 0.76517, 0.64383 - 0x3fe88c66e7481ba1, 0x3fe48703306091fe, // 0.76714, 0.64148 - 0x3fe89c7e9a4dd4ab, 0x3fe473b51b987347, // 0.7691, 0.63912 - 0x3fe8ac871ede1d88, 0x3fe4605a692b32a2, // 0.77106, 0.63676 - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439 - 0x3fe8cc6a75184655, 0x3fe4397f5b2a4380, // 0.77495, 0.63202 - 0x3fe8dc45331698cc, 0x3fe425ff178e6bb1, // 0.77689, 0.62964 - 0x3fe8ec109b486c49, 0x3fe41272663d108c, // 0.77882, 0.62725 - 0x3fe8fbcca3ef940d, 0x3fe3fed9534556d4, // 0.78074, 0.62486 - 0x3fe90b7943575efe, 0x3fe3eb33eabe0680, // 0.78265, 0.62246 - 0x3fe91b166fd49da2, 0x3fe3d78238c58343, // 0.78456, 0.62006 - 0x3fe92aa41fc5a815, 0x3fe3c3c44981c517, // 0.78646, 0.61765 - 0x3fe93a22499263fc, 0x3fe3affa292050b9, // 0.78835, 0.61523 - 0x3fe94990e3ac4a6c, 0x3fe39c23e3d63029, // 0.79023, 0.61281 - 0x3fe958efe48e6dd7, 0x3fe3884185dfeb22, // 0.79211, 0.61038 - 0x3fe9683f42bd7fe1, 0x3fe374531b817f8d, // 0.79398, 0.60795 - 0x3fe9777ef4c7d742, 0x3fe36058b10659f3, // 0.79584, 0.60551 - 0x3fe986aef1457594, 0x3fe34c5252c14de1, // 0.79769, 0.60307 - 0x3fe995cf2ed80d22, 0x3fe338400d0c8e57, // 0.79954, 0.60062 - 0x3fe9a4dfa42b06b2, 0x3fe32421ec49a620, // 0.80138, 0.59816 - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957 - 0x3fe9c2d110f075c3, 0x3fe2fbc24b441015, // 0.80503, 0.59323 - 0x3fe9d1b1f5ea80d6, 0x3fe2e780e3e8ea16, // 0.80685, 0.59076 - 0x3fe9e082edb42472, 0x3fe2d333d34e9bb7, // 0.80866, 0.58828 - 0x3fe9ef43ef29af94, 0x3fe2bedb25faf3ea, // 0.81046, 0.5858 - 0x3fe9fdf4f13149de, 0x3fe2aa76e87aeb58, // 0.81225, 0.58331 - 0x3fea0c95eabaf937, 0x3fe2960727629ca8, // 0.81404, 0.58081 - 0x3fea1b26d2c0a75e, 0x3fe2818bef4d3cba, // 0.81581, 0.57831 - 0x3fea29a7a0462782, 0x3fe26d054cdd12df, // 0.81758, 0.57581 - 0x3fea38184a593bc6, 0x3fe258734cbb7110, // 0.81935, 0.5733 - 0x3fea4678c8119ac8, 0x3fe243d5fb98ac1f, // 0.8211, 0.57078 - 0x3fea54c91090f524, 0x3fe22f2d662c13e1, // 0.82285, 0.56826 - 0x3fea63091b02fae2, 0x3fe21a799933eb58, // 0.82459, 0.56573 - 0x3fea7138de9d60f5, 0x3fe205baa17560d6, // 0.82632, 0.5632 - 0x3fea7f58529fe69d, 0x3fe1f0f08bbc861b, // 0.82805, 0.56066 - 0x3fea8d676e545ad2, 0x3fe1dc1b64dc4872, // 0.82976, 0.55812 - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557 - 0x3feaa9547a2cb98e, 0x3fe1b250171373be, // 0.83317, 0.55302 - 0x3feab7325916c0d4, 0x3fe19d5a09f2b9b8, // 0.83486, 0.55046 - 0x3feac4ffbd3efac8, 0x3fe188591f3a46e5, // 0.83655, 0.54789 - 0x3fead2bc9e21d511, 0x3fe1734d63dedb49, // 0.83822, 0.54532 - 0x3feae068f345ecef, 0x3fe15e36e4dbe2bc, // 0.83989, 0.54275 - 0x3feaee04b43c1474, 0x3fe14915af336ceb, // 0.84155, 0.54017 - 0x3feafb8fd89f57b6, 0x3fe133e9cfee254e, // 0.84321, 0.53759 - 0x3feb090a58150200, 0x3fe11eb3541b4b22, // 0.84485, 0.535 - 0x3feb16742a4ca2f5, 0x3fe1097248d0a956, // 0.84649, 0.5324 - 0x3feb23cd470013b4, 0x3fe0f426bb2a8e7d, // 0.84812, 0.5298 - 0x3feb3115a5f37bf4, 0x3fe0ded0b84bc4b5, // 0.84974, 0.5272 - 0x3feb3e4d3ef55712, 0x3fe0c9704d5d898f, // 0.85136, 0.52459 - 0x3feb4b7409de7925, 0x3fe0b405878f85ec, // 0.85296, 0.52198 - 0x3feb5889fe921405, 0x3fe09e907417c5e1, // 0.85456, 0.51936 - 0x3feb658f14fdbc47, 0x3fe089112032b08c, // 0.85615, 0.51673 - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141 - 0x3feb7f6686e792ea, 0x3fe05df3ec31b8b6, // 0.8593, 0.51147 - 0x3feb8c38d27504e9, 0x3fe0485626ae221a, // 0.86087, 0.50883 - 0x3feb98fa1fd9155e, 0x3fe032ae55edbd95, // 0.86242, 0.50619 - 0x3feba5aa673590d2, 0x3fe01cfc874c3eb7, // 0.86397, 0.50354 - 0x3febb249a0b6c40d, 0x3fe00740c82b82e0, // 0.86551, 0.50089 - 0x3febbed7c49380ea, 0x3fdfe2f64be7120f, // 0.86705, 0.49823 - 0x3febcb54cb0d2327, 0x3fdfb7575c24d2de, // 0.86857, 0.49557 - 0x3febd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // 0.87009, 0.4929 - 0x3febe41b611154c1, 0x3fdf5fdee656cda3, // 0.8716, 0.49023 - 0x3febf064e15377dd, 0x3fdf3405963fd068, // 0.87309, 0.48755 - 0x3febfc9d25a1b147, 0x3fdf081906bff7fd, // 0.87459, 0.48487 - 0x3fec08c426725549, 0x3fdedc1952ef78d5, // 0.87607, 0.48218 - 0x3fec14d9dc465e58, 0x3fdeb00695f25620, // 0.87755, 0.47949 - 0x3fec20de3fa971b0, 0x3fde83e0eaf85113, // 0.87901, 0.4768 - 0x3fec2cd14931e3f1, 0x3fde57a86d3cd824, // 0.88047, 0.4741 - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714 - 0x3fec44833141c004, 0x3fddfeff66a941de, // 0.88336, 0.46869 - 0x3fec5042012b6907, 0x3fddd28f1481cc58, // 0.8848, 0.46598 - 0x3fec5bef59fef85a, 0x3fdda60c5cfa10d8, // 0.88622, 0.46326 - 0x3fec678b3488739b, 0x3fdd79775b86e389, // 0.88764, 0.46054 - 0x3fec7315899eaad7, 0x3fdd4cd02ba8609c, // 0.88905, 0.45781 - 0x3fec7e8e52233cf3, 0x3fdd2016e8e9db5b, // 0.89045, 0.45508 - 0x3fec89f587029c13, 0x3fdcf34baee1cd21, // 0.89184, 0.45235 - 0x3fec954b213411f5, 0x3fdcc66e9931c45d, // 0.89322, 0.44961 - 0x3feca08f19b9c449, 0x3fdc997fc3865388, // 0.8946, 0.44687 - 0x3fecabc169a0b901, 0x3fdc6c7f4997000a, // 0.89597, 0.44412 - 0x3fecb6e20a00da99, 0x3fdc3f6d47263129, // 0.89732, 0.44137 - 0x3fecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // 0.89867, 0.43862 - 0x3fecccee20c2de9f, 0x3fdbe51517ffc0d9, // 0.90002, 0.43586 - 0x3fecd7d9898b32f6, 0x3fdbb7cf2304bd01, // 0.90135, 0.43309 - 0x3fece2b32799a060, 0x3fdb8a7814fd5693, // 0.90267, 0.43033 - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756 - 0x3fecf830e8ce467b, 0x3fdb2f971db31972, // 0.9053, 0.42478 - 0x3fed02d4feb2bd92, 0x3fdb020d6c7f4009, // 0.9066, 0.422 - 0x3fed0d672f59d2b9, 0x3fdad473125cdc08, // 0.90789, 0.41922 - 0x3fed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // 0.90917, 0.41643 - 0x3fed2255c6e5a4e1, 0x3fda790cd3dbf31a, // 0.91044, 0.41364 - 0x3fed2cb220e0ef9f, 0x3fda4b4127dea1e4, // 0.91171, 0.41084 - 0x3fed36fc7bcbfbdc, 0x3fda1d6543b50ac0, // 0.91296, 0.40804 - 0x3fed4134d14dc93a, 0x3fd9ef7943a8ed8a, // 0.91421, 0.40524 - 0x3fed4b5b1b187524, 0x3fd9c17d440df9f2, // 0.91545, 0.40243 - 0x3fed556f52e93eb1, 0x3fd993716141bdfe, // 0.91668, 0.39962 - 0x3fed5f7172888a7f, 0x3fd96555b7ab948f, // 0.9179, 0.39681 - 0x3fed696173c9e68b, 0x3fd9372a63bc93d7, // 0.91911, 0.39399 - 0x3fed733f508c0dff, 0x3fd908ef81ef7bd1, // 0.92032, 0.39117 - 0x3fed7d0b02b8ecf9, 0x3fd8daa52ec8a4af, // 0.92151, 0.38835 - 0x3fed86c48445a450, 0x3fd8ac4b86d5ed44, // 0.9227, 0.38552 - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268 - 0x3fed9a00dd8b3d46, 0x3fd84f6aaaf3903f, // 0.92505, 0.37985 - 0x3feda383a9668988, 0x3fd820e3b04eaac4, // 0.92621, 0.37701 - 0x3fedacf42ce68ab9, 0x3fd7f24dd37341e3, // 0.92736, 0.37416 - 0x3fedb6526238a09b, 0x3fd7c3a9311dcce7, // 0.92851, 0.37132 - 0x3fedbf9e4395759a, 0x3fd794f5e613dfae, // 0.92964, 0.36847 - 0x3fedc8d7cb410260, 0x3fd766340f2418f6, // 0.93077, 0.36561 - 0x3fedd1fef38a915a, 0x3fd73763c9261092, // 0.93188, 0.36276 - 0x3feddb13b6ccc23d, 0x3fd7088530fa459e, // 0.93299, 0.3599 - 0x3fede4160f6d8d81, 0x3fd6d998638a0cb5, // 0.93409, 0.35703 - 0x3feded05f7de47da, 0x3fd6aa9d7dc77e16, // 0.93518, 0.35416 - 0x3fedf5e36a9ba59c, 0x3fd67b949cad63ca, // 0.93627, 0.35129 - 0x3fedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // 0.93734, 0.34842 - 0x3fee0766d9280f54, 0x3fd61d595c88c203, // 0.9384, 0.34554 - 0x3fee100cca2980ac, 0x3fd5ee27379ea693, // 0.93946, 0.34266 - 0x3fee18a02fdc66d9, 0x3fd5bee78b9db3b6, // 0.94051, 0.33978 - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689 - 0x3fee298f4439197a, 0x3fd5604012f467b4, // 0.94257, 0.334 - 0x3fee31eae870ce25, 0x3fd530d880af3c24, // 0.94359, 0.33111 - 0x3fee3a33ec75ce85, 0x3fd50163dc197047, // 0.9446, 0.32821 - 0x3fee426a4b2bc17e, 0x3fd4d1e24278e76a, // 0.94561, 0.32531 - 0x3fee4a8dff81ce5e, 0x3fd4a253d11b82f3, // 0.9466, 0.32241 - 0x3fee529f04729ffc, 0x3fd472b8a5571054, // 0.94759, 0.3195 - 0x3fee5a9d550467d3, 0x3fd44310dc8936f0, // 0.94856, 0.31659 - 0x3fee6288ec48e112, 0x3fd4135c94176602, // 0.94953, 0.31368 - 0x3fee6a61c55d53a7, 0x3fd3e39be96ec271, // 0.95049, 0.31077 - 0x3fee7227db6a9744, 0x3fd3b3cefa0414b7, // 0.95144, 0.30785 - 0x3fee79db29a5165a, 0x3fd383f5e353b6aa, // 0.95238, 0.30493 - 0x3fee817bab4cd10d, 0x3fd35410c2e18152, // 0.95331, 0.30201 - 0x3fee89095bad6025, 0x3fd3241fb638baaf, // 0.95423, 0.29908 - 0x3fee9084361df7f3, 0x3fd2f422daec0386, // 0.95514, 0.29615 - 0x3fee97ec36016b30, 0x3fd2c41a4e954520, // 0.95605, 0.29322 - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028 - 0x3feea68393e65800, 0x3fd263e6995554ba, // 0.95783, 0.28735 - 0x3feeadb2e8e7a88e, 0x3fd233bbabc3bb72, // 0.9587, 0.28441 - 0x3feeb4cf515b8811, 0x3fd2038583d727bd, // 0.95957, 0.28146 - 0x3feebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // 0.96043, 0.27852 - 0x3feec2cf4b1af6b2, 0x3fd1a2f7fbe8f243, // 0.96128, 0.27557 - 0x3feec9b2d3c3bf84, 0x3fd172a0d7765177, // 0.96212, 0.27262 - 0x3feed0835e999009, 0x3fd1423eefc69378, // 0.96295, 0.26967 - 0x3feed740e7684963, 0x3fd111d262b1f677, // 0.96378, 0.26671 - 0x3feeddeb6a078651, 0x3fd0e15b4e1749cd, // 0.96459, 0.26375 - 0x3feee482e25a9dbc, 0x3fd0b0d9cfdbdb90, // 0.96539, 0.26079 - 0x3feeeb074c50a544, 0x3fd0804e05eb661e, // 0.96619, 0.25783 - 0x3feef178a3e473c2, 0x3fd04fb80e37fdae, // 0.96698, 0.25487 - 0x3feef7d6e51ca3c0, 0x3fd01f1806b9fdd2, // 0.96775, 0.2519 - 0x3feefe220c0b95ec, 0x3fcfdcdc1adfedf8, // 0.96852, 0.24893 - 0x3fef045a14cf738c, 0x3fcf7b7480bd3801, // 0.96928, 0.24596 - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298 - 0x3fef1090bc898f5f, 0x3fceb86b462de348, // 0.97077, 0.24 - 0x3fef168f53f7205d, 0x3fce56ca1e101a1b, // 0.9715, 0.23702 - 0x3fef1c7abe284708, 0x3fcdf5163f01099a, // 0.97223, 0.23404 - 0x3fef2252f7763ada, 0x3fcd934fe5454311, // 0.97294, 0.23106 - 0x3fef2817fc4609ce, 0x3fcd31774d2cbdee, // 0.97364, 0.22807 - 0x3fef2dc9c9089a9d, 0x3fcccf8cb312b286, // 0.97434, 0.22508 - 0x3fef33685a3aaef0, 0x3fcc6d90535d74dc, // 0.97503, 0.22209 - 0x3fef38f3ac64e589, 0x3fcc0b826a7e4f63, // 0.9757, 0.2191 - 0x3fef3e6bbc1bbc65, 0x3fcba96334f15dad, // 0.97637, 0.21611 - 0x3fef43d085ff92dd, 0x3fcb4732ef3d6722, // 0.97703, 0.21311 - 0x3fef492206bcabb4, 0x3fcae4f1d5f3b9ab, // 0.97768, 0.21011 - 0x3fef4e603b0b2f2d, 0x3fca82a025b00451, // 0.97832, 0.20711 - 0x3fef538b1faf2d07, 0x3fca203e1b1831da, // 0.97895, 0.20411 - 0x3fef58a2b1789e84, 0x3fc9bdcbf2dc4366, // 0.97957, 0.2011 - 0x3fef5da6ed43685d, 0x3fc95b49e9b62af9, // 0.98018, 0.1981 - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509 - 0x3fef677556883cee, 0x3fc8961727c41804, // 0.98138, 0.19208 - 0x3fef6c3f7df5bbb7, 0x3fc83366e89c64c5, // 0.98196, 0.18907 - 0x3fef70f6434b7eb7, 0x3fc7d0a7bbd2cb1b, // 0.98254, 0.18606 - 0x3fef7599a3a12077, 0x3fc76dd9de50bf31, // 0.98311, 0.18304 - 0x3fef7a299c1a322a, 0x3fc70afd8d08c4ff, // 0.98366, 0.18002 - 0x3fef7ea629e63d6e, 0x3fc6a81304f64ab2, // 0.98421, 0.177 - 0x3fef830f4a40c60c, 0x3fc6451a831d830d, // 0.98475, 0.17398 - 0x3fef8764fa714ba9, 0x3fc5e214448b3fc6, // 0.98528, 0.17096 - 0x3fef8ba737cb4b78, 0x3fc57f008654cbde, // 0.9858, 0.16794 - 0x3fef8fd5ffae41db, 0x3fc51bdf8597c5f2, // 0.98631, 0.16491 - 0x3fef93f14f85ac08, 0x3fc4b8b17f79fa88, // 0.98681, 0.16189 - 0x3fef97f924c9099b, 0x3fc45576b1293e5a, // 0.9873, 0.15886 - 0x3fef9bed7cfbde29, 0x3fc3f22f57db4893, // 0.98778, 0.15583 - 0x3fef9fce55adb2c8, 0x3fc38edbb0cd8d14, // 0.98826, 0.1528 - 0x3fefa39bac7a1791, 0x3fc32b7bf94516a7, // 0.98872, 0.14976 - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673 - 0x3fefaafbcb0cfddc, 0x3fc264994dfd340a, // 0.98962, 0.1437 - 0x3fefae8e8e46cfbb, 0x3fc20116d4ec7bce, // 0.99006, 0.14066 - 0x3fefb20dc681d54d, 0x3fc19d8940be24e7, // 0.99049, 0.13762 - 0x3fefb5797195d741, 0x3fc139f0cedaf576, // 0.9909, 0.13458 - 0x3fefb8d18d66adb7, 0x3fc0d64dbcb26786, // 0.99131, 0.13154 - 0x3fefbc1617e44186, 0x3fc072a047ba831d, // 0.99171, 0.1285 - 0x3fefbf470f0a8d88, 0x3fc00ee8ad6fb85b, // 0.9921, 0.12545 - 0x3fefc26470e19fd3, 0x3fbf564e56a9730e, // 0.99248, 0.12241 - 0x3fefc56e3b7d9af6, 0x3fbe8eb7fde4aa3e, // 0.99285, 0.11937 - 0x3fefc8646cfeb721, 0x3fbdc70ecbae9fc8, // 0.99321, 0.11632 - 0x3fefcb4703914354, 0x3fbcff533b307dc1, // 0.99356, 0.11327 - 0x3fefce15fd6da67b, 0x3fbc3785c79ec2d5, // 0.99391, 0.11022 - 0x3fefd0d158d86087, 0x3fbb6fa6ec38f64c, // 0.99424, 0.10717 - 0x3fefd37914220b84, 0x3fbaa7b724495c04, // 0.99456, 0.10412 - 0x3fefd60d2da75c9e, 0x3fb9dfb6eb24a85c, // 0.99488, 0.10107 - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017 - 0x3fefdafa7514538c, 0x3fb84f8712c130a0, // 0.99548, 0.094963 - 0x3fefdd539ff1f456, 0x3fb787586a5d5b21, // 0.99577, 0.091909 - 0x3fefdf9922f73307, 0x3fb6bf1b3e79b129, // 0.99604, 0.088854 - 0x3fefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // 0.99631, 0.085797 - 0x3fefe3e92be9d886, 0x3fb52e774a4d4d0a, // 0.99657, 0.08274 - 0x3fefe5f3af2e3940, 0x3fb4661179272096, // 0.99682, 0.079682 - 0x3fefe7ea85482d60, 0x3fb39d9f12c5a299, // 0.99706, 0.076624 - 0x3fefe9cdad01883a, 0x3fb2d52092ce19f6, // 0.99729, 0.073565 - 0x3fefeb9d2530410f, 0x3fb20c9674ed444c, // 0.99751, 0.070505 - 0x3fefed58ecb673c4, 0x3fb1440134d709b2, // 0.99772, 0.067444 - 0x3fefef0102826191, 0x3fb07b614e463064, // 0.99793, 0.064383 - 0x3feff095658e71ad, 0x3faf656e79f820e0, // 0.99812, 0.061321 - 0x3feff21614e131ed, 0x3fadd406f9808ec8, // 0.9983, 0.058258 - 0x3feff3830f8d575c, 0x3fac428d12c0d7e3, // 0.99848, 0.055195 - 0x3feff4dc54b1bed3, 0x3faab101bd5f8317, // 0.99864, 0.052132 - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068 - 0x3feff753bb1b9164, 0x3fa78dbaa5874685, // 0.99894, 0.046003 - 0x3feff871dadb81df, 0x3fa5fc00d290cd43, // 0.99908, 0.042938 - 0x3feff97c4208c014, 0x3fa46a396ff86179, // 0.9992, 0.039873 - 0x3feffa72effef75d, 0x3fa2d865759455cd, // 0.99932, 0.036807 - 0x3feffb55e425fdae, 0x3fa14685db42c17e, // 0.99943, 0.033741 - 0x3feffc251df1d3f8, 0x3f9f693731d1cf01, // 0.99953, 0.030675 - 0x3feffce09ce2a679, 0x3f9c454f4ce53b1c, // 0.99962, 0.027608 - 0x3feffd886084cd0d, 0x3f992155f7a3667e, // 0.9997, 0.024541 - 0x3feffe1c6870cb77, 0x3f95fd4d21fab226, // 0.99977, 0.021474 - 0x3feffe9cb44b51a1, 0x3f92d936bbe30efd, // 0.99983, 0.018407 - 0x3fefff0943c53bd1, 0x3f8f6a296ab997ca, // 0.99988, 0.015339 - 0x3fefff62169b92db, 0x3f8921d1fcdec784, // 0.99992, 0.012272 - 0x3fefffa72c978c4f, 0x3f82d96b0e509703, // 0.99996, 0.0092038 - 0x3fefffd8858e8a92, 0x3f7921f0fe670071, // 0.99998, 0.0061359 - 0x3feffff621621d02, 0x3f6921f8becca4ba, // 1, 0.003068 - 0x3ff0000000000000, 0x0000000000000000, // 1, 0 - 0x3feffff621621d02, 0xbf6921f8becca4ba, // 1, -0.003068 - 0x3fefffd8858e8a92, 0xbf7921f0fe670071, // 0.99998,-0.0061359 - 0x3fefffa72c978c4f, 0xbf82d96b0e509703, // 0.99996,-0.0092038 - 0x3fefff62169b92db, 0xbf8921d1fcdec784, // 0.99992, -0.012272 - 0x3fefff0943c53bd1, 0xbf8f6a296ab997ca, // 0.99988, -0.015339 - 0x3feffe9cb44b51a1, 0xbf92d936bbe30efd, // 0.99983, -0.018407 - 0x3feffe1c6870cb77, 0xbf95fd4d21fab226, // 0.99977, -0.021474 - 0x3feffd886084cd0d, 0xbf992155f7a3667e, // 0.9997, -0.024541 - 0x3feffce09ce2a679, 0xbf9c454f4ce53b1c, // 0.99962, -0.027608 - 0x3feffc251df1d3f8, 0xbf9f693731d1cf01, // 0.99953, -0.030675 - 0x3feffb55e425fdae, 0xbfa14685db42c17e, // 0.99943, -0.033741 - 0x3feffa72effef75d, 0xbfa2d865759455cd, // 0.99932, -0.036807 - 0x3feff97c4208c014, 0xbfa46a396ff86179, // 0.9992, -0.039873 - 0x3feff871dadb81df, 0xbfa5fc00d290cd43, // 0.99908, -0.042938 - 0x3feff753bb1b9164, 0xbfa78dbaa5874685, // 0.99894, -0.046003 - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988, -0.049068 - 0x3feff4dc54b1bed3, 0xbfaab101bd5f8317, // 0.99864, -0.052132 - 0x3feff3830f8d575c, 0xbfac428d12c0d7e3, // 0.99848, -0.055195 - 0x3feff21614e131ed, 0xbfadd406f9808ec8, // 0.9983, -0.058258 - 0x3feff095658e71ad, 0xbfaf656e79f820e0, // 0.99812, -0.061321 - 0x3fefef0102826191, 0xbfb07b614e463064, // 0.99793, -0.064383 - 0x3fefed58ecb673c4, 0xbfb1440134d709b2, // 0.99772, -0.067444 - 0x3fefeb9d2530410f, 0xbfb20c9674ed444c, // 0.99751, -0.070505 - 0x3fefe9cdad01883a, 0xbfb2d52092ce19f6, // 0.99729, -0.073565 - 0x3fefe7ea85482d60, 0xbfb39d9f12c5a299, // 0.99706, -0.076624 - 0x3fefe5f3af2e3940, 0xbfb4661179272096, // 0.99682, -0.079682 - 0x3fefe3e92be9d886, 0xbfb52e774a4d4d0a, // 0.99657, -0.08274 - 0x3fefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // 0.99631, -0.085797 - 0x3fefdf9922f73307, 0xbfb6bf1b3e79b129, // 0.99604, -0.088854 - 0x3fefdd539ff1f456, 0xbfb787586a5d5b21, // 0.99577, -0.091909 - 0x3fefdafa7514538c, 0xbfb84f8712c130a0, // 0.99548, -0.094963 - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518, -0.098017 - 0x3fefd60d2da75c9e, 0xbfb9dfb6eb24a85c, // 0.99488, -0.10107 - 0x3fefd37914220b84, 0xbfbaa7b724495c04, // 0.99456, -0.10412 - 0x3fefd0d158d86087, 0xbfbb6fa6ec38f64c, // 0.99424, -0.10717 - 0x3fefce15fd6da67b, 0xbfbc3785c79ec2d5, // 0.99391, -0.11022 - 0x3fefcb4703914354, 0xbfbcff533b307dc1, // 0.99356, -0.11327 - 0x3fefc8646cfeb721, 0xbfbdc70ecbae9fc8, // 0.99321, -0.11632 - 0x3fefc56e3b7d9af6, 0xbfbe8eb7fde4aa3e, // 0.99285, -0.11937 - 0x3fefc26470e19fd3, 0xbfbf564e56a9730e, // 0.99248, -0.12241 - 0x3fefbf470f0a8d88, 0xbfc00ee8ad6fb85b, // 0.9921, -0.12545 - 0x3fefbc1617e44186, 0xbfc072a047ba831d, // 0.99171, -0.1285 - 0x3fefb8d18d66adb7, 0xbfc0d64dbcb26786, // 0.99131, -0.13154 - 0x3fefb5797195d741, 0xbfc139f0cedaf576, // 0.9909, -0.13458 - 0x3fefb20dc681d54d, 0xbfc19d8940be24e7, // 0.99049, -0.13762 - 0x3fefae8e8e46cfbb, 0xbfc20116d4ec7bce, // 0.99006, -0.14066 - 0x3fefaafbcb0cfddc, 0xbfc264994dfd340a, // 0.98962, -0.1437 - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673 - 0x3fefa39bac7a1791, 0xbfc32b7bf94516a7, // 0.98872, -0.14976 - 0x3fef9fce55adb2c8, 0xbfc38edbb0cd8d14, // 0.98826, -0.1528 - 0x3fef9bed7cfbde29, 0xbfc3f22f57db4893, // 0.98778, -0.15583 - 0x3fef97f924c9099b, 0xbfc45576b1293e5a, // 0.9873, -0.15886 - 0x3fef93f14f85ac08, 0xbfc4b8b17f79fa88, // 0.98681, -0.16189 - 0x3fef8fd5ffae41db, 0xbfc51bdf8597c5f2, // 0.98631, -0.16491 - 0x3fef8ba737cb4b78, 0xbfc57f008654cbde, // 0.9858, -0.16794 - 0x3fef8764fa714ba9, 0xbfc5e214448b3fc6, // 0.98528, -0.17096 - 0x3fef830f4a40c60c, 0xbfc6451a831d830d, // 0.98475, -0.17398 - 0x3fef7ea629e63d6e, 0xbfc6a81304f64ab2, // 0.98421, -0.177 - 0x3fef7a299c1a322a, 0xbfc70afd8d08c4ff, // 0.98366, -0.18002 - 0x3fef7599a3a12077, 0xbfc76dd9de50bf31, // 0.98311, -0.18304 - 0x3fef70f6434b7eb7, 0xbfc7d0a7bbd2cb1b, // 0.98254, -0.18606 - 0x3fef6c3f7df5bbb7, 0xbfc83366e89c64c5, // 0.98196, -0.18907 - 0x3fef677556883cee, 0xbfc8961727c41804, // 0.98138, -0.19208 - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509 - 0x3fef5da6ed43685d, 0xbfc95b49e9b62af9, // 0.98018, -0.1981 - 0x3fef58a2b1789e84, 0xbfc9bdcbf2dc4366, // 0.97957, -0.2011 - 0x3fef538b1faf2d07, 0xbfca203e1b1831da, // 0.97895, -0.20411 - 0x3fef4e603b0b2f2d, 0xbfca82a025b00451, // 0.97832, -0.20711 - 0x3fef492206bcabb4, 0xbfcae4f1d5f3b9ab, // 0.97768, -0.21011 - 0x3fef43d085ff92dd, 0xbfcb4732ef3d6722, // 0.97703, -0.21311 - 0x3fef3e6bbc1bbc65, 0xbfcba96334f15dad, // 0.97637, -0.21611 - 0x3fef38f3ac64e589, 0xbfcc0b826a7e4f63, // 0.9757, -0.2191 - 0x3fef33685a3aaef0, 0xbfcc6d90535d74dc, // 0.97503, -0.22209 - 0x3fef2dc9c9089a9d, 0xbfcccf8cb312b286, // 0.97434, -0.22508 - 0x3fef2817fc4609ce, 0xbfcd31774d2cbdee, // 0.97364, -0.22807 - 0x3fef2252f7763ada, 0xbfcd934fe5454311, // 0.97294, -0.23106 - 0x3fef1c7abe284708, 0xbfcdf5163f01099a, // 0.97223, -0.23404 - 0x3fef168f53f7205d, 0xbfce56ca1e101a1b, // 0.9715, -0.23702 - 0x3fef1090bc898f5f, 0xbfceb86b462de348, // 0.97077, -0.24 - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298 - 0x3fef045a14cf738c, 0xbfcf7b7480bd3801, // 0.96928, -0.24596 - 0x3feefe220c0b95ec, 0xbfcfdcdc1adfedf8, // 0.96852, -0.24893 - 0x3feef7d6e51ca3c0, 0xbfd01f1806b9fdd2, // 0.96775, -0.2519 - 0x3feef178a3e473c2, 0xbfd04fb80e37fdae, // 0.96698, -0.25487 - 0x3feeeb074c50a544, 0xbfd0804e05eb661e, // 0.96619, -0.25783 - 0x3feee482e25a9dbc, 0xbfd0b0d9cfdbdb90, // 0.96539, -0.26079 - 0x3feeddeb6a078651, 0xbfd0e15b4e1749cd, // 0.96459, -0.26375 - 0x3feed740e7684963, 0xbfd111d262b1f677, // 0.96378, -0.26671 - 0x3feed0835e999009, 0xbfd1423eefc69378, // 0.96295, -0.26967 - 0x3feec9b2d3c3bf84, 0xbfd172a0d7765177, // 0.96212, -0.27262 - 0x3feec2cf4b1af6b2, 0xbfd1a2f7fbe8f243, // 0.96128, -0.27557 - 0x3feebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // 0.96043, -0.27852 - 0x3feeb4cf515b8811, 0xbfd2038583d727bd, // 0.95957, -0.28146 - 0x3feeadb2e8e7a88e, 0xbfd233bbabc3bb72, // 0.9587, -0.28441 - 0x3feea68393e65800, 0xbfd263e6995554ba, // 0.95783, -0.28735 - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028 - 0x3fee97ec36016b30, 0xbfd2c41a4e954520, // 0.95605, -0.29322 - 0x3fee9084361df7f3, 0xbfd2f422daec0386, // 0.95514, -0.29615 - 0x3fee89095bad6025, 0xbfd3241fb638baaf, // 0.95423, -0.29908 - 0x3fee817bab4cd10d, 0xbfd35410c2e18152, // 0.95331, -0.30201 - 0x3fee79db29a5165a, 0xbfd383f5e353b6aa, // 0.95238, -0.30493 - 0x3fee7227db6a9744, 0xbfd3b3cefa0414b7, // 0.95144, -0.30785 - 0x3fee6a61c55d53a7, 0xbfd3e39be96ec271, // 0.95049, -0.31077 - 0x3fee6288ec48e112, 0xbfd4135c94176602, // 0.94953, -0.31368 - 0x3fee5a9d550467d3, 0xbfd44310dc8936f0, // 0.94856, -0.31659 - 0x3fee529f04729ffc, 0xbfd472b8a5571054, // 0.94759, -0.3195 - 0x3fee4a8dff81ce5e, 0xbfd4a253d11b82f3, // 0.9466, -0.32241 - 0x3fee426a4b2bc17e, 0xbfd4d1e24278e76a, // 0.94561, -0.32531 - 0x3fee3a33ec75ce85, 0xbfd50163dc197047, // 0.9446, -0.32821 - 0x3fee31eae870ce25, 0xbfd530d880af3c24, // 0.94359, -0.33111 - 0x3fee298f4439197a, 0xbfd5604012f467b4, // 0.94257, -0.334 - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689 - 0x3fee18a02fdc66d9, 0xbfd5bee78b9db3b6, // 0.94051, -0.33978 - 0x3fee100cca2980ac, 0xbfd5ee27379ea693, // 0.93946, -0.34266 - 0x3fee0766d9280f54, 0xbfd61d595c88c203, // 0.9384, -0.34554 - 0x3fedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // 0.93734, -0.34842 - 0x3fedf5e36a9ba59c, 0xbfd67b949cad63ca, // 0.93627, -0.35129 - 0x3feded05f7de47da, 0xbfd6aa9d7dc77e16, // 0.93518, -0.35416 - 0x3fede4160f6d8d81, 0xbfd6d998638a0cb5, // 0.93409, -0.35703 - 0x3feddb13b6ccc23d, 0xbfd7088530fa459e, // 0.93299, -0.3599 - 0x3fedd1fef38a915a, 0xbfd73763c9261092, // 0.93188, -0.36276 - 0x3fedc8d7cb410260, 0xbfd766340f2418f6, // 0.93077, -0.36561 - 0x3fedbf9e4395759a, 0xbfd794f5e613dfae, // 0.92964, -0.36847 - 0x3fedb6526238a09b, 0xbfd7c3a9311dcce7, // 0.92851, -0.37132 - 0x3fedacf42ce68ab9, 0xbfd7f24dd37341e3, // 0.92736, -0.37416 - 0x3feda383a9668988, 0xbfd820e3b04eaac4, // 0.92621, -0.37701 - 0x3fed9a00dd8b3d46, 0xbfd84f6aaaf3903f, // 0.92505, -0.37985 - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268 - 0x3fed86c48445a450, 0xbfd8ac4b86d5ed44, // 0.9227, -0.38552 - 0x3fed7d0b02b8ecf9, 0xbfd8daa52ec8a4af, // 0.92151, -0.38835 - 0x3fed733f508c0dff, 0xbfd908ef81ef7bd1, // 0.92032, -0.39117 - 0x3fed696173c9e68b, 0xbfd9372a63bc93d7, // 0.91911, -0.39399 - 0x3fed5f7172888a7f, 0xbfd96555b7ab948f, // 0.9179, -0.39681 - 0x3fed556f52e93eb1, 0xbfd993716141bdfe, // 0.91668, -0.39962 - 0x3fed4b5b1b187524, 0xbfd9c17d440df9f2, // 0.91545, -0.40243 - 0x3fed4134d14dc93a, 0xbfd9ef7943a8ed8a, // 0.91421, -0.40524 - 0x3fed36fc7bcbfbdc, 0xbfda1d6543b50ac0, // 0.91296, -0.40804 - 0x3fed2cb220e0ef9f, 0xbfda4b4127dea1e4, // 0.91171, -0.41084 - 0x3fed2255c6e5a4e1, 0xbfda790cd3dbf31a, // 0.91044, -0.41364 - 0x3fed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // 0.90917, -0.41643 - 0x3fed0d672f59d2b9, 0xbfdad473125cdc08, // 0.90789, -0.41922 - 0x3fed02d4feb2bd92, 0xbfdb020d6c7f4009, // 0.9066, -0.422 - 0x3fecf830e8ce467b, 0xbfdb2f971db31972, // 0.9053, -0.42478 - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756 - 0x3fece2b32799a060, 0xbfdb8a7814fd5693, // 0.90267, -0.43033 - 0x3fecd7d9898b32f6, 0xbfdbb7cf2304bd01, // 0.90135, -0.43309 - 0x3fecccee20c2de9f, 0xbfdbe51517ffc0d9, // 0.90002, -0.43586 - 0x3fecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // 0.89867, -0.43862 - 0x3fecb6e20a00da99, 0xbfdc3f6d47263129, // 0.89732, -0.44137 - 0x3fecabc169a0b901, 0xbfdc6c7f4997000a, // 0.89597, -0.44412 - 0x3feca08f19b9c449, 0xbfdc997fc3865388, // 0.8946, -0.44687 - 0x3fec954b213411f5, 0xbfdcc66e9931c45d, // 0.89322, -0.44961 - 0x3fec89f587029c13, 0xbfdcf34baee1cd21, // 0.89184, -0.45235 - 0x3fec7e8e52233cf3, 0xbfdd2016e8e9db5b, // 0.89045, -0.45508 - 0x3fec7315899eaad7, 0xbfdd4cd02ba8609c, // 0.88905, -0.45781 - 0x3fec678b3488739b, 0xbfdd79775b86e389, // 0.88764, -0.46054 - 0x3fec5bef59fef85a, 0xbfdda60c5cfa10d8, // 0.88622, -0.46326 - 0x3fec5042012b6907, 0xbfddd28f1481cc58, // 0.8848, -0.46598 - 0x3fec44833141c004, 0xbfddfeff66a941de, // 0.88336, -0.46869 - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714 - 0x3fec2cd14931e3f1, 0xbfde57a86d3cd824, // 0.88047, -0.4741 - 0x3fec20de3fa971b0, 0xbfde83e0eaf85113, // 0.87901, -0.4768 - 0x3fec14d9dc465e58, 0xbfdeb00695f25620, // 0.87755, -0.47949 - 0x3fec08c426725549, 0xbfdedc1952ef78d5, // 0.87607, -0.48218 - 0x3febfc9d25a1b147, 0xbfdf081906bff7fd, // 0.87459, -0.48487 - 0x3febf064e15377dd, 0xbfdf3405963fd068, // 0.87309, -0.48755 - 0x3febe41b611154c1, 0xbfdf5fdee656cda3, // 0.8716, -0.49023 - 0x3febd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // 0.87009, -0.4929 - 0x3febcb54cb0d2327, 0xbfdfb7575c24d2de, // 0.86857, -0.49557 - 0x3febbed7c49380ea, 0xbfdfe2f64be7120f, // 0.86705, -0.49823 - 0x3febb249a0b6c40d, 0xbfe00740c82b82e0, // 0.86551, -0.50089 - 0x3feba5aa673590d2, 0xbfe01cfc874c3eb7, // 0.86397, -0.50354 - 0x3feb98fa1fd9155e, 0xbfe032ae55edbd95, // 0.86242, -0.50619 - 0x3feb8c38d27504e9, 0xbfe0485626ae221a, // 0.86087, -0.50883 - 0x3feb7f6686e792ea, 0xbfe05df3ec31b8b6, // 0.8593, -0.51147 - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141 - 0x3feb658f14fdbc47, 0xbfe089112032b08c, // 0.85615, -0.51673 - 0x3feb5889fe921405, 0xbfe09e907417c5e1, // 0.85456, -0.51936 - 0x3feb4b7409de7925, 0xbfe0b405878f85ec, // 0.85296, -0.52198 - 0x3feb3e4d3ef55712, 0xbfe0c9704d5d898f, // 0.85136, -0.52459 - 0x3feb3115a5f37bf4, 0xbfe0ded0b84bc4b5, // 0.84974, -0.5272 - 0x3feb23cd470013b4, 0xbfe0f426bb2a8e7d, // 0.84812, -0.5298 - 0x3feb16742a4ca2f5, 0xbfe1097248d0a956, // 0.84649, -0.5324 - 0x3feb090a58150200, 0xbfe11eb3541b4b22, // 0.84485, -0.535 - 0x3feafb8fd89f57b6, 0xbfe133e9cfee254e, // 0.84321, -0.53759 - 0x3feaee04b43c1474, 0xbfe14915af336ceb, // 0.84155, -0.54017 - 0x3feae068f345ecef, 0xbfe15e36e4dbe2bc, // 0.83989, -0.54275 - 0x3fead2bc9e21d511, 0xbfe1734d63dedb49, // 0.83822, -0.54532 - 0x3feac4ffbd3efac8, 0xbfe188591f3a46e5, // 0.83655, -0.54789 - 0x3feab7325916c0d4, 0xbfe19d5a09f2b9b8, // 0.83486, -0.55046 - 0x3feaa9547a2cb98e, 0xbfe1b250171373be, // 0.83317, -0.55302 - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557 - 0x3fea8d676e545ad2, 0xbfe1dc1b64dc4872, // 0.82976, -0.55812 - 0x3fea7f58529fe69d, 0xbfe1f0f08bbc861b, // 0.82805, -0.56066 - 0x3fea7138de9d60f5, 0xbfe205baa17560d6, // 0.82632, -0.5632 - 0x3fea63091b02fae2, 0xbfe21a799933eb58, // 0.82459, -0.56573 - 0x3fea54c91090f524, 0xbfe22f2d662c13e1, // 0.82285, -0.56826 - 0x3fea4678c8119ac8, 0xbfe243d5fb98ac1f, // 0.8211, -0.57078 - 0x3fea38184a593bc6, 0xbfe258734cbb7110, // 0.81935, -0.5733 - 0x3fea29a7a0462782, 0xbfe26d054cdd12df, // 0.81758, -0.57581 - 0x3fea1b26d2c0a75e, 0xbfe2818bef4d3cba, // 0.81581, -0.57831 - 0x3fea0c95eabaf937, 0xbfe2960727629ca8, // 0.81404, -0.58081 - 0x3fe9fdf4f13149de, 0xbfe2aa76e87aeb58, // 0.81225, -0.58331 - 0x3fe9ef43ef29af94, 0xbfe2bedb25faf3ea, // 0.81046, -0.5858 - 0x3fe9e082edb42472, 0xbfe2d333d34e9bb7, // 0.80866, -0.58828 - 0x3fe9d1b1f5ea80d6, 0xbfe2e780e3e8ea16, // 0.80685, -0.59076 - 0x3fe9c2d110f075c3, 0xbfe2fbc24b441015, // 0.80503, -0.59323 - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957 - 0x3fe9a4dfa42b06b2, 0xbfe32421ec49a620, // 0.80138, -0.59816 - 0x3fe995cf2ed80d22, 0xbfe338400d0c8e57, // 0.79954, -0.60062 - 0x3fe986aef1457594, 0xbfe34c5252c14de1, // 0.79769, -0.60307 - 0x3fe9777ef4c7d742, 0xbfe36058b10659f3, // 0.79584, -0.60551 - 0x3fe9683f42bd7fe1, 0xbfe374531b817f8d, // 0.79398, -0.60795 - 0x3fe958efe48e6dd7, 0xbfe3884185dfeb22, // 0.79211, -0.61038 - 0x3fe94990e3ac4a6c, 0xbfe39c23e3d63029, // 0.79023, -0.61281 - 0x3fe93a22499263fc, 0xbfe3affa292050b9, // 0.78835, -0.61523 - 0x3fe92aa41fc5a815, 0xbfe3c3c44981c517, // 0.78646, -0.61765 - 0x3fe91b166fd49da2, 0xbfe3d78238c58343, // 0.78456, -0.62006 - 0x3fe90b7943575efe, 0xbfe3eb33eabe0680, // 0.78265, -0.62246 - 0x3fe8fbcca3ef940d, 0xbfe3fed9534556d4, // 0.78074, -0.62486 - 0x3fe8ec109b486c49, 0xbfe41272663d108c, // 0.77882, -0.62725 - 0x3fe8dc45331698cc, 0xbfe425ff178e6bb1, // 0.77689, -0.62964 - 0x3fe8cc6a75184655, 0xbfe4397f5b2a4380, // 0.77495, -0.63202 - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439 - 0x3fe8ac871ede1d88, 0xbfe4605a692b32a2, // 0.77106, -0.63676 - 0x3fe89c7e9a4dd4ab, 0xbfe473b51b987347, // 0.7691, -0.63912 - 0x3fe88c66e7481ba1, 0xbfe48703306091fe, // 0.76714, -0.64148 - 0x3fe87c400fba2ebf, 0xbfe49a449b9b0938, // 0.76517, -0.64383 - 0x3fe86c0a1d9aa195, 0xbfe4ad79516722f0, // 0.76319, -0.64618 - 0x3fe85bc51ae958cc, 0xbfe4c0a145ec0004, // 0.7612, -0.64851 - 0x3fe84b7111af83f9, 0xbfe4d3bc6d589f80, // 0.75921, -0.65085 - 0x3fe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // 0.75721, -0.65317 - 0x3fe82a9c13f545ff, 0xbfe4f9cc25cca486, // 0.7552, -0.65549 - 0x3fe81a1b33b57acc, 0xbfe50cc09f59a09b, // 0.75319, -0.65781 - 0x3fe8098b756e52fa, 0xbfe51fa81cd99aa6, // 0.75117, -0.66011 - 0x3fe7f8ece3571771, 0xbfe5328292a35596, // 0.74914, -0.66242 - 0x3fe7e83f87b03686, 0xbfe5454ff5159dfb, // 0.7471, -0.66471 - 0x3fe7d7836cc33db2, 0xbfe5581038975137, // 0.74506, -0.667 - 0x3fe7c6b89ce2d333, 0xbfe56ac35197649e, // 0.74301, -0.66928 - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156 - 0x3fe7a4f707bf97d2, 0xbfe59001d5f723df, // 0.73889, -0.67383 - 0x3fe79400574f55e4, 0xbfe5a28d2a5d7250, // 0.73682, -0.67609 - 0x3fe782fb1b90b35b, 0xbfe5b50b264f7448, // 0.73474, -0.67835 - 0x3fe771e75f037261, 0xbfe5c77bbe65018c, // 0.73265, -0.6806 - 0x3fe760c52c304764, 0xbfe5d9dee73e345c, // 0.73056, -0.68285 - 0x3fe74f948da8d28d, 0xbfe5ec3495837074, // 0.72846, -0.68508 - 0x3fe73e558e079942, 0xbfe5fe7cbde56a0f, // 0.72636, -0.68732 - 0x3fe72d0837efff97, 0xbfe610b7551d2cde, // 0.72425, -0.68954 - 0x3fe71bac960e41bf, 0xbfe622e44fec22ff, // 0.72213, -0.69176 - 0x3fe70a42b3176d7a, 0xbfe63503a31c1be8, // 0.72, -0.69397 - 0x3fe6f8ca99c95b75, 0xbfe64715437f535b, // 0.71787, -0.69618 - 0x3fe6e74454eaa8ae, 0xbfe6591925f0783e, // 0.71573, -0.69838 - 0x3fe6d5afef4aafcc, 0xbfe66b0f3f52b386, // 0.71358, -0.70057 - 0x3fe6c40d73c18275, 0xbfe67cf78491af10, // 0.71143, -0.70275 - 0x3fe6b25ced2fe29c, 0xbfe68ed1eaa19c71, // 0.70927, -0.70493 - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711 - 0x3fe68ed1eaa19c71, 0xbfe6b25ced2fe29c, // 0.70493, -0.70927 - 0x3fe67cf78491af10, 0xbfe6c40d73c18275, // 0.70275, -0.71143 - 0x3fe66b0f3f52b386, 0xbfe6d5afef4aafcc, // 0.70057, -0.71358 - 0x3fe6591925f0783e, 0xbfe6e74454eaa8ae, // 0.69838, -0.71573 - 0x3fe64715437f535b, 0xbfe6f8ca99c95b75, // 0.69618, -0.71787 - 0x3fe63503a31c1be8, 0xbfe70a42b3176d7a, // 0.69397, -0.72 - 0x3fe622e44fec22ff, 0xbfe71bac960e41bf, // 0.69176, -0.72213 - 0x3fe610b7551d2cde, 0xbfe72d0837efff97, // 0.68954, -0.72425 - 0x3fe5fe7cbde56a0f, 0xbfe73e558e079942, // 0.68732, -0.72636 - 0x3fe5ec3495837074, 0xbfe74f948da8d28d, // 0.68508, -0.72846 - 0x3fe5d9dee73e345c, 0xbfe760c52c304764, // 0.68285, -0.73056 - 0x3fe5c77bbe65018c, 0xbfe771e75f037261, // 0.6806, -0.73265 - 0x3fe5b50b264f7448, 0xbfe782fb1b90b35b, // 0.67835, -0.73474 - 0x3fe5a28d2a5d7250, 0xbfe79400574f55e4, // 0.67609, -0.73682 - 0x3fe59001d5f723df, 0xbfe7a4f707bf97d2, // 0.67383, -0.73889 - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095 - 0x3fe56ac35197649e, 0xbfe7c6b89ce2d333, // 0.66928, -0.74301 - 0x3fe5581038975137, 0xbfe7d7836cc33db2, // 0.667, -0.74506 - 0x3fe5454ff5159dfb, 0xbfe7e83f87b03686, // 0.66471, -0.7471 - 0x3fe5328292a35596, 0xbfe7f8ece3571771, // 0.66242, -0.74914 - 0x3fe51fa81cd99aa6, 0xbfe8098b756e52fa, // 0.66011, -0.75117 - 0x3fe50cc09f59a09b, 0xbfe81a1b33b57acc, // 0.65781, -0.75319 - 0x3fe4f9cc25cca486, 0xbfe82a9c13f545ff, // 0.65549, -0.7552 - 0x3fe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // 0.65317, -0.75721 - 0x3fe4d3bc6d589f80, 0xbfe84b7111af83f9, // 0.65085, -0.75921 - 0x3fe4c0a145ec0004, 0xbfe85bc51ae958cc, // 0.64851, -0.7612 - 0x3fe4ad79516722f0, 0xbfe86c0a1d9aa195, // 0.64618, -0.76319 - 0x3fe49a449b9b0938, 0xbfe87c400fba2ebf, // 0.64383, -0.76517 - 0x3fe48703306091fe, 0xbfe88c66e7481ba1, // 0.64148, -0.76714 - 0x3fe473b51b987347, 0xbfe89c7e9a4dd4ab, // 0.63912, -0.7691 - 0x3fe4605a692b32a2, 0xbfe8ac871ede1d88, // 0.63676, -0.77106 - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301 - 0x3fe4397f5b2a4380, 0xbfe8cc6a75184655, // 0.63202, -0.77495 - 0x3fe425ff178e6bb1, 0xbfe8dc45331698cc, // 0.62964, -0.77689 - 0x3fe41272663d108c, 0xbfe8ec109b486c49, // 0.62725, -0.77882 - 0x3fe3fed9534556d4, 0xbfe8fbcca3ef940d, // 0.62486, -0.78074 - 0x3fe3eb33eabe0680, 0xbfe90b7943575efe, // 0.62246, -0.78265 - 0x3fe3d78238c58343, 0xbfe91b166fd49da2, // 0.62006, -0.78456 - 0x3fe3c3c44981c517, 0xbfe92aa41fc5a815, // 0.61765, -0.78646 - 0x3fe3affa292050b9, 0xbfe93a22499263fc, // 0.61523, -0.78835 - 0x3fe39c23e3d63029, 0xbfe94990e3ac4a6c, // 0.61281, -0.79023 - 0x3fe3884185dfeb22, 0xbfe958efe48e6dd7, // 0.61038, -0.79211 - 0x3fe374531b817f8d, 0xbfe9683f42bd7fe1, // 0.60795, -0.79398 - 0x3fe36058b10659f3, 0xbfe9777ef4c7d742, // 0.60551, -0.79584 - 0x3fe34c5252c14de1, 0xbfe986aef1457594, // 0.60307, -0.79769 - 0x3fe338400d0c8e57, 0xbfe995cf2ed80d22, // 0.60062, -0.79954 - 0x3fe32421ec49a620, 0xbfe9a4dfa42b06b2, // 0.59816, -0.80138 - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321 - 0x3fe2fbc24b441015, 0xbfe9c2d110f075c3, // 0.59323, -0.80503 - 0x3fe2e780e3e8ea16, 0xbfe9d1b1f5ea80d6, // 0.59076, -0.80685 - 0x3fe2d333d34e9bb7, 0xbfe9e082edb42472, // 0.58828, -0.80866 - 0x3fe2bedb25faf3ea, 0xbfe9ef43ef29af94, // 0.5858, -0.81046 - 0x3fe2aa76e87aeb58, 0xbfe9fdf4f13149de, // 0.58331, -0.81225 - 0x3fe2960727629ca8, 0xbfea0c95eabaf937, // 0.58081, -0.81404 - 0x3fe2818bef4d3cba, 0xbfea1b26d2c0a75e, // 0.57831, -0.81581 - 0x3fe26d054cdd12df, 0xbfea29a7a0462782, // 0.57581, -0.81758 - 0x3fe258734cbb7110, 0xbfea38184a593bc6, // 0.5733, -0.81935 - 0x3fe243d5fb98ac1f, 0xbfea4678c8119ac8, // 0.57078, -0.8211 - 0x3fe22f2d662c13e1, 0xbfea54c91090f524, // 0.56826, -0.82285 - 0x3fe21a799933eb58, 0xbfea63091b02fae2, // 0.56573, -0.82459 - 0x3fe205baa17560d6, 0xbfea7138de9d60f5, // 0.5632, -0.82632 - 0x3fe1f0f08bbc861b, 0xbfea7f58529fe69d, // 0.56066, -0.82805 - 0x3fe1dc1b64dc4872, 0xbfea8d676e545ad2, // 0.55812, -0.82976 - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147 - 0x3fe1b250171373be, 0xbfeaa9547a2cb98e, // 0.55302, -0.83317 - 0x3fe19d5a09f2b9b8, 0xbfeab7325916c0d4, // 0.55046, -0.83486 - 0x3fe188591f3a46e5, 0xbfeac4ffbd3efac8, // 0.54789, -0.83655 - 0x3fe1734d63dedb49, 0xbfead2bc9e21d511, // 0.54532, -0.83822 - 0x3fe15e36e4dbe2bc, 0xbfeae068f345ecef, // 0.54275, -0.83989 - 0x3fe14915af336ceb, 0xbfeaee04b43c1474, // 0.54017, -0.84155 - 0x3fe133e9cfee254e, 0xbfeafb8fd89f57b6, // 0.53759, -0.84321 - 0x3fe11eb3541b4b22, 0xbfeb090a58150200, // 0.535, -0.84485 - 0x3fe1097248d0a956, 0xbfeb16742a4ca2f5, // 0.5324, -0.84649 - 0x3fe0f426bb2a8e7d, 0xbfeb23cd470013b4, // 0.5298, -0.84812 - 0x3fe0ded0b84bc4b5, 0xbfeb3115a5f37bf4, // 0.5272, -0.84974 - 0x3fe0c9704d5d898f, 0xbfeb3e4d3ef55712, // 0.52459, -0.85136 - 0x3fe0b405878f85ec, 0xbfeb4b7409de7925, // 0.52198, -0.85296 - 0x3fe09e907417c5e1, 0xbfeb5889fe921405, // 0.51936, -0.85456 - 0x3fe089112032b08c, 0xbfeb658f14fdbc47, // 0.51673, -0.85615 - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773 - 0x3fe05df3ec31b8b6, 0xbfeb7f6686e792ea, // 0.51147, -0.8593 - 0x3fe0485626ae221a, 0xbfeb8c38d27504e9, // 0.50883, -0.86087 - 0x3fe032ae55edbd95, 0xbfeb98fa1fd9155e, // 0.50619, -0.86242 - 0x3fe01cfc874c3eb7, 0xbfeba5aa673590d2, // 0.50354, -0.86397 - 0x3fe00740c82b82e0, 0xbfebb249a0b6c40d, // 0.50089, -0.86551 - 0x3fdfe2f64be7120f, 0xbfebbed7c49380ea, // 0.49823, -0.86705 - 0x3fdfb7575c24d2de, 0xbfebcb54cb0d2327, // 0.49557, -0.86857 - 0x3fdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // 0.4929, -0.87009 - 0x3fdf5fdee656cda3, 0xbfebe41b611154c1, // 0.49023, -0.8716 - 0x3fdf3405963fd068, 0xbfebf064e15377dd, // 0.48755, -0.87309 - 0x3fdf081906bff7fd, 0xbfebfc9d25a1b147, // 0.48487, -0.87459 - 0x3fdedc1952ef78d5, 0xbfec08c426725549, // 0.48218, -0.87607 - 0x3fdeb00695f25620, 0xbfec14d9dc465e58, // 0.47949, -0.87755 - 0x3fde83e0eaf85113, 0xbfec20de3fa971b0, // 0.4768, -0.87901 - 0x3fde57a86d3cd824, 0xbfec2cd14931e3f1, // 0.4741, -0.88047 - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192 - 0x3fddfeff66a941de, 0xbfec44833141c004, // 0.46869, -0.88336 - 0x3fddd28f1481cc58, 0xbfec5042012b6907, // 0.46598, -0.8848 - 0x3fdda60c5cfa10d8, 0xbfec5bef59fef85a, // 0.46326, -0.88622 - 0x3fdd79775b86e389, 0xbfec678b3488739b, // 0.46054, -0.88764 - 0x3fdd4cd02ba8609c, 0xbfec7315899eaad7, // 0.45781, -0.88905 - 0x3fdd2016e8e9db5b, 0xbfec7e8e52233cf3, // 0.45508, -0.89045 - 0x3fdcf34baee1cd21, 0xbfec89f587029c13, // 0.45235, -0.89184 - 0x3fdcc66e9931c45d, 0xbfec954b213411f5, // 0.44961, -0.89322 - 0x3fdc997fc3865388, 0xbfeca08f19b9c449, // 0.44687, -0.8946 - 0x3fdc6c7f4997000a, 0xbfecabc169a0b901, // 0.44412, -0.89597 - 0x3fdc3f6d47263129, 0xbfecb6e20a00da99, // 0.44137, -0.89732 - 0x3fdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // 0.43862, -0.89867 - 0x3fdbe51517ffc0d9, 0xbfecccee20c2de9f, // 0.43586, -0.90002 - 0x3fdbb7cf2304bd01, 0xbfecd7d9898b32f6, // 0.43309, -0.90135 - 0x3fdb8a7814fd5693, 0xbfece2b32799a060, // 0.43033, -0.90267 - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399 - 0x3fdb2f971db31972, 0xbfecf830e8ce467b, // 0.42478, -0.9053 - 0x3fdb020d6c7f4009, 0xbfed02d4feb2bd92, // 0.422, -0.9066 - 0x3fdad473125cdc08, 0xbfed0d672f59d2b9, // 0.41922, -0.90789 - 0x3fdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // 0.41643, -0.90917 - 0x3fda790cd3dbf31a, 0xbfed2255c6e5a4e1, // 0.41364, -0.91044 - 0x3fda4b4127dea1e4, 0xbfed2cb220e0ef9f, // 0.41084, -0.91171 - 0x3fda1d6543b50ac0, 0xbfed36fc7bcbfbdc, // 0.40804, -0.91296 - 0x3fd9ef7943a8ed8a, 0xbfed4134d14dc93a, // 0.40524, -0.91421 - 0x3fd9c17d440df9f2, 0xbfed4b5b1b187524, // 0.40243, -0.91545 - 0x3fd993716141bdfe, 0xbfed556f52e93eb1, // 0.39962, -0.91668 - 0x3fd96555b7ab948f, 0xbfed5f7172888a7f, // 0.39681, -0.9179 - 0x3fd9372a63bc93d7, 0xbfed696173c9e68b, // 0.39399, -0.91911 - 0x3fd908ef81ef7bd1, 0xbfed733f508c0dff, // 0.39117, -0.92032 - 0x3fd8daa52ec8a4af, 0xbfed7d0b02b8ecf9, // 0.38835, -0.92151 - 0x3fd8ac4b86d5ed44, 0xbfed86c48445a450, // 0.38552, -0.9227 - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388 - 0x3fd84f6aaaf3903f, 0xbfed9a00dd8b3d46, // 0.37985, -0.92505 - 0x3fd820e3b04eaac4, 0xbfeda383a9668988, // 0.37701, -0.92621 - 0x3fd7f24dd37341e3, 0xbfedacf42ce68ab9, // 0.37416, -0.92736 - 0x3fd7c3a9311dcce7, 0xbfedb6526238a09b, // 0.37132, -0.92851 - 0x3fd794f5e613dfae, 0xbfedbf9e4395759a, // 0.36847, -0.92964 - 0x3fd766340f2418f6, 0xbfedc8d7cb410260, // 0.36561, -0.93077 - 0x3fd73763c9261092, 0xbfedd1fef38a915a, // 0.36276, -0.93188 - 0x3fd7088530fa459e, 0xbfeddb13b6ccc23d, // 0.3599, -0.93299 - 0x3fd6d998638a0cb5, 0xbfede4160f6d8d81, // 0.35703, -0.93409 - 0x3fd6aa9d7dc77e16, 0xbfeded05f7de47da, // 0.35416, -0.93518 - 0x3fd67b949cad63ca, 0xbfedf5e36a9ba59c, // 0.35129, -0.93627 - 0x3fd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // 0.34842, -0.93734 - 0x3fd61d595c88c203, 0xbfee0766d9280f54, // 0.34554, -0.9384 - 0x3fd5ee27379ea693, 0xbfee100cca2980ac, // 0.34266, -0.93946 - 0x3fd5bee78b9db3b6, 0xbfee18a02fdc66d9, // 0.33978, -0.94051 - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154 - 0x3fd5604012f467b4, 0xbfee298f4439197a, // 0.334, -0.94257 - 0x3fd530d880af3c24, 0xbfee31eae870ce25, // 0.33111, -0.94359 - 0x3fd50163dc197047, 0xbfee3a33ec75ce85, // 0.32821, -0.9446 - 0x3fd4d1e24278e76a, 0xbfee426a4b2bc17e, // 0.32531, -0.94561 - 0x3fd4a253d11b82f3, 0xbfee4a8dff81ce5e, // 0.32241, -0.9466 - 0x3fd472b8a5571054, 0xbfee529f04729ffc, // 0.3195, -0.94759 - 0x3fd44310dc8936f0, 0xbfee5a9d550467d3, // 0.31659, -0.94856 - 0x3fd4135c94176602, 0xbfee6288ec48e112, // 0.31368, -0.94953 - 0x3fd3e39be96ec271, 0xbfee6a61c55d53a7, // 0.31077, -0.95049 - 0x3fd3b3cefa0414b7, 0xbfee7227db6a9744, // 0.30785, -0.95144 - 0x3fd383f5e353b6aa, 0xbfee79db29a5165a, // 0.30493, -0.95238 - 0x3fd35410c2e18152, 0xbfee817bab4cd10d, // 0.30201, -0.95331 - 0x3fd3241fb638baaf, 0xbfee89095bad6025, // 0.29908, -0.95423 - 0x3fd2f422daec0386, 0xbfee9084361df7f3, // 0.29615, -0.95514 - 0x3fd2c41a4e954520, 0xbfee97ec36016b30, // 0.29322, -0.95605 - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694 - 0x3fd263e6995554ba, 0xbfeea68393e65800, // 0.28735, -0.95783 - 0x3fd233bbabc3bb72, 0xbfeeadb2e8e7a88e, // 0.28441, -0.9587 - 0x3fd2038583d727bd, 0xbfeeb4cf515b8811, // 0.28146, -0.95957 - 0x3fd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // 0.27852, -0.96043 - 0x3fd1a2f7fbe8f243, 0xbfeec2cf4b1af6b2, // 0.27557, -0.96128 - 0x3fd172a0d7765177, 0xbfeec9b2d3c3bf84, // 0.27262, -0.96212 - 0x3fd1423eefc69378, 0xbfeed0835e999009, // 0.26967, -0.96295 - 0x3fd111d262b1f677, 0xbfeed740e7684963, // 0.26671, -0.96378 - 0x3fd0e15b4e1749cd, 0xbfeeddeb6a078651, // 0.26375, -0.96459 - 0x3fd0b0d9cfdbdb90, 0xbfeee482e25a9dbc, // 0.26079, -0.96539 - 0x3fd0804e05eb661e, 0xbfeeeb074c50a544, // 0.25783, -0.96619 - 0x3fd04fb80e37fdae, 0xbfeef178a3e473c2, // 0.25487, -0.96698 - 0x3fd01f1806b9fdd2, 0xbfeef7d6e51ca3c0, // 0.2519, -0.96775 - 0x3fcfdcdc1adfedf8, 0xbfeefe220c0b95ec, // 0.24893, -0.96852 - 0x3fcf7b7480bd3801, 0xbfef045a14cf738c, // 0.24596, -0.96928 - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003 - 0x3fceb86b462de348, 0xbfef1090bc898f5f, // 0.24, -0.97077 - 0x3fce56ca1e101a1b, 0xbfef168f53f7205d, // 0.23702, -0.9715 - 0x3fcdf5163f01099a, 0xbfef1c7abe284708, // 0.23404, -0.97223 - 0x3fcd934fe5454311, 0xbfef2252f7763ada, // 0.23106, -0.97294 - 0x3fcd31774d2cbdee, 0xbfef2817fc4609ce, // 0.22807, -0.97364 - 0x3fcccf8cb312b286, 0xbfef2dc9c9089a9d, // 0.22508, -0.97434 - 0x3fcc6d90535d74dc, 0xbfef33685a3aaef0, // 0.22209, -0.97503 - 0x3fcc0b826a7e4f63, 0xbfef38f3ac64e589, // 0.2191, -0.9757 - 0x3fcba96334f15dad, 0xbfef3e6bbc1bbc65, // 0.21611, -0.97637 - 0x3fcb4732ef3d6722, 0xbfef43d085ff92dd, // 0.21311, -0.97703 - 0x3fcae4f1d5f3b9ab, 0xbfef492206bcabb4, // 0.21011, -0.97768 - 0x3fca82a025b00451, 0xbfef4e603b0b2f2d, // 0.20711, -0.97832 - 0x3fca203e1b1831da, 0xbfef538b1faf2d07, // 0.20411, -0.97895 - 0x3fc9bdcbf2dc4366, 0xbfef58a2b1789e84, // 0.2011, -0.97957 - 0x3fc95b49e9b62af9, 0xbfef5da6ed43685d, // 0.1981, -0.98018 - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079 - 0x3fc8961727c41804, 0xbfef677556883cee, // 0.19208, -0.98138 - 0x3fc83366e89c64c5, 0xbfef6c3f7df5bbb7, // 0.18907, -0.98196 - 0x3fc7d0a7bbd2cb1b, 0xbfef70f6434b7eb7, // 0.18606, -0.98254 - 0x3fc76dd9de50bf31, 0xbfef7599a3a12077, // 0.18304, -0.98311 - 0x3fc70afd8d08c4ff, 0xbfef7a299c1a322a, // 0.18002, -0.98366 - 0x3fc6a81304f64ab2, 0xbfef7ea629e63d6e, // 0.177, -0.98421 - 0x3fc6451a831d830d, 0xbfef830f4a40c60c, // 0.17398, -0.98475 - 0x3fc5e214448b3fc6, 0xbfef8764fa714ba9, // 0.17096, -0.98528 - 0x3fc57f008654cbde, 0xbfef8ba737cb4b78, // 0.16794, -0.9858 - 0x3fc51bdf8597c5f2, 0xbfef8fd5ffae41db, // 0.16491, -0.98631 - 0x3fc4b8b17f79fa88, 0xbfef93f14f85ac08, // 0.16189, -0.98681 - 0x3fc45576b1293e5a, 0xbfef97f924c9099b, // 0.15886, -0.9873 - 0x3fc3f22f57db4893, 0xbfef9bed7cfbde29, // 0.15583, -0.98778 - 0x3fc38edbb0cd8d14, 0xbfef9fce55adb2c8, // 0.1528, -0.98826 - 0x3fc32b7bf94516a7, 0xbfefa39bac7a1791, // 0.14976, -0.98872 - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918 - 0x3fc264994dfd340a, 0xbfefaafbcb0cfddc, // 0.1437, -0.98962 - 0x3fc20116d4ec7bce, 0xbfefae8e8e46cfbb, // 0.14066, -0.99006 - 0x3fc19d8940be24e7, 0xbfefb20dc681d54d, // 0.13762, -0.99049 - 0x3fc139f0cedaf576, 0xbfefb5797195d741, // 0.13458, -0.9909 - 0x3fc0d64dbcb26786, 0xbfefb8d18d66adb7, // 0.13154, -0.99131 - 0x3fc072a047ba831d, 0xbfefbc1617e44186, // 0.1285, -0.99171 - 0x3fc00ee8ad6fb85b, 0xbfefbf470f0a8d88, // 0.12545, -0.9921 - 0x3fbf564e56a9730e, 0xbfefc26470e19fd3, // 0.12241, -0.99248 - 0x3fbe8eb7fde4aa3e, 0xbfefc56e3b7d9af6, // 0.11937, -0.99285 - 0x3fbdc70ecbae9fc8, 0xbfefc8646cfeb721, // 0.11632, -0.99321 - 0x3fbcff533b307dc1, 0xbfefcb4703914354, // 0.11327, -0.99356 - 0x3fbc3785c79ec2d5, 0xbfefce15fd6da67b, // 0.11022, -0.99391 - 0x3fbb6fa6ec38f64c, 0xbfefd0d158d86087, // 0.10717, -0.99424 - 0x3fbaa7b724495c04, 0xbfefd37914220b84, // 0.10412, -0.99456 - 0x3fb9dfb6eb24a85c, 0xbfefd60d2da75c9e, // 0.10107, -0.99488 - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, // 0.098017, -0.99518 - 0x3fb84f8712c130a0, 0xbfefdafa7514538c, // 0.094963, -0.99548 - 0x3fb787586a5d5b21, 0xbfefdd539ff1f456, // 0.091909, -0.99577 - 0x3fb6bf1b3e79b129, 0xbfefdf9922f73307, // 0.088854, -0.99604 - 0x3fb5f6d00a9aa419, 0xbfefe1cafcbd5b09, // 0.085797, -0.99631 - 0x3fb52e774a4d4d0a, 0xbfefe3e92be9d886, // 0.08274, -0.99657 - 0x3fb4661179272096, 0xbfefe5f3af2e3940, // 0.079682, -0.99682 - 0x3fb39d9f12c5a299, 0xbfefe7ea85482d60, // 0.076624, -0.99706 - 0x3fb2d52092ce19f6, 0xbfefe9cdad01883a, // 0.073565, -0.99729 - 0x3fb20c9674ed444c, 0xbfefeb9d2530410f, // 0.070505, -0.99751 - 0x3fb1440134d709b2, 0xbfefed58ecb673c4, // 0.067444, -0.99772 - 0x3fb07b614e463064, 0xbfefef0102826191, // 0.064383, -0.99793 - 0x3faf656e79f820e0, 0xbfeff095658e71ad, // 0.061321, -0.99812 - 0x3fadd406f9808ec8, 0xbfeff21614e131ed, // 0.058258, -0.9983 - 0x3fac428d12c0d7e3, 0xbfeff3830f8d575c, // 0.055195, -0.99848 - 0x3faab101bd5f8317, 0xbfeff4dc54b1bed3, // 0.052132, -0.99864 - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, // 0.049068, -0.9988 - 0x3fa78dbaa5874685, 0xbfeff753bb1b9164, // 0.046003, -0.99894 - 0x3fa5fc00d290cd43, 0xbfeff871dadb81df, // 0.042938, -0.99908 - 0x3fa46a396ff86179, 0xbfeff97c4208c014, // 0.039873, -0.9992 - 0x3fa2d865759455cd, 0xbfeffa72effef75d, // 0.036807, -0.99932 - 0x3fa14685db42c17e, 0xbfeffb55e425fdae, // 0.033741, -0.99943 - 0x3f9f693731d1cf01, 0xbfeffc251df1d3f8, // 0.030675, -0.99953 - 0x3f9c454f4ce53b1c, 0xbfeffce09ce2a679, // 0.027608, -0.99962 - 0x3f992155f7a3667e, 0xbfeffd886084cd0d, // 0.024541, -0.9997 - 0x3f95fd4d21fab226, 0xbfeffe1c6870cb77, // 0.021474, -0.99977 - 0x3f92d936bbe30efd, 0xbfeffe9cb44b51a1, // 0.018407, -0.99983 - 0x3f8f6a296ab997ca, 0xbfefff0943c53bd1, // 0.015339, -0.99988 - 0x3f8921d1fcdec784, 0xbfefff62169b92db, // 0.012272, -0.99992 - 0x3f82d96b0e509703, 0xbfefffa72c978c4f, //0.0092038, -0.99996 - 0x3f7921f0fe670071, 0xbfefffd8858e8a92, //0.0061359, -0.99998 - 0x3f6921f8becca4ba, 0xbfeffff621621d02, // 0.003068, -1 -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096) -const uint64_t twiddleCoefF64_rfft_4096[4096] = { - 0x0000000000000000, 0x3ff0000000000000, // 0, 1 - 0x3f5921faaee6472d, 0x3feffffd88586ee6, // 0.001534, 1 - 0x3f6921f8becca4ba, 0x3feffff621621d02, // 0.003068, 1 - 0x3f72d97822f996bc, 0x3fefffe9cb1e2e8d, //0.0046019, 0.99999 - 0x3f7921f0fe670071, 0x3fefffd8858e8a92, //0.0061359, 0.99998 - 0x3f7f6a65f9a2a3c5, 0x3fefffc250b5daef, //0.0076698, 0.99997 - 0x3f82d96b0e509703, 0x3fefffa72c978c4f, //0.0092038, 0.99996 - 0x3f85fda037ac05e0, 0x3fefff871937ce2f, // 0.010738, 0.99994 - 0x3f8921d1fcdec784, 0x3fefff62169b92db, // 0.012272, 0.99992 - 0x3f8c45ffe1e48ad9, 0x3fefff3824c88f6f, // 0.013805, 0.9999 - 0x3f8f6a296ab997ca, 0x3fefff0943c53bd1, // 0.015339, 0.99988 - 0x3f9147270dad7132, 0x3feffed57398d2b7, // 0.016873, 0.99986 - 0x3f92d936bbe30efd, 0x3feffe9cb44b51a1, // 0.018407, 0.99983 - 0x3f946b4381fce81c, 0x3feffe5f05e578db, // 0.01994, 0.9998 - 0x3f95fd4d21fab226, 0x3feffe1c6870cb77, // 0.021474, 0.99977 - 0x3f978f535ddc9f03, 0x3feffdd4dbf78f52, // 0.023008, 0.99974 - 0x3f992155f7a3667e, 0x3feffd886084cd0d, // 0.024541, 0.9997 - 0x3f9ab354b1504fca, 0x3feffd36f624500c, // 0.026075, 0.99966 - 0x3f9c454f4ce53b1c, 0x3feffce09ce2a679, // 0.027608, 0.99962 - 0x3f9dd7458c64ab39, 0x3feffc8554cd213a, // 0.029142, 0.99958 - 0x3f9f693731d1cf01, 0x3feffc251df1d3f8, // 0.030675, 0.99953 - 0x3fa07d91ff984580, 0x3feffbbff85f9515, // 0.032208, 0.99948 - 0x3fa14685db42c17e, 0x3feffb55e425fdae, // 0.033741, 0.99943 - 0x3fa20f770ceb11c6, 0x3feffae6e1556998, // 0.035274, 0.99938 - 0x3fa2d865759455cd, 0x3feffa72effef75d, // 0.036807, 0.99932 - 0x3fa3a150f6421afc, 0x3feff9fa10348837, // 0.03834, 0.99926 - 0x3fa46a396ff86179, 0x3feff97c4208c014, // 0.039873, 0.9992 - 0x3fa5331ec3bba0eb, 0x3feff8f9858f058b, // 0.041406, 0.99914 - 0x3fa5fc00d290cd43, 0x3feff871dadb81df, // 0.042938, 0.99908 - 0x3fa6c4df7d7d5b84, 0x3feff7e5420320f9, // 0.044471, 0.99901 - 0x3fa78dbaa5874685, 0x3feff753bb1b9164, // 0.046003, 0.99894 - 0x3fa856922bb513c1, 0x3feff6bd463b444d, // 0.047535, 0.99887 - 0x3fa91f65f10dd814, 0x3feff621e3796d7e, // 0.049068, 0.9988 - 0x3fa9e835d6993c87, 0x3feff58192ee0358, // 0.0506, 0.99872 - 0x3faab101bd5f8317, 0x3feff4dc54b1bed3, // 0.052132, 0.99864 - 0x3fab79c986698b78, 0x3feff43228de1b77, // 0.053664, 0.99856 - 0x3fac428d12c0d7e3, 0x3feff3830f8d575c, // 0.055195, 0.99848 - 0x3fad0b4c436f91d0, 0x3feff2cf08da7321, // 0.056727, 0.99839 - 0x3fadd406f9808ec8, 0x3feff21614e131ed, // 0.058258, 0.9983 - 0x3fae9cbd15ff5527, 0x3feff15833be1965, // 0.05979, 0.99821 - 0x3faf656e79f820e0, 0x3feff095658e71ad, // 0.061321, 0.99812 - 0x3fb0170d833bf421, 0x3fefefcdaa704562, // 0.062852, 0.99802 - 0x3fb07b614e463064, 0x3fefef0102826191, // 0.064383, 0.99793 - 0x3fb0dfb28ea201e6, 0x3fefee2f6de455ba, // 0.065913, 0.99783 - 0x3fb1440134d709b2, 0x3fefed58ecb673c4, // 0.067444, 0.99772 - 0x3fb1a84d316d4f8a, 0x3fefec7d7f19cffc, // 0.068974, 0.99762 - 0x3fb20c9674ed444c, 0x3fefeb9d2530410f, // 0.070505, 0.99751 - 0x3fb270dcefdfc45b, 0x3fefeab7df1c6005, // 0.072035, 0.9974 - 0x3fb2d52092ce19f6, 0x3fefe9cdad01883a, // 0.073565, 0.99729 - 0x3fb339614e41ffa5, 0x3fefe8de8f03d75c, // 0.075094, 0.99718 - 0x3fb39d9f12c5a299, 0x3fefe7ea85482d60, // 0.076624, 0.99706 - 0x3fb401d9d0e3a507, 0x3fefe6f18ff42c84, // 0.078153, 0.99694 - 0x3fb4661179272096, 0x3fefe5f3af2e3940, // 0.079682, 0.99682 - 0x3fb4ca45fc1ba8b6, 0x3fefe4f0e31d7a4a, // 0.081211, 0.9967 - 0x3fb52e774a4d4d0a, 0x3fefe3e92be9d886, // 0.08274, 0.99657 - 0x3fb592a554489bc8, 0x3fefe2dc89bbff08, // 0.084269, 0.99644 - 0x3fb5f6d00a9aa419, 0x3fefe1cafcbd5b09, // 0.085797, 0.99631 - 0x3fb65af75dd0f87b, 0x3fefe0b485181be3, // 0.087326, 0.99618 - 0x3fb6bf1b3e79b129, 0x3fefdf9922f73307, // 0.088854, 0.99604 - 0x3fb7233b9d236e71, 0x3fefde78d68653fd, // 0.090381, 0.99591 - 0x3fb787586a5d5b21, 0x3fefdd539ff1f456, // 0.091909, 0.99577 - 0x3fb7eb7196b72ee4, 0x3fefdc297f674ba9, // 0.093436, 0.99563 - 0x3fb84f8712c130a0, 0x3fefdafa7514538c, // 0.094963, 0.99548 - 0x3fb8b398cf0c38e0, 0x3fefd9c68127c78c, // 0.09649, 0.99533 - 0x3fb917a6bc29b42c, 0x3fefd88da3d12526, // 0.098017, 0.99518 - 0x3fb97bb0caaba56f, 0x3fefd74fdd40abbf, // 0.099544, 0.99503 - 0x3fb9dfb6eb24a85c, 0x3fefd60d2da75c9e, // 0.10107, 0.99488 - 0x3fba43b90e27f3c4, 0x3fefd4c59536fae4, // 0.1026, 0.99472 - 0x3fbaa7b724495c04, 0x3fefd37914220b84, // 0.10412, 0.99456 - 0x3fbb0bb11e1d5559, 0x3fefd227aa9bd53b, // 0.10565, 0.9944 - 0x3fbb6fa6ec38f64c, 0x3fefd0d158d86087, // 0.10717, 0.99424 - 0x3fbbd3987f31fa0e, 0x3fefcf761f0c77a3, // 0.1087, 0.99407 - 0x3fbc3785c79ec2d5, 0x3fefce15fd6da67b, // 0.11022, 0.99391 - 0x3fbc9b6eb6165c42, 0x3fefccb0f4323aa3, // 0.11175, 0.99374 - 0x3fbcff533b307dc1, 0x3fefcb4703914354, // 0.11327, 0.99356 - 0x3fbd633347858ce4, 0x3fefc9d82bc2915e, // 0.11479, 0.99339 - 0x3fbdc70ecbae9fc8, 0x3fefc8646cfeb721, // 0.11632, 0.99321 - 0x3fbe2ae5b8457f77, 0x3fefc6ebc77f0887, // 0.11784, 0.99303 - 0x3fbe8eb7fde4aa3e, 0x3fefc56e3b7d9af6, // 0.11937, 0.99285 - 0x3fbef2858d27561b, 0x3fefc3ebc935454c, // 0.12089, 0.99267 - 0x3fbf564e56a9730e, 0x3fefc26470e19fd3, // 0.12241, 0.99248 - 0x3fbfba124b07ad85, 0x3fefc0d832bf043a, // 0.12393, 0.99229 - 0x3fc00ee8ad6fb85b, 0x3fefbf470f0a8d88, // 0.12545, 0.9921 - 0x3fc040c5bb67747e, 0x3fefbdb106021816, // 0.12698, 0.99191 - 0x3fc072a047ba831d, 0x3fefbc1617e44186, // 0.1285, 0.99171 - 0x3fc0a4784ab8bf1d, 0x3fefba7644f068b5, // 0.13002, 0.99151 - 0x3fc0d64dbcb26786, 0x3fefb8d18d66adb7, // 0.13154, 0.99131 - 0x3fc1082095f820b0, 0x3fefb727f187f1c7, // 0.13306, 0.99111 - 0x3fc139f0cedaf576, 0x3fefb5797195d741, // 0.13458, 0.9909 - 0x3fc16bbe5fac5865, 0x3fefb3c60dd2c199, // 0.1361, 0.9907 - 0x3fc19d8940be24e7, 0x3fefb20dc681d54d, // 0.13762, 0.99049 - 0x3fc1cf516a62a077, 0x3fefb0509be6f7db, // 0.13914, 0.99027 - 0x3fc20116d4ec7bce, 0x3fefae8e8e46cfbb, // 0.14066, 0.99006 - 0x3fc232d978aed413, 0x3fefacc79de6c44f, // 0.14218, 0.98984 - 0x3fc264994dfd340a, 0x3fefaafbcb0cfddc, // 0.1437, 0.98962 - 0x3fc296564d2b953e, 0x3fefa92b1600657c, // 0.14521, 0.9894 - 0x3fc2c8106e8e613a, 0x3fefa7557f08a517, // 0.14673, 0.98918 - 0x3fc2f9c7aa7a72af, 0x3fefa57b066e2754, // 0.14825, 0.98895 - 0x3fc32b7bf94516a7, 0x3fefa39bac7a1791, // 0.14976, 0.98872 - 0x3fc35d2d53440db2, 0x3fefa1b7717661d5, // 0.15128, 0.98849 - 0x3fc38edbb0cd8d14, 0x3fef9fce55adb2c8, // 0.1528, 0.98826 - 0x3fc3c0870a383ff6, 0x3fef9de0596b77a3, // 0.15431, 0.98802 - 0x3fc3f22f57db4893, 0x3fef9bed7cfbde29, // 0.15583, 0.98778 - 0x3fc423d4920e4166, 0x3fef99f5c0abd496, // 0.15734, 0.98754 - 0x3fc45576b1293e5a, 0x3fef97f924c9099b, // 0.15886, 0.9873 - 0x3fc48715ad84cdf5, 0x3fef95f7a9a1ec47, // 0.16037, 0.98706 - 0x3fc4b8b17f79fa88, 0x3fef93f14f85ac08, // 0.16189, 0.98681 - 0x3fc4ea4a1f624b61, 0x3fef91e616c43891, // 0.1634, 0.98656 - 0x3fc51bdf8597c5f2, 0x3fef8fd5ffae41db, // 0.16491, 0.98631 - 0x3fc54d71aa74ef02, 0x3fef8dc10a95380d, // 0.16643, 0.98605 - 0x3fc57f008654cbde, 0x3fef8ba737cb4b78, // 0.16794, 0.9858 - 0x3fc5b08c1192e381, 0x3fef898887a36c84, // 0.16945, 0.98554 - 0x3fc5e214448b3fc6, 0x3fef8764fa714ba9, // 0.17096, 0.98528 - 0x3fc61399179a6e94, 0x3fef853c9089595e, // 0.17247, 0.98501 - 0x3fc6451a831d830d, 0x3fef830f4a40c60c, // 0.17398, 0.98475 - 0x3fc676987f7216b8, 0x3fef80dd27ed8204, // 0.17549, 0.98448 - 0x3fc6a81304f64ab2, 0x3fef7ea629e63d6e, // 0.177, 0.98421 - 0x3fc6d98a0c08c8da, 0x3fef7c6a50826840, // 0.17851, 0.98394 - 0x3fc70afd8d08c4ff, 0x3fef7a299c1a322a, // 0.18002, 0.98366 - 0x3fc73c6d8055fe0a, 0x3fef77e40d068a90, // 0.18153, 0.98339 - 0x3fc76dd9de50bf31, 0x3fef7599a3a12077, // 0.18304, 0.98311 - 0x3fc79f429f59e11d, 0x3fef734a60446279, // 0.18455, 0.98282 - 0x3fc7d0a7bbd2cb1b, 0x3fef70f6434b7eb7, // 0.18606, 0.98254 - 0x3fc802092c1d744b, 0x3fef6e9d4d1262ca, // 0.18756, 0.98225 - 0x3fc83366e89c64c5, 0x3fef6c3f7df5bbb7, // 0.18907, 0.98196 - 0x3fc864c0e9b2b6cf, 0x3fef69dcd652f5de, // 0.19057, 0.98167 - 0x3fc8961727c41804, 0x3fef677556883cee, // 0.19208, 0.98138 - 0x3fc8c7699b34ca7e, 0x3fef6508fef47bd5, // 0.19359, 0.98108 - 0x3fc8f8b83c69a60a, 0x3fef6297cff75cb0, // 0.19509, 0.98079 - 0x3fc92a0303c8194f, 0x3fef6021c9f148c2, // 0.19659, 0.98048 - 0x3fc95b49e9b62af9, 0x3fef5da6ed43685d, // 0.1981, 0.98018 - 0x3fc98c8ce69a7aec, 0x3fef5b273a4fa2d9, // 0.1996, 0.97988 - 0x3fc9bdcbf2dc4366, 0x3fef58a2b1789e84, // 0.2011, 0.97957 - 0x3fc9ef0706e35a35, 0x3fef56195321c090, // 0.20261, 0.97926 - 0x3fca203e1b1831da, 0x3fef538b1faf2d07, // 0.20411, 0.97895 - 0x3fca517127e3dabc, 0x3fef50f81785c6b9, // 0.20561, 0.97863 - 0x3fca82a025b00451, 0x3fef4e603b0b2f2d, // 0.20711, 0.97832 - 0x3fcab3cb0ce6fe44, 0x3fef4bc38aa5c694, // 0.20861, 0.978 - 0x3fcae4f1d5f3b9ab, 0x3fef492206bcabb4, // 0.21011, 0.97768 - 0x3fcb16147941ca2a, 0x3fef467bafb7bbe0, // 0.21161, 0.97735 - 0x3fcb4732ef3d6722, 0x3fef43d085ff92dd, // 0.21311, 0.97703 - 0x3fcb784d30536cda, 0x3fef412089fd8adc, // 0.21461, 0.9767 - 0x3fcba96334f15dad, 0x3fef3e6bbc1bbc65, // 0.21611, 0.97637 - 0x3fcbda74f5856330, 0x3fef3bb21cc4fe47, // 0.2176, 0.97604 - 0x3fcc0b826a7e4f63, 0x3fef38f3ac64e589, // 0.2191, 0.9757 - 0x3fcc3c8b8c4b9dd7, 0x3fef36306b67c556, // 0.2206, 0.97536 - 0x3fcc6d90535d74dc, 0x3fef33685a3aaef0, // 0.22209, 0.97503 - 0x3fcc9e90b824a6a9, 0x3fef309b794b719f, // 0.22359, 0.97468 - 0x3fcccf8cb312b286, 0x3fef2dc9c9089a9d, // 0.22508, 0.97434 - 0x3fcd00843c99c5f9, 0x3fef2af349e17507, // 0.22658, 0.97399 - 0x3fcd31774d2cbdee, 0x3fef2817fc4609ce, // 0.22807, 0.97364 - 0x3fcd6265dd3f27e3, 0x3fef2537e0a71f9f, // 0.22957, 0.97329 - 0x3fcd934fe5454311, 0x3fef2252f7763ada, // 0.23106, 0.97294 - 0x3fcdc4355db40195, 0x3fef1f6941259d7a, // 0.23255, 0.97258 - 0x3fcdf5163f01099a, 0x3fef1c7abe284708, // 0.23404, 0.97223 - 0x3fce25f281a2b684, 0x3fef19876ef1f486, // 0.23553, 0.97187 - 0x3fce56ca1e101a1b, 0x3fef168f53f7205d, // 0.23702, 0.9715 - 0x3fce879d0cc0fdaf, 0x3fef13926dad024e, // 0.23851, 0.97114 - 0x3fceb86b462de348, 0x3fef1090bc898f5f, // 0.24, 0.97077 - 0x3fcee934c2d006c7, 0x3fef0d8a410379c5, // 0.24149, 0.9704 - 0x3fcf19f97b215f1a, 0x3fef0a7efb9230d7, // 0.24298, 0.97003 - 0x3fcf4ab9679c9f5c, 0x3fef076eecade0fa, // 0.24447, 0.96966 - 0x3fcf7b7480bd3801, 0x3fef045a14cf738c, // 0.24596, 0.96928 - 0x3fcfac2abeff57ff, 0x3fef014074708ed3, // 0.24744, 0.9689 - 0x3fcfdcdc1adfedf8, 0x3feefe220c0b95ec, // 0.24893, 0.96852 - 0x3fd006c4466e54af, 0x3feefafedc1ba8b7, // 0.25041, 0.96814 - 0x3fd01f1806b9fdd2, 0x3feef7d6e51ca3c0, // 0.2519, 0.96775 - 0x3fd037694a928cac, 0x3feef4aa278b2032, // 0.25338, 0.96737 - 0x3fd04fb80e37fdae, 0x3feef178a3e473c2, // 0.25487, 0.96698 - 0x3fd068044deab002, 0x3feeee425aa6b09a, // 0.25635, 0.96658 - 0x3fd0804e05eb661e, 0x3feeeb074c50a544, // 0.25783, 0.96619 - 0x3fd09895327b465e, 0x3feee7c77961dc9e, // 0.25931, 0.96579 - 0x3fd0b0d9cfdbdb90, 0x3feee482e25a9dbc, // 0.26079, 0.96539 - 0x3fd0c91bda4f158d, 0x3feee13987bbebdc, // 0.26227, 0.96499 - 0x3fd0e15b4e1749cd, 0x3feeddeb6a078651, // 0.26375, 0.96459 - 0x3fd0f998277733f7, 0x3feeda9889bfe86a, // 0.26523, 0.96418 - 0x3fd111d262b1f677, 0x3feed740e7684963, // 0.26671, 0.96378 - 0x3fd12a09fc0b1b12, 0x3feed3e483849c51, // 0.26819, 0.96337 - 0x3fd1423eefc69378, 0x3feed0835e999009, // 0.26967, 0.96295 - 0x3fd15a713a28b9d9, 0x3feecd1d792c8f10, // 0.27115, 0.96254 - 0x3fd172a0d7765177, 0x3feec9b2d3c3bf84, // 0.27262, 0.96212 - 0x3fd18acdc3f4873a, 0x3feec6436ee60309, // 0.2741, 0.9617 - 0x3fd1a2f7fbe8f243, 0x3feec2cf4b1af6b2, // 0.27557, 0.96128 - 0x3fd1bb1f7b999480, 0x3feebf5668eaf2ef, // 0.27705, 0.96086 - 0x3fd1d3443f4cdb3d, 0x3feebbd8c8df0b74, // 0.27852, 0.96043 - 0x3fd1eb6643499fbb, 0x3feeb8566b810f2a, // 0.27999, 0.96 - 0x3fd2038583d727bd, 0x3feeb4cf515b8811, // 0.28146, 0.95957 - 0x3fd21ba1fd3d2623, 0x3feeb1437af9bb34, // 0.28294, 0.95914 - 0x3fd233bbabc3bb72, 0x3feeadb2e8e7a88e, // 0.28441, 0.9587 - 0x3fd24bd28bb37672, 0x3feeaa1d9bb20af3, // 0.28588, 0.95827 - 0x3fd263e6995554ba, 0x3feea68393e65800, // 0.28735, 0.95783 - 0x3fd27bf7d0f2c346, 0x3feea2e4d212c000, // 0.28882, 0.95738 - 0x3fd294062ed59f05, 0x3fee9f4156c62dda, // 0.29028, 0.95694 - 0x3fd2ac11af483572, 0x3fee9b99229046f8, // 0.29175, 0.95649 - 0x3fd2c41a4e954520, 0x3fee97ec36016b30, // 0.29322, 0.95605 - 0x3fd2dc200907fe51, 0x3fee943a91aab4b4, // 0.29469, 0.95559 - 0x3fd2f422daec0386, 0x3fee9084361df7f3, // 0.29615, 0.95514 - 0x3fd30c22c08d6a13, 0x3fee8cc923edc388, // 0.29762, 0.95469 - 0x3fd3241fb638baaf, 0x3fee89095bad6025, // 0.29908, 0.95423 - 0x3fd33c19b83af207, 0x3fee8544ddf0d075, // 0.30054, 0.95377 - 0x3fd35410c2e18152, 0x3fee817bab4cd10d, // 0.30201, 0.95331 - 0x3fd36c04d27a4edf, 0x3fee7dadc456d850, // 0.30347, 0.95284 - 0x3fd383f5e353b6aa, 0x3fee79db29a5165a, // 0.30493, 0.95238 - 0x3fd39be3f1bc8aef, 0x3fee7603dbce74e9, // 0.30639, 0.95191 - 0x3fd3b3cefa0414b7, 0x3fee7227db6a9744, // 0.30785, 0.95144 - 0x3fd3cbb6f87a146e, 0x3fee6e472911da27, // 0.30931, 0.95096 - 0x3fd3e39be96ec271, 0x3fee6a61c55d53a7, // 0.31077, 0.95049 - 0x3fd3fb7dc932cfa4, 0x3fee6677b0e6d31e, // 0.31222, 0.95001 - 0x3fd4135c94176602, 0x3fee6288ec48e112, // 0.31368, 0.94953 - 0x3fd42b38466e2928, 0x3fee5e95781ebf1c, // 0.31514, 0.94905 - 0x3fd44310dc8936f0, 0x3fee5a9d550467d3, // 0.31659, 0.94856 - 0x3fd45ae652bb2800, 0x3fee56a083968eb1, // 0.31805, 0.94807 - 0x3fd472b8a5571054, 0x3fee529f04729ffc, // 0.3195, 0.94759 - 0x3fd48a87d0b07fd7, 0x3fee4e98d836c0af, // 0.32096, 0.94709 - 0x3fd4a253d11b82f3, 0x3fee4a8dff81ce5e, // 0.32241, 0.9466 - 0x3fd4ba1ca2eca31c, 0x3fee467e7af35f23, // 0.32386, 0.94611 - 0x3fd4d1e24278e76a, 0x3fee426a4b2bc17e, // 0.32531, 0.94561 - 0x3fd4e9a4ac15d520, 0x3fee3e5170cbfc46, // 0.32676, 0.94511 - 0x3fd50163dc197047, 0x3fee3a33ec75ce85, // 0.32821, 0.9446 - 0x3fd5191fceda3c35, 0x3fee3611becbaf69, // 0.32966, 0.9441 - 0x3fd530d880af3c24, 0x3fee31eae870ce25, // 0.33111, 0.94359 - 0x3fd5488dedeff3be, 0x3fee2dbf6a0911d9, // 0.33255, 0.94308 - 0x3fd5604012f467b4, 0x3fee298f4439197a, // 0.334, 0.94257 - 0x3fd577eeec151e47, 0x3fee255a77a63bb8, // 0.33545, 0.94206 - 0x3fd58f9a75ab1fdd, 0x3fee212104f686e5, // 0.33689, 0.94154 - 0x3fd5a742ac0ff78d, 0x3fee1ce2ecd0c0d8, // 0.33833, 0.94103 - 0x3fd5bee78b9db3b6, 0x3fee18a02fdc66d9, // 0.33978, 0.94051 - 0x3fd5d68910aee686, 0x3fee1458cec1ad83, // 0.34122, 0.93998 - 0x3fd5ee27379ea693, 0x3fee100cca2980ac, // 0.34266, 0.93946 - 0x3fd605c1fcc88f63, 0x3fee0bbc22bd8349, // 0.3441, 0.93893 - 0x3fd61d595c88c203, 0x3fee0766d9280f54, // 0.34554, 0.9384 - 0x3fd634ed533be58e, 0x3fee030cee1435b8, // 0.34698, 0.93787 - 0x3fd64c7ddd3f27c6, 0x3fedfeae622dbe2b, // 0.34842, 0.93734 - 0x3fd6640af6f03d9e, 0x3fedfa4b3621271d, // 0.34986, 0.9368 - 0x3fd67b949cad63ca, 0x3fedf5e36a9ba59c, // 0.35129, 0.93627 - 0x3fd6931acad55f51, 0x3fedf177004b2534, // 0.35273, 0.93573 - 0x3fd6aa9d7dc77e16, 0x3feded05f7de47da, // 0.35416, 0.93518 - 0x3fd6c21cb1e39771, 0x3fede890520465ce, // 0.3556, 0.93464 - 0x3fd6d998638a0cb5, 0x3fede4160f6d8d81, // 0.35703, 0.93409 - 0x3fd6f1108f1bc9c5, 0x3feddf9730ca837b, // 0.35846, 0.93354 - 0x3fd7088530fa459e, 0x3feddb13b6ccc23d, // 0.3599, 0.93299 - 0x3fd71ff6458782ec, 0x3fedd68ba2267a25, // 0.36133, 0.93244 - 0x3fd73763c9261092, 0x3fedd1fef38a915a, // 0.36276, 0.93188 - 0x3fd74ecdb8390a3e, 0x3fedcd6dabaca3a5, // 0.36418, 0.93133 - 0x3fd766340f2418f6, 0x3fedc8d7cb410260, // 0.36561, 0.93077 - 0x3fd77d96ca4b73a6, 0x3fedc43d52fcb453, // 0.36704, 0.93021 - 0x3fd794f5e613dfae, 0x3fedbf9e4395759a, // 0.36847, 0.92964 - 0x3fd7ac515ee2b172, 0x3fedbafa9dc1b78d, // 0.36989, 0.92907 - 0x3fd7c3a9311dcce7, 0x3fedb6526238a09b, // 0.37132, 0.92851 - 0x3fd7dafd592ba621, 0x3fedb1a591b20c38, // 0.37274, 0.92794 - 0x3fd7f24dd37341e3, 0x3fedacf42ce68ab9, // 0.37416, 0.92736 - 0x3fd8099a9c5c362d, 0x3feda83e348f613b, // 0.37559, 0.92679 - 0x3fd820e3b04eaac4, 0x3feda383a9668988, // 0.37701, 0.92621 - 0x3fd838290bb359c8, 0x3fed9ec48c26b1f3, // 0.37843, 0.92563 - 0x3fd84f6aaaf3903f, 0x3fed9a00dd8b3d46, // 0.37985, 0.92505 - 0x3fd866a88a792ea0, 0x3fed95389e50429b, // 0.38127, 0.92447 - 0x3fd87de2a6aea963, 0x3fed906bcf328d46, // 0.38268, 0.92388 - 0x3fd89518fbff098e, 0x3fed8b9a70ef9cb4, // 0.3841, 0.92329 - 0x3fd8ac4b86d5ed44, 0x3fed86c48445a450, // 0.38552, 0.9227 - 0x3fd8c37a439f884f, 0x3fed81ea09f38b63, // 0.38693, 0.92211 - 0x3fd8daa52ec8a4af, 0x3fed7d0b02b8ecf9, // 0.38835, 0.92151 - 0x3fd8f1cc44bea329, 0x3fed78276f5617c6, // 0.38976, 0.92092 - 0x3fd908ef81ef7bd1, 0x3fed733f508c0dff, // 0.39117, 0.92032 - 0x3fd9200ee2c9be97, 0x3fed6e52a71c8547, // 0.39258, 0.91972 - 0x3fd9372a63bc93d7, 0x3fed696173c9e68b, // 0.39399, 0.91911 - 0x3fd94e420137bce3, 0x3fed646bb7574de5, // 0.3954, 0.91851 - 0x3fd96555b7ab948f, 0x3fed5f7172888a7f, // 0.39681, 0.9179 - 0x3fd97c6583890fc2, 0x3fed5a72a6221e73, // 0.39822, 0.91729 - 0x3fd993716141bdfe, 0x3fed556f52e93eb1, // 0.39962, 0.91668 - 0x3fd9aa794d47c9ee, 0x3fed506779a3d2d9, // 0.40103, 0.91606 - 0x3fd9c17d440df9f2, 0x3fed4b5b1b187524, // 0.40243, 0.91545 - 0x3fd9d87d4207b0ab, 0x3fed464a380e7242, // 0.40384, 0.91483 - 0x3fd9ef7943a8ed8a, 0x3fed4134d14dc93a, // 0.40524, 0.91421 - 0x3fda067145664d57, 0x3fed3c1ae79f2b4e, // 0.40664, 0.91359 - 0x3fda1d6543b50ac0, 0x3fed36fc7bcbfbdc, // 0.40804, 0.91296 - 0x3fda34553b0afee5, 0x3fed31d98e9e503a, // 0.40944, 0.91234 - 0x3fda4b4127dea1e4, 0x3fed2cb220e0ef9f, // 0.41084, 0.91171 - 0x3fda622906a70b63, 0x3fed2786335f52fc, // 0.41224, 0.91107 - 0x3fda790cd3dbf31a, 0x3fed2255c6e5a4e1, // 0.41364, 0.91044 - 0x3fda8fec8bf5b166, 0x3fed1d20dc40c15c, // 0.41503, 0.90981 - 0x3fdaa6c82b6d3fc9, 0x3fed17e7743e35dc, // 0.41643, 0.90917 - 0x3fdabd9faebc3980, 0x3fed12a98fac410c, // 0.41782, 0.90853 - 0x3fdad473125cdc08, 0x3fed0d672f59d2b9, // 0.41922, 0.90789 - 0x3fdaeb4252ca07ab, 0x3fed082054168bac, // 0.42061, 0.90724 - 0x3fdb020d6c7f4009, 0x3fed02d4feb2bd92, // 0.422, 0.9066 - 0x3fdb18d45bf8aca6, 0x3fecfd852fff6ad4, // 0.42339, 0.90595 - 0x3fdb2f971db31972, 0x3fecf830e8ce467b, // 0.42478, 0.9053 - 0x3fdb4655ae2bf757, 0x3fecf2d829f1b40e, // 0.42617, 0.90464 - 0x3fdb5d1009e15cc0, 0x3feced7af43cc773, // 0.42756, 0.90399 - 0x3fdb73c62d520624, 0x3fece819488344ce, // 0.42894, 0.90333 - 0x3fdb8a7814fd5693, 0x3fece2b32799a060, // 0.43033, 0.90267 - 0x3fdba125bd63583e, 0x3fecdd489254fe65, // 0.43171, 0.90201 - 0x3fdbb7cf2304bd01, 0x3fecd7d9898b32f6, // 0.43309, 0.90135 - 0x3fdbce744262deee, 0x3fecd2660e12c1e6, // 0.43448, 0.90068 - 0x3fdbe51517ffc0d9, 0x3fecccee20c2de9f, // 0.43586, 0.90002 - 0x3fdbfbb1a05e0edc, 0x3fecc771c2736c09, // 0.43724, 0.89935 - 0x3fdc1249d8011ee7, 0x3fecc1f0f3fcfc5c, // 0.43862, 0.89867 - 0x3fdc28ddbb6cf145, 0x3fecbc6bb638d10b, // 0.43999, 0.898 - 0x3fdc3f6d47263129, 0x3fecb6e20a00da99, // 0.44137, 0.89732 - 0x3fdc55f877b23537, 0x3fecb153f02fb87d, // 0.44275, 0.89665 - 0x3fdc6c7f4997000a, 0x3fecabc169a0b901, // 0.44412, 0.89597 - 0x3fdc8301b95b40c2, 0x3feca62a772fd919, // 0.4455, 0.89528 - 0x3fdc997fc3865388, 0x3feca08f19b9c449, // 0.44687, 0.8946 - 0x3fdcaff964a0421d, 0x3fec9aef521bd480, // 0.44824, 0.89391 - 0x3fdcc66e9931c45d, 0x3fec954b213411f5, // 0.44961, 0.89322 - 0x3fdcdcdf5dc440ce, 0x3fec8fa287e13305, // 0.45098, 0.89253 - 0x3fdcf34baee1cd21, 0x3fec89f587029c13, // 0.45235, 0.89184 - 0x3fdd09b389152ec1, 0x3fec84441f785f61, // 0.45372, 0.89115 - 0x3fdd2016e8e9db5b, 0x3fec7e8e52233cf3, // 0.45508, 0.89045 - 0x3fdd3675caebf962, 0x3fec78d41fe4a267, // 0.45645, 0.88975 - 0x3fdd4cd02ba8609c, 0x3fec7315899eaad7, // 0.45781, 0.88905 - 0x3fdd632607ac9aa9, 0x3fec6d5290341eb2, // 0.45918, 0.88835 - 0x3fdd79775b86e389, 0x3fec678b3488739b, // 0.46054, 0.88764 - 0x3fdd8fc423c62a25, 0x3fec61bf777fcc48, // 0.4619, 0.88693 - 0x3fdda60c5cfa10d8, 0x3fec5bef59fef85a, // 0.46326, 0.88622 - 0x3fddbc5003b2edf8, 0x3fec561adceb743e, // 0.46462, 0.88551 - 0x3fddd28f1481cc58, 0x3fec5042012b6907, // 0.46598, 0.8848 - 0x3fdde8c98bf86bd6, 0x3fec4a64c7a5ac4c, // 0.46733, 0.88408 - 0x3fddfeff66a941de, 0x3fec44833141c004, // 0.46869, 0.88336 - 0x3fde1530a12779f4, 0x3fec3e9d3ee7d262, // 0.47004, 0.88264 - 0x3fde2b5d3806f63b, 0x3fec38b2f180bdb1, // 0.4714, 0.88192 - 0x3fde418527dc4ffa, 0x3fec32c449f60831, // 0.47275, 0.8812 - 0x3fde57a86d3cd824, 0x3fec2cd14931e3f1, // 0.4741, 0.88047 - 0x3fde6dc704be97e2, 0x3fec26d9f01f2eaf, // 0.47545, 0.87974 - 0x3fde83e0eaf85113, 0x3fec20de3fa971b0, // 0.4768, 0.87901 - 0x3fde99f61c817eda, 0x3fec1ade38bce19b, // 0.47815, 0.87828 - 0x3fdeb00695f25620, 0x3fec14d9dc465e58, // 0.47949, 0.87755 - 0x3fdec61253e3c61b, 0x3fec0ed12b3372e9, // 0.48084, 0.87681 - 0x3fdedc1952ef78d5, 0x3fec08c426725549, // 0.48218, 0.87607 - 0x3fdef21b8fafd3b5, 0x3fec02b2cef1e641, // 0.48353, 0.87533 - 0x3fdf081906bff7fd, 0x3febfc9d25a1b147, // 0.48487, 0.87459 - 0x3fdf1e11b4bbc35c, 0x3febf6832b71ec5b, // 0.48621, 0.87384 - 0x3fdf3405963fd068, 0x3febf064e15377dd, // 0.48755, 0.87309 - 0x3fdf49f4a7e97729, 0x3febea424837de6d, // 0.48889, 0.87235 - 0x3fdf5fdee656cda3, 0x3febe41b611154c1, // 0.49023, 0.8716 - 0x3fdf75c44e26a852, 0x3febddf02cd2b983, // 0.49156, 0.87084 - 0x3fdf8ba4dbf89aba, 0x3febd7c0ac6f952a, // 0.4929, 0.87009 - 0x3fdfa1808c6cf7e0, 0x3febd18ce0dc19d6, // 0.49423, 0.86933 - 0x3fdfb7575c24d2de, 0x3febcb54cb0d2327, // 0.49557, 0.86857 - 0x3fdfcd2947c1ff57, 0x3febc5186bf8361d, // 0.4969, 0.86781 - 0x3fdfe2f64be7120f, 0x3febbed7c49380ea, // 0.49823, 0.86705 - 0x3fdff8be6537615e, 0x3febb892d5d5dad5, // 0.49956, 0.86628 - 0x3fe00740c82b82e0, 0x3febb249a0b6c40d, // 0.50089, 0.86551 - 0x3fe0121fe4f56d2c, 0x3febabfc262e6586, // 0.50221, 0.86474 - 0x3fe01cfc874c3eb7, 0x3feba5aa673590d2, // 0.50354, 0.86397 - 0x3fe027d6ad83287e, 0x3feb9f5464c5bffc, // 0.50486, 0.8632 - 0x3fe032ae55edbd95, 0x3feb98fa1fd9155e, // 0.50619, 0.86242 - 0x3fe03d837edff370, 0x3feb929b996a5b7f, // 0.50751, 0.86165 - 0x3fe0485626ae221a, 0x3feb8c38d27504e9, // 0.50883, 0.86087 - 0x3fe053264bad0483, 0x3feb85d1cbf52c02, // 0.51015, 0.86009 - 0x3fe05df3ec31b8b6, 0x3feb7f6686e792ea, // 0.51147, 0.8593 - 0x3fe068bf0691c028, 0x3feb78f70449a34b, // 0.51279, 0.85852 - 0x3fe073879922ffed, 0x3feb728345196e3e, // 0.5141, 0.85773 - 0x3fe07e4da23bc102, 0x3feb6c0b4a55ac17, // 0.51542, 0.85694 - 0x3fe089112032b08c, 0x3feb658f14fdbc47, // 0.51673, 0.85615 - 0x3fe093d2115ee018, 0x3feb5f0ea611a532, // 0.51804, 0.85535 - 0x3fe09e907417c5e1, 0x3feb5889fe921405, // 0.51936, 0.85456 - 0x3fe0a94c46b53d0b, 0x3feb52011f805c92, // 0.52067, 0.85376 - 0x3fe0b405878f85ec, 0x3feb4b7409de7925, // 0.52198, 0.85296 - 0x3fe0bebc34ff4646, 0x3feb44e2beaf0a61, // 0.52328, 0.85216 - 0x3fe0c9704d5d898f, 0x3feb3e4d3ef55712, // 0.52459, 0.85136 - 0x3fe0d421cf03c12b, 0x3feb37b38bb54c09, // 0.5259, 0.85055 - 0x3fe0ded0b84bc4b5, 0x3feb3115a5f37bf4, // 0.5272, 0.84974 - 0x3fe0e97d078fd23b, 0x3feb2a738eb51f33, // 0.5285, 0.84893 - 0x3fe0f426bb2a8e7d, 0x3feb23cd470013b4, // 0.5298, 0.84812 - 0x3fe0fecdd1770537, 0x3feb1d22cfdadcc6, // 0.5311, 0.84731 - 0x3fe1097248d0a956, 0x3feb16742a4ca2f5, // 0.5324, 0.84649 - 0x3fe114141f935545, 0x3feb0fc1575d33db, // 0.5337, 0.84567 - 0x3fe11eb3541b4b22, 0x3feb090a58150200, // 0.535, 0.84485 - 0x3fe1294fe4c5350a, 0x3feb024f2d7d24a9, // 0.53629, 0.84403 - 0x3fe133e9cfee254e, 0x3feafb8fd89f57b6, // 0.53759, 0.84321 - 0x3fe13e8113f396c1, 0x3feaf4cc5a85fb73, // 0.53888, 0.84238 - 0x3fe14915af336ceb, 0x3feaee04b43c1474, // 0.54017, 0.84155 - 0x3fe153a7a00bf453, 0x3feae738e6cd4b67, // 0.54146, 0.84073 - 0x3fe15e36e4dbe2bc, 0x3feae068f345ecef, // 0.54275, 0.83989 - 0x3fe168c37c025764, 0x3fead994dab2e979, // 0.54404, 0.83906 - 0x3fe1734d63dedb49, 0x3fead2bc9e21d511, // 0.54532, 0.83822 - 0x3fe17dd49ad16161, 0x3feacbe03ea0e73b, // 0.54661, 0.83739 - 0x3fe188591f3a46e5, 0x3feac4ffbd3efac8, // 0.54789, 0.83655 - 0x3fe192daef7a5386, 0x3feabe1b1b0b8dac, // 0.54918, 0.83571 - 0x3fe19d5a09f2b9b8, 0x3feab7325916c0d4, // 0.55046, 0.83486 - 0x3fe1a7d66d0516e6, 0x3feab045787157ff, // 0.55174, 0.83402 - 0x3fe1b250171373be, 0x3feaa9547a2cb98e, // 0.55302, 0.83317 - 0x3fe1bcc706804467, 0x3feaa25f5f5aee60, // 0.55429, 0.83232 - 0x3fe1c73b39ae68c8, 0x3fea9b66290ea1a3, // 0.55557, 0.83147 - 0x3fe1d1acaf012cc2, 0x3fea9468d85b20ae, // 0.55685, 0.83062 - 0x3fe1dc1b64dc4872, 0x3fea8d676e545ad2, // 0.55812, 0.82976 - 0x3fe1e68759a3e074, 0x3fea8661ec0ee133, // 0.55939, 0.8289 - 0x3fe1f0f08bbc861b, 0x3fea7f58529fe69d, // 0.56066, 0.82805 - 0x3fe1fb56f98b37b8, 0x3fea784aa31d3f55, // 0.56193, 0.82718 - 0x3fe205baa17560d6, 0x3fea7138de9d60f5, // 0.5632, 0.82632 - 0x3fe2101b81e0da78, 0x3fea6a230637623b, // 0.56447, 0.82546 - 0x3fe21a799933eb58, 0x3fea63091b02fae2, // 0.56573, 0.82459 - 0x3fe224d4e5d5482e, 0x3fea5beb1e188375, // 0.567, 0.82372 - 0x3fe22f2d662c13e1, 0x3fea54c91090f524, // 0.56826, 0.82285 - 0x3fe23983189fdfd5, 0x3fea4da2f385e997, // 0.56952, 0.82198 - 0x3fe243d5fb98ac1f, 0x3fea4678c8119ac8, // 0.57078, 0.8211 - 0x3fe24e260d7ee7c9, 0x3fea3f4a8f4ee2d2, // 0.57204, 0.82023 - 0x3fe258734cbb7110, 0x3fea38184a593bc6, // 0.5733, 0.81935 - 0x3fe262bdb7b795a2, 0x3fea30e1fa4cbf81, // 0.57455, 0.81847 - 0x3fe26d054cdd12df, 0x3fea29a7a0462782, // 0.57581, 0.81758 - 0x3fe2774a0a961612, 0x3fea22693d62ccb9, // 0.57706, 0.8167 - 0x3fe2818bef4d3cba, 0x3fea1b26d2c0a75e, // 0.57831, 0.81581 - 0x3fe28bcaf96d94ba, 0x3fea13e0617e4ec7, // 0.57956, 0.81493 - 0x3fe2960727629ca8, 0x3fea0c95eabaf937, // 0.58081, 0.81404 - 0x3fe2a040779843fb, 0x3fea05476f967bb5, // 0.58206, 0.81314 - 0x3fe2aa76e87aeb58, 0x3fe9fdf4f13149de, // 0.58331, 0.81225 - 0x3fe2b4aa787764c4, 0x3fe9f69e70ac75bc, // 0.58455, 0.81135 - 0x3fe2bedb25faf3ea, 0x3fe9ef43ef29af94, // 0.5858, 0.81046 - 0x3fe2c908ef734e57, 0x3fe9e7e56dcb45bd, // 0.58704, 0.80956 - 0x3fe2d333d34e9bb7, 0x3fe9e082edb42472, // 0.58828, 0.80866 - 0x3fe2dd5bcffb7616, 0x3fe9d91c7007d5a6, // 0.58952, 0.80775 - 0x3fe2e780e3e8ea16, 0x3fe9d1b1f5ea80d6, // 0.59076, 0.80685 - 0x3fe2f1a30d86773a, 0x3fe9ca438080eadb, // 0.592, 0.80594 - 0x3fe2fbc24b441015, 0x3fe9c2d110f075c3, // 0.59323, 0.80503 - 0x3fe305de9b921a94, 0x3fe9bb5aa85f2098, // 0.59447, 0.80412 - 0x3fe30ff7fce17035, 0x3fe9b3e047f38741, // 0.5957, 0.80321 - 0x3fe31a0e6da35e44, 0x3fe9ac61f0d4e247, // 0.59693, 0.80229 - 0x3fe32421ec49a620, 0x3fe9a4dfa42b06b2, // 0.59816, 0.80138 - 0x3fe32e3277467d6b, 0x3fe99d59631e65d5, // 0.59939, 0.80046 - 0x3fe338400d0c8e57, 0x3fe995cf2ed80d22, // 0.60062, 0.79954 - 0x3fe3424aac0ef7d6, 0x3fe98e410881a600, // 0.60184, 0.79861 - 0x3fe34c5252c14de1, 0x3fe986aef1457594, // 0.60307, 0.79769 - 0x3fe35656ff9799ae, 0x3fe97f18ea4e5c9e, // 0.60429, 0.79676 - 0x3fe36058b10659f3, 0x3fe9777ef4c7d742, // 0.60551, 0.79584 - 0x3fe36a576582831b, 0x3fe96fe111ddfce0, // 0.60673, 0.79491 - 0x3fe374531b817f8d, 0x3fe9683f42bd7fe1, // 0.60795, 0.79398 - 0x3fe37e4bd1792fe2, 0x3fe960998893ad8c, // 0.60917, 0.79304 - 0x3fe3884185dfeb22, 0x3fe958efe48e6dd7, // 0.61038, 0.79211 - 0x3fe39234372c7f04, 0x3fe9514257dc4335, // 0.6116, 0.79117 - 0x3fe39c23e3d63029, 0x3fe94990e3ac4a6c, // 0.61281, 0.79023 - 0x3fe3a6108a54ba58, 0x3fe941db892e3a65, // 0.61402, 0.78929 - 0x3fe3affa292050b9, 0x3fe93a22499263fc, // 0.61523, 0.78835 - 0x3fe3b9e0beb19e18, 0x3fe932652609b1cf, // 0.61644, 0.7874 - 0x3fe3c3c44981c517, 0x3fe92aa41fc5a815, // 0.61765, 0.78646 - 0x3fe3cda4c80a6076, 0x3fe922df37f8646a, // 0.61885, 0.78551 - 0x3fe3d78238c58343, 0x3fe91b166fd49da2, // 0.62006, 0.78456 - 0x3fe3e15c9a2db922, 0x3fe91349c88da398, // 0.62126, 0.7836 - 0x3fe3eb33eabe0680, 0x3fe90b7943575efe, // 0.62246, 0.78265 - 0x3fe3f50828f1e8d2, 0x3fe903a4e1665133, // 0.62366, 0.78169 - 0x3fe3fed9534556d4, 0x3fe8fbcca3ef940d, // 0.62486, 0.78074 - 0x3fe408a76834c0c0, 0x3fe8f3f08c28d9ac, // 0.62606, 0.77978 - 0x3fe41272663d108c, 0x3fe8ec109b486c49, // 0.62725, 0.77882 - 0x3fe41c3a4bdbaa26, 0x3fe8e42cd2852e0a, // 0.62845, 0.77785 - 0x3fe425ff178e6bb1, 0x3fe8dc45331698cc, // 0.62964, 0.77689 - 0x3fe42fc0c7d3adbb, 0x3fe8d459be34bdfa, // 0.63083, 0.77592 - 0x3fe4397f5b2a4380, 0x3fe8cc6a75184655, // 0.63202, 0.77495 - 0x3fe4433ad0117b1d, 0x3fe8c47758fa71cb, // 0.63321, 0.77398 - 0x3fe44cf325091dd6, 0x3fe8bc806b151741, // 0.63439, 0.77301 - 0x3fe456a858917046, 0x3fe8b485aca2a468, // 0.63558, 0.77204 - 0x3fe4605a692b32a2, 0x3fe8ac871ede1d88, // 0.63676, 0.77106 - 0x3fe46a095557a0f1, 0x3fe8a484c3031d50, // 0.63794, 0.77008 - 0x3fe473b51b987347, 0x3fe89c7e9a4dd4ab, // 0.63912, 0.7691 - 0x3fe47d5dba6fde01, 0x3fe89474a5fb0a84, // 0.6403, 0.76812 - 0x3fe48703306091fe, 0x3fe88c66e7481ba1, // 0.64148, 0.76714 - 0x3fe490a57bedbcdf, 0x3fe884555f72fa6b, // 0.64266, 0.76615 - 0x3fe49a449b9b0938, 0x3fe87c400fba2ebf, // 0.64383, 0.76517 - 0x3fe4a3e08dec9ed6, 0x3fe87426f95cd5bd, // 0.645, 0.76418 - 0x3fe4ad79516722f0, 0x3fe86c0a1d9aa195, // 0.64618, 0.76319 - 0x3fe4b70ee48fb869, 0x3fe863e97db3d95a, // 0.64735, 0.7622 - 0x3fe4c0a145ec0004, 0x3fe85bc51ae958cc, // 0.64851, 0.7612 - 0x3fe4ca30740218a3, 0x3fe8539cf67c9029, // 0.64968, 0.76021 - 0x3fe4d3bc6d589f80, 0x3fe84b7111af83f9, // 0.65085, 0.75921 - 0x3fe4dd453076b064, 0x3fe843416dc4cce2, // 0.65201, 0.75821 - 0x3fe4e6cabbe3e5e9, 0x3fe83b0e0bff976e, // 0.65317, 0.75721 - 0x3fe4f04d0e2859aa, 0x3fe832d6eda3a3e0, // 0.65433, 0.75621 - 0x3fe4f9cc25cca486, 0x3fe82a9c13f545ff, // 0.65549, 0.7552 - 0x3fe503480159ded2, 0x3fe8225d803964e5, // 0.65665, 0.75419 - 0x3fe50cc09f59a09b, 0x3fe81a1b33b57acc, // 0.65781, 0.75319 - 0x3fe51635fe5601d7, 0x3fe811d52faf94dc, // 0.65896, 0.75218 - 0x3fe51fa81cd99aa6, 0x3fe8098b756e52fa, // 0.66011, 0.75117 - 0x3fe52916f96f8388, 0x3fe8013e0638e795, // 0.66127, 0.75015 - 0x3fe5328292a35596, 0x3fe7f8ece3571771, // 0.66242, 0.74914 - 0x3fe53beae7012abe, 0x3fe7f0980e113978, // 0.66356, 0.74812 - 0x3fe5454ff5159dfb, 0x3fe7e83f87b03686, // 0.66471, 0.7471 - 0x3fe54eb1bb6dcb8f, 0x3fe7dfe3517d8937, // 0.66586, 0.74608 - 0x3fe5581038975137, 0x3fe7d7836cc33db2, // 0.667, 0.74506 - 0x3fe5616b6b204e6e, 0x3fe7cf1fdacbf179, // 0.66814, 0.74403 - 0x3fe56ac35197649e, 0x3fe7c6b89ce2d333, // 0.66928, 0.74301 - 0x3fe57417ea8bb75c, 0x3fe7be4db453a27c, // 0.67042, 0.74198 - 0x3fe57d69348cec9f, 0x3fe7b5df226aafb0, // 0.67156, 0.74095 - 0x3fe586b72e2b2cfd, 0x3fe7ad6ce874dbb6, // 0.67269, 0.73992 - 0x3fe59001d5f723df, 0x3fe7a4f707bf97d2, // 0.67383, 0.73889 - 0x3fe599492a81ffbc, 0x3fe79c7d8198e56e, // 0.67496, 0.73785 - 0x3fe5a28d2a5d7250, 0x3fe79400574f55e4, // 0.67609, 0.73682 - 0x3fe5abcdd41bb0d8, 0x3fe78b7f8a320a52, // 0.67722, 0.73578 - 0x3fe5b50b264f7448, 0x3fe782fb1b90b35b, // 0.67835, 0.73474 - 0x3fe5be451f8bf980, 0x3fe77a730cbb9100, // 0.67948, 0.7337 - 0x3fe5c77bbe65018c, 0x3fe771e75f037261, // 0.6806, 0.73265 - 0x3fe5d0af016ed1d4, 0x3fe7695813b9b594, // 0.68172, 0.73161 - 0x3fe5d9dee73e345c, 0x3fe760c52c304764, // 0.68285, 0.73056 - 0x3fe5e30b6e6877f3, 0x3fe7582ea9b9a329, // 0.68397, 0.72951 - 0x3fe5ec3495837074, 0x3fe74f948da8d28d, // 0.68508, 0.72846 - 0x3fe5f55a5b2576f8, 0x3fe746f6d9516d59, // 0.6862, 0.72741 - 0x3fe5fe7cbde56a0f, 0x3fe73e558e079942, // 0.68732, 0.72636 - 0x3fe6079bbc5aadfa, 0x3fe735b0ad2009b2, // 0.68843, 0.7253 - 0x3fe610b7551d2cde, 0x3fe72d0837efff97, // 0.68954, 0.72425 - 0x3fe619cf86c55702, 0x3fe7245c2fcd492a, // 0.69065, 0.72319 - 0x3fe622e44fec22ff, 0x3fe71bac960e41bf, // 0.69176, 0.72213 - 0x3fe62bf5af2b0dfd, 0x3fe712f96c09d18d, // 0.69287, 0.72107 - 0x3fe63503a31c1be8, 0x3fe70a42b3176d7a, // 0.69397, 0.72 - 0x3fe63e0e2a59d7aa, 0x3fe701886c8f16e6, // 0.69508, 0.71894 - 0x3fe64715437f535b, 0x3fe6f8ca99c95b75, // 0.69618, 0.71787 - 0x3fe65018ed28287f, 0x3fe6f0093c1f54de, // 0.69728, 0.7168 - 0x3fe6591925f0783e, 0x3fe6e74454eaa8ae, // 0.69838, 0.71573 - 0x3fe66215ec74eb91, 0x3fe6de7be585881d, // 0.69947, 0.71466 - 0x3fe66b0f3f52b386, 0x3fe6d5afef4aafcc, // 0.70057, 0.71358 - 0x3fe674051d27896c, 0x3fe6cce07395679f, // 0.70166, 0.71251 - 0x3fe67cf78491af10, 0x3fe6c40d73c18275, // 0.70275, 0.71143 - 0x3fe685e6742feeef, 0x3fe6bb36f12b5e06, // 0.70385, 0.71035 - 0x3fe68ed1eaa19c71, 0x3fe6b25ced2fe29c, // 0.70493, 0.70927 - 0x3fe697b9e686941c, 0x3fe6a97f692c82ea, // 0.70602, 0.70819 - 0x3fe6a09e667f3bcc, 0x3fe6a09e667f3bcc, // 0.70711, 0.70711 - 0x3fe6a97f692c82ea, 0x3fe697b9e686941c, // 0.70819, 0.70602 - 0x3fe6b25ced2fe29c, 0x3fe68ed1eaa19c71, // 0.70927, 0.70493 - 0x3fe6bb36f12b5e06, 0x3fe685e6742feeef, // 0.71035, 0.70385 - 0x3fe6c40d73c18275, 0x3fe67cf78491af10, // 0.71143, 0.70275 - 0x3fe6cce07395679f, 0x3fe674051d27896c, // 0.71251, 0.70166 - 0x3fe6d5afef4aafcc, 0x3fe66b0f3f52b386, // 0.71358, 0.70057 - 0x3fe6de7be585881d, 0x3fe66215ec74eb91, // 0.71466, 0.69947 - 0x3fe6e74454eaa8ae, 0x3fe6591925f0783e, // 0.71573, 0.69838 - 0x3fe6f0093c1f54de, 0x3fe65018ed28287f, // 0.7168, 0.69728 - 0x3fe6f8ca99c95b75, 0x3fe64715437f535b, // 0.71787, 0.69618 - 0x3fe701886c8f16e6, 0x3fe63e0e2a59d7aa, // 0.71894, 0.69508 - 0x3fe70a42b3176d7a, 0x3fe63503a31c1be8, // 0.72, 0.69397 - 0x3fe712f96c09d18d, 0x3fe62bf5af2b0dfd, // 0.72107, 0.69287 - 0x3fe71bac960e41bf, 0x3fe622e44fec22ff, // 0.72213, 0.69176 - 0x3fe7245c2fcd492a, 0x3fe619cf86c55702, // 0.72319, 0.69065 - 0x3fe72d0837efff97, 0x3fe610b7551d2cde, // 0.72425, 0.68954 - 0x3fe735b0ad2009b2, 0x3fe6079bbc5aadfa, // 0.7253, 0.68843 - 0x3fe73e558e079942, 0x3fe5fe7cbde56a0f, // 0.72636, 0.68732 - 0x3fe746f6d9516d59, 0x3fe5f55a5b2576f8, // 0.72741, 0.6862 - 0x3fe74f948da8d28d, 0x3fe5ec3495837074, // 0.72846, 0.68508 - 0x3fe7582ea9b9a329, 0x3fe5e30b6e6877f3, // 0.72951, 0.68397 - 0x3fe760c52c304764, 0x3fe5d9dee73e345c, // 0.73056, 0.68285 - 0x3fe7695813b9b594, 0x3fe5d0af016ed1d4, // 0.73161, 0.68172 - 0x3fe771e75f037261, 0x3fe5c77bbe65018c, // 0.73265, 0.6806 - 0x3fe77a730cbb9100, 0x3fe5be451f8bf980, // 0.7337, 0.67948 - 0x3fe782fb1b90b35b, 0x3fe5b50b264f7448, // 0.73474, 0.67835 - 0x3fe78b7f8a320a52, 0x3fe5abcdd41bb0d8, // 0.73578, 0.67722 - 0x3fe79400574f55e4, 0x3fe5a28d2a5d7250, // 0.73682, 0.67609 - 0x3fe79c7d8198e56e, 0x3fe599492a81ffbc, // 0.73785, 0.67496 - 0x3fe7a4f707bf97d2, 0x3fe59001d5f723df, // 0.73889, 0.67383 - 0x3fe7ad6ce874dbb6, 0x3fe586b72e2b2cfd, // 0.73992, 0.67269 - 0x3fe7b5df226aafb0, 0x3fe57d69348cec9f, // 0.74095, 0.67156 - 0x3fe7be4db453a27c, 0x3fe57417ea8bb75c, // 0.74198, 0.67042 - 0x3fe7c6b89ce2d333, 0x3fe56ac35197649e, // 0.74301, 0.66928 - 0x3fe7cf1fdacbf179, 0x3fe5616b6b204e6e, // 0.74403, 0.66814 - 0x3fe7d7836cc33db2, 0x3fe5581038975137, // 0.74506, 0.667 - 0x3fe7dfe3517d8937, 0x3fe54eb1bb6dcb8f, // 0.74608, 0.66586 - 0x3fe7e83f87b03686, 0x3fe5454ff5159dfb, // 0.7471, 0.66471 - 0x3fe7f0980e113978, 0x3fe53beae7012abe, // 0.74812, 0.66356 - 0x3fe7f8ece3571771, 0x3fe5328292a35596, // 0.74914, 0.66242 - 0x3fe8013e0638e795, 0x3fe52916f96f8388, // 0.75015, 0.66127 - 0x3fe8098b756e52fa, 0x3fe51fa81cd99aa6, // 0.75117, 0.66011 - 0x3fe811d52faf94dc, 0x3fe51635fe5601d7, // 0.75218, 0.65896 - 0x3fe81a1b33b57acc, 0x3fe50cc09f59a09b, // 0.75319, 0.65781 - 0x3fe8225d803964e5, 0x3fe503480159ded2, // 0.75419, 0.65665 - 0x3fe82a9c13f545ff, 0x3fe4f9cc25cca486, // 0.7552, 0.65549 - 0x3fe832d6eda3a3e0, 0x3fe4f04d0e2859aa, // 0.75621, 0.65433 - 0x3fe83b0e0bff976e, 0x3fe4e6cabbe3e5e9, // 0.75721, 0.65317 - 0x3fe843416dc4cce2, 0x3fe4dd453076b064, // 0.75821, 0.65201 - 0x3fe84b7111af83f9, 0x3fe4d3bc6d589f80, // 0.75921, 0.65085 - 0x3fe8539cf67c9029, 0x3fe4ca30740218a3, // 0.76021, 0.64968 - 0x3fe85bc51ae958cc, 0x3fe4c0a145ec0004, // 0.7612, 0.64851 - 0x3fe863e97db3d95a, 0x3fe4b70ee48fb869, // 0.7622, 0.64735 - 0x3fe86c0a1d9aa195, 0x3fe4ad79516722f0, // 0.76319, 0.64618 - 0x3fe87426f95cd5bd, 0x3fe4a3e08dec9ed6, // 0.76418, 0.645 - 0x3fe87c400fba2ebf, 0x3fe49a449b9b0938, // 0.76517, 0.64383 - 0x3fe884555f72fa6b, 0x3fe490a57bedbcdf, // 0.76615, 0.64266 - 0x3fe88c66e7481ba1, 0x3fe48703306091fe, // 0.76714, 0.64148 - 0x3fe89474a5fb0a84, 0x3fe47d5dba6fde01, // 0.76812, 0.6403 - 0x3fe89c7e9a4dd4ab, 0x3fe473b51b987347, // 0.7691, 0.63912 - 0x3fe8a484c3031d50, 0x3fe46a095557a0f1, // 0.77008, 0.63794 - 0x3fe8ac871ede1d88, 0x3fe4605a692b32a2, // 0.77106, 0.63676 - 0x3fe8b485aca2a468, 0x3fe456a858917046, // 0.77204, 0.63558 - 0x3fe8bc806b151741, 0x3fe44cf325091dd6, // 0.77301, 0.63439 - 0x3fe8c47758fa71cb, 0x3fe4433ad0117b1d, // 0.77398, 0.63321 - 0x3fe8cc6a75184655, 0x3fe4397f5b2a4380, // 0.77495, 0.63202 - 0x3fe8d459be34bdfa, 0x3fe42fc0c7d3adbb, // 0.77592, 0.63083 - 0x3fe8dc45331698cc, 0x3fe425ff178e6bb1, // 0.77689, 0.62964 - 0x3fe8e42cd2852e0a, 0x3fe41c3a4bdbaa26, // 0.77785, 0.62845 - 0x3fe8ec109b486c49, 0x3fe41272663d108c, // 0.77882, 0.62725 - 0x3fe8f3f08c28d9ac, 0x3fe408a76834c0c0, // 0.77978, 0.62606 - 0x3fe8fbcca3ef940d, 0x3fe3fed9534556d4, // 0.78074, 0.62486 - 0x3fe903a4e1665133, 0x3fe3f50828f1e8d2, // 0.78169, 0.62366 - 0x3fe90b7943575efe, 0x3fe3eb33eabe0680, // 0.78265, 0.62246 - 0x3fe91349c88da398, 0x3fe3e15c9a2db922, // 0.7836, 0.62126 - 0x3fe91b166fd49da2, 0x3fe3d78238c58343, // 0.78456, 0.62006 - 0x3fe922df37f8646a, 0x3fe3cda4c80a6076, // 0.78551, 0.61885 - 0x3fe92aa41fc5a815, 0x3fe3c3c44981c517, // 0.78646, 0.61765 - 0x3fe932652609b1cf, 0x3fe3b9e0beb19e18, // 0.7874, 0.61644 - 0x3fe93a22499263fc, 0x3fe3affa292050b9, // 0.78835, 0.61523 - 0x3fe941db892e3a65, 0x3fe3a6108a54ba58, // 0.78929, 0.61402 - 0x3fe94990e3ac4a6c, 0x3fe39c23e3d63029, // 0.79023, 0.61281 - 0x3fe9514257dc4335, 0x3fe39234372c7f04, // 0.79117, 0.6116 - 0x3fe958efe48e6dd7, 0x3fe3884185dfeb22, // 0.79211, 0.61038 - 0x3fe960998893ad8c, 0x3fe37e4bd1792fe2, // 0.79304, 0.60917 - 0x3fe9683f42bd7fe1, 0x3fe374531b817f8d, // 0.79398, 0.60795 - 0x3fe96fe111ddfce0, 0x3fe36a576582831b, // 0.79491, 0.60673 - 0x3fe9777ef4c7d742, 0x3fe36058b10659f3, // 0.79584, 0.60551 - 0x3fe97f18ea4e5c9e, 0x3fe35656ff9799ae, // 0.79676, 0.60429 - 0x3fe986aef1457594, 0x3fe34c5252c14de1, // 0.79769, 0.60307 - 0x3fe98e410881a600, 0x3fe3424aac0ef7d6, // 0.79861, 0.60184 - 0x3fe995cf2ed80d22, 0x3fe338400d0c8e57, // 0.79954, 0.60062 - 0x3fe99d59631e65d5, 0x3fe32e3277467d6b, // 0.80046, 0.59939 - 0x3fe9a4dfa42b06b2, 0x3fe32421ec49a620, // 0.80138, 0.59816 - 0x3fe9ac61f0d4e247, 0x3fe31a0e6da35e44, // 0.80229, 0.59693 - 0x3fe9b3e047f38741, 0x3fe30ff7fce17035, // 0.80321, 0.5957 - 0x3fe9bb5aa85f2098, 0x3fe305de9b921a94, // 0.80412, 0.59447 - 0x3fe9c2d110f075c3, 0x3fe2fbc24b441015, // 0.80503, 0.59323 - 0x3fe9ca438080eadb, 0x3fe2f1a30d86773a, // 0.80594, 0.592 - 0x3fe9d1b1f5ea80d6, 0x3fe2e780e3e8ea16, // 0.80685, 0.59076 - 0x3fe9d91c7007d5a6, 0x3fe2dd5bcffb7616, // 0.80775, 0.58952 - 0x3fe9e082edb42472, 0x3fe2d333d34e9bb7, // 0.80866, 0.58828 - 0x3fe9e7e56dcb45bd, 0x3fe2c908ef734e57, // 0.80956, 0.58704 - 0x3fe9ef43ef29af94, 0x3fe2bedb25faf3ea, // 0.81046, 0.5858 - 0x3fe9f69e70ac75bc, 0x3fe2b4aa787764c4, // 0.81135, 0.58455 - 0x3fe9fdf4f13149de, 0x3fe2aa76e87aeb58, // 0.81225, 0.58331 - 0x3fea05476f967bb5, 0x3fe2a040779843fb, // 0.81314, 0.58206 - 0x3fea0c95eabaf937, 0x3fe2960727629ca8, // 0.81404, 0.58081 - 0x3fea13e0617e4ec7, 0x3fe28bcaf96d94ba, // 0.81493, 0.57956 - 0x3fea1b26d2c0a75e, 0x3fe2818bef4d3cba, // 0.81581, 0.57831 - 0x3fea22693d62ccb9, 0x3fe2774a0a961612, // 0.8167, 0.57706 - 0x3fea29a7a0462782, 0x3fe26d054cdd12df, // 0.81758, 0.57581 - 0x3fea30e1fa4cbf81, 0x3fe262bdb7b795a2, // 0.81847, 0.57455 - 0x3fea38184a593bc6, 0x3fe258734cbb7110, // 0.81935, 0.5733 - 0x3fea3f4a8f4ee2d2, 0x3fe24e260d7ee7c9, // 0.82023, 0.57204 - 0x3fea4678c8119ac8, 0x3fe243d5fb98ac1f, // 0.8211, 0.57078 - 0x3fea4da2f385e997, 0x3fe23983189fdfd5, // 0.82198, 0.56952 - 0x3fea54c91090f524, 0x3fe22f2d662c13e1, // 0.82285, 0.56826 - 0x3fea5beb1e188375, 0x3fe224d4e5d5482e, // 0.82372, 0.567 - 0x3fea63091b02fae2, 0x3fe21a799933eb58, // 0.82459, 0.56573 - 0x3fea6a230637623b, 0x3fe2101b81e0da78, // 0.82546, 0.56447 - 0x3fea7138de9d60f5, 0x3fe205baa17560d6, // 0.82632, 0.5632 - 0x3fea784aa31d3f55, 0x3fe1fb56f98b37b8, // 0.82718, 0.56193 - 0x3fea7f58529fe69d, 0x3fe1f0f08bbc861b, // 0.82805, 0.56066 - 0x3fea8661ec0ee133, 0x3fe1e68759a3e074, // 0.8289, 0.55939 - 0x3fea8d676e545ad2, 0x3fe1dc1b64dc4872, // 0.82976, 0.55812 - 0x3fea9468d85b20ae, 0x3fe1d1acaf012cc2, // 0.83062, 0.55685 - 0x3fea9b66290ea1a3, 0x3fe1c73b39ae68c8, // 0.83147, 0.55557 - 0x3feaa25f5f5aee60, 0x3fe1bcc706804467, // 0.83232, 0.55429 - 0x3feaa9547a2cb98e, 0x3fe1b250171373be, // 0.83317, 0.55302 - 0x3feab045787157ff, 0x3fe1a7d66d0516e6, // 0.83402, 0.55174 - 0x3feab7325916c0d4, 0x3fe19d5a09f2b9b8, // 0.83486, 0.55046 - 0x3feabe1b1b0b8dac, 0x3fe192daef7a5386, // 0.83571, 0.54918 - 0x3feac4ffbd3efac8, 0x3fe188591f3a46e5, // 0.83655, 0.54789 - 0x3feacbe03ea0e73b, 0x3fe17dd49ad16161, // 0.83739, 0.54661 - 0x3fead2bc9e21d511, 0x3fe1734d63dedb49, // 0.83822, 0.54532 - 0x3fead994dab2e979, 0x3fe168c37c025764, // 0.83906, 0.54404 - 0x3feae068f345ecef, 0x3fe15e36e4dbe2bc, // 0.83989, 0.54275 - 0x3feae738e6cd4b67, 0x3fe153a7a00bf453, // 0.84073, 0.54146 - 0x3feaee04b43c1474, 0x3fe14915af336ceb, // 0.84155, 0.54017 - 0x3feaf4cc5a85fb73, 0x3fe13e8113f396c1, // 0.84238, 0.53888 - 0x3feafb8fd89f57b6, 0x3fe133e9cfee254e, // 0.84321, 0.53759 - 0x3feb024f2d7d24a9, 0x3fe1294fe4c5350a, // 0.84403, 0.53629 - 0x3feb090a58150200, 0x3fe11eb3541b4b22, // 0.84485, 0.535 - 0x3feb0fc1575d33db, 0x3fe114141f935545, // 0.84567, 0.5337 - 0x3feb16742a4ca2f5, 0x3fe1097248d0a956, // 0.84649, 0.5324 - 0x3feb1d22cfdadcc6, 0x3fe0fecdd1770537, // 0.84731, 0.5311 - 0x3feb23cd470013b4, 0x3fe0f426bb2a8e7d, // 0.84812, 0.5298 - 0x3feb2a738eb51f33, 0x3fe0e97d078fd23b, // 0.84893, 0.5285 - 0x3feb3115a5f37bf4, 0x3fe0ded0b84bc4b5, // 0.84974, 0.5272 - 0x3feb37b38bb54c09, 0x3fe0d421cf03c12b, // 0.85055, 0.5259 - 0x3feb3e4d3ef55712, 0x3fe0c9704d5d898f, // 0.85136, 0.52459 - 0x3feb44e2beaf0a61, 0x3fe0bebc34ff4646, // 0.85216, 0.52328 - 0x3feb4b7409de7925, 0x3fe0b405878f85ec, // 0.85296, 0.52198 - 0x3feb52011f805c92, 0x3fe0a94c46b53d0b, // 0.85376, 0.52067 - 0x3feb5889fe921405, 0x3fe09e907417c5e1, // 0.85456, 0.51936 - 0x3feb5f0ea611a532, 0x3fe093d2115ee018, // 0.85535, 0.51804 - 0x3feb658f14fdbc47, 0x3fe089112032b08c, // 0.85615, 0.51673 - 0x3feb6c0b4a55ac17, 0x3fe07e4da23bc102, // 0.85694, 0.51542 - 0x3feb728345196e3e, 0x3fe073879922ffed, // 0.85773, 0.5141 - 0x3feb78f70449a34b, 0x3fe068bf0691c028, // 0.85852, 0.51279 - 0x3feb7f6686e792ea, 0x3fe05df3ec31b8b6, // 0.8593, 0.51147 - 0x3feb85d1cbf52c02, 0x3fe053264bad0483, // 0.86009, 0.51015 - 0x3feb8c38d27504e9, 0x3fe0485626ae221a, // 0.86087, 0.50883 - 0x3feb929b996a5b7f, 0x3fe03d837edff370, // 0.86165, 0.50751 - 0x3feb98fa1fd9155e, 0x3fe032ae55edbd95, // 0.86242, 0.50619 - 0x3feb9f5464c5bffc, 0x3fe027d6ad83287e, // 0.8632, 0.50486 - 0x3feba5aa673590d2, 0x3fe01cfc874c3eb7, // 0.86397, 0.50354 - 0x3febabfc262e6586, 0x3fe0121fe4f56d2c, // 0.86474, 0.50221 - 0x3febb249a0b6c40d, 0x3fe00740c82b82e0, // 0.86551, 0.50089 - 0x3febb892d5d5dad5, 0x3fdff8be6537615e, // 0.86628, 0.49956 - 0x3febbed7c49380ea, 0x3fdfe2f64be7120f, // 0.86705, 0.49823 - 0x3febc5186bf8361d, 0x3fdfcd2947c1ff57, // 0.86781, 0.4969 - 0x3febcb54cb0d2327, 0x3fdfb7575c24d2de, // 0.86857, 0.49557 - 0x3febd18ce0dc19d6, 0x3fdfa1808c6cf7e0, // 0.86933, 0.49423 - 0x3febd7c0ac6f952a, 0x3fdf8ba4dbf89aba, // 0.87009, 0.4929 - 0x3febddf02cd2b983, 0x3fdf75c44e26a852, // 0.87084, 0.49156 - 0x3febe41b611154c1, 0x3fdf5fdee656cda3, // 0.8716, 0.49023 - 0x3febea424837de6d, 0x3fdf49f4a7e97729, // 0.87235, 0.48889 - 0x3febf064e15377dd, 0x3fdf3405963fd068, // 0.87309, 0.48755 - 0x3febf6832b71ec5b, 0x3fdf1e11b4bbc35c, // 0.87384, 0.48621 - 0x3febfc9d25a1b147, 0x3fdf081906bff7fd, // 0.87459, 0.48487 - 0x3fec02b2cef1e641, 0x3fdef21b8fafd3b5, // 0.87533, 0.48353 - 0x3fec08c426725549, 0x3fdedc1952ef78d5, // 0.87607, 0.48218 - 0x3fec0ed12b3372e9, 0x3fdec61253e3c61b, // 0.87681, 0.48084 - 0x3fec14d9dc465e58, 0x3fdeb00695f25620, // 0.87755, 0.47949 - 0x3fec1ade38bce19b, 0x3fde99f61c817eda, // 0.87828, 0.47815 - 0x3fec20de3fa971b0, 0x3fde83e0eaf85113, // 0.87901, 0.4768 - 0x3fec26d9f01f2eaf, 0x3fde6dc704be97e2, // 0.87974, 0.47545 - 0x3fec2cd14931e3f1, 0x3fde57a86d3cd824, // 0.88047, 0.4741 - 0x3fec32c449f60831, 0x3fde418527dc4ffa, // 0.8812, 0.47275 - 0x3fec38b2f180bdb1, 0x3fde2b5d3806f63b, // 0.88192, 0.4714 - 0x3fec3e9d3ee7d262, 0x3fde1530a12779f4, // 0.88264, 0.47004 - 0x3fec44833141c004, 0x3fddfeff66a941de, // 0.88336, 0.46869 - 0x3fec4a64c7a5ac4c, 0x3fdde8c98bf86bd6, // 0.88408, 0.46733 - 0x3fec5042012b6907, 0x3fddd28f1481cc58, // 0.8848, 0.46598 - 0x3fec561adceb743e, 0x3fddbc5003b2edf8, // 0.88551, 0.46462 - 0x3fec5bef59fef85a, 0x3fdda60c5cfa10d8, // 0.88622, 0.46326 - 0x3fec61bf777fcc48, 0x3fdd8fc423c62a25, // 0.88693, 0.4619 - 0x3fec678b3488739b, 0x3fdd79775b86e389, // 0.88764, 0.46054 - 0x3fec6d5290341eb2, 0x3fdd632607ac9aa9, // 0.88835, 0.45918 - 0x3fec7315899eaad7, 0x3fdd4cd02ba8609c, // 0.88905, 0.45781 - 0x3fec78d41fe4a267, 0x3fdd3675caebf962, // 0.88975, 0.45645 - 0x3fec7e8e52233cf3, 0x3fdd2016e8e9db5b, // 0.89045, 0.45508 - 0x3fec84441f785f61, 0x3fdd09b389152ec1, // 0.89115, 0.45372 - 0x3fec89f587029c13, 0x3fdcf34baee1cd21, // 0.89184, 0.45235 - 0x3fec8fa287e13305, 0x3fdcdcdf5dc440ce, // 0.89253, 0.45098 - 0x3fec954b213411f5, 0x3fdcc66e9931c45d, // 0.89322, 0.44961 - 0x3fec9aef521bd480, 0x3fdcaff964a0421d, // 0.89391, 0.44824 - 0x3feca08f19b9c449, 0x3fdc997fc3865388, // 0.8946, 0.44687 - 0x3feca62a772fd919, 0x3fdc8301b95b40c2, // 0.89528, 0.4455 - 0x3fecabc169a0b901, 0x3fdc6c7f4997000a, // 0.89597, 0.44412 - 0x3fecb153f02fb87d, 0x3fdc55f877b23537, // 0.89665, 0.44275 - 0x3fecb6e20a00da99, 0x3fdc3f6d47263129, // 0.89732, 0.44137 - 0x3fecbc6bb638d10b, 0x3fdc28ddbb6cf145, // 0.898, 0.43999 - 0x3fecc1f0f3fcfc5c, 0x3fdc1249d8011ee7, // 0.89867, 0.43862 - 0x3fecc771c2736c09, 0x3fdbfbb1a05e0edc, // 0.89935, 0.43724 - 0x3fecccee20c2de9f, 0x3fdbe51517ffc0d9, // 0.90002, 0.43586 - 0x3fecd2660e12c1e6, 0x3fdbce744262deee, // 0.90068, 0.43448 - 0x3fecd7d9898b32f6, 0x3fdbb7cf2304bd01, // 0.90135, 0.43309 - 0x3fecdd489254fe65, 0x3fdba125bd63583e, // 0.90201, 0.43171 - 0x3fece2b32799a060, 0x3fdb8a7814fd5693, // 0.90267, 0.43033 - 0x3fece819488344ce, 0x3fdb73c62d520624, // 0.90333, 0.42894 - 0x3feced7af43cc773, 0x3fdb5d1009e15cc0, // 0.90399, 0.42756 - 0x3fecf2d829f1b40e, 0x3fdb4655ae2bf757, // 0.90464, 0.42617 - 0x3fecf830e8ce467b, 0x3fdb2f971db31972, // 0.9053, 0.42478 - 0x3fecfd852fff6ad4, 0x3fdb18d45bf8aca6, // 0.90595, 0.42339 - 0x3fed02d4feb2bd92, 0x3fdb020d6c7f4009, // 0.9066, 0.422 - 0x3fed082054168bac, 0x3fdaeb4252ca07ab, // 0.90724, 0.42061 - 0x3fed0d672f59d2b9, 0x3fdad473125cdc08, // 0.90789, 0.41922 - 0x3fed12a98fac410c, 0x3fdabd9faebc3980, // 0.90853, 0.41782 - 0x3fed17e7743e35dc, 0x3fdaa6c82b6d3fc9, // 0.90917, 0.41643 - 0x3fed1d20dc40c15c, 0x3fda8fec8bf5b166, // 0.90981, 0.41503 - 0x3fed2255c6e5a4e1, 0x3fda790cd3dbf31a, // 0.91044, 0.41364 - 0x3fed2786335f52fc, 0x3fda622906a70b63, // 0.91107, 0.41224 - 0x3fed2cb220e0ef9f, 0x3fda4b4127dea1e4, // 0.91171, 0.41084 - 0x3fed31d98e9e503a, 0x3fda34553b0afee5, // 0.91234, 0.40944 - 0x3fed36fc7bcbfbdc, 0x3fda1d6543b50ac0, // 0.91296, 0.40804 - 0x3fed3c1ae79f2b4e, 0x3fda067145664d57, // 0.91359, 0.40664 - 0x3fed4134d14dc93a, 0x3fd9ef7943a8ed8a, // 0.91421, 0.40524 - 0x3fed464a380e7242, 0x3fd9d87d4207b0ab, // 0.91483, 0.40384 - 0x3fed4b5b1b187524, 0x3fd9c17d440df9f2, // 0.91545, 0.40243 - 0x3fed506779a3d2d9, 0x3fd9aa794d47c9ee, // 0.91606, 0.40103 - 0x3fed556f52e93eb1, 0x3fd993716141bdfe, // 0.91668, 0.39962 - 0x3fed5a72a6221e73, 0x3fd97c6583890fc2, // 0.91729, 0.39822 - 0x3fed5f7172888a7f, 0x3fd96555b7ab948f, // 0.9179, 0.39681 - 0x3fed646bb7574de5, 0x3fd94e420137bce3, // 0.91851, 0.3954 - 0x3fed696173c9e68b, 0x3fd9372a63bc93d7, // 0.91911, 0.39399 - 0x3fed6e52a71c8547, 0x3fd9200ee2c9be97, // 0.91972, 0.39258 - 0x3fed733f508c0dff, 0x3fd908ef81ef7bd1, // 0.92032, 0.39117 - 0x3fed78276f5617c6, 0x3fd8f1cc44bea329, // 0.92092, 0.38976 - 0x3fed7d0b02b8ecf9, 0x3fd8daa52ec8a4af, // 0.92151, 0.38835 - 0x3fed81ea09f38b63, 0x3fd8c37a439f884f, // 0.92211, 0.38693 - 0x3fed86c48445a450, 0x3fd8ac4b86d5ed44, // 0.9227, 0.38552 - 0x3fed8b9a70ef9cb4, 0x3fd89518fbff098e, // 0.92329, 0.3841 - 0x3fed906bcf328d46, 0x3fd87de2a6aea963, // 0.92388, 0.38268 - 0x3fed95389e50429b, 0x3fd866a88a792ea0, // 0.92447, 0.38127 - 0x3fed9a00dd8b3d46, 0x3fd84f6aaaf3903f, // 0.92505, 0.37985 - 0x3fed9ec48c26b1f3, 0x3fd838290bb359c8, // 0.92563, 0.37843 - 0x3feda383a9668988, 0x3fd820e3b04eaac4, // 0.92621, 0.37701 - 0x3feda83e348f613b, 0x3fd8099a9c5c362d, // 0.92679, 0.37559 - 0x3fedacf42ce68ab9, 0x3fd7f24dd37341e3, // 0.92736, 0.37416 - 0x3fedb1a591b20c38, 0x3fd7dafd592ba621, // 0.92794, 0.37274 - 0x3fedb6526238a09b, 0x3fd7c3a9311dcce7, // 0.92851, 0.37132 - 0x3fedbafa9dc1b78d, 0x3fd7ac515ee2b172, // 0.92907, 0.36989 - 0x3fedbf9e4395759a, 0x3fd794f5e613dfae, // 0.92964, 0.36847 - 0x3fedc43d52fcb453, 0x3fd77d96ca4b73a6, // 0.93021, 0.36704 - 0x3fedc8d7cb410260, 0x3fd766340f2418f6, // 0.93077, 0.36561 - 0x3fedcd6dabaca3a5, 0x3fd74ecdb8390a3e, // 0.93133, 0.36418 - 0x3fedd1fef38a915a, 0x3fd73763c9261092, // 0.93188, 0.36276 - 0x3fedd68ba2267a25, 0x3fd71ff6458782ec, // 0.93244, 0.36133 - 0x3feddb13b6ccc23d, 0x3fd7088530fa459e, // 0.93299, 0.3599 - 0x3feddf9730ca837b, 0x3fd6f1108f1bc9c5, // 0.93354, 0.35846 - 0x3fede4160f6d8d81, 0x3fd6d998638a0cb5, // 0.93409, 0.35703 - 0x3fede890520465ce, 0x3fd6c21cb1e39771, // 0.93464, 0.3556 - 0x3feded05f7de47da, 0x3fd6aa9d7dc77e16, // 0.93518, 0.35416 - 0x3fedf177004b2534, 0x3fd6931acad55f51, // 0.93573, 0.35273 - 0x3fedf5e36a9ba59c, 0x3fd67b949cad63ca, // 0.93627, 0.35129 - 0x3fedfa4b3621271d, 0x3fd6640af6f03d9e, // 0.9368, 0.34986 - 0x3fedfeae622dbe2b, 0x3fd64c7ddd3f27c6, // 0.93734, 0.34842 - 0x3fee030cee1435b8, 0x3fd634ed533be58e, // 0.93787, 0.34698 - 0x3fee0766d9280f54, 0x3fd61d595c88c203, // 0.9384, 0.34554 - 0x3fee0bbc22bd8349, 0x3fd605c1fcc88f63, // 0.93893, 0.3441 - 0x3fee100cca2980ac, 0x3fd5ee27379ea693, // 0.93946, 0.34266 - 0x3fee1458cec1ad83, 0x3fd5d68910aee686, // 0.93998, 0.34122 - 0x3fee18a02fdc66d9, 0x3fd5bee78b9db3b6, // 0.94051, 0.33978 - 0x3fee1ce2ecd0c0d8, 0x3fd5a742ac0ff78d, // 0.94103, 0.33833 - 0x3fee212104f686e5, 0x3fd58f9a75ab1fdd, // 0.94154, 0.33689 - 0x3fee255a77a63bb8, 0x3fd577eeec151e47, // 0.94206, 0.33545 - 0x3fee298f4439197a, 0x3fd5604012f467b4, // 0.94257, 0.334 - 0x3fee2dbf6a0911d9, 0x3fd5488dedeff3be, // 0.94308, 0.33255 - 0x3fee31eae870ce25, 0x3fd530d880af3c24, // 0.94359, 0.33111 - 0x3fee3611becbaf69, 0x3fd5191fceda3c35, // 0.9441, 0.32966 - 0x3fee3a33ec75ce85, 0x3fd50163dc197047, // 0.9446, 0.32821 - 0x3fee3e5170cbfc46, 0x3fd4e9a4ac15d520, // 0.94511, 0.32676 - 0x3fee426a4b2bc17e, 0x3fd4d1e24278e76a, // 0.94561, 0.32531 - 0x3fee467e7af35f23, 0x3fd4ba1ca2eca31c, // 0.94611, 0.32386 - 0x3fee4a8dff81ce5e, 0x3fd4a253d11b82f3, // 0.9466, 0.32241 - 0x3fee4e98d836c0af, 0x3fd48a87d0b07fd7, // 0.94709, 0.32096 - 0x3fee529f04729ffc, 0x3fd472b8a5571054, // 0.94759, 0.3195 - 0x3fee56a083968eb1, 0x3fd45ae652bb2800, // 0.94807, 0.31805 - 0x3fee5a9d550467d3, 0x3fd44310dc8936f0, // 0.94856, 0.31659 - 0x3fee5e95781ebf1c, 0x3fd42b38466e2928, // 0.94905, 0.31514 - 0x3fee6288ec48e112, 0x3fd4135c94176602, // 0.94953, 0.31368 - 0x3fee6677b0e6d31e, 0x3fd3fb7dc932cfa4, // 0.95001, 0.31222 - 0x3fee6a61c55d53a7, 0x3fd3e39be96ec271, // 0.95049, 0.31077 - 0x3fee6e472911da27, 0x3fd3cbb6f87a146e, // 0.95096, 0.30931 - 0x3fee7227db6a9744, 0x3fd3b3cefa0414b7, // 0.95144, 0.30785 - 0x3fee7603dbce74e9, 0x3fd39be3f1bc8aef, // 0.95191, 0.30639 - 0x3fee79db29a5165a, 0x3fd383f5e353b6aa, // 0.95238, 0.30493 - 0x3fee7dadc456d850, 0x3fd36c04d27a4edf, // 0.95284, 0.30347 - 0x3fee817bab4cd10d, 0x3fd35410c2e18152, // 0.95331, 0.30201 - 0x3fee8544ddf0d075, 0x3fd33c19b83af207, // 0.95377, 0.30054 - 0x3fee89095bad6025, 0x3fd3241fb638baaf, // 0.95423, 0.29908 - 0x3fee8cc923edc388, 0x3fd30c22c08d6a13, // 0.95469, 0.29762 - 0x3fee9084361df7f3, 0x3fd2f422daec0386, // 0.95514, 0.29615 - 0x3fee943a91aab4b4, 0x3fd2dc200907fe51, // 0.95559, 0.29469 - 0x3fee97ec36016b30, 0x3fd2c41a4e954520, // 0.95605, 0.29322 - 0x3fee9b99229046f8, 0x3fd2ac11af483572, // 0.95649, 0.29175 - 0x3fee9f4156c62dda, 0x3fd294062ed59f05, // 0.95694, 0.29028 - 0x3feea2e4d212c000, 0x3fd27bf7d0f2c346, // 0.95738, 0.28882 - 0x3feea68393e65800, 0x3fd263e6995554ba, // 0.95783, 0.28735 - 0x3feeaa1d9bb20af3, 0x3fd24bd28bb37672, // 0.95827, 0.28588 - 0x3feeadb2e8e7a88e, 0x3fd233bbabc3bb72, // 0.9587, 0.28441 - 0x3feeb1437af9bb34, 0x3fd21ba1fd3d2623, // 0.95914, 0.28294 - 0x3feeb4cf515b8811, 0x3fd2038583d727bd, // 0.95957, 0.28146 - 0x3feeb8566b810f2a, 0x3fd1eb6643499fbb, // 0.96, 0.27999 - 0x3feebbd8c8df0b74, 0x3fd1d3443f4cdb3d, // 0.96043, 0.27852 - 0x3feebf5668eaf2ef, 0x3fd1bb1f7b999480, // 0.96086, 0.27705 - 0x3feec2cf4b1af6b2, 0x3fd1a2f7fbe8f243, // 0.96128, 0.27557 - 0x3feec6436ee60309, 0x3fd18acdc3f4873a, // 0.9617, 0.2741 - 0x3feec9b2d3c3bf84, 0x3fd172a0d7765177, // 0.96212, 0.27262 - 0x3feecd1d792c8f10, 0x3fd15a713a28b9d9, // 0.96254, 0.27115 - 0x3feed0835e999009, 0x3fd1423eefc69378, // 0.96295, 0.26967 - 0x3feed3e483849c51, 0x3fd12a09fc0b1b12, // 0.96337, 0.26819 - 0x3feed740e7684963, 0x3fd111d262b1f677, // 0.96378, 0.26671 - 0x3feeda9889bfe86a, 0x3fd0f998277733f7, // 0.96418, 0.26523 - 0x3feeddeb6a078651, 0x3fd0e15b4e1749cd, // 0.96459, 0.26375 - 0x3feee13987bbebdc, 0x3fd0c91bda4f158d, // 0.96499, 0.26227 - 0x3feee482e25a9dbc, 0x3fd0b0d9cfdbdb90, // 0.96539, 0.26079 - 0x3feee7c77961dc9e, 0x3fd09895327b465e, // 0.96579, 0.25931 - 0x3feeeb074c50a544, 0x3fd0804e05eb661e, // 0.96619, 0.25783 - 0x3feeee425aa6b09a, 0x3fd068044deab002, // 0.96658, 0.25635 - 0x3feef178a3e473c2, 0x3fd04fb80e37fdae, // 0.96698, 0.25487 - 0x3feef4aa278b2032, 0x3fd037694a928cac, // 0.96737, 0.25338 - 0x3feef7d6e51ca3c0, 0x3fd01f1806b9fdd2, // 0.96775, 0.2519 - 0x3feefafedc1ba8b7, 0x3fd006c4466e54af, // 0.96814, 0.25041 - 0x3feefe220c0b95ec, 0x3fcfdcdc1adfedf8, // 0.96852, 0.24893 - 0x3fef014074708ed3, 0x3fcfac2abeff57ff, // 0.9689, 0.24744 - 0x3fef045a14cf738c, 0x3fcf7b7480bd3801, // 0.96928, 0.24596 - 0x3fef076eecade0fa, 0x3fcf4ab9679c9f5c, // 0.96966, 0.24447 - 0x3fef0a7efb9230d7, 0x3fcf19f97b215f1a, // 0.97003, 0.24298 - 0x3fef0d8a410379c5, 0x3fcee934c2d006c7, // 0.9704, 0.24149 - 0x3fef1090bc898f5f, 0x3fceb86b462de348, // 0.97077, 0.24 - 0x3fef13926dad024e, 0x3fce879d0cc0fdaf, // 0.97114, 0.23851 - 0x3fef168f53f7205d, 0x3fce56ca1e101a1b, // 0.9715, 0.23702 - 0x3fef19876ef1f486, 0x3fce25f281a2b684, // 0.97187, 0.23553 - 0x3fef1c7abe284708, 0x3fcdf5163f01099a, // 0.97223, 0.23404 - 0x3fef1f6941259d7a, 0x3fcdc4355db40195, // 0.97258, 0.23255 - 0x3fef2252f7763ada, 0x3fcd934fe5454311, // 0.97294, 0.23106 - 0x3fef2537e0a71f9f, 0x3fcd6265dd3f27e3, // 0.97329, 0.22957 - 0x3fef2817fc4609ce, 0x3fcd31774d2cbdee, // 0.97364, 0.22807 - 0x3fef2af349e17507, 0x3fcd00843c99c5f9, // 0.97399, 0.22658 - 0x3fef2dc9c9089a9d, 0x3fcccf8cb312b286, // 0.97434, 0.22508 - 0x3fef309b794b719f, 0x3fcc9e90b824a6a9, // 0.97468, 0.22359 - 0x3fef33685a3aaef0, 0x3fcc6d90535d74dc, // 0.97503, 0.22209 - 0x3fef36306b67c556, 0x3fcc3c8b8c4b9dd7, // 0.97536, 0.2206 - 0x3fef38f3ac64e589, 0x3fcc0b826a7e4f63, // 0.9757, 0.2191 - 0x3fef3bb21cc4fe47, 0x3fcbda74f5856330, // 0.97604, 0.2176 - 0x3fef3e6bbc1bbc65, 0x3fcba96334f15dad, // 0.97637, 0.21611 - 0x3fef412089fd8adc, 0x3fcb784d30536cda, // 0.9767, 0.21461 - 0x3fef43d085ff92dd, 0x3fcb4732ef3d6722, // 0.97703, 0.21311 - 0x3fef467bafb7bbe0, 0x3fcb16147941ca2a, // 0.97735, 0.21161 - 0x3fef492206bcabb4, 0x3fcae4f1d5f3b9ab, // 0.97768, 0.21011 - 0x3fef4bc38aa5c694, 0x3fcab3cb0ce6fe44, // 0.978, 0.20861 - 0x3fef4e603b0b2f2d, 0x3fca82a025b00451, // 0.97832, 0.20711 - 0x3fef50f81785c6b9, 0x3fca517127e3dabc, // 0.97863, 0.20561 - 0x3fef538b1faf2d07, 0x3fca203e1b1831da, // 0.97895, 0.20411 - 0x3fef56195321c090, 0x3fc9ef0706e35a35, // 0.97926, 0.20261 - 0x3fef58a2b1789e84, 0x3fc9bdcbf2dc4366, // 0.97957, 0.2011 - 0x3fef5b273a4fa2d9, 0x3fc98c8ce69a7aec, // 0.97988, 0.1996 - 0x3fef5da6ed43685d, 0x3fc95b49e9b62af9, // 0.98018, 0.1981 - 0x3fef6021c9f148c2, 0x3fc92a0303c8194f, // 0.98048, 0.19659 - 0x3fef6297cff75cb0, 0x3fc8f8b83c69a60a, // 0.98079, 0.19509 - 0x3fef6508fef47bd5, 0x3fc8c7699b34ca7e, // 0.98108, 0.19359 - 0x3fef677556883cee, 0x3fc8961727c41804, // 0.98138, 0.19208 - 0x3fef69dcd652f5de, 0x3fc864c0e9b2b6cf, // 0.98167, 0.19057 - 0x3fef6c3f7df5bbb7, 0x3fc83366e89c64c5, // 0.98196, 0.18907 - 0x3fef6e9d4d1262ca, 0x3fc802092c1d744b, // 0.98225, 0.18756 - 0x3fef70f6434b7eb7, 0x3fc7d0a7bbd2cb1b, // 0.98254, 0.18606 - 0x3fef734a60446279, 0x3fc79f429f59e11d, // 0.98282, 0.18455 - 0x3fef7599a3a12077, 0x3fc76dd9de50bf31, // 0.98311, 0.18304 - 0x3fef77e40d068a90, 0x3fc73c6d8055fe0a, // 0.98339, 0.18153 - 0x3fef7a299c1a322a, 0x3fc70afd8d08c4ff, // 0.98366, 0.18002 - 0x3fef7c6a50826840, 0x3fc6d98a0c08c8da, // 0.98394, 0.17851 - 0x3fef7ea629e63d6e, 0x3fc6a81304f64ab2, // 0.98421, 0.177 - 0x3fef80dd27ed8204, 0x3fc676987f7216b8, // 0.98448, 0.17549 - 0x3fef830f4a40c60c, 0x3fc6451a831d830d, // 0.98475, 0.17398 - 0x3fef853c9089595e, 0x3fc61399179a6e94, // 0.98501, 0.17247 - 0x3fef8764fa714ba9, 0x3fc5e214448b3fc6, // 0.98528, 0.17096 - 0x3fef898887a36c84, 0x3fc5b08c1192e381, // 0.98554, 0.16945 - 0x3fef8ba737cb4b78, 0x3fc57f008654cbde, // 0.9858, 0.16794 - 0x3fef8dc10a95380d, 0x3fc54d71aa74ef02, // 0.98605, 0.16643 - 0x3fef8fd5ffae41db, 0x3fc51bdf8597c5f2, // 0.98631, 0.16491 - 0x3fef91e616c43891, 0x3fc4ea4a1f624b61, // 0.98656, 0.1634 - 0x3fef93f14f85ac08, 0x3fc4b8b17f79fa88, // 0.98681, 0.16189 - 0x3fef95f7a9a1ec47, 0x3fc48715ad84cdf5, // 0.98706, 0.16037 - 0x3fef97f924c9099b, 0x3fc45576b1293e5a, // 0.9873, 0.15886 - 0x3fef99f5c0abd496, 0x3fc423d4920e4166, // 0.98754, 0.15734 - 0x3fef9bed7cfbde29, 0x3fc3f22f57db4893, // 0.98778, 0.15583 - 0x3fef9de0596b77a3, 0x3fc3c0870a383ff6, // 0.98802, 0.15431 - 0x3fef9fce55adb2c8, 0x3fc38edbb0cd8d14, // 0.98826, 0.1528 - 0x3fefa1b7717661d5, 0x3fc35d2d53440db2, // 0.98849, 0.15128 - 0x3fefa39bac7a1791, 0x3fc32b7bf94516a7, // 0.98872, 0.14976 - 0x3fefa57b066e2754, 0x3fc2f9c7aa7a72af, // 0.98895, 0.14825 - 0x3fefa7557f08a517, 0x3fc2c8106e8e613a, // 0.98918, 0.14673 - 0x3fefa92b1600657c, 0x3fc296564d2b953e, // 0.9894, 0.14521 - 0x3fefaafbcb0cfddc, 0x3fc264994dfd340a, // 0.98962, 0.1437 - 0x3fefacc79de6c44f, 0x3fc232d978aed413, // 0.98984, 0.14218 - 0x3fefae8e8e46cfbb, 0x3fc20116d4ec7bce, // 0.99006, 0.14066 - 0x3fefb0509be6f7db, 0x3fc1cf516a62a077, // 0.99027, 0.13914 - 0x3fefb20dc681d54d, 0x3fc19d8940be24e7, // 0.99049, 0.13762 - 0x3fefb3c60dd2c199, 0x3fc16bbe5fac5865, // 0.9907, 0.1361 - 0x3fefb5797195d741, 0x3fc139f0cedaf576, // 0.9909, 0.13458 - 0x3fefb727f187f1c7, 0x3fc1082095f820b0, // 0.99111, 0.13306 - 0x3fefb8d18d66adb7, 0x3fc0d64dbcb26786, // 0.99131, 0.13154 - 0x3fefba7644f068b5, 0x3fc0a4784ab8bf1d, // 0.99151, 0.13002 - 0x3fefbc1617e44186, 0x3fc072a047ba831d, // 0.99171, 0.1285 - 0x3fefbdb106021816, 0x3fc040c5bb67747e, // 0.99191, 0.12698 - 0x3fefbf470f0a8d88, 0x3fc00ee8ad6fb85b, // 0.9921, 0.12545 - 0x3fefc0d832bf043a, 0x3fbfba124b07ad85, // 0.99229, 0.12393 - 0x3fefc26470e19fd3, 0x3fbf564e56a9730e, // 0.99248, 0.12241 - 0x3fefc3ebc935454c, 0x3fbef2858d27561b, // 0.99267, 0.12089 - 0x3fefc56e3b7d9af6, 0x3fbe8eb7fde4aa3e, // 0.99285, 0.11937 - 0x3fefc6ebc77f0887, 0x3fbe2ae5b8457f77, // 0.99303, 0.11784 - 0x3fefc8646cfeb721, 0x3fbdc70ecbae9fc8, // 0.99321, 0.11632 - 0x3fefc9d82bc2915e, 0x3fbd633347858ce4, // 0.99339, 0.11479 - 0x3fefcb4703914354, 0x3fbcff533b307dc1, // 0.99356, 0.11327 - 0x3fefccb0f4323aa3, 0x3fbc9b6eb6165c42, // 0.99374, 0.11175 - 0x3fefce15fd6da67b, 0x3fbc3785c79ec2d5, // 0.99391, 0.11022 - 0x3fefcf761f0c77a3, 0x3fbbd3987f31fa0e, // 0.99407, 0.1087 - 0x3fefd0d158d86087, 0x3fbb6fa6ec38f64c, // 0.99424, 0.10717 - 0x3fefd227aa9bd53b, 0x3fbb0bb11e1d5559, // 0.9944, 0.10565 - 0x3fefd37914220b84, 0x3fbaa7b724495c04, // 0.99456, 0.10412 - 0x3fefd4c59536fae4, 0x3fba43b90e27f3c4, // 0.99472, 0.1026 - 0x3fefd60d2da75c9e, 0x3fb9dfb6eb24a85c, // 0.99488, 0.10107 - 0x3fefd74fdd40abbf, 0x3fb97bb0caaba56f, // 0.99503, 0.099544 - 0x3fefd88da3d12526, 0x3fb917a6bc29b42c, // 0.99518, 0.098017 - 0x3fefd9c68127c78c, 0x3fb8b398cf0c38e0, // 0.99533, 0.09649 - 0x3fefdafa7514538c, 0x3fb84f8712c130a0, // 0.99548, 0.094963 - 0x3fefdc297f674ba9, 0x3fb7eb7196b72ee4, // 0.99563, 0.093436 - 0x3fefdd539ff1f456, 0x3fb787586a5d5b21, // 0.99577, 0.091909 - 0x3fefde78d68653fd, 0x3fb7233b9d236e71, // 0.99591, 0.090381 - 0x3fefdf9922f73307, 0x3fb6bf1b3e79b129, // 0.99604, 0.088854 - 0x3fefe0b485181be3, 0x3fb65af75dd0f87b, // 0.99618, 0.087326 - 0x3fefe1cafcbd5b09, 0x3fb5f6d00a9aa419, // 0.99631, 0.085797 - 0x3fefe2dc89bbff08, 0x3fb592a554489bc8, // 0.99644, 0.084269 - 0x3fefe3e92be9d886, 0x3fb52e774a4d4d0a, // 0.99657, 0.08274 - 0x3fefe4f0e31d7a4a, 0x3fb4ca45fc1ba8b6, // 0.9967, 0.081211 - 0x3fefe5f3af2e3940, 0x3fb4661179272096, // 0.99682, 0.079682 - 0x3fefe6f18ff42c84, 0x3fb401d9d0e3a507, // 0.99694, 0.078153 - 0x3fefe7ea85482d60, 0x3fb39d9f12c5a299, // 0.99706, 0.076624 - 0x3fefe8de8f03d75c, 0x3fb339614e41ffa5, // 0.99718, 0.075094 - 0x3fefe9cdad01883a, 0x3fb2d52092ce19f6, // 0.99729, 0.073565 - 0x3fefeab7df1c6005, 0x3fb270dcefdfc45b, // 0.9974, 0.072035 - 0x3fefeb9d2530410f, 0x3fb20c9674ed444c, // 0.99751, 0.070505 - 0x3fefec7d7f19cffc, 0x3fb1a84d316d4f8a, // 0.99762, 0.068974 - 0x3fefed58ecb673c4, 0x3fb1440134d709b2, // 0.99772, 0.067444 - 0x3fefee2f6de455ba, 0x3fb0dfb28ea201e6, // 0.99783, 0.065913 - 0x3fefef0102826191, 0x3fb07b614e463064, // 0.99793, 0.064383 - 0x3fefefcdaa704562, 0x3fb0170d833bf421, // 0.99802, 0.062852 - 0x3feff095658e71ad, 0x3faf656e79f820e0, // 0.99812, 0.061321 - 0x3feff15833be1965, 0x3fae9cbd15ff5527, // 0.99821, 0.05979 - 0x3feff21614e131ed, 0x3fadd406f9808ec8, // 0.9983, 0.058258 - 0x3feff2cf08da7321, 0x3fad0b4c436f91d0, // 0.99839, 0.056727 - 0x3feff3830f8d575c, 0x3fac428d12c0d7e3, // 0.99848, 0.055195 - 0x3feff43228de1b77, 0x3fab79c986698b78, // 0.99856, 0.053664 - 0x3feff4dc54b1bed3, 0x3faab101bd5f8317, // 0.99864, 0.052132 - 0x3feff58192ee0358, 0x3fa9e835d6993c87, // 0.99872, 0.0506 - 0x3feff621e3796d7e, 0x3fa91f65f10dd814, // 0.9988, 0.049068 - 0x3feff6bd463b444d, 0x3fa856922bb513c1, // 0.99887, 0.047535 - 0x3feff753bb1b9164, 0x3fa78dbaa5874685, // 0.99894, 0.046003 - 0x3feff7e5420320f9, 0x3fa6c4df7d7d5b84, // 0.99901, 0.044471 - 0x3feff871dadb81df, 0x3fa5fc00d290cd43, // 0.99908, 0.042938 - 0x3feff8f9858f058b, 0x3fa5331ec3bba0eb, // 0.99914, 0.041406 - 0x3feff97c4208c014, 0x3fa46a396ff86179, // 0.9992, 0.039873 - 0x3feff9fa10348837, 0x3fa3a150f6421afc, // 0.99926, 0.03834 - 0x3feffa72effef75d, 0x3fa2d865759455cd, // 0.99932, 0.036807 - 0x3feffae6e1556998, 0x3fa20f770ceb11c6, // 0.99938, 0.035274 - 0x3feffb55e425fdae, 0x3fa14685db42c17e, // 0.99943, 0.033741 - 0x3feffbbff85f9515, 0x3fa07d91ff984580, // 0.99948, 0.032208 - 0x3feffc251df1d3f8, 0x3f9f693731d1cf01, // 0.99953, 0.030675 - 0x3feffc8554cd213a, 0x3f9dd7458c64ab39, // 0.99958, 0.029142 - 0x3feffce09ce2a679, 0x3f9c454f4ce53b1c, // 0.99962, 0.027608 - 0x3feffd36f624500c, 0x3f9ab354b1504fca, // 0.99966, 0.026075 - 0x3feffd886084cd0d, 0x3f992155f7a3667e, // 0.9997, 0.024541 - 0x3feffdd4dbf78f52, 0x3f978f535ddc9f03, // 0.99974, 0.023008 - 0x3feffe1c6870cb77, 0x3f95fd4d21fab226, // 0.99977, 0.021474 - 0x3feffe5f05e578db, 0x3f946b4381fce81c, // 0.9998, 0.01994 - 0x3feffe9cb44b51a1, 0x3f92d936bbe30efd, // 0.99983, 0.018407 - 0x3feffed57398d2b7, 0x3f9147270dad7132, // 0.99986, 0.016873 - 0x3fefff0943c53bd1, 0x3f8f6a296ab997ca, // 0.99988, 0.015339 - 0x3fefff3824c88f6f, 0x3f8c45ffe1e48ad9, // 0.9999, 0.013805 - 0x3fefff62169b92db, 0x3f8921d1fcdec784, // 0.99992, 0.012272 - 0x3fefff871937ce2f, 0x3f85fda037ac05e0, // 0.99994, 0.010738 - 0x3fefffa72c978c4f, 0x3f82d96b0e509703, // 0.99996, 0.0092038 - 0x3fefffc250b5daef, 0x3f7f6a65f9a2a3c5, // 0.99997, 0.0076698 - 0x3fefffd8858e8a92, 0x3f7921f0fe670071, // 0.99998, 0.0061359 - 0x3fefffe9cb1e2e8d, 0x3f72d97822f996bc, // 0.99999, 0.0046019 - 0x3feffff621621d02, 0x3f6921f8becca4ba, // 1, 0.003068 - 0x3feffffd88586ee6, 0x3f5921faaee6472d, // 1, 0.001534 - 0x3ff0000000000000, 0x0000000000000000, // 1, 0 - 0x3feffffd88586ee6, 0xbf5921faaee6472d, // 1, -0.001534 - 0x3feffff621621d02, 0xbf6921f8becca4ba, // 1, -0.003068 - 0x3fefffe9cb1e2e8d, 0xbf72d97822f996bc, // 0.99999,-0.0046019 - 0x3fefffd8858e8a92, 0xbf7921f0fe670071, // 0.99998,-0.0061359 - 0x3fefffc250b5daef, 0xbf7f6a65f9a2a3c5, // 0.99997,-0.0076698 - 0x3fefffa72c978c4f, 0xbf82d96b0e509703, // 0.99996,-0.0092038 - 0x3fefff871937ce2f, 0xbf85fda037ac05e0, // 0.99994, -0.010738 - 0x3fefff62169b92db, 0xbf8921d1fcdec784, // 0.99992, -0.012272 - 0x3fefff3824c88f6f, 0xbf8c45ffe1e48ad9, // 0.9999, -0.013805 - 0x3fefff0943c53bd1, 0xbf8f6a296ab997ca, // 0.99988, -0.015339 - 0x3feffed57398d2b7, 0xbf9147270dad7132, // 0.99986, -0.016873 - 0x3feffe9cb44b51a1, 0xbf92d936bbe30efd, // 0.99983, -0.018407 - 0x3feffe5f05e578db, 0xbf946b4381fce81c, // 0.9998, -0.01994 - 0x3feffe1c6870cb77, 0xbf95fd4d21fab226, // 0.99977, -0.021474 - 0x3feffdd4dbf78f52, 0xbf978f535ddc9f03, // 0.99974, -0.023008 - 0x3feffd886084cd0d, 0xbf992155f7a3667e, // 0.9997, -0.024541 - 0x3feffd36f624500c, 0xbf9ab354b1504fca, // 0.99966, -0.026075 - 0x3feffce09ce2a679, 0xbf9c454f4ce53b1c, // 0.99962, -0.027608 - 0x3feffc8554cd213a, 0xbf9dd7458c64ab39, // 0.99958, -0.029142 - 0x3feffc251df1d3f8, 0xbf9f693731d1cf01, // 0.99953, -0.030675 - 0x3feffbbff85f9515, 0xbfa07d91ff984580, // 0.99948, -0.032208 - 0x3feffb55e425fdae, 0xbfa14685db42c17e, // 0.99943, -0.033741 - 0x3feffae6e1556998, 0xbfa20f770ceb11c6, // 0.99938, -0.035274 - 0x3feffa72effef75d, 0xbfa2d865759455cd, // 0.99932, -0.036807 - 0x3feff9fa10348837, 0xbfa3a150f6421afc, // 0.99926, -0.03834 - 0x3feff97c4208c014, 0xbfa46a396ff86179, // 0.9992, -0.039873 - 0x3feff8f9858f058b, 0xbfa5331ec3bba0eb, // 0.99914, -0.041406 - 0x3feff871dadb81df, 0xbfa5fc00d290cd43, // 0.99908, -0.042938 - 0x3feff7e5420320f9, 0xbfa6c4df7d7d5b84, // 0.99901, -0.044471 - 0x3feff753bb1b9164, 0xbfa78dbaa5874685, // 0.99894, -0.046003 - 0x3feff6bd463b444d, 0xbfa856922bb513c1, // 0.99887, -0.047535 - 0x3feff621e3796d7e, 0xbfa91f65f10dd814, // 0.9988, -0.049068 - 0x3feff58192ee0358, 0xbfa9e835d6993c87, // 0.99872, -0.0506 - 0x3feff4dc54b1bed3, 0xbfaab101bd5f8317, // 0.99864, -0.052132 - 0x3feff43228de1b77, 0xbfab79c986698b78, // 0.99856, -0.053664 - 0x3feff3830f8d575c, 0xbfac428d12c0d7e3, // 0.99848, -0.055195 - 0x3feff2cf08da7321, 0xbfad0b4c436f91d0, // 0.99839, -0.056727 - 0x3feff21614e131ed, 0xbfadd406f9808ec8, // 0.9983, -0.058258 - 0x3feff15833be1965, 0xbfae9cbd15ff5527, // 0.99821, -0.05979 - 0x3feff095658e71ad, 0xbfaf656e79f820e0, // 0.99812, -0.061321 - 0x3fefefcdaa704562, 0xbfb0170d833bf421, // 0.99802, -0.062852 - 0x3fefef0102826191, 0xbfb07b614e463064, // 0.99793, -0.064383 - 0x3fefee2f6de455ba, 0xbfb0dfb28ea201e6, // 0.99783, -0.065913 - 0x3fefed58ecb673c4, 0xbfb1440134d709b2, // 0.99772, -0.067444 - 0x3fefec7d7f19cffc, 0xbfb1a84d316d4f8a, // 0.99762, -0.068974 - 0x3fefeb9d2530410f, 0xbfb20c9674ed444c, // 0.99751, -0.070505 - 0x3fefeab7df1c6005, 0xbfb270dcefdfc45b, // 0.9974, -0.072035 - 0x3fefe9cdad01883a, 0xbfb2d52092ce19f6, // 0.99729, -0.073565 - 0x3fefe8de8f03d75c, 0xbfb339614e41ffa5, // 0.99718, -0.075094 - 0x3fefe7ea85482d60, 0xbfb39d9f12c5a299, // 0.99706, -0.076624 - 0x3fefe6f18ff42c84, 0xbfb401d9d0e3a507, // 0.99694, -0.078153 - 0x3fefe5f3af2e3940, 0xbfb4661179272096, // 0.99682, -0.079682 - 0x3fefe4f0e31d7a4a, 0xbfb4ca45fc1ba8b6, // 0.9967, -0.081211 - 0x3fefe3e92be9d886, 0xbfb52e774a4d4d0a, // 0.99657, -0.08274 - 0x3fefe2dc89bbff08, 0xbfb592a554489bc8, // 0.99644, -0.084269 - 0x3fefe1cafcbd5b09, 0xbfb5f6d00a9aa419, // 0.99631, -0.085797 - 0x3fefe0b485181be3, 0xbfb65af75dd0f87b, // 0.99618, -0.087326 - 0x3fefdf9922f73307, 0xbfb6bf1b3e79b129, // 0.99604, -0.088854 - 0x3fefde78d68653fd, 0xbfb7233b9d236e71, // 0.99591, -0.090381 - 0x3fefdd539ff1f456, 0xbfb787586a5d5b21, // 0.99577, -0.091909 - 0x3fefdc297f674ba9, 0xbfb7eb7196b72ee4, // 0.99563, -0.093436 - 0x3fefdafa7514538c, 0xbfb84f8712c130a0, // 0.99548, -0.094963 - 0x3fefd9c68127c78c, 0xbfb8b398cf0c38e0, // 0.99533, -0.09649 - 0x3fefd88da3d12526, 0xbfb917a6bc29b42c, // 0.99518, -0.098017 - 0x3fefd74fdd40abbf, 0xbfb97bb0caaba56f, // 0.99503, -0.099544 - 0x3fefd60d2da75c9e, 0xbfb9dfb6eb24a85c, // 0.99488, -0.10107 - 0x3fefd4c59536fae4, 0xbfba43b90e27f3c4, // 0.99472, -0.1026 - 0x3fefd37914220b84, 0xbfbaa7b724495c04, // 0.99456, -0.10412 - 0x3fefd227aa9bd53b, 0xbfbb0bb11e1d5559, // 0.9944, -0.10565 - 0x3fefd0d158d86087, 0xbfbb6fa6ec38f64c, // 0.99424, -0.10717 - 0x3fefcf761f0c77a3, 0xbfbbd3987f31fa0e, // 0.99407, -0.1087 - 0x3fefce15fd6da67b, 0xbfbc3785c79ec2d5, // 0.99391, -0.11022 - 0x3fefccb0f4323aa3, 0xbfbc9b6eb6165c42, // 0.99374, -0.11175 - 0x3fefcb4703914354, 0xbfbcff533b307dc1, // 0.99356, -0.11327 - 0x3fefc9d82bc2915e, 0xbfbd633347858ce4, // 0.99339, -0.11479 - 0x3fefc8646cfeb721, 0xbfbdc70ecbae9fc8, // 0.99321, -0.11632 - 0x3fefc6ebc77f0887, 0xbfbe2ae5b8457f77, // 0.99303, -0.11784 - 0x3fefc56e3b7d9af6, 0xbfbe8eb7fde4aa3e, // 0.99285, -0.11937 - 0x3fefc3ebc935454c, 0xbfbef2858d27561b, // 0.99267, -0.12089 - 0x3fefc26470e19fd3, 0xbfbf564e56a9730e, // 0.99248, -0.12241 - 0x3fefc0d832bf043a, 0xbfbfba124b07ad85, // 0.99229, -0.12393 - 0x3fefbf470f0a8d88, 0xbfc00ee8ad6fb85b, // 0.9921, -0.12545 - 0x3fefbdb106021816, 0xbfc040c5bb67747e, // 0.99191, -0.12698 - 0x3fefbc1617e44186, 0xbfc072a047ba831d, // 0.99171, -0.1285 - 0x3fefba7644f068b5, 0xbfc0a4784ab8bf1d, // 0.99151, -0.13002 - 0x3fefb8d18d66adb7, 0xbfc0d64dbcb26786, // 0.99131, -0.13154 - 0x3fefb727f187f1c7, 0xbfc1082095f820b0, // 0.99111, -0.13306 - 0x3fefb5797195d741, 0xbfc139f0cedaf576, // 0.9909, -0.13458 - 0x3fefb3c60dd2c199, 0xbfc16bbe5fac5865, // 0.9907, -0.1361 - 0x3fefb20dc681d54d, 0xbfc19d8940be24e7, // 0.99049, -0.13762 - 0x3fefb0509be6f7db, 0xbfc1cf516a62a077, // 0.99027, -0.13914 - 0x3fefae8e8e46cfbb, 0xbfc20116d4ec7bce, // 0.99006, -0.14066 - 0x3fefacc79de6c44f, 0xbfc232d978aed413, // 0.98984, -0.14218 - 0x3fefaafbcb0cfddc, 0xbfc264994dfd340a, // 0.98962, -0.1437 - 0x3fefa92b1600657c, 0xbfc296564d2b953e, // 0.9894, -0.14521 - 0x3fefa7557f08a517, 0xbfc2c8106e8e613a, // 0.98918, -0.14673 - 0x3fefa57b066e2754, 0xbfc2f9c7aa7a72af, // 0.98895, -0.14825 - 0x3fefa39bac7a1791, 0xbfc32b7bf94516a7, // 0.98872, -0.14976 - 0x3fefa1b7717661d5, 0xbfc35d2d53440db2, // 0.98849, -0.15128 - 0x3fef9fce55adb2c8, 0xbfc38edbb0cd8d14, // 0.98826, -0.1528 - 0x3fef9de0596b77a3, 0xbfc3c0870a383ff6, // 0.98802, -0.15431 - 0x3fef9bed7cfbde29, 0xbfc3f22f57db4893, // 0.98778, -0.15583 - 0x3fef99f5c0abd496, 0xbfc423d4920e4166, // 0.98754, -0.15734 - 0x3fef97f924c9099b, 0xbfc45576b1293e5a, // 0.9873, -0.15886 - 0x3fef95f7a9a1ec47, 0xbfc48715ad84cdf5, // 0.98706, -0.16037 - 0x3fef93f14f85ac08, 0xbfc4b8b17f79fa88, // 0.98681, -0.16189 - 0x3fef91e616c43891, 0xbfc4ea4a1f624b61, // 0.98656, -0.1634 - 0x3fef8fd5ffae41db, 0xbfc51bdf8597c5f2, // 0.98631, -0.16491 - 0x3fef8dc10a95380d, 0xbfc54d71aa74ef02, // 0.98605, -0.16643 - 0x3fef8ba737cb4b78, 0xbfc57f008654cbde, // 0.9858, -0.16794 - 0x3fef898887a36c84, 0xbfc5b08c1192e381, // 0.98554, -0.16945 - 0x3fef8764fa714ba9, 0xbfc5e214448b3fc6, // 0.98528, -0.17096 - 0x3fef853c9089595e, 0xbfc61399179a6e94, // 0.98501, -0.17247 - 0x3fef830f4a40c60c, 0xbfc6451a831d830d, // 0.98475, -0.17398 - 0x3fef80dd27ed8204, 0xbfc676987f7216b8, // 0.98448, -0.17549 - 0x3fef7ea629e63d6e, 0xbfc6a81304f64ab2, // 0.98421, -0.177 - 0x3fef7c6a50826840, 0xbfc6d98a0c08c8da, // 0.98394, -0.17851 - 0x3fef7a299c1a322a, 0xbfc70afd8d08c4ff, // 0.98366, -0.18002 - 0x3fef77e40d068a90, 0xbfc73c6d8055fe0a, // 0.98339, -0.18153 - 0x3fef7599a3a12077, 0xbfc76dd9de50bf31, // 0.98311, -0.18304 - 0x3fef734a60446279, 0xbfc79f429f59e11d, // 0.98282, -0.18455 - 0x3fef70f6434b7eb7, 0xbfc7d0a7bbd2cb1b, // 0.98254, -0.18606 - 0x3fef6e9d4d1262ca, 0xbfc802092c1d744b, // 0.98225, -0.18756 - 0x3fef6c3f7df5bbb7, 0xbfc83366e89c64c5, // 0.98196, -0.18907 - 0x3fef69dcd652f5de, 0xbfc864c0e9b2b6cf, // 0.98167, -0.19057 - 0x3fef677556883cee, 0xbfc8961727c41804, // 0.98138, -0.19208 - 0x3fef6508fef47bd5, 0xbfc8c7699b34ca7e, // 0.98108, -0.19359 - 0x3fef6297cff75cb0, 0xbfc8f8b83c69a60a, // 0.98079, -0.19509 - 0x3fef6021c9f148c2, 0xbfc92a0303c8194f, // 0.98048, -0.19659 - 0x3fef5da6ed43685d, 0xbfc95b49e9b62af9, // 0.98018, -0.1981 - 0x3fef5b273a4fa2d9, 0xbfc98c8ce69a7aec, // 0.97988, -0.1996 - 0x3fef58a2b1789e84, 0xbfc9bdcbf2dc4366, // 0.97957, -0.2011 - 0x3fef56195321c090, 0xbfc9ef0706e35a35, // 0.97926, -0.20261 - 0x3fef538b1faf2d07, 0xbfca203e1b1831da, // 0.97895, -0.20411 - 0x3fef50f81785c6b9, 0xbfca517127e3dabc, // 0.97863, -0.20561 - 0x3fef4e603b0b2f2d, 0xbfca82a025b00451, // 0.97832, -0.20711 - 0x3fef4bc38aa5c694, 0xbfcab3cb0ce6fe44, // 0.978, -0.20861 - 0x3fef492206bcabb4, 0xbfcae4f1d5f3b9ab, // 0.97768, -0.21011 - 0x3fef467bafb7bbe0, 0xbfcb16147941ca2a, // 0.97735, -0.21161 - 0x3fef43d085ff92dd, 0xbfcb4732ef3d6722, // 0.97703, -0.21311 - 0x3fef412089fd8adc, 0xbfcb784d30536cda, // 0.9767, -0.21461 - 0x3fef3e6bbc1bbc65, 0xbfcba96334f15dad, // 0.97637, -0.21611 - 0x3fef3bb21cc4fe47, 0xbfcbda74f5856330, // 0.97604, -0.2176 - 0x3fef38f3ac64e589, 0xbfcc0b826a7e4f63, // 0.9757, -0.2191 - 0x3fef36306b67c556, 0xbfcc3c8b8c4b9dd7, // 0.97536, -0.2206 - 0x3fef33685a3aaef0, 0xbfcc6d90535d74dc, // 0.97503, -0.22209 - 0x3fef309b794b719f, 0xbfcc9e90b824a6a9, // 0.97468, -0.22359 - 0x3fef2dc9c9089a9d, 0xbfcccf8cb312b286, // 0.97434, -0.22508 - 0x3fef2af349e17507, 0xbfcd00843c99c5f9, // 0.97399, -0.22658 - 0x3fef2817fc4609ce, 0xbfcd31774d2cbdee, // 0.97364, -0.22807 - 0x3fef2537e0a71f9f, 0xbfcd6265dd3f27e3, // 0.97329, -0.22957 - 0x3fef2252f7763ada, 0xbfcd934fe5454311, // 0.97294, -0.23106 - 0x3fef1f6941259d7a, 0xbfcdc4355db40195, // 0.97258, -0.23255 - 0x3fef1c7abe284708, 0xbfcdf5163f01099a, // 0.97223, -0.23404 - 0x3fef19876ef1f486, 0xbfce25f281a2b684, // 0.97187, -0.23553 - 0x3fef168f53f7205d, 0xbfce56ca1e101a1b, // 0.9715, -0.23702 - 0x3fef13926dad024e, 0xbfce879d0cc0fdaf, // 0.97114, -0.23851 - 0x3fef1090bc898f5f, 0xbfceb86b462de348, // 0.97077, -0.24 - 0x3fef0d8a410379c5, 0xbfcee934c2d006c7, // 0.9704, -0.24149 - 0x3fef0a7efb9230d7, 0xbfcf19f97b215f1a, // 0.97003, -0.24298 - 0x3fef076eecade0fa, 0xbfcf4ab9679c9f5c, // 0.96966, -0.24447 - 0x3fef045a14cf738c, 0xbfcf7b7480bd3801, // 0.96928, -0.24596 - 0x3fef014074708ed3, 0xbfcfac2abeff57ff, // 0.9689, -0.24744 - 0x3feefe220c0b95ec, 0xbfcfdcdc1adfedf8, // 0.96852, -0.24893 - 0x3feefafedc1ba8b7, 0xbfd006c4466e54af, // 0.96814, -0.25041 - 0x3feef7d6e51ca3c0, 0xbfd01f1806b9fdd2, // 0.96775, -0.2519 - 0x3feef4aa278b2032, 0xbfd037694a928cac, // 0.96737, -0.25338 - 0x3feef178a3e473c2, 0xbfd04fb80e37fdae, // 0.96698, -0.25487 - 0x3feeee425aa6b09a, 0xbfd068044deab002, // 0.96658, -0.25635 - 0x3feeeb074c50a544, 0xbfd0804e05eb661e, // 0.96619, -0.25783 - 0x3feee7c77961dc9e, 0xbfd09895327b465e, // 0.96579, -0.25931 - 0x3feee482e25a9dbc, 0xbfd0b0d9cfdbdb90, // 0.96539, -0.26079 - 0x3feee13987bbebdc, 0xbfd0c91bda4f158d, // 0.96499, -0.26227 - 0x3feeddeb6a078651, 0xbfd0e15b4e1749cd, // 0.96459, -0.26375 - 0x3feeda9889bfe86a, 0xbfd0f998277733f7, // 0.96418, -0.26523 - 0x3feed740e7684963, 0xbfd111d262b1f677, // 0.96378, -0.26671 - 0x3feed3e483849c51, 0xbfd12a09fc0b1b12, // 0.96337, -0.26819 - 0x3feed0835e999009, 0xbfd1423eefc69378, // 0.96295, -0.26967 - 0x3feecd1d792c8f10, 0xbfd15a713a28b9d9, // 0.96254, -0.27115 - 0x3feec9b2d3c3bf84, 0xbfd172a0d7765177, // 0.96212, -0.27262 - 0x3feec6436ee60309, 0xbfd18acdc3f4873a, // 0.9617, -0.2741 - 0x3feec2cf4b1af6b2, 0xbfd1a2f7fbe8f243, // 0.96128, -0.27557 - 0x3feebf5668eaf2ef, 0xbfd1bb1f7b999480, // 0.96086, -0.27705 - 0x3feebbd8c8df0b74, 0xbfd1d3443f4cdb3d, // 0.96043, -0.27852 - 0x3feeb8566b810f2a, 0xbfd1eb6643499fbb, // 0.96, -0.27999 - 0x3feeb4cf515b8811, 0xbfd2038583d727bd, // 0.95957, -0.28146 - 0x3feeb1437af9bb34, 0xbfd21ba1fd3d2623, // 0.95914, -0.28294 - 0x3feeadb2e8e7a88e, 0xbfd233bbabc3bb72, // 0.9587, -0.28441 - 0x3feeaa1d9bb20af3, 0xbfd24bd28bb37672, // 0.95827, -0.28588 - 0x3feea68393e65800, 0xbfd263e6995554ba, // 0.95783, -0.28735 - 0x3feea2e4d212c000, 0xbfd27bf7d0f2c346, // 0.95738, -0.28882 - 0x3fee9f4156c62dda, 0xbfd294062ed59f05, // 0.95694, -0.29028 - 0x3fee9b99229046f8, 0xbfd2ac11af483572, // 0.95649, -0.29175 - 0x3fee97ec36016b30, 0xbfd2c41a4e954520, // 0.95605, -0.29322 - 0x3fee943a91aab4b4, 0xbfd2dc200907fe51, // 0.95559, -0.29469 - 0x3fee9084361df7f3, 0xbfd2f422daec0386, // 0.95514, -0.29615 - 0x3fee8cc923edc388, 0xbfd30c22c08d6a13, // 0.95469, -0.29762 - 0x3fee89095bad6025, 0xbfd3241fb638baaf, // 0.95423, -0.29908 - 0x3fee8544ddf0d075, 0xbfd33c19b83af207, // 0.95377, -0.30054 - 0x3fee817bab4cd10d, 0xbfd35410c2e18152, // 0.95331, -0.30201 - 0x3fee7dadc456d850, 0xbfd36c04d27a4edf, // 0.95284, -0.30347 - 0x3fee79db29a5165a, 0xbfd383f5e353b6aa, // 0.95238, -0.30493 - 0x3fee7603dbce74e9, 0xbfd39be3f1bc8aef, // 0.95191, -0.30639 - 0x3fee7227db6a9744, 0xbfd3b3cefa0414b7, // 0.95144, -0.30785 - 0x3fee6e472911da27, 0xbfd3cbb6f87a146e, // 0.95096, -0.30931 - 0x3fee6a61c55d53a7, 0xbfd3e39be96ec271, // 0.95049, -0.31077 - 0x3fee6677b0e6d31e, 0xbfd3fb7dc932cfa4, // 0.95001, -0.31222 - 0x3fee6288ec48e112, 0xbfd4135c94176602, // 0.94953, -0.31368 - 0x3fee5e95781ebf1c, 0xbfd42b38466e2928, // 0.94905, -0.31514 - 0x3fee5a9d550467d3, 0xbfd44310dc8936f0, // 0.94856, -0.31659 - 0x3fee56a083968eb1, 0xbfd45ae652bb2800, // 0.94807, -0.31805 - 0x3fee529f04729ffc, 0xbfd472b8a5571054, // 0.94759, -0.3195 - 0x3fee4e98d836c0af, 0xbfd48a87d0b07fd7, // 0.94709, -0.32096 - 0x3fee4a8dff81ce5e, 0xbfd4a253d11b82f3, // 0.9466, -0.32241 - 0x3fee467e7af35f23, 0xbfd4ba1ca2eca31c, // 0.94611, -0.32386 - 0x3fee426a4b2bc17e, 0xbfd4d1e24278e76a, // 0.94561, -0.32531 - 0x3fee3e5170cbfc46, 0xbfd4e9a4ac15d520, // 0.94511, -0.32676 - 0x3fee3a33ec75ce85, 0xbfd50163dc197047, // 0.9446, -0.32821 - 0x3fee3611becbaf69, 0xbfd5191fceda3c35, // 0.9441, -0.32966 - 0x3fee31eae870ce25, 0xbfd530d880af3c24, // 0.94359, -0.33111 - 0x3fee2dbf6a0911d9, 0xbfd5488dedeff3be, // 0.94308, -0.33255 - 0x3fee298f4439197a, 0xbfd5604012f467b4, // 0.94257, -0.334 - 0x3fee255a77a63bb8, 0xbfd577eeec151e47, // 0.94206, -0.33545 - 0x3fee212104f686e5, 0xbfd58f9a75ab1fdd, // 0.94154, -0.33689 - 0x3fee1ce2ecd0c0d8, 0xbfd5a742ac0ff78d, // 0.94103, -0.33833 - 0x3fee18a02fdc66d9, 0xbfd5bee78b9db3b6, // 0.94051, -0.33978 - 0x3fee1458cec1ad83, 0xbfd5d68910aee686, // 0.93998, -0.34122 - 0x3fee100cca2980ac, 0xbfd5ee27379ea693, // 0.93946, -0.34266 - 0x3fee0bbc22bd8349, 0xbfd605c1fcc88f63, // 0.93893, -0.3441 - 0x3fee0766d9280f54, 0xbfd61d595c88c203, // 0.9384, -0.34554 - 0x3fee030cee1435b8, 0xbfd634ed533be58e, // 0.93787, -0.34698 - 0x3fedfeae622dbe2b, 0xbfd64c7ddd3f27c6, // 0.93734, -0.34842 - 0x3fedfa4b3621271d, 0xbfd6640af6f03d9e, // 0.9368, -0.34986 - 0x3fedf5e36a9ba59c, 0xbfd67b949cad63ca, // 0.93627, -0.35129 - 0x3fedf177004b2534, 0xbfd6931acad55f51, // 0.93573, -0.35273 - 0x3feded05f7de47da, 0xbfd6aa9d7dc77e16, // 0.93518, -0.35416 - 0x3fede890520465ce, 0xbfd6c21cb1e39771, // 0.93464, -0.3556 - 0x3fede4160f6d8d81, 0xbfd6d998638a0cb5, // 0.93409, -0.35703 - 0x3feddf9730ca837b, 0xbfd6f1108f1bc9c5, // 0.93354, -0.35846 - 0x3feddb13b6ccc23d, 0xbfd7088530fa459e, // 0.93299, -0.3599 - 0x3fedd68ba2267a25, 0xbfd71ff6458782ec, // 0.93244, -0.36133 - 0x3fedd1fef38a915a, 0xbfd73763c9261092, // 0.93188, -0.36276 - 0x3fedcd6dabaca3a5, 0xbfd74ecdb8390a3e, // 0.93133, -0.36418 - 0x3fedc8d7cb410260, 0xbfd766340f2418f6, // 0.93077, -0.36561 - 0x3fedc43d52fcb453, 0xbfd77d96ca4b73a6, // 0.93021, -0.36704 - 0x3fedbf9e4395759a, 0xbfd794f5e613dfae, // 0.92964, -0.36847 - 0x3fedbafa9dc1b78d, 0xbfd7ac515ee2b172, // 0.92907, -0.36989 - 0x3fedb6526238a09b, 0xbfd7c3a9311dcce7, // 0.92851, -0.37132 - 0x3fedb1a591b20c38, 0xbfd7dafd592ba621, // 0.92794, -0.37274 - 0x3fedacf42ce68ab9, 0xbfd7f24dd37341e3, // 0.92736, -0.37416 - 0x3feda83e348f613b, 0xbfd8099a9c5c362d, // 0.92679, -0.37559 - 0x3feda383a9668988, 0xbfd820e3b04eaac4, // 0.92621, -0.37701 - 0x3fed9ec48c26b1f3, 0xbfd838290bb359c8, // 0.92563, -0.37843 - 0x3fed9a00dd8b3d46, 0xbfd84f6aaaf3903f, // 0.92505, -0.37985 - 0x3fed95389e50429b, 0xbfd866a88a792ea0, // 0.92447, -0.38127 - 0x3fed906bcf328d46, 0xbfd87de2a6aea963, // 0.92388, -0.38268 - 0x3fed8b9a70ef9cb4, 0xbfd89518fbff098e, // 0.92329, -0.3841 - 0x3fed86c48445a450, 0xbfd8ac4b86d5ed44, // 0.9227, -0.38552 - 0x3fed81ea09f38b63, 0xbfd8c37a439f884f, // 0.92211, -0.38693 - 0x3fed7d0b02b8ecf9, 0xbfd8daa52ec8a4af, // 0.92151, -0.38835 - 0x3fed78276f5617c6, 0xbfd8f1cc44bea329, // 0.92092, -0.38976 - 0x3fed733f508c0dff, 0xbfd908ef81ef7bd1, // 0.92032, -0.39117 - 0x3fed6e52a71c8547, 0xbfd9200ee2c9be97, // 0.91972, -0.39258 - 0x3fed696173c9e68b, 0xbfd9372a63bc93d7, // 0.91911, -0.39399 - 0x3fed646bb7574de5, 0xbfd94e420137bce3, // 0.91851, -0.3954 - 0x3fed5f7172888a7f, 0xbfd96555b7ab948f, // 0.9179, -0.39681 - 0x3fed5a72a6221e73, 0xbfd97c6583890fc2, // 0.91729, -0.39822 - 0x3fed556f52e93eb1, 0xbfd993716141bdfe, // 0.91668, -0.39962 - 0x3fed506779a3d2d9, 0xbfd9aa794d47c9ee, // 0.91606, -0.40103 - 0x3fed4b5b1b187524, 0xbfd9c17d440df9f2, // 0.91545, -0.40243 - 0x3fed464a380e7242, 0xbfd9d87d4207b0ab, // 0.91483, -0.40384 - 0x3fed4134d14dc93a, 0xbfd9ef7943a8ed8a, // 0.91421, -0.40524 - 0x3fed3c1ae79f2b4e, 0xbfda067145664d57, // 0.91359, -0.40664 - 0x3fed36fc7bcbfbdc, 0xbfda1d6543b50ac0, // 0.91296, -0.40804 - 0x3fed31d98e9e503a, 0xbfda34553b0afee5, // 0.91234, -0.40944 - 0x3fed2cb220e0ef9f, 0xbfda4b4127dea1e4, // 0.91171, -0.41084 - 0x3fed2786335f52fc, 0xbfda622906a70b63, // 0.91107, -0.41224 - 0x3fed2255c6e5a4e1, 0xbfda790cd3dbf31a, // 0.91044, -0.41364 - 0x3fed1d20dc40c15c, 0xbfda8fec8bf5b166, // 0.90981, -0.41503 - 0x3fed17e7743e35dc, 0xbfdaa6c82b6d3fc9, // 0.90917, -0.41643 - 0x3fed12a98fac410c, 0xbfdabd9faebc3980, // 0.90853, -0.41782 - 0x3fed0d672f59d2b9, 0xbfdad473125cdc08, // 0.90789, -0.41922 - 0x3fed082054168bac, 0xbfdaeb4252ca07ab, // 0.90724, -0.42061 - 0x3fed02d4feb2bd92, 0xbfdb020d6c7f4009, // 0.9066, -0.422 - 0x3fecfd852fff6ad4, 0xbfdb18d45bf8aca6, // 0.90595, -0.42339 - 0x3fecf830e8ce467b, 0xbfdb2f971db31972, // 0.9053, -0.42478 - 0x3fecf2d829f1b40e, 0xbfdb4655ae2bf757, // 0.90464, -0.42617 - 0x3feced7af43cc773, 0xbfdb5d1009e15cc0, // 0.90399, -0.42756 - 0x3fece819488344ce, 0xbfdb73c62d520624, // 0.90333, -0.42894 - 0x3fece2b32799a060, 0xbfdb8a7814fd5693, // 0.90267, -0.43033 - 0x3fecdd489254fe65, 0xbfdba125bd63583e, // 0.90201, -0.43171 - 0x3fecd7d9898b32f6, 0xbfdbb7cf2304bd01, // 0.90135, -0.43309 - 0x3fecd2660e12c1e6, 0xbfdbce744262deee, // 0.90068, -0.43448 - 0x3fecccee20c2de9f, 0xbfdbe51517ffc0d9, // 0.90002, -0.43586 - 0x3fecc771c2736c09, 0xbfdbfbb1a05e0edc, // 0.89935, -0.43724 - 0x3fecc1f0f3fcfc5c, 0xbfdc1249d8011ee7, // 0.89867, -0.43862 - 0x3fecbc6bb638d10b, 0xbfdc28ddbb6cf145, // 0.898, -0.43999 - 0x3fecb6e20a00da99, 0xbfdc3f6d47263129, // 0.89732, -0.44137 - 0x3fecb153f02fb87d, 0xbfdc55f877b23537, // 0.89665, -0.44275 - 0x3fecabc169a0b901, 0xbfdc6c7f4997000a, // 0.89597, -0.44412 - 0x3feca62a772fd919, 0xbfdc8301b95b40c2, // 0.89528, -0.4455 - 0x3feca08f19b9c449, 0xbfdc997fc3865388, // 0.8946, -0.44687 - 0x3fec9aef521bd480, 0xbfdcaff964a0421d, // 0.89391, -0.44824 - 0x3fec954b213411f5, 0xbfdcc66e9931c45d, // 0.89322, -0.44961 - 0x3fec8fa287e13305, 0xbfdcdcdf5dc440ce, // 0.89253, -0.45098 - 0x3fec89f587029c13, 0xbfdcf34baee1cd21, // 0.89184, -0.45235 - 0x3fec84441f785f61, 0xbfdd09b389152ec1, // 0.89115, -0.45372 - 0x3fec7e8e52233cf3, 0xbfdd2016e8e9db5b, // 0.89045, -0.45508 - 0x3fec78d41fe4a267, 0xbfdd3675caebf962, // 0.88975, -0.45645 - 0x3fec7315899eaad7, 0xbfdd4cd02ba8609c, // 0.88905, -0.45781 - 0x3fec6d5290341eb2, 0xbfdd632607ac9aa9, // 0.88835, -0.45918 - 0x3fec678b3488739b, 0xbfdd79775b86e389, // 0.88764, -0.46054 - 0x3fec61bf777fcc48, 0xbfdd8fc423c62a25, // 0.88693, -0.4619 - 0x3fec5bef59fef85a, 0xbfdda60c5cfa10d8, // 0.88622, -0.46326 - 0x3fec561adceb743e, 0xbfddbc5003b2edf8, // 0.88551, -0.46462 - 0x3fec5042012b6907, 0xbfddd28f1481cc58, // 0.8848, -0.46598 - 0x3fec4a64c7a5ac4c, 0xbfdde8c98bf86bd6, // 0.88408, -0.46733 - 0x3fec44833141c004, 0xbfddfeff66a941de, // 0.88336, -0.46869 - 0x3fec3e9d3ee7d262, 0xbfde1530a12779f4, // 0.88264, -0.47004 - 0x3fec38b2f180bdb1, 0xbfde2b5d3806f63b, // 0.88192, -0.4714 - 0x3fec32c449f60831, 0xbfde418527dc4ffa, // 0.8812, -0.47275 - 0x3fec2cd14931e3f1, 0xbfde57a86d3cd824, // 0.88047, -0.4741 - 0x3fec26d9f01f2eaf, 0xbfde6dc704be97e2, // 0.87974, -0.47545 - 0x3fec20de3fa971b0, 0xbfde83e0eaf85113, // 0.87901, -0.4768 - 0x3fec1ade38bce19b, 0xbfde99f61c817eda, // 0.87828, -0.47815 - 0x3fec14d9dc465e58, 0xbfdeb00695f25620, // 0.87755, -0.47949 - 0x3fec0ed12b3372e9, 0xbfdec61253e3c61b, // 0.87681, -0.48084 - 0x3fec08c426725549, 0xbfdedc1952ef78d5, // 0.87607, -0.48218 - 0x3fec02b2cef1e641, 0xbfdef21b8fafd3b5, // 0.87533, -0.48353 - 0x3febfc9d25a1b147, 0xbfdf081906bff7fd, // 0.87459, -0.48487 - 0x3febf6832b71ec5b, 0xbfdf1e11b4bbc35c, // 0.87384, -0.48621 - 0x3febf064e15377dd, 0xbfdf3405963fd068, // 0.87309, -0.48755 - 0x3febea424837de6d, 0xbfdf49f4a7e97729, // 0.87235, -0.48889 - 0x3febe41b611154c1, 0xbfdf5fdee656cda3, // 0.8716, -0.49023 - 0x3febddf02cd2b983, 0xbfdf75c44e26a852, // 0.87084, -0.49156 - 0x3febd7c0ac6f952a, 0xbfdf8ba4dbf89aba, // 0.87009, -0.4929 - 0x3febd18ce0dc19d6, 0xbfdfa1808c6cf7e0, // 0.86933, -0.49423 - 0x3febcb54cb0d2327, 0xbfdfb7575c24d2de, // 0.86857, -0.49557 - 0x3febc5186bf8361d, 0xbfdfcd2947c1ff57, // 0.86781, -0.4969 - 0x3febbed7c49380ea, 0xbfdfe2f64be7120f, // 0.86705, -0.49823 - 0x3febb892d5d5dad5, 0xbfdff8be6537615e, // 0.86628, -0.49956 - 0x3febb249a0b6c40d, 0xbfe00740c82b82e0, // 0.86551, -0.50089 - 0x3febabfc262e6586, 0xbfe0121fe4f56d2c, // 0.86474, -0.50221 - 0x3feba5aa673590d2, 0xbfe01cfc874c3eb7, // 0.86397, -0.50354 - 0x3feb9f5464c5bffc, 0xbfe027d6ad83287e, // 0.8632, -0.50486 - 0x3feb98fa1fd9155e, 0xbfe032ae55edbd95, // 0.86242, -0.50619 - 0x3feb929b996a5b7f, 0xbfe03d837edff370, // 0.86165, -0.50751 - 0x3feb8c38d27504e9, 0xbfe0485626ae221a, // 0.86087, -0.50883 - 0x3feb85d1cbf52c02, 0xbfe053264bad0483, // 0.86009, -0.51015 - 0x3feb7f6686e792ea, 0xbfe05df3ec31b8b6, // 0.8593, -0.51147 - 0x3feb78f70449a34b, 0xbfe068bf0691c028, // 0.85852, -0.51279 - 0x3feb728345196e3e, 0xbfe073879922ffed, // 0.85773, -0.5141 - 0x3feb6c0b4a55ac17, 0xbfe07e4da23bc102, // 0.85694, -0.51542 - 0x3feb658f14fdbc47, 0xbfe089112032b08c, // 0.85615, -0.51673 - 0x3feb5f0ea611a532, 0xbfe093d2115ee018, // 0.85535, -0.51804 - 0x3feb5889fe921405, 0xbfe09e907417c5e1, // 0.85456, -0.51936 - 0x3feb52011f805c92, 0xbfe0a94c46b53d0b, // 0.85376, -0.52067 - 0x3feb4b7409de7925, 0xbfe0b405878f85ec, // 0.85296, -0.52198 - 0x3feb44e2beaf0a61, 0xbfe0bebc34ff4646, // 0.85216, -0.52328 - 0x3feb3e4d3ef55712, 0xbfe0c9704d5d898f, // 0.85136, -0.52459 - 0x3feb37b38bb54c09, 0xbfe0d421cf03c12b, // 0.85055, -0.5259 - 0x3feb3115a5f37bf4, 0xbfe0ded0b84bc4b5, // 0.84974, -0.5272 - 0x3feb2a738eb51f33, 0xbfe0e97d078fd23b, // 0.84893, -0.5285 - 0x3feb23cd470013b4, 0xbfe0f426bb2a8e7d, // 0.84812, -0.5298 - 0x3feb1d22cfdadcc6, 0xbfe0fecdd1770537, // 0.84731, -0.5311 - 0x3feb16742a4ca2f5, 0xbfe1097248d0a956, // 0.84649, -0.5324 - 0x3feb0fc1575d33db, 0xbfe114141f935545, // 0.84567, -0.5337 - 0x3feb090a58150200, 0xbfe11eb3541b4b22, // 0.84485, -0.535 - 0x3feb024f2d7d24a9, 0xbfe1294fe4c5350a, // 0.84403, -0.53629 - 0x3feafb8fd89f57b6, 0xbfe133e9cfee254e, // 0.84321, -0.53759 - 0x3feaf4cc5a85fb73, 0xbfe13e8113f396c1, // 0.84238, -0.53888 - 0x3feaee04b43c1474, 0xbfe14915af336ceb, // 0.84155, -0.54017 - 0x3feae738e6cd4b67, 0xbfe153a7a00bf453, // 0.84073, -0.54146 - 0x3feae068f345ecef, 0xbfe15e36e4dbe2bc, // 0.83989, -0.54275 - 0x3fead994dab2e979, 0xbfe168c37c025764, // 0.83906, -0.54404 - 0x3fead2bc9e21d511, 0xbfe1734d63dedb49, // 0.83822, -0.54532 - 0x3feacbe03ea0e73b, 0xbfe17dd49ad16161, // 0.83739, -0.54661 - 0x3feac4ffbd3efac8, 0xbfe188591f3a46e5, // 0.83655, -0.54789 - 0x3feabe1b1b0b8dac, 0xbfe192daef7a5386, // 0.83571, -0.54918 - 0x3feab7325916c0d4, 0xbfe19d5a09f2b9b8, // 0.83486, -0.55046 - 0x3feab045787157ff, 0xbfe1a7d66d0516e6, // 0.83402, -0.55174 - 0x3feaa9547a2cb98e, 0xbfe1b250171373be, // 0.83317, -0.55302 - 0x3feaa25f5f5aee60, 0xbfe1bcc706804467, // 0.83232, -0.55429 - 0x3fea9b66290ea1a3, 0xbfe1c73b39ae68c8, // 0.83147, -0.55557 - 0x3fea9468d85b20ae, 0xbfe1d1acaf012cc2, // 0.83062, -0.55685 - 0x3fea8d676e545ad2, 0xbfe1dc1b64dc4872, // 0.82976, -0.55812 - 0x3fea8661ec0ee133, 0xbfe1e68759a3e074, // 0.8289, -0.55939 - 0x3fea7f58529fe69d, 0xbfe1f0f08bbc861b, // 0.82805, -0.56066 - 0x3fea784aa31d3f55, 0xbfe1fb56f98b37b8, // 0.82718, -0.56193 - 0x3fea7138de9d60f5, 0xbfe205baa17560d6, // 0.82632, -0.5632 - 0x3fea6a230637623b, 0xbfe2101b81e0da78, // 0.82546, -0.56447 - 0x3fea63091b02fae2, 0xbfe21a799933eb58, // 0.82459, -0.56573 - 0x3fea5beb1e188375, 0xbfe224d4e5d5482e, // 0.82372, -0.567 - 0x3fea54c91090f524, 0xbfe22f2d662c13e1, // 0.82285, -0.56826 - 0x3fea4da2f385e997, 0xbfe23983189fdfd5, // 0.82198, -0.56952 - 0x3fea4678c8119ac8, 0xbfe243d5fb98ac1f, // 0.8211, -0.57078 - 0x3fea3f4a8f4ee2d2, 0xbfe24e260d7ee7c9, // 0.82023, -0.57204 - 0x3fea38184a593bc6, 0xbfe258734cbb7110, // 0.81935, -0.5733 - 0x3fea30e1fa4cbf81, 0xbfe262bdb7b795a2, // 0.81847, -0.57455 - 0x3fea29a7a0462782, 0xbfe26d054cdd12df, // 0.81758, -0.57581 - 0x3fea22693d62ccb9, 0xbfe2774a0a961612, // 0.8167, -0.57706 - 0x3fea1b26d2c0a75e, 0xbfe2818bef4d3cba, // 0.81581, -0.57831 - 0x3fea13e0617e4ec7, 0xbfe28bcaf96d94ba, // 0.81493, -0.57956 - 0x3fea0c95eabaf937, 0xbfe2960727629ca8, // 0.81404, -0.58081 - 0x3fea05476f967bb5, 0xbfe2a040779843fb, // 0.81314, -0.58206 - 0x3fe9fdf4f13149de, 0xbfe2aa76e87aeb58, // 0.81225, -0.58331 - 0x3fe9f69e70ac75bc, 0xbfe2b4aa787764c4, // 0.81135, -0.58455 - 0x3fe9ef43ef29af94, 0xbfe2bedb25faf3ea, // 0.81046, -0.5858 - 0x3fe9e7e56dcb45bd, 0xbfe2c908ef734e57, // 0.80956, -0.58704 - 0x3fe9e082edb42472, 0xbfe2d333d34e9bb7, // 0.80866, -0.58828 - 0x3fe9d91c7007d5a6, 0xbfe2dd5bcffb7616, // 0.80775, -0.58952 - 0x3fe9d1b1f5ea80d6, 0xbfe2e780e3e8ea16, // 0.80685, -0.59076 - 0x3fe9ca438080eadb, 0xbfe2f1a30d86773a, // 0.80594, -0.592 - 0x3fe9c2d110f075c3, 0xbfe2fbc24b441015, // 0.80503, -0.59323 - 0x3fe9bb5aa85f2098, 0xbfe305de9b921a94, // 0.80412, -0.59447 - 0x3fe9b3e047f38741, 0xbfe30ff7fce17035, // 0.80321, -0.5957 - 0x3fe9ac61f0d4e247, 0xbfe31a0e6da35e44, // 0.80229, -0.59693 - 0x3fe9a4dfa42b06b2, 0xbfe32421ec49a620, // 0.80138, -0.59816 - 0x3fe99d59631e65d5, 0xbfe32e3277467d6b, // 0.80046, -0.59939 - 0x3fe995cf2ed80d22, 0xbfe338400d0c8e57, // 0.79954, -0.60062 - 0x3fe98e410881a600, 0xbfe3424aac0ef7d6, // 0.79861, -0.60184 - 0x3fe986aef1457594, 0xbfe34c5252c14de1, // 0.79769, -0.60307 - 0x3fe97f18ea4e5c9e, 0xbfe35656ff9799ae, // 0.79676, -0.60429 - 0x3fe9777ef4c7d742, 0xbfe36058b10659f3, // 0.79584, -0.60551 - 0x3fe96fe111ddfce0, 0xbfe36a576582831b, // 0.79491, -0.60673 - 0x3fe9683f42bd7fe1, 0xbfe374531b817f8d, // 0.79398, -0.60795 - 0x3fe960998893ad8c, 0xbfe37e4bd1792fe2, // 0.79304, -0.60917 - 0x3fe958efe48e6dd7, 0xbfe3884185dfeb22, // 0.79211, -0.61038 - 0x3fe9514257dc4335, 0xbfe39234372c7f04, // 0.79117, -0.6116 - 0x3fe94990e3ac4a6c, 0xbfe39c23e3d63029, // 0.79023, -0.61281 - 0x3fe941db892e3a65, 0xbfe3a6108a54ba58, // 0.78929, -0.61402 - 0x3fe93a22499263fc, 0xbfe3affa292050b9, // 0.78835, -0.61523 - 0x3fe932652609b1cf, 0xbfe3b9e0beb19e18, // 0.7874, -0.61644 - 0x3fe92aa41fc5a815, 0xbfe3c3c44981c517, // 0.78646, -0.61765 - 0x3fe922df37f8646a, 0xbfe3cda4c80a6076, // 0.78551, -0.61885 - 0x3fe91b166fd49da2, 0xbfe3d78238c58343, // 0.78456, -0.62006 - 0x3fe91349c88da398, 0xbfe3e15c9a2db922, // 0.7836, -0.62126 - 0x3fe90b7943575efe, 0xbfe3eb33eabe0680, // 0.78265, -0.62246 - 0x3fe903a4e1665133, 0xbfe3f50828f1e8d2, // 0.78169, -0.62366 - 0x3fe8fbcca3ef940d, 0xbfe3fed9534556d4, // 0.78074, -0.62486 - 0x3fe8f3f08c28d9ac, 0xbfe408a76834c0c0, // 0.77978, -0.62606 - 0x3fe8ec109b486c49, 0xbfe41272663d108c, // 0.77882, -0.62725 - 0x3fe8e42cd2852e0a, 0xbfe41c3a4bdbaa26, // 0.77785, -0.62845 - 0x3fe8dc45331698cc, 0xbfe425ff178e6bb1, // 0.77689, -0.62964 - 0x3fe8d459be34bdfa, 0xbfe42fc0c7d3adbb, // 0.77592, -0.63083 - 0x3fe8cc6a75184655, 0xbfe4397f5b2a4380, // 0.77495, -0.63202 - 0x3fe8c47758fa71cb, 0xbfe4433ad0117b1d, // 0.77398, -0.63321 - 0x3fe8bc806b151741, 0xbfe44cf325091dd6, // 0.77301, -0.63439 - 0x3fe8b485aca2a468, 0xbfe456a858917046, // 0.77204, -0.63558 - 0x3fe8ac871ede1d88, 0xbfe4605a692b32a2, // 0.77106, -0.63676 - 0x3fe8a484c3031d50, 0xbfe46a095557a0f1, // 0.77008, -0.63794 - 0x3fe89c7e9a4dd4ab, 0xbfe473b51b987347, // 0.7691, -0.63912 - 0x3fe89474a5fb0a84, 0xbfe47d5dba6fde01, // 0.76812, -0.6403 - 0x3fe88c66e7481ba1, 0xbfe48703306091fe, // 0.76714, -0.64148 - 0x3fe884555f72fa6b, 0xbfe490a57bedbcdf, // 0.76615, -0.64266 - 0x3fe87c400fba2ebf, 0xbfe49a449b9b0938, // 0.76517, -0.64383 - 0x3fe87426f95cd5bd, 0xbfe4a3e08dec9ed6, // 0.76418, -0.645 - 0x3fe86c0a1d9aa195, 0xbfe4ad79516722f0, // 0.76319, -0.64618 - 0x3fe863e97db3d95a, 0xbfe4b70ee48fb869, // 0.7622, -0.64735 - 0x3fe85bc51ae958cc, 0xbfe4c0a145ec0004, // 0.7612, -0.64851 - 0x3fe8539cf67c9029, 0xbfe4ca30740218a3, // 0.76021, -0.64968 - 0x3fe84b7111af83f9, 0xbfe4d3bc6d589f80, // 0.75921, -0.65085 - 0x3fe843416dc4cce2, 0xbfe4dd453076b064, // 0.75821, -0.65201 - 0x3fe83b0e0bff976e, 0xbfe4e6cabbe3e5e9, // 0.75721, -0.65317 - 0x3fe832d6eda3a3e0, 0xbfe4f04d0e2859aa, // 0.75621, -0.65433 - 0x3fe82a9c13f545ff, 0xbfe4f9cc25cca486, // 0.7552, -0.65549 - 0x3fe8225d803964e5, 0xbfe503480159ded2, // 0.75419, -0.65665 - 0x3fe81a1b33b57acc, 0xbfe50cc09f59a09b, // 0.75319, -0.65781 - 0x3fe811d52faf94dc, 0xbfe51635fe5601d7, // 0.75218, -0.65896 - 0x3fe8098b756e52fa, 0xbfe51fa81cd99aa6, // 0.75117, -0.66011 - 0x3fe8013e0638e795, 0xbfe52916f96f8388, // 0.75015, -0.66127 - 0x3fe7f8ece3571771, 0xbfe5328292a35596, // 0.74914, -0.66242 - 0x3fe7f0980e113978, 0xbfe53beae7012abe, // 0.74812, -0.66356 - 0x3fe7e83f87b03686, 0xbfe5454ff5159dfb, // 0.7471, -0.66471 - 0x3fe7dfe3517d8937, 0xbfe54eb1bb6dcb8f, // 0.74608, -0.66586 - 0x3fe7d7836cc33db2, 0xbfe5581038975137, // 0.74506, -0.667 - 0x3fe7cf1fdacbf179, 0xbfe5616b6b204e6e, // 0.74403, -0.66814 - 0x3fe7c6b89ce2d333, 0xbfe56ac35197649e, // 0.74301, -0.66928 - 0x3fe7be4db453a27c, 0xbfe57417ea8bb75c, // 0.74198, -0.67042 - 0x3fe7b5df226aafb0, 0xbfe57d69348cec9f, // 0.74095, -0.67156 - 0x3fe7ad6ce874dbb6, 0xbfe586b72e2b2cfd, // 0.73992, -0.67269 - 0x3fe7a4f707bf97d2, 0xbfe59001d5f723df, // 0.73889, -0.67383 - 0x3fe79c7d8198e56e, 0xbfe599492a81ffbc, // 0.73785, -0.67496 - 0x3fe79400574f55e4, 0xbfe5a28d2a5d7250, // 0.73682, -0.67609 - 0x3fe78b7f8a320a52, 0xbfe5abcdd41bb0d8, // 0.73578, -0.67722 - 0x3fe782fb1b90b35b, 0xbfe5b50b264f7448, // 0.73474, -0.67835 - 0x3fe77a730cbb9100, 0xbfe5be451f8bf980, // 0.7337, -0.67948 - 0x3fe771e75f037261, 0xbfe5c77bbe65018c, // 0.73265, -0.6806 - 0x3fe7695813b9b594, 0xbfe5d0af016ed1d4, // 0.73161, -0.68172 - 0x3fe760c52c304764, 0xbfe5d9dee73e345c, // 0.73056, -0.68285 - 0x3fe7582ea9b9a329, 0xbfe5e30b6e6877f3, // 0.72951, -0.68397 - 0x3fe74f948da8d28d, 0xbfe5ec3495837074, // 0.72846, -0.68508 - 0x3fe746f6d9516d59, 0xbfe5f55a5b2576f8, // 0.72741, -0.6862 - 0x3fe73e558e079942, 0xbfe5fe7cbde56a0f, // 0.72636, -0.68732 - 0x3fe735b0ad2009b2, 0xbfe6079bbc5aadfa, // 0.7253, -0.68843 - 0x3fe72d0837efff97, 0xbfe610b7551d2cde, // 0.72425, -0.68954 - 0x3fe7245c2fcd492a, 0xbfe619cf86c55702, // 0.72319, -0.69065 - 0x3fe71bac960e41bf, 0xbfe622e44fec22ff, // 0.72213, -0.69176 - 0x3fe712f96c09d18d, 0xbfe62bf5af2b0dfd, // 0.72107, -0.69287 - 0x3fe70a42b3176d7a, 0xbfe63503a31c1be8, // 0.72, -0.69397 - 0x3fe701886c8f16e6, 0xbfe63e0e2a59d7aa, // 0.71894, -0.69508 - 0x3fe6f8ca99c95b75, 0xbfe64715437f535b, // 0.71787, -0.69618 - 0x3fe6f0093c1f54de, 0xbfe65018ed28287f, // 0.7168, -0.69728 - 0x3fe6e74454eaa8ae, 0xbfe6591925f0783e, // 0.71573, -0.69838 - 0x3fe6de7be585881d, 0xbfe66215ec74eb91, // 0.71466, -0.69947 - 0x3fe6d5afef4aafcc, 0xbfe66b0f3f52b386, // 0.71358, -0.70057 - 0x3fe6cce07395679f, 0xbfe674051d27896c, // 0.71251, -0.70166 - 0x3fe6c40d73c18275, 0xbfe67cf78491af10, // 0.71143, -0.70275 - 0x3fe6bb36f12b5e06, 0xbfe685e6742feeef, // 0.71035, -0.70385 - 0x3fe6b25ced2fe29c, 0xbfe68ed1eaa19c71, // 0.70927, -0.70493 - 0x3fe6a97f692c82ea, 0xbfe697b9e686941c, // 0.70819, -0.70602 - 0x3fe6a09e667f3bcc, 0xbfe6a09e667f3bcc, // 0.70711, -0.70711 - 0x3fe697b9e686941c, 0xbfe6a97f692c82ea, // 0.70602, -0.70819 - 0x3fe68ed1eaa19c71, 0xbfe6b25ced2fe29c, // 0.70493, -0.70927 - 0x3fe685e6742feeef, 0xbfe6bb36f12b5e06, // 0.70385, -0.71035 - 0x3fe67cf78491af10, 0xbfe6c40d73c18275, // 0.70275, -0.71143 - 0x3fe674051d27896c, 0xbfe6cce07395679f, // 0.70166, -0.71251 - 0x3fe66b0f3f52b386, 0xbfe6d5afef4aafcc, // 0.70057, -0.71358 - 0x3fe66215ec74eb91, 0xbfe6de7be585881d, // 0.69947, -0.71466 - 0x3fe6591925f0783e, 0xbfe6e74454eaa8ae, // 0.69838, -0.71573 - 0x3fe65018ed28287f, 0xbfe6f0093c1f54de, // 0.69728, -0.7168 - 0x3fe64715437f535b, 0xbfe6f8ca99c95b75, // 0.69618, -0.71787 - 0x3fe63e0e2a59d7aa, 0xbfe701886c8f16e6, // 0.69508, -0.71894 - 0x3fe63503a31c1be8, 0xbfe70a42b3176d7a, // 0.69397, -0.72 - 0x3fe62bf5af2b0dfd, 0xbfe712f96c09d18d, // 0.69287, -0.72107 - 0x3fe622e44fec22ff, 0xbfe71bac960e41bf, // 0.69176, -0.72213 - 0x3fe619cf86c55702, 0xbfe7245c2fcd492a, // 0.69065, -0.72319 - 0x3fe610b7551d2cde, 0xbfe72d0837efff97, // 0.68954, -0.72425 - 0x3fe6079bbc5aadfa, 0xbfe735b0ad2009b2, // 0.68843, -0.7253 - 0x3fe5fe7cbde56a0f, 0xbfe73e558e079942, // 0.68732, -0.72636 - 0x3fe5f55a5b2576f8, 0xbfe746f6d9516d59, // 0.6862, -0.72741 - 0x3fe5ec3495837074, 0xbfe74f948da8d28d, // 0.68508, -0.72846 - 0x3fe5e30b6e6877f3, 0xbfe7582ea9b9a329, // 0.68397, -0.72951 - 0x3fe5d9dee73e345c, 0xbfe760c52c304764, // 0.68285, -0.73056 - 0x3fe5d0af016ed1d4, 0xbfe7695813b9b594, // 0.68172, -0.73161 - 0x3fe5c77bbe65018c, 0xbfe771e75f037261, // 0.6806, -0.73265 - 0x3fe5be451f8bf980, 0xbfe77a730cbb9100, // 0.67948, -0.7337 - 0x3fe5b50b264f7448, 0xbfe782fb1b90b35b, // 0.67835, -0.73474 - 0x3fe5abcdd41bb0d8, 0xbfe78b7f8a320a52, // 0.67722, -0.73578 - 0x3fe5a28d2a5d7250, 0xbfe79400574f55e4, // 0.67609, -0.73682 - 0x3fe599492a81ffbc, 0xbfe79c7d8198e56e, // 0.67496, -0.73785 - 0x3fe59001d5f723df, 0xbfe7a4f707bf97d2, // 0.67383, -0.73889 - 0x3fe586b72e2b2cfd, 0xbfe7ad6ce874dbb6, // 0.67269, -0.73992 - 0x3fe57d69348cec9f, 0xbfe7b5df226aafb0, // 0.67156, -0.74095 - 0x3fe57417ea8bb75c, 0xbfe7be4db453a27c, // 0.67042, -0.74198 - 0x3fe56ac35197649e, 0xbfe7c6b89ce2d333, // 0.66928, -0.74301 - 0x3fe5616b6b204e6e, 0xbfe7cf1fdacbf179, // 0.66814, -0.74403 - 0x3fe5581038975137, 0xbfe7d7836cc33db2, // 0.667, -0.74506 - 0x3fe54eb1bb6dcb8f, 0xbfe7dfe3517d8937, // 0.66586, -0.74608 - 0x3fe5454ff5159dfb, 0xbfe7e83f87b03686, // 0.66471, -0.7471 - 0x3fe53beae7012abe, 0xbfe7f0980e113978, // 0.66356, -0.74812 - 0x3fe5328292a35596, 0xbfe7f8ece3571771, // 0.66242, -0.74914 - 0x3fe52916f96f8388, 0xbfe8013e0638e795, // 0.66127, -0.75015 - 0x3fe51fa81cd99aa6, 0xbfe8098b756e52fa, // 0.66011, -0.75117 - 0x3fe51635fe5601d7, 0xbfe811d52faf94dc, // 0.65896, -0.75218 - 0x3fe50cc09f59a09b, 0xbfe81a1b33b57acc, // 0.65781, -0.75319 - 0x3fe503480159ded2, 0xbfe8225d803964e5, // 0.65665, -0.75419 - 0x3fe4f9cc25cca486, 0xbfe82a9c13f545ff, // 0.65549, -0.7552 - 0x3fe4f04d0e2859aa, 0xbfe832d6eda3a3e0, // 0.65433, -0.75621 - 0x3fe4e6cabbe3e5e9, 0xbfe83b0e0bff976e, // 0.65317, -0.75721 - 0x3fe4dd453076b064, 0xbfe843416dc4cce2, // 0.65201, -0.75821 - 0x3fe4d3bc6d589f80, 0xbfe84b7111af83f9, // 0.65085, -0.75921 - 0x3fe4ca30740218a3, 0xbfe8539cf67c9029, // 0.64968, -0.76021 - 0x3fe4c0a145ec0004, 0xbfe85bc51ae958cc, // 0.64851, -0.7612 - 0x3fe4b70ee48fb869, 0xbfe863e97db3d95a, // 0.64735, -0.7622 - 0x3fe4ad79516722f0, 0xbfe86c0a1d9aa195, // 0.64618, -0.76319 - 0x3fe4a3e08dec9ed6, 0xbfe87426f95cd5bd, // 0.645, -0.76418 - 0x3fe49a449b9b0938, 0xbfe87c400fba2ebf, // 0.64383, -0.76517 - 0x3fe490a57bedbcdf, 0xbfe884555f72fa6b, // 0.64266, -0.76615 - 0x3fe48703306091fe, 0xbfe88c66e7481ba1, // 0.64148, -0.76714 - 0x3fe47d5dba6fde01, 0xbfe89474a5fb0a84, // 0.6403, -0.76812 - 0x3fe473b51b987347, 0xbfe89c7e9a4dd4ab, // 0.63912, -0.7691 - 0x3fe46a095557a0f1, 0xbfe8a484c3031d50, // 0.63794, -0.77008 - 0x3fe4605a692b32a2, 0xbfe8ac871ede1d88, // 0.63676, -0.77106 - 0x3fe456a858917046, 0xbfe8b485aca2a468, // 0.63558, -0.77204 - 0x3fe44cf325091dd6, 0xbfe8bc806b151741, // 0.63439, -0.77301 - 0x3fe4433ad0117b1d, 0xbfe8c47758fa71cb, // 0.63321, -0.77398 - 0x3fe4397f5b2a4380, 0xbfe8cc6a75184655, // 0.63202, -0.77495 - 0x3fe42fc0c7d3adbb, 0xbfe8d459be34bdfa, // 0.63083, -0.77592 - 0x3fe425ff178e6bb1, 0xbfe8dc45331698cc, // 0.62964, -0.77689 - 0x3fe41c3a4bdbaa26, 0xbfe8e42cd2852e0a, // 0.62845, -0.77785 - 0x3fe41272663d108c, 0xbfe8ec109b486c49, // 0.62725, -0.77882 - 0x3fe408a76834c0c0, 0xbfe8f3f08c28d9ac, // 0.62606, -0.77978 - 0x3fe3fed9534556d4, 0xbfe8fbcca3ef940d, // 0.62486, -0.78074 - 0x3fe3f50828f1e8d2, 0xbfe903a4e1665133, // 0.62366, -0.78169 - 0x3fe3eb33eabe0680, 0xbfe90b7943575efe, // 0.62246, -0.78265 - 0x3fe3e15c9a2db922, 0xbfe91349c88da398, // 0.62126, -0.7836 - 0x3fe3d78238c58343, 0xbfe91b166fd49da2, // 0.62006, -0.78456 - 0x3fe3cda4c80a6076, 0xbfe922df37f8646a, // 0.61885, -0.78551 - 0x3fe3c3c44981c517, 0xbfe92aa41fc5a815, // 0.61765, -0.78646 - 0x3fe3b9e0beb19e18, 0xbfe932652609b1cf, // 0.61644, -0.7874 - 0x3fe3affa292050b9, 0xbfe93a22499263fc, // 0.61523, -0.78835 - 0x3fe3a6108a54ba58, 0xbfe941db892e3a65, // 0.61402, -0.78929 - 0x3fe39c23e3d63029, 0xbfe94990e3ac4a6c, // 0.61281, -0.79023 - 0x3fe39234372c7f04, 0xbfe9514257dc4335, // 0.6116, -0.79117 - 0x3fe3884185dfeb22, 0xbfe958efe48e6dd7, // 0.61038, -0.79211 - 0x3fe37e4bd1792fe2, 0xbfe960998893ad8c, // 0.60917, -0.79304 - 0x3fe374531b817f8d, 0xbfe9683f42bd7fe1, // 0.60795, -0.79398 - 0x3fe36a576582831b, 0xbfe96fe111ddfce0, // 0.60673, -0.79491 - 0x3fe36058b10659f3, 0xbfe9777ef4c7d742, // 0.60551, -0.79584 - 0x3fe35656ff9799ae, 0xbfe97f18ea4e5c9e, // 0.60429, -0.79676 - 0x3fe34c5252c14de1, 0xbfe986aef1457594, // 0.60307, -0.79769 - 0x3fe3424aac0ef7d6, 0xbfe98e410881a600, // 0.60184, -0.79861 - 0x3fe338400d0c8e57, 0xbfe995cf2ed80d22, // 0.60062, -0.79954 - 0x3fe32e3277467d6b, 0xbfe99d59631e65d5, // 0.59939, -0.80046 - 0x3fe32421ec49a620, 0xbfe9a4dfa42b06b2, // 0.59816, -0.80138 - 0x3fe31a0e6da35e44, 0xbfe9ac61f0d4e247, // 0.59693, -0.80229 - 0x3fe30ff7fce17035, 0xbfe9b3e047f38741, // 0.5957, -0.80321 - 0x3fe305de9b921a94, 0xbfe9bb5aa85f2098, // 0.59447, -0.80412 - 0x3fe2fbc24b441015, 0xbfe9c2d110f075c3, // 0.59323, -0.80503 - 0x3fe2f1a30d86773a, 0xbfe9ca438080eadb, // 0.592, -0.80594 - 0x3fe2e780e3e8ea16, 0xbfe9d1b1f5ea80d6, // 0.59076, -0.80685 - 0x3fe2dd5bcffb7616, 0xbfe9d91c7007d5a6, // 0.58952, -0.80775 - 0x3fe2d333d34e9bb7, 0xbfe9e082edb42472, // 0.58828, -0.80866 - 0x3fe2c908ef734e57, 0xbfe9e7e56dcb45bd, // 0.58704, -0.80956 - 0x3fe2bedb25faf3ea, 0xbfe9ef43ef29af94, // 0.5858, -0.81046 - 0x3fe2b4aa787764c4, 0xbfe9f69e70ac75bc, // 0.58455, -0.81135 - 0x3fe2aa76e87aeb58, 0xbfe9fdf4f13149de, // 0.58331, -0.81225 - 0x3fe2a040779843fb, 0xbfea05476f967bb5, // 0.58206, -0.81314 - 0x3fe2960727629ca8, 0xbfea0c95eabaf937, // 0.58081, -0.81404 - 0x3fe28bcaf96d94ba, 0xbfea13e0617e4ec7, // 0.57956, -0.81493 - 0x3fe2818bef4d3cba, 0xbfea1b26d2c0a75e, // 0.57831, -0.81581 - 0x3fe2774a0a961612, 0xbfea22693d62ccb9, // 0.57706, -0.8167 - 0x3fe26d054cdd12df, 0xbfea29a7a0462782, // 0.57581, -0.81758 - 0x3fe262bdb7b795a2, 0xbfea30e1fa4cbf81, // 0.57455, -0.81847 - 0x3fe258734cbb7110, 0xbfea38184a593bc6, // 0.5733, -0.81935 - 0x3fe24e260d7ee7c9, 0xbfea3f4a8f4ee2d2, // 0.57204, -0.82023 - 0x3fe243d5fb98ac1f, 0xbfea4678c8119ac8, // 0.57078, -0.8211 - 0x3fe23983189fdfd5, 0xbfea4da2f385e997, // 0.56952, -0.82198 - 0x3fe22f2d662c13e1, 0xbfea54c91090f524, // 0.56826, -0.82285 - 0x3fe224d4e5d5482e, 0xbfea5beb1e188375, // 0.567, -0.82372 - 0x3fe21a799933eb58, 0xbfea63091b02fae2, // 0.56573, -0.82459 - 0x3fe2101b81e0da78, 0xbfea6a230637623b, // 0.56447, -0.82546 - 0x3fe205baa17560d6, 0xbfea7138de9d60f5, // 0.5632, -0.82632 - 0x3fe1fb56f98b37b8, 0xbfea784aa31d3f55, // 0.56193, -0.82718 - 0x3fe1f0f08bbc861b, 0xbfea7f58529fe69d, // 0.56066, -0.82805 - 0x3fe1e68759a3e074, 0xbfea8661ec0ee133, // 0.55939, -0.8289 - 0x3fe1dc1b64dc4872, 0xbfea8d676e545ad2, // 0.55812, -0.82976 - 0x3fe1d1acaf012cc2, 0xbfea9468d85b20ae, // 0.55685, -0.83062 - 0x3fe1c73b39ae68c8, 0xbfea9b66290ea1a3, // 0.55557, -0.83147 - 0x3fe1bcc706804467, 0xbfeaa25f5f5aee60, // 0.55429, -0.83232 - 0x3fe1b250171373be, 0xbfeaa9547a2cb98e, // 0.55302, -0.83317 - 0x3fe1a7d66d0516e6, 0xbfeab045787157ff, // 0.55174, -0.83402 - 0x3fe19d5a09f2b9b8, 0xbfeab7325916c0d4, // 0.55046, -0.83486 - 0x3fe192daef7a5386, 0xbfeabe1b1b0b8dac, // 0.54918, -0.83571 - 0x3fe188591f3a46e5, 0xbfeac4ffbd3efac8, // 0.54789, -0.83655 - 0x3fe17dd49ad16161, 0xbfeacbe03ea0e73b, // 0.54661, -0.83739 - 0x3fe1734d63dedb49, 0xbfead2bc9e21d511, // 0.54532, -0.83822 - 0x3fe168c37c025764, 0xbfead994dab2e979, // 0.54404, -0.83906 - 0x3fe15e36e4dbe2bc, 0xbfeae068f345ecef, // 0.54275, -0.83989 - 0x3fe153a7a00bf453, 0xbfeae738e6cd4b67, // 0.54146, -0.84073 - 0x3fe14915af336ceb, 0xbfeaee04b43c1474, // 0.54017, -0.84155 - 0x3fe13e8113f396c1, 0xbfeaf4cc5a85fb73, // 0.53888, -0.84238 - 0x3fe133e9cfee254e, 0xbfeafb8fd89f57b6, // 0.53759, -0.84321 - 0x3fe1294fe4c5350a, 0xbfeb024f2d7d24a9, // 0.53629, -0.84403 - 0x3fe11eb3541b4b22, 0xbfeb090a58150200, // 0.535, -0.84485 - 0x3fe114141f935545, 0xbfeb0fc1575d33db, // 0.5337, -0.84567 - 0x3fe1097248d0a956, 0xbfeb16742a4ca2f5, // 0.5324, -0.84649 - 0x3fe0fecdd1770537, 0xbfeb1d22cfdadcc6, // 0.5311, -0.84731 - 0x3fe0f426bb2a8e7d, 0xbfeb23cd470013b4, // 0.5298, -0.84812 - 0x3fe0e97d078fd23b, 0xbfeb2a738eb51f33, // 0.5285, -0.84893 - 0x3fe0ded0b84bc4b5, 0xbfeb3115a5f37bf4, // 0.5272, -0.84974 - 0x3fe0d421cf03c12b, 0xbfeb37b38bb54c09, // 0.5259, -0.85055 - 0x3fe0c9704d5d898f, 0xbfeb3e4d3ef55712, // 0.52459, -0.85136 - 0x3fe0bebc34ff4646, 0xbfeb44e2beaf0a61, // 0.52328, -0.85216 - 0x3fe0b405878f85ec, 0xbfeb4b7409de7925, // 0.52198, -0.85296 - 0x3fe0a94c46b53d0b, 0xbfeb52011f805c92, // 0.52067, -0.85376 - 0x3fe09e907417c5e1, 0xbfeb5889fe921405, // 0.51936, -0.85456 - 0x3fe093d2115ee018, 0xbfeb5f0ea611a532, // 0.51804, -0.85535 - 0x3fe089112032b08c, 0xbfeb658f14fdbc47, // 0.51673, -0.85615 - 0x3fe07e4da23bc102, 0xbfeb6c0b4a55ac17, // 0.51542, -0.85694 - 0x3fe073879922ffed, 0xbfeb728345196e3e, // 0.5141, -0.85773 - 0x3fe068bf0691c028, 0xbfeb78f70449a34b, // 0.51279, -0.85852 - 0x3fe05df3ec31b8b6, 0xbfeb7f6686e792ea, // 0.51147, -0.8593 - 0x3fe053264bad0483, 0xbfeb85d1cbf52c02, // 0.51015, -0.86009 - 0x3fe0485626ae221a, 0xbfeb8c38d27504e9, // 0.50883, -0.86087 - 0x3fe03d837edff370, 0xbfeb929b996a5b7f, // 0.50751, -0.86165 - 0x3fe032ae55edbd95, 0xbfeb98fa1fd9155e, // 0.50619, -0.86242 - 0x3fe027d6ad83287e, 0xbfeb9f5464c5bffc, // 0.50486, -0.8632 - 0x3fe01cfc874c3eb7, 0xbfeba5aa673590d2, // 0.50354, -0.86397 - 0x3fe0121fe4f56d2c, 0xbfebabfc262e6586, // 0.50221, -0.86474 - 0x3fe00740c82b82e0, 0xbfebb249a0b6c40d, // 0.50089, -0.86551 - 0x3fdff8be6537615e, 0xbfebb892d5d5dad5, // 0.49956, -0.86628 - 0x3fdfe2f64be7120f, 0xbfebbed7c49380ea, // 0.49823, -0.86705 - 0x3fdfcd2947c1ff57, 0xbfebc5186bf8361d, // 0.4969, -0.86781 - 0x3fdfb7575c24d2de, 0xbfebcb54cb0d2327, // 0.49557, -0.86857 - 0x3fdfa1808c6cf7e0, 0xbfebd18ce0dc19d6, // 0.49423, -0.86933 - 0x3fdf8ba4dbf89aba, 0xbfebd7c0ac6f952a, // 0.4929, -0.87009 - 0x3fdf75c44e26a852, 0xbfebddf02cd2b983, // 0.49156, -0.87084 - 0x3fdf5fdee656cda3, 0xbfebe41b611154c1, // 0.49023, -0.8716 - 0x3fdf49f4a7e97729, 0xbfebea424837de6d, // 0.48889, -0.87235 - 0x3fdf3405963fd068, 0xbfebf064e15377dd, // 0.48755, -0.87309 - 0x3fdf1e11b4bbc35c, 0xbfebf6832b71ec5b, // 0.48621, -0.87384 - 0x3fdf081906bff7fd, 0xbfebfc9d25a1b147, // 0.48487, -0.87459 - 0x3fdef21b8fafd3b5, 0xbfec02b2cef1e641, // 0.48353, -0.87533 - 0x3fdedc1952ef78d5, 0xbfec08c426725549, // 0.48218, -0.87607 - 0x3fdec61253e3c61b, 0xbfec0ed12b3372e9, // 0.48084, -0.87681 - 0x3fdeb00695f25620, 0xbfec14d9dc465e58, // 0.47949, -0.87755 - 0x3fde99f61c817eda, 0xbfec1ade38bce19b, // 0.47815, -0.87828 - 0x3fde83e0eaf85113, 0xbfec20de3fa971b0, // 0.4768, -0.87901 - 0x3fde6dc704be97e2, 0xbfec26d9f01f2eaf, // 0.47545, -0.87974 - 0x3fde57a86d3cd824, 0xbfec2cd14931e3f1, // 0.4741, -0.88047 - 0x3fde418527dc4ffa, 0xbfec32c449f60831, // 0.47275, -0.8812 - 0x3fde2b5d3806f63b, 0xbfec38b2f180bdb1, // 0.4714, -0.88192 - 0x3fde1530a12779f4, 0xbfec3e9d3ee7d262, // 0.47004, -0.88264 - 0x3fddfeff66a941de, 0xbfec44833141c004, // 0.46869, -0.88336 - 0x3fdde8c98bf86bd6, 0xbfec4a64c7a5ac4c, // 0.46733, -0.88408 - 0x3fddd28f1481cc58, 0xbfec5042012b6907, // 0.46598, -0.8848 - 0x3fddbc5003b2edf8, 0xbfec561adceb743e, // 0.46462, -0.88551 - 0x3fdda60c5cfa10d8, 0xbfec5bef59fef85a, // 0.46326, -0.88622 - 0x3fdd8fc423c62a25, 0xbfec61bf777fcc48, // 0.4619, -0.88693 - 0x3fdd79775b86e389, 0xbfec678b3488739b, // 0.46054, -0.88764 - 0x3fdd632607ac9aa9, 0xbfec6d5290341eb2, // 0.45918, -0.88835 - 0x3fdd4cd02ba8609c, 0xbfec7315899eaad7, // 0.45781, -0.88905 - 0x3fdd3675caebf962, 0xbfec78d41fe4a267, // 0.45645, -0.88975 - 0x3fdd2016e8e9db5b, 0xbfec7e8e52233cf3, // 0.45508, -0.89045 - 0x3fdd09b389152ec1, 0xbfec84441f785f61, // 0.45372, -0.89115 - 0x3fdcf34baee1cd21, 0xbfec89f587029c13, // 0.45235, -0.89184 - 0x3fdcdcdf5dc440ce, 0xbfec8fa287e13305, // 0.45098, -0.89253 - 0x3fdcc66e9931c45d, 0xbfec954b213411f5, // 0.44961, -0.89322 - 0x3fdcaff964a0421d, 0xbfec9aef521bd480, // 0.44824, -0.89391 - 0x3fdc997fc3865388, 0xbfeca08f19b9c449, // 0.44687, -0.8946 - 0x3fdc8301b95b40c2, 0xbfeca62a772fd919, // 0.4455, -0.89528 - 0x3fdc6c7f4997000a, 0xbfecabc169a0b901, // 0.44412, -0.89597 - 0x3fdc55f877b23537, 0xbfecb153f02fb87d, // 0.44275, -0.89665 - 0x3fdc3f6d47263129, 0xbfecb6e20a00da99, // 0.44137, -0.89732 - 0x3fdc28ddbb6cf145, 0xbfecbc6bb638d10b, // 0.43999, -0.898 - 0x3fdc1249d8011ee7, 0xbfecc1f0f3fcfc5c, // 0.43862, -0.89867 - 0x3fdbfbb1a05e0edc, 0xbfecc771c2736c09, // 0.43724, -0.89935 - 0x3fdbe51517ffc0d9, 0xbfecccee20c2de9f, // 0.43586, -0.90002 - 0x3fdbce744262deee, 0xbfecd2660e12c1e6, // 0.43448, -0.90068 - 0x3fdbb7cf2304bd01, 0xbfecd7d9898b32f6, // 0.43309, -0.90135 - 0x3fdba125bd63583e, 0xbfecdd489254fe65, // 0.43171, -0.90201 - 0x3fdb8a7814fd5693, 0xbfece2b32799a060, // 0.43033, -0.90267 - 0x3fdb73c62d520624, 0xbfece819488344ce, // 0.42894, -0.90333 - 0x3fdb5d1009e15cc0, 0xbfeced7af43cc773, // 0.42756, -0.90399 - 0x3fdb4655ae2bf757, 0xbfecf2d829f1b40e, // 0.42617, -0.90464 - 0x3fdb2f971db31972, 0xbfecf830e8ce467b, // 0.42478, -0.9053 - 0x3fdb18d45bf8aca6, 0xbfecfd852fff6ad4, // 0.42339, -0.90595 - 0x3fdb020d6c7f4009, 0xbfed02d4feb2bd92, // 0.422, -0.9066 - 0x3fdaeb4252ca07ab, 0xbfed082054168bac, // 0.42061, -0.90724 - 0x3fdad473125cdc08, 0xbfed0d672f59d2b9, // 0.41922, -0.90789 - 0x3fdabd9faebc3980, 0xbfed12a98fac410c, // 0.41782, -0.90853 - 0x3fdaa6c82b6d3fc9, 0xbfed17e7743e35dc, // 0.41643, -0.90917 - 0x3fda8fec8bf5b166, 0xbfed1d20dc40c15c, // 0.41503, -0.90981 - 0x3fda790cd3dbf31a, 0xbfed2255c6e5a4e1, // 0.41364, -0.91044 - 0x3fda622906a70b63, 0xbfed2786335f52fc, // 0.41224, -0.91107 - 0x3fda4b4127dea1e4, 0xbfed2cb220e0ef9f, // 0.41084, -0.91171 - 0x3fda34553b0afee5, 0xbfed31d98e9e503a, // 0.40944, -0.91234 - 0x3fda1d6543b50ac0, 0xbfed36fc7bcbfbdc, // 0.40804, -0.91296 - 0x3fda067145664d57, 0xbfed3c1ae79f2b4e, // 0.40664, -0.91359 - 0x3fd9ef7943a8ed8a, 0xbfed4134d14dc93a, // 0.40524, -0.91421 - 0x3fd9d87d4207b0ab, 0xbfed464a380e7242, // 0.40384, -0.91483 - 0x3fd9c17d440df9f2, 0xbfed4b5b1b187524, // 0.40243, -0.91545 - 0x3fd9aa794d47c9ee, 0xbfed506779a3d2d9, // 0.40103, -0.91606 - 0x3fd993716141bdfe, 0xbfed556f52e93eb1, // 0.39962, -0.91668 - 0x3fd97c6583890fc2, 0xbfed5a72a6221e73, // 0.39822, -0.91729 - 0x3fd96555b7ab948f, 0xbfed5f7172888a7f, // 0.39681, -0.9179 - 0x3fd94e420137bce3, 0xbfed646bb7574de5, // 0.3954, -0.91851 - 0x3fd9372a63bc93d7, 0xbfed696173c9e68b, // 0.39399, -0.91911 - 0x3fd9200ee2c9be97, 0xbfed6e52a71c8547, // 0.39258, -0.91972 - 0x3fd908ef81ef7bd1, 0xbfed733f508c0dff, // 0.39117, -0.92032 - 0x3fd8f1cc44bea329, 0xbfed78276f5617c6, // 0.38976, -0.92092 - 0x3fd8daa52ec8a4af, 0xbfed7d0b02b8ecf9, // 0.38835, -0.92151 - 0x3fd8c37a439f884f, 0xbfed81ea09f38b63, // 0.38693, -0.92211 - 0x3fd8ac4b86d5ed44, 0xbfed86c48445a450, // 0.38552, -0.9227 - 0x3fd89518fbff098e, 0xbfed8b9a70ef9cb4, // 0.3841, -0.92329 - 0x3fd87de2a6aea963, 0xbfed906bcf328d46, // 0.38268, -0.92388 - 0x3fd866a88a792ea0, 0xbfed95389e50429b, // 0.38127, -0.92447 - 0x3fd84f6aaaf3903f, 0xbfed9a00dd8b3d46, // 0.37985, -0.92505 - 0x3fd838290bb359c8, 0xbfed9ec48c26b1f3, // 0.37843, -0.92563 - 0x3fd820e3b04eaac4, 0xbfeda383a9668988, // 0.37701, -0.92621 - 0x3fd8099a9c5c362d, 0xbfeda83e348f613b, // 0.37559, -0.92679 - 0x3fd7f24dd37341e3, 0xbfedacf42ce68ab9, // 0.37416, -0.92736 - 0x3fd7dafd592ba621, 0xbfedb1a591b20c38, // 0.37274, -0.92794 - 0x3fd7c3a9311dcce7, 0xbfedb6526238a09b, // 0.37132, -0.92851 - 0x3fd7ac515ee2b172, 0xbfedbafa9dc1b78d, // 0.36989, -0.92907 - 0x3fd794f5e613dfae, 0xbfedbf9e4395759a, // 0.36847, -0.92964 - 0x3fd77d96ca4b73a6, 0xbfedc43d52fcb453, // 0.36704, -0.93021 - 0x3fd766340f2418f6, 0xbfedc8d7cb410260, // 0.36561, -0.93077 - 0x3fd74ecdb8390a3e, 0xbfedcd6dabaca3a5, // 0.36418, -0.93133 - 0x3fd73763c9261092, 0xbfedd1fef38a915a, // 0.36276, -0.93188 - 0x3fd71ff6458782ec, 0xbfedd68ba2267a25, // 0.36133, -0.93244 - 0x3fd7088530fa459e, 0xbfeddb13b6ccc23d, // 0.3599, -0.93299 - 0x3fd6f1108f1bc9c5, 0xbfeddf9730ca837b, // 0.35846, -0.93354 - 0x3fd6d998638a0cb5, 0xbfede4160f6d8d81, // 0.35703, -0.93409 - 0x3fd6c21cb1e39771, 0xbfede890520465ce, // 0.3556, -0.93464 - 0x3fd6aa9d7dc77e16, 0xbfeded05f7de47da, // 0.35416, -0.93518 - 0x3fd6931acad55f51, 0xbfedf177004b2534, // 0.35273, -0.93573 - 0x3fd67b949cad63ca, 0xbfedf5e36a9ba59c, // 0.35129, -0.93627 - 0x3fd6640af6f03d9e, 0xbfedfa4b3621271d, // 0.34986, -0.9368 - 0x3fd64c7ddd3f27c6, 0xbfedfeae622dbe2b, // 0.34842, -0.93734 - 0x3fd634ed533be58e, 0xbfee030cee1435b8, // 0.34698, -0.93787 - 0x3fd61d595c88c203, 0xbfee0766d9280f54, // 0.34554, -0.9384 - 0x3fd605c1fcc88f63, 0xbfee0bbc22bd8349, // 0.3441, -0.93893 - 0x3fd5ee27379ea693, 0xbfee100cca2980ac, // 0.34266, -0.93946 - 0x3fd5d68910aee686, 0xbfee1458cec1ad83, // 0.34122, -0.93998 - 0x3fd5bee78b9db3b6, 0xbfee18a02fdc66d9, // 0.33978, -0.94051 - 0x3fd5a742ac0ff78d, 0xbfee1ce2ecd0c0d8, // 0.33833, -0.94103 - 0x3fd58f9a75ab1fdd, 0xbfee212104f686e5, // 0.33689, -0.94154 - 0x3fd577eeec151e47, 0xbfee255a77a63bb8, // 0.33545, -0.94206 - 0x3fd5604012f467b4, 0xbfee298f4439197a, // 0.334, -0.94257 - 0x3fd5488dedeff3be, 0xbfee2dbf6a0911d9, // 0.33255, -0.94308 - 0x3fd530d880af3c24, 0xbfee31eae870ce25, // 0.33111, -0.94359 - 0x3fd5191fceda3c35, 0xbfee3611becbaf69, // 0.32966, -0.9441 - 0x3fd50163dc197047, 0xbfee3a33ec75ce85, // 0.32821, -0.9446 - 0x3fd4e9a4ac15d520, 0xbfee3e5170cbfc46, // 0.32676, -0.94511 - 0x3fd4d1e24278e76a, 0xbfee426a4b2bc17e, // 0.32531, -0.94561 - 0x3fd4ba1ca2eca31c, 0xbfee467e7af35f23, // 0.32386, -0.94611 - 0x3fd4a253d11b82f3, 0xbfee4a8dff81ce5e, // 0.32241, -0.9466 - 0x3fd48a87d0b07fd7, 0xbfee4e98d836c0af, // 0.32096, -0.94709 - 0x3fd472b8a5571054, 0xbfee529f04729ffc, // 0.3195, -0.94759 - 0x3fd45ae652bb2800, 0xbfee56a083968eb1, // 0.31805, -0.94807 - 0x3fd44310dc8936f0, 0xbfee5a9d550467d3, // 0.31659, -0.94856 - 0x3fd42b38466e2928, 0xbfee5e95781ebf1c, // 0.31514, -0.94905 - 0x3fd4135c94176602, 0xbfee6288ec48e112, // 0.31368, -0.94953 - 0x3fd3fb7dc932cfa4, 0xbfee6677b0e6d31e, // 0.31222, -0.95001 - 0x3fd3e39be96ec271, 0xbfee6a61c55d53a7, // 0.31077, -0.95049 - 0x3fd3cbb6f87a146e, 0xbfee6e472911da27, // 0.30931, -0.95096 - 0x3fd3b3cefa0414b7, 0xbfee7227db6a9744, // 0.30785, -0.95144 - 0x3fd39be3f1bc8aef, 0xbfee7603dbce74e9, // 0.30639, -0.95191 - 0x3fd383f5e353b6aa, 0xbfee79db29a5165a, // 0.30493, -0.95238 - 0x3fd36c04d27a4edf, 0xbfee7dadc456d850, // 0.30347, -0.95284 - 0x3fd35410c2e18152, 0xbfee817bab4cd10d, // 0.30201, -0.95331 - 0x3fd33c19b83af207, 0xbfee8544ddf0d075, // 0.30054, -0.95377 - 0x3fd3241fb638baaf, 0xbfee89095bad6025, // 0.29908, -0.95423 - 0x3fd30c22c08d6a13, 0xbfee8cc923edc388, // 0.29762, -0.95469 - 0x3fd2f422daec0386, 0xbfee9084361df7f3, // 0.29615, -0.95514 - 0x3fd2dc200907fe51, 0xbfee943a91aab4b4, // 0.29469, -0.95559 - 0x3fd2c41a4e954520, 0xbfee97ec36016b30, // 0.29322, -0.95605 - 0x3fd2ac11af483572, 0xbfee9b99229046f8, // 0.29175, -0.95649 - 0x3fd294062ed59f05, 0xbfee9f4156c62dda, // 0.29028, -0.95694 - 0x3fd27bf7d0f2c346, 0xbfeea2e4d212c000, // 0.28882, -0.95738 - 0x3fd263e6995554ba, 0xbfeea68393e65800, // 0.28735, -0.95783 - 0x3fd24bd28bb37672, 0xbfeeaa1d9bb20af3, // 0.28588, -0.95827 - 0x3fd233bbabc3bb72, 0xbfeeadb2e8e7a88e, // 0.28441, -0.9587 - 0x3fd21ba1fd3d2623, 0xbfeeb1437af9bb34, // 0.28294, -0.95914 - 0x3fd2038583d727bd, 0xbfeeb4cf515b8811, // 0.28146, -0.95957 - 0x3fd1eb6643499fbb, 0xbfeeb8566b810f2a, // 0.27999, -0.96 - 0x3fd1d3443f4cdb3d, 0xbfeebbd8c8df0b74, // 0.27852, -0.96043 - 0x3fd1bb1f7b999480, 0xbfeebf5668eaf2ef, // 0.27705, -0.96086 - 0x3fd1a2f7fbe8f243, 0xbfeec2cf4b1af6b2, // 0.27557, -0.96128 - 0x3fd18acdc3f4873a, 0xbfeec6436ee60309, // 0.2741, -0.9617 - 0x3fd172a0d7765177, 0xbfeec9b2d3c3bf84, // 0.27262, -0.96212 - 0x3fd15a713a28b9d9, 0xbfeecd1d792c8f10, // 0.27115, -0.96254 - 0x3fd1423eefc69378, 0xbfeed0835e999009, // 0.26967, -0.96295 - 0x3fd12a09fc0b1b12, 0xbfeed3e483849c51, // 0.26819, -0.96337 - 0x3fd111d262b1f677, 0xbfeed740e7684963, // 0.26671, -0.96378 - 0x3fd0f998277733f7, 0xbfeeda9889bfe86a, // 0.26523, -0.96418 - 0x3fd0e15b4e1749cd, 0xbfeeddeb6a078651, // 0.26375, -0.96459 - 0x3fd0c91bda4f158d, 0xbfeee13987bbebdc, // 0.26227, -0.96499 - 0x3fd0b0d9cfdbdb90, 0xbfeee482e25a9dbc, // 0.26079, -0.96539 - 0x3fd09895327b465e, 0xbfeee7c77961dc9e, // 0.25931, -0.96579 - 0x3fd0804e05eb661e, 0xbfeeeb074c50a544, // 0.25783, -0.96619 - 0x3fd068044deab002, 0xbfeeee425aa6b09a, // 0.25635, -0.96658 - 0x3fd04fb80e37fdae, 0xbfeef178a3e473c2, // 0.25487, -0.96698 - 0x3fd037694a928cac, 0xbfeef4aa278b2032, // 0.25338, -0.96737 - 0x3fd01f1806b9fdd2, 0xbfeef7d6e51ca3c0, // 0.2519, -0.96775 - 0x3fd006c4466e54af, 0xbfeefafedc1ba8b7, // 0.25041, -0.96814 - 0x3fcfdcdc1adfedf8, 0xbfeefe220c0b95ec, // 0.24893, -0.96852 - 0x3fcfac2abeff57ff, 0xbfef014074708ed3, // 0.24744, -0.9689 - 0x3fcf7b7480bd3801, 0xbfef045a14cf738c, // 0.24596, -0.96928 - 0x3fcf4ab9679c9f5c, 0xbfef076eecade0fa, // 0.24447, -0.96966 - 0x3fcf19f97b215f1a, 0xbfef0a7efb9230d7, // 0.24298, -0.97003 - 0x3fcee934c2d006c7, 0xbfef0d8a410379c5, // 0.24149, -0.9704 - 0x3fceb86b462de348, 0xbfef1090bc898f5f, // 0.24, -0.97077 - 0x3fce879d0cc0fdaf, 0xbfef13926dad024e, // 0.23851, -0.97114 - 0x3fce56ca1e101a1b, 0xbfef168f53f7205d, // 0.23702, -0.9715 - 0x3fce25f281a2b684, 0xbfef19876ef1f486, // 0.23553, -0.97187 - 0x3fcdf5163f01099a, 0xbfef1c7abe284708, // 0.23404, -0.97223 - 0x3fcdc4355db40195, 0xbfef1f6941259d7a, // 0.23255, -0.97258 - 0x3fcd934fe5454311, 0xbfef2252f7763ada, // 0.23106, -0.97294 - 0x3fcd6265dd3f27e3, 0xbfef2537e0a71f9f, // 0.22957, -0.97329 - 0x3fcd31774d2cbdee, 0xbfef2817fc4609ce, // 0.22807, -0.97364 - 0x3fcd00843c99c5f9, 0xbfef2af349e17507, // 0.22658, -0.97399 - 0x3fcccf8cb312b286, 0xbfef2dc9c9089a9d, // 0.22508, -0.97434 - 0x3fcc9e90b824a6a9, 0xbfef309b794b719f, // 0.22359, -0.97468 - 0x3fcc6d90535d74dc, 0xbfef33685a3aaef0, // 0.22209, -0.97503 - 0x3fcc3c8b8c4b9dd7, 0xbfef36306b67c556, // 0.2206, -0.97536 - 0x3fcc0b826a7e4f63, 0xbfef38f3ac64e589, // 0.2191, -0.9757 - 0x3fcbda74f5856330, 0xbfef3bb21cc4fe47, // 0.2176, -0.97604 - 0x3fcba96334f15dad, 0xbfef3e6bbc1bbc65, // 0.21611, -0.97637 - 0x3fcb784d30536cda, 0xbfef412089fd8adc, // 0.21461, -0.9767 - 0x3fcb4732ef3d6722, 0xbfef43d085ff92dd, // 0.21311, -0.97703 - 0x3fcb16147941ca2a, 0xbfef467bafb7bbe0, // 0.21161, -0.97735 - 0x3fcae4f1d5f3b9ab, 0xbfef492206bcabb4, // 0.21011, -0.97768 - 0x3fcab3cb0ce6fe44, 0xbfef4bc38aa5c694, // 0.20861, -0.978 - 0x3fca82a025b00451, 0xbfef4e603b0b2f2d, // 0.20711, -0.97832 - 0x3fca517127e3dabc, 0xbfef50f81785c6b9, // 0.20561, -0.97863 - 0x3fca203e1b1831da, 0xbfef538b1faf2d07, // 0.20411, -0.97895 - 0x3fc9ef0706e35a35, 0xbfef56195321c090, // 0.20261, -0.97926 - 0x3fc9bdcbf2dc4366, 0xbfef58a2b1789e84, // 0.2011, -0.97957 - 0x3fc98c8ce69a7aec, 0xbfef5b273a4fa2d9, // 0.1996, -0.97988 - 0x3fc95b49e9b62af9, 0xbfef5da6ed43685d, // 0.1981, -0.98018 - 0x3fc92a0303c8194f, 0xbfef6021c9f148c2, // 0.19659, -0.98048 - 0x3fc8f8b83c69a60a, 0xbfef6297cff75cb0, // 0.19509, -0.98079 - 0x3fc8c7699b34ca7e, 0xbfef6508fef47bd5, // 0.19359, -0.98108 - 0x3fc8961727c41804, 0xbfef677556883cee, // 0.19208, -0.98138 - 0x3fc864c0e9b2b6cf, 0xbfef69dcd652f5de, // 0.19057, -0.98167 - 0x3fc83366e89c64c5, 0xbfef6c3f7df5bbb7, // 0.18907, -0.98196 - 0x3fc802092c1d744b, 0xbfef6e9d4d1262ca, // 0.18756, -0.98225 - 0x3fc7d0a7bbd2cb1b, 0xbfef70f6434b7eb7, // 0.18606, -0.98254 - 0x3fc79f429f59e11d, 0xbfef734a60446279, // 0.18455, -0.98282 - 0x3fc76dd9de50bf31, 0xbfef7599a3a12077, // 0.18304, -0.98311 - 0x3fc73c6d8055fe0a, 0xbfef77e40d068a90, // 0.18153, -0.98339 - 0x3fc70afd8d08c4ff, 0xbfef7a299c1a322a, // 0.18002, -0.98366 - 0x3fc6d98a0c08c8da, 0xbfef7c6a50826840, // 0.17851, -0.98394 - 0x3fc6a81304f64ab2, 0xbfef7ea629e63d6e, // 0.177, -0.98421 - 0x3fc676987f7216b8, 0xbfef80dd27ed8204, // 0.17549, -0.98448 - 0x3fc6451a831d830d, 0xbfef830f4a40c60c, // 0.17398, -0.98475 - 0x3fc61399179a6e94, 0xbfef853c9089595e, // 0.17247, -0.98501 - 0x3fc5e214448b3fc6, 0xbfef8764fa714ba9, // 0.17096, -0.98528 - 0x3fc5b08c1192e381, 0xbfef898887a36c84, // 0.16945, -0.98554 - 0x3fc57f008654cbde, 0xbfef8ba737cb4b78, // 0.16794, -0.9858 - 0x3fc54d71aa74ef02, 0xbfef8dc10a95380d, // 0.16643, -0.98605 - 0x3fc51bdf8597c5f2, 0xbfef8fd5ffae41db, // 0.16491, -0.98631 - 0x3fc4ea4a1f624b61, 0xbfef91e616c43891, // 0.1634, -0.98656 - 0x3fc4b8b17f79fa88, 0xbfef93f14f85ac08, // 0.16189, -0.98681 - 0x3fc48715ad84cdf5, 0xbfef95f7a9a1ec47, // 0.16037, -0.98706 - 0x3fc45576b1293e5a, 0xbfef97f924c9099b, // 0.15886, -0.9873 - 0x3fc423d4920e4166, 0xbfef99f5c0abd496, // 0.15734, -0.98754 - 0x3fc3f22f57db4893, 0xbfef9bed7cfbde29, // 0.15583, -0.98778 - 0x3fc3c0870a383ff6, 0xbfef9de0596b77a3, // 0.15431, -0.98802 - 0x3fc38edbb0cd8d14, 0xbfef9fce55adb2c8, // 0.1528, -0.98826 - 0x3fc35d2d53440db2, 0xbfefa1b7717661d5, // 0.15128, -0.98849 - 0x3fc32b7bf94516a7, 0xbfefa39bac7a1791, // 0.14976, -0.98872 - 0x3fc2f9c7aa7a72af, 0xbfefa57b066e2754, // 0.14825, -0.98895 - 0x3fc2c8106e8e613a, 0xbfefa7557f08a517, // 0.14673, -0.98918 - 0x3fc296564d2b953e, 0xbfefa92b1600657c, // 0.14521, -0.9894 - 0x3fc264994dfd340a, 0xbfefaafbcb0cfddc, // 0.1437, -0.98962 - 0x3fc232d978aed413, 0xbfefacc79de6c44f, // 0.14218, -0.98984 - 0x3fc20116d4ec7bce, 0xbfefae8e8e46cfbb, // 0.14066, -0.99006 - 0x3fc1cf516a62a077, 0xbfefb0509be6f7db, // 0.13914, -0.99027 - 0x3fc19d8940be24e7, 0xbfefb20dc681d54d, // 0.13762, -0.99049 - 0x3fc16bbe5fac5865, 0xbfefb3c60dd2c199, // 0.1361, -0.9907 - 0x3fc139f0cedaf576, 0xbfefb5797195d741, // 0.13458, -0.9909 - 0x3fc1082095f820b0, 0xbfefb727f187f1c7, // 0.13306, -0.99111 - 0x3fc0d64dbcb26786, 0xbfefb8d18d66adb7, // 0.13154, -0.99131 - 0x3fc0a4784ab8bf1d, 0xbfefba7644f068b5, // 0.13002, -0.99151 - 0x3fc072a047ba831d, 0xbfefbc1617e44186, // 0.1285, -0.99171 - 0x3fc040c5bb67747e, 0xbfefbdb106021816, // 0.12698, -0.99191 - 0x3fc00ee8ad6fb85b, 0xbfefbf470f0a8d88, // 0.12545, -0.9921 - 0x3fbfba124b07ad85, 0xbfefc0d832bf043a, // 0.12393, -0.99229 - 0x3fbf564e56a9730e, 0xbfefc26470e19fd3, // 0.12241, -0.99248 - 0x3fbef2858d27561b, 0xbfefc3ebc935454c, // 0.12089, -0.99267 - 0x3fbe8eb7fde4aa3e, 0xbfefc56e3b7d9af6, // 0.11937, -0.99285 - 0x3fbe2ae5b8457f77, 0xbfefc6ebc77f0887, // 0.11784, -0.99303 - 0x3fbdc70ecbae9fc8, 0xbfefc8646cfeb721, // 0.11632, -0.99321 - 0x3fbd633347858ce4, 0xbfefc9d82bc2915e, // 0.11479, -0.99339 - 0x3fbcff533b307dc1, 0xbfefcb4703914354, // 0.11327, -0.99356 - 0x3fbc9b6eb6165c42, 0xbfefccb0f4323aa3, // 0.11175, -0.99374 - 0x3fbc3785c79ec2d5, 0xbfefce15fd6da67b, // 0.11022, -0.99391 - 0x3fbbd3987f31fa0e, 0xbfefcf761f0c77a3, // 0.1087, -0.99407 - 0x3fbb6fa6ec38f64c, 0xbfefd0d158d86087, // 0.10717, -0.99424 - 0x3fbb0bb11e1d5559, 0xbfefd227aa9bd53b, // 0.10565, -0.9944 - 0x3fbaa7b724495c04, 0xbfefd37914220b84, // 0.10412, -0.99456 - 0x3fba43b90e27f3c4, 0xbfefd4c59536fae4, // 0.1026, -0.99472 - 0x3fb9dfb6eb24a85c, 0xbfefd60d2da75c9e, // 0.10107, -0.99488 - 0x3fb97bb0caaba56f, 0xbfefd74fdd40abbf, // 0.099544, -0.99503 - 0x3fb917a6bc29b42c, 0xbfefd88da3d12526, // 0.098017, -0.99518 - 0x3fb8b398cf0c38e0, 0xbfefd9c68127c78c, // 0.09649, -0.99533 - 0x3fb84f8712c130a0, 0xbfefdafa7514538c, // 0.094963, -0.99548 - 0x3fb7eb7196b72ee4, 0xbfefdc297f674ba9, // 0.093436, -0.99563 - 0x3fb787586a5d5b21, 0xbfefdd539ff1f456, // 0.091909, -0.99577 - 0x3fb7233b9d236e71, 0xbfefde78d68653fd, // 0.090381, -0.99591 - 0x3fb6bf1b3e79b129, 0xbfefdf9922f73307, // 0.088854, -0.99604 - 0x3fb65af75dd0f87b, 0xbfefe0b485181be3, // 0.087326, -0.99618 - 0x3fb5f6d00a9aa419, 0xbfefe1cafcbd5b09, // 0.085797, -0.99631 - 0x3fb592a554489bc8, 0xbfefe2dc89bbff08, // 0.084269, -0.99644 - 0x3fb52e774a4d4d0a, 0xbfefe3e92be9d886, // 0.08274, -0.99657 - 0x3fb4ca45fc1ba8b6, 0xbfefe4f0e31d7a4a, // 0.081211, -0.9967 - 0x3fb4661179272096, 0xbfefe5f3af2e3940, // 0.079682, -0.99682 - 0x3fb401d9d0e3a507, 0xbfefe6f18ff42c84, // 0.078153, -0.99694 - 0x3fb39d9f12c5a299, 0xbfefe7ea85482d60, // 0.076624, -0.99706 - 0x3fb339614e41ffa5, 0xbfefe8de8f03d75c, // 0.075094, -0.99718 - 0x3fb2d52092ce19f6, 0xbfefe9cdad01883a, // 0.073565, -0.99729 - 0x3fb270dcefdfc45b, 0xbfefeab7df1c6005, // 0.072035, -0.9974 - 0x3fb20c9674ed444c, 0xbfefeb9d2530410f, // 0.070505, -0.99751 - 0x3fb1a84d316d4f8a, 0xbfefec7d7f19cffc, // 0.068974, -0.99762 - 0x3fb1440134d709b2, 0xbfefed58ecb673c4, // 0.067444, -0.99772 - 0x3fb0dfb28ea201e6, 0xbfefee2f6de455ba, // 0.065913, -0.99783 - 0x3fb07b614e463064, 0xbfefef0102826191, // 0.064383, -0.99793 - 0x3fb0170d833bf421, 0xbfefefcdaa704562, // 0.062852, -0.99802 - 0x3faf656e79f820e0, 0xbfeff095658e71ad, // 0.061321, -0.99812 - 0x3fae9cbd15ff5527, 0xbfeff15833be1965, // 0.05979, -0.99821 - 0x3fadd406f9808ec8, 0xbfeff21614e131ed, // 0.058258, -0.9983 - 0x3fad0b4c436f91d0, 0xbfeff2cf08da7321, // 0.056727, -0.99839 - 0x3fac428d12c0d7e3, 0xbfeff3830f8d575c, // 0.055195, -0.99848 - 0x3fab79c986698b78, 0xbfeff43228de1b77, // 0.053664, -0.99856 - 0x3faab101bd5f8317, 0xbfeff4dc54b1bed3, // 0.052132, -0.99864 - 0x3fa9e835d6993c87, 0xbfeff58192ee0358, // 0.0506, -0.99872 - 0x3fa91f65f10dd814, 0xbfeff621e3796d7e, // 0.049068, -0.9988 - 0x3fa856922bb513c1, 0xbfeff6bd463b444d, // 0.047535, -0.99887 - 0x3fa78dbaa5874685, 0xbfeff753bb1b9164, // 0.046003, -0.99894 - 0x3fa6c4df7d7d5b84, 0xbfeff7e5420320f9, // 0.044471, -0.99901 - 0x3fa5fc00d290cd43, 0xbfeff871dadb81df, // 0.042938, -0.99908 - 0x3fa5331ec3bba0eb, 0xbfeff8f9858f058b, // 0.041406, -0.99914 - 0x3fa46a396ff86179, 0xbfeff97c4208c014, // 0.039873, -0.9992 - 0x3fa3a150f6421afc, 0xbfeff9fa10348837, // 0.03834, -0.99926 - 0x3fa2d865759455cd, 0xbfeffa72effef75d, // 0.036807, -0.99932 - 0x3fa20f770ceb11c6, 0xbfeffae6e1556998, // 0.035274, -0.99938 - 0x3fa14685db42c17e, 0xbfeffb55e425fdae, // 0.033741, -0.99943 - 0x3fa07d91ff984580, 0xbfeffbbff85f9515, // 0.032208, -0.99948 - 0x3f9f693731d1cf01, 0xbfeffc251df1d3f8, // 0.030675, -0.99953 - 0x3f9dd7458c64ab39, 0xbfeffc8554cd213a, // 0.029142, -0.99958 - 0x3f9c454f4ce53b1c, 0xbfeffce09ce2a679, // 0.027608, -0.99962 - 0x3f9ab354b1504fca, 0xbfeffd36f624500c, // 0.026075, -0.99966 - 0x3f992155f7a3667e, 0xbfeffd886084cd0d, // 0.024541, -0.9997 - 0x3f978f535ddc9f03, 0xbfeffdd4dbf78f52, // 0.023008, -0.99974 - 0x3f95fd4d21fab226, 0xbfeffe1c6870cb77, // 0.021474, -0.99977 - 0x3f946b4381fce81c, 0xbfeffe5f05e578db, // 0.01994, -0.9998 - 0x3f92d936bbe30efd, 0xbfeffe9cb44b51a1, // 0.018407, -0.99983 - 0x3f9147270dad7132, 0xbfeffed57398d2b7, // 0.016873, -0.99986 - 0x3f8f6a296ab997ca, 0xbfefff0943c53bd1, // 0.015339, -0.99988 - 0x3f8c45ffe1e48ad9, 0xbfefff3824c88f6f, // 0.013805, -0.9999 - 0x3f8921d1fcdec784, 0xbfefff62169b92db, // 0.012272, -0.99992 - 0x3f85fda037ac05e0, 0xbfefff871937ce2f, // 0.010738, -0.99994 - 0x3f82d96b0e509703, 0xbfefffa72c978c4f, //0.0092038, -0.99996 - 0x3f7f6a65f9a2a3c5, 0xbfefffc250b5daef, //0.0076698, -0.99997 - 0x3f7921f0fe670071, 0xbfefffd8858e8a92, //0.0061359, -0.99998 - 0x3f72d97822f996bc, 0xbfefffe9cb1e2e8d, //0.0046019, -0.99999 - 0x3f6921f8becca4ba, 0xbfeffff621621d02, // 0.003068, -1 - 0x3f5921faaee6472d, 0xbfeffffd88586ee6, // 0.001534, -1 -}; - -#endif - - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32) -/** - @par - Example code for Floating-point RFFT Twiddle factors Generation: - @par - 
TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).'
- @par - Real and Imag values are in interleaved fashion -*/ -const float32_t twiddleCoef_rfft_32[32] = { - 0.000000000f, 1.000000000f, - 0.195090322f, 0.980785280f, - 0.382683432f, 0.923879533f, - 0.555570233f, 0.831469612f, - 0.707106781f, 0.707106781f, - 0.831469612f, 0.555570233f, - 0.923879533f, 0.382683432f, - 0.980785280f, 0.195090322f, - 1.000000000f, 0.000000000f, - 0.980785280f, -0.195090322f, - 0.923879533f, -0.382683432f, - 0.831469612f, -0.555570233f, - 0.707106781f, -0.707106781f, - 0.555570233f, -0.831469612f, - 0.382683432f, -0.923879533f, - 0.195090322f, -0.980785280f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64) -const float32_t twiddleCoef_rfft_64[64] = { - 0.000000000000000f, 1.000000000000000f, - 0.098017140329561f, 0.995184726672197f, - 0.195090322016128f, 0.980785280403230f, - 0.290284677254462f, 0.956940335732209f, - 0.382683432365090f, 0.923879532511287f, - 0.471396736825998f, 0.881921264348355f, - 0.555570233019602f, 0.831469612302545f, - 0.634393284163645f, 0.773010453362737f, - 0.707106781186547f, 0.707106781186548f, - 0.773010453362737f, 0.634393284163645f, - 0.831469612302545f, 0.555570233019602f, - 0.881921264348355f, 0.471396736825998f, - 0.923879532511287f, 0.382683432365090f, - 0.956940335732209f, 0.290284677254462f, - 0.980785280403230f, 0.195090322016128f, - 0.995184726672197f, 0.098017140329561f, - 1.000000000000000f, 0.000000000000000f, - 0.995184726672197f, -0.098017140329561f, - 0.980785280403230f, -0.195090322016128f, - 0.956940335732209f, -0.290284677254462f, - 0.923879532511287f, -0.382683432365090f, - 0.881921264348355f, -0.471396736825998f, - 0.831469612302545f, -0.555570233019602f, - 0.773010453362737f, -0.634393284163645f, - 0.707106781186548f, -0.707106781186547f, - 0.634393284163645f, -0.773010453362737f, - 0.555570233019602f, -0.831469612302545f, - 0.471396736825998f, -0.881921264348355f, - 0.382683432365090f, -0.923879532511287f, - 0.290284677254462f, -0.956940335732209f, - 0.195090322016129f, -0.980785280403230f, - 0.098017140329561f, -0.995184726672197f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128) -const float32_t twiddleCoef_rfft_128[128] = { - 0.000000000f, 1.000000000f, - 0.049067674f, 0.998795456f, - 0.098017140f, 0.995184727f, - 0.146730474f, 0.989176510f, - 0.195090322f, 0.980785280f, - 0.242980180f, 0.970031253f, - 0.290284677f, 0.956940336f, - 0.336889853f, 0.941544065f, - 0.382683432f, 0.923879533f, - 0.427555093f, 0.903989293f, - 0.471396737f, 0.881921264f, - 0.514102744f, 0.857728610f, - 0.555570233f, 0.831469612f, - 0.595699304f, 0.803207531f, - 0.634393284f, 0.773010453f, - 0.671558955f, 0.740951125f, - 0.707106781f, 0.707106781f, - 0.740951125f, 0.671558955f, - 0.773010453f, 0.634393284f, - 0.803207531f, 0.595699304f, - 0.831469612f, 0.555570233f, - 0.857728610f, 0.514102744f, - 0.881921264f, 0.471396737f, - 0.903989293f, 0.427555093f, - 0.923879533f, 0.382683432f, - 0.941544065f, 0.336889853f, - 0.956940336f, 0.290284677f, - 0.970031253f, 0.242980180f, - 0.980785280f, 0.195090322f, - 0.989176510f, 0.146730474f, - 0.995184727f, 0.098017140f, - 0.998795456f, 0.049067674f, - 1.000000000f, 0.000000000f, - 0.998795456f, -0.049067674f, - 0.995184727f, -0.098017140f, - 0.989176510f, -0.146730474f, - 0.980785280f, -0.195090322f, - 0.970031253f, -0.242980180f, - 0.956940336f, -0.290284677f, - 0.941544065f, -0.336889853f, - 0.923879533f, -0.382683432f, - 0.903989293f, -0.427555093f, - 0.881921264f, -0.471396737f, - 0.857728610f, -0.514102744f, - 0.831469612f, -0.555570233f, - 0.803207531f, -0.595699304f, - 0.773010453f, -0.634393284f, - 0.740951125f, -0.671558955f, - 0.707106781f, -0.707106781f, - 0.671558955f, -0.740951125f, - 0.634393284f, -0.773010453f, - 0.595699304f, -0.803207531f, - 0.555570233f, -0.831469612f, - 0.514102744f, -0.857728610f, - 0.471396737f, -0.881921264f, - 0.427555093f, -0.903989293f, - 0.382683432f, -0.923879533f, - 0.336889853f, -0.941544065f, - 0.290284677f, -0.956940336f, - 0.242980180f, -0.970031253f, - 0.195090322f, -0.980785280f, - 0.146730474f, -0.989176510f, - 0.098017140f, -0.995184727f, - 0.049067674f, -0.998795456f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256) -const float32_t twiddleCoef_rfft_256[256] = { - 0.000000000f, 1.000000000f, - 0.024541229f, 0.999698819f, - 0.049067674f, 0.998795456f, - 0.073564564f, 0.997290457f, - 0.098017140f, 0.995184727f, - 0.122410675f, 0.992479535f, - 0.146730474f, 0.989176510f, - 0.170961889f, 0.985277642f, - 0.195090322f, 0.980785280f, - 0.219101240f, 0.975702130f, - 0.242980180f, 0.970031253f, - 0.266712757f, 0.963776066f, - 0.290284677f, 0.956940336f, - 0.313681740f, 0.949528181f, - 0.336889853f, 0.941544065f, - 0.359895037f, 0.932992799f, - 0.382683432f, 0.923879533f, - 0.405241314f, 0.914209756f, - 0.427555093f, 0.903989293f, - 0.449611330f, 0.893224301f, - 0.471396737f, 0.881921264f, - 0.492898192f, 0.870086991f, - 0.514102744f, 0.857728610f, - 0.534997620f, 0.844853565f, - 0.555570233f, 0.831469612f, - 0.575808191f, 0.817584813f, - 0.595699304f, 0.803207531f, - 0.615231591f, 0.788346428f, - 0.634393284f, 0.773010453f, - 0.653172843f, 0.757208847f, - 0.671558955f, 0.740951125f, - 0.689540545f, 0.724247083f, - 0.707106781f, 0.707106781f, - 0.724247083f, 0.689540545f, - 0.740951125f, 0.671558955f, - 0.757208847f, 0.653172843f, - 0.773010453f, 0.634393284f, - 0.788346428f, 0.615231591f, - 0.803207531f, 0.595699304f, - 0.817584813f, 0.575808191f, - 0.831469612f, 0.555570233f, - 0.844853565f, 0.534997620f, - 0.857728610f, 0.514102744f, - 0.870086991f, 0.492898192f, - 0.881921264f, 0.471396737f, - 0.893224301f, 0.449611330f, - 0.903989293f, 0.427555093f, - 0.914209756f, 0.405241314f, - 0.923879533f, 0.382683432f, - 0.932992799f, 0.359895037f, - 0.941544065f, 0.336889853f, - 0.949528181f, 0.313681740f, - 0.956940336f, 0.290284677f, - 0.963776066f, 0.266712757f, - 0.970031253f, 0.242980180f, - 0.975702130f, 0.219101240f, - 0.980785280f, 0.195090322f, - 0.985277642f, 0.170961889f, - 0.989176510f, 0.146730474f, - 0.992479535f, 0.122410675f, - 0.995184727f, 0.098017140f, - 0.997290457f, 0.073564564f, - 0.998795456f, 0.049067674f, - 0.999698819f, 0.024541229f, - 1.000000000f, 0.000000000f, - 0.999698819f, -0.024541229f, - 0.998795456f, -0.049067674f, - 0.997290457f, -0.073564564f, - 0.995184727f, -0.098017140f, - 0.992479535f, -0.122410675f, - 0.989176510f, -0.146730474f, - 0.985277642f, -0.170961889f, - 0.980785280f, -0.195090322f, - 0.975702130f, -0.219101240f, - 0.970031253f, -0.242980180f, - 0.963776066f, -0.266712757f, - 0.956940336f, -0.290284677f, - 0.949528181f, -0.313681740f, - 0.941544065f, -0.336889853f, - 0.932992799f, -0.359895037f, - 0.923879533f, -0.382683432f, - 0.914209756f, -0.405241314f, - 0.903989293f, -0.427555093f, - 0.893224301f, -0.449611330f, - 0.881921264f, -0.471396737f, - 0.870086991f, -0.492898192f, - 0.857728610f, -0.514102744f, - 0.844853565f, -0.534997620f, - 0.831469612f, -0.555570233f, - 0.817584813f, -0.575808191f, - 0.803207531f, -0.595699304f, - 0.788346428f, -0.615231591f, - 0.773010453f, -0.634393284f, - 0.757208847f, -0.653172843f, - 0.740951125f, -0.671558955f, - 0.724247083f, -0.689540545f, - 0.707106781f, -0.707106781f, - 0.689540545f, -0.724247083f, - 0.671558955f, -0.740951125f, - 0.653172843f, -0.757208847f, - 0.634393284f, -0.773010453f, - 0.615231591f, -0.788346428f, - 0.595699304f, -0.803207531f, - 0.575808191f, -0.817584813f, - 0.555570233f, -0.831469612f, - 0.534997620f, -0.844853565f, - 0.514102744f, -0.857728610f, - 0.492898192f, -0.870086991f, - 0.471396737f, -0.881921264f, - 0.449611330f, -0.893224301f, - 0.427555093f, -0.903989293f, - 0.405241314f, -0.914209756f, - 0.382683432f, -0.923879533f, - 0.359895037f, -0.932992799f, - 0.336889853f, -0.941544065f, - 0.313681740f, -0.949528181f, - 0.290284677f, -0.956940336f, - 0.266712757f, -0.963776066f, - 0.242980180f, -0.970031253f, - 0.219101240f, -0.975702130f, - 0.195090322f, -0.980785280f, - 0.170961889f, -0.985277642f, - 0.146730474f, -0.989176510f, - 0.122410675f, -0.992479535f, - 0.098017140f, -0.995184727f, - 0.073564564f, -0.997290457f, - 0.049067674f, -0.998795456f, - 0.024541229f, -0.999698819f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512) -const float32_t twiddleCoef_rfft_512[512] = { - 0.000000000f, 1.000000000f, - 0.012271538f, 0.999924702f, - 0.024541229f, 0.999698819f, - 0.036807223f, 0.999322385f, - 0.049067674f, 0.998795456f, - 0.061320736f, 0.998118113f, - 0.073564564f, 0.997290457f, - 0.085797312f, 0.996312612f, - 0.098017140f, 0.995184727f, - 0.110222207f, 0.993906970f, - 0.122410675f, 0.992479535f, - 0.134580709f, 0.990902635f, - 0.146730474f, 0.989176510f, - 0.158858143f, 0.987301418f, - 0.170961889f, 0.985277642f, - 0.183039888f, 0.983105487f, - 0.195090322f, 0.980785280f, - 0.207111376f, 0.978317371f, - 0.219101240f, 0.975702130f, - 0.231058108f, 0.972939952f, - 0.242980180f, 0.970031253f, - 0.254865660f, 0.966976471f, - 0.266712757f, 0.963776066f, - 0.278519689f, 0.960430519f, - 0.290284677f, 0.956940336f, - 0.302005949f, 0.953306040f, - 0.313681740f, 0.949528181f, - 0.325310292f, 0.945607325f, - 0.336889853f, 0.941544065f, - 0.348418680f, 0.937339012f, - 0.359895037f, 0.932992799f, - 0.371317194f, 0.928506080f, - 0.382683432f, 0.923879533f, - 0.393992040f, 0.919113852f, - 0.405241314f, 0.914209756f, - 0.416429560f, 0.909167983f, - 0.427555093f, 0.903989293f, - 0.438616239f, 0.898674466f, - 0.449611330f, 0.893224301f, - 0.460538711f, 0.887639620f, - 0.471396737f, 0.881921264f, - 0.482183772f, 0.876070094f, - 0.492898192f, 0.870086991f, - 0.503538384f, 0.863972856f, - 0.514102744f, 0.857728610f, - 0.524589683f, 0.851355193f, - 0.534997620f, 0.844853565f, - 0.545324988f, 0.838224706f, - 0.555570233f, 0.831469612f, - 0.565731811f, 0.824589303f, - 0.575808191f, 0.817584813f, - 0.585797857f, 0.810457198f, - 0.595699304f, 0.803207531f, - 0.605511041f, 0.795836905f, - 0.615231591f, 0.788346428f, - 0.624859488f, 0.780737229f, - 0.634393284f, 0.773010453f, - 0.643831543f, 0.765167266f, - 0.653172843f, 0.757208847f, - 0.662415778f, 0.749136395f, - 0.671558955f, 0.740951125f, - 0.680600998f, 0.732654272f, - 0.689540545f, 0.724247083f, - 0.698376249f, 0.715730825f, - 0.707106781f, 0.707106781f, - 0.715730825f, 0.698376249f, - 0.724247083f, 0.689540545f, - 0.732654272f, 0.680600998f, - 0.740951125f, 0.671558955f, - 0.749136395f, 0.662415778f, - 0.757208847f, 0.653172843f, - 0.765167266f, 0.643831543f, - 0.773010453f, 0.634393284f, - 0.780737229f, 0.624859488f, - 0.788346428f, 0.615231591f, - 0.795836905f, 0.605511041f, - 0.803207531f, 0.595699304f, - 0.810457198f, 0.585797857f, - 0.817584813f, 0.575808191f, - 0.824589303f, 0.565731811f, - 0.831469612f, 0.555570233f, - 0.838224706f, 0.545324988f, - 0.844853565f, 0.534997620f, - 0.851355193f, 0.524589683f, - 0.857728610f, 0.514102744f, - 0.863972856f, 0.503538384f, - 0.870086991f, 0.492898192f, - 0.876070094f, 0.482183772f, - 0.881921264f, 0.471396737f, - 0.887639620f, 0.460538711f, - 0.893224301f, 0.449611330f, - 0.898674466f, 0.438616239f, - 0.903989293f, 0.427555093f, - 0.909167983f, 0.416429560f, - 0.914209756f, 0.405241314f, - 0.919113852f, 0.393992040f, - 0.923879533f, 0.382683432f, - 0.928506080f, 0.371317194f, - 0.932992799f, 0.359895037f, - 0.937339012f, 0.348418680f, - 0.941544065f, 0.336889853f, - 0.945607325f, 0.325310292f, - 0.949528181f, 0.313681740f, - 0.953306040f, 0.302005949f, - 0.956940336f, 0.290284677f, - 0.960430519f, 0.278519689f, - 0.963776066f, 0.266712757f, - 0.966976471f, 0.254865660f, - 0.970031253f, 0.242980180f, - 0.972939952f, 0.231058108f, - 0.975702130f, 0.219101240f, - 0.978317371f, 0.207111376f, - 0.980785280f, 0.195090322f, - 0.983105487f, 0.183039888f, - 0.985277642f, 0.170961889f, - 0.987301418f, 0.158858143f, - 0.989176510f, 0.146730474f, - 0.990902635f, 0.134580709f, - 0.992479535f, 0.122410675f, - 0.993906970f, 0.110222207f, - 0.995184727f, 0.098017140f, - 0.996312612f, 0.085797312f, - 0.997290457f, 0.073564564f, - 0.998118113f, 0.061320736f, - 0.998795456f, 0.049067674f, - 0.999322385f, 0.036807223f, - 0.999698819f, 0.024541229f, - 0.999924702f, 0.012271538f, - 1.000000000f, 0.000000000f, - 0.999924702f, -0.012271538f, - 0.999698819f, -0.024541229f, - 0.999322385f, -0.036807223f, - 0.998795456f, -0.049067674f, - 0.998118113f, -0.061320736f, - 0.997290457f, -0.073564564f, - 0.996312612f, -0.085797312f, - 0.995184727f, -0.098017140f, - 0.993906970f, -0.110222207f, - 0.992479535f, -0.122410675f, - 0.990902635f, -0.134580709f, - 0.989176510f, -0.146730474f, - 0.987301418f, -0.158858143f, - 0.985277642f, -0.170961889f, - 0.983105487f, -0.183039888f, - 0.980785280f, -0.195090322f, - 0.978317371f, -0.207111376f, - 0.975702130f, -0.219101240f, - 0.972939952f, -0.231058108f, - 0.970031253f, -0.242980180f, - 0.966976471f, -0.254865660f, - 0.963776066f, -0.266712757f, - 0.960430519f, -0.278519689f, - 0.956940336f, -0.290284677f, - 0.953306040f, -0.302005949f, - 0.949528181f, -0.313681740f, - 0.945607325f, -0.325310292f, - 0.941544065f, -0.336889853f, - 0.937339012f, -0.348418680f, - 0.932992799f, -0.359895037f, - 0.928506080f, -0.371317194f, - 0.923879533f, -0.382683432f, - 0.919113852f, -0.393992040f, - 0.914209756f, -0.405241314f, - 0.909167983f, -0.416429560f, - 0.903989293f, -0.427555093f, - 0.898674466f, -0.438616239f, - 0.893224301f, -0.449611330f, - 0.887639620f, -0.460538711f, - 0.881921264f, -0.471396737f, - 0.876070094f, -0.482183772f, - 0.870086991f, -0.492898192f, - 0.863972856f, -0.503538384f, - 0.857728610f, -0.514102744f, - 0.851355193f, -0.524589683f, - 0.844853565f, -0.534997620f, - 0.838224706f, -0.545324988f, - 0.831469612f, -0.555570233f, - 0.824589303f, -0.565731811f, - 0.817584813f, -0.575808191f, - 0.810457198f, -0.585797857f, - 0.803207531f, -0.595699304f, - 0.795836905f, -0.605511041f, - 0.788346428f, -0.615231591f, - 0.780737229f, -0.624859488f, - 0.773010453f, -0.634393284f, - 0.765167266f, -0.643831543f, - 0.757208847f, -0.653172843f, - 0.749136395f, -0.662415778f, - 0.740951125f, -0.671558955f, - 0.732654272f, -0.680600998f, - 0.724247083f, -0.689540545f, - 0.715730825f, -0.698376249f, - 0.707106781f, -0.707106781f, - 0.698376249f, -0.715730825f, - 0.689540545f, -0.724247083f, - 0.680600998f, -0.732654272f, - 0.671558955f, -0.740951125f, - 0.662415778f, -0.749136395f, - 0.653172843f, -0.757208847f, - 0.643831543f, -0.765167266f, - 0.634393284f, -0.773010453f, - 0.624859488f, -0.780737229f, - 0.615231591f, -0.788346428f, - 0.605511041f, -0.795836905f, - 0.595699304f, -0.803207531f, - 0.585797857f, -0.810457198f, - 0.575808191f, -0.817584813f, - 0.565731811f, -0.824589303f, - 0.555570233f, -0.831469612f, - 0.545324988f, -0.838224706f, - 0.534997620f, -0.844853565f, - 0.524589683f, -0.851355193f, - 0.514102744f, -0.857728610f, - 0.503538384f, -0.863972856f, - 0.492898192f, -0.870086991f, - 0.482183772f, -0.876070094f, - 0.471396737f, -0.881921264f, - 0.460538711f, -0.887639620f, - 0.449611330f, -0.893224301f, - 0.438616239f, -0.898674466f, - 0.427555093f, -0.903989293f, - 0.416429560f, -0.909167983f, - 0.405241314f, -0.914209756f, - 0.393992040f, -0.919113852f, - 0.382683432f, -0.923879533f, - 0.371317194f, -0.928506080f, - 0.359895037f, -0.932992799f, - 0.348418680f, -0.937339012f, - 0.336889853f, -0.941544065f, - 0.325310292f, -0.945607325f, - 0.313681740f, -0.949528181f, - 0.302005949f, -0.953306040f, - 0.290284677f, -0.956940336f, - 0.278519689f, -0.960430519f, - 0.266712757f, -0.963776066f, - 0.254865660f, -0.966976471f, - 0.242980180f, -0.970031253f, - 0.231058108f, -0.972939952f, - 0.219101240f, -0.975702130f, - 0.207111376f, -0.978317371f, - 0.195090322f, -0.980785280f, - 0.183039888f, -0.983105487f, - 0.170961889f, -0.985277642f, - 0.158858143f, -0.987301418f, - 0.146730474f, -0.989176510f, - 0.134580709f, -0.990902635f, - 0.122410675f, -0.992479535f, - 0.110222207f, -0.993906970f, - 0.098017140f, -0.995184727f, - 0.085797312f, -0.996312612f, - 0.073564564f, -0.997290457f, - 0.061320736f, -0.998118113f, - 0.049067674f, -0.998795456f, - 0.036807223f, -0.999322385f, - 0.024541229f, -0.999698819f, - 0.012271538f, -0.999924702f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024) -const float32_t twiddleCoef_rfft_1024[1024] = { - 0.000000000f, 1.000000000f, - 0.006135885f, 0.999981175f, - 0.012271538f, 0.999924702f, - 0.018406730f, 0.999830582f, - 0.024541229f, 0.999698819f, - 0.030674803f, 0.999529418f, - 0.036807223f, 0.999322385f, - 0.042938257f, 0.999077728f, - 0.049067674f, 0.998795456f, - 0.055195244f, 0.998475581f, - 0.061320736f, 0.998118113f, - 0.067443920f, 0.997723067f, - 0.073564564f, 0.997290457f, - 0.079682438f, 0.996820299f, - 0.085797312f, 0.996312612f, - 0.091908956f, 0.995767414f, - 0.098017140f, 0.995184727f, - 0.104121634f, 0.994564571f, - 0.110222207f, 0.993906970f, - 0.116318631f, 0.993211949f, - 0.122410675f, 0.992479535f, - 0.128498111f, 0.991709754f, - 0.134580709f, 0.990902635f, - 0.140658239f, 0.990058210f, - 0.146730474f, 0.989176510f, - 0.152797185f, 0.988257568f, - 0.158858143f, 0.987301418f, - 0.164913120f, 0.986308097f, - 0.170961889f, 0.985277642f, - 0.177004220f, 0.984210092f, - 0.183039888f, 0.983105487f, - 0.189068664f, 0.981963869f, - 0.195090322f, 0.980785280f, - 0.201104635f, 0.979569766f, - 0.207111376f, 0.978317371f, - 0.213110320f, 0.977028143f, - 0.219101240f, 0.975702130f, - 0.225083911f, 0.974339383f, - 0.231058108f, 0.972939952f, - 0.237023606f, 0.971503891f, - 0.242980180f, 0.970031253f, - 0.248927606f, 0.968522094f, - 0.254865660f, 0.966976471f, - 0.260794118f, 0.965394442f, - 0.266712757f, 0.963776066f, - 0.272621355f, 0.962121404f, - 0.278519689f, 0.960430519f, - 0.284407537f, 0.958703475f, - 0.290284677f, 0.956940336f, - 0.296150888f, 0.955141168f, - 0.302005949f, 0.953306040f, - 0.307849640f, 0.951435021f, - 0.313681740f, 0.949528181f, - 0.319502031f, 0.947585591f, - 0.325310292f, 0.945607325f, - 0.331106306f, 0.943593458f, - 0.336889853f, 0.941544065f, - 0.342660717f, 0.939459224f, - 0.348418680f, 0.937339012f, - 0.354163525f, 0.935183510f, - 0.359895037f, 0.932992799f, - 0.365612998f, 0.930766961f, - 0.371317194f, 0.928506080f, - 0.377007410f, 0.926210242f, - 0.382683432f, 0.923879533f, - 0.388345047f, 0.921514039f, - 0.393992040f, 0.919113852f, - 0.399624200f, 0.916679060f, - 0.405241314f, 0.914209756f, - 0.410843171f, 0.911706032f, - 0.416429560f, 0.909167983f, - 0.422000271f, 0.906595705f, - 0.427555093f, 0.903989293f, - 0.433093819f, 0.901348847f, - 0.438616239f, 0.898674466f, - 0.444122145f, 0.895966250f, - 0.449611330f, 0.893224301f, - 0.455083587f, 0.890448723f, - 0.460538711f, 0.887639620f, - 0.465976496f, 0.884797098f, - 0.471396737f, 0.881921264f, - 0.476799230f, 0.879012226f, - 0.482183772f, 0.876070094f, - 0.487550160f, 0.873094978f, - 0.492898192f, 0.870086991f, - 0.498227667f, 0.867046246f, - 0.503538384f, 0.863972856f, - 0.508830143f, 0.860866939f, - 0.514102744f, 0.857728610f, - 0.519355990f, 0.854557988f, - 0.524589683f, 0.851355193f, - 0.529803625f, 0.848120345f, - 0.534997620f, 0.844853565f, - 0.540171473f, 0.841554977f, - 0.545324988f, 0.838224706f, - 0.550457973f, 0.834862875f, - 0.555570233f, 0.831469612f, - 0.560661576f, 0.828045045f, - 0.565731811f, 0.824589303f, - 0.570780746f, 0.821102515f, - 0.575808191f, 0.817584813f, - 0.580813958f, 0.814036330f, - 0.585797857f, 0.810457198f, - 0.590759702f, 0.806847554f, - 0.595699304f, 0.803207531f, - 0.600616479f, 0.799537269f, - 0.605511041f, 0.795836905f, - 0.610382806f, 0.792106577f, - 0.615231591f, 0.788346428f, - 0.620057212f, 0.784556597f, - 0.624859488f, 0.780737229f, - 0.629638239f, 0.776888466f, - 0.634393284f, 0.773010453f, - 0.639124445f, 0.769103338f, - 0.643831543f, 0.765167266f, - 0.648514401f, 0.761202385f, - 0.653172843f, 0.757208847f, - 0.657806693f, 0.753186799f, - 0.662415778f, 0.749136395f, - 0.666999922f, 0.745057785f, - 0.671558955f, 0.740951125f, - 0.676092704f, 0.736816569f, - 0.680600998f, 0.732654272f, - 0.685083668f, 0.728464390f, - 0.689540545f, 0.724247083f, - 0.693971461f, 0.720002508f, - 0.698376249f, 0.715730825f, - 0.702754744f, 0.711432196f, - 0.707106781f, 0.707106781f, - 0.711432196f, 0.702754744f, - 0.715730825f, 0.698376249f, - 0.720002508f, 0.693971461f, - 0.724247083f, 0.689540545f, - 0.728464390f, 0.685083668f, - 0.732654272f, 0.680600998f, - 0.736816569f, 0.676092704f, - 0.740951125f, 0.671558955f, - 0.745057785f, 0.666999922f, - 0.749136395f, 0.662415778f, - 0.753186799f, 0.657806693f, - 0.757208847f, 0.653172843f, - 0.761202385f, 0.648514401f, - 0.765167266f, 0.643831543f, - 0.769103338f, 0.639124445f, - 0.773010453f, 0.634393284f, - 0.776888466f, 0.629638239f, - 0.780737229f, 0.624859488f, - 0.784556597f, 0.620057212f, - 0.788346428f, 0.615231591f, - 0.792106577f, 0.610382806f, - 0.795836905f, 0.605511041f, - 0.799537269f, 0.600616479f, - 0.803207531f, 0.595699304f, - 0.806847554f, 0.590759702f, - 0.810457198f, 0.585797857f, - 0.814036330f, 0.580813958f, - 0.817584813f, 0.575808191f, - 0.821102515f, 0.570780746f, - 0.824589303f, 0.565731811f, - 0.828045045f, 0.560661576f, - 0.831469612f, 0.555570233f, - 0.834862875f, 0.550457973f, - 0.838224706f, 0.545324988f, - 0.841554977f, 0.540171473f, - 0.844853565f, 0.534997620f, - 0.848120345f, 0.529803625f, - 0.851355193f, 0.524589683f, - 0.854557988f, 0.519355990f, - 0.857728610f, 0.514102744f, - 0.860866939f, 0.508830143f, - 0.863972856f, 0.503538384f, - 0.867046246f, 0.498227667f, - 0.870086991f, 0.492898192f, - 0.873094978f, 0.487550160f, - 0.876070094f, 0.482183772f, - 0.879012226f, 0.476799230f, - 0.881921264f, 0.471396737f, - 0.884797098f, 0.465976496f, - 0.887639620f, 0.460538711f, - 0.890448723f, 0.455083587f, - 0.893224301f, 0.449611330f, - 0.895966250f, 0.444122145f, - 0.898674466f, 0.438616239f, - 0.901348847f, 0.433093819f, - 0.903989293f, 0.427555093f, - 0.906595705f, 0.422000271f, - 0.909167983f, 0.416429560f, - 0.911706032f, 0.410843171f, - 0.914209756f, 0.405241314f, - 0.916679060f, 0.399624200f, - 0.919113852f, 0.393992040f, - 0.921514039f, 0.388345047f, - 0.923879533f, 0.382683432f, - 0.926210242f, 0.377007410f, - 0.928506080f, 0.371317194f, - 0.930766961f, 0.365612998f, - 0.932992799f, 0.359895037f, - 0.935183510f, 0.354163525f, - 0.937339012f, 0.348418680f, - 0.939459224f, 0.342660717f, - 0.941544065f, 0.336889853f, - 0.943593458f, 0.331106306f, - 0.945607325f, 0.325310292f, - 0.947585591f, 0.319502031f, - 0.949528181f, 0.313681740f, - 0.951435021f, 0.307849640f, - 0.953306040f, 0.302005949f, - 0.955141168f, 0.296150888f, - 0.956940336f, 0.290284677f, - 0.958703475f, 0.284407537f, - 0.960430519f, 0.278519689f, - 0.962121404f, 0.272621355f, - 0.963776066f, 0.266712757f, - 0.965394442f, 0.260794118f, - 0.966976471f, 0.254865660f, - 0.968522094f, 0.248927606f, - 0.970031253f, 0.242980180f, - 0.971503891f, 0.237023606f, - 0.972939952f, 0.231058108f, - 0.974339383f, 0.225083911f, - 0.975702130f, 0.219101240f, - 0.977028143f, 0.213110320f, - 0.978317371f, 0.207111376f, - 0.979569766f, 0.201104635f, - 0.980785280f, 0.195090322f, - 0.981963869f, 0.189068664f, - 0.983105487f, 0.183039888f, - 0.984210092f, 0.177004220f, - 0.985277642f, 0.170961889f, - 0.986308097f, 0.164913120f, - 0.987301418f, 0.158858143f, - 0.988257568f, 0.152797185f, - 0.989176510f, 0.146730474f, - 0.990058210f, 0.140658239f, - 0.990902635f, 0.134580709f, - 0.991709754f, 0.128498111f, - 0.992479535f, 0.122410675f, - 0.993211949f, 0.116318631f, - 0.993906970f, 0.110222207f, - 0.994564571f, 0.104121634f, - 0.995184727f, 0.098017140f, - 0.995767414f, 0.091908956f, - 0.996312612f, 0.085797312f, - 0.996820299f, 0.079682438f, - 0.997290457f, 0.073564564f, - 0.997723067f, 0.067443920f, - 0.998118113f, 0.061320736f, - 0.998475581f, 0.055195244f, - 0.998795456f, 0.049067674f, - 0.999077728f, 0.042938257f, - 0.999322385f, 0.036807223f, - 0.999529418f, 0.030674803f, - 0.999698819f, 0.024541229f, - 0.999830582f, 0.018406730f, - 0.999924702f, 0.012271538f, - 0.999981175f, 0.006135885f, - 1.000000000f, 0.000000000f, - 0.999981175f, -0.006135885f, - 0.999924702f, -0.012271538f, - 0.999830582f, -0.018406730f, - 0.999698819f, -0.024541229f, - 0.999529418f, -0.030674803f, - 0.999322385f, -0.036807223f, - 0.999077728f, -0.042938257f, - 0.998795456f, -0.049067674f, - 0.998475581f, -0.055195244f, - 0.998118113f, -0.061320736f, - 0.997723067f, -0.067443920f, - 0.997290457f, -0.073564564f, - 0.996820299f, -0.079682438f, - 0.996312612f, -0.085797312f, - 0.995767414f, -0.091908956f, - 0.995184727f, -0.098017140f, - 0.994564571f, -0.104121634f, - 0.993906970f, -0.110222207f, - 0.993211949f, -0.116318631f, - 0.992479535f, -0.122410675f, - 0.991709754f, -0.128498111f, - 0.990902635f, -0.134580709f, - 0.990058210f, -0.140658239f, - 0.989176510f, -0.146730474f, - 0.988257568f, -0.152797185f, - 0.987301418f, -0.158858143f, - 0.986308097f, -0.164913120f, - 0.985277642f, -0.170961889f, - 0.984210092f, -0.177004220f, - 0.983105487f, -0.183039888f, - 0.981963869f, -0.189068664f, - 0.980785280f, -0.195090322f, - 0.979569766f, -0.201104635f, - 0.978317371f, -0.207111376f, - 0.977028143f, -0.213110320f, - 0.975702130f, -0.219101240f, - 0.974339383f, -0.225083911f, - 0.972939952f, -0.231058108f, - 0.971503891f, -0.237023606f, - 0.970031253f, -0.242980180f, - 0.968522094f, -0.248927606f, - 0.966976471f, -0.254865660f, - 0.965394442f, -0.260794118f, - 0.963776066f, -0.266712757f, - 0.962121404f, -0.272621355f, - 0.960430519f, -0.278519689f, - 0.958703475f, -0.284407537f, - 0.956940336f, -0.290284677f, - 0.955141168f, -0.296150888f, - 0.953306040f, -0.302005949f, - 0.951435021f, -0.307849640f, - 0.949528181f, -0.313681740f, - 0.947585591f, -0.319502031f, - 0.945607325f, -0.325310292f, - 0.943593458f, -0.331106306f, - 0.941544065f, -0.336889853f, - 0.939459224f, -0.342660717f, - 0.937339012f, -0.348418680f, - 0.935183510f, -0.354163525f, - 0.932992799f, -0.359895037f, - 0.930766961f, -0.365612998f, - 0.928506080f, -0.371317194f, - 0.926210242f, -0.377007410f, - 0.923879533f, -0.382683432f, - 0.921514039f, -0.388345047f, - 0.919113852f, -0.393992040f, - 0.916679060f, -0.399624200f, - 0.914209756f, -0.405241314f, - 0.911706032f, -0.410843171f, - 0.909167983f, -0.416429560f, - 0.906595705f, -0.422000271f, - 0.903989293f, -0.427555093f, - 0.901348847f, -0.433093819f, - 0.898674466f, -0.438616239f, - 0.895966250f, -0.444122145f, - 0.893224301f, -0.449611330f, - 0.890448723f, -0.455083587f, - 0.887639620f, -0.460538711f, - 0.884797098f, -0.465976496f, - 0.881921264f, -0.471396737f, - 0.879012226f, -0.476799230f, - 0.876070094f, -0.482183772f, - 0.873094978f, -0.487550160f, - 0.870086991f, -0.492898192f, - 0.867046246f, -0.498227667f, - 0.863972856f, -0.503538384f, - 0.860866939f, -0.508830143f, - 0.857728610f, -0.514102744f, - 0.854557988f, -0.519355990f, - 0.851355193f, -0.524589683f, - 0.848120345f, -0.529803625f, - 0.844853565f, -0.534997620f, - 0.841554977f, -0.540171473f, - 0.838224706f, -0.545324988f, - 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0.177004220f, -0.984210092f, - 0.170961889f, -0.985277642f, - 0.164913120f, -0.986308097f, - 0.158858143f, -0.987301418f, - 0.152797185f, -0.988257568f, - 0.146730474f, -0.989176510f, - 0.140658239f, -0.990058210f, - 0.134580709f, -0.990902635f, - 0.128498111f, -0.991709754f, - 0.122410675f, -0.992479535f, - 0.116318631f, -0.993211949f, - 0.110222207f, -0.993906970f, - 0.104121634f, -0.994564571f, - 0.098017140f, -0.995184727f, - 0.091908956f, -0.995767414f, - 0.085797312f, -0.996312612f, - 0.079682438f, -0.996820299f, - 0.073564564f, -0.997290457f, - 0.067443920f, -0.997723067f, - 0.061320736f, -0.998118113f, - 0.055195244f, -0.998475581f, - 0.049067674f, -0.998795456f, - 0.042938257f, -0.999077728f, - 0.036807223f, -0.999322385f, - 0.030674803f, -0.999529418f, - 0.024541229f, -0.999698819f, - 0.018406730f, -0.999830582f, - 0.012271538f, -0.999924702f, - 0.006135885f, -0.999981175f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048) -const float32_t twiddleCoef_rfft_2048[2048] = { - 0.000000000f, 1.000000000f, - 0.003067957f, 0.999995294f, - 0.006135885f, 0.999981175f, - 0.009203755f, 0.999957645f, - 0.012271538f, 0.999924702f, - 0.015339206f, 0.999882347f, - 0.018406730f, 0.999830582f, - 0.021474080f, 0.999769405f, - 0.024541229f, 0.999698819f, - 0.027608146f, 0.999618822f, - 0.030674803f, 0.999529418f, - 0.033741172f, 0.999430605f, - 0.036807223f, 0.999322385f, - 0.039872928f, 0.999204759f, - 0.042938257f, 0.999077728f, - 0.046003182f, 0.998941293f, - 0.049067674f, 0.998795456f, - 0.052131705f, 0.998640218f, - 0.055195244f, 0.998475581f, - 0.058258265f, 0.998301545f, - 0.061320736f, 0.998118113f, - 0.064382631f, 0.997925286f, - 0.067443920f, 0.997723067f, - 0.070504573f, 0.997511456f, - 0.073564564f, 0.997290457f, - 0.076623861f, 0.997060070f, - 0.079682438f, 0.996820299f, - 0.082740265f, 0.996571146f, - 0.085797312f, 0.996312612f, - 0.088853553f, 0.996044701f, - 0.091908956f, 0.995767414f, - 0.094963495f, 0.995480755f, - 0.098017140f, 0.995184727f, - 0.101069863f, 0.994879331f, - 0.104121634f, 0.994564571f, - 0.107172425f, 0.994240449f, - 0.110222207f, 0.993906970f, - 0.113270952f, 0.993564136f, - 0.116318631f, 0.993211949f, - 0.119365215f, 0.992850414f, - 0.122410675f, 0.992479535f, - 0.125454983f, 0.992099313f, - 0.128498111f, 0.991709754f, - 0.131540029f, 0.991310860f, - 0.134580709f, 0.990902635f, - 0.137620122f, 0.990485084f, - 0.140658239f, 0.990058210f, - 0.143695033f, 0.989622017f, - 0.146730474f, 0.989176510f, - 0.149764535f, 0.988721692f, - 0.152797185f, 0.988257568f, - 0.155828398f, 0.987784142f, - 0.158858143f, 0.987301418f, - 0.161886394f, 0.986809402f, - 0.164913120f, 0.986308097f, - 0.167938295f, 0.985797509f, - 0.170961889f, 0.985277642f, - 0.173983873f, 0.984748502f, - 0.177004220f, 0.984210092f, - 0.180022901f, 0.983662419f, - 0.183039888f, 0.983105487f, - 0.186055152f, 0.982539302f, - 0.189068664f, 0.981963869f, - 0.192080397f, 0.981379193f, - 0.195090322f, 0.980785280f, - 0.198098411f, 0.980182136f, - 0.201104635f, 0.979569766f, - 0.204108966f, 0.978948175f, - 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0.158858143f, -0.987301418f, - 0.155828398f, -0.987784142f, - 0.152797185f, -0.988257568f, - 0.149764535f, -0.988721692f, - 0.146730474f, -0.989176510f, - 0.143695033f, -0.989622017f, - 0.140658239f, -0.990058210f, - 0.137620122f, -0.990485084f, - 0.134580709f, -0.990902635f, - 0.131540029f, -0.991310860f, - 0.128498111f, -0.991709754f, - 0.125454983f, -0.992099313f, - 0.122410675f, -0.992479535f, - 0.119365215f, -0.992850414f, - 0.116318631f, -0.993211949f, - 0.113270952f, -0.993564136f, - 0.110222207f, -0.993906970f, - 0.107172425f, -0.994240449f, - 0.104121634f, -0.994564571f, - 0.101069863f, -0.994879331f, - 0.098017140f, -0.995184727f, - 0.094963495f, -0.995480755f, - 0.091908956f, -0.995767414f, - 0.088853553f, -0.996044701f, - 0.085797312f, -0.996312612f, - 0.082740265f, -0.996571146f, - 0.079682438f, -0.996820299f, - 0.076623861f, -0.997060070f, - 0.073564564f, -0.997290457f, - 0.070504573f, -0.997511456f, - 0.067443920f, -0.997723067f, - 0.064382631f, -0.997925286f, - 0.061320736f, -0.998118113f, - 0.058258265f, -0.998301545f, - 0.055195244f, -0.998475581f, - 0.052131705f, -0.998640218f, - 0.049067674f, -0.998795456f, - 0.046003182f, -0.998941293f, - 0.042938257f, -0.999077728f, - 0.039872928f, -0.999204759f, - 0.036807223f, -0.999322385f, - 0.033741172f, -0.999430605f, - 0.030674803f, -0.999529418f, - 0.027608146f, -0.999618822f, - 0.024541229f, -0.999698819f, - 0.021474080f, -0.999769405f, - 0.018406730f, -0.999830582f, - 0.015339206f, -0.999882347f, - 0.012271538f, -0.999924702f, - 0.009203755f, -0.999957645f, - 0.006135885f, -0.999981175f, - 0.003067957f, -0.999995294f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096) -const float32_t twiddleCoef_rfft_4096[4096] = { - 0.000000000f, 1.000000000f, - 0.001533980f, 0.999998823f, - 0.003067957f, 0.999995294f, - 0.004601926f, 0.999989411f, - 0.006135885f, 0.999981175f, - 0.007669829f, 0.999970586f, - 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0.049067674f, -0.998795456f, - 0.047535484f, -0.998869550f, - 0.046003182f, -0.998941293f, - 0.044470772f, -0.999010686f, - 0.042938257f, -0.999077728f, - 0.041405641f, -0.999142419f, - 0.039872928f, -0.999204759f, - 0.038340120f, -0.999264747f, - 0.036807223f, -0.999322385f, - 0.035274239f, -0.999377670f, - 0.033741172f, -0.999430605f, - 0.032208025f, -0.999481187f, - 0.030674803f, -0.999529418f, - 0.029141509f, -0.999575296f, - 0.027608146f, -0.999618822f, - 0.026074718f, -0.999659997f, - 0.024541229f, -0.999698819f, - 0.023007681f, -0.999735288f, - 0.021474080f, -0.999769405f, - 0.019940429f, -0.999801170f, - 0.018406730f, -0.999830582f, - 0.016872988f, -0.999857641f, - 0.015339206f, -0.999882347f, - 0.013805389f, -0.999904701f, - 0.012271538f, -0.999924702f, - 0.010737659f, -0.999942350f, - 0.009203755f, -0.999957645f, - 0.007669829f, -0.999970586f, - 0.006135885f, -0.999981175f, - 0.004601926f, -0.999989411f, - 0.003067957f, -0.999995294f, - 0.001533980f, -0.999998823f -}; - -#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALL_TABLES) */ - -/** - @ingroup RealFFT - */ - -/** - @addtogroup RealFFT_Table Real FFT Tables - @{ - */ - -/** - @par - Generation of realCoefA array: - @par - n = 4096 - 
for (i = 0; i < n; i++)
-  {
-     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }
- */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32) -const float32_t realCoefA[8192] = { - 0.500000000000000f, -0.500000000000000f, 0.499616503715515f, -0.499999850988388f, - 0.499233007431030f, -0.499999403953552f, 0.498849511146545f, -0.499998688697815f, - 0.498466014862061f, -0.499997645616531f, 0.498082518577576f, -0.499996334314346f, - 0.497699022293091f, -0.499994695186615f, 0.497315555810928f, -0.499992787837982f, - 0.496932059526443f, -0.499990582466125f, 0.496548563241959f, -0.499988079071045f, - 0.496165096759796f, -0.499985307455063f, 0.495781600475311f, -0.499982208013535f, - 0.495398133993149f, -0.499978810548782f, 0.495014637708664f, -0.499975144863129f, - 0.494631171226501f, -0.499971181154251f, 0.494247704744339f, -0.499966919422150f, - 0.493864238262177f, -0.499962359666824f, 0.493480771780014f, -0.499957501888275f, - 0.493097305297852f, -0.499952346086502f, 0.492713838815689f, -0.499946922063828f, - 0.492330402135849f, -0.499941170215607f, 0.491946935653687f, -0.499935150146484f, - 0.491563498973846f, -0.499928832054138f, 0.491180062294006f, -0.499922215938568f, - 0.490796625614166f, -0.499915301799774f, 0.490413218736649f, -0.499908089637756f, - 0.490029782056808f, -0.499900579452515f, 0.489646375179291f, -0.499892801046371f, - 0.489262968301773f, -0.499884694814682f, 0.488879561424255f, -0.499876320362091f, - 0.488496154546738f, -0.499867647886276f, 0.488112777471542f, -0.499858677387238f, - 0.487729400396347f, -0.499849408864975f, 0.487346023321152f, -0.499839842319489f, - 0.486962646245956f, -0.499830007553101f, 0.486579269170761f, -0.499819844961166f, - 0.486195921897888f, -0.499809414148331f, 0.485812574625015f, -0.499798685312271f, - 0.485429257154465f, -0.499787658452988f, 0.485045909881592f, -0.499776333570480f, - 0.484662592411041f, -0.499764710664749f, 0.484279274940491f, -0.499752789735794f, - 0.483895987272263f, -0.499740600585938f, 0.483512699604034f, -0.499728083610535f, - 0.483129411935806f, -0.499715298414230f, 0.482746154069901f, -0.499702215194702f, - 0.482362866401672f, -0.499688833951950f, 0.481979638338089f, -0.499675154685974f, - 0.481596380472183f, -0.499661177396774f, 0.481213152408600f, -0.499646931886673f, - 0.480829954147339f, -0.499632388353348f, 0.480446726083755f, -0.499617516994476f, - 0.480063527822495f, -0.499602377414703f, 0.479680359363556f, -0.499586939811707f, - 0.479297190904617f, -0.499571204185486f, 0.478914022445679f, -0.499555170536041f, - 0.478530883789063f, -0.499538868665695f, 0.478147745132446f, -0.499522238969803f, - 0.477764606475830f, -0.499505341053009f, 0.477381497621536f, -0.499488145112991f, - 0.476998418569565f, -0.499470651149750f, 0.476615339517593f, -0.499452859163284f, - 0.476232260465622f, -0.499434769153595f, 0.475849211215973f, -0.499416410923004f, - 0.475466161966324f, -0.499397724866867f, 0.475083142518997f, -0.499378770589828f, - 0.474700123071671f, -0.499359518289566f, 0.474317133426666f, -0.499339967966080f, - 0.473934143781662f, -0.499320119619370f, 0.473551183938980f, -0.499299973249435f, - 0.473168224096298f, -0.499279528856277f, 0.472785294055939f, -0.499258816242218f, - 0.472402364015579f, -0.499237775802612f, 0.472019463777542f, -0.499216467142105f, - 0.471636593341827f, -0.499194860458374f, 0.471253722906113f, -0.499172955751419f, - 0.470870882272720f, -0.499150782823563f, 0.470488041639328f, -0.499128282070160f, - 0.470105201005936f, -0.499105513095856f, 0.469722419977188f, -0.499082416296005f, - 0.469339638948441f, -0.499059051275253f, 0.468956857919693f, -0.499035388231277f, - 0.468574106693268f, -0.499011427164078f, 0.468191385269165f, -0.498987197875977f, - 0.467808693647385f, -0.498962640762329f, 0.467426002025604f, -0.498937815427780f, - 0.467043310403824f, -0.498912662267685f, 0.466660678386688f, -0.498887240886688f, - 0.466278046369553f, -0.498861521482468f, 0.465895414352417f, -0.498835533857346f, - 0.465512841939926f, -0.498809218406677f, 0.465130269527435f, -0.498782604932785f, - 0.464747726917267f, -0.498755723237991f, 0.464365184307098f, -0.498728543519974f, - 0.463982671499252f, -0.498701065778732f, 0.463600188493729f, -0.498673290014267f, - 0.463217705488205f, -0.498645216226578f, 0.462835282087326f, -0.498616874217987f, - 0.462452858686447f, -0.498588204383850f, 0.462070435285568f, -0.498559266328812f, - 0.461688071489334f, -0.498530030250549f, 0.461305707693100f, -0.498500496149063f, - 0.460923373699188f, -0.498470664024353f, 0.460541069507599f, -0.498440563678741f, - 0.460158795118332f, -0.498410135507584f, 0.459776520729065f, -0.498379439115524f, - 0.459394276142120f, -0.498348444700241f, 0.459012061357498f, -0.498317152261734f, - 0.458629876375198f, -0.498285561800003f, 0.458247691392899f, -0.498253703117371f, - 0.457865566015244f, -0.498221516609192f, 0.457483440637589f, -0.498189061880112f, - 0.457101345062256f, -0.498156309127808f, 0.456719279289246f, -0.498123258352280f, - 0.456337243318558f, -0.498089909553528f, 0.455955207347870f, -0.498056292533875f, - 0.455573230981827f, -0.498022347688675f, 0.455191254615784f, -0.497988134622574f, - 0.454809308052063f, -0.497953623533249f, 0.454427421092987f, -0.497918814420700f, - 0.454045534133911f, -0.497883707284927f, 0.453663676977158f, -0.497848302125931f, - 0.453281819820404f, -0.497812628746033f, 0.452900022268295f, -0.497776657342911f, - 0.452518254518509f, -0.497740387916565f, 0.452136516571045f, -0.497703820466995f, - 0.451754778623581f, -0.497666954994202f, 0.451373100280762f, -0.497629791498184f, - 0.450991421937943f, -0.497592359781265f, 0.450609803199768f, -0.497554630041122f, - 0.450228184461594f, -0.497516602277756f, 0.449846625328064f, -0.497478276491165f, - 0.449465066194534f, -0.497439652681351f, 0.449083566665649f, -0.497400760650635f, - 0.448702067136765f, -0.497361570596695f, 0.448320597410202f, -0.497322082519531f, - 0.447939187288284f, -0.497282296419144f, 0.447557777166367f, -0.497242212295532f, - 0.447176426649094f, -0.497201830148697f, 0.446795076131821f, -0.497161179780960f, - 0.446413785219193f, -0.497120231389999f, 0.446032524108887f, -0.497078984975815f, - 0.445651292800903f, -0.497037440538406f, 0.445270061492920f, -0.496995598077774f, - 0.444888889789581f, -0.496953487396240f, 0.444507747888565f, -0.496911078691483f, - 0.444126635789871f, -0.496868371963501f, 0.443745553493500f, -0.496825367212296f, - 0.443364530801773f, -0.496782064437866f, 0.442983508110046f, -0.496738493442535f, - 0.442602545022964f, -0.496694594621658f, 0.442221581935883f, -0.496650427579880f, - 0.441840678453445f, -0.496605962514877f, 0.441459804773331f, -0.496561229228973f, - 0.441078960895538f, -0.496516168117523f, 0.440698176622391f, -0.496470838785172f, - 0.440317392349243f, -0.496425211429596f, 0.439936667680740f, -0.496379286050797f, - 0.439555943012238f, -0.496333062648773f, 0.439175277948380f, -0.496286571025848f, - 0.438794672489166f, -0.496239781379700f, 0.438414067029953f, -0.496192663908005f, - 0.438033521175385f, -0.496145308017731f, 0.437653005123138f, -0.496097624301910f, - 0.437272518873215f, -0.496049642562866f, 0.436892062425613f, -0.496001392602921f, - 0.436511665582657f, -0.495952844619751f, 0.436131268739700f, -0.495903998613358f, - 0.435750931501389f, -0.495854884386063f, 0.435370653867722f, -0.495805442333221f, - 0.434990376234055f, -0.495755732059479f, 0.434610158205032f, -0.495705723762512f, - 0.434229999780655f, -0.495655417442322f, 0.433849841356277f, -0.495604842901230f, - 0.433469742536545f, -0.495553970336914f, 0.433089673519135f, -0.495502769947052f, - 0.432709634304047f, -0.495451331138611f, 0.432329654693604f, -0.495399564504623f, - 0.431949704885483f, -0.495347499847412f, 0.431569814682007f, -0.495295166969299f, - 0.431189924478531f, -0.495242536067963f, 0.430810123682022f, -0.495189607143402f, - 0.430430322885513f, -0.495136409997940f, 0.430050581693649f, -0.495082914829254f, - 0.429670870304108f, -0.495029091835022f, 0.429291218519211f, -0.494975030422211f, - 0.428911596536636f, -0.494920641183853f, 0.428532034158707f, -0.494865983724594f, - 0.428152471780777f, -0.494810998439789f, 0.427772998809814f, -0.494755744934082f, - 0.427393525838852f, -0.494700223207474f, 0.427014142274857f, -0.494644373655319f, - 0.426634758710861f, -0.494588255882263f, 0.426255434751511f, -0.494531840085983f, - 0.425876170396805f, -0.494475126266479f, 0.425496935844421f, -0.494418144226074f, - 0.425117731094360f, -0.494360834360123f, 0.424738585948944f, -0.494303256273270f, - 0.424359470605850f, -0.494245409965515f, 0.423980414867401f, -0.494187235832214f, - 0.423601418733597f, -0.494128793478012f, 0.423222452402115f, -0.494070053100586f, - 0.422843515872955f, -0.494011014699936f, 0.422464638948441f, -0.493951678276062f, - 0.422085791826248f, -0.493892073631287f, 0.421707004308701f, -0.493832170963287f, - 0.421328276395798f, -0.493771970272064f, 0.420949578285217f, -0.493711471557617f, - 0.420570939779282f, -0.493650704622269f, 0.420192331075668f, -0.493589639663696f, - 0.419813781976700f, -0.493528276681900f, 0.419435262680054f, -0.493466645479202f, - 0.419056802988052f, -0.493404686450958f, 0.418678402900696f, -0.493342459201813f, - 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0.478530883789063f, 0.499538868665695f, 0.478914022445679f, 0.499555170536041f, - 0.479297190904617f, 0.499571204185486f, 0.479680359363556f, 0.499586939811707f, - 0.480063527822495f, 0.499602377414703f, 0.480446726083755f, 0.499617516994476f, - 0.480829954147339f, 0.499632388353348f, 0.481213152408600f, 0.499646931886673f, - 0.481596380472183f, 0.499661177396774f, 0.481979638338089f, 0.499675154685974f, - 0.482362866401672f, 0.499688833951950f, 0.482746154069901f, 0.499702215194702f, - 0.483129411935806f, 0.499715298414230f, 0.483512699604034f, 0.499728083610535f, - 0.483895987272263f, 0.499740600585938f, 0.484279274940491f, 0.499752789735794f, - 0.484662592411041f, 0.499764710664749f, 0.485045909881592f, 0.499776333570480f, - 0.485429257154465f, 0.499787658452988f, 0.485812574625015f, 0.499798685312271f, - 0.486195921897888f, 0.499809414148331f, 0.486579269170761f, 0.499819844961166f, - 0.486962646245956f, 0.499830007553101f, 0.487346023321152f, 0.499839842319489f, - 0.487729400396347f, 0.499849408864975f, 0.488112777471542f, 0.499858677387238f, - 0.488496154546738f, 0.499867647886276f, 0.488879561424255f, 0.499876320362091f, - 0.489262968301773f, 0.499884694814682f, 0.489646375179291f, 0.499892801046371f, - 0.490029782056808f, 0.499900579452515f, 0.490413218736649f, 0.499908089637756f, - 0.490796625614166f, 0.499915301799774f, 0.491180062294006f, 0.499922215938568f, - 0.491563498973846f, 0.499928832054138f, 0.491946935653687f, 0.499935150146484f, - 0.492330402135849f, 0.499941170215607f, 0.492713838815689f, 0.499946922063828f, - 0.493097305297852f, 0.499952346086502f, 0.493480771780014f, 0.499957501888275f, - 0.493864238262177f, 0.499962359666824f, 0.494247704744339f, 0.499966919422150f, - 0.494631171226501f, 0.499971181154251f, 0.495014637708664f, 0.499975144863129f, - 0.495398133993149f, 0.499978810548782f, 0.495781600475311f, 0.499982208013535f, - 0.496165096759796f, 0.499985307455063f, 0.496548563241959f, 0.499988079071045f, - 0.496932059526443f, 0.499990582466125f, 0.497315555810928f, 0.499992787837982f, - 0.497699022293091f, 0.499994695186615f, 0.498082518577576f, 0.499996334314346f, - 0.498466014862061f, 0.499997645616531f, 0.498849511146545f, 0.499998688697815f, - 0.499233007431030f, 0.499999403953552f, 0.499616503715515f, 0.499999850988388f, -}; - - -/** - @par - Generation of realCoefB array: - @par - n = 4096 - 
for (i = 0; i < n; i++)
-  {
-     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }
- */ - -const float32_t realCoefB[8192] = { - 0.500000000000000f, 0.500000000000000f, 0.500383496284485f, 0.499999850988388f, - 0.500766992568970f, 0.499999403953552f, 0.501150488853455f, 0.499998688697815f, - 0.501533985137939f, 0.499997645616531f, 0.501917481422424f, 0.499996334314346f, - 0.502300977706909f, 0.499994695186615f, 0.502684473991394f, 0.499992787837982f, - 0.503067970275879f, 0.499990582466125f, 0.503451406955719f, 0.499988079071045f, - 0.503834903240204f, 0.499985307455063f, 0.504218399524689f, 0.499982208013535f, - 0.504601895809174f, 0.499978810548782f, 0.504985332489014f, 0.499975144863129f, - 0.505368828773499f, 0.499971181154251f, 0.505752325057983f, 0.499966919422150f, - 0.506135761737823f, 0.499962359666824f, 0.506519258022308f, 0.499957501888275f, - 0.506902694702148f, 0.499952346086502f, 0.507286131381989f, 0.499946922063828f, - 0.507669627666473f, 0.499941170215607f, 0.508053064346313f, 0.499935150146484f, - 0.508436501026154f, 0.499928832054138f, 0.508819937705994f, 0.499922215938568f, - 0.509203374385834f, 0.499915301799774f, 0.509586811065674f, 0.499908089637756f, - 0.509970188140869f, 0.499900579452515f, 0.510353624820709f, 0.499892801046371f, - 0.510737061500549f, 0.499884694814682f, 0.511120438575745f, 0.499876320362091f, - 0.511503815650940f, 0.499867647886276f, 0.511887252330780f, 0.499858677387238f, - 0.512270629405975f, 0.499849408864975f, 0.512654006481171f, 0.499839842319489f, - 0.513037383556366f, 0.499830007553101f, 0.513420701026917f, 0.499819844961166f, - 0.513804078102112f, 0.499809414148331f, 0.514187395572662f, 0.499798685312271f, - 0.514570772647858f, 0.499787658452988f, 0.514954090118408f, 0.499776333570480f, - 0.515337407588959f, 0.499764710664749f, 0.515720725059509f, 0.499752789735794f, - 0.516103982925415f, 0.499740600585938f, 0.516487300395966f, 0.499728083610535f, - 0.516870558261871f, 0.499715298414230f, 0.517253875732422f, 0.499702215194702f, - 0.517637133598328f, 0.499688833951950f, 0.518020391464233f, 0.499675154685974f, - 0.518403589725494f, 0.499661177396774f, 0.518786847591400f, 0.499646931886673f, - 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0.547481775283813f, -0.497740387916565f, 0.547099947929382f, -0.497776657342911f, - 0.546718180179596f, -0.497812628746033f, 0.546336352825165f, -0.497848302125931f, - 0.545954465866089f, -0.497883707284927f, 0.545572578907013f, -0.497918814420700f, - 0.545190691947937f, -0.497953623533249f, 0.544808745384216f, -0.497988134622574f, - 0.544426798820496f, -0.498022347688675f, 0.544044792652130f, -0.498056292533875f, - 0.543662786483765f, -0.498089909553528f, 0.543280720710754f, -0.498123258352280f, - 0.542898654937744f, -0.498156309127808f, 0.542516589164734f, -0.498189061880112f, - 0.542134463787079f, -0.498221516609192f, 0.541752278804779f, -0.498253703117371f, - 0.541370153427124f, -0.498285561800003f, 0.540987968444824f, -0.498317152261734f, - 0.540605723857880f, -0.498348444700241f, 0.540223479270935f, -0.498379439115524f, - 0.539841234683990f, -0.498410135507584f, 0.539458930492401f, -0.498440563678741f, - 0.539076626300812f, -0.498470664024353f, 0.538694262504578f, -0.498500496149063f, - 0.538311958312988f, -0.498530030250549f, 0.537929534912109f, -0.498559266328812f, - 0.537547171115875f, -0.498588204383850f, 0.537164747714996f, -0.498616874217987f, - 0.536782264709473f, -0.498645216226578f, 0.536399841308594f, -0.498673290014267f, - 0.536017298698425f, -0.498701065778732f, 0.535634815692902f, -0.498728543519974f, - 0.535252273082733f, -0.498755723237991f, 0.534869730472565f, -0.498782604932785f, - 0.534487187862396f, -0.498809218406677f, 0.534104585647583f, -0.498835533857346f, - 0.533721983432770f, -0.498861521482468f, 0.533339321613312f, -0.498887240886688f, - 0.532956659793854f, -0.498912662267685f, 0.532573997974396f, -0.498937815427780f, - 0.532191336154938f, -0.498962640762329f, 0.531808614730835f, -0.498987197875977f, - 0.531425893306732f, -0.499011427164078f, 0.531043112277985f, -0.499035388231277f, - 0.530660390853882f, -0.499059051275253f, 0.530277609825134f, -0.499082416296005f, - 0.529894769191742f, -0.499105513095856f, 0.529511988162994f, -0.499128282070160f, - 0.529129147529602f, -0.499150782823563f, 0.528746306896210f, -0.499172955751419f, - 0.528363406658173f, -0.499194860458374f, 0.527980506420136f, -0.499216467142105f, - 0.527597606182098f, -0.499237775802612f, 0.527214705944061f, -0.499258816242218f, - 0.526831746101379f, -0.499279528856277f, 0.526448845863342f, -0.499299973249435f, - 0.526065826416016f, -0.499320119619370f, 0.525682866573334f, -0.499339967966080f, - 0.525299847126007f, -0.499359518289566f, 0.524916887283325f, -0.499378770589828f, - 0.524533808231354f, -0.499397724866867f, 0.524150788784027f, -0.499416410923004f, - 0.523767769336700f, -0.499434769153595f, 0.523384690284729f, -0.499452859163284f, - 0.523001611232758f, -0.499470651149750f, 0.522618472576141f, -0.499488145112991f, - 0.522235393524170f, -0.499505341053009f, 0.521852254867554f, -0.499522238969803f, - 0.521469116210938f, -0.499538868665695f, 0.521085977554321f, -0.499555170536041f, - 0.520702838897705f, -0.499571204185486f, 0.520319640636444f, -0.499586939811707f, - 0.519936442375183f, -0.499602377414703f, 0.519553244113922f, -0.499617516994476f, - 0.519170045852661f, -0.499632388353348f, 0.518786847591400f, -0.499646931886673f, - 0.518403589725494f, -0.499661177396774f, 0.518020391464233f, -0.499675154685974f, - 0.517637133598328f, -0.499688833951950f, 0.517253875732422f, -0.499702215194702f, - 0.516870558261871f, -0.499715298414230f, 0.516487300395966f, -0.499728083610535f, - 0.516103982925415f, -0.499740600585938f, 0.515720725059509f, -0.499752789735794f, - 0.515337407588959f, -0.499764710664749f, 0.514954090118408f, -0.499776333570480f, - 0.514570772647858f, -0.499787658452988f, 0.514187395572662f, -0.499798685312271f, - 0.513804078102112f, -0.499809414148331f, 0.513420701026917f, -0.499819844961166f, - 0.513037383556366f, -0.499830007553101f, 0.512654006481171f, -0.499839842319489f, - 0.512270629405975f, -0.499849408864975f, 0.511887252330780f, -0.499858677387238f, - 0.511503815650940f, -0.499867647886276f, 0.511120438575745f, -0.499876320362091f, - 0.510737061500549f, -0.499884694814682f, 0.510353624820709f, -0.499892801046371f, - 0.509970188140869f, -0.499900579452515f, 0.509586811065674f, -0.499908089637756f, - 0.509203374385834f, -0.499915301799774f, 0.508819937705994f, -0.499922215938568f, - 0.508436501026154f, -0.499928832054138f, 0.508053064346313f, -0.499935150146484f, - 0.507669627666473f, -0.499941170215607f, 0.507286131381989f, -0.499946922063828f, - 0.506902694702148f, -0.499952346086502f, 0.506519258022308f, -0.499957501888275f, - 0.506135761737823f, -0.499962359666824f, 0.505752325057983f, -0.499966919422150f, - 0.505368828773499f, -0.499971181154251f, 0.504985332489014f, -0.499975144863129f, - 0.504601895809174f, -0.499978810548782f, 0.504218399524689f, -0.499982208013535f, - 0.503834903240204f, -0.499985307455063f, 0.503451406955719f, -0.499988079071045f, - 0.503067970275879f, -0.499990582466125f, 0.502684473991394f, -0.499992787837982f, - 0.502300977706909f, -0.499994695186615f, 0.501917481422424f, -0.499996334314346f, - 0.501533985137939f, -0.499997645616531f, 0.501150488853455f, -0.499998688697815f, - 0.500766992568970f, -0.499999403953552f, 0.500383496284485f, -0.499999850988388f, -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31) -/** - @par - Generation fixed-point realCoefAQ31 array in Q31 format: - @par - n = 4096 - 
for (i = 0; i < n; i++)
-  {
-     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }
- @par - Convert to fixed point Q31 format - round(pATable[i] * pow(2, 31)) -*/ -const q31_t realCoefAQ31[8192] = { - (q31_t)0x40000000, (q31_t)0xc0000000, (q31_t)0x3ff36f02, (q31_t)0xc000013c, - (q31_t)0x3fe6de05, (q31_t)0xc00004ef, (q31_t)0x3fda4d09, (q31_t)0xc0000b1a, - (q31_t)0x3fcdbc0f, (q31_t)0xc00013bd, (q31_t)0x3fc12b16, (q31_t)0xc0001ed8, - (q31_t)0x3fb49a1f, (q31_t)0xc0002c6a, (q31_t)0x3fa8092c, (q31_t)0xc0003c74, - (q31_t)0x3f9b783c, (q31_t)0xc0004ef5, (q31_t)0x3f8ee750, (q31_t)0xc00063ee, - (q31_t)0x3f825668, (q31_t)0xc0007b5f, (q31_t)0x3f75c585, (q31_t)0xc0009547, - (q31_t)0x3f6934a8, (q31_t)0xc000b1a7, (q31_t)0x3f5ca3d0, (q31_t)0xc000d07e, - (q31_t)0x3f5012fe, (q31_t)0xc000f1ce, (q31_t)0x3f438234, (q31_t)0xc0011594, - (q31_t)0x3f36f170, (q31_t)0xc0013bd3, (q31_t)0x3f2a60b4, (q31_t)0xc0016489, - (q31_t)0x3f1dd001, (q31_t)0xc0018fb6, (q31_t)0x3f113f56, (q31_t)0xc001bd5c, - (q31_t)0x3f04aeb5, (q31_t)0xc001ed78, (q31_t)0x3ef81e1d, (q31_t)0xc002200d, - (q31_t)0x3eeb8d8f, (q31_t)0xc0025519, (q31_t)0x3edefd0c, (q31_t)0xc0028c9c, - (q31_t)0x3ed26c94, (q31_t)0xc002c697, (q31_t)0x3ec5dc28, (q31_t)0xc003030a, - (q31_t)0x3eb94bc8, (q31_t)0xc00341f4, (q31_t)0x3eacbb74, (q31_t)0xc0038356, - (q31_t)0x3ea02b2e, (q31_t)0xc003c72f, (q31_t)0x3e939af5, (q31_t)0xc0040d80, - (q31_t)0x3e870aca, (q31_t)0xc0045648, (q31_t)0x3e7a7aae, (q31_t)0xc004a188, - (q31_t)0x3e6deaa1, (q31_t)0xc004ef3f, (q31_t)0x3e615aa3, (q31_t)0xc0053f6e, - (q31_t)0x3e54cab5, (q31_t)0xc0059214, (q31_t)0x3e483ad8, (q31_t)0xc005e731, - (q31_t)0x3e3bab0b, (q31_t)0xc0063ec6, (q31_t)0x3e2f1b50, (q31_t)0xc00698d3, - (q31_t)0x3e228ba7, (q31_t)0xc006f556, (q31_t)0x3e15fc11, (q31_t)0xc0075452, - (q31_t)0x3e096c8d, (q31_t)0xc007b5c4, (q31_t)0x3dfcdd1d, (q31_t)0xc00819ae, - (q31_t)0x3df04dc0, (q31_t)0xc008800f, (q31_t)0x3de3be78, (q31_t)0xc008e8e8, - (q31_t)0x3dd72f45, (q31_t)0xc0095438, (q31_t)0x3dcaa027, (q31_t)0xc009c1ff, - (q31_t)0x3dbe111e, (q31_t)0xc00a323d, (q31_t)0x3db1822c, (q31_t)0xc00aa4f3, - (q31_t)0x3da4f351, (q31_t)0xc00b1a20, (q31_t)0x3d98648d, (q31_t)0xc00b91c4, - (q31_t)0x3d8bd5e1, (q31_t)0xc00c0be0, (q31_t)0x3d7f474d, (q31_t)0xc00c8872, - (q31_t)0x3d72b8d2, (q31_t)0xc00d077c, (q31_t)0x3d662a70, (q31_t)0xc00d88fd, - (q31_t)0x3d599c28, (q31_t)0xc00e0cf5, (q31_t)0x3d4d0df9, (q31_t)0xc00e9364, - (q31_t)0x3d407fe6, (q31_t)0xc00f1c4a, (q31_t)0x3d33f1ed, (q31_t)0xc00fa7a8, - (q31_t)0x3d276410, (q31_t)0xc010357c, (q31_t)0x3d1ad650, (q31_t)0xc010c5c7, - (q31_t)0x3d0e48ab, (q31_t)0xc011588a, (q31_t)0x3d01bb24, (q31_t)0xc011edc3, - (q31_t)0x3cf52dbb, (q31_t)0xc0128574, (q31_t)0x3ce8a06f, (q31_t)0xc0131f9b, - (q31_t)0x3cdc1342, (q31_t)0xc013bc39, (q31_t)0x3ccf8634, (q31_t)0xc0145b4e, - (q31_t)0x3cc2f945, (q31_t)0xc014fcda, (q31_t)0x3cb66c77, (q31_t)0xc015a0dd, - (q31_t)0x3ca9dfc8, (q31_t)0xc0164757, (q31_t)0x3c9d533b, (q31_t)0xc016f047, - (q31_t)0x3c90c6cf, (q31_t)0xc0179bae, (q31_t)0x3c843a85, (q31_t)0xc018498c, - (q31_t)0x3c77ae5e, (q31_t)0xc018f9e1, (q31_t)0x3c6b2259, (q31_t)0xc019acac, - (q31_t)0x3c5e9678, (q31_t)0xc01a61ee, (q31_t)0x3c520aba, (q31_t)0xc01b19a7, - (q31_t)0x3c457f21, (q31_t)0xc01bd3d6, (q31_t)0x3c38f3ac, (q31_t)0xc01c907c, - (q31_t)0x3c2c685d, (q31_t)0xc01d4f99, (q31_t)0x3c1fdd34, (q31_t)0xc01e112b, - (q31_t)0x3c135231, (q31_t)0xc01ed535, (q31_t)0x3c06c754, (q31_t)0xc01f9bb5, - (q31_t)0x3bfa3c9f, (q31_t)0xc02064ab, (q31_t)0x3bedb212, (q31_t)0xc0213018, - (q31_t)0x3be127ac, (q31_t)0xc021fdfb, (q31_t)0x3bd49d70, (q31_t)0xc022ce54, - (q31_t)0x3bc8135c, (q31_t)0xc023a124, (q31_t)0x3bbb8973, (q31_t)0xc024766a, - (q31_t)0x3baeffb3, (q31_t)0xc0254e27, (q31_t)0x3ba2761e, (q31_t)0xc0262859, - (q31_t)0x3b95ecb4, (q31_t)0xc0270502, (q31_t)0x3b896375, (q31_t)0xc027e421, - (q31_t)0x3b7cda63, (q31_t)0xc028c5b6, (q31_t)0x3b70517d, (q31_t)0xc029a9c1, - (q31_t)0x3b63c8c4, (q31_t)0xc02a9042, (q31_t)0x3b574039, (q31_t)0xc02b7939, - (q31_t)0x3b4ab7db, (q31_t)0xc02c64a6, (q31_t)0x3b3e2fac, (q31_t)0xc02d5289, - (q31_t)0x3b31a7ac, (q31_t)0xc02e42e2, (q31_t)0x3b251fdc, (q31_t)0xc02f35b1, - (q31_t)0x3b18983b, (q31_t)0xc0302af5, (q31_t)0x3b0c10cb, (q31_t)0xc03122b0, - (q31_t)0x3aff898c, (q31_t)0xc0321ce0, (q31_t)0x3af3027e, (q31_t)0xc0331986, - (q31_t)0x3ae67ba2, (q31_t)0xc03418a2, (q31_t)0x3ad9f4f8, (q31_t)0xc0351a33, - (q31_t)0x3acd6e81, (q31_t)0xc0361e3a, (q31_t)0x3ac0e83d, (q31_t)0xc03724b6, - (q31_t)0x3ab4622d, (q31_t)0xc0382da8, (q31_t)0x3aa7dc52, (q31_t)0xc0393910, - (q31_t)0x3a9b56ab, (q31_t)0xc03a46ed, (q31_t)0x3a8ed139, (q31_t)0xc03b573f, - (q31_t)0x3a824bfd, (q31_t)0xc03c6a07, (q31_t)0x3a75c6f8, (q31_t)0xc03d7f44, - (q31_t)0x3a694229, (q31_t)0xc03e96f6, (q31_t)0x3a5cbd91, (q31_t)0xc03fb11d, - (q31_t)0x3a503930, (q31_t)0xc040cdba, (q31_t)0x3a43b508, (q31_t)0xc041eccc, - (q31_t)0x3a373119, (q31_t)0xc0430e53, (q31_t)0x3a2aad62, (q31_t)0xc044324f, - (q31_t)0x3a1e29e5, (q31_t)0xc04558c0, (q31_t)0x3a11a6a3, (q31_t)0xc04681a6, - (q31_t)0x3a05239a, (q31_t)0xc047ad01, (q31_t)0x39f8a0cd, (q31_t)0xc048dad1, - (q31_t)0x39ec1e3b, (q31_t)0xc04a0b16, (q31_t)0x39df9be6, (q31_t)0xc04b3dcf, - (q31_t)0x39d319cc, (q31_t)0xc04c72fe, (q31_t)0x39c697f0, (q31_t)0xc04daaa1, - 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(q31_t)0x3a9b56ab, (q31_t)0x3fc5b913, (q31_t)0x3aa7dc52, (q31_t)0x3fc6c6f0, - (q31_t)0x3ab4622d, (q31_t)0x3fc7d258, (q31_t)0x3ac0e83d, (q31_t)0x3fc8db4a, - (q31_t)0x3acd6e81, (q31_t)0x3fc9e1c6, (q31_t)0x3ad9f4f8, (q31_t)0x3fcae5cd, - (q31_t)0x3ae67ba2, (q31_t)0x3fcbe75e, (q31_t)0x3af3027e, (q31_t)0x3fcce67a, - (q31_t)0x3aff898c, (q31_t)0x3fcde320, (q31_t)0x3b0c10cb, (q31_t)0x3fcedd50, - (q31_t)0x3b18983b, (q31_t)0x3fcfd50b, (q31_t)0x3b251fdc, (q31_t)0x3fd0ca4f, - (q31_t)0x3b31a7ac, (q31_t)0x3fd1bd1e, (q31_t)0x3b3e2fac, (q31_t)0x3fd2ad77, - (q31_t)0x3b4ab7db, (q31_t)0x3fd39b5a, (q31_t)0x3b574039, (q31_t)0x3fd486c7, - (q31_t)0x3b63c8c4, (q31_t)0x3fd56fbe, (q31_t)0x3b70517d, (q31_t)0x3fd6563f, - (q31_t)0x3b7cda63, (q31_t)0x3fd73a4a, (q31_t)0x3b896375, (q31_t)0x3fd81bdf, - (q31_t)0x3b95ecb4, (q31_t)0x3fd8fafe, (q31_t)0x3ba2761e, (q31_t)0x3fd9d7a7, - (q31_t)0x3baeffb3, (q31_t)0x3fdab1d9, (q31_t)0x3bbb8973, (q31_t)0x3fdb8996, - (q31_t)0x3bc8135c, (q31_t)0x3fdc5edc, (q31_t)0x3bd49d70, (q31_t)0x3fdd31ac, - (q31_t)0x3be127ac, (q31_t)0x3fde0205, (q31_t)0x3bedb212, (q31_t)0x3fdecfe8, - (q31_t)0x3bfa3c9f, (q31_t)0x3fdf9b55, (q31_t)0x3c06c754, (q31_t)0x3fe0644b, - (q31_t)0x3c135231, (q31_t)0x3fe12acb, (q31_t)0x3c1fdd34, (q31_t)0x3fe1eed5, - (q31_t)0x3c2c685d, (q31_t)0x3fe2b067, (q31_t)0x3c38f3ac, (q31_t)0x3fe36f84, - (q31_t)0x3c457f21, (q31_t)0x3fe42c2a, (q31_t)0x3c520aba, (q31_t)0x3fe4e659, - (q31_t)0x3c5e9678, (q31_t)0x3fe59e12, (q31_t)0x3c6b2259, (q31_t)0x3fe65354, - (q31_t)0x3c77ae5e, (q31_t)0x3fe7061f, (q31_t)0x3c843a85, (q31_t)0x3fe7b674, - (q31_t)0x3c90c6cf, (q31_t)0x3fe86452, (q31_t)0x3c9d533b, (q31_t)0x3fe90fb9, - (q31_t)0x3ca9dfc8, (q31_t)0x3fe9b8a9, (q31_t)0x3cb66c77, (q31_t)0x3fea5f23, - (q31_t)0x3cc2f945, (q31_t)0x3feb0326, (q31_t)0x3ccf8634, (q31_t)0x3feba4b2, - (q31_t)0x3cdc1342, (q31_t)0x3fec43c7, (q31_t)0x3ce8a06f, (q31_t)0x3fece065, - (q31_t)0x3cf52dbb, (q31_t)0x3fed7a8c, (q31_t)0x3d01bb24, (q31_t)0x3fee123d, - (q31_t)0x3d0e48ab, (q31_t)0x3feea776, (q31_t)0x3d1ad650, (q31_t)0x3fef3a39, - (q31_t)0x3d276410, (q31_t)0x3fefca84, (q31_t)0x3d33f1ed, (q31_t)0x3ff05858, - (q31_t)0x3d407fe6, (q31_t)0x3ff0e3b6, (q31_t)0x3d4d0df9, (q31_t)0x3ff16c9c, - (q31_t)0x3d599c28, (q31_t)0x3ff1f30b, (q31_t)0x3d662a70, (q31_t)0x3ff27703, - (q31_t)0x3d72b8d2, (q31_t)0x3ff2f884, (q31_t)0x3d7f474d, (q31_t)0x3ff3778e, - (q31_t)0x3d8bd5e1, (q31_t)0x3ff3f420, (q31_t)0x3d98648d, (q31_t)0x3ff46e3c, - (q31_t)0x3da4f351, (q31_t)0x3ff4e5e0, (q31_t)0x3db1822c, (q31_t)0x3ff55b0d, - (q31_t)0x3dbe111e, (q31_t)0x3ff5cdc3, (q31_t)0x3dcaa027, (q31_t)0x3ff63e01, - (q31_t)0x3dd72f45, (q31_t)0x3ff6abc8, (q31_t)0x3de3be78, (q31_t)0x3ff71718, - (q31_t)0x3df04dc0, (q31_t)0x3ff77ff1, (q31_t)0x3dfcdd1d, (q31_t)0x3ff7e652, - (q31_t)0x3e096c8d, (q31_t)0x3ff84a3c, (q31_t)0x3e15fc11, (q31_t)0x3ff8abae, - (q31_t)0x3e228ba7, (q31_t)0x3ff90aaa, (q31_t)0x3e2f1b50, (q31_t)0x3ff9672d, - (q31_t)0x3e3bab0b, (q31_t)0x3ff9c13a, (q31_t)0x3e483ad8, (q31_t)0x3ffa18cf, - (q31_t)0x3e54cab5, (q31_t)0x3ffa6dec, (q31_t)0x3e615aa3, (q31_t)0x3ffac092, - (q31_t)0x3e6deaa1, (q31_t)0x3ffb10c1, (q31_t)0x3e7a7aae, (q31_t)0x3ffb5e78, - (q31_t)0x3e870aca, (q31_t)0x3ffba9b8, (q31_t)0x3e939af5, (q31_t)0x3ffbf280, - (q31_t)0x3ea02b2e, (q31_t)0x3ffc38d1, (q31_t)0x3eacbb74, (q31_t)0x3ffc7caa, - (q31_t)0x3eb94bc8, (q31_t)0x3ffcbe0c, (q31_t)0x3ec5dc28, (q31_t)0x3ffcfcf6, - (q31_t)0x3ed26c94, (q31_t)0x3ffd3969, (q31_t)0x3edefd0c, (q31_t)0x3ffd7364, - (q31_t)0x3eeb8d8f, (q31_t)0x3ffdaae7, (q31_t)0x3ef81e1d, (q31_t)0x3ffddff3, - (q31_t)0x3f04aeb5, (q31_t)0x3ffe1288, (q31_t)0x3f113f56, (q31_t)0x3ffe42a4, - (q31_t)0x3f1dd001, (q31_t)0x3ffe704a, (q31_t)0x3f2a60b4, (q31_t)0x3ffe9b77, - (q31_t)0x3f36f170, (q31_t)0x3ffec42d, (q31_t)0x3f438234, (q31_t)0x3ffeea6c, - (q31_t)0x3f5012fe, (q31_t)0x3fff0e32, (q31_t)0x3f5ca3d0, (q31_t)0x3fff2f82, - (q31_t)0x3f6934a8, (q31_t)0x3fff4e59, (q31_t)0x3f75c585, (q31_t)0x3fff6ab9, - (q31_t)0x3f825668, (q31_t)0x3fff84a1, (q31_t)0x3f8ee750, (q31_t)0x3fff9c12, - (q31_t)0x3f9b783c, (q31_t)0x3fffb10b, (q31_t)0x3fa8092c, (q31_t)0x3fffc38c, - (q31_t)0x3fb49a1f, (q31_t)0x3fffd396, (q31_t)0x3fc12b16, (q31_t)0x3fffe128, - (q31_t)0x3fcdbc0f, (q31_t)0x3fffec43, (q31_t)0x3fda4d09, (q31_t)0x3ffff4e6, - (q31_t)0x3fe6de05, (q31_t)0x3ffffb11, (q31_t)0x3ff36f02, (q31_t)0x3ffffec4, -}; - - -/** - @par - Generation of realCoefBQ31 array: - @par - n = 4096 - 
for (i = 0; i < n; i++)
-  {
-     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }
- @par - Convert to fixed point Q31 format - round(pBTable[i] * pow(2, 31)) - */ - -const q31_t realCoefBQ31[8192] = { - (q31_t)0x40000000, (q31_t)0x40000000, (q31_t)0x400c90fe, (q31_t)0x3ffffec4, - (q31_t)0x401921fb, (q31_t)0x3ffffb11, (q31_t)0x4025b2f7, (q31_t)0x3ffff4e6, - (q31_t)0x403243f1, (q31_t)0x3fffec43, (q31_t)0x403ed4ea, (q31_t)0x3fffe128, - (q31_t)0x404b65e1, (q31_t)0x3fffd396, (q31_t)0x4057f6d4, (q31_t)0x3fffc38c, - (q31_t)0x406487c4, (q31_t)0x3fffb10b, (q31_t)0x407118b0, (q31_t)0x3fff9c12, - (q31_t)0x407da998, (q31_t)0x3fff84a1, (q31_t)0x408a3a7b, (q31_t)0x3fff6ab9, - (q31_t)0x4096cb58, (q31_t)0x3fff4e59, (q31_t)0x40a35c30, (q31_t)0x3fff2f82, - (q31_t)0x40afed02, (q31_t)0x3fff0e32, (q31_t)0x40bc7dcc, (q31_t)0x3ffeea6c, - (q31_t)0x40c90e90, (q31_t)0x3ffec42d, (q31_t)0x40d59f4c, (q31_t)0x3ffe9b77, - (q31_t)0x40e22fff, (q31_t)0x3ffe704a, (q31_t)0x40eec0aa, (q31_t)0x3ffe42a4, - (q31_t)0x40fb514b, (q31_t)0x3ffe1288, (q31_t)0x4107e1e3, (q31_t)0x3ffddff3, - (q31_t)0x41147271, (q31_t)0x3ffdaae7, (q31_t)0x412102f4, (q31_t)0x3ffd7364, - (q31_t)0x412d936c, (q31_t)0x3ffd3969, (q31_t)0x413a23d8, (q31_t)0x3ffcfcf6, - (q31_t)0x4146b438, (q31_t)0x3ffcbe0c, (q31_t)0x4153448c, (q31_t)0x3ffc7caa, - (q31_t)0x415fd4d2, (q31_t)0x3ffc38d1, (q31_t)0x416c650b, (q31_t)0x3ffbf280, - (q31_t)0x4178f536, (q31_t)0x3ffba9b8, (q31_t)0x41858552, (q31_t)0x3ffb5e78, - (q31_t)0x4192155f, (q31_t)0x3ffb10c1, (q31_t)0x419ea55d, (q31_t)0x3ffac092, - (q31_t)0x41ab354b, (q31_t)0x3ffa6dec, (q31_t)0x41b7c528, (q31_t)0x3ffa18cf, - (q31_t)0x41c454f5, (q31_t)0x3ff9c13a, (q31_t)0x41d0e4b0, (q31_t)0x3ff9672d, - (q31_t)0x41dd7459, (q31_t)0x3ff90aaa, (q31_t)0x41ea03ef, (q31_t)0x3ff8abae, - (q31_t)0x41f69373, (q31_t)0x3ff84a3c, (q31_t)0x420322e3, (q31_t)0x3ff7e652, - (q31_t)0x420fb240, (q31_t)0x3ff77ff1, (q31_t)0x421c4188, (q31_t)0x3ff71718, - (q31_t)0x4228d0bb, (q31_t)0x3ff6abc8, (q31_t)0x42355fd9, (q31_t)0x3ff63e01, - (q31_t)0x4241eee2, (q31_t)0x3ff5cdc3, (q31_t)0x424e7dd4, (q31_t)0x3ff55b0d, - (q31_t)0x425b0caf, (q31_t)0x3ff4e5e0, (q31_t)0x42679b73, (q31_t)0x3ff46e3c, - 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(q31_t)0x4b09cc8c, (q31_t)0xc0f586df, (q31_t)0x4afd6b8d, (q31_t)0xc0f35d3e, - (q31_t)0x4af10a22, (q31_t)0xc0f1360b, (q31_t)0x4ae4a84b, (q31_t)0xc0ef1147, - (q31_t)0x4ad84609, (q31_t)0xc0eceef1, (q31_t)0x4acbe35b, (q31_t)0xc0eacf09, - (q31_t)0x4abf8043, (q31_t)0xc0e8b190, (q31_t)0x4ab31cc1, (q31_t)0xc0e69686, - (q31_t)0x4aa6b8d5, (q31_t)0xc0e47deb, (q31_t)0x4a9a5480, (q31_t)0xc0e267be, - (q31_t)0x4a8defc3, (q31_t)0xc0e05401, (q31_t)0x4a818a9d, (q31_t)0xc0de42b2, - (q31_t)0x4a752510, (q31_t)0xc0dc33d2, (q31_t)0x4a68bf1b, (q31_t)0xc0da2762, - (q31_t)0x4a5c58c0, (q31_t)0xc0d81d61, (q31_t)0x4a4ff1fe, (q31_t)0xc0d615cf, - (q31_t)0x4a438ad7, (q31_t)0xc0d410ad, (q31_t)0x4a37234a, (q31_t)0xc0d20dfa, - (q31_t)0x4a2abb59, (q31_t)0xc0d00db6, (q31_t)0x4a1e5303, (q31_t)0xc0ce0fe3, - (q31_t)0x4a11ea49, (q31_t)0xc0cc147f, (q31_t)0x4a05812c, (q31_t)0xc0ca1b8a, - (q31_t)0x49f917ac, (q31_t)0xc0c82506, (q31_t)0x49ecadc9, (q31_t)0xc0c630f2, - (q31_t)0x49e04385, (q31_t)0xc0c43f4d, (q31_t)0x49d3d8df, (q31_t)0xc0c25019, - (q31_t)0x49c76dd8, (q31_t)0xc0c06355, (q31_t)0x49bb0271, (q31_t)0xc0be7901, - (q31_t)0x49ae96aa, (q31_t)0xc0bc911d, (q31_t)0x49a22a83, (q31_t)0xc0baabaa, - (q31_t)0x4995bdfd, (q31_t)0xc0b8c8a7, (q31_t)0x49895118, (q31_t)0xc0b6e815, - (q31_t)0x497ce3d5, (q31_t)0xc0b509f3, (q31_t)0x49707635, (q31_t)0xc0b32e42, - (q31_t)0x49640837, (q31_t)0xc0b15502, (q31_t)0x495799dd, (q31_t)0xc0af7e33, - (q31_t)0x494b2b27, (q31_t)0xc0ada9d4, (q31_t)0x493ebc14, (q31_t)0xc0abd7e6, - (q31_t)0x49324ca7, (q31_t)0xc0aa086a, (q31_t)0x4925dcdf, (q31_t)0xc0a83b5e, - (q31_t)0x49196cbc, (q31_t)0xc0a670c4, (q31_t)0x490cfc40, (q31_t)0xc0a4a89b, - (q31_t)0x49008b6a, (q31_t)0xc0a2e2e3, (q31_t)0x48f41a3c, (q31_t)0xc0a11f9d, - (q31_t)0x48e7a8b5, (q31_t)0xc09f5ec8, (q31_t)0x48db36d6, (q31_t)0xc09da065, - (q31_t)0x48cec4a0, (q31_t)0xc09be473, (q31_t)0x48c25213, (q31_t)0xc09a2af3, - (q31_t)0x48b5df30, (q31_t)0xc09873e4, (q31_t)0x48a96bf6, (q31_t)0xc096bf48, - (q31_t)0x489cf867, (q31_t)0xc0950d1d, (q31_t)0x48908483, (q31_t)0xc0935d64, - (q31_t)0x4884104b, (q31_t)0xc091b01d, (q31_t)0x48779bbe, (q31_t)0xc0900548, - (q31_t)0x486b26de, (q31_t)0xc08e5ce5, (q31_t)0x485eb1ab, (q31_t)0xc08cb6f5, - (q31_t)0x48523c25, (q31_t)0xc08b1376, (q31_t)0x4845c64d, (q31_t)0xc089726a, - (q31_t)0x48395024, (q31_t)0xc087d3d0, (q31_t)0x482cd9a9, (q31_t)0xc08637a9, - (q31_t)0x482062de, (q31_t)0xc0849df4, (q31_t)0x4813ebc2, (q31_t)0xc08306b2, - (q31_t)0x48077457, (q31_t)0xc08171e2, (q31_t)0x47fafc9c, (q31_t)0xc07fdf85, - (q31_t)0x47ee8493, (q31_t)0xc07e4f9b, (q31_t)0x47e20c3b, (q31_t)0xc07cc223, - (q31_t)0x47d59396, (q31_t)0xc07b371e, (q31_t)0x47c91aa3, (q31_t)0xc079ae8c, - (q31_t)0x47bca163, (q31_t)0xc078286e, (q31_t)0x47b027d7, (q31_t)0xc076a4c2, - (q31_t)0x47a3adff, (q31_t)0xc0752389, (q31_t)0x479733dc, (q31_t)0xc073a4c3, - (q31_t)0x478ab96e, (q31_t)0xc0722871, (q31_t)0x477e3eb5, (q31_t)0xc070ae92, - (q31_t)0x4771c3b3, (q31_t)0xc06f3726, (q31_t)0x47654867, (q31_t)0xc06dc22e, - (q31_t)0x4758ccd2, (q31_t)0xc06c4fa8, (q31_t)0x474c50f4, (q31_t)0xc06adf97, - (q31_t)0x473fd4cf, (q31_t)0xc06971f9, (q31_t)0x47335862, (q31_t)0xc06806ce, - (q31_t)0x4726dbae, (q31_t)0xc0669e18, (q31_t)0x471a5eb3, (q31_t)0xc06537d4, - (q31_t)0x470de172, (q31_t)0xc063d405, (q31_t)0x470163eb, (q31_t)0xc06272aa, - (q31_t)0x46f4e620, (q31_t)0xc06113c2, (q31_t)0x46e86810, (q31_t)0xc05fb74e, - (q31_t)0x46dbe9bb, (q31_t)0xc05e5d4e, (q31_t)0x46cf6b23, (q31_t)0xc05d05c3, - (q31_t)0x46c2ec48, (q31_t)0xc05bb0ab, (q31_t)0x46b66d29, (q31_t)0xc05a5e07, - (q31_t)0x46a9edc9, (q31_t)0xc0590dd8, (q31_t)0x469d6e27, (q31_t)0xc057c01d, - (q31_t)0x4690ee44, (q31_t)0xc05674d6, (q31_t)0x46846e1f, (q31_t)0xc0552c03, - (q31_t)0x4677edbb, (q31_t)0xc053e5a5, (q31_t)0x466b6d16, (q31_t)0xc052a1bb, - (q31_t)0x465eec33, (q31_t)0xc0516045, (q31_t)0x46526b10, (q31_t)0xc0502145, - (q31_t)0x4645e9af, (q31_t)0xc04ee4b8, (q31_t)0x46396810, (q31_t)0xc04daaa1, - (q31_t)0x462ce634, (q31_t)0xc04c72fe, (q31_t)0x4620641a, (q31_t)0xc04b3dcf, - (q31_t)0x4613e1c5, (q31_t)0xc04a0b16, (q31_t)0x46075f33, (q31_t)0xc048dad1, - (q31_t)0x45fadc66, (q31_t)0xc047ad01, (q31_t)0x45ee595d, (q31_t)0xc04681a6, - (q31_t)0x45e1d61b, (q31_t)0xc04558c0, (q31_t)0x45d5529e, (q31_t)0xc044324f, - (q31_t)0x45c8cee7, (q31_t)0xc0430e53, (q31_t)0x45bc4af8, (q31_t)0xc041eccc, - (q31_t)0x45afc6d0, (q31_t)0xc040cdba, (q31_t)0x45a3426f, (q31_t)0xc03fb11d, - (q31_t)0x4596bdd7, (q31_t)0xc03e96f6, (q31_t)0x458a3908, (q31_t)0xc03d7f44, - (q31_t)0x457db403, (q31_t)0xc03c6a07, (q31_t)0x45712ec7, (q31_t)0xc03b573f, - (q31_t)0x4564a955, (q31_t)0xc03a46ed, (q31_t)0x455823ae, (q31_t)0xc0393910, - (q31_t)0x454b9dd3, (q31_t)0xc0382da8, (q31_t)0x453f17c3, (q31_t)0xc03724b6, - (q31_t)0x4532917f, (q31_t)0xc0361e3a, (q31_t)0x45260b08, (q31_t)0xc0351a33, - (q31_t)0x4519845e, (q31_t)0xc03418a2, (q31_t)0x450cfd82, (q31_t)0xc0331986, - (q31_t)0x45007674, (q31_t)0xc0321ce0, (q31_t)0x44f3ef35, (q31_t)0xc03122b0, - (q31_t)0x44e767c5, (q31_t)0xc0302af5, (q31_t)0x44dae024, (q31_t)0xc02f35b1, - (q31_t)0x44ce5854, (q31_t)0xc02e42e2, (q31_t)0x44c1d054, (q31_t)0xc02d5289, - (q31_t)0x44b54825, (q31_t)0xc02c64a6, (q31_t)0x44a8bfc7, (q31_t)0xc02b7939, - (q31_t)0x449c373c, (q31_t)0xc02a9042, (q31_t)0x448fae83, (q31_t)0xc029a9c1, - (q31_t)0x4483259d, (q31_t)0xc028c5b6, (q31_t)0x44769c8b, (q31_t)0xc027e421, - (q31_t)0x446a134c, (q31_t)0xc0270502, (q31_t)0x445d89e2, (q31_t)0xc0262859, - (q31_t)0x4451004d, (q31_t)0xc0254e27, (q31_t)0x4444768d, (q31_t)0xc024766a, - (q31_t)0x4437eca4, (q31_t)0xc023a124, (q31_t)0x442b6290, (q31_t)0xc022ce54, - (q31_t)0x441ed854, (q31_t)0xc021fdfb, (q31_t)0x44124dee, (q31_t)0xc0213018, - (q31_t)0x4405c361, (q31_t)0xc02064ab, (q31_t)0x43f938ac, (q31_t)0xc01f9bb5, - (q31_t)0x43ecadcf, (q31_t)0xc01ed535, (q31_t)0x43e022cc, (q31_t)0xc01e112b, - (q31_t)0x43d397a3, (q31_t)0xc01d4f99, (q31_t)0x43c70c54, (q31_t)0xc01c907c, - (q31_t)0x43ba80df, (q31_t)0xc01bd3d6, (q31_t)0x43adf546, (q31_t)0xc01b19a7, - (q31_t)0x43a16988, (q31_t)0xc01a61ee, (q31_t)0x4394dda7, (q31_t)0xc019acac, - (q31_t)0x438851a2, (q31_t)0xc018f9e1, (q31_t)0x437bc57b, (q31_t)0xc018498c, - (q31_t)0x436f3931, (q31_t)0xc0179bae, (q31_t)0x4362acc5, (q31_t)0xc016f047, - (q31_t)0x43562038, (q31_t)0xc0164757, (q31_t)0x43499389, (q31_t)0xc015a0dd, - (q31_t)0x433d06bb, (q31_t)0xc014fcda, (q31_t)0x433079cc, (q31_t)0xc0145b4e, - (q31_t)0x4323ecbe, (q31_t)0xc013bc39, (q31_t)0x43175f91, (q31_t)0xc0131f9b, - (q31_t)0x430ad245, (q31_t)0xc0128574, (q31_t)0x42fe44dc, (q31_t)0xc011edc3, - (q31_t)0x42f1b755, (q31_t)0xc011588a, (q31_t)0x42e529b0, (q31_t)0xc010c5c7, - (q31_t)0x42d89bf0, (q31_t)0xc010357c, (q31_t)0x42cc0e13, (q31_t)0xc00fa7a8, - (q31_t)0x42bf801a, (q31_t)0xc00f1c4a, (q31_t)0x42b2f207, (q31_t)0xc00e9364, - (q31_t)0x42a663d8, (q31_t)0xc00e0cf5, (q31_t)0x4299d590, (q31_t)0xc00d88fd, - (q31_t)0x428d472e, (q31_t)0xc00d077c, (q31_t)0x4280b8b3, (q31_t)0xc00c8872, - (q31_t)0x42742a1f, (q31_t)0xc00c0be0, (q31_t)0x42679b73, (q31_t)0xc00b91c4, - (q31_t)0x425b0caf, (q31_t)0xc00b1a20, (q31_t)0x424e7dd4, (q31_t)0xc00aa4f3, - (q31_t)0x4241eee2, (q31_t)0xc00a323d, (q31_t)0x42355fd9, (q31_t)0xc009c1ff, - (q31_t)0x4228d0bb, (q31_t)0xc0095438, (q31_t)0x421c4188, (q31_t)0xc008e8e8, - (q31_t)0x420fb240, (q31_t)0xc008800f, (q31_t)0x420322e3, (q31_t)0xc00819ae, - (q31_t)0x41f69373, (q31_t)0xc007b5c4, (q31_t)0x41ea03ef, (q31_t)0xc0075452, - (q31_t)0x41dd7459, (q31_t)0xc006f556, (q31_t)0x41d0e4b0, (q31_t)0xc00698d3, - (q31_t)0x41c454f5, (q31_t)0xc0063ec6, (q31_t)0x41b7c528, (q31_t)0xc005e731, - (q31_t)0x41ab354b, (q31_t)0xc0059214, (q31_t)0x419ea55d, (q31_t)0xc0053f6e, - (q31_t)0x4192155f, (q31_t)0xc004ef3f, (q31_t)0x41858552, (q31_t)0xc004a188, - (q31_t)0x4178f536, (q31_t)0xc0045648, (q31_t)0x416c650b, (q31_t)0xc0040d80, - (q31_t)0x415fd4d2, (q31_t)0xc003c72f, (q31_t)0x4153448c, (q31_t)0xc0038356, - (q31_t)0x4146b438, (q31_t)0xc00341f4, (q31_t)0x413a23d8, (q31_t)0xc003030a, - (q31_t)0x412d936c, (q31_t)0xc002c697, (q31_t)0x412102f4, (q31_t)0xc0028c9c, - (q31_t)0x41147271, (q31_t)0xc0025519, (q31_t)0x4107e1e3, (q31_t)0xc002200d, - (q31_t)0x40fb514b, (q31_t)0xc001ed78, (q31_t)0x40eec0aa, (q31_t)0xc001bd5c, - (q31_t)0x40e22fff, (q31_t)0xc0018fb6, (q31_t)0x40d59f4c, (q31_t)0xc0016489, - (q31_t)0x40c90e90, (q31_t)0xc0013bd3, (q31_t)0x40bc7dcc, (q31_t)0xc0011594, - (q31_t)0x40afed02, (q31_t)0xc000f1ce, (q31_t)0x40a35c30, (q31_t)0xc000d07e, - (q31_t)0x4096cb58, (q31_t)0xc000b1a7, (q31_t)0x408a3a7b, (q31_t)0xc0009547, - (q31_t)0x407da998, (q31_t)0xc0007b5f, (q31_t)0x407118b0, (q31_t)0xc00063ee, - (q31_t)0x406487c4, (q31_t)0xc0004ef5, (q31_t)0x4057f6d4, (q31_t)0xc0003c74, - (q31_t)0x404b65e1, (q31_t)0xc0002c6a, (q31_t)0x403ed4ea, (q31_t)0xc0001ed8, - (q31_t)0x403243f1, (q31_t)0xc00013bd, (q31_t)0x4025b2f7, (q31_t)0xc0000b1a, - (q31_t)0x401921fb, (q31_t)0xc00004ef, (q31_t)0x400c90fe, (q31_t)0xc000013c, -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15) -/** - @par - Generation fixed-point realCoefAQ15 array in Q15 format: - @par - n = 4096 - 
for (i = 0; i < n; i++)
-  {
-     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }
- @par - Convert to fixed point Q15 format - round(pATable[i] * pow(2, 15)) - */ -const q15_t __ALIGNED(4) realCoefAQ15[8192] = { - (q15_t)0x4000, (q15_t)0xc000, (q15_t)0x3ff3, (q15_t)0xc000, (q15_t)0x3fe7, (q15_t)0xc000, (q15_t)0x3fda, (q15_t)0xc000, - (q15_t)0x3fce, (q15_t)0xc000, (q15_t)0x3fc1, (q15_t)0xc000, (q15_t)0x3fb5, (q15_t)0xc000, (q15_t)0x3fa8, (q15_t)0xc000, - (q15_t)0x3f9b, (q15_t)0xc000, (q15_t)0x3f8f, (q15_t)0xc000, (q15_t)0x3f82, (q15_t)0xc000, (q15_t)0x3f76, (q15_t)0xc001, - (q15_t)0x3f69, (q15_t)0xc001, (q15_t)0x3f5d, (q15_t)0xc001, (q15_t)0x3f50, (q15_t)0xc001, (q15_t)0x3f44, (q15_t)0xc001, - (q15_t)0x3f37, (q15_t)0xc001, (q15_t)0x3f2a, (q15_t)0xc001, (q15_t)0x3f1e, (q15_t)0xc002, (q15_t)0x3f11, (q15_t)0xc002, - (q15_t)0x3f05, (q15_t)0xc002, (q15_t)0x3ef8, (q15_t)0xc002, (q15_t)0x3eec, (q15_t)0xc002, (q15_t)0x3edf, (q15_t)0xc003, - (q15_t)0x3ed2, (q15_t)0xc003, (q15_t)0x3ec6, (q15_t)0xc003, (q15_t)0x3eb9, (q15_t)0xc003, (q15_t)0x3ead, (q15_t)0xc004, - (q15_t)0x3ea0, (q15_t)0xc004, (q15_t)0x3e94, (q15_t)0xc004, (q15_t)0x3e87, (q15_t)0xc004, (q15_t)0x3e7a, (q15_t)0xc005, - (q15_t)0x3e6e, (q15_t)0xc005, (q15_t)0x3e61, (q15_t)0xc005, (q15_t)0x3e55, (q15_t)0xc006, (q15_t)0x3e48, (q15_t)0xc006, - (q15_t)0x3e3c, (q15_t)0xc006, (q15_t)0x3e2f, (q15_t)0xc007, (q15_t)0x3e23, (q15_t)0xc007, (q15_t)0x3e16, (q15_t)0xc007, - (q15_t)0x3e09, (q15_t)0xc008, (q15_t)0x3dfd, (q15_t)0xc008, (q15_t)0x3df0, (q15_t)0xc009, (q15_t)0x3de4, (q15_t)0xc009, - (q15_t)0x3dd7, (q15_t)0xc009, (q15_t)0x3dcb, (q15_t)0xc00a, (q15_t)0x3dbe, (q15_t)0xc00a, (q15_t)0x3db2, (q15_t)0xc00b, - (q15_t)0x3da5, (q15_t)0xc00b, (q15_t)0x3d98, (q15_t)0xc00c, (q15_t)0x3d8c, (q15_t)0xc00c, (q15_t)0x3d7f, (q15_t)0xc00d, - (q15_t)0x3d73, (q15_t)0xc00d, (q15_t)0x3d66, (q15_t)0xc00e, (q15_t)0x3d5a, (q15_t)0xc00e, (q15_t)0x3d4d, (q15_t)0xc00f, - (q15_t)0x3d40, (q15_t)0xc00f, (q15_t)0x3d34, (q15_t)0xc010, (q15_t)0x3d27, (q15_t)0xc010, (q15_t)0x3d1b, (q15_t)0xc011, - (q15_t)0x3d0e, (q15_t)0xc011, (q15_t)0x3d02, (q15_t)0xc012, (q15_t)0x3cf5, (q15_t)0xc013, (q15_t)0x3ce9, (q15_t)0xc013, - (q15_t)0x3cdc, (q15_t)0xc014, (q15_t)0x3cd0, (q15_t)0xc014, (q15_t)0x3cc3, (q15_t)0xc015, (q15_t)0x3cb6, (q15_t)0xc016, - (q15_t)0x3caa, (q15_t)0xc016, (q15_t)0x3c9d, (q15_t)0xc017, (q15_t)0x3c91, (q15_t)0xc018, (q15_t)0x3c84, (q15_t)0xc018, - (q15_t)0x3c78, (q15_t)0xc019, (q15_t)0x3c6b, (q15_t)0xc01a, (q15_t)0x3c5f, (q15_t)0xc01a, (q15_t)0x3c52, (q15_t)0xc01b, - (q15_t)0x3c45, (q15_t)0xc01c, (q15_t)0x3c39, (q15_t)0xc01d, (q15_t)0x3c2c, (q15_t)0xc01d, (q15_t)0x3c20, (q15_t)0xc01e, - (q15_t)0x3c13, (q15_t)0xc01f, (q15_t)0x3c07, (q15_t)0xc020, (q15_t)0x3bfa, (q15_t)0xc020, (q15_t)0x3bee, (q15_t)0xc021, - (q15_t)0x3be1, (q15_t)0xc022, (q15_t)0x3bd5, (q15_t)0xc023, (q15_t)0x3bc8, (q15_t)0xc024, (q15_t)0x3bbc, (q15_t)0xc024, - (q15_t)0x3baf, (q15_t)0xc025, (q15_t)0x3ba2, (q15_t)0xc026, (q15_t)0x3b96, (q15_t)0xc027, (q15_t)0x3b89, (q15_t)0xc028, - (q15_t)0x3b7d, (q15_t)0xc029, (q15_t)0x3b70, (q15_t)0xc02a, (q15_t)0x3b64, (q15_t)0xc02b, (q15_t)0x3b57, (q15_t)0xc02b, - (q15_t)0x3b4b, (q15_t)0xc02c, (q15_t)0x3b3e, (q15_t)0xc02d, (q15_t)0x3b32, (q15_t)0xc02e, (q15_t)0x3b25, (q15_t)0xc02f, - (q15_t)0x3b19, (q15_t)0xc030, (q15_t)0x3b0c, (q15_t)0xc031, (q15_t)0x3b00, (q15_t)0xc032, (q15_t)0x3af3, (q15_t)0xc033, - (q15_t)0x3ae6, (q15_t)0xc034, (q15_t)0x3ada, (q15_t)0xc035, (q15_t)0x3acd, (q15_t)0xc036, (q15_t)0x3ac1, (q15_t)0xc037, - (q15_t)0x3ab4, (q15_t)0xc038, (q15_t)0x3aa8, (q15_t)0xc039, (q15_t)0x3a9b, (q15_t)0xc03a, (q15_t)0x3a8f, (q15_t)0xc03b, - (q15_t)0x3a82, (q15_t)0xc03c, (q15_t)0x3a76, (q15_t)0xc03d, (q15_t)0x3a69, (q15_t)0xc03f, (q15_t)0x3a5d, (q15_t)0xc040, - (q15_t)0x3a50, (q15_t)0xc041, (q15_t)0x3a44, (q15_t)0xc042, (q15_t)0x3a37, (q15_t)0xc043, (q15_t)0x3a2b, (q15_t)0xc044, - (q15_t)0x3a1e, (q15_t)0xc045, (q15_t)0x3a12, (q15_t)0xc047, (q15_t)0x3a05, (q15_t)0xc048, (q15_t)0x39f9, (q15_t)0xc049, - (q15_t)0x39ec, (q15_t)0xc04a, (q15_t)0x39e0, (q15_t)0xc04b, (q15_t)0x39d3, (q15_t)0xc04c, (q15_t)0x39c7, (q15_t)0xc04e, - (q15_t)0x39ba, (q15_t)0xc04f, (q15_t)0x39ae, (q15_t)0xc050, (q15_t)0x39a1, (q15_t)0xc051, (q15_t)0x3995, (q15_t)0xc053, - (q15_t)0x3988, (q15_t)0xc054, (q15_t)0x397c, (q15_t)0xc055, (q15_t)0x396f, (q15_t)0xc056, (q15_t)0x3963, (q15_t)0xc058, - (q15_t)0x3956, (q15_t)0xc059, (q15_t)0x394a, (q15_t)0xc05a, (q15_t)0x393d, (q15_t)0xc05c, (q15_t)0x3931, (q15_t)0xc05d, - (q15_t)0x3924, (q15_t)0xc05e, (q15_t)0x3918, (q15_t)0xc060, (q15_t)0x390b, (q15_t)0xc061, (q15_t)0x38ff, (q15_t)0xc062, - (q15_t)0x38f2, (q15_t)0xc064, (q15_t)0x38e6, (q15_t)0xc065, (q15_t)0x38d9, (q15_t)0xc067, (q15_t)0x38cd, (q15_t)0xc068, - (q15_t)0x38c0, (q15_t)0xc069, (q15_t)0x38b4, (q15_t)0xc06b, (q15_t)0x38a7, (q15_t)0xc06c, (q15_t)0x389b, (q15_t)0xc06e, - (q15_t)0x388e, (q15_t)0xc06f, (q15_t)0x3882, (q15_t)0xc071, (q15_t)0x3875, (q15_t)0xc072, (q15_t)0x3869, (q15_t)0xc074, - (q15_t)0x385c, (q15_t)0xc075, (q15_t)0x3850, (q15_t)0xc077, (q15_t)0x3843, (q15_t)0xc078, (q15_t)0x3837, (q15_t)0xc07a, - (q15_t)0x382a, (q15_t)0xc07b, (q15_t)0x381e, (q15_t)0xc07d, (q15_t)0x3811, (q15_t)0xc07e, (q15_t)0x3805, (q15_t)0xc080, - (q15_t)0x37f9, (q15_t)0xc081, (q15_t)0x37ec, (q15_t)0xc083, (q15_t)0x37e0, (q15_t)0xc085, (q15_t)0x37d3, (q15_t)0xc086, - (q15_t)0x37c7, (q15_t)0xc088, (q15_t)0x37ba, (q15_t)0xc089, (q15_t)0x37ae, (q15_t)0xc08b, (q15_t)0x37a1, (q15_t)0xc08d, - (q15_t)0x3795, (q15_t)0xc08e, (q15_t)0x3788, (q15_t)0xc090, (q15_t)0x377c, (q15_t)0xc092, (q15_t)0x376f, (q15_t)0xc093, - (q15_t)0x3763, (q15_t)0xc095, (q15_t)0x3757, (q15_t)0xc097, (q15_t)0x374a, (q15_t)0xc098, (q15_t)0x373e, (q15_t)0xc09a, - (q15_t)0x3731, (q15_t)0xc09c, (q15_t)0x3725, (q15_t)0xc09e, (q15_t)0x3718, (q15_t)0xc09f, (q15_t)0x370c, (q15_t)0xc0a1, - (q15_t)0x36ff, (q15_t)0xc0a3, (q15_t)0x36f3, (q15_t)0xc0a5, (q15_t)0x36e7, (q15_t)0xc0a6, (q15_t)0x36da, (q15_t)0xc0a8, - (q15_t)0x36ce, (q15_t)0xc0aa, (q15_t)0x36c1, (q15_t)0xc0ac, (q15_t)0x36b5, (q15_t)0xc0ae, (q15_t)0x36a8, (q15_t)0xc0af, - (q15_t)0x369c, (q15_t)0xc0b1, (q15_t)0x3690, (q15_t)0xc0b3, (q15_t)0x3683, (q15_t)0xc0b5, (q15_t)0x3677, (q15_t)0xc0b7, - (q15_t)0x366a, (q15_t)0xc0b9, (q15_t)0x365e, (q15_t)0xc0bb, (q15_t)0x3651, (q15_t)0xc0bd, (q15_t)0x3645, (q15_t)0xc0be, - (q15_t)0x3639, (q15_t)0xc0c0, (q15_t)0x362c, (q15_t)0xc0c2, (q15_t)0x3620, (q15_t)0xc0c4, (q15_t)0x3613, (q15_t)0xc0c6, - (q15_t)0x3607, (q15_t)0xc0c8, (q15_t)0x35fa, (q15_t)0xc0ca, (q15_t)0x35ee, (q15_t)0xc0cc, (q15_t)0x35e2, (q15_t)0xc0ce, - (q15_t)0x35d5, (q15_t)0xc0d0, (q15_t)0x35c9, (q15_t)0xc0d2, (q15_t)0x35bc, (q15_t)0xc0d4, (q15_t)0x35b0, (q15_t)0xc0d6, - (q15_t)0x35a4, (q15_t)0xc0d8, (q15_t)0x3597, (q15_t)0xc0da, (q15_t)0x358b, (q15_t)0xc0dc, (q15_t)0x357e, (q15_t)0xc0de, - (q15_t)0x3572, (q15_t)0xc0e0, (q15_t)0x3566, (q15_t)0xc0e2, (q15_t)0x3559, (q15_t)0xc0e4, (q15_t)0x354d, (q15_t)0xc0e7, - (q15_t)0x3540, (q15_t)0xc0e9, (q15_t)0x3534, (q15_t)0xc0eb, (q15_t)0x3528, (q15_t)0xc0ed, (q15_t)0x351b, (q15_t)0xc0ef, - (q15_t)0x350f, (q15_t)0xc0f1, (q15_t)0x3503, (q15_t)0xc0f3, (q15_t)0x34f6, (q15_t)0xc0f6, (q15_t)0x34ea, (q15_t)0xc0f8, - (q15_t)0x34dd, (q15_t)0xc0fa, (q15_t)0x34d1, (q15_t)0xc0fc, (q15_t)0x34c5, (q15_t)0xc0fe, (q15_t)0x34b8, (q15_t)0xc100, - (q15_t)0x34ac, (q15_t)0xc103, (q15_t)0x34a0, (q15_t)0xc105, (q15_t)0x3493, (q15_t)0xc107, (q15_t)0x3487, (q15_t)0xc109, - (q15_t)0x347b, (q15_t)0xc10c, (q15_t)0x346e, (q15_t)0xc10e, (q15_t)0x3462, (q15_t)0xc110, (q15_t)0x3455, (q15_t)0xc113, - (q15_t)0x3449, (q15_t)0xc115, (q15_t)0x343d, (q15_t)0xc117, (q15_t)0x3430, (q15_t)0xc119, (q15_t)0x3424, (q15_t)0xc11c, - (q15_t)0x3418, (q15_t)0xc11e, (q15_t)0x340b, (q15_t)0xc120, (q15_t)0x33ff, (q15_t)0xc123, (q15_t)0x33f3, (q15_t)0xc125, - (q15_t)0x33e6, (q15_t)0xc128, (q15_t)0x33da, (q15_t)0xc12a, (q15_t)0x33ce, (q15_t)0xc12c, (q15_t)0x33c1, (q15_t)0xc12f, - (q15_t)0x33b5, (q15_t)0xc131, (q15_t)0x33a9, (q15_t)0xc134, (q15_t)0x339c, (q15_t)0xc136, (q15_t)0x3390, (q15_t)0xc138, - (q15_t)0x3384, (q15_t)0xc13b, (q15_t)0x3377, (q15_t)0xc13d, (q15_t)0x336b, (q15_t)0xc140, (q15_t)0x335f, (q15_t)0xc142, - (q15_t)0x3352, (q15_t)0xc145, (q15_t)0x3346, (q15_t)0xc147, (q15_t)0x333a, (q15_t)0xc14a, (q15_t)0x332d, (q15_t)0xc14c, - (q15_t)0x3321, (q15_t)0xc14f, (q15_t)0x3315, (q15_t)0xc151, (q15_t)0x3308, (q15_t)0xc154, (q15_t)0x32fc, (q15_t)0xc156, - (q15_t)0x32f0, (q15_t)0xc159, (q15_t)0x32e4, (q15_t)0xc15b, (q15_t)0x32d7, (q15_t)0xc15e, (q15_t)0x32cb, (q15_t)0xc161, - (q15_t)0x32bf, (q15_t)0xc163, (q15_t)0x32b2, (q15_t)0xc166, (q15_t)0x32a6, (q15_t)0xc168, (q15_t)0x329a, (q15_t)0xc16b, - (q15_t)0x328e, (q15_t)0xc16e, (q15_t)0x3281, (q15_t)0xc170, (q15_t)0x3275, (q15_t)0xc173, (q15_t)0x3269, (q15_t)0xc176, - (q15_t)0x325c, (q15_t)0xc178, (q15_t)0x3250, (q15_t)0xc17b, (q15_t)0x3244, (q15_t)0xc17e, (q15_t)0x3238, (q15_t)0xc180, - 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(q15_t)0x3540, (q15_t)0x3f17, (q15_t)0x354d, (q15_t)0x3f19, (q15_t)0x3559, (q15_t)0x3f1c, (q15_t)0x3566, (q15_t)0x3f1e, - (q15_t)0x3572, (q15_t)0x3f20, (q15_t)0x357e, (q15_t)0x3f22, (q15_t)0x358b, (q15_t)0x3f24, (q15_t)0x3597, (q15_t)0x3f26, - (q15_t)0x35a4, (q15_t)0x3f28, (q15_t)0x35b0, (q15_t)0x3f2a, (q15_t)0x35bc, (q15_t)0x3f2c, (q15_t)0x35c9, (q15_t)0x3f2e, - (q15_t)0x35d5, (q15_t)0x3f30, (q15_t)0x35e2, (q15_t)0x3f32, (q15_t)0x35ee, (q15_t)0x3f34, (q15_t)0x35fa, (q15_t)0x3f36, - (q15_t)0x3607, (q15_t)0x3f38, (q15_t)0x3613, (q15_t)0x3f3a, (q15_t)0x3620, (q15_t)0x3f3c, (q15_t)0x362c, (q15_t)0x3f3e, - (q15_t)0x3639, (q15_t)0x3f40, (q15_t)0x3645, (q15_t)0x3f42, (q15_t)0x3651, (q15_t)0x3f43, (q15_t)0x365e, (q15_t)0x3f45, - (q15_t)0x366a, (q15_t)0x3f47, (q15_t)0x3677, (q15_t)0x3f49, (q15_t)0x3683, (q15_t)0x3f4b, (q15_t)0x3690, (q15_t)0x3f4d, - (q15_t)0x369c, (q15_t)0x3f4f, (q15_t)0x36a8, (q15_t)0x3f51, (q15_t)0x36b5, (q15_t)0x3f52, (q15_t)0x36c1, (q15_t)0x3f54, - (q15_t)0x36ce, (q15_t)0x3f56, (q15_t)0x36da, (q15_t)0x3f58, (q15_t)0x36e7, (q15_t)0x3f5a, (q15_t)0x36f3, (q15_t)0x3f5b, - (q15_t)0x36ff, (q15_t)0x3f5d, (q15_t)0x370c, (q15_t)0x3f5f, (q15_t)0x3718, (q15_t)0x3f61, (q15_t)0x3725, (q15_t)0x3f62, - (q15_t)0x3731, (q15_t)0x3f64, (q15_t)0x373e, (q15_t)0x3f66, (q15_t)0x374a, (q15_t)0x3f68, (q15_t)0x3757, (q15_t)0x3f69, - (q15_t)0x3763, (q15_t)0x3f6b, (q15_t)0x376f, (q15_t)0x3f6d, (q15_t)0x377c, (q15_t)0x3f6e, (q15_t)0x3788, (q15_t)0x3f70, - (q15_t)0x3795, (q15_t)0x3f72, (q15_t)0x37a1, (q15_t)0x3f73, (q15_t)0x37ae, (q15_t)0x3f75, (q15_t)0x37ba, (q15_t)0x3f77, - (q15_t)0x37c7, (q15_t)0x3f78, (q15_t)0x37d3, (q15_t)0x3f7a, (q15_t)0x37e0, (q15_t)0x3f7b, (q15_t)0x37ec, (q15_t)0x3f7d, - (q15_t)0x37f9, (q15_t)0x3f7f, (q15_t)0x3805, (q15_t)0x3f80, (q15_t)0x3811, (q15_t)0x3f82, (q15_t)0x381e, (q15_t)0x3f83, - (q15_t)0x382a, (q15_t)0x3f85, (q15_t)0x3837, (q15_t)0x3f86, (q15_t)0x3843, (q15_t)0x3f88, (q15_t)0x3850, (q15_t)0x3f89, - (q15_t)0x385c, (q15_t)0x3f8b, (q15_t)0x3869, (q15_t)0x3f8c, (q15_t)0x3875, (q15_t)0x3f8e, (q15_t)0x3882, (q15_t)0x3f8f, - (q15_t)0x388e, (q15_t)0x3f91, (q15_t)0x389b, (q15_t)0x3f92, (q15_t)0x38a7, (q15_t)0x3f94, (q15_t)0x38b4, (q15_t)0x3f95, - (q15_t)0x38c0, (q15_t)0x3f97, (q15_t)0x38cd, (q15_t)0x3f98, (q15_t)0x38d9, (q15_t)0x3f99, (q15_t)0x38e6, (q15_t)0x3f9b, - (q15_t)0x38f2, (q15_t)0x3f9c, (q15_t)0x38ff, (q15_t)0x3f9e, (q15_t)0x390b, (q15_t)0x3f9f, (q15_t)0x3918, (q15_t)0x3fa0, - (q15_t)0x3924, (q15_t)0x3fa2, (q15_t)0x3931, (q15_t)0x3fa3, (q15_t)0x393d, (q15_t)0x3fa4, (q15_t)0x394a, (q15_t)0x3fa6, - (q15_t)0x3956, (q15_t)0x3fa7, (q15_t)0x3963, (q15_t)0x3fa8, (q15_t)0x396f, (q15_t)0x3faa, (q15_t)0x397c, (q15_t)0x3fab, - (q15_t)0x3988, (q15_t)0x3fac, (q15_t)0x3995, (q15_t)0x3fad, (q15_t)0x39a1, (q15_t)0x3faf, (q15_t)0x39ae, (q15_t)0x3fb0, - (q15_t)0x39ba, (q15_t)0x3fb1, (q15_t)0x39c7, (q15_t)0x3fb2, (q15_t)0x39d3, (q15_t)0x3fb4, (q15_t)0x39e0, (q15_t)0x3fb5, - (q15_t)0x39ec, (q15_t)0x3fb6, (q15_t)0x39f9, (q15_t)0x3fb7, (q15_t)0x3a05, (q15_t)0x3fb8, (q15_t)0x3a12, (q15_t)0x3fb9, - (q15_t)0x3a1e, (q15_t)0x3fbb, (q15_t)0x3a2b, (q15_t)0x3fbc, (q15_t)0x3a37, (q15_t)0x3fbd, (q15_t)0x3a44, (q15_t)0x3fbe, - (q15_t)0x3a50, (q15_t)0x3fbf, (q15_t)0x3a5d, (q15_t)0x3fc0, (q15_t)0x3a69, (q15_t)0x3fc1, (q15_t)0x3a76, (q15_t)0x3fc3, - (q15_t)0x3a82, (q15_t)0x3fc4, (q15_t)0x3a8f, (q15_t)0x3fc5, (q15_t)0x3a9b, (q15_t)0x3fc6, (q15_t)0x3aa8, (q15_t)0x3fc7, - (q15_t)0x3ab4, (q15_t)0x3fc8, (q15_t)0x3ac1, (q15_t)0x3fc9, (q15_t)0x3acd, (q15_t)0x3fca, (q15_t)0x3ada, (q15_t)0x3fcb, - (q15_t)0x3ae6, (q15_t)0x3fcc, (q15_t)0x3af3, (q15_t)0x3fcd, (q15_t)0x3b00, (q15_t)0x3fce, (q15_t)0x3b0c, (q15_t)0x3fcf, - (q15_t)0x3b19, (q15_t)0x3fd0, (q15_t)0x3b25, (q15_t)0x3fd1, (q15_t)0x3b32, (q15_t)0x3fd2, (q15_t)0x3b3e, (q15_t)0x3fd3, - (q15_t)0x3b4b, (q15_t)0x3fd4, (q15_t)0x3b57, (q15_t)0x3fd5, (q15_t)0x3b64, (q15_t)0x3fd5, (q15_t)0x3b70, (q15_t)0x3fd6, - (q15_t)0x3b7d, (q15_t)0x3fd7, (q15_t)0x3b89, (q15_t)0x3fd8, (q15_t)0x3b96, (q15_t)0x3fd9, (q15_t)0x3ba2, (q15_t)0x3fda, - (q15_t)0x3baf, (q15_t)0x3fdb, (q15_t)0x3bbc, (q15_t)0x3fdc, (q15_t)0x3bc8, (q15_t)0x3fdc, (q15_t)0x3bd5, (q15_t)0x3fdd, - (q15_t)0x3be1, (q15_t)0x3fde, (q15_t)0x3bee, (q15_t)0x3fdf, (q15_t)0x3bfa, (q15_t)0x3fe0, (q15_t)0x3c07, (q15_t)0x3fe0, - (q15_t)0x3c13, (q15_t)0x3fe1, (q15_t)0x3c20, (q15_t)0x3fe2, (q15_t)0x3c2c, (q15_t)0x3fe3, (q15_t)0x3c39, (q15_t)0x3fe3, - (q15_t)0x3c45, (q15_t)0x3fe4, (q15_t)0x3c52, (q15_t)0x3fe5, (q15_t)0x3c5f, (q15_t)0x3fe6, (q15_t)0x3c6b, (q15_t)0x3fe6, - (q15_t)0x3c78, (q15_t)0x3fe7, (q15_t)0x3c84, (q15_t)0x3fe8, (q15_t)0x3c91, (q15_t)0x3fe8, (q15_t)0x3c9d, (q15_t)0x3fe9, - (q15_t)0x3caa, (q15_t)0x3fea, (q15_t)0x3cb6, (q15_t)0x3fea, (q15_t)0x3cc3, (q15_t)0x3feb, (q15_t)0x3cd0, (q15_t)0x3fec, - (q15_t)0x3cdc, (q15_t)0x3fec, (q15_t)0x3ce9, (q15_t)0x3fed, (q15_t)0x3cf5, (q15_t)0x3fed, (q15_t)0x3d02, (q15_t)0x3fee, - (q15_t)0x3d0e, (q15_t)0x3fef, (q15_t)0x3d1b, (q15_t)0x3fef, (q15_t)0x3d27, (q15_t)0x3ff0, (q15_t)0x3d34, (q15_t)0x3ff0, - (q15_t)0x3d40, (q15_t)0x3ff1, (q15_t)0x3d4d, (q15_t)0x3ff1, (q15_t)0x3d5a, (q15_t)0x3ff2, (q15_t)0x3d66, (q15_t)0x3ff2, - (q15_t)0x3d73, (q15_t)0x3ff3, (q15_t)0x3d7f, (q15_t)0x3ff3, (q15_t)0x3d8c, (q15_t)0x3ff4, (q15_t)0x3d98, (q15_t)0x3ff4, - (q15_t)0x3da5, (q15_t)0x3ff5, (q15_t)0x3db2, (q15_t)0x3ff5, (q15_t)0x3dbe, (q15_t)0x3ff6, (q15_t)0x3dcb, (q15_t)0x3ff6, - (q15_t)0x3dd7, (q15_t)0x3ff7, (q15_t)0x3de4, (q15_t)0x3ff7, (q15_t)0x3df0, (q15_t)0x3ff7, (q15_t)0x3dfd, (q15_t)0x3ff8, - (q15_t)0x3e09, (q15_t)0x3ff8, (q15_t)0x3e16, (q15_t)0x3ff9, (q15_t)0x3e23, (q15_t)0x3ff9, (q15_t)0x3e2f, (q15_t)0x3ff9, - (q15_t)0x3e3c, (q15_t)0x3ffa, (q15_t)0x3e48, (q15_t)0x3ffa, (q15_t)0x3e55, (q15_t)0x3ffa, (q15_t)0x3e61, (q15_t)0x3ffb, - (q15_t)0x3e6e, (q15_t)0x3ffb, (q15_t)0x3e7a, (q15_t)0x3ffb, (q15_t)0x3e87, (q15_t)0x3ffc, (q15_t)0x3e94, (q15_t)0x3ffc, - (q15_t)0x3ea0, (q15_t)0x3ffc, (q15_t)0x3ead, (q15_t)0x3ffc, (q15_t)0x3eb9, (q15_t)0x3ffd, (q15_t)0x3ec6, (q15_t)0x3ffd, - (q15_t)0x3ed2, (q15_t)0x3ffd, (q15_t)0x3edf, (q15_t)0x3ffd, (q15_t)0x3eec, (q15_t)0x3ffe, (q15_t)0x3ef8, (q15_t)0x3ffe, - (q15_t)0x3f05, (q15_t)0x3ffe, (q15_t)0x3f11, (q15_t)0x3ffe, (q15_t)0x3f1e, (q15_t)0x3ffe, (q15_t)0x3f2a, (q15_t)0x3fff, - (q15_t)0x3f37, (q15_t)0x3fff, (q15_t)0x3f44, (q15_t)0x3fff, (q15_t)0x3f50, (q15_t)0x3fff, (q15_t)0x3f5d, (q15_t)0x3fff, - (q15_t)0x3f69, (q15_t)0x3fff, (q15_t)0x3f76, (q15_t)0x3fff, (q15_t)0x3f82, (q15_t)0x4000, (q15_t)0x3f8f, (q15_t)0x4000, - (q15_t)0x3f9b, (q15_t)0x4000, (q15_t)0x3fa8, (q15_t)0x4000, (q15_t)0x3fb5, (q15_t)0x4000, (q15_t)0x3fc1, (q15_t)0x4000, - (q15_t)0x3fce, (q15_t)0x4000, (q15_t)0x3fda, (q15_t)0x4000, (q15_t)0x3fe7, (q15_t)0x4000, (q15_t)0x3ff3, (q15_t)0x4000, -}; - -/** - @par - Generation of real_CoefB array: - @par - n = 4096 - 
for (i = 0; i < n; i++)
-  {
-     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }
- @par - Convert to fixed point Q15 format - round(pBTable[i] * pow(2, 15)) -*/ -const q15_t __ALIGNED(4) realCoefBQ15[8192] = { - (q15_t)0x4000, (q15_t)0x4000, (q15_t)0x400d, (q15_t)0x4000, (q15_t)0x4019, (q15_t)0x4000, (q15_t)0x4026, (q15_t)0x4000, - (q15_t)0x4032, (q15_t)0x4000, (q15_t)0x403f, (q15_t)0x4000, (q15_t)0x404b, (q15_t)0x4000, (q15_t)0x4058, (q15_t)0x4000, - (q15_t)0x4065, (q15_t)0x4000, (q15_t)0x4071, (q15_t)0x4000, (q15_t)0x407e, (q15_t)0x4000, (q15_t)0x408a, (q15_t)0x3fff, - (q15_t)0x4097, (q15_t)0x3fff, (q15_t)0x40a3, (q15_t)0x3fff, (q15_t)0x40b0, (q15_t)0x3fff, (q15_t)0x40bc, (q15_t)0x3fff, - (q15_t)0x40c9, (q15_t)0x3fff, (q15_t)0x40d6, (q15_t)0x3fff, (q15_t)0x40e2, (q15_t)0x3ffe, (q15_t)0x40ef, (q15_t)0x3ffe, - (q15_t)0x40fb, (q15_t)0x3ffe, (q15_t)0x4108, (q15_t)0x3ffe, (q15_t)0x4114, (q15_t)0x3ffe, (q15_t)0x4121, (q15_t)0x3ffd, - (q15_t)0x412e, (q15_t)0x3ffd, (q15_t)0x413a, (q15_t)0x3ffd, (q15_t)0x4147, (q15_t)0x3ffd, (q15_t)0x4153, (q15_t)0x3ffc, - (q15_t)0x4160, (q15_t)0x3ffc, (q15_t)0x416c, (q15_t)0x3ffc, (q15_t)0x4179, (q15_t)0x3ffc, (q15_t)0x4186, (q15_t)0x3ffb, - (q15_t)0x4192, (q15_t)0x3ffb, (q15_t)0x419f, (q15_t)0x3ffb, (q15_t)0x41ab, (q15_t)0x3ffa, (q15_t)0x41b8, (q15_t)0x3ffa, - (q15_t)0x41c4, (q15_t)0x3ffa, (q15_t)0x41d1, (q15_t)0x3ff9, (q15_t)0x41dd, (q15_t)0x3ff9, (q15_t)0x41ea, (q15_t)0x3ff9, - (q15_t)0x41f7, (q15_t)0x3ff8, (q15_t)0x4203, (q15_t)0x3ff8, (q15_t)0x4210, (q15_t)0x3ff7, (q15_t)0x421c, (q15_t)0x3ff7, - (q15_t)0x4229, (q15_t)0x3ff7, (q15_t)0x4235, (q15_t)0x3ff6, (q15_t)0x4242, (q15_t)0x3ff6, (q15_t)0x424e, (q15_t)0x3ff5, - (q15_t)0x425b, (q15_t)0x3ff5, (q15_t)0x4268, (q15_t)0x3ff4, (q15_t)0x4274, (q15_t)0x3ff4, (q15_t)0x4281, (q15_t)0x3ff3, - (q15_t)0x428d, (q15_t)0x3ff3, (q15_t)0x429a, (q15_t)0x3ff2, (q15_t)0x42a6, (q15_t)0x3ff2, (q15_t)0x42b3, (q15_t)0x3ff1, - (q15_t)0x42c0, (q15_t)0x3ff1, (q15_t)0x42cc, (q15_t)0x3ff0, (q15_t)0x42d9, (q15_t)0x3ff0, (q15_t)0x42e5, (q15_t)0x3fef, - (q15_t)0x42f2, (q15_t)0x3fef, (q15_t)0x42fe, (q15_t)0x3fee, (q15_t)0x430b, (q15_t)0x3fed, (q15_t)0x4317, (q15_t)0x3fed, - (q15_t)0x4324, (q15_t)0x3fec, (q15_t)0x4330, (q15_t)0x3fec, (q15_t)0x433d, (q15_t)0x3feb, (q15_t)0x434a, (q15_t)0x3fea, - (q15_t)0x4356, (q15_t)0x3fea, (q15_t)0x4363, (q15_t)0x3fe9, (q15_t)0x436f, (q15_t)0x3fe8, (q15_t)0x437c, (q15_t)0x3fe8, - (q15_t)0x4388, (q15_t)0x3fe7, (q15_t)0x4395, (q15_t)0x3fe6, (q15_t)0x43a1, (q15_t)0x3fe6, (q15_t)0x43ae, (q15_t)0x3fe5, - (q15_t)0x43bb, (q15_t)0x3fe4, (q15_t)0x43c7, (q15_t)0x3fe3, (q15_t)0x43d4, (q15_t)0x3fe3, (q15_t)0x43e0, (q15_t)0x3fe2, - (q15_t)0x43ed, (q15_t)0x3fe1, (q15_t)0x43f9, (q15_t)0x3fe0, (q15_t)0x4406, (q15_t)0x3fe0, (q15_t)0x4412, (q15_t)0x3fdf, - (q15_t)0x441f, (q15_t)0x3fde, (q15_t)0x442b, (q15_t)0x3fdd, (q15_t)0x4438, (q15_t)0x3fdc, (q15_t)0x4444, (q15_t)0x3fdc, - (q15_t)0x4451, (q15_t)0x3fdb, (q15_t)0x445e, (q15_t)0x3fda, (q15_t)0x446a, (q15_t)0x3fd9, (q15_t)0x4477, (q15_t)0x3fd8, - (q15_t)0x4483, (q15_t)0x3fd7, (q15_t)0x4490, (q15_t)0x3fd6, (q15_t)0x449c, (q15_t)0x3fd5, (q15_t)0x44a9, (q15_t)0x3fd5, - (q15_t)0x44b5, (q15_t)0x3fd4, (q15_t)0x44c2, (q15_t)0x3fd3, (q15_t)0x44ce, (q15_t)0x3fd2, (q15_t)0x44db, (q15_t)0x3fd1, - (q15_t)0x44e7, (q15_t)0x3fd0, (q15_t)0x44f4, (q15_t)0x3fcf, (q15_t)0x4500, (q15_t)0x3fce, (q15_t)0x450d, (q15_t)0x3fcd, - (q15_t)0x451a, (q15_t)0x3fcc, (q15_t)0x4526, (q15_t)0x3fcb, (q15_t)0x4533, (q15_t)0x3fca, (q15_t)0x453f, (q15_t)0x3fc9, - (q15_t)0x454c, (q15_t)0x3fc8, (q15_t)0x4558, (q15_t)0x3fc7, (q15_t)0x4565, (q15_t)0x3fc6, (q15_t)0x4571, (q15_t)0x3fc5, - (q15_t)0x457e, (q15_t)0x3fc4, (q15_t)0x458a, (q15_t)0x3fc3, (q15_t)0x4597, (q15_t)0x3fc1, (q15_t)0x45a3, (q15_t)0x3fc0, - (q15_t)0x45b0, (q15_t)0x3fbf, (q15_t)0x45bc, (q15_t)0x3fbe, (q15_t)0x45c9, (q15_t)0x3fbd, (q15_t)0x45d5, (q15_t)0x3fbc, - (q15_t)0x45e2, (q15_t)0x3fbb, (q15_t)0x45ee, (q15_t)0x3fb9, (q15_t)0x45fb, (q15_t)0x3fb8, (q15_t)0x4607, (q15_t)0x3fb7, - (q15_t)0x4614, (q15_t)0x3fb6, (q15_t)0x4620, (q15_t)0x3fb5, (q15_t)0x462d, (q15_t)0x3fb4, (q15_t)0x4639, (q15_t)0x3fb2, - (q15_t)0x4646, (q15_t)0x3fb1, (q15_t)0x4652, (q15_t)0x3fb0, (q15_t)0x465f, (q15_t)0x3faf, (q15_t)0x466b, (q15_t)0x3fad, - (q15_t)0x4678, (q15_t)0x3fac, (q15_t)0x4684, (q15_t)0x3fab, (q15_t)0x4691, (q15_t)0x3faa, (q15_t)0x469d, (q15_t)0x3fa8, - (q15_t)0x46aa, (q15_t)0x3fa7, (q15_t)0x46b6, (q15_t)0x3fa6, (q15_t)0x46c3, (q15_t)0x3fa4, (q15_t)0x46cf, (q15_t)0x3fa3, - (q15_t)0x46dc, (q15_t)0x3fa2, (q15_t)0x46e8, (q15_t)0x3fa0, (q15_t)0x46f5, (q15_t)0x3f9f, (q15_t)0x4701, (q15_t)0x3f9e, - (q15_t)0x470e, (q15_t)0x3f9c, (q15_t)0x471a, (q15_t)0x3f9b, (q15_t)0x4727, (q15_t)0x3f99, (q15_t)0x4733, (q15_t)0x3f98, - (q15_t)0x4740, (q15_t)0x3f97, (q15_t)0x474c, (q15_t)0x3f95, (q15_t)0x4759, (q15_t)0x3f94, (q15_t)0x4765, (q15_t)0x3f92, - (q15_t)0x4772, (q15_t)0x3f91, (q15_t)0x477e, (q15_t)0x3f8f, (q15_t)0x478b, (q15_t)0x3f8e, (q15_t)0x4797, (q15_t)0x3f8c, - (q15_t)0x47a4, (q15_t)0x3f8b, (q15_t)0x47b0, (q15_t)0x3f89, (q15_t)0x47bd, (q15_t)0x3f88, (q15_t)0x47c9, (q15_t)0x3f86, - (q15_t)0x47d6, (q15_t)0x3f85, (q15_t)0x47e2, (q15_t)0x3f83, (q15_t)0x47ef, (q15_t)0x3f82, (q15_t)0x47fb, (q15_t)0x3f80, - (q15_t)0x4807, (q15_t)0x3f7f, (q15_t)0x4814, (q15_t)0x3f7d, (q15_t)0x4820, (q15_t)0x3f7b, (q15_t)0x482d, (q15_t)0x3f7a, - (q15_t)0x4839, (q15_t)0x3f78, (q15_t)0x4846, (q15_t)0x3f77, (q15_t)0x4852, (q15_t)0x3f75, (q15_t)0x485f, (q15_t)0x3f73, - (q15_t)0x486b, (q15_t)0x3f72, (q15_t)0x4878, (q15_t)0x3f70, (q15_t)0x4884, (q15_t)0x3f6e, (q15_t)0x4891, (q15_t)0x3f6d, - (q15_t)0x489d, (q15_t)0x3f6b, (q15_t)0x48a9, (q15_t)0x3f69, (q15_t)0x48b6, (q15_t)0x3f68, (q15_t)0x48c2, (q15_t)0x3f66, - (q15_t)0x48cf, (q15_t)0x3f64, (q15_t)0x48db, (q15_t)0x3f62, (q15_t)0x48e8, (q15_t)0x3f61, (q15_t)0x48f4, (q15_t)0x3f5f, - (q15_t)0x4901, (q15_t)0x3f5d, (q15_t)0x490d, (q15_t)0x3f5b, (q15_t)0x4919, (q15_t)0x3f5a, (q15_t)0x4926, (q15_t)0x3f58, - (q15_t)0x4932, (q15_t)0x3f56, (q15_t)0x493f, (q15_t)0x3f54, (q15_t)0x494b, (q15_t)0x3f52, (q15_t)0x4958, (q15_t)0x3f51, - (q15_t)0x4964, (q15_t)0x3f4f, (q15_t)0x4970, (q15_t)0x3f4d, (q15_t)0x497d, (q15_t)0x3f4b, (q15_t)0x4989, (q15_t)0x3f49, - (q15_t)0x4996, (q15_t)0x3f47, (q15_t)0x49a2, (q15_t)0x3f45, (q15_t)0x49af, (q15_t)0x3f43, (q15_t)0x49bb, (q15_t)0x3f42, - (q15_t)0x49c7, (q15_t)0x3f40, (q15_t)0x49d4, (q15_t)0x3f3e, (q15_t)0x49e0, (q15_t)0x3f3c, (q15_t)0x49ed, (q15_t)0x3f3a, - (q15_t)0x49f9, (q15_t)0x3f38, (q15_t)0x4a06, (q15_t)0x3f36, (q15_t)0x4a12, (q15_t)0x3f34, (q15_t)0x4a1e, (q15_t)0x3f32, - (q15_t)0x4a2b, (q15_t)0x3f30, (q15_t)0x4a37, (q15_t)0x3f2e, (q15_t)0x4a44, (q15_t)0x3f2c, (q15_t)0x4a50, (q15_t)0x3f2a, - (q15_t)0x4a5c, (q15_t)0x3f28, (q15_t)0x4a69, (q15_t)0x3f26, (q15_t)0x4a75, (q15_t)0x3f24, (q15_t)0x4a82, (q15_t)0x3f22, - (q15_t)0x4a8e, (q15_t)0x3f20, (q15_t)0x4a9a, (q15_t)0x3f1e, (q15_t)0x4aa7, (q15_t)0x3f1c, (q15_t)0x4ab3, (q15_t)0x3f19, - (q15_t)0x4ac0, (q15_t)0x3f17, (q15_t)0x4acc, (q15_t)0x3f15, (q15_t)0x4ad8, (q15_t)0x3f13, (q15_t)0x4ae5, (q15_t)0x3f11, - (q15_t)0x4af1, (q15_t)0x3f0f, (q15_t)0x4afd, (q15_t)0x3f0d, (q15_t)0x4b0a, (q15_t)0x3f0a, (q15_t)0x4b16, (q15_t)0x3f08, - (q15_t)0x4b23, (q15_t)0x3f06, (q15_t)0x4b2f, (q15_t)0x3f04, (q15_t)0x4b3b, (q15_t)0x3f02, (q15_t)0x4b48, (q15_t)0x3f00, - (q15_t)0x4b54, (q15_t)0x3efd, (q15_t)0x4b60, (q15_t)0x3efb, (q15_t)0x4b6d, (q15_t)0x3ef9, (q15_t)0x4b79, (q15_t)0x3ef7, - (q15_t)0x4b85, (q15_t)0x3ef4, (q15_t)0x4b92, (q15_t)0x3ef2, (q15_t)0x4b9e, (q15_t)0x3ef0, (q15_t)0x4bab, (q15_t)0x3eed, - (q15_t)0x4bb7, (q15_t)0x3eeb, (q15_t)0x4bc3, (q15_t)0x3ee9, (q15_t)0x4bd0, (q15_t)0x3ee7, (q15_t)0x4bdc, (q15_t)0x3ee4, - (q15_t)0x4be8, (q15_t)0x3ee2, (q15_t)0x4bf5, (q15_t)0x3ee0, (q15_t)0x4c01, (q15_t)0x3edd, (q15_t)0x4c0d, (q15_t)0x3edb, - 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(q15_t)0x4192, (q15_t)0xc005, (q15_t)0x4186, (q15_t)0xc005, (q15_t)0x4179, (q15_t)0xc004, (q15_t)0x416c, (q15_t)0xc004, - (q15_t)0x4160, (q15_t)0xc004, (q15_t)0x4153, (q15_t)0xc004, (q15_t)0x4147, (q15_t)0xc003, (q15_t)0x413a, (q15_t)0xc003, - (q15_t)0x412e, (q15_t)0xc003, (q15_t)0x4121, (q15_t)0xc003, (q15_t)0x4114, (q15_t)0xc002, (q15_t)0x4108, (q15_t)0xc002, - (q15_t)0x40fb, (q15_t)0xc002, (q15_t)0x40ef, (q15_t)0xc002, (q15_t)0x40e2, (q15_t)0xc002, (q15_t)0x40d6, (q15_t)0xc001, - (q15_t)0x40c9, (q15_t)0xc001, (q15_t)0x40bc, (q15_t)0xc001, (q15_t)0x40b0, (q15_t)0xc001, (q15_t)0x40a3, (q15_t)0xc001, - (q15_t)0x4097, (q15_t)0xc001, (q15_t)0x408a, (q15_t)0xc001, (q15_t)0x407e, (q15_t)0xc000, (q15_t)0x4071, (q15_t)0xc000, - (q15_t)0x4065, (q15_t)0xc000, (q15_t)0x4058, (q15_t)0xc000, (q15_t)0x404b, (q15_t)0xc000, (q15_t)0x403f, (q15_t)0xc000, - (q15_t)0x4032, (q15_t)0xc000, (q15_t)0x4026, (q15_t)0xc000, (q15_t)0x4019, (q15_t)0xc000, (q15_t)0x400d, (q15_t)0xc000, -}; - -#endif -/** - @} end of RealFFT_Table group - */ - -/** - @ingroup DCT4_IDCT4 - */ - -/** - @addtogroup DCT4_IDCT4_Table DCT Type IV Tables - @{ - */ - -/** - @brief Weights Table - */ - -/** - @par - Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
- @par - C command to generate the table - 
-  for(i = 0; i< N; i++)
-  {
-    weights[(2*i)]   =  cos (i*c);
-    weights[(2*i)+1] = -sin (i*c);
-  }
- @par - where N is the Number of weights to be calculated and c is pi/(2*N) - @par - In the tables below the real and imaginary values are placed alternatively, hence the - array length is 2*N. - */ - - -/** - @par - cosFactor tables are generated using the formula : 
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
- @par - C command to generate the table - @par - 
 for(i = 0; i< N; i++)
-  {
-     cos_factors[i]= 2 * cos((2*i+1)*c/2);
-  }
- @par - where N is the number of factors to generate and c is pi/(2*N) -*/ - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128) - const float32_t Weights_128[256] = { - 1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f, -0.012271538285719925f, - 0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f, -0.036807222941358832f, - 0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f, -0.061320736302208578f, - 0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f, -0.085797312344439894f, - 0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f, -0.110222207293883060f, - 0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f, -0.134580708507126170f, - 0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f, -0.158858143333861450f, - 0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f, -0.183039887955140950f, - 0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f, -0.207111376192218560f, - 0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f, -0.231058108280671110f, - 0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f, -0.254865659604514570f, - 0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f, -0.278519689385053060f, - 0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f, -0.302005949319228080f, - 0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f, -0.325310292162262930f, - 0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f, -0.348418680249434560f, - 0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f, -0.371317193951837540f, - 0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f, -0.393992040061048100f, - 0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f, -0.416429560097637150f, - 0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f, -0.438616238538527660f, - 0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f, -0.460538710958240010f, - 0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f, -0.482183772079122720f, - 0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f, -0.503538383725717580f, - 0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f, -0.524589682678468950f, - 0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f, -0.545324988422046460f, - 0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f, -0.565731810783613120f, - 0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f, -0.585797857456438860f, - 0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f, -0.605511041404325550f, - 0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f, -0.624859488142386340f, - 0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f, -0.643831542889791390f, - 0.757208846506484570f, -0.653172842953776760f, 0.749136394523459370f, -0.662415777590171780f, - 0.740951125354959110f, -0.671558954847018330f, 0.732654271672412820f, -0.680600997795453020f, - 0.724247082951467000f, -0.689540544737066830f, 0.715730825283818590f, -0.698376249408972920f, - 0.707106781186547570f, -0.707106781186547460f, 0.698376249408972920f, -0.715730825283818590f, - 0.689540544737066940f, -0.724247082951466890f, 0.680600997795453130f, -0.732654271672412820f, - 0.671558954847018330f, -0.740951125354959110f, 0.662415777590171780f, -0.749136394523459260f, - 0.653172842953776760f, -0.757208846506484460f, 0.643831542889791500f, -0.765167265622458960f, - 0.634393284163645490f, -0.773010453362736990f, 0.624859488142386450f, -0.780737228572094380f, - 0.615231590580626820f, -0.788346427626606230f, 0.605511041404325550f, -0.795836904608883460f, - 0.595699304492433470f, -0.803207531480644830f, 0.585797857456438860f, -0.810457198252594770f, - 0.575808191417845340f, -0.817584813151583710f, 0.565731810783613230f, -0.824589302785025290f, - 0.555570233019602290f, -0.831469612302545240f, 0.545324988422046460f, -0.838224705554837970f, - 0.534997619887097260f, -0.844853565249707010f, 0.524589682678468840f, -0.851355193105265200f, - 0.514102744193221660f, -0.857728610000272120f, 0.503538383725717580f, -0.863972856121586700f, - 0.492898192229784090f, -0.870086991108711350f, 0.482183772079122830f, -0.876070094195406600f, - 0.471396736825997810f, -0.881921264348354940f, 0.460538710958240010f, -0.887639620402853930f, - 0.449611329654606600f, -0.893224301195515320f, 0.438616238538527710f, -0.898674465693953820f, - 0.427555093430282200f, -0.903989293123443340f, 0.416429560097637320f, -0.909167983090522270f, - 0.405241314004989860f, -0.914209755703530690f, 0.393992040061048100f, -0.919113851690057770f, - 0.382683432365089840f, -0.923879532511286740f, 0.371317193951837600f, -0.928506080473215480f, - 0.359895036534988280f, -0.932992798834738850f, 0.348418680249434510f, -0.937339011912574960f, - 0.336889853392220050f, -0.941544065183020810f, 0.325310292162262980f, -0.945607325380521280f, - 0.313681740398891570f, -0.949528180593036670f, 0.302005949319228200f, -0.953306040354193750f, - 0.290284677254462330f, -0.956940335732208940f, 0.278519689385053060f, -0.960430519415565790f, - 0.266712757474898420f, -0.963776065795439840f, 0.254865659604514630f, -0.966976471044852070f, - 0.242980179903263980f, -0.970031253194543970f, 0.231058108280671280f, -0.972939952205560070f, - 0.219101240156869770f, -0.975702130038528570f, 0.207111376192218560f, -0.978317370719627650f, - 0.195090322016128330f, -0.980785280403230430f, 0.183039887955141060f, -0.983105487431216290f, - 0.170961888760301360f, -0.985277642388941220f, 0.158858143333861390f, -0.987301418157858430f, - 0.146730474455361750f, -0.989176509964781010f, 0.134580708507126220f, -0.990902635427780010f, - 0.122410675199216280f, -0.992479534598709970f, 0.110222207293883180f, -0.993906970002356060f, - 0.098017140329560770f, -0.995184726672196820f, 0.085797312344439880f, -0.996312612182778000f, - 0.073564563599667454f, -0.997290456678690210f, 0.061320736302208648f, -0.998118112900149180f, - 0.049067674327418126f, -0.998795456205172410f, 0.036807222941358991f, -0.999322384588349540f, - 0.024541228522912264f, -0.999698818696204250f, 0.012271538285719944f, -0.999924701839144500f -}; - - const float32_t cos_factors_128[128] = { - 0.999981175282601110f, 0.999830581795823400f, 0.999529417501093140f, - 0.999077727752645360f, - 0.998475580573294770f, 0.997723066644191640f, 0.996820299291165670f, - 0.995767414467659820f, - 0.994564570734255420f, 0.993211949234794500f, 0.991709753669099530f, - 0.990058210262297120f, - 0.988257567730749460f, 0.986308097244598670f, 0.984210092386929030f, - 0.981963869109555240f, - 0.979569765685440520f, 0.977028142657754390f, 0.974339382785575860f, - 0.971503890986251780f, - 0.968522094274417380f, 0.965394441697689400f, 0.962121404269041580f, - 0.958703474895871600f, - 0.955141168305770780f, 0.951435020969008340f, 0.947585591017741090f, - 0.943593458161960390f, - 0.939459223602189920f, 0.935183509938947610f, 0.930766961078983710f, - 0.926210242138311380f, - 0.921514039342042010f, 0.916679059921042700f, 0.911706032005429880f, - 0.906595704514915330f, - 0.901348847046022030f, 0.895966249756185220f, 0.890448723244757880f, - 0.884797098430937790f, - 0.879012226428633530f, 0.873094978418290090f, 0.867046245515692650f, - 0.860866938637767310f, - 0.854557988365400530f, 0.848120344803297230f, 0.841554977436898440f, - 0.834862874986380010f, - 0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f, - 0.806847553543799330f, - 0.799537269107905010f, 0.792106577300212390f, 0.784556597155575240f, - 0.776888465673232440f, - 0.769103337645579700f, 0.761202385484261780f, 0.753186799043612520f, - 0.745057785441466060f, - 0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f, - 0.711432195745216430f, - 0.702754744457225300f, 0.693971460889654000f, 0.685083667772700360f, - 0.676092703575316030f, - 0.666999922303637470f, 0.657806693297078640f, 0.648514401022112550f, - 0.639124444863775730f, - 0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f, - 0.600616479383868970f, - 0.590759701858874280f, 0.580813958095764530f, 0.570780745886967370f, - 0.560661576197336030f, - 0.550457972936604810f, 0.540171472729892970f, 0.529803624686294830f, - 0.519355990165589530f, - 0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f, - 0.476799230063322250f, - 0.465976495767966130f, 0.455083587126343840f, 0.444122144570429260f, - 0.433093818853152010f, - 0.422000270799799790f, 0.410843171057903910f, 0.399624199845646790f, - 0.388345046698826300f, - 0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f, - 0.342660717311994380f, - 0.331106305759876430f, 0.319502030816015750f, 0.307849640041534980f, - 0.296150888243623960f, - 0.284407537211271820f, 0.272621355449948980f, 0.260794117915275570f, - 0.248927605745720260f, - 0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f, - 0.201104634842091960f, - 0.189068664149806280f, 0.177004220412148860f, 0.164913120489970090f, - 0.152797185258443410f, - 0.140658239332849240f, 0.128498110793793220f, 0.116318630911904880f, - 0.104121633872054730f, - 0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f, - 0.055195244349690031f, - 0.042938256934940959f, 0.030674803176636581f, 0.018406729905804820f, - 0.006135884649154515f -}; - - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512) - const float32_t Weights_512[1024] = { - 1.000000000000000000f, 0.000000000000000000f, 0.999995293809576190f, -0.003067956762965976f, - 0.999981175282601110f, -0.006135884649154475f, 0.999957644551963900f, -0.009203754782059819f, - 0.999924701839144500f, -0.012271538285719925f, 0.999882347454212560f, -0.015339206284988100f, - 0.999830581795823400f, -0.018406729905804820f, 0.999769405351215280f, -0.021474080275469508f, - 0.999698818696204250f, -0.024541228522912288f, 0.999618822495178640f, -0.027608145778965740f, - 0.999529417501093140f, -0.030674803176636626f, 0.999430604555461730f, -0.033741171851377580f, - 0.999322384588349540f, -0.036807222941358832f, 0.999204758618363890f, -0.039872927587739811f, - 0.999077727752645360f, -0.042938256934940820f, 0.998941293186856870f, -0.046003182130914623f, - 0.998795456205172410f, -0.049067674327418015f, 0.998640218180265270f, -0.052131704680283324f, - 0.998475580573294770f, -0.055195244349689934f, 0.998301544933892890f, -0.058258264500435752f, - 0.998118112900149180f, -0.061320736302208578f, 0.997925286198596000f, -0.064382630929857465f, - 0.997723066644191640f, -0.067443919563664051f, 0.997511456140303450f, -0.070504573389613856f, - 0.997290456678690210f, -0.073564563599667426f, 0.997060070339482960f, -0.076623861392031492f, - 0.996820299291165670f, -0.079682437971430126f, 0.996571145790554840f, -0.082740264549375692f, - 0.996312612182778000f, -0.085797312344439894f, 0.996044700901251970f, -0.088853552582524600f, - 0.995767414467659820f, -0.091908956497132724f, 0.995480755491926940f, -0.094963495329638992f, - 0.995184726672196930f, -0.098017140329560604f, 0.994879330794805620f, -0.101069862754827820f, - 0.994564570734255420f, -0.104121633872054590f, 0.994240449453187900f, -0.107172424956808840f, - 0.993906970002356060f, -0.110222207293883060f, 0.993564135520595300f, -0.113270952177564350f, - 0.993211949234794500f, -0.116318630911904750f, 0.992850414459865100f, -0.119365214810991350f, - 0.992479534598709970f, -0.122410675199216200f, 0.992099313142191800f, -0.125454983411546230f, - 0.991709753669099530f, -0.128498110793793170f, 0.991310859846115440f, -0.131540028702883120f, - 0.990902635427780010f, -0.134580708507126170f, 0.990485084256457090f, -0.137620121586486040f, - 0.990058210262297120f, -0.140658239332849210f, 0.989622017463200890f, -0.143695033150294470f, - 0.989176509964781010f, -0.146730474455361750f, 0.988721691960323780f, -0.149764534677321510f, - 0.988257567730749460f, -0.152797185258443440f, 0.987784141644572180f, -0.155828397654265230f, - 0.987301418157858430f, -0.158858143333861450f, 0.986809401814185530f, -0.161886393780111830f, - 0.986308097244598670f, -0.164913120489969890f, 0.985797509167567480f, -0.167938294974731170f, - 0.985277642388941220f, -0.170961888760301220f, 0.984748501801904210f, -0.173983873387463820f, - 0.984210092386929030f, -0.177004220412148750f, 0.983662419211730250f, -0.180022901405699510f, - 0.983105487431216290f, -0.183039887955140950f, 0.982539302287441240f, -0.186055151663446630f, - 0.981963869109555240f, -0.189068664149806190f, 0.981379193313754560f, -0.192080397049892440f, - 0.980785280403230430f, -0.195090322016128250f, 0.980182135968117430f, -0.198098410717953560f, - 0.979569765685440520f, -0.201104634842091900f, 0.978948175319062200f, -0.204108966092816870f, - 0.978317370719627650f, -0.207111376192218560f, 0.977677357824509930f, -0.210111836880469610f, - 0.977028142657754390f, -0.213110319916091360f, 0.976369731330021140f, -0.216106797076219520f, - 0.975702130038528570f, -0.219101240156869800f, 0.975025345066994120f, -0.222093620973203510f, - 0.974339382785575860f, -0.225083911359792830f, 0.973644249650811980f, -0.228072083170885730f, - 0.972939952205560180f, -0.231058108280671110f, 0.972226497078936270f, -0.234041958583543430f, - 0.971503890986251780f, -0.237023605994367200f, 0.970772140728950350f, -0.240003022448741500f, - 0.970031253194543970f, -0.242980179903263870f, 0.969281235356548530f, -0.245955050335794590f, - 0.968522094274417380f, -0.248927605745720150f, 0.967753837093475510f, -0.251897818154216970f, - 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const float32_t Weights_8192[16384] = { - 1.000000000000000000f, -0.000000000000000000f, 0.999999981616429330f, - -0.000191747597310703f, - 0.999999926465717890f, -0.000383495187571396f, 0.999999834547867670f, - -0.000575242763732066f, - 0.999999705862882230f, -0.000766990318742704f, 0.999999540410766110f, - -0.000958737845553301f, - 0.999999338191525530f, -0.001150485337113849f, 0.999999099205167830f, - -0.001342232786374338f, - 0.999998823451701880f, -0.001533980186284766f, 0.999998510931137790f, - -0.001725727529795126f, - 0.999998161643486980f, -0.001917474809855419f, 0.999997775588762350f, - -0.002109222019415644f, - 0.999997352766978210f, -0.002300969151425805f, 0.999996893178149880f, - -0.002492716198835908f, - 0.999996396822294350f, -0.002684463154595962f, 0.999995863699429940f, - -0.002876210011655979f, - 0.999995293809576190f, -0.003067956762965976f, 0.999994687152754080f, - -0.003259703401475973f, - 0.999994043728985820f, -0.003451449920135994f, 0.999993363538295150f, - -0.003643196311896068f, - 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0.023200939023409587f, - 0.022817469206785804f, 0.022433998551228459f, 0.022050527070837558f, - 0.021667054779711814f, - 0.021283581691949955f, 0.020900107821652084f, 0.020516633182916549f, - 0.020133157789843505f, - 0.019749681656531803f, 0.019366204797080316f, 0.018982727225589285f, - 0.018599248956157190f, - 0.018215770002884327f, 0.017832290379869671f, 0.017448810101212228f, - 0.017065329181012358f, - 0.016681847633368677f, 0.016298365472381587f, 0.015914882712149747f, - 0.015531399366773606f, - 0.015147915450352307f, 0.014764430976985016f, 0.014380945960772247f, - 0.013997460415812761f, - 0.013613974356207112f, 0.013230487796054543f, 0.012847000749454314f, - 0.012463513230507034f, - 0.012080025253311559f, 0.011696536831968529f, 0.011313047980577277f, - 0.010929558713237145f, - 0.010546069044048827f, 0.010162578987111254f, 0.009779088556525145f, - 0.009395597766389905f, - 0.009012106630804949f, 0.008628615163871038f, 0.008245123379687167f, - 0.007861631292354124f, - 0.007478138915970929f, 0.007094646264638386f, 0.006711153352455981f, - 0.006327660193523208f, - 0.005944166801940901f, 0.005560673191808128f, 0.005177179377225743f, - 0.004793685372293270f, - 0.004410191191110246f, 0.004026696847777542f, 0.003643202356394263f, - 0.003259707731061291f, - 0.002876212985878184f, 0.002492718134944503f, 0.002109223192361147f, - 0.001725728172227238f, - 0.001342233088643682f, 0.000958737955710053f, 0.000575242787525925f, - 0.000191747598192208f -}; - #endif - -/** - @brief Weights Table - */ - -/** - @par - Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
- @par - C command to generate the table - 
-  for(i = 0; i< N; i++)
-  { 
-    weights[(2*i)]   =  cos(i*c);
-    weights[(2*i)+1] = -sin(i*c);
-  }
- @par - where N is the Number of weights to be calculated and c is pi/(2*N) - @par - Converted the output to q15 format by multiplying with 2^31 and saturated if required. - @par - In the tables below the real and imaginary values are placed alternatively, hence the - array length is 2*N. - */ - -/** - @par - cosFactor tables are generated using the formula : 
 cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
- @par - C command to generate the table - 
-  for (i = 0; i< N; i++)
-  {
-    cos_factors[i] = 2 * cos((2*i+1)*c/2);
-  }
- @par - where N is the number of factors to generate and c is pi/(2*N) - @par - Then converted to q15 format by multiplying with 2^31 and saturated if required. -*/ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128) - - const q15_t __ALIGNED(4) WeightsQ15_128[256] = { - (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7fe9, (q15_t)0xfb4a, - (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f87, (q15_t)0xf505, - (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7ed5, (q15_t)0xeec7, - (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7dd6, (q15_t)0xe893, - (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7c89, (q15_t)0xe26d, - (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7aef, (q15_t)0xdc5a, - (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7909, (q15_t)0xd65d, - (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x76d9, (q15_t)0xd079, - (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x745f, (q15_t)0xcab3, - (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x719e, (q15_t)0xc50e, - (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6e96, (q15_t)0xbf8d, - (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6b4a, (q15_t)0xba33, - (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x67bd, (q15_t)0xb505, - (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x63ef, (q15_t)0xb005, - (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x5fe3, (q15_t)0xab36, - (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5b9d, (q15_t)0xa69c, - (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x571d, (q15_t)0xa239, - (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5269, (q15_t)0x9e0f, - (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4d81, (q15_t)0x9a23, - (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4869, (q15_t)0x9674, - (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4325, (q15_t)0x9307, - (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3db8, (q15_t)0x8fdd, - (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3824, (q15_t)0x8cf9, - (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x326e, (q15_t)0x8a5b, - (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2c98, (q15_t)0x8806, - (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x26a8, (q15_t)0x85fb, - (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x209f, (q15_t)0x843b, - (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1a82, (q15_t)0x82c7, - (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x1455, (q15_t)0x81a1, - (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1139, (q15_t)0x812b, (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xe1b, (q15_t)0x80c8, - (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xafb, (q15_t)0x8079, (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x7d9, (q15_t)0x803e, - (q15_t)0x647, (q15_t)0x8028, (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x324, (q15_t)0x800a, (q15_t)0x192, (q15_t)0x8003 -}; - const q15_t __ALIGNED(4) cos_factorsQ15_128[128] = { - (q15_t)0x7fff, (q15_t)0x7ffa, (q15_t)0x7ff0, (q15_t)0x7fe1, (q15_t)0x7fce, (q15_t)0x7fb5, (q15_t)0x7f97, (q15_t)0x7f75, - (q15_t)0x7f4d, (q15_t)0x7f21, (q15_t)0x7ef0, (q15_t)0x7eba, (q15_t)0x7e7f, (q15_t)0x7e3f, (q15_t)0x7dfa, (q15_t)0x7db0, - (q15_t)0x7d62, (q15_t)0x7d0f, (q15_t)0x7cb7, (q15_t)0x7c5a, (q15_t)0x7bf8, (q15_t)0x7b92, (q15_t)0x7b26, (q15_t)0x7ab6, - (q15_t)0x7a42, (q15_t)0x79c8, (q15_t)0x794a, (q15_t)0x78c7, (q15_t)0x7840, (q15_t)0x77b4, (q15_t)0x7723, (q15_t)0x768e, - (q15_t)0x75f4, (q15_t)0x7555, (q15_t)0x74b2, (q15_t)0x740b, (q15_t)0x735f, (q15_t)0x72af, (q15_t)0x71fa, (q15_t)0x7141, - (q15_t)0x7083, (q15_t)0x6fc1, (q15_t)0x6efb, (q15_t)0x6e30, (q15_t)0x6d62, (q15_t)0x6c8f, (q15_t)0x6bb8, (q15_t)0x6adc, - (q15_t)0x69fd, (q15_t)0x6919, (q15_t)0x6832, (q15_t)0x6746, (q15_t)0x6657, (q15_t)0x6563, (q15_t)0x646c, (q15_t)0x6371, - (q15_t)0x6271, (q15_t)0x616f, (q15_t)0x6068, (q15_t)0x5f5e, (q15_t)0x5e50, (q15_t)0x5d3e, (q15_t)0x5c29, (q15_t)0x5b10, - (q15_t)0x59f3, (q15_t)0x58d4, (q15_t)0x57b0, (q15_t)0x568a, (q15_t)0x5560, (q15_t)0x5433, (q15_t)0x5302, (q15_t)0x51ce, - (q15_t)0x5097, (q15_t)0x4f5e, (q15_t)0x4e21, (q15_t)0x4ce1, (q15_t)0x4b9e, (q15_t)0x4a58, (q15_t)0x490f, (q15_t)0x47c3, - (q15_t)0x4675, (q15_t)0x4524, (q15_t)0x43d0, (q15_t)0x427a, (q15_t)0x4121, (q15_t)0x3fc5, (q15_t)0x3e68, (q15_t)0x3d07, - (q15_t)0x3ba5, (q15_t)0x3a40, (q15_t)0x38d8, (q15_t)0x376f, (q15_t)0x3604, (q15_t)0x3496, (q15_t)0x3326, (q15_t)0x31b5, - (q15_t)0x3041, (q15_t)0x2ecc, (q15_t)0x2d55, (q15_t)0x2bdc, (q15_t)0x2a61, (q15_t)0x28e5, (q15_t)0x2767, (q15_t)0x25e8, - (q15_t)0x2467, (q15_t)0x22e5, (q15_t)0x2161, (q15_t)0x1fdc, (q15_t)0x1e56, (q15_t)0x1ccf, (q15_t)0x1b47, (q15_t)0x19bd, - (q15_t)0x1833, (q15_t)0x16a8, (q15_t)0x151b, (q15_t)0x138e, (q15_t)0x1201, (q15_t)0x1072, (q15_t)0xee3, (q15_t)0xd53, - (q15_t)0xbc3, (q15_t)0xa33, (q15_t)0x8a2, (q15_t)0x710, (q15_t)0x57f, (q15_t)0x3ed, (q15_t)0x25b, (q15_t)0xc9 -}; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512) - const q15_t __ALIGNED(4) WeightsQ15_512[1024] = { - (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7ffe, (q15_t)0xfed3, - (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff8, (q15_t)0xfd41, - (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fed, (q15_t)0xfbaf, - (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fdd, (q15_t)0xfa1d, - (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fc8, (q15_t)0xf88b, - (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fae, (q15_t)0xf6fa, - (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f8f, (q15_t)0xf569, - (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f6b, (q15_t)0xf3d9, - (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f43, (q15_t)0xf249, - (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f15, (q15_t)0xf0b9, - (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7ee3, (q15_t)0xef2a, - (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eab, (q15_t)0xed9c, - (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e6f, (q15_t)0xec0e, - (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e2e, (q15_t)0xea81, - (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7de8, (q15_t)0xe8f6, - (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7d9d, (q15_t)0xe76a, - (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d4e, (q15_t)0xe5e0, - (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7cf9, (q15_t)0xe457, - (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7ca0, (q15_t)0xe2cf, - (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c42, (q15_t)0xe148, - (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bdf, (q15_t)0xdfc2, - (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b77, (q15_t)0xde3e, - (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b0b, (q15_t)0xdcbb, - (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7a9a, (q15_t)0xdb39, - (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a24, (q15_t)0xd9b8, - (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79a9, (q15_t)0xd839, - (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x792a, (q15_t)0xd6bc, - (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78a6, (q15_t)0xd540, - (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x781d, (q15_t)0xd3c6, - (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x7790, (q15_t)0xd24d, - (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x76fe, (q15_t)0xd0d7, - (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7668, (q15_t)0xcf62, - (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75cc, (q15_t)0xcdef, - (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x752d, (q15_t)0xcc7e, - (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x7489, (q15_t)0xcb0e, - (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x73e0, (q15_t)0xc9a1, - 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(q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2b7d, (q15_t)0x879e, - (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a02, (q15_t)0x8718, - (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x2886, (q15_t)0x8696, - (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2707, (q15_t)0x8619, - (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x2588, (q15_t)0x85a1, - (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2407, (q15_t)0x852d, - (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x2284, (q15_t)0x84be, - (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2100, (q15_t)0x8454, - (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1f7b, (q15_t)0x83ef, - (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1df5, (q15_t)0x838f, - (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1c6d, (q15_t)0x8333, - (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1ae4, (q15_t)0x82dc, - (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x195b, (q15_t)0x828a, - (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x17d0, (q15_t)0x823d, - (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x1645, (q15_t)0x81f4, - (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x14b8, (q15_t)0x81b1, - (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x132b, (q15_t)0x8172, - (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x119d, (q15_t)0x8138, - (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x100e, (q15_t)0x8103, - (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xe7f, (q15_t)0x80d3, - (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xcef, (q15_t)0x80a8, - (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xb5f, (q15_t)0x8082, - (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa33, (q15_t)0x8069, (q15_t)0x9ce, (q15_t)0x8061, - (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x83d, (q15_t)0x8044, - (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x775, (q15_t)0x8038, (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6ac, (q15_t)0x802d, - (q15_t)0x647, (q15_t)0x8028, (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x51a, (q15_t)0x801b, - (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x451, (q15_t)0x8013, (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x388, (q15_t)0x800d, - (q15_t)0x324, (q15_t)0x800a, (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x1f6, (q15_t)0x8004, - (q15_t)0x192, (q15_t)0x8003, (q15_t)0x12d, (q15_t)0x8002, (q15_t)0xc9, (q15_t)0x8001, (q15_t)0x64, (q15_t)0x8001 -}; - - const q15_t __ALIGNED(4) cos_factorsQ15_512[512] = { - (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ff9, (q15_t)0x7ff7, - (q15_t)0x7ff4, (q15_t)0x7ff2, (q15_t)0x7fee, (q15_t)0x7feb, (q15_t)0x7fe7, (q15_t)0x7fe3, (q15_t)0x7fdf, (q15_t)0x7fda, - (q15_t)0x7fd6, (q15_t)0x7fd0, (q15_t)0x7fcb, (q15_t)0x7fc5, (q15_t)0x7fbf, (q15_t)0x7fb8, (q15_t)0x7fb1, (q15_t)0x7faa, - (q15_t)0x7fa3, (q15_t)0x7f9b, (q15_t)0x7f93, (q15_t)0x7f8b, (q15_t)0x7f82, (q15_t)0x7f79, (q15_t)0x7f70, (q15_t)0x7f67, - (q15_t)0x7f5d, (q15_t)0x7f53, (q15_t)0x7f48, (q15_t)0x7f3d, (q15_t)0x7f32, (q15_t)0x7f27, (q15_t)0x7f1b, (q15_t)0x7f0f, - (q15_t)0x7f03, (q15_t)0x7ef6, (q15_t)0x7ee9, (q15_t)0x7edc, (q15_t)0x7ecf, (q15_t)0x7ec1, (q15_t)0x7eb3, (q15_t)0x7ea4, - (q15_t)0x7e95, (q15_t)0x7e86, (q15_t)0x7e77, (q15_t)0x7e67, (q15_t)0x7e57, (q15_t)0x7e47, (q15_t)0x7e37, (q15_t)0x7e26, - (q15_t)0x7e14, (q15_t)0x7e03, (q15_t)0x7df1, (q15_t)0x7ddf, (q15_t)0x7dcd, (q15_t)0x7dba, (q15_t)0x7da7, (q15_t)0x7d94, - (q15_t)0x7d80, (q15_t)0x7d6c, (q15_t)0x7d58, (q15_t)0x7d43, (q15_t)0x7d2f, (q15_t)0x7d19, (q15_t)0x7d04, (q15_t)0x7cee, - (q15_t)0x7cd8, (q15_t)0x7cc2, (q15_t)0x7cab, (q15_t)0x7c94, (q15_t)0x7c7d, (q15_t)0x7c66, (q15_t)0x7c4e, (q15_t)0x7c36, - (q15_t)0x7c1d, (q15_t)0x7c05, (q15_t)0x7beb, (q15_t)0x7bd2, (q15_t)0x7bb9, (q15_t)0x7b9f, (q15_t)0x7b84, (q15_t)0x7b6a, - (q15_t)0x7b4f, (q15_t)0x7b34, (q15_t)0x7b19, (q15_t)0x7afd, (q15_t)0x7ae1, (q15_t)0x7ac5, (q15_t)0x7aa8, (q15_t)0x7a8b, - (q15_t)0x7a6e, (q15_t)0x7a50, (q15_t)0x7a33, (q15_t)0x7a15, (q15_t)0x79f6, (q15_t)0x79d8, (q15_t)0x79b9, (q15_t)0x7999, - (q15_t)0x797a, (q15_t)0x795a, (q15_t)0x793a, (q15_t)0x7919, (q15_t)0x78f9, (q15_t)0x78d8, (q15_t)0x78b6, (q15_t)0x7895, - (q15_t)0x7873, (q15_t)0x7851, (q15_t)0x782e, (q15_t)0x780c, (q15_t)0x77e9, (q15_t)0x77c5, (q15_t)0x77a2, (q15_t)0x777e, - (q15_t)0x775a, (q15_t)0x7735, (q15_t)0x7710, (q15_t)0x76eb, (q15_t)0x76c6, (q15_t)0x76a0, (q15_t)0x767b, (q15_t)0x7654, - (q15_t)0x762e, (q15_t)0x7607, (q15_t)0x75e0, (q15_t)0x75b9, (q15_t)0x7591, (q15_t)0x7569, (q15_t)0x7541, (q15_t)0x7519, - (q15_t)0x74f0, (q15_t)0x74c7, (q15_t)0x749e, (q15_t)0x7474, (q15_t)0x744a, (q15_t)0x7420, (q15_t)0x73f6, (q15_t)0x73cb, - (q15_t)0x73a0, (q15_t)0x7375, (q15_t)0x7349, (q15_t)0x731d, (q15_t)0x72f1, (q15_t)0x72c5, (q15_t)0x7298, (q15_t)0x726b, - (q15_t)0x723e, (q15_t)0x7211, (q15_t)0x71e3, (q15_t)0x71b5, (q15_t)0x7186, (q15_t)0x7158, (q15_t)0x7129, (q15_t)0x70fa, - (q15_t)0x70cb, (q15_t)0x709b, (q15_t)0x706b, (q15_t)0x703b, (q15_t)0x700a, (q15_t)0x6fda, (q15_t)0x6fa9, (q15_t)0x6f77, - (q15_t)0x6f46, (q15_t)0x6f14, (q15_t)0x6ee2, (q15_t)0x6eaf, (q15_t)0x6e7d, (q15_t)0x6e4a, (q15_t)0x6e17, (q15_t)0x6de3, - (q15_t)0x6db0, (q15_t)0x6d7c, (q15_t)0x6d48, (q15_t)0x6d13, (q15_t)0x6cde, (q15_t)0x6ca9, (q15_t)0x6c74, (q15_t)0x6c3f, - (q15_t)0x6c09, (q15_t)0x6bd3, (q15_t)0x6b9c, (q15_t)0x6b66, (q15_t)0x6b2f, (q15_t)0x6af8, (q15_t)0x6ac1, (q15_t)0x6a89, - (q15_t)0x6a51, (q15_t)0x6a19, (q15_t)0x69e1, (q15_t)0x69a8, (q15_t)0x696f, (q15_t)0x6936, (q15_t)0x68fd, (q15_t)0x68c3, - (q15_t)0x6889, (q15_t)0x684f, (q15_t)0x6815, (q15_t)0x67da, (q15_t)0x679f, (q15_t)0x6764, (q15_t)0x6729, (q15_t)0x66ed, - (q15_t)0x66b1, (q15_t)0x6675, (q15_t)0x6639, (q15_t)0x65fc, (q15_t)0x65bf, (q15_t)0x6582, (q15_t)0x6545, (q15_t)0x6507, - (q15_t)0x64c9, (q15_t)0x648b, (q15_t)0x644d, (q15_t)0x640e, (q15_t)0x63cf, (q15_t)0x6390, (q15_t)0x6351, (q15_t)0x6311, - (q15_t)0x62d2, (q15_t)0x6292, (q15_t)0x6251, (q15_t)0x6211, (q15_t)0x61d0, (q15_t)0x618f, (q15_t)0x614e, (q15_t)0x610d, - (q15_t)0x60cb, (q15_t)0x6089, (q15_t)0x6047, (q15_t)0x6004, (q15_t)0x5fc2, (q15_t)0x5f7f, (q15_t)0x5f3c, (q15_t)0x5ef9, - (q15_t)0x5eb5, (q15_t)0x5e71, (q15_t)0x5e2d, (q15_t)0x5de9, (q15_t)0x5da5, (q15_t)0x5d60, (q15_t)0x5d1b, (q15_t)0x5cd6, - (q15_t)0x5c91, (q15_t)0x5c4b, (q15_t)0x5c06, (q15_t)0x5bc0, (q15_t)0x5b79, (q15_t)0x5b33, (q15_t)0x5aec, (q15_t)0x5aa5, - (q15_t)0x5a5e, (q15_t)0x5a17, (q15_t)0x59d0, (q15_t)0x5988, (q15_t)0x5940, (q15_t)0x58f8, (q15_t)0x58af, (q15_t)0x5867, - (q15_t)0x581e, (q15_t)0x57d5, (q15_t)0x578c, (q15_t)0x5742, (q15_t)0x56f9, (q15_t)0x56af, (q15_t)0x5665, (q15_t)0x561a, - (q15_t)0x55d0, (q15_t)0x5585, (q15_t)0x553a, (q15_t)0x54ef, (q15_t)0x54a4, (q15_t)0x5458, (q15_t)0x540d, (q15_t)0x53c1, - (q15_t)0x5375, (q15_t)0x5328, (q15_t)0x52dc, (q15_t)0x528f, (q15_t)0x5242, (q15_t)0x51f5, (q15_t)0x51a8, (q15_t)0x515a, - (q15_t)0x510c, (q15_t)0x50bf, (q15_t)0x5070, (q15_t)0x5022, (q15_t)0x4fd4, (q15_t)0x4f85, (q15_t)0x4f36, (q15_t)0x4ee7, - (q15_t)0x4e98, (q15_t)0x4e48, (q15_t)0x4df9, (q15_t)0x4da9, (q15_t)0x4d59, (q15_t)0x4d09, (q15_t)0x4cb8, (q15_t)0x4c68, - (q15_t)0x4c17, (q15_t)0x4bc6, (q15_t)0x4b75, (q15_t)0x4b24, (q15_t)0x4ad2, (q15_t)0x4a81, (q15_t)0x4a2f, (q15_t)0x49dd, - (q15_t)0x498a, (q15_t)0x4938, (q15_t)0x48e6, (q15_t)0x4893, (q15_t)0x4840, (q15_t)0x47ed, (q15_t)0x479a, (q15_t)0x4746, - (q15_t)0x46f3, (q15_t)0x469f, (q15_t)0x464b, (q15_t)0x45f7, (q15_t)0x45a3, (q15_t)0x454e, (q15_t)0x44fa, (q15_t)0x44a5, - (q15_t)0x4450, (q15_t)0x43fb, (q15_t)0x43a5, (q15_t)0x4350, (q15_t)0x42fa, (q15_t)0x42a5, (q15_t)0x424f, (q15_t)0x41f9, - (q15_t)0x41a2, (q15_t)0x414c, (q15_t)0x40f6, (q15_t)0x409f, (q15_t)0x4048, (q15_t)0x3ff1, (q15_t)0x3f9a, (q15_t)0x3f43, - (q15_t)0x3eeb, (q15_t)0x3e93, (q15_t)0x3e3c, (q15_t)0x3de4, (q15_t)0x3d8c, (q15_t)0x3d33, (q15_t)0x3cdb, (q15_t)0x3c83, - (q15_t)0x3c2a, (q15_t)0x3bd1, (q15_t)0x3b78, (q15_t)0x3b1f, (q15_t)0x3ac6, (q15_t)0x3a6c, (q15_t)0x3a13, (q15_t)0x39b9, - (q15_t)0x395f, (q15_t)0x3906, (q15_t)0x38ab, (q15_t)0x3851, (q15_t)0x37f7, (q15_t)0x379c, (q15_t)0x3742, (q15_t)0x36e7, - (q15_t)0x368c, (q15_t)0x3631, (q15_t)0x35d6, (q15_t)0x357b, (q15_t)0x351f, (q15_t)0x34c4, (q15_t)0x3468, (q15_t)0x340c, - (q15_t)0x33b0, (q15_t)0x3354, (q15_t)0x32f8, (q15_t)0x329c, (q15_t)0x3240, (q15_t)0x31e3, (q15_t)0x3186, (q15_t)0x312a, - (q15_t)0x30cd, (q15_t)0x3070, (q15_t)0x3013, (q15_t)0x2fb5, (q15_t)0x2f58, (q15_t)0x2efb, (q15_t)0x2e9d, (q15_t)0x2e3f, - (q15_t)0x2de2, (q15_t)0x2d84, (q15_t)0x2d26, (q15_t)0x2cc8, (q15_t)0x2c69, (q15_t)0x2c0b, (q15_t)0x2bad, (q15_t)0x2b4e, - (q15_t)0x2aef, (q15_t)0x2a91, (q15_t)0x2a32, (q15_t)0x29d3, (q15_t)0x2974, (q15_t)0x2915, (q15_t)0x28b5, (q15_t)0x2856, - (q15_t)0x27f6, (q15_t)0x2797, (q15_t)0x2737, (q15_t)0x26d8, (q15_t)0x2678, (q15_t)0x2618, (q15_t)0x25b8, (q15_t)0x2558, - (q15_t)0x24f7, (q15_t)0x2497, (q15_t)0x2437, (q15_t)0x23d6, (q15_t)0x2376, (q15_t)0x2315, (q15_t)0x22b4, (q15_t)0x2254, - (q15_t)0x21f3, (q15_t)0x2192, (q15_t)0x2131, (q15_t)0x20d0, (q15_t)0x206e, (q15_t)0x200d, (q15_t)0x1fac, (q15_t)0x1f4a, - (q15_t)0x1ee9, (q15_t)0x1e87, (q15_t)0x1e25, (q15_t)0x1dc4, (q15_t)0x1d62, (q15_t)0x1d00, (q15_t)0x1c9e, (q15_t)0x1c3c, - (q15_t)0x1bda, (q15_t)0x1b78, (q15_t)0x1b16, (q15_t)0x1ab3, (q15_t)0x1a51, (q15_t)0x19ef, (q15_t)0x198c, (q15_t)0x192a, - (q15_t)0x18c7, (q15_t)0x1864, (q15_t)0x1802, (q15_t)0x179f, (q15_t)0x173c, (q15_t)0x16d9, (q15_t)0x1676, (q15_t)0x1613, - (q15_t)0x15b0, (q15_t)0x154d, (q15_t)0x14ea, (q15_t)0x1487, (q15_t)0x1423, (q15_t)0x13c0, (q15_t)0x135d, (q15_t)0x12f9, - (q15_t)0x1296, (q15_t)0x1232, (q15_t)0x11cf, (q15_t)0x116b, (q15_t)0x1108, (q15_t)0x10a4, (q15_t)0x1040, (q15_t)0xfdd, - (q15_t)0xf79, (q15_t)0xf15, (q15_t)0xeb1, (q15_t)0xe4d, (q15_t)0xde9, (q15_t)0xd85, (q15_t)0xd21, (q15_t)0xcbd, - (q15_t)0xc59, (q15_t)0xbf5, (q15_t)0xb91, (q15_t)0xb2d, (q15_t)0xac9, (q15_t)0xa65, (q15_t)0xa00, (q15_t)0x99c, - (q15_t)0x938, (q15_t)0x8d4, (q15_t)0x86f, (q15_t)0x80b, (q15_t)0x7a7, (q15_t)0x742, (q15_t)0x6de, (q15_t)0x67a, - (q15_t)0x615, (q15_t)0x5b1, (q15_t)0x54c, (q15_t)0x4e8, (q15_t)0x483, (q15_t)0x41f, (q15_t)0x3ba, (q15_t)0x356, - (q15_t)0x2f1, (q15_t)0x28d, (q15_t)0x228, (q15_t)0x1c4, (q15_t)0x15f, (q15_t)0xfb, (q15_t)0x96, (q15_t)0x32 -}; - - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048) - const q15_t __ALIGNED(4) WeightsQ15_2048[4096] = { - (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffb5, - (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff51, - (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeec, - (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffd, (q15_t)0xfe88, - (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe23, - (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffa, (q15_t)0xfdbe, - (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff8, (q15_t)0xfd5a, - (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff6, (q15_t)0xfcf5, - (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfc91, - (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc2c, - (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbc8, - (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7fea, (q15_t)0xfb64, - (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe6, (q15_t)0xfaff, - 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(q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf60, (q15_t)0x80ee, - (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xefc, (q15_t)0x80e2, - (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xe98, (q15_t)0x80d6, - (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe34, (q15_t)0x80cb, - (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xdd0, (q15_t)0x80c0, - (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd6c, (q15_t)0x80b5, - (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd08, (q15_t)0x80ab, - (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xca4, (q15_t)0x80a1, - (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc40, (q15_t)0x8097, - (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbdc, (q15_t)0x808e, - (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb78, (q15_t)0x8084, - (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb14, (q15_t)0x807b, - (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xab0, (q15_t)0x8073, - (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa4c, (q15_t)0x806b, - (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9e7, (q15_t)0x8063, - (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x983, (q15_t)0x805b, - (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x951, (q15_t)0x8057, (q15_t)0x938, (q15_t)0x8056, (q15_t)0x91f, (q15_t)0x8054, - (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8bb, (q15_t)0x804d, - (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x888, (q15_t)0x8049, (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x856, (q15_t)0x8046, - (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x824, (q15_t)0x8043, (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x7f2, (q15_t)0x8040, - (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x78e, (q15_t)0x803a, - (q15_t)0x775, (q15_t)0x8038, (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x742, (q15_t)0x8035, (q15_t)0x729, (q15_t)0x8034, - (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6c5, (q15_t)0x802e, - (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x693, (q15_t)0x802c, (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x660, (q15_t)0x8029, - (q15_t)0x647, (q15_t)0x8028, (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x615, (q15_t)0x8026, (q15_t)0x5fc, (q15_t)0x8024, - (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x598, (q15_t)0x8020, - (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x565, (q15_t)0x801e, (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x533, (q15_t)0x801c, - (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4cf, (q15_t)0x8018, - (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x483, (q15_t)0x8015, (q15_t)0x46a, (q15_t)0x8014, - (q15_t)0x451, (q15_t)0x8013, (q15_t)0x438, (q15_t)0x8012, (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x406, (q15_t)0x8011, - (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3a1, (q15_t)0x800e, - (q15_t)0x388, (q15_t)0x800d, (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x356, (q15_t)0x800c, (q15_t)0x33d, (q15_t)0x800b, - (q15_t)0x324, (q15_t)0x800a, (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2d8, (q15_t)0x8009, - (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x274, (q15_t)0x8007, - (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x242, (q15_t)0x8006, (q15_t)0x228, (q15_t)0x8005, (q15_t)0x20f, (q15_t)0x8005, - (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1ab, (q15_t)0x8003, - (q15_t)0x192, (q15_t)0x8003, (q15_t)0x178, (q15_t)0x8003, (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x146, (q15_t)0x8002, - (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x114, (q15_t)0x8002, (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xe2, (q15_t)0x8001, - (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xaf, (q15_t)0x8001, (q15_t)0x96, (q15_t)0x8001, (q15_t)0x7d, (q15_t)0x8001, - (q15_t)0x64, (q15_t)0x8001, (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x32, (q15_t)0x8001, (q15_t)0x19, (q15_t)0x8001 -}; - const q15_t __ALIGNED(4) cos_factorsQ15_2048[2048] = { - (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, - (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd, - (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa, - (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6, - 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(q15_t)0x22d9, (q15_t)0x22c0, (q15_t)0x22a8, (q15_t)0x2290, (q15_t)0x2278, (q15_t)0x2260, (q15_t)0x2247, (q15_t)0x222f, - (q15_t)0x2217, (q15_t)0x21ff, (q15_t)0x21e7, (q15_t)0x21ce, (q15_t)0x21b6, (q15_t)0x219e, (q15_t)0x2186, (q15_t)0x216d, - (q15_t)0x2155, (q15_t)0x213d, (q15_t)0x2125, (q15_t)0x210c, (q15_t)0x20f4, (q15_t)0x20dc, (q15_t)0x20c3, (q15_t)0x20ab, - (q15_t)0x2093, (q15_t)0x207a, (q15_t)0x2062, (q15_t)0x204a, (q15_t)0x2032, (q15_t)0x2019, (q15_t)0x2001, (q15_t)0x1fe9, - (q15_t)0x1fd0, (q15_t)0x1fb8, (q15_t)0x1f9f, (q15_t)0x1f87, (q15_t)0x1f6f, (q15_t)0x1f56, (q15_t)0x1f3e, (q15_t)0x1f26, - (q15_t)0x1f0d, (q15_t)0x1ef5, (q15_t)0x1edd, (q15_t)0x1ec4, (q15_t)0x1eac, (q15_t)0x1e93, (q15_t)0x1e7b, (q15_t)0x1e62, - (q15_t)0x1e4a, (q15_t)0x1e32, (q15_t)0x1e19, (q15_t)0x1e01, (q15_t)0x1de8, (q15_t)0x1dd0, (q15_t)0x1db7, (q15_t)0x1d9f, - (q15_t)0x1d87, (q15_t)0x1d6e, (q15_t)0x1d56, (q15_t)0x1d3d, (q15_t)0x1d25, (q15_t)0x1d0c, (q15_t)0x1cf4, (q15_t)0x1cdb, - (q15_t)0x1cc3, (q15_t)0x1caa, (q15_t)0x1c92, (q15_t)0x1c79, (q15_t)0x1c61, (q15_t)0x1c48, (q15_t)0x1c30, (q15_t)0x1c17, - (q15_t)0x1bff, (q15_t)0x1be6, (q15_t)0x1bce, (q15_t)0x1bb5, (q15_t)0x1b9d, (q15_t)0x1b84, (q15_t)0x1b6c, (q15_t)0x1b53, - (q15_t)0x1b3a, (q15_t)0x1b22, (q15_t)0x1b09, (q15_t)0x1af1, (q15_t)0x1ad8, (q15_t)0x1ac0, (q15_t)0x1aa7, (q15_t)0x1a8e, - (q15_t)0x1a76, (q15_t)0x1a5d, (q15_t)0x1a45, (q15_t)0x1a2c, (q15_t)0x1a13, (q15_t)0x19fb, (q15_t)0x19e2, (q15_t)0x19ca, - (q15_t)0x19b1, (q15_t)0x1998, (q15_t)0x1980, (q15_t)0x1967, (q15_t)0x194e, (q15_t)0x1936, (q15_t)0x191d, (q15_t)0x1905, - (q15_t)0x18ec, (q15_t)0x18d3, (q15_t)0x18bb, (q15_t)0x18a2, (q15_t)0x1889, (q15_t)0x1871, (q15_t)0x1858, (q15_t)0x183f, - (q15_t)0x1827, (q15_t)0x180e, (q15_t)0x17f5, (q15_t)0x17dd, (q15_t)0x17c4, (q15_t)0x17ab, (q15_t)0x1792, (q15_t)0x177a, - (q15_t)0x1761, (q15_t)0x1748, (q15_t)0x1730, (q15_t)0x1717, (q15_t)0x16fe, (q15_t)0x16e5, (q15_t)0x16cd, (q15_t)0x16b4, - (q15_t)0x169b, (q15_t)0x1682, (q15_t)0x166a, (q15_t)0x1651, (q15_t)0x1638, (q15_t)0x161f, (q15_t)0x1607, (q15_t)0x15ee, - (q15_t)0x15d5, (q15_t)0x15bc, (q15_t)0x15a4, (q15_t)0x158b, (q15_t)0x1572, (q15_t)0x1559, (q15_t)0x1541, (q15_t)0x1528, - (q15_t)0x150f, (q15_t)0x14f6, (q15_t)0x14dd, (q15_t)0x14c5, (q15_t)0x14ac, (q15_t)0x1493, (q15_t)0x147a, (q15_t)0x1461, - (q15_t)0x1449, (q15_t)0x1430, (q15_t)0x1417, (q15_t)0x13fe, (q15_t)0x13e5, (q15_t)0x13cc, (q15_t)0x13b4, (q15_t)0x139b, - (q15_t)0x1382, (q15_t)0x1369, (q15_t)0x1350, (q15_t)0x1337, (q15_t)0x131f, (q15_t)0x1306, (q15_t)0x12ed, (q15_t)0x12d4, - (q15_t)0x12bb, (q15_t)0x12a2, (q15_t)0x1289, (q15_t)0x1271, (q15_t)0x1258, (q15_t)0x123f, (q15_t)0x1226, (q15_t)0x120d, - (q15_t)0x11f4, (q15_t)0x11db, (q15_t)0x11c2, (q15_t)0x11a9, (q15_t)0x1191, (q15_t)0x1178, (q15_t)0x115f, (q15_t)0x1146, - (q15_t)0x112d, (q15_t)0x1114, (q15_t)0x10fb, (q15_t)0x10e2, (q15_t)0x10c9, (q15_t)0x10b0, (q15_t)0x1098, (q15_t)0x107f, - (q15_t)0x1066, (q15_t)0x104d, (q15_t)0x1034, (q15_t)0x101b, (q15_t)0x1002, (q15_t)0xfe9, (q15_t)0xfd0, (q15_t)0xfb7, - (q15_t)0xf9e, (q15_t)0xf85, (q15_t)0xf6c, (q15_t)0xf53, (q15_t)0xf3a, (q15_t)0xf21, (q15_t)0xf08, (q15_t)0xef0, - (q15_t)0xed7, (q15_t)0xebe, (q15_t)0xea5, (q15_t)0xe8c, (q15_t)0xe73, (q15_t)0xe5a, (q15_t)0xe41, (q15_t)0xe28, - (q15_t)0xe0f, (q15_t)0xdf6, (q15_t)0xddd, (q15_t)0xdc4, (q15_t)0xdab, (q15_t)0xd92, (q15_t)0xd79, (q15_t)0xd60, - (q15_t)0xd47, (q15_t)0xd2e, (q15_t)0xd15, (q15_t)0xcfc, (q15_t)0xce3, (q15_t)0xcca, (q15_t)0xcb1, (q15_t)0xc98, - (q15_t)0xc7f, (q15_t)0xc66, (q15_t)0xc4d, (q15_t)0xc34, (q15_t)0xc1b, (q15_t)0xc02, (q15_t)0xbe9, (q15_t)0xbd0, - (q15_t)0xbb7, (q15_t)0xb9e, (q15_t)0xb85, (q15_t)0xb6c, (q15_t)0xb53, (q15_t)0xb3a, (q15_t)0xb20, (q15_t)0xb07, - (q15_t)0xaee, (q15_t)0xad5, (q15_t)0xabc, (q15_t)0xaa3, (q15_t)0xa8a, (q15_t)0xa71, (q15_t)0xa58, (q15_t)0xa3f, - (q15_t)0xa26, (q15_t)0xa0d, (q15_t)0x9f4, (q15_t)0x9db, (q15_t)0x9c2, (q15_t)0x9a9, (q15_t)0x990, (q15_t)0x977, - (q15_t)0x95e, (q15_t)0x944, (q15_t)0x92b, (q15_t)0x912, (q15_t)0x8f9, (q15_t)0x8e0, (q15_t)0x8c7, (q15_t)0x8ae, - (q15_t)0x895, (q15_t)0x87c, (q15_t)0x863, (q15_t)0x84a, (q15_t)0x831, (q15_t)0x818, (q15_t)0x7fe, (q15_t)0x7e5, - (q15_t)0x7cc, (q15_t)0x7b3, (q15_t)0x79a, (q15_t)0x781, (q15_t)0x768, (q15_t)0x74f, (q15_t)0x736, (q15_t)0x71d, - (q15_t)0x704, (q15_t)0x6ea, (q15_t)0x6d1, (q15_t)0x6b8, (q15_t)0x69f, (q15_t)0x686, (q15_t)0x66d, (q15_t)0x654, - (q15_t)0x63b, (q15_t)0x622, (q15_t)0x609, (q15_t)0x5ef, (q15_t)0x5d6, (q15_t)0x5bd, (q15_t)0x5a4, (q15_t)0x58b, - (q15_t)0x572, (q15_t)0x559, (q15_t)0x540, (q15_t)0x527, (q15_t)0x50d, (q15_t)0x4f4, (q15_t)0x4db, (q15_t)0x4c2, - (q15_t)0x4a9, (q15_t)0x490, (q15_t)0x477, (q15_t)0x45e, (q15_t)0x445, (q15_t)0x42b, (q15_t)0x412, (q15_t)0x3f9, - (q15_t)0x3e0, (q15_t)0x3c7, (q15_t)0x3ae, (q15_t)0x395, (q15_t)0x37c, (q15_t)0x362, (q15_t)0x349, (q15_t)0x330, - (q15_t)0x317, (q15_t)0x2fe, (q15_t)0x2e5, (q15_t)0x2cc, (q15_t)0x2b3, (q15_t)0x299, (q15_t)0x280, (q15_t)0x267, - (q15_t)0x24e, (q15_t)0x235, (q15_t)0x21c, (q15_t)0x203, (q15_t)0x1ea, (q15_t)0x1d0, (q15_t)0x1b7, (q15_t)0x19e, - (q15_t)0x185, (q15_t)0x16c, (q15_t)0x153, (q15_t)0x13a, (q15_t)0x121, (q15_t)0x107, (q15_t)0xee, (q15_t)0xd5, - (q15_t)0xbc, (q15_t)0xa3, (q15_t)0x8a, (q15_t)0x71, (q15_t)0x57, (q15_t)0x3e, (q15_t)0x25, (q15_t)0xc - -}; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192) - const q15_t __ALIGNED(4) WeightsQ15_8192[16384] = { - (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfffa, (q15_t)0x7fff, (q15_t)0xfff4, (q15_t)0x7fff, (q15_t)0xffee, - (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffe1, (q15_t)0x7fff, (q15_t)0xffdb, (q15_t)0x7fff, (q15_t)0xffd5, - (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc8, (q15_t)0x7fff, (q15_t)0xffc2, (q15_t)0x7fff, (q15_t)0xffbb, - (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffaf, (q15_t)0x7fff, (q15_t)0xffa9, (q15_t)0x7fff, (q15_t)0xffa2, - (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff96, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff89, - (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff7d, (q15_t)0x7fff, (q15_t)0xff76, (q15_t)0x7fff, (q15_t)0xff70, - (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff63, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff57, - 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(q15_t)0xaf, (q15_t)0x8001, (q15_t)0xa9, (q15_t)0x8001, (q15_t)0xa3, (q15_t)0x8001, (q15_t)0x9d, (q15_t)0x8001, - (q15_t)0x96, (q15_t)0x8001, (q15_t)0x90, (q15_t)0x8001, (q15_t)0x8a, (q15_t)0x8001, (q15_t)0x83, (q15_t)0x8001, - (q15_t)0x7d, (q15_t)0x8001, (q15_t)0x77, (q15_t)0x8001, (q15_t)0x71, (q15_t)0x8001, (q15_t)0x6a, (q15_t)0x8001, - (q15_t)0x64, (q15_t)0x8001, (q15_t)0x5e, (q15_t)0x8001, (q15_t)0x57, (q15_t)0x8001, (q15_t)0x51, (q15_t)0x8001, - (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x45, (q15_t)0x8001, (q15_t)0x3e, (q15_t)0x8001, (q15_t)0x38, (q15_t)0x8001, - (q15_t)0x32, (q15_t)0x8001, (q15_t)0x2b, (q15_t)0x8001, (q15_t)0x25, (q15_t)0x8001, (q15_t)0x1f, (q15_t)0x8001, - (q15_t)0x19, (q15_t)0x8001, (q15_t)0x12, (q15_t)0x8001, (q15_t)0xc, (q15_t)0x8001, (q15_t)0x6, (q15_t)0x8001 -}; - - const q15_t __ALIGNED(4) cos_factorsQ15_8192[8192] = { - (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, - (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, - (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, - (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, - (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, - (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, - (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, - (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, - (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc, - (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, - (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, - (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, - (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, - (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, - (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, - (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, - (q15_t)0x7ff6, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4, - (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3, - (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, - (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff0, (q15_t)0x7ff0, - (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, - (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fed, - (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7feb, - (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fe9, - (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, - (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6, - (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4, - (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe1, - (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdf, - (q15_t)0x7fdf, (q15_t)0x7fdf, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fdd, (q15_t)0x7fdd, - (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb, - (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd8, (q15_t)0x7fd8, - (q15_t)0x7fd8, (q15_t)0x7fd8, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd6, (q15_t)0x7fd6, - (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd3, (q15_t)0x7fd3, - (q15_t)0x7fd3, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd0, - (q15_t)0x7fd0, (q15_t)0x7fd0, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fce, (q15_t)0x7fce, (q15_t)0x7fce, - (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcb, (q15_t)0x7fcb, - (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc8, (q15_t)0x7fc8, - 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(q15_t)0x2bc, (q15_t)0x2b6, (q15_t)0x2af, (q15_t)0x2a9, (q15_t)0x2a3, (q15_t)0x29d, (q15_t)0x296, (q15_t)0x290, - (q15_t)0x28a, (q15_t)0x283, (q15_t)0x27d, (q15_t)0x277, (q15_t)0x271, (q15_t)0x26a, (q15_t)0x264, (q15_t)0x25e, - (q15_t)0x258, (q15_t)0x251, (q15_t)0x24b, (q15_t)0x245, (q15_t)0x23e, (q15_t)0x238, (q15_t)0x232, (q15_t)0x22c, - (q15_t)0x225, (q15_t)0x21f, (q15_t)0x219, (q15_t)0x212, (q15_t)0x20c, (q15_t)0x206, (q15_t)0x200, (q15_t)0x1f9, - (q15_t)0x1f3, (q15_t)0x1ed, (q15_t)0x1e6, (q15_t)0x1e0, (q15_t)0x1da, (q15_t)0x1d4, (q15_t)0x1cd, (q15_t)0x1c7, - (q15_t)0x1c1, (q15_t)0x1ba, (q15_t)0x1b4, (q15_t)0x1ae, (q15_t)0x1a8, (q15_t)0x1a1, (q15_t)0x19b, (q15_t)0x195, - (q15_t)0x18e, (q15_t)0x188, (q15_t)0x182, (q15_t)0x17c, (q15_t)0x175, (q15_t)0x16f, (q15_t)0x169, (q15_t)0x162, - (q15_t)0x15c, (q15_t)0x156, (q15_t)0x150, (q15_t)0x149, (q15_t)0x143, (q15_t)0x13d, (q15_t)0x137, (q15_t)0x130, - (q15_t)0x12a, (q15_t)0x124, (q15_t)0x11d, (q15_t)0x117, (q15_t)0x111, (q15_t)0x10b, (q15_t)0x104, (q15_t)0xfe, - (q15_t)0xf8, (q15_t)0xf1, (q15_t)0xeb, (q15_t)0xe5, (q15_t)0xdf, (q15_t)0xd8, (q15_t)0xd2, (q15_t)0xcc, - (q15_t)0xc5, (q15_t)0xbf, (q15_t)0xb9, (q15_t)0xb3, (q15_t)0xac, (q15_t)0xa6, (q15_t)0xa0, (q15_t)0x99, - (q15_t)0x93, (q15_t)0x8d, (q15_t)0x87, (q15_t)0x80, (q15_t)0x7a, (q15_t)0x74, (q15_t)0x6d, (q15_t)0x67, - (q15_t)0x61, (q15_t)0x5b, (q15_t)0x54, (q15_t)0x4e, (q15_t)0x48, (q15_t)0x41, (q15_t)0x3b, (q15_t)0x35, - (q15_t)0x2f, (q15_t)0x28, (q15_t)0x22, (q15_t)0x1c, (q15_t)0x15, (q15_t)0xf, (q15_t)0x9, (q15_t)0x3 -}; - #endif - -/** - @par - Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
- @par - C command to generate the table - 
-  for (i = 0; i< N; i++)
-  {
-    weights[(2*i)]   =  cos(i*c);
-    weights[(2*i)+1] = -sin(i*c);
-  }
- @par - where N is the Number of weights to be calculated and c is pi/(2*N) - @par - Convert the output to q31 format by multiplying with 2^31 and saturated if required. - @par - In the tables below the real and imaginary values are placed alternatively, hence the - array length is 2*N. - */ - -/** - @par - cosFactor tables are generated using the formula : 
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
- @par - C command to generate the table - 
-  for (i = 0; i< N; i++)
-  {
-    cos_factors[i] = 2 * cos((2*i+1)*c/2);
-  }
- @par - where N is the number of factors to generate and c is pi/(2*N) - @par - Then converted to q31 format by multiplying with 2^31 and saturated if required. -*/ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128) - const q31_t WeightsQ31_128[256] = { - (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, - (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f872bf3, (q31_t)0xf50497fb, - (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, - (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7dd6668f, (q31_t)0xe8922622, - (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7c894bde, (q31_t)0xe26cb01b, - (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7aef6323, (q31_t)0xdc597781, - (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, - (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x76d94989, (q31_t)0xd078ad9e, - (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, - (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x719e2cd2, (q31_t)0xc50d1149, - (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, - (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6b4af279, (q31_t)0xba32ca71, - (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x67bd0fbd, (q31_t)0xb5049368, - (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x63ef3290, (q31_t)0xb0049ab3, - (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, - (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, - (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x571deefa, (q31_t)0xa2386284, - (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x5269126e, (q31_t)0x9e0effc1, - (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4d8162c4, (q31_t)0x9a22042d, - (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4869e665, (q31_t)0x9673db94, - (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4325c135, (q31_t)0x9306cb04, - (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3db832a6, (q31_t)0x8fdcef66, - (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x382493b0, (q31_t)0x8cf83c30, - (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, - (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2c98fbba, (q31_t)0x88054677, - (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x26a82186, (q31_t)0x85fa1153, - (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x209f701c, (q31_t)0x843a1d70, - (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1a82a026, (q31_t)0x82c67f14, - (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x145576b1, (q31_t)0x81a01b6d, - (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a, - (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x07d95b9e, (q31_t)0x803daa6a, - (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x01921d20, (q31_t)0x800277a6 -}; - const q31_t cos_factorsQ31_128[128] = { - (q31_t)0x7fff6216, (q31_t)0x7ffa72d1, (q31_t)0x7ff09478, (q31_t)0x7fe1c76b, (q31_t)0x7fce0c3e, (q31_t)0x7fb563b3, - (q31_t)0x7f97cebd, (q31_t)0x7f754e80, - (q31_t)0x7f4de451, (q31_t)0x7f2191b4, (q31_t)0x7ef05860, (q31_t)0x7eba3a39, (q31_t)0x7e7f3957, (q31_t)0x7e3f57ff, - (q31_t)0x7dfa98a8, (q31_t)0x7db0fdf8, - (q31_t)0x7d628ac6, (q31_t)0x7d0f4218, (q31_t)0x7cb72724, (q31_t)0x7c5a3d50, (q31_t)0x7bf88830, (q31_t)0x7b920b89, - (q31_t)0x7b26cb4f, (q31_t)0x7ab6cba4, - (q31_t)0x7a4210d8, (q31_t)0x79c89f6e, (q31_t)0x794a7c12, (q31_t)0x78c7aba2, (q31_t)0x78403329, (q31_t)0x77b417df, - (q31_t)0x77235f2d, (q31_t)0x768e0ea6, - (q31_t)0x75f42c0b, (q31_t)0x7555bd4c, (q31_t)0x74b2c884, (q31_t)0x740b53fb, (q31_t)0x735f6626, (q31_t)0x72af05a7, - (q31_t)0x71fa3949, (q31_t)0x71410805, - (q31_t)0x708378ff, (q31_t)0x6fc19385, (q31_t)0x6efb5f12, (q31_t)0x6e30e34a, (q31_t)0x6d6227fa, (q31_t)0x6c8f351c, - (q31_t)0x6bb812d1, (q31_t)0x6adcc964, - (q31_t)0x69fd614a, (q31_t)0x6919e320, (q31_t)0x683257ab, (q31_t)0x6746c7d8, (q31_t)0x66573cbb, (q31_t)0x6563bf92, - (q31_t)0x646c59bf, (q31_t)0x637114cc, - (q31_t)0x6271fa69, (q31_t)0x616f146c, (q31_t)0x60686ccf, (q31_t)0x5f5e0db3, (q31_t)0x5e50015d, (q31_t)0x5d3e5237, - (q31_t)0x5c290acc, (q31_t)0x5b1035cf, - (q31_t)0x59f3de12, (q31_t)0x58d40e8c, (q31_t)0x57b0d256, (q31_t)0x568a34a9, (q31_t)0x556040e2, (q31_t)0x5433027d, - (q31_t)0x53028518, (q31_t)0x51ced46e, - (q31_t)0x5097fc5e, (q31_t)0x4f5e08e3, (q31_t)0x4e210617, (q31_t)0x4ce10034, (q31_t)0x4b9e0390, (q31_t)0x4a581c9e, - (q31_t)0x490f57ee, (q31_t)0x47c3c22f, - (q31_t)0x46756828, (q31_t)0x452456bd, (q31_t)0x43d09aed, (q31_t)0x427a41d0, (q31_t)0x4121589b, (q31_t)0x3fc5ec98, - (q31_t)0x3e680b2c, (q31_t)0x3d07c1d6, - (q31_t)0x3ba51e29, (q31_t)0x3a402dd2, (q31_t)0x38d8fe93, (q31_t)0x376f9e46, (q31_t)0x36041ad9, (q31_t)0x34968250, - (q31_t)0x3326e2c3, (q31_t)0x31b54a5e, - (q31_t)0x3041c761, (q31_t)0x2ecc681e, (q31_t)0x2d553afc, (q31_t)0x2bdc4e6f, (q31_t)0x2a61b101, (q31_t)0x28e5714b, - (q31_t)0x27679df4, (q31_t)0x25e845b6, - (q31_t)0x24677758, (q31_t)0x22e541af, (q31_t)0x2161b3a0, (q31_t)0x1fdcdc1b, (q31_t)0x1e56ca1e, (q31_t)0x1ccf8cb3, - (q31_t)0x1b4732ef, (q31_t)0x19bdcbf3, - (q31_t)0x183366e9, (q31_t)0x16a81305, (q31_t)0x151bdf86, (q31_t)0x138edbb1, (q31_t)0x120116d5, (q31_t)0x1072a048, - (q31_t)0xee38766, (q31_t)0xd53db92, - (q31_t)0xbc3ac35, (q31_t)0xa3308bd, (q31_t)0x8a2009a, (q31_t)0x710a345, (q31_t)0x57f0035, (q31_t)0x3ed26e6, (q31_t)0x25b26d7, - (q31_t)0xc90f88 -}; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512) - const q31_t WeightsQ31_512[1024] = { - (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, - (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff871a2, (q31_t)0xfd40565c, - (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fed5791, (q31_t)0xfbae5e89, - (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, - (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fc85854, (q31_t)0xf88afe42, - (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, - (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, - (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77, - (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f434563, (q31_t)0xf2482c8a, - (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, - (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7ee34636, (q31_t)0xef29b243, - (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, - (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, - (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, - (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7de8a670, (q31_t)0xe8f50273, - (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8, - (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5, - (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb, - (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, - (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c4242f2, (q31_t)0xe14794ba, - (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, - (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b77ada8, (q31_t)0xde3d4964, - (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, - (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, - (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a24256f, (q31_t)0xd9b7c094, - (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79a98715, (q31_t)0xd838c82d, - (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x792a37fe, (q31_t)0xd6bb585e, - (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78a63d11, (q31_t)0xd53f7fda, - (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x781d9b65, (q31_t)0xd3c54d47, - (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x7790583e, (q31_t)0xd24ccf39, - (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x76fe790e, (q31_t)0xd0d61434, - (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x76680376, (q31_t)0xcf612aaa, - (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, - (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, - (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x7489571c, (q31_t)0xcb0de658, - (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, - (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x7333b883, (q31_t)0xc835d5d0, - (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72823c67, (q31_t)0xc6cd0079, - (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71cc5626, (q31_t)0xc5665fa9, - (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71120cc5, (q31_t)0xc4020133, - (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70536771, (q31_t)0xc29ff2d4, - (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6f906d84, (q31_t)0xc1404233, - (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, - (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, - (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, - (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd, - (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6b81a3cd, (q31_t)0xba87246d, - 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(q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x2588349d, (q31_t)0x85a04f28, - (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x24070b08, (q31_t)0x852cc2bb, - (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22847de0, (q31_t)0x84bdf286, - (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x21009c0c, (q31_t)0x8453e2cf, - (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1f7b7481, (q31_t)0x83ee97ad, - (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1df5163f, (q31_t)0x838e1507, - (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1c6d9053, (q31_t)0x83325e97, - (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, - (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x195b49ea, (q31_t)0x8289644b, - (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, - (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16451a83, (q31_t)0x81f3c2d7, - (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, - (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x132b7bf9, (q31_t)0x8171914e, - (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x119d8941, (q31_t)0x8137c8e6, - (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, - (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0f475bff, (q31_t)0x80ea4712, (q31_t)0x0ee38766, (q31_t)0x80de6e4c, (q31_t)0x0e7fa99e, (q31_t)0x80d2e3f2, - (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a, (q31_t)0x0db7d376, (q31_t)0x80bcba9d, (q31_t)0x0d53db92, (q31_t)0x80b21baf, (q31_t)0x0cefdb76, (q31_t)0x80a7cb49, - (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0c27c389, (q31_t)0x8094162c, (q31_t)0x0bc3ac35, (q31_t)0x808ab180, (q31_t)0x0b5f8d9f, (q31_t)0x80819b74, - (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x0a973ba5, (q31_t)0x80705b50, (q31_t)0x0a3308bd, (q31_t)0x80683143, (q31_t)0x09cecf89, (q31_t)0x806055eb, - (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x09064b3a, (q31_t)0x80518b6b, (q31_t)0x08a2009a, (q31_t)0x804a9c4d, (q31_t)0x083db0a7, (q31_t)0x8043fbf6, - (q31_t)0x07d95b9e, (q31_t)0x803daa6a, (q31_t)0x077501be, (q31_t)0x8037a7ac, (q31_t)0x0710a345, (q31_t)0x8031f3c2, (q31_t)0x06ac406f, (q31_t)0x802c8ead, - (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x05e36ea9, (q31_t)0x8022b114, (q31_t)0x057f0035, (q31_t)0x801e3895, (q31_t)0x051a8e5c, (q31_t)0x801a0ef8, - (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x0451a177, (q31_t)0x8012a86f, (q31_t)0x03ed26e6, (q31_t)0x800f6b88, (q31_t)0x0388a9ea, (q31_t)0x800c7d8c, - (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x02bfa9a4, (q31_t)0x80078e5e, (q31_t)0x025b26d7, (q31_t)0x80058d2f, (q31_t)0x01f6a297, (q31_t)0x8003daf1, - (q31_t)0x01921d20, (q31_t)0x800277a6, (q31_t)0x012d96b1, (q31_t)0x8001634e, (q31_t)0x00c90f88, (q31_t)0x80009dea, (q31_t)0x006487e3, (q31_t)0x8000277a -}; - const q31_t cos_factorsQ31_512[512] = { - (q31_t)0x7ffff621, (q31_t)0x7fffa72c, (q31_t)0x7fff0943, (q31_t)0x7ffe1c65, (q31_t)0x7ffce093, (q31_t)0x7ffb55ce, - (q31_t)0x7ff97c18, (q31_t)0x7ff75370, - (q31_t)0x7ff4dbd9, (q31_t)0x7ff21553, (q31_t)0x7feeffe1, (q31_t)0x7feb9b85, (q31_t)0x7fe7e841, (q31_t)0x7fe3e616, - (q31_t)0x7fdf9508, (q31_t)0x7fdaf519, - (q31_t)0x7fd6064c, (q31_t)0x7fd0c8a3, (q31_t)0x7fcb3c23, (q31_t)0x7fc560cf, (q31_t)0x7fbf36aa, (q31_t)0x7fb8bdb8, - (q31_t)0x7fb1f5fc, (q31_t)0x7faadf7c, - (q31_t)0x7fa37a3c, (q31_t)0x7f9bc640, (q31_t)0x7f93c38c, (q31_t)0x7f8b7227, (q31_t)0x7f82d214, (q31_t)0x7f79e35a, - (q31_t)0x7f70a5fe, (q31_t)0x7f671a05, - (q31_t)0x7f5d3f75, (q31_t)0x7f531655, (q31_t)0x7f489eaa, (q31_t)0x7f3dd87c, (q31_t)0x7f32c3d1, (q31_t)0x7f2760af, - (q31_t)0x7f1baf1e, (q31_t)0x7f0faf25, - (q31_t)0x7f0360cb, (q31_t)0x7ef6c418, (q31_t)0x7ee9d914, (q31_t)0x7edc9fc6, (q31_t)0x7ecf1837, (q31_t)0x7ec14270, - (q31_t)0x7eb31e78, (q31_t)0x7ea4ac58, - (q31_t)0x7e95ec1a, (q31_t)0x7e86ddc6, (q31_t)0x7e778166, (q31_t)0x7e67d703, (q31_t)0x7e57dea7, (q31_t)0x7e47985b, - (q31_t)0x7e37042a, (q31_t)0x7e26221f, - (q31_t)0x7e14f242, (q31_t)0x7e0374a0, (q31_t)0x7df1a942, (q31_t)0x7ddf9034, (q31_t)0x7dcd2981, (q31_t)0x7dba7534, - (q31_t)0x7da77359, (q31_t)0x7d9423fc, - (q31_t)0x7d808728, (q31_t)0x7d6c9ce9, (q31_t)0x7d58654d, (q31_t)0x7d43e05e, (q31_t)0x7d2f0e2b, (q31_t)0x7d19eebf, - (q31_t)0x7d048228, (q31_t)0x7ceec873, - (q31_t)0x7cd8c1ae, (q31_t)0x7cc26de5, (q31_t)0x7cabcd28, (q31_t)0x7c94df83, (q31_t)0x7c7da505, (q31_t)0x7c661dbc, - (q31_t)0x7c4e49b7, (q31_t)0x7c362904, - (q31_t)0x7c1dbbb3, (q31_t)0x7c0501d2, (q31_t)0x7bebfb70, (q31_t)0x7bd2a89e, (q31_t)0x7bb9096b, (q31_t)0x7b9f1de6, - (q31_t)0x7b84e61f, (q31_t)0x7b6a6227, - (q31_t)0x7b4f920e, (q31_t)0x7b3475e5, (q31_t)0x7b190dbc, (q31_t)0x7afd59a4, (q31_t)0x7ae159ae, (q31_t)0x7ac50dec, - (q31_t)0x7aa8766f, (q31_t)0x7a8b9348, - (q31_t)0x7a6e648a, (q31_t)0x7a50ea47, (q31_t)0x7a332490, (q31_t)0x7a151378, (q31_t)0x79f6b711, (q31_t)0x79d80f6f, - (q31_t)0x79b91ca4, (q31_t)0x7999dec4, - (q31_t)0x797a55e0, (q31_t)0x795a820e, (q31_t)0x793a6361, (q31_t)0x7919f9ec, (q31_t)0x78f945c3, (q31_t)0x78d846fb, - (q31_t)0x78b6fda8, (q31_t)0x789569df, - (q31_t)0x78738bb3, (q31_t)0x7851633b, (q31_t)0x782ef08b, (q31_t)0x780c33b8, (q31_t)0x77e92cd9, (q31_t)0x77c5dc01, - (q31_t)0x77a24148, (q31_t)0x777e5cc3, - (q31_t)0x775a2e89, (q31_t)0x7735b6af, (q31_t)0x7710f54c, (q31_t)0x76ebea77, (q31_t)0x76c69647, (q31_t)0x76a0f8d2, - (q31_t)0x767b1231, (q31_t)0x7654e279, - (q31_t)0x762e69c4, (q31_t)0x7607a828, (q31_t)0x75e09dbd, (q31_t)0x75b94a9c, (q31_t)0x7591aedd, (q31_t)0x7569ca99, - (q31_t)0x75419de7, (q31_t)0x751928e0, - (q31_t)0x74f06b9e, (q31_t)0x74c7663a, (q31_t)0x749e18cd, (q31_t)0x74748371, (q31_t)0x744aa63f, (q31_t)0x74208150, - (q31_t)0x73f614c0, (q31_t)0x73cb60a8, - (q31_t)0x73a06522, (q31_t)0x73752249, (q31_t)0x73499838, (q31_t)0x731dc70a, (q31_t)0x72f1aed9, (q31_t)0x72c54fc1, - (q31_t)0x7298a9dd, (q31_t)0x726bbd48, - (q31_t)0x723e8a20, (q31_t)0x7211107e, (q31_t)0x71e35080, (q31_t)0x71b54a41, (q31_t)0x7186fdde, (q31_t)0x71586b74, - (q31_t)0x7129931f, (q31_t)0x70fa74fc, - (q31_t)0x70cb1128, (q31_t)0x709b67c0, (q31_t)0x706b78e3, (q31_t)0x703b44ad, (q31_t)0x700acb3c, (q31_t)0x6fda0cae, - (q31_t)0x6fa90921, (q31_t)0x6f77c0b3, - (q31_t)0x6f463383, (q31_t)0x6f1461b0, (q31_t)0x6ee24b57, (q31_t)0x6eaff099, (q31_t)0x6e7d5193, (q31_t)0x6e4a6e66, - (q31_t)0x6e174730, (q31_t)0x6de3dc11, - (q31_t)0x6db02d29, (q31_t)0x6d7c3a98, (q31_t)0x6d48047e, (q31_t)0x6d138afb, (q31_t)0x6cdece2f, (q31_t)0x6ca9ce3b, - (q31_t)0x6c748b3f, (q31_t)0x6c3f055d, - (q31_t)0x6c093cb6, (q31_t)0x6bd3316a, (q31_t)0x6b9ce39b, (q31_t)0x6b66536b, (q31_t)0x6b2f80fb, (q31_t)0x6af86c6c, - (q31_t)0x6ac115e2, (q31_t)0x6a897d7d, - (q31_t)0x6a51a361, (q31_t)0x6a1987b0, (q31_t)0x69e12a8c, (q31_t)0x69a88c19, (q31_t)0x696fac78, (q31_t)0x69368bce, - (q31_t)0x68fd2a3d, (q31_t)0x68c387e9, - (q31_t)0x6889a4f6, (q31_t)0x684f8186, (q31_t)0x68151dbe, (q31_t)0x67da79c3, (q31_t)0x679f95b7, (q31_t)0x676471c0, - (q31_t)0x67290e02, (q31_t)0x66ed6aa1, - (q31_t)0x66b187c3, (q31_t)0x6675658c, (q31_t)0x66390422, (q31_t)0x65fc63a9, (q31_t)0x65bf8447, (q31_t)0x65826622, - (q31_t)0x6545095f, (q31_t)0x65076e25, - (q31_t)0x64c99498, (q31_t)0x648b7ce0, (q31_t)0x644d2722, (q31_t)0x640e9386, (q31_t)0x63cfc231, (q31_t)0x6390b34a, - (q31_t)0x635166f9, (q31_t)0x6311dd64, - (q31_t)0x62d216b3, (q31_t)0x6292130c, (q31_t)0x6251d298, (q31_t)0x6211557e, (q31_t)0x61d09be5, (q31_t)0x618fa5f7, - (q31_t)0x614e73da, (q31_t)0x610d05b7, - (q31_t)0x60cb5bb7, (q31_t)0x60897601, (q31_t)0x604754bf, (q31_t)0x6004f819, (q31_t)0x5fc26038, (q31_t)0x5f7f8d46, - (q31_t)0x5f3c7f6b, (q31_t)0x5ef936d1, - (q31_t)0x5eb5b3a2, (q31_t)0x5e71f606, (q31_t)0x5e2dfe29, (q31_t)0x5de9cc33, (q31_t)0x5da5604f, (q31_t)0x5d60baa7, - (q31_t)0x5d1bdb65, (q31_t)0x5cd6c2b5, - (q31_t)0x5c9170bf, (q31_t)0x5c4be5b0, (q31_t)0x5c0621b2, (q31_t)0x5bc024f0, (q31_t)0x5b79ef96, (q31_t)0x5b3381ce, - (q31_t)0x5aecdbc5, (q31_t)0x5aa5fda5, - (q31_t)0x5a5ee79a, (q31_t)0x5a1799d1, (q31_t)0x59d01475, (q31_t)0x598857b2, (q31_t)0x594063b5, (q31_t)0x58f838a9, - (q31_t)0x58afd6bd, (q31_t)0x58673e1b, - (q31_t)0x581e6ef1, (q31_t)0x57d5696d, (q31_t)0x578c2dba, (q31_t)0x5742bc06, (q31_t)0x56f9147e, (q31_t)0x56af3750, - (q31_t)0x566524aa, (q31_t)0x561adcb9, - (q31_t)0x55d05faa, (q31_t)0x5585adad, (q31_t)0x553ac6ee, (q31_t)0x54efab9c, (q31_t)0x54a45be6, (q31_t)0x5458d7f9, - (q31_t)0x540d2005, (q31_t)0x53c13439, - (q31_t)0x537514c2, (q31_t)0x5328c1d0, (q31_t)0x52dc3b92, (q31_t)0x528f8238, (q31_t)0x524295f0, (q31_t)0x51f576ea, - (q31_t)0x51a82555, (q31_t)0x515aa162, - (q31_t)0x510ceb40, (q31_t)0x50bf031f, (q31_t)0x5070e92f, (q31_t)0x50229da1, (q31_t)0x4fd420a4, (q31_t)0x4f857269, - (q31_t)0x4f369320, (q31_t)0x4ee782fb, - (q31_t)0x4e984229, (q31_t)0x4e48d0dd, (q31_t)0x4df92f46, (q31_t)0x4da95d96, (q31_t)0x4d595bfe, (q31_t)0x4d092ab0, - (q31_t)0x4cb8c9dd, (q31_t)0x4c6839b7, - (q31_t)0x4c177a6e, (q31_t)0x4bc68c36, (q31_t)0x4b756f40, (q31_t)0x4b2423be, (q31_t)0x4ad2a9e2, (q31_t)0x4a8101de, - (q31_t)0x4a2f2be6, (q31_t)0x49dd282a, - (q31_t)0x498af6df, (q31_t)0x49389836, (q31_t)0x48e60c62, (q31_t)0x48935397, (q31_t)0x48406e08, (q31_t)0x47ed5be6, - (q31_t)0x479a1d67, (q31_t)0x4746b2bc, - (q31_t)0x46f31c1a, (q31_t)0x469f59b4, (q31_t)0x464b6bbe, (q31_t)0x45f7526b, (q31_t)0x45a30df0, (q31_t)0x454e9e80, - (q31_t)0x44fa0450, (q31_t)0x44a53f93, - (q31_t)0x4450507e, (q31_t)0x43fb3746, (q31_t)0x43a5f41e, (q31_t)0x4350873c, (q31_t)0x42faf0d4, (q31_t)0x42a5311b, - (q31_t)0x424f4845, (q31_t)0x41f93689, - (q31_t)0x41a2fc1a, (q31_t)0x414c992f, (q31_t)0x40f60dfb, (q31_t)0x409f5ab6, (q31_t)0x40487f94, (q31_t)0x3ff17cca, - (q31_t)0x3f9a5290, (q31_t)0x3f430119, - (q31_t)0x3eeb889c, (q31_t)0x3e93e950, (q31_t)0x3e3c2369, (q31_t)0x3de4371f, (q31_t)0x3d8c24a8, (q31_t)0x3d33ec39, - (q31_t)0x3cdb8e09, (q31_t)0x3c830a50, - (q31_t)0x3c2a6142, (q31_t)0x3bd19318, (q31_t)0x3b78a007, (q31_t)0x3b1f8848, (q31_t)0x3ac64c0f, (q31_t)0x3a6ceb96, - (q31_t)0x3a136712, (q31_t)0x39b9bebc, - (q31_t)0x395ff2c9, (q31_t)0x39060373, (q31_t)0x38abf0ef, (q31_t)0x3851bb77, (q31_t)0x37f76341, (q31_t)0x379ce885, - (q31_t)0x37424b7b, (q31_t)0x36e78c5b, - (q31_t)0x368cab5c, (q31_t)0x3631a8b8, (q31_t)0x35d684a6, (q31_t)0x357b3f5d, (q31_t)0x351fd918, (q31_t)0x34c4520d, - (q31_t)0x3468aa76, (q31_t)0x340ce28b, - (q31_t)0x33b0fa84, (q31_t)0x3354f29b, (q31_t)0x32f8cb07, (q31_t)0x329c8402, (q31_t)0x32401dc6, (q31_t)0x31e39889, - (q31_t)0x3186f487, (q31_t)0x312a31f8, - (q31_t)0x30cd5115, (q31_t)0x30705217, (q31_t)0x30133539, (q31_t)0x2fb5fab2, (q31_t)0x2f58a2be, (q31_t)0x2efb2d95, - (q31_t)0x2e9d9b70, (q31_t)0x2e3fec8b, - (q31_t)0x2de2211e, (q31_t)0x2d843964, (q31_t)0x2d263596, (q31_t)0x2cc815ee, (q31_t)0x2c69daa6, (q31_t)0x2c0b83fa, - (q31_t)0x2bad1221, (q31_t)0x2b4e8558, - (q31_t)0x2aefddd8, (q31_t)0x2a911bdc, (q31_t)0x2a323f9e, (q31_t)0x29d34958, (q31_t)0x29743946, (q31_t)0x29150fa1, - (q31_t)0x28b5cca5, (q31_t)0x2856708d, - (q31_t)0x27f6fb92, (q31_t)0x27976df1, (q31_t)0x2737c7e3, (q31_t)0x26d809a5, (q31_t)0x26783370, (q31_t)0x26184581, - (q31_t)0x25b84012, (q31_t)0x2558235f, - (q31_t)0x24f7efa2, (q31_t)0x2497a517, (q31_t)0x243743fa, (q31_t)0x23d6cc87, (q31_t)0x23763ef7, (q31_t)0x23159b88, - (q31_t)0x22b4e274, (q31_t)0x225413f8, - (q31_t)0x21f3304f, (q31_t)0x219237b5, (q31_t)0x21312a65, (q31_t)0x20d0089c, (q31_t)0x206ed295, (q31_t)0x200d888d, - (q31_t)0x1fac2abf, (q31_t)0x1f4ab968, - (q31_t)0x1ee934c3, (q31_t)0x1e879d0d, (q31_t)0x1e25f282, (q31_t)0x1dc4355e, (q31_t)0x1d6265dd, (q31_t)0x1d00843d, - (q31_t)0x1c9e90b8, (q31_t)0x1c3c8b8c, - (q31_t)0x1bda74f6, (q31_t)0x1b784d30, (q31_t)0x1b161479, (q31_t)0x1ab3cb0d, (q31_t)0x1a517128, (q31_t)0x19ef0707, - (q31_t)0x198c8ce7, (q31_t)0x192a0304, - (q31_t)0x18c7699b, (q31_t)0x1864c0ea, (q31_t)0x1802092c, (q31_t)0x179f429f, (q31_t)0x173c6d80, (q31_t)0x16d98a0c, - (q31_t)0x1676987f, (q31_t)0x16139918, - (q31_t)0x15b08c12, (q31_t)0x154d71aa, (q31_t)0x14ea4a1f, (q31_t)0x148715ae, (q31_t)0x1423d492, (q31_t)0x13c0870a, - (q31_t)0x135d2d53, (q31_t)0x12f9c7aa, - (q31_t)0x1296564d, (q31_t)0x1232d979, (q31_t)0x11cf516a, (q31_t)0x116bbe60, (q31_t)0x11082096, (q31_t)0x10a4784b, - (q31_t)0x1040c5bb, (q31_t)0xfdd0926, - (q31_t)0xf7942c7, (q31_t)0xf1572dc, (q31_t)0xeb199a4, (q31_t)0xe4db75b, (q31_t)0xde9cc40, (q31_t)0xd85d88f, (q31_t)0xd21dc87, - (q31_t)0xcbdd865, - (q31_t)0xc59cc68, (q31_t)0xbf5b8cb, (q31_t)0xb919dcf, (q31_t)0xb2d7baf, (q31_t)0xac952aa, (q31_t)0xa6522fe, (q31_t)0xa00ece8, - (q31_t)0x99cb0a7, - (q31_t)0x9386e78, (q31_t)0x8d42699, (q31_t)0x86fd947, (q31_t)0x80b86c2, (q31_t)0x7a72f45, (q31_t)0x742d311, (q31_t)0x6de7262, - (q31_t)0x67a0d76, - (q31_t)0x615a48b, (q31_t)0x5b137df, (q31_t)0x54cc7b1, (q31_t)0x4e8543e, (q31_t)0x483ddc3, (q31_t)0x41f6480, (q31_t)0x3bae8b2, - (q31_t)0x3566a96, - (q31_t)0x2f1ea6c, (q31_t)0x28d6870, (q31_t)0x228e4e2, (q31_t)0x1c45ffe, (q31_t)0x15fda03, (q31_t)0xfb5330, (q31_t)0x96cbc1, - (q31_t)0x3243f5 -}; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048) - const q31_t WeightsQ31_2048[4096] = { - (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7fffe9cb, (q31_t)0xffb49a12, - (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff8719, (q31_t)0xff501258, - (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a, - (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffdd4d7, (q31_t)0xfe870467, - (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffc8549, (q31_t)0xfe227eac, - (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18, - (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff8f954, (q31_t)0xfd5976e9, - (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c, - 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(q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12e0ec6a, (q31_t)0x81665c84, - (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x127d7829, (q31_t)0x8157afcd, - (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x1219f880, (q31_t)0x81495136, - (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11b66dad, (q31_t)0x813b40ca, - (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x1152d7ed, (q31_t)0x812d7e8f, - (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x10ef377d, (q31_t)0x81200a90, - (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x108b8c9b, (q31_t)0x8112e4d4, - (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x1027d784, (q31_t)0x81060d63, - (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfdd0926, (q31_t)0x80fc9f35, (q31_t)0xfc41876, (q31_t)0x80f98446, - (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xf923546, (q31_t)0x80f35d19, (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf604faf, (q31_t)0x80ed4984, - (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf1572dc, (q31_t)0x80e450e2, (q31_t)0xefc7d6b, (q31_t)0x80e15d24, - (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e, - (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe34bd66, (q31_t)0x80ca6fa9, - (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c, - (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd6cda53, (q31_t)0x80b4bc0e, - (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd08dc3f, (q31_t)0x80aa5806, - (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xca4d620, (q31_t)0x80a04289, - (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc40c835, (q31_t)0x80967b9f, - (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbdcb2bb, (q31_t)0x808d034c, - (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb7895f0, (q31_t)0x8083d998, - (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb147211, (q31_t)0x807afe87, - (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xab0475c, (q31_t)0x8072721f, - (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa4c1610, (q31_t)0x806a3466, - (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9e7de6a, (q31_t)0x80624560, - (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x983a0a7, (q31_t)0x805aa512, - (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x91f5d06, (q31_t)0x80535381, - (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8d42699, (q31_t)0x804e0a04, (q31_t)0x8bb13c5, (q31_t)0x804c50b2, - (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x888ed1b, (q31_t)0x8048ecd5, (q31_t)0x86fd947, (q31_t)0x80474248, (q31_t)0x856c520, (q31_t)0x80459ca9, - (q31_t)0x83db0a7, (q31_t)0x8043fbf6, (q31_t)0x8249bdd, (q31_t)0x80426030, (q31_t)0x80b86c2, (q31_t)0x8040c956, (q31_t)0x7f27157, (q31_t)0x803f376a, - (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x7c04598, (q31_t)0x803c2257, (q31_t)0x7a72f45, (q31_t)0x803a9f31, (q31_t)0x78e18a7, (q31_t)0x803920f8, - (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x75bea8c, (q31_t)0x8036334e, (q31_t)0x742d311, (q31_t)0x8034c3dd, (q31_t)0x729bb4e, (q31_t)0x80335959, - (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6de7262, (q31_t)0x802f375d, (q31_t)0x6c5598a, (q31_t)0x802de08e, - (q31_t)0x6ac406f, (q31_t)0x802c8ead, (q31_t)0x6932713, (q31_t)0x802b41ba, (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x660f398, (q31_t)0x8028b69c, - (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x5fc89b8, (q31_t)0x8023db86, - (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x5ca5361, (q31_t)0x80218b8f, (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5981c26, (q31_t)0x801f4f4f, - (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x533ab20, (q31_t)0x801b11fa, - (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4cf36e5, (q31_t)0x80172388, - (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x46abfb3, (q31_t)0x801383fe, - (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x40645c7, (q31_t)0x8010335c, - (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3a1c960, (q31_t)0x800d31a5, - (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x33d4abb, (q31_t)0x800a7edb, - (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2d8ca16, (q31_t)0x80081b00, - (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x27447b0, (q31_t)0x80060614, - (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x20fc3c6, (q31_t)0x8004401a, - (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1ab3e97, (q31_t)0x8002c912, - (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x146b860, (q31_t)0x8001a0fd, - (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0xe23160, (q31_t)0x8000c7dc, - (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x7da9d4, (q31_t)0x80003daf, - (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x1921fb, (q31_t)0x80000278 -}; - const q31_t cos_factorsQ31_2048[2048] = { - (q31_t)0x7fffff62, (q31_t)0x7ffffa73, (q31_t)0x7ffff094, (q31_t)0x7fffe1c6, (q31_t)0x7fffce09, (q31_t)0x7fffb55c, - (q31_t)0x7fff97c1, (q31_t)0x7fff7536, - (q31_t)0x7fff4dbb, (q31_t)0x7fff2151, (q31_t)0x7ffeeff8, (q31_t)0x7ffeb9b0, (q31_t)0x7ffe7e79, (q31_t)0x7ffe3e52, - (q31_t)0x7ffdf93c, (q31_t)0x7ffdaf37, - (q31_t)0x7ffd6042, (q31_t)0x7ffd0c5f, (q31_t)0x7ffcb38c, (q31_t)0x7ffc55ca, (q31_t)0x7ffbf319, (q31_t)0x7ffb8b78, - (q31_t)0x7ffb1ee9, (q31_t)0x7ffaad6a, - (q31_t)0x7ffa36fc, (q31_t)0x7ff9bba0, (q31_t)0x7ff93b54, (q31_t)0x7ff8b619, (q31_t)0x7ff82bef, (q31_t)0x7ff79cd6, - (q31_t)0x7ff708ce, (q31_t)0x7ff66fd7, - (q31_t)0x7ff5d1f1, (q31_t)0x7ff52f1d, (q31_t)0x7ff48759, (q31_t)0x7ff3daa6, (q31_t)0x7ff32905, (q31_t)0x7ff27275, - (q31_t)0x7ff1b6f6, (q31_t)0x7ff0f688, - (q31_t)0x7ff0312c, (q31_t)0x7fef66e1, (q31_t)0x7fee97a7, (q31_t)0x7fedc37e, (q31_t)0x7fecea67, (q31_t)0x7fec0c62, - (q31_t)0x7feb296d, (q31_t)0x7fea418b, - (q31_t)0x7fe954ba, (q31_t)0x7fe862fa, (q31_t)0x7fe76c4c, (q31_t)0x7fe670b0, (q31_t)0x7fe57025, (q31_t)0x7fe46aac, - (q31_t)0x7fe36045, (q31_t)0x7fe250ef, - (q31_t)0x7fe13cac, (q31_t)0x7fe0237a, (q31_t)0x7fdf055a, (q31_t)0x7fdde24d, (q31_t)0x7fdcba51, (q31_t)0x7fdb8d67, - (q31_t)0x7fda5b8f, (q31_t)0x7fd924ca, - (q31_t)0x7fd7e917, (q31_t)0x7fd6a875, (q31_t)0x7fd562e7, (q31_t)0x7fd4186a, (q31_t)0x7fd2c900, (q31_t)0x7fd174a8, - (q31_t)0x7fd01b63, (q31_t)0x7fcebd31, - (q31_t)0x7fcd5a11, (q31_t)0x7fcbf203, (q31_t)0x7fca8508, (q31_t)0x7fc91320, (q31_t)0x7fc79c4b, (q31_t)0x7fc62089, - (q31_t)0x7fc49fda, (q31_t)0x7fc31a3d, - (q31_t)0x7fc18fb4, (q31_t)0x7fc0003e, (q31_t)0x7fbe6bdb, (q31_t)0x7fbcd28b, (q31_t)0x7fbb344e, (q31_t)0x7fb99125, - (q31_t)0x7fb7e90f, (q31_t)0x7fb63c0d, - (q31_t)0x7fb48a1e, (q31_t)0x7fb2d343, (q31_t)0x7fb1177b, (q31_t)0x7faf56c7, (q31_t)0x7fad9127, (q31_t)0x7fabc69b, - (q31_t)0x7fa9f723, (q31_t)0x7fa822bf, - (q31_t)0x7fa6496e, (q31_t)0x7fa46b32, (q31_t)0x7fa2880b, (q31_t)0x7fa09ff7, (q31_t)0x7f9eb2f8, (q31_t)0x7f9cc10d, - (q31_t)0x7f9aca37, (q31_t)0x7f98ce76, - (q31_t)0x7f96cdc9, (q31_t)0x7f94c831, (q31_t)0x7f92bdad, (q31_t)0x7f90ae3f, (q31_t)0x7f8e99e6, (q31_t)0x7f8c80a1, - (q31_t)0x7f8a6272, (q31_t)0x7f883f58, - (q31_t)0x7f861753, (q31_t)0x7f83ea64, (q31_t)0x7f81b88a, (q31_t)0x7f7f81c6, (q31_t)0x7f7d4617, (q31_t)0x7f7b057e, - (q31_t)0x7f78bffb, (q31_t)0x7f76758e, - (q31_t)0x7f742637, (q31_t)0x7f71d1f6, (q31_t)0x7f6f78cb, (q31_t)0x7f6d1ab6, (q31_t)0x7f6ab7b8, (q31_t)0x7f684fd0, - (q31_t)0x7f65e2ff, (q31_t)0x7f637144, - (q31_t)0x7f60faa0, (q31_t)0x7f5e7f13, (q31_t)0x7f5bfe9d, (q31_t)0x7f59793e, (q31_t)0x7f56eef5, (q31_t)0x7f545fc5, - (q31_t)0x7f51cbab, (q31_t)0x7f4f32a9, - (q31_t)0x7f4c94be, (q31_t)0x7f49f1eb, (q31_t)0x7f474a30, (q31_t)0x7f449d8c, (q31_t)0x7f41ec01, (q31_t)0x7f3f358d, - (q31_t)0x7f3c7a31, (q31_t)0x7f39b9ee, - (q31_t)0x7f36f4c3, (q31_t)0x7f342ab1, (q31_t)0x7f315bb7, (q31_t)0x7f2e87d6, (q31_t)0x7f2baf0d, (q31_t)0x7f28d15d, - (q31_t)0x7f25eec7, (q31_t)0x7f230749, - (q31_t)0x7f201ae5, (q31_t)0x7f1d299a, (q31_t)0x7f1a3368, (q31_t)0x7f173850, (q31_t)0x7f143852, (q31_t)0x7f11336d, - (q31_t)0x7f0e29a3, (q31_t)0x7f0b1af2, - (q31_t)0x7f08075c, (q31_t)0x7f04eedf, (q31_t)0x7f01d17d, (q31_t)0x7efeaf36, (q31_t)0x7efb8809, (q31_t)0x7ef85bf7, - (q31_t)0x7ef52b00, (q31_t)0x7ef1f524, - (q31_t)0x7eeeba62, (q31_t)0x7eeb7abc, (q31_t)0x7ee83632, (q31_t)0x7ee4ecc3, (q31_t)0x7ee19e6f, (q31_t)0x7ede4b38, - (q31_t)0x7edaf31c, (q31_t)0x7ed7961c, - (q31_t)0x7ed43438, (q31_t)0x7ed0cd70, (q31_t)0x7ecd61c5, (q31_t)0x7ec9f137, (q31_t)0x7ec67bc5, (q31_t)0x7ec3016f, - (q31_t)0x7ebf8237, (q31_t)0x7ebbfe1c, - (q31_t)0x7eb8751e, (q31_t)0x7eb4e73d, (q31_t)0x7eb1547a, (q31_t)0x7eadbcd4, (q31_t)0x7eaa204c, (q31_t)0x7ea67ee2, - (q31_t)0x7ea2d896, (q31_t)0x7e9f2d68, - (q31_t)0x7e9b7d58, (q31_t)0x7e97c867, (q31_t)0x7e940e94, (q31_t)0x7e904fe0, (q31_t)0x7e8c8c4b, (q31_t)0x7e88c3d5, - (q31_t)0x7e84f67e, (q31_t)0x7e812447, - (q31_t)0x7e7d4d2f, (q31_t)0x7e797136, (q31_t)0x7e75905d, (q31_t)0x7e71aaa4, (q31_t)0x7e6dc00c, (q31_t)0x7e69d093, - (q31_t)0x7e65dc3b, (q31_t)0x7e61e303, - (q31_t)0x7e5de4ec, (q31_t)0x7e59e1f5, (q31_t)0x7e55da20, (q31_t)0x7e51cd6c, (q31_t)0x7e4dbbd9, (q31_t)0x7e49a567, - (q31_t)0x7e458a17, (q31_t)0x7e4169e9, - (q31_t)0x7e3d44dd, (q31_t)0x7e391af3, (q31_t)0x7e34ec2b, (q31_t)0x7e30b885, (q31_t)0x7e2c8002, (q31_t)0x7e2842a2, - (q31_t)0x7e240064, (q31_t)0x7e1fb94a, - (q31_t)0x7e1b6d53, (q31_t)0x7e171c7f, (q31_t)0x7e12c6ce, (q31_t)0x7e0e6c42, (q31_t)0x7e0a0cd9, (q31_t)0x7e05a894, - (q31_t)0x7e013f74, (q31_t)0x7dfcd178, - (q31_t)0x7df85ea0, (q31_t)0x7df3e6ee, (q31_t)0x7def6a60, (q31_t)0x7deae8f7, (q31_t)0x7de662b3, (q31_t)0x7de1d795, - (q31_t)0x7ddd479d, (q31_t)0x7dd8b2ca, - (q31_t)0x7dd4191d, (q31_t)0x7dcf7a96, (q31_t)0x7dcad736, (q31_t)0x7dc62efc, (q31_t)0x7dc181e8, (q31_t)0x7dbccffc, - (q31_t)0x7db81936, (q31_t)0x7db35d98, - (q31_t)0x7dae9d21, (q31_t)0x7da9d7d2, (q31_t)0x7da50dab, (q31_t)0x7da03eab, (q31_t)0x7d9b6ad3, (q31_t)0x7d969224, - (q31_t)0x7d91b49e, (q31_t)0x7d8cd240, - (q31_t)0x7d87eb0a, (q31_t)0x7d82fefe, (q31_t)0x7d7e0e1c, (q31_t)0x7d791862, (q31_t)0x7d741dd2, (q31_t)0x7d6f1e6c, - (q31_t)0x7d6a1a31, (q31_t)0x7d65111f, - (q31_t)0x7d600338, (q31_t)0x7d5af07b, (q31_t)0x7d55d8e9, (q31_t)0x7d50bc82, (q31_t)0x7d4b9b46, (q31_t)0x7d467536, - (q31_t)0x7d414a51, (q31_t)0x7d3c1a98, - (q31_t)0x7d36e60b, (q31_t)0x7d31acaa, (q31_t)0x7d2c6e76, (q31_t)0x7d272b6e, (q31_t)0x7d21e393, (q31_t)0x7d1c96e5, - (q31_t)0x7d174564, (q31_t)0x7d11ef11, - (q31_t)0x7d0c93eb, (q31_t)0x7d0733f3, (q31_t)0x7d01cf29, (q31_t)0x7cfc658d, (q31_t)0x7cf6f720, (q31_t)0x7cf183e1, - (q31_t)0x7cec0bd1, (q31_t)0x7ce68ef0, - (q31_t)0x7ce10d3f, (q31_t)0x7cdb86bd, (q31_t)0x7cd5fb6a, (q31_t)0x7cd06b48, (q31_t)0x7ccad656, (q31_t)0x7cc53c94, - (q31_t)0x7cbf9e03, (q31_t)0x7cb9faa2, - (q31_t)0x7cb45272, (q31_t)0x7caea574, (q31_t)0x7ca8f3a7, (q31_t)0x7ca33d0c, (q31_t)0x7c9d81a3, (q31_t)0x7c97c16b, - (q31_t)0x7c91fc66, (q31_t)0x7c8c3294, - (q31_t)0x7c8663f4, (q31_t)0x7c809088, (q31_t)0x7c7ab84e, (q31_t)0x7c74db48, (q31_t)0x7c6ef976, (q31_t)0x7c6912d7, - (q31_t)0x7c63276d, (q31_t)0x7c5d3737, - (q31_t)0x7c574236, (q31_t)0x7c514869, (q31_t)0x7c4b49d2, (q31_t)0x7c45466f, (q31_t)0x7c3f3e42, (q31_t)0x7c39314b, - (q31_t)0x7c331f8a, (q31_t)0x7c2d08ff, - (q31_t)0x7c26edab, (q31_t)0x7c20cd8d, (q31_t)0x7c1aa8a6, (q31_t)0x7c147ef6, (q31_t)0x7c0e507e, (q31_t)0x7c081d3d, - (q31_t)0x7c01e534, (q31_t)0x7bfba863, - (q31_t)0x7bf566cb, (q31_t)0x7bef206b, (q31_t)0x7be8d544, (q31_t)0x7be28556, (q31_t)0x7bdc30a1, (q31_t)0x7bd5d726, - (q31_t)0x7bcf78e5, (q31_t)0x7bc915dd, - (q31_t)0x7bc2ae10, (q31_t)0x7bbc417e, (q31_t)0x7bb5d026, (q31_t)0x7baf5a09, (q31_t)0x7ba8df28, (q31_t)0x7ba25f82, - (q31_t)0x7b9bdb18, (q31_t)0x7b9551ea, - (q31_t)0x7b8ec3f8, (q31_t)0x7b883143, (q31_t)0x7b8199ca, (q31_t)0x7b7afd8f, (q31_t)0x7b745c91, (q31_t)0x7b6db6d0, - (q31_t)0x7b670c4d, (q31_t)0x7b605d09, - (q31_t)0x7b59a902, (q31_t)0x7b52f03a, (q31_t)0x7b4c32b1, (q31_t)0x7b457068, (q31_t)0x7b3ea95d, (q31_t)0x7b37dd92, - (q31_t)0x7b310d07, (q31_t)0x7b2a37bc, - (q31_t)0x7b235db2, (q31_t)0x7b1c7ee8, (q31_t)0x7b159b5f, (q31_t)0x7b0eb318, (q31_t)0x7b07c612, (q31_t)0x7b00d44d, - (q31_t)0x7af9ddcb, (q31_t)0x7af2e28b, - (q31_t)0x7aebe28d, (q31_t)0x7ae4ddd2, (q31_t)0x7addd45b, (q31_t)0x7ad6c626, (q31_t)0x7acfb336, (q31_t)0x7ac89b89, - (q31_t)0x7ac17f20, (q31_t)0x7aba5dfc, - (q31_t)0x7ab3381d, (q31_t)0x7aac0d82, (q31_t)0x7aa4de2d, (q31_t)0x7a9daa1d, (q31_t)0x7a967153, (q31_t)0x7a8f33d0, - (q31_t)0x7a87f192, (q31_t)0x7a80aa9c, - (q31_t)0x7a795eec, (q31_t)0x7a720e84, (q31_t)0x7a6ab963, (q31_t)0x7a635f8a, (q31_t)0x7a5c00f9, (q31_t)0x7a549db0, - (q31_t)0x7a4d35b0, (q31_t)0x7a45c8f9, - (q31_t)0x7a3e578b, (q31_t)0x7a36e166, (q31_t)0x7a2f668c, (q31_t)0x7a27e6fb, (q31_t)0x7a2062b5, (q31_t)0x7a18d9b9, - (q31_t)0x7a114c09, (q31_t)0x7a09b9a4, - (q31_t)0x7a02228a, (q31_t)0x79fa86bc, (q31_t)0x79f2e63a, (q31_t)0x79eb4105, (q31_t)0x79e3971c, (q31_t)0x79dbe880, - (q31_t)0x79d43532, (q31_t)0x79cc7d31, - (q31_t)0x79c4c07e, (q31_t)0x79bcff19, (q31_t)0x79b53903, (q31_t)0x79ad6e3c, (q31_t)0x79a59ec3, (q31_t)0x799dca9a, - (q31_t)0x7995f1c1, (q31_t)0x798e1438, - (q31_t)0x798631ff, (q31_t)0x797e4b16, (q31_t)0x79765f7f, (q31_t)0x796e6f39, (q31_t)0x79667a44, (q31_t)0x795e80a1, - (q31_t)0x79568250, (q31_t)0x794e7f52, - (q31_t)0x794677a6, (q31_t)0x793e6b4e, (q31_t)0x79365a49, (q31_t)0x792e4497, (q31_t)0x79262a3a, (q31_t)0x791e0b31, - (q31_t)0x7915e77c, (q31_t)0x790dbf1d, - (q31_t)0x79059212, (q31_t)0x78fd605d, (q31_t)0x78f529fe, (q31_t)0x78eceef6, (q31_t)0x78e4af44, (q31_t)0x78dc6ae8, - (q31_t)0x78d421e4, (q31_t)0x78cbd437, - (q31_t)0x78c381e2, (q31_t)0x78bb2ae5, (q31_t)0x78b2cf41, (q31_t)0x78aa6ef5, (q31_t)0x78a20a03, (q31_t)0x7899a06a, - (q31_t)0x7891322a, (q31_t)0x7888bf45, - (q31_t)0x788047ba, (q31_t)0x7877cb89, (q31_t)0x786f4ab4, (q31_t)0x7866c53a, (q31_t)0x785e3b1c, (q31_t)0x7855ac5a, - (q31_t)0x784d18f4, (q31_t)0x784480ea, - (q31_t)0x783be43e, (q31_t)0x783342ef, (q31_t)0x782a9cfe, (q31_t)0x7821f26b, (q31_t)0x78194336, (q31_t)0x78108f60, - (q31_t)0x7807d6e9, (q31_t)0x77ff19d1, - (q31_t)0x77f65819, (q31_t)0x77ed91c0, (q31_t)0x77e4c6c9, (q31_t)0x77dbf732, (q31_t)0x77d322fc, (q31_t)0x77ca4a27, - (q31_t)0x77c16cb4, (q31_t)0x77b88aa3, - (q31_t)0x77afa3f5, (q31_t)0x77a6b8a9, (q31_t)0x779dc8c0, (q31_t)0x7794d43b, (q31_t)0x778bdb19, (q31_t)0x7782dd5c, - (q31_t)0x7779db03, (q31_t)0x7770d40f, - (q31_t)0x7767c880, (q31_t)0x775eb857, (q31_t)0x7755a394, (q31_t)0x774c8a36, (q31_t)0x77436c40, (q31_t)0x773a49b0, - (q31_t)0x77312287, (q31_t)0x7727f6c6, - (q31_t)0x771ec66e, (q31_t)0x7715917d, (q31_t)0x770c57f5, (q31_t)0x770319d6, (q31_t)0x76f9d721, (q31_t)0x76f08fd5, - (q31_t)0x76e743f4, (q31_t)0x76ddf37c, - (q31_t)0x76d49e70, (q31_t)0x76cb44cf, (q31_t)0x76c1e699, (q31_t)0x76b883d0, (q31_t)0x76af1c72, (q31_t)0x76a5b082, - (q31_t)0x769c3ffe, (q31_t)0x7692cae8, - (q31_t)0x7689513f, (q31_t)0x767fd304, (q31_t)0x76765038, (q31_t)0x766cc8db, (q31_t)0x76633ced, (q31_t)0x7659ac6f, - (q31_t)0x76501760, (q31_t)0x76467dc2, - (q31_t)0x763cdf94, (q31_t)0x76333cd8, (q31_t)0x7629958c, (q31_t)0x761fe9b3, (q31_t)0x7616394c, (q31_t)0x760c8457, - (q31_t)0x7602cad5, (q31_t)0x75f90cc7, - (q31_t)0x75ef4a2c, (q31_t)0x75e58305, (q31_t)0x75dbb753, (q31_t)0x75d1e715, (q31_t)0x75c8124d, (q31_t)0x75be38fa, - (q31_t)0x75b45b1d, (q31_t)0x75aa78b6, - (q31_t)0x75a091c6, (q31_t)0x7596a64d, (q31_t)0x758cb64c, (q31_t)0x7582c1c2, (q31_t)0x7578c8b0, (q31_t)0x756ecb18, - (q31_t)0x7564c8f8, (q31_t)0x755ac251, - (q31_t)0x7550b725, (q31_t)0x7546a772, (q31_t)0x753c933a, (q31_t)0x75327a7d, (q31_t)0x75285d3b, (q31_t)0x751e3b75, - (q31_t)0x7514152b, (q31_t)0x7509ea5d, - (q31_t)0x74ffbb0d, (q31_t)0x74f58739, (q31_t)0x74eb4ee3, (q31_t)0x74e1120c, (q31_t)0x74d6d0b2, (q31_t)0x74cc8ad8, - (q31_t)0x74c2407d, (q31_t)0x74b7f1a1, - (q31_t)0x74ad9e46, (q31_t)0x74a3466b, (q31_t)0x7498ea11, (q31_t)0x748e8938, (q31_t)0x748423e0, (q31_t)0x7479ba0b, - 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(q31_t)0xe284036, - (q31_t)0xe0f456f, (q31_t)0xdf64a1c, (q31_t)0xddd4e40, (q31_t)0xdc451dc, (q31_t)0xdab54ef, (q31_t)0xd92577b, (q31_t)0xd795982, - (q31_t)0xd605b03, - (q31_t)0xd475c00, (q31_t)0xd2e5c7b, (q31_t)0xd155c73, (q31_t)0xcfc5bea, (q31_t)0xce35ae1, (q31_t)0xcca5959, (q31_t)0xcb15752, - (q31_t)0xc9854cf, - (q31_t)0xc7f51cf, (q31_t)0xc664e53, (q31_t)0xc4d4a5d, (q31_t)0xc3445ee, (q31_t)0xc1b4107, (q31_t)0xc023ba7, (q31_t)0xbe935d2, - (q31_t)0xbd02f87, - (q31_t)0xbb728c7, (q31_t)0xb9e2193, (q31_t)0xb8519ed, (q31_t)0xb6c11d5, (q31_t)0xb53094d, (q31_t)0xb3a0055, (q31_t)0xb20f6ee, - (q31_t)0xb07ed19, - (q31_t)0xaeee2d7, (q31_t)0xad5d829, (q31_t)0xabccd11, (q31_t)0xaa3c18e, (q31_t)0xa8ab5a2, (q31_t)0xa71a94f, (q31_t)0xa589c94, - (q31_t)0xa3f8f73, - (q31_t)0xa2681ed, (q31_t)0xa0d7403, (q31_t)0x9f465b5, (q31_t)0x9db5706, (q31_t)0x9c247f5, (q31_t)0x9a93884, (q31_t)0x99028b3, - (q31_t)0x9771884, - (q31_t)0x95e07f8, (q31_t)0x944f70f, (q31_t)0x92be5ca, (q31_t)0x912d42c, (q31_t)0x8f9c233, (q31_t)0x8e0afe2, (q31_t)0x8c79d3a, - (q31_t)0x8ae8a3a, - (q31_t)0x89576e5, (q31_t)0x87c633c, (q31_t)0x8634f3e, (q31_t)0x84a3aee, (q31_t)0x831264c, (q31_t)0x8181159, (q31_t)0x7fefc16, - (q31_t)0x7e5e685, - (q31_t)0x7ccd0a5, (q31_t)0x7b3ba78, (q31_t)0x79aa400, (q31_t)0x7818d3c, (q31_t)0x768762e, (q31_t)0x74f5ed7, (q31_t)0x7364738, - (q31_t)0x71d2f52, - (q31_t)0x7041726, (q31_t)0x6eafeb4, (q31_t)0x6d1e5fe, (q31_t)0x6b8cd05, (q31_t)0x69fb3c9, (q31_t)0x6869a4c, (q31_t)0x66d808f, - (q31_t)0x6546692, - (q31_t)0x63b4c57, (q31_t)0x62231de, (q31_t)0x6091729, (q31_t)0x5effc38, (q31_t)0x5d6e10c, (q31_t)0x5bdc5a7, (q31_t)0x5a4aa09, - (q31_t)0x58b8e34, - (q31_t)0x5727228, (q31_t)0x55955e6, (q31_t)0x540396f, (q31_t)0x5271cc4, (q31_t)0x50dffe7, (q31_t)0x4f4e2d8, (q31_t)0x4dbc597, - (q31_t)0x4c2a827, - (q31_t)0x4a98a88, (q31_t)0x4906cbb, (q31_t)0x4774ec1, (q31_t)0x45e309a, (q31_t)0x4451249, (q31_t)0x42bf3cd, (q31_t)0x412d528, - (q31_t)0x3f9b65b, - (q31_t)0x3e09767, (q31_t)0x3c7784d, (q31_t)0x3ae590d, (q31_t)0x39539a9, (q31_t)0x37c1a22, (q31_t)0x362fa78, (q31_t)0x349daac, - (q31_t)0x330bac1, - (q31_t)0x3179ab5, (q31_t)0x2fe7a8c, (q31_t)0x2e55a44, (q31_t)0x2cc39e1, (q31_t)0x2b31961, (q31_t)0x299f8c7, (q31_t)0x280d813, - (q31_t)0x267b747, - (q31_t)0x24e9662, (q31_t)0x2357567, (q31_t)0x21c5457, (q31_t)0x2033331, (q31_t)0x1ea11f7, (q31_t)0x1d0f0ab, (q31_t)0x1b7cf4d, - (q31_t)0x19eaddd, - (q31_t)0x1858c5e, (q31_t)0x16c6ad0, (q31_t)0x1534934, (q31_t)0x13a278a, (q31_t)0x12105d5, (q31_t)0x107e414, (q31_t)0xeec249, - (q31_t)0xd5a075, - (q31_t)0xbc7e99, (q31_t)0xa35cb5, (q31_t)0x8a3acb, (q31_t)0x7118dc, (q31_t)0x57f6e9, (q31_t)0x3ed4f2, (q31_t)0x25b2f8, - (q31_t)0xc90fe -}; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192) - const q31_t WeightsQ31_8192[16384] = { - (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffffd9, (q31_t)0xfff9b781, (q31_t)0x7fffff62, (q31_t)0xfff36f02, (q31_t)0x7ffffe9d, (q31_t)0xffed2684, - (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffffc25, (q31_t)0xffe09586, (q31_t)0x7ffffa73, (q31_t)0xffda4d08, (q31_t)0x7ffff872, (q31_t)0xffd40489, - (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7ffff382, (q31_t)0xffc7738c, (q31_t)0x7ffff094, (q31_t)0xffc12b0e, (q31_t)0x7fffed57, (q31_t)0xffbae290, - (q31_t)0x7fffe9cb, (q31_t)0xffb49a12, (q31_t)0x7fffe5f0, (q31_t)0xffae5195, (q31_t)0x7fffe1c6, (q31_t)0xffa80917, (q31_t)0x7fffdd4d, (q31_t)0xffa1c09a, - (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffd36f, (q31_t)0xff952fa0, (q31_t)0x7fffce09, (q31_t)0xff8ee724, (q31_t)0x7fffc854, (q31_t)0xff889ea7, - (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffbbfe, (q31_t)0xff7c0db0, (q31_t)0x7fffb55c, (q31_t)0xff75c535, (q31_t)0x7fffae6c, (q31_t)0xff6f7cba, - (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff9f9e, (q31_t)0xff62ebc5, (q31_t)0x7fff97c1, (q31_t)0xff5ca34b, (q31_t)0x7fff8f94, (q31_t)0xff565ad1, - (q31_t)0x7fff8719, (q31_t)0xff501258, (q31_t)0x7fff7e4f, (q31_t)0xff49c9df, (q31_t)0x7fff7536, (q31_t)0xff438167, (q31_t)0x7fff6bcd, (q31_t)0xff3d38ef, - (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff5810, (q31_t)0xff30a801, (q31_t)0x7fff4dbb, (q31_t)0xff2a5f8b, (q31_t)0x7fff4317, (q31_t)0xff241715, - (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff2ce2, (q31_t)0xff17862b, (q31_t)0x7fff2151, (q31_t)0xff113db7, (q31_t)0x7fff1572, (q31_t)0xff0af543, - (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffefcc5, (q31_t)0xfefe645e, (q31_t)0x7ffeeff8, (q31_t)0xfef81bec, (q31_t)0x7ffee2dd, (q31_t)0xfef1d37b, - (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a, (q31_t)0x7ffec7b9, (q31_t)0xfee5429a, (q31_t)0x7ffeb9b0, (q31_t)0xfedefa2b, (q31_t)0x7ffeab59, (q31_t)0xfed8b1bd, - (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe8dbd, (q31_t)0xfecc20e2, (q31_t)0x7ffe7e79, (q31_t)0xfec5d876, (q31_t)0x7ffe6ee5, (q31_t)0xfebf900a, - (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe4ed2, (q31_t)0xfeb2ff36, (q31_t)0x7ffe3e52, (q31_t)0xfeacb6cc, (q31_t)0x7ffe2d83, (q31_t)0xfea66e64, - (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffe0af8, (q31_t)0xfe99dd96, (q31_t)0x7ffdf93c, (q31_t)0xfe939530, (q31_t)0x7ffde731, (q31_t)0xfe8d4ccb, - (q31_t)0x7ffdd4d7, (q31_t)0xfe870467, (q31_t)0x7ffdc22e, (q31_t)0xfe80bc04, (q31_t)0x7ffdaf37, (q31_t)0xfe7a73a2, (q31_t)0x7ffd9bf0, (q31_t)0xfe742b41, - (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd7476, (q31_t)0xfe679a81, (q31_t)0x7ffd6042, (q31_t)0xfe615223, (q31_t)0x7ffd4bc0, (q31_t)0xfe5b09c5, - (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffd21ce, (q31_t)0xfe4e790d, (q31_t)0x7ffd0c5f, (q31_t)0xfe4830b3, (q31_t)0x7ffcf6a0, (q31_t)0xfe41e85a, - (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffcca37, (q31_t)0xfe3557ab, (q31_t)0x7ffcb38c, (q31_t)0xfe2f0f55, (q31_t)0x7ffc9c92, (q31_t)0xfe28c700, - (q31_t)0x7ffc8549, (q31_t)0xfe227eac, (q31_t)0x7ffc6db1, (q31_t)0xfe1c365a, (q31_t)0x7ffc55ca, (q31_t)0xfe15ee09, (q31_t)0x7ffc3d94, (q31_t)0xfe0fa5b8, - (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffc0c3b, (q31_t)0xfe03151c, (q31_t)0x7ffbf319, (q31_t)0xfdfccccf, (q31_t)0x7ffbd9a7, (q31_t)0xfdf68484, - (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffba5d7, (q31_t)0xfde9f3f1, (q31_t)0x7ffb8b78, (q31_t)0xfde3aba9, (q31_t)0x7ffb70cb, (q31_t)0xfddd6363, - (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffb3a83, (q31_t)0xfdd0d2db, (q31_t)0x7ffb1ee9, (q31_t)0xfdca8a99, (q31_t)0x7ffb0300, (q31_t)0xfdc44258, - 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(q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4fb2a20, (q31_t)0x8018d225, (q31_t)0x4f4e2d8, (q31_t)0x801893b4, (q31_t)0x4ee9b8c, (q31_t)0x80185592, - (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4e20cec, (q31_t)0x8017da3b, (q31_t)0x4dbc597, (q31_t)0x80179d06, (q31_t)0x4d57e40, (q31_t)0x80176020, - (q31_t)0x4cf36e5, (q31_t)0x80172388, (q31_t)0x4c8ef88, (q31_t)0x8016e740, (q31_t)0x4c2a827, (q31_t)0x8016ab46, (q31_t)0x4bc60c4, (q31_t)0x80166f9c, - (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x4afd1f4, (q31_t)0x8015f933, (q31_t)0x4a98a88, (q31_t)0x8015be75, (q31_t)0x4a34319, (q31_t)0x80158406, - (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x496b432, (q31_t)0x80151015, (q31_t)0x4906cbb, (q31_t)0x8014d693, (q31_t)0x48a2540, (q31_t)0x80149d5f, - (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x47d9643, (q31_t)0x80142be5, (q31_t)0x4774ec1, (q31_t)0x8013f39e, (q31_t)0x471073b, (q31_t)0x8013bba7, - (q31_t)0x46abfb3, (q31_t)0x801383fe, (q31_t)0x4647828, (q31_t)0x80134ca4, (q31_t)0x45e309a, (q31_t)0x80131599, (q31_t)0x457e90a, (q31_t)0x8012dedd, - (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x44b59e1, (q31_t)0x80127251, (q31_t)0x4451249, (q31_t)0x80123c82, (q31_t)0x43ecaae, (q31_t)0x80120701, - (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x4323b70, (q31_t)0x80119ced, (q31_t)0x42bf3cd, (q31_t)0x80116859, (q31_t)0x425ac28, (q31_t)0x80113414, - (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x4191cd5, (q31_t)0x8010cc78, (q31_t)0x412d528, (q31_t)0x8010991f, (q31_t)0x40c8d79, (q31_t)0x80106616, - (q31_t)0x40645c7, (q31_t)0x8010335c, (q31_t)0x3fffe12, (q31_t)0x801000f1, (q31_t)0x3f9b65b, (q31_t)0x800fced4, (q31_t)0x3f36ea2, (q31_t)0x800f9d07, - (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3e6df28, (q31_t)0x800f3a59, (q31_t)0x3e09767, (q31_t)0x800f0978, (q31_t)0x3da4fa4, (q31_t)0x800ed8e6, - (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3cdc017, (q31_t)0x800e78af, (q31_t)0x3c7784d, (q31_t)0x800e490a, (q31_t)0x3c13080, (q31_t)0x800e19b4, - (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3b4a0e0, (q31_t)0x800dbbf5, (q31_t)0x3ae590d, (q31_t)0x800d8d8b, (q31_t)0x3a81137, (q31_t)0x800d5f71, - (q31_t)0x3a1c960, (q31_t)0x800d31a5, (q31_t)0x39b8185, (q31_t)0x800d0429, (q31_t)0x39539a9, (q31_t)0x800cd6fb, (q31_t)0x38ef1ca, (q31_t)0x800caa1c, - (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x3826207, (q31_t)0x800c514c, (q31_t)0x37c1a22, (q31_t)0x800c255a, (q31_t)0x375d23a, (q31_t)0x800bf9b7, - (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3694265, (q31_t)0x800ba35d, (q31_t)0x362fa78, (q31_t)0x800b78a7, (q31_t)0x35cb288, (q31_t)0x800b4e40, - (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x35022a2, (q31_t)0x800afa5e, (q31_t)0x349daac, (q31_t)0x800ad0e3, (q31_t)0x34392b4, (q31_t)0x800aa7b8, - (q31_t)0x33d4abb, (q31_t)0x800a7edb, (q31_t)0x33702bf, (q31_t)0x800a564e, (q31_t)0x330bac1, (q31_t)0x800a2e0f, (q31_t)0x32a72c1, (q31_t)0x800a061f, - (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x31de2bb, (q31_t)0x8009b72c, (q31_t)0x3179ab5, (q31_t)0x80099029, (q31_t)0x31152ae, (q31_t)0x80096975, - (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x304c299, (q31_t)0x80091cf9, (q31_t)0x2fe7a8c, (q31_t)0x8008f732, (q31_t)0x2f8327d, (q31_t)0x8008d1ba, - (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2eba259, (q31_t)0x800887b6, (q31_t)0x2e55a44, (q31_t)0x8008632a, (q31_t)0x2df122e, (q31_t)0x80083eed, - (q31_t)0x2d8ca16, (q31_t)0x80081b00, (q31_t)0x2d281fc, (q31_t)0x8007f761, (q31_t)0x2cc39e1, (q31_t)0x8007d411, (q31_t)0x2c5f1c3, (q31_t)0x8007b110, - (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2b96184, (q31_t)0x80076bfb, (q31_t)0x2b31961, (q31_t)0x800749e7, (q31_t)0x2acd13d, (q31_t)0x80072822, - (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x2a040f0, (q31_t)0x8006e585, (q31_t)0x299f8c7, (q31_t)0x8006c4ac, (q31_t)0x293b09c, (q31_t)0x8006a423, - (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x2872043, (q31_t)0x800663fd, (q31_t)0x280d813, (q31_t)0x80064460, (q31_t)0x27a8fe2, (q31_t)0x80062513, - (q31_t)0x27447b0, (q31_t)0x80060614, (q31_t)0x26dff7c, (q31_t)0x8005e764, (q31_t)0x267b747, (q31_t)0x8005c904, (q31_t)0x2616f10, (q31_t)0x8005aaf2, - (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x254de9e, (q31_t)0x80056fbb, (q31_t)0x24e9662, (q31_t)0x80055296, (q31_t)0x2484e26, (q31_t)0x800535c0, - (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x23bbda8, (q31_t)0x8004fd00, (q31_t)0x2357567, (q31_t)0x8004e117, (q31_t)0x22f2d25, (q31_t)0x8004c57d, - (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x2229c9d, (q31_t)0x80048f35, (q31_t)0x21c5457, (q31_t)0x80047488, (q31_t)0x2160c0f, (q31_t)0x80045a29, - (q31_t)0x20fc3c6, (q31_t)0x8004401a, (q31_t)0x2097b7c, (q31_t)0x80042659, (q31_t)0x2033331, (q31_t)0x80040ce7, (q31_t)0x1fceae4, (q31_t)0x8003f3c5, - (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1f05a48, (q31_t)0x8003c26c, (q31_t)0x1ea11f7, (q31_t)0x8003aa36, (q31_t)0x1e3c9a6, (q31_t)0x8003924f, - (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1d73900, (q31_t)0x8003636e, (q31_t)0x1d0f0ab, (q31_t)0x80034c74, (q31_t)0x1caa855, (q31_t)0x800335c9, - (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1be17a6, (q31_t)0x80030960, (q31_t)0x1b7cf4d, (q31_t)0x8002f3a1, (q31_t)0x1b186f3, (q31_t)0x8002de32, - (q31_t)0x1ab3e97, (q31_t)0x8002c912, (q31_t)0x1a4f63b, (q31_t)0x8002b440, (q31_t)0x19eaddd, (q31_t)0x80029fbe, (q31_t)0x198657f, (q31_t)0x80028b8a, - (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x18bd4bf, (q31_t)0x80026410, (q31_t)0x1858c5e, (q31_t)0x800250c9, (q31_t)0x17f43fc, (q31_t)0x80023dd2, - (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x172b335, (q31_t)0x800218cf, (q31_t)0x16c6ad0, (q31_t)0x800206c4, (q31_t)0x166226a, (q31_t)0x8001f508, - (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x159919c, (q31_t)0x8001d27d, (q31_t)0x1534934, (q31_t)0x8001c1ae, (q31_t)0x14d00ca, (q31_t)0x8001b12e, - (q31_t)0x146b860, (q31_t)0x8001a0fd, (q31_t)0x1406ff6, (q31_t)0x8001911b, (q31_t)0x13a278a, (q31_t)0x80018187, (q31_t)0x133df1e, (q31_t)0x80017243, - (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x1274e43, (q31_t)0x800154a7, (q31_t)0x12105d5, (q31_t)0x80014650, (q31_t)0x11abd66, (q31_t)0x80013847, - (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x10e2c85, (q31_t)0x80011d23, (q31_t)0x107e414, (q31_t)0x80011008, (q31_t)0x1019ba2, (q31_t)0x8001033b, - (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0x0f50abd, (q31_t)0x8000ea8e, (q31_t)0x0eec249, (q31_t)0x8000deaf, (q31_t)0x0e879d5, (q31_t)0x8000d31e, - (q31_t)0x0e23160, (q31_t)0x8000c7dc, (q31_t)0x0dbe8eb, (q31_t)0x8000bce9, (q31_t)0x0d5a075, (q31_t)0x8000b245, (q31_t)0x0cf57ff, (q31_t)0x8000a7f0, - (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0c2c711, (q31_t)0x80009433, (q31_t)0x0bc7e99, (q31_t)0x80008aca, (q31_t)0x0b63621, (q31_t)0x800081b1, - (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x0a9a52f, (q31_t)0x8000706c, (q31_t)0x0a35cb5, (q31_t)0x8000683f, (q31_t)0x09d143b, (q31_t)0x80006062, - (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x0908346, (q31_t)0x80005194, (q31_t)0x08a3acb, (q31_t)0x80004aa4, (q31_t)0x083f250, (q31_t)0x80004402, - (q31_t)0x07da9d4, (q31_t)0x80003daf, (q31_t)0x0776159, (q31_t)0x800037ac, (q31_t)0x07118dc, (q31_t)0x800031f7, (q31_t)0x06ad060, (q31_t)0x80002c91, - (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x05e3f66, (q31_t)0x800022b3, (q31_t)0x057f6e9, (q31_t)0x80001e3a, (q31_t)0x051ae6b, (q31_t)0x80001a10, - (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x0451d70, (q31_t)0x800012a9, (q31_t)0x03ed4f2, (q31_t)0x80000f6c, (q31_t)0x0388c74, (q31_t)0x80000c7e, - (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x02bfb77, (q31_t)0x8000078e, (q31_t)0x025b2f8, (q31_t)0x8000058d, (q31_t)0x01f6a7a, (q31_t)0x800003db, - (q31_t)0x01921fb, (q31_t)0x80000278, (q31_t)0x012d97c, (q31_t)0x80000163, (q31_t)0x00c90fe, (q31_t)0x8000009e, (q31_t)0x006487f, (q31_t)0x80000027 -}; - const q31_t cos_factorsQ31_8192[8192] = { - (q31_t)0x7ffffff6, (q31_t)0x7fffffa7, (q31_t)0x7fffff09, (q31_t)0x7ffffe1c, (q31_t)0x7ffffce1, (q31_t)0x7ffffb56, (q31_t)0x7ffff97c, (q31_t)0x7ffff753, - (q31_t)0x7ffff4dc, (q31_t)0x7ffff215, (q31_t)0x7fffef00, (q31_t)0x7fffeb9b, (q31_t)0x7fffe7e8, (q31_t)0x7fffe3e5, (q31_t)0x7fffdf94, (q31_t)0x7fffdaf3, - (q31_t)0x7fffd604, (q31_t)0x7fffd0c6, (q31_t)0x7fffcb39, (q31_t)0x7fffc55c, (q31_t)0x7fffbf31, (q31_t)0x7fffb8b7, (q31_t)0x7fffb1ee, (q31_t)0x7fffaad6, - (q31_t)0x7fffa36f, (q31_t)0x7fff9bb9, (q31_t)0x7fff93b4, (q31_t)0x7fff8b61, (q31_t)0x7fff82be, (q31_t)0x7fff79cc, (q31_t)0x7fff708b, (q31_t)0x7fff66fc, - (q31_t)0x7fff5d1d, (q31_t)0x7fff52ef, (q31_t)0x7fff4873, (q31_t)0x7fff3da8, (q31_t)0x7fff328d, (q31_t)0x7fff2724, (q31_t)0x7fff1b6b, (q31_t)0x7fff0f64, - (q31_t)0x7fff030e, (q31_t)0x7ffef669, (q31_t)0x7ffee975, (q31_t)0x7ffedc31, (q31_t)0x7ffece9f, (q31_t)0x7ffec0be, (q31_t)0x7ffeb28e, (q31_t)0x7ffea40f, - (q31_t)0x7ffe9542, (q31_t)0x7ffe8625, (q31_t)0x7ffe76b9, (q31_t)0x7ffe66fe, (q31_t)0x7ffe56f5, (q31_t)0x7ffe469c, (q31_t)0x7ffe35f4, (q31_t)0x7ffe24fe, - (q31_t)0x7ffe13b8, (q31_t)0x7ffe0224, (q31_t)0x7ffdf040, (q31_t)0x7ffdde0e, (q31_t)0x7ffdcb8d, (q31_t)0x7ffdb8bc, (q31_t)0x7ffda59d, (q31_t)0x7ffd922f, - (q31_t)0x7ffd7e72, (q31_t)0x7ffd6a66, (q31_t)0x7ffd560b, (q31_t)0x7ffd4161, (q31_t)0x7ffd2c68, (q31_t)0x7ffd1720, (q31_t)0x7ffd0189, (q31_t)0x7ffceba4, - (q31_t)0x7ffcd56f, (q31_t)0x7ffcbeeb, (q31_t)0x7ffca819, (q31_t)0x7ffc90f7, (q31_t)0x7ffc7987, (q31_t)0x7ffc61c7, (q31_t)0x7ffc49b9, (q31_t)0x7ffc315b, - (q31_t)0x7ffc18af, (q31_t)0x7ffbffb4, (q31_t)0x7ffbe66a, (q31_t)0x7ffbccd0, (q31_t)0x7ffbb2e8, (q31_t)0x7ffb98b1, (q31_t)0x7ffb7e2b, (q31_t)0x7ffb6356, - (q31_t)0x7ffb4833, (q31_t)0x7ffb2cc0, (q31_t)0x7ffb10fe, (q31_t)0x7ffaf4ed, (q31_t)0x7ffad88e, (q31_t)0x7ffabbdf, (q31_t)0x7ffa9ee2, (q31_t)0x7ffa8195, - (q31_t)0x7ffa63fa, (q31_t)0x7ffa460f, (q31_t)0x7ffa27d6, (q31_t)0x7ffa094e, (q31_t)0x7ff9ea76, (q31_t)0x7ff9cb50, (q31_t)0x7ff9abdb, (q31_t)0x7ff98c17, - (q31_t)0x7ff96c04, (q31_t)0x7ff94ba2, (q31_t)0x7ff92af1, (q31_t)0x7ff909f2, (q31_t)0x7ff8e8a3, (q31_t)0x7ff8c705, (q31_t)0x7ff8a519, (q31_t)0x7ff882dd, - (q31_t)0x7ff86053, (q31_t)0x7ff83d79, (q31_t)0x7ff81a51, (q31_t)0x7ff7f6da, (q31_t)0x7ff7d313, (q31_t)0x7ff7aefe, (q31_t)0x7ff78a9a, (q31_t)0x7ff765e7, - (q31_t)0x7ff740e5, (q31_t)0x7ff71b94, (q31_t)0x7ff6f5f4, (q31_t)0x7ff6d005, (q31_t)0x7ff6a9c8, (q31_t)0x7ff6833b, (q31_t)0x7ff65c5f, (q31_t)0x7ff63535, - (q31_t)0x7ff60dbb, (q31_t)0x7ff5e5f3, (q31_t)0x7ff5bddc, (q31_t)0x7ff59576, (q31_t)0x7ff56cc0, (q31_t)0x7ff543bc, (q31_t)0x7ff51a69, (q31_t)0x7ff4f0c7, - (q31_t)0x7ff4c6d6, (q31_t)0x7ff49c96, (q31_t)0x7ff47208, (q31_t)0x7ff4472a, (q31_t)0x7ff41bfd, (q31_t)0x7ff3f082, (q31_t)0x7ff3c4b7, (q31_t)0x7ff3989e, - (q31_t)0x7ff36c36, (q31_t)0x7ff33f7e, (q31_t)0x7ff31278, (q31_t)0x7ff2e523, (q31_t)0x7ff2b77f, (q31_t)0x7ff2898c, (q31_t)0x7ff25b4a, (q31_t)0x7ff22cb9, - (q31_t)0x7ff1fdd9, (q31_t)0x7ff1ceab, (q31_t)0x7ff19f2d, (q31_t)0x7ff16f61, (q31_t)0x7ff13f45, (q31_t)0x7ff10edb, (q31_t)0x7ff0de22, (q31_t)0x7ff0ad19, - (q31_t)0x7ff07bc2, (q31_t)0x7ff04a1c, (q31_t)0x7ff01827, (q31_t)0x7fefe5e4, (q31_t)0x7fefb351, (q31_t)0x7fef806f, (q31_t)0x7fef4d3e, (q31_t)0x7fef19bf, - (q31_t)0x7feee5f0, (q31_t)0x7feeb1d3, (q31_t)0x7fee7d67, (q31_t)0x7fee48ac, (q31_t)0x7fee13a1, (q31_t)0x7fedde48, (q31_t)0x7feda8a0, (q31_t)0x7fed72aa, - (q31_t)0x7fed3c64, (q31_t)0x7fed05cf, (q31_t)0x7fecceec, (q31_t)0x7fec97b9, (q31_t)0x7fec6038, (q31_t)0x7fec2867, (q31_t)0x7febf048, (q31_t)0x7febb7da, - (q31_t)0x7feb7f1d, (q31_t)0x7feb4611, (q31_t)0x7feb0cb6, (q31_t)0x7fead30c, (q31_t)0x7fea9914, (q31_t)0x7fea5ecc, (q31_t)0x7fea2436, (q31_t)0x7fe9e950, - (q31_t)0x7fe9ae1c, (q31_t)0x7fe97299, (q31_t)0x7fe936c7, (q31_t)0x7fe8faa6, (q31_t)0x7fe8be36, (q31_t)0x7fe88177, (q31_t)0x7fe84469, (q31_t)0x7fe8070d, - (q31_t)0x7fe7c961, (q31_t)0x7fe78b67, (q31_t)0x7fe74d1e, (q31_t)0x7fe70e85, (q31_t)0x7fe6cf9e, (q31_t)0x7fe69068, (q31_t)0x7fe650e3, (q31_t)0x7fe61110, - (q31_t)0x7fe5d0ed, (q31_t)0x7fe5907b, (q31_t)0x7fe54fbb, (q31_t)0x7fe50eac, (q31_t)0x7fe4cd4d, (q31_t)0x7fe48ba0, (q31_t)0x7fe449a4, (q31_t)0x7fe40759, - (q31_t)0x7fe3c4bf, (q31_t)0x7fe381d7, (q31_t)0x7fe33e9f, (q31_t)0x7fe2fb19, (q31_t)0x7fe2b743, (q31_t)0x7fe2731f, (q31_t)0x7fe22eac, (q31_t)0x7fe1e9ea, - (q31_t)0x7fe1a4d9, (q31_t)0x7fe15f79, (q31_t)0x7fe119cb, (q31_t)0x7fe0d3cd, (q31_t)0x7fe08d81, (q31_t)0x7fe046e5, (q31_t)0x7fdffffb, (q31_t)0x7fdfb8c2, - (q31_t)0x7fdf713a, (q31_t)0x7fdf2963, (q31_t)0x7fdee13e, (q31_t)0x7fde98c9, (q31_t)0x7fde5006, (q31_t)0x7fde06f3, (q31_t)0x7fddbd92, (q31_t)0x7fdd73e2, - (q31_t)0x7fdd29e3, (q31_t)0x7fdcdf95, (q31_t)0x7fdc94f9, (q31_t)0x7fdc4a0d, (q31_t)0x7fdbfed3, (q31_t)0x7fdbb349, (q31_t)0x7fdb6771, (q31_t)0x7fdb1b4a, - (q31_t)0x7fdaced4, (q31_t)0x7fda820f, (q31_t)0x7fda34fc, (q31_t)0x7fd9e799, (q31_t)0x7fd999e8, (q31_t)0x7fd94be8, (q31_t)0x7fd8fd98, (q31_t)0x7fd8aefa, - (q31_t)0x7fd8600e, (q31_t)0x7fd810d2, (q31_t)0x7fd7c147, (q31_t)0x7fd7716e, (q31_t)0x7fd72146, (q31_t)0x7fd6d0cf, (q31_t)0x7fd68009, (q31_t)0x7fd62ef4, - (q31_t)0x7fd5dd90, (q31_t)0x7fd58bdd, (q31_t)0x7fd539dc, (q31_t)0x7fd4e78c, (q31_t)0x7fd494ed, (q31_t)0x7fd441ff, (q31_t)0x7fd3eec2, (q31_t)0x7fd39b36, - (q31_t)0x7fd3475c, (q31_t)0x7fd2f332, (q31_t)0x7fd29eba, (q31_t)0x7fd249f3, (q31_t)0x7fd1f4dd, (q31_t)0x7fd19f78, (q31_t)0x7fd149c5, (q31_t)0x7fd0f3c2, - (q31_t)0x7fd09d71, (q31_t)0x7fd046d1, (q31_t)0x7fcfefe2, (q31_t)0x7fcf98a4, (q31_t)0x7fcf4117, (q31_t)0x7fcee93c, (q31_t)0x7fce9112, (q31_t)0x7fce3898, - (q31_t)0x7fcddfd0, (q31_t)0x7fcd86b9, (q31_t)0x7fcd2d54, (q31_t)0x7fccd39f, (q31_t)0x7fcc799c, (q31_t)0x7fcc1f4a, (q31_t)0x7fcbc4a9, (q31_t)0x7fcb69b9, - (q31_t)0x7fcb0e7a, (q31_t)0x7fcab2ed, (q31_t)0x7fca5710, (q31_t)0x7fc9fae5, (q31_t)0x7fc99e6b, (q31_t)0x7fc941a2, (q31_t)0x7fc8e48b, (q31_t)0x7fc88724, - (q31_t)0x7fc8296f, (q31_t)0x7fc7cb6b, (q31_t)0x7fc76d18, (q31_t)0x7fc70e76, (q31_t)0x7fc6af86, (q31_t)0x7fc65046, (q31_t)0x7fc5f0b8, (q31_t)0x7fc590db, - (q31_t)0x7fc530af, (q31_t)0x7fc4d035, (q31_t)0x7fc46f6b, (q31_t)0x7fc40e53, (q31_t)0x7fc3acec, (q31_t)0x7fc34b36, (q31_t)0x7fc2e931, (q31_t)0x7fc286de, - (q31_t)0x7fc2243b, (q31_t)0x7fc1c14a, (q31_t)0x7fc15e0a, (q31_t)0x7fc0fa7b, (q31_t)0x7fc0969e, (q31_t)0x7fc03271, (q31_t)0x7fbfcdf6, (q31_t)0x7fbf692c, - (q31_t)0x7fbf0414, (q31_t)0x7fbe9eac, (q31_t)0x7fbe38f6, (q31_t)0x7fbdd2f0, (q31_t)0x7fbd6c9c, (q31_t)0x7fbd05fa, (q31_t)0x7fbc9f08, (q31_t)0x7fbc37c8, - (q31_t)0x7fbbd039, (q31_t)0x7fbb685b, (q31_t)0x7fbb002e, (q31_t)0x7fba97b2, (q31_t)0x7fba2ee8, (q31_t)0x7fb9c5cf, (q31_t)0x7fb95c67, (q31_t)0x7fb8f2b0, - (q31_t)0x7fb888ab, (q31_t)0x7fb81e57, (q31_t)0x7fb7b3b4, (q31_t)0x7fb748c2, (q31_t)0x7fb6dd81, (q31_t)0x7fb671f2, (q31_t)0x7fb60614, (q31_t)0x7fb599e7, - (q31_t)0x7fb52d6b, (q31_t)0x7fb4c0a1, (q31_t)0x7fb45387, (q31_t)0x7fb3e61f, (q31_t)0x7fb37869, (q31_t)0x7fb30a63, (q31_t)0x7fb29c0f, (q31_t)0x7fb22d6c, - (q31_t)0x7fb1be7a, (q31_t)0x7fb14f39, (q31_t)0x7fb0dfaa, (q31_t)0x7fb06fcb, (q31_t)0x7fafff9e, (q31_t)0x7faf8f23, (q31_t)0x7faf1e58, (q31_t)0x7faead3f, - (q31_t)0x7fae3bd7, (q31_t)0x7fadca20, (q31_t)0x7fad581b, (q31_t)0x7face5c6, (q31_t)0x7fac7323, (q31_t)0x7fac0031, (q31_t)0x7fab8cf1, (q31_t)0x7fab1962, - (q31_t)0x7faaa584, (q31_t)0x7faa3157, (q31_t)0x7fa9bcdb, (q31_t)0x7fa94811, (q31_t)0x7fa8d2f8, (q31_t)0x7fa85d90, (q31_t)0x7fa7e7d9, (q31_t)0x7fa771d4, - (q31_t)0x7fa6fb80, (q31_t)0x7fa684dd, (q31_t)0x7fa60dec, (q31_t)0x7fa596ac, (q31_t)0x7fa51f1d, (q31_t)0x7fa4a73f, (q31_t)0x7fa42f12, (q31_t)0x7fa3b697, - (q31_t)0x7fa33dcd, (q31_t)0x7fa2c4b5, (q31_t)0x7fa24b4d, (q31_t)0x7fa1d197, (q31_t)0x7fa15792, (q31_t)0x7fa0dd3f, (q31_t)0x7fa0629c, (q31_t)0x7f9fe7ab, - (q31_t)0x7f9f6c6b, (q31_t)0x7f9ef0dd, (q31_t)0x7f9e7500, (q31_t)0x7f9df8d4, (q31_t)0x7f9d7c59, (q31_t)0x7f9cff90, (q31_t)0x7f9c8278, (q31_t)0x7f9c0511, - (q31_t)0x7f9b875b, (q31_t)0x7f9b0957, (q31_t)0x7f9a8b04, (q31_t)0x7f9a0c62, (q31_t)0x7f998d72, (q31_t)0x7f990e33, (q31_t)0x7f988ea5, (q31_t)0x7f980ec8, - (q31_t)0x7f978e9d, (q31_t)0x7f970e23, (q31_t)0x7f968d5b, (q31_t)0x7f960c43, (q31_t)0x7f958add, (q31_t)0x7f950929, (q31_t)0x7f948725, (q31_t)0x7f9404d3, - (q31_t)0x7f938232, (q31_t)0x7f92ff43, (q31_t)0x7f927c04, (q31_t)0x7f91f878, (q31_t)0x7f91749c, (q31_t)0x7f90f072, (q31_t)0x7f906bf9, (q31_t)0x7f8fe731, - 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(q31_t)0x4e53095, (q31_t)0x4dee942, (q31_t)0x4d8a1ec, (q31_t)0x4d25a93, (q31_t)0x4cc1337, (q31_t)0x4c5cbd8, (q31_t)0x4bf8476, (q31_t)0x4b93d11, - (q31_t)0x4b2f5a9, (q31_t)0x4acae3e, (q31_t)0x4a666d1, (q31_t)0x4a01f60, (q31_t)0x499d7ed, (q31_t)0x4939077, (q31_t)0x48d48fe, (q31_t)0x4870182, - (q31_t)0x480ba04, (q31_t)0x47a7282, (q31_t)0x4742afe, (q31_t)0x46de377, (q31_t)0x4679bee, (q31_t)0x4615461, (q31_t)0x45b0cd2, (q31_t)0x454c541, - (q31_t)0x44e7dac, (q31_t)0x4483615, (q31_t)0x441ee7c, (q31_t)0x43ba6df, (q31_t)0x4355f40, (q31_t)0x42f179f, (q31_t)0x428cffb, (q31_t)0x4228854, - (q31_t)0x41c40ab, (q31_t)0x415f8ff, (q31_t)0x40fb151, (q31_t)0x40969a0, (q31_t)0x40321ed, (q31_t)0x3fcda37, (q31_t)0x3f6927f, (q31_t)0x3f04ac4, - (q31_t)0x3ea0307, (q31_t)0x3e3bb48, (q31_t)0x3dd7386, (q31_t)0x3d72bc2, (q31_t)0x3d0e3fb, (q31_t)0x3ca9c32, (q31_t)0x3c45467, (q31_t)0x3be0c99, - (q31_t)0x3b7c4c9, (q31_t)0x3b17cf7, (q31_t)0x3ab3523, (q31_t)0x3a4ed4c, (q31_t)0x39ea573, (q31_t)0x3985d97, (q31_t)0x39215ba, (q31_t)0x38bcdda, - (q31_t)0x38585f8, (q31_t)0x37f3e14, (q31_t)0x378f62e, (q31_t)0x372ae46, (q31_t)0x36c665b, (q31_t)0x3661e6f, (q31_t)0x35fd680, (q31_t)0x3598e8f, - (q31_t)0x353469c, (q31_t)0x34cfea8, (q31_t)0x346b6b1, (q31_t)0x3406eb8, (q31_t)0x33a26bd, (q31_t)0x333dec0, (q31_t)0x32d96c1, (q31_t)0x3274ec0, - (q31_t)0x32106bd, (q31_t)0x31abeb9, (q31_t)0x31476b2, (q31_t)0x30e2ea9, (q31_t)0x307e69f, (q31_t)0x3019e93, (q31_t)0x2fb5684, (q31_t)0x2f50e74, - (q31_t)0x2eec663, (q31_t)0x2e87e4f, (q31_t)0x2e2363a, (q31_t)0x2dbee22, (q31_t)0x2d5a609, (q31_t)0x2cf5def, (q31_t)0x2c915d2, (q31_t)0x2c2cdb4, - (q31_t)0x2bc8594, (q31_t)0x2b63d73, (q31_t)0x2aff54f, (q31_t)0x2a9ad2a, (q31_t)0x2a36504, (q31_t)0x29d1cdc, (q31_t)0x296d4b2, (q31_t)0x2908c87, - (q31_t)0x28a445a, (q31_t)0x283fc2b, (q31_t)0x27db3fb, (q31_t)0x2776bc9, (q31_t)0x2712396, (q31_t)0x26adb62, (q31_t)0x264932b, (q31_t)0x25e4af4, - (q31_t)0x25802bb, (q31_t)0x251ba80, (q31_t)0x24b7244, (q31_t)0x2452a07, (q31_t)0x23ee1c8, (q31_t)0x2389988, (q31_t)0x2325147, (q31_t)0x22c0904, - (q31_t)0x225c0bf, (q31_t)0x21f787a, (q31_t)0x2193033, (q31_t)0x212e7eb, (q31_t)0x20c9fa1, (q31_t)0x2065757, (q31_t)0x2000f0b, (q31_t)0x1f9c6be, - (q31_t)0x1f37e6f, (q31_t)0x1ed3620, (q31_t)0x1e6edcf, (q31_t)0x1e0a57d, (q31_t)0x1da5d2a, (q31_t)0x1d414d6, (q31_t)0x1cdcc80, (q31_t)0x1c7842a, - (q31_t)0x1c13bd2, (q31_t)0x1baf37a, (q31_t)0x1b4ab20, (q31_t)0x1ae62c5, (q31_t)0x1a81a69, (q31_t)0x1a1d20c, (q31_t)0x19b89ae, (q31_t)0x1954150, - (q31_t)0x18ef8f0, (q31_t)0x188b08f, (q31_t)0x182682d, (q31_t)0x17c1fcb, (q31_t)0x175d767, (q31_t)0x16f8f03, (q31_t)0x169469d, (q31_t)0x162fe37, - (q31_t)0x15cb5d0, (q31_t)0x1566d68, (q31_t)0x15024ff, (q31_t)0x149dc96, (q31_t)0x143942b, (q31_t)0x13d4bc0, (q31_t)0x1370354, (q31_t)0x130bae7, - (q31_t)0x12a727a, (q31_t)0x1242a0c, (q31_t)0x11de19d, (q31_t)0x117992e, (q31_t)0x11150be, (q31_t)0x10b084d, (q31_t)0x104bfdb, (q31_t)0xfe7769, - (q31_t)0xf82ef6, (q31_t)0xf1e683, (q31_t)0xeb9e0f, (q31_t)0xe5559b, (q31_t)0xdf0d26, (q31_t)0xd8c4b0, (q31_t)0xd27c3a, (q31_t)0xcc33c3, - (q31_t)0xc5eb4c, (q31_t)0xbfa2d5, (q31_t)0xb95a5d, (q31_t)0xb311e4, (q31_t)0xacc96b, (q31_t)0xa680f2, (q31_t)0xa03878, (q31_t)0x99effe, - (q31_t)0x93a784, (q31_t)0x8d5f09, (q31_t)0x87168e, (q31_t)0x80ce12, (q31_t)0x7a8597, (q31_t)0x743d1a, (q31_t)0x6df49e, (q31_t)0x67ac21, - (q31_t)0x6163a5, (q31_t)0x5b1b27, (q31_t)0x54d2aa, (q31_t)0x4e8a2c, (q31_t)0x4841af, (q31_t)0x41f931, (q31_t)0x3bb0b3, (q31_t)0x356835, - (q31_t)0x2f1fb6, (q31_t)0x28d738, (q31_t)0x228eb9, (q31_t)0x1c463b, (q31_t)0x15fdbc, (q31_t)0xfb53d, (q31_t)0x96cbe, (q31_t)0x3243f -}; - #endif - -/** - @} end of DCT4_IDCT4_Table group - */ - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15) -/** - @brief Q15 table for reciprocal -*/ -const q15_t __ALIGNED(4) armRecipTableQ15[64] = { - 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0, - 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82, - 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484, - 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0, - 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E, - 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255, - 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6, - 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978, - 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8, - 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255, - 0x41CC, 0x4146, 0x40C2, 0x4040 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31) - -/** - @brief Q31 table for reciprocal -*/ -const q31_t armRecipTableQ31[64] = { - 0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928, - 0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3, - 0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519, - 0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB, - 0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318, - 0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0, - 0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D, - 0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96, - 0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2, - 0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426, - 0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102 -}; - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32) -/** - @par - Example code for the generation of the floating-point sine table: - 
-  tableSize = 512;
-  for (n = 0; n < (tableSize + 1); n++)
-  {
- 	sinTable[n] = sin(2*PI*n/tableSize);
-  }
- @par - where PI value is 3.14159265358979 - */ -const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1] = { - 0.00000000f, 0.01227154f, 0.02454123f, 0.03680722f, 0.04906767f, 0.06132074f, - 0.07356456f, 0.08579731f, 0.09801714f, 0.11022221f, 0.12241068f, 0.13458071f, - 0.14673047f, 0.15885814f, 0.17096189f, 0.18303989f, 0.19509032f, 0.20711138f, - 0.21910124f, 0.23105811f, 0.24298018f, 0.25486566f, 0.26671276f, 0.27851969f, - 0.29028468f, 0.30200595f, 0.31368174f, 0.32531029f, 0.33688985f, 0.34841868f, - 0.35989504f, 0.37131719f, 0.38268343f, 0.39399204f, 0.40524131f, 0.41642956f, - 0.42755509f, 0.43861624f, 0.44961133f, 0.46053871f, 0.47139674f, 0.48218377f, - 0.49289819f, 0.50353838f, 0.51410274f, 0.52458968f, 0.53499762f, 0.54532499f, - 0.55557023f, 0.56573181f, 0.57580819f, 0.58579786f, 0.59569930f, 0.60551104f, - 0.61523159f, 0.62485949f, 0.63439328f, 0.64383154f, 0.65317284f, 0.66241578f, - 0.67155895f, 0.68060100f, 0.68954054f, 0.69837625f, 0.70710678f, 0.71573083f, - 0.72424708f, 0.73265427f, 0.74095113f, 0.74913639f, 0.75720885f, 0.76516727f, - 0.77301045f, 0.78073723f, 0.78834643f, 0.79583690f, 0.80320753f, 0.81045720f, - 0.81758481f, 0.82458930f, 0.83146961f, 0.83822471f, 0.84485357f, 0.85135519f, - 0.85772861f, 0.86397286f, 0.87008699f, 0.87607009f, 0.88192126f, 0.88763962f, - 0.89322430f, 0.89867447f, 0.90398929f, 0.90916798f, 0.91420976f, 0.91911385f, - 0.92387953f, 0.92850608f, 0.93299280f, 0.93733901f, 0.94154407f, 0.94560733f, - 0.94952818f, 0.95330604f, 0.95694034f, 0.96043052f, 0.96377607f, 0.96697647f, - 0.97003125f, 0.97293995f, 0.97570213f, 0.97831737f, 0.98078528f, 0.98310549f, - 0.98527764f, 0.98730142f, 0.98917651f, 0.99090264f, 0.99247953f, 0.99390697f, - 0.99518473f, 0.99631261f, 0.99729046f, 0.99811811f, 0.99879546f, 0.99932238f, - 0.99969882f, 0.99992470f, 1.00000000f, 0.99992470f, 0.99969882f, 0.99932238f, - 0.99879546f, 0.99811811f, 0.99729046f, 0.99631261f, 0.99518473f, 0.99390697f, - 0.99247953f, 0.99090264f, 0.98917651f, 0.98730142f, 0.98527764f, 0.98310549f, - 0.98078528f, 0.97831737f, 0.97570213f, 0.97293995f, 0.97003125f, 0.96697647f, - 0.96377607f, 0.96043052f, 0.95694034f, 0.95330604f, 0.94952818f, 0.94560733f, - 0.94154407f, 0.93733901f, 0.93299280f, 0.92850608f, 0.92387953f, 0.91911385f, - 0.91420976f, 0.90916798f, 0.90398929f, 0.89867447f, 0.89322430f, 0.88763962f, - 0.88192126f, 0.87607009f, 0.87008699f, 0.86397286f, 0.85772861f, 0.85135519f, - 0.84485357f, 0.83822471f, 0.83146961f, 0.82458930f, 0.81758481f, 0.81045720f, - 0.80320753f, 0.79583690f, 0.78834643f, 0.78073723f, 0.77301045f, 0.76516727f, - 0.75720885f, 0.74913639f, 0.74095113f, 0.73265427f, 0.72424708f, 0.71573083f, - 0.70710678f, 0.69837625f, 0.68954054f, 0.68060100f, 0.67155895f, 0.66241578f, - 0.65317284f, 0.64383154f, 0.63439328f, 0.62485949f, 0.61523159f, 0.60551104f, - 0.59569930f, 0.58579786f, 0.57580819f, 0.56573181f, 0.55557023f, 0.54532499f, - 0.53499762f, 0.52458968f, 0.51410274f, 0.50353838f, 0.49289819f, 0.48218377f, - 0.47139674f, 0.46053871f, 0.44961133f, 0.43861624f, 0.42755509f, 0.41642956f, - 0.40524131f, 0.39399204f, 0.38268343f, 0.37131719f, 0.35989504f, 0.34841868f, - 0.33688985f, 0.32531029f, 0.31368174f, 0.30200595f, 0.29028468f, 0.27851969f, - 0.26671276f, 0.25486566f, 0.24298018f, 0.23105811f, 0.21910124f, 0.20711138f, - 0.19509032f, 0.18303989f, 0.17096189f, 0.15885814f, 0.14673047f, 0.13458071f, - 0.12241068f, 0.11022221f, 0.09801714f, 0.08579731f, 0.07356456f, 0.06132074f, - 0.04906767f, 0.03680722f, 0.02454123f, 0.01227154f, 0.00000000f, -0.01227154f, - -0.02454123f, -0.03680722f, -0.04906767f, -0.06132074f, -0.07356456f, - -0.08579731f, -0.09801714f, -0.11022221f, -0.12241068f, -0.13458071f, - -0.14673047f, -0.15885814f, -0.17096189f, -0.18303989f, -0.19509032f, - -0.20711138f, -0.21910124f, -0.23105811f, -0.24298018f, -0.25486566f, - -0.26671276f, -0.27851969f, -0.29028468f, -0.30200595f, -0.31368174f, - -0.32531029f, -0.33688985f, -0.34841868f, -0.35989504f, -0.37131719f, - -0.38268343f, -0.39399204f, -0.40524131f, -0.41642956f, -0.42755509f, - -0.43861624f, -0.44961133f, -0.46053871f, -0.47139674f, -0.48218377f, - -0.49289819f, -0.50353838f, -0.51410274f, -0.52458968f, -0.53499762f, - -0.54532499f, -0.55557023f, -0.56573181f, -0.57580819f, -0.58579786f, - -0.59569930f, -0.60551104f, -0.61523159f, -0.62485949f, -0.63439328f, - -0.64383154f, -0.65317284f, -0.66241578f, -0.67155895f, -0.68060100f, - -0.68954054f, -0.69837625f, -0.70710678f, -0.71573083f, -0.72424708f, - -0.73265427f, -0.74095113f, -0.74913639f, -0.75720885f, -0.76516727f, - -0.77301045f, -0.78073723f, -0.78834643f, -0.79583690f, -0.80320753f, - -0.81045720f, -0.81758481f, -0.82458930f, -0.83146961f, -0.83822471f, - -0.84485357f, -0.85135519f, -0.85772861f, -0.86397286f, -0.87008699f, - -0.87607009f, -0.88192126f, -0.88763962f, -0.89322430f, -0.89867447f, - -0.90398929f, -0.90916798f, -0.91420976f, -0.91911385f, -0.92387953f, - -0.92850608f, -0.93299280f, -0.93733901f, -0.94154407f, -0.94560733f, - -0.94952818f, -0.95330604f, -0.95694034f, -0.96043052f, -0.96377607f, - -0.96697647f, -0.97003125f, -0.97293995f, -0.97570213f, -0.97831737f, - -0.98078528f, -0.98310549f, -0.98527764f, -0.98730142f, -0.98917651f, - -0.99090264f, -0.99247953f, -0.99390697f, -0.99518473f, -0.99631261f, - -0.99729046f, -0.99811811f, -0.99879546f, -0.99932238f, -0.99969882f, - -0.99992470f, -1.00000000f, -0.99992470f, -0.99969882f, -0.99932238f, - -0.99879546f, -0.99811811f, -0.99729046f, -0.99631261f, -0.99518473f, - -0.99390697f, -0.99247953f, -0.99090264f, -0.98917651f, -0.98730142f, - -0.98527764f, -0.98310549f, -0.98078528f, -0.97831737f, -0.97570213f, - -0.97293995f, -0.97003125f, -0.96697647f, -0.96377607f, -0.96043052f, - -0.95694034f, -0.95330604f, -0.94952818f, -0.94560733f, -0.94154407f, - -0.93733901f, -0.93299280f, -0.92850608f, -0.92387953f, -0.91911385f, - -0.91420976f, -0.90916798f, -0.90398929f, -0.89867447f, -0.89322430f, - -0.88763962f, -0.88192126f, -0.87607009f, -0.87008699f, -0.86397286f, - -0.85772861f, -0.85135519f, -0.84485357f, -0.83822471f, -0.83146961f, - -0.82458930f, -0.81758481f, -0.81045720f, -0.80320753f, -0.79583690f, - -0.78834643f, -0.78073723f, -0.77301045f, -0.76516727f, -0.75720885f, - -0.74913639f, -0.74095113f, -0.73265427f, -0.72424708f, -0.71573083f, - -0.70710678f, -0.69837625f, -0.68954054f, -0.68060100f, -0.67155895f, - -0.66241578f, -0.65317284f, -0.64383154f, -0.63439328f, -0.62485949f, - -0.61523159f, -0.60551104f, -0.59569930f, -0.58579786f, -0.57580819f, - -0.56573181f, -0.55557023f, -0.54532499f, -0.53499762f, -0.52458968f, - -0.51410274f, -0.50353838f, -0.49289819f, -0.48218377f, -0.47139674f, - -0.46053871f, -0.44961133f, -0.43861624f, -0.42755509f, -0.41642956f, - -0.40524131f, -0.39399204f, -0.38268343f, -0.37131719f, -0.35989504f, - -0.34841868f, -0.33688985f, -0.32531029f, -0.31368174f, -0.30200595f, - -0.29028468f, -0.27851969f, -0.26671276f, -0.25486566f, -0.24298018f, - -0.23105811f, -0.21910124f, -0.20711138f, -0.19509032f, -0.18303989f, - -0.17096189f, -0.15885814f, -0.14673047f, -0.13458071f, -0.12241068f, - -0.11022221f, -0.09801714f, -0.08579731f, -0.07356456f, -0.06132074f, - -0.04906767f, -0.03680722f, -0.02454123f, -0.01227154f, -0.00000000f -}; -#endif /* defined(ARM_ALL_FAST_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31) -/** - @par - Table values are in Q31 (1.31 fixed-point format) and generation is done in - three steps. First, generate sin values in floating point: - 
-  tableSize = 512;
-  for (n = 0; n < (tableSize + 1); n++)
-  {
- 	sinTable[n] = sin(2*PI*n/tableSize);
-  }
- where PI value is 3.14159265358979 - @par - Second, convert floating-point to Q31 (Fixed point): - (sinTable[i] * pow(2, 31)) - @par - Finally, round to the nearest integer value: - sinTable[i] += (sinTable[i] > 0 ? 0.5 : -0.5); - */ -const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1] = { - 0L, 26352928L, 52701887L, 79042909L, 105372028L, 131685278L, 157978697L, - 184248325L, 210490206L, 236700388L, 262874923L, 289009871L, 315101295L, - 341145265L, 367137861L, 393075166L, 418953276L, 444768294L, 470516330L, - 496193509L, 521795963L, 547319836L, 572761285L, 598116479L, 623381598L, - 648552838L, 673626408L, 698598533L, 723465451L, 748223418L, 772868706L, - 797397602L, 821806413L, 846091463L, 870249095L, 894275671L, 918167572L, - 941921200L, 965532978L, 988999351L, 1012316784L, 1035481766L, 1058490808L, - 1081340445L, 1104027237L, 1126547765L, 1148898640L, 1171076495L, 1193077991L, - 1214899813L, 1236538675L, 1257991320L, 1279254516L, 1300325060L, 1321199781L, - 1341875533L, 1362349204L, 1382617710L, 1402678000L, 1422527051L, 1442161874L, - 1461579514L, 1480777044L, 1499751576L, 1518500250L, 1537020244L, 1555308768L, - 1573363068L, 1591180426L, 1608758157L, 1626093616L, 1643184191L, 1660027308L, - 1676620432L, 1692961062L, 1709046739L, 1724875040L, 1740443581L, 1755750017L, - 1770792044L, 1785567396L, 1800073849L, 1814309216L, 1828271356L, 1841958164L, - 1855367581L, 1868497586L, 1881346202L, 1893911494L, 1906191570L, 1918184581L, - 1929888720L, 1941302225L, 1952423377L, 1963250501L, 1973781967L, 1984016189L, - 1993951625L, 2003586779L, 2012920201L, 2021950484L, 2030676269L, 2039096241L, - 2047209133L, 2055013723L, 2062508835L, 2069693342L, 2076566160L, 2083126254L, - 2089372638L, 2095304370L, 2100920556L, 2106220352L, 2111202959L, 2115867626L, - 2120213651L, 2124240380L, 2127947206L, 2131333572L, 2134398966L, 2137142927L, - 2139565043L, 2141664948L, 2143442326L, 2144896910L, 2146028480L, 2146836866L, - 2147321946L, 2147483647L, 2147321946L, 2146836866L, 2146028480L, 2144896910L, - 2143442326L, 2141664948L, 2139565043L, 2137142927L, 2134398966L, 2131333572L, - 2127947206L, 2124240380L, 2120213651L, 2115867626L, 2111202959L, 2106220352L, - 2100920556L, 2095304370L, 2089372638L, 2083126254L, 2076566160L, 2069693342L, - 2062508835L, 2055013723L, 2047209133L, 2039096241L, 2030676269L, 2021950484L, - 2012920201L, 2003586779L, 1993951625L, 1984016189L, 1973781967L, 1963250501L, - 1952423377L, 1941302225L, 1929888720L, 1918184581L, 1906191570L, 1893911494L, - 1881346202L, 1868497586L, 1855367581L, 1841958164L, 1828271356L, 1814309216L, - 1800073849L, 1785567396L, 1770792044L, 1755750017L, 1740443581L, 1724875040L, - 1709046739L, 1692961062L, 1676620432L, 1660027308L, 1643184191L, 1626093616L, - 1608758157L, 1591180426L, 1573363068L, 1555308768L, 1537020244L, 1518500250L, - 1499751576L, 1480777044L, 1461579514L, 1442161874L, 1422527051L, 1402678000L, - 1382617710L, 1362349204L, 1341875533L, 1321199781L, 1300325060L, 1279254516L, - 1257991320L, 1236538675L, 1214899813L, 1193077991L, 1171076495L, 1148898640L, - 1126547765L, 1104027237L, 1081340445L, 1058490808L, 1035481766L, 1012316784L, - 988999351L, 965532978L, 941921200L, 918167572L, 894275671L, 870249095L, - 846091463L, 821806413L, 797397602L, 772868706L, 748223418L, 723465451L, - 698598533L, 673626408L, 648552838L, 623381598L, 598116479L, 572761285L, - 547319836L, 521795963L, 496193509L, 470516330L, 444768294L, 418953276L, - 393075166L, 367137861L, 341145265L, 315101295L, 289009871L, 262874923L, - 236700388L, 210490206L, 184248325L, 157978697L, 131685278L, 105372028L, - 79042909L, 52701887L, 26352928L, 0L, -26352928L, -52701887L, -79042909L, - -105372028L, -131685278L, -157978697L, -184248325L, -210490206L, -236700388L, - -262874923L, -289009871L, -315101295L, -341145265L, -367137861L, -393075166L, - -418953276L, -444768294L, -470516330L, -496193509L, -521795963L, -547319836L, - -572761285L, -598116479L, -623381598L, -648552838L, -673626408L, -698598533L, - -723465451L, -748223418L, -772868706L, -797397602L, -821806413L, -846091463L, - -870249095L, -894275671L, -918167572L, -941921200L, -965532978L, -988999351L, - -1012316784L, -1035481766L, -1058490808L, -1081340445L, -1104027237L, - -1126547765L, -1148898640L, -1171076495L, -1193077991L, -1214899813L, - -1236538675L, -1257991320L, -1279254516L, -1300325060L, -1321199781L, - -1341875533L, -1362349204L, -1382617710L, -1402678000L, -1422527051L, - -1442161874L, -1461579514L, -1480777044L, -1499751576L, -1518500250L, - -1537020244L, -1555308768L, -1573363068L, -1591180426L, -1608758157L, - -1626093616L, -1643184191L, -1660027308L, -1676620432L, -1692961062L, - -1709046739L, -1724875040L, -1740443581L, -1755750017L, -1770792044L, - -1785567396L, -1800073849L, -1814309216L, -1828271356L, -1841958164L, - -1855367581L, -1868497586L, -1881346202L, -1893911494L, -1906191570L, - -1918184581L, -1929888720L, -1941302225L, -1952423377L, -1963250501L, - -1973781967L, -1984016189L, -1993951625L, -2003586779L, -2012920201L, - -2021950484L, -2030676269L, -2039096241L, -2047209133L, -2055013723L, - -2062508835L, -2069693342L, -2076566160L, -2083126254L, -2089372638L, - -2095304370L, -2100920556L, -2106220352L, -2111202959L, -2115867626L, - -2120213651L, -2124240380L, -2127947206L, -2131333572L, -2134398966L, - -2137142927L, -2139565043L, -2141664948L, -2143442326L, -2144896910L, - -2146028480L, -2146836866L, -2147321946L, (q31_t)0x80000000, -2147321946L, - -2146836866L, -2146028480L, -2144896910L, -2143442326L, -2141664948L, - -2139565043L, -2137142927L, -2134398966L, -2131333572L, -2127947206L, - -2124240380L, -2120213651L, -2115867626L, -2111202959L, -2106220352L, - -2100920556L, -2095304370L, -2089372638L, -2083126254L, -2076566160L, - -2069693342L, -2062508835L, -2055013723L, -2047209133L, -2039096241L, - -2030676269L, -2021950484L, -2012920201L, -2003586779L, -1993951625L, - -1984016189L, -1973781967L, -1963250501L, -1952423377L, -1941302225L, - -1929888720L, -1918184581L, -1906191570L, -1893911494L, -1881346202L, - -1868497586L, -1855367581L, -1841958164L, -1828271356L, -1814309216L, - -1800073849L, -1785567396L, -1770792044L, -1755750017L, -1740443581L, - -1724875040L, -1709046739L, -1692961062L, -1676620432L, -1660027308L, - -1643184191L, -1626093616L, -1608758157L, -1591180426L, -1573363068L, - -1555308768L, -1537020244L, -1518500250L, -1499751576L, -1480777044L, - -1461579514L, -1442161874L, -1422527051L, -1402678000L, -1382617710L, - -1362349204L, -1341875533L, -1321199781L, -1300325060L, -1279254516L, - -1257991320L, -1236538675L, -1214899813L, -1193077991L, -1171076495L, - -1148898640L, -1126547765L, -1104027237L, -1081340445L, -1058490808L, - -1035481766L, -1012316784L, -988999351L, -965532978L, -941921200L, - -918167572L, -894275671L, -870249095L, -846091463L, -821806413L, -797397602L, - -772868706L, -748223418L, -723465451L, -698598533L, -673626408L, -648552838L, - -623381598L, -598116479L, -572761285L, -547319836L, -521795963L, -496193509L, - -470516330L, -444768294L, -418953276L, -393075166L, -367137861L, -341145265L, - -315101295L, -289009871L, -262874923L, -236700388L, -210490206L, -184248325L, - -157978697L, -131685278L, -105372028L, -79042909L, -52701887L, -26352928L, 0 -}; - -#endif /* defined(ARM_ALL_FAST_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15) -/** - @par - Table values are in Q15 (1.15 fixed-point format) and generation is done in - three steps. First, generate sin values in floating point: - 
-  tableSize = 512;
-  for (n = 0; n < (tableSize + 1); n++)
-  {
- 	sinTable[n] = sin(2*PI*n/tableSize);
-  }
- where PI value is 3.14159265358979 - @par - Second, convert floating-point to Q15 (Fixed point): - (sinTable[i] * pow(2, 15)) - @par - Finally, round to the nearest integer value: - sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5); - */ -const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1] = { - 0, 402, 804, 1206, 1608, 2009, 2411, 2811, 3212, 3612, 4011, 4410, 4808, - 5205, 5602, 5998, 6393, 6787, 7180, 7571, 7962, 8351, 8740, 9127, 9512, - 9896, 10279, 10660, 11039, 11417, 11793, 12167, 12540, 12910, 13279, - 13646, 14010, 14373, 14733, 15091, 15447, 15800, 16151, 16500, 16846, - 17190, 17531, 17869, 18205, 18538, 18868, 19195, 19520, 19841, 20160, - 20475, 20788, 21097, 21403, 21706, 22006, 22302, 22595, 22884, 23170, - 23453, 23732, 24008, 24279, 24548, 24812, 25073, 25330, 25583, 25833, - 26078, 26320, 26557, 26791, 27020, 27246, 27467, 27684, 27897, 28106, - 28311, 28511, 28707, 28899, 29086, 29269, 29448, 29622, 29792, 29957, - 30118, 30274, 30425, 30572, 30715, 30853, 30986, 31114, 31238, 31357, - 31471, 31581, 31686, 31786, 31881, 31972, 32058, 32138, 32214, 32286, - 32352, 32413, 32470, 32522, 32568, 32610, 32647, 32679, 32706, 32729, - 32746, 32758, 32766, 32767, 32766, 32758, 32746, 32729, 32706, 32679, - 32647, 32610, 32568, 32522, 32470, 32413, 32352, 32286, 32214, 32138, - 32058, 31972, 31881, 31786, 31686, 31581, 31471, 31357, 31238, 31114, - 30986, 30853, 30715, 30572, 30425, 30274, 30118, 29957, 29792, 29622, - 29448, 29269, 29086, 28899, 28707, 28511, 28311, 28106, 27897, 27684, - 27467, 27246, 27020, 26791, 26557, 26320, 26078, 25833, 25583, 25330, - 25073, 24812, 24548, 24279, 24008, 23732, 23453, 23170, 22884, 22595, - 22302, 22006, 21706, 21403, 21097, 20788, 20475, 20160, 19841, 19520, - 19195, 18868, 18538, 18205, 17869, 17531, 17190, 16846, 16500, 16151, - 15800, 15447, 15091, 14733, 14373, 14010, 13646, 13279, 12910, 12540, - 12167, 11793, 11417, 11039, 10660, 10279, 9896, 9512, 9127, 8740, 8351, - 7962, 7571, 7180, 6787, 6393, 5998, 5602, 5205, 4808, 4410, 4011, 3612, - 3212, 2811, 2411, 2009, 1608, 1206, 804, 402, 0, -402, -804, -1206, - -1608, -2009, -2411, -2811, -3212, -3612, -4011, -4410, -4808, -5205, - -5602, -5998, -6393, -6787, -7180, -7571, -7962, -8351, -8740, -9127, - -9512, -9896, -10279, -10660, -11039, -11417, -11793, -12167, -12540, - -12910, -13279, -13646, -14010, -14373, -14733, -15091, -15447, -15800, - -16151, -16500, -16846, -17190, -17531, -17869, -18205, -18538, -18868, - -19195, -19520, -19841, -20160, -20475, -20788, -21097, -21403, -21706, - -22006, -22302, -22595, -22884, -23170, -23453, -23732, -24008, -24279, - -24548, -24812, -25073, -25330, -25583, -25833, -26078, -26320, -26557, - -26791, -27020, -27246, -27467, -27684, -27897, -28106, -28311, -28511, - -28707, -28899, -29086, -29269, -29448, -29622, -29792, -29957, -30118, - -30274, -30425, -30572, -30715, -30853, -30986, -31114, -31238, -31357, - -31471, -31581, -31686, -31786, -31881, -31972, -32058, -32138, -32214, - -32286, -32352, -32413, -32470, -32522, -32568, -32610, -32647, -32679, - -32706, -32729, -32746, -32758, -32766, -32768, -32766, -32758, -32746, - -32729, -32706, -32679, -32647, -32610, -32568, -32522, -32470, -32413, - -32352, -32286, -32214, -32138, -32058, -31972, -31881, -31786, -31686, - -31581, -31471, -31357, -31238, -31114, -30986, -30853, -30715, -30572, - -30425, -30274, -30118, -29957, -29792, -29622, -29448, -29269, -29086, - -28899, -28707, -28511, -28311, -28106, -27897, -27684, -27467, -27246, - -27020, -26791, -26557, -26320, -26078, -25833, -25583, -25330, -25073, - -24812, -24548, -24279, -24008, -23732, -23453, -23170, -22884, -22595, - -22302, -22006, -21706, -21403, -21097, -20788, -20475, -20160, -19841, - -19520, -19195, -18868, -18538, -18205, -17869, -17531, -17190, -16846, - -16500, -16151, -15800, -15447, -15091, -14733, -14373, -14010, -13646, - -13279, -12910, -12540, -12167, -11793, -11417, -11039, -10660, -10279, - -9896, -9512, -9127, -8740, -8351, -7962, -7571, -7180, -6787, -6393, - -5998, -5602, -5205, -4808, -4410, -4011, -3612, -3212, -2811, -2411, - -2009, -1608, -1206, -804, -402, 0 -}; -#endif /* defined(ARM_ALL_FAST_TABLES) */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE) -const q31_t sqrtTable_Q31[256] = { - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x5ffffffe, 0x7ffffffa, 0x5e88c596, 0x7a39e2ff, - 0x5d2238d8, 0x74dfa6b1, 0x5bcb268e, 0x6fe69562, - 0x5a827998, 0x6b454dba, 0x5947373a, 0x66f39063, - 0x58187bf8, 0x62ea1669, 0x56f578e6, 0x5f226e5f, - 0x55dd714e, 0x5b96df40, 0x54cfb8b0, 0x58424fca, - 0x53cbb102, 0x552031c7, 0x52d0c92c, 0x522c7048, - 0x51de7bb2, 0x4f6360a9, 0x50f44d86, 0x4cc1b594, - 0x5011cd0a, 0x4a4473f6, 0x4f36911a, 0x47e8e962, - 0x4e62384e, 0x45aca3d0, 0x4d946838, 0x438d6a6a, - 0x4cccccca, 0x41893746, 0x4c0b17c0, 0x3f9e31fa, - 0x4b4f0022, 0x3dcaaac3, 0x4a9841ce, 0x3c0d1660, - 0x49e69d14, 0x3a640a53, 0x4939d654, 0x38ce39a6, - 0x4891b5b2, 0x374a720b, 0x47ee06ba, 0x35d7993c, - 0x474e9830, 0x3474aacc, 0x46b33bc0, 0x3320b60c, - 0x461bc5d2, 0x31dadc4f, 0x45880d4c, 0x30a24f3c, - 0x44f7eb6a, 0x2f764f6a, 0x446b3b92, 0x2e562b0b, - 0x43e1db32, 0x2d413cc9, 0x435ba98a, 0x2c36eab0, - 0x42d887a4, 0x2b36a542, 0x42585824, 0x2a3fe69b, - 0x41daff34, 0x295231b0, 0x41606266, 0x286d118d, - 0x40e868a4, 0x279018c3, 0x4072fa10, 0x26bae0c8, - 0x3ffffffe, 0x25ed0979, 0x3f8f64d2, 0x25263894, - 0x3f2113f8, 0x24661958, 0x3eb4f9d8, 0x23ac5c10, - 0x3e4b03ba, 0x22f8b5bb, 0x3de31fc4, 0x224adfba, - 0x3d7d3cee, 0x21a2977a, 0x3d194ae8, 0x20ff9e30, - 0x3cb73a24, 0x2061b89a, 0x3c56fbba, 0x1fc8aebb, - 0x3bf88166, 0x1f344ba6, 0x3b9bbd80, 0x1ea45d4b, - 0x3b40a2f0, 0x1e18b448, 0x3ae7252e, 0x1d9123b9, - 0x3a8f382c, 0x1d0d8113, 0x3a38d062, 0x1c8da3fb, - 0x39e3e2b6, 0x1c116628, 0x39906482, 0x1b98a33c, - 0x393e4b8a, 0x1b2338aa, 0x38ed8df6, 0x1ab1059a, - 0x389e2250, 0x1a41eace, 0x384fff7a, 0x19d5ca89, - 0x38031cb2, 0x196c887b, 0x37b77184, 0x190609a9, - 0x376cf5ce, 0x18a2345b, 0x3723a1ba, 0x1840f00a, - 0x36db6db6, 0x17e22550, 0x36945276, 0x1785bdd2, - 0x364e48f4, 0x172ba43e, 0x36094a64, 0x16d3c42c, - 0x35c55036, 0x167e0a1f, 0x35825414, 0x162a6372, - 0x35404fde, 0x15d8be4d, 0x34ff3dac, 0x1589099d, - 0x34bf17c4, 0x153b3508, 0x347fd89e, 0x14ef30e4, - 0x34417ade, 0x14a4ee2a, 0x3403f956, 0x145c5e76, - 0x33c74f02, 0x141573fa, 0x338b7706, 0x13d02171, - 0x33506cae, 0x138c5a28, 0x33162b6a, 0x134a11e6, - 0x32dcaed0, 0x13093cee, 0x32a3f294, 0x12c9cffa, - 0x326bf292, 0x128bc034, 0x3234aac0, 0x124f0330, - 0x31fe1736, 0x12138ee5, 0x31c83428, 0x11d959b0, - 0x3192fde6, 0x11a05a45, 0x315e70de, 0x116887b5, - 0x312a8994, 0x1131d960, 0x30f744aa, 0x10fc46fd, - 0x30c49ed6, 0x10c7c88b, 0x309294ea, 0x10945653, - 0x306123cc, 0x1061e8e6, 0x30304878, 0x10307919 -}; - #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */ - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q15_MVE) -const q15_t sqrtTable_Q15[256] = { - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x5fff, 0x7fff, 0x5e88, 0x7a39, - 0x5d22, 0x74df, 0x5bcb, 0x6fe6, - 0x5a82, 0x6b45, 0x5947, 0x66f3, - 0x5818, 0x62ea, 0x56f5, 0x5f22, - 0x55dd, 0x5b96, 0x54cf, 0x5842, - 0x53cb, 0x5520, 0x52d0, 0x522c, - 0x51de, 0x4f63, 0x50f4, 0x4cc1, - 0x5011, 0x4a44, 0x4f36, 0x47e8, - 0x4e62, 0x45ac, 0x4d94, 0x438d, - 0x4ccc, 0x4189, 0x4c0b, 0x3f9e, - 0x4b4f, 0x3dca, 0x4a98, 0x3c0d, - 0x49e6, 0x3a64, 0x4939, 0x38ce, - 0x4891, 0x374a, 0x47ee, 0x35d7, - 0x474e, 0x3474, 0x46b3, 0x3320, - 0x461b, 0x31da, 0x4588, 0x30a2, - 0x44f7, 0x2f76, 0x446b, 0x2e56, - 0x43e1, 0x2d41, 0x435b, 0x2c36, - 0x42d8, 0x2b36, 0x4258, 0x2a3f, - 0x41da, 0x2952, 0x4160, 0x286d, - 0x40e8, 0x2790, 0x4072, 0x26ba, - 0x3fff, 0x25ed, 0x3f8f, 0x2526, - 0x3f21, 0x2466, 0x3eb4, 0x23ac, - 0x3e4b, 0x22f8, 0x3de3, 0x224a, - 0x3d7d, 0x21a2, 0x3d19, 0x20ff, - 0x3cb7, 0x2061, 0x3c56, 0x1fc8, - 0x3bf8, 0x1f34, 0x3b9b, 0x1ea4, - 0x3b40, 0x1e18, 0x3ae7, 0x1d91, - 0x3a8f, 0x1d0d, 0x3a38, 0x1c8d, - 0x39e3, 0x1c11, 0x3990, 0x1b98, - 0x393e, 0x1b23, 0x38ed, 0x1ab1, - 0x389e, 0x1a41, 0x384f, 0x19d5, - 0x3803, 0x196c, 0x37b7, 0x1906, - 0x376c, 0x18a2, 0x3723, 0x1840, - 0x36db, 0x17e2, 0x3694, 0x1785, - 0x364e, 0x172b, 0x3609, 0x16d3, - 0x35c5, 0x167e, 0x3582, 0x162a, - 0x3540, 0x15d8, 0x34ff, 0x1589, - 0x34bf, 0x153b, 0x347f, 0x14ef, - 0x3441, 0x14a4, 0x3403, 0x145c, - 0x33c7, 0x1415, 0x338b, 0x13d0, - 0x3350, 0x138c, 0x3316, 0x134a, - 0x32dc, 0x1309, 0x32a3, 0x12c9, - 0x326b, 0x128b, 0x3234, 0x124f, - 0x31fe, 0x1213, 0x31c8, 0x11d9, - 0x3192, 0x11a0, 0x315e, 0x1168, - 0x312a, 0x1131, 0x30f7, 0x10fc, - 0x30c4, 0x10c7, 0x3092, 0x1094, - 0x3061, 0x1061, 0x3030, 0x1030 -}; - #endif -#endif /* defined(ARM_MATH_MVEI) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q31) -/* -ClearAll[tofix]; -tofix[q_][a_] := With[{r = Round[a*2^q]}, - If[r > (2^q - 1), 2^q - 1, r] - ]; - -(* For q = format, 2^nb is length of the table *) -With[{q = 15, nb = 4, q12quarter = 16^^2000}, - With[{shift = Echo[q - nb]}, - Table[tofix[q][1.0/Sqrt[1.0*i/2^q]/8.0], {i, 2^(q - 2), - 2^q + q12quarter - 1, 2^shift}]] - ] // CopyToClipboard - -*/ -const q31_t sqrt_initial_lut_q31[32]={536870912, 506166750, 480191942, 457845052, 438353264, 421156193, \ -405836263, 392075079, 379625062, 368290407, 357913941, 348367849, \ -339546978, 331363921, 323745341, 316629190, 309962566, 303700050, \ -297802400, 292235509, 286969573, 281978417, 277238947, 272730696, \ -268435456, 264336964, 260420644, 256673389, 253083375, 249639903, \ -246333269, 243154642}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q31) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q15) -const q15_t sqrt_initial_lut_q15[16]={8192, 7327, 6689, 6193, 5793, 5461, 5181, 4940, 4730, 4544, 4379, \ -4230, 4096, 3974, 3862, 3759}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q15) */ - - -#endif /* #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES) */ - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) -const float32_t exp_tab[8] = { - (1.f), - (0.0416598916054f), - (0.500000596046f), - (0.0014122662833f), - (1.00000011921f), - (0.00833693705499f), - (0.166665703058f), - (0.000195780929062f), -}; - -const float32_t __logf_lut_f32[8] = { - -2.295614848256274, /*p0*/ - -2.470711633419806, /*p4*/ - -5.686926051100417, /*p2*/ - -0.165253547131978, /*p6*/ - +5.175912446351073, /*p1*/ - +0.844006986174912, /*p5*/ - +4.584458825456749, /*p3*/ - +0.014127821926000 /*p7*/ -}; - -#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -#if (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) - -/* haming weight LUT for bytes */ -#define B2(n) n, n + 1, n + 1, n + 2 -#define B4(n) B2(n) , B2(n + 1), B2(n + 1), B2(n + 2) -#define B6(n) B4(n) , B4(n + 1), B4(n + 1), B4(n + 2) - -// Lookup table that store the reverse of each table -const unsigned char hwLUT[256] = { B6(0), B6(1), B6(1), B6(2) }; - -#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */ diff --git a/Drivers/CMSIS/DSP/Source/CommonTables/arm_common_tables_f16.c b/Drivers/CMSIS/DSP/Source/CommonTables/arm_common_tables_f16.c deleted file mode 100644 index 87cd320..0000000 --- a/Drivers/CMSIS/DSP/Source/CommonTables/arm_common_tables_f16.c +++ /dev/null @@ -1,12586 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_common_tables_f16.c - * Description: common tables like fft twiddle factors, Bitreverse, reciprocal etc - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_math_types_f16.h" -/** - @ingroup ComplexFFT - */ - -/** - @addtogroup CFFT_CIFFT Complex FFT Tables - @{ - */ - - -/** - @brief Floating-point Twiddle factors Table Generation -*/ - -/* F16 */ -#if !defined(__CC_ARM) - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include "arm_common_tables_f16.h" - - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_16) - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* }
-* \par -* where N = 16 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float16_t twiddleCoefF16_16[32] = { - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)-0.382683432f, (float16_t)0.923879533f, - (float16_t)-0.707106781f, (float16_t)0.707106781f, - (float16_t)-0.923879533f, (float16_t)0.382683432f, - (float16_t)-1.000000000f, (float16_t)0.000000000f, - (float16_t)-0.923879533f, (float16_t)-0.382683432f, - (float16_t)-0.707106781f, (float16_t)-0.707106781f, - (float16_t)-0.382683432f, (float16_t)-0.923879533f, - (float16_t)-0.000000000f, (float16_t)-1.000000000f, - (float16_t)0.382683432f, (float16_t)-0.923879533f, - (float16_t)0.707106781f, (float16_t)-0.707106781f, - (float16_t)0.923879533f, (float16_t)-0.382683432f -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_32) - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* }
-* \par -* where N = 32 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float16_t twiddleCoefF16_32[64] = { - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)-0.195090322f, (float16_t)0.980785280f, - (float16_t)-0.382683432f, (float16_t)0.923879533f, - (float16_t)-0.555570233f, (float16_t)0.831469612f, - (float16_t)-0.707106781f, (float16_t)0.707106781f, - (float16_t)-0.831469612f, (float16_t)0.555570233f, - (float16_t)-0.923879533f, (float16_t)0.382683432f, - (float16_t)-0.980785280f, (float16_t)0.195090322f, - (float16_t)-1.000000000f, (float16_t)0.000000000f, - (float16_t)-0.980785280f, (float16_t)-0.195090322f, - (float16_t)-0.923879533f, (float16_t)-0.382683432f, - (float16_t)-0.831469612f, (float16_t)-0.555570233f, - (float16_t)-0.707106781f, (float16_t)-0.707106781f, - (float16_t)-0.555570233f, (float16_t)-0.831469612f, - (float16_t)-0.382683432f, (float16_t)-0.923879533f, - (float16_t)-0.195090322f, (float16_t)-0.980785280f, - (float16_t)-0.000000000f, (float16_t)-1.000000000f, - (float16_t)0.195090322f, (float16_t)-0.980785280f, - (float16_t)0.382683432f, (float16_t)-0.923879533f, - (float16_t)0.555570233f, (float16_t)-0.831469612f, - (float16_t)0.707106781f, (float16_t)-0.707106781f, - (float16_t)0.831469612f, (float16_t)-0.555570233f, - (float16_t)0.923879533f, (float16_t)-0.382683432f, - (float16_t)0.980785280f, (float16_t)-0.195090322f -}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_64) - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* }
-* \par -* where N = 64 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float16_t twiddleCoefF16_64[128] = { - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.995184727f, (float16_t)0.098017140f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.956940336f, (float16_t)0.290284677f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.881921264f, (float16_t)0.471396737f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.773010453f, (float16_t)0.634393284f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.634393284f, (float16_t)0.773010453f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.471396737f, (float16_t)0.881921264f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.290284677f, (float16_t)0.956940336f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.098017140f, (float16_t)0.995184727f, - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)-0.098017140f, (float16_t)0.995184727f, - (float16_t)-0.195090322f, (float16_t)0.980785280f, - (float16_t)-0.290284677f, (float16_t)0.956940336f, - (float16_t)-0.382683432f, (float16_t)0.923879533f, - (float16_t)-0.471396737f, (float16_t)0.881921264f, - (float16_t)-0.555570233f, (float16_t)0.831469612f, - (float16_t)-0.634393284f, (float16_t)0.773010453f, - (float16_t)-0.707106781f, (float16_t)0.707106781f, - (float16_t)-0.773010453f, (float16_t)0.634393284f, - (float16_t)-0.831469612f, (float16_t)0.555570233f, - (float16_t)-0.881921264f, (float16_t)0.471396737f, - (float16_t)-0.923879533f, (float16_t)0.382683432f, - (float16_t)-0.956940336f, (float16_t)0.290284677f, - (float16_t)-0.980785280f, (float16_t)0.195090322f, - (float16_t)-0.995184727f, (float16_t)0.098017140f, - (float16_t)-1.000000000f, (float16_t)0.000000000f, - (float16_t)-0.995184727f, (float16_t)-0.098017140f, - (float16_t)-0.980785280f, (float16_t)-0.195090322f, - (float16_t)-0.956940336f, (float16_t)-0.290284677f, - (float16_t)-0.923879533f, (float16_t)-0.382683432f, - (float16_t)-0.881921264f, (float16_t)-0.471396737f, - (float16_t)-0.831469612f, (float16_t)-0.555570233f, - (float16_t)-0.773010453f, (float16_t)-0.634393284f, - (float16_t)-0.707106781f, (float16_t)-0.707106781f, - (float16_t)-0.634393284f, (float16_t)-0.773010453f, - (float16_t)-0.555570233f, (float16_t)-0.831469612f, - (float16_t)-0.471396737f, (float16_t)-0.881921264f, - (float16_t)-0.382683432f, (float16_t)-0.923879533f, - (float16_t)-0.290284677f, (float16_t)-0.956940336f, - (float16_t)-0.195090322f, (float16_t)-0.980785280f, - (float16_t)-0.098017140f, (float16_t)-0.995184727f, - (float16_t)-0.000000000f, (float16_t)-1.000000000f, - (float16_t)0.098017140f, (float16_t)-0.995184727f, - (float16_t)0.195090322f, (float16_t)-0.980785280f, - (float16_t)0.290284677f, (float16_t)-0.956940336f, - (float16_t)0.382683432f, (float16_t)-0.923879533f, - (float16_t)0.471396737f, (float16_t)-0.881921264f, - (float16_t)0.555570233f, (float16_t)-0.831469612f, - (float16_t)0.634393284f, (float16_t)-0.773010453f, - (float16_t)0.707106781f, (float16_t)-0.707106781f, - (float16_t)0.773010453f, (float16_t)-0.634393284f, - (float16_t)0.831469612f, (float16_t)-0.555570233f, - (float16_t)0.881921264f, (float16_t)-0.471396737f, - (float16_t)0.923879533f, (float16_t)-0.382683432f, - (float16_t)0.956940336f, (float16_t)-0.290284677f, - (float16_t)0.980785280f, (float16_t)-0.195090322f, - (float16_t)0.995184727f, (float16_t)-0.098017140f -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_128) - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* }
-* \par -* where N = 128 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ - -const float16_t twiddleCoefF16_128[256] = { - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.998795456f, (float16_t)0.049067674f, - (float16_t)0.995184727f, (float16_t)0.098017140f, - (float16_t)0.989176510f, (float16_t)0.146730474f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.970031253f, (float16_t)0.242980180f, - (float16_t)0.956940336f, (float16_t)0.290284677f, - (float16_t)0.941544065f, (float16_t)0.336889853f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.903989293f, (float16_t)0.427555093f, - (float16_t)0.881921264f, (float16_t)0.471396737f, - (float16_t)0.857728610f, (float16_t)0.514102744f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.803207531f, (float16_t)0.595699304f, - (float16_t)0.773010453f, (float16_t)0.634393284f, - (float16_t)0.740951125f, (float16_t)0.671558955f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.671558955f, (float16_t)0.740951125f, - (float16_t)0.634393284f, (float16_t)0.773010453f, - (float16_t)0.595699304f, (float16_t)0.803207531f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.514102744f, (float16_t)0.857728610f, - (float16_t)0.471396737f, (float16_t)0.881921264f, - (float16_t)0.427555093f, (float16_t)0.903989293f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.336889853f, (float16_t)0.941544065f, - (float16_t)0.290284677f, (float16_t)0.956940336f, - (float16_t)0.242980180f, (float16_t)0.970031253f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.146730474f, (float16_t)0.989176510f, - (float16_t)0.098017140f, (float16_t)0.995184727f, - (float16_t)0.049067674f, (float16_t)0.998795456f, - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)-0.049067674f, (float16_t)0.998795456f, - (float16_t)-0.098017140f, (float16_t)0.995184727f, - (float16_t)-0.146730474f, (float16_t)0.989176510f, - (float16_t)-0.195090322f, (float16_t)0.980785280f, - (float16_t)-0.242980180f, (float16_t)0.970031253f, - (float16_t)-0.290284677f, (float16_t)0.956940336f, - (float16_t)-0.336889853f, (float16_t)0.941544065f, - (float16_t)-0.382683432f, (float16_t)0.923879533f, - (float16_t)-0.427555093f, (float16_t)0.903989293f, - (float16_t)-0.471396737f, (float16_t)0.881921264f, - (float16_t)-0.514102744f, (float16_t)0.857728610f, - (float16_t)-0.555570233f, (float16_t)0.831469612f, - (float16_t)-0.595699304f, (float16_t)0.803207531f, - (float16_t)-0.634393284f, (float16_t)0.773010453f, - (float16_t)-0.671558955f, (float16_t)0.740951125f, - (float16_t)-0.707106781f, (float16_t)0.707106781f, - (float16_t)-0.740951125f, (float16_t)0.671558955f, - (float16_t)-0.773010453f, (float16_t)0.634393284f, - (float16_t)-0.803207531f, (float16_t)0.595699304f, - (float16_t)-0.831469612f, (float16_t)0.555570233f, - (float16_t)-0.857728610f, (float16_t)0.514102744f, - (float16_t)-0.881921264f, (float16_t)0.471396737f, - (float16_t)-0.903989293f, (float16_t)0.427555093f, - (float16_t)-0.923879533f, (float16_t)0.382683432f, - (float16_t)-0.941544065f, (float16_t)0.336889853f, - (float16_t)-0.956940336f, (float16_t)0.290284677f, - (float16_t)-0.970031253f, (float16_t)0.242980180f, - (float16_t)-0.980785280f, (float16_t)0.195090322f, - (float16_t)-0.989176510f, (float16_t)0.146730474f, - (float16_t)-0.995184727f, (float16_t)0.098017140f, - (float16_t)-0.998795456f, (float16_t)0.049067674f, - (float16_t)-1.000000000f, (float16_t)0.000000000f, - (float16_t)-0.998795456f, (float16_t)-0.049067674f, - (float16_t)-0.995184727f, (float16_t)-0.098017140f, - (float16_t)-0.989176510f, (float16_t)-0.146730474f, - (float16_t)-0.980785280f, (float16_t)-0.195090322f, - (float16_t)-0.970031253f, (float16_t)-0.242980180f, - (float16_t)-0.956940336f, (float16_t)-0.290284677f, - (float16_t)-0.941544065f, (float16_t)-0.336889853f, - (float16_t)-0.923879533f, (float16_t)-0.382683432f, - (float16_t)-0.903989293f, (float16_t)-0.427555093f, - (float16_t)-0.881921264f, (float16_t)-0.471396737f, - (float16_t)-0.857728610f, (float16_t)-0.514102744f, - (float16_t)-0.831469612f, (float16_t)-0.555570233f, - (float16_t)-0.803207531f, (float16_t)-0.595699304f, - (float16_t)-0.773010453f, (float16_t)-0.634393284f, - (float16_t)-0.740951125f, (float16_t)-0.671558955f, - (float16_t)-0.707106781f, (float16_t)-0.707106781f, - (float16_t)-0.671558955f, (float16_t)-0.740951125f, - (float16_t)-0.634393284f, (float16_t)-0.773010453f, - (float16_t)-0.595699304f, (float16_t)-0.803207531f, - (float16_t)-0.555570233f, (float16_t)-0.831469612f, - (float16_t)-0.514102744f, (float16_t)-0.857728610f, - (float16_t)-0.471396737f, (float16_t)-0.881921264f, - (float16_t)-0.427555093f, (float16_t)-0.903989293f, - (float16_t)-0.382683432f, (float16_t)-0.923879533f, - (float16_t)-0.336889853f, (float16_t)-0.941544065f, - (float16_t)-0.290284677f, (float16_t)-0.956940336f, - (float16_t)-0.242980180f, (float16_t)-0.970031253f, - (float16_t)-0.195090322f, (float16_t)-0.980785280f, - (float16_t)-0.146730474f, (float16_t)-0.989176510f, - (float16_t)-0.098017140f, (float16_t)-0.995184727f, - (float16_t)-0.049067674f, (float16_t)-0.998795456f, - (float16_t)-0.000000000f, (float16_t)-1.000000000f, - (float16_t)0.049067674f, (float16_t)-0.998795456f, - (float16_t)0.098017140f, (float16_t)-0.995184727f, - (float16_t)0.146730474f, (float16_t)-0.989176510f, - (float16_t)0.195090322f, (float16_t)-0.980785280f, - (float16_t)0.242980180f, (float16_t)-0.970031253f, - (float16_t)0.290284677f, (float16_t)-0.956940336f, - (float16_t)0.336889853f, (float16_t)-0.941544065f, - (float16_t)0.382683432f, (float16_t)-0.923879533f, - (float16_t)0.427555093f, (float16_t)-0.903989293f, - (float16_t)0.471396737f, (float16_t)-0.881921264f, - (float16_t)0.514102744f, (float16_t)-0.857728610f, - (float16_t)0.555570233f, (float16_t)-0.831469612f, - (float16_t)0.595699304f, (float16_t)-0.803207531f, - (float16_t)0.634393284f, (float16_t)-0.773010453f, - (float16_t)0.671558955f, (float16_t)-0.740951125f, - (float16_t)0.707106781f, (float16_t)-0.707106781f, - (float16_t)0.740951125f, (float16_t)-0.671558955f, - (float16_t)0.773010453f, (float16_t)-0.634393284f, - (float16_t)0.803207531f, (float16_t)-0.595699304f, - (float16_t)0.831469612f, (float16_t)-0.555570233f, - (float16_t)0.857728610f, (float16_t)-0.514102744f, - (float16_t)0.881921264f, (float16_t)-0.471396737f, - (float16_t)0.903989293f, (float16_t)-0.427555093f, - (float16_t)0.923879533f, (float16_t)-0.382683432f, - (float16_t)0.941544065f, (float16_t)-0.336889853f, - (float16_t)0.956940336f, (float16_t)-0.290284677f, - (float16_t)0.970031253f, (float16_t)-0.242980180f, - (float16_t)0.980785280f, (float16_t)-0.195090322f, - (float16_t)0.989176510f, (float16_t)-0.146730474f, - (float16_t)0.995184727f, (float16_t)-0.098017140f, - (float16_t)0.998795456f, (float16_t)-0.049067674f -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_256) - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* }
-* \par -* where N = 256 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float16_t twiddleCoefF16_256[512] = { - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.999698819f, (float16_t)0.024541229f, - (float16_t)0.998795456f, (float16_t)0.049067674f, - (float16_t)0.997290457f, (float16_t)0.073564564f, - (float16_t)0.995184727f, (float16_t)0.098017140f, - (float16_t)0.992479535f, (float16_t)0.122410675f, - (float16_t)0.989176510f, (float16_t)0.146730474f, - (float16_t)0.985277642f, (float16_t)0.170961889f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.975702130f, (float16_t)0.219101240f, - (float16_t)0.970031253f, (float16_t)0.242980180f, - (float16_t)0.963776066f, (float16_t)0.266712757f, - (float16_t)0.956940336f, (float16_t)0.290284677f, - (float16_t)0.949528181f, (float16_t)0.313681740f, - (float16_t)0.941544065f, (float16_t)0.336889853f, - (float16_t)0.932992799f, (float16_t)0.359895037f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.914209756f, (float16_t)0.405241314f, - (float16_t)0.903989293f, (float16_t)0.427555093f, - (float16_t)0.893224301f, (float16_t)0.449611330f, - (float16_t)0.881921264f, (float16_t)0.471396737f, - (float16_t)0.870086991f, (float16_t)0.492898192f, - (float16_t)0.857728610f, (float16_t)0.514102744f, - (float16_t)0.844853565f, (float16_t)0.534997620f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.817584813f, (float16_t)0.575808191f, - (float16_t)0.803207531f, (float16_t)0.595699304f, - (float16_t)0.788346428f, (float16_t)0.615231591f, - (float16_t)0.773010453f, (float16_t)0.634393284f, - (float16_t)0.757208847f, (float16_t)0.653172843f, - (float16_t)0.740951125f, (float16_t)0.671558955f, - (float16_t)0.724247083f, (float16_t)0.689540545f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.689540545f, (float16_t)0.724247083f, - (float16_t)0.671558955f, (float16_t)0.740951125f, - (float16_t)0.653172843f, (float16_t)0.757208847f, - (float16_t)0.634393284f, (float16_t)0.773010453f, - (float16_t)0.615231591f, (float16_t)0.788346428f, - (float16_t)0.595699304f, (float16_t)0.803207531f, - (float16_t)0.575808191f, (float16_t)0.817584813f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.534997620f, (float16_t)0.844853565f, - (float16_t)0.514102744f, (float16_t)0.857728610f, - (float16_t)0.492898192f, (float16_t)0.870086991f, - (float16_t)0.471396737f, (float16_t)0.881921264f, - (float16_t)0.449611330f, (float16_t)0.893224301f, - (float16_t)0.427555093f, (float16_t)0.903989293f, - (float16_t)0.405241314f, (float16_t)0.914209756f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.359895037f, (float16_t)0.932992799f, - (float16_t)0.336889853f, (float16_t)0.941544065f, - (float16_t)0.313681740f, (float16_t)0.949528181f, - (float16_t)0.290284677f, (float16_t)0.956940336f, - (float16_t)0.266712757f, (float16_t)0.963776066f, - (float16_t)0.242980180f, (float16_t)0.970031253f, - (float16_t)0.219101240f, (float16_t)0.975702130f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.170961889f, (float16_t)0.985277642f, - (float16_t)0.146730474f, (float16_t)0.989176510f, - (float16_t)0.122410675f, (float16_t)0.992479535f, - (float16_t)0.098017140f, (float16_t)0.995184727f, - (float16_t)0.073564564f, (float16_t)0.997290457f, - (float16_t)0.049067674f, (float16_t)0.998795456f, - (float16_t)0.024541229f, (float16_t)0.999698819f, - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)-0.024541229f, (float16_t)0.999698819f, - (float16_t)-0.049067674f, (float16_t)0.998795456f, - (float16_t)-0.073564564f, (float16_t)0.997290457f, - (float16_t)-0.098017140f, (float16_t)0.995184727f, - (float16_t)-0.122410675f, (float16_t)0.992479535f, - (float16_t)-0.146730474f, (float16_t)0.989176510f, - (float16_t)-0.170961889f, (float16_t)0.985277642f, - (float16_t)-0.195090322f, (float16_t)0.980785280f, - (float16_t)-0.219101240f, (float16_t)0.975702130f, - (float16_t)-0.242980180f, (float16_t)0.970031253f, - (float16_t)-0.266712757f, (float16_t)0.963776066f, - (float16_t)-0.290284677f, (float16_t)0.956940336f, - (float16_t)-0.313681740f, (float16_t)0.949528181f, - (float16_t)-0.336889853f, (float16_t)0.941544065f, - (float16_t)-0.359895037f, (float16_t)0.932992799f, - (float16_t)-0.382683432f, (float16_t)0.923879533f, - (float16_t)-0.405241314f, (float16_t)0.914209756f, - (float16_t)-0.427555093f, (float16_t)0.903989293f, - (float16_t)-0.449611330f, (float16_t)0.893224301f, - (float16_t)-0.471396737f, (float16_t)0.881921264f, - (float16_t)-0.492898192f, (float16_t)0.870086991f, - (float16_t)-0.514102744f, (float16_t)0.857728610f, - (float16_t)-0.534997620f, (float16_t)0.844853565f, - (float16_t)-0.555570233f, (float16_t)0.831469612f, - (float16_t)-0.575808191f, (float16_t)0.817584813f, - (float16_t)-0.595699304f, (float16_t)0.803207531f, - (float16_t)-0.615231591f, (float16_t)0.788346428f, - (float16_t)-0.634393284f, (float16_t)0.773010453f, - (float16_t)-0.653172843f, (float16_t)0.757208847f, - (float16_t)-0.671558955f, (float16_t)0.740951125f, - (float16_t)-0.689540545f, (float16_t)0.724247083f, - (float16_t)-0.707106781f, (float16_t)0.707106781f, - (float16_t)-0.724247083f, (float16_t)0.689540545f, - (float16_t)-0.740951125f, (float16_t)0.671558955f, - (float16_t)-0.757208847f, (float16_t)0.653172843f, - (float16_t)-0.773010453f, (float16_t)0.634393284f, - (float16_t)-0.788346428f, (float16_t)0.615231591f, - (float16_t)-0.803207531f, (float16_t)0.595699304f, - (float16_t)-0.817584813f, (float16_t)0.575808191f, - (float16_t)-0.831469612f, (float16_t)0.555570233f, - (float16_t)-0.844853565f, (float16_t)0.534997620f, - (float16_t)-0.857728610f, (float16_t)0.514102744f, - (float16_t)-0.870086991f, (float16_t)0.492898192f, - (float16_t)-0.881921264f, (float16_t)0.471396737f, - (float16_t)-0.893224301f, (float16_t)0.449611330f, - (float16_t)-0.903989293f, (float16_t)0.427555093f, - (float16_t)-0.914209756f, (float16_t)0.405241314f, - (float16_t)-0.923879533f, (float16_t)0.382683432f, - (float16_t)-0.932992799f, (float16_t)0.359895037f, - (float16_t)-0.941544065f, (float16_t)0.336889853f, - (float16_t)-0.949528181f, (float16_t)0.313681740f, - (float16_t)-0.956940336f, (float16_t)0.290284677f, - (float16_t)-0.963776066f, (float16_t)0.266712757f, - (float16_t)-0.970031253f, (float16_t)0.242980180f, - (float16_t)-0.975702130f, (float16_t)0.219101240f, - (float16_t)-0.980785280f, (float16_t)0.195090322f, - (float16_t)-0.985277642f, (float16_t)0.170961889f, - (float16_t)-0.989176510f, (float16_t)0.146730474f, - (float16_t)-0.992479535f, (float16_t)0.122410675f, - (float16_t)-0.995184727f, (float16_t)0.098017140f, - (float16_t)-0.997290457f, (float16_t)0.073564564f, - (float16_t)-0.998795456f, (float16_t)0.049067674f, - (float16_t)-0.999698819f, (float16_t)0.024541229f, - (float16_t)-1.000000000f, (float16_t)0.000000000f, - (float16_t)-0.999698819f, (float16_t)-0.024541229f, - (float16_t)-0.998795456f, (float16_t)-0.049067674f, - (float16_t)-0.997290457f, (float16_t)-0.073564564f, - (float16_t)-0.995184727f, (float16_t)-0.098017140f, - (float16_t)-0.992479535f, (float16_t)-0.122410675f, - (float16_t)-0.989176510f, (float16_t)-0.146730474f, - (float16_t)-0.985277642f, (float16_t)-0.170961889f, - (float16_t)-0.980785280f, (float16_t)-0.195090322f, - (float16_t)-0.975702130f, (float16_t)-0.219101240f, - (float16_t)-0.970031253f, (float16_t)-0.242980180f, - (float16_t)-0.963776066f, (float16_t)-0.266712757f, - (float16_t)-0.956940336f, (float16_t)-0.290284677f, - (float16_t)-0.949528181f, (float16_t)-0.313681740f, - (float16_t)-0.941544065f, (float16_t)-0.336889853f, - (float16_t)-0.932992799f, (float16_t)-0.359895037f, - (float16_t)-0.923879533f, (float16_t)-0.382683432f, - (float16_t)-0.914209756f, (float16_t)-0.405241314f, - (float16_t)-0.903989293f, (float16_t)-0.427555093f, - (float16_t)-0.893224301f, (float16_t)-0.449611330f, - (float16_t)-0.881921264f, (float16_t)-0.471396737f, - (float16_t)-0.870086991f, (float16_t)-0.492898192f, - (float16_t)-0.857728610f, (float16_t)-0.514102744f, - (float16_t)-0.844853565f, (float16_t)-0.534997620f, - (float16_t)-0.831469612f, (float16_t)-0.555570233f, - (float16_t)-0.817584813f, (float16_t)-0.575808191f, - (float16_t)-0.803207531f, (float16_t)-0.595699304f, - (float16_t)-0.788346428f, (float16_t)-0.615231591f, - (float16_t)-0.773010453f, (float16_t)-0.634393284f, - (float16_t)-0.757208847f, (float16_t)-0.653172843f, - (float16_t)-0.740951125f, (float16_t)-0.671558955f, - (float16_t)-0.724247083f, (float16_t)-0.689540545f, - (float16_t)-0.707106781f, (float16_t)-0.707106781f, - (float16_t)-0.689540545f, (float16_t)-0.724247083f, - (float16_t)-0.671558955f, (float16_t)-0.740951125f, - (float16_t)-0.653172843f, (float16_t)-0.757208847f, - (float16_t)-0.634393284f, (float16_t)-0.773010453f, - (float16_t)-0.615231591f, (float16_t)-0.788346428f, - (float16_t)-0.595699304f, (float16_t)-0.803207531f, - (float16_t)-0.575808191f, (float16_t)-0.817584813f, - (float16_t)-0.555570233f, (float16_t)-0.831469612f, - (float16_t)-0.534997620f, (float16_t)-0.844853565f, - (float16_t)-0.514102744f, (float16_t)-0.857728610f, - (float16_t)-0.492898192f, (float16_t)-0.870086991f, - (float16_t)-0.471396737f, (float16_t)-0.881921264f, - (float16_t)-0.449611330f, (float16_t)-0.893224301f, - (float16_t)-0.427555093f, (float16_t)-0.903989293f, - (float16_t)-0.405241314f, (float16_t)-0.914209756f, - (float16_t)-0.382683432f, (float16_t)-0.923879533f, - (float16_t)-0.359895037f, (float16_t)-0.932992799f, - (float16_t)-0.336889853f, (float16_t)-0.941544065f, - (float16_t)-0.313681740f, (float16_t)-0.949528181f, - (float16_t)-0.290284677f, (float16_t)-0.956940336f, - (float16_t)-0.266712757f, (float16_t)-0.963776066f, - (float16_t)-0.242980180f, (float16_t)-0.970031253f, - (float16_t)-0.219101240f, (float16_t)-0.975702130f, - (float16_t)-0.195090322f, (float16_t)-0.980785280f, - (float16_t)-0.170961889f, (float16_t)-0.985277642f, - (float16_t)-0.146730474f, (float16_t)-0.989176510f, - (float16_t)-0.122410675f, (float16_t)-0.992479535f, - (float16_t)-0.098017140f, (float16_t)-0.995184727f, - (float16_t)-0.073564564f, (float16_t)-0.997290457f, - (float16_t)-0.049067674f, (float16_t)-0.998795456f, - (float16_t)-0.024541229f, (float16_t)-0.999698819f, - (float16_t)-0.000000000f, (float16_t)-1.000000000f, - (float16_t)0.024541229f, (float16_t)-0.999698819f, - (float16_t)0.049067674f, (float16_t)-0.998795456f, - (float16_t)0.073564564f, (float16_t)-0.997290457f, - (float16_t)0.098017140f, (float16_t)-0.995184727f, - (float16_t)0.122410675f, (float16_t)-0.992479535f, - (float16_t)0.146730474f, (float16_t)-0.989176510f, - (float16_t)0.170961889f, (float16_t)-0.985277642f, - (float16_t)0.195090322f, (float16_t)-0.980785280f, - (float16_t)0.219101240f, (float16_t)-0.975702130f, - (float16_t)0.242980180f, (float16_t)-0.970031253f, - (float16_t)0.266712757f, (float16_t)-0.963776066f, - (float16_t)0.290284677f, (float16_t)-0.956940336f, - (float16_t)0.313681740f, (float16_t)-0.949528181f, - (float16_t)0.336889853f, (float16_t)-0.941544065f, - (float16_t)0.359895037f, (float16_t)-0.932992799f, - (float16_t)0.382683432f, (float16_t)-0.923879533f, - (float16_t)0.405241314f, (float16_t)-0.914209756f, - (float16_t)0.427555093f, (float16_t)-0.903989293f, - (float16_t)0.449611330f, (float16_t)-0.893224301f, - (float16_t)0.471396737f, (float16_t)-0.881921264f, - (float16_t)0.492898192f, (float16_t)-0.870086991f, - (float16_t)0.514102744f, (float16_t)-0.857728610f, - (float16_t)0.534997620f, (float16_t)-0.844853565f, - (float16_t)0.555570233f, (float16_t)-0.831469612f, - (float16_t)0.575808191f, (float16_t)-0.817584813f, - (float16_t)0.595699304f, (float16_t)-0.803207531f, - (float16_t)0.615231591f, (float16_t)-0.788346428f, - (float16_t)0.634393284f, (float16_t)-0.773010453f, - (float16_t)0.653172843f, (float16_t)-0.757208847f, - (float16_t)0.671558955f, (float16_t)-0.740951125f, - (float16_t)0.689540545f, (float16_t)-0.724247083f, - (float16_t)0.707106781f, (float16_t)-0.707106781f, - (float16_t)0.724247083f, (float16_t)-0.689540545f, - (float16_t)0.740951125f, (float16_t)-0.671558955f, - (float16_t)0.757208847f, (float16_t)-0.653172843f, - (float16_t)0.773010453f, (float16_t)-0.634393284f, - (float16_t)0.788346428f, (float16_t)-0.615231591f, - (float16_t)0.803207531f, (float16_t)-0.595699304f, - (float16_t)0.817584813f, (float16_t)-0.575808191f, - (float16_t)0.831469612f, (float16_t)-0.555570233f, - (float16_t)0.844853565f, (float16_t)-0.534997620f, - (float16_t)0.857728610f, (float16_t)-0.514102744f, - (float16_t)0.870086991f, (float16_t)-0.492898192f, - (float16_t)0.881921264f, (float16_t)-0.471396737f, - (float16_t)0.893224301f, (float16_t)-0.449611330f, - (float16_t)0.903989293f, (float16_t)-0.427555093f, - (float16_t)0.914209756f, (float16_t)-0.405241314f, - (float16_t)0.923879533f, (float16_t)-0.382683432f, - (float16_t)0.932992799f, (float16_t)-0.359895037f, - (float16_t)0.941544065f, (float16_t)-0.336889853f, - (float16_t)0.949528181f, (float16_t)-0.313681740f, - (float16_t)0.956940336f, (float16_t)-0.290284677f, - (float16_t)0.963776066f, (float16_t)-0.266712757f, - (float16_t)0.970031253f, (float16_t)-0.242980180f, - (float16_t)0.975702130f, (float16_t)-0.219101240f, - (float16_t)0.980785280f, (float16_t)-0.195090322f, - (float16_t)0.985277642f, (float16_t)-0.170961889f, - (float16_t)0.989176510f, (float16_t)-0.146730474f, - (float16_t)0.992479535f, (float16_t)-0.122410675f, - (float16_t)0.995184727f, (float16_t)-0.098017140f, - (float16_t)0.997290457f, (float16_t)-0.073564564f, - (float16_t)0.998795456f, (float16_t)-0.049067674f, - (float16_t)0.999698819f, (float16_t)-0.024541229f -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_512) - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* }
-* \par -* where N = 512 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float16_t twiddleCoefF16_512[1024] = { - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.999924702f, (float16_t)0.012271538f, - (float16_t)0.999698819f, (float16_t)0.024541229f, - (float16_t)0.999322385f, (float16_t)0.036807223f, - (float16_t)0.998795456f, (float16_t)0.049067674f, - (float16_t)0.998118113f, (float16_t)0.061320736f, - (float16_t)0.997290457f, (float16_t)0.073564564f, - (float16_t)0.996312612f, (float16_t)0.085797312f, - (float16_t)0.995184727f, (float16_t)0.098017140f, - (float16_t)0.993906970f, (float16_t)0.110222207f, - (float16_t)0.992479535f, (float16_t)0.122410675f, - (float16_t)0.990902635f, (float16_t)0.134580709f, - (float16_t)0.989176510f, (float16_t)0.146730474f, - (float16_t)0.987301418f, (float16_t)0.158858143f, - (float16_t)0.985277642f, (float16_t)0.170961889f, - (float16_t)0.983105487f, (float16_t)0.183039888f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.978317371f, (float16_t)0.207111376f, - (float16_t)0.975702130f, (float16_t)0.219101240f, - (float16_t)0.972939952f, (float16_t)0.231058108f, - (float16_t)0.970031253f, (float16_t)0.242980180f, - (float16_t)0.966976471f, (float16_t)0.254865660f, - (float16_t)0.963776066f, (float16_t)0.266712757f, - (float16_t)0.960430519f, (float16_t)0.278519689f, - (float16_t)0.956940336f, (float16_t)0.290284677f, - (float16_t)0.953306040f, (float16_t)0.302005949f, - (float16_t)0.949528181f, (float16_t)0.313681740f, - (float16_t)0.945607325f, (float16_t)0.325310292f, - (float16_t)0.941544065f, (float16_t)0.336889853f, - (float16_t)0.937339012f, (float16_t)0.348418680f, - (float16_t)0.932992799f, (float16_t)0.359895037f, - (float16_t)0.928506080f, (float16_t)0.371317194f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.919113852f, (float16_t)0.393992040f, - (float16_t)0.914209756f, (float16_t)0.405241314f, - (float16_t)0.909167983f, (float16_t)0.416429560f, - (float16_t)0.903989293f, (float16_t)0.427555093f, - (float16_t)0.898674466f, (float16_t)0.438616239f, - (float16_t)0.893224301f, (float16_t)0.449611330f, - (float16_t)0.887639620f, (float16_t)0.460538711f, - (float16_t)0.881921264f, (float16_t)0.471396737f, - (float16_t)0.876070094f, (float16_t)0.482183772f, - (float16_t)0.870086991f, (float16_t)0.492898192f, - (float16_t)0.863972856f, (float16_t)0.503538384f, - (float16_t)0.857728610f, (float16_t)0.514102744f, - (float16_t)0.851355193f, (float16_t)0.524589683f, - (float16_t)0.844853565f, (float16_t)0.534997620f, - (float16_t)0.838224706f, (float16_t)0.545324988f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.824589303f, (float16_t)0.565731811f, - (float16_t)0.817584813f, (float16_t)0.575808191f, - (float16_t)0.810457198f, (float16_t)0.585797857f, - (float16_t)0.803207531f, (float16_t)0.595699304f, - (float16_t)0.795836905f, (float16_t)0.605511041f, - (float16_t)0.788346428f, (float16_t)0.615231591f, - (float16_t)0.780737229f, (float16_t)0.624859488f, - (float16_t)0.773010453f, (float16_t)0.634393284f, - (float16_t)0.765167266f, (float16_t)0.643831543f, - (float16_t)0.757208847f, (float16_t)0.653172843f, - (float16_t)0.749136395f, (float16_t)0.662415778f, - (float16_t)0.740951125f, (float16_t)0.671558955f, - (float16_t)0.732654272f, (float16_t)0.680600998f, - (float16_t)0.724247083f, (float16_t)0.689540545f, - (float16_t)0.715730825f, (float16_t)0.698376249f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.698376249f, (float16_t)0.715730825f, - (float16_t)0.689540545f, (float16_t)0.724247083f, - (float16_t)0.680600998f, (float16_t)0.732654272f, - (float16_t)0.671558955f, (float16_t)0.740951125f, - (float16_t)0.662415778f, (float16_t)0.749136395f, - (float16_t)0.653172843f, (float16_t)0.757208847f, - (float16_t)0.643831543f, (float16_t)0.765167266f, - (float16_t)0.634393284f, (float16_t)0.773010453f, - (float16_t)0.624859488f, (float16_t)0.780737229f, - (float16_t)0.615231591f, (float16_t)0.788346428f, - (float16_t)0.605511041f, (float16_t)0.795836905f, - (float16_t)0.595699304f, (float16_t)0.803207531f, - (float16_t)0.585797857f, (float16_t)0.810457198f, - (float16_t)0.575808191f, (float16_t)0.817584813f, - (float16_t)0.565731811f, (float16_t)0.824589303f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.545324988f, (float16_t)0.838224706f, - (float16_t)0.534997620f, (float16_t)0.844853565f, - (float16_t)0.524589683f, (float16_t)0.851355193f, - (float16_t)0.514102744f, (float16_t)0.857728610f, - (float16_t)0.503538384f, (float16_t)0.863972856f, - (float16_t)0.492898192f, (float16_t)0.870086991f, - (float16_t)0.482183772f, (float16_t)0.876070094f, - (float16_t)0.471396737f, (float16_t)0.881921264f, - (float16_t)0.460538711f, (float16_t)0.887639620f, - (float16_t)0.449611330f, (float16_t)0.893224301f, - (float16_t)0.438616239f, (float16_t)0.898674466f, - (float16_t)0.427555093f, (float16_t)0.903989293f, - (float16_t)0.416429560f, (float16_t)0.909167983f, - (float16_t)0.405241314f, (float16_t)0.914209756f, - (float16_t)0.393992040f, (float16_t)0.919113852f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.371317194f, (float16_t)0.928506080f, - (float16_t)0.359895037f, (float16_t)0.932992799f, - (float16_t)0.348418680f, (float16_t)0.937339012f, - (float16_t)0.336889853f, (float16_t)0.941544065f, - (float16_t)0.325310292f, (float16_t)0.945607325f, - (float16_t)0.313681740f, (float16_t)0.949528181f, - (float16_t)0.302005949f, (float16_t)0.953306040f, - (float16_t)0.290284677f, (float16_t)0.956940336f, - (float16_t)0.278519689f, (float16_t)0.960430519f, - (float16_t)0.266712757f, (float16_t)0.963776066f, - (float16_t)0.254865660f, (float16_t)0.966976471f, - (float16_t)0.242980180f, (float16_t)0.970031253f, - (float16_t)0.231058108f, (float16_t)0.972939952f, - (float16_t)0.219101240f, (float16_t)0.975702130f, - (float16_t)0.207111376f, (float16_t)0.978317371f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.183039888f, (float16_t)0.983105487f, - (float16_t)0.170961889f, (float16_t)0.985277642f, - (float16_t)0.158858143f, (float16_t)0.987301418f, - (float16_t)0.146730474f, (float16_t)0.989176510f, - (float16_t)0.134580709f, (float16_t)0.990902635f, - (float16_t)0.122410675f, (float16_t)0.992479535f, - (float16_t)0.110222207f, (float16_t)0.993906970f, - (float16_t)0.098017140f, (float16_t)0.995184727f, - (float16_t)0.085797312f, (float16_t)0.996312612f, - (float16_t)0.073564564f, (float16_t)0.997290457f, - (float16_t)0.061320736f, (float16_t)0.998118113f, - (float16_t)0.049067674f, (float16_t)0.998795456f, - (float16_t)0.036807223f, (float16_t)0.999322385f, - (float16_t)0.024541229f, (float16_t)0.999698819f, - (float16_t)0.012271538f, (float16_t)0.999924702f, - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)-0.012271538f, (float16_t)0.999924702f, - (float16_t)-0.024541229f, (float16_t)0.999698819f, - (float16_t)-0.036807223f, (float16_t)0.999322385f, - (float16_t)-0.049067674f, (float16_t)0.998795456f, - (float16_t)-0.061320736f, (float16_t)0.998118113f, - (float16_t)-0.073564564f, (float16_t)0.997290457f, - (float16_t)-0.085797312f, (float16_t)0.996312612f, - (float16_t)-0.098017140f, (float16_t)0.995184727f, - (float16_t)-0.110222207f, (float16_t)0.993906970f, - (float16_t)-0.122410675f, (float16_t)0.992479535f, - (float16_t)-0.134580709f, (float16_t)0.990902635f, - (float16_t)-0.146730474f, (float16_t)0.989176510f, - (float16_t)-0.158858143f, (float16_t)0.987301418f, - (float16_t)-0.170961889f, (float16_t)0.985277642f, - (float16_t)-0.183039888f, (float16_t)0.983105487f, - (float16_t)-0.195090322f, (float16_t)0.980785280f, - (float16_t)-0.207111376f, (float16_t)0.978317371f, - (float16_t)-0.219101240f, (float16_t)0.975702130f, - (float16_t)-0.231058108f, (float16_t)0.972939952f, - (float16_t)-0.242980180f, (float16_t)0.970031253f, - (float16_t)-0.254865660f, (float16_t)0.966976471f, - (float16_t)-0.266712757f, (float16_t)0.963776066f, - (float16_t)-0.278519689f, (float16_t)0.960430519f, - (float16_t)-0.290284677f, (float16_t)0.956940336f, - (float16_t)-0.302005949f, (float16_t)0.953306040f, - (float16_t)-0.313681740f, (float16_t)0.949528181f, - (float16_t)-0.325310292f, (float16_t)0.945607325f, - (float16_t)-0.336889853f, (float16_t)0.941544065f, - (float16_t)-0.348418680f, (float16_t)0.937339012f, - (float16_t)-0.359895037f, (float16_t)0.932992799f, - (float16_t)-0.371317194f, (float16_t)0.928506080f, - (float16_t)-0.382683432f, (float16_t)0.923879533f, - (float16_t)-0.393992040f, (float16_t)0.919113852f, - (float16_t)-0.405241314f, (float16_t)0.914209756f, - (float16_t)-0.416429560f, (float16_t)0.909167983f, - (float16_t)-0.427555093f, (float16_t)0.903989293f, - (float16_t)-0.438616239f, (float16_t)0.898674466f, - (float16_t)-0.449611330f, (float16_t)0.893224301f, - (float16_t)-0.460538711f, (float16_t)0.887639620f, - (float16_t)-0.471396737f, (float16_t)0.881921264f, - (float16_t)-0.482183772f, (float16_t)0.876070094f, - (float16_t)-0.492898192f, (float16_t)0.870086991f, - (float16_t)-0.503538384f, (float16_t)0.863972856f, - (float16_t)-0.514102744f, (float16_t)0.857728610f, - (float16_t)-0.524589683f, (float16_t)0.851355193f, - (float16_t)-0.534997620f, (float16_t)0.844853565f, - (float16_t)-0.545324988f, (float16_t)0.838224706f, - (float16_t)-0.555570233f, (float16_t)0.831469612f, - (float16_t)-0.565731811f, (float16_t)0.824589303f, - (float16_t)-0.575808191f, (float16_t)0.817584813f, - (float16_t)-0.585797857f, (float16_t)0.810457198f, - (float16_t)-0.595699304f, (float16_t)0.803207531f, - (float16_t)-0.605511041f, (float16_t)0.795836905f, - (float16_t)-0.615231591f, (float16_t)0.788346428f, - (float16_t)-0.624859488f, (float16_t)0.780737229f, - (float16_t)-0.634393284f, (float16_t)0.773010453f, - (float16_t)-0.643831543f, (float16_t)0.765167266f, - (float16_t)-0.653172843f, (float16_t)0.757208847f, - (float16_t)-0.662415778f, (float16_t)0.749136395f, - (float16_t)-0.671558955f, (float16_t)0.740951125f, - (float16_t)-0.680600998f, (float16_t)0.732654272f, - (float16_t)-0.689540545f, (float16_t)0.724247083f, - (float16_t)-0.698376249f, (float16_t)0.715730825f, - (float16_t)-0.707106781f, (float16_t)0.707106781f, - (float16_t)-0.715730825f, (float16_t)0.698376249f, - (float16_t)-0.724247083f, (float16_t)0.689540545f, - (float16_t)-0.732654272f, (float16_t)0.680600998f, - (float16_t)-0.740951125f, (float16_t)0.671558955f, - (float16_t)-0.749136395f, (float16_t)0.662415778f, - (float16_t)-0.757208847f, (float16_t)0.653172843f, - (float16_t)-0.765167266f, (float16_t)0.643831543f, - (float16_t)-0.773010453f, (float16_t)0.634393284f, - (float16_t)-0.780737229f, (float16_t)0.624859488f, - (float16_t)-0.788346428f, (float16_t)0.615231591f, - (float16_t)-0.795836905f, (float16_t)0.605511041f, - (float16_t)-0.803207531f, (float16_t)0.595699304f, - (float16_t)-0.810457198f, (float16_t)0.585797857f, - (float16_t)-0.817584813f, (float16_t)0.575808191f, - (float16_t)-0.824589303f, (float16_t)0.565731811f, - (float16_t)-0.831469612f, (float16_t)0.555570233f, - (float16_t)-0.838224706f, (float16_t)0.545324988f, - (float16_t)-0.844853565f, (float16_t)0.534997620f, - (float16_t)-0.851355193f, (float16_t)0.524589683f, - (float16_t)-0.857728610f, (float16_t)0.514102744f, - (float16_t)-0.863972856f, (float16_t)0.503538384f, - (float16_t)-0.870086991f, (float16_t)0.492898192f, - (float16_t)-0.876070094f, (float16_t)0.482183772f, - (float16_t)-0.881921264f, (float16_t)0.471396737f, - (float16_t)-0.887639620f, (float16_t)0.460538711f, - (float16_t)-0.893224301f, (float16_t)0.449611330f, - (float16_t)-0.898674466f, (float16_t)0.438616239f, - (float16_t)-0.903989293f, (float16_t)0.427555093f, - (float16_t)-0.909167983f, (float16_t)0.416429560f, - (float16_t)-0.914209756f, (float16_t)0.405241314f, - (float16_t)-0.919113852f, (float16_t)0.393992040f, - (float16_t)-0.923879533f, (float16_t)0.382683432f, - (float16_t)-0.928506080f, (float16_t)0.371317194f, - (float16_t)-0.932992799f, (float16_t)0.359895037f, - (float16_t)-0.937339012f, (float16_t)0.348418680f, - (float16_t)-0.941544065f, (float16_t)0.336889853f, - (float16_t)-0.945607325f, (float16_t)0.325310292f, - (float16_t)-0.949528181f, (float16_t)0.313681740f, - (float16_t)-0.953306040f, (float16_t)0.302005949f, - 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(float16_t)0.919113852f, (float16_t)-0.393992040f, - (float16_t)0.923879533f, (float16_t)-0.382683432f, - (float16_t)0.928506080f, (float16_t)-0.371317194f, - (float16_t)0.932992799f, (float16_t)-0.359895037f, - (float16_t)0.937339012f, (float16_t)-0.348418680f, - (float16_t)0.941544065f, (float16_t)-0.336889853f, - (float16_t)0.945607325f, (float16_t)-0.325310292f, - (float16_t)0.949528181f, (float16_t)-0.313681740f, - (float16_t)0.953306040f, (float16_t)-0.302005949f, - (float16_t)0.956940336f, (float16_t)-0.290284677f, - (float16_t)0.960430519f, (float16_t)-0.278519689f, - (float16_t)0.963776066f, (float16_t)-0.266712757f, - (float16_t)0.966976471f, (float16_t)-0.254865660f, - (float16_t)0.970031253f, (float16_t)-0.242980180f, - (float16_t)0.972939952f, (float16_t)-0.231058108f, - (float16_t)0.975702130f, (float16_t)-0.219101240f, - (float16_t)0.978317371f, (float16_t)-0.207111376f, - (float16_t)0.980785280f, (float16_t)-0.195090322f, - (float16_t)0.983105487f, (float16_t)-0.183039888f, - (float16_t)0.985277642f, (float16_t)-0.170961889f, - (float16_t)0.987301418f, (float16_t)-0.158858143f, - (float16_t)0.989176510f, (float16_t)-0.146730474f, - (float16_t)0.990902635f, (float16_t)-0.134580709f, - (float16_t)0.992479535f, (float16_t)-0.122410675f, - (float16_t)0.993906970f, (float16_t)-0.110222207f, - (float16_t)0.995184727f, (float16_t)-0.098017140f, - (float16_t)0.996312612f, (float16_t)-0.085797312f, - (float16_t)0.997290457f, (float16_t)-0.073564564f, - (float16_t)0.998118113f, (float16_t)-0.061320736f, - (float16_t)0.998795456f, (float16_t)-0.049067674f, - (float16_t)0.999322385f, (float16_t)-0.036807223f, - (float16_t)0.999698819f, (float16_t)-0.024541229f, - (float16_t)0.999924702f, (float16_t)-0.012271538f -}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_1024) - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* }
-* \par -* where N = 1024 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float16_t twiddleCoefF16_1024[2048] = { - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.999981175f, (float16_t)0.006135885f, - (float16_t)0.999924702f, (float16_t)0.012271538f, - (float16_t)0.999830582f, (float16_t)0.018406730f, - (float16_t)0.999698819f, (float16_t)0.024541229f, - (float16_t)0.999529418f, (float16_t)0.030674803f, - (float16_t)0.999322385f, (float16_t)0.036807223f, - (float16_t)0.999077728f, (float16_t)0.042938257f, - (float16_t)0.998795456f, (float16_t)0.049067674f, - (float16_t)0.998475581f, (float16_t)0.055195244f, - (float16_t)0.998118113f, (float16_t)0.061320736f, - (float16_t)0.997723067f, (float16_t)0.067443920f, - (float16_t)0.997290457f, (float16_t)0.073564564f, - (float16_t)0.996820299f, (float16_t)0.079682438f, - (float16_t)0.996312612f, (float16_t)0.085797312f, - (float16_t)0.995767414f, (float16_t)0.091908956f, - (float16_t)0.995184727f, (float16_t)0.098017140f, - (float16_t)0.994564571f, (float16_t)0.104121634f, - (float16_t)0.993906970f, (float16_t)0.110222207f, - (float16_t)0.993211949f, (float16_t)0.116318631f, - (float16_t)0.992479535f, (float16_t)0.122410675f, - (float16_t)0.991709754f, (float16_t)0.128498111f, - (float16_t)0.990902635f, (float16_t)0.134580709f, - (float16_t)0.990058210f, (float16_t)0.140658239f, - (float16_t)0.989176510f, (float16_t)0.146730474f, - (float16_t)0.988257568f, (float16_t)0.152797185f, - (float16_t)0.987301418f, (float16_t)0.158858143f, - (float16_t)0.986308097f, (float16_t)0.164913120f, - (float16_t)0.985277642f, (float16_t)0.170961889f, - (float16_t)0.984210092f, (float16_t)0.177004220f, - (float16_t)0.983105487f, (float16_t)0.183039888f, - (float16_t)0.981963869f, (float16_t)0.189068664f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.979569766f, (float16_t)0.201104635f, - (float16_t)0.978317371f, (float16_t)0.207111376f, - (float16_t)0.977028143f, (float16_t)0.213110320f, - (float16_t)0.975702130f, (float16_t)0.219101240f, - (float16_t)0.974339383f, (float16_t)0.225083911f, - (float16_t)0.972939952f, (float16_t)0.231058108f, - (float16_t)0.971503891f, (float16_t)0.237023606f, - (float16_t)0.970031253f, (float16_t)0.242980180f, - (float16_t)0.968522094f, (float16_t)0.248927606f, - (float16_t)0.966976471f, (float16_t)0.254865660f, - (float16_t)0.965394442f, (float16_t)0.260794118f, - (float16_t)0.963776066f, (float16_t)0.266712757f, - (float16_t)0.962121404f, (float16_t)0.272621355f, - (float16_t)0.960430519f, (float16_t)0.278519689f, - (float16_t)0.958703475f, (float16_t)0.284407537f, - (float16_t)0.956940336f, (float16_t)0.290284677f, - (float16_t)0.955141168f, (float16_t)0.296150888f, - (float16_t)0.953306040f, (float16_t)0.302005949f, - (float16_t)0.951435021f, (float16_t)0.307849640f, - (float16_t)0.949528181f, (float16_t)0.313681740f, - (float16_t)0.947585591f, (float16_t)0.319502031f, - (float16_t)0.945607325f, (float16_t)0.325310292f, - (float16_t)0.943593458f, (float16_t)0.331106306f, - (float16_t)0.941544065f, (float16_t)0.336889853f, - (float16_t)0.939459224f, (float16_t)0.342660717f, - (float16_t)0.937339012f, (float16_t)0.348418680f, - (float16_t)0.935183510f, (float16_t)0.354163525f, - (float16_t)0.932992799f, (float16_t)0.359895037f, - (float16_t)0.930766961f, (float16_t)0.365612998f, - (float16_t)0.928506080f, (float16_t)0.371317194f, - (float16_t)0.926210242f, (float16_t)0.377007410f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.921514039f, (float16_t)0.388345047f, - (float16_t)0.919113852f, (float16_t)0.393992040f, - (float16_t)0.916679060f, (float16_t)0.399624200f, - (float16_t)0.914209756f, (float16_t)0.405241314f, - (float16_t)0.911706032f, (float16_t)0.410843171f, - (float16_t)0.909167983f, (float16_t)0.416429560f, - (float16_t)0.906595705f, (float16_t)0.422000271f, - (float16_t)0.903989293f, (float16_t)0.427555093f, - (float16_t)0.901348847f, (float16_t)0.433093819f, - (float16_t)0.898674466f, (float16_t)0.438616239f, - (float16_t)0.895966250f, (float16_t)0.444122145f, - (float16_t)0.893224301f, (float16_t)0.449611330f, - (float16_t)0.890448723f, (float16_t)0.455083587f, - (float16_t)0.887639620f, (float16_t)0.460538711f, - (float16_t)0.884797098f, (float16_t)0.465976496f, - (float16_t)0.881921264f, (float16_t)0.471396737f, - (float16_t)0.879012226f, (float16_t)0.476799230f, - (float16_t)0.876070094f, (float16_t)0.482183772f, - (float16_t)0.873094978f, (float16_t)0.487550160f, - (float16_t)0.870086991f, (float16_t)0.492898192f, - (float16_t)0.867046246f, (float16_t)0.498227667f, - (float16_t)0.863972856f, (float16_t)0.503538384f, - (float16_t)0.860866939f, (float16_t)0.508830143f, - (float16_t)0.857728610f, (float16_t)0.514102744f, - (float16_t)0.854557988f, (float16_t)0.519355990f, - (float16_t)0.851355193f, (float16_t)0.524589683f, - (float16_t)0.848120345f, (float16_t)0.529803625f, - (float16_t)0.844853565f, (float16_t)0.534997620f, - (float16_t)0.841554977f, (float16_t)0.540171473f, - (float16_t)0.838224706f, (float16_t)0.545324988f, - (float16_t)0.834862875f, (float16_t)0.550457973f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.828045045f, (float16_t)0.560661576f, - (float16_t)0.824589303f, (float16_t)0.565731811f, - (float16_t)0.821102515f, (float16_t)0.570780746f, - (float16_t)0.817584813f, (float16_t)0.575808191f, - (float16_t)0.814036330f, (float16_t)0.580813958f, - (float16_t)0.810457198f, (float16_t)0.585797857f, - (float16_t)0.806847554f, (float16_t)0.590759702f, - (float16_t)0.803207531f, (float16_t)0.595699304f, - (float16_t)0.799537269f, (float16_t)0.600616479f, - (float16_t)0.795836905f, (float16_t)0.605511041f, - (float16_t)0.792106577f, (float16_t)0.610382806f, - (float16_t)0.788346428f, (float16_t)0.615231591f, - (float16_t)0.784556597f, (float16_t)0.620057212f, - (float16_t)0.780737229f, (float16_t)0.624859488f, - (float16_t)0.776888466f, (float16_t)0.629638239f, - (float16_t)0.773010453f, (float16_t)0.634393284f, - (float16_t)0.769103338f, (float16_t)0.639124445f, - (float16_t)0.765167266f, (float16_t)0.643831543f, - (float16_t)0.761202385f, (float16_t)0.648514401f, - (float16_t)0.757208847f, (float16_t)0.653172843f, - (float16_t)0.753186799f, (float16_t)0.657806693f, - (float16_t)0.749136395f, (float16_t)0.662415778f, - (float16_t)0.745057785f, (float16_t)0.666999922f, - (float16_t)0.740951125f, (float16_t)0.671558955f, - (float16_t)0.736816569f, (float16_t)0.676092704f, - (float16_t)0.732654272f, (float16_t)0.680600998f, - (float16_t)0.728464390f, (float16_t)0.685083668f, - (float16_t)0.724247083f, (float16_t)0.689540545f, - (float16_t)0.720002508f, (float16_t)0.693971461f, - (float16_t)0.715730825f, (float16_t)0.698376249f, - (float16_t)0.711432196f, (float16_t)0.702754744f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.702754744f, (float16_t)0.711432196f, - (float16_t)0.698376249f, (float16_t)0.715730825f, - (float16_t)0.693971461f, (float16_t)0.720002508f, - (float16_t)0.689540545f, (float16_t)0.724247083f, - (float16_t)0.685083668f, (float16_t)0.728464390f, - (float16_t)0.680600998f, (float16_t)0.732654272f, - (float16_t)0.676092704f, (float16_t)0.736816569f, - (float16_t)0.671558955f, (float16_t)0.740951125f, - (float16_t)0.666999922f, (float16_t)0.745057785f, - (float16_t)0.662415778f, (float16_t)0.749136395f, - (float16_t)0.657806693f, (float16_t)0.753186799f, - (float16_t)0.653172843f, (float16_t)0.757208847f, - (float16_t)0.648514401f, (float16_t)0.761202385f, - (float16_t)0.643831543f, (float16_t)0.765167266f, - (float16_t)0.639124445f, (float16_t)0.769103338f, - (float16_t)0.634393284f, (float16_t)0.773010453f, - (float16_t)0.629638239f, (float16_t)0.776888466f, - (float16_t)0.624859488f, (float16_t)0.780737229f, - (float16_t)0.620057212f, (float16_t)0.784556597f, - (float16_t)0.615231591f, (float16_t)0.788346428f, - (float16_t)0.610382806f, (float16_t)0.792106577f, - (float16_t)0.605511041f, (float16_t)0.795836905f, - (float16_t)0.600616479f, (float16_t)0.799537269f, - (float16_t)0.595699304f, (float16_t)0.803207531f, - (float16_t)0.590759702f, (float16_t)0.806847554f, - (float16_t)0.585797857f, (float16_t)0.810457198f, - (float16_t)0.580813958f, (float16_t)0.814036330f, - (float16_t)0.575808191f, (float16_t)0.817584813f, - (float16_t)0.570780746f, (float16_t)0.821102515f, - (float16_t)0.565731811f, (float16_t)0.824589303f, - (float16_t)0.560661576f, (float16_t)0.828045045f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.550457973f, (float16_t)0.834862875f, - (float16_t)0.545324988f, (float16_t)0.838224706f, - (float16_t)0.540171473f, (float16_t)0.841554977f, - (float16_t)0.534997620f, (float16_t)0.844853565f, - (float16_t)0.529803625f, (float16_t)0.848120345f, - (float16_t)0.524589683f, (float16_t)0.851355193f, - (float16_t)0.519355990f, (float16_t)0.854557988f, - (float16_t)0.514102744f, (float16_t)0.857728610f, - (float16_t)0.508830143f, (float16_t)0.860866939f, - (float16_t)0.503538384f, (float16_t)0.863972856f, - (float16_t)0.498227667f, (float16_t)0.867046246f, - (float16_t)0.492898192f, (float16_t)0.870086991f, - (float16_t)0.487550160f, (float16_t)0.873094978f, - (float16_t)0.482183772f, (float16_t)0.876070094f, - (float16_t)0.476799230f, (float16_t)0.879012226f, - (float16_t)0.471396737f, (float16_t)0.881921264f, - (float16_t)0.465976496f, (float16_t)0.884797098f, - (float16_t)0.460538711f, (float16_t)0.887639620f, - (float16_t)0.455083587f, (float16_t)0.890448723f, - (float16_t)0.449611330f, (float16_t)0.893224301f, - (float16_t)0.444122145f, (float16_t)0.895966250f, - (float16_t)0.438616239f, (float16_t)0.898674466f, - (float16_t)0.433093819f, (float16_t)0.901348847f, - (float16_t)0.427555093f, (float16_t)0.903989293f, - (float16_t)0.422000271f, (float16_t)0.906595705f, - (float16_t)0.416429560f, (float16_t)0.909167983f, - (float16_t)0.410843171f, (float16_t)0.911706032f, - (float16_t)0.405241314f, (float16_t)0.914209756f, - (float16_t)0.399624200f, (float16_t)0.916679060f, - (float16_t)0.393992040f, (float16_t)0.919113852f, - (float16_t)0.388345047f, (float16_t)0.921514039f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.377007410f, (float16_t)0.926210242f, - (float16_t)0.371317194f, (float16_t)0.928506080f, - (float16_t)0.365612998f, (float16_t)0.930766961f, - (float16_t)0.359895037f, (float16_t)0.932992799f, - (float16_t)0.354163525f, (float16_t)0.935183510f, - (float16_t)0.348418680f, (float16_t)0.937339012f, - (float16_t)0.342660717f, (float16_t)0.939459224f, - (float16_t)0.336889853f, (float16_t)0.941544065f, - (float16_t)0.331106306f, (float16_t)0.943593458f, - (float16_t)0.325310292f, (float16_t)0.945607325f, - (float16_t)0.319502031f, (float16_t)0.947585591f, - (float16_t)0.313681740f, (float16_t)0.949528181f, - (float16_t)0.307849640f, (float16_t)0.951435021f, - (float16_t)0.302005949f, (float16_t)0.953306040f, - (float16_t)0.296150888f, (float16_t)0.955141168f, - (float16_t)0.290284677f, (float16_t)0.956940336f, - (float16_t)0.284407537f, (float16_t)0.958703475f, - (float16_t)0.278519689f, (float16_t)0.960430519f, - (float16_t)0.272621355f, (float16_t)0.962121404f, - (float16_t)0.266712757f, (float16_t)0.963776066f, - (float16_t)0.260794118f, (float16_t)0.965394442f, - (float16_t)0.254865660f, (float16_t)0.966976471f, - (float16_t)0.248927606f, (float16_t)0.968522094f, - (float16_t)0.242980180f, (float16_t)0.970031253f, - (float16_t)0.237023606f, (float16_t)0.971503891f, - (float16_t)0.231058108f, (float16_t)0.972939952f, - (float16_t)0.225083911f, (float16_t)0.974339383f, - (float16_t)0.219101240f, (float16_t)0.975702130f, - (float16_t)0.213110320f, (float16_t)0.977028143f, - (float16_t)0.207111376f, (float16_t)0.978317371f, - (float16_t)0.201104635f, (float16_t)0.979569766f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.189068664f, (float16_t)0.981963869f, - (float16_t)0.183039888f, (float16_t)0.983105487f, - (float16_t)0.177004220f, (float16_t)0.984210092f, - (float16_t)0.170961889f, (float16_t)0.985277642f, - (float16_t)0.164913120f, (float16_t)0.986308097f, - (float16_t)0.158858143f, (float16_t)0.987301418f, - (float16_t)0.152797185f, (float16_t)0.988257568f, - (float16_t)0.146730474f, (float16_t)0.989176510f, - (float16_t)0.140658239f, (float16_t)0.990058210f, - (float16_t)0.134580709f, (float16_t)0.990902635f, - (float16_t)0.128498111f, (float16_t)0.991709754f, - (float16_t)0.122410675f, (float16_t)0.992479535f, - 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(float16_t)0.923879533f, (float16_t)-0.382683432f, - (float16_t)0.926210242f, (float16_t)-0.377007410f, - (float16_t)0.928506080f, (float16_t)-0.371317194f, - (float16_t)0.930766961f, (float16_t)-0.365612998f, - (float16_t)0.932992799f, (float16_t)-0.359895037f, - (float16_t)0.935183510f, (float16_t)-0.354163525f, - (float16_t)0.937339012f, (float16_t)-0.348418680f, - (float16_t)0.939459224f, (float16_t)-0.342660717f, - (float16_t)0.941544065f, (float16_t)-0.336889853f, - (float16_t)0.943593458f, (float16_t)-0.331106306f, - (float16_t)0.945607325f, (float16_t)-0.325310292f, - (float16_t)0.947585591f, (float16_t)-0.319502031f, - (float16_t)0.949528181f, (float16_t)-0.313681740f, - (float16_t)0.951435021f, (float16_t)-0.307849640f, - (float16_t)0.953306040f, (float16_t)-0.302005949f, - (float16_t)0.955141168f, (float16_t)-0.296150888f, - (float16_t)0.956940336f, (float16_t)-0.290284677f, - (float16_t)0.958703475f, (float16_t)-0.284407537f, - (float16_t)0.960430519f, (float16_t)-0.278519689f, - (float16_t)0.962121404f, (float16_t)-0.272621355f, - (float16_t)0.963776066f, (float16_t)-0.266712757f, - (float16_t)0.965394442f, (float16_t)-0.260794118f, - (float16_t)0.966976471f, (float16_t)-0.254865660f, - (float16_t)0.968522094f, (float16_t)-0.248927606f, - (float16_t)0.970031253f, (float16_t)-0.242980180f, - (float16_t)0.971503891f, (float16_t)-0.237023606f, - (float16_t)0.972939952f, (float16_t)-0.231058108f, - (float16_t)0.974339383f, (float16_t)-0.225083911f, - (float16_t)0.975702130f, (float16_t)-0.219101240f, - (float16_t)0.977028143f, (float16_t)-0.213110320f, - (float16_t)0.978317371f, (float16_t)-0.207111376f, - (float16_t)0.979569766f, (float16_t)-0.201104635f, - (float16_t)0.980785280f, (float16_t)-0.195090322f, - (float16_t)0.981963869f, (float16_t)-0.189068664f, - (float16_t)0.983105487f, (float16_t)-0.183039888f, - (float16_t)0.984210092f, (float16_t)-0.177004220f, - (float16_t)0.985277642f, (float16_t)-0.170961889f, - (float16_t)0.986308097f, (float16_t)-0.164913120f, - (float16_t)0.987301418f, (float16_t)-0.158858143f, - (float16_t)0.988257568f, (float16_t)-0.152797185f, - (float16_t)0.989176510f, (float16_t)-0.146730474f, - (float16_t)0.990058210f, (float16_t)-0.140658239f, - (float16_t)0.990902635f, (float16_t)-0.134580709f, - (float16_t)0.991709754f, (float16_t)-0.128498111f, - (float16_t)0.992479535f, (float16_t)-0.122410675f, - (float16_t)0.993211949f, (float16_t)-0.116318631f, - (float16_t)0.993906970f, (float16_t)-0.110222207f, - (float16_t)0.994564571f, (float16_t)-0.104121634f, - (float16_t)0.995184727f, (float16_t)-0.098017140f, - (float16_t)0.995767414f, (float16_t)-0.091908956f, - (float16_t)0.996312612f, (float16_t)-0.085797312f, - (float16_t)0.996820299f, (float16_t)-0.079682438f, - (float16_t)0.997290457f, (float16_t)-0.073564564f, - (float16_t)0.997723067f, (float16_t)-0.067443920f, - (float16_t)0.998118113f, (float16_t)-0.061320736f, - (float16_t)0.998475581f, (float16_t)-0.055195244f, - (float16_t)0.998795456f, (float16_t)-0.049067674f, - (float16_t)0.999077728f, (float16_t)-0.042938257f, - (float16_t)0.999322385f, (float16_t)-0.036807223f, - (float16_t)0.999529418f, (float16_t)-0.030674803f, - (float16_t)0.999698819f, (float16_t)-0.024541229f, - (float16_t)0.999830582f, (float16_t)-0.018406730f, - (float16_t)0.999924702f, (float16_t)-0.012271538f, - (float16_t)0.999981175f, (float16_t)-0.006135885f -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048) - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* }
-* \par -* where N = 2048 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float16_t twiddleCoefF16_2048[4096] = { - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.999995294f, (float16_t)0.003067957f, - (float16_t)0.999981175f, (float16_t)0.006135885f, - (float16_t)0.999957645f, (float16_t)0.009203755f, - (float16_t)0.999924702f, (float16_t)0.012271538f, - (float16_t)0.999882347f, (float16_t)0.015339206f, - (float16_t)0.999830582f, (float16_t)0.018406730f, - (float16_t)0.999769405f, (float16_t)0.021474080f, - (float16_t)0.999698819f, (float16_t)0.024541229f, - (float16_t)0.999618822f, (float16_t)0.027608146f, - (float16_t)0.999529418f, (float16_t)0.030674803f, - (float16_t)0.999430605f, (float16_t)0.033741172f, - (float16_t)0.999322385f, (float16_t)0.036807223f, - (float16_t)0.999204759f, (float16_t)0.039872928f, - (float16_t)0.999077728f, (float16_t)0.042938257f, - (float16_t)0.998941293f, (float16_t)0.046003182f, - (float16_t)0.998795456f, (float16_t)0.049067674f, - (float16_t)0.998640218f, (float16_t)0.052131705f, - (float16_t)0.998475581f, (float16_t)0.055195244f, - (float16_t)0.998301545f, (float16_t)0.058258265f, - (float16_t)0.998118113f, (float16_t)0.061320736f, - (float16_t)0.997925286f, (float16_t)0.064382631f, - (float16_t)0.997723067f, (float16_t)0.067443920f, - (float16_t)0.997511456f, (float16_t)0.070504573f, - (float16_t)0.997290457f, (float16_t)0.073564564f, - (float16_t)0.997060070f, (float16_t)0.076623861f, - (float16_t)0.996820299f, (float16_t)0.079682438f, - (float16_t)0.996571146f, (float16_t)0.082740265f, - (float16_t)0.996312612f, (float16_t)0.085797312f, - (float16_t)0.996044701f, (float16_t)0.088853553f, - (float16_t)0.995767414f, (float16_t)0.091908956f, - (float16_t)0.995480755f, (float16_t)0.094963495f, - (float16_t)0.995184727f, (float16_t)0.098017140f, - (float16_t)0.994879331f, (float16_t)0.101069863f, - (float16_t)0.994564571f, (float16_t)0.104121634f, - (float16_t)0.994240449f, (float16_t)0.107172425f, - (float16_t)0.993906970f, (float16_t)0.110222207f, - (float16_t)0.993564136f, (float16_t)0.113270952f, - (float16_t)0.993211949f, (float16_t)0.116318631f, - (float16_t)0.992850414f, (float16_t)0.119365215f, - (float16_t)0.992479535f, (float16_t)0.122410675f, - (float16_t)0.992099313f, (float16_t)0.125454983f, - (float16_t)0.991709754f, (float16_t)0.128498111f, - (float16_t)0.991310860f, (float16_t)0.131540029f, - (float16_t)0.990902635f, (float16_t)0.134580709f, - (float16_t)0.990485084f, (float16_t)0.137620122f, - (float16_t)0.990058210f, (float16_t)0.140658239f, - (float16_t)0.989622017f, (float16_t)0.143695033f, - (float16_t)0.989176510f, (float16_t)0.146730474f, - (float16_t)0.988721692f, (float16_t)0.149764535f, - (float16_t)0.988257568f, (float16_t)0.152797185f, - (float16_t)0.987784142f, (float16_t)0.155828398f, - (float16_t)0.987301418f, (float16_t)0.158858143f, - (float16_t)0.986809402f, (float16_t)0.161886394f, - (float16_t)0.986308097f, (float16_t)0.164913120f, - (float16_t)0.985797509f, (float16_t)0.167938295f, - (float16_t)0.985277642f, (float16_t)0.170961889f, - (float16_t)0.984748502f, (float16_t)0.173983873f, - (float16_t)0.984210092f, (float16_t)0.177004220f, - (float16_t)0.983662419f, (float16_t)0.180022901f, - (float16_t)0.983105487f, (float16_t)0.183039888f, - (float16_t)0.982539302f, (float16_t)0.186055152f, - (float16_t)0.981963869f, (float16_t)0.189068664f, - (float16_t)0.981379193f, (float16_t)0.192080397f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.980182136f, (float16_t)0.198098411f, - (float16_t)0.979569766f, (float16_t)0.201104635f, - (float16_t)0.978948175f, (float16_t)0.204108966f, - (float16_t)0.978317371f, (float16_t)0.207111376f, - (float16_t)0.977677358f, (float16_t)0.210111837f, - (float16_t)0.977028143f, (float16_t)0.213110320f, - (float16_t)0.976369731f, (float16_t)0.216106797f, - (float16_t)0.975702130f, (float16_t)0.219101240f, - (float16_t)0.975025345f, (float16_t)0.222093621f, - (float16_t)0.974339383f, (float16_t)0.225083911f, - (float16_t)0.973644250f, (float16_t)0.228072083f, - (float16_t)0.972939952f, (float16_t)0.231058108f, - (float16_t)0.972226497f, (float16_t)0.234041959f, - (float16_t)0.971503891f, (float16_t)0.237023606f, - (float16_t)0.970772141f, (float16_t)0.240003022f, - (float16_t)0.970031253f, (float16_t)0.242980180f, - (float16_t)0.969281235f, (float16_t)0.245955050f, - (float16_t)0.968522094f, (float16_t)0.248927606f, - (float16_t)0.967753837f, (float16_t)0.251897818f, - (float16_t)0.966976471f, (float16_t)0.254865660f, - (float16_t)0.966190003f, (float16_t)0.257831102f, - (float16_t)0.965394442f, (float16_t)0.260794118f, - (float16_t)0.964589793f, (float16_t)0.263754679f, - (float16_t)0.963776066f, (float16_t)0.266712757f, - (float16_t)0.962953267f, (float16_t)0.269668326f, - (float16_t)0.962121404f, (float16_t)0.272621355f, - (float16_t)0.961280486f, (float16_t)0.275571819f, - (float16_t)0.960430519f, (float16_t)0.278519689f, - (float16_t)0.959571513f, (float16_t)0.281464938f, - (float16_t)0.958703475f, (float16_t)0.284407537f, - (float16_t)0.957826413f, (float16_t)0.287347460f, - (float16_t)0.956940336f, (float16_t)0.290284677f, - (float16_t)0.956045251f, (float16_t)0.293219163f, - (float16_t)0.955141168f, (float16_t)0.296150888f, - (float16_t)0.954228095f, (float16_t)0.299079826f, - (float16_t)0.953306040f, (float16_t)0.302005949f, - (float16_t)0.952375013f, (float16_t)0.304929230f, - (float16_t)0.951435021f, (float16_t)0.307849640f, - (float16_t)0.950486074f, (float16_t)0.310767153f, - (float16_t)0.949528181f, (float16_t)0.313681740f, - (float16_t)0.948561350f, (float16_t)0.316593376f, - (float16_t)0.947585591f, (float16_t)0.319502031f, - (float16_t)0.946600913f, (float16_t)0.322407679f, - (float16_t)0.945607325f, (float16_t)0.325310292f, - (float16_t)0.944604837f, (float16_t)0.328209844f, - (float16_t)0.943593458f, (float16_t)0.331106306f, - (float16_t)0.942573198f, (float16_t)0.333999651f, - (float16_t)0.941544065f, (float16_t)0.336889853f, - (float16_t)0.940506071f, (float16_t)0.339776884f, - (float16_t)0.939459224f, (float16_t)0.342660717f, - (float16_t)0.938403534f, (float16_t)0.345541325f, - (float16_t)0.937339012f, (float16_t)0.348418680f, - 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(float16_t)0.988721692f, (float16_t)-0.149764535f, - (float16_t)0.989176510f, (float16_t)-0.146730474f, - (float16_t)0.989622017f, (float16_t)-0.143695033f, - (float16_t)0.990058210f, (float16_t)-0.140658239f, - (float16_t)0.990485084f, (float16_t)-0.137620122f, - (float16_t)0.990902635f, (float16_t)-0.134580709f, - (float16_t)0.991310860f, (float16_t)-0.131540029f, - (float16_t)0.991709754f, (float16_t)-0.128498111f, - (float16_t)0.992099313f, (float16_t)-0.125454983f, - (float16_t)0.992479535f, (float16_t)-0.122410675f, - (float16_t)0.992850414f, (float16_t)-0.119365215f, - (float16_t)0.993211949f, (float16_t)-0.116318631f, - (float16_t)0.993564136f, (float16_t)-0.113270952f, - (float16_t)0.993906970f, (float16_t)-0.110222207f, - (float16_t)0.994240449f, (float16_t)-0.107172425f, - (float16_t)0.994564571f, (float16_t)-0.104121634f, - (float16_t)0.994879331f, (float16_t)-0.101069863f, - (float16_t)0.995184727f, (float16_t)-0.098017140f, - (float16_t)0.995480755f, (float16_t)-0.094963495f, - (float16_t)0.995767414f, (float16_t)-0.091908956f, - (float16_t)0.996044701f, (float16_t)-0.088853553f, - (float16_t)0.996312612f, (float16_t)-0.085797312f, - (float16_t)0.996571146f, (float16_t)-0.082740265f, - (float16_t)0.996820299f, (float16_t)-0.079682438f, - (float16_t)0.997060070f, (float16_t)-0.076623861f, - (float16_t)0.997290457f, (float16_t)-0.073564564f, - (float16_t)0.997511456f, (float16_t)-0.070504573f, - (float16_t)0.997723067f, (float16_t)-0.067443920f, - (float16_t)0.997925286f, (float16_t)-0.064382631f, - (float16_t)0.998118113f, (float16_t)-0.061320736f, - (float16_t)0.998301545f, (float16_t)-0.058258265f, - (float16_t)0.998475581f, (float16_t)-0.055195244f, - (float16_t)0.998640218f, (float16_t)-0.052131705f, - (float16_t)0.998795456f, (float16_t)-0.049067674f, - (float16_t)0.998941293f, (float16_t)-0.046003182f, - (float16_t)0.999077728f, (float16_t)-0.042938257f, - (float16_t)0.999204759f, (float16_t)-0.039872928f, - (float16_t)0.999322385f, (float16_t)-0.036807223f, - (float16_t)0.999430605f, (float16_t)-0.033741172f, - (float16_t)0.999529418f, (float16_t)-0.030674803f, - (float16_t)0.999618822f, (float16_t)-0.027608146f, - (float16_t)0.999698819f, (float16_t)-0.024541229f, - (float16_t)0.999769405f, (float16_t)-0.021474080f, - (float16_t)0.999830582f, (float16_t)-0.018406730f, - (float16_t)0.999882347f, (float16_t)-0.015339206f, - (float16_t)0.999924702f, (float16_t)-0.012271538f, - (float16_t)0.999957645f, (float16_t)-0.009203755f, - (float16_t)0.999981175f, (float16_t)-0.006135885f, - (float16_t)0.999995294f, (float16_t)-0.003067957f -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096) - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* }
-* \par -* where N = 4096 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float16_t twiddleCoefF16_4096[8192] = { - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.999998823f, (float16_t)0.001533980f, - (float16_t)0.999995294f, (float16_t)0.003067957f, - (float16_t)0.999989411f, (float16_t)0.004601926f, - (float16_t)0.999981175f, (float16_t)0.006135885f, - (float16_t)0.999970586f, (float16_t)0.007669829f, - (float16_t)0.999957645f, (float16_t)0.009203755f, - (float16_t)0.999942350f, (float16_t)0.010737659f, - (float16_t)0.999924702f, (float16_t)0.012271538f, - (float16_t)0.999904701f, (float16_t)0.013805389f, - (float16_t)0.999882347f, (float16_t)0.015339206f, - (float16_t)0.999857641f, (float16_t)0.016872988f, - (float16_t)0.999830582f, (float16_t)0.018406730f, - (float16_t)0.999801170f, (float16_t)0.019940429f, - (float16_t)0.999769405f, (float16_t)0.021474080f, - (float16_t)0.999735288f, (float16_t)0.023007681f, - (float16_t)0.999698819f, (float16_t)0.024541229f, - (float16_t)0.999659997f, (float16_t)0.026074718f, - (float16_t)0.999618822f, (float16_t)0.027608146f, - (float16_t)0.999575296f, (float16_t)0.029141509f, - (float16_t)0.999529418f, (float16_t)0.030674803f, - (float16_t)0.999481187f, (float16_t)0.032208025f, - (float16_t)0.999430605f, (float16_t)0.033741172f, - (float16_t)0.999377670f, (float16_t)0.035274239f, - (float16_t)0.999322385f, (float16_t)0.036807223f, - (float16_t)0.999264747f, (float16_t)0.038340120f, - (float16_t)0.999204759f, (float16_t)0.039872928f, - (float16_t)0.999142419f, (float16_t)0.041405641f, - (float16_t)0.999077728f, (float16_t)0.042938257f, - (float16_t)0.999010686f, (float16_t)0.044470772f, - (float16_t)0.998941293f, (float16_t)0.046003182f, - (float16_t)0.998869550f, (float16_t)0.047535484f, - (float16_t)0.998795456f, (float16_t)0.049067674f, - (float16_t)0.998719012f, (float16_t)0.050599749f, - (float16_t)0.998640218f, (float16_t)0.052131705f, - (float16_t)0.998559074f, (float16_t)0.053663538f, - (float16_t)0.998475581f, (float16_t)0.055195244f, - (float16_t)0.998389737f, (float16_t)0.056726821f, - (float16_t)0.998301545f, (float16_t)0.058258265f, - (float16_t)0.998211003f, (float16_t)0.059789571f, - (float16_t)0.998118113f, (float16_t)0.061320736f, - (float16_t)0.998022874f, (float16_t)0.062851758f, - (float16_t)0.997925286f, (float16_t)0.064382631f, - (float16_t)0.997825350f, (float16_t)0.065913353f, - (float16_t)0.997723067f, (float16_t)0.067443920f, - (float16_t)0.997618435f, (float16_t)0.068974328f, - (float16_t)0.997511456f, (float16_t)0.070504573f, - (float16_t)0.997402130f, (float16_t)0.072034653f, - (float16_t)0.997290457f, (float16_t)0.073564564f, - (float16_t)0.997176437f, (float16_t)0.075094301f, - (float16_t)0.997060070f, (float16_t)0.076623861f, - (float16_t)0.996941358f, (float16_t)0.078153242f, - (float16_t)0.996820299f, (float16_t)0.079682438f, - (float16_t)0.996696895f, (float16_t)0.081211447f, - (float16_t)0.996571146f, (float16_t)0.082740265f, - (float16_t)0.996443051f, (float16_t)0.084268888f, - (float16_t)0.996312612f, (float16_t)0.085797312f, - (float16_t)0.996179829f, (float16_t)0.087325535f, - (float16_t)0.996044701f, (float16_t)0.088853553f, - (float16_t)0.995907229f, (float16_t)0.090381361f, - (float16_t)0.995767414f, (float16_t)0.091908956f, - (float16_t)0.995625256f, (float16_t)0.093436336f, - (float16_t)0.995480755f, (float16_t)0.094963495f, - (float16_t)0.995333912f, (float16_t)0.096490431f, - (float16_t)0.995184727f, (float16_t)0.098017140f, - (float16_t)0.995033199f, (float16_t)0.099543619f, - (float16_t)0.994879331f, (float16_t)0.101069863f, - (float16_t)0.994723121f, (float16_t)0.102595869f, - (float16_t)0.994564571f, (float16_t)0.104121634f, - (float16_t)0.994403680f, (float16_t)0.105647154f, - (float16_t)0.994240449f, (float16_t)0.107172425f, - (float16_t)0.994074879f, (float16_t)0.108697444f, - (float16_t)0.993906970f, (float16_t)0.110222207f, - (float16_t)0.993736722f, (float16_t)0.111746711f, - (float16_t)0.993564136f, (float16_t)0.113270952f, - (float16_t)0.993389211f, (float16_t)0.114794927f, - (float16_t)0.993211949f, (float16_t)0.116318631f, - (float16_t)0.993032350f, (float16_t)0.117842062f, - (float16_t)0.992850414f, (float16_t)0.119365215f, - (float16_t)0.992666142f, (float16_t)0.120888087f, - (float16_t)0.992479535f, (float16_t)0.122410675f, - (float16_t)0.992290591f, (float16_t)0.123932975f, - (float16_t)0.992099313f, (float16_t)0.125454983f, - (float16_t)0.991905700f, (float16_t)0.126976696f, - (float16_t)0.991709754f, (float16_t)0.128498111f, - (float16_t)0.991511473f, (float16_t)0.130019223f, - (float16_t)0.991310860f, (float16_t)0.131540029f, - (float16_t)0.991107914f, (float16_t)0.133060525f, - (float16_t)0.990902635f, (float16_t)0.134580709f, - (float16_t)0.990695025f, (float16_t)0.136100575f, - (float16_t)0.990485084f, (float16_t)0.137620122f, - (float16_t)0.990272812f, (float16_t)0.139139344f, - (float16_t)0.990058210f, (float16_t)0.140658239f, - (float16_t)0.989841278f, (float16_t)0.142176804f, - (float16_t)0.989622017f, (float16_t)0.143695033f, - (float16_t)0.989400428f, (float16_t)0.145212925f, - (float16_t)0.989176510f, (float16_t)0.146730474f, - (float16_t)0.988950265f, (float16_t)0.148247679f, - (float16_t)0.988721692f, (float16_t)0.149764535f, - (float16_t)0.988490793f, (float16_t)0.151281038f, - (float16_t)0.988257568f, (float16_t)0.152797185f, - (float16_t)0.988022017f, (float16_t)0.154312973f, - (float16_t)0.987784142f, (float16_t)0.155828398f, - (float16_t)0.987543942f, (float16_t)0.157343456f, - (float16_t)0.987301418f, (float16_t)0.158858143f, - (float16_t)0.987056571f, (float16_t)0.160372457f, - (float16_t)0.986809402f, (float16_t)0.161886394f, - (float16_t)0.986559910f, (float16_t)0.163399949f, - (float16_t)0.986308097f, (float16_t)0.164913120f, - (float16_t)0.986053963f, (float16_t)0.166425904f, - (float16_t)0.985797509f, (float16_t)0.167938295f, - (float16_t)0.985538735f, (float16_t)0.169450291f, - (float16_t)0.985277642f, (float16_t)0.170961889f, - (float16_t)0.985014231f, (float16_t)0.172473084f, - (float16_t)0.984748502f, (float16_t)0.173983873f, - (float16_t)0.984480455f, (float16_t)0.175494253f, - (float16_t)0.984210092f, (float16_t)0.177004220f, - (float16_t)0.983937413f, (float16_t)0.178513771f, - (float16_t)0.983662419f, (float16_t)0.180022901f, - (float16_t)0.983385110f, (float16_t)0.181531608f, - (float16_t)0.983105487f, (float16_t)0.183039888f, - (float16_t)0.982823551f, (float16_t)0.184547737f, - (float16_t)0.982539302f, (float16_t)0.186055152f, - (float16_t)0.982252741f, (float16_t)0.187562129f, - (float16_t)0.981963869f, (float16_t)0.189068664f, - (float16_t)0.981672686f, (float16_t)0.190574755f, - (float16_t)0.981379193f, (float16_t)0.192080397f, - (float16_t)0.981083391f, (float16_t)0.193585587f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.980484862f, (float16_t)0.196594598f, - (float16_t)0.980182136f, (float16_t)0.198098411f, - (float16_t)0.979877104f, (float16_t)0.199601758f, - (float16_t)0.979569766f, (float16_t)0.201104635f, - (float16_t)0.979260123f, (float16_t)0.202607039f, - (float16_t)0.978948175f, (float16_t)0.204108966f, - (float16_t)0.978633924f, (float16_t)0.205610413f, - (float16_t)0.978317371f, (float16_t)0.207111376f, - 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-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_32) -/** - @par - Example code for Floating-point RFFT Twiddle factors Generation: - @par - 
TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).'
- @par - Real and Imag values are in interleaved fashion -*/ -const float16_t twiddleCoefF16_rfft_32[32] = { - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.980785280f, (float16_t)-0.195090322f, - (float16_t)0.923879533f, (float16_t)-0.382683432f, - (float16_t)0.831469612f, (float16_t)-0.555570233f, - (float16_t)0.707106781f, (float16_t)-0.707106781f, - (float16_t)0.555570233f, (float16_t)-0.831469612f, - (float16_t)0.382683432f, (float16_t)-0.923879533f, - (float16_t)0.195090322f, (float16_t)-0.980785280f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_64) -const float16_t twiddleCoefF16_rfft_64[64] = { - (float16_t)0.000000000000000f, (float16_t)1.000000000000000f, - (float16_t)0.098017140329561f, (float16_t)0.995184726672197f, - (float16_t)0.195090322016128f, (float16_t)0.980785280403230f, - (float16_t)0.290284677254462f, (float16_t)0.956940335732209f, - (float16_t)0.382683432365090f, (float16_t)0.923879532511287f, - (float16_t)0.471396736825998f, (float16_t)0.881921264348355f, - (float16_t)0.555570233019602f, (float16_t)0.831469612302545f, - (float16_t)0.634393284163645f, (float16_t)0.773010453362737f, - (float16_t)0.707106781186547f, (float16_t)0.707106781186548f, - (float16_t)0.773010453362737f, (float16_t)0.634393284163645f, - (float16_t)0.831469612302545f, (float16_t)0.555570233019602f, - (float16_t)0.881921264348355f, (float16_t)0.471396736825998f, - (float16_t)0.923879532511287f, (float16_t)0.382683432365090f, - (float16_t)0.956940335732209f, (float16_t)0.290284677254462f, - (float16_t)0.980785280403230f, (float16_t)0.195090322016128f, - (float16_t)0.995184726672197f, (float16_t)0.098017140329561f, - (float16_t)1.000000000000000f, (float16_t)0.000000000000000f, - (float16_t)0.995184726672197f, (float16_t)-0.098017140329561f, - (float16_t)0.980785280403230f, (float16_t)-0.195090322016128f, - (float16_t)0.956940335732209f, (float16_t)-0.290284677254462f, - (float16_t)0.923879532511287f, (float16_t)-0.382683432365090f, - (float16_t)0.881921264348355f, (float16_t)-0.471396736825998f, - (float16_t)0.831469612302545f, (float16_t)-0.555570233019602f, - (float16_t)0.773010453362737f, (float16_t)-0.634393284163645f, - (float16_t)0.707106781186548f, (float16_t)-0.707106781186547f, - (float16_t)0.634393284163645f, (float16_t)-0.773010453362737f, - (float16_t)0.555570233019602f, (float16_t)-0.831469612302545f, - (float16_t)0.471396736825998f, (float16_t)-0.881921264348355f, - (float16_t)0.382683432365090f, (float16_t)-0.923879532511287f, - (float16_t)0.290284677254462f, (float16_t)-0.956940335732209f, - (float16_t)0.195090322016129f, (float16_t)-0.980785280403230f, - (float16_t)0.098017140329561f, (float16_t)-0.995184726672197f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_128) -const float16_t twiddleCoefF16_rfft_128[128] = { - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)0.049067674f, (float16_t)0.998795456f, - (float16_t)0.098017140f, (float16_t)0.995184727f, - (float16_t)0.146730474f, (float16_t)0.989176510f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.242980180f, (float16_t)0.970031253f, - (float16_t)0.290284677f, (float16_t)0.956940336f, - (float16_t)0.336889853f, (float16_t)0.941544065f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.427555093f, (float16_t)0.903989293f, - (float16_t)0.471396737f, (float16_t)0.881921264f, - (float16_t)0.514102744f, (float16_t)0.857728610f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.595699304f, (float16_t)0.803207531f, - (float16_t)0.634393284f, (float16_t)0.773010453f, - (float16_t)0.671558955f, (float16_t)0.740951125f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.740951125f, (float16_t)0.671558955f, - (float16_t)0.773010453f, (float16_t)0.634393284f, - (float16_t)0.803207531f, (float16_t)0.595699304f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.857728610f, (float16_t)0.514102744f, - (float16_t)0.881921264f, (float16_t)0.471396737f, - (float16_t)0.903989293f, (float16_t)0.427555093f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.941544065f, (float16_t)0.336889853f, - (float16_t)0.956940336f, (float16_t)0.290284677f, - (float16_t)0.970031253f, (float16_t)0.242980180f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.989176510f, (float16_t)0.146730474f, - (float16_t)0.995184727f, (float16_t)0.098017140f, - (float16_t)0.998795456f, (float16_t)0.049067674f, - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.998795456f, (float16_t)-0.049067674f, - (float16_t)0.995184727f, (float16_t)-0.098017140f, - (float16_t)0.989176510f, (float16_t)-0.146730474f, - (float16_t)0.980785280f, (float16_t)-0.195090322f, - (float16_t)0.970031253f, (float16_t)-0.242980180f, - (float16_t)0.956940336f, (float16_t)-0.290284677f, - (float16_t)0.941544065f, (float16_t)-0.336889853f, - (float16_t)0.923879533f, (float16_t)-0.382683432f, - (float16_t)0.903989293f, (float16_t)-0.427555093f, - (float16_t)0.881921264f, (float16_t)-0.471396737f, - (float16_t)0.857728610f, (float16_t)-0.514102744f, - (float16_t)0.831469612f, (float16_t)-0.555570233f, - (float16_t)0.803207531f, (float16_t)-0.595699304f, - (float16_t)0.773010453f, (float16_t)-0.634393284f, - (float16_t)0.740951125f, (float16_t)-0.671558955f, - (float16_t)0.707106781f, (float16_t)-0.707106781f, - (float16_t)0.671558955f, (float16_t)-0.740951125f, - (float16_t)0.634393284f, (float16_t)-0.773010453f, - (float16_t)0.595699304f, (float16_t)-0.803207531f, - (float16_t)0.555570233f, (float16_t)-0.831469612f, - (float16_t)0.514102744f, (float16_t)-0.857728610f, - (float16_t)0.471396737f, (float16_t)-0.881921264f, - (float16_t)0.427555093f, (float16_t)-0.903989293f, - (float16_t)0.382683432f, (float16_t)-0.923879533f, - (float16_t)0.336889853f, (float16_t)-0.941544065f, - (float16_t)0.290284677f, (float16_t)-0.956940336f, - (float16_t)0.242980180f, (float16_t)-0.970031253f, - (float16_t)0.195090322f, (float16_t)-0.980785280f, - (float16_t)0.146730474f, (float16_t)-0.989176510f, - (float16_t)0.098017140f, (float16_t)-0.995184727f, - (float16_t)0.049067674f, (float16_t)-0.998795456f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_256) -const float16_t twiddleCoefF16_rfft_256[256] = { - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)0.024541229f, (float16_t)0.999698819f, - (float16_t)0.049067674f, (float16_t)0.998795456f, - (float16_t)0.073564564f, (float16_t)0.997290457f, - (float16_t)0.098017140f, (float16_t)0.995184727f, - (float16_t)0.122410675f, (float16_t)0.992479535f, - (float16_t)0.146730474f, (float16_t)0.989176510f, - (float16_t)0.170961889f, (float16_t)0.985277642f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.219101240f, (float16_t)0.975702130f, - (float16_t)0.242980180f, (float16_t)0.970031253f, - (float16_t)0.266712757f, (float16_t)0.963776066f, - (float16_t)0.290284677f, (float16_t)0.956940336f, - (float16_t)0.313681740f, (float16_t)0.949528181f, - (float16_t)0.336889853f, (float16_t)0.941544065f, - (float16_t)0.359895037f, (float16_t)0.932992799f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.405241314f, (float16_t)0.914209756f, - (float16_t)0.427555093f, (float16_t)0.903989293f, - (float16_t)0.449611330f, (float16_t)0.893224301f, - (float16_t)0.471396737f, (float16_t)0.881921264f, - (float16_t)0.492898192f, (float16_t)0.870086991f, - (float16_t)0.514102744f, (float16_t)0.857728610f, - (float16_t)0.534997620f, (float16_t)0.844853565f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.575808191f, (float16_t)0.817584813f, - (float16_t)0.595699304f, (float16_t)0.803207531f, - (float16_t)0.615231591f, (float16_t)0.788346428f, - (float16_t)0.634393284f, (float16_t)0.773010453f, - (float16_t)0.653172843f, (float16_t)0.757208847f, - (float16_t)0.671558955f, (float16_t)0.740951125f, - (float16_t)0.689540545f, (float16_t)0.724247083f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.724247083f, (float16_t)0.689540545f, - (float16_t)0.740951125f, (float16_t)0.671558955f, - (float16_t)0.757208847f, (float16_t)0.653172843f, - (float16_t)0.773010453f, (float16_t)0.634393284f, - (float16_t)0.788346428f, (float16_t)0.615231591f, - (float16_t)0.803207531f, (float16_t)0.595699304f, - (float16_t)0.817584813f, (float16_t)0.575808191f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.844853565f, (float16_t)0.534997620f, - (float16_t)0.857728610f, (float16_t)0.514102744f, - (float16_t)0.870086991f, (float16_t)0.492898192f, - (float16_t)0.881921264f, (float16_t)0.471396737f, - (float16_t)0.893224301f, (float16_t)0.449611330f, - (float16_t)0.903989293f, (float16_t)0.427555093f, - (float16_t)0.914209756f, (float16_t)0.405241314f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.932992799f, (float16_t)0.359895037f, - (float16_t)0.941544065f, (float16_t)0.336889853f, - (float16_t)0.949528181f, (float16_t)0.313681740f, - (float16_t)0.956940336f, (float16_t)0.290284677f, - (float16_t)0.963776066f, (float16_t)0.266712757f, - (float16_t)0.970031253f, (float16_t)0.242980180f, - (float16_t)0.975702130f, (float16_t)0.219101240f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.985277642f, (float16_t)0.170961889f, - (float16_t)0.989176510f, (float16_t)0.146730474f, - (float16_t)0.992479535f, (float16_t)0.122410675f, - (float16_t)0.995184727f, (float16_t)0.098017140f, - (float16_t)0.997290457f, (float16_t)0.073564564f, - (float16_t)0.998795456f, (float16_t)0.049067674f, - (float16_t)0.999698819f, (float16_t)0.024541229f, - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.999698819f, (float16_t)-0.024541229f, - (float16_t)0.998795456f, (float16_t)-0.049067674f, - (float16_t)0.997290457f, (float16_t)-0.073564564f, - (float16_t)0.995184727f, (float16_t)-0.098017140f, - (float16_t)0.992479535f, (float16_t)-0.122410675f, - (float16_t)0.989176510f, (float16_t)-0.146730474f, - (float16_t)0.985277642f, (float16_t)-0.170961889f, - (float16_t)0.980785280f, (float16_t)-0.195090322f, - (float16_t)0.975702130f, (float16_t)-0.219101240f, - (float16_t)0.970031253f, (float16_t)-0.242980180f, - (float16_t)0.963776066f, (float16_t)-0.266712757f, - (float16_t)0.956940336f, (float16_t)-0.290284677f, - (float16_t)0.949528181f, (float16_t)-0.313681740f, - (float16_t)0.941544065f, (float16_t)-0.336889853f, - (float16_t)0.932992799f, (float16_t)-0.359895037f, - (float16_t)0.923879533f, (float16_t)-0.382683432f, - (float16_t)0.914209756f, (float16_t)-0.405241314f, - (float16_t)0.903989293f, (float16_t)-0.427555093f, - (float16_t)0.893224301f, (float16_t)-0.449611330f, - (float16_t)0.881921264f, (float16_t)-0.471396737f, - (float16_t)0.870086991f, (float16_t)-0.492898192f, - (float16_t)0.857728610f, (float16_t)-0.514102744f, - (float16_t)0.844853565f, (float16_t)-0.534997620f, - (float16_t)0.831469612f, (float16_t)-0.555570233f, - (float16_t)0.817584813f, (float16_t)-0.575808191f, - (float16_t)0.803207531f, (float16_t)-0.595699304f, - (float16_t)0.788346428f, (float16_t)-0.615231591f, - (float16_t)0.773010453f, (float16_t)-0.634393284f, - (float16_t)0.757208847f, (float16_t)-0.653172843f, - (float16_t)0.740951125f, (float16_t)-0.671558955f, - (float16_t)0.724247083f, (float16_t)-0.689540545f, - (float16_t)0.707106781f, (float16_t)-0.707106781f, - (float16_t)0.689540545f, (float16_t)-0.724247083f, - (float16_t)0.671558955f, (float16_t)-0.740951125f, - (float16_t)0.653172843f, (float16_t)-0.757208847f, - (float16_t)0.634393284f, (float16_t)-0.773010453f, - (float16_t)0.615231591f, (float16_t)-0.788346428f, - (float16_t)0.595699304f, (float16_t)-0.803207531f, - (float16_t)0.575808191f, (float16_t)-0.817584813f, - (float16_t)0.555570233f, (float16_t)-0.831469612f, - (float16_t)0.534997620f, (float16_t)-0.844853565f, - (float16_t)0.514102744f, (float16_t)-0.857728610f, - (float16_t)0.492898192f, (float16_t)-0.870086991f, - (float16_t)0.471396737f, (float16_t)-0.881921264f, - (float16_t)0.449611330f, (float16_t)-0.893224301f, - (float16_t)0.427555093f, (float16_t)-0.903989293f, - (float16_t)0.405241314f, (float16_t)-0.914209756f, - (float16_t)0.382683432f, (float16_t)-0.923879533f, - (float16_t)0.359895037f, (float16_t)-0.932992799f, - (float16_t)0.336889853f, (float16_t)-0.941544065f, - (float16_t)0.313681740f, (float16_t)-0.949528181f, - (float16_t)0.290284677f, (float16_t)-0.956940336f, - (float16_t)0.266712757f, (float16_t)-0.963776066f, - (float16_t)0.242980180f, (float16_t)-0.970031253f, - (float16_t)0.219101240f, (float16_t)-0.975702130f, - (float16_t)0.195090322f, (float16_t)-0.980785280f, - (float16_t)0.170961889f, (float16_t)-0.985277642f, - (float16_t)0.146730474f, (float16_t)-0.989176510f, - (float16_t)0.122410675f, (float16_t)-0.992479535f, - (float16_t)0.098017140f, (float16_t)-0.995184727f, - (float16_t)0.073564564f, (float16_t)-0.997290457f, - (float16_t)0.049067674f, (float16_t)-0.998795456f, - (float16_t)0.024541229f, (float16_t)-0.999698819f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_512) -const float16_t twiddleCoefF16_rfft_512[512] = { - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)0.012271538f, (float16_t)0.999924702f, - (float16_t)0.024541229f, (float16_t)0.999698819f, - (float16_t)0.036807223f, (float16_t)0.999322385f, - (float16_t)0.049067674f, (float16_t)0.998795456f, - (float16_t)0.061320736f, (float16_t)0.998118113f, - (float16_t)0.073564564f, (float16_t)0.997290457f, - (float16_t)0.085797312f, (float16_t)0.996312612f, - (float16_t)0.098017140f, (float16_t)0.995184727f, - (float16_t)0.110222207f, (float16_t)0.993906970f, - (float16_t)0.122410675f, (float16_t)0.992479535f, - (float16_t)0.134580709f, (float16_t)0.990902635f, - (float16_t)0.146730474f, (float16_t)0.989176510f, - (float16_t)0.158858143f, (float16_t)0.987301418f, - (float16_t)0.170961889f, (float16_t)0.985277642f, - (float16_t)0.183039888f, (float16_t)0.983105487f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.207111376f, (float16_t)0.978317371f, - (float16_t)0.219101240f, (float16_t)0.975702130f, - (float16_t)0.231058108f, (float16_t)0.972939952f, - (float16_t)0.242980180f, (float16_t)0.970031253f, - (float16_t)0.254865660f, (float16_t)0.966976471f, - (float16_t)0.266712757f, (float16_t)0.963776066f, - (float16_t)0.278519689f, (float16_t)0.960430519f, - (float16_t)0.290284677f, (float16_t)0.956940336f, - (float16_t)0.302005949f, (float16_t)0.953306040f, - (float16_t)0.313681740f, (float16_t)0.949528181f, - (float16_t)0.325310292f, (float16_t)0.945607325f, - (float16_t)0.336889853f, (float16_t)0.941544065f, - (float16_t)0.348418680f, (float16_t)0.937339012f, - (float16_t)0.359895037f, (float16_t)0.932992799f, - (float16_t)0.371317194f, (float16_t)0.928506080f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.393992040f, (float16_t)0.919113852f, - (float16_t)0.405241314f, (float16_t)0.914209756f, - (float16_t)0.416429560f, (float16_t)0.909167983f, - (float16_t)0.427555093f, (float16_t)0.903989293f, - (float16_t)0.438616239f, (float16_t)0.898674466f, - (float16_t)0.449611330f, (float16_t)0.893224301f, - (float16_t)0.460538711f, (float16_t)0.887639620f, - (float16_t)0.471396737f, (float16_t)0.881921264f, - (float16_t)0.482183772f, (float16_t)0.876070094f, - (float16_t)0.492898192f, (float16_t)0.870086991f, - (float16_t)0.503538384f, (float16_t)0.863972856f, - (float16_t)0.514102744f, (float16_t)0.857728610f, - (float16_t)0.524589683f, (float16_t)0.851355193f, - (float16_t)0.534997620f, (float16_t)0.844853565f, - (float16_t)0.545324988f, (float16_t)0.838224706f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.565731811f, (float16_t)0.824589303f, - (float16_t)0.575808191f, (float16_t)0.817584813f, - (float16_t)0.585797857f, (float16_t)0.810457198f, - (float16_t)0.595699304f, (float16_t)0.803207531f, - (float16_t)0.605511041f, (float16_t)0.795836905f, - (float16_t)0.615231591f, (float16_t)0.788346428f, - (float16_t)0.624859488f, (float16_t)0.780737229f, - (float16_t)0.634393284f, (float16_t)0.773010453f, - (float16_t)0.643831543f, (float16_t)0.765167266f, - (float16_t)0.653172843f, (float16_t)0.757208847f, - (float16_t)0.662415778f, (float16_t)0.749136395f, - (float16_t)0.671558955f, (float16_t)0.740951125f, - (float16_t)0.680600998f, (float16_t)0.732654272f, - (float16_t)0.689540545f, (float16_t)0.724247083f, - (float16_t)0.698376249f, (float16_t)0.715730825f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.715730825f, (float16_t)0.698376249f, - (float16_t)0.724247083f, (float16_t)0.689540545f, - (float16_t)0.732654272f, (float16_t)0.680600998f, - (float16_t)0.740951125f, (float16_t)0.671558955f, - (float16_t)0.749136395f, (float16_t)0.662415778f, - (float16_t)0.757208847f, (float16_t)0.653172843f, - (float16_t)0.765167266f, (float16_t)0.643831543f, - (float16_t)0.773010453f, (float16_t)0.634393284f, - (float16_t)0.780737229f, (float16_t)0.624859488f, - (float16_t)0.788346428f, (float16_t)0.615231591f, - (float16_t)0.795836905f, (float16_t)0.605511041f, - (float16_t)0.803207531f, (float16_t)0.595699304f, - (float16_t)0.810457198f, (float16_t)0.585797857f, - (float16_t)0.817584813f, (float16_t)0.575808191f, - (float16_t)0.824589303f, (float16_t)0.565731811f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.838224706f, (float16_t)0.545324988f, - (float16_t)0.844853565f, (float16_t)0.534997620f, - (float16_t)0.851355193f, (float16_t)0.524589683f, - (float16_t)0.857728610f, (float16_t)0.514102744f, - (float16_t)0.863972856f, (float16_t)0.503538384f, - (float16_t)0.870086991f, (float16_t)0.492898192f, - (float16_t)0.876070094f, (float16_t)0.482183772f, - (float16_t)0.881921264f, (float16_t)0.471396737f, - (float16_t)0.887639620f, (float16_t)0.460538711f, - (float16_t)0.893224301f, (float16_t)0.449611330f, - (float16_t)0.898674466f, (float16_t)0.438616239f, - (float16_t)0.903989293f, (float16_t)0.427555093f, - (float16_t)0.909167983f, (float16_t)0.416429560f, - (float16_t)0.914209756f, (float16_t)0.405241314f, - (float16_t)0.919113852f, (float16_t)0.393992040f, - (float16_t)0.923879533f, (float16_t)0.382683432f, - (float16_t)0.928506080f, (float16_t)0.371317194f, - (float16_t)0.932992799f, (float16_t)0.359895037f, - (float16_t)0.937339012f, (float16_t)0.348418680f, - (float16_t)0.941544065f, (float16_t)0.336889853f, - (float16_t)0.945607325f, (float16_t)0.325310292f, - (float16_t)0.949528181f, (float16_t)0.313681740f, - (float16_t)0.953306040f, (float16_t)0.302005949f, - (float16_t)0.956940336f, (float16_t)0.290284677f, - (float16_t)0.960430519f, (float16_t)0.278519689f, - (float16_t)0.963776066f, (float16_t)0.266712757f, - (float16_t)0.966976471f, (float16_t)0.254865660f, - (float16_t)0.970031253f, (float16_t)0.242980180f, - (float16_t)0.972939952f, (float16_t)0.231058108f, - (float16_t)0.975702130f, (float16_t)0.219101240f, - (float16_t)0.978317371f, (float16_t)0.207111376f, - (float16_t)0.980785280f, (float16_t)0.195090322f, - (float16_t)0.983105487f, (float16_t)0.183039888f, - (float16_t)0.985277642f, (float16_t)0.170961889f, - (float16_t)0.987301418f, (float16_t)0.158858143f, - (float16_t)0.989176510f, (float16_t)0.146730474f, - (float16_t)0.990902635f, (float16_t)0.134580709f, - (float16_t)0.992479535f, (float16_t)0.122410675f, - (float16_t)0.993906970f, (float16_t)0.110222207f, - (float16_t)0.995184727f, (float16_t)0.098017140f, - (float16_t)0.996312612f, (float16_t)0.085797312f, - (float16_t)0.997290457f, (float16_t)0.073564564f, - (float16_t)0.998118113f, (float16_t)0.061320736f, - (float16_t)0.998795456f, (float16_t)0.049067674f, - (float16_t)0.999322385f, (float16_t)0.036807223f, - (float16_t)0.999698819f, (float16_t)0.024541229f, - (float16_t)0.999924702f, (float16_t)0.012271538f, - (float16_t)1.000000000f, (float16_t)0.000000000f, - (float16_t)0.999924702f, (float16_t)-0.012271538f, - (float16_t)0.999698819f, (float16_t)-0.024541229f, - (float16_t)0.999322385f, (float16_t)-0.036807223f, - (float16_t)0.998795456f, (float16_t)-0.049067674f, - (float16_t)0.998118113f, (float16_t)-0.061320736f, - (float16_t)0.997290457f, (float16_t)-0.073564564f, - (float16_t)0.996312612f, (float16_t)-0.085797312f, - (float16_t)0.995184727f, (float16_t)-0.098017140f, - (float16_t)0.993906970f, (float16_t)-0.110222207f, - (float16_t)0.992479535f, (float16_t)-0.122410675f, - (float16_t)0.990902635f, (float16_t)-0.134580709f, - (float16_t)0.989176510f, (float16_t)-0.146730474f, - (float16_t)0.987301418f, (float16_t)-0.158858143f, - (float16_t)0.985277642f, (float16_t)-0.170961889f, - (float16_t)0.983105487f, (float16_t)-0.183039888f, - (float16_t)0.980785280f, (float16_t)-0.195090322f, - (float16_t)0.978317371f, (float16_t)-0.207111376f, - (float16_t)0.975702130f, (float16_t)-0.219101240f, - (float16_t)0.972939952f, (float16_t)-0.231058108f, - (float16_t)0.970031253f, (float16_t)-0.242980180f, - (float16_t)0.966976471f, (float16_t)-0.254865660f, - (float16_t)0.963776066f, (float16_t)-0.266712757f, - (float16_t)0.960430519f, (float16_t)-0.278519689f, - (float16_t)0.956940336f, (float16_t)-0.290284677f, - (float16_t)0.953306040f, (float16_t)-0.302005949f, - (float16_t)0.949528181f, (float16_t)-0.313681740f, - (float16_t)0.945607325f, (float16_t)-0.325310292f, - (float16_t)0.941544065f, (float16_t)-0.336889853f, - (float16_t)0.937339012f, (float16_t)-0.348418680f, - (float16_t)0.932992799f, (float16_t)-0.359895037f, - (float16_t)0.928506080f, (float16_t)-0.371317194f, - (float16_t)0.923879533f, (float16_t)-0.382683432f, - (float16_t)0.919113852f, (float16_t)-0.393992040f, - (float16_t)0.914209756f, (float16_t)-0.405241314f, - (float16_t)0.909167983f, (float16_t)-0.416429560f, - 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(float16_t)0.780737229f, (float16_t)-0.624859488f, - (float16_t)0.773010453f, (float16_t)-0.634393284f, - (float16_t)0.765167266f, (float16_t)-0.643831543f, - (float16_t)0.757208847f, (float16_t)-0.653172843f, - (float16_t)0.749136395f, (float16_t)-0.662415778f, - (float16_t)0.740951125f, (float16_t)-0.671558955f, - (float16_t)0.732654272f, (float16_t)-0.680600998f, - (float16_t)0.724247083f, (float16_t)-0.689540545f, - (float16_t)0.715730825f, (float16_t)-0.698376249f, - (float16_t)0.707106781f, (float16_t)-0.707106781f, - (float16_t)0.698376249f, (float16_t)-0.715730825f, - (float16_t)0.689540545f, (float16_t)-0.724247083f, - (float16_t)0.680600998f, (float16_t)-0.732654272f, - (float16_t)0.671558955f, (float16_t)-0.740951125f, - (float16_t)0.662415778f, (float16_t)-0.749136395f, - (float16_t)0.653172843f, (float16_t)-0.757208847f, - (float16_t)0.643831543f, (float16_t)-0.765167266f, - (float16_t)0.634393284f, (float16_t)-0.773010453f, - (float16_t)0.624859488f, (float16_t)-0.780737229f, - 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(float16_t)0.416429560f, (float16_t)-0.909167983f, - (float16_t)0.405241314f, (float16_t)-0.914209756f, - (float16_t)0.393992040f, (float16_t)-0.919113852f, - (float16_t)0.382683432f, (float16_t)-0.923879533f, - (float16_t)0.371317194f, (float16_t)-0.928506080f, - (float16_t)0.359895037f, (float16_t)-0.932992799f, - (float16_t)0.348418680f, (float16_t)-0.937339012f, - (float16_t)0.336889853f, (float16_t)-0.941544065f, - (float16_t)0.325310292f, (float16_t)-0.945607325f, - (float16_t)0.313681740f, (float16_t)-0.949528181f, - (float16_t)0.302005949f, (float16_t)-0.953306040f, - (float16_t)0.290284677f, (float16_t)-0.956940336f, - (float16_t)0.278519689f, (float16_t)-0.960430519f, - (float16_t)0.266712757f, (float16_t)-0.963776066f, - (float16_t)0.254865660f, (float16_t)-0.966976471f, - (float16_t)0.242980180f, (float16_t)-0.970031253f, - (float16_t)0.231058108f, (float16_t)-0.972939952f, - (float16_t)0.219101240f, (float16_t)-0.975702130f, - (float16_t)0.207111376f, (float16_t)-0.978317371f, - (float16_t)0.195090322f, (float16_t)-0.980785280f, - (float16_t)0.183039888f, (float16_t)-0.983105487f, - (float16_t)0.170961889f, (float16_t)-0.985277642f, - (float16_t)0.158858143f, (float16_t)-0.987301418f, - (float16_t)0.146730474f, (float16_t)-0.989176510f, - (float16_t)0.134580709f, (float16_t)-0.990902635f, - (float16_t)0.122410675f, (float16_t)-0.992479535f, - (float16_t)0.110222207f, (float16_t)-0.993906970f, - (float16_t)0.098017140f, (float16_t)-0.995184727f, - (float16_t)0.085797312f, (float16_t)-0.996312612f, - (float16_t)0.073564564f, (float16_t)-0.997290457f, - (float16_t)0.061320736f, (float16_t)-0.998118113f, - (float16_t)0.049067674f, (float16_t)-0.998795456f, - (float16_t)0.036807223f, (float16_t)-0.999322385f, - (float16_t)0.024541229f, (float16_t)-0.999698819f, - (float16_t)0.012271538f, (float16_t)-0.999924702f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_1024) -const float16_t twiddleCoefF16_rfft_1024[1024] = { - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)0.006135885f, (float16_t)0.999981175f, - (float16_t)0.012271538f, (float16_t)0.999924702f, - (float16_t)0.018406730f, (float16_t)0.999830582f, - (float16_t)0.024541229f, (float16_t)0.999698819f, - (float16_t)0.030674803f, (float16_t)0.999529418f, - (float16_t)0.036807223f, (float16_t)0.999322385f, - (float16_t)0.042938257f, (float16_t)0.999077728f, - (float16_t)0.049067674f, (float16_t)0.998795456f, - (float16_t)0.055195244f, (float16_t)0.998475581f, - (float16_t)0.061320736f, (float16_t)0.998118113f, - (float16_t)0.067443920f, (float16_t)0.997723067f, - (float16_t)0.073564564f, (float16_t)0.997290457f, - (float16_t)0.079682438f, (float16_t)0.996820299f, - (float16_t)0.085797312f, (float16_t)0.996312612f, - (float16_t)0.091908956f, (float16_t)0.995767414f, - (float16_t)0.098017140f, (float16_t)0.995184727f, - (float16_t)0.104121634f, (float16_t)0.994564571f, - (float16_t)0.110222207f, (float16_t)0.993906970f, - (float16_t)0.116318631f, (float16_t)0.993211949f, - (float16_t)0.122410675f, (float16_t)0.992479535f, - (float16_t)0.128498111f, (float16_t)0.991709754f, - (float16_t)0.134580709f, (float16_t)0.990902635f, - (float16_t)0.140658239f, (float16_t)0.990058210f, - (float16_t)0.146730474f, (float16_t)0.989176510f, - (float16_t)0.152797185f, (float16_t)0.988257568f, - (float16_t)0.158858143f, (float16_t)0.987301418f, - (float16_t)0.164913120f, (float16_t)0.986308097f, - (float16_t)0.170961889f, (float16_t)0.985277642f, - (float16_t)0.177004220f, (float16_t)0.984210092f, - (float16_t)0.183039888f, (float16_t)0.983105487f, - (float16_t)0.189068664f, (float16_t)0.981963869f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.201104635f, (float16_t)0.979569766f, - (float16_t)0.207111376f, (float16_t)0.978317371f, - (float16_t)0.213110320f, (float16_t)0.977028143f, - (float16_t)0.219101240f, (float16_t)0.975702130f, - (float16_t)0.225083911f, (float16_t)0.974339383f, - (float16_t)0.231058108f, (float16_t)0.972939952f, - (float16_t)0.237023606f, (float16_t)0.971503891f, - (float16_t)0.242980180f, (float16_t)0.970031253f, - (float16_t)0.248927606f, (float16_t)0.968522094f, - (float16_t)0.254865660f, (float16_t)0.966976471f, - (float16_t)0.260794118f, (float16_t)0.965394442f, - (float16_t)0.266712757f, (float16_t)0.963776066f, - (float16_t)0.272621355f, (float16_t)0.962121404f, - (float16_t)0.278519689f, (float16_t)0.960430519f, - (float16_t)0.284407537f, (float16_t)0.958703475f, - (float16_t)0.290284677f, (float16_t)0.956940336f, - (float16_t)0.296150888f, (float16_t)0.955141168f, - (float16_t)0.302005949f, (float16_t)0.953306040f, - (float16_t)0.307849640f, (float16_t)0.951435021f, - (float16_t)0.313681740f, (float16_t)0.949528181f, - (float16_t)0.319502031f, (float16_t)0.947585591f, - (float16_t)0.325310292f, (float16_t)0.945607325f, - (float16_t)0.331106306f, (float16_t)0.943593458f, - (float16_t)0.336889853f, (float16_t)0.941544065f, - (float16_t)0.342660717f, (float16_t)0.939459224f, - (float16_t)0.348418680f, (float16_t)0.937339012f, - (float16_t)0.354163525f, (float16_t)0.935183510f, - (float16_t)0.359895037f, (float16_t)0.932992799f, - (float16_t)0.365612998f, (float16_t)0.930766961f, - (float16_t)0.371317194f, (float16_t)0.928506080f, - (float16_t)0.377007410f, (float16_t)0.926210242f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.388345047f, (float16_t)0.921514039f, - (float16_t)0.393992040f, (float16_t)0.919113852f, - (float16_t)0.399624200f, (float16_t)0.916679060f, - (float16_t)0.405241314f, (float16_t)0.914209756f, - (float16_t)0.410843171f, (float16_t)0.911706032f, - (float16_t)0.416429560f, (float16_t)0.909167983f, - (float16_t)0.422000271f, (float16_t)0.906595705f, - (float16_t)0.427555093f, (float16_t)0.903989293f, - (float16_t)0.433093819f, (float16_t)0.901348847f, - (float16_t)0.438616239f, (float16_t)0.898674466f, - (float16_t)0.444122145f, (float16_t)0.895966250f, - (float16_t)0.449611330f, (float16_t)0.893224301f, - (float16_t)0.455083587f, (float16_t)0.890448723f, - (float16_t)0.460538711f, (float16_t)0.887639620f, - (float16_t)0.465976496f, (float16_t)0.884797098f, - (float16_t)0.471396737f, (float16_t)0.881921264f, - (float16_t)0.476799230f, (float16_t)0.879012226f, - (float16_t)0.482183772f, (float16_t)0.876070094f, - (float16_t)0.487550160f, (float16_t)0.873094978f, - (float16_t)0.492898192f, (float16_t)0.870086991f, - (float16_t)0.498227667f, (float16_t)0.867046246f, - (float16_t)0.503538384f, (float16_t)0.863972856f, - (float16_t)0.508830143f, (float16_t)0.860866939f, - (float16_t)0.514102744f, (float16_t)0.857728610f, - (float16_t)0.519355990f, (float16_t)0.854557988f, - (float16_t)0.524589683f, (float16_t)0.851355193f, - (float16_t)0.529803625f, (float16_t)0.848120345f, - (float16_t)0.534997620f, (float16_t)0.844853565f, - (float16_t)0.540171473f, (float16_t)0.841554977f, - (float16_t)0.545324988f, (float16_t)0.838224706f, - (float16_t)0.550457973f, (float16_t)0.834862875f, - (float16_t)0.555570233f, (float16_t)0.831469612f, - (float16_t)0.560661576f, (float16_t)0.828045045f, - (float16_t)0.565731811f, (float16_t)0.824589303f, - (float16_t)0.570780746f, (float16_t)0.821102515f, - (float16_t)0.575808191f, (float16_t)0.817584813f, - (float16_t)0.580813958f, (float16_t)0.814036330f, - (float16_t)0.585797857f, (float16_t)0.810457198f, - (float16_t)0.590759702f, (float16_t)0.806847554f, - (float16_t)0.595699304f, (float16_t)0.803207531f, - (float16_t)0.600616479f, (float16_t)0.799537269f, - (float16_t)0.605511041f, (float16_t)0.795836905f, - (float16_t)0.610382806f, (float16_t)0.792106577f, - (float16_t)0.615231591f, (float16_t)0.788346428f, - (float16_t)0.620057212f, (float16_t)0.784556597f, - (float16_t)0.624859488f, (float16_t)0.780737229f, - (float16_t)0.629638239f, (float16_t)0.776888466f, - (float16_t)0.634393284f, (float16_t)0.773010453f, - (float16_t)0.639124445f, (float16_t)0.769103338f, - (float16_t)0.643831543f, (float16_t)0.765167266f, - (float16_t)0.648514401f, (float16_t)0.761202385f, - (float16_t)0.653172843f, (float16_t)0.757208847f, - (float16_t)0.657806693f, (float16_t)0.753186799f, - (float16_t)0.662415778f, (float16_t)0.749136395f, - (float16_t)0.666999922f, (float16_t)0.745057785f, - (float16_t)0.671558955f, (float16_t)0.740951125f, - (float16_t)0.676092704f, (float16_t)0.736816569f, - (float16_t)0.680600998f, (float16_t)0.732654272f, - (float16_t)0.685083668f, (float16_t)0.728464390f, - (float16_t)0.689540545f, (float16_t)0.724247083f, - (float16_t)0.693971461f, (float16_t)0.720002508f, - (float16_t)0.698376249f, (float16_t)0.715730825f, - (float16_t)0.702754744f, (float16_t)0.711432196f, - (float16_t)0.707106781f, (float16_t)0.707106781f, - (float16_t)0.711432196f, (float16_t)0.702754744f, - (float16_t)0.715730825f, (float16_t)0.698376249f, - (float16_t)0.720002508f, (float16_t)0.693971461f, - (float16_t)0.724247083f, (float16_t)0.689540545f, - (float16_t)0.728464390f, (float16_t)0.685083668f, - (float16_t)0.732654272f, (float16_t)0.680600998f, - (float16_t)0.736816569f, (float16_t)0.676092704f, - (float16_t)0.740951125f, (float16_t)0.671558955f, - (float16_t)0.745057785f, (float16_t)0.666999922f, - (float16_t)0.749136395f, (float16_t)0.662415778f, - (float16_t)0.753186799f, (float16_t)0.657806693f, - (float16_t)0.757208847f, (float16_t)0.653172843f, - (float16_t)0.761202385f, (float16_t)0.648514401f, - (float16_t)0.765167266f, (float16_t)0.643831543f, - (float16_t)0.769103338f, (float16_t)0.639124445f, - (float16_t)0.773010453f, (float16_t)0.634393284f, - (float16_t)0.776888466f, (float16_t)0.629638239f, - (float16_t)0.780737229f, (float16_t)0.624859488f, - (float16_t)0.784556597f, (float16_t)0.620057212f, - (float16_t)0.788346428f, (float16_t)0.615231591f, - (float16_t)0.792106577f, (float16_t)0.610382806f, - (float16_t)0.795836905f, (float16_t)0.605511041f, - (float16_t)0.799537269f, (float16_t)0.600616479f, - (float16_t)0.803207531f, (float16_t)0.595699304f, - (float16_t)0.806847554f, (float16_t)0.590759702f, - (float16_t)0.810457198f, (float16_t)0.585797857f, - (float16_t)0.814036330f, (float16_t)0.580813958f, - (float16_t)0.817584813f, (float16_t)0.575808191f, - (float16_t)0.821102515f, (float16_t)0.570780746f, - (float16_t)0.824589303f, (float16_t)0.565731811f, - (float16_t)0.828045045f, (float16_t)0.560661576f, - (float16_t)0.831469612f, (float16_t)0.555570233f, - (float16_t)0.834862875f, (float16_t)0.550457973f, - (float16_t)0.838224706f, (float16_t)0.545324988f, - (float16_t)0.841554977f, (float16_t)0.540171473f, - (float16_t)0.844853565f, (float16_t)0.534997620f, - (float16_t)0.848120345f, (float16_t)0.529803625f, - (float16_t)0.851355193f, (float16_t)0.524589683f, - (float16_t)0.854557988f, (float16_t)0.519355990f, - (float16_t)0.857728610f, (float16_t)0.514102744f, - (float16_t)0.860866939f, (float16_t)0.508830143f, - (float16_t)0.863972856f, (float16_t)0.503538384f, - (float16_t)0.867046246f, (float16_t)0.498227667f, - (float16_t)0.870086991f, (float16_t)0.492898192f, - (float16_t)0.873094978f, (float16_t)0.487550160f, - (float16_t)0.876070094f, (float16_t)0.482183772f, - (float16_t)0.879012226f, (float16_t)0.476799230f, - (float16_t)0.881921264f, (float16_t)0.471396737f, - (float16_t)0.884797098f, (float16_t)0.465976496f, - (float16_t)0.887639620f, (float16_t)0.460538711f, - (float16_t)0.890448723f, (float16_t)0.455083587f, - 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(float16_t)0.371317194f, (float16_t)-0.928506080f, - (float16_t)0.365612998f, (float16_t)-0.930766961f, - (float16_t)0.359895037f, (float16_t)-0.932992799f, - (float16_t)0.354163525f, (float16_t)-0.935183510f, - (float16_t)0.348418680f, (float16_t)-0.937339012f, - (float16_t)0.342660717f, (float16_t)-0.939459224f, - (float16_t)0.336889853f, (float16_t)-0.941544065f, - (float16_t)0.331106306f, (float16_t)-0.943593458f, - (float16_t)0.325310292f, (float16_t)-0.945607325f, - (float16_t)0.319502031f, (float16_t)-0.947585591f, - (float16_t)0.313681740f, (float16_t)-0.949528181f, - (float16_t)0.307849640f, (float16_t)-0.951435021f, - (float16_t)0.302005949f, (float16_t)-0.953306040f, - (float16_t)0.296150888f, (float16_t)-0.955141168f, - (float16_t)0.290284677f, (float16_t)-0.956940336f, - (float16_t)0.284407537f, (float16_t)-0.958703475f, - (float16_t)0.278519689f, (float16_t)-0.960430519f, - (float16_t)0.272621355f, (float16_t)-0.962121404f, - (float16_t)0.266712757f, (float16_t)-0.963776066f, - (float16_t)0.260794118f, (float16_t)-0.965394442f, - (float16_t)0.254865660f, (float16_t)-0.966976471f, - (float16_t)0.248927606f, (float16_t)-0.968522094f, - (float16_t)0.242980180f, (float16_t)-0.970031253f, - (float16_t)0.237023606f, (float16_t)-0.971503891f, - (float16_t)0.231058108f, (float16_t)-0.972939952f, - (float16_t)0.225083911f, (float16_t)-0.974339383f, - (float16_t)0.219101240f, (float16_t)-0.975702130f, - (float16_t)0.213110320f, (float16_t)-0.977028143f, - (float16_t)0.207111376f, (float16_t)-0.978317371f, - (float16_t)0.201104635f, (float16_t)-0.979569766f, - (float16_t)0.195090322f, (float16_t)-0.980785280f, - (float16_t)0.189068664f, (float16_t)-0.981963869f, - (float16_t)0.183039888f, (float16_t)-0.983105487f, - (float16_t)0.177004220f, (float16_t)-0.984210092f, - (float16_t)0.170961889f, (float16_t)-0.985277642f, - (float16_t)0.164913120f, (float16_t)-0.986308097f, - (float16_t)0.158858143f, (float16_t)-0.987301418f, - (float16_t)0.152797185f, (float16_t)-0.988257568f, - (float16_t)0.146730474f, (float16_t)-0.989176510f, - (float16_t)0.140658239f, (float16_t)-0.990058210f, - (float16_t)0.134580709f, (float16_t)-0.990902635f, - (float16_t)0.128498111f, (float16_t)-0.991709754f, - (float16_t)0.122410675f, (float16_t)-0.992479535f, - (float16_t)0.116318631f, (float16_t)-0.993211949f, - (float16_t)0.110222207f, (float16_t)-0.993906970f, - (float16_t)0.104121634f, (float16_t)-0.994564571f, - (float16_t)0.098017140f, (float16_t)-0.995184727f, - (float16_t)0.091908956f, (float16_t)-0.995767414f, - (float16_t)0.085797312f, (float16_t)-0.996312612f, - (float16_t)0.079682438f, (float16_t)-0.996820299f, - (float16_t)0.073564564f, (float16_t)-0.997290457f, - (float16_t)0.067443920f, (float16_t)-0.997723067f, - (float16_t)0.061320736f, (float16_t)-0.998118113f, - (float16_t)0.055195244f, (float16_t)-0.998475581f, - (float16_t)0.049067674f, (float16_t)-0.998795456f, - (float16_t)0.042938257f, (float16_t)-0.999077728f, - (float16_t)0.036807223f, (float16_t)-0.999322385f, - (float16_t)0.030674803f, (float16_t)-0.999529418f, - (float16_t)0.024541229f, (float16_t)-0.999698819f, - (float16_t)0.018406730f, (float16_t)-0.999830582f, - (float16_t)0.012271538f, (float16_t)-0.999924702f, - (float16_t)0.006135885f, (float16_t)-0.999981175f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_2048) -const float16_t twiddleCoefF16_rfft_2048[2048] = { - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)0.003067957f, (float16_t)0.999995294f, - (float16_t)0.006135885f, (float16_t)0.999981175f, - (float16_t)0.009203755f, (float16_t)0.999957645f, - (float16_t)0.012271538f, (float16_t)0.999924702f, - (float16_t)0.015339206f, (float16_t)0.999882347f, - (float16_t)0.018406730f, (float16_t)0.999830582f, - (float16_t)0.021474080f, (float16_t)0.999769405f, - (float16_t)0.024541229f, (float16_t)0.999698819f, - (float16_t)0.027608146f, (float16_t)0.999618822f, - (float16_t)0.030674803f, (float16_t)0.999529418f, - (float16_t)0.033741172f, (float16_t)0.999430605f, - (float16_t)0.036807223f, (float16_t)0.999322385f, - (float16_t)0.039872928f, (float16_t)0.999204759f, - (float16_t)0.042938257f, (float16_t)0.999077728f, - (float16_t)0.046003182f, (float16_t)0.998941293f, - (float16_t)0.049067674f, (float16_t)0.998795456f, - (float16_t)0.052131705f, (float16_t)0.998640218f, - (float16_t)0.055195244f, (float16_t)0.998475581f, - (float16_t)0.058258265f, (float16_t)0.998301545f, - (float16_t)0.061320736f, (float16_t)0.998118113f, - (float16_t)0.064382631f, (float16_t)0.997925286f, - (float16_t)0.067443920f, (float16_t)0.997723067f, - (float16_t)0.070504573f, (float16_t)0.997511456f, - (float16_t)0.073564564f, (float16_t)0.997290457f, - (float16_t)0.076623861f, (float16_t)0.997060070f, - (float16_t)0.079682438f, (float16_t)0.996820299f, - (float16_t)0.082740265f, (float16_t)0.996571146f, - (float16_t)0.085797312f, (float16_t)0.996312612f, - (float16_t)0.088853553f, (float16_t)0.996044701f, - (float16_t)0.091908956f, (float16_t)0.995767414f, - (float16_t)0.094963495f, (float16_t)0.995480755f, - (float16_t)0.098017140f, (float16_t)0.995184727f, - (float16_t)0.101069863f, (float16_t)0.994879331f, - (float16_t)0.104121634f, (float16_t)0.994564571f, - (float16_t)0.107172425f, (float16_t)0.994240449f, - (float16_t)0.110222207f, (float16_t)0.993906970f, - (float16_t)0.113270952f, (float16_t)0.993564136f, - (float16_t)0.116318631f, (float16_t)0.993211949f, - (float16_t)0.119365215f, (float16_t)0.992850414f, - (float16_t)0.122410675f, (float16_t)0.992479535f, - (float16_t)0.125454983f, (float16_t)0.992099313f, - (float16_t)0.128498111f, (float16_t)0.991709754f, - (float16_t)0.131540029f, (float16_t)0.991310860f, - (float16_t)0.134580709f, (float16_t)0.990902635f, - (float16_t)0.137620122f, (float16_t)0.990485084f, - (float16_t)0.140658239f, (float16_t)0.990058210f, - (float16_t)0.143695033f, (float16_t)0.989622017f, - (float16_t)0.146730474f, (float16_t)0.989176510f, - (float16_t)0.149764535f, (float16_t)0.988721692f, - (float16_t)0.152797185f, (float16_t)0.988257568f, - (float16_t)0.155828398f, (float16_t)0.987784142f, - (float16_t)0.158858143f, (float16_t)0.987301418f, - (float16_t)0.161886394f, (float16_t)0.986809402f, - (float16_t)0.164913120f, (float16_t)0.986308097f, - (float16_t)0.167938295f, (float16_t)0.985797509f, - (float16_t)0.170961889f, (float16_t)0.985277642f, - (float16_t)0.173983873f, (float16_t)0.984748502f, - (float16_t)0.177004220f, (float16_t)0.984210092f, - (float16_t)0.180022901f, (float16_t)0.983662419f, - (float16_t)0.183039888f, (float16_t)0.983105487f, - (float16_t)0.186055152f, (float16_t)0.982539302f, - (float16_t)0.189068664f, (float16_t)0.981963869f, - (float16_t)0.192080397f, (float16_t)0.981379193f, - (float16_t)0.195090322f, (float16_t)0.980785280f, - (float16_t)0.198098411f, (float16_t)0.980182136f, - (float16_t)0.201104635f, (float16_t)0.979569766f, - (float16_t)0.204108966f, (float16_t)0.978948175f, - (float16_t)0.207111376f, (float16_t)0.978317371f, - (float16_t)0.210111837f, (float16_t)0.977677358f, - (float16_t)0.213110320f, (float16_t)0.977028143f, - (float16_t)0.216106797f, (float16_t)0.976369731f, - (float16_t)0.219101240f, (float16_t)0.975702130f, - (float16_t)0.222093621f, (float16_t)0.975025345f, - (float16_t)0.225083911f, (float16_t)0.974339383f, - (float16_t)0.228072083f, (float16_t)0.973644250f, - (float16_t)0.231058108f, (float16_t)0.972939952f, - (float16_t)0.234041959f, (float16_t)0.972226497f, - (float16_t)0.237023606f, (float16_t)0.971503891f, - (float16_t)0.240003022f, (float16_t)0.970772141f, - (float16_t)0.242980180f, (float16_t)0.970031253f, - (float16_t)0.245955050f, (float16_t)0.969281235f, - (float16_t)0.248927606f, (float16_t)0.968522094f, - (float16_t)0.251897818f, (float16_t)0.967753837f, - (float16_t)0.254865660f, (float16_t)0.966976471f, - (float16_t)0.257831102f, (float16_t)0.966190003f, - (float16_t)0.260794118f, (float16_t)0.965394442f, - (float16_t)0.263754679f, (float16_t)0.964589793f, - (float16_t)0.266712757f, (float16_t)0.963776066f, - (float16_t)0.269668326f, (float16_t)0.962953267f, - (float16_t)0.272621355f, (float16_t)0.962121404f, - (float16_t)0.275571819f, (float16_t)0.961280486f, - (float16_t)0.278519689f, (float16_t)0.960430519f, - (float16_t)0.281464938f, (float16_t)0.959571513f, - (float16_t)0.284407537f, (float16_t)0.958703475f, - (float16_t)0.287347460f, (float16_t)0.957826413f, - (float16_t)0.290284677f, (float16_t)0.956940336f, - (float16_t)0.293219163f, (float16_t)0.956045251f, - (float16_t)0.296150888f, (float16_t)0.955141168f, - (float16_t)0.299079826f, (float16_t)0.954228095f, - (float16_t)0.302005949f, (float16_t)0.953306040f, - (float16_t)0.304929230f, (float16_t)0.952375013f, - (float16_t)0.307849640f, (float16_t)0.951435021f, - (float16_t)0.310767153f, (float16_t)0.950486074f, - (float16_t)0.313681740f, (float16_t)0.949528181f, - (float16_t)0.316593376f, (float16_t)0.948561350f, - (float16_t)0.319502031f, (float16_t)0.947585591f, - (float16_t)0.322407679f, (float16_t)0.946600913f, - (float16_t)0.325310292f, (float16_t)0.945607325f, - (float16_t)0.328209844f, (float16_t)0.944604837f, - (float16_t)0.331106306f, (float16_t)0.943593458f, - (float16_t)0.333999651f, (float16_t)0.942573198f, - (float16_t)0.336889853f, (float16_t)0.941544065f, - (float16_t)0.339776884f, (float16_t)0.940506071f, - (float16_t)0.342660717f, (float16_t)0.939459224f, - (float16_t)0.345541325f, (float16_t)0.938403534f, - (float16_t)0.348418680f, (float16_t)0.937339012f, - (float16_t)0.351292756f, (float16_t)0.936265667f, - (float16_t)0.354163525f, (float16_t)0.935183510f, - (float16_t)0.357030961f, (float16_t)0.934092550f, - (float16_t)0.359895037f, (float16_t)0.932992799f, - (float16_t)0.362755724f, (float16_t)0.931884266f, - (float16_t)0.365612998f, (float16_t)0.930766961f, - (float16_t)0.368466830f, (float16_t)0.929640896f, - (float16_t)0.371317194f, (float16_t)0.928506080f, - (float16_t)0.374164063f, (float16_t)0.927362526f, - (float16_t)0.377007410f, (float16_t)0.926210242f, - (float16_t)0.379847209f, (float16_t)0.925049241f, - (float16_t)0.382683432f, (float16_t)0.923879533f, - (float16_t)0.385516054f, (float16_t)0.922701128f, - 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(float16_t)0.061320736f, (float16_t)-0.998118113f, - (float16_t)0.058258265f, (float16_t)-0.998301545f, - (float16_t)0.055195244f, (float16_t)-0.998475581f, - (float16_t)0.052131705f, (float16_t)-0.998640218f, - (float16_t)0.049067674f, (float16_t)-0.998795456f, - (float16_t)0.046003182f, (float16_t)-0.998941293f, - (float16_t)0.042938257f, (float16_t)-0.999077728f, - (float16_t)0.039872928f, (float16_t)-0.999204759f, - (float16_t)0.036807223f, (float16_t)-0.999322385f, - (float16_t)0.033741172f, (float16_t)-0.999430605f, - (float16_t)0.030674803f, (float16_t)-0.999529418f, - (float16_t)0.027608146f, (float16_t)-0.999618822f, - (float16_t)0.024541229f, (float16_t)-0.999698819f, - (float16_t)0.021474080f, (float16_t)-0.999769405f, - (float16_t)0.018406730f, (float16_t)-0.999830582f, - (float16_t)0.015339206f, (float16_t)-0.999882347f, - (float16_t)0.012271538f, (float16_t)-0.999924702f, - (float16_t)0.009203755f, (float16_t)-0.999957645f, - (float16_t)0.006135885f, (float16_t)-0.999981175f, - (float16_t)0.003067957f, (float16_t)-0.999995294f -}; -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_4096) -const float16_t twiddleCoefF16_rfft_4096[4096] = { - (float16_t)0.000000000f, (float16_t)1.000000000f, - (float16_t)0.001533980f, (float16_t)0.999998823f, - (float16_t)0.003067957f, (float16_t)0.999995294f, - (float16_t)0.004601926f, (float16_t)0.999989411f, - (float16_t)0.006135885f, (float16_t)0.999981175f, - (float16_t)0.007669829f, (float16_t)0.999970586f, - (float16_t)0.009203755f, (float16_t)0.999957645f, - (float16_t)0.010737659f, (float16_t)0.999942350f, - (float16_t)0.012271538f, (float16_t)0.999924702f, - (float16_t)0.013805389f, (float16_t)0.999904701f, - (float16_t)0.015339206f, (float16_t)0.999882347f, - (float16_t)0.016872988f, (float16_t)0.999857641f, - (float16_t)0.018406730f, (float16_t)0.999830582f, - (float16_t)0.019940429f, (float16_t)0.999801170f, - (float16_t)0.021474080f, (float16_t)0.999769405f, - (float16_t)0.023007681f, (float16_t)0.999735288f, - (float16_t)0.024541229f, (float16_t)0.999698819f, - (float16_t)0.026074718f, (float16_t)0.999659997f, - (float16_t)0.027608146f, (float16_t)0.999618822f, - (float16_t)0.029141509f, (float16_t)0.999575296f, - (float16_t)0.030674803f, (float16_t)0.999529418f, - (float16_t)0.032208025f, (float16_t)0.999481187f, - (float16_t)0.033741172f, (float16_t)0.999430605f, - (float16_t)0.035274239f, (float16_t)0.999377670f, - (float16_t)0.036807223f, (float16_t)0.999322385f, - (float16_t)0.038340120f, (float16_t)0.999264747f, - (float16_t)0.039872928f, (float16_t)0.999204759f, - (float16_t)0.041405641f, (float16_t)0.999142419f, - (float16_t)0.042938257f, (float16_t)0.999077728f, - (float16_t)0.044470772f, (float16_t)0.999010686f, - (float16_t)0.046003182f, (float16_t)0.998941293f, - (float16_t)0.047535484f, (float16_t)0.998869550f, - (float16_t)0.049067674f, (float16_t)0.998795456f, - (float16_t)0.050599749f, (float16_t)0.998719012f, - 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(float16_t)0.155828398f, (float16_t)-0.987784142f, - (float16_t)0.154312973f, (float16_t)-0.988022017f, - (float16_t)0.152797185f, (float16_t)-0.988257568f, - (float16_t)0.151281038f, (float16_t)-0.988490793f, - (float16_t)0.149764535f, (float16_t)-0.988721692f, - (float16_t)0.148247679f, (float16_t)-0.988950265f, - (float16_t)0.146730474f, (float16_t)-0.989176510f, - (float16_t)0.145212925f, (float16_t)-0.989400428f, - (float16_t)0.143695033f, (float16_t)-0.989622017f, - (float16_t)0.142176804f, (float16_t)-0.989841278f, - (float16_t)0.140658239f, (float16_t)-0.990058210f, - (float16_t)0.139139344f, (float16_t)-0.990272812f, - (float16_t)0.137620122f, (float16_t)-0.990485084f, - (float16_t)0.136100575f, (float16_t)-0.990695025f, - (float16_t)0.134580709f, (float16_t)-0.990902635f, - (float16_t)0.133060525f, (float16_t)-0.991107914f, - (float16_t)0.131540029f, (float16_t)-0.991310860f, - (float16_t)0.130019223f, (float16_t)-0.991511473f, - (float16_t)0.128498111f, (float16_t)-0.991709754f, - (float16_t)0.126976696f, (float16_t)-0.991905700f, - (float16_t)0.125454983f, (float16_t)-0.992099313f, - (float16_t)0.123932975f, (float16_t)-0.992290591f, - (float16_t)0.122410675f, (float16_t)-0.992479535f, - (float16_t)0.120888087f, (float16_t)-0.992666142f, - (float16_t)0.119365215f, (float16_t)-0.992850414f, - (float16_t)0.117842062f, (float16_t)-0.993032350f, - (float16_t)0.116318631f, (float16_t)-0.993211949f, - (float16_t)0.114794927f, (float16_t)-0.993389211f, - (float16_t)0.113270952f, (float16_t)-0.993564136f, - (float16_t)0.111746711f, (float16_t)-0.993736722f, - (float16_t)0.110222207f, (float16_t)-0.993906970f, - (float16_t)0.108697444f, (float16_t)-0.994074879f, - (float16_t)0.107172425f, (float16_t)-0.994240449f, - (float16_t)0.105647154f, (float16_t)-0.994403680f, - (float16_t)0.104121634f, (float16_t)-0.994564571f, - (float16_t)0.102595869f, (float16_t)-0.994723121f, - (float16_t)0.101069863f, (float16_t)-0.994879331f, - (float16_t)0.099543619f, (float16_t)-0.995033199f, - (float16_t)0.098017140f, (float16_t)-0.995184727f, - (float16_t)0.096490431f, (float16_t)-0.995333912f, - (float16_t)0.094963495f, (float16_t)-0.995480755f, - (float16_t)0.093436336f, (float16_t)-0.995625256f, - (float16_t)0.091908956f, (float16_t)-0.995767414f, - (float16_t)0.090381361f, (float16_t)-0.995907229f, - (float16_t)0.088853553f, (float16_t)-0.996044701f, - (float16_t)0.087325535f, (float16_t)-0.996179829f, - (float16_t)0.085797312f, (float16_t)-0.996312612f, - (float16_t)0.084268888f, (float16_t)-0.996443051f, - (float16_t)0.082740265f, (float16_t)-0.996571146f, - (float16_t)0.081211447f, (float16_t)-0.996696895f, - (float16_t)0.079682438f, (float16_t)-0.996820299f, - (float16_t)0.078153242f, (float16_t)-0.996941358f, - (float16_t)0.076623861f, (float16_t)-0.997060070f, - (float16_t)0.075094301f, (float16_t)-0.997176437f, - (float16_t)0.073564564f, (float16_t)-0.997290457f, - (float16_t)0.072034653f, (float16_t)-0.997402130f, - (float16_t)0.070504573f, (float16_t)-0.997511456f, - (float16_t)0.068974328f, (float16_t)-0.997618435f, - (float16_t)0.067443920f, (float16_t)-0.997723067f, - (float16_t)0.065913353f, (float16_t)-0.997825350f, - (float16_t)0.064382631f, (float16_t)-0.997925286f, - (float16_t)0.062851758f, (float16_t)-0.998022874f, - (float16_t)0.061320736f, (float16_t)-0.998118113f, - (float16_t)0.059789571f, (float16_t)-0.998211003f, - (float16_t)0.058258265f, (float16_t)-0.998301545f, - (float16_t)0.056726821f, (float16_t)-0.998389737f, - (float16_t)0.055195244f, (float16_t)-0.998475581f, - (float16_t)0.053663538f, (float16_t)-0.998559074f, - (float16_t)0.052131705f, (float16_t)-0.998640218f, - (float16_t)0.050599749f, (float16_t)-0.998719012f, - (float16_t)0.049067674f, (float16_t)-0.998795456f, - (float16_t)0.047535484f, (float16_t)-0.998869550f, - (float16_t)0.046003182f, (float16_t)-0.998941293f, - (float16_t)0.044470772f, (float16_t)-0.999010686f, - (float16_t)0.042938257f, (float16_t)-0.999077728f, - (float16_t)0.041405641f, (float16_t)-0.999142419f, - (float16_t)0.039872928f, (float16_t)-0.999204759f, - (float16_t)0.038340120f, (float16_t)-0.999264747f, - (float16_t)0.036807223f, (float16_t)-0.999322385f, - (float16_t)0.035274239f, (float16_t)-0.999377670f, - (float16_t)0.033741172f, (float16_t)-0.999430605f, - (float16_t)0.032208025f, (float16_t)-0.999481187f, - (float16_t)0.030674803f, (float16_t)-0.999529418f, - (float16_t)0.029141509f, (float16_t)-0.999575296f, - (float16_t)0.027608146f, (float16_t)-0.999618822f, - (float16_t)0.026074718f, (float16_t)-0.999659997f, - (float16_t)0.024541229f, (float16_t)-0.999698819f, - (float16_t)0.023007681f, (float16_t)-0.999735288f, - (float16_t)0.021474080f, (float16_t)-0.999769405f, - (float16_t)0.019940429f, (float16_t)-0.999801170f, - (float16_t)0.018406730f, (float16_t)-0.999830582f, - (float16_t)0.016872988f, (float16_t)-0.999857641f, - (float16_t)0.015339206f, (float16_t)-0.999882347f, - (float16_t)0.013805389f, (float16_t)-0.999904701f, - (float16_t)0.012271538f, (float16_t)-0.999924702f, - (float16_t)0.010737659f, (float16_t)-0.999942350f, - (float16_t)0.009203755f, (float16_t)-0.999957645f, - (float16_t)0.007669829f, (float16_t)-0.999970586f, - (float16_t)0.006135885f, (float16_t)-0.999981175f, - (float16_t)0.004601926f, (float16_t)-0.999989411f, - (float16_t)0.003067957f, (float16_t)-0.999995294f, - (float16_t)0.001533980f, (float16_t)-0.999998823f -}; - -#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALL_TABLES) */ - -#endif /*!defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)*/ - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) -const float16_t exp_tab_f16[8] = { - (1.f16), - (0.0416598916054f16), - (0.500000596046f16), - (0.00138889f16), - (1.00000011921f16), - (0.00833693705499f16), - (0.166665703058f16), - (0.000195780929062f16), -}; - -const float16_t __logf_lut_f16[8] = { - -2.295614848256274f16, /*p0*/ - -2.470711633419806f16, /*p4*/ - -5.686926051100417f16, /*p2*/ - -0.165253547131978f16, /*p6*/ - +5.175912446351073f16, /*p1*/ - +0.844006986174912f16, /*p5*/ - +4.584458825456749f16, /*p3*/ - +0.014127821926000f16 /*p7*/ -}; - -#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - -#endif /* Not ARM AC5 */ - - -/** - @} end of CFFT_CIFFT group -*/ diff --git a/Drivers/CMSIS/DSP/Source/CommonTables/arm_const_structs.c b/Drivers/CMSIS/DSP/Source/CommonTables/arm_const_structs.c deleted file mode 100644 index 31ea518..0000000 --- a/Drivers/CMSIS/DSP/Source/CommonTables/arm_const_structs.c +++ /dev/null @@ -1,654 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_const_structs.c - * Description: Constant structs that are initialized for user convenience. - * For example, some can be given as arguments to the arm_cfft_f32() or arm_rfft_f32() functions. - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_math_types.h" -#include "arm_const_structs.h" - -/* -ALLOW TABLE is true when config table is enabled and the Tramsform folder is included -for compilation. -*/ -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -/* Floating-point structs */ -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_BITREVIDX_FLT64_16)) -const arm_cfft_instance_f64 arm_cfft_sR_f64_len16 = { - 16, (const float64_t *)twiddleCoefF64_16, armBitRevIndexTableF64_16, ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32)) -const arm_cfft_instance_f64 arm_cfft_sR_f64_len32 = { - 32, (const float64_t *)twiddleCoefF64_32, armBitRevIndexTableF64_32, ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64)) -const arm_cfft_instance_f64 arm_cfft_sR_f64_len64 = { - 64, (const float64_t *)twiddleCoefF64_64, armBitRevIndexTableF64_64, ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128)) -const arm_cfft_instance_f64 arm_cfft_sR_f64_len128 = { - 128, (const float64_t *)twiddleCoefF64_128, armBitRevIndexTableF64_128, ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256)) -const arm_cfft_instance_f64 arm_cfft_sR_f64_len256 = { - 256, (const float64_t *)twiddleCoefF64_256, armBitRevIndexTableF64_256, ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512)) -const arm_cfft_instance_f64 arm_cfft_sR_f64_len512 = { - 512, (const float64_t *)twiddleCoefF64_512, armBitRevIndexTableF64_512, ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024)) -const arm_cfft_instance_f64 arm_cfft_sR_f64_len1024 = { - 1024, (const float64_t *)twiddleCoefF64_1024, armBitRevIndexTableF64_1024, ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048)) -const arm_cfft_instance_f64 arm_cfft_sR_f64_len2048 = { - 2048, (const float64_t *)twiddleCoefF64_2048, armBitRevIndexTableF64_2048, ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_4096) && defined(ARM_TABLE_BITREVIDX_FLT64_4096)) -const arm_cfft_instance_f64 arm_cfft_sR_f64_len4096 = { - 4096, (const float64_t *)twiddleCoefF64_4096, armBitRevIndexTableF64_4096, ARMBITREVINDEXTABLEF64_4096_TABLE_LENGTH -}; -#endif - -/* Floating-point structs */ -#if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) - - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16)) -const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = { - 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH -}; -#endif - - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32)) -const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = { - 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64)) -const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = { - 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128)) -const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = { - 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256)) -const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = { - 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512)) -const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = { - 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024)) -const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = { - 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048)) -const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = { - 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096)) -const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = { - 4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH -}; -#endif - -#endif /* !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */ - -/* Fixed-point structs */ - -#if !defined(ARM_MATH_MVEI) || defined(ARM_MATH_AUTOVECTORIZE) - -/* - -Those structures cannot be used to initialize the MVE version of the FFT Q31 instances. -So they are not compiled when MVE is defined. - -For the MVE version, the new arm_cfft_init_f32 must be used. - - -*/ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) -const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = { - 16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) -const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = { - 32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) -const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = { - 64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) -const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = { - 128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) -const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = { - 256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) -const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = { - 512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) -const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = { - 1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) -const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = { - 2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) -const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = { - 4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH -}; -#endif - - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) -const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = { - 16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) -const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = { - 32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) -const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = { - 64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) -const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = { - 128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) -const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = { - 256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) -const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = { - 512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) -const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = { - 1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) -const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = { - 2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) -const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = { - 4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH -}; -#endif - -#endif /* !defined(ARM_MATH_MVEI) */ - -/* Structure for real-value inputs */ -/* Double precision strucs */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32)) -const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len32 = { - { 16, (const float64_t *)twiddleCoefF64_16, armBitRevIndexTableF64_16, ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH }, - 32U, - (float64_t *)twiddleCoefF64_rfft_32 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64)) -const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len64 = { - { 32, (const float64_t *)twiddleCoefF64_32, armBitRevIndexTableF64_32, ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH }, - 64U, - (float64_t *)twiddleCoefF64_rfft_64 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128)) -const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len128 = { - { 64, (const float64_t *)twiddleCoefF64_64, armBitRevIndexTableF64_64, ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH }, - 128U, - (float64_t *)twiddleCoefF64_rfft_128 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256)) -const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len256 = { - { 128, (const float64_t *)twiddleCoefF64_128, armBitRevIndexTableF64_128, ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH }, - 256U, - (float64_t *)twiddleCoefF64_rfft_256 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512)) -const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len512 = { - { 256, (const float64_t *)twiddleCoefF64_256, armBitRevIndexTableF64_256, ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH }, - 512U, - (float64_t *)twiddleCoefF64_rfft_512 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024)) -const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len1024 = { - { 512, (const float64_t *)twiddleCoefF64_512, armBitRevIndexTableF64_512, ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH }, - 1024U, - (float64_t *)twiddleCoefF64_rfft_1024 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048)) -const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len2048 = { - { 1024, (const float64_t *)twiddleCoefF64_1024, armBitRevIndexTableF64_1024, ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH }, - 2048U, - (float64_t *)twiddleCoefF64_rfft_2048 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_4096) && defined(ARM_TABLE_BITREVIDX_FLT64_4096) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096)) -const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len4096 = { - { 2048, (const float64_t *)twiddleCoefF64_2048, armBitRevIndexTableF64_2048, ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH }, - 4096U, - (float64_t *)twiddleCoefF64_rfft_4096 -}; -#endif - -/* Floating-point structs */ - -#if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)) -const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len32 = { - { 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH }, - 32U, - (float32_t *)twiddleCoef_rfft_32 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)) -const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len64 = { - { 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH }, - 64U, - (float32_t *)twiddleCoef_rfft_64 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)) -const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len128 = { - { 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH }, - 128U, - (float32_t *)twiddleCoef_rfft_128 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)) -const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len256 = { - { 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH }, - 256U, - (float32_t *)twiddleCoef_rfft_256 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)) -const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len512 = { - { 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH }, - 512U, - (float32_t *)twiddleCoef_rfft_512 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)) -const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len1024 = { - { 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH }, - 1024U, - (float32_t *)twiddleCoef_rfft_1024 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)) -const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len2048 = { - { 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH }, - 2048U, - (float32_t *)twiddleCoef_rfft_2048 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)) -const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len4096 = { - { 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH }, - 4096U, - (float32_t *)twiddleCoef_rfft_4096 -}; -#endif - -#endif /* #if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */ - -/* Fixed-point structs */ -/* q31_t */ - -#if !defined(ARM_MATH_MVEI) || defined(ARM_MATH_AUTOVECTORIZE) - -/* - -Those structures cannot be used to initialize the MVE version of the FFT Q31 instances. -So they are not compiled when MVE is defined. - -For the MVE version, the new arm_cfft_init_f32 must be used. - - -*/ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) -const arm_rfft_instance_q31 arm_rfft_sR_q31_len32 = { - 32U, - 0, - 1, - 256U, - (q31_t*)realCoefAQ31, - (q31_t*)realCoefBQ31, - &arm_cfft_sR_q31_len16 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) -const arm_rfft_instance_q31 arm_rfft_sR_q31_len64 = { - 64U, - 0, - 1, - 128U, - (q31_t*)realCoefAQ31, - (q31_t*)realCoefBQ31, - &arm_cfft_sR_q31_len32 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) -const arm_rfft_instance_q31 arm_rfft_sR_q31_len128 = { - 128U, - 0, - 1, - 64U, - (q31_t*)realCoefAQ31, - (q31_t*)realCoefBQ31, - &arm_cfft_sR_q31_len64 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) -const arm_rfft_instance_q31 arm_rfft_sR_q31_len256 = { - 256U, - 0, - 1, - 32U, - (q31_t*)realCoefAQ31, - (q31_t*)realCoefBQ31, - &arm_cfft_sR_q31_len128 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) -const arm_rfft_instance_q31 arm_rfft_sR_q31_len512 = { - 512U, - 0, - 1, - 16U, - (q31_t*)realCoefAQ31, - (q31_t*)realCoefBQ31, - &arm_cfft_sR_q31_len256 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) -const arm_rfft_instance_q31 arm_rfft_sR_q31_len1024 = { - 1024U, - 0, - 1, - 8U, - (q31_t*)realCoefAQ31, - (q31_t*)realCoefBQ31, - &arm_cfft_sR_q31_len512 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) -const arm_rfft_instance_q31 arm_rfft_sR_q31_len2048 = { - 2048U, - 0, - 1, - 4U, - (q31_t*)realCoefAQ31, - (q31_t*)realCoefBQ31, - &arm_cfft_sR_q31_len1024 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) -const arm_rfft_instance_q31 arm_rfft_sR_q31_len4096 = { - 4096U, - 0, - 1, - 2U, - (q31_t*)realCoefAQ31, - (q31_t*)realCoefBQ31, - &arm_cfft_sR_q31_len2048 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) -const arm_rfft_instance_q31 arm_rfft_sR_q31_len8192 = { - 8192U, - 0, - 1, - 1U, - (q31_t*)realCoefAQ31, - (q31_t*)realCoefBQ31, - &arm_cfft_sR_q31_len4096 -}; -#endif - - - -/* q15_t */ -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) -const arm_rfft_instance_q15 arm_rfft_sR_q15_len32 = { - 32U, - 0, - 1, - 256U, - (q15_t*)realCoefAQ15, - (q15_t*)realCoefBQ15, - &arm_cfft_sR_q15_len16 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) -const arm_rfft_instance_q15 arm_rfft_sR_q15_len64 = { - 64U, - 0, - 1, - 128U, - (q15_t*)realCoefAQ15, - (q15_t*)realCoefBQ15, - &arm_cfft_sR_q15_len32 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) -const arm_rfft_instance_q15 arm_rfft_sR_q15_len128 = { - 128U, - 0, - 1, - 64U, - (q15_t*)realCoefAQ15, - (q15_t*)realCoefBQ15, - &arm_cfft_sR_q15_len64 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) -const arm_rfft_instance_q15 arm_rfft_sR_q15_len256 = { - 256U, - 0, - 1, - 32U, - (q15_t*)realCoefAQ15, - (q15_t*)realCoefBQ15, - &arm_cfft_sR_q15_len128 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) -const arm_rfft_instance_q15 arm_rfft_sR_q15_len512 = { - 512U, - 0, - 1, - 16U, - (q15_t*)realCoefAQ15, - (q15_t*)realCoefBQ15, - &arm_cfft_sR_q15_len256 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) -const arm_rfft_instance_q15 arm_rfft_sR_q15_len1024 = { - 1024U, - 0, - 1, - 8U, - (q15_t*)realCoefAQ15, - (q15_t*)realCoefBQ15, - &arm_cfft_sR_q15_len512 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) -const arm_rfft_instance_q15 arm_rfft_sR_q15_len2048 = { - 2048U, - 0, - 1, - 4U, - (q15_t*)realCoefAQ15, - (q15_t*)realCoefBQ15, - &arm_cfft_sR_q15_len1024 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) -const arm_rfft_instance_q15 arm_rfft_sR_q15_len4096 = { - 4096U, - 0, - 1, - 2U, - (q15_t*)realCoefAQ15, - (q15_t*)realCoefBQ15, - &arm_cfft_sR_q15_len2048 -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) -const arm_rfft_instance_q15 arm_rfft_sR_q15_len8192 = { - 8192U, - 0, - 1, - 1U, - (q15_t*)realCoefAQ15, - (q15_t*)realCoefBQ15, - &arm_cfft_sR_q15_len4096 -}; -#endif - -#endif /* !defined(ARM_MATH_MVEI) */ - - -#endif diff --git a/Drivers/CMSIS/DSP/Source/CommonTables/arm_const_structs_f16.c b/Drivers/CMSIS/DSP/Source/CommonTables/arm_const_structs_f16.c deleted file mode 100644 index e318483..0000000 --- a/Drivers/CMSIS/DSP/Source/CommonTables/arm_const_structs_f16.c +++ /dev/null @@ -1,120 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_const_structs_f16.c - * Description: Constant structs that are initialized for user convenience. - * For example, some can be given as arguments to the arm_cfft_f32() or arm_rfft_f32() functions. - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_math_types_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include "arm_const_structs_f16.h" - - -/* -ALLOW TABLE is true when config table is enabled and the Tramsform folder is included -for compilation. -*/ -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - - -/* Floating-point structs */ -#if !defined(ARM_MATH_MVE_FLOAT16) || defined(ARM_MATH_AUTOVECTORIZE) - - -/* - -Those structures cannot be used to initialize the MVE version of the FFT F32 instances. -So they are not compiled when MVE is defined. - -For the MVE version, the new arm_cfft_init_f16 must be used. - - -*/ - -#if !defined(__CC_ARM) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16)) -const arm_cfft_instance_f16 arm_cfft_sR_f16_len16 = { - 16, twiddleCoefF16_16, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32)) -const arm_cfft_instance_f16 arm_cfft_sR_f16_len32 = { - 32, twiddleCoefF16_32, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64)) -const arm_cfft_instance_f16 arm_cfft_sR_f16_len64 = { - 64, twiddleCoefF16_64, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128)) -const arm_cfft_instance_f16 arm_cfft_sR_f16_len128 = { - 128, twiddleCoefF16_128, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256)) -const arm_cfft_instance_f16 arm_cfft_sR_f16_len256 = { - 256, twiddleCoefF16_256, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512)) -const arm_cfft_instance_f16 arm_cfft_sR_f16_len512 = { - 512, twiddleCoefF16_512, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024)) -const arm_cfft_instance_f16 arm_cfft_sR_f16_len1024 = { - 1024, twiddleCoefF16_1024, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048)) -const arm_cfft_instance_f16 arm_cfft_sR_f16_len2048 = { - 2048, twiddleCoefF16_2048, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH -}; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096)) -const arm_cfft_instance_f16 arm_cfft_sR_f16_len4096 = { - 4096, twiddleCoefF16_4096, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH -}; -#endif -#endif - -#endif /* !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */ - - -#endif - -#endif diff --git a/Drivers/CMSIS/DSP/Source/CommonTables/arm_mve_tables.c b/Drivers/CMSIS/DSP/Source/CommonTables/arm_mve_tables.c deleted file mode 100644 index ab15b3a..0000000 --- a/Drivers/CMSIS/DSP/Source/CommonTables/arm_mve_tables.c +++ /dev/null @@ -1,6533 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mve_tables.c - * Description: common tables like fft twiddle factors, Bitreverse, reciprocal etc - * used for MVE implementation only - * - * @version V1.10.0 - * @date 04 October 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - #include "arm_math_types.h" - - - - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32) - -uint32_t rearranged_twiddle_tab_stride1_arr_16_f32[2]={ -0,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_16_f32[2]={ -0,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_16_f32[2]={ -0,0,}; - -float32_t rearranged_twiddle_stride1_16_f32[8]={ -1.00000000000000000000f,0.00000000000000000000f,0.92387950420379638672f, -0.38268342614173889160f,0.70710676908493041992f,0.70710676908493041992f, -0.38268342614173889160f,0.92387950420379638672f,}; - -float32_t rearranged_twiddle_stride2_16_f32[8]={ -1.00000000000000000000f,0.00000000000000000000f,0.70710676908493041992f, -0.70710676908493041992f,0.00000000000000006123f,1.00000000000000000000f, --0.70710676908493041992f,0.70710676908493041992f,}; - -float32_t rearranged_twiddle_stride3_16_f32[8]={ -1.00000000000000000000f,0.00000000000000000000f,0.38268342614173889160f, -0.92387950420379638672f,-0.70710676908493041992f,0.70710676908493041992f, --0.92387950420379638672f,-0.38268342614173889160f,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128) - -uint32_t rearranged_twiddle_tab_stride1_arr_64_f32[3]={ -0,32,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_64_f32[3]={ -0,32,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_64_f32[3]={ -0,32,0,}; - -float32_t rearranged_twiddle_stride1_64_f32[40]={ -1.00000000000000000000f,0.00000000000000000000f,0.99518471956253051758f, -0.09801714122295379639f,0.98078525066375732422f,0.19509032368659973145f, -0.95694035291671752930f,0.29028466343879699707f,0.92387950420379638672f, -0.38268342614173889160f,0.88192129135131835938f,0.47139674425125122070f, -0.83146959543228149414f,0.55557024478912353516f,0.77301043272018432617f, -0.63439327478408813477f,0.70710676908493041992f,0.70710676908493041992f, -0.63439327478408813477f,0.77301043272018432617f,0.55557024478912353516f, -0.83146959543228149414f,0.47139674425125122070f,0.88192129135131835938f, -0.38268342614173889160f,0.92387950420379638672f,0.29028466343879699707f, -0.95694035291671752930f,0.19509032368659973145f,0.98078525066375732422f, -0.09801714122295379639f,0.99518471956253051758f,1.00000000000000000000f, -0.00000000000000000000f,0.92387950420379638672f,0.38268342614173889160f, -0.70710676908493041992f,0.70710676908493041992f,0.38268342614173889160f, -0.92387950420379638672f,}; - -float32_t rearranged_twiddle_stride2_64_f32[40]={ -1.00000000000000000000f,0.00000000000000000000f,0.98078525066375732422f, -0.19509032368659973145f,0.92387950420379638672f,0.38268342614173889160f, -0.83146959543228149414f,0.55557024478912353516f,0.70710676908493041992f, -0.70710676908493041992f,0.55557024478912353516f,0.83146959543228149414f, -0.38268342614173889160f,0.92387950420379638672f,0.19509032368659973145f, -0.98078525066375732422f,0.00000000000000006123f,1.00000000000000000000f, --0.19509032368659973145f,0.98078525066375732422f,-0.38268342614173889160f, -0.92387950420379638672f,-0.55557024478912353516f,0.83146959543228149414f, --0.70710676908493041992f,0.70710676908493041992f,-0.83146959543228149414f, -0.55557024478912353516f,-0.92387950420379638672f,0.38268342614173889160f, --0.98078525066375732422f,0.19509032368659973145f,1.00000000000000000000f, -0.00000000000000000000f,0.70710676908493041992f,0.70710676908493041992f, -0.00000000000000006123f,1.00000000000000000000f,-0.70710676908493041992f, -0.70710676908493041992f,}; - -float32_t rearranged_twiddle_stride3_64_f32[40]={ -1.00000000000000000000f,0.00000000000000000000f,0.95694035291671752930f, -0.29028466343879699707f,0.83146959543228149414f,0.55557024478912353516f, -0.63439327478408813477f,0.77301043272018432617f,0.38268342614173889160f, -0.92387950420379638672f,0.09801714122295379639f,0.99518471956253051758f, --0.19509032368659973145f,0.98078525066375732422f,-0.47139674425125122070f, -0.88192129135131835938f,-0.70710676908493041992f,0.70710676908493041992f, --0.88192129135131835938f,0.47139674425125122070f,-0.98078525066375732422f, -0.19509032368659973145f,-0.99518471956253051758f,-0.09801714122295379639f, --0.92387950420379638672f,-0.38268342614173889160f,-0.77301043272018432617f, --0.63439327478408813477f,-0.55557024478912353516f,-0.83146959543228149414f, --0.29028466343879699707f,-0.95694035291671752930f,1.00000000000000000000f, -0.00000000000000000000f,0.38268342614173889160f,0.92387950420379638672f, --0.70710676908493041992f,0.70710676908493041992f,-0.92387950420379638672f, --0.38268342614173889160f,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512) - -uint32_t rearranged_twiddle_tab_stride1_arr_256_f32[4]={ -0,128,160,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_256_f32[4]={ -0,128,160,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_256_f32[4]={ -0,128,160,0,}; - -float32_t rearranged_twiddle_stride1_256_f32[168]={ -1.00000000000000000000f,0.00000000000000000000f,0.99969881772994995117f, -0.02454122900962829590f,0.99879544973373413086f,0.04906767606735229492f, -0.99729043245315551758f,0.07356456667184829712f,0.99518471956253051758f, -0.09801714122295379639f,0.99247956275939941406f,0.12241067737340927124f, -0.98917651176452636719f,0.14673046767711639404f,0.98527765274047851562f, -0.17096188664436340332f,0.98078525066375732422f,0.19509032368659973145f, -0.97570210695266723633f,0.21910123527050018311f,0.97003126144409179688f, -0.24298018217086791992f,0.96377605199813842773f,0.26671275496482849121f, -0.95694035291671752930f,0.29028466343879699707f,0.94952815771102905273f, -0.31368175148963928223f,0.94154405593872070312f,0.33688986301422119141f, -0.93299281597137451172f,0.35989505052566528320f,0.92387950420379638672f, -0.38268342614173889160f,0.91420978307723999023f,0.40524131059646606445f, -0.90398931503295898438f,0.42755508422851562500f,0.89322429895401000977f, -0.44961133599281311035f,0.88192129135131835938f,0.47139674425125122070f, -0.87008696794509887695f,0.49289819598197937012f,0.85772860050201416016f, -0.51410275697708129883f,0.84485357999801635742f,0.53499764204025268555f, -0.83146959543228149414f,0.55557024478912353516f,0.81758481264114379883f, -0.57580816745758056641f,0.80320751667022705078f,0.59569931030273437500f, -0.78834640979766845703f,0.61523157358169555664f,0.77301043272018432617f, -0.63439327478408813477f,0.75720882415771484375f,0.65317285060882568359f, -0.74095112085342407227f,0.67155897617340087891f,0.72424709796905517578f, -0.68954056501388549805f,0.70710676908493041992f,0.70710676908493041992f, -0.68954056501388549805f,0.72424709796905517578f,0.67155897617340087891f, -0.74095112085342407227f,0.65317285060882568359f,0.75720882415771484375f, -0.63439327478408813477f,0.77301043272018432617f,0.61523157358169555664f, -0.78834640979766845703f,0.59569931030273437500f,0.80320751667022705078f, -0.57580816745758056641f,0.81758481264114379883f,0.55557024478912353516f, -0.83146959543228149414f,0.53499764204025268555f,0.84485357999801635742f, -0.51410275697708129883f,0.85772860050201416016f,0.49289819598197937012f, -0.87008696794509887695f,0.47139674425125122070f,0.88192129135131835938f, -0.44961133599281311035f,0.89322429895401000977f,0.42755508422851562500f, -0.90398931503295898438f,0.40524131059646606445f,0.91420978307723999023f, -0.38268342614173889160f,0.92387950420379638672f,0.35989505052566528320f, -0.93299281597137451172f,0.33688986301422119141f,0.94154405593872070312f, -0.31368175148963928223f,0.94952815771102905273f,0.29028466343879699707f, -0.95694035291671752930f,0.26671275496482849121f,0.96377605199813842773f, -0.24298018217086791992f,0.97003126144409179688f,0.21910123527050018311f, -0.97570210695266723633f,0.19509032368659973145f,0.98078525066375732422f, -0.17096188664436340332f,0.98527765274047851562f,0.14673046767711639404f, -0.98917651176452636719f,0.12241067737340927124f,0.99247956275939941406f, -0.09801714122295379639f,0.99518471956253051758f,0.07356456667184829712f, -0.99729043245315551758f,0.04906767606735229492f,0.99879544973373413086f, -0.02454122900962829590f,0.99969881772994995117f,1.00000000000000000000f, -0.00000000000000000000f,0.99518471956253051758f,0.09801714122295379639f, -0.98078525066375732422f,0.19509032368659973145f,0.95694035291671752930f, -0.29028466343879699707f,0.92387950420379638672f,0.38268342614173889160f, -0.88192129135131835938f,0.47139674425125122070f,0.83146959543228149414f, -0.55557024478912353516f,0.77301043272018432617f,0.63439327478408813477f, -0.70710676908493041992f,0.70710676908493041992f,0.63439327478408813477f, -0.77301043272018432617f,0.55557024478912353516f,0.83146959543228149414f, -0.47139674425125122070f,0.88192129135131835938f,0.38268342614173889160f, -0.92387950420379638672f,0.29028466343879699707f,0.95694035291671752930f, -0.19509032368659973145f,0.98078525066375732422f,0.09801714122295379639f, -0.99518471956253051758f,1.00000000000000000000f,0.00000000000000000000f, -0.92387950420379638672f,0.38268342614173889160f,0.70710676908493041992f, -0.70710676908493041992f,0.38268342614173889160f,0.92387950420379638672f,}; - -float32_t rearranged_twiddle_stride2_256_f32[168]={ -1.00000000000000000000f,0.00000000000000000000f,0.99879544973373413086f, -0.04906767606735229492f,0.99518471956253051758f,0.09801714122295379639f, -0.98917651176452636719f,0.14673046767711639404f,0.98078525066375732422f, -0.19509032368659973145f,0.97003126144409179688f,0.24298018217086791992f, -0.95694035291671752930f,0.29028466343879699707f,0.94154405593872070312f, -0.33688986301422119141f,0.92387950420379638672f,0.38268342614173889160f, -0.90398931503295898438f,0.42755508422851562500f,0.88192129135131835938f, -0.47139674425125122070f,0.85772860050201416016f,0.51410275697708129883f, -0.83146959543228149414f,0.55557024478912353516f,0.80320751667022705078f, -0.59569931030273437500f,0.77301043272018432617f,0.63439327478408813477f, -0.74095112085342407227f,0.67155897617340087891f,0.70710676908493041992f, -0.70710676908493041992f,0.67155897617340087891f,0.74095112085342407227f, -0.63439327478408813477f,0.77301043272018432617f,0.59569931030273437500f, -0.80320751667022705078f,0.55557024478912353516f,0.83146959543228149414f, -0.51410275697708129883f,0.85772860050201416016f,0.47139674425125122070f, -0.88192129135131835938f,0.42755508422851562500f,0.90398931503295898438f, -0.38268342614173889160f,0.92387950420379638672f,0.33688986301422119141f, -0.94154405593872070312f,0.29028466343879699707f,0.95694035291671752930f, -0.24298018217086791992f,0.97003126144409179688f,0.19509032368659973145f, -0.98078525066375732422f,0.14673046767711639404f,0.98917651176452636719f, -0.09801714122295379639f,0.99518471956253051758f,0.04906767606735229492f, -0.99879544973373413086f,0.00000000000000006123f,1.00000000000000000000f, --0.04906767606735229492f,0.99879544973373413086f,-0.09801714122295379639f, -0.99518471956253051758f,-0.14673046767711639404f,0.98917651176452636719f, --0.19509032368659973145f,0.98078525066375732422f,-0.24298018217086791992f, -0.97003126144409179688f,-0.29028466343879699707f,0.95694035291671752930f, --0.33688986301422119141f,0.94154405593872070312f,-0.38268342614173889160f, -0.92387950420379638672f,-0.42755508422851562500f,0.90398931503295898438f, --0.47139674425125122070f,0.88192129135131835938f,-0.51410275697708129883f, -0.85772860050201416016f,-0.55557024478912353516f,0.83146959543228149414f, --0.59569931030273437500f,0.80320751667022705078f,-0.63439327478408813477f, -0.77301043272018432617f,-0.67155897617340087891f,0.74095112085342407227f, --0.70710676908493041992f,0.70710676908493041992f,-0.74095112085342407227f, -0.67155897617340087891f,-0.77301043272018432617f,0.63439327478408813477f, --0.80320751667022705078f,0.59569931030273437500f,-0.83146959543228149414f, -0.55557024478912353516f,-0.85772860050201416016f,0.51410275697708129883f, --0.88192129135131835938f,0.47139674425125122070f,-0.90398931503295898438f, -0.42755508422851562500f,-0.92387950420379638672f,0.38268342614173889160f, --0.94154405593872070312f,0.33688986301422119141f,-0.95694035291671752930f, -0.29028466343879699707f,-0.97003126144409179688f,0.24298018217086791992f, --0.98078525066375732422f,0.19509032368659973145f,-0.98917651176452636719f, -0.14673046767711639404f,-0.99518471956253051758f,0.09801714122295379639f, --0.99879544973373413086f,0.04906767606735229492f,1.00000000000000000000f, -0.00000000000000000000f,0.98078525066375732422f,0.19509032368659973145f, -0.92387950420379638672f,0.38268342614173889160f,0.83146959543228149414f, -0.55557024478912353516f,0.70710676908493041992f,0.70710676908493041992f, -0.55557024478912353516f,0.83146959543228149414f,0.38268342614173889160f, -0.92387950420379638672f,0.19509032368659973145f,0.98078525066375732422f, -0.00000000000000006123f,1.00000000000000000000f,-0.19509032368659973145f, -0.98078525066375732422f,-0.38268342614173889160f,0.92387950420379638672f, --0.55557024478912353516f,0.83146959543228149414f,-0.70710676908493041992f, -0.70710676908493041992f,-0.83146959543228149414f,0.55557024478912353516f, --0.92387950420379638672f,0.38268342614173889160f,-0.98078525066375732422f, -0.19509032368659973145f,1.00000000000000000000f,0.00000000000000000000f, -0.70710676908493041992f,0.70710676908493041992f,0.00000000000000006123f, -1.00000000000000000000f,-0.70710676908493041992f,0.70710676908493041992f,}; - -float32_t rearranged_twiddle_stride3_256_f32[168]={ -1.00000000000000000000f,0.00000000000000000000f,0.99729043245315551758f, -0.07356456667184829712f,0.98917651176452636719f,0.14673046767711639404f, -0.97570210695266723633f,0.21910123527050018311f,0.95694035291671752930f, -0.29028466343879699707f,0.93299281597137451172f,0.35989505052566528320f, -0.90398931503295898438f,0.42755508422851562500f,0.87008696794509887695f, -0.49289819598197937012f,0.83146959543228149414f,0.55557024478912353516f, -0.78834640979766845703f,0.61523157358169555664f,0.74095112085342407227f, -0.67155897617340087891f,0.68954056501388549805f,0.72424709796905517578f, -0.63439327478408813477f,0.77301043272018432617f,0.57580816745758056641f, -0.81758481264114379883f,0.51410275697708129883f,0.85772860050201416016f, -0.44961133599281311035f,0.89322429895401000977f,0.38268342614173889160f, -0.92387950420379638672f,0.31368175148963928223f,0.94952815771102905273f, -0.24298018217086791992f,0.97003126144409179688f,0.17096188664436340332f, -0.98527765274047851562f,0.09801714122295379639f,0.99518471956253051758f, -0.02454122900962829590f,0.99969881772994995117f,-0.04906767606735229492f, -0.99879544973373413086f,-0.12241067737340927124f,0.99247956275939941406f, --0.19509032368659973145f,0.98078525066375732422f,-0.26671275496482849121f, -0.96377605199813842773f,-0.33688986301422119141f,0.94154405593872070312f, --0.40524131059646606445f,0.91420978307723999023f,-0.47139674425125122070f, -0.88192129135131835938f,-0.53499764204025268555f,0.84485357999801635742f, --0.59569931030273437500f,0.80320751667022705078f,-0.65317285060882568359f, -0.75720882415771484375f,-0.70710676908493041992f,0.70710676908493041992f, --0.75720882415771484375f,0.65317285060882568359f,-0.80320751667022705078f, -0.59569931030273437500f,-0.84485357999801635742f,0.53499764204025268555f, --0.88192129135131835938f,0.47139674425125122070f,-0.91420978307723999023f, -0.40524131059646606445f,-0.94154405593872070312f,0.33688986301422119141f, --0.96377605199813842773f,0.26671275496482849121f,-0.98078525066375732422f, -0.19509032368659973145f,-0.99247956275939941406f,0.12241067737340927124f, --0.99879544973373413086f,0.04906767606735229492f,-0.99969881772994995117f, --0.02454122900962829590f,-0.99518471956253051758f,-0.09801714122295379639f, --0.98527765274047851562f,-0.17096188664436340332f,-0.97003126144409179688f, --0.24298018217086791992f,-0.94952815771102905273f,-0.31368175148963928223f, --0.92387950420379638672f,-0.38268342614173889160f,-0.89322429895401000977f, --0.44961133599281311035f,-0.85772860050201416016f,-0.51410275697708129883f, --0.81758481264114379883f,-0.57580816745758056641f,-0.77301043272018432617f, --0.63439327478408813477f,-0.72424709796905517578f,-0.68954056501388549805f, --0.67155897617340087891f,-0.74095112085342407227f,-0.61523157358169555664f, --0.78834640979766845703f,-0.55557024478912353516f,-0.83146959543228149414f, --0.49289819598197937012f,-0.87008696794509887695f,-0.42755508422851562500f, --0.90398931503295898438f,-0.35989505052566528320f,-0.93299281597137451172f, --0.29028466343879699707f,-0.95694035291671752930f,-0.21910123527050018311f, --0.97570210695266723633f,-0.14673046767711639404f,-0.98917651176452636719f, --0.07356456667184829712f,-0.99729043245315551758f,1.00000000000000000000f, -0.00000000000000000000f,0.95694035291671752930f,0.29028466343879699707f, -0.83146959543228149414f,0.55557024478912353516f,0.63439327478408813477f, -0.77301043272018432617f,0.38268342614173889160f,0.92387950420379638672f, -0.09801714122295379639f,0.99518471956253051758f,-0.19509032368659973145f, -0.98078525066375732422f,-0.47139674425125122070f,0.88192129135131835938f, --0.70710676908493041992f,0.70710676908493041992f,-0.88192129135131835938f, -0.47139674425125122070f,-0.98078525066375732422f,0.19509032368659973145f, --0.99518471956253051758f,-0.09801714122295379639f,-0.92387950420379638672f, --0.38268342614173889160f,-0.77301043272018432617f,-0.63439327478408813477f, --0.55557024478912353516f,-0.83146959543228149414f,-0.29028466343879699707f, --0.95694035291671752930f,1.00000000000000000000f,0.00000000000000000000f, -0.38268342614173889160f,0.92387950420379638672f,-0.70710676908493041992f, -0.70710676908493041992f,-0.92387950420379638672f,-0.38268342614173889160f,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048) - -uint32_t rearranged_twiddle_tab_stride1_arr_1024_f32[5]={ -0,512,640,672,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_1024_f32[5]={ -0,512,640,672,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_1024_f32[5]={ -0,512,640,672,0,}; - -float32_t rearranged_twiddle_stride1_1024_f32[680]={ -1.00000000000000000000f,0.00000000000000000000f,0.99998116493225097656f, -0.00613588467240333557f,0.99992471933364868164f,0.01227153837680816650f, -0.99983060359954833984f,0.01840673014521598816f,0.99969881772994995117f, -0.02454122900962829590f,0.99952942132949829102f,0.03067480400204658508f, -0.99932235479354858398f,0.03680722415447235107f,0.99907773733139038086f, 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--0.92387950420379638672f,-0.38268342614173889160f,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) || defined(ARM_TABLE_TWIDDLECOEF_F32_8192) - -uint32_t rearranged_twiddle_tab_stride1_arr_4096_f32[6]={ -0,2048,2560,2688,2720,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_4096_f32[6]={ -0,2048,2560,2688,2720,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_4096_f32[6]={ -0,2048,2560,2688,2720,0,}; - -float32_t rearranged_twiddle_stride1_4096_f32[2728]={ -1.00000000000000000000f,0.00000000000000000000f,0.99999880790710449219f, -0.00153398013208061457f,0.99999529123306274414f,0.00306795677170157433f, -0.99998939037322998047f,0.00460192607715725899f,0.99998116493225097656f, -0.00613588467240333557f,0.99997061491012573242f,0.00766982883214950562f, -0.99995762109756469727f,0.00920375436544418335f,0.99994236230850219727f, -0.01073765940964221954f,0.99992471933364868164f,0.01227153837680816650f, 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rearranged_twiddle_tab_stride1_arr_16_q31[2]={ -0,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_16_q31[2]={ -0,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_16_q31[2]={ -0,0,}; - -q31_t rearranged_twiddle_stride1_16_q31[8]={ -0x7FFFFFFF,0x00000000,0x7641AF3D,0xCF043AB3,0x5A82799A,0xA57D8666,0x30FBC54D, -0x89BE50C3,}; - -q31_t rearranged_twiddle_stride2_16_q31[8]={ -0x7FFFFFFF,0x00000000,0x5A82799A,0xA57D8666,0x00000000,0x80000000,0xA57D8666, -0xA57D8666,}; - -q31_t rearranged_twiddle_stride3_16_q31[8]={ -0x7FFFFFFF,0x00000000,0x30FBC54D,0x89BE50C3,0xA57D8666,0xA57D8666,0x89BE50C3, -0x30FBC54D,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128) - -uint32_t rearranged_twiddle_tab_stride1_arr_64_q31[3]={ -0,32,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_64_q31[3]={ -0,32,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_64_q31[3]={ -0,32,0,}; - -q31_t rearranged_twiddle_stride1_64_q31[40]={ -0x7FFFFFFF,0x00000000,0x7F62368F,0xF3742CA2,0x7D8A5F40,0xE70747C4,0x7A7D055B, -0xDAD7F3A2,0x7641AF3D,0xCF043AB3,0x70E2CBC6,0xC3A94590,0x6A6D98A4,0xB8E31319, -0x62F201AC,0xAECC336C,0x5A82799A,0xA57D8666,0x5133CC94,0x9D0DFE54,0x471CECE7, -0x9592675C,0x3C56BA70,0x8F1D343A,0x30FBC54D,0x89BE50C3,0x25280C5E,0x8582FAA5, -0x18F8B83C,0x8275A0C0,0x0C8BD35E,0x809DC971,0x7FFFFFFF,0x00000000,0x7641AF3D, -0xCF043AB3,0x5A82799A,0xA57D8666,0x30FBC54D,0x89BE50C3,}; - -q31_t rearranged_twiddle_stride2_64_q31[40]={ -0x7FFFFFFF,0x00000000,0x7D8A5F40,0xE70747C4,0x7641AF3D,0xCF043AB3,0x6A6D98A4, -0xB8E31319,0x5A82799A,0xA57D8666,0x471CECE7,0x9592675C,0x30FBC54D,0x89BE50C3, -0x18F8B83C,0x8275A0C0,0x00000000,0x80000000,0xE70747C4,0x8275A0C0,0xCF043AB3, -0x89BE50C3,0xB8E31319,0x9592675C,0xA57D8666,0xA57D8666,0x9592675C,0xB8E31319, -0x89BE50C3,0xCF043AB3,0x8275A0C0,0xE70747C4,0x7FFFFFFF,0x00000000,0x5A82799A, -0xA57D8666,0x00000000,0x80000000,0xA57D8666,0xA57D8666,}; - -q31_t rearranged_twiddle_stride3_64_q31[40]={ -0x7FFFFFFF,0x00000000,0x7A7D055B,0xDAD7F3A2,0x6A6D98A4,0xB8E31319,0x5133CC94, -0x9D0DFE54,0x30FBC54D,0x89BE50C3,0x0C8BD35E,0x809DC971,0xE70747C4,0x8275A0C0, -0xC3A94590,0x8F1D343A,0xA57D8666,0xA57D8666,0x8F1D343A,0xC3A94590,0x8275A0C0, -0xE70747C4,0x809DC971,0x0C8BD35E,0x89BE50C3,0x30FBC54D,0x9D0DFE54,0x5133CC94, -0xB8E31319,0x6A6D98A4,0xDAD7F3A2,0x7A7D055B,0x7FFFFFFF,0x00000000,0x30FBC54D, -0x89BE50C3,0xA57D8666,0xA57D8666,0x89BE50C3,0x30FBC54D,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512) - -uint32_t rearranged_twiddle_tab_stride1_arr_256_q31[4]={ -0,128,160,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_256_q31[4]={ -0,128,160,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_256_q31[4]={ -0,128,160,0,}; - -q31_t rearranged_twiddle_stride1_256_q31[168]={ -0x7FFFFFFF,0x00000000,0x7FF62182,0xFCDBD541,0x7FD8878E,0xF9B82684,0x7FA736B4, -0xF6956FB7,0x7F62368F,0xF3742CA2,0x7F0991C4,0xF054D8D5,0x7E9D55FC,0xED37EF91, -0x7E1D93EA,0xEA1DEBBB,0x7D8A5F40,0xE70747C4,0x7CE3CEB2,0xE3F47D96,0x7C29FBEE, -0xE0E60685,0x7B5D039E,0xDDDC5B3B,0x7A7D055B,0xDAD7F3A2,0x798A23B1,0xD7D946D8, -0x78848414,0xD4E0CB15,0x776C4EDB,0xD1EEF59E,0x7641AF3D,0xCF043AB3,0x7504D345, -0xCC210D79,0x73B5EBD1,0xC945DFEC,0x72552C85,0xC67322CE,0x70E2CBC6,0xC3A94590, -0x6F5F02B2,0xC0E8B648,0x6DCA0D14,0xBE31E19B,0x6C242960,0xBB8532B0,0x6A6D98A4, -0xB8E31319,0x68A69E81,0xB64BEACD,0x66CF8120,0xB3C0200C,0x64E88926,0xB140175B, -0x62F201AC,0xAECC336C,0x60EC3830,0xAC64D510,0x5ED77C8A,0xAA0A5B2E,0x5CB420E0, -0xA7BD22AC,0x5A82799A,0xA57D8666,0x5842DD54,0xA34BDF20,0x55F5A4D2,0xA1288376, -0x539B2AF0,0x9F13C7D0,0x5133CC94,0x9D0DFE54,0x4EBFE8A5,0x9B1776DA,0x4C3FDFF4, -0x99307EE0,0x49B41533,0x9759617F,0x471CECE7,0x9592675C,0x447ACD50,0x93DBD6A0, -0x41CE1E65,0x9235F2EC,0x3F1749B8,0x90A0FD4E,0x3C56BA70,0x8F1D343A,0x398CDD32, -0x8DAAD37B,0x36BA2014,0x8C4A142F,0x33DEF287,0x8AFB2CBB,0x30FBC54D,0x89BE50C3, -0x2E110A62,0x8893B125,0x2B1F34EB,0x877B7BEC,0x2826B928,0x8675DC4F,0x25280C5E, -0x8582FAA5,0x2223A4C5,0x84A2FC62,0x1F19F97B,0x83D60412,0x1C0B826A,0x831C314E, -0x18F8B83C,0x8275A0C0,0x15E21445,0x81E26C16,0x12C8106F,0x8162AA04,0x0FAB272B, -0x80F66E3C,0x0C8BD35E,0x809DC971,0x096A9049,0x8058C94C,0x0647D97C,0x80277872, -0x03242ABF,0x8009DE7E,0x7FFFFFFF,0x00000000,0x7F62368F,0xF3742CA2,0x7D8A5F40, -0xE70747C4,0x7A7D055B,0xDAD7F3A2,0x7641AF3D,0xCF043AB3,0x70E2CBC6,0xC3A94590, -0x6A6D98A4,0xB8E31319,0x62F201AC,0xAECC336C,0x5A82799A,0xA57D8666,0x5133CC94, -0x9D0DFE54,0x471CECE7,0x9592675C,0x3C56BA70,0x8F1D343A,0x30FBC54D,0x89BE50C3, -0x25280C5E,0x8582FAA5,0x18F8B83C,0x8275A0C0,0x0C8BD35E,0x809DC971,0x7FFFFFFF, -0x00000000,0x7641AF3D,0xCF043AB3,0x5A82799A,0xA57D8666,0x30FBC54D,0x89BE50C3,}; - -q31_t rearranged_twiddle_stride2_256_q31[168]={ -0x7FFFFFFF,0x00000000,0x7FD8878E,0xF9B82684,0x7F62368F,0xF3742CA2,0x7E9D55FC, -0xED37EF91,0x7D8A5F40,0xE70747C4,0x7C29FBEE,0xE0E60685,0x7A7D055B,0xDAD7F3A2, -0x78848414,0xD4E0CB15,0x7641AF3D,0xCF043AB3,0x73B5EBD1,0xC945DFEC,0x70E2CBC6, -0xC3A94590,0x6DCA0D14,0xBE31E19B,0x6A6D98A4,0xB8E31319,0x66CF8120,0xB3C0200C, -0x62F201AC,0xAECC336C,0x5ED77C8A,0xAA0A5B2E,0x5A82799A,0xA57D8666,0x55F5A4D2, -0xA1288376,0x5133CC94,0x9D0DFE54,0x4C3FDFF4,0x99307EE0,0x471CECE7,0x9592675C, -0x41CE1E65,0x9235F2EC,0x3C56BA70,0x8F1D343A,0x36BA2014,0x8C4A142F,0x30FBC54D, -0x89BE50C3,0x2B1F34EB,0x877B7BEC,0x25280C5E,0x8582FAA5,0x1F19F97B,0x83D60412, -0x18F8B83C,0x8275A0C0,0x12C8106F,0x8162AA04,0x0C8BD35E,0x809DC971,0x0647D97C, -0x80277872,0x00000000,0x80000000,0xF9B82684,0x80277872,0xF3742CA2,0x809DC971, -0xED37EF91,0x8162AA04,0xE70747C4,0x8275A0C0,0xE0E60685,0x83D60412,0xDAD7F3A2, -0x8582FAA5,0xD4E0CB15,0x877B7BEC,0xCF043AB3,0x89BE50C3,0xC945DFEC,0x8C4A142F, -0xC3A94590,0x8F1D343A,0xBE31E19B,0x9235F2EC,0xB8E31319,0x9592675C,0xB3C0200C, -0x99307EE0,0xAECC336C,0x9D0DFE54,0xAA0A5B2E,0xA1288376,0xA57D8666,0xA57D8666, -0xA1288376,0xAA0A5B2E,0x9D0DFE54,0xAECC336C,0x99307EE0,0xB3C0200C,0x9592675C, -0xB8E31319,0x9235F2EC,0xBE31E19B,0x8F1D343A,0xC3A94590,0x8C4A142F,0xC945DFEC, -0x89BE50C3,0xCF043AB3,0x877B7BEC,0xD4E0CB15,0x8582FAA5,0xDAD7F3A2,0x83D60412, -0xE0E60685,0x8275A0C0,0xE70747C4,0x8162AA04,0xED37EF91,0x809DC971,0xF3742CA2, -0x80277872,0xF9B82684,0x7FFFFFFF,0x00000000,0x7D8A5F40,0xE70747C4,0x7641AF3D, -0xCF043AB3,0x6A6D98A4,0xB8E31319,0x5A82799A,0xA57D8666,0x471CECE7,0x9592675C, -0x30FBC54D,0x89BE50C3,0x18F8B83C,0x8275A0C0,0x00000000,0x80000000,0xE70747C4, -0x8275A0C0,0xCF043AB3,0x89BE50C3,0xB8E31319,0x9592675C,0xA57D8666,0xA57D8666, -0x9592675C,0xB8E31319,0x89BE50C3,0xCF043AB3,0x8275A0C0,0xE70747C4,0x7FFFFFFF, -0x00000000,0x5A82799A,0xA57D8666,0x00000000,0x80000000,0xA57D8666,0xA57D8666,}; - -q31_t rearranged_twiddle_stride3_256_q31[168]={ -0x7FFFFFFF,0x00000000,0x7FA736B4,0xF6956FB7,0x7E9D55FC,0xED37EF91,0x7CE3CEB2, -0xE3F47D96,0x7A7D055B,0xDAD7F3A2,0x776C4EDB,0xD1EEF59E,0x73B5EBD1,0xC945DFEC, -0x6F5F02B2,0xC0E8B648,0x6A6D98A4,0xB8E31319,0x64E88926,0xB140175B,0x5ED77C8A, -0xAA0A5B2E,0x5842DD54,0xA34BDF20,0x5133CC94,0x9D0DFE54,0x49B41533,0x9759617F, -0x41CE1E65,0x9235F2EC,0x398CDD32,0x8DAAD37B,0x30FBC54D,0x89BE50C3,0x2826B928, -0x8675DC4F,0x1F19F97B,0x83D60412,0x15E21445,0x81E26C16,0x0C8BD35E,0x809DC971, -0x03242ABF,0x8009DE7E,0xF9B82684,0x80277872,0xF054D8D5,0x80F66E3C,0xE70747C4, -0x8275A0C0,0xDDDC5B3B,0x84A2FC62,0xD4E0CB15,0x877B7BEC,0xCC210D79,0x8AFB2CBB, -0xC3A94590,0x8F1D343A,0xBB8532B0,0x93DBD6A0,0xB3C0200C,0x99307EE0,0xAC64D510, -0x9F13C7D0,0xA57D8666,0xA57D8666,0x9F13C7D0,0xAC64D510,0x99307EE0,0xB3C0200C, -0x93DBD6A0,0xBB8532B0,0x8F1D343A,0xC3A94590,0x8AFB2CBB,0xCC210D79,0x877B7BEC, -0xD4E0CB15,0x84A2FC62,0xDDDC5B3B,0x8275A0C0,0xE70747C4,0x80F66E3C,0xF054D8D5, -0x80277872,0xF9B82684,0x8009DE7E,0x03242ABF,0x809DC971,0x0C8BD35E,0x81E26C16, -0x15E21445,0x83D60412,0x1F19F97B,0x8675DC4F,0x2826B928,0x89BE50C3,0x30FBC54D, -0x8DAAD37B,0x398CDD32,0x9235F2EC,0x41CE1E65,0x9759617F,0x49B41533,0x9D0DFE54, -0x5133CC94,0xA34BDF20,0x5842DD54,0xAA0A5B2E,0x5ED77C8A,0xB140175B,0x64E88926, -0xB8E31319,0x6A6D98A4,0xC0E8B648,0x6F5F02B2,0xC945DFEC,0x73B5EBD1,0xD1EEF59E, -0x776C4EDB,0xDAD7F3A2,0x7A7D055B,0xE3F47D96,0x7CE3CEB2,0xED37EF91,0x7E9D55FC, -0xF6956FB7,0x7FA736B4,0x7FFFFFFF,0x00000000,0x7A7D055B,0xDAD7F3A2,0x6A6D98A4, -0xB8E31319,0x5133CC94,0x9D0DFE54,0x30FBC54D,0x89BE50C3,0x0C8BD35E,0x809DC971, -0xE70747C4,0x8275A0C0,0xC3A94590,0x8F1D343A,0xA57D8666,0xA57D8666,0x8F1D343A, -0xC3A94590,0x8275A0C0,0xE70747C4,0x809DC971,0x0C8BD35E,0x89BE50C3,0x30FBC54D, -0x9D0DFE54,0x5133CC94,0xB8E31319,0x6A6D98A4,0xDAD7F3A2,0x7A7D055B,0x7FFFFFFF, -0x00000000,0x30FBC54D,0x89BE50C3,0xA57D8666,0xA57D8666,0x89BE50C3,0x30FBC54D,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) - -uint32_t rearranged_twiddle_tab_stride1_arr_1024_q31[5]={ -0,512,640,672,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_1024_q31[5]={ -0,512,640,672,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_1024_q31[5]={ -0,512,640,672,0,}; - -q31_t rearranged_twiddle_stride1_1024_q31[680]={ -0x7FFFFFFF,0x00000000,0x7FFF6216,0xFF36F078,0x7FFD885A,0xFE6DE2E0,0x7FFA72D1, -0xFDA4D929,0x7FF62182,0xFCDBD541,0x7FF09478,0xFC12D91A,0x7FE9CBC0,0xFB49E6A3, -0x7FE1C76B,0xFA80FFCB,0x7FD8878E,0xF9B82684,0x7FCE0C3E,0xF8EF5CBB,0x7FC25596, -0xF826A462,0x7FB563B3,0xF75DFF66,0x7FA736B4,0xF6956FB7,0x7F97CEBD,0xF5CCF743, -0x7F872BF3,0xF50497FB,0x7F754E80,0xF43C53CB,0x7F62368F,0xF3742CA2,0x7F4DE451, -0xF2AC246E,0x7F3857F6,0xF1E43D1C,0x7F2191B4,0xF11C789A,0x7F0991C4,0xF054D8D5, -0x7EF05860,0xEF8D5FB8,0x7ED5E5C6,0xEEC60F31,0x7EBA3A39,0xEDFEE92B,0x7E9D55FC, -0xED37EF91,0x7E7F3957,0xEC71244F,0x7E5FE493,0xEBAA894F,0x7E3F57FF,0xEAE4207A, -0x7E1D93EA,0xEA1DEBBB,0x7DFA98A8,0xE957ECFB,0x7DD6668F,0xE8922622,0x7DB0FDF8, -0xE7CC9917,0x7D8A5F40,0xE70747C4,0x7D628AC6,0xE642340D,0x7D3980EC,0xE57D5FDA, -0x7D0F4218,0xE4B8CD11,0x7CE3CEB2,0xE3F47D96,0x7CB72724,0xE330734D,0x7C894BDE, -0xE26CB01B,0x7C5A3D50,0xE1A935E2,0x7C29FBEE,0xE0E60685,0x7BF88830,0xE02323E5, -0x7BC5E290,0xDF608FE4,0x7B920B89,0xDE9E4C60,0x7B5D039E,0xDDDC5B3B,0x7B26CB4F, -0xDD1ABE51,0x7AEF6323,0xDC597781,0x7AB6CBA4,0xDB9888A8,0x7A7D055B,0xDAD7F3A2, -0x7A4210D8,0xDA17BA4A,0x7A05EEAD,0xD957DE7A,0x79C89F6E,0xD898620C,0x798A23B1, -0xD7D946D8,0x794A7C12,0xD71A8EB5,0x7909A92D,0xD65C3B7B,0x78C7ABA2,0xD59E4EFF, -0x78848414,0xD4E0CB15,0x78403329,0xD423B191,0x77FAB989,0xD3670446,0x77B417DF, -0xD2AAC504,0x776C4EDB,0xD1EEF59E,0x77235F2D,0xD13397E2,0x76D94989,0xD078AD9E, -0x768E0EA6,0xCFBE389F,0x7641AF3D,0xCF043AB3,0x75F42C0B,0xCE4AB5A2,0x75A585CF, -0xCD91AB39,0x7555BD4C,0xCCD91D3D,0x7504D345,0xCC210D79,0x74B2C884,0xCB697DB0, -0x745F9DD1,0xCAB26FA9,0x740B53FB,0xC9FBE527,0x73B5EBD1,0xC945DFEC,0x735F6626, -0xC89061BA,0x7307C3D0,0xC7DB6C50,0x72AF05A7,0xC727016D,0x72552C85,0xC67322CE, -0x71FA3949,0xC5BFD22E,0x719E2CD2,0xC50D1149,0x71410805,0xC45AE1D7,0x70E2CBC6, -0xC3A94590,0x708378FF,0xC2F83E2A,0x7023109A,0xC247CD5A,0x6FC19385,0xC197F4D4, -0x6F5F02B2,0xC0E8B648,0x6EFB5F12,0xC03A1368,0x6E96A99D,0xBF8C0DE3,0x6E30E34A, -0xBEDEA765,0x6DCA0D14,0xBE31E19B,0x6D6227FA,0xBD85BE30,0x6CF934FC,0xBCDA3ECB, -0x6C8F351C,0xBC2F6513,0x6C242960,0xBB8532B0,0x6BB812D1,0xBADBA943,0x6B4AF279, -0xBA32CA71,0x6ADCC964,0xB98A97D8,0x6A6D98A4,0xB8E31319,0x69FD614A,0xB83C3DD1, -0x698C246C,0xB796199B,0x6919E320,0xB6F0A812,0x68A69E81,0xB64BEACD,0x683257AB, -0xB5A7E362,0x67BD0FBD,0xB5049368,0x6746C7D8,0xB461FC70,0x66CF8120,0xB3C0200C, -0x66573CBB,0xB31EFFCC,0x65DDFBD3,0xB27E9D3C,0x6563BF92,0xB1DEF9E9,0x64E88926, -0xB140175B,0x646C59BF,0xB0A1F71D,0x63EF3290,0xB0049AB3,0x637114CC,0xAF6803A2, -0x62F201AC,0xAECC336C,0x6271FA69,0xAE312B92,0x61F1003F,0xAD96ED92,0x616F146C, -0xACFD7AE8,0x60EC3830,0xAC64D510,0x60686CCF,0xABCCFD83,0x5FE3B38D,0xAB35F5B5, -0x5F5E0DB3,0xAA9FBF1E,0x5ED77C8A,0xAA0A5B2E,0x5E50015D,0xA975CB57,0x5DC79D7C, -0xA8E21106,0x5D3E5237,0xA84F2DAA,0x5CB420E0,0xA7BD22AC,0x5C290ACC,0xA72BF174, -0x5B9D1154,0xA69B9B68,0x5B1035CF,0xA60C21EE,0x5A82799A,0xA57D8666,0x59F3DE12, -0xA4EFCA31,0x59646498,0xA462EEAC,0x58D40E8C,0xA3D6F534,0x5842DD54,0xA34BDF20, -0x57B0D256,0xA2C1ADC9,0x571DEEFA,0xA2386284,0x568A34A9,0xA1AFFEA3,0x55F5A4D2, -0xA1288376,0x556040E2,0xA0A1F24D,0x54CA0A4B,0xA01C4C73,0x5433027D,0x9F979331, -0x539B2AF0,0x9F13C7D0,0x53028518,0x9E90EB94,0x5269126E,0x9E0EFFC1,0x51CED46E, -0x9D8E0597,0x5133CC94,0x9D0DFE54,0x5097FC5E,0x9C8EEB34,0x4FFB654D,0x9C10CD70, -0x4F5E08E3,0x9B93A641,0x4EBFE8A5,0x9B1776DA,0x4E210617,0x9A9C406E,0x4D8162C4, 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-0x812A1A3A,0x1072A048,0x810FA7A0,0x0FAB272B,0x80F66E3C,0x0EE38766,0x80DE6E4C, -0x0E1BC2E4,0x80C7A80A,0x0D53DB92,0x80B21BAF,0x0C8BD35E,0x809DC971,0x0BC3AC35, -0x808AB180,0x0AFB6805,0x8078D40D,0x0A3308BD,0x80683143,0x096A9049,0x8058C94C, -0x08A2009A,0x804A9C4D,0x07D95B9E,0x803DAA6A,0x0710A345,0x8031F3C2,0x0647D97C, -0x80277872,0x057F0035,0x801E3895,0x04B6195D,0x80163440,0x03ED26E6,0x800F6B88, -0x03242ABF,0x8009DE7E,0x025B26D7,0x80058D2F,0x01921D20,0x800277A6,0x00C90F88, -0x80009DEA,0x7FFFFFFF,0x00000000,0x7FF62182,0xFCDBD541,0x7FD8878E,0xF9B82684, -0x7FA736B4,0xF6956FB7,0x7F62368F,0xF3742CA2,0x7F0991C4,0xF054D8D5,0x7E9D55FC, -0xED37EF91,0x7E1D93EA,0xEA1DEBBB,0x7D8A5F40,0xE70747C4,0x7CE3CEB2,0xE3F47D96, -0x7C29FBEE,0xE0E60685,0x7B5D039E,0xDDDC5B3B,0x7A7D055B,0xDAD7F3A2,0x798A23B1, -0xD7D946D8,0x78848414,0xD4E0CB15,0x776C4EDB,0xD1EEF59E,0x7641AF3D,0xCF043AB3, -0x7504D345,0xCC210D79,0x73B5EBD1,0xC945DFEC,0x72552C85,0xC67322CE,0x70E2CBC6, -0xC3A94590,0x6F5F02B2,0xC0E8B648,0x6DCA0D14,0xBE31E19B,0x6C242960,0xBB8532B0, -0x6A6D98A4,0xB8E31319,0x68A69E81,0xB64BEACD,0x66CF8120,0xB3C0200C,0x64E88926, -0xB140175B,0x62F201AC,0xAECC336C,0x60EC3830,0xAC64D510,0x5ED77C8A,0xAA0A5B2E, -0x5CB420E0,0xA7BD22AC,0x5A82799A,0xA57D8666,0x5842DD54,0xA34BDF20,0x55F5A4D2, -0xA1288376,0x539B2AF0,0x9F13C7D0,0x5133CC94,0x9D0DFE54,0x4EBFE8A5,0x9B1776DA, -0x4C3FDFF4,0x99307EE0,0x49B41533,0x9759617F,0x471CECE7,0x9592675C,0x447ACD50, -0x93DBD6A0,0x41CE1E65,0x9235F2EC,0x3F1749B8,0x90A0FD4E,0x3C56BA70,0x8F1D343A, -0x398CDD32,0x8DAAD37B,0x36BA2014,0x8C4A142F,0x33DEF287,0x8AFB2CBB,0x30FBC54D, -0x89BE50C3,0x2E110A62,0x8893B125,0x2B1F34EB,0x877B7BEC,0x2826B928,0x8675DC4F, -0x25280C5E,0x8582FAA5,0x2223A4C5,0x84A2FC62,0x1F19F97B,0x83D60412,0x1C0B826A, -0x831C314E,0x18F8B83C,0x8275A0C0,0x15E21445,0x81E26C16,0x12C8106F,0x8162AA04, -0x0FAB272B,0x80F66E3C,0x0C8BD35E,0x809DC971,0x096A9049,0x8058C94C,0x0647D97C, -0x80277872,0x03242ABF,0x8009DE7E,0x7FFFFFFF,0x00000000,0x7F62368F,0xF3742CA2, -0x7D8A5F40,0xE70747C4,0x7A7D055B,0xDAD7F3A2,0x7641AF3D,0xCF043AB3,0x70E2CBC6, -0xC3A94590,0x6A6D98A4,0xB8E31319,0x62F201AC,0xAECC336C,0x5A82799A,0xA57D8666, -0x5133CC94,0x9D0DFE54,0x471CECE7,0x9592675C,0x3C56BA70,0x8F1D343A,0x30FBC54D, -0x89BE50C3,0x25280C5E,0x8582FAA5,0x18F8B83C,0x8275A0C0,0x0C8BD35E,0x809DC971, -0x7FFFFFFF,0x00000000,0x7641AF3D,0xCF043AB3,0x5A82799A,0xA57D8666,0x30FBC54D, -0x89BE50C3,}; - -q31_t rearranged_twiddle_stride2_1024_q31[680]={ -0x7FFFFFFF,0x00000000,0x7FFD885A,0xFE6DE2E0,0x7FF62182,0xFCDBD541,0x7FE9CBC0, -0xFB49E6A3,0x7FD8878E,0xF9B82684,0x7FC25596,0xF826A462,0x7FA736B4,0xF6956FB7, -0x7F872BF3,0xF50497FB,0x7F62368F,0xF3742CA2,0x7F3857F6,0xF1E43D1C,0x7F0991C4, -0xF054D8D5,0x7ED5E5C6,0xEEC60F31,0x7E9D55FC,0xED37EF91,0x7E5FE493,0xEBAA894F, -0x7E1D93EA,0xEA1DEBBB,0x7DD6668F,0xE8922622,0x7D8A5F40,0xE70747C4,0x7D3980EC, -0xE57D5FDA,0x7CE3CEB2,0xE3F47D96,0x7C894BDE,0xE26CB01B,0x7C29FBEE,0xE0E60685, -0x7BC5E290,0xDF608FE4,0x7B5D039E,0xDDDC5B3B,0x7AEF6323,0xDC597781,0x7A7D055B, -0xDAD7F3A2,0x7A05EEAD,0xD957DE7A,0x798A23B1,0xD7D946D8,0x7909A92D,0xD65C3B7B, -0x78848414,0xD4E0CB15,0x77FAB989,0xD3670446,0x776C4EDB,0xD1EEF59E,0x76D94989, -0xD078AD9E,0x7641AF3D,0xCF043AB3,0x75A585CF,0xCD91AB39,0x7504D345,0xCC210D79, -0x745F9DD1,0xCAB26FA9,0x73B5EBD1,0xC945DFEC,0x7307C3D0,0xC7DB6C50,0x72552C85, -0xC67322CE,0x719E2CD2,0xC50D1149,0x70E2CBC6,0xC3A94590,0x7023109A,0xC247CD5A, -0x6F5F02B2,0xC0E8B648,0x6E96A99D,0xBF8C0DE3,0x6DCA0D14,0xBE31E19B,0x6CF934FC, -0xBCDA3ECB,0x6C242960,0xBB8532B0,0x6B4AF279,0xBA32CA71,0x6A6D98A4,0xB8E31319, -0x698C246C,0xB796199B,0x68A69E81,0xB64BEACD,0x67BD0FBD,0xB5049368,0x66CF8120, -0xB3C0200C,0x65DDFBD3,0xB27E9D3C,0x64E88926,0xB140175B,0x63EF3290,0xB0049AB3, -0x62F201AC,0xAECC336C,0x61F1003F,0xAD96ED92,0x60EC3830,0xAC64D510,0x5FE3B38D, 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-0x82299971,0xE70747C4,0x8275A0C0,0xE57D5FDA,0x82C67F14,0xE3F47D96,0x831C314E, -0xE26CB01B,0x8376B422,0xE0E60685,0x83D60412,0xDF608FE4,0x843A1D70,0xDDDC5B3B, -0x84A2FC62,0xDC597781,0x85109CDD,0xDAD7F3A2,0x8582FAA5,0xD957DE7A,0x85FA1153, -0xD7D946D8,0x8675DC4F,0xD65C3B7B,0x86F656D3,0xD4E0CB15,0x877B7BEC,0xD3670446, -0x88054677,0xD1EEF59E,0x8893B125,0xD078AD9E,0x8926B677,0xCF043AB3,0x89BE50C3, -0xCD91AB39,0x8A5A7A31,0xCC210D79,0x8AFB2CBB,0xCAB26FA9,0x8BA0622F,0xC945DFEC, -0x8C4A142F,0xC7DB6C50,0x8CF83C30,0xC67322CE,0x8DAAD37B,0xC50D1149,0x8E61D32E, -0xC3A94590,0x8F1D343A,0xC247CD5A,0x8FDCEF66,0xC0E8B648,0x90A0FD4E,0xBF8C0DE3, -0x91695663,0xBE31E19B,0x9235F2EC,0xBCDA3ECB,0x9306CB04,0xBB8532B0,0x93DBD6A0, -0xBA32CA71,0x94B50D87,0xB8E31319,0x9592675C,0xB796199B,0x9673DB94,0xB64BEACD, -0x9759617F,0xB5049368,0x9842F043,0xB3C0200C,0x99307EE0,0xB27E9D3C,0x9A22042D, -0xB140175B,0x9B1776DA,0xB0049AB3,0x9C10CD70,0xAECC336C,0x9D0DFE54,0xAD96ED92, -0x9E0EFFC1,0xAC64D510,0x9F13C7D0,0xAB35F5B5,0xA01C4C73,0xAA0A5B2E,0xA1288376, -0xA8E21106,0xA2386284,0xA7BD22AC,0xA34BDF20,0xA69B9B68,0xA462EEAC,0xA57D8666, -0xA57D8666,0xA462EEAC,0xA69B9B68,0xA34BDF20,0xA7BD22AC,0xA2386284,0xA8E21106, -0xA1288376,0xAA0A5B2E,0xA01C4C73,0xAB35F5B5,0x9F13C7D0,0xAC64D510,0x9E0EFFC1, -0xAD96ED92,0x9D0DFE54,0xAECC336C,0x9C10CD70,0xB0049AB3,0x9B1776DA,0xB140175B, -0x9A22042D,0xB27E9D3C,0x99307EE0,0xB3C0200C,0x9842F043,0xB5049368,0x9759617F, -0xB64BEACD,0x9673DB94,0xB796199B,0x9592675C,0xB8E31319,0x94B50D87,0xBA32CA71, -0x93DBD6A0,0xBB8532B0,0x9306CB04,0xBCDA3ECB,0x9235F2EC,0xBE31E19B,0x91695663, -0xBF8C0DE3,0x90A0FD4E,0xC0E8B648,0x8FDCEF66,0xC247CD5A,0x8F1D343A,0xC3A94590, -0x8E61D32E,0xC50D1149,0x8DAAD37B,0xC67322CE,0x8CF83C30,0xC7DB6C50,0x8C4A142F, -0xC945DFEC,0x8BA0622F,0xCAB26FA9,0x8AFB2CBB,0xCC210D79,0x8A5A7A31,0xCD91AB39, -0x89BE50C3,0xCF043AB3,0x8926B677,0xD078AD9E,0x8893B125,0xD1EEF59E,0x88054677, -0xD3670446,0x877B7BEC,0xD4E0CB15,0x86F656D3,0xD65C3B7B,0x8675DC4F,0xD7D946D8, -0x85FA1153,0xD957DE7A,0x8582FAA5,0xDAD7F3A2,0x85109CDD,0xDC597781,0x84A2FC62, -0xDDDC5B3B,0x843A1D70,0xDF608FE4,0x83D60412,0xE0E60685,0x8376B422,0xE26CB01B, -0x831C314E,0xE3F47D96,0x82C67F14,0xE57D5FDA,0x8275A0C0,0xE70747C4,0x82299971, -0xE8922622,0x81E26C16,0xEA1DEBBB,0x81A01B6D,0xEBAA894F,0x8162AA04,0xED37EF91, -0x812A1A3A,0xEEC60F31,0x80F66E3C,0xF054D8D5,0x80C7A80A,0xF1E43D1C,0x809DC971, -0xF3742CA2,0x8078D40D,0xF50497FB,0x8058C94C,0xF6956FB7,0x803DAA6A,0xF826A462, -0x80277872,0xF9B82684,0x80163440,0xFB49E6A3,0x8009DE7E,0xFCDBD541,0x800277A6, -0xFE6DE2E0,0x7FFFFFFF,0x00000000,0x7FD8878E,0xF9B82684,0x7F62368F,0xF3742CA2, -0x7E9D55FC,0xED37EF91,0x7D8A5F40,0xE70747C4,0x7C29FBEE,0xE0E60685,0x7A7D055B, -0xDAD7F3A2,0x78848414,0xD4E0CB15,0x7641AF3D,0xCF043AB3,0x73B5EBD1,0xC945DFEC, -0x70E2CBC6,0xC3A94590,0x6DCA0D14,0xBE31E19B,0x6A6D98A4,0xB8E31319,0x66CF8120, -0xB3C0200C,0x62F201AC,0xAECC336C,0x5ED77C8A,0xAA0A5B2E,0x5A82799A,0xA57D8666, -0x55F5A4D2,0xA1288376,0x5133CC94,0x9D0DFE54,0x4C3FDFF4,0x99307EE0,0x471CECE7, -0x9592675C,0x41CE1E65,0x9235F2EC,0x3C56BA70,0x8F1D343A,0x36BA2014,0x8C4A142F, -0x30FBC54D,0x89BE50C3,0x2B1F34EB,0x877B7BEC,0x25280C5E,0x8582FAA5,0x1F19F97B, -0x83D60412,0x18F8B83C,0x8275A0C0,0x12C8106F,0x8162AA04,0x0C8BD35E,0x809DC971, -0x0647D97C,0x80277872,0x00000000,0x80000000,0xF9B82684,0x80277872,0xF3742CA2, -0x809DC971,0xED37EF91,0x8162AA04,0xE70747C4,0x8275A0C0,0xE0E60685,0x83D60412, -0xDAD7F3A2,0x8582FAA5,0xD4E0CB15,0x877B7BEC,0xCF043AB3,0x89BE50C3,0xC945DFEC, -0x8C4A142F,0xC3A94590,0x8F1D343A,0xBE31E19B,0x9235F2EC,0xB8E31319,0x9592675C, -0xB3C0200C,0x99307EE0,0xAECC336C,0x9D0DFE54,0xAA0A5B2E,0xA1288376,0xA57D8666, -0xA57D8666,0xA1288376,0xAA0A5B2E,0x9D0DFE54,0xAECC336C,0x99307EE0,0xB3C0200C, -0x9592675C,0xB8E31319,0x9235F2EC,0xBE31E19B,0x8F1D343A,0xC3A94590,0x8C4A142F, -0xC945DFEC,0x89BE50C3,0xCF043AB3,0x877B7BEC,0xD4E0CB15,0x8582FAA5,0xDAD7F3A2, -0x83D60412,0xE0E60685,0x8275A0C0,0xE70747C4,0x8162AA04,0xED37EF91,0x809DC971, -0xF3742CA2,0x80277872,0xF9B82684,0x7FFFFFFF,0x00000000,0x7D8A5F40,0xE70747C4, -0x7641AF3D,0xCF043AB3,0x6A6D98A4,0xB8E31319,0x5A82799A,0xA57D8666,0x471CECE7, -0x9592675C,0x30FBC54D,0x89BE50C3,0x18F8B83C,0x8275A0C0,0x00000000,0x80000000, -0xE70747C4,0x8275A0C0,0xCF043AB3,0x89BE50C3,0xB8E31319,0x9592675C,0xA57D8666, -0xA57D8666,0x9592675C,0xB8E31319,0x89BE50C3,0xCF043AB3,0x8275A0C0,0xE70747C4, -0x7FFFFFFF,0x00000000,0x5A82799A,0xA57D8666,0x00000000,0x80000000,0xA57D8666, -0xA57D8666,}; - -q31_t rearranged_twiddle_stride3_1024_q31[680]={ -0x7FFFFFFF,0x00000000,0x7FFA72D1,0xFDA4D929,0x7FE9CBC0,0xFB49E6A3,0x7FCE0C3E, -0xF8EF5CBB,0x7FA736B4,0xF6956FB7,0x7F754E80,0xF43C53CB,0x7F3857F6,0xF1E43D1C, -0x7EF05860,0xEF8D5FB8,0x7E9D55FC,0xED37EF91,0x7E3F57FF,0xEAE4207A,0x7DD6668F, -0xE8922622,0x7D628AC6,0xE642340D,0x7CE3CEB2,0xE3F47D96,0x7C5A3D50,0xE1A935E2, -0x7BC5E290,0xDF608FE4,0x7B26CB4F,0xDD1ABE51,0x7A7D055B,0xDAD7F3A2,0x79C89F6E, -0xD898620C,0x7909A92D,0xD65C3B7B,0x78403329,0xD423B191,0x776C4EDB,0xD1EEF59E, -0x768E0EA6,0xCFBE389F,0x75A585CF,0xCD91AB39,0x74B2C884,0xCB697DB0,0x73B5EBD1, -0xC945DFEC,0x72AF05A7,0xC727016D,0x719E2CD2,0xC50D1149,0x708378FF,0xC2F83E2A, -0x6F5F02B2,0xC0E8B648,0x6E30E34A,0xBEDEA765,0x6CF934FC,0xBCDA3ECB,0x6BB812D1, -0xBADBA943,0x6A6D98A4,0xB8E31319,0x6919E320,0xB6F0A812,0x67BD0FBD,0xB5049368, -0x66573CBB,0xB31EFFCC,0x64E88926,0xB140175B,0x637114CC,0xAF6803A2,0x61F1003F, -0xAD96ED92,0x60686CCF,0xABCCFD83,0x5ED77C8A,0xAA0A5B2E,0x5D3E5237,0xA84F2DAA, -0x5B9D1154,0xA69B9B68,0x59F3DE12,0xA4EFCA31,0x5842DD54,0xA34BDF20,0x568A34A9, -0xA1AFFEA3,0x54CA0A4B,0xA01C4C73,0x53028518,0x9E90EB94,0x5133CC94,0x9D0DFE54, -0x4F5E08E3,0x9B93A641,0x4D8162C4,0x9A22042D,0x4B9E0390,0x98B93828,0x49B41533, -0x9759617F,0x47C3C22F,0x96029EB6,0x45CD358F,0x94B50D87,0x43D09AED,0x9370CAE4, -0x41CE1E65,0x9235F2EC,0x3FC5EC98,0x9104A0EE,0x3DB832A6,0x8FDCEF66,0x3BA51E29, -0x8EBEF7FB,0x398CDD32,0x8DAAD37B,0x376F9E46,0x8CA099DA,0x354D9057,0x8BA0622F, -0x3326E2C3,0x8AAA42B4,0x30FBC54D,0x89BE50C3,0x2ECC681E,0x88DCA0D3,0x2C98FBBA, -0x88054677,0x2A61B101,0x8738545E,0x2826B928,0x8675DC4F,0x25E845B6,0x85BDEF28, -0x23A6887F,0x85109CDD,0x2161B3A0,0x846DF477,0x1F19F97B,0x83D60412,0x1CCF8CB3, -0x8348D8DC,0x1A82A026,0x82C67F14,0x183366E9,0x824F0208,0x15E21445,0x81E26C16, -0x138EDBB1,0x8180C6A9,0x1139F0CF,0x812A1A3A,0x0EE38766,0x80DE6E4C,0x0C8BD35E, -0x809DC971,0x0A3308BD,0x80683143,0x07D95B9E,0x803DAA6A,0x057F0035,0x801E3895, -0x03242ABF,0x8009DE7E,0x00C90F88,0x80009DEA,0xFE6DE2E0,0x800277A6,0xFC12D91A, -0x800F6B88,0xF9B82684,0x80277872,0xF75DFF66,0x804A9C4D,0xF50497FB,0x8078D40D, -0xF2AC246E,0x80B21BAF,0xF054D8D5,0x80F66E3C,0xEDFEE92B,0x8145C5C7,0xEBAA894F, -0x81A01B6D,0xE957ECFB,0x82056758,0xE70747C4,0x8275A0C0,0xE4B8CD11,0x82F0BDE8, -0xE26CB01B,0x8376B422,0xE02323E5,0x840777D0,0xDDDC5B3B,0x84A2FC62,0xDB9888A8, -0x8549345C,0xD957DE7A,0x85FA1153,0xD71A8EB5,0x86B583EE,0xD4E0CB15,0x877B7BEC, -0xD2AAC504,0x884BE821,0xD078AD9E,0x8926B677,0xCE4AB5A2,0x8A0BD3F5,0xCC210D79, -0x8AFB2CBB,0xC9FBE527,0x8BF4AC05,0xC7DB6C50,0x8CF83C30,0xC5BFD22E,0x8E05C6B7, -0xC3A94590,0x8F1D343A,0xC197F4D4,0x903E6C7B,0xBF8C0DE3,0x91695663,0xBD85BE30, -0x929DD806,0xBB8532B0,0x93DBD6A0,0xB98A97D8,0x9523369C,0xB796199B,0x9673DB94, -0xB5A7E362,0x97CDA855,0xB3C0200C,0x99307EE0,0xB1DEF9E9,0x9A9C406E,0xB0049AB3, -0x9C10CD70,0xAE312B92,0x9D8E0597,0xAC64D510,0x9F13C7D0,0xAA9FBF1E,0xA0A1F24D, -0xA8E21106,0xA2386284,0xA72BF174,0xA3D6F534,0xA57D8666,0xA57D8666,0xA3D6F534, -0xA72BF174,0xA2386284,0xA8E21106,0xA0A1F24D,0xAA9FBF1E,0x9F13C7D0,0xAC64D510, -0x9D8E0597,0xAE312B92,0x9C10CD70,0xB0049AB3,0x9A9C406E,0xB1DEF9E9,0x99307EE0, -0xB3C0200C,0x97CDA855,0xB5A7E362,0x9673DB94,0xB796199B,0x9523369C,0xB98A97D8, -0x93DBD6A0,0xBB8532B0,0x929DD806,0xBD85BE30,0x91695663,0xBF8C0DE3,0x903E6C7B, -0xC197F4D4,0x8F1D343A,0xC3A94590,0x8E05C6B7,0xC5BFD22E,0x8CF83C30,0xC7DB6C50, -0x8BF4AC05,0xC9FBE527,0x8AFB2CBB,0xCC210D79,0x8A0BD3F5,0xCE4AB5A2,0x8926B677, -0xD078AD9E,0x884BE821,0xD2AAC504,0x877B7BEC,0xD4E0CB15,0x86B583EE,0xD71A8EB5, -0x85FA1153,0xD957DE7A,0x8549345C,0xDB9888A8,0x84A2FC62,0xDDDC5B3B,0x840777D0, -0xE02323E5,0x8376B422,0xE26CB01B,0x82F0BDE8,0xE4B8CD11,0x8275A0C0,0xE70747C4, -0x82056758,0xE957ECFB,0x81A01B6D,0xEBAA894F,0x8145C5C7,0xEDFEE92B,0x80F66E3C, -0xF054D8D5,0x80B21BAF,0xF2AC246E,0x8078D40D,0xF50497FB,0x804A9C4D,0xF75DFF66, -0x80277872,0xF9B82684,0x800F6B88,0xFC12D91A,0x800277A6,0xFE6DE2E0,0x80009DEA, -0x00C90F88,0x8009DE7E,0x03242ABF,0x801E3895,0x057F0035,0x803DAA6A,0x07D95B9E, -0x80683143,0x0A3308BD,0x809DC971,0x0C8BD35E,0x80DE6E4C,0x0EE38766,0x812A1A3A, -0x1139F0CF,0x8180C6A9,0x138EDBB1,0x81E26C16,0x15E21445,0x824F0208,0x183366E9, -0x82C67F14,0x1A82A026,0x8348D8DC,0x1CCF8CB3,0x83D60412,0x1F19F97B,0x846DF477, -0x2161B3A0,0x85109CDD,0x23A6887F,0x85BDEF28,0x25E845B6,0x8675DC4F,0x2826B928, -0x8738545E,0x2A61B101,0x88054677,0x2C98FBBA,0x88DCA0D3,0x2ECC681E,0x89BE50C3, -0x30FBC54D,0x8AAA42B4,0x3326E2C3,0x8BA0622F,0x354D9057,0x8CA099DA,0x376F9E46, -0x8DAAD37B,0x398CDD32,0x8EBEF7FB,0x3BA51E29,0x8FDCEF66,0x3DB832A6,0x9104A0EE, -0x3FC5EC98,0x9235F2EC,0x41CE1E65,0x9370CAE4,0x43D09AED,0x94B50D87,0x45CD358F, -0x96029EB6,0x47C3C22F,0x9759617F,0x49B41533,0x98B93828,0x4B9E0390,0x9A22042D, -0x4D8162C4,0x9B93A641,0x4F5E08E3,0x9D0DFE54,0x5133CC94,0x9E90EB94,0x53028518, -0xA01C4C73,0x54CA0A4B,0xA1AFFEA3,0x568A34A9,0xA34BDF20,0x5842DD54,0xA4EFCA31, -0x59F3DE12,0xA69B9B68,0x5B9D1154,0xA84F2DAA,0x5D3E5237,0xAA0A5B2E,0x5ED77C8A, -0xABCCFD83,0x60686CCF,0xAD96ED92,0x61F1003F,0xAF6803A2,0x637114CC,0xB140175B, -0x64E88926,0xB31EFFCC,0x66573CBB,0xB5049368,0x67BD0FBD,0xB6F0A812,0x6919E320, -0xB8E31319,0x6A6D98A4,0xBADBA943,0x6BB812D1,0xBCDA3ECB,0x6CF934FC,0xBEDEA765, -0x6E30E34A,0xC0E8B648,0x6F5F02B2,0xC2F83E2A,0x708378FF,0xC50D1149,0x719E2CD2, -0xC727016D,0x72AF05A7,0xC945DFEC,0x73B5EBD1,0xCB697DB0,0x74B2C884,0xCD91AB39, -0x75A585CF,0xCFBE389F,0x768E0EA6,0xD1EEF59E,0x776C4EDB,0xD423B191,0x78403329, -0xD65C3B7B,0x7909A92D,0xD898620C,0x79C89F6E,0xDAD7F3A2,0x7A7D055B,0xDD1ABE51, -0x7B26CB4F,0xDF608FE4,0x7BC5E290,0xE1A935E2,0x7C5A3D50,0xE3F47D96,0x7CE3CEB2, -0xE642340D,0x7D628AC6,0xE8922622,0x7DD6668F,0xEAE4207A,0x7E3F57FF,0xED37EF91, -0x7E9D55FC,0xEF8D5FB8,0x7EF05860,0xF1E43D1C,0x7F3857F6,0xF43C53CB,0x7F754E80, -0xF6956FB7,0x7FA736B4,0xF8EF5CBB,0x7FCE0C3E,0xFB49E6A3,0x7FE9CBC0,0xFDA4D929, -0x7FFA72D1,0x7FFFFFFF,0x00000000,0x7FA736B4,0xF6956FB7,0x7E9D55FC,0xED37EF91, -0x7CE3CEB2,0xE3F47D96,0x7A7D055B,0xDAD7F3A2,0x776C4EDB,0xD1EEF59E,0x73B5EBD1, -0xC945DFEC,0x6F5F02B2,0xC0E8B648,0x6A6D98A4,0xB8E31319,0x64E88926,0xB140175B, -0x5ED77C8A,0xAA0A5B2E,0x5842DD54,0xA34BDF20,0x5133CC94,0x9D0DFE54,0x49B41533, -0x9759617F,0x41CE1E65,0x9235F2EC,0x398CDD32,0x8DAAD37B,0x30FBC54D,0x89BE50C3, -0x2826B928,0x8675DC4F,0x1F19F97B,0x83D60412,0x15E21445,0x81E26C16,0x0C8BD35E, -0x809DC971,0x03242ABF,0x8009DE7E,0xF9B82684,0x80277872,0xF054D8D5,0x80F66E3C, -0xE70747C4,0x8275A0C0,0xDDDC5B3B,0x84A2FC62,0xD4E0CB15,0x877B7BEC,0xCC210D79, -0x8AFB2CBB,0xC3A94590,0x8F1D343A,0xBB8532B0,0x93DBD6A0,0xB3C0200C,0x99307EE0, -0xAC64D510,0x9F13C7D0,0xA57D8666,0xA57D8666,0x9F13C7D0,0xAC64D510,0x99307EE0, -0xB3C0200C,0x93DBD6A0,0xBB8532B0,0x8F1D343A,0xC3A94590,0x8AFB2CBB,0xCC210D79, -0x877B7BEC,0xD4E0CB15,0x84A2FC62,0xDDDC5B3B,0x8275A0C0,0xE70747C4,0x80F66E3C, -0xF054D8D5,0x80277872,0xF9B82684,0x8009DE7E,0x03242ABF,0x809DC971,0x0C8BD35E, -0x81E26C16,0x15E21445,0x83D60412,0x1F19F97B,0x8675DC4F,0x2826B928,0x89BE50C3, -0x30FBC54D,0x8DAAD37B,0x398CDD32,0x9235F2EC,0x41CE1E65,0x9759617F,0x49B41533, -0x9D0DFE54,0x5133CC94,0xA34BDF20,0x5842DD54,0xAA0A5B2E,0x5ED77C8A,0xB140175B, -0x64E88926,0xB8E31319,0x6A6D98A4,0xC0E8B648,0x6F5F02B2,0xC945DFEC,0x73B5EBD1, -0xD1EEF59E,0x776C4EDB,0xDAD7F3A2,0x7A7D055B,0xE3F47D96,0x7CE3CEB2,0xED37EF91, -0x7E9D55FC,0xF6956FB7,0x7FA736B4,0x7FFFFFFF,0x00000000,0x7A7D055B,0xDAD7F3A2, -0x6A6D98A4,0xB8E31319,0x5133CC94,0x9D0DFE54,0x30FBC54D,0x89BE50C3,0x0C8BD35E, -0x809DC971,0xE70747C4,0x8275A0C0,0xC3A94590,0x8F1D343A,0xA57D8666,0xA57D8666, -0x8F1D343A,0xC3A94590,0x8275A0C0,0xE70747C4,0x809DC971,0x0C8BD35E,0x89BE50C3, -0x30FBC54D,0x9D0DFE54,0x5133CC94,0xB8E31319,0x6A6D98A4,0xDAD7F3A2,0x7A7D055B, -0x7FFFFFFF,0x00000000,0x30FBC54D,0x89BE50C3,0xA57D8666,0xA57D8666,0x89BE50C3, -0x30FBC54D,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q31_8192) - -uint32_t rearranged_twiddle_tab_stride1_arr_4096_q31[6]={ -0,2048,2560,2688,2720,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_4096_q31[6]={ -0,2048,2560,2688,2720,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_4096_q31[6]={ -0,2048,2560,2688,2720,0,}; - -q31_t rearranged_twiddle_stride1_4096_q31[2728]={ -0x7FFFFFFF,0x00000000,0x7FFFF621,0xFFCDBC0B,0x7FFFD886,0xFF9B781D,0x7FFFA72C, -0xFF69343F,0x7FFF6216,0xFF36F078,0x7FFF0943,0xFF04ACD0,0x7FFE9CB2,0xFED2694F, -0x7FFE1C65,0xFEA025FD,0x7FFD885A,0xFE6DE2E0,0x7FFCE093,0xFE3BA002,0x7FFC250F, -0xFE095D69,0x7FFB55CE,0xFDD71B1E,0x7FFA72D1,0xFDA4D929,0x7FF97C18,0xFD729790, -0x7FF871A2,0xFD40565C,0x7FF75370,0xFD0E1594,0x7FF62182,0xFCDBD541,0x7FF4DBD9, -0xFCA9956A,0x7FF38274,0xFC775616,0x7FF21553,0xFC45174E,0x7FF09478,0xFC12D91A, -0x7FEEFFE1,0xFBE09B80,0x7FED5791,0xFBAE5E89,0x7FEB9B85,0xFB7C223D,0x7FE9CBC0, -0xFB49E6A3,0x7FE7E841,0xFB17ABC2,0x7FE5F108,0xFAE571A4,0x7FE3E616,0xFAB3384F, -0x7FE1C76B,0xFA80FFCB,0x7FDF9508,0xFA4EC821,0x7FDD4EEC,0xFA1C9157,0x7FDAF519, -0xF9EA5B75,0x7FD8878E,0xF9B82684,0x7FD6064C,0xF985F28A,0x7FD37153,0xF953BF91, -0x7FD0C8A3,0xF9218D9E,0x7FCE0C3E,0xF8EF5CBB,0x7FCB3C23,0xF8BD2CEF,0x7FC85854, -0xF88AFE42,0x7FC560CF,0xF858D0BB,0x7FC25596,0xF826A462,0x7FBF36AA,0xF7F4793E, -0x7FBC040A,0xF7C24F59,0x7FB8BDB8,0xF79026B9,0x7FB563B3,0xF75DFF66,0x7FB1F5FC, -0xF72BD967,0x7FAE7495,0xF6F9B4C6,0x7FAADF7C,0xF6C79188,0x7FA736B4,0xF6956FB7, -0x7FA37A3C,0xF6634F59,0x7F9FAA15,0xF6313077,0x7F9BC640,0xF5FF1318,0x7F97CEBD, -0xF5CCF743,0x7F93C38C,0xF59ADD02,0x7F8FA4B0,0xF568C45B,0x7F8B7227,0xF536AD56, -0x7F872BF3,0xF50497FB,0x7F82D214,0xF4D28451,0x7F7E648C,0xF4A07261,0x7F79E35A, -0xF46E6231,0x7F754E80,0xF43C53CB,0x7F70A5FE,0xF40A4735,0x7F6BE9D4,0xF3D83C77, -0x7F671A05,0xF3A63398,0x7F62368F,0xF3742CA2,0x7F5D3F75,0xF342279B,0x7F5834B7, -0xF310248A,0x7F531655,0xF2DE2379,0x7F4DE451,0xF2AC246E,0x7F489EAA,0xF27A2771, -0x7F434563,0xF2482C8A,0x7F3DD87C,0xF21633C0,0x7F3857F6,0xF1E43D1C,0x7F32C3D1, -0xF1B248A5,0x7F2D1C0E,0xF1805662,0x7F2760AF,0xF14E665C,0x7F2191B4,0xF11C789A, -0x7F1BAF1E,0xF0EA8D24,0x7F15B8EE,0xF0B8A401,0x7F0FAF25,0xF086BD39,0x7F0991C4, -0xF054D8D5,0x7F0360CB,0xF022F6DA,0x7EFD1C3C,0xEFF11753,0x7EF6C418,0xEFBF3A45, -0x7EF05860,0xEF8D5FB8,0x7EE9D914,0xEF5B87B5,0x7EE34636,0xEF29B243,0x7EDC9FC6, -0xEEF7DF6A,0x7ED5E5C6,0xEEC60F31,0x7ECF1837,0xEE9441A0,0x7EC8371A,0xEE6276BF, -0x7EC14270,0xEE30AE96,0x7EBA3A39,0xEDFEE92B,0x7EB31E78,0xEDCD2687,0x7EABEF2C, -0xED9B66B2,0x7EA4AC58,0xED69A9B3,0x7E9D55FC,0xED37EF91,0x7E95EC1A,0xED063856, -0x7E8E6EB2,0xECD48407,0x7E86DDC6,0xECA2D2AD,0x7E7F3957,0xEC71244F,0x7E778166, -0xEC3F78F6,0x7E6FB5F4,0xEC0DD0A8,0x7E67D703,0xEBDC2B6E,0x7E5FE493,0xEBAA894F, -0x7E57DEA7,0xEB78EA52,0x7E4FC53E,0xEB474E81,0x7E47985B,0xEB15B5E1,0x7E3F57FF, -0xEAE4207A,0x7E37042A,0xEAB28E56,0x7E2E9CDF,0xEA80FF7A,0x7E26221F,0xEA4F73EE, -0x7E1D93EA,0xEA1DEBBB,0x7E14F242,0xE9EC66E8,0x7E0C3D29,0xE9BAE57D,0x7E0374A0, -0xE9896781,0x7DFA98A8,0xE957ECFB,0x7DF1A942,0xE92675F4,0x7DE8A670,0xE8F50273, -0x7DDF9034,0xE8C39280,0x7DD6668F,0xE8922622,0x7DCD2981,0xE860BD61,0x7DC3D90D, -0xE82F5844,0x7DBA7534,0xE7FDF6D4,0x7DB0FDF8,0xE7CC9917,0x7DA77359,0xE79B3F16, -0x7D9DD55A,0xE769E8D8,0x7D9423FC,0xE7389665,0x7D8A5F40,0xE70747C4,0x7D808728, -0xE6D5FCFC,0x7D769BB5,0xE6A4B616,0x7D6C9CE9,0xE6737319,0x7D628AC6,0xE642340D, -0x7D58654D,0xE610F8F9,0x7D4E2C7F,0xE5DFC1E5,0x7D43E05E,0xE5AE8ED8,0x7D3980EC, -0xE57D5FDA,0x7D2F0E2B,0xE54C34F3,0x7D24881B,0xE51B0E2A,0x7D19EEBF,0xE4E9EB87, -0x7D0F4218,0xE4B8CD11,0x7D048228,0xE487B2D0,0x7CF9AEF0,0xE4569CCB,0x7CEEC873, -0xE4258B0A,0x7CE3CEB2,0xE3F47D96,0x7CD8C1AE,0xE3C37474,0x7CCDA169,0xE3926FAD, -0x7CC26DE5,0xE3616F48,0x7CB72724,0xE330734D,0x7CABCD28,0xE2FF7BC3,0x7CA05FF1, -0xE2CE88B3,0x7C94DF83,0xE29D9A23,0x7C894BDE,0xE26CB01B,0x7C7DA505,0xE23BCAA2, -0x7C71EAF9,0xE20AE9C1,0x7C661DBC,0xE1DA0D7E,0x7C5A3D50,0xE1A935E2,0x7C4E49B7, -0xE17862F3,0x7C4242F2,0xE14794BA,0x7C362904,0xE116CB3D,0x7C29FBEE,0xE0E60685, -0x7C1DBBB3,0xE0B54698,0x7C116853,0xE0848B7F,0x7C0501D2,0xE053D541,0x7BF88830, -0xE02323E5,0x7BEBFB70,0xDFF27773,0x7BDF5B94,0xDFC1CFF3,0x7BD2A89E,0xDF912D6B, -0x7BC5E290,0xDF608FE4,0x7BB9096B,0xDF2FF764,0x7BAC1D31,0xDEFF63F4,0x7B9F1DE6, -0xDECED59B,0x7B920B89,0xDE9E4C60,0x7B84E61F,0xDE6DC84B,0x7B77ADA8,0xDE3D4964, -0x7B6A6227,0xDE0CCFB1,0x7B5D039E,0xDDDC5B3B,0x7B4F920E,0xDDABEC08,0x7B420D7A, -0xDD7B8220,0x7B3475E5,0xDD4B1D8C,0x7B26CB4F,0xDD1ABE51,0x7B190DBC,0xDCEA6478, -0x7B0B3D2C,0xDCBA1008,0x7AFD59A4,0xDC89C109,0x7AEF6323,0xDC597781,0x7AE159AE, -0xDC293379,0x7AD33D45,0xDBF8F4F8,0x7AC50DEC,0xDBC8BC06,0x7AB6CBA4,0xDB9888A8, -0x7AA8766F,0xDB685AE9,0x7A9A0E50,0xDB3832CD,0x7A8B9348,0xDB08105E,0x7A7D055B, -0xDAD7F3A2,0x7A6E648A,0xDAA7DCA1,0x7A5FB0D8,0xDA77CB63,0x7A50EA47,0xDA47BFEE, -0x7A4210D8,0xDA17BA4A,0x7A332490,0xD9E7BA7F,0x7A24256F,0xD9B7C094,0x7A151378, -0xD987CC90,0x7A05EEAD,0xD957DE7A,0x79F6B711,0xD927F65B,0x79E76CA7,0xD8F81439, -0x79D80F6F,0xD8C8381D,0x79C89F6E,0xD898620C,0x79B91CA4,0xD868920F,0x79A98715, -0xD838C82D,0x7999DEC4,0xD809046E,0x798A23B1,0xD7D946D8,0x797A55E0,0xD7A98F73, -0x796A7554,0xD779DE47,0x795A820E,0xD74A335B,0x794A7C12,0xD71A8EB5,0x793A6361, -0xD6EAF05F,0x792A37FE,0xD6BB585E,0x7919F9EC,0xD68BC6BA,0x7909A92D,0xD65C3B7B, -0x78F945C3,0xD62CB6A8,0x78E8CFB2,0xD5FD3848,0x78D846FB,0xD5CDC062,0x78C7ABA2, -0xD59E4EFF,0x78B6FDA8,0xD56EE424,0x78A63D11,0xD53F7FDA,0x789569DF,0xD5102228, -0x78848414,0xD4E0CB15,0x78738BB3,0xD4B17AA8,0x786280BF,0xD48230E9,0x7851633B, -0xD452EDDF,0x78403329,0xD423B191,0x782EF08B,0xD3F47C06,0x781D9B65,0xD3C54D47, -0x780C33B8,0xD396255A,0x77FAB989,0xD3670446,0x77E92CD9,0xD337EA12,0x77D78DAA, -0xD308D6C7,0x77C5DC01,0xD2D9CA6A,0x77B417DF,0xD2AAC504,0x77A24148,0xD27BC69C, -0x7790583E,0xD24CCF39,0x777E5CC3,0xD21DDEE2,0x776C4EDB,0xD1EEF59E,0x775A2E89, -0xD1C01375,0x7747FBCE,0xD191386E,0x7735B6AF,0xD1626490,0x77235F2D,0xD13397E2, -0x7710F54C,0xD104D26B,0x76FE790E,0xD0D61434,0x76EBEA77,0xD0A75D42,0x76D94989, -0xD078AD9E,0x76C69647,0xD04A054E,0x76B3D0B4,0xD01B6459,0x76A0F8D2,0xCFECCAC7, -0x768E0EA6,0xCFBE389F,0x767B1231,0xCF8FADE9,0x76680376,0xCF612AAA,0x7654E279, -0xCF32AEEB,0x7641AF3D,0xCF043AB3,0x762E69C4,0xCED5CE08,0x761B1211,0xCEA768F2, -0x7607A828,0xCE790B79,0x75F42C0B,0xCE4AB5A2,0x75E09DBD,0xCE1C6777,0x75CCFD42, -0xCDEE20FC,0x75B94A9C,0xCDBFE23A,0x75A585CF,0xCD91AB39,0x7591AEDD,0xCD637BFE, -0x757DC5CA,0xCD355491,0x7569CA99,0xCD0734F9,0x7555BD4C,0xCCD91D3D,0x75419DE7, -0xCCAB0D65,0x752D6C6C,0xCC7D0578,0x751928E0,0xCC4F057C,0x7504D345,0xCC210D79, -0x74F06B9E,0xCBF31D75,0x74DBF1EF,0xCBC53579,0x74C7663A,0xCB97558A,0x74B2C884, -0xCB697DB0,0x749E18CD,0xCB3BADF3,0x7489571C,0xCB0DE658,0x74748371,0xCAE026E8, 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-0x7D8A5F40,0xE70747C4,0x7CE3CEB2,0xE3F47D96,0x7C29FBEE,0xE0E60685,0x7B5D039E, -0xDDDC5B3B,0x7A7D055B,0xDAD7F3A2,0x798A23B1,0xD7D946D8,0x78848414,0xD4E0CB15, -0x776C4EDB,0xD1EEF59E,0x7641AF3D,0xCF043AB3,0x7504D345,0xCC210D79,0x73B5EBD1, -0xC945DFEC,0x72552C85,0xC67322CE,0x70E2CBC6,0xC3A94590,0x6F5F02B2,0xC0E8B648, -0x6DCA0D14,0xBE31E19B,0x6C242960,0xBB8532B0,0x6A6D98A4,0xB8E31319,0x68A69E81, -0xB64BEACD,0x66CF8120,0xB3C0200C,0x64E88926,0xB140175B,0x62F201AC,0xAECC336C, -0x60EC3830,0xAC64D510,0x5ED77C8A,0xAA0A5B2E,0x5CB420E0,0xA7BD22AC,0x5A82799A, -0xA57D8666,0x5842DD54,0xA34BDF20,0x55F5A4D2,0xA1288376,0x539B2AF0,0x9F13C7D0, -0x5133CC94,0x9D0DFE54,0x4EBFE8A5,0x9B1776DA,0x4C3FDFF4,0x99307EE0,0x49B41533, -0x9759617F,0x471CECE7,0x9592675C,0x447ACD50,0x93DBD6A0,0x41CE1E65,0x9235F2EC, -0x3F1749B8,0x90A0FD4E,0x3C56BA70,0x8F1D343A,0x398CDD32,0x8DAAD37B,0x36BA2014, -0x8C4A142F,0x33DEF287,0x8AFB2CBB,0x30FBC54D,0x89BE50C3,0x2E110A62,0x8893B125, -0x2B1F34EB,0x877B7BEC,0x2826B928,0x8675DC4F,0x25280C5E,0x8582FAA5,0x2223A4C5, -0x84A2FC62,0x1F19F97B,0x83D60412,0x1C0B826A,0x831C314E,0x18F8B83C,0x8275A0C0, -0x15E21445,0x81E26C16,0x12C8106F,0x8162AA04,0x0FAB272B,0x80F66E3C,0x0C8BD35E, -0x809DC971,0x096A9049,0x8058C94C,0x0647D97C,0x80277872,0x03242ABF,0x8009DE7E, -0x7FFFFFFF,0x00000000,0x7F62368F,0xF3742CA2,0x7D8A5F40,0xE70747C4,0x7A7D055B, -0xDAD7F3A2,0x7641AF3D,0xCF043AB3,0x70E2CBC6,0xC3A94590,0x6A6D98A4,0xB8E31319, -0x62F201AC,0xAECC336C,0x5A82799A,0xA57D8666,0x5133CC94,0x9D0DFE54,0x471CECE7, -0x9592675C,0x3C56BA70,0x8F1D343A,0x30FBC54D,0x89BE50C3,0x25280C5E,0x8582FAA5, -0x18F8B83C,0x8275A0C0,0x0C8BD35E,0x809DC971,0x7FFFFFFF,0x00000000,0x7641AF3D, -0xCF043AB3,0x5A82799A,0xA57D8666,0x30FBC54D,0x89BE50C3,}; - -q31_t rearranged_twiddle_stride2_4096_q31[2728]={ -0x7FFFFFFF,0x00000000,0x7FFFD886,0xFF9B781D,0x7FFF6216,0xFF36F078,0x7FFE9CB2, -0xFED2694F,0x7FFD885A,0xFE6DE2E0,0x7FFC250F,0xFE095D69,0x7FFA72D1,0xFDA4D929, -0x7FF871A2,0xFD40565C,0x7FF62182,0xFCDBD541,0x7FF38274,0xFC775616,0x7FF09478, -0xFC12D91A,0x7FED5791,0xFBAE5E89,0x7FE9CBC0,0xFB49E6A3,0x7FE5F108,0xFAE571A4, -0x7FE1C76B,0xFA80FFCB,0x7FDD4EEC,0xFA1C9157,0x7FD8878E,0xF9B82684,0x7FD37153, -0xF953BF91,0x7FCE0C3E,0xF8EF5CBB,0x7FC85854,0xF88AFE42,0x7FC25596,0xF826A462, -0x7FBC040A,0xF7C24F59,0x7FB563B3,0xF75DFF66,0x7FAE7495,0xF6F9B4C6,0x7FA736B4, -0xF6956FB7,0x7F9FAA15,0xF6313077,0x7F97CEBD,0xF5CCF743,0x7F8FA4B0,0xF568C45B, -0x7F872BF3,0xF50497FB,0x7F7E648C,0xF4A07261,0x7F754E80,0xF43C53CB,0x7F6BE9D4, -0xF3D83C77,0x7F62368F,0xF3742CA2,0x7F5834B7,0xF310248A,0x7F4DE451,0xF2AC246E, -0x7F434563,0xF2482C8A,0x7F3857F6,0xF1E43D1C,0x7F2D1C0E,0xF1805662,0x7F2191B4, -0xF11C789A,0x7F15B8EE,0xF0B8A401,0x7F0991C4,0xF054D8D5,0x7EFD1C3C,0xEFF11753, -0x7EF05860,0xEF8D5FB8,0x7EE34636,0xEF29B243,0x7ED5E5C6,0xEEC60F31,0x7EC8371A, -0xEE6276BF,0x7EBA3A39,0xEDFEE92B,0x7EABEF2C,0xED9B66B2,0x7E9D55FC,0xED37EF91, -0x7E8E6EB2,0xECD48407,0x7E7F3957,0xEC71244F,0x7E6FB5F4,0xEC0DD0A8,0x7E5FE493, -0xEBAA894F,0x7E4FC53E,0xEB474E81,0x7E3F57FF,0xEAE4207A,0x7E2E9CDF,0xEA80FF7A, -0x7E1D93EA,0xEA1DEBBB,0x7E0C3D29,0xE9BAE57D,0x7DFA98A8,0xE957ECFB,0x7DE8A670, -0xE8F50273,0x7DD6668F,0xE8922622,0x7DC3D90D,0xE82F5844,0x7DB0FDF8,0xE7CC9917, -0x7D9DD55A,0xE769E8D8,0x7D8A5F40,0xE70747C4,0x7D769BB5,0xE6A4B616,0x7D628AC6, -0xE642340D,0x7D4E2C7F,0xE5DFC1E5,0x7D3980EC,0xE57D5FDA,0x7D24881B,0xE51B0E2A, -0x7D0F4218,0xE4B8CD11,0x7CF9AEF0,0xE4569CCB,0x7CE3CEB2,0xE3F47D96,0x7CCDA169, -0xE3926FAD,0x7CB72724,0xE330734D,0x7CA05FF1,0xE2CE88B3,0x7C894BDE,0xE26CB01B, -0x7C71EAF9,0xE20AE9C1,0x7C5A3D50,0xE1A935E2,0x7C4242F2,0xE14794BA,0x7C29FBEE, -0xE0E60685,0x7C116853,0xE0848B7F,0x7BF88830,0xE02323E5,0x7BDF5B94,0xDFC1CFF3, -0x7BC5E290,0xDF608FE4,0x7BAC1D31,0xDEFF63F4,0x7B920B89,0xDE9E4C60,0x7B77ADA8, -0xDE3D4964,0x7B5D039E,0xDDDC5B3B,0x7B420D7A,0xDD7B8220,0x7B26CB4F,0xDD1ABE51, -0x7B0B3D2C,0xDCBA1008,0x7AEF6323,0xDC597781,0x7AD33D45,0xDBF8F4F8,0x7AB6CBA4, -0xDB9888A8,0x7A9A0E50,0xDB3832CD,0x7A7D055B,0xDAD7F3A2,0x7A5FB0D8,0xDA77CB63, -0x7A4210D8,0xDA17BA4A,0x7A24256F,0xD9B7C094,0x7A05EEAD,0xD957DE7A,0x79E76CA7, -0xD8F81439,0x79C89F6E,0xD898620C,0x79A98715,0xD838C82D,0x798A23B1,0xD7D946D8, -0x796A7554,0xD779DE47,0x794A7C12,0xD71A8EB5,0x792A37FE,0xD6BB585E,0x7909A92D, -0xD65C3B7B,0x78E8CFB2,0xD5FD3848,0x78C7ABA2,0xD59E4EFF,0x78A63D11,0xD53F7FDA, -0x78848414,0xD4E0CB15,0x786280BF,0xD48230E9,0x78403329,0xD423B191,0x781D9B65, -0xD3C54D47,0x77FAB989,0xD3670446,0x77D78DAA,0xD308D6C7,0x77B417DF,0xD2AAC504, -0x7790583E,0xD24CCF39,0x776C4EDB,0xD1EEF59E,0x7747FBCE,0xD191386E,0x77235F2D, -0xD13397E2,0x76FE790E,0xD0D61434,0x76D94989,0xD078AD9E,0x76B3D0B4,0xD01B6459, -0x768E0EA6,0xCFBE389F,0x76680376,0xCF612AAA,0x7641AF3D,0xCF043AB3,0x761B1211, -0xCEA768F2,0x75F42C0B,0xCE4AB5A2,0x75CCFD42,0xCDEE20FC,0x75A585CF,0xCD91AB39, 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-0x4D8162C4,0x9A22042D,0x4C3FDFF4,0x99307EE0,0x4AFB6C98,0x9842F043,0x49B41533, -0x9759617F,0x4869E665,0x9673DB94,0x471CECE7,0x9592675C,0x45CD358F,0x94B50D87, -0x447ACD50,0x93DBD6A0,0x4325C135,0x9306CB04,0x41CE1E65,0x9235F2EC,0x4073F21D, -0x91695663,0x3F1749B8,0x90A0FD4E,0x3DB832A6,0x8FDCEF66,0x3C56BA70,0x8F1D343A, -0x3AF2EEB7,0x8E61D32E,0x398CDD32,0x8DAAD37B,0x382493B0,0x8CF83C30,0x36BA2014, -0x8C4A142F,0x354D9057,0x8BA0622F,0x33DEF287,0x8AFB2CBB,0x326E54C7,0x8A5A7A31, -0x30FBC54D,0x89BE50C3,0x2F875262,0x8926B677,0x2E110A62,0x8893B125,0x2C98FBBA, -0x88054677,0x2B1F34EB,0x877B7BEC,0x29A3C485,0x86F656D3,0x2826B928,0x8675DC4F, -0x26A82186,0x85FA1153,0x25280C5E,0x8582FAA5,0x23A6887F,0x85109CDD,0x2223A4C5, -0x84A2FC62,0x209F701C,0x843A1D70,0x1F19F97B,0x83D60412,0x1D934FE5,0x8376B422, -0x1C0B826A,0x831C314E,0x1A82A026,0x82C67F14,0x18F8B83C,0x8275A0C0,0x176DD9DE, -0x82299971,0x15E21445,0x81E26C16,0x145576B1,0x81A01B6D,0x12C8106F,0x8162AA04, -0x1139F0CF,0x812A1A3A,0x0FAB272B,0x80F66E3C,0x0E1BC2E4,0x80C7A80A,0x0C8BD35E, -0x809DC971,0x0AFB6805,0x8078D40D,0x096A9049,0x8058C94C,0x07D95B9E,0x803DAA6A, -0x0647D97C,0x80277872,0x04B6195D,0x80163440,0x03242ABF,0x8009DE7E,0x01921D20, -0x800277A6,0x00000000,0x80000000,0xFE6DE2E0,0x800277A6,0xFCDBD541,0x8009DE7E, -0xFB49E6A3,0x80163440,0xF9B82684,0x80277872,0xF826A462,0x803DAA6A,0xF6956FB7, -0x8058C94C,0xF50497FB,0x8078D40D,0xF3742CA2,0x809DC971,0xF1E43D1C,0x80C7A80A, -0xF054D8D5,0x80F66E3C,0xEEC60F31,0x812A1A3A,0xED37EF91,0x8162AA04,0xEBAA894F, -0x81A01B6D,0xEA1DEBBB,0x81E26C16,0xE8922622,0x82299971,0xE70747C4,0x8275A0C0, -0xE57D5FDA,0x82C67F14,0xE3F47D96,0x831C314E,0xE26CB01B,0x8376B422,0xE0E60685, -0x83D60412,0xDF608FE4,0x843A1D70,0xDDDC5B3B,0x84A2FC62,0xDC597781,0x85109CDD, -0xDAD7F3A2,0x8582FAA5,0xD957DE7A,0x85FA1153,0xD7D946D8,0x8675DC4F,0xD65C3B7B, -0x86F656D3,0xD4E0CB15,0x877B7BEC,0xD3670446,0x88054677,0xD1EEF59E,0x8893B125, -0xD078AD9E,0x8926B677,0xCF043AB3,0x89BE50C3,0xCD91AB39,0x8A5A7A31,0xCC210D79, -0x8AFB2CBB,0xCAB26FA9,0x8BA0622F,0xC945DFEC,0x8C4A142F,0xC7DB6C50,0x8CF83C30, -0xC67322CE,0x8DAAD37B,0xC50D1149,0x8E61D32E,0xC3A94590,0x8F1D343A,0xC247CD5A, -0x8FDCEF66,0xC0E8B648,0x90A0FD4E,0xBF8C0DE3,0x91695663,0xBE31E19B,0x9235F2EC, -0xBCDA3ECB,0x9306CB04,0xBB8532B0,0x93DBD6A0,0xBA32CA71,0x94B50D87,0xB8E31319, -0x9592675C,0xB796199B,0x9673DB94,0xB64BEACD,0x9759617F,0xB5049368,0x9842F043, -0xB3C0200C,0x99307EE0,0xB27E9D3C,0x9A22042D,0xB140175B,0x9B1776DA,0xB0049AB3, -0x9C10CD70,0xAECC336C,0x9D0DFE54,0xAD96ED92,0x9E0EFFC1,0xAC64D510,0x9F13C7D0, -0xAB35F5B5,0xA01C4C73,0xAA0A5B2E,0xA1288376,0xA8E21106,0xA2386284,0xA7BD22AC, -0xA34BDF20,0xA69B9B68,0xA462EEAC,0xA57D8666,0xA57D8666,0xA462EEAC,0xA69B9B68, -0xA34BDF20,0xA7BD22AC,0xA2386284,0xA8E21106,0xA1288376,0xAA0A5B2E,0xA01C4C73, -0xAB35F5B5,0x9F13C7D0,0xAC64D510,0x9E0EFFC1,0xAD96ED92,0x9D0DFE54,0xAECC336C, -0x9C10CD70,0xB0049AB3,0x9B1776DA,0xB140175B,0x9A22042D,0xB27E9D3C,0x99307EE0, -0xB3C0200C,0x9842F043,0xB5049368,0x9759617F,0xB64BEACD,0x9673DB94,0xB796199B, -0x9592675C,0xB8E31319,0x94B50D87,0xBA32CA71,0x93DBD6A0,0xBB8532B0,0x9306CB04, -0xBCDA3ECB,0x9235F2EC,0xBE31E19B,0x91695663,0xBF8C0DE3,0x90A0FD4E,0xC0E8B648, -0x8FDCEF66,0xC247CD5A,0x8F1D343A,0xC3A94590,0x8E61D32E,0xC50D1149,0x8DAAD37B, -0xC67322CE,0x8CF83C30,0xC7DB6C50,0x8C4A142F,0xC945DFEC,0x8BA0622F,0xCAB26FA9, -0x8AFB2CBB,0xCC210D79,0x8A5A7A31,0xCD91AB39,0x89BE50C3,0xCF043AB3,0x8926B677, -0xD078AD9E,0x8893B125,0xD1EEF59E,0x88054677,0xD3670446,0x877B7BEC,0xD4E0CB15, -0x86F656D3,0xD65C3B7B,0x8675DC4F,0xD7D946D8,0x85FA1153,0xD957DE7A,0x8582FAA5, -0xDAD7F3A2,0x85109CDD,0xDC597781,0x84A2FC62,0xDDDC5B3B,0x843A1D70,0xDF608FE4, -0x83D60412,0xE0E60685,0x8376B422,0xE26CB01B,0x831C314E,0xE3F47D96,0x82C67F14, -0xE57D5FDA,0x8275A0C0,0xE70747C4,0x82299971,0xE8922622,0x81E26C16,0xEA1DEBBB, -0x81A01B6D,0xEBAA894F,0x8162AA04,0xED37EF91,0x812A1A3A,0xEEC60F31,0x80F66E3C, -0xF054D8D5,0x80C7A80A,0xF1E43D1C,0x809DC971,0xF3742CA2,0x8078D40D,0xF50497FB, -0x8058C94C,0xF6956FB7,0x803DAA6A,0xF826A462,0x80277872,0xF9B82684,0x80163440, -0xFB49E6A3,0x8009DE7E,0xFCDBD541,0x800277A6,0xFE6DE2E0,0x7FFFFFFF,0x00000000, -0x7FD8878E,0xF9B82684,0x7F62368F,0xF3742CA2,0x7E9D55FC,0xED37EF91,0x7D8A5F40, -0xE70747C4,0x7C29FBEE,0xE0E60685,0x7A7D055B,0xDAD7F3A2,0x78848414,0xD4E0CB15, -0x7641AF3D,0xCF043AB3,0x73B5EBD1,0xC945DFEC,0x70E2CBC6,0xC3A94590,0x6DCA0D14, -0xBE31E19B,0x6A6D98A4,0xB8E31319,0x66CF8120,0xB3C0200C,0x62F201AC,0xAECC336C, -0x5ED77C8A,0xAA0A5B2E,0x5A82799A,0xA57D8666,0x55F5A4D2,0xA1288376,0x5133CC94, -0x9D0DFE54,0x4C3FDFF4,0x99307EE0,0x471CECE7,0x9592675C,0x41CE1E65,0x9235F2EC, -0x3C56BA70,0x8F1D343A,0x36BA2014,0x8C4A142F,0x30FBC54D,0x89BE50C3,0x2B1F34EB, -0x877B7BEC,0x25280C5E,0x8582FAA5,0x1F19F97B,0x83D60412,0x18F8B83C,0x8275A0C0, -0x12C8106F,0x8162AA04,0x0C8BD35E,0x809DC971,0x0647D97C,0x80277872,0x00000000, -0x80000000,0xF9B82684,0x80277872,0xF3742CA2,0x809DC971,0xED37EF91,0x8162AA04, -0xE70747C4,0x8275A0C0,0xE0E60685,0x83D60412,0xDAD7F3A2,0x8582FAA5,0xD4E0CB15, -0x877B7BEC,0xCF043AB3,0x89BE50C3,0xC945DFEC,0x8C4A142F,0xC3A94590,0x8F1D343A, -0xBE31E19B,0x9235F2EC,0xB8E31319,0x9592675C,0xB3C0200C,0x99307EE0,0xAECC336C, -0x9D0DFE54,0xAA0A5B2E,0xA1288376,0xA57D8666,0xA57D8666,0xA1288376,0xAA0A5B2E, -0x9D0DFE54,0xAECC336C,0x99307EE0,0xB3C0200C,0x9592675C,0xB8E31319,0x9235F2EC, -0xBE31E19B,0x8F1D343A,0xC3A94590,0x8C4A142F,0xC945DFEC,0x89BE50C3,0xCF043AB3, -0x877B7BEC,0xD4E0CB15,0x8582FAA5,0xDAD7F3A2,0x83D60412,0xE0E60685,0x8275A0C0, -0xE70747C4,0x8162AA04,0xED37EF91,0x809DC971,0xF3742CA2,0x80277872,0xF9B82684, -0x7FFFFFFF,0x00000000,0x7D8A5F40,0xE70747C4,0x7641AF3D,0xCF043AB3,0x6A6D98A4, -0xB8E31319,0x5A82799A,0xA57D8666,0x471CECE7,0x9592675C,0x30FBC54D,0x89BE50C3, -0x18F8B83C,0x8275A0C0,0x00000000,0x80000000,0xE70747C4,0x8275A0C0,0xCF043AB3, -0x89BE50C3,0xB8E31319,0x9592675C,0xA57D8666,0xA57D8666,0x9592675C,0xB8E31319, -0x89BE50C3,0xCF043AB3,0x8275A0C0,0xE70747C4,0x7FFFFFFF,0x00000000,0x5A82799A, -0xA57D8666,0x00000000,0x80000000,0xA57D8666,0xA57D8666,}; - -q31_t rearranged_twiddle_stride3_4096_q31[2728]={ -0x7FFFFFFF,0x00000000,0x7FFFA72C,0xFF69343F,0x7FFE9CB2,0xFED2694F,0x7FFCE093, -0xFE3BA002,0x7FFA72D1,0xFDA4D929,0x7FF75370,0xFD0E1594,0x7FF38274,0xFC775616, -0x7FEEFFE1,0xFBE09B80,0x7FE9CBC0,0xFB49E6A3,0x7FE3E616,0xFAB3384F,0x7FDD4EEC, -0xFA1C9157,0x7FD6064C,0xF985F28A,0x7FCE0C3E,0xF8EF5CBB,0x7FC560CF,0xF858D0BB, -0x7FBC040A,0xF7C24F59,0x7FB1F5FC,0xF72BD967,0x7FA736B4,0xF6956FB7,0x7F9BC640, -0xF5FF1318,0x7F8FA4B0,0xF568C45B,0x7F82D214,0xF4D28451,0x7F754E80,0xF43C53CB, -0x7F671A05,0xF3A63398,0x7F5834B7,0xF310248A,0x7F489EAA,0xF27A2771,0x7F3857F6, -0xF1E43D1C,0x7F2760AF,0xF14E665C,0x7F15B8EE,0xF0B8A401,0x7F0360CB,0xF022F6DA, -0x7EF05860,0xEF8D5FB8,0x7EDC9FC6,0xEEF7DF6A,0x7EC8371A,0xEE6276BF,0x7EB31E78, -0xEDCD2687,0x7E9D55FC,0xED37EF91,0x7E86DDC6,0xECA2D2AD,0x7E6FB5F4,0xEC0DD0A8, -0x7E57DEA7,0xEB78EA52,0x7E3F57FF,0xEAE4207A,0x7E26221F,0xEA4F73EE,0x7E0C3D29, -0xE9BAE57D,0x7DF1A942,0xE92675F4,0x7DD6668F,0xE8922622,0x7DBA7534,0xE7FDF6D4, -0x7D9DD55A,0xE769E8D8,0x7D808728,0xE6D5FCFC,0x7D628AC6,0xE642340D,0x7D43E05E, -0xE5AE8ED8,0x7D24881B,0xE51B0E2A,0x7D048228,0xE487B2D0,0x7CE3CEB2,0xE3F47D96, -0x7CC26DE5,0xE3616F48,0x7CA05FF1,0xE2CE88B3,0x7C7DA505,0xE23BCAA2,0x7C5A3D50, -0xE1A935E2,0x7C362904,0xE116CB3D,0x7C116853,0xE0848B7F,0x7BEBFB70,0xDFF27773, -0x7BC5E290,0xDF608FE4,0x7B9F1DE6,0xDECED59B,0x7B77ADA8,0xDE3D4964,0x7B4F920E, -0xDDABEC08,0x7B26CB4F,0xDD1ABE51,0x7AFD59A4,0xDC89C109,0x7AD33D45,0xDBF8F4F8, -0x7AA8766F,0xDB685AE9,0x7A7D055B,0xDAD7F3A2,0x7A50EA47,0xDA47BFEE,0x7A24256F, -0xD9B7C094,0x79F6B711,0xD927F65B,0x79C89F6E,0xD898620C,0x7999DEC4,0xD809046E, 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-0x9235F2EC,0x41CE1E65,0x9759617F,0x49B41533,0x9D0DFE54,0x5133CC94,0xA34BDF20, -0x5842DD54,0xAA0A5B2E,0x5ED77C8A,0xB140175B,0x64E88926,0xB8E31319,0x6A6D98A4, -0xC0E8B648,0x6F5F02B2,0xC945DFEC,0x73B5EBD1,0xD1EEF59E,0x776C4EDB,0xDAD7F3A2, -0x7A7D055B,0xE3F47D96,0x7CE3CEB2,0xED37EF91,0x7E9D55FC,0xF6956FB7,0x7FA736B4, -0x7FFFFFFF,0x00000000,0x7A7D055B,0xDAD7F3A2,0x6A6D98A4,0xB8E31319,0x5133CC94, -0x9D0DFE54,0x30FBC54D,0x89BE50C3,0x0C8BD35E,0x809DC971,0xE70747C4,0x8275A0C0, -0xC3A94590,0x8F1D343A,0xA57D8666,0xA57D8666,0x8F1D343A,0xC3A94590,0x8275A0C0, -0xE70747C4,0x809DC971,0x0C8BD35E,0x89BE50C3,0x30FBC54D,0x9D0DFE54,0x5133CC94, -0xB8E31319,0x6A6D98A4,0xDAD7F3A2,0x7A7D055B,0x7FFFFFFF,0x00000000,0x30FBC54D, -0x89BE50C3,0xA57D8666,0xA57D8666,0x89BE50C3,0x30FBC54D,}; - -#endif - - - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */ -#endif /* defined(ARM_MATH_MVEI) */ - - - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32) - -uint32_t rearranged_twiddle_tab_stride1_arr_16_q15[2]={ -0,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_16_q15[2]={ -0,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_16_q15[2]={ -0,0,}; - -q15_t rearranged_twiddle_stride1_16_q15[8]={ -0x7FFF,0x0000,0x7642,0xCF04,0x5A82,0xA57E,0x30FC,0x89BE,}; - -q15_t rearranged_twiddle_stride2_16_q15[8]={ -0x7FFF,0x0000,0x5A82,0xA57E,0x0000,0x8000,0xA57E,0xA57E,}; - -q15_t rearranged_twiddle_stride3_16_q15[8]={ -0x7FFF,0x0000,0x30FC,0x89BE,0xA57E,0xA57E,0x89BE,0x30FC,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128) - -uint32_t rearranged_twiddle_tab_stride1_arr_64_q15[3]={ -0,32,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_64_q15[3]={ -0,32,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_64_q15[3]={ -0,32,0,}; - -q15_t rearranged_twiddle_stride1_64_q15[40]={ -0x7FFF,0x0000,0x7F62,0xF374,0x7D8A,0xE707,0x7A7D,0xDAD8,0x7642,0xCF04,0x70E3, -0xC3A9,0x6A6E,0xB8E3,0x62F2,0xAECC,0x5A82,0xA57E,0x5134,0x9D0E,0x471D,0x9592, -0x3C57,0x8F1D,0x30FC,0x89BE,0x2528,0x8583,0x18F9,0x8276,0x0C8C,0x809E,0x7FFF, -0x0000,0x7642,0xCF04,0x5A82,0xA57E,0x30FC,0x89BE,}; - -q15_t rearranged_twiddle_stride2_64_q15[40]={ -0x7FFF,0x0000,0x7D8A,0xE707,0x7642,0xCF04,0x6A6E,0xB8E3,0x5A82,0xA57E,0x471D, -0x9592,0x30FC,0x89BE,0x18F9,0x8276,0x0000,0x8000,0xE707,0x8276,0xCF04,0x89BE, -0xB8E3,0x9592,0xA57E,0xA57E,0x9592,0xB8E3,0x89BE,0xCF04,0x8276,0xE707,0x7FFF, -0x0000,0x5A82,0xA57E,0x0000,0x8000,0xA57E,0xA57E,}; - -q15_t rearranged_twiddle_stride3_64_q15[40]={ -0x7FFF,0x0000,0x7A7D,0xDAD8,0x6A6E,0xB8E3,0x5134,0x9D0E,0x30FC,0x89BE,0x0C8C, -0x809E,0xE707,0x8276,0xC3A9,0x8F1D,0xA57E,0xA57E,0x8F1D,0xC3A9,0x8276,0xE707, -0x809E,0x0C8C,0x89BE,0x30FC,0x9D0E,0x5134,0xB8E3,0x6A6E,0xDAD8,0x7A7D,0x7FFF, -0x0000,0x30FC,0x89BE,0xA57E,0xA57E,0x89BE,0x30FC,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512) - -uint32_t rearranged_twiddle_tab_stride1_arr_256_q15[4]={ -0,128,160,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_256_q15[4]={ -0,128,160,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_256_q15[4]={ -0,128,160,0,}; - -q15_t rearranged_twiddle_stride1_256_q15[168]={ -0x7FFF,0x0000,0x7FF6,0xFCDC,0x7FD9,0xF9B8,0x7FA7,0xF695,0x7F62,0xF374,0x7F0A, -0xF055,0x7E9D,0xED38,0x7E1E,0xEA1E,0x7D8A,0xE707,0x7CE4,0xE3F4,0x7C2A,0xE0E6, -0x7B5D,0xDDDC,0x7A7D,0xDAD8,0x798A,0xD7D9,0x7885,0xD4E1,0x776C,0xD1EF,0x7642, -0xCF04,0x7505,0xCC21,0x73B6,0xC946,0x7255,0xC673,0x70E3,0xC3A9,0x6F5F,0xC0E9, -0x6DCA,0xBE32,0x6C24,0xBB85,0x6A6E,0xB8E3,0x68A7,0xB64C,0x66D0,0xB3C0,0x64E9, -0xB140,0x62F2,0xAECC,0x60EC,0xAC65,0x5ED7,0xAA0A,0x5CB4,0xA7BD,0x5A82,0xA57E, -0x5843,0xA34C,0x55F6,0xA129,0x539B,0x9F14,0x5134,0x9D0E,0x4EC0,0x9B17,0x4C40, -0x9930,0x49B4,0x9759,0x471D,0x9592,0x447B,0x93DC,0x41CE,0x9236,0x3F17,0x90A1, -0x3C57,0x8F1D,0x398D,0x8DAB,0x36BA,0x8C4A,0x33DF,0x8AFB,0x30FC,0x89BE,0x2E11, -0x8894,0x2B1F,0x877B,0x2827,0x8676,0x2528,0x8583,0x2224,0x84A3,0x1F1A,0x83D6, -0x1C0C,0x831C,0x18F9,0x8276,0x15E2,0x81E2,0x12C8,0x8163,0x0FAB,0x80F6,0x0C8C, -0x809E,0x096B,0x8059,0x0648,0x8027,0x0324,0x800A,0x7FFF,0x0000,0x7F62,0xF374, -0x7D8A,0xE707,0x7A7D,0xDAD8,0x7642,0xCF04,0x70E3,0xC3A9,0x6A6E,0xB8E3,0x62F2, -0xAECC,0x5A82,0xA57E,0x5134,0x9D0E,0x471D,0x9592,0x3C57,0x8F1D,0x30FC,0x89BE, -0x2528,0x8583,0x18F9,0x8276,0x0C8C,0x809E,0x7FFF,0x0000,0x7642,0xCF04,0x5A82, -0xA57E,0x30FC,0x89BE,}; - -q15_t rearranged_twiddle_stride2_256_q15[168]={ -0x7FFF,0x0000,0x7FD9,0xF9B8,0x7F62,0xF374,0x7E9D,0xED38,0x7D8A,0xE707,0x7C2A, -0xE0E6,0x7A7D,0xDAD8,0x7885,0xD4E1,0x7642,0xCF04,0x73B6,0xC946,0x70E3,0xC3A9, -0x6DCA,0xBE32,0x6A6E,0xB8E3,0x66D0,0xB3C0,0x62F2,0xAECC,0x5ED7,0xAA0A,0x5A82, -0xA57E,0x55F6,0xA129,0x5134,0x9D0E,0x4C40,0x9930,0x471D,0x9592,0x41CE,0x9236, -0x3C57,0x8F1D,0x36BA,0x8C4A,0x30FC,0x89BE,0x2B1F,0x877B,0x2528,0x8583,0x1F1A, -0x83D6,0x18F9,0x8276,0x12C8,0x8163,0x0C8C,0x809E,0x0648,0x8027,0x0000,0x8000, -0xF9B8,0x8027,0xF374,0x809E,0xED38,0x8163,0xE707,0x8276,0xE0E6,0x83D6,0xDAD8, -0x8583,0xD4E1,0x877B,0xCF04,0x89BE,0xC946,0x8C4A,0xC3A9,0x8F1D,0xBE32,0x9236, -0xB8E3,0x9592,0xB3C0,0x9930,0xAECC,0x9D0E,0xAA0A,0xA129,0xA57E,0xA57E,0xA129, -0xAA0A,0x9D0E,0xAECC,0x9930,0xB3C0,0x9592,0xB8E3,0x9236,0xBE32,0x8F1D,0xC3A9, -0x8C4A,0xC946,0x89BE,0xCF04,0x877B,0xD4E1,0x8583,0xDAD8,0x83D6,0xE0E6,0x8276, -0xE707,0x8163,0xED38,0x809E,0xF374,0x8027,0xF9B8,0x7FFF,0x0000,0x7D8A,0xE707, -0x7642,0xCF04,0x6A6E,0xB8E3,0x5A82,0xA57E,0x471D,0x9592,0x30FC,0x89BE,0x18F9, -0x8276,0x0000,0x8000,0xE707,0x8276,0xCF04,0x89BE,0xB8E3,0x9592,0xA57E,0xA57E, -0x9592,0xB8E3,0x89BE,0xCF04,0x8276,0xE707,0x7FFF,0x0000,0x5A82,0xA57E,0x0000, -0x8000,0xA57E,0xA57E,}; - -q15_t rearranged_twiddle_stride3_256_q15[168]={ -0x7FFF,0x0000,0x7FA7,0xF695,0x7E9D,0xED38,0x7CE4,0xE3F4,0x7A7D,0xDAD8,0x776C, -0xD1EF,0x73B6,0xC946,0x6F5F,0xC0E9,0x6A6E,0xB8E3,0x64E9,0xB140,0x5ED7,0xAA0A, -0x5843,0xA34C,0x5134,0x9D0E,0x49B4,0x9759,0x41CE,0x9236,0x398D,0x8DAB,0x30FC, -0x89BE,0x2827,0x8676,0x1F1A,0x83D6,0x15E2,0x81E2,0x0C8C,0x809E,0x0324,0x800A, -0xF9B8,0x8027,0xF055,0x80F6,0xE707,0x8276,0xDDDC,0x84A3,0xD4E1,0x877B,0xCC21, -0x8AFB,0xC3A9,0x8F1D,0xBB85,0x93DC,0xB3C0,0x9930,0xAC65,0x9F14,0xA57E,0xA57E, -0x9F14,0xAC65,0x9930,0xB3C0,0x93DC,0xBB85,0x8F1D,0xC3A9,0x8AFB,0xCC21,0x877B, -0xD4E1,0x84A3,0xDDDC,0x8276,0xE707,0x80F6,0xF055,0x8027,0xF9B8,0x800A,0x0324, -0x809E,0x0C8C,0x81E2,0x15E2,0x83D6,0x1F1A,0x8676,0x2827,0x89BE,0x30FC,0x8DAB, -0x398D,0x9236,0x41CE,0x9759,0x49B4,0x9D0E,0x5134,0xA34C,0x5843,0xAA0A,0x5ED7, -0xB140,0x64E9,0xB8E3,0x6A6E,0xC0E9,0x6F5F,0xC946,0x73B6,0xD1EF,0x776C,0xDAD8, -0x7A7D,0xE3F4,0x7CE4,0xED38,0x7E9D,0xF695,0x7FA7,0x7FFF,0x0000,0x7A7D,0xDAD8, -0x6A6E,0xB8E3,0x5134,0x9D0E,0x30FC,0x89BE,0x0C8C,0x809E,0xE707,0x8276,0xC3A9, -0x8F1D,0xA57E,0xA57E,0x8F1D,0xC3A9,0x8276,0xE707,0x809E,0x0C8C,0x89BE,0x30FC, -0x9D0E,0x5134,0xB8E3,0x6A6E,0xDAD8,0x7A7D,0x7FFF,0x0000,0x30FC,0x89BE,0xA57E, -0xA57E,0x89BE,0x30FC,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) - -uint32_t rearranged_twiddle_tab_stride1_arr_1024_q15[5]={ -0,512,640,672,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_1024_q15[5]={ -0,512,640,672,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_1024_q15[5]={ -0,512,640,672,0,}; - -q15_t rearranged_twiddle_stride1_1024_q15[680]={ -0x7FFF,0x0000,0x7FFF,0xFF37,0x7FFE,0xFE6E,0x7FFA,0xFDA5,0x7FF6,0xFCDC,0x7FF1, -0xFC13,0x7FEA,0xFB4A,0x7FE2,0xFA81,0x7FD9,0xF9B8,0x7FCE,0xF8EF,0x7FC2,0xF827, -0x7FB5,0xF75E,0x7FA7,0xF695,0x7F98,0xF5CD,0x7F87,0xF505,0x7F75,0xF43C,0x7F62, -0xF374,0x7F4E,0xF2AC,0x7F38,0xF1E4,0x7F22,0xF11C,0x7F0A,0xF055,0x7EF0,0xEF8D, -0x7ED6,0xEEC6,0x7EBA,0xEDFF,0x7E9D,0xED38,0x7E7F,0xEC71,0x7E60,0xEBAB,0x7E3F, -0xEAE4,0x7E1E,0xEA1E,0x7DFB,0xE958,0x7DD6,0xE892,0x7DB1,0xE7CD,0x7D8A,0xE707, -0x7D63,0xE642,0x7D3A,0xE57D,0x7D0F,0xE4B9,0x7CE4,0xE3F4,0x7CB7,0xE330,0x7C89, -0xE26D,0x7C5A,0xE1A9,0x7C2A,0xE0E6,0x7BF9,0xE023,0x7BC6,0xDF61,0x7B92,0xDE9E, -0x7B5D,0xDDDC,0x7B27,0xDD1B,0x7AEF,0xDC59,0x7AB7,0xDB99,0x7A7D,0xDAD8,0x7A42, -0xDA18,0x7A06,0xD958,0x79C9,0xD898,0x798A,0xD7D9,0x794A,0xD71B,0x790A,0xD65C, -0x78C8,0xD59E,0x7885,0xD4E1,0x7840,0xD424,0x77FB,0xD367,0x77B4,0xD2AB,0x776C, -0xD1EF,0x7723,0xD134,0x76D9,0xD079,0x768E,0xCFBE,0x7642,0xCF04,0x75F4,0xCE4B, -0x75A6,0xCD92,0x7556,0xCCD9,0x7505,0xCC21,0x74B3,0xCB69,0x7460,0xCAB2,0x740B, -0xC9FC,0x73B6,0xC946,0x735F,0xC890,0x7308,0xC7DB,0x72AF,0xC727,0x7255,0xC673, -0x71FA,0xC5C0,0x719E,0xC50D,0x7141,0xC45B,0x70E3,0xC3A9,0x7083,0xC2F8,0x7023, -0xC248,0x6FC2,0xC198,0x6F5F,0xC0E9,0x6EFB,0xC03A,0x6E97,0xBF8C,0x6E31,0xBEDF, -0x6DCA,0xBE32,0x6D62,0xBD86,0x6CF9,0xBCDA,0x6C8F,0xBC2F,0x6C24,0xBB85,0x6BB8, -0xBADC,0x6B4B,0xBA33,0x6ADD,0xB98B,0x6A6E,0xB8E3,0x69FD,0xB83C,0x698C,0xB796, -0x691A,0xB6F1,0x68A7,0xB64C,0x6832,0xB5A8,0x67BD,0xB505,0x6747,0xB462,0x66D0, -0xB3C0,0x6657,0xB31F,0x65DE,0xB27F,0x6564,0xB1DF,0x64E9,0xB140,0x646C,0xB0A2, -0x63EF,0xB005,0x6371,0xAF68,0x62F2,0xAECC,0x6272,0xAE31,0x61F1,0xAD97,0x616F, -0xACFD,0x60EC,0xAC65,0x6068,0xABCD,0x5FE4,0xAB36,0x5F5E,0xAAA0,0x5ED7,0xAA0A, -0x5E50,0xA976,0x5DC8,0xA8E2,0x5D3E,0xA84F,0x5CB4,0xA7BD,0x5C29,0xA72C,0x5B9D, -0xA69C,0x5B10,0xA60C,0x5A82,0xA57E,0x59F4,0xA4F0,0x5964,0xA463,0x58D4,0xA3D7, -0x5843,0xA34C,0x57B1,0xA2C2,0x571E,0xA238,0x568A,0xA1B0,0x55F6,0xA129,0x5560, -0xA0A2,0x54CA,0xA01C,0x5433,0x9F98,0x539B,0x9F14,0x5303,0x9E91,0x5269,0x9E0F, -0x51CF,0x9D8E,0x5134,0x9D0E,0x5098,0x9C8F,0x4FFB,0x9C11,0x4F5E,0x9B94,0x4EC0, -0x9B17,0x4E21,0x9A9C,0x4D81,0x9A22,0x4CE1,0x99A9,0x4C40,0x9930,0x4B9E,0x98B9, -0x4AFB,0x9843,0x4A58,0x97CE,0x49B4,0x9759,0x490F,0x96E6,0x486A,0x9674,0x47C4, -0x9603,0x471D,0x9592,0x4675,0x9523,0x45CD,0x94B5,0x4524,0x9448,0x447B,0x93DC, -0x43D1,0x9371,0x4326,0x9307,0x427A,0x929E,0x41CE,0x9236,0x4121,0x91CF,0x4074, -0x9169,0x3FC6,0x9105,0x3F17,0x90A1,0x3E68,0x903E,0x3DB8,0x8FDD,0x3D08,0x8F7D, -0x3C57,0x8F1D,0x3BA5,0x8EBF,0x3AF3,0x8E62,0x3A40,0x8E06,0x398D,0x8DAB,0x38D9, -0x8D51,0x3825,0x8CF8,0x3770,0x8CA1,0x36BA,0x8C4A,0x3604,0x8BF5,0x354E,0x8BA0, -0x3497,0x8B4D,0x33DF,0x8AFB,0x3327,0x8AAA,0x326E,0x8A5A,0x31B5,0x8A0C,0x30FC, -0x89BE,0x3042,0x8972,0x2F87,0x8927,0x2ECC,0x88DD,0x2E11,0x8894,0x2D55,0x884C, -0x2C99,0x8805,0x2BDC,0x87C0,0x2B1F,0x877B,0x2A62,0x8738,0x29A4,0x86F6,0x28E5, -0x86B6,0x2827,0x8676,0x2768,0x8637,0x26A8,0x85FA,0x25E8,0x85BE,0x2528,0x8583, -0x2467,0x8549,0x23A7,0x8511,0x22E5,0x84D9,0x2224,0x84A3,0x2162,0x846E,0x209F, -0x843A,0x1FDD,0x8407,0x1F1A,0x83D6,0x1E57,0x83A6,0x1D93,0x8377,0x1CD0,0x8349, -0x1C0C,0x831C,0x1B47,0x82F1,0x1A83,0x82C6,0x19BE,0x829D,0x18F9,0x8276,0x1833, -0x824F,0x176E,0x822A,0x16A8,0x8205,0x15E2,0x81E2,0x151C,0x81C1,0x1455,0x81A0, -0x138F,0x8181,0x12C8,0x8163,0x1201,0x8146,0x113A,0x812A,0x1073,0x8110,0x0FAB, -0x80F6,0x0EE4,0x80DE,0x0E1C,0x80C8,0x0D54,0x80B2,0x0C8C,0x809E,0x0BC4,0x808B, -0x0AFB,0x8079,0x0A33,0x8068,0x096B,0x8059,0x08A2,0x804B,0x07D9,0x803E,0x0711, -0x8032,0x0648,0x8027,0x057F,0x801E,0x04B6,0x8016,0x03ED,0x800F,0x0324,0x800A, -0x025B,0x8006,0x0192,0x8002,0x00C9,0x8001,0x7FFF,0x0000,0x7FF6,0xFCDC,0x7FD9, -0xF9B8,0x7FA7,0xF695,0x7F62,0xF374,0x7F0A,0xF055,0x7E9D,0xED38,0x7E1E,0xEA1E, -0x7D8A,0xE707,0x7CE4,0xE3F4,0x7C2A,0xE0E6,0x7B5D,0xDDDC,0x7A7D,0xDAD8,0x798A, -0xD7D9,0x7885,0xD4E1,0x776C,0xD1EF,0x7642,0xCF04,0x7505,0xCC21,0x73B6,0xC946, -0x7255,0xC673,0x70E3,0xC3A9,0x6F5F,0xC0E9,0x6DCA,0xBE32,0x6C24,0xBB85,0x6A6E, -0xB8E3,0x68A7,0xB64C,0x66D0,0xB3C0,0x64E9,0xB140,0x62F2,0xAECC,0x60EC,0xAC65, -0x5ED7,0xAA0A,0x5CB4,0xA7BD,0x5A82,0xA57E,0x5843,0xA34C,0x55F6,0xA129,0x539B, -0x9F14,0x5134,0x9D0E,0x4EC0,0x9B17,0x4C40,0x9930,0x49B4,0x9759,0x471D,0x9592, -0x447B,0x93DC,0x41CE,0x9236,0x3F17,0x90A1,0x3C57,0x8F1D,0x398D,0x8DAB,0x36BA, -0x8C4A,0x33DF,0x8AFB,0x30FC,0x89BE,0x2E11,0x8894,0x2B1F,0x877B,0x2827,0x8676, -0x2528,0x8583,0x2224,0x84A3,0x1F1A,0x83D6,0x1C0C,0x831C,0x18F9,0x8276,0x15E2, -0x81E2,0x12C8,0x8163,0x0FAB,0x80F6,0x0C8C,0x809E,0x096B,0x8059,0x0648,0x8027, -0x0324,0x800A,0x7FFF,0x0000,0x7F62,0xF374,0x7D8A,0xE707,0x7A7D,0xDAD8,0x7642, -0xCF04,0x70E3,0xC3A9,0x6A6E,0xB8E3,0x62F2,0xAECC,0x5A82,0xA57E,0x5134,0x9D0E, -0x471D,0x9592,0x3C57,0x8F1D,0x30FC,0x89BE,0x2528,0x8583,0x18F9,0x8276,0x0C8C, -0x809E,0x7FFF,0x0000,0x7642,0xCF04,0x5A82,0xA57E,0x30FC,0x89BE,}; - -q15_t rearranged_twiddle_stride2_1024_q15[680]={ -0x7FFF,0x0000,0x7FFE,0xFE6E,0x7FF6,0xFCDC,0x7FEA,0xFB4A,0x7FD9,0xF9B8,0x7FC2, -0xF827,0x7FA7,0xF695,0x7F87,0xF505,0x7F62,0xF374,0x7F38,0xF1E4,0x7F0A,0xF055, -0x7ED6,0xEEC6,0x7E9D,0xED38,0x7E60,0xEBAB,0x7E1E,0xEA1E,0x7DD6,0xE892,0x7D8A, -0xE707,0x7D3A,0xE57D,0x7CE4,0xE3F4,0x7C89,0xE26D,0x7C2A,0xE0E6,0x7BC6,0xDF61, -0x7B5D,0xDDDC,0x7AEF,0xDC59,0x7A7D,0xDAD8,0x7A06,0xD958,0x798A,0xD7D9,0x790A, -0xD65C,0x7885,0xD4E1,0x77FB,0xD367,0x776C,0xD1EF,0x76D9,0xD079,0x7642,0xCF04, -0x75A6,0xCD92,0x7505,0xCC21,0x7460,0xCAB2,0x73B6,0xC946,0x7308,0xC7DB,0x7255, -0xC673,0x719E,0xC50D,0x70E3,0xC3A9,0x7023,0xC248,0x6F5F,0xC0E9,0x6E97,0xBF8C, -0x6DCA,0xBE32,0x6CF9,0xBCDA,0x6C24,0xBB85,0x6B4B,0xBA33,0x6A6E,0xB8E3,0x698C, -0xB796,0x68A7,0xB64C,0x67BD,0xB505,0x66D0,0xB3C0,0x65DE,0xB27F,0x64E9,0xB140, -0x63EF,0xB005,0x62F2,0xAECC,0x61F1,0xAD97,0x60EC,0xAC65,0x5FE4,0xAB36,0x5ED7, -0xAA0A,0x5DC8,0xA8E2,0x5CB4,0xA7BD,0x5B9D,0xA69C,0x5A82,0xA57E,0x5964,0xA463, -0x5843,0xA34C,0x571E,0xA238,0x55F6,0xA129,0x54CA,0xA01C,0x539B,0x9F14,0x5269, -0x9E0F,0x5134,0x9D0E,0x4FFB,0x9C11,0x4EC0,0x9B17,0x4D81,0x9A22,0x4C40,0x9930, -0x4AFB,0x9843,0x49B4,0x9759,0x486A,0x9674,0x471D,0x9592,0x45CD,0x94B5,0x447B, -0x93DC,0x4326,0x9307,0x41CE,0x9236,0x4074,0x9169,0x3F17,0x90A1,0x3DB8,0x8FDD, -0x3C57,0x8F1D,0x3AF3,0x8E62,0x398D,0x8DAB,0x3825,0x8CF8,0x36BA,0x8C4A,0x354E, -0x8BA0,0x33DF,0x8AFB,0x326E,0x8A5A,0x30FC,0x89BE,0x2F87,0x8927,0x2E11,0x8894, -0x2C99,0x8805,0x2B1F,0x877B,0x29A4,0x86F6,0x2827,0x8676,0x26A8,0x85FA,0x2528, -0x8583,0x23A7,0x8511,0x2224,0x84A3,0x209F,0x843A,0x1F1A,0x83D6,0x1D93,0x8377, -0x1C0C,0x831C,0x1A83,0x82C6,0x18F9,0x8276,0x176E,0x822A,0x15E2,0x81E2,0x1455, -0x81A0,0x12C8,0x8163,0x113A,0x812A,0x0FAB,0x80F6,0x0E1C,0x80C8,0x0C8C,0x809E, -0x0AFB,0x8079,0x096B,0x8059,0x07D9,0x803E,0x0648,0x8027,0x04B6,0x8016,0x0324, -0x800A,0x0192,0x8002,0x0000,0x8000,0xFE6E,0x8002,0xFCDC,0x800A,0xFB4A,0x8016, -0xF9B8,0x8027,0xF827,0x803E,0xF695,0x8059,0xF505,0x8079,0xF374,0x809E,0xF1E4, -0x80C8,0xF055,0x80F6,0xEEC6,0x812A,0xED38,0x8163,0xEBAB,0x81A0,0xEA1E,0x81E2, -0xE892,0x822A,0xE707,0x8276,0xE57D,0x82C6,0xE3F4,0x831C,0xE26D,0x8377,0xE0E6, -0x83D6,0xDF61,0x843A,0xDDDC,0x84A3,0xDC59,0x8511,0xDAD8,0x8583,0xD958,0x85FA, -0xD7D9,0x8676,0xD65C,0x86F6,0xD4E1,0x877B,0xD367,0x8805,0xD1EF,0x8894,0xD079, -0x8927,0xCF04,0x89BE,0xCD92,0x8A5A,0xCC21,0x8AFB,0xCAB2,0x8BA0,0xC946,0x8C4A, -0xC7DB,0x8CF8,0xC673,0x8DAB,0xC50D,0x8E62,0xC3A9,0x8F1D,0xC248,0x8FDD,0xC0E9, -0x90A1,0xBF8C,0x9169,0xBE32,0x9236,0xBCDA,0x9307,0xBB85,0x93DC,0xBA33,0x94B5, -0xB8E3,0x9592,0xB796,0x9674,0xB64C,0x9759,0xB505,0x9843,0xB3C0,0x9930,0xB27F, -0x9A22,0xB140,0x9B17,0xB005,0x9C11,0xAECC,0x9D0E,0xAD97,0x9E0F,0xAC65,0x9F14, -0xAB36,0xA01C,0xAA0A,0xA129,0xA8E2,0xA238,0xA7BD,0xA34C,0xA69C,0xA463,0xA57E, -0xA57E,0xA463,0xA69C,0xA34C,0xA7BD,0xA238,0xA8E2,0xA129,0xAA0A,0xA01C,0xAB36, -0x9F14,0xAC65,0x9E0F,0xAD97,0x9D0E,0xAECC,0x9C11,0xB005,0x9B17,0xB140,0x9A22, -0xB27F,0x9930,0xB3C0,0x9843,0xB505,0x9759,0xB64C,0x9674,0xB796,0x9592,0xB8E3, -0x94B5,0xBA33,0x93DC,0xBB85,0x9307,0xBCDA,0x9236,0xBE32,0x9169,0xBF8C,0x90A1, -0xC0E9,0x8FDD,0xC248,0x8F1D,0xC3A9,0x8E62,0xC50D,0x8DAB,0xC673,0x8CF8,0xC7DB, -0x8C4A,0xC946,0x8BA0,0xCAB2,0x8AFB,0xCC21,0x8A5A,0xCD92,0x89BE,0xCF04,0x8927, -0xD079,0x8894,0xD1EF,0x8805,0xD367,0x877B,0xD4E1,0x86F6,0xD65C,0x8676,0xD7D9, -0x85FA,0xD958,0x8583,0xDAD8,0x8511,0xDC59,0x84A3,0xDDDC,0x843A,0xDF61,0x83D6, -0xE0E6,0x8377,0xE26D,0x831C,0xE3F4,0x82C6,0xE57D,0x8276,0xE707,0x822A,0xE892, -0x81E2,0xEA1E,0x81A0,0xEBAB,0x8163,0xED38,0x812A,0xEEC6,0x80F6,0xF055,0x80C8, -0xF1E4,0x809E,0xF374,0x8079,0xF505,0x8059,0xF695,0x803E,0xF827,0x8027,0xF9B8, -0x8016,0xFB4A,0x800A,0xFCDC,0x8002,0xFE6E,0x7FFF,0x0000,0x7FD9,0xF9B8,0x7F62, -0xF374,0x7E9D,0xED38,0x7D8A,0xE707,0x7C2A,0xE0E6,0x7A7D,0xDAD8,0x7885,0xD4E1, -0x7642,0xCF04,0x73B6,0xC946,0x70E3,0xC3A9,0x6DCA,0xBE32,0x6A6E,0xB8E3,0x66D0, -0xB3C0,0x62F2,0xAECC,0x5ED7,0xAA0A,0x5A82,0xA57E,0x55F6,0xA129,0x5134,0x9D0E, -0x4C40,0x9930,0x471D,0x9592,0x41CE,0x9236,0x3C57,0x8F1D,0x36BA,0x8C4A,0x30FC, -0x89BE,0x2B1F,0x877B,0x2528,0x8583,0x1F1A,0x83D6,0x18F9,0x8276,0x12C8,0x8163, -0x0C8C,0x809E,0x0648,0x8027,0x0000,0x8000,0xF9B8,0x8027,0xF374,0x809E,0xED38, -0x8163,0xE707,0x8276,0xE0E6,0x83D6,0xDAD8,0x8583,0xD4E1,0x877B,0xCF04,0x89BE, -0xC946,0x8C4A,0xC3A9,0x8F1D,0xBE32,0x9236,0xB8E3,0x9592,0xB3C0,0x9930,0xAECC, -0x9D0E,0xAA0A,0xA129,0xA57E,0xA57E,0xA129,0xAA0A,0x9D0E,0xAECC,0x9930,0xB3C0, -0x9592,0xB8E3,0x9236,0xBE32,0x8F1D,0xC3A9,0x8C4A,0xC946,0x89BE,0xCF04,0x877B, -0xD4E1,0x8583,0xDAD8,0x83D6,0xE0E6,0x8276,0xE707,0x8163,0xED38,0x809E,0xF374, -0x8027,0xF9B8,0x7FFF,0x0000,0x7D8A,0xE707,0x7642,0xCF04,0x6A6E,0xB8E3,0x5A82, -0xA57E,0x471D,0x9592,0x30FC,0x89BE,0x18F9,0x8276,0x0000,0x8000,0xE707,0x8276, -0xCF04,0x89BE,0xB8E3,0x9592,0xA57E,0xA57E,0x9592,0xB8E3,0x89BE,0xCF04,0x8276, -0xE707,0x7FFF,0x0000,0x5A82,0xA57E,0x0000,0x8000,0xA57E,0xA57E,}; - -q15_t rearranged_twiddle_stride3_1024_q15[680]={ -0x7FFF,0x0000,0x7FFA,0xFDA5,0x7FEA,0xFB4A,0x7FCE,0xF8EF,0x7FA7,0xF695,0x7F75, -0xF43C,0x7F38,0xF1E4,0x7EF0,0xEF8D,0x7E9D,0xED38,0x7E3F,0xEAE4,0x7DD6,0xE892, -0x7D63,0xE642,0x7CE4,0xE3F4,0x7C5A,0xE1A9,0x7BC6,0xDF61,0x7B27,0xDD1B,0x7A7D, -0xDAD8,0x79C9,0xD898,0x790A,0xD65C,0x7840,0xD424,0x776C,0xD1EF,0x768E,0xCFBE, -0x75A6,0xCD92,0x74B3,0xCB69,0x73B6,0xC946,0x72AF,0xC727,0x719E,0xC50D,0x7083, -0xC2F8,0x6F5F,0xC0E9,0x6E31,0xBEDF,0x6CF9,0xBCDA,0x6BB8,0xBADC,0x6A6E,0xB8E3, -0x691A,0xB6F1,0x67BD,0xB505,0x6657,0xB31F,0x64E9,0xB140,0x6371,0xAF68,0x61F1, -0xAD97,0x6068,0xABCD,0x5ED7,0xAA0A,0x5D3E,0xA84F,0x5B9D,0xA69C,0x59F4,0xA4F0, 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-0xF055,0x80C8,0xF1E4,0x809E,0xF374,0x8079,0xF505,0x8059,0xF695,0x803E,0xF827, -0x8027,0xF9B8,0x8016,0xFB4A,0x800A,0xFCDC,0x8002,0xFE6E,0x7FFF,0x0000,0x7FD9, -0xF9B8,0x7F62,0xF374,0x7E9D,0xED38,0x7D8A,0xE707,0x7C2A,0xE0E6,0x7A7D,0xDAD8, -0x7885,0xD4E1,0x7642,0xCF04,0x73B6,0xC946,0x70E3,0xC3A9,0x6DCA,0xBE32,0x6A6E, -0xB8E3,0x66D0,0xB3C0,0x62F2,0xAECC,0x5ED7,0xAA0A,0x5A82,0xA57E,0x55F6,0xA129, -0x5134,0x9D0E,0x4C40,0x9930,0x471D,0x9592,0x41CE,0x9236,0x3C57,0x8F1D,0x36BA, -0x8C4A,0x30FC,0x89BE,0x2B1F,0x877B,0x2528,0x8583,0x1F1A,0x83D6,0x18F9,0x8276, -0x12C8,0x8163,0x0C8C,0x809E,0x0648,0x8027,0x0000,0x8000,0xF9B8,0x8027,0xF374, -0x809E,0xED38,0x8163,0xE707,0x8276,0xE0E6,0x83D6,0xDAD8,0x8583,0xD4E1,0x877B, -0xCF04,0x89BE,0xC946,0x8C4A,0xC3A9,0x8F1D,0xBE32,0x9236,0xB8E3,0x9592,0xB3C0, -0x9930,0xAECC,0x9D0E,0xAA0A,0xA129,0xA57E,0xA57E,0xA129,0xAA0A,0x9D0E,0xAECC, -0x9930,0xB3C0,0x9592,0xB8E3,0x9236,0xBE32,0x8F1D,0xC3A9,0x8C4A,0xC946,0x89BE, -0xCF04,0x877B,0xD4E1,0x8583,0xDAD8,0x83D6,0xE0E6,0x8276,0xE707,0x8163,0xED38, -0x809E,0xF374,0x8027,0xF9B8,0x7FFF,0x0000,0x7D8A,0xE707,0x7642,0xCF04,0x6A6E, -0xB8E3,0x5A82,0xA57E,0x471D,0x9592,0x30FC,0x89BE,0x18F9,0x8276,0x0000,0x8000, -0xE707,0x8276,0xCF04,0x89BE,0xB8E3,0x9592,0xA57E,0xA57E,0x9592,0xB8E3,0x89BE, -0xCF04,0x8276,0xE707,0x7FFF,0x0000,0x5A82,0xA57E,0x0000,0x8000,0xA57E,0xA57E,}; - -q15_t rearranged_twiddle_stride3_4096_q15[2728]={ -0x7FFF,0x0000,0x7FFF,0xFF69,0x7FFF,0xFED2,0x7FFD,0xFE3C,0x7FFA,0xFDA5,0x7FF7, -0xFD0E,0x7FF4,0xFC77,0x7FEF,0xFBE1,0x7FEA,0xFB4A,0x7FE4,0xFAB3,0x7FDD,0xFA1D, -0x7FD6,0xF986,0x7FCE,0xF8EF,0x7FC5,0xF859,0x7FBC,0xF7C2,0x7FB2,0xF72C,0x7FA7, -0xF695,0x7F9C,0xF5FF,0x7F90,0xF569,0x7F83,0xF4D3,0x7F75,0xF43C,0x7F67,0xF3A6, -0x7F58,0xF310,0x7F49,0xF27A,0x7F38,0xF1E4,0x7F27,0xF14E,0x7F16,0xF0B9,0x7F03, -0xF023,0x7EF0,0xEF8D,0x7EDD,0xEEF8,0x7EC8,0xEE62,0x7EB3,0xEDCD,0x7E9D,0xED38, -0x7E87,0xECA3,0x7E70,0xEC0E,0x7E58,0xEB79,0x7E3F,0xEAE4,0x7E26,0xEA4F,0x7E0C, -0xE9BB,0x7DF2,0xE926,0x7DD6,0xE892,0x7DBA,0xE7FE,0x7D9E,0xE76A,0x7D81,0xE6D6, -0x7D63,0xE642,0x7D44,0xE5AF,0x7D25,0xE51B,0x7D05,0xE488,0x7CE4,0xE3F4,0x7CC2, -0xE361,0x7CA0,0xE2CF,0x7C7E,0xE23C,0x7C5A,0xE1A9,0x7C36,0xE117,0x7C11,0xE085, -0x7BEC,0xDFF2,0x7BC6,0xDF61,0x7B9F,0xDECF,0x7B78,0xDE3D,0x7B50,0xDDAC,0x7B27, -0xDD1B,0x7AFD,0xDC8A,0x7AD3,0xDBF9,0x7AA8,0xDB68,0x7A7D,0xDAD8,0x7A51,0xDA48, -0x7A24,0xD9B8,0x79F7,0xD928,0x79C9,0xD898,0x799A,0xD809,0x796A,0xD77A,0x793A, -0xD6EB,0x790A,0xD65C,0x78D8,0xD5CE,0x78A6,0xD53F,0x7874,0xD4B1,0x7840,0xD424, -0x780C,0xD396,0x77D8,0xD309,0x77A2,0xD27C,0x776C,0xD1EF,0x7736,0xD162,0x76FE, -0xD0D6,0x76C7,0xD04A,0x768E,0xCFBE,0x7655,0xCF33,0x761B,0xCEA7,0x75E1,0xCE1C, -0x75A6,0xCD92,0x756A,0xCD07,0x752D,0xCC7D,0x74F0,0xCBF3,0x74B3,0xCB69,0x7475, -0xCAE0,0x7436,0xCA57,0x73F6,0xC9CE,0x73B6,0xC946,0x7375,0xC8BE,0x7334,0xC836, -0x72F2,0xC7AE,0x72AF,0xC727,0x726C,0xC6A0,0x7228,0xC619,0x71E3,0xC593,0x719E, -0xC50D,0x7158,0xC487,0x7112,0xC402,0x70CB,0xC37D,0x7083,0xC2F8,0x703B,0xC274, -0x6FF2,0xC1F0,0x6FA9,0xC16C,0x6F5F,0xC0E9,0x6F14,0xC066,0x6EC9,0xBFE3,0x6E7D, -0xBF61,0x6E31,0xBEDF,0x6DE4,0xBE5D,0x6D96,0xBDDC,0x6D48,0xBD5B,0x6CF9,0xBCDA, -0x6CAA,0xBC5A,0x6C5A,0xBBDA,0x6C09,0xBB5B,0x6BB8,0xBADC,0x6B66,0xBA5D,0x6B14, -0xB9DF,0x6AC1,0xB961,0x6A6E,0xB8E3,0x6A1A,0xB866,0x69C5,0xB7E9,0x6970,0xB76D, -0x691A,0xB6F1,0x68C4,0xB675,0x686D,0xB5FA,0x6815,0xB57F,0x67BD,0xB505,0x6764, -0xB48B,0x670B,0xB411,0x66B2,0xB398,0x6657,0xB31F,0x65FC,0xB2A7,0x65A1,0xB22F, -0x6545,0xB1B7,0x64E9,0xB140,0x648B,0xB0C9,0x642E,0xB053,0x63D0,0xAFDD,0x6371, -0xAF68,0x6312,0xAEF3,0x62B2,0xAE7F,0x6252,0xAE0B,0x61F1,0xAD97,0x6190,0xAD24, -0x612E,0xACB1,0x60CB,0xAC3F,0x6068,0xABCD,0x6005,0xAB5C,0x5FA1,0xAAEB,0x5F3C, -0xAA7A,0x5ED7,0xAA0A,0x5E72,0xA99B,0x5E0C,0xA92C,0x5DA5,0xA8BD,0x5D3E,0xA84F, -0x5CD7,0xA7E2,0x5C6F,0xA774,0x5C06,0xA708,0x5B9D,0xA69C,0x5B34,0xA630,0x5AC9, -0xA5C5,0x5A5F,0xA55A,0x59F4,0xA4F0,0x5988,0xA486,0x591C,0xA41D,0x58B0,0xA3B4, -0x5843,0xA34C,0x57D5,0xA2E4,0x5767,0xA27D,0x56F9,0xA216,0x568A,0xA1B0,0x561B, -0xA14A,0x55AB,0xA0E5,0x553B,0xA080,0x54CA,0xA01C,0x5459,0x9FB9,0x53E7,0x9F56, -0x5375,0x9EF3,0x5303,0x9E91,0x5290,0x9E2F,0x521C,0x9DCE,0x51A8,0x9D6E,0x5134, -0x9D0E,0x50BF,0x9CAF,0x504A,0x9C50,0x4FD4,0x9BF1,0x4F5E,0x9B94,0x4EE8,0x9B36, -0x4E71,0x9ADA,0x4DF9,0x9A7E,0x4D81,0x9A22,0x4D09,0x99C7,0x4C91,0x996D,0x4C17, -0x9913,0x4B9E,0x98B9,0x4B24,0x9860,0x4AAA,0x9808,0x4A2F,0x97B0,0x49B4,0x9759, -0x4939,0x9703,0x48BD,0x96AD,0x4840,0x9657,0x47C4,0x9603,0x4747,0x95AE,0x46C9, -0x955B,0x464B,0x9508,0x45CD,0x94B5,0x454F,0x9463,0x44D0,0x9412,0x4450,0x93C1, -0x43D1,0x9371,0x4351,0x9321,0x42D0,0x92D2,0x424F,0x9284,0x41CE,0x9236,0x414D, -0x91E9,0x40CB,0x919C,0x4048,0x9150,0x3FC6,0x9105,0x3F43,0x90BA,0x3EC0,0x9070, -0x3E3C,0x9026,0x3DB8,0x8FDD,0x3D34,0x8F95,0x3CAF,0x8F4D,0x3C2A,0x8F06,0x3BA5, -0x8EBF,0x3B20,0x8E79,0x3A9A,0x8E34,0x3A13,0x8DEF,0x398D,0x8DAB,0x3906,0x8D67, -0x387F,0x8D24,0x37F7,0x8CE2,0x3770,0x8CA1,0x36E8,0x8C60,0x365F,0x8C1F,0x35D7, -0x8BDF,0x354E,0x8BA0,0x34C4,0x8B62,0x343B,0x8B24,0x33B1,0x8AE7,0x3327,0x8AAA, -0x329D,0x8A6E,0x3212,0x8A33,0x3187,0x89F8,0x30FC,0x89BE,0x3070,0x8985,0x2FE5, -0x894C,0x2F59,0x8914,0x2ECC,0x88DD,0x2E40,0x88A6,0x2DB3,0x8870,0x2D26,0x883A, -0x2C99,0x8805,0x2C0C,0x87D1,0x2B7E,0x879D,0x2AF0,0x876B,0x2A62,0x8738,0x29D3, -0x8707,0x2945,0x86D6,0x28B6,0x86A5,0x2827,0x8676,0x2797,0x8647,0x2708,0x8619, -0x2678,0x85EB,0x25E8,0x85BE,0x2558,0x8592,0x24C8,0x8566,0x2437,0x853B,0x23A7, -0x8511,0x2316,0x84E7,0x2284,0x84BE,0x21F3,0x8496,0x2162,0x846E,0x20D0,0x8447, -0x203E,0x8421,0x1FAC,0x83FB,0x1F1A,0x83D6,0x1E88,0x83B2,0x1DF5,0x838E,0x1D62, -0x836B,0x1CD0,0x8349,0x1C3D,0x8327,0x1BA9,0x8306,0x1B16,0x82E6,0x1A83,0x82C6, -0x19EF,0x82A8,0x195B,0x8289,0x18C7,0x826C,0x1833,0x824F,0x179F,0x8233,0x170B, -0x8217,0x1677,0x81FD,0x15E2,0x81E2,0x154D,0x81C9,0x14B9,0x81B0,0x1424,0x8198, -0x138F,0x8181,0x12FA,0x816A,0x1265,0x8154,0x11CF,0x813F,0x113A,0x812A,0x10A4, -0x8116,0x100F,0x8103,0x0F79,0x80F0,0x0EE4,0x80DE,0x0E4E,0x80CD,0x0DB8,0x80BD, -0x0D22,0x80AD,0x0C8C,0x809E,0x0BF6,0x808F,0x0B60,0x8082,0x0AC9,0x8075,0x0A33, -0x8068,0x099D,0x805D,0x0906,0x8052,0x0870,0x8047,0x07D9,0x803E,0x0743,0x8035, -0x06AC,0x802D,0x0616,0x8025,0x057F,0x801E,0x04E8,0x8018,0x0452,0x8013,0x03BB, -0x800E,0x0324,0x800A,0x028D,0x8007,0x01F7,0x8004,0x0160,0x8002,0x00C9,0x8001, -0x0032,0x8000,0xFF9B,0x8000,0xFF05,0x8001,0xFE6E,0x8002,0xFDD7,0x8005,0xFD40, -0x8008,0xFCAA,0x800B,0xFC13,0x800F,0xFB7C,0x8014,0xFAE5,0x801A,0xFA4F,0x8020, -0xF9B8,0x8027,0xF922,0x802F,0xF88B,0x8038,0xF7F4,0x8041,0xF75E,0x804B,0xF6C8, -0x8055,0xF631,0x8060,0xF59B,0x806C,0xF505,0x8079,0xF46E,0x8086,0xF3D8,0x8094, -0xF342,0x80A3,0xF2AC,0x80B2,0xF216,0x80C2,0xF180,0x80D3,0xF0EB,0x80E4,0xF055, -0x80F6,0xEFBF,0x8109,0xEF2A,0x811D,0xEE94,0x8131,0xEDFF,0x8146,0xED6A,0x815B, -0xECD5,0x8172,0xEC3F,0x8188,0xEBAB,0x81A0,0xEB16,0x81B8,0xEA81,0x81D1,0xE9EC, -0x81EB,0xE958,0x8205,0xE8C4,0x8220,0xE82F,0x823C,0xE79B,0x8259,0xE707,0x8276, -0xE673,0x8293,0xE5E0,0x82B2,0xE54C,0x82D1,0xE4B9,0x82F1,0xE426,0x8311,0xE392, -0x8332,0xE2FF,0x8354,0xE26D,0x8377,0xE1DA,0x839A,0xE148,0x83BE,0xE0B5,0x83E2, -0xE023,0x8407,0xDF91,0x842D,0xDEFF,0x8454,0xDE6E,0x847B,0xDDDC,0x84A3,0xDD4B, -0x84CC,0xDCBA,0x84F5,0xDC29,0x851F,0xDB99,0x8549,0xDB08,0x8574,0xDA78,0x85A0, -0xD9E8,0x85CD,0xD958,0x85FA,0xD8C8,0x8628,0xD839,0x8656,0xD7AA,0x8686,0xD71B, -0x86B6,0xD68C,0x86E6,0xD5FD,0x8717,0xD56F,0x8749,0xD4E1,0x877B,0xD453,0x87AF, -0xD3C5,0x87E2,0xD338,0x8817,0xD2AB,0x884C,0xD21E,0x8882,0xD191,0x88B8,0xD105, -0x88EF,0xD079,0x8927,0xCFED,0x895F,0xCF61,0x8998,0xCED6,0x89D2,0xCE4B,0x8A0C, -0xCDC0,0x8A47,0xCD35,0x8A82,0xCCAB,0x8ABE,0xCC21,0x8AFB,0xCB97,0x8B39,0xCB0E, -0x8B77,0xCA85,0x8BB5,0xC9FC,0x8BF5,0xC973,0x8C35,0xC8EB,0x8C75,0xC863,0x8CB6, -0xC7DB,0x8CF8,0xC754,0x8D3B,0xC6CD,0x8D7E,0xC646,0x8DC1,0xC5C0,0x8E06,0xC53A, -0x8E4B,0xC4B4,0x8E90,0xC42E,0x8ED6,0xC3A9,0x8F1D,0xC324,0x8F65,0xC2A0,0x8FAD, -0xC21C,0x8FF5,0xC198,0x903E,0xC114,0x9088,0xC091,0x90D3,0xC00F,0x911E,0xBF8C, -0x9169,0xBF0A,0x91B6,0xBE88,0x9202,0xBE07,0x9250,0xBD86,0x929E,0xBD05,0x92EC, -0xBC85,0x933C,0xBC05,0x938B,0xBB85,0x93DC,0xBB06,0x942D,0xBA87,0x947E,0xBA09, -0x94D0,0xB98B,0x9523,0xB90D,0x9577,0xB890,0x95CA,0xB813,0x961F,0xB796,0x9674, -0xB71A,0x96C9,0xB69E,0x9720,0xB623,0x9776,0xB5A8,0x97CE,0xB52D,0x9826,0xB4B3, -0x987E,0xB439,0x98D7,0xB3C0,0x9930,0xB347,0x998B,0xB2CF,0x99E5,0xB257,0x9A40, -0xB1DF,0x9A9C,0xB168,0x9AF9,0xB0F1,0x9B55,0xB07B,0x9BB3,0xB005,0x9C11,0xAF8F, -0x9C6F,0xAF1A,0x9CCE,0xAEA5,0x9D2E,0xAE31,0x9D8E,0xADBD,0x9DEF,0xAD4A,0x9E50, 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-0x8EBF,0x3BA5,0x8FDD,0x3DB8,0x9105,0x3FC6,0x9236,0x41CE,0x9371,0x43D1,0x94B5, -0x45CD,0x9603,0x47C4,0x9759,0x49B4,0x98B9,0x4B9E,0x9A22,0x4D81,0x9B94,0x4F5E, -0x9D0E,0x5134,0x9E91,0x5303,0xA01C,0x54CA,0xA1B0,0x568A,0xA34C,0x5843,0xA4F0, -0x59F4,0xA69C,0x5B9D,0xA84F,0x5D3E,0xAA0A,0x5ED7,0xABCD,0x6068,0xAD97,0x61F1, -0xAF68,0x6371,0xB140,0x64E9,0xB31F,0x6657,0xB505,0x67BD,0xB6F1,0x691A,0xB8E3, -0x6A6E,0xBADC,0x6BB8,0xBCDA,0x6CF9,0xBEDF,0x6E31,0xC0E9,0x6F5F,0xC2F8,0x7083, -0xC50D,0x719E,0xC727,0x72AF,0xC946,0x73B6,0xCB69,0x74B3,0xCD92,0x75A6,0xCFBE, -0x768E,0xD1EF,0x776C,0xD424,0x7840,0xD65C,0x790A,0xD898,0x79C9,0xDAD8,0x7A7D, -0xDD1B,0x7B27,0xDF61,0x7BC6,0xE1A9,0x7C5A,0xE3F4,0x7CE4,0xE642,0x7D63,0xE892, -0x7DD6,0xEAE4,0x7E3F,0xED38,0x7E9D,0xEF8D,0x7EF0,0xF1E4,0x7F38,0xF43C,0x7F75, -0xF695,0x7FA7,0xF8EF,0x7FCE,0xFB4A,0x7FEA,0xFDA5,0x7FFA,0x7FFF,0x0000,0x7FA7, -0xF695,0x7E9D,0xED38,0x7CE4,0xE3F4,0x7A7D,0xDAD8,0x776C,0xD1EF,0x73B6,0xC946, -0x6F5F,0xC0E9,0x6A6E,0xB8E3,0x64E9,0xB140,0x5ED7,0xAA0A,0x5843,0xA34C,0x5134, -0x9D0E,0x49B4,0x9759,0x41CE,0x9236,0x398D,0x8DAB,0x30FC,0x89BE,0x2827,0x8676, -0x1F1A,0x83D6,0x15E2,0x81E2,0x0C8C,0x809E,0x0324,0x800A,0xF9B8,0x8027,0xF055, -0x80F6,0xE707,0x8276,0xDDDC,0x84A3,0xD4E1,0x877B,0xCC21,0x8AFB,0xC3A9,0x8F1D, -0xBB85,0x93DC,0xB3C0,0x9930,0xAC65,0x9F14,0xA57E,0xA57E,0x9F14,0xAC65,0x9930, -0xB3C0,0x93DC,0xBB85,0x8F1D,0xC3A9,0x8AFB,0xCC21,0x877B,0xD4E1,0x84A3,0xDDDC, -0x8276,0xE707,0x80F6,0xF055,0x8027,0xF9B8,0x800A,0x0324,0x809E,0x0C8C,0x81E2, -0x15E2,0x83D6,0x1F1A,0x8676,0x2827,0x89BE,0x30FC,0x8DAB,0x398D,0x9236,0x41CE, -0x9759,0x49B4,0x9D0E,0x5134,0xA34C,0x5843,0xAA0A,0x5ED7,0xB140,0x64E9,0xB8E3, -0x6A6E,0xC0E9,0x6F5F,0xC946,0x73B6,0xD1EF,0x776C,0xDAD8,0x7A7D,0xE3F4,0x7CE4, -0xED38,0x7E9D,0xF695,0x7FA7,0x7FFF,0x0000,0x7A7D,0xDAD8,0x6A6E,0xB8E3,0x5134, -0x9D0E,0x30FC,0x89BE,0x0C8C,0x809E,0xE707,0x8276,0xC3A9,0x8F1D,0xA57E,0xA57E, -0x8F1D,0xC3A9,0x8276,0xE707,0x809E,0x0C8C,0x89BE,0x30FC,0x9D0E,0x5134,0xB8E3, -0x6A6E,0xDAD8,0x7A7D,0x7FFF,0x0000,0x30FC,0x89BE,0xA57E,0xA57E,0x89BE,0x30FC,}; - -#endif - - - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */ -#endif /* defined(ARM_MATH_MVEI) */ - diff --git a/Drivers/CMSIS/DSP/Source/CommonTables/arm_mve_tables_f16.c b/Drivers/CMSIS/DSP/Source/CommonTables/arm_mve_tables_f16.c deleted file mode 100644 index 4ce395d..0000000 --- a/Drivers/CMSIS/DSP/Source/CommonTables/arm_mve_tables_f16.c +++ /dev/null @@ -1,5576 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mve_tables_f16.c - * Description: common tables like fft twiddle factors, Bitreverse, reciprocal etc - * used for MVE implementation only - * - * @version V1.10.0 - * @date 04 October 2021 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - #include "arm_math_types_f16.h" - - -#if defined(ARM_FLOAT16_SUPPORTED) - - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_16) || defined(ARM_TABLE_TWIDDLECOEF_F16_32) - -uint32_t rearranged_twiddle_tab_stride1_arr_16_f16[2]={ -0,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_16_f16[2]={ -0,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_16_f16[2]={ -0,0,}; - -float16_t rearranged_twiddle_stride1_16_f16[8]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,}; - -float16_t rearranged_twiddle_stride2_16_f16[8]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.0000000000000f,(float16_t)1.0000000000000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,}; - -float16_t rearranged_twiddle_stride3_16_f16[8]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_64) || defined(ARM_TABLE_TWIDDLECOEF_F16_128) - -uint32_t rearranged_twiddle_tab_stride1_arr_64_f16[3]={ -0,32,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_64_f16[3]={ -0,32,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_64_f16[3]={ -0,32,0,}; - -float16_t rearranged_twiddle_stride1_64_f16[40]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9951171875000f,(float16_t)0.0980224609375f, -(float16_t)0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)0.9570312500000f,(float16_t)0.2902832031250f, -(float16_t)0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.7729492187500f,(float16_t)0.6342773437500f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.6342773437500f,(float16_t)0.7729492187500f, -(float16_t)0.5556640625000f,(float16_t)0.8315429687500f, -(float16_t)0.4714355468750f,(float16_t)0.8818359375000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.2902832031250f,(float16_t)0.9570312500000f, -(float16_t)0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)0.0980224609375f,(float16_t)0.9951171875000f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,}; - -float16_t rearranged_twiddle_stride2_64_f16[40]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.5556640625000f,(float16_t)0.8315429687500f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)0.0000000000000f,(float16_t)1.0000000000000f, -(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.0000000000000f,(float16_t)1.0000000000000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,}; - -float16_t rearranged_twiddle_stride3_64_f16[40]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9570312500000f,(float16_t)0.2902832031250f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.6342773437500f,(float16_t)0.7729492187500f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.0980224609375f,(float16_t)0.9951171875000f, -(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f, -(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f, -(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f, -(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_256) || defined(ARM_TABLE_TWIDDLECOEF_F16_512) - -uint32_t rearranged_twiddle_tab_stride1_arr_256_f16[4]={ -0,128,160,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_256_f16[4]={ -0,128,160,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_256_f16[4]={ -0,128,160,0,}; - -float16_t rearranged_twiddle_stride1_256_f16[168]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9995117187500f,(float16_t)0.0245361328125f, -(float16_t)0.9990234375000f,(float16_t)0.0490722656250f, -(float16_t)0.9970703125000f,(float16_t)0.0735473632812f, -(float16_t)0.9951171875000f,(float16_t)0.0980224609375f, -(float16_t)0.9926757812500f,(float16_t)0.1224365234375f, -(float16_t)0.9892578125000f,(float16_t)0.1467285156250f, -(float16_t)0.9853515625000f,(float16_t)0.1710205078125f, -(float16_t)0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)0.9755859375000f,(float16_t)0.2191162109375f, -(float16_t)0.9702148437500f,(float16_t)0.2429199218750f, -(float16_t)0.9638671875000f,(float16_t)0.2666015625000f, -(float16_t)0.9570312500000f,(float16_t)0.2902832031250f, -(float16_t)0.9497070312500f,(float16_t)0.3137207031250f, -(float16_t)0.9414062500000f,(float16_t)0.3369140625000f, -(float16_t)0.9331054687500f,(float16_t)0.3598632812500f, -(float16_t)0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)0.9140625000000f,(float16_t)0.4052734375000f, -(float16_t)0.9038085937500f,(float16_t)0.4274902343750f, -(float16_t)0.8930664062500f,(float16_t)0.4497070312500f, -(float16_t)0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)0.8701171875000f,(float16_t)0.4929199218750f, -(float16_t)0.8579101562500f,(float16_t)0.5141601562500f, -(float16_t)0.8447265625000f,(float16_t)0.5351562500000f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.8173828125000f,(float16_t)0.5756835937500f, -(float16_t)0.8032226562500f,(float16_t)0.5957031250000f, -(float16_t)0.7885742187500f,(float16_t)0.6152343750000f, -(float16_t)0.7729492187500f,(float16_t)0.6342773437500f, -(float16_t)0.7573242187500f,(float16_t)0.6533203125000f, -(float16_t)0.7407226562500f,(float16_t)0.6713867187500f, -(float16_t)0.7241210937500f,(float16_t)0.6894531250000f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.6894531250000f,(float16_t)0.7241210937500f, -(float16_t)0.6713867187500f,(float16_t)0.7407226562500f, -(float16_t)0.6533203125000f,(float16_t)0.7573242187500f, -(float16_t)0.6342773437500f,(float16_t)0.7729492187500f, -(float16_t)0.6152343750000f,(float16_t)0.7885742187500f, -(float16_t)0.5957031250000f,(float16_t)0.8032226562500f, -(float16_t)0.5756835937500f,(float16_t)0.8173828125000f, -(float16_t)0.5556640625000f,(float16_t)0.8315429687500f, -(float16_t)0.5351562500000f,(float16_t)0.8447265625000f, -(float16_t)0.5141601562500f,(float16_t)0.8579101562500f, -(float16_t)0.4929199218750f,(float16_t)0.8701171875000f, -(float16_t)0.4714355468750f,(float16_t)0.8818359375000f, -(float16_t)0.4497070312500f,(float16_t)0.8930664062500f, -(float16_t)0.4274902343750f,(float16_t)0.9038085937500f, -(float16_t)0.4052734375000f,(float16_t)0.9140625000000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.3598632812500f,(float16_t)0.9331054687500f, -(float16_t)0.3369140625000f,(float16_t)0.9414062500000f, -(float16_t)0.3137207031250f,(float16_t)0.9497070312500f, -(float16_t)0.2902832031250f,(float16_t)0.9570312500000f, -(float16_t)0.2666015625000f,(float16_t)0.9638671875000f, -(float16_t)0.2429199218750f,(float16_t)0.9702148437500f, -(float16_t)0.2191162109375f,(float16_t)0.9755859375000f, -(float16_t)0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)0.1710205078125f,(float16_t)0.9853515625000f, -(float16_t)0.1467285156250f,(float16_t)0.9892578125000f, -(float16_t)0.1224365234375f,(float16_t)0.9926757812500f, -(float16_t)0.0980224609375f,(float16_t)0.9951171875000f, -(float16_t)0.0735473632812f,(float16_t)0.9970703125000f, -(float16_t)0.0490722656250f,(float16_t)0.9990234375000f, -(float16_t)0.0245361328125f,(float16_t)0.9995117187500f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9951171875000f,(float16_t)0.0980224609375f, -(float16_t)0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)0.9570312500000f,(float16_t)0.2902832031250f, -(float16_t)0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.7729492187500f,(float16_t)0.6342773437500f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.6342773437500f,(float16_t)0.7729492187500f, -(float16_t)0.5556640625000f,(float16_t)0.8315429687500f, -(float16_t)0.4714355468750f,(float16_t)0.8818359375000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.2902832031250f,(float16_t)0.9570312500000f, -(float16_t)0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)0.0980224609375f,(float16_t)0.9951171875000f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,}; - -float16_t rearranged_twiddle_stride2_256_f16[168]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9990234375000f,(float16_t)0.0490722656250f, -(float16_t)0.9951171875000f,(float16_t)0.0980224609375f, -(float16_t)0.9892578125000f,(float16_t)0.1467285156250f, -(float16_t)0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)0.9702148437500f,(float16_t)0.2429199218750f, -(float16_t)0.9570312500000f,(float16_t)0.2902832031250f, -(float16_t)0.9414062500000f,(float16_t)0.3369140625000f, -(float16_t)0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)0.9038085937500f,(float16_t)0.4274902343750f, -(float16_t)0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)0.8579101562500f,(float16_t)0.5141601562500f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.8032226562500f,(float16_t)0.5957031250000f, -(float16_t)0.7729492187500f,(float16_t)0.6342773437500f, -(float16_t)0.7407226562500f,(float16_t)0.6713867187500f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.6713867187500f,(float16_t)0.7407226562500f, -(float16_t)0.6342773437500f,(float16_t)0.7729492187500f, -(float16_t)0.5957031250000f,(float16_t)0.8032226562500f, -(float16_t)0.5556640625000f,(float16_t)0.8315429687500f, -(float16_t)0.5141601562500f,(float16_t)0.8579101562500f, -(float16_t)0.4714355468750f,(float16_t)0.8818359375000f, -(float16_t)0.4274902343750f,(float16_t)0.9038085937500f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.3369140625000f,(float16_t)0.9414062500000f, -(float16_t)0.2902832031250f,(float16_t)0.9570312500000f, -(float16_t)0.2429199218750f,(float16_t)0.9702148437500f, -(float16_t)0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)0.1467285156250f,(float16_t)0.9892578125000f, -(float16_t)0.0980224609375f,(float16_t)0.9951171875000f, -(float16_t)0.0490722656250f,(float16_t)0.9990234375000f, -(float16_t)0.0000000000000f,(float16_t)1.0000000000000f, -(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f, -(float16_t)-0.0980224609375f,(float16_t)0.9951171875000f, -(float16_t)-0.1467285156250f,(float16_t)0.9892578125000f, -(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)-0.2429199218750f,(float16_t)0.9702148437500f, -(float16_t)-0.2902832031250f,(float16_t)0.9570312500000f, -(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f, -(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)-0.4274902343750f,(float16_t)0.9038085937500f, -(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f, -(float16_t)-0.5141601562500f,(float16_t)0.8579101562500f, -(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f, -(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f, -(float16_t)-0.6342773437500f,(float16_t)0.7729492187500f, -(float16_t)-0.6713867187500f,(float16_t)0.7407226562500f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.7407226562500f,(float16_t)0.6713867187500f, -(float16_t)-0.7729492187500f,(float16_t)0.6342773437500f, -(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f, -(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)-0.8579101562500f,(float16_t)0.5141601562500f, -(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)-0.9038085937500f,(float16_t)0.4274902343750f, -(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f, -(float16_t)-0.9570312500000f,(float16_t)0.2902832031250f, -(float16_t)-0.9702148437500f,(float16_t)0.2429199218750f, -(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)-0.9892578125000f,(float16_t)0.1467285156250f, -(float16_t)-0.9951171875000f,(float16_t)0.0980224609375f, -(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.5556640625000f,(float16_t)0.8315429687500f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)0.0000000000000f,(float16_t)1.0000000000000f, -(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f, -(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)0.0000000000000f,(float16_t)1.0000000000000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,}; - -float16_t rearranged_twiddle_stride3_256_f16[168]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9970703125000f,(float16_t)0.0735473632812f, -(float16_t)0.9892578125000f,(float16_t)0.1467285156250f, -(float16_t)0.9755859375000f,(float16_t)0.2191162109375f, -(float16_t)0.9570312500000f,(float16_t)0.2902832031250f, -(float16_t)0.9331054687500f,(float16_t)0.3598632812500f, -(float16_t)0.9038085937500f,(float16_t)0.4274902343750f, -(float16_t)0.8701171875000f,(float16_t)0.4929199218750f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.7885742187500f,(float16_t)0.6152343750000f, -(float16_t)0.7407226562500f,(float16_t)0.6713867187500f, -(float16_t)0.6894531250000f,(float16_t)0.7241210937500f, -(float16_t)0.6342773437500f,(float16_t)0.7729492187500f, -(float16_t)0.5756835937500f,(float16_t)0.8173828125000f, -(float16_t)0.5141601562500f,(float16_t)0.8579101562500f, -(float16_t)0.4497070312500f,(float16_t)0.8930664062500f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.3137207031250f,(float16_t)0.9497070312500f, -(float16_t)0.2429199218750f,(float16_t)0.9702148437500f, -(float16_t)0.1710205078125f,(float16_t)0.9853515625000f, -(float16_t)0.0980224609375f,(float16_t)0.9951171875000f, -(float16_t)0.0245361328125f,(float16_t)0.9995117187500f, -(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f, -(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f, -(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f, -(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f, -(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f, -(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f, -(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f, -(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f, -(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f, -(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f, -(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f, -(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f, -(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f, -(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f, -(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f, -(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f, -(float16_t)-0.9995117187500f,(float16_t)-0.0245361328125f, -(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f, -(float16_t)-0.9853515625000f,(float16_t)-0.1710205078125f, -(float16_t)-0.9702148437500f,(float16_t)-0.2429199218750f, -(float16_t)-0.9497070312500f,(float16_t)-0.3137207031250f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f, -(float16_t)-0.8930664062500f,(float16_t)-0.4497070312500f, -(float16_t)-0.8579101562500f,(float16_t)-0.5141601562500f, -(float16_t)-0.8173828125000f,(float16_t)-0.5756835937500f, -(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f, -(float16_t)-0.7241210937500f,(float16_t)-0.6894531250000f, -(float16_t)-0.6713867187500f,(float16_t)-0.7407226562500f, -(float16_t)-0.6152343750000f,(float16_t)-0.7885742187500f, -(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f, -(float16_t)-0.4929199218750f,(float16_t)-0.8701171875000f, -(float16_t)-0.4274902343750f,(float16_t)-0.9038085937500f, -(float16_t)-0.3598632812500f,(float16_t)-0.9331054687500f, -(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f, -(float16_t)-0.2191162109375f,(float16_t)-0.9755859375000f, -(float16_t)-0.1467285156250f,(float16_t)-0.9892578125000f, -(float16_t)-0.0735473632812f,(float16_t)-0.9970703125000f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9570312500000f,(float16_t)0.2902832031250f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.6342773437500f,(float16_t)0.7729492187500f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.0980224609375f,(float16_t)0.9951171875000f, -(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f, -(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f, -(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f, -(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_1024) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048) - -uint32_t rearranged_twiddle_tab_stride1_arr_1024_f16[5]={ -0,512,640,672,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_1024_f16[5]={ -0,512,640,672,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_1024_f16[5]={ -0,512,640,672,0,}; - -float16_t rearranged_twiddle_stride1_1024_f16[680]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)1.0000000000000f,(float16_t)0.0061340332031f, -(float16_t)1.0000000000000f,(float16_t)0.0122680664062f, -(float16_t)1.0000000000000f,(float16_t)0.0184020996094f, -(float16_t)0.9995117187500f,(float16_t)0.0245361328125f, -(float16_t)0.9995117187500f,(float16_t)0.0306701660156f, -(float16_t)0.9995117187500f,(float16_t)0.0368041992188f, -(float16_t)0.9990234375000f,(float16_t)0.0429382324219f, -(float16_t)0.9990234375000f,(float16_t)0.0490722656250f, -(float16_t)0.9985351562500f,(float16_t)0.0552062988281f, -(float16_t)0.9980468750000f,(float16_t)0.0613098144531f, -(float16_t)0.9975585937500f,(float16_t)0.0674438476562f, -(float16_t)0.9970703125000f,(float16_t)0.0735473632812f, -(float16_t)0.9965820312500f,(float16_t)0.0797119140625f, -(float16_t)0.9960937500000f,(float16_t)0.0858154296875f, -(float16_t)0.9956054687500f,(float16_t)0.0919189453125f, -(float16_t)0.9951171875000f,(float16_t)0.0980224609375f, -(float16_t)0.9946289062500f,(float16_t)0.1041259765625f, -(float16_t)0.9941406250000f,(float16_t)0.1102294921875f, -(float16_t)0.9931640625000f,(float16_t)0.1163330078125f, -(float16_t)0.9926757812500f,(float16_t)0.1224365234375f, -(float16_t)0.9916992187500f,(float16_t)0.1285400390625f, -(float16_t)0.9907226562500f,(float16_t)0.1345214843750f, -(float16_t)0.9902343750000f,(float16_t)0.1406250000000f, -(float16_t)0.9892578125000f,(float16_t)0.1467285156250f, -(float16_t)0.9882812500000f,(float16_t)0.1528320312500f, -(float16_t)0.9873046875000f,(float16_t)0.1588134765625f, -(float16_t)0.9863281250000f,(float16_t)0.1649169921875f, -(float16_t)0.9853515625000f,(float16_t)0.1710205078125f, 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-(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f, -(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f, -(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f, -(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,}; - -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096) || defined(ARM_TABLE_TWIDDLECOEF_F16_8192) - -uint32_t rearranged_twiddle_tab_stride1_arr_4096_f16[6]={ -0,2048,2560,2688,2720,0,}; - -uint32_t rearranged_twiddle_tab_stride2_arr_4096_f16[6]={ -0,2048,2560,2688,2720,0,}; - -uint32_t rearranged_twiddle_tab_stride3_arr_4096_f16[6]={ -0,2048,2560,2688,2720,0,}; - -float16_t rearranged_twiddle_stride1_4096_f16[2728]={ -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)1.0000000000000f,(float16_t)0.0015335083008f, -(float16_t)1.0000000000000f,(float16_t)0.0030670166016f, -(float16_t)1.0000000000000f,(float16_t)0.0046005249023f, -(float16_t)1.0000000000000f,(float16_t)0.0061340332031f, -(float16_t)1.0000000000000f,(float16_t)0.0076713562012f, -(float16_t)1.0000000000000f,(float16_t)0.0092010498047f, -(float16_t)1.0000000000000f,(float16_t)0.0107345581055f, -(float16_t)1.0000000000000f,(float16_t)0.0122680664062f, -(float16_t)1.0000000000000f,(float16_t)0.0138015747070f, -(float16_t)1.0000000000000f,(float16_t)0.0153427124023f, -(float16_t)1.0000000000000f,(float16_t)0.0168762207031f, -(float16_t)1.0000000000000f,(float16_t)0.0184020996094f, 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-(float16_t)-0.8579101562500f,(float16_t)-0.5141601562500f, -(float16_t)-0.8481445312500f,(float16_t)-0.5297851562500f, -(float16_t)-0.8383789062500f,(float16_t)-0.5454101562500f, -(float16_t)-0.8281250000000f,(float16_t)-0.5605468750000f, -(float16_t)-0.8173828125000f,(float16_t)-0.5756835937500f, -(float16_t)-0.8066406250000f,(float16_t)-0.5908203125000f, -(float16_t)-0.7958984375000f,(float16_t)-0.6054687500000f, -(float16_t)-0.7846679687500f,(float16_t)-0.6201171875000f, -(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f, -(float16_t)-0.7612304687500f,(float16_t)-0.6484375000000f, -(float16_t)-0.7490234375000f,(float16_t)-0.6625976562500f, -(float16_t)-0.7368164062500f,(float16_t)-0.6762695312500f, -(float16_t)-0.7241210937500f,(float16_t)-0.6894531250000f, -(float16_t)-0.7114257812500f,(float16_t)-0.7026367187500f, -(float16_t)-0.6982421875000f,(float16_t)-0.7158203125000f, -(float16_t)-0.6850585937500f,(float16_t)-0.7285156250000f, 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-(float16_t)-0.4274902343750f,(float16_t)-0.9038085937500f, -(float16_t)-0.4108886718750f,(float16_t)-0.9116210937500f, -(float16_t)-0.3940429687500f,(float16_t)-0.9189453125000f, -(float16_t)-0.3769531250000f,(float16_t)-0.9262695312500f, -(float16_t)-0.3598632812500f,(float16_t)-0.9331054687500f, -(float16_t)-0.3427734375000f,(float16_t)-0.9394531250000f, -(float16_t)-0.3251953125000f,(float16_t)-0.9458007812500f, -(float16_t)-0.3078613281250f,(float16_t)-0.9516601562500f, -(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f, -(float16_t)-0.2727050781250f,(float16_t)-0.9619140625000f, -(float16_t)-0.2548828125000f,(float16_t)-0.9667968750000f, -(float16_t)-0.2370605468750f,(float16_t)-0.9716796875000f, -(float16_t)-0.2191162109375f,(float16_t)-0.9755859375000f, -(float16_t)-0.2010498046875f,(float16_t)-0.9794921875000f, -(float16_t)-0.1829833984375f,(float16_t)-0.9829101562500f, -(float16_t)-0.1649169921875f,(float16_t)-0.9863281250000f, -(float16_t)-0.1467285156250f,(float16_t)-0.9892578125000f, -(float16_t)-0.1285400390625f,(float16_t)-0.9916992187500f, -(float16_t)-0.1102294921875f,(float16_t)-0.9941406250000f, -(float16_t)-0.0919189453125f,(float16_t)-0.9956054687500f, -(float16_t)-0.0735473632812f,(float16_t)-0.9970703125000f, -(float16_t)-0.0552062988281f,(float16_t)-0.9985351562500f, -(float16_t)-0.0368041992188f,(float16_t)-0.9995117187500f, -(float16_t)-0.0184020996094f,(float16_t)-1.0000000000000f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9970703125000f,(float16_t)0.0735473632812f, -(float16_t)0.9892578125000f,(float16_t)0.1467285156250f, -(float16_t)0.9755859375000f,(float16_t)0.2191162109375f, -(float16_t)0.9570312500000f,(float16_t)0.2902832031250f, -(float16_t)0.9331054687500f,(float16_t)0.3598632812500f, -(float16_t)0.9038085937500f,(float16_t)0.4274902343750f, -(float16_t)0.8701171875000f,(float16_t)0.4929199218750f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.7885742187500f,(float16_t)0.6152343750000f, -(float16_t)0.7407226562500f,(float16_t)0.6713867187500f, -(float16_t)0.6894531250000f,(float16_t)0.7241210937500f, -(float16_t)0.6342773437500f,(float16_t)0.7729492187500f, -(float16_t)0.5756835937500f,(float16_t)0.8173828125000f, -(float16_t)0.5141601562500f,(float16_t)0.8579101562500f, -(float16_t)0.4497070312500f,(float16_t)0.8930664062500f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.3137207031250f,(float16_t)0.9497070312500f, -(float16_t)0.2429199218750f,(float16_t)0.9702148437500f, -(float16_t)0.1710205078125f,(float16_t)0.9853515625000f, -(float16_t)0.0980224609375f,(float16_t)0.9951171875000f, -(float16_t)0.0245361328125f,(float16_t)0.9995117187500f, -(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f, -(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f, -(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f, -(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f, -(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f, -(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f, -(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f, -(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f, -(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f, -(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f, -(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f, -(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f, -(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f, -(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f, -(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f, -(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f, -(float16_t)-0.9995117187500f,(float16_t)-0.0245361328125f, -(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f, -(float16_t)-0.9853515625000f,(float16_t)-0.1710205078125f, -(float16_t)-0.9702148437500f,(float16_t)-0.2429199218750f, -(float16_t)-0.9497070312500f,(float16_t)-0.3137207031250f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f, -(float16_t)-0.8930664062500f,(float16_t)-0.4497070312500f, -(float16_t)-0.8579101562500f,(float16_t)-0.5141601562500f, -(float16_t)-0.8173828125000f,(float16_t)-0.5756835937500f, -(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f, -(float16_t)-0.7241210937500f,(float16_t)-0.6894531250000f, -(float16_t)-0.6713867187500f,(float16_t)-0.7407226562500f, -(float16_t)-0.6152343750000f,(float16_t)-0.7885742187500f, -(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f, -(float16_t)-0.4929199218750f,(float16_t)-0.8701171875000f, -(float16_t)-0.4274902343750f,(float16_t)-0.9038085937500f, -(float16_t)-0.3598632812500f,(float16_t)-0.9331054687500f, -(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f, -(float16_t)-0.2191162109375f,(float16_t)-0.9755859375000f, -(float16_t)-0.1467285156250f,(float16_t)-0.9892578125000f, -(float16_t)-0.0735473632812f,(float16_t)-0.9970703125000f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.9570312500000f,(float16_t)0.2902832031250f, -(float16_t)0.8315429687500f,(float16_t)0.5556640625000f, -(float16_t)0.6342773437500f,(float16_t)0.7729492187500f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)0.0980224609375f,(float16_t)0.9951171875000f, -(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f, -(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f, -(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f, -(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f, -(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f, -(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f, -(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f, -(float16_t)1.0000000000000f,(float16_t)0.0000000000000f, -(float16_t)0.3825683593750f,(float16_t)0.9238281250000f, -(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f, -(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,}; - -#endif - - - -#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */ -#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -#endif /* if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/CMakeLists.txt deleted file mode 100644 index 5d14d32..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/CMakeLists.txt +++ /dev/null @@ -1,74 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPComplexMath) - -include(configLib) -include(configDsp) - -add_library(CMSISDSPComplexMath STATIC) - -configLib(CMSISDSPComplexMath ${ROOT}) -configDsp(CMSISDSPComplexMath ${ROOT}) - - -include(interpol) -interpol(CMSISDSPComplexMath) - - -if (CONFIGTABLE AND ALLFAST) - target_compile_definitions(CMSISDSPComplexMath PUBLIC ARM_ALL_FAST_TABLES) -endif() - -# Vectorized code is defining sqrt -# so fast tables required even if Fast Math not built. -if (CONFIGTABLE AND (HELIUM OR MVEF OR MVEI)) - target_compile_definitions(CMSISDSPComplexMath PUBLIC ARM_FAST_ALLOW_TABLES) -endif() - - -# MVE code is using a table for computing the fast sqrt arm_cmplx_mag_q31 -# There is the possibility of not compiling this function and not including -# the table. -if (NOT CONFIGTABLE OR ALLFAST OR ARM_CMPLX_MAG_Q31 OR (NOT HELIUM AND NOT MVEI)) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_q31.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_CMPLX_MAG_Q15 OR (NOT HELIUM AND NOT MVEI)) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_q15.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_CMPLX_MAG_FAST_Q15 OR (NOT HELIUM AND NOT MVEI)) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_fast_q15.c) -endif() - -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_conj_f32.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_conj_q15.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_conj_q31.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_dot_prod_f32.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_dot_prod_q15.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_dot_prod_q31.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_f32.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_f64.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_squared_f32.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_squared_f64.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_squared_q15.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_squared_q31.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mult_cmplx_f32.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mult_cmplx_f64.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mult_cmplx_q15.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mult_cmplx_q31.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mult_real_f32.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mult_real_q15.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mult_real_q31.c) - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_conj_f16.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_dot_prod_f16.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_f16.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mag_squared_f16.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mult_cmplx_f16.c) -target_sources(CMSISDSPComplexMath PRIVATE arm_cmplx_mult_real_f16.c) -endif() - -### Includes -target_include_directories(CMSISDSPComplexMath PUBLIC "${DSP}/Include") diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c deleted file mode 100644 index 6ec8d64..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c +++ /dev/null @@ -1,66 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: CompexMathFunctions.c - * Description: Combination of all comlex math function source files. - * - * $Date: 18. March 2019 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_cmplx_conj_f32.c" -#include "arm_cmplx_conj_q15.c" -#include "arm_cmplx_conj_q31.c" -#include "arm_cmplx_dot_prod_f32.c" -#include "arm_cmplx_dot_prod_q15.c" -#include "arm_cmplx_dot_prod_q31.c" -#include "arm_cmplx_mag_f32.c" -#include "arm_cmplx_mag_f64.c" - -#if (defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEI)) && !defined(ARM_MATH_AUTOVECTORIZE) - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE) - #include "arm_cmplx_mag_q15.c" - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q15_MVE) - #include "arm_cmplx_mag_fast_q15.c" - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE) - #include "arm_cmplx_mag_q31.c" - #endif -#else - #include "arm_cmplx_mag_q15.c" - #include "arm_cmplx_mag_fast_q15.c" - #include "arm_cmplx_mag_q31.c" -#endif - -#include "arm_cmplx_mag_squared_f32.c" -#include "arm_cmplx_mag_squared_f64.c" -#include "arm_cmplx_mag_squared_q15.c" -#include "arm_cmplx_mag_squared_q31.c" -#include "arm_cmplx_mult_cmplx_f32.c" -#include "arm_cmplx_mult_cmplx_f64.c" -#include "arm_cmplx_mult_cmplx_q15.c" -#include "arm_cmplx_mult_cmplx_q31.c" -#include "arm_cmplx_mult_real_f32.c" -#include "arm_cmplx_mult_real_q15.c" -#include "arm_cmplx_mult_real_q31.c" diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c deleted file mode 100644 index 1ca0b45..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c +++ /dev/null @@ -1,32 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: CompexMathFunctionsF16.c - * Description: Combination of all complex math function f16 source files. - * - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_cmplx_conj_f16.c" -#include "arm_cmplx_dot_prod_f16.c" -#include "arm_cmplx_mag_f16.c" -#include "arm_cmplx_mag_squared_f16.c" -#include "arm_cmplx_mult_cmplx_f16.c" -#include "arm_cmplx_mult_real_f16.c" diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f16.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f16.c deleted file mode 100644 index 5871652..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f16.c +++ /dev/null @@ -1,185 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_conj_f16.c - * Description: Floating-point complex conjugate - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup cmplx_conj Complex Conjugate - - Conjugates the elements of a complex data vector. - - The pSrc points to the source data and - pDst points to the destination data where the result should be written. - numSamples specifies the number of complex samples - and the data in each array is stored in an interleaved fashion - (real, imag, real, imag, ...). - Each array has a total of 2*numSamples values. - - The underlying algorithm is used: - 
-  for (n = 0; n < numSamples; n++) {
-      pDst[(2*n)  ] =  pSrc[(2*n)  ];    // real part
-      pDst[(2*n)+1] = -pSrc[(2*n)+1];    // imag part
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup cmplx_conj - @{ - */ - -/** - @brief Floating-point complex conjugate. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_conj_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t numSamples) -{ - static const float16_t cmplx_conj_sign[8] = { 1.0f, -1.0f, 1.0f, -1.0f, 1.0f, -1.0f, 1.0f, -1.0f }; - uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ - uint32_t blkCnt; - f16x8_t vecSrc; - f16x8_t vecSign; - - /* - * load sign vector - */ - vecSign = *(f16x8_t *) cmplx_conj_sign; - - /* Compute 4 real samples at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - vecSrc = vld1q(pSrc); - vst1q(pDst,vmulq(vecSrc, vecSign)); - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - pSrc += 8; - pDst += 8; - blkCnt--; - } - - /* Tail */ - blkCnt = (blockSize & 0x7) >> 1; - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -#else -void arm_cmplx_conj_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of cmplx_conj group - */ -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c deleted file mode 100644 index 2b1ece4..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c +++ /dev/null @@ -1,213 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_conj_f32.c - * Description: Floating-point complex conjugate - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup cmplx_conj Complex Conjugate - - Conjugates the elements of a complex data vector. - - The pSrc points to the source data and - pDst points to the destination data where the result should be written. - numSamples specifies the number of complex samples - and the data in each array is stored in an interleaved fashion - (real, imag, real, imag, ...). - Each array has a total of 2*numSamples values. - - The underlying algorithm is used: - 
-  for (n = 0; n < numSamples; n++) {
-      pDst[(2*n)  ] =  pSrc[(2*n)  ];    // real part
-      pDst[(2*n)+1] = -pSrc[(2*n)+1];    // imag part
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup cmplx_conj - @{ - */ - -/** - @brief Floating-point complex conjugate. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_conj_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples) -{ - static const float32_t cmplx_conj_sign[4] = { 1.0f, -1.0f, 1.0f, -1.0f }; - uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ - uint32_t blkCnt; - f32x4_t vecSrc; - f32x4_t vecSign; - - /* - * load sign vector - */ - vecSign = *(f32x4_t *) cmplx_conj_sign; - - /* Compute 4 real samples at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - vecSrc = vld1q(pSrc); - vst1q(pDst,vmulq(vecSrc, vecSign)); - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - pSrc += 4; - pDst += 4; - blkCnt--; - } - - /* Tail */ - blkCnt = (blockSize & 0x3) >> 1; - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -#else -void arm_cmplx_conj_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - float32x4_t zero; - float32x4x2_t vec; - - zero = vdupq_n_f32(0.0f); - - /* Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0]+jC[1] = A[0]+(-1)*jA[1] */ - /* Calculate Complex Conjugate and then store the results in the destination buffer. */ - vec = vld2q_f32(pSrc); - vec.val[1] = vsubq_f32(zero,vec.val[1]); - vst2q_f32(pDst,vec); - - /* Increment pointers */ - pSrc += 8; - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = numSamples & 0x3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined (ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - *pDst++ = -*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of cmplx_conj group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c deleted file mode 100644 index 58e11c9..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c +++ /dev/null @@ -1,207 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_conj_q15.c - * Description: Q15 complex conjugate - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup cmplx_conj - @{ - */ - -/** - @brief Q15 complex conjugate. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF. - */ - - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_cmplx_conj_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples) -{ - uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ - uint32_t blkCnt; - q31_t in1; - - q15x8x2_t vecSrc; - q15x8_t zero; - - zero = vdupq_n_s16(0); - - /* Compute 8 real samples at a time */ - blkCnt = blockSize >> 4U; - while (blkCnt > 0U) - { - vecSrc = vld2q(pSrc); - vecSrc.val[1] = vqsubq(zero, vecSrc.val[1]); - vst2q(pDst,vecSrc); - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - pSrc += 16; - pDst += 16; - blkCnt --; - } - - /* Tail */ - blkCnt = (blockSize & 0xF) >> 1; - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - in1 = *pSrc++; - *pDst++ = __SSAT(-in1, 16); - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -void arm_cmplx_conj_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t in1; /* Temporary input variable */ - -#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) - q31_t in2, in3, in4; /* Temporary input variables */ -#endif - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - - #if defined (ARM_MATH_DSP) - in1 = read_q15x2_ia ((q15_t **) &pSrc); - in2 = read_q15x2_ia ((q15_t **) &pSrc); - in3 = read_q15x2_ia ((q15_t **) &pSrc); - in4 = read_q15x2_ia ((q15_t **) &pSrc); - -#ifndef ARM_MATH_BIG_ENDIAN - in1 = __QASX(0, in1); - in2 = __QASX(0, in2); - in3 = __QASX(0, in3); - in4 = __QASX(0, in4); -#else - in1 = __QSAX(0, in1); - in2 = __QSAX(0, in2); - in3 = __QSAX(0, in3); - in4 = __QSAX(0, in4); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16); - in2 = ((uint32_t) in2 >> 16) | ((uint32_t) in2 << 16); - in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16); - in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16); - - write_q15x2_ia (&pDst, in1); - write_q15x2_ia (&pDst, in2); - write_q15x2_ia (&pDst, in3); - write_q15x2_ia (&pDst, in4); -#else - *pDst++ = *pSrc++; - in1 = *pSrc++; - *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1; - - *pDst++ = *pSrc++; - in1 = *pSrc++; - *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1; - - *pDst++ = *pSrc++; - in1 = *pSrc++; - *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1; - - *pDst++ = *pSrc++; - in1 = *pSrc++; - *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1; - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - in1 = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __SSAT(-in1, 16); -#else - *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1; -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of cmplx_conj group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c deleted file mode 100644 index cf4b363..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c +++ /dev/null @@ -1,193 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_conj_q31.c - * Description: Q31 complex conjugate - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup cmplx_conj - @{ - */ - -/** - @brief Q31 complex conjugate. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_conj_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples) -{ - - uint32_t blockSize = numSamples * CMPLX_DIM; /* loop counters */ - uint32_t blkCnt; - q31x4x2_t vecSrc; - q31_t in; /* Temporary input variable */ - q31x4_t zero; - - zero = vdupq_n_s32(0); - - - /* Compute 4 real samples at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - - vecSrc = vld2q(pSrc); - vecSrc.val[1] = vqsubq(zero, vecSrc.val[1]); - vst2q(pDst,vecSrc); - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - pSrc += 8; - pDst += 8; - blkCnt --; - } - - /* Tail */ - blkCnt = (blockSize & 0x7) >> 1; - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - in = *pSrc++; - *pDst++ = __QSUB(0, in); - - /* Decrement loop counter */ - blkCnt--; - } - - -} -#else - -void arm_cmplx_conj_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t in; /* Temporary input variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __QSUB(0, in); -#else - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; -#endif - - *pDst++ = *pSrc++; - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __QSUB(0, in); -#else - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; -#endif - - *pDst++ = *pSrc++; - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __QSUB(0, in); -#else - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; -#endif - - *pDst++ = *pSrc++; - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __QSUB(0, in); -#else - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[0] + jC[1] = A[0]+ j(-1)A[1] */ - - /* Calculate Complex Conjugate and store result in destination buffer. */ - *pDst++ = *pSrc++; - in = *pSrc++; -#if defined (ARM_MATH_DSP) - *pDst++ = __QSUB(0, in); -#else - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of cmplx_conj group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f16.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f16.c deleted file mode 100644 index 37c08b5..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f16.c +++ /dev/null @@ -1,288 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_dot_prod_f16.c - * Description: Floating-point complex dot product - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup cmplx_dot_prod Complex Dot Product - - Computes the dot product of two complex vectors. - The vectors are multiplied element-by-element and then summed. - - The pSrcA points to the first complex input vector and - pSrcB points to the second complex input vector. - numSamples specifies the number of complex samples - and the data in each array is stored in an interleaved fashion - (real, imag, real, imag, ...). - Each array has a total of 2*numSamples values. - - The underlying algorithm is used: - - 
-  realResult = 0;
-  imagResult = 0;
-  for (n = 0; n < numSamples; n++) {
-      realResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
-      imagResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup cmplx_dot_prod - @{ - */ - -/** - @brief Floating-point complex dot product. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] numSamples number of samples in each vector - @param[out] realResult real part of the result returned here - @param[out] imagResult imaginary part of the result returned here - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_cmplx_dot_prod_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - uint32_t numSamples, - float16_t * realResult, - float16_t * imagResult) -{ - int32_t blkCnt; - float16_t real_sum, imag_sum; - f16x8_t vecSrcA, vecSrcB; - f16x8_t vec_acc = vdupq_n_f16(0.0f16); - f16x8_t vecSrcC, vecSrcD; - - blkCnt = (numSamples >> 3); - blkCnt -= 1; - if (blkCnt > 0) { - /* should give more freedom to generate stall free code */ - vecSrcA = vld1q( pSrcA); - vecSrcB = vld1q( pSrcB); - pSrcA += 8; - pSrcB += 8; - - while (blkCnt > 0) { - vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - pSrcA += 8; - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - pSrcB += 8; - - vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD); - vecSrcA = vld1q(pSrcA); - pSrcA += 8; - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD); - vecSrcB = vld1q(pSrcB); - pSrcB += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* process last elements out of the loop avoid the armclang breaking the SW pipeline */ - vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - - vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD); - vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD); - - /* - * tail - */ - blkCnt = CMPLX_DIM * (numSamples & 7); - while (blkCnt > 0) { - mve_pred16_t p = vctp16q(blkCnt); - pSrcA += 8; - pSrcB += 8; - - vecSrcA = vldrhq_z_f16(pSrcA, p); - vecSrcB = vldrhq_z_f16(pSrcB, p); - vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p); - vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p); - - blkCnt -= 8; - } - } else { - /* small vector */ - blkCnt = numSamples * CMPLX_DIM; - vec_acc = vdupq_n_f16(0.0f16); - - do { - mve_pred16_t p = vctp16q(blkCnt); - - vecSrcA = vldrhq_z_f16(pSrcA, p); - vecSrcB = vldrhq_z_f16(pSrcB, p); - - vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p); - vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p); - - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - pSrcA += 8; - pSrcB += 8; - blkCnt -= 8; - } - while (blkCnt > 0); - } - - /* Sum the partial parts */ - mve_cmplx_sum_intra_r_i_f16(vec_acc, real_sum, imag_sum); - - /* - * Store the real and imaginary results in the destination buffers - */ - *realResult = real_sum; - *imagResult = imag_sum; -} - -#else -void arm_cmplx_dot_prod_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - uint32_t numSamples, - float16_t * realResult, - float16_t * imagResult) -{ - uint32_t blkCnt; /* Loop counter */ - _Float16 real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result variables */ - _Float16 a0,b0,c0,d0; - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += a0 * c0; - imag_sum += a0 * d0; - real_sum -= b0 * d0; - imag_sum += b0 * c0; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += a0 * c0; - imag_sum += a0 * d0; - real_sum -= b0 * d0; - imag_sum += b0 * c0; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += a0 * c0; - imag_sum += a0 * d0; - real_sum -= b0 * d0; - imag_sum += b0 * c0; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += a0 * c0; - imag_sum += a0 * d0; - real_sum -= b0 * d0; - imag_sum += b0 * c0; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += a0 * c0; - imag_sum += a0 * d0; - real_sum -= b0 * d0; - imag_sum += b0 * c0; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store real and imaginary result in destination buffer. */ - *realResult = real_sum; - *imagResult = imag_sum; -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of cmplx_dot_prod group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c deleted file mode 100644 index fe90f6d..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c +++ /dev/null @@ -1,340 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_dot_prod_f32.c - * Description: Floating-point complex dot product - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup cmplx_dot_prod Complex Dot Product - - Computes the dot product of two complex vectors. - The vectors are multiplied element-by-element and then summed. - - The pSrcA points to the first complex input vector and - pSrcB points to the second complex input vector. - numSamples specifies the number of complex samples - and the data in each array is stored in an interleaved fashion - (real, imag, real, imag, ...). - Each array has a total of 2*numSamples values. - - The underlying algorithm is used: - - 
-  realResult = 0;
-  imagResult = 0;
-  for (n = 0; n < numSamples; n++) {
-      realResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
-      imagResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup cmplx_dot_prod - @{ - */ - -/** - @brief Floating-point complex dot product. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] numSamples number of samples in each vector - @param[out] realResult real part of the result returned here - @param[out] imagResult imaginary part of the result returned here - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_dot_prod_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t numSamples, - float32_t * realResult, - float32_t * imagResult) -{ - int32_t blkCnt; - float32_t real_sum, imag_sum; - f32x4_t vecSrcA, vecSrcB; - f32x4_t vec_acc = vdupq_n_f32(0.0f); - f32x4_t vecSrcC, vecSrcD; - - blkCnt = numSamples >> 2; - blkCnt -= 1; - if (blkCnt > 0) { - /* should give more freedom to generate stall free code */ - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - pSrcA += 4; - pSrcB += 4; - - while (blkCnt > 0) { - vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - pSrcA += 4; - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - pSrcB += 4; - - vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD); - vecSrcA = vld1q(pSrcA); - pSrcA += 4; - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD); - vecSrcB = vld1q(pSrcB); - pSrcB += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* process last elements out of the loop avoid the armclang breaking the SW pipeline */ - vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - - vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD); - vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD); - - /* - * tail - */ - blkCnt = CMPLX_DIM * (numSamples & 3); - while (blkCnt > 0) { - mve_pred16_t p = vctp32q(blkCnt); - pSrcA += 4; - pSrcB += 4; - vecSrcA = vldrwq_z_f32(pSrcA, p); - vecSrcB = vldrwq_z_f32(pSrcB, p); - vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p); - vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p); - blkCnt -= 4; - } - } else { - /* small vector */ - blkCnt = numSamples * CMPLX_DIM; - vec_acc = vdupq_n_f32(0.0f); - - do { - mve_pred16_t p = vctp32q(blkCnt); - - vecSrcA = vldrwq_z_f32(pSrcA, p); - vecSrcB = vldrwq_z_f32(pSrcB, p); - - vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p); - vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p); - - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - pSrcA += 4; - pSrcB += 4; - blkCnt -= 4; - } - while (blkCnt > 0); - } - - real_sum = vgetq_lane(vec_acc, 0) + vgetq_lane(vec_acc, 2); - imag_sum = vgetq_lane(vec_acc, 1) + vgetq_lane(vec_acc, 3); - - /* - * Store the real and imaginary results in the destination buffers - */ - *realResult = real_sum; - *imagResult = imag_sum; -} - -#else -void arm_cmplx_dot_prod_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t numSamples, - float32_t * realResult, - float32_t * imagResult) -{ - uint32_t blkCnt; /* Loop counter */ - float32_t real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result variables */ - float32_t a0,b0,c0,d0; - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - float32x4x2_t vec1,vec2,vec3,vec4; - float32x4_t accR,accI; - float32x2_t accum = vdup_n_f32(0); - - accR = vdupq_n_f32(0.0f); - accI = vdupq_n_f32(0.0f); - - /* Loop unrolling: Compute 8 outputs at a time */ - blkCnt = numSamples >> 3U; - - while (blkCnt > 0U) - { - /* C = (A[0]+jA[1])*(B[0]+jB[1]) + ... */ - /* Calculate dot product and then store the result in a temporary buffer. */ - - vec1 = vld2q_f32(pSrcA); - vec2 = vld2q_f32(pSrcB); - - /* Increment pointers */ - pSrcA += 8; - pSrcB += 8; - - /* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */ - accR = vmlaq_f32(accR,vec1.val[0],vec2.val[0]); - accR = vmlsq_f32(accR,vec1.val[1],vec2.val[1]); - - /* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */ - accI = vmlaq_f32(accI,vec1.val[1],vec2.val[0]); - accI = vmlaq_f32(accI,vec1.val[0],vec2.val[1]); - - vec3 = vld2q_f32(pSrcA); - vec4 = vld2q_f32(pSrcB); - - /* Increment pointers */ - pSrcA += 8; - pSrcB += 8; - - /* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */ - accR = vmlaq_f32(accR,vec3.val[0],vec4.val[0]); - accR = vmlsq_f32(accR,vec3.val[1],vec4.val[1]); - - /* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */ - accI = vmlaq_f32(accI,vec3.val[1],vec4.val[0]); - accI = vmlaq_f32(accI,vec3.val[0],vec4.val[1]); - - /* Decrement the loop counter */ - blkCnt--; - } - - accum = vpadd_f32(vget_low_f32(accR), vget_high_f32(accR)); - real_sum += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(accI), vget_high_f32(accI)); - imag_sum += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - /* Tail */ - blkCnt = numSamples & 0x7; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += a0 * c0; - imag_sum += a0 * d0; - real_sum -= b0 * d0; - imag_sum += b0 * c0; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += a0 * c0; - imag_sum += a0 * d0; - real_sum -= b0 * d0; - imag_sum += b0 * c0; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += a0 * c0; - imag_sum += a0 * d0; - real_sum -= b0 * d0; - imag_sum += b0 * c0; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += a0 * c0; - imag_sum += a0 * d0; - real_sum -= b0 * d0; - imag_sum += b0 * c0; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += a0 * c0; - imag_sum += a0 * d0; - real_sum -= b0 * d0; - imag_sum += b0 * c0; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store real and imaginary result in destination buffer. */ - *realResult = real_sum; - *imagResult = imag_sum; -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of cmplx_dot_prod group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c deleted file mode 100644 index 0a7820e..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c +++ /dev/null @@ -1,256 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_dot_prod_q15.c - * Description: Processing function for the Q15 Complex Dot product - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup cmplx_dot_prod - @{ - */ - -/** - @brief Q15 complex dot product. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] numSamples number of samples in each vector - @param[out] realResult real part of the result returned here - @param[out] imagResult imaginary part of the result returned her - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result. - These are accumulated in a 64-bit accumulator with 34.30 precision. - As a final step, the accumulators are converted to 8.24 format. - The return results realResult and imagResult are in 8.24 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_cmplx_dot_prod_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - uint32_t numSamples, - q31_t * realResult, - q31_t * imagResult) -{ - int32_t blkCnt; - q63_t accReal = 0LL; - q63_t accImag = 0LL; - q15x8_t vecSrcA, vecSrcB; - q15x8_t vecSrcC, vecSrcD; - - blkCnt = (numSamples >> 3); - blkCnt -= 1; - if (blkCnt > 0) { - /* should give more freedom to generate stall free code */ - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - pSrcA += 8; - pSrcB += 8; - - while (blkCnt > 0) { - - accReal = vmlsldavaq(accReal, vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - pSrcA += 8; - - accImag = vmlaldavaxq(accImag, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - pSrcB += 8; - - accReal = vmlsldavaq(accReal, vecSrcC, vecSrcD); - vecSrcA = vld1q(pSrcA); - pSrcA += 8; - - accImag = vmlaldavaxq(accImag, vecSrcC, vecSrcD); - vecSrcB = vld1q(pSrcB); - pSrcB += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* process last elements out of the loop avoid the armclang breaking the SW pipeline */ - accReal = vmlsldavaq(accReal, vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - - accImag = vmlaldavaxq(accImag, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - - accReal = vmlsldavaq(accReal, vecSrcC, vecSrcD); - vecSrcA = vld1q(pSrcA); - - accImag = vmlaldavaxq(accImag, vecSrcC, vecSrcD); - vecSrcB = vld1q(pSrcB); - - /* - * tail - */ - blkCnt = CMPLX_DIM * (numSamples & 7); - do { - mve_pred16_t p = vctp16q(blkCnt); - - pSrcA += 8; - pSrcB += 8; - - vecSrcA = vldrhq_z_s16(pSrcA, p); - vecSrcB = vldrhq_z_s16(pSrcB, p); - - accReal = vmlsldavaq_p(accReal, vecSrcA, vecSrcB, p); - accImag = vmlaldavaxq_p(accImag, vecSrcA, vecSrcB, p); - - blkCnt -= 8; - } - while ((int32_t) blkCnt > 0); - } else { - blkCnt = numSamples * CMPLX_DIM; - while (blkCnt > 0) { - mve_pred16_t p = vctp16q(blkCnt); - - vecSrcA = vldrhq_z_s16(pSrcA, p); - vecSrcB = vldrhq_z_s16(pSrcB, p); - - accReal = vmlsldavaq_p(accReal, vecSrcA, vecSrcB, p); - accImag = vmlaldavaxq_p(accImag, vecSrcA, vecSrcB, p); - - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - pSrcA += 8; - pSrcB += 8; - blkCnt -= 8; - } - } - *realResult = asrl(accReal, (14 - 8)); - *imagResult = asrl(accImag, (14 - 8)); -} -#else -void arm_cmplx_dot_prod_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - uint32_t numSamples, - q31_t * realResult, - q31_t * imagResult) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t real_sum = 0, imag_sum = 0; /* Temporary result variables */ - q15_t a0,b0,c0,d0; - -#if defined (ARM_MATH_LOOPUNROLL) - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += (q31_t)a0 * c0; - imag_sum += (q31_t)a0 * d0; - real_sum -= (q31_t)b0 * d0; - imag_sum += (q31_t)b0 * c0; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += (q31_t)a0 * c0; - imag_sum += (q31_t)a0 * d0; - real_sum -= (q31_t)b0 * d0; - imag_sum += (q31_t)b0 * c0; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += (q31_t)a0 * c0; - imag_sum += (q31_t)a0 * d0; - real_sum -= (q31_t)b0 * d0; - imag_sum += (q31_t)b0 * c0; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += (q31_t)a0 * c0; - imag_sum += (q31_t)a0 * d0; - real_sum -= (q31_t)b0 * d0; - imag_sum += (q31_t)b0 * c0; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += (q31_t)a0 * c0; - imag_sum += (q31_t)a0 * d0; - real_sum -= (q31_t)b0 * d0; - imag_sum += (q31_t)b0 * c0; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store real and imaginary result in 8.24 format */ - /* Convert real data in 34.30 to 8.24 by 6 right shifts */ - *realResult = (q31_t) (real_sum >> 6); - /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */ - *imagResult = (q31_t) (imag_sum >> 6); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of cmplx_dot_prod group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c deleted file mode 100644 index bd1c3d5..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c +++ /dev/null @@ -1,259 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_dot_prod_q31.c - * Description: Q31 complex dot product - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup cmplx_dot_prod - @{ - */ - -/** - @brief Q31 complex dot product. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] numSamples number of samples in each vector - @param[out] realResult real part of the result returned here - @param[out] imagResult imaginary part of the result returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format. - The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits. - Additions are nonsaturating and no overflow will occur as long as numSamples is less than 32768. - The return results realResult and imagResult are in 16.48 format. - Input down scaling is not required. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_dot_prod_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - uint32_t numSamples, - q63_t * realResult, - q63_t * imagResult) -{ - int32_t blkCnt; - q63_t accReal = 0LL; - q63_t accImag = 0LL; - q31x4_t vecSrcA, vecSrcB; - q31x4_t vecSrcC, vecSrcD; - - blkCnt = numSamples >> 2; - blkCnt -= 1; - if (blkCnt > 0) { - /* should give more freedom to generate stall free code */ - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - pSrcA += 4; - pSrcB += 4; - - while (blkCnt > 0) { - - accReal = vrmlsldavhaq(accReal, vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - pSrcA += 4; - - accImag = vrmlaldavhaxq(accImag, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - pSrcB += 4; - - accReal = vrmlsldavhaq(accReal, vecSrcC, vecSrcD); - vecSrcA = vld1q(pSrcA); - pSrcA += 4; - - accImag = vrmlaldavhaxq(accImag, vecSrcC, vecSrcD); - vecSrcB = vld1q(pSrcB); - pSrcB += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* process last elements out of the loop avoid the armclang breaking the SW pipeline */ - accReal = vrmlsldavhaq(accReal, vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - - accImag = vrmlaldavhaxq(accImag, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - - accReal = vrmlsldavhaq(accReal, vecSrcC, vecSrcD); - vecSrcA = vld1q(pSrcA); - - accImag = vrmlaldavhaxq(accImag, vecSrcC, vecSrcD); - vecSrcB = vld1q(pSrcB); - - /* - * tail - */ - blkCnt = CMPLX_DIM * (numSamples & 3); - do { - mve_pred16_t p = vctp32q(blkCnt); - - pSrcA += 4; - pSrcB += 4; - - vecSrcA = vldrwq_z_s32(pSrcA, p); - vecSrcB = vldrwq_z_s32(pSrcB, p); - - accReal = vrmlsldavhaq_p(accReal, vecSrcA, vecSrcB, p); - accImag = vrmlaldavhaxq_p(accImag, vecSrcA, vecSrcB, p); - - blkCnt -= 4; - } - while ((int32_t) blkCnt > 0); - } else { - blkCnt = numSamples * CMPLX_DIM; - while (blkCnt > 0) { - mve_pred16_t p = vctp32q(blkCnt); - - vecSrcA = vldrwq_z_s32(pSrcA, p); - vecSrcB = vldrwq_z_s32(pSrcB, p); - - accReal = vrmlsldavhaq_p(accReal, vecSrcA, vecSrcB, p); - accImag = vrmlaldavhaxq_p(accImag, vecSrcA, vecSrcB, p); - - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - pSrcA += 4; - pSrcB += 4; - blkCnt -= 4; - } - } - *realResult = asrl(accReal, (14 - 8)); - *imagResult = asrl(accImag, (14 - 8)); - -} - -#else -void arm_cmplx_dot_prod_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - uint32_t numSamples, - q63_t * realResult, - q63_t * imagResult) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t real_sum = 0, imag_sum = 0; /* Temporary result variables */ - q31_t a0,b0,c0,d0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += ((q63_t)a0 * c0) >> 14; - imag_sum += ((q63_t)a0 * d0) >> 14; - real_sum -= ((q63_t)b0 * d0) >> 14; - imag_sum += ((q63_t)b0 * c0) >> 14; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += ((q63_t)a0 * c0) >> 14; - imag_sum += ((q63_t)a0 * d0) >> 14; - real_sum -= ((q63_t)b0 * d0) >> 14; - imag_sum += ((q63_t)b0 * c0) >> 14; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += ((q63_t)a0 * c0) >> 14; - imag_sum += ((q63_t)a0 * d0) >> 14; - real_sum -= ((q63_t)b0 * d0) >> 14; - imag_sum += ((q63_t)b0 * c0) >> 14; - - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += ((q63_t)a0 * c0) >> 14; - imag_sum += ((q63_t)a0 * d0) >> 14; - real_sum -= ((q63_t)b0 * d0) >> 14; - imag_sum += ((q63_t)b0 * c0) >> 14; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - a0 = *pSrcA++; - b0 = *pSrcA++; - c0 = *pSrcB++; - d0 = *pSrcB++; - - real_sum += ((q63_t)a0 * c0) >> 14; - imag_sum += ((q63_t)a0 * d0) >> 14; - real_sum -= ((q63_t)b0 * d0) >> 14; - imag_sum += ((q63_t)b0 * c0) >> 14; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store real and imaginary result in 16.48 format */ - *realResult = real_sum; - *imagResult = imag_sum; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of cmplx_dot_prod group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f16.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f16.c deleted file mode 100644 index ba3c1e9..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f16.c +++ /dev/null @@ -1,241 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_f16.c - * Description: Floating-point complex magnitude - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup cmplx_mag Complex Magnitude - - Computes the magnitude of the elements of a complex data vector. - - The pSrc points to the source data and - pDst points to the where the result should be written. - numSamples specifies the number of complex samples - in the input array and the data is stored in an interleaved fashion - (real, imag, real, imag, ...). - The input array has a total of 2*numSamples values; - the output array has a total of numSamples values. - - The underlying algorithm is used: - - 
-  for (n = 0; n < numSamples; n++) {
-      pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup cmplx_mag - @{ - */ - -/** - @brief Floating-point complex magnitude. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - -void arm_cmplx_mag_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t numSamples) -{ - int32_t blockSize = numSamples; /* loop counters */ - uint32_t blkCnt; /* loop counters */ - f16x8x2_t vecSrc; - f16x8_t sum; - - /* Compute 4 complex samples at a time */ - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - q15x8_t newtonStartVec; - f16x8_t sumHalf, invSqrt; - - vecSrc = vld2q(pSrc); - pSrc += 16; - sum = vmulq(vecSrc.val[0], vecSrc.val[0]); - sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]); - - /* - * inlined Fast SQRT using inverse SQRT newton-raphson method - */ - - /* compute initial value */ - newtonStartVec = vdupq_n_s16(INVSQRT_MAGIC_F16) - vshrq((q15x8_t) sum, 1); - sumHalf = sum * 0.5f; - /* - * compute 3 x iterations - * - * The more iterations, the more accuracy. - * If you need to trade a bit of accuracy for more performance, - * you can comment out the 3rd use of the macro. - */ - INVSQRT_NEWTON_MVE_F16(invSqrt, sumHalf, (f16x8_t) newtonStartVec); - INVSQRT_NEWTON_MVE_F16(invSqrt, sumHalf, invSqrt); - INVSQRT_NEWTON_MVE_F16(invSqrt, sumHalf, invSqrt); - /* - * set negative values to 0 - */ - invSqrt = vdupq_m(invSqrt, (float16_t)0.0f, vcmpltq(invSqrt, (float16_t)0.0f)); - /* - * sqrt(x) = x * invSqrt(x) - */ - sum = vmulq(sum, invSqrt); - vstrhq_f16(pDst, sum); - pDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - q15x8_t newtonStartVec; - f16x8_t sumHalf, invSqrt; - - vecSrc = vld2q((float16_t const *)pSrc); - sum = vmulq(vecSrc.val[0], vecSrc.val[0]); - sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]); - - /* - * inlined Fast SQRT using inverse SQRT newton-raphson method - */ - - /* compute initial value */ - newtonStartVec = vdupq_n_s16(INVSQRT_MAGIC_F16) - vshrq((q15x8_t) sum, 1); - sumHalf = vmulq(sum, (float16_t)0.5); - /* - * compute 2 x iterations - */ - INVSQRT_NEWTON_MVE_F16(invSqrt, sumHalf, (f16x8_t) newtonStartVec); - INVSQRT_NEWTON_MVE_F16(invSqrt, sumHalf, invSqrt); - /* - * set negative values to 0 - */ - invSqrt = vdupq_m(invSqrt, (float16_t)0.0, vcmpltq(invSqrt, (float16_t)0.0)); - /* - * sqrt(x) = x * invSqrt(x) - */ - sum = vmulq(sum, invSqrt); - vstrhq_p_f16(pDst, sum, p0); - } -} - -#else -void arm_cmplx_mag_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* loop counter */ - _Float16 real, imag; /* Temporary variables to hold input values */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - - /* store result in destination buffer. */ - arm_sqrt_f16((real * real) + (imag * imag), pDst++); - - real = *pSrc++; - imag = *pSrc++; - arm_sqrt_f16((real * real) + (imag * imag), pDst++); - - real = *pSrc++; - imag = *pSrc++; - arm_sqrt_f16((real * real) + (imag * imag), pDst++); - - real = *pSrc++; - imag = *pSrc++; - arm_sqrt_f16((real * real) + (imag * imag), pDst++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - - /* store result in destination buffer. */ - arm_sqrt_f16((real * real) + (imag * imag), pDst++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of cmplx_mag group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c deleted file mode 100644 index 0f9f7d3..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c +++ /dev/null @@ -1,273 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_f32.c - * Description: Floating-point complex magnitude - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup cmplx_mag Complex Magnitude - - Computes the magnitude of the elements of a complex data vector. - - The pSrc points to the source data and - pDst points to the where the result should be written. - numSamples specifies the number of complex samples - in the input array and the data is stored in an interleaved fashion - (real, imag, real, imag, ...). - The input array has a total of 2*numSamples values; - the output array has a total of numSamples values. - - The underlying algorithm is used: - - 
-  for (n = 0; n < numSamples; n++) {
-      pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup cmplx_mag - @{ - */ - -/** - @brief Floating-point complex magnitude. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_vec_math.h" -#endif - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - -void arm_cmplx_mag_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples) -{ - int32_t blockSize = numSamples; /* loop counters */ - uint32_t blkCnt; /* loop counters */ - f32x4x2_t vecSrc; - f32x4_t sum; - float32_t real, imag; /* Temporary variables to hold input values */ - - /* Compute 4 complex samples at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - q31x4_t newtonStartVec; - f32x4_t sumHalf, invSqrt; - - vecSrc = vld2q(pSrc); - pSrc += 8; - sum = vmulq(vecSrc.val[0], vecSrc.val[0]); - sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]); - - /* - * inlined Fast SQRT using inverse SQRT newton-raphson method - */ - - /* compute initial value */ - newtonStartVec = vdupq_n_s32(INVSQRT_MAGIC_F32) - vshrq((q31x4_t) sum, 1); - sumHalf = sum * 0.5f; - /* - * compute 3 x iterations - * - * The more iterations, the more accuracy. - * If you need to trade a bit of accuracy for more performance, - * you can comment out the 3rd use of the macro. - */ - INVSQRT_NEWTON_MVE_F32(invSqrt, sumHalf, (f32x4_t) newtonStartVec); - INVSQRT_NEWTON_MVE_F32(invSqrt, sumHalf, invSqrt); - INVSQRT_NEWTON_MVE_F32(invSqrt, sumHalf, invSqrt); - /* - * set negative values to 0 - */ - invSqrt = vdupq_m(invSqrt, 0.0f, vcmpltq(invSqrt, 0.0f)); - /* - * sqrt(x) = x * invSqrt(x) - */ - sum = vmulq(sum, invSqrt); - vst1q(pDst, sum); - pDst += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - - /* store result in destination buffer. */ - arm_sqrt_f32((real * real) + (imag * imag), pDst++); - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -void arm_cmplx_mag_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* loop counter */ - float32_t real, imag; /* Temporary variables to hold input values */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - - float32x4x2_t vecA; - float32x4_t vRealA; - float32x4_t vImagA; - float32x4_t vMagSqA; - - float32x4x2_t vecB; - float32x4_t vRealB; - float32x4_t vImagB; - float32x4_t vMagSqB; - - /* Loop unrolling: Compute 8 outputs at a time */ - blkCnt = numSamples >> 3; - - while (blkCnt > 0U) - { - /* out = sqrt((real * real) + (imag * imag)) */ - - vecA = vld2q_f32(pSrc); - pSrc += 8; - - vecB = vld2q_f32(pSrc); - pSrc += 8; - - vRealA = vmulq_f32(vecA.val[0], vecA.val[0]); - vImagA = vmulq_f32(vecA.val[1], vecA.val[1]); - vMagSqA = vaddq_f32(vRealA, vImagA); - - vRealB = vmulq_f32(vecB.val[0], vecB.val[0]); - vImagB = vmulq_f32(vecB.val[1], vecB.val[1]); - vMagSqB = vaddq_f32(vRealB, vImagB); - - /* Store the result in the destination buffer. */ - vst1q_f32(pDst, __arm_vec_sqrt_f32_neon(vMagSqA)); - pDst += 4; - - vst1q_f32(pDst, __arm_vec_sqrt_f32_neon(vMagSqB)); - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - blkCnt = numSamples & 7; - -#else - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - - /* store result in destination buffer. */ - arm_sqrt_f32((real * real) + (imag * imag), pDst++); - - real = *pSrc++; - imag = *pSrc++; - arm_sqrt_f32((real * real) + (imag * imag), pDst++); - - real = *pSrc++; - imag = *pSrc++; - arm_sqrt_f32((real * real) + (imag * imag), pDst++); - - real = *pSrc++; - imag = *pSrc++; - arm_sqrt_f32((real * real) + (imag * imag), pDst++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - - /* store result in destination buffer. */ - arm_sqrt_f32((real * real) + (imag * imag), pDst++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of cmplx_mag group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f64.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f64.c deleted file mode 100644 index 9e2d82e..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f64.c +++ /dev/null @@ -1,100 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_f64.c - * Description: Floating-point complex magnitude - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup cmplx_mag Complex Magnitude - - Computes the magnitude of the elements of a complex data vector. - - The pSrc points to the source data and - pDst points to the where the result should be written. - numSamples specifies the number of complex samples - in the input array and the data is stored in an interleaved fashion - (real, imag, real, imag, ...). - The input array has a total of 2*numSamples values; - the output array has a total of numSamples values. - - The underlying algorithm is used: - - 
-  for (n = 0; n < numSamples; n++) {
-      pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup cmplx_mag - @{ - */ - -/** - @brief Floating-point complex magnitude. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - */ -void arm_cmplx_mag_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* loop counter */ - float64_t real, imag; /* Temporary variables to hold input values */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - - /* store result in destination buffer. */ - *pDst++ = sqrt((real * real) + (imag * imag)); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of cmplx_mag group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_fast_q15.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_fast_q15.c deleted file mode 100644 index 90ce4cc..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_fast_q15.c +++ /dev/null @@ -1,223 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_fast_q15.c - * Description: Q15 complex magnitude - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup cmplx_mag - @{ - */ - -/** - @brief Q15 complex magnitude. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format. - Fast functions are less accurate. This function will tend to clamp to 0 - the too small values. So sqrt(x*x) = x will not always be true. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_cmplx_mag_fast_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples) -{ - - int32_t blockSize = numSamples; /* loop counters */ - uint32_t blkCnt; /* loop counters */ - q15x8x2_t vecSrc; - q15x8_t sum; - q31_t in; - q31_t acc0; - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - vecSrc = vld2q(pSrc); - pSrc += 16; - sum = vqaddq(vmulhq(vecSrc.val[0], vecSrc.val[0]), - vmulhq(vecSrc.val[1], vecSrc.val[1])); - - sum = vshrq(sum, 1); - - sum = FAST_VSQRT_Q15(sum); - - vst1q(pDst, sum); - pDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* - * tail - */ - blkCnt = blockSize & 7; - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - - /* store result in 2.14 format in destination buffer. */ - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); - - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -void arm_cmplx_mag_fast_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_DSP) - q31_t in; - q31_t acc0; /* Accumulators */ -#else - q15_t real, imag; /* Temporary input variables */ - q31_t acc0, acc1; /* Accumulators */ -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - -#if defined (ARM_MATH_DSP) - in = read_q15x2_ia (&pSrc); - acc0 = __SMUAD(in, in); - /* store result in 2.14 format in destination buffer. */ - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); - - in = read_q15x2_ia (&pSrc); - acc0 = __SMUAD(in, in); - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); - - in = read_q15x2_ia (&pSrc); - acc0 = __SMUAD(in, in); - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); - - in = read_q15x2_ia (&pSrc); - acc0 = __SMUAD(in, in); - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); -#else - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - - /* store result in 2.14 format in destination buffer. */ - arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); - - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); - - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); - - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - -#if defined (ARM_MATH_DSP) - in = read_q15x2_ia (&pSrc); - acc0 = __SMUAD(in, in); - - /* store result in 2.14 format in destination buffer. */ - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); -#else - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - - /* store result in 2.14 format in destination buffer. */ - arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of cmplx_mag group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c deleted file mode 100644 index 90d08d5..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c +++ /dev/null @@ -1,221 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_q15.c - * Description: Q15 complex magnitude - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup cmplx_mag - @{ - */ - -/** - @brief Q15 complex magnitude. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_cmplx_mag_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples) -{ - - int32_t blockSize = numSamples; /* loop counters */ - uint32_t blkCnt; /* loop counters */ - q15x8x2_t vecSrc; - q15x8_t sum; - q31_t in; - q31_t acc0; - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - vecSrc = vld2q(pSrc); - pSrc += 16; - sum = vqaddq(vmulhq(vecSrc.val[0], vecSrc.val[0]), - vmulhq(vecSrc.val[1], vecSrc.val[1])); - - sum = vshrq(sum, 1); - - sum = FAST_VSQRT_Q15(sum); - - vst1q(pDst, sum); - pDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* - * tail - */ - blkCnt = blockSize & 7; - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - - /* store result in 2.14 format in destination buffer. */ - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); - - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -void arm_cmplx_mag_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_DSP) - q31_t in; - q31_t acc0; /* Accumulators */ -#else - q15_t real, imag; /* Temporary input variables */ - q31_t acc0, acc1; /* Accumulators */ -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - -#if defined (ARM_MATH_DSP) - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - /* store result in 2.14 format in destination buffer. */ - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); - - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); - - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); - - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); -#else - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - - /* store result in 2.14 format in destination buffer. */ - arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); - - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); - - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); - - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - -#if defined (ARM_MATH_DSP) - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - - /* store result in 2.14 format in destination buffer. */ - arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); -#else - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - - /* store result in 2.14 format in destination buffer. */ - arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of cmplx_mag group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c deleted file mode 100644 index f45930f..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c +++ /dev/null @@ -1,201 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_q31.c - * Description: Q31 complex magnitude - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup cmplx_mag - @{ - */ - -/** - @brief Q31 complex magnitude. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format. - Input down scaling is not required. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_cmplx_mag_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples) -{ - int32_t blockSize = numSamples; /* loop counters */ - uint32_t blkCnt; /* loop counters */ - - q31x4x2_t vecSrc; - q31x4_t sum; - - q31_t real, imag; /* Temporary input variables */ - q31_t acc0, acc1; /* Accumulators */ - - /* Compute 4 complex samples at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - vecSrc = vld2q(pSrc); - - sum = vqaddq(vmulhq(vecSrc.val[0], vecSrc.val[0]), - vmulhq(vecSrc.val[1], vecSrc.val[1])); - - sum = vshrq(sum, 1); - - /* - - This function is using a table. There are compilations flags to avoid - including this table (and in this case, arm_cmplx_maq_q31 must not - be built and linked.) - - */ - sum = FAST_VSQRT_Q31(sum); - - vst1q(pDst, sum); - - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - pSrc += 8; - pDst += 4; - } - - /* - * tail - */ - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - - /* store result in 2.30 format in destination buffer. */ - arm_sqrt_q31(acc0 + acc1, pDst++); - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -void arm_cmplx_mag_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t real, imag; /* Temporary input variables */ - q31_t acc0, acc1; /* Accumulators */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - - /* store result in 2.30 format in destination buffer. */ - arm_sqrt_q31(acc0 + acc1, pDst++); - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - arm_sqrt_q31(acc0 + acc1, pDst++); - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - arm_sqrt_q31(acc0 + acc1, pDst++); - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - arm_sqrt_q31(acc0 + acc1, pDst++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - - /* store result in 2.30 format in destination buffer. */ - arm_sqrt_q31(acc0 + acc1, pDst++); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of cmplx_mag group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f16.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f16.c deleted file mode 100644 index 9851ad9..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f16.c +++ /dev/null @@ -1,174 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_squared_f16.c - * Description: Floating-point complex magnitude squared - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup cmplx_mag_squared Complex Magnitude Squared - - Computes the magnitude squared of the elements of a complex data vector. - - The pSrc points to the source data and - pDst points to the where the result should be written. - numSamples specifies the number of complex samples - in the input array and the data is stored in an interleaved fashion - (real, imag, real, imag, ...). - The input array has a total of 2*numSamples values; - the output array has a total of numSamples values. - - The underlying algorithm is used: - - 
-  for (n = 0; n < numSamples; n++) {
-      pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup cmplx_mag_squared - @{ - */ - -/** - @brief Floating-point complex magnitude squared. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_mag_squared_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t numSamples) -{ - int32_t blockSize = numSamples; /* loop counters */ - f16x8x2_t vecSrc; - f16x8_t sum; - - /* Compute 4 complex samples at a time */ - while (blockSize > 0) - { - mve_pred16_t p = vctp16q(blockSize); - vecSrc = vld2q(pSrc); - sum = vmulq_m(vuninitializedq_f16(),vecSrc.val[0], vecSrc.val[0],p); - sum = vfmaq_m(sum, vecSrc.val[1], vecSrc.val[1],p); - vstrhq_p_f16(pDst, sum,p); - - pSrc += 16; - pDst += 8; - - /* - * Decrement the blockSize loop counter - */ - blockSize-= 8; - } - -} - -#else -void arm_cmplx_mag_squared_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - _Float16 real, imag; /* Temporary input variables */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - *pDst++ = (real * real) + (imag * imag); - - real = *pSrc++; - imag = *pSrc++; - *pDst++ = (real * real) + (imag * imag); - - real = *pSrc++; - imag = *pSrc++; - *pDst++ = (real * real) + (imag * imag); - - real = *pSrc++; - imag = *pSrc++; - *pDst++ = (real * real) + (imag * imag); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - - /* store result in destination buffer. */ - *pDst++ = (real * real) + (imag * imag); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of cmplx_mag_squared group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c deleted file mode 100644 index 76e741c..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c +++ /dev/null @@ -1,235 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_squared_f32.c - * Description: Floating-point complex magnitude squared - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup cmplx_mag_squared Complex Magnitude Squared - - Computes the magnitude squared of the elements of a complex data vector. - - The pSrc points to the source data and - pDst points to the where the result should be written. - numSamples specifies the number of complex samples - in the input array and the data is stored in an interleaved fashion - (real, imag, real, imag, ...). - The input array has a total of 2*numSamples values; - the output array has a total of numSamples values. - - The underlying algorithm is used: - - 
-  for (n = 0; n < numSamples; n++) {
-      pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup cmplx_mag_squared - @{ - */ - -/** - @brief Floating-point complex magnitude squared. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_mag_squared_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples) -{ - int32_t blockSize = numSamples; /* loop counters */ - uint32_t blkCnt; /* loop counters */ - f32x4x2_t vecSrc; - f32x4_t sum; - float32_t real, imag; /* Temporary input variables */ - - /* Compute 4 complex samples at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - vecSrc = vld2q(pSrc); - sum = vmulq(vecSrc.val[0], vecSrc.val[0]); - sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]); - vst1q(pDst, sum); - - pSrc += 8; - pDst += 4; - - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - - /* store result in destination buffer. */ - *pDst++ = (real * real) + (imag * imag); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -#else -void arm_cmplx_mag_squared_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - float32_t real, imag; /* Temporary input variables */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - float32x4x2_t vecA; - float32x4_t vRealA; - float32x4_t vImagA; - float32x4_t vMagSqA; - - float32x4x2_t vecB; - float32x4_t vRealB; - float32x4_t vImagB; - float32x4_t vMagSqB; - - /* Loop unrolling: Compute 8 outputs at a time */ - blkCnt = numSamples >> 3; - - while (blkCnt > 0U) - { - /* out = sqrt((real * real) + (imag * imag)) */ - - vecA = vld2q_f32(pSrc); - pSrc += 8; - - vRealA = vmulq_f32(vecA.val[0], vecA.val[0]); - vImagA = vmulq_f32(vecA.val[1], vecA.val[1]); - vMagSqA = vaddq_f32(vRealA, vImagA); - - vecB = vld2q_f32(pSrc); - pSrc += 8; - - vRealB = vmulq_f32(vecB.val[0], vecB.val[0]); - vImagB = vmulq_f32(vecB.val[1], vecB.val[1]); - vMagSqB = vaddq_f32(vRealB, vImagB); - - /* Store the result in the destination buffer. */ - vst1q_f32(pDst, vMagSqA); - pDst += 4; - - vst1q_f32(pDst, vMagSqB); - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - blkCnt = numSamples & 7; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - *pDst++ = (real * real) + (imag * imag); - - real = *pSrc++; - imag = *pSrc++; - *pDst++ = (real * real) + (imag * imag); - - real = *pSrc++; - imag = *pSrc++; - *pDst++ = (real * real) + (imag * imag); - - real = *pSrc++; - imag = *pSrc++; - *pDst++ = (real * real) + (imag * imag); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - - /* store result in destination buffer. */ - *pDst++ = (real * real) + (imag * imag); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of cmplx_mag_squared group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f64.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f64.c deleted file mode 100644 index d20b34f..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f64.c +++ /dev/null @@ -1,76 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_squared_f64.c - * Description: Floating-point complex magnitude squared - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup cmplx_mag_squared - @{ - */ - -/** - @brief Floating-point complex magnitude squared. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - */ -void arm_cmplx_mag_squared_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - float64_t real, imag; /* Temporary input variables */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - - /* store result in destination buffer. */ - *pDst++ = (real * real) + (imag * imag); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of cmplx_mag_squared group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c deleted file mode 100644 index 183d052..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c +++ /dev/null @@ -1,221 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_squared_q15.c - * Description: Q15 complex magnitude squared - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup cmplx_mag_squared - @{ - */ - -/** - @brief Q15 complex magnitude squared. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_mag_squared_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples) -{ - int32_t blockSize = numSamples; /* loop counters */ - uint32_t blkCnt; /* loop counters */ - q31_t in; - q31_t acc0; /* Accumulators */ - q15x8x2_t vecSrc; - q15x8_t vReal, vImag; - q15x8_t vMagSq; - - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - vecSrc = vld2q(pSrc); - vReal = vmulhq(vecSrc.val[0], vecSrc.val[0]); - vImag = vmulhq(vecSrc.val[1], vecSrc.val[1]); - vMagSq = vqaddq(vReal, vImag); - vMagSq = vshrq(vMagSq, 1); - - vst1q(pDst, vMagSq); - - pSrc += 16; - pDst += 8; - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - blkCnt --; - } - - /* - * tail - */ - blkCnt = blockSize & 7; - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - - /* store result in 3.13 format in destination buffer. */ - *pDst++ = (q15_t) (acc0 >> 17); - - - /* Decrement loop counter */ - blkCnt--; - } - -} - -#else -void arm_cmplx_mag_squared_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_DSP) - q31_t in; - q31_t acc0; /* Accumulators */ -#else - q15_t real, imag; /* Temporary input variables */ - q31_t acc0, acc1; /* Accumulators */ -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - -#if defined (ARM_MATH_DSP) - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - /* store result in 3.13 format in destination buffer. */ - *pDst++ = (q15_t) (acc0 >> 17); - - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - *pDst++ = (q15_t) (acc0 >> 17); - - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - *pDst++ = (q15_t) (acc0 >> 17); - - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - *pDst++ = (q15_t) (acc0 >> 17); -#else - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - /* store result in 3.13 format in destination buffer. */ - *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17); - - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17); - - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17); - - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17); -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - -#if defined (ARM_MATH_DSP) - in = read_q15x2_ia ((q15_t **) &pSrc); - acc0 = __SMUAD(in, in); - - /* store result in 3.13 format in destination buffer. */ - *pDst++ = (q15_t) (acc0 >> 17); -#else - real = *pSrc++; - imag = *pSrc++; - acc0 = ((q31_t) real * real); - acc1 = ((q31_t) imag * imag); - - /* store result in 3.13 format in destination buffer. */ - *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} - -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of cmplx_mag_squared group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c deleted file mode 100644 index b1657b0..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c +++ /dev/null @@ -1,187 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mag_squared_q31.c - * Description: Q31 complex magnitude squared - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup cmplx_mag_squared - @{ - */ - -/** - @brief Q31 complex magnitude squared. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. - Input down scaling is not required. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_mag_squared_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples) -{ - int32_t blockSize = numSamples; /* loop counters */ - uint32_t blkCnt; /* loop counters */ - q31x4x2_t vecSrc; - q31x4_t vReal, vImag; - q31x4_t vMagSq; - q31_t real, imag; /* Temporary input variables */ - q31_t acc0, acc1; /* Accumulators */ - - /* Compute 4 complex samples at a time */ - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - vecSrc = vld2q(pSrc); - vReal = vmulhq(vecSrc.val[0], vecSrc.val[0]); - vImag = vmulhq(vecSrc.val[1], vecSrc.val[1]); - vMagSq = vqaddq(vReal, vImag); - vMagSq = vshrq(vMagSq, 1); - - vst1q(pDst, vMagSq); - - pSrc += 8; - pDst += 4; - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - blkCnt --; - } - - /* Tail */ - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - - /* store result in 3.29 format in destination buffer. */ - *pDst++ = acc0 + acc1; - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -void arm_cmplx_mag_squared_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t real, imag; /* Temporary input variables */ - q31_t acc0, acc1; /* Accumulators */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - /* store the result in 3.29 format in the destination buffer. */ - *pDst++ = acc0 + acc1; - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - *pDst++ = acc0 + acc1; - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - *pDst++ = acc0 + acc1; - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - *pDst++ = acc0 + acc1; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[0] = (A[0] * A[0] + A[1] * A[1]) */ - - real = *pSrc++; - imag = *pSrc++; - acc0 = (q31_t) (((q63_t) real * real) >> 33); - acc1 = (q31_t) (((q63_t) imag * imag) >> 33); - - /* store result in 3.29 format in destination buffer. */ - *pDst++ = acc0 + acc1; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of cmplx_mag_squared group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f16.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f16.c deleted file mode 100644 index 4dc1c4d..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f16.c +++ /dev/null @@ -1,271 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mult_cmplx_f16.c - * Description: Floating-point complex-by-complex multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication - - Multiplies a complex vector by another complex vector and generates a complex result. - The data in the complex arrays is stored in an interleaved fashion - (real, imag, real, imag, ...). - The parameter numSamples represents the number of complex - samples processed. The complex arrays have a total of 2*numSamples - real values. - - The underlying algorithm is used: - - 
-  for (n = 0; n < numSamples; n++) {
-      pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
-      pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup CmplxByCmplxMult - @{ - */ - -/** - @brief Floating-point complex-by-complex multiplication. - @param[in] pSrcA points to first input vector - @param[in] pSrcB points to second input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_mult_cmplx_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t numSamples) -{ - int32_t blkCnt; - f16x8_t vecSrcA, vecSrcB; - f16x8_t vecSrcC, vecSrcD; - f16x8_t vec_acc; - - blkCnt = (numSamples >> 3); - blkCnt -= 1; - if (blkCnt > 0) { - /* should give more freedom to generate stall free code */ - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - pSrcA += 8; - pSrcB += 8; - - while (blkCnt > 0) { - vec_acc = vcmulq(vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - pSrcA += 8; - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - pSrcB += 8; - vst1q(pDst, vec_acc); - pDst += 8; - - vec_acc = vcmulq(vecSrcC, vecSrcD); - vecSrcA = vld1q(pSrcA); - pSrcA += 8; - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD); - vecSrcB = vld1q(pSrcB); - pSrcB += 8; - vst1q(pDst, vec_acc); - pDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* process last elements out of the loop avoid the armclang breaking the SW pipeline */ - vec_acc = vcmulq(vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - vst1q(pDst, vec_acc); - pDst += 8; - - vec_acc = vcmulq(vecSrcC, vecSrcD); - vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD); - vst1q(pDst, vec_acc); - pDst += 8; - - /* - * tail - */ - blkCnt = CMPLX_DIM * (numSamples & 7); - while (blkCnt > 0) { - mve_pred16_t p = vctp16q(blkCnt); - pSrcA += 8; - pSrcB += 8; - - vecSrcA = vldrhq_z_f16(pSrcA, p); - vecSrcB = vldrhq_z_f16(pSrcB, p); - vec_acc = vcmulq_m(vuninitializedq_f16(),vecSrcA, vecSrcB, p); - vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p); - - vstrhq_p_f16(pDst, vec_acc, p); - pDst += 8; - - blkCnt -= 8; - } - } else { - /* small vector */ - blkCnt = numSamples * CMPLX_DIM; - - do { - mve_pred16_t p = vctp16q(blkCnt); - - vecSrcA = vldrhq_z_f16(pSrcA, p); - vecSrcB = vldrhq_z_f16(pSrcB, p); - - vec_acc = vcmulq_m(vuninitializedq_f16(),vecSrcA, vecSrcB, p); - vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p); - vstrhq_p_f16(pDst, vec_acc, p); - pDst += 8; - - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - pSrcA += 8; - pSrcB += 8; - blkCnt -= 8; - } - while (blkCnt > 0); - } - -} - - -#else -void arm_cmplx_mult_cmplx_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - float16_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - _Float16 a, b, c, d; /* Temporary variables to store real and imaginary values */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */ - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */ - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - /* store result in destination buffer. */ - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */ - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */ - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - - /* store result in destination buffer. */ - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of CmplxByCmplxMult group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c deleted file mode 100644 index 44124ac..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c +++ /dev/null @@ -1,305 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mult_cmplx_f32.c - * Description: Floating-point complex-by-complex multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication - - Multiplies a complex vector by another complex vector and generates a complex result. - The data in the complex arrays is stored in an interleaved fashion - (real, imag, real, imag, ...). - The parameter numSamples represents the number of complex - samples processed. The complex arrays have a total of 2*numSamples - real values. - - The underlying algorithm is used: - - 
-  for (n = 0; n < numSamples; n++) {
-      pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
-      pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup CmplxByCmplxMult - @{ - */ - -/** - @brief Floating-point complex-by-complex multiplication. - @param[in] pSrcA points to first input vector - @param[in] pSrcB points to second input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_mult_cmplx_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t numSamples) -{ - int32_t blkCnt; - f32x4_t vecSrcA, vecSrcB; - f32x4_t vecSrcC, vecSrcD; - f32x4_t vec_acc; - - blkCnt = numSamples >> 2; - blkCnt -= 1; - if (blkCnt > 0) { - /* should give more freedom to generate stall free code */ - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - pSrcA += 4; - pSrcB += 4; - - while (blkCnt > 0) { - vec_acc = vcmulq(vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - pSrcA += 4; - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - pSrcB += 4; - vst1q(pDst, vec_acc); - pDst += 4; - - vec_acc = vcmulq(vecSrcC, vecSrcD); - vecSrcA = vld1q(pSrcA); - pSrcA += 4; - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD); - vecSrcB = vld1q(pSrcB); - pSrcB += 4; - vst1q(pDst, vec_acc); - pDst += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* process last elements out of the loop avoid the armclang breaking the SW pipeline */ - vec_acc = vcmulq(vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - - vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - vst1q(pDst, vec_acc); - pDst += 4; - - vec_acc = vcmulq(vecSrcC, vecSrcD); - vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD); - vst1q(pDst, vec_acc); - pDst += 4; - - /* - * tail - */ - blkCnt = CMPLX_DIM * (numSamples & 3); - while (blkCnt > 0) { - mve_pred16_t p = vctp32q(blkCnt); - pSrcA += 4; - pSrcB += 4; - - vecSrcA = vldrwq_z_f32(pSrcA, p); - vecSrcB = vldrwq_z_f32(pSrcB, p); - vec_acc = vcmulq_m(vuninitializedq_f32(),vecSrcA, vecSrcB, p); - vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p); - - vstrwq_p_f32(pDst, vec_acc, p); - pDst += 4; - - blkCnt -= 4; - } - } else { - /* small vector */ - blkCnt = numSamples * CMPLX_DIM; - vec_acc = vdupq_n_f32(0.0f); - - do { - mve_pred16_t p = vctp32q(blkCnt); - - vecSrcA = vldrwq_z_f32(pSrcA, p); - vecSrcB = vldrwq_z_f32(pSrcB, p); - - vec_acc = vcmulq_m(vuninitializedq_f32(),vecSrcA, vecSrcB, p); - vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p); - vstrwq_p_f32(pDst, vec_acc, p); - pDst += 4; - - /* - * Decrement the blkCnt loop counter - * Advance vector source and destination pointers - */ - pSrcA += 4; - pSrcB += 4; - blkCnt -= 4; - } - while (blkCnt > 0); - } - -} - -#else -void arm_cmplx_mult_cmplx_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - float32_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - float32_t a, b, c, d; /* Temporary variables to store real and imaginary values */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - float32x4x2_t va, vb; - float32x4x2_t outCplx; - - /* Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - va = vld2q_f32(pSrcA); // load & separate real/imag pSrcA (de-interleave 2) - vb = vld2q_f32(pSrcB); // load & separate real/imag pSrcB - - /* Increment pointers */ - pSrcA += 8; - pSrcB += 8; - - /* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */ - outCplx.val[0] = vmulq_f32(va.val[0], vb.val[0]); - outCplx.val[0] = vmlsq_f32(outCplx.val[0], va.val[1], vb.val[1]); - - /* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */ - outCplx.val[1] = vmulq_f32(va.val[0], vb.val[1]); - outCplx.val[1] = vmlaq_f32(outCplx.val[1], va.val[1], vb.val[0]); - - vst2q_f32(pDst, outCplx); - - /* Increment pointer */ - pDst += 8; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Tail */ - blkCnt = numSamples & 3; - -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */ - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */ - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - /* store result in destination buffer. */ - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */ - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */ - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - - /* store result in destination buffer. */ - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of CmplxByCmplxMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f64.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f64.c deleted file mode 100644 index 9112846..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f64.c +++ /dev/null @@ -1,83 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mult_cmplx_f64.c - * Description: Floating-point complex-by-complex multiplication - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup CmplxByCmplxMult - @{ - */ - -/** - @brief Floating-point complex-by-complex multiplication. - @param[in] pSrcA points to first input vector - @param[in] pSrcB points to second input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -void arm_cmplx_mult_cmplx_f64( - const float64_t * pSrcA, - const float64_t * pSrcB, - float64_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - float64_t a, b, c, d; /* Temporary variables to store real and imaginary values */ - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */ - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */ - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - - /* store result in destination buffer. */ - *pDst++ = (a * c) - (b * d); - *pDst++ = (a * d) + (b * c); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of CmplxByCmplxMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c deleted file mode 100644 index db4c312..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c +++ /dev/null @@ -1,258 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mult_cmplx_q15.c - * Description: Q15 complex-by-complex multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup CmplxByCmplxMult - @{ - */ - -/** - @brief Q15 complex-by-complex multiplication. - @param[in] pSrcA points to first input vector - @param[in] pSrcB points to second input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_mult_cmplx_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t numSamples) -{ - int32_t blkCnt; - q15x8_t vecSrcA, vecSrcB; - q15x8_t vecSrcC, vecSrcD; - q15x8_t vecDst; - - blkCnt = (numSamples >> 3); - blkCnt -= 1; - if (blkCnt > 0) - { - /* should give more freedom to generate stall free code */ - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - pSrcA += 8; - pSrcB += 8; - - while (blkCnt > 0) - { - - /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ - vecDst = vqdmlsdhq(vuninitializedq_s16(), vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - pSrcA += 8; - - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ - vecDst = vqdmladhxq(vecDst, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - pSrcB += 8; - - vstrhq_s16(pDst, vshrq(vecDst, 2)); - pDst += 8; - - vecDst = vqdmlsdhq(vuninitializedq_s16(), vecSrcC, vecSrcD); - vecSrcA = vld1q(pSrcA); - pSrcA += 8; - - vecDst = vqdmladhxq(vecDst, vecSrcC, vecSrcD); - vecSrcB = vld1q(pSrcB); - pSrcB += 8; - - vstrhq_s16(pDst, vshrq(vecDst, 2)); - pDst += 8; - - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* process last elements out of the loop avoid the armclang breaking the SW pipeline */ - vecDst = vqdmlsdhq(vuninitializedq_s16(), vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - - vecDst = vqdmladhxq(vecDst, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - - vstrhq_s16(pDst, vshrq(vecDst, 2)); - pDst += 8; - - vecDst = vqdmlsdhq(vuninitializedq_s16(), vecSrcC, vecSrcD); - vecDst = vqdmladhxq(vecDst, vecSrcC, vecSrcD); - - vstrhq_s16(pDst, vshrq(vecDst, 2)); - pDst += 8; - - /* - * tail - */ - blkCnt = CMPLX_DIM * (numSamples & 7); - do - { - mve_pred16_t p = vctp16q(blkCnt); - - pSrcA += 8; - pSrcB += 8; - - vecSrcA = vldrhq_z_s16(pSrcA, p); - vecSrcB = vldrhq_z_s16(pSrcB, p); - - vecDst = vqdmlsdhq_m(vuninitializedq_s16(), vecSrcA, vecSrcB, p); - vecDst = vqdmladhxq_m(vecDst, vecSrcA, vecSrcB, p); - - vecDst = vshrq_m(vuninitializedq_s16(), vecDst, 2, p); - vstrhq_p_s16(pDst, vecDst, p); - pDst += 8; - - blkCnt -= 8; - } - while ((int32_t) blkCnt > 0); - } - else - { - blkCnt = numSamples * CMPLX_DIM; - while (blkCnt > 0) { - mve_pred16_t p = vctp16q(blkCnt); - - vecSrcA = vldrhq_z_s16(pSrcA, p); - vecSrcB = vldrhq_z_s16(pSrcB, p); - - vecDst = vqdmlsdhq_m(vuninitializedq_s16(), vecSrcA, vecSrcB, p); - vecDst = vqdmladhxq_m(vecDst, vecSrcA, vecSrcB, p); - - vecDst = vshrq_m(vuninitializedq_s16(), vecDst, 2, p); - vstrhq_p_s16(pDst, vecDst, p); - - pDst += 8; - pSrcA += 8; - pSrcB += 8; - - blkCnt -= 8; - } - } -} -#else -void arm_cmplx_mult_cmplx_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - q15_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - q15_t a, b, c, d; /* Temporary variables */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */ - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */ - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - /* store result in 3.13 format in destination buffer. */ - *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) ); - *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) ); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) ); - *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) ); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) ); - *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) ); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) ); - *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) ); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */ - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */ - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - - /* store result in 3.13 format in destination buffer. */ - *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) ); - *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) ); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of CmplxByCmplxMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c deleted file mode 100644 index 6a9dc5d..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c +++ /dev/null @@ -1,253 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mult_cmplx_q31.c - * Description: Q31 complex-by-complex multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup CmplxByCmplxMult - @{ - */ - -/** - @brief Q31 complex-by-complex multiplication. - @param[in] pSrcA points to first input vector - @param[in] pSrcB points to second input vector - @param[out] pDst points to output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. - Input down scaling is not required. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_cmplx_mult_cmplx_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t numSamples) -{ - int32_t blkCnt; - q31x4_t vecSrcA, vecSrcB; - q31x4_t vecSrcC, vecSrcD; - q31x4_t vecDst; - - blkCnt = numSamples >> 2; - blkCnt -= 1; - if (blkCnt > 0) { - /* should give more freedom to generate stall free code */ - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - pSrcA += 4; - pSrcB += 4; - - while (blkCnt > 0) { - - /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ - vecDst = vqdmlsdhq(vuninitializedq_s32(), vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - pSrcA += 4; - - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ - vecDst = vqdmladhxq(vecDst, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - pSrcB += 4; - - vst1q(pDst, vshrq(vecDst, 2)); - pDst += 4; - - vecDst = vqdmlsdhq(vuninitializedq_s32(), vecSrcC, vecSrcD); - vecSrcA = vld1q(pSrcA); - pSrcA += 4; - - vecDst = vqdmladhxq(vecDst, vecSrcC, vecSrcD); - vecSrcB = vld1q(pSrcB); - pSrcB += 4; - - vst1q(pDst, vshrq(vecDst, 2)); - pDst += 4; - - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* process last elements out of the loop avoid the armclang breaking the SW pipeline */ - vecDst = vqdmlsdhq(vuninitializedq_s32(), vecSrcA, vecSrcB); - vecSrcC = vld1q(pSrcA); - - vecDst = vqdmladhxq(vecDst, vecSrcA, vecSrcB); - vecSrcD = vld1q(pSrcB); - - vst1q(pDst, vshrq(vecDst, 2)); - pDst += 4; - - vecDst = vqdmlsdhq(vuninitializedq_s32(), vecSrcC, vecSrcD); - vecDst = vqdmladhxq(vecDst, vecSrcC, vecSrcD); - - vst1q(pDst, vshrq(vecDst, 2)); - pDst += 4; - - /* - * tail - */ - blkCnt = CMPLX_DIM * (numSamples & 3); - do { - mve_pred16_t p = vctp32q(blkCnt); - - pSrcA += 4; - pSrcB += 4; - - vecSrcA = vldrwq_z_s32(pSrcA, p); - vecSrcB = vldrwq_z_s32(pSrcB, p); - - vecDst = vqdmlsdhq_m(vuninitializedq_s32(), vecSrcA, vecSrcB, p); - vecDst = vqdmladhxq_m(vecDst, vecSrcA, vecSrcB, p); - - vecDst = vshrq_m(vuninitializedq_s32(), vecDst, 2, p); - vstrwq_p_s32(pDst, vecDst, p); - pDst += 4; - - blkCnt -= 4; - } - while ((int32_t) blkCnt > 0); - } else { - blkCnt = numSamples * CMPLX_DIM; - while (blkCnt > 0) { - mve_pred16_t p = vctp32q(blkCnt); - - vecSrcA = vldrwq_z_s32(pSrcA, p); - vecSrcB = vldrwq_z_s32(pSrcB, p); - - vecDst = vqdmlsdhq_m(vuninitializedq_s32(), vecSrcA, vecSrcB, p); - vecDst = vqdmladhxq_m(vecDst, vecSrcA, vecSrcB, p); - - vecDst = vshrq_m(vuninitializedq_s32(), vecDst, 2, p); - vstrwq_p_s32(pDst, vecDst, p); - - pDst += 4; - pSrcA += 4; - pSrcB += 4; - - blkCnt -= 4; - } - } -} -#else -void arm_cmplx_mult_cmplx_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - q31_t * pDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t a, b, c, d; /* Temporary variables */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */ - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */ - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - /* store result in 3.29 format in destination buffer. */ - *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) ); - *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) ); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) ); - *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) ); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) ); - *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) ); - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) ); - *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) ); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i] * B[2 * i ] - A[2 * i + 1] * B[2 * i + 1]. */ - /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i ]. */ - - a = *pSrcA++; - b = *pSrcA++; - c = *pSrcB++; - d = *pSrcB++; - - /* store result in 3.29 format in destination buffer. */ - *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) ); - *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) ); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of CmplxByCmplxMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f16.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f16.c deleted file mode 100644 index 536306f..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f16.c +++ /dev/null @@ -1,194 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mult_real_f16.c - * Description: Floating-point complex by real multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup CmplxByRealMult Complex-by-Real Multiplication - - Multiplies a complex vector by a real vector and generates a complex result. - The data in the complex arrays is stored in an interleaved fashion - (real, imag, real, imag, ...). - The parameter numSamples represents the number of complex - samples processed. The complex arrays have a total of 2*numSamples - real values while the real array has a total of numSamples - real values. - - The underlying algorithm is used: - - 
-  for (n = 0; n < numSamples; n++) {
-      pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
-      pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup CmplxByRealMult - @{ - */ - -/** - @brief Floating-point complex-by-real multiplication. - @param[in] pSrcCmplx points to complex input vector - @param[in] pSrcReal points to real input vector - @param[out] pCmplxDst points to complex output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_mult_real_f16( - const float16_t * pSrcCmplx, - const float16_t * pSrcReal, - float16_t * pCmplxDst, - uint32_t numSamples) -{ - static const uint16_t stride_cmplx_x_real_16[8] = { - 0, 0, 1, 1, 2, 2, 3, 3 - }; - uint32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */ - uint32_t blkCnt; - f16x8_t rVec; - f16x8_t cmplxVec; - f16x8_t dstVec; - uint16x8_t strideVec; - - - /* stride vector for pairs of real generation */ - strideVec = vld1q(stride_cmplx_x_real_16); - - /* Compute 4 complex outputs at a time */ - blkCnt = blockSizeC >> 3; - while (blkCnt > 0U) - { - cmplxVec = vld1q(pSrcCmplx); - rVec = vldrhq_gather_shifted_offset_f16(pSrcReal, strideVec); - dstVec = vmulq(cmplxVec, rVec); - vst1q(pCmplxDst, dstVec); - - pSrcReal += 4; - pSrcCmplx += 8; - pCmplxDst += 8; - blkCnt--; - } - - blkCnt = blockSizeC & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - - cmplxVec = vld1q(pSrcCmplx); - rVec = vldrhq_gather_shifted_offset_f16(pSrcReal, strideVec); - dstVec = vmulq(cmplxVec, rVec); - vstrhq_p_f16(pCmplxDst, dstVec, p0); - } -} - -#else -void arm_cmplx_mult_real_f16( - const float16_t * pSrcCmplx, - const float16_t * pSrcReal, - float16_t * pCmplxDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - float16_t in; /* Temporary variable */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - - in = *pSrcReal++; - /* store result in destination buffer. */ - *pCmplxDst++ = *pSrcCmplx++ * in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - in = *pSrcReal++; - *pCmplxDst++ = *pSrcCmplx++ * in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - in = *pSrcReal++; - *pCmplxDst++ = *pSrcCmplx++ * in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - in = *pSrcReal++; - *pCmplxDst++ = *pSrcCmplx++* in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - - in = *pSrcReal++; - /* store result in destination buffer. */ - *pCmplxDst++ = *pSrcCmplx++ * in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of CmplxByRealMult group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c deleted file mode 100644 index 3d4a091..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c +++ /dev/null @@ -1,224 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mult_real_f32.c - * Description: Floating-point complex by real multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @defgroup CmplxByRealMult Complex-by-Real Multiplication - - Multiplies a complex vector by a real vector and generates a complex result. - The data in the complex arrays is stored in an interleaved fashion - (real, imag, real, imag, ...). - The parameter numSamples represents the number of complex - samples processed. The complex arrays have a total of 2*numSamples - real values while the real array has a total of numSamples - real values. - - The underlying algorithm is used: - - 
-  for (n = 0; n < numSamples; n++) {
-      pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
-      pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
-  }
-
- - There are separate functions for floating-point, Q15, and Q31 data types. - */ - -/** - @addtogroup CmplxByRealMult - @{ - */ - -/** - @brief Floating-point complex-by-real multiplication. - @param[in] pSrcCmplx points to complex input vector - @param[in] pSrcReal points to real input vector - @param[out] pCmplxDst points to complex output vector - @param[in] numSamples number of samples in each vector - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_mult_real_f32( - const float32_t * pSrcCmplx, - const float32_t * pSrcReal, - float32_t * pCmplxDst, - uint32_t numSamples) -{ - static const uint32_t stride_cmplx_x_real_32[4] = { 0, 0, 1, 1 }; - - uint32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */ - uint32_t blkCnt; - f32x4_t rVec; - f32x4_t cmplxVec; - f32x4_t dstVec; - uint32x4_t strideVec; - float32_t in; - - - /* stride vector for pairs of real generation */ - strideVec = vld1q(stride_cmplx_x_real_32); - - /* Compute 4 complex outputs at a time */ - blkCnt = blockSizeC >> 2; - while (blkCnt > 0U) - { - cmplxVec = vld1q(pSrcCmplx); - rVec = vldrwq_gather_shifted_offset_f32(pSrcReal, strideVec); - dstVec = vmulq(cmplxVec, rVec); - vst1q(pCmplxDst, dstVec); - - pSrcReal += 2; - pSrcCmplx += 4; - pCmplxDst += 4; - blkCnt--; - } - - blkCnt = (blockSizeC & 3) >> 1; - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - - in = *pSrcReal++; - /* store result in destination buffer. */ - *pCmplxDst++ = *pSrcCmplx++ * in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -void arm_cmplx_mult_real_f32( - const float32_t * pSrcCmplx, - const float32_t * pSrcReal, - float32_t * pCmplxDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - float32_t in; /* Temporary variable */ - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - float32x4_t r; - float32x4x2_t ab,outCplx; - - /* Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - ab = vld2q_f32(pSrcCmplx); // load & separate real/imag pSrcA (de-interleave 2) - r = vld1q_f32(pSrcReal); // load & separate real/imag pSrcB - - /* Increment pointers */ - pSrcCmplx += 8; - pSrcReal += 4; - - outCplx.val[0] = vmulq_f32(ab.val[0], r); - outCplx.val[1] = vmulq_f32(ab.val[1], r); - - vst2q_f32(pCmplxDst, outCplx); - pCmplxDst += 8; - - blkCnt--; - } - - /* Tail */ - blkCnt = numSamples & 3; -#else -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - - in = *pSrcReal++; - /* store result in destination buffer. */ - *pCmplxDst++ = *pSrcCmplx++ * in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - in = *pSrcReal++; - *pCmplxDst++ = *pSrcCmplx++ * in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - in = *pSrcReal++; - *pCmplxDst++ = *pSrcCmplx++ * in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - in = *pSrcReal++; - *pCmplxDst++ = *pSrcCmplx++* in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - - in = *pSrcReal++; - /* store result in destination buffer. */ - *pCmplxDst++ = *pSrcCmplx++ * in; - *pCmplxDst++ = *pSrcCmplx++ * in; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of CmplxByRealMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c deleted file mode 100644 index 70510a4..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c +++ /dev/null @@ -1,238 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mult_real_q15.c - * Description: Q15 complex by real multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup CmplxByRealMult - @{ - */ - -/** - @brief Q15 complex-by-real multiplication. - @param[in] pSrcCmplx points to complex input vector - @param[in] pSrcReal points to real input vector - @param[out] pCmplxDst points to complex output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_cmplx_mult_real_q15( - const q15_t * pSrcCmplx, - const q15_t * pSrcReal, - q15_t * pCmplxDst, - uint32_t numSamples) -{ - static const uint16_t stride_cmplx_x_real_16[8] = { - 0, 0, 1, 1, 2, 2, 3, 3 - }; - q15x8_t rVec; - q15x8_t cmplxVec; - q15x8_t dstVec; - uint16x8_t strideVec; - uint32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */ - uint32_t blkCnt; - q15_t in; - - /* - * stride vector for pairs of real generation - */ - strideVec = vld1q(stride_cmplx_x_real_16); - - blkCnt = blockSizeC >> 3; - - while (blkCnt > 0U) - { - cmplxVec = vld1q(pSrcCmplx); - rVec = vldrhq_gather_shifted_offset_s16(pSrcReal, strideVec); - dstVec = vqdmulhq(cmplxVec, rVec); - vst1q(pCmplxDst, dstVec); - - pSrcReal += 4; - pSrcCmplx += 8; - pCmplxDst += 8; - blkCnt --; - } - - /* Tail */ - blkCnt = (blockSizeC & 7) >> 1; - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - - in = *pSrcReal++; - /* store the result in the destination buffer. */ - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -void arm_cmplx_mult_real_q15( - const q15_t * pSrcCmplx, - const q15_t * pSrcReal, - q15_t * pCmplxDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - q15_t in; /* Temporary variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - -#if defined (ARM_MATH_DSP) - q31_t inA1, inA2; /* Temporary variables to hold input data */ - q31_t inB1; /* Temporary variables to hold input data */ - q15_t out1, out2, out3, out4; /* Temporary variables to hold output data */ - q31_t mul1, mul2, mul3, mul4; /* Temporary variables to hold intermediate data */ -#endif - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - -#if defined (ARM_MATH_DSP) - /* read 2 complex numbers both real and imaginary from complex input buffer */ - inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx); - inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx); - /* read 2 real values at a time from real input buffer */ - inB1 = read_q15x2_ia ((q15_t **) &pSrcReal); - - /* multiply complex number with real numbers */ -#ifndef ARM_MATH_BIG_ENDIAN - mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1)); - mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1)); - mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16)); - mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16)); -#else - mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); - mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16)); - mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1); - mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* saturate the result */ - out1 = (q15_t) __SSAT(mul1 >> 15U, 16); - out2 = (q15_t) __SSAT(mul2 >> 15U, 16); - out3 = (q15_t) __SSAT(mul3 >> 15U, 16); - out4 = (q15_t) __SSAT(mul4 >> 15U, 16); - - /* pack real and imaginary outputs and store them to destination */ - write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16)); - write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16)); - - inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx); - inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx); - inB1 = read_q15x2_ia ((q15_t **) &pSrcReal); - -#ifndef ARM_MATH_BIG_ENDIAN - mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1)); - mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1)); - mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16)); - mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16)); -#else - mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); - mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16)); - mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1); - mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - out1 = (q15_t) __SSAT(mul1 >> 15U, 16); - out2 = (q15_t) __SSAT(mul2 >> 15U, 16); - out3 = (q15_t) __SSAT(mul3 >> 15U, 16); - out4 = (q15_t) __SSAT(mul4 >> 15U, 16); - - write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16)); - write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16)); -#else - in = *pSrcReal++; - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - - in = *pSrcReal++; - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - - in = *pSrcReal++; - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - - in = *pSrcReal++; - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - - in = *pSrcReal++; - /* store the result in the destination buffer. */ - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of CmplxByRealMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c deleted file mode 100644 index 54c1700..0000000 --- a/Drivers/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c +++ /dev/null @@ -1,204 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mult_real_q31.c - * Description: Q31 complex by real multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/complex_math_functions.h" - -/** - @ingroup groupCmplxMath - */ - -/** - @addtogroup CmplxByRealMult - @{ - */ - -/** - @brief Q31 complex-by-real multiplication. - @param[in] pSrcCmplx points to complex input vector - @param[in] pSrcReal points to real input vector - @param[out] pCmplxDst points to complex output vector - @param[in] numSamples number of samples in each vector - @return none - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_cmplx_mult_real_q31( - const q31_t * pSrcCmplx, - const q31_t * pSrcReal, - q31_t * pCmplxDst, - uint32_t numSamples) -{ - - static const uint32_t stride_cmplx_x_real_32[4] = { - 0, 0, 1, 1 - }; - q31x4_t rVec; - q31x4_t cmplxVec; - q31x4_t dstVec; - uint32x4_t strideVec; - uint32_t blockSizeC = numSamples * CMPLX_DIM; /* loop counters */ - uint32_t blkCnt; - q31_t in; - - /* - * stride vector for pairs of real generation - */ - strideVec = vld1q(stride_cmplx_x_real_32); - - /* Compute 4 complex outputs at a time */ - blkCnt = blockSizeC >> 2; - while (blkCnt > 0U) - { - cmplxVec = vld1q(pSrcCmplx); - rVec = vldrwq_gather_shifted_offset_s32(pSrcReal, strideVec); - dstVec = vqdmulhq(cmplxVec, rVec); - vst1q(pCmplxDst, dstVec); - - pSrcReal += 2; - pSrcCmplx += 4; - pCmplxDst += 4; - blkCnt --; - } - - blkCnt = (blockSizeC & 3) >> 1; - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - - in = *pSrcReal++; - /* store saturated result in 1.31 format to destination buffer */ - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -void arm_cmplx_mult_real_q31( - const q31_t * pSrcCmplx, - const q31_t * pSrcReal, - q31_t * pCmplxDst, - uint32_t numSamples) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t in; /* Temporary variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - - in = *pSrcReal++; -#if defined (ARM_MATH_DSP) - /* store saturated result in 1.31 format to destination buffer */ - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); -#else - /* store result in destination buffer. */ - *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31); - *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31); -#endif - - in = *pSrcReal++; -#if defined (ARM_MATH_DSP) - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); -#else - *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31); - *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31); -#endif - - in = *pSrcReal++; -#if defined (ARM_MATH_DSP) - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); -#else - *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31); - *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31); -#endif - - in = *pSrcReal++; -#if defined (ARM_MATH_DSP) - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); -#else - *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31); - *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C[2 * i ] = A[2 * i ] * B[i]. */ - /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ - - in = *pSrcReal++; -#if defined (ARM_MATH_DSP) - /* store saturated result in 1.31 format to destination buffer */ - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); - *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1); -#else - /* store result in destination buffer. */ - *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31); - *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of CmplxByRealMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/ControllerFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/ControllerFunctions/CMakeLists.txt deleted file mode 100644 index a636c38..0000000 --- a/Drivers/CMSIS/DSP/Source/ControllerFunctions/CMakeLists.txt +++ /dev/null @@ -1,41 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPController) - -include(configLib) -include(configDsp) - -add_library(CMSISDSPController STATIC) - -configLib(CMSISDSPController ${ROOT}) -configDsp(CMSISDSPController ${ROOT}) - -include(interpol) -interpol(CMSISDSPController) - -if (CONFIGTABLE AND ALLFAST) - target_compile_definitions(CMSISDSPController PUBLIC ARM_ALL_FAST_TABLES) -endif() - -target_sources(CMSISDSPController PRIVATE arm_pid_init_f32.c) -target_sources(CMSISDSPController PRIVATE arm_pid_init_q15.c) -target_sources(CMSISDSPController PRIVATE arm_pid_init_q31.c) -target_sources(CMSISDSPController PRIVATE arm_pid_reset_f32.c) -target_sources(CMSISDSPController PRIVATE arm_pid_reset_q15.c) -target_sources(CMSISDSPController PRIVATE arm_pid_reset_q31.c) - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_COS_F32) -target_sources(CMSISDSPController PRIVATE arm_sin_cos_f32.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_COS_Q31) -target_sources(CMSISDSPController PRIVATE arm_sin_cos_q31.c) -endif() - - - -### Includes -target_include_directories(CMSISDSPController PUBLIC "${DSP}/Include") - - - diff --git a/Drivers/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c b/Drivers/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c deleted file mode 100644 index 820c553..0000000 --- a/Drivers/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c +++ /dev/null @@ -1,46 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: ControllerFunctions.c - * Description: Combination of all controller function source files. - * - * $Date: 18. March 2019 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_pid_init_f32.c" -#include "arm_pid_init_q15.c" -#include "arm_pid_init_q31.c" -#include "arm_pid_reset_f32.c" -#include "arm_pid_reset_q15.c" -#include "arm_pid_reset_q31.c" - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32) -#include "arm_sin_cos_f32.c" -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31) -#include "arm_sin_cos_q31.c" -#endif - -#endif \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c b/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c deleted file mode 100644 index ce19cc1..0000000 --- a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_pid_init_f32.c - * Description: Floating-point PID Control initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/controller_functions.h" - -/** - @addtogroup PID - @{ - */ - -/** - @brief Initialization function for the floating-point PID Control. - @param[in,out] S points to an instance of the PID structure - @param[in] resetStateFlag - - value = 0: no change in state - - value = 1: reset state - @return none - - @par Details - The resetStateFlag specifies whether to set state to zero or not. \n - The function computes the structure fields: A0, A1 A2 - using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) - also sets the state variables to all zeros. - */ - -void arm_pid_init_f32( - arm_pid_instance_f32 * S, - int32_t resetStateFlag) -{ - /* Derived coefficient A0 */ - S->A0 = S->Kp + S->Ki + S->Kd; - - /* Derived coefficient A1 */ - S->A1 = (-S->Kp) - ((float32_t) 2.0f * S->Kd); - - /* Derived coefficient A2 */ - S->A2 = S->Kd; - - /* Check whether state needs reset or not */ - if (resetStateFlag) - { - /* Reset state to zero, The size will be always 3 samples */ - memset(S->state, 0, 3U * sizeof(float32_t)); - } - -} - -/** - @} end of PID group - */ diff --git a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c b/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c deleted file mode 100644 index b1a531c..0000000 --- a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c +++ /dev/null @@ -1,95 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_pid_init_q15.c - * Description: Q15 PID Control initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/controller_functions.h" - -/** - @addtogroup PID - @{ - */ - -/** - @brief Initialization function for the Q15 PID Control. - @param[in,out] S points to an instance of the Q15 PID structure - @param[in] resetStateFlag - - value = 0: no change in state - - value = 1: reset state - @return none - - @par Details - The resetStateFlag specifies whether to set state to zero or not. \n - The function computes the structure fields: A0, A1 A2 - using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) - also sets the state variables to all zeros. - */ - -void arm_pid_init_q15( - arm_pid_instance_q15 * S, - int32_t resetStateFlag) -{ - -#if defined (ARM_MATH_DSP) - - /* Derived coefficient A0 */ - S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd); - - /* Derived coefficients and pack into A1 */ - -#ifndef ARM_MATH_BIG_ENDIAN - S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16); -#else - S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16); -#endif - -#else - - q31_t temp; /* to store the sum */ - - /* Derived coefficient A0 */ - temp = S->Kp + S->Ki + S->Kd; - S->A0 = (q15_t) __SSAT(temp, 16); - - /* Derived coefficients and pack into A1 */ - temp = -(S->Kd + S->Kd + S->Kp); - S->A1 = (q15_t) __SSAT(temp, 16); - S->A2 = S->Kd; - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Check whether state needs reset or not */ - if (resetStateFlag) - { - /* Reset state to zero, The size will be always 3 samples */ - memset(S->state, 0, 3U * sizeof(q15_t)); - } - -} - -/** - @} end of PID group - */ diff --git a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c b/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c deleted file mode 100644 index 96064ef..0000000 --- a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_pid_init_q31.c - * Description: Q31 PID Control initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/controller_functions.h" - -/** - @addtogroup PID - @{ - */ - -/** - @brief Initialization function for the Q31 PID Control. - @param[in,out] S points to an instance of the Q31 PID structure - @param[in] resetStateFlag - - value = 0: no change in state - - value = 1: reset state - @return none - - @par Details - The resetStateFlag specifies whether to set state to zero or not. \n - The function computes the structure fields: A0, A1 A2 - using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) - also sets the state variables to all zeros. - */ - -void arm_pid_init_q31( - arm_pid_instance_q31 * S, - int32_t resetStateFlag) -{ - -#if defined (ARM_MATH_DSP) - - /* Derived coefficient A0 */ - S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd); - - /* Derived coefficient A1 */ - S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp); - -#else - - q31_t temp; /* to store the sum */ - - /* Derived coefficient A0 */ - temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki); - S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd); - - /* Derived coefficient A1 */ - temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd); - S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp); - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Derived coefficient A2 */ - S->A2 = S->Kd; - - /* Check whether state needs reset or not */ - if (resetStateFlag) - { - /* Reset state to zero, The size will be always 3 samples */ - memset(S->state, 0, 3U * sizeof(q31_t)); - } - -} - -/** - @} end of PID group - */ diff --git a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c b/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c deleted file mode 100644 index 928620c..0000000 --- a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c +++ /dev/null @@ -1,54 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_pid_reset_f32.c - * Description: Floating-point PID Control reset function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/controller_functions.h" - -/** - @addtogroup PID - @{ - */ - -/** - @brief Reset function for the floating-point PID Control. - @param[in,out] S points to an instance of the floating-point PID structure - @return none - - @par Details - The function resets the state buffer to zeros. - */ - -void arm_pid_reset_f32( - arm_pid_instance_f32 * S) -{ - /* Reset state to zero, The size will be always 3 samples */ - memset(S->state, 0, 3U * sizeof(float32_t)); -} - -/** - @} end of PID group - */ diff --git a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c b/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c deleted file mode 100644 index d481cf3..0000000 --- a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c +++ /dev/null @@ -1,54 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_pid_reset_q15.c - * Description: Q15 PID Control reset function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/controller_functions.h" - -/** - @addtogroup PID - @{ - */ - -/** - @brief Reset function for the Q15 PID Control. - @param[in,out] S points to an instance of the Q15 PID structure - @return none - - @par Details - The function resets the state buffer to zeros. - */ - -void arm_pid_reset_q15( - arm_pid_instance_q15 * S) -{ - /* Reset state to zero, The size will be always 3 samples */ - memset(S->state, 0, 3U * sizeof(q15_t)); -} - -/** - @} end of PID group - */ diff --git a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c b/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c deleted file mode 100644 index 04086db..0000000 --- a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c +++ /dev/null @@ -1,54 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_pid_reset_q31.c - * Description: Q31 PID Control reset function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/controller_functions.h" - -/** - @addtogroup PID - @{ - */ - -/** - @brief Reset function for the Q31 PID Control. - @param[in,out] S points to an instance of the Q31 PID structure - @return none - - @par Details - The function resets the state buffer to zeros. - */ - -void arm_pid_reset_q31( - arm_pid_instance_q31 * S) -{ - /* Reset state to zero, The size will be always 3 samples */ - memset(S->state, 0, 3U * sizeof(q31_t)); -} - -/** - @} end of PID group - */ diff --git a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c b/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c deleted file mode 100644 index 60fd566..0000000 --- a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c +++ /dev/null @@ -1,146 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sin_cos_f32.c - * Description: Sine and Cosine calculation for floating-point values - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/controller_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupController - */ - -/** - @defgroup SinCos Sine Cosine - - Computes the trigonometric sine and cosine values using a combination of table lookup - and linear interpolation. - There are separate functions for Q31 and floating-point data types. - The input to the floating-point version is in degrees while the - fixed-point Q31 have a scaled input with the range - [-1 0.9999] mapping to [-180 +180] degrees. - - The floating point function also allows values that are out of the usual range. When this happens, the function will - take extra time to adjust the input value to the range of [-180 180]. - - The result is accurate to 5 digits after the decimal point. - - The implementation is based on table lookup using 360 values together with linear interpolation. - The steps used are: - -# Calculation of the nearest integer table index. - -# Compute the fractional portion (fract) of the input. - -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1. - -# Sine value is computed as *psinVal = y0 + (fract * (y1 - y0)). - -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1. - -# Cosine value is computed as *pcosVal = y0 + (fract * (y1 - y0)). - */ - -/** - @addtogroup SinCos - @{ - */ - -/** - @brief Floating-point sin_cos function. - @param[in] theta input value in degrees - @param[out] pSinVal points to processed sine output - @param[out] pCosVal points to processed cosine output - @return none - */ - -void arm_sin_cos_f32( - float32_t theta, - float32_t * pSinVal, - float32_t * pCosVal) -{ - float32_t fract, in; /* Temporary input, output variables */ - uint16_t indexS, indexC; /* Index variable */ - float32_t f1, f2, d1, d2; /* Two nearest output values */ - float32_t Dn, Df; - float32_t temp, findex; - - /* input x is in degrees */ - /* Scale input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */ - in = theta * 0.00277777777778f; - - if (in < 0.0f) - { - in = -in; - } - - in = in - (int32_t)in; - - /* Calculate the nearest index */ - findex = (float32_t)FAST_MATH_TABLE_SIZE * in; - indexS = ((uint16_t)findex) & 0x1ff; - indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff; - - /* Calculation of fractional value */ - fract = findex - (float32_t) indexS; - - /* Read two nearest values of input value from the cos & sin tables */ - f1 = sinTable_f32[indexC ]; - f2 = sinTable_f32[indexC+1]; - d1 = -sinTable_f32[indexS ]; - d2 = -sinTable_f32[indexS+1]; - - temp = (1.0f - fract) * f1 + fract * f2; - - Dn = 0.0122718463030f; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */ - Df = f2 - f1; /* delta between the values of the functions */ - - temp = Dn * (d1 + d2) - 2 * Df; - temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn); - temp = fract * temp + d1 * Dn; - - /* Calculation of cosine value */ - *pCosVal = fract * temp + f1; - - /* Read two nearest values of input value from the cos & sin tables */ - f1 = sinTable_f32[indexS ]; - f2 = sinTable_f32[indexS+1]; - d1 = sinTable_f32[indexC ]; - d2 = sinTable_f32[indexC+1]; - - temp = (1.0f - fract) * f1 + fract * f2; - - Df = f2 - f1; // delta between the values of the functions - temp = Dn * (d1 + d2) - 2 * Df; - temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn); - temp = fract * temp + d1 * Dn; - - /* Calculation of sine value */ - *pSinVal = fract * temp + f1; - - if (theta < 0.0f) - { - *pSinVal = -*pSinVal; - } -} - -/** - @} end of SinCos group - */ diff --git a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c b/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c deleted file mode 100644 index 07ce8d3..0000000 --- a/Drivers/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c +++ /dev/null @@ -1,110 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sin_cos_q31.c - * Description: Cosine & Sine calculation for Q31 values - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/controller_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupController - */ - -/** - @addtogroup SinCos - @{ - */ - -/** - @brief Q31 sin_cos function. - @param[in] theta scaled input value in degrees - @param[out] pSinVal points to processed sine output - @param[out] pCosVal points to processed cosine output - @return none - - The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179]. - */ - -void arm_sin_cos_q31( - q31_t theta, - q31_t * pSinVal, - q31_t * pCosVal) -{ - q31_t fract; /* Temporary input, output variables */ - uint16_t indexS, indexC; /* Index variable */ - q31_t f1, f2, d1, d2; /* Two nearest output values */ - q31_t Dn, Df; - q63_t temp; - - /* Calculate the nearest index */ - indexS = (uint32_t)theta >> CONTROLLER_Q31_SHIFT; - indexC = (indexS + 128) & 0x1ff; - - /* Calculation of fractional value */ - fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8; - - /* Read two nearest values of input value from the cos & sin tables */ - f1 = sinTable_q31[indexC ]; - f2 = sinTable_q31[indexC+1]; - d1 = -sinTable_q31[indexS ]; - d2 = -sinTable_q31[indexS+1]; - - Dn = 0x1921FB5; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */ - Df = f2 - f1; /* delta between the values of the functions */ - - temp = Dn * ((q63_t)d1 + d2); - temp = temp - ((q63_t)Df << 32); - temp = (q63_t)fract * (temp >> 31); - temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn); - temp = (q63_t)fract * (temp >> 31); - temp = temp + (q63_t)d1 * Dn; - temp = (q63_t)fract * (temp >> 31); - - /* Calculation of cosine value */ - *pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1); - - /* Read two nearest values of input value from the cos & sin tables */ - f1 = sinTable_q31[indexS ]; - f2 = sinTable_q31[indexS+1]; - d1 = sinTable_q31[indexC ]; - d2 = sinTable_q31[indexC+1]; - - Df = f2 - f1; // delta between the values of the functions - temp = Dn * ((q63_t)d1 + d2); - temp = temp - ((q63_t)Df << 32); - temp = (q63_t)fract * (temp >> 31); - temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn); - temp = (q63_t)fract * (temp >> 31); - temp = temp + (q63_t)d1 * Dn; - temp = (q63_t)fract * (temp >> 31); - - /* Calculation of sine value */ - *pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1); -} - -/** - @} end of SinCos group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/DistanceFunctions/CMakeLists.txt deleted file mode 100644 index d298282..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/CMakeLists.txt +++ /dev/null @@ -1,56 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPDistance) - -include(configLib) -include(configDsp) - -file(GLOB SRC "./*_*.c") - -add_library(CMSISDSPDistance STATIC) - -target_sources(CMSISDSPDistance PRIVATE arm_boolean_distance.c) -target_sources(CMSISDSPDistance PRIVATE arm_braycurtis_distance_f32.c) -target_sources(CMSISDSPDistance PRIVATE arm_canberra_distance_f32.c) -target_sources(CMSISDSPDistance PRIVATE arm_chebyshev_distance_f32.c) -target_sources(CMSISDSPDistance PRIVATE arm_chebyshev_distance_f64.c) -target_sources(CMSISDSPDistance PRIVATE arm_cityblock_distance_f32.c) -target_sources(CMSISDSPDistance PRIVATE arm_cityblock_distance_f64.c) -target_sources(CMSISDSPDistance PRIVATE arm_correlation_distance_f32.c) -target_sources(CMSISDSPDistance PRIVATE arm_cosine_distance_f32.c) -target_sources(CMSISDSPDistance PRIVATE arm_cosine_distance_f64.c) -target_sources(CMSISDSPDistance PRIVATE arm_dice_distance.c) -target_sources(CMSISDSPDistance PRIVATE arm_euclidean_distance_f32.c) -target_sources(CMSISDSPDistance PRIVATE arm_euclidean_distance_f64.c) -target_sources(CMSISDSPDistance PRIVATE arm_hamming_distance.c) -target_sources(CMSISDSPDistance PRIVATE arm_jaccard_distance.c) -target_sources(CMSISDSPDistance PRIVATE arm_jensenshannon_distance_f32.c) -target_sources(CMSISDSPDistance PRIVATE arm_kulsinski_distance.c) -target_sources(CMSISDSPDistance PRIVATE arm_minkowski_distance_f32.c) -target_sources(CMSISDSPDistance PRIVATE arm_rogerstanimoto_distance.c) -target_sources(CMSISDSPDistance PRIVATE arm_russellrao_distance.c) -target_sources(CMSISDSPDistance PRIVATE arm_sokalmichener_distance.c) -target_sources(CMSISDSPDistance PRIVATE arm_sokalsneath_distance.c) -target_sources(CMSISDSPDistance PRIVATE arm_yule_distance.c) - - -configLib(CMSISDSPDistance ${ROOT}) -configDsp(CMSISDSPDistance ${ROOT}) - -### Includes -target_include_directories(CMSISDSPDistance PUBLIC "${DSP}/Include") -target_include_directories(CMSISDSPDistance PRIVATE ".") - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPDistance PRIVATE arm_braycurtis_distance_f16.c) -target_sources(CMSISDSPDistance PRIVATE arm_canberra_distance_f16.c) -target_sources(CMSISDSPDistance PRIVATE arm_chebyshev_distance_f16.c) -target_sources(CMSISDSPDistance PRIVATE arm_cityblock_distance_f16.c) -target_sources(CMSISDSPDistance PRIVATE arm_correlation_distance_f16.c) -target_sources(CMSISDSPDistance PRIVATE arm_cosine_distance_f16.c) -target_sources(CMSISDSPDistance PRIVATE arm_euclidean_distance_f16.c) -target_sources(CMSISDSPDistance PRIVATE arm_jensenshannon_distance_f16.c) -target_sources(CMSISDSPDistance PRIVATE arm_minkowski_distance_f16.c) -endif() - - \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c deleted file mode 100644 index 2992145..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c +++ /dev/null @@ -1,51 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: BayesFunctions.c - * Description: Combination of all distance function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_boolean_distance.c" -#include "arm_braycurtis_distance_f32.c" -#include "arm_canberra_distance_f32.c" -#include "arm_chebyshev_distance_f32.c" -#include "arm_chebyshev_distance_f64.c" -#include "arm_cityblock_distance_f32.c" -#include "arm_cityblock_distance_f64.c" -#include "arm_correlation_distance_f32.c" -#include "arm_cosine_distance_f32.c" -#include "arm_cosine_distance_f64.c" -#include "arm_dice_distance.c" -#include "arm_euclidean_distance_f32.c" -#include "arm_euclidean_distance_f64.c" -#include "arm_hamming_distance.c" -#include "arm_jaccard_distance.c" -#include "arm_jensenshannon_distance_f32.c" -#include "arm_kulsinski_distance.c" -#include "arm_minkowski_distance_f32.c" -#include "arm_rogerstanimoto_distance.c" -#include "arm_russellrao_distance.c" -#include "arm_sokalmichener_distance.c" -#include "arm_sokalsneath_distance.c" -#include "arm_yule_distance.c" diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c deleted file mode 100644 index 58b8c45..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c +++ /dev/null @@ -1,36 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: DistanceFunctions.c - * Description: Combination of all distance function f16 source files. - * - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_braycurtis_distance_f16.c" -#include "arm_canberra_distance_f16.c" -#include "arm_chebyshev_distance_f16.c" -#include "arm_cityblock_distance_f16.c" -#include "arm_correlation_distance_f16.c" -#include "arm_cosine_distance_f16.c" -#include "arm_euclidean_distance_f16.c" -#include "arm_jensenshannon_distance_f16.c" -#include "arm_minkowski_distance_f16.c" - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance.c deleted file mode 100644 index c23f616..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance.c +++ /dev/null @@ -1,80 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_linear_init_f32.c - * Description: SVM Linear Instance Initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - - - -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" - -#endif - - -#define TT -#define TF -#define FT -#define EXT _TT_TF_FT -#include "arm_boolean_distance_template.h" - -#undef TT -#undef FF -#undef TF -#undef FT -#undef EXT -#define TF -#define FT -#define EXT _TF_FT -#include "arm_boolean_distance_template.h" - -#undef TT -#undef FF -#undef TF -#undef FT -#undef EXT -#define TT -#define FF -#define TF -#define FT -#define EXT _TT_FF_TF_FT -#include "arm_boolean_distance_template.h" - -#undef TT -#undef FF -#undef TF -#undef FT -#undef EXT -#define TT -#define EXT _TT -#include "arm_boolean_distance_template.h" - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance_template.h b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance_template.h deleted file mode 100644 index 17f4c4c..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance_template.h +++ /dev/null @@ -1,551 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_boolean_distance.c - * Description: Templates for boolean distances - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - - - -/** - * @defgroup DISTANCEF Distance Functions - * - * Computes Distances between vectors. - * - * Distance functions are useful in a lot of algorithms. - * - */ - - -/** - * @addtogroup DISTANCEF - * @{ - */ - - - - -#define _FUNC(A,B) A##B - -#define FUNC(EXT) _FUNC(arm_boolean_distance, EXT) - -/** - * @brief Elements of boolean distances - * - * Different values which are used to compute boolean distances - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return None - * - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_common_tables.h" - -void FUNC(EXT)(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools -#ifdef TT - , uint32_t *cTT -#endif -#ifdef FF - , uint32_t *cFF -#endif -#ifdef TF - , uint32_t *cTF -#endif -#ifdef FT - , uint32_t *cFT -#endif - ) -{ - -#ifdef TT - uint32_t _ctt=0; -#endif -#ifdef FF - uint32_t _cff=0; -#endif -#ifdef TF - uint32_t _ctf=0; -#endif -#ifdef FT - uint32_t _cft=0; -#endif - uint32_t a, b, ba, bb; - int shift; - const uint8_t *pA8 = (const uint8_t *) pA; - const uint8_t *pB8 = (const uint8_t *) pB; - - /* handle vector blocks */ - uint32_t blkCnt = numberOfBools / 128; - - - - while (blkCnt > 0U) { - uint8x16_t vecA = vld1q((const uint8_t *) pA8); - uint8x16_t vecB = vld1q((const uint8_t *) pB8); - -#ifdef TT - uint8x16_t vecTT = vecA & vecB; - vecTT = vldrbq_gather_offset_u8(hwLUT, vecTT); - _ctt += vaddvq(vecTT); -#endif -#ifdef FF - uint8x16_t vecFF = vmvnq(vecA) & vmvnq(vecB); - vecFF = vldrbq_gather_offset_u8(hwLUT, vecFF); - _cff += vaddvq(vecFF); -#endif -#ifdef TF - uint8x16_t vecTF = vecA & vmvnq(vecB); - vecTF = vldrbq_gather_offset_u8(hwLUT, vecTF); - _ctf += vaddvq(vecTF); -#endif -#ifdef FT - uint8x16_t vecFT = vmvnq(vecA) & vecB; - vecFT = vldrbq_gather_offset_u8(hwLUT, vecFT); - _cft += vaddvq(vecFT); -#endif - - pA8 += 16; - pB8 += 16; - blkCnt--; - - } - - pA = (const uint32_t *)pA8; - pB = (const uint32_t *)pB8; - - blkCnt = numberOfBools & 0x7F; - while(blkCnt >= 32) - { - a = *pA++; - b = *pB++; - shift = 0; - while(shift < 32) - { - ba = a & 1; - bb = b & 1; - a = a >> 1; - b = b >> 1; - -#ifdef TT - _ctt += (ba && bb); -#endif -#ifdef FF - _cff += ((1 ^ ba) && (1 ^ bb)); -#endif -#ifdef TF - _ctf += (ba && (1 ^ bb)); -#endif -#ifdef FT - _cft += ((1 ^ ba) && bb); -#endif - shift ++; - } - - blkCnt -= 32; - } - - a = *pA++; - b = *pB++; - - a = a >> (32 - blkCnt); - b = b >> (32 - blkCnt); - - while(blkCnt > 0) - { - ba = a & 1; - bb = b & 1; - a = a >> 1; - - b = b >> 1; -#ifdef TT - _ctt += (ba && bb); -#endif -#ifdef FF - _cff += ((1 ^ ba) && (1 ^ bb)); -#endif -#ifdef TF - _ctf += (ba && (1 ^ bb)); -#endif -#ifdef FT - _cft += ((1 ^ ba) && bb); -#endif - blkCnt --; - } - -#ifdef TT - *cTT = _ctt; -#endif -#ifdef FF - *cFF = _cff; -#endif -#ifdef TF - *cTF = _ctf; -#endif -#ifdef FT - *cFT = _cft; -#endif -} - -#else -#if defined(ARM_MATH_NEON) - - -void FUNC(EXT)(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools -#ifdef TT - , uint32_t *cTT -#endif -#ifdef FF - , uint32_t *cFF -#endif -#ifdef TF - , uint32_t *cTF -#endif -#ifdef FT - , uint32_t *cFT -#endif - ) -{ -#ifdef TT - uint32_t _ctt=0; -#endif -#ifdef FF - uint32_t _cff=0; -#endif -#ifdef TF - uint32_t _ctf=0; -#endif -#ifdef FT - uint32_t _cft=0; -#endif - uint32_t nbBoolBlock; - uint32_t a,b,ba,bb; - int shift; - uint32x4_t aV, bV; -#ifdef TT - uint32x4_t cttV; -#endif -#ifdef FF - uint32x4_t cffV; -#endif -#ifdef TF - uint32x4_t ctfV; -#endif -#ifdef FT - uint32x4_t cftV; -#endif - uint8x16_t tmp; - uint16x8_t tmp2; - uint32x4_t tmp3; - uint64x2_t tmp4; -#ifdef TT - uint64x2_t tmp4tt; -#endif -#ifdef FF - uint64x2_t tmp4ff; -#endif -#ifdef TF - uint64x2_t tmp4tf; -#endif -#ifdef FT - uint64x2_t tmp4ft; -#endif - -#ifdef TT - tmp4tt = vdupq_n_u64(0); -#endif -#ifdef FF - tmp4ff = vdupq_n_u64(0); -#endif -#ifdef TF - tmp4tf = vdupq_n_u64(0); -#endif -#ifdef FT - tmp4ft = vdupq_n_u64(0); -#endif - - nbBoolBlock = numberOfBools >> 7; - while(nbBoolBlock > 0) - { - aV = vld1q_u32(pA); - bV = vld1q_u32(pB); - pA += 4; - pB += 4; - -#ifdef TT - cttV = vandq_u32(aV,bV); -#endif -#ifdef FF - cffV = vandq_u32(vmvnq_u32(aV),vmvnq_u32(bV)); -#endif -#ifdef TF - ctfV = vandq_u32(aV,vmvnq_u32(bV)); -#endif -#ifdef FT - cftV = vandq_u32(vmvnq_u32(aV),bV); -#endif - -#ifdef TT - tmp = vcntq_u8(vreinterpretq_u8_u32(cttV)); - tmp2 = vpaddlq_u8(tmp); - tmp3 = vpaddlq_u16(tmp2); - tmp4 = vpaddlq_u32(tmp3); - tmp4tt = vaddq_u64(tmp4tt, tmp4); -#endif - -#ifdef FF - tmp = vcntq_u8(vreinterpretq_u8_u32(cffV)); - tmp2 = vpaddlq_u8(tmp); - tmp3 = vpaddlq_u16(tmp2); - tmp4 = vpaddlq_u32(tmp3); - tmp4ff = vaddq_u64(tmp4ff, tmp4); -#endif - -#ifdef TF - tmp = vcntq_u8(vreinterpretq_u8_u32(ctfV)); - tmp2 = vpaddlq_u8(tmp); - tmp3 = vpaddlq_u16(tmp2); - tmp4 = vpaddlq_u32(tmp3); - tmp4tf = vaddq_u64(tmp4tf, tmp4); -#endif - -#ifdef FT - tmp = vcntq_u8(vreinterpretq_u8_u32(cftV)); - tmp2 = vpaddlq_u8(tmp); - tmp3 = vpaddlq_u16(tmp2); - tmp4 = vpaddlq_u32(tmp3); - tmp4ft = vaddq_u64(tmp4ft, tmp4); -#endif - - - nbBoolBlock --; - } - -#ifdef TT - _ctt += vgetq_lane_u64(tmp4tt, 0) + vgetq_lane_u64(tmp4tt, 1); -#endif -#ifdef FF - _cff +=vgetq_lane_u64(tmp4ff, 0) + vgetq_lane_u64(tmp4ff, 1); -#endif -#ifdef TF - _ctf += vgetq_lane_u64(tmp4tf, 0) + vgetq_lane_u64(tmp4tf, 1); -#endif -#ifdef FT - _cft += vgetq_lane_u64(tmp4ft, 0) + vgetq_lane_u64(tmp4ft, 1); -#endif - - nbBoolBlock = numberOfBools & 0x7F; - while(nbBoolBlock >= 32) - { - a = *pA++; - b = *pB++; - shift = 0; - while(shift < 32) - { - ba = a & 1; - bb = b & 1; - a = a >> 1; - b = b >> 1; - -#ifdef TT - _ctt += (ba && bb); -#endif -#ifdef FF - _cff += ((1 ^ ba) && (1 ^ bb)); -#endif -#ifdef TF - _ctf += (ba && (1 ^ bb)); -#endif -#ifdef FT - _cft += ((1 ^ ba) && bb); -#endif - shift ++; - } - - nbBoolBlock -= 32; - } - - a = *pA++; - b = *pB++; - - a = a >> (32 - nbBoolBlock); - b = b >> (32 - nbBoolBlock); - - while(nbBoolBlock > 0) - { - ba = a & 1; - bb = b & 1; - a = a >> 1; - - b = b >> 1; -#ifdef TT - _ctt += (ba && bb); -#endif -#ifdef FF - _cff += ((1 ^ ba) && (1 ^ bb)); -#endif -#ifdef TF - _ctf += (ba && (1 ^ bb)); -#endif -#ifdef FT - _cft += ((1 ^ ba) && bb); -#endif - nbBoolBlock --; - } - -#ifdef TT - *cTT = _ctt; -#endif -#ifdef FF - *cFF = _cff; -#endif -#ifdef TF - *cTF = _ctf; -#endif -#ifdef FT - *cFT = _cft; -#endif -} - -#else - -void FUNC(EXT)(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools -#ifdef TT - , uint32_t *cTT -#endif -#ifdef FF - , uint32_t *cFF -#endif -#ifdef TF - , uint32_t *cTF -#endif -#ifdef FT - , uint32_t *cFT -#endif - ) -{ - -#ifdef TT - uint32_t _ctt=0; -#endif -#ifdef FF - uint32_t _cff=0; -#endif -#ifdef TF - uint32_t _ctf=0; -#endif -#ifdef FT - uint32_t _cft=0; -#endif - uint32_t a,b,ba,bb; - int shift; - - while(numberOfBools >= 32) - { - a = *pA++; - b = *pB++; - shift = 0; - while(shift < 32) - { - ba = a & 1; - bb = b & 1; - a = a >> 1; - b = b >> 1; -#ifdef TT - _ctt += (ba && bb); -#endif -#ifdef FF - _cff += ((1 ^ ba) && (1 ^ bb)); -#endif -#ifdef TF - _ctf += (ba && (1 ^ bb)); -#endif -#ifdef FT - _cft += ((1 ^ ba) && bb); -#endif - shift ++; - } - - numberOfBools -= 32; - } - - a = *pA++; - b = *pB++; - - a = a >> (32 - numberOfBools); - b = b >> (32 - numberOfBools); - - while(numberOfBools > 0) - { - ba = a & 1; - bb = b & 1; - a = a >> 1; - b = b >> 1; - -#ifdef TT - _ctt += (ba && bb); -#endif -#ifdef FF - _cff += ((1 ^ ba) && (1 ^ bb)); -#endif -#ifdef TF - _ctf += (ba && (1 ^ bb)); -#endif -#ifdef FT - _cft += ((1 ^ ba) && bb); -#endif - numberOfBools --; - } - -#ifdef TT - *cTT = _ctt; -#endif -#ifdef FF - *cFF = _cff; -#endif -#ifdef TF - *cTF = _ctf; -#endif -#ifdef FT - *cFT = _cft; -#endif -} -#endif -#endif /* defined(ARM_MATH_MVEI) */ - - -/** - * @} end of DISTANCEF group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f16.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f16.c deleted file mode 100644 index 408f290..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f16.c +++ /dev/null @@ -1,158 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_braycurtis_distance_f16.c - * Description: Bray-Curtis distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - * @ingroup groupDistance - */ - -/** - * @defgroup FloatDist Float Distances - * - * Distances between two vectors of float values. - */ - -/** - @ingroup FloatDist - */ - -/** - @defgroup braycurtis Bray-Curtis distance - - Bray-Curtis distance between two vectors - */ - -/** - @addtogroup braycurtis - @{ - */ - - -/** - * @brief Bray-Curtis distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -float16_t arm_braycurtis_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - _Float16 accumDiff = 0.0f, accumSum = 0.0f; - uint32_t blkCnt; - f16x8_t a, b, c, accumDiffV, accumSumV; - - - accumDiffV = vdupq_n_f16(0.0f); - accumSumV = vdupq_n_f16(0.0f); - - blkCnt = blockSize >> 3; - while (blkCnt > 0) { - a = vld1q(pA); - b = vld1q(pB); - - c = vabdq(a, b); - accumDiffV = vaddq(accumDiffV, c); - - c = vaddq_f16(a, b); - c = vabsq_f16(c); - accumSumV = vaddq(accumSumV, c); - - pA += 8; - pB += 8; - blkCnt--; - } - - blkCnt = blockSize & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - - a = vldrhq_z_f16(pA, p0); - b = vldrhq_z_f16(pB, p0); - - c = vabdq(a, b); - accumDiffV = vaddq_m(accumDiffV, accumDiffV, c, p0); - - c = vaddq_f16(a, b); - c = vabsq_f16(c); - accumSumV = vaddq_m(accumSumV, accumSumV, c, p0); - } - - accumDiff = vecAddAcrossF16Mve(accumDiffV); - accumSum = vecAddAcrossF16Mve(accumSumV); - - /* - It is assumed that accumSum is not zero. Since it is the sum of several absolute - values it would imply that all of them are zero. It is very unlikely for long vectors. - */ - return (accumDiff / accumSum); -} -#else - -float16_t arm_braycurtis_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - _Float16 accumDiff=0.0f16, accumSum=0.0f16, tmpA, tmpB; - - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - accumDiff += (_Float16)fabsf((float32_t)((_Float16)tmpA - (_Float16)tmpB)); - accumSum += (_Float16)fabsf((float32_t)((_Float16)tmpA + (_Float16)tmpB)); - blockSize --; - } - /* - - It is assumed that accumSum is not zero. Since it is the sum of several absolute - values it would imply that all of them are zero. It is very unlikely for long vectors. - - */ - return(accumDiff / accumSum); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of braycurtis group - */ - - - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f32.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f32.c deleted file mode 100644 index abc4b21..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f32.c +++ /dev/null @@ -1,187 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_braycurtis_distance_f32.c - * Description: Bray-Curtis distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - - -/** - @addtogroup braycurtis - @{ - */ - - -/** - * @brief Bray-Curtis distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accumDiff = 0.0f, accumSum = 0.0f; - uint32_t blkCnt; - f32x4_t a, b, c, accumDiffV, accumSumV; - - - accumDiffV = vdupq_n_f32(0.0f); - accumSumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while (blkCnt > 0) { - a = vld1q(pA); - b = vld1q(pB); - - c = vabdq(a, b); - accumDiffV = vaddq(accumDiffV, c); - - c = vaddq_f32(a, b); - c = vabsq_f32(c); - accumSumV = vaddq(accumSumV, c); - - pA += 4; - pB += 4; - blkCnt--; - } - - blkCnt = blockSize & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - - a = vldrwq_z_f32(pA, p0); - b = vldrwq_z_f32(pB, p0); - - c = vabdq(a, b); - accumDiffV = vaddq_m(accumDiffV, accumDiffV, c, p0); - - c = vaddq_f32(a, b); - c = vabsq_f32(c); - accumSumV = vaddq_m(accumSumV, accumSumV, c, p0); - } - - accumDiff = vecAddAcrossF32Mve(accumDiffV); - accumSum = vecAddAcrossF32Mve(accumSumV); - - /* - It is assumed that accumSum is not zero. Since it is the sum of several absolute - values it would imply that all of them are zero. It is very unlikely for long vectors. - */ - return (accumDiff / accumSum); -} -#else -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" - -float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accumDiff=0.0f, accumSum=0.0f; - uint32_t blkCnt; - float32x4_t a,b,c,accumDiffV, accumSumV; - float32x2_t accumV2; - - accumDiffV = vdupq_n_f32(0.0f); - accumSumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - a = vld1q_f32(pA); - b = vld1q_f32(pB); - - c = vabdq_f32(a,b); - accumDiffV = vaddq_f32(accumDiffV,c); - - c = vaddq_f32(a,b); - c = vabsq_f32(c); - accumSumV = vaddq_f32(accumSumV,c); - - pA += 4; - pB += 4; - blkCnt --; - } - accumV2 = vpadd_f32(vget_low_f32(accumDiffV),vget_high_f32(accumDiffV)); - accumDiff = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); - - accumV2 = vpadd_f32(vget_low_f32(accumSumV),vget_high_f32(accumSumV)); - accumSum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - accumDiff += fabsf(*pA - *pB); - accumSum += fabsf(*pA++ + *pB++); - blkCnt --; - } - /* - - It is assumed that accumSum is not zero. Since it is the sum of several absolute - values it would imply that all of them are zero. It is very unlikely for long vectors. - - */ - return(accumDiff / accumSum); -} - -#else -float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accumDiff=0.0f, accumSum=0.0f, tmpA, tmpB; - - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - accumDiff += fabsf(tmpA - tmpB); - accumSum += fabsf(tmpA + tmpB); - blockSize --; - } - /* - - It is assumed that accumSum is not zero. Since it is the sum of several absolute - values it would imply that all of them are zero. It is very unlikely for long vectors. - - */ - return(accumDiff / accumSum); -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of braycurtis group - */ - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f16.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f16.c deleted file mode 100644 index ee46baa..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f16.c +++ /dev/null @@ -1,171 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_canberra_distance_f16.c - * Description: Canberra distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup FloatDist - */ - -/** - @defgroup Canberra Canberra distance - - Canberra distance - */ - - -/** - @addtogroup Canberra - @{ - */ - - -/** - * @brief Canberra distance between two vectors - * - * This function may divide by zero when samples pA[i] and pB[i] are both zero. - * The result of the computation will be correct. So the division per zero may be - * ignored. - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math_f16.h" - -float16_t arm_canberra_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - _Float16 accum = 0.0f16; - uint32_t blkCnt; - f16x8_t a, b, c, accumV; - - accumV = vdupq_n_f16(0.0f); - - blkCnt = blockSize >> 3; - while (blkCnt > 0) { - a = vld1q(pA); - b = vld1q(pB); - - c = vabdq(a, b); - - a = vabsq(a); - b = vabsq(b); - a = vaddq(a, b); - - /* - * May divide by zero when a and b have both the same lane at zero. - */ - a = vrecip_hiprec_f16(a); - - /* - * Force result of a division by 0 to 0. It the behavior of the - * sklearn canberra function. - */ - a = vdupq_m_n_f16(a, 0.0f, vcmpeqq(a, 0.0f)); - c = vmulq(c, a); - accumV = vaddq(accumV, c); - - pA += 8; - pB += 8; - blkCnt--; - } - - blkCnt = blockSize & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - - a = vldrhq_z_f16(pA, p0); - b = vldrhq_z_f16(pB, p0); - - c = vabdq(a, b); - - a = vabsq(a); - b = vabsq(b); - a = vaddq(a, b); - - /* - * May divide by zero when a and b have both the same lane at zero. - */ - a = vrecip_hiprec_f16(a); - - /* - * Force result of a division by 0 to 0. It the behavior of the - * sklearn canberra function. - */ - a = vdupq_m_n_f16(a, 0.0f, vcmpeqq(a, 0.0f)); - c = vmulq(c, a); - accumV = vaddq_m(accumV, accumV, c, p0); - } - - accum = vecAddAcrossF16Mve(accumV); - - return (accum); -} - - -#else -float16_t arm_canberra_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - _Float16 accum=0.0f, tmpA, tmpB,diff,sum; - - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - - diff = fabsf((float32_t)((_Float16)tmpA - (_Float16)tmpB)); - sum = (_Float16)fabsf((float32_t)tmpA) + (_Float16)fabsf((float32_t)tmpB); - if (((_Float16)tmpA != 0.0f16) || ((_Float16)tmpB != 0.0f16)) - { - accum += ((_Float16)diff / (_Float16)sum); - } - blockSize --; - } - return(accum); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of Canberra group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f32.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f32.c deleted file mode 100644 index a51d554..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f32.c +++ /dev/null @@ -1,222 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_canberra_distance_f32.c - * Description: Canberra distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -/** - @addtogroup Canberra - @{ - */ - - -/** - * @brief Canberra distance between two vectors - * - * This function may divide by zero when samples pA[i] and pB[i] are both zero. - * The result of the computation will be correct. So the division per zero may be - * ignored. - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accum = 0.0f; - uint32_t blkCnt; - f32x4_t a, b, c, accumV; - - accumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while (blkCnt > 0) { - a = vld1q(pA); - b = vld1q(pB); - - c = vabdq(a, b); - - a = vabsq(a); - b = vabsq(b); - a = vaddq(a, b); - - /* - * May divide by zero when a and b have both the same lane at zero. - */ - a = vrecip_medprec_f32(a); - - /* - * Force result of a division by 0 to 0. It the behavior of the - * sklearn canberra function. - */ - a = vdupq_m_n_f32(a, 0.0f, vcmpeqq(a, 0.0f)); - c = vmulq(c, a); - accumV = vaddq(accumV, c); - - pA += 4; - pB += 4; - blkCnt--; - } - - blkCnt = blockSize & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - - a = vldrwq_z_f32(pA, p0); - b = vldrwq_z_f32(pB, p0); - - c = vabdq(a, b); - - a = vabsq(a); - b = vabsq(b); - a = vaddq(a, b); - - /* - * May divide by zero when a and b have both the same lane at zero. - */ - a = vrecip_medprec_f32(a); - - /* - * Force result of a division by 0 to 0. It the behavior of the - * sklearn canberra function. - */ - a = vdupq_m_n_f32(a, 0.0f, vcmpeqq(a, 0.0f)); - c = vmulq(c, a); - accumV = vaddq_m(accumV, accumV, c, p0); - } - - accum = vecAddAcrossF32Mve(accumV); - - return (accum); -} - -#else -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" - -float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accum=0.0f, tmpA, tmpB,diff,sum; - uint32_t blkCnt; - float32x4_t a,b,c,accumV; - float32x2_t accumV2; - uint32x4_t isZeroV; - float32x4_t zeroV = vdupq_n_f32(0.0f); - - accumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - a = vld1q_f32(pA); - b = vld1q_f32(pB); - - c = vabdq_f32(a,b); - - a = vabsq_f32(a); - b = vabsq_f32(b); - a = vaddq_f32(a,b); - isZeroV = vceqq_f32(a,zeroV); - - /* - * May divide by zero when a and b have both the same lane at zero. - */ - a = vinvq_f32(a); - - /* - * Force result of a division by 0 to 0. It the behavior of the - * sklearn canberra function. - */ - a = vreinterpretq_f32_s32(vbicq_s32(vreinterpretq_s32_f32(a),vreinterpretq_s32_u32(isZeroV))); - c = vmulq_f32(c,a); - accumV = vaddq_f32(accumV,c); - - pA += 4; - pB += 4; - blkCnt --; - } - accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV)); - accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); - - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - tmpA = *pA++; - tmpB = *pB++; - - diff = fabsf(tmpA - tmpB); - sum = fabsf(tmpA) + fabsf(tmpB); - if ((tmpA != 0.0f) || (tmpB != 0.0f)) - { - accum += (diff / sum); - } - blkCnt --; - } - return(accum); -} - -#else -float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accum=0.0f, tmpA, tmpB,diff,sum; - - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - - diff = fabsf(tmpA - tmpB); - sum = fabsf(tmpA) + fabsf(tmpB); - if ((tmpA != 0.0f) || (tmpB != 0.0f)) - { - accum += (diff / sum); - } - blockSize --; - } - return(accum); -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of Canberra group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f16.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f16.c deleted file mode 100644 index 7bc6baf..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f16.c +++ /dev/null @@ -1,146 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_chebyshev_distance_f16.c - * Description: Chebyshev distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup FloatDist - */ - -/** - @defgroup Chebyshev Chebyshev distance - - Chebyshev distance - */ - -/** - @addtogroup Chebyshev - @{ - */ - - -/** - * @brief Chebyshev distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -float16_t arm_chebyshev_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - f16x8_t vecA, vecB; - f16x8_t vecDiff = vdupq_n_f16(0.0); - float16_t maxValue = 0.0f16; - - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) { - vecA = vld1q(pA); - pA += 8; - vecB = vld1q(pB); - pB += 8; - /* - * update per-lane max. - */ - vecDiff = vmaxnmaq(vsubq(vecA, vecB), vecDiff); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - - vecA = vldrhq_z_f16(pA, p0); - vecB = vldrhq_z_f16(pB, p0); - - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - vecDiff = vmaxnmaq_m(vecDiff, vsubq(vecA, vecB), p0); - } - /* - * Get max value across the vector - */ - return vmaxnmavq(maxValue, vecDiff); -} - -#else -float16_t arm_chebyshev_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - _Float16 diff=0.0f, maxVal,tmpA, tmpB; - - tmpA = *pA++; - tmpB = *pB++; - diff = (_Float16)fabsf((float32_t)((_Float16)tmpA - (_Float16)tmpB)); - maxVal = diff; - blockSize--; - - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - diff = (_Float16)fabsf((float32_t)((_Float16)tmpA - (_Float16)tmpB)); - if ((_Float16)diff > (_Float16)maxVal) - { - maxVal = diff; - } - blockSize --; - } - - return(maxVal); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of Chebyshev group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f32.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f32.c deleted file mode 100644 index 6704a5c..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f32.c +++ /dev/null @@ -1,213 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_chebyshev_distance_f32.c - * Description: Chebyshev distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -/** - @addtogroup Chebyshev - @{ - */ - - -/** - * @brief Chebyshev distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - f32x4_t vecA, vecB; - f32x4_t vecDiff = vdupq_n_f32(0.0); - float32_t maxValue = 0.0; - - - blkCnt = blockSize >> 2; - while (blkCnt > 0U) { - vecA = vld1q(pA); - pA += 4; - vecB = vld1q(pB); - pB += 4; - /* - * update per-lane max. - */ - vecDiff = vmaxnmaq(vsubq(vecA, vecB), vecDiff); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - - vecA = vldrwq_z_f32(pA, p0); - vecB = vldrwq_z_f32(pB, p0); - - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - vecDiff = vmaxnmaq_m(vecDiff, vsubq(vecA, vecB), p0); - } - /* - * Get max value across the vector - */ - return vmaxnmavq(maxValue, vecDiff); -} - -#else -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" - -float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t diff=0.0f, maxVal=0.0f, tmpA, tmpB; - uint32_t blkCnt; - float32x4_t a,b,diffV, maxValV; - float32x2_t maxValV2; - - if (blockSize <= 3) - { - tmpA = *pA++; - tmpB = *pB++; - diff = fabsf(tmpA - tmpB); - maxVal = diff; - blockSize--; - - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - diff = fabsf(tmpA - tmpB); - if (diff > maxVal) - { - maxVal = diff; - } - blockSize --; - } - } - else - { - - a = vld1q_f32(pA); - b = vld1q_f32(pB); - pA += 4; - pB += 4; - - diffV = vabdq_f32(a,b); - - blockSize -= 4; - - maxValV = diffV; - - - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - a = vld1q_f32(pA); - b = vld1q_f32(pB); - - diffV = vabdq_f32(a,b); - maxValV = vmaxq_f32(maxValV, diffV); - - pA += 4; - pB += 4; - blkCnt --; - } - maxValV2 = vpmax_f32(vget_low_f32(maxValV),vget_high_f32(maxValV)); - maxValV2 = vpmax_f32(maxValV2,maxValV2); - maxVal = vget_lane_f32(maxValV2,0); - - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - tmpA = *pA++; - tmpB = *pB++; - diff = fabsf(tmpA - tmpB); - if (diff > maxVal) - { - maxVal = diff; - } - blkCnt --; - } - } - return(maxVal); -} - -#else -float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t diff=0.0f, maxVal,tmpA, tmpB; - - tmpA = *pA++; - tmpB = *pB++; - diff = fabsf(tmpA - tmpB); - maxVal = diff; - blockSize--; - - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - diff = fabsf(tmpA - tmpB); - if (diff > maxVal) - { - maxVal = diff; - } - blockSize --; - } - - return(maxVal); -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of Chebyshev group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f64.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f64.c deleted file mode 100644 index 8329236..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f64.c +++ /dev/null @@ -1,76 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_chebyshev_distance_f64.c - * Description: Chebyshev distance between two vectors - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -/** - @addtogroup Chebyshev - @{ - */ - - -/** - * @brief Chebyshev distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float64_t arm_chebyshev_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize) -{ - float64_t diff=0., maxVal,tmpA, tmpB; - - tmpA = *pA++; - tmpB = *pB++; - diff = fabs(tmpA - tmpB); - maxVal = diff; - blockSize--; - - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - diff = fabs(tmpA - tmpB); - if (diff > maxVal) - { - maxVal = diff; - } - blockSize --; - } - - return(maxVal); -} - -/** - * @} end of Chebyshev group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f16.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f16.c deleted file mode 100644 index ee5decd..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f16.c +++ /dev/null @@ -1,128 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cityblock_distance_f16.c - * Description: Cityblock (Manhattan) distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup FloatDist - */ - -/** - @defgroup Manhattan Cityblock (Manhattan) distance - - Cityblock (Manhattan) distance - */ - -/** - @addtogroup Manhattan - @{ - */ - - -/** - * @brief Cityblock (Manhattan) distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -float16_t arm_cityblock_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - uint32_t blkCnt; - f16x8_t a, b, accumV, tempV; - - accumV = vdupq_n_f16(0.0f); - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) { - a = vld1q(pA); - b = vld1q(pB); - - tempV = vabdq(a, b); - accumV = vaddq(accumV, tempV); - - pA += 8; - pB += 8; - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - - a = vldrhq_z_f16(pA, p0); - b = vldrhq_z_f16(pB, p0); - - tempV = vabdq(a, b); - accumV = vaddq_m(accumV, accumV, tempV, p0); - } - - return vecAddAcrossF16Mve(accumV); -} - -#else -float16_t arm_cityblock_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - _Float16 accum,tmpA, tmpB; - - accum = 0.0f16; - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - accum += (_Float16)fabsf((float32_t)((_Float16)tmpA - (_Float16)tmpB)); - - blockSize --; - } - - return(accum); -} -#endif - -/** - * @} end of Manhattan group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f32.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f32.c deleted file mode 100644 index 07ebb75..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f32.c +++ /dev/null @@ -1,157 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cityblock_distance_f32.c - * Description: Cityblock (Manhattan) distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - -/** - @addtogroup Manhattan - @{ - */ - - -/** - * @brief Cityblock (Manhattan) distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - uint32_t blkCnt; - f32x4_t a, b, accumV, tempV; - - accumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while (blkCnt > 0U) { - a = vld1q(pA); - b = vld1q(pB); - - tempV = vabdq(a, b); - accumV = vaddq(accumV, tempV); - - pA += 4; - pB += 4; - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - - a = vldrwq_z_f32(pA, p0); - b = vldrwq_z_f32(pB, p0); - - tempV = vabdq(a, b); - accumV = vaddq_m(accumV, accumV, tempV, p0); - } - - return vecAddAcrossF32Mve(accumV); -} - -#else -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" - -float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accum=0.0f, tmpA, tmpB; - uint32_t blkCnt; - float32x4_t a,b,accumV, tempV; - float32x2_t accumV2; - - accumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - a = vld1q_f32(pA); - b = vld1q_f32(pB); - - tempV = vabdq_f32(a,b); - accumV = vaddq_f32(accumV, tempV); - - pA += 4; - pB += 4; - blkCnt --; - } - accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV)); - accumV2 = vpadd_f32(accumV2,accumV2); - accum = vget_lane_f32(accumV2,0); - - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - tmpA = *pA++; - tmpB = *pB++; - accum += fabsf(tmpA - tmpB); - - blkCnt --; - } - return(accum); -} - -#else -float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accum,tmpA, tmpB; - - accum = 0.0f; - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - accum += fabsf(tmpA - tmpB); - - blockSize --; - } - - return(accum); -} -#endif -#endif - -/** - * @} end of Manhattan group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f64.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f64.c deleted file mode 100644 index 471b922..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f64.c +++ /dev/null @@ -1,67 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cityblock_distance_f64.c - * Description: Cityblock (Manhattan) distance between two vectors - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - -/** - @addtogroup Manhattan - @{ - */ - - -/** - * @brief Cityblock (Manhattan) distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float64_t arm_cityblock_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize) -{ - float64_t accum,tmpA, tmpB; - - accum = 0.; - while(blockSize > 0) - { - tmpA = *pA++; - tmpB = *pB++; - accum += fabs(tmpA - tmpB); - - blockSize --; - } - - return(accum); -} - -/** - * @} end of Manhattan group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f16.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f16.c deleted file mode 100644 index 8712bc5..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f16.c +++ /dev/null @@ -1,99 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlation_distance_f16.c - * Description: Correlation distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - - -/** - @ingroup FloatDist - */ - -/** - @defgroup Correlation Correlation distance - - Correlation distance - */ - -/** - @addtogroup Correlation - @{ - */ - - -/** - * @brief Correlation distance between two vectors - * - * The input vectors are modified in place ! - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float16_t arm_correlation_distance_f16(float16_t *pA,float16_t *pB, uint32_t blockSize) -{ - float16_t ma,mb,pwra,pwrb,dot,tmp; - - arm_mean_f16(pA, blockSize, &ma); - arm_mean_f16(pB, blockSize, &mb); - - arm_offset_f16(pA, -(_Float16)ma, pA, blockSize); - arm_offset_f16(pB, -(_Float16)mb, pB, blockSize); - - arm_power_f16(pA, blockSize, &pwra); - arm_power_f16(pB, blockSize, &pwrb); - - arm_dot_prod_f16(pA,pB,blockSize,&dot); - - dot = (_Float16)dot / (_Float16)blockSize; - pwra = (_Float16)pwra / (_Float16)blockSize; - pwrb = (_Float16)pwrb / (_Float16)blockSize; - - arm_sqrt_f16((_Float16)pwra * (_Float16)pwrb,&tmp); - - return(1.0f16 - (_Float16)dot / (_Float16)tmp); - - -} - - - -/** - * @} end of Correlation group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f32.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f32.c deleted file mode 100644 index 0962bd2..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f32.c +++ /dev/null @@ -1,84 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlation_distance_f32.c - * Description: Correlation distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - - -/** - @addtogroup Correlation - @{ - */ - - -/** - * @brief Correlation distance between two vectors - * - * The input vectors are modified in place ! - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float32_t arm_correlation_distance_f32(float32_t *pA,float32_t *pB, uint32_t blockSize) -{ - float32_t ma,mb,pwra,pwrb,dot,tmp; - - arm_mean_f32(pA, blockSize, &ma); - arm_mean_f32(pB, blockSize, &mb); - - arm_offset_f32(pA, -ma, pA, blockSize); - arm_offset_f32(pB, -mb, pB, blockSize); - - arm_power_f32(pA, blockSize, &pwra); - arm_power_f32(pB, blockSize, &pwrb); - - arm_dot_prod_f32(pA,pB,blockSize,&dot); - - dot = dot / blockSize; - pwra = pwra / blockSize; - pwrb = pwrb / blockSize; - - arm_sqrt_f32(pwra * pwrb,&tmp); - - return(1.0f - dot / tmp); - - -} - - - -/** - * @} end of Correlation group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f16.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f16.c deleted file mode 100644 index b21ae19..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f16.c +++ /dev/null @@ -1,88 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cosine_distance_f16.c - * Description: Cosine distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup FloatDist - */ - -/** - @defgroup CosineDist Cosine distance - - Cosine distance - */ - - -/** - @addtogroup CosineDist - @{ - */ - - - -/** - * @brief Cosine distance between two vectors - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - * @par Description - * cosine_distance(u,v) is 1 - u . v / (Norm(u) Norm(v)) - */ - -float16_t arm_cosine_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - float16_t pwra,pwrb,dot,tmp; - - arm_power_f16(pA, blockSize, &pwra); - arm_power_f16(pB, blockSize, &pwrb); - - arm_dot_prod_f16(pA,pB,blockSize,&dot); - - arm_sqrt_f16((_Float16)pwra * (_Float16)pwrb, &tmp); - return(1.0f16 - (_Float16)dot / (_Float16)tmp); - -} - - - -/** - * @} end of CosineDist group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f32.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f32.c deleted file mode 100644 index bd5e71a..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f32.c +++ /dev/null @@ -1,72 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cosine_distance_f32.c - * Description: Cosine distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -/** - @addtogroup CosineDist - @{ - */ - - - -/** - * @brief Cosine distance between two vectors - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - * @par Description - * cosine_distance(u,v) is 1 - u . v / (Norm(u) Norm(v)) - */ - -float32_t arm_cosine_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t pwra,pwrb,dot,tmp; - - arm_power_f32(pA, blockSize, &pwra); - arm_power_f32(pB, blockSize, &pwrb); - - arm_dot_prod_f32(pA,pB,blockSize,&dot); - - arm_sqrt_f32(pwra * pwrb, &tmp); - return(1.0f - dot / tmp); - -} - - - -/** - * @} end of CosineDist group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f64.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f64.c deleted file mode 100644 index 7e941e1..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f64.c +++ /dev/null @@ -1,70 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cosine_distance_f64.c - * Description: Cosine distance between two vectors - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -/** - @addtogroup CosineDist - @{ - */ - - - -/** - * @brief Cosine distance between two vectors - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - -float64_t arm_cosine_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize) -{ - float64_t pwra,pwrb,dot,tmp; - - arm_power_f64(pA, blockSize, &pwra); - arm_power_f64(pB, blockSize, &pwrb); - - arm_dot_prod_f64(pA,pB,blockSize,&dot); - - tmp = sqrt(pwra * pwrb); - return(1. - dot / tmp); - -} - - - -/** - * @} end of CosineDist group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_dice_distance.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_dice_distance.c deleted file mode 100644 index 696956e..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_dice_distance.c +++ /dev/null @@ -1,92 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dice_distance.c - * Description: Dice distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - -extern void arm_boolean_distance_TT_TF_FT(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools - , uint32_t *cTT - , uint32_t *cTF - , uint32_t *cFT - ); - - -/** - * @ingroup groupDistance - * @{ - */ - -/** - * @defgroup BoolDist Boolean Distances - * - * Distances between two vectors of boolean values. - * - * Booleans are packed in 32 bit words. - * numberOfBooleans argument is the number of booleans and not the - * number of words. - * - * Bits are packed in big-endian mode (because of behavior of numpy packbits in - * in version < 1.17) - */ - -/** - @addtogroup BoolDist - @{ - */ - -/** - * @brief Dice distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_dice_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools) -{ - uint32_t ctt=0,ctf=0,cft=0; - - arm_boolean_distance_TT_TF_FT(pA, pB, numberOfBools, &ctt, &ctf, &cft); - - return(1.0*(ctf + cft) / (2.0*ctt + cft + ctf)); -} - - -/** - * @} end of BoolDist group - */ - -/** - * @} end of groupDistance group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f16.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f16.c deleted file mode 100644 index b4d1ebf..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f16.c +++ /dev/null @@ -1,131 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_euclidean_distance_f16.c - * Description: Euclidean distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - - -/** - @ingroup FloatDist - */ - -/** - @defgroup Euclidean Euclidean distance - - Euclidean distance - */ - - -/** - @addtogroup Euclidean - @{ - */ - - -/** - * @brief Euclidean distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" -float16_t arm_euclidean_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - uint32_t blkCnt; - float16_t tmp; - f16x8_t a, b, accumV, tempV; - - accumV = vdupq_n_f16(0.0f); - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) { - a = vld1q(pA); - b = vld1q(pB); - - tempV = vsubq(a, b); - accumV = vfmaq(accumV, tempV, tempV); - - pA += 8; - pB += 8; - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - - a = vldrhq_z_f16(pA, p0); - b = vldrhq_z_f16(pB, p0); - - tempV = vsubq(a, b); - accumV = vfmaq_m(accumV, tempV, tempV, p0); - } - - arm_sqrt_f16(vecAddAcrossF16Mve(accumV), &tmp); - return (tmp); -} - -#else -float16_t arm_euclidean_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - _Float16 accum=0.0f,tmp; - float16_t result; - - while(blockSize > 0) - { - tmp = (_Float16)*pA++ - (_Float16)*pB++; - accum += SQ(tmp); - blockSize --; - } - arm_sqrt_f16(accum,&result); - return(result); -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of Euclidean group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f32.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f32.c deleted file mode 100644 index 54290ed..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f32.c +++ /dev/null @@ -1,152 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_euclidean_distance_f32.c - * Description: Euclidean distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - - -/** - @addtogroup Euclidean - @{ - */ - - -/** - * @brief Euclidean distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" -float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - uint32_t blkCnt; - float32_t tmp; - f32x4_t a, b, accumV, tempV; - - accumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while (blkCnt > 0U) { - a = vld1q(pA); - b = vld1q(pB); - - tempV = vsubq(a, b); - accumV = vfmaq(accumV, tempV, tempV); - - pA += 4; - pB += 4; - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - - a = vldrwq_z_f32(pA, p0); - b = vldrwq_z_f32(pB, p0); - - tempV = vsubq(a, b); - accumV = vfmaq_m(accumV, tempV, tempV, p0); - } - - arm_sqrt_f32(vecAddAcrossF32Mve(accumV), &tmp); - return (tmp); -} -#else -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" - -float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accum=0.0f,tmp; - uint32_t blkCnt; - float32x4_t a,b,accumV; - float32x2_t accumV2; - - accumV = vdupq_n_f32(0.0f); - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - a = vld1q_f32(pA); - b = vld1q_f32(pB); - - a = vsubq_f32(a,b); - accumV = vmlaq_f32(accumV,a,a); - pA += 4; - pB += 4; - blkCnt --; - } - accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV)); - accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - tmp = *pA++ - *pB++; - accum += SQ(tmp); - blkCnt --; - } - arm_sqrt_f32(accum,&tmp); - return(tmp); -} - -#else -float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accum=0.0f,tmp; - - while(blockSize > 0) - { - tmp = *pA++ - *pB++; - accum += SQ(tmp); - blockSize --; - } - arm_sqrt_f32(accum,&tmp); - return(tmp); -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of Euclidean group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f64.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f64.c deleted file mode 100644 index 9836800..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f64.c +++ /dev/null @@ -1,66 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_euclidean_distance_f64.c - * Description: Euclidean distance between two vectors - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - - -/** - @addtogroup Euclidean - @{ - */ - - -/** - * @brief Euclidean distance between two vectors - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ -float64_t arm_euclidean_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize) -{ - float64_t accum=0.,tmp; - - while(blockSize > 0) - { - tmp = *pA++ - *pB++; - accum += SQ(tmp); - blockSize --; - } - tmp = sqrt(accum); - return(tmp); -} - -/** - * @} end of Euclidean group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_hamming_distance.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_hamming_distance.c deleted file mode 100644 index 8f3cbc6..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_hamming_distance.c +++ /dev/null @@ -1,70 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_hamming_distance.c - * Description: Hamming distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -extern void arm_boolean_distance_TF_FT(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools - , uint32_t *cTF - , uint32_t *cFT - ); - -/** - @addtogroup BoolDist - @{ - */ - - -/** - * @brief Hamming distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_hamming_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools) -{ - uint32_t ctf=0,cft=0; - - arm_boolean_distance_TF_FT(pA, pB, numberOfBools, &ctf, &cft); - - return(1.0*(ctf + cft) / numberOfBools); -} - - -/** - * @} end of BoolDist group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_jaccard_distance.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_jaccard_distance.c deleted file mode 100644 index 2c3c1ec..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_jaccard_distance.c +++ /dev/null @@ -1,72 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_jaccard_distance.c - * Description: Jaccard distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - - -extern void arm_boolean_distance_TT_TF_FT(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools - , uint32_t *cTT - , uint32_t *cTF - , uint32_t *cFT - ); - - -/** - @addtogroup BoolDist - @{ - */ - -/** - * @brief Jaccard distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_jaccard_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools) -{ - uint32_t ctt=0,ctf=0,cft=0; - - arm_boolean_distance_TT_TF_FT(pA, pB, numberOfBools, &ctt, &ctf, &cft); - - return(1.0*(ctf + cft) / (ctt + cft + ctf)); -} - - -/** - * @} end of BoolDist group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f16.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f16.c deleted file mode 100644 index ec0404a..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f16.c +++ /dev/null @@ -1,177 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_jensenshannon_distance_f16.c - * Description: Jensen-Shannon distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup FloatDist - */ - -/** - @defgroup JensenShannon Jensen-Shannon distance - - Jensen-Shannon distance - */ - - -/** - @addtogroup JensenShannon - @{ - */ - -#if !defined(ARM_MATH_MVE_FLOAT16) || defined(ARM_MATH_AUTOVECTORIZE) -/// @private -__STATIC_INLINE float16_t rel_entr(float16_t x, float16_t y) -{ - return ((_Float16)x * (_Float16)logf((float32_t)((_Float16)x / (_Float16)y))); -} -#endif - - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math_f16.h" - -float16_t arm_jensenshannon_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - uint32_t blkCnt; - float16_t tmp; - f16x8_t a, b, t, tmpV, accumV; - - accumV = vdupq_n_f16(0.0f); - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) { - a = vld1q(pA); - b = vld1q(pB); - - t = vaddq(a, b); - t = vmulq(t, 0.5f); - - tmpV = vmulq(a, vrecip_medprec_f16(t)); - tmpV = vlogq_f16(tmpV); - accumV = vfmaq(accumV, a, tmpV); - - tmpV = vmulq_f16(b, vrecip_medprec_f16(t)); - tmpV = vlogq_f16(tmpV); - accumV = vfmaq(accumV, b, tmpV); - - pA += 8; - pB += 8; - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - - a = vldrhq_z_f16(pA, p0); - b = vldrhq_z_f16(pB, p0); - - t = vaddq(a, b); - t = vmulq(t, 0.5f); - - tmpV = vmulq_f16(a, vrecip_medprec_f16(t)); - tmpV = vlogq_f16(tmpV); - accumV = vfmaq_m_f16(accumV, a, tmpV, p0); - - tmpV = vmulq_f16(b, vrecip_medprec_f16(t)); - tmpV = vlogq_f16(tmpV); - accumV = vfmaq_m_f16(accumV, b, tmpV, p0); - - } - - arm_sqrt_f16((_Float16)vecAddAcrossF16Mve(accumV) / 2.0f16, &tmp); - return (tmp); -} - -#else - - -/** - * @brief Jensen-Shannon distance between two vectors - * - * This function is assuming that elements of second vector are > 0 - * and 0 only when the corresponding element of first vector is 0. - * Otherwise the result of the computation does not make sense - * and for speed reasons, the cases returning NaN or Infinity are not - * managed. - * - * When the function is computing x log (x / y) with x == 0 and y == 0, - * it will compute the right result (0) but a division by zero will occur - * and should be ignored in client code. - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - - -float16_t arm_jensenshannon_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize) -{ - _Float16 left, right,sum, tmp; - float16_t result; - uint32_t i; - - left = 0.0f16; - right = 0.0f16; - for(i=0; i < blockSize; i++) - { - tmp = ((_Float16)pA[i] + (_Float16)pB[i]) / 2.0f16; - left += (_Float16)rel_entr(pA[i], tmp); - right += (_Float16)rel_entr(pB[i], tmp); - } - - - sum = left + right; - arm_sqrt_f16((_Float16)sum/2.0f16, &result); - return(result); - -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of JensenShannon group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c deleted file mode 100644 index 6e35ffd..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c +++ /dev/null @@ -1,247 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_jensenshannon_distance_f32.c - * Description: Jensen-Shannon distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -/** - @addtogroup JensenShannon - @{ - */ - -#if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) -/// @private -__STATIC_INLINE float32_t rel_entr(float32_t x, float32_t y) -{ - return (x * logf(x / y)); -} -#endif - - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - uint32_t blkCnt; - float32_t tmp; - f32x4_t a, b, t, tmpV, accumV; - - accumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while (blkCnt > 0U) { - a = vld1q(pA); - b = vld1q(pB); - - t = vaddq(a, b); - t = vmulq(t, 0.5f); - - tmpV = vmulq(a, vrecip_medprec_f32(t)); - tmpV = vlogq_f32(tmpV); - accumV = vfmaq(accumV, a, tmpV); - - tmpV = vmulq_f32(b, vrecip_medprec_f32(t)); - tmpV = vlogq_f32(tmpV); - accumV = vfmaq(accumV, b, tmpV); - - pA += 4; - pB += 4; - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - - a = vldrwq_z_f32(pA, p0); - b = vldrwq_z_f32(pB, p0); - - t = vaddq(a, b); - t = vmulq(t, 0.5f); - - tmpV = vmulq_f32(a, vrecip_medprec_f32(t)); - tmpV = vlogq_f32(tmpV); - accumV = vfmaq_m_f32(accumV, a, tmpV, p0); - - tmpV = vmulq_f32(b, vrecip_medprec_f32(t)); - tmpV = vlogq_f32(tmpV); - accumV = vfmaq_m_f32(accumV, b, tmpV, p0); - - } - - arm_sqrt_f32(vecAddAcrossF32Mve(accumV) / 2.0f, &tmp); - return (tmp); -} - -#else - -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" - - -/** - * @brief Jensen-Shannon distance between two vectors - * - * This function is assuming that elements of second vector are > 0 - * and 0 only when the corresponding element of first vector is 0. - * Otherwise the result of the computation does not make sense - * and for speed reasons, the cases returning NaN or Infinity are not - * managed. - * - * When the function is computing x log (x / y) with x == 0 and y == 0, - * it will compute the right result (0) but a division by zero will occur - * and should be ignored in client code. - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - - -float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t accum, result, tmp,a,b; - uint32_t blkCnt; - float32x4_t aV,bV,t, tmpV, accumV; - float32x2_t accumV2; - - accum = 0.0f; - accumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - aV = vld1q_f32(pA); - bV = vld1q_f32(pB); - t = vaddq_f32(aV,bV); - t = vmulq_n_f32(t, 0.5f); - - tmpV = vmulq_f32(aV, vinvq_f32(t)); - tmpV = vlogq_f32(tmpV); - accumV = vmlaq_f32(accumV, aV, tmpV); - - - tmpV = vmulq_f32(bV, vinvq_f32(t)); - tmpV = vlogq_f32(tmpV); - accumV = vmlaq_f32(accumV, bV, tmpV); - - pA += 4; - pB += 4; - - - blkCnt --; - } - - accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV)); - accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - a = *pA; - b = *pB; - tmp = (a + b) / 2.0f; - accum += rel_entr(a, tmp); - accum += rel_entr(b, tmp); - - pA++; - pB++; - - blkCnt --; - } - - - arm_sqrt_f32(accum/2.0f, &result); - return(result); - -} - -#else - - -/** - * @brief Jensen-Shannon distance between two vectors - * - * This function is assuming that elements of second vector are > 0 - * and 0 only when the corresponding element of first vector is 0. - * Otherwise the result of the computation does not make sense - * and for speed reasons, the cases returning NaN or Infinity are not - * managed. - * - * When the function is computing x log (x / y) with x == 0 and y == 0, - * it will compute the right result (0) but a division by zero will occur - * and should be ignored in client code. - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] blockSize vector length - * @return distance - * - */ - - -float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) -{ - float32_t left, right,sum, result, tmp; - uint32_t i; - - left = 0.0f; - right = 0.0f; - for(i=0; i < blockSize; i++) - { - tmp = (pA[i] + pB[i]) / 2.0f; - left += rel_entr(pA[i], tmp); - right += rel_entr(pB[i], tmp); - } - - - sum = left + right; - arm_sqrt_f32(sum/2.0f, &result); - return(result); - -} - -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of JensenShannon group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_kulsinski_distance.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_kulsinski_distance.c deleted file mode 100644 index f1c513c..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_kulsinski_distance.c +++ /dev/null @@ -1,73 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_kulsinski_distance.c - * Description: Kulsinski distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - - -extern void arm_boolean_distance_TT_TF_FT(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools - , uint32_t *cTT - , uint32_t *cTF - , uint32_t *cFT - ); - - -/** - @addtogroup BoolDist - @{ - */ - - -/** - * @brief Kulsinski distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_kulsinski_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools) -{ - uint32_t ctt=0,ctf=0,cft=0; - - arm_boolean_distance_TT_TF_FT(pA, pB, numberOfBools, &ctt, &ctf, &cft); - - return(1.0*(ctf + cft - ctt + numberOfBools) / (cft + ctf + numberOfBools)); -} - - -/** - * @} end of BoolDist group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f16.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f16.c deleted file mode 100644 index bce129d..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f16.c +++ /dev/null @@ -1,137 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_minkowski_distance_f16.c - * Description: Minkowski distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup FloatDist - */ - -/** - @defgroup Minkowski Minkowski distance - - Minkowski distance - */ - -/** - @addtogroup Minkowski - @{ - */ - - -/** - * @brief Minkowski distance between two vectors - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] order Distance order - * @param[in] blockSize Number of samples - * @return distance - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math_f16.h" - -float16_t arm_minkowski_distance_f16(const float16_t *pA,const float16_t *pB, int32_t order, uint32_t blockSize) -{ - uint32_t blkCnt; - f16x8_t a, b, tmpV, sumV; - - sumV = vdupq_n_f16(0.0f); - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) { - a = vld1q(pA); - b = vld1q(pB); - - tmpV = vabdq(a, b); - tmpV = vpowq_f16(tmpV, vdupq_n_f16(order)); - sumV = vaddq(sumV, tmpV); - - pA += 8; - pB += 8; - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - - a = vldrhq_z_f16(pA, p0); - b = vldrhq_z_f16(pB, p0); - - tmpV = vabdq(a, b); - tmpV = vpowq_f16(tmpV, vdupq_n_f16(order)); - sumV = vaddq_m(sumV, sumV, tmpV, p0); - } - - return (powf((float32_t)vecAddAcrossF16Mve(sumV), (1.0f / (float32_t) order))); -} - - -#else - - -float16_t arm_minkowski_distance_f16(const float16_t *pA,const float16_t *pB, int32_t order, uint32_t blockSize) -{ - _Float16 sum; - uint32_t i; - - sum = 0.0f16; - for(i=0; i < blockSize; i++) - { - sum += (_Float16)powf(fabsf((float32_t)((_Float16)pA[i] - (_Float16)pB[i])),order); - } - - - return(_Float16)(powf((float32_t)sum,(1.0f/(float32_t)order))); - -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of Minkowski group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f32.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f32.c deleted file mode 100644 index 15ce5b3..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f32.c +++ /dev/null @@ -1,188 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_minkowski_distance_f32.c - * Description: Minkowski distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -/** - @addtogroup Minkowski - @{ - */ - -/* 6.14 bug */ -#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) && (__ARMCC_VERSION < 6150001) - -__attribute__((weak)) float __powisf2(float a, int b) -{ - const int recip = b < 0; - float r = 1; - while (1) - { - if (b & 1) - r *= a; - b /= 2; - if (b == 0) - break; - a *= a; - } - return recip ? 1/r : r; -} -#endif - -/** - * @brief Minkowski distance between two vectors - * - * @param[in] pA First vector - * @param[in] pB Second vector - * @param[in] order Distance order - * @param[in] blockSize Number of samples - * @return distance - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize) -{ - uint32_t blkCnt; - f32x4_t a, b, tmpV, sumV; - - sumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while (blkCnt > 0U) { - a = vld1q(pA); - b = vld1q(pB); - - tmpV = vabdq(a, b); - tmpV = vpowq_f32(tmpV, vdupq_n_f32(order)); - sumV = vaddq(sumV, tmpV); - - pA += 4; - pB += 4; - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - - a = vldrwq_z_f32(pA, p0); - b = vldrwq_z_f32(pB, p0); - - tmpV = vabdq(a, b); - tmpV = vpowq_f32(tmpV, vdupq_n_f32(order)); - sumV = vaddq_m(sumV, sumV, tmpV, p0); - } - - return (powf(vecAddAcrossF32Mve(sumV), (1.0f / (float32_t) order))); -} - -#else -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" - -float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize) -{ - float32_t sum; - uint32_t blkCnt; - float32x4_t sumV,aV,bV, tmpV, n; - float32x2_t sumV2; - - sum = 0.0f; - sumV = vdupq_n_f32(0.0f); - n = vdupq_n_f32(order); - - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - aV = vld1q_f32(pA); - bV = vld1q_f32(pB); - pA += 4; - pB += 4; - - tmpV = vabdq_f32(aV,bV); - tmpV = vpowq_f32(tmpV,n); - sumV = vaddq_f32(sumV, tmpV); - - - blkCnt --; - } - - sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); - sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1); - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - sum += powf(fabsf(*pA++ - *pB++),order); - - blkCnt --; - } - - - return(powf(sum,(1.0f/order))); - -} - -#else - - -float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize) -{ - float32_t sum; - uint32_t i; - - sum = 0.0f; - for(i=0; i < blockSize; i++) - { - sum += powf(fabsf(pA[i] - pB[i]),order); - } - - - return(powf(sum,(1.0f/order))); - -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of Minkowski group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_rogerstanimoto_distance.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_rogerstanimoto_distance.c deleted file mode 100644 index a29474e..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_rogerstanimoto_distance.c +++ /dev/null @@ -1,75 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rogerstanimoto_distance.c - * Description: Roger Stanimoto distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - - -extern void arm_boolean_distance_TT_FF_TF_FT(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools - , uint32_t *cTT - , uint32_t *cFF - , uint32_t *cTF - , uint32_t *cFT - ); - - -/** - @addtogroup BoolDist - @{ - */ - -/** - * @brief Rogers Tanimoto distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_rogerstanimoto_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools) -{ - uint32_t ctt=0,cff=0,ctf=0,cft=0,r; - - arm_boolean_distance_TT_FF_TF_FT(pA, pB, numberOfBools, &ctt,&cff, &ctf, &cft); - - r = 2*(ctf + cft); - - return(1.0*r / (r + ctt + cff)); -} - - -/** - * @} end of BoolDist group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_russellrao_distance.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_russellrao_distance.c deleted file mode 100644 index 56250e8..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_russellrao_distance.c +++ /dev/null @@ -1,72 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_russellrao_distance.c - * Description: Russell-Rao distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - - -extern void arm_boolean_distance_TT(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools - , uint32_t *cTT - ); - - -/** - @addtogroup BoolDist - @{ - */ - -/** - * @brief Russell-Rao distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_russellrao_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools) -{ - uint32_t ctt=0; - - - arm_boolean_distance_TT(pA, pB, numberOfBools, &ctt); - - - return(1.0f*(numberOfBools - ctt) / ((float32_t)numberOfBools)); -} - - -/** - * @} end of BoolDist group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_sokalmichener_distance.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_sokalmichener_distance.c deleted file mode 100644 index 3eb80d7..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_sokalmichener_distance.c +++ /dev/null @@ -1,76 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sokalmichener_distance.c - * Description: Sokal-Michener distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -extern void arm_boolean_distance_TT_FF_TF_FT(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools - , uint32_t *cTT - , uint32_t *cFF - , uint32_t *cTF - , uint32_t *cFT - ); - - -/** - @addtogroup BoolDist - @{ - */ - -/** - * @brief Sokal-Michener distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_sokalmichener_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools) -{ - uint32_t ctt=0,cff=0,cft=0,ctf=0; - float32_t r,s; - - arm_boolean_distance_TT_FF_TF_FT(pA, pB, numberOfBools, &ctt, &cff, &ctf, &cft); - - r = 2.0*(ctf + cft); - s = 1.0*(cff + ctt); - - return(r / (s+r)); -} - - -/** - * @} end of BoolDist group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_sokalsneath_distance.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_sokalsneath_distance.c deleted file mode 100644 index 317e8d4..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_sokalsneath_distance.c +++ /dev/null @@ -1,74 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sokalsneath_distance.c - * Description: Sokal-Sneath distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -extern void arm_boolean_distance_TT_TF_FT(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools - , uint32_t *cTT - , uint32_t *cTF - , uint32_t *cFT - ); - - -/** - @addtogroup BoolDist - @{ - */ - -/** - * @brief Sokal-Sneath distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_sokalsneath_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools) -{ - uint32_t ctt=0,cft=0,ctf=0; - float32_t r; - - arm_boolean_distance_TT_TF_FT(pA, pB, numberOfBools, &ctt, &ctf, &cft); - - r = 2.0*(ctf + cft); - - return(r / (r + ctt)); -} - - -/** - * @} end of BoolDist group - */ diff --git a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_yule_distance.c b/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_yule_distance.c deleted file mode 100644 index 28b0081..0000000 --- a/Drivers/CMSIS/DSP/Source/DistanceFunctions/arm_yule_distance.c +++ /dev/null @@ -1,74 +0,0 @@ - -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_yule_distance.c - * Description: Yule distance between two vectors - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/distance_functions.h" -#include -#include - - -extern void arm_boolean_distance_TT_FF_TF_FT(const uint32_t *pA - , const uint32_t *pB - , uint32_t numberOfBools - , uint32_t *cTT - , uint32_t *cFF - , uint32_t *cTF - , uint32_t *cFT - ); - -/** - @addtogroup BoolDist - @{ - */ - - -/** - * @brief Yule distance between two vectors - * - * @param[in] pA First vector of packed booleans - * @param[in] pB Second vector of packed booleans - * @param[in] numberOfBools Number of booleans - * @return distance - * - */ - -float32_t arm_yule_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools) -{ - uint32_t ctt=0,cff=0,ctf=0,cft=0,r; - - arm_boolean_distance_TT_FF_TF_FT(pA, pB, numberOfBools, &ctt,&cff, &ctf, &cft); - - r = 2*(ctf * cft); - - return(1.0*r / (r/2.0 + ctt * cff)); -} - - -/** - * @} end of BoolDist group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/FastMathFunctions/CMakeLists.txt deleted file mode 100644 index 0643306..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/CMakeLists.txt +++ /dev/null @@ -1,80 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPFastMath) - -include(configLib) -include(configDsp) - - -add_library(CMSISDSPFastMath STATIC) -configLib(CMSISDSPFastMath ${ROOT}) -configDsp(CMSISDSPFastMath ${ROOT}) - -include(interpol) -interpol(CMSISDSPFastMath) - -if (CONFIGTABLE AND ALLFAST) - target_compile_definitions(CMSISDSPFastMath PUBLIC ARM_ALL_FAST_TABLES) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_COS_F32) -target_sources(CMSISDSPFastMath PRIVATE arm_cos_f32.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_COS_Q15) -target_sources(CMSISDSPFastMath PRIVATE arm_cos_q15.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_COS_Q31) -target_sources(CMSISDSPFastMath PRIVATE arm_cos_q31.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_F32) -target_sources(CMSISDSPFastMath PRIVATE arm_sin_f32.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_Q15) -target_sources(CMSISDSPFastMath PRIVATE arm_sin_q15.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_Q31) -target_sources(CMSISDSPFastMath PRIVATE arm_sin_q31.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_SQRT_Q31) -target_sources(CMSISDSPFastMath PRIVATE arm_sqrt_q31.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_SQRT_Q15) -target_sources(CMSISDSPFastMath PRIVATE arm_sqrt_q15.c) -endif() - -target_sources(CMSISDSPFastMath PRIVATE arm_vlog_f32.c) -target_sources(CMSISDSPFastMath PRIVATE arm_vlog_f64.c) -target_sources(CMSISDSPFastMath PRIVATE arm_vexp_f32.c) -target_sources(CMSISDSPFastMath PRIVATE arm_vexp_f64.c) - -target_sources(CMSISDSPFastMath PRIVATE arm_vlog_q31.c) -target_sources(CMSISDSPFastMath PRIVATE arm_vlog_q15.c) - - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPFastMath PRIVATE arm_vlog_f16.c) -target_sources(CMSISDSPFastMath PRIVATE arm_vexp_f16.c) -target_sources(CMSISDSPFastMath PRIVATE arm_vinverse_f16.c) -target_sources(CMSISDSPFastMath PRIVATE arm_atan2_f16.c) -endif() - -target_sources(CMSISDSPFastMath PRIVATE arm_divide_q15.c) -target_sources(CMSISDSPFastMath PRIVATE arm_divide_q31.c) - -target_sources(CMSISDSPFastMath PRIVATE arm_atan2_f32.c) -target_sources(CMSISDSPFastMath PRIVATE arm_atan2_q31.c) -target_sources(CMSISDSPFastMath PRIVATE arm_atan2_q15.c) - - -### Includes -target_include_directories(CMSISDSPFastMath PUBLIC "${DSP}/Include") - - - diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c deleted file mode 100644 index bbf5021..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: FastMathFunctions.c - * Description: Combination of all fast math function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32) -#include "arm_cos_f32.c" -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15) -#include "arm_cos_q15.c" -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31) -#include "arm_cos_q31.c" -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32) -#include "arm_sin_f32.c" -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15) -#include "arm_sin_q15.c" -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31) -#include "arm_sin_q31.c" -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q31) -#include "arm_sqrt_q31.c" -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q15) -#include "arm_sqrt_q15.c" -#endif - -#endif - -#include "arm_vexp_f32.c" -#include "arm_vexp_f64.c" -#include "arm_vlog_f32.c" -#include "arm_vlog_f64.c" -#include "arm_divide_q15.c" -#include "arm_divide_q31.c" -#include "arm_vlog_q31.c" -#include "arm_vlog_q15.c" -#include "arm_atan2_f32.c" -#include "arm_atan2_q31.c" -#include "arm_atan2_q15.c" diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c deleted file mode 100644 index dd76ed8..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c +++ /dev/null @@ -1,32 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: FastMathFunctions.c - * Description: Combination of all fast math function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_vexp_f16.c" -#include "arm_vlog_f16.c" -#include "arm_vinverse_f16.c" -#include "arm_atan2_f16.c" diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_f16.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_f16.c deleted file mode 100644 index 819d6a0..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_f16.c +++ /dev/null @@ -1,171 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_atan2_f16.c - * Description: float16 Arc tangent of y/x - * - * $Date: 22 April 2022 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2022 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/* - -atan for argument between in [0, 1.0] - - -*/ - -#define PIF16 3.14f16 -#define PI16HALF 1.571f16 - -#define ATANHALFF16 0.463648f16 - -#define ATAN2_NB_COEFS_F16 5 - -static const float16_t atan2_coefs_f16[ATAN2_NB_COEFS_F16]={0.f16 -,1.f16 -,0.f16 -,-0.367f16 -,0.152f16 -}; - -__STATIC_FORCEINLINE float16_t arm_atan_limited_f16(float16_t x) -{ - float16_t res=atan2_coefs_f16[ATAN2_NB_COEFS_F16-1]; - int i=1; - for(i=1;i 1.0f16) - { - x = 1.0f16 / (_Float16)x; - res = (_Float16)PI16HALF - (_Float16)arm_atan_limited_f16(x); - } - else - { - res += (_Float16)arm_atan_limited_f16(x); - } - - - if (sign) - { - res = -(_Float16)res; - } - - return(res); -} - -/** - @ingroup groupFastMath - */ - - -/** - @addtogroup atan2 - @{ - */ - -/** - @brief Arc Tangent of y/x using sign of y and x to get right quadrant - @param[in] y y coordinate - @param[in] x x coordinate - @param[out] result Result - @return error status. - - @par Compute the Arc tangent of y/x: - The sign of y and x are used to determine the right quadrant - and compute the right angle. - -*/ -arm_status arm_atan2_f16(float16_t y,float16_t x,float16_t *result) -{ - if ((_Float16)x > 0.0f16) - { - *result=arm_atan_f16((_Float16)y/(_Float16)x); - return(ARM_MATH_SUCCESS); - } - if ((_Float16)x < 0.0f16) - { - if ((_Float16)y > 0.0f16) - { - *result=(_Float16)arm_atan_f16((_Float16)y/(_Float16)x) + (_Float16)PIF16; - } - else if ((_Float16)y < 0.0f16) - { - *result=(_Float16)arm_atan_f16((_Float16)y/(_Float16)x) - (_Float16)PIF16; - } - else - { - if (signbit(y)) - { - *result= -(_Float16)PIF16; - } - else - { - *result= PIF16; - } - } - return(ARM_MATH_SUCCESS); - } - if ((_Float16)x == 0.0f16) - { - if ((_Float16)y > 0.0f16) - { - *result=PI16HALF; - return(ARM_MATH_SUCCESS); - } - if ((_Float16)y < 0.0f16) - { - *result=-(_Float16)PI16HALF; - return(ARM_MATH_SUCCESS); - } - } - - - return(ARM_MATH_NANINF); - -} - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ -/** - @} end of atan2 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_f32.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_f32.c deleted file mode 100644 index 2465414..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_f32.c +++ /dev/null @@ -1,183 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_atan2_f32.c - * Description: float32 Arc tangent of y/x - * - * $Date: 22 April 2022 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2022 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" - -/* - -atan for argument between in [0, 1.0] - - -*/ - -#define ATANHALFF32 0.463648f -#define PIHALFF32 1.5707963267948966192313f - -#define ATAN2_NB_COEFS_F32 10 - -static const float32_t atan2_coefs_f32[ATAN2_NB_COEFS_F32]={0.0f -,1.0000001638308195518f -,-0.0000228941363602264f -,-0.3328086544578890873f -,-0.004404814619311061f -,0.2162217461808173258f -,-0.0207504842057097504f -,-0.1745263362250363339f -,0.1340557235283553386f -,-0.0323664125927477625f -}; - -__STATIC_FORCEINLINE float32_t arm_atan_limited_f32(float32_t x) -{ - float32_t res=atan2_coefs_f32[ATAN2_NB_COEFS_F32-1]; - int i=1; - for(i=1;i 1.0f) - { - x = 1.0f / x; - res = PIHALFF32 - arm_atan_limited_f32(x); - } - else - { - res += arm_atan_limited_f32(x); - } - - - if (sign) - { - res = -res; - } - - return(res); -} - - -/** - @ingroup groupFastMath - */ - -/** - @defgroup atan2 ArcTan2 - - Computing Arc tangent only using the ratio y/x is not enough to determine the angle - since there is an indeterminacy. Opposite quadrants are giving the same ratio. - - ArcTan2 is not using y/x to compute the angle but y and x and use the sign of y and x - to determine the quadrant. - - */ - -/** - @addtogroup atan2 - @{ - */ - -/** - @brief Arc Tangent of y/x using sign of y and x to get right quadrant - @param[in] y y coordinate - @param[in] x x coordinate - @param[out] result Result - @return error status. - - @par Compute the Arc tangent of y/x: - The sign of y and x are used to determine the right quadrant - and compute the right angle. -*/ - - -arm_status arm_atan2_f32(float32_t y,float32_t x,float32_t *result) -{ - if (x > 0.0f) - { - *result=arm_atan_f32(y/x); - return(ARM_MATH_SUCCESS); - } - if (x < 0.0f) - { - if (y > 0.0f) - { - *result=arm_atan_f32(y/x) + PI; - } - else if (y < 0.0f) - { - *result=arm_atan_f32(y/x) - PI; - } - else - { - if (signbit(y)) - { - *result= -PI; - } - else - { - *result= PI; - } - } - return(ARM_MATH_SUCCESS); - } - if (x == 0.0f) - { - if (y > 0.0f) - { - *result=PIHALFF32; - return(ARM_MATH_SUCCESS); - } - if (y < 0.0f) - { - *result=-PIHALFF32; - return(ARM_MATH_SUCCESS); - } - } - - - return(ARM_MATH_NANINF); - -} - -/** - @} end of atan2 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_q15.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_q15.c deleted file mode 100644 index d9584cb..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_q15.c +++ /dev/null @@ -1,201 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_atan2_q15.c - * Description: float32 Arc tangent of y/x - * - * $Date: 22 April 2022 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2022 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "dsp/utils.h" - -/* - -atan for argument between in [0, 1.0] - -*/ - - -/* Q2.13 */ -#define ATANHALFQ13 0xed6 -#define PIHALFQ13 0x3244 -#define PIQ13 0x6488 - -#define ATAN2_NB_COEFS_Q15 10 - -static const q15_t atan2_coefs_q15[ATAN2_NB_COEFS_Q15]={0x0000 -,0x7fff -,0xffff -,0xd567 -,0xff70 -,0x1bad -,0xfd58 -,0xe9a9 -,0x1129 -,0xfbdb -}; - -__STATIC_FORCEINLINE q15_t arm_atan_limited_q15(q15_t x) -{ - q31_t res=(q31_t)atan2_coefs_q15[ATAN2_NB_COEFS_Q15-1]; - int i=1; - for(i=1;i> 15U; - res = res + ((q31_t) atan2_coefs_q15[ATAN2_NB_COEFS_Q15-1-i]) ; - } - - res = __SSAT(res>>2,16); - - - return(res); -} - - -__STATIC_FORCEINLINE q15_t arm_atan_q15(q15_t y,q15_t x) -{ - int sign=0; - q15_t res=0; - - if (y<0) - { - arm_negate_q15(&y,&y,1); - sign=1-sign; - } - - if (x < 0) - { - sign=1 - sign; - arm_negate_q15(&x,&x,1); - } - - if (y > x) - { - q15_t ratio; - int16_t shift; - - arm_divide_q15(x,y,&ratio,&shift); - - arm_shift_q15(&ratio,shift,&ratio,1); - - res = PIHALFQ13 - arm_atan_limited_q15(ratio); - - } - else - { - q15_t ratio; - int16_t shift; - - arm_divide_q15(y,x,&ratio,&shift); - - arm_shift_q15(&ratio,shift,&ratio,1); - - res = arm_atan_limited_q15(ratio); - - } - - - if (sign) - { - arm_negate_q15(&res,&res,1); - } - - return(res); -} - - -/** - @ingroup groupFastMath - */ - - -/** - @addtogroup atan2 - @{ - */ - -/** - @brief Arc Tangent of y/x using sign of y and x to get right quadrant - @param[in] y y coordinate - @param[in] x x coordinate - @param[out] result Result in Q2.13 - @return error status. - - @par Compute the Arc tangent of y/x: - The sign of y and x are used to determine the right quadrant - and compute the right angle. -*/ - - -arm_status arm_atan2_q15(q15_t y,q15_t x,q15_t *result) -{ - if (x > 0) - { - *result=arm_atan_q15(y,x); - return(ARM_MATH_SUCCESS); - } - if (x < 0) - { - if (y > 0) - { - *result=arm_atan_q15(y,x) + PIQ13; - } - else if (y < 0) - { - *result=arm_atan_q15(y,x) - PIQ13; - } - else - { - if (y<0) - { - *result= -PIQ13; - } - else - { - *result= PIQ13; - } - } - return(ARM_MATH_SUCCESS); - } - if (x == 0) - { - if (y > 0) - { - *result=PIHALFQ13; - return(ARM_MATH_SUCCESS); - } - if (y < 0) - { - *result=-PIHALFQ13; - return(ARM_MATH_SUCCESS); - } - } - - - return(ARM_MATH_NANINF); - -} - -/** - @} end of atan2 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_q31.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_q31.c deleted file mode 100644 index 2c8b4c6..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_atan2_q31.c +++ /dev/null @@ -1,202 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_atan2_q31.c - * Description: float32 Arc tangent of y/x - * - * $Date: 22 April 2022 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2022 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "dsp/utils.h" - -/* - -atan for argument between in [0, 1.0] - -*/ - - -/* Q2.29 */ -#define ATANHALF_Q29 0xed63383 -#define PIHALF_Q29 0x3243f6a9 -#define PIQ29 0x6487ed51 - -#define ATAN2_NB_COEFS_Q31 13 - -static const q31_t atan2_coefs_q31[ATAN2_NB_COEFS_Q31]={0x00000000 -,0x7ffffffe -,0x000001b6 -,0xd555158e -,0x00036463 -,0x1985f617 -,0x001992ae -,0xeed53a7f -,0xf8f15245 -,0x2215a3a4 -,0xe0fab004 -,0x0cdd4825 -,0xfddbc054 -}; - - -__STATIC_FORCEINLINE q31_t arm_atan_limited_q31(q31_t x) -{ - q63_t res=(q63_t)atan2_coefs_q31[ATAN2_NB_COEFS_Q31-1]; - int i=1; - for(i=1;i> 31U; - res = res + ((q63_t) atan2_coefs_q31[ATAN2_NB_COEFS_Q31-1-i]) ; - } - - return(clip_q63_to_q31(res>>2)); -} - - -__STATIC_FORCEINLINE q31_t arm_atan_q31(q31_t y,q31_t x) -{ - int sign=0; - q31_t res=0; - - if (y<0) - { - arm_negate_q31(&y,&y,1); - sign=1-sign; - } - - if (x < 0) - { - sign=1 - sign; - arm_negate_q31(&x,&x,1); - } - - if (y > x) - { - q31_t ratio; - int16_t shift; - - arm_divide_q31(x,y,&ratio,&shift); - - arm_shift_q31(&ratio,shift,&ratio,1); - - res = PIHALF_Q29 - arm_atan_limited_q31(ratio); - - } - else - { - q31_t ratio; - int16_t shift; - - arm_divide_q31(y,x,&ratio,&shift); - - arm_shift_q31(&ratio,shift,&ratio,1); - - res = arm_atan_limited_q31(ratio); - - } - - - if (sign) - { - arm_negate_q31(&res,&res,1); - } - - return(res); -} - - -/** - @ingroup groupFastMath - */ - - -/** - @addtogroup atan2 - @{ - */ - -/** - @brief Arc Tangent of y/x using sign of y and x to get right quadrant - @param[in] y y coordinate - @param[in] x x coordinate - @param[out] result Result in Q2.29 - @return error status. - - @par Compute the Arc tangent of y/x: - The sign of y and x are used to determine the right quadrant - and compute the right angle. -*/ - - -arm_status arm_atan2_q31(q31_t y,q31_t x,q31_t *result) -{ - if (x > 0) - { - *result=arm_atan_q31(y,x); - return(ARM_MATH_SUCCESS); - } - if (x < 0) - { - if (y > 0) - { - *result=arm_atan_q31(y,x) + PIQ29; - } - else if (y < 0) - { - *result=arm_atan_q31(y,x) - PIQ29; - } - else - { - if (y<0) - { - *result= -PIQ29; - } - else - { - *result= PIQ29; - } - } - return(ARM_MATH_SUCCESS); - } - if (x == 0) - { - if (y > 0) - { - *result=PIHALF_Q29; - return(ARM_MATH_SUCCESS); - } - if (y < 0) - { - *result=-PIHALF_Q29; - return(ARM_MATH_SUCCESS); - } - } - - - return(ARM_MATH_NANINF); - -} - -/** - @} end of atan2 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c deleted file mode 100644 index 5f85e42..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c +++ /dev/null @@ -1,121 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cos_f32.c - * Description: Fast cosine calculation for floating-point values - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupFastMath - */ - -/** - @defgroup cos Cosine - - Computes the trigonometric cosine function using a combination of table lookup - and linear interpolation. There are separate functions for - Q15, Q31, and floating-point data types. - The input to the floating-point version is in radians while the - fixed-point Q15 and Q31 have a scaled input with the range - [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a - value of 2*pi wraps around to 0. - - The implementation is based on table lookup using 512 values together with linear interpolation. - The steps used are: - -# Calculation of the nearest integer table index - -# Compute the fractional portion (fract) of the table index. - -# The final result equals (1.0f-fract)*a + fract*b; - - where - 
-     a = Table[index];
-     b = Table[index+1];
-
- */ - -/** - @addtogroup cos - @{ - */ - -/** - @brief Fast approximation to the trigonometric cosine function for floating-point data. - @param[in] x input value in radians - @return cos(x) - */ -float32_t arm_cos_f32( - float32_t x) -{ - float32_t cosVal, fract, in; /* Temporary input, output variables */ - uint16_t index; /* Index variable */ - float32_t a, b; /* Two nearest output values */ - int32_t n; - float32_t findex; - - /* input x is in radians */ - /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine table */ - in = x * 0.159154943092f + 0.25f; - - /* Calculation of floor value of input */ - n = (int32_t) in; - - /* Make negative values towards -infinity */ - if (in < 0.0f) - { - n--; - } - - /* Map input value to [0 1] */ - in = in - (float32_t) n; - - /* Calculation of index of the table */ - findex = (float32_t)FAST_MATH_TABLE_SIZE * in; - index = (uint16_t)findex; - - /* when "in" is exactly 1, we need to rotate the index down to 0 */ - if (index >= FAST_MATH_TABLE_SIZE) { - index = 0; - findex -= (float32_t)FAST_MATH_TABLE_SIZE; - } - - /* fractional value calculation */ - fract = findex - (float32_t) index; - - /* Read two nearest values of input value from the cos table */ - a = sinTable_f32[index]; - b = sinTable_f32[index+1]; - - /* Linear interpolation process */ - cosVal = (1.0f - fract) * a + fract * b; - - /* Return output value */ - return (cosVal); -} - -/** - @} end of cos group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c deleted file mode 100644 index f7c25bb..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c +++ /dev/null @@ -1,84 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cos_q15.c - * Description: Fast cosine calculation for Q15 values - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupFastMath - */ - -/** - @addtogroup cos - @{ - */ - -/** - @brief Fast approximation to the trigonometric cosine function for Q15 data. - @param[in] x Scaled input value in radians - @return cos(x) - - The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI). - */ - -q15_t arm_cos_q15( - q15_t x) -{ - q15_t cosVal; /* Temporary input, output variables */ - int32_t index; /* Index variable */ - q15_t a, b; /* Two nearest output values */ - q15_t fract; /* Temporary values for fractional values */ - - /* add 0.25 (pi/2) to read sine table */ - x = (uint16_t)x + 0x2000; - if (x < 0) - { /* convert negative numbers to corresponding positive ones */ - x = (uint16_t)x + 0x8000; - } - - /* Calculate the nearest index */ - index = (uint32_t)x >> FAST_MATH_Q15_SHIFT; - - /* Calculation of fractional value */ - fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9; - - /* Read two nearest values of input value from the sin table */ - a = sinTable_q15[index]; - b = sinTable_q15[index+1]; - - /* Linear interpolation process */ - cosVal = (q31_t) (0x8000 - fract) * a >> 16; - cosVal = (q15_t) ((((q31_t) cosVal << 16) + ((q31_t) fract * b)) >> 16); - - /* Return output value */ - return (cosVal << 1); -} - -/** - @} end of cos group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c deleted file mode 100644 index 3978e3e..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c +++ /dev/null @@ -1,84 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cos_q31.c - * Description: Fast cosine calculation for Q31 values - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupFastMath - */ - -/** - @addtogroup cos - @{ - */ - -/** - @brief Fast approximation to the trigonometric cosine function for Q31 data. - @param[in] x Scaled input value in radians - @return cos(x) - - The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI). - */ - -q31_t arm_cos_q31( - q31_t x) -{ - q31_t cosVal; /* Temporary input, output variables */ - int32_t index; /* Index variable */ - q31_t a, b; /* Two nearest output values */ - q31_t fract; /* Temporary values for fractional values */ - - /* add 0.25 (pi/2) to read sine table */ - x = (uint32_t)x + 0x20000000; - if (x < 0) - { /* convert negative numbers to corresponding positive ones */ - x = (uint32_t)x + 0x80000000; - } - - /* Calculate the nearest index */ - index = (uint32_t)x >> FAST_MATH_Q31_SHIFT; - - /* Calculation of fractional value */ - fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9; - - /* Read two nearest values of input value from the sin table */ - a = sinTable_q31[index]; - b = sinTable_q31[index+1]; - - /* Linear interpolation process */ - cosVal = (q63_t) (0x80000000 - fract) * a >> 32; - cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) fract * b)) >> 32); - - /* Return output value */ - return (cosVal << 1); -} - -/** - @} end of cos group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q15.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q15.c deleted file mode 100644 index 6f2ec46..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q15.c +++ /dev/null @@ -1,110 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cos_q15.c - * Description: Fast cosine calculation for Q15 values - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -#include - -/** - @ingroup groupFastMath - */ - -/** - @defgroup divide Fixed point division - - */ - -/** - @addtogroup divide - @{ - */ - -/** - @brief Fixed point division - @param[in] numerator Numerator - @param[in] denominator Denominator - @param[out] quotient Quotient value normalized between -1.0 and 1.0 - @param[out] shift Shift left value to get the unnormalized quotient - @return error status - - When dividing by 0, an error ARM_MATH_NANINF is returned. And the quotient is forced - to the saturated negative or positive value. - */ - -arm_status arm_divide_q15(q15_t numerator, - q15_t denominator, - q15_t *quotient, - int16_t *shift) -{ - int16_t sign=0; - q31_t temp; - int16_t shiftForNormalizing; - - *shift = 0; - - sign = (numerator>>15) ^ (denominator>>15); - - if (denominator == 0) - { - if (sign) - { - *quotient = 0x8000; - } - else - { - *quotient = 0x7FFF; - } - return(ARM_MATH_NANINF); - } - - arm_abs_q15(&numerator,&numerator,1); - arm_abs_q15(&denominator,&denominator,1); - - temp = ((q31_t)numerator << 15) / ((q31_t)denominator); - - shiftForNormalizing= 17 - __CLZ(temp); - if (shiftForNormalizing > 0) - { - *shift = shiftForNormalizing; - temp = temp >> shiftForNormalizing; - } - - if (sign) - { - temp = -temp; - } - - *quotient=temp; - - return(ARM_MATH_SUCCESS); -} - -/** - @} end of divide group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q31.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q31.c deleted file mode 100644 index 98bd99a..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q31.c +++ /dev/null @@ -1,110 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cos_q31.c - * Description: Fast cosine calculation for Q31 values - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -#include - -/** - @ingroup groupFastMath - */ - -/** - @defgroup divide Fixed point division - - */ - -/** - @addtogroup divide - @{ - */ - -/** - @brief Fixed point division - @param[in] numerator Numerator - @param[in] denominator Denominator - @param[out] quotient Quotient value normalized between -1.0 and 1.0 - @param[out] shift Shift left value to get the unnormalized quotient - @return error status - - When dividing by 0, an error ARM_MATH_NANINF is returned. And the quotient is forced - to the saturated negative or positive value. - */ - -arm_status arm_divide_q31(q31_t numerator, - q31_t denominator, - q31_t *quotient, - int16_t *shift) -{ - int16_t sign=0; - q63_t temp; - int16_t shiftForNormalizing; - - *shift = 0; - - sign = (numerator>>31) ^ (denominator>>31); - - if (denominator == 0) - { - if (sign) - { - *quotient = 0x80000000; - } - else - { - *quotient = 0x7FFFFFFF; - } - return(ARM_MATH_NANINF); - } - - arm_abs_q31(&numerator,&numerator,1); - arm_abs_q31(&denominator,&denominator,1); - - temp = ((q63_t)numerator << 31) / ((q63_t)denominator); - - shiftForNormalizing= 32 - __CLZ(temp >> 31); - if (shiftForNormalizing > 0) - { - *shift = shiftForNormalizing; - temp = temp >> shiftForNormalizing; - } - - if (sign) - { - temp = -temp; - } - - *quotient=(q31_t)temp; - - return(ARM_MATH_SUCCESS); -} - -/** - @} end of divide group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c deleted file mode 100644 index 3c68f19..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c +++ /dev/null @@ -1,122 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sin_f32.c - * Description: Fast sine calculation for floating-point values - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupFastMath - */ - -/** - @defgroup sin Sine - - Computes the trigonometric sine function using a combination of table lookup - and linear interpolation. There are separate functions for - Q15, Q31, and floating-point data types. - The input to the floating-point version is in radians while the - fixed-point Q15 and Q31 have a scaled input with the range - [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a - value of 2*pi wraps around to 0. - - The implementation is based on table lookup using 512 values together with linear interpolation. - The steps used are: - -# Calculation of the nearest integer table index - -# Compute the fractional portion (fract) of the table index. - -# The final result equals (1.0f-fract)*a + fract*b; - - where - 
-     b = Table[index];
-     c = Table[index+1];
-
- */ - -/** - @addtogroup sin - @{ - */ - -/** - @brief Fast approximation to the trigonometric sine function for floating-point data. - @param[in] x input value in radians. - @return sin(x) - */ - -float32_t arm_sin_f32( - float32_t x) -{ - float32_t sinVal, fract, in; /* Temporary input, output variables */ - uint16_t index; /* Index variable */ - float32_t a, b; /* Two nearest output values */ - int32_t n; - float32_t findex; - - /* input x is in radians */ - /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi */ - in = x * 0.159154943092f; - - /* Calculation of floor value of input */ - n = (int32_t) in; - - /* Make negative values towards -infinity */ - if (in < 0.0f) - { - n--; - } - - /* Map input value to [0 1] */ - in = in - (float32_t) n; - - /* Calculation of index of the table */ - findex = (float32_t)FAST_MATH_TABLE_SIZE * in; - index = (uint16_t)findex; - - /* when "in" is exactly 1, we need to rotate the index down to 0 */ - if (index >= FAST_MATH_TABLE_SIZE) { - index = 0; - findex -= (float32_t)FAST_MATH_TABLE_SIZE; - } - - /* fractional value calculation */ - fract = findex - (float32_t) index; - - /* Read two nearest values of input value from the sin table */ - a = sinTable_f32[index]; - b = sinTable_f32[index+1]; - - /* Linear interpolation process */ - sinVal = (1.0f - fract) * a + fract * b; - - /* Return output value */ - return (sinVal); -} - -/** - @} end of sin group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c deleted file mode 100644 index af2a18a..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c +++ /dev/null @@ -1,83 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sin_q15.c - * Description: Fast sine calculation for Q15 values - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupFastMath - */ - -/** - @addtogroup sin - @{ - */ - -/** - @brief Fast approximation to the trigonometric sine function for Q15 data. - @param[in] x Scaled input value in radians - @return sin(x) - - The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI). - */ - -q15_t arm_sin_q15( - q15_t x) -{ - q15_t sinVal; /* Temporary input, output variables */ - int32_t index; /* Index variable */ - q15_t a, b; /* Two nearest output values */ - q15_t fract; /* Temporary values for fractional values */ - - - if (x < 0) - { /* convert negative numbers to corresponding positive ones */ - x = (uint16_t)x + 0x8000; - } - - /* Calculate the nearest index */ - index = (uint32_t)x >> FAST_MATH_Q15_SHIFT; - - /* Calculation of fractional value */ - fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9; - - /* Read two nearest values of input value from the sin table */ - a = sinTable_q15[index]; - b = sinTable_q15[index+1]; - - /* Linear interpolation process */ - sinVal = (q31_t) (0x8000 - fract) * a >> 16; - sinVal = (q15_t) ((((q31_t) sinVal << 16) + ((q31_t) fract * b)) >> 16); - - /* Return output value */ - return (sinVal << 1); -} - -/** - @} end of sin group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c deleted file mode 100644 index 2016fdd..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c +++ /dev/null @@ -1,82 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sin_q31.c - * Description: Fast sine calculation for Q31 values - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupFastMath - */ - -/** - @addtogroup sin - @{ - */ - -/** - @brief Fast approximation to the trigonometric sine function for Q31 data. - @param[in] x Scaled input value in radians - @return sin(x) - - The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI). - */ - -q31_t arm_sin_q31( - q31_t x) -{ - q31_t sinVal; /* Temporary variables for input, output */ - int32_t index; /* Index variable */ - q31_t a, b; /* Two nearest output values */ - q31_t fract; /* Temporary values for fractional values */ - - if (x < 0) - { /* convert negative numbers to corresponding positive ones */ - x = (uint32_t)x + 0x80000000; - } - - /* Calculate the nearest index */ - index = (uint32_t)x >> FAST_MATH_Q31_SHIFT; - - /* Calculation of fractional value */ - fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9; - - /* Read two nearest values of input value from the sin table */ - a = sinTable_q31[index]; - b = sinTable_q31[index+1]; - - /* Linear interpolation process */ - sinVal = (q63_t) (0x80000000 - fract) * a >> 32; - sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) fract * b)) >> 32); - - /* Return output value */ - return (sinVal << 1); -} - -/** - @} end of sin group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c deleted file mode 100644 index 7c1cc3d..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c +++ /dev/null @@ -1,123 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sqrt_q15.c - * Description: Q15 square root function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupFastMath - */ - -/** - @addtogroup SQRT - @{ - */ - -/** - @brief Q15 square root function. - @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF - @param[out] pOut points to square root of input value - @return execution status - - \ref ARM_MATH_SUCCESS : input value is positive - - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0 - */ - -#define Q12QUARTER 0x2000 -arm_status arm_sqrt_q15( - q15_t in, - q15_t * pOut) -{ - q15_t number, var1, signBits1,temp; - - number = in; - - /* If the input is a positive number then compute the signBits. */ - if (number > 0) - { - signBits1 = __CLZ(number) - 17; - - /* Shift by the number of signBits1 */ - if ((signBits1 % 2) == 0) - { - number = number << signBits1; - } - else - { - number = number << (signBits1 - 1); - } - /* Start value for 1/sqrt(x) for the Newton iteration */ - var1 = sqrt_initial_lut_q15[(number>> 11) - (Q12QUARTER >> 11)]; - - /* 0.5 var1 * (3 - number * var1 * var1) */ - /* 1st iteration */ - - temp = ((q31_t) var1 * var1) >> 12; - temp = ((q31_t) number * temp) >> 15; - temp = 0x3000 - temp; - var1 = ((q31_t) var1 * temp) >> 13; - - temp = ((q31_t) var1 * var1) >> 12; - temp = ((q31_t) number * temp) >> 15; - temp = 0x3000 - temp; - var1 = ((q31_t) var1 * temp) >> 13; - - temp = ((q31_t) var1 * var1) >> 12; - temp = ((q31_t) number * temp) >> 15; - temp = 0x3000 - temp; - var1 = ((q31_t) var1 * temp) >> 13; - - /* Multiply the inverse square root with the original value */ - - var1 = ((q15_t) (((q31_t) number * var1) >> 12)); - - /* Shift the output down accordingly */ - if ((signBits1 % 2) == 0) - { - var1 = var1 >> (signBits1 / 2); - } - else - { - var1 = var1 >> ((signBits1 - 1) / 2); - } - *pOut = var1; - - - return (ARM_MATH_SUCCESS); - } - /* If the number is a negative number then store zero as its square root value */ - else - { - *pOut = 0; - - return (ARM_MATH_ARGUMENT_ERROR); - } -} - -/** - @} end of SQRT group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c deleted file mode 100644 index 2621067..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c +++ /dev/null @@ -1,126 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sqrt_q31.c - * Description: Q31 square root function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupFastMath - */ - -/** - @addtogroup SQRT - @{ - */ - -/** - @brief Q31 square root function. - @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF - @param[out] pOut points to square root of input value - @return execution status - - \ref ARM_MATH_SUCCESS : input value is positive - - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0 - */ -#define Q28QUARTER 0x20000000 - -arm_status arm_sqrt_q31( - q31_t in, - q31_t * pOut) -{ - q31_t number, var1, signBits1 ,temp; - - number = in; - - /* If the input is a positive number then compute the signBits. */ - if (number > 0) - { - signBits1 = __CLZ(number) - 1; - - /* Shift by the number of signBits1 */ - if ((signBits1 % 2) == 0) - { - number = number << signBits1; - } - else - { - number = number << (signBits1 - 1); - } - - /* Start value for 1/sqrt(x) for the Newton iteration */ - var1 = sqrt_initial_lut_q31[(number>> 26) - (Q28QUARTER >> 26)]; - - /* 0.5 var1 * (3 - number * var1 * var1) */ - - /* 1st iteration */ - - temp = ((q63_t) var1 * var1) >> 28; - temp = ((q63_t) number * temp) >> 31; - temp = 0x30000000 - temp; - var1 = ((q63_t) var1 * temp) >> 29; - - - /* 2nd iteration */ - temp = ((q63_t) var1 * var1) >> 28; - temp = ((q63_t) number * temp) >> 31; - temp = 0x30000000 - temp; - var1 = ((q63_t) var1 * temp) >> 29; - - /* 3nd iteration */ - temp = ((q63_t) var1 * var1) >> 28; - temp = ((q63_t) number * temp) >> 31; - temp = 0x30000000 - temp; - var1 = ((q63_t) var1 * temp) >> 29; - - /* Multiply the inverse square root with the original value */ - var1 = ((q31_t) (((q63_t) number * var1) >> 28)); - - /* Shift the output down accordingly */ - if ((signBits1 % 2) == 0) - { - var1 = var1 >> (signBits1 / 2); - } - else - { - var1 = var1 >> ((signBits1 - 1) / 2); - } - *pOut = var1; - - return (ARM_MATH_SUCCESS); - } - /* If the number is a negative number then store zero as its square root value */ - else - { - *pOut = 0; - - return (ARM_MATH_ARGUMENT_ERROR); - } -} - -/** - @} end of SQRT group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f16.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f16.c deleted file mode 100644 index a5a64e6..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f16.c +++ /dev/null @@ -1,82 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_vlog_f16.c - * Description: Fast vectorized log - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include "arm_common_tables.h" - -#include "arm_vec_math_f16.h" - - -void arm_vexp_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - - f16x8_t src; - f16x8_t dst; - - blkCnt = blockSize >> 3; - - while (blkCnt > 0U) - { - src = vld1q(pSrc); - dst = vexpq_f16(src); - vst1q(pDst, dst); - - pSrc += 8; - pDst += 8; - /* Decrement loop counter */ - blkCnt--; - } - - blkCnt = blockSize & 7; -#else - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - /* C = log(A) */ - - /* Calculate log and store result in destination buffer. */ - *pDst++ = (_Float16)expf((float32_t)*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } -} - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c deleted file mode 100644 index 1286fb5..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c +++ /dev/null @@ -1,97 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_vlog_f32.c - * Description: Fast vectorized log - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM) || defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_vec_math.h" -#endif - -void arm_vexp_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t src; - f32x4_t dst; - - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - src = vld1q(pSrc); - dst = vexpq_f32(src); - vst1q(pDst, dst); - - pSrc += 4; - pDst += 4; - /* Decrement loop counter */ - blkCnt--; - } - - blkCnt = blockSize & 3; -#else -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t src; - f32x4_t dst; - - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - src = vld1q_f32(pSrc); - dst = vexpq_f32(src); - vst1q_f32(pDst, dst); - - pSrc += 4; - pDst += 4; - /* Decrement loop counter */ - blkCnt--; - } - - blkCnt = blockSize & 3; -#else - blkCnt = blockSize; -#endif -#endif - - while (blkCnt > 0U) - { - /* C = log(A) */ - - /* Calculate log and store result in destination buffer. */ - *pDst++ = expf(*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } -} diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f64.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f64.c deleted file mode 100644 index dc50c3c..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f64.c +++ /dev/null @@ -1,51 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_vlog_f64.c - * Description: Fast vectorized log - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -void arm_vexp_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = log(A) */ - - /* Calculate log and store result in destination buffer. */ - *pDst++ = exp(*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } -} diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vinverse_f16.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vinverse_f16.c deleted file mode 100644 index 5d70ee8..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vinverse_f16.c +++ /dev/null @@ -1,79 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_vinverse_f16.c - * Description: Fast vectorized inverse - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include "arm_common_tables.h" - -#include "arm_vec_math_f16.h" - -void arm_vinverse_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - - f16x8_t src; - f16x8_t dst; - - blkCnt = blockSize >> 3; - - while (blkCnt > 0U) - { - src = vld1q(pSrc); - dst = vrecip_hiprec_f16(src); - vst1q(pDst, dst); - - pSrc += 8; - pDst += 8; - /* Decrement loop counter */ - blkCnt--; - } - - blkCnt = blockSize & 7; -#else - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - - *pDst++ = 1.0f16 / (_Float16)*pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } -} - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f16.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f16.c deleted file mode 100644 index e759d7d..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f16.c +++ /dev/null @@ -1,222 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_vlog_f16.c - * Description: Fast vectorized log - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions_f16.h" -#include "dsp/support_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/* Degree of the polynomial approximation */ -#define NB_DEG_LOGF16 3 - -/* -Related to the Log2 of the number of approximations. -For instance, with 3 there are 1 + 2^3 polynomials -*/ -#define NB_DIV_LOGF16 3 - -/* Length of the LUT table */ -#define NB_LUT_LOGF16 (NB_DEG_LOGF16+1)*(1 + (1< 1000][[2, 1]], {i, 1, 2, (1.0/2^nb)}]; -coefs = Chop@Flatten[CoefficientList[lut, x]]; - -*/ -static float16_t lut_logf16[NB_LUT_LOGF16]={ - 0,0.125,-0.00781197,0.00063974,0.117783, - 0.111111,-0.00617212,0.000447935,0.223144, - 0.1,-0.00499952,0.000327193,0.318454,0.0909091, - -0.00413191,0.000246234,0.405465,0.0833333, - -0.00347199,0.000189928,0.485508,0.0769231, - -0.00295841,0.00014956,0.559616,0.0714286, - -0.0025509,0.000119868,0.628609,0.0666667, - -0.00222213,0.0000975436,0.693147, - 0.0625,-0.00195305,0.0000804357}; - - -float16_t logf16_scalar(float16_t x) -{ - int16_t i = arm_typecast_s16_f16(x); - - int32_t vecExpUnBiased = (i >> 10) - 15; - i = i - (vecExpUnBiased << 10); - float16_t vecTmpFlt1 = arm_typecast_f16_s16(i); - - float16_t *lut; - int n; - float16_t tmp,v; - - tmp = ((_Float16)vecTmpFlt1 - 1.0f16) * (1 << NB_DIV_LOGF16); - n = (int)floor((double)tmp); - v = (_Float16)tmp - (_Float16)n; - - lut = lut_logf16 + n * (1+NB_DEG_LOGF16); - - float16_t res = lut[NB_DEG_LOGF16-1]; - for(int j=NB_DEG_LOGF16-2; j >=0 ; j--) - { - res = (_Float16)lut[j] + (_Float16)v * (_Float16)res; - } - - res = (_Float16)res + 0.693147f16 * (_Float16)vecExpUnBiased; - - - return(res); -} - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_common_tables.h" -#include "arm_vec_math_f16.h" - - -float16x8_t vlogq_lut_f16(float16x8_t vecIn) -{ - int16x8_t i = vreinterpretq_s16_f16(vecIn); - - int16x8_t vecExpUnBiased = vsubq_n_s16(vshrq_n_s16(i,10), 15); - i = vsubq_s16(i,vshlq_n_s16(vecExpUnBiased,10)); - float16x8_t vecTmpFlt1 = vreinterpretq_f16_s16(i); - - - float16x8_t lutV; - int16x8_t n; - int16x8_t offset; - - float16x8_t tmp,v,res; - - tmp = vmulq_n_f16(vsubq_n_f16(vecTmpFlt1,1.0f16),(_Float16)(1 << NB_DIV_LOGF16)); - - n = vcvtq_s16_f16(tmp); - v = vsubq_f16(tmp,vcvtq_f16_s16(n)); - - - offset = vmulq_n_s16(n,(1+NB_DEG_LOGF16)); - offset = vaddq_n_s16(offset,NB_DEG_LOGF16-1); - - res = vldrhq_gather_shifted_offset_f16(lut_logf16,(uint16x8_t)offset); - offset = vsubq_n_s16(offset,1); - - for(int j=NB_DEG_LOGF16-2; j >=0 ; j--) - { - lutV = vldrhq_gather_shifted_offset_f16(lut_logf16,(uint16x8_t)offset); - res = vfmaq_f16(lutV,v,res); - offset = vsubq_n_s16(offset,1); - - } - - res = vfmaq_n_f16(res,vcvtq_f16_s16(vecExpUnBiased),0.693147f16); - - - return(res); - -} - -#endif - -/** - @ingroup groupFastMath - */ - -/** - @addtogroup vlog - @{ - */ - -/** - @brief Floating-point vector of log values. - @param[in] pSrc points to the input vector - @param[out] pDst points to the output vector - @param[in] blockSize number of samples in each vector - @return none - */ - - -void arm_vlog_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - f16x8_t src; - f16x8_t dst; - - blkCnt = blockSize >> 3; - - while (blkCnt > 0U) - { - src = vld1q(pSrc); - dst = vlogq_lut_f16(src); - vst1q(pDst, dst); - - pSrc += 8; - pDst += 8; - /* Decrement loop counter */ - blkCnt--; - } - - blkCnt = blockSize & 7; -#else - blkCnt = blockSize; -#endif - - while (blkCnt > 0U) - { - /* C = log(A) */ - - /* Calculate log and store result in destination buffer. */ - *pDst++ = logf16_scalar(*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } -} - - - -/** - @} end of vlog group - */ - - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c deleted file mode 100644 index 7e42639..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c +++ /dev/null @@ -1,119 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_vlog_f32.c - * Description: Fast vectorized log - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - - -/** - @ingroup groupFastMath - */ - - -/** - @defgroup vlog Vector Log - - Compute the log values of a vector of samples. - - */ - -/** - @addtogroup vlog - @{ - */ - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM) || defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_vec_math.h" -#endif - -void arm_vlog_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - -#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t src; - f32x4_t dst; - - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - src = vld1q(pSrc); - dst = vlogq_f32(src); - vst1q(pDst, dst); - - pSrc += 4; - pDst += 4; - /* Decrement loop counter */ - blkCnt--; - } - - blkCnt = blockSize & 3; -#else -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) - f32x4_t src; - f32x4_t dst; - - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - src = vld1q_f32(pSrc); - dst = vlogq_f32(src); - vst1q_f32(pDst, dst); - - pSrc += 4; - pDst += 4; - /* Decrement loop counter */ - blkCnt--; - } - - blkCnt = blockSize & 3; -#else - blkCnt = blockSize; -#endif -#endif - - while (blkCnt > 0U) - { - /* C = log(A) */ - - /* Calculate log and store result in destination buffer. */ - *pDst++ = logf(*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } -} - -/** - @} end of vlog group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f64.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f64.c deleted file mode 100644 index 0e64a81..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f64.c +++ /dev/null @@ -1,51 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_vlog_f64.c - * Description: Fast vectorized log - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" -#include "arm_common_tables.h" - -void arm_vlog_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = log(A) */ - - /* Calculate log and store result in destination buffer. */ - *pDst++ = log(*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } -} diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q15.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q15.c deleted file mode 100644 index f09f669..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q15.c +++ /dev/null @@ -1,264 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_vlog_q15 - * Description: Q15 vector log - * - * $Date: 19 July 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#include "dsp/fast_math_functions.h" - - -#define LOG_Q15_ACCURACY 15 - -/* Bit to represent the normalization factor - It is Ceiling[Log2[LOG_Q15_ACCURACY]] of the previous value. - The Log2 algorithm is assuming that the value x is - 1 <= x < 2. - - But input value could be as small a 2^-LOG_Q15_ACCURACY - which would give an integer part of -15. -*/ -#define LOG_Q15_INTEGER_PART 4 - -/* 2.0 in q14 */ -#define LOQ_Q15_THRESHOLD (1u << LOG_Q15_ACCURACY) - -/* HALF */ -#define LOQ_Q15_Q16_HALF LOQ_Q15_THRESHOLD -#define LOQ_Q15_Q14_HALF (LOQ_Q15_Q16_HALF >> 2) - - -/* 1.0 / Log2[Exp[1]] in q15 */ -#define LOG_Q15_INVLOG2EXP 0x58b9u - - -/* Clay Turner algorithm */ -static uint16_t arm_scalar_log_q15(uint16_t src) -{ - int i; - - int16_t c = __CLZ(src)-16; - int16_t normalization=0; - - /* 0.5 in q11 */ - uint16_t inc = LOQ_Q15_Q16_HALF >> (LOG_Q15_INTEGER_PART + 1); - - /* Will compute y = log2(x) for 1 <= x < 2.0 */ - uint16_t x; - - /* q11 */ - uint16_t y=0; - - /* q11 */ - int16_t tmp; - - - /* Normalize and convert to q14 format */ - x = src; - if ((c-1) < 0) - { - x = x >> (1-c); - } - else - { - x = x << (c-1); - } - normalization = c; - - - - /* Compute the Log2. Result is in q11 instead of q16 - because we know 0 <= y < 1.0 but - we want a result allowing to do a - product on int16 rather than having to go - through int32 - */ - for(i = 0; i < LOG_Q15_ACCURACY ; i++) - { - x = (((int32_t)x*x)) >> (LOG_Q15_ACCURACY - 1); - - if (x >= LOQ_Q15_THRESHOLD) - { - y += inc ; - x = x >> 1; - } - inc = inc >> 1; - } - - - /* - Convert the Log2 to Log and apply normalization. - We compute (y - normalisation) * (1 / Log2[e]). - - */ - - /* q11 */ - //tmp = y - ((int32_t)normalization << (LOG_Q15_ACCURACY + 1)); - tmp = (int16_t)y - (normalization << (LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART)); - - /* q4.11 */ - y = ((int32_t)tmp * LOG_Q15_INVLOG2EXP) >> 15; - - return(y); - -} - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - - -q15x8_t vlogq_q15(q15x8_t src) -{ - - int i; - - int16x8_t c = vclzq_s16(src); - int16x8_t normalization = c; - - - /* 0.5 in q11 */ - uint16_t inc = LOQ_Q15_Q16_HALF >> (LOG_Q15_INTEGER_PART + 1); - - /* Will compute y = log2(x) for 1 <= x < 2.0 */ - uint16x8_t x; - - - /* q11 */ - uint16x8_t y = vdupq_n_u16(0); - - - /* q11 */ - int16x8_t vtmp; - - - mve_pred16_t p; - - /* Normalize and convert to q14 format */ - - - vtmp = vsubq_n_s16(c,1); - x = vshlq_u16((uint16x8_t)src,vtmp); - - - /* Compute the Log2. Result is in q11 instead of q16 - because we know 0 <= y < 1.0 but - we want a result allowing to do a - product on int16 rather than having to go - through int32 - */ - for(i = 0; i < LOG_Q15_ACCURACY ; i++) - { - x = vmulhq_u16(x,x); - x = vshlq_n_u16(x,2); - - - p = vcmphiq_u16(x,vdupq_n_u16(LOQ_Q15_THRESHOLD)); - y = vaddq_m_n_u16(y, y,inc,p); - x = vshrq_m_n_u16(x,x,1,p); - - inc = inc >> 1; - } - - - /* - Convert the Log2 to Log and apply normalization. - We compute (y - normalisation) * (1 / Log2[e]). - - */ - - /* q11 */ - // tmp = (int16_t)y - (normalization << (LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART)); - vtmp = vshlq_n_s16(normalization,LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART); - vtmp = vsubq_s16((int16x8_t)y,vtmp); - - - - /* q4.11 */ - // y = ((int32_t)tmp * LOG_Q15_INVLOG2EXP) >> 15; - vtmp = vqdmulhq_n_s16(vtmp,LOG_Q15_INVLOG2EXP); - - return(vtmp); -} -#endif - -/** - @ingroup groupFastMath - */ - -/** - @addtogroup vlog - @{ - */ - -/** - @brief q15 vector of log values. - @param[in] pSrc points to the input vector in q15 - @param[out] pDst points to the output vector in q4.11 - @param[in] blockSize number of samples in each vector - @return none - - */ - -void arm_vlog_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - q15x8_t src; - q15x8_t dst; - - blkCnt = blockSize >> 3; - - while (blkCnt > 0U) - { - src = vld1q(pSrc); - dst = vlogq_q15(src); - vst1q(pDst, dst); - - pSrc += 8; - pDst += 8; - /* Decrement loop counter */ - blkCnt--; - } - - blkCnt = blockSize & 7; - #else - blkCnt = blockSize; - #endif - - while (blkCnt > 0U) - { - *pDst++ = arm_scalar_log_q15(*pSrc++); - - /* Decrement loop counter */ - blkCnt--; - } -} - -/** - @} end of vlog group - */ diff --git a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q31.c b/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q31.c deleted file mode 100644 index 84c4667..0000000 --- a/Drivers/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q31.c +++ /dev/null @@ -1,258 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_vlog_q31 - * Description: Q31 vector log - * - * $Date: 19 July 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/fast_math_functions.h" - -#define LOG_Q31_ACCURACY 31 - -/* Bit to represent the normalization factor - It is Ceiling[Log2[LOG_Q31_ACCURACY]] of the previous value. - The Log2 algorithm is assuming that the value x is - 1 <= x < 2. - - But input value could be as small a 2^-LOG_Q31_ACCURACY - which would give an integer part of -31. -*/ -#define LOG_Q31_INTEGER_PART 5 - -/* 2.0 in Q30 */ -#define LOQ_Q31_THRESHOLD (1u << LOG_Q31_ACCURACY) - -/* HALF */ -#define LOQ_Q31_Q32_HALF LOQ_Q31_THRESHOLD -#define LOQ_Q31_Q30_HALF (LOQ_Q31_Q32_HALF >> 2) - - -/* 1.0 / Log2[Exp[1]] in Q31 */ -#define LOG_Q31_INVLOG2EXP 0x58b90bfbuL - -/* Clay Turner algorithm */ -static uint32_t arm_scalar_log_q31(uint32_t src) -{ - int32_t i; - - int32_t c = __CLZ(src); - int32_t normalization=0; - - /* 0.5 in q26 */ - uint32_t inc = LOQ_Q31_Q32_HALF >> (LOG_Q31_INTEGER_PART + 1); - - /* Will compute y = log2(x) for 1 <= x < 2.0 */ - uint32_t x; - - /* q26 */ - uint32_t y=0; - - /* q26 */ - int32_t tmp; - - - /* Normalize and convert to q30 format */ - x = src; - if ((c-1) < 0) - { - x = x >> (1-c); - } - else - { - x = x << (c-1); - } - normalization = c; - - /* Compute the Log2. Result is in q26 - because we know 0 <= y < 1.0 but - do not want to use q32 to allow - following computation with less instructions. - */ - for(i = 0; i < LOG_Q31_ACCURACY ; i++) - { - x = ((int64_t)x*x) >> (LOG_Q31_ACCURACY - 1); - - if (x >= LOQ_Q31_THRESHOLD) - { - y += inc ; - x = x >> 1; - } - inc = inc >> 1; - } - - /* - Convert the Log2 to Log and apply normalization. - We compute (y - normalisation) * (1 / Log2[e]). - - */ - - /* q26 */ - tmp = (int32_t)y - (normalization << (LOG_Q31_ACCURACY - LOG_Q31_INTEGER_PART)); - - - /* q5.26 */ - y = ((int64_t)tmp * LOG_Q31_INVLOG2EXP) >> 31; - - - - return(y); - -} - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - - -q31x4_t vlogq_q31(q31x4_t src) -{ - - int32_t i; - - int32x4_t c = vclzq_s32(src); - int32x4_t normalization = c; - - - /* 0.5 in q11 */ - uint32_t inc = LOQ_Q31_Q32_HALF >> (LOG_Q31_INTEGER_PART + 1); - - /* Will compute y = log2(x) for 1 <= x < 2.0 */ - uint32x4_t x; - - - /* q11 */ - uint32x4_t y = vdupq_n_u32(0); - - - /* q11 */ - int32x4_t vtmp; - - - mve_pred16_t p; - - /* Normalize and convert to q14 format */ - - - vtmp = vsubq_n_s32(c,1); - x = vshlq_u32((uint32x4_t)src,vtmp); - - - /* Compute the Log2. Result is in Q26 - because we know 0 <= y < 1.0 but - do not want to use Q32 to allow - following computation with less instructions. - */ - for(i = 0; i < LOG_Q31_ACCURACY ; i++) - { - x = vmulhq_u32(x,x); - x = vshlq_n_u32(x,2); - - - p = vcmphiq_u32(x,vdupq_n_u32(LOQ_Q31_THRESHOLD)); - y = vaddq_m_n_u32(y, y,inc,p); - x = vshrq_m_n_u32(x,x,1,p); - - inc = inc >> 1; - } - - - /* - Convert the Log2 to Log and apply normalization. - We compute (y - normalisation) * (1 / Log2[e]). - - */ - - /* q11 */ - // tmp = (int16_t)y - (normalization << (LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART)); - vtmp = vshlq_n_s32(normalization,LOG_Q31_ACCURACY - LOG_Q31_INTEGER_PART); - vtmp = vsubq_s32((int32x4_t)y,vtmp); - - - - /* q4.11 */ - // y = ((int32_t)tmp * LOG_Q15_INVLOG2EXP) >> 15; - vtmp = vqdmulhq_n_s32(vtmp,LOG_Q31_INVLOG2EXP); - - return(vtmp); -} -#endif - -/** - @ingroup groupFastMath - */ - -/** - @addtogroup vlog - @{ - */ - -/** - @brief q31 vector of log values. - @param[in] pSrc points to the input vector in q31 - @param[out] pDst points to the output vector q5.26 - @param[in] blockSize number of samples in each vector - @return none - - */ -void arm_vlog_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - - q31x4_t src; - q31x4_t dst; - - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - src = vld1q(pSrc); - dst = vlogq_q31(src); - vst1q(pDst, dst); - - pSrc += 4; - pDst += 4; - /* Decrement loop counter */ - blkCnt--; - } - - blkCnt = blockSize & 3; - #else - blkCnt = blockSize; - #endif - - while (blkCnt > 0U) - { - *pDst++=arm_scalar_log_q31(*pSrc++); - - blkCnt--; - } - -} - -/** - @} end of vlog group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/FilteringFunctions/CMakeLists.txt deleted file mode 100644 index eed0537..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/CMakeLists.txt +++ /dev/null @@ -1,148 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPFiltering) - -include(configLib) -include(configDsp) - -add_library(CMSISDSPFiltering STATIC) - -include(interpol) -interpol(CMSISDSPFiltering) - -configLib(CMSISDSPFiltering ${ROOT}) -configDsp(CMSISDSPFiltering ${ROOT}) - -if (CONFIGTABLE AND ALLFAST) -target_compile_definitions(CMSISDSPFiltering PUBLIC ARM_ALL_FAST_TABLES) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_LMS_NORM_Q31) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_q31.c) -endif() - -if (NOT CONFIGTABLE OR ALLFAST OR ARM_LMS_NORM_Q15) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_q15.c) -endif() - -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_32x64_init_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_32x64_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_fast_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_fast_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f64.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f64.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_opt_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_opt_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_opt_q7.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_opt_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_opt_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_opt_q7.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q7.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_conv_q7.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_f64.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_opt_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_opt_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_opt_q7.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q7.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_fast_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_fast_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_f64.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_fast_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_fast_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_f64.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q7.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_q7.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q7.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q7.c) -target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_q15.c) -target_sources(CMSISDSPFiltering PRIVATE arm_lms_q31.c) -target_sources(CMSISDSPFiltering PRIVATE arm_levinson_durbin_f32.c) -target_sources(CMSISDSPFiltering PRIVATE arm_levinson_durbin_q31.c) - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_f16.c) -target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_f16.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_f16.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_f16.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f16.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f16.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_f16.c) -target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_init_f16.c) -target_sources(CMSISDSPFiltering PRIVATE arm_correlate_f16.c) -target_sources(CMSISDSPFiltering PRIVATE arm_levinson_durbin_f16.c) -endif() - -### Includes -target_include_directories(CMSISDSPFiltering PUBLIC "${DSP}/Include") - - - diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c deleted file mode 100644 index c80a971..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c +++ /dev/null @@ -1,139 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: FilteringFunctions.c - * Description: Combination of all filtering function source files. - * - * $Date: 18. March 2019 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_biquad_cascade_df1_32x64_init_q31.c" -#include "arm_biquad_cascade_df1_32x64_q31.c" -#include "arm_biquad_cascade_df1_f32.c" -#include "arm_biquad_cascade_df1_fast_q15.c" -#include "arm_biquad_cascade_df1_fast_q31.c" -#include "arm_biquad_cascade_df1_init_f32.c" -#include "arm_biquad_cascade_df1_init_q15.c" -#include "arm_biquad_cascade_df1_init_q31.c" -#include "arm_biquad_cascade_df1_q15.c" -#include "arm_biquad_cascade_df1_q31.c" -#include "arm_biquad_cascade_df2T_f32.c" -#include "arm_biquad_cascade_df2T_f64.c" -#include "arm_biquad_cascade_df2T_init_f32.c" -#include "arm_biquad_cascade_df2T_init_f64.c" -#include "arm_biquad_cascade_stereo_df2T_f32.c" -#include "arm_biquad_cascade_stereo_df2T_init_f32.c" -#include "arm_conv_f32.c" -#include "arm_conv_fast_opt_q15.c" -#include "arm_conv_fast_q15.c" -#include "arm_conv_fast_q31.c" -#include "arm_conv_opt_q15.c" -#include "arm_conv_opt_q7.c" -#include "arm_conv_partial_f32.c" -#include "arm_conv_partial_fast_opt_q15.c" -#include "arm_conv_partial_fast_q15.c" -#include "arm_conv_partial_fast_q31.c" -#include "arm_conv_partial_opt_q15.c" -#include "arm_conv_partial_opt_q7.c" -#include "arm_conv_partial_q15.c" -#include "arm_conv_partial_q31.c" -#include "arm_conv_partial_q7.c" -#include "arm_conv_q15.c" -#include "arm_conv_q31.c" -#include "arm_conv_q7.c" -#include "arm_correlate_f32.c" -#include "arm_correlate_f64.c" -#include "arm_correlate_fast_opt_q15.c" -#include "arm_correlate_fast_q15.c" -#include "arm_correlate_fast_q31.c" -#include "arm_correlate_opt_q15.c" -#include "arm_correlate_opt_q7.c" -#include "arm_correlate_q15.c" -#include "arm_correlate_q31.c" -#include "arm_correlate_q7.c" -#include "arm_fir_decimate_f32.c" -#include "arm_fir_decimate_fast_q15.c" -#include "arm_fir_decimate_fast_q31.c" -#include "arm_fir_decimate_init_f32.c" -#include "arm_fir_decimate_init_q15.c" -#include "arm_fir_decimate_init_q31.c" -#include "arm_fir_decimate_q15.c" -#include "arm_fir_decimate_q31.c" -#include "arm_fir_f32.c" -#include "arm_fir_f64.c" -#include "arm_fir_fast_q15.c" -#include "arm_fir_fast_q31.c" -#include "arm_fir_init_f32.c" -#include "arm_fir_init_f64.c" -#include "arm_fir_init_q15.c" -#include "arm_fir_init_q31.c" -#include "arm_fir_init_q7.c" -#include "arm_fir_interpolate_f32.c" -#include "arm_fir_interpolate_init_f32.c" -#include "arm_fir_interpolate_init_q15.c" -#include "arm_fir_interpolate_init_q31.c" -#include "arm_fir_interpolate_q15.c" -#include "arm_fir_interpolate_q31.c" -#include "arm_fir_lattice_f32.c" -#include "arm_fir_lattice_init_f32.c" -#include "arm_fir_lattice_init_q15.c" -#include "arm_fir_lattice_init_q31.c" -#include "arm_fir_lattice_q15.c" -#include "arm_fir_lattice_q31.c" -#include "arm_fir_q15.c" -#include "arm_fir_q31.c" -#include "arm_fir_q7.c" -#include "arm_fir_sparse_f32.c" -#include "arm_fir_sparse_init_f32.c" -#include "arm_fir_sparse_init_q15.c" -#include "arm_fir_sparse_init_q31.c" -#include "arm_fir_sparse_init_q7.c" -#include "arm_fir_sparse_q15.c" -#include "arm_fir_sparse_q31.c" -#include "arm_fir_sparse_q7.c" -#include "arm_iir_lattice_f32.c" -#include "arm_iir_lattice_init_f32.c" -#include "arm_iir_lattice_init_q15.c" -#include "arm_iir_lattice_init_q31.c" -#include "arm_iir_lattice_q15.c" -#include "arm_iir_lattice_q31.c" -#include "arm_lms_f32.c" -#include "arm_lms_init_f32.c" -#include "arm_lms_init_q15.c" -#include "arm_lms_init_q31.c" -#include "arm_lms_norm_f32.c" -#include "arm_lms_norm_init_f32.c" -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES) -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15) -#include "arm_lms_norm_init_q15.c" -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31) -#include "arm_lms_norm_init_q31.c" -#endif -#endif -#include "arm_lms_norm_q15.c" -#include "arm_lms_norm_q31.c" -#include "arm_lms_q15.c" -#include "arm_lms_q31.c" - -#include "arm_levinson_durbin_f32.c" -#include "arm_levinson_durbin_q31.c" diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c deleted file mode 100644 index db4fb5e..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c +++ /dev/null @@ -1,36 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: FilteringFunctions.c - * Description: Combination of all filtering function f16 source files. - * - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_fir_f16.c" -#include "arm_fir_init_f16.c" -#include "arm_biquad_cascade_df1_f16.c" -#include "arm_biquad_cascade_df1_init_f16.c" -#include "arm_biquad_cascade_df2T_f16.c" -#include "arm_biquad_cascade_df2T_init_f16.c" -#include "arm_biquad_cascade_stereo_df2T_f16.c" -#include "arm_biquad_cascade_stereo_df2T_init_f16.c" -#include "arm_correlate_f16.c" -#include "arm_levinson_durbin_f16.c" diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c deleted file mode 100644 index c969da4..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c +++ /dev/null @@ -1,94 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_32x64_init_q31.c - * Description: High precision Q31 Biquad cascade filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF1_32x64 - @{ - */ - -/** - @brief Initialization function for the Q31 Biquad cascade 32x64 filter. - @param[in,out] S points to an instance of the high precision Q31 Biquad cascade filter structure - @param[in] numStages number of 2nd order stages in the filter - @param[in] pCoeffs points to the filter coefficients - @param[in] pState points to the state buffer - @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format - @return none - - @par Coefficient and State Ordering - The coefficients are stored in the array pCoeffs in the following order: - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- where b1x and a1x are the coefficients for the first stage, - b2x and a2x are the coefficients for the second stage, - and so on. The pCoeffs array contains a total of 5*numStages values. - @par - The pState points to state variables array and size of each state variable is 1.63 format. - Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - The state variables are arranged in the state array as: - 
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-
- The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - The state array has a total length of 4*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cas_df1_32x64_init_q31( - arm_biquad_cas_df1_32x64_ins_q31 * S, - uint8_t numStages, - const q31_t * pCoeffs, - q63_t * pState, - uint8_t postShift) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign postShift to be applied to the output */ - S->postShift = postShift; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q63_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of BiquadCascadeDF1_32x64 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c deleted file mode 100644 index 9bcba2a..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c +++ /dev/null @@ -1,807 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_32x64_q31.c - * Description: High precision Q31 Biquad cascade filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter - - This function implements a high precision Biquad cascade filter which operates on - Q31 data values. The filter coefficients are in 1.31 format and the state variables - are in 1.63 format. The double precision state variables reduce quantization noise - in the filter and provide a cleaner output. - These filters are particularly useful when implementing filters in which the - singularities are close to the unit circle. This is common for low pass or high - pass filters with very low cutoff frequencies. - - The function operates on blocks of input and output data - and each call to the function processes blockSize samples through - the filter. pSrc and pDst points to input and output arrays - containing blockSize Q31 values. - - @par Algorithm - Each Biquad stage implements a second order filter using the difference equation: - 
-      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-
- A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage. - \image html Biquad.gif "Single Biquad filter stage" - Coefficients b0, b1 and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. - Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. - Pay careful attention to the sign of the feedback coefficients. - Some design tools use the difference equation - 
-      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
-
- In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library. - @par - Higher order filters are realized as a cascade of second order sections. - numStages refers to the number of second order stages used. - For example, an 8th order filter would be realized with numStages=4 second order stages. - \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages" - A 9th order filter would be realized with numStages=5 second order stages - with the coefficients for one of the stages configured as a first order filter - (b2=0 and a2=0). - @par - The pState points to state variables array. - Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2] and each state variable in 1.63 format to improve precision. - The state variables are arranged in the array as: - 
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-
- @par - The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - The state array has a total length of 4*numStages values of data in 1.63 format. - The state variables are updated after each block of data is processed, the coefficients are untouched. - - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter. - Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - - @par Init Function - There is also an associated initialization function which performs the following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero. - - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - Set the values in the state buffer to zeros before static initialization. - For example, to statically initialize the filter instance structure use - 
-      arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
-
- where numStages is the number of Biquad stages in the filter; - pState is the address of the state buffer; - pCoeffs is the address of the coefficient buffer; - postShift shift to be applied which is described in detail below. - @par Fixed-Point Behavior - Care must be taken while using Biquad Cascade 32x64 filter function. - Following issues must be considered: - - Scaling of coefficients - - Filter gain - - Overflow and saturation - - @par - Filter coefficients are represented as fractional values and - restricted to lie in the range [-1 +1). - The processing function has an additional scaling parameter postShift - which allows the filter coefficients to exceed the range [+1 -1). - At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. - \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator" - This essentially scales the filter coefficients by 2^postShift. - For example, to realize the coefficients - 
-     {1.5, -0.8, 1.2, 1.6, -0.9}
-
- set the Coefficient array to: - 
-     {0.75, -0.4, 0.6, 0.8, -0.45}
-
- and set postShift=1 - @par - The second thing to keep in mind is the gain through the filter. - The frequency response of a Biquad filter is a function of its coefficients. - It is possible for the gain through the filter to exceed 1.0 meaning that the - filter increases the amplitude of certain frequencies. - This means that an input signal with amplitude < 1.0 may result in an output > 1.0 - and these are saturated or overflowed based on the implementation of the filter. - To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 - or the input signal must be scaled down so that the combination of input and filter are never overflowed. - @par - The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version. - This is described in the function specific documentation below. - */ - -/** - @addtogroup BiquadCascadeDF1_32x64 - @{ - */ - -/** - @brief Processing function for the Q31 Biquad cascade 32x64 filter. - @param[in] S points to an instance of the high precision Q31 Biquad cascade filter - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Details - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around rather than clip. - In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). - After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to - 1.31 format by discarding the low 32 bits. - @par - Two related functions are provided in the CMSIS DSP library. - - \ref arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator. - - \ref arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -static void arm_biquad_cas_df1_32x64_q31_scalar(const arm_biquad_cas_df1_32x64_ins_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - const q31_t *pIn = pSrc; /* input pointer initialization */ - q31_t *pOut = pDst; /* output pointer initialization */ - q63_t *pState = S->pState; /* state pointer initialization */ - const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q63_t acc; /* accumulator */ - q31_t Xn1, Xn2; /* Input Filter state variables */ - q63_t Yn1, Yn2; /* Output Filter state variables */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q31_t Xn; /* temporary input */ - int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ - uint32_t sample, stage = S->numStages; /* loop counters */ - q31_t acc_l, acc_h; /* temporary output */ - uint32_t uShift = ((uint32_t) S->postShift + 1U); - uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the state values */ - Xn1 = (q31_t) (pState[0]); - Xn2 = (q31_t) (pState[1]); - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - - while (sample > 0U) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) Xn * b0; - /* acc += b1 * x[n-1] */ - acc += (q63_t) Xn1 * b1; - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn2 * b2; - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn1, a1); - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn2, a2); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - - /* The result is converted to 1.63, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer in 1.31 format. */ - *pOut++ = acc_h; - /* Yn1 = acc << shift; */ - - /* Store the output in the destination buffer in 1.31 format. */ -/* *pOut++ = (q31_t) (acc >> (32 - shift)); */ - - /* decrement loop counter */ - sample--; - } - - /* The first stage output is given as input to the second stage. */ - pIn = pDst; - - /* Reset to destination buffer working pointer */ - pOut = pDst; - - /* Store the updated state variables back into the pState array */ - *pState++ = (q63_t) Xn1; - *pState++ = (q63_t) Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - } while (--stage); - -} - -void arm_biquad_cas_df1_32x64_q31( - const arm_biquad_cas_df1_32x64_ins_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - const q31_t *pIn = pSrc; /* input pointer initialization */ - q31_t *pOut = pDst; /* output pointer initialization */ - q63_t *pState = S->pState; /* state pointer initialization */ - const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q31_t Xn1, Xn2; /* Input Filter state variables */ - q63_t Yn1, Yn2; /* Output Filter state variables */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ - uint32_t sample, stage = S->numStages; /* loop counters */ - q31x4_t vecCoef, vecIn; - q63_t acc; - - if (blockSize <= 3) - { - arm_biquad_cas_df1_32x64_q31_scalar(S,pSrc,pDst,blockSize); - } - else - { - do - { - uint32_t i; - /* - * Reading the coefficients - */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - vecCoef[0] = 0; - vecCoef[1] = b2; - vecCoef[2] = b1; - vecCoef[3] = b0; - /* - * Reading the state values - */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* - * append history with initial samples - */ - q31_t hist[6]; - hist[0] = 0; - hist[1] = Xn2; - hist[2] = Xn1; - hist[3] = pIn[0]; - hist[4] = pIn[1]; - hist[5] = pIn[2]; - - const q31_t *pIn1 = hist; - q31x4_t vecIn0 = *(q31x4_t *) & pIn[0]; - q31x4_t vecIn1 = *(q31x4_t *) & pIn[1]; - q31x4_t vecIn2 = *(q31x4_t *) & pIn[2]; - - i = 3; - do - { - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - vecIn = vld1q(pIn1); - pIn1 += 1; - Yn1 = vmlaldavaq(Yn1, vecIn, vecCoef); - Yn1 = asrl(Yn1, -shift); - /* - * Store the output in the destination buffer in 1.31 format. - */ - *pOut++ = (q31_t) (Yn1 >> 32); - } - while (--i); - - sample = blockSize - 3; - pIn1 = pIn + 3; - - i = sample / 4; - while (i > 0U) - { - - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef); - vecIn = vld1q(pIn1); - pIn1 += 1; - Yn1 = asrl(Yn1, -shift); - /* - * Store the output in the destination buffer in 1.31 format. - */ - *pOut++ = (q31_t) (Yn1 >> 32); - - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - Yn1 = vmlaldavaq(Yn1, vecIn1, vecCoef); - vecIn0 = vld1q(pIn1); - pIn1 += 1; - Yn1 = asrl(Yn1, -shift); - *pOut++ = (q31_t) (Yn1 >> 32); - - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - Yn1 = vmlaldavaq(Yn1, vecIn2, vecCoef); - vecIn1 = vld1q(pIn1); - pIn1 += 1; - Yn1 = asrl(Yn1, -shift); - *pOut++ = (q31_t) (Yn1 >> 32); - - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - Yn1 = vmlaldavaq(Yn1, vecIn, vecCoef); - vecIn2 = vld1q(pIn1); - pIn1 += 1; - Yn1 = asrl(Yn1, -shift); - *pOut++ = (q31_t) (Yn1 >> 32); - /* - * Decrement the loop counter - */ - i--; - } - /* - * save input state - */ - Xn2 = vecIn[2]; - Xn1 = vecIn[3]; - - int loopRemainder = blockSize - 3 - 4 * ((blockSize - 3) / 4); - if (loopRemainder == 1) - { - /* - * remainder - */ - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef); - Yn1 = asrl(Yn1, -shift); - *pOut++ = (q31_t) (Yn1 >> 32); - /* - * save input state - */ - Xn2 = vecIn0[2]; - Xn1 = vecIn0[3]; - - } - else if (loopRemainder == 2) - { - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef); - Yn1 = asrl(Yn1, -shift); - *pOut++ = (q31_t) (Yn1 >> 32); - - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - Yn1 = vmlaldavaq(Yn1, vecIn1, vecCoef); - Yn1 = asrl(Yn1, -shift); - *pOut++ = (q31_t) (Yn1 >> 32); - /* - * save input state - */ - Xn2 = vecIn1[2]; - Xn1 = vecIn1[3]; - - } - else if (loopRemainder == 3) - { - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef); - Yn1 = asrl(Yn1, -shift); - *pOut++ = (q31_t) (Yn1 >> 32); - - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - Yn1 = vmlaldavaq(Yn1, vecIn1, vecCoef); - Yn1 = asrl(Yn1, -shift); - *pOut++ = (q31_t) (Yn1 >> 32); - - acc = mult32x64(Yn1, a1); - acc += mult32x64(Yn2, a2); - Yn2 = Yn1; - Yn1 = acc; - Yn1 = vmlaldavaq(Yn1, vecIn2, vecCoef); - Yn1 = asrl(Yn1, -shift); - *pOut++ = (q31_t) (Yn1 >> 32); - /* - * save input state - */ - Xn2 = vecIn2[2]; - Xn1 = vecIn2[3]; - - } - - /* - * The first stage output is given as input to the second stage. - */ - pIn = pDst; - /* - * Reset to destination buffer working pointer - */ - pOut = pDst; - /* - * Store the updated state variables back into the pState array - */ - *pState++ = (q63_t) Xn1; - *pState++ = (q63_t) Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - } - while (--stage); - } -} -#else -void arm_biquad_cas_df1_32x64_q31( - const arm_biquad_cas_df1_32x64_ins_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - const q31_t *pIn = pSrc; /* input pointer initialization */ - q31_t *pOut = pDst; /* output pointer initialization */ - q63_t *pState = S->pState; /* state pointer initialization */ - const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q63_t acc; /* accumulator */ - q31_t Xn1, Xn2; /* Input Filter state variables */ - q63_t Yn1, Yn2; /* Output Filter state variables */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q31_t Xn; /* temporary input */ - int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ - uint32_t sample, stage = S->numStages; /* loop counters */ - q31_t acc_l, acc_h; /* temporary output */ - uint32_t uShift = ((uint32_t) S->postShift + 1U); - uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the state values */ - Xn1 = (q31_t) (pState[0]); - Xn2 = (q31_t) (pState[1]); - Yn1 = pState[2]; - Yn2 = pState[3]; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - /* Variable acc hold output value that is being computed and stored in destination buffer - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - /* Loop unrolling: Compute 4 outputs at a time */ - sample = blockSize >> 2U; - - while (sample > 0U) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) Xn * b0; - - /* acc += b1 * x[n-1] */ - acc += (q63_t) Xn1 * b1; - - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn2 * b2; - - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn1, a1); - - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn2, a2); - - /* The result is converted to 1.63 , Yn2 variable is reused */ - Yn2 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer in 1.31 format. */ - *pOut = acc_h; - - /* Read the second input into Xn2, to reuse the value */ - Xn2 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc += b1 * x[n-1] */ - acc = (q63_t) Xn * b1; - - /* acc = b0 * x[n] */ - acc += (q63_t) Xn2 * b0; - - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn1 * b2; - - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn2, a1); - - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn1, a2); - - /* The result is converted to 1.63, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Read the third input into Xn1, to reuse the value */ - Xn1 = *pIn++; - - /* The result is converted to 1.31 */ - /* Store the output in the destination buffer. */ - *(pOut + 1U) = acc_h; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) Xn1 * b0; - - /* acc += b1 * x[n-1] */ - acc += (q63_t) Xn2 * b1; - - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn * b2; - - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn1, a1); - - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn2, a2); - - /* The result is converted to 1.63, Yn2 variable is reused */ - Yn2 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer in 1.31 format. */ - *(pOut + 2U) = acc_h; - - /* Read the fourth input into Xn, to reuse the value */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q63_t) Xn * b0; - - /* acc += b1 * x[n-1] */ - acc += (q63_t) Xn1 * b1; - - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn2 * b2; - - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn2, a1); - - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn1, a2); - - /* The result is converted to 1.63, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer in 1.31 format. */ - *(pOut + 3U) = acc_h; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - - /* update output pointer */ - pOut += 4U; - - /* decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = blockSize & 0x3U; - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - - /* acc = b0 * x[n] */ - acc = (q63_t) Xn * b0; - /* acc += b1 * x[n-1] */ - acc += (q63_t) Xn1 * b1; - /* acc += b[2] * x[n-2] */ - acc += (q63_t) Xn2 * b2; - /* acc += a1 * y[n-1] */ - acc += mult32x64(Yn1, a1); - /* acc += a2 * y[n-2] */ - acc += mult32x64(Yn2, a2); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - - /* The result is converted to 1.63, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the output in the destination buffer in 1.31 format. */ - *pOut++ = acc_h; - /* Yn1 = acc << shift; */ - - /* Store the output in the destination buffer in 1.31 format. */ -/* *pOut++ = (q31_t) (acc >> (32 - shift)); */ - - /* decrement loop counter */ - sample--; - } - - /* The first stage output is given as input to the second stage. */ - pIn = pDst; - - /* Reset to destination buffer working pointer */ - pOut = pDst; - - /* Store the updated state variables back into the pState array */ - *pState++ = (q63_t) Xn1; - *pState++ = (q63_t) Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - } while (--stage); - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BiquadCascadeDF1_32x64 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f16.c deleted file mode 100644 index eb843d5..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f16.c +++ /dev/null @@ -1,491 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_f16.c - * Description: Processing function for the floating-point Biquad cascade DirectFormI(DF1) filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) -/** - @ingroup groupFilters - */ - - -/** - @addtogroup BiquadCascadeDF1 - @{ - */ - -/** - @brief Processing function for the floating-point Biquad cascade filter. - @param[in] S points to an instance of the floating-point Biquad cascade structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_biquad_cascade_df1_f16( - const arm_biquad_casd_df1_inst_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - float16_t *pIn = (float16_t *)pSrc; /* source pointer */ - float16_t *pOut = pDst; /* destination pointer */ - float16_t *pState = S->pState; /* pState pointer */ - const float16_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float16_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ - float16_t X0, X1, X2, X3; /* temporary input */ - float16_t X4, X5, X6, X7; /* temporary input */ - _Float16 lastX, lastY; /* X,Y history for tail handling */ - f16x8_t coeffs; - f16x8_t accVec; /* accumultor vector */ - uint32_t sample, stage = S->numStages; /* loop counters */ - - do - { - /* - * Reading the pState values - */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - sample = blockSize >> 3U; - - /* - * First part of the processing with loop unrolling. Compute 8 outputs at a time. - */ - while (sample > 0U) - { - X0 = *pIn++; - X1 = *pIn++; - X2 = *pIn++; - X3 = *pIn++; - X4 = *pIn++; - X5 = *pIn++; - X6 = *pIn++; - X7 = *pIn++; - - coeffs = vld1q(pCoeffs); - accVec = vmulq(coeffs, X7); - - coeffs = vld1q(&pCoeffs[8]); - accVec = vfmaq(accVec, coeffs, X6); - - coeffs = vld1q(&pCoeffs[16]); - accVec = vfmaq(accVec, coeffs, X5); - - coeffs = vld1q(&pCoeffs[24]); - accVec = vfmaq(accVec, coeffs, X4); - - coeffs = vld1q(&pCoeffs[32]); - accVec = vfmaq(accVec, coeffs, X3); - - coeffs = vld1q(&pCoeffs[40]); - accVec = vfmaq(accVec, coeffs, X2); - - coeffs = vld1q(&pCoeffs[48]); - accVec = vfmaq(accVec, coeffs, X1); - - coeffs = vld1q(&pCoeffs[56]); - accVec = vfmaq(accVec, coeffs, X0); - - coeffs = vld1q(&pCoeffs[64]); - accVec = vfmaq(accVec, coeffs, Xn1); - - coeffs = vld1q(&pCoeffs[72]); - accVec = vfmaq(accVec, coeffs, Xn2); - - coeffs = vld1q(&pCoeffs[80]); - accVec = vfmaq(accVec, coeffs, Yn1); - - coeffs = vld1q(&pCoeffs[88]); - accVec = vfmaq(accVec, coeffs, Yn2); - /* - * Store the result in the accumulator in the destination buffer. - */ - vst1q(pOut, accVec); - pOut += 8; - - /* - * update recurrence - */ - Xn1 = X7; - Xn2 = X6; - Yn1 = vgetq_lane(accVec, 7); - Yn2 = vgetq_lane(accVec, 6); - /* - * decrement the loop counter - */ - sample--; - } - - /* - * If the blockSize is not a multiple of 8, - * compute any remaining output samples here. - */ - sample = blockSize & 0x7U; - if (sample) - { - /* save previous X, Y for modulo 1 length case */ - lastX = X7; - lastY = Yn1; - - X0 = *pIn++; - X1 = *pIn++; - X2 = *pIn++; - X3 = *pIn++; - X4 = *pIn++; - X5 = *pIn++; - X6 = *pIn++; - X7 = *pIn++; - - coeffs = vld1q(pCoeffs); - accVec = vmulq(coeffs, X7); - - coeffs = vld1q(&pCoeffs[8]); - accVec = vfmaq(accVec, coeffs, X6); - - coeffs = vld1q(&pCoeffs[16]); - accVec = vfmaq(accVec, coeffs, X5); - - coeffs = vld1q(&pCoeffs[24]); - accVec = vfmaq(accVec, coeffs, X4); - - coeffs = vld1q(&pCoeffs[32]); - accVec = vfmaq(accVec, coeffs, X3); - - coeffs = vld1q(&pCoeffs[40]); - accVec = vfmaq(accVec, coeffs, X2); - - coeffs = vld1q(&pCoeffs[48]); - accVec = vfmaq(accVec, coeffs, X1); - - coeffs = vld1q(&pCoeffs[56]); - accVec = vfmaq(accVec, coeffs, X0); - - coeffs = vld1q(&pCoeffs[64]); - accVec = vfmaq(accVec, coeffs, Xn1); - - coeffs = vld1q(&pCoeffs[72]); - accVec = vfmaq(accVec, coeffs, Xn2); - - coeffs = vld1q(&pCoeffs[80]); - accVec = vfmaq(accVec, coeffs, Yn1); - - coeffs = vld1q(&pCoeffs[88]); - accVec = vfmaq(accVec, coeffs, Yn2); - - switch(sample) - { - case 1: - *pOut++ = vgetq_lane(accVec, 0); - Xn1 = X0; - Xn2 = lastX; - Yn1 = vgetq_lane(accVec, 0); - Yn2 = lastY; - break; - case 2: - *pOut++ = vgetq_lane(accVec, 0); - *pOut++ = vgetq_lane(accVec, 1); - Xn1 = X1; - Xn2 = X0; - Yn1 = vgetq_lane(accVec, 1); - Yn2 = vgetq_lane(accVec, 0); - break; - case 3: - *pOut++ = vgetq_lane(accVec, 0); - *pOut++ = vgetq_lane(accVec, 1); - *pOut++ = vgetq_lane(accVec, 2); - Xn1 = X2; - Xn2 = X1; - Yn1 = vgetq_lane(accVec, 2); - Yn2 = vgetq_lane(accVec, 1); - break; - - case 4: - *pOut++ = vgetq_lane(accVec, 0); - *pOut++ = vgetq_lane(accVec, 1); - *pOut++ = vgetq_lane(accVec, 2); - *pOut++ = vgetq_lane(accVec, 3); - Xn1 = X3; - Xn2 = X2; - Yn1 = vgetq_lane(accVec, 3); - Yn2 = vgetq_lane(accVec, 2); - break; - - case 5: - *pOut++ = vgetq_lane(accVec, 0); - *pOut++ = vgetq_lane(accVec, 1); - *pOut++ = vgetq_lane(accVec, 2); - *pOut++ = vgetq_lane(accVec, 3); - *pOut++ = vgetq_lane(accVec, 4); - Xn1 = X4; - Xn2 = X3; - Yn1 = vgetq_lane(accVec, 4); - Yn2 = vgetq_lane(accVec, 3); - break; - - case 6: - *pOut++ = vgetq_lane(accVec, 0); - *pOut++ = vgetq_lane(accVec, 1); - *pOut++ = vgetq_lane(accVec, 2); - *pOut++ = vgetq_lane(accVec, 3); - *pOut++ = vgetq_lane(accVec, 4); - *pOut++ = vgetq_lane(accVec, 5); - Xn1 = X5; - Xn2 = X4; - Yn1 = vgetq_lane(accVec, 5); - Yn2 = vgetq_lane(accVec, 4); - break; - - case 7: - *pOut++ = vgetq_lane(accVec, 0); - *pOut++ = vgetq_lane(accVec, 1); - *pOut++ = vgetq_lane(accVec, 2); - *pOut++ = vgetq_lane(accVec, 3); - *pOut++ = vgetq_lane(accVec, 4); - *pOut++ = vgetq_lane(accVec, 5); - *pOut++ = vgetq_lane(accVec, 6); - Xn1 = X6; - Xn2 = X5; - Yn1 = vgetq_lane(accVec, 6); - Yn2 = vgetq_lane(accVec, 5); - break; - } - } - /* - * Store the updated state variables back into the pState array - */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - pCoeffs += sizeof(arm_biquad_mod_coef_f16) / sizeof(float16_t); - /* - * The first stage goes from the input buffer to the output buffer. - * Subsequent numStages occur in-place in the output buffer - */ - pIn = pDst; - /* - * Reset the output pointer - */ - pOut = pDst; - /* - * decrement the loop counter - */ - stage--; - } - while (stage > 0U); -} - -#else -void arm_biquad_cascade_df1_f16( - const arm_biquad_casd_df1_inst_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - const float16_t *pIn = pSrc; /* Source pointer */ - float16_t *pOut = pDst; /* Destination pointer */ - float16_t *pState = S->pState; /* pState pointer */ - const float16_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - _Float16 acc; /* Accumulator */ - _Float16 b0, b1, b2, a1, a2; /* Filter coefficients */ - _Float16 Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ - _Float16 Xn; /* Temporary input */ - uint32_t sample, stage = S->numStages; /* Loop counters */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the pState values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - /* Variable acc hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - /* Loop unrolling: Compute 4 outputs at a time */ - sample = blockSize >> 2U; - - while (sample > 0U) - { - /* Read the first input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); - - /* Store output in destination buffer. */ - *pOut++ = Yn2; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - - /* Read the second input */ - Xn2 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1); - - /* Store output in destination buffer. */ - *pOut++ = Yn1; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - - /* Read the third input */ - Xn1 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2); - - /* Store output in destination buffer. */ - *pOut++ = Yn2; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - - /* Read the forth input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1); - - /* Store output in destination buffer. */ - *pOut++ = Yn1; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - - /* decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = blockSize & 0x3U; - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); - - /* Store output in destination buffer. */ - *pOut++ = acc; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = acc; - - /* decrement loop counter */ - sample--; - } - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent numStages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset output pointer */ - pOut = pDst; - - /* decrement loop counter */ - stage--; - - } while (stage > 0U); - -} - -/** - @} end of BiquadCascadeDF1 group - */ -#endif /* #if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -#endif /*#if defined(ARM_FLOAT16_SUPPORTED)*/ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c deleted file mode 100644 index 5a3981f..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c +++ /dev/null @@ -1,684 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_f32.c - * Description: Processing function for the floating-point Biquad cascade DirectFormI(DF1) filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure - - This set of functions implements arbitrary order recursive (IIR) filters. - The filters are implemented as a cascade of second order Biquad sections. - The functions support Q15, Q31 and floating-point data types. - Fast version of Q15 and Q31 also available. - - The functions operate on blocks of input and output data and each call to the function - processes blockSize samples through the filter. - pSrc points to the array of input data and - pDst points to the array of output data. - Both arrays contain blockSize values. - - @par Algorithm - Each Biquad stage implements a second order filter using the difference equation: - 
-      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-
- A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage. - \image html Biquad.gif "Single Biquad filter stage" - Coefficients b0, b1 and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. - Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. - Pay careful attention to the sign of the feedback coefficients. - Some design tools use the difference equation - 
-      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
-
- In this case the feedback coefficients a1 and a2 - must be negated when used with the CMSIS DSP Library. - - @par - Higher order filters are realized as a cascade of second order sections. - numStages refers to the number of second order stages used. - For example, an 8th order filter would be realized with numStages=4 second order stages. - \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages" - A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0). - - @par - The pState points to state variables array. - Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - The state variables are arranged in the pState array as: - 
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-
- - @par - The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - The state array has a total length of 4*numStages values. - The state variables are updated after each block of data is processed, the coefficients are untouched. - - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter. - Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - There are separate instance structure declarations for each of the 3 supported data types. - - @par Init Function - There is also an associated initialization function for each data type. - The initialization function performs following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - numStages, pCoeffs, pState. Also set all of the values in pState to zero. - - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - Set the values in the state buffer to zeros before static initialization. - The code below statically initializes each of the 3 different data type filter instance structures - 
-      arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
-      arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
-      arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
-
- where numStages is the number of Biquad stages in the filter; - pState is the address of the state buffer; - pCoeffs is the address of the coefficient buffer; - postShift shift to be applied. - - @par Fixed-Point Behavior - Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions. - Following issues must be considered: - - Scaling of coefficients - - Filter gain - - Overflow and saturation - - @par Scaling of coefficients - Filter coefficients are represented as fractional values and - coefficients are restricted to lie in the range [-1 +1). - The fixed-point functions have an additional scaling parameter postShift - which allow the filter coefficients to exceed the range [+1 -1). - At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. - \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator" - This essentially scales the filter coefficients by 2^postShift. - For example, to realize the coefficients - 
-     {1.5, -0.8, 1.2, 1.6, -0.9}
-
- set the pCoeffs array to: - 
-     {0.75, -0.4, 0.6, 0.8, -0.45}
-
- and set postShift=1 - - @par Filter gain - The frequency response of a Biquad filter is a function of its coefficients. - It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. - This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter. - To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed. - - @par Overflow and saturation - For Q15 and Q31 versions, it is described separately as part of the function specific documentation below. - */ - -/** - @addtogroup BiquadCascadeDF1 - @{ - */ - -/** - @brief Processing function for the floating-point Biquad cascade filter. - @param[in] S points to an instance of the floating-point Biquad cascade structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_helium_utils.h" -void arm_biquad_cascade_df1_f32( - const arm_biquad_casd_df1_inst_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* source pointer */ - float32_t *pOut = pDst; /* destination pointer */ - float32_t *pState = S->pState; /* pState pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ - float32_t lastX, lastY; /* X,Y history for tail handling */ - float32_t X0, X1, X2, X3; /* temporary input */ - f32x4_t coeffs; - f32x4_t accVec; /* accumultor vector */ - uint32_t sample, stage = S->numStages; /* loop counters */ - - do - { - /* - * Reading the pState values - */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - sample = blockSize >> 2U; - - /* - * First part of the processing with loop unrolling. Compute 4 outputs at a time. - * second loop below computes the remaining 1 to 3 samples. - */ - while (sample > 0U) - { - X0 = *pIn++; - X1 = *pIn++; - X2 = *pIn++; - X3 = *pIn++; - - coeffs = vld1q(pCoeffs); - accVec = vmulq(coeffs, X3); - - coeffs = vld1q(&pCoeffs[4]); - accVec = vfmaq(accVec, coeffs, X2); - - coeffs = vld1q(&pCoeffs[8]); - accVec = vfmaq(accVec, coeffs, X1); - - coeffs = vld1q(&pCoeffs[12]); - accVec = vfmaq(accVec, coeffs, X0); - - coeffs = vld1q(&pCoeffs[16]); - accVec = vfmaq(accVec, coeffs, Xn1); - - coeffs = vld1q(&pCoeffs[20]); - accVec = vfmaq(accVec, coeffs, Xn2); - - coeffs = vld1q(&pCoeffs[24]); - accVec = vfmaq(accVec, coeffs, Yn1); - - coeffs = vld1q(&pCoeffs[28]); - accVec = vfmaq(accVec, coeffs, Yn2); - /* - * Store the result in the accumulator in the destination buffer. - */ - vst1q(pOut, accVec); - pOut += 4; - - /* - * update recurrence - */ - Xn1 = X3; - Xn2 = X2; - Yn1 = vgetq_lane(accVec, 3); - Yn2 = vgetq_lane(accVec, 2); - /* - * decrement the loop counter - */ - sample--; - } - - /* - * If the blockSize is not a multiple of 4, - * compute any remaining output samples here. - */ - sample = blockSize & 0x3U; - if (sample) - { - /* save previous X, Y for modulo 1 length case */ - lastX = X3; - lastY = Yn1; - - X0 = *pIn++; - X1 = *pIn++; - X2 = *pIn++; - X3 = *pIn++; - - coeffs = vld1q(pCoeffs); - accVec = vmulq(coeffs, X3); - - coeffs = vld1q(&pCoeffs[4]); - accVec = vfmaq(accVec, coeffs, X2); - - coeffs = vld1q(&pCoeffs[8]); - accVec = vfmaq(accVec, coeffs, X1); - - coeffs = vld1q(&pCoeffs[12]); - accVec = vfmaq(accVec, coeffs, X0); - - coeffs = vld1q(&pCoeffs[16]); - accVec = vfmaq(accVec, coeffs, Xn1); - - coeffs = vld1q(&pCoeffs[20]); - accVec = vfmaq(accVec, coeffs, Xn2); - - coeffs = vld1q(&pCoeffs[24]); - accVec = vfmaq(accVec, coeffs, Yn1); - - coeffs = vld1q(&pCoeffs[28]); - accVec = vfmaq(accVec, coeffs, Yn2); - - if (sample == 1) - { - *pOut++ = vgetq_lane(accVec, 0); - Xn1 = X0; - Xn2 = lastX; - Yn1 = vgetq_lane(accVec, 0); - Yn2 = lastY; - } - else if (sample == 2) - { - *pOut++ = vgetq_lane(accVec, 0); - *pOut++ = vgetq_lane(accVec, 1); - Xn1 = X1; - Xn2 = X0; - Yn1 = vgetq_lane(accVec, 1); - Yn2 = vgetq_lane(accVec, 0); - } - else - { - *pOut++ = vgetq_lane(accVec, 0); - *pOut++ = vgetq_lane(accVec, 1); - *pOut++ = vgetq_lane(accVec, 2); - Xn1 = X2; - Xn2 = X1; - Yn1 = vgetq_lane(accVec, 2); - Yn2 = vgetq_lane(accVec, 1); - } - } - /* - * Store the updated state variables back into the pState array - */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - pCoeffs += sizeof(arm_biquad_mod_coef_f32) / sizeof(float32_t); - /* - * The first stage goes from the input buffer to the output buffer. - * Subsequent numStages occur in-place in the output buffer - */ - pIn = pDst; - /* - * Reset the output pointer - */ - pOut = pDst; - /* - * decrement the loop counter - */ - stage--; - } - while (stage > 0U); -} -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_biquad_cascade_df1_f32( - const arm_biquad_casd_df1_inst_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - - const float32_t *pIn = pSrc; /* source pointer */ - float32_t *pOut = pDst; /* destination pointer */ - float32_t *pState = S->pState; /* pState pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float32_t acc; /* Simulates the accumulator */ - - uint32_t sample, stage = S->numStages; /* loop counters */ - - float32x4_t Xn; - float32x2_t Yn; - float32x2_t a; - float32x4_t b; - - float32x4_t x,tmp; - float32x2_t t; - float32x2x2_t y; - - float32_t Xns; - - while (stage > 0U) - { - /* Reading the coefficients */ - Xn = vdupq_n_f32(0.0f); - - Xn = vsetq_lane_f32(pState[0],Xn,2); - Xn = vsetq_lane_f32(pState[1],Xn,3); - Yn = vset_lane_f32(pState[2],Yn,0); - Yn = vset_lane_f32(pState[3],Yn,1); - - b = vld1q_f32(pCoeffs); - b = vrev64q_f32(b); - b = vcombine_f32(vget_high_f32(b), vget_low_f32(b)); - - a = vld1_f32(pCoeffs + 3); - a = vrev64_f32(a); - b = vsetq_lane_f32(0.0f,b,0); - pCoeffs += 5; - - /* Reading the pState values */ - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - /* The variable acc hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - sample = blockSize >> 2U; - - while (sample > 0U) - { - /* Read the first 4 inputs */ - x = vld1q_f32(pIn); - - pIn += 4; - - tmp = vextq_f32(Xn, x, 1); - t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp)); - t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp)); - t = vmla_f32(t, a, Yn); - t = vpadd_f32(t, t); - Yn = vext_f32(Yn, t, 1); - - tmp = vextq_f32(Xn, x, 2); - t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp)); - t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp)); - t = vmla_f32(t, a, Yn); - t = vpadd_f32(t, t); - Yn = vext_f32(Yn, t, 1); - - y.val[0] = Yn; - - tmp = vextq_f32(Xn, x, 3); - t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp)); - t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp)); - t = vmla_f32(t, a, Yn); - t = vpadd_f32(t, t); - Yn = vext_f32(Yn, t, 1); - - Xn = x; - t = vmul_f32(vget_high_f32(b), vget_high_f32(Xn)); - t = vmla_f32(t, vget_low_f32(b), vget_low_f32(Xn)); - t = vmla_f32(t, a, Yn); - t = vpadd_f32(t, t); - Yn = vext_f32(Yn, t, 1); - - y.val[1] = Yn; - - tmp = vcombine_f32(y.val[0], y.val[1]); - - /* Store the 4 outputs and increment the pointer */ - vst1q_f32(pOut, tmp); - pOut += 4; - - /* Decrement the loop counter */ - sample--; - } - - - /* If the block size is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - sample = blockSize & 0x3U; - - while (sample > 0U) - { - /* Read the input */ - Xns = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - acc = (vgetq_lane_f32(b, 1) * vgetq_lane_f32(Xn, 2)) - + (vgetq_lane_f32(b, 2) * vgetq_lane_f32(Xn, 3)) - + (vgetq_lane_f32(b, 3) * Xns) - + (vget_lane_f32(a, 0) * vget_lane_f32(Yn, 0)) - + (vget_lane_f32(a, 1) * vget_lane_f32(Yn, 1)); - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn = vsetq_lane_f32(vgetq_lane_f32(Xn, 3),Xn,2); - Xn = vsetq_lane_f32(Xns,Xn,3); - Yn = vset_lane_f32(vget_lane_f32(Yn, 1),Yn,0); - Yn = vset_lane_f32(acc,Yn,1); - - /* Decrement the loop counter */ - sample--; - - } - - vst1q_f32(pState,vcombine_f32((vget_high_f32(Xn)),(Yn))); - pState += 4; - /* Store the updated state variables back into the pState array */ - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent numStages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset the output pointer */ - pOut = pDst; - - /* Decrement the loop counter */ - stage--; - } -} - -#else -void arm_biquad_cascade_df1_f32( - const arm_biquad_casd_df1_inst_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* Source pointer */ - float32_t *pOut = pDst; /* Destination pointer */ - float32_t *pState = S->pState; /* pState pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t acc; /* Accumulator */ - float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ - float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ - float32_t Xn; /* Temporary input */ - uint32_t sample, stage = S->numStages; /* Loop counters */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the pState values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - /* Variable acc hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - /* Loop unrolling: Compute 4 outputs at a time */ - sample = blockSize >> 2U; - - while (sample > 0U) - { - /* Read the first input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); - - /* Store output in destination buffer. */ - *pOut++ = Yn2; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - - /* Read the second input */ - Xn2 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1); - - /* Store output in destination buffer. */ - *pOut++ = Yn1; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - - /* Read the third input */ - Xn1 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2); - - /* Store output in destination buffer. */ - *pOut++ = Yn2; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - - /* Read the forth input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1); - - /* Store output in destination buffer. */ - *pOut++ = Yn1; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - - /* decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = blockSize & 0x3U; - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); - - /* Store output in destination buffer. */ - *pOut++ = acc; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = acc; - - /* decrement loop counter */ - sample--; - } - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent numStages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset output pointer */ - pOut = pDst; - - /* decrement loop counter */ - stage--; - - } while (stage > 0U); - -} - -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BiquadCascadeDF1 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c deleted file mode 100644 index 0561488..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c +++ /dev/null @@ -1,250 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_fast_q15.c - * Description: Fast processing function for the Q15 Biquad cascade filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF1 - @{ - */ - -/** - @brief Processing function for the Q15 Biquad cascade filter (fast variant). - @param[in] S points to an instance of the Q15 Biquad cascade structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process per call - @return none - - @par Scaling and Overflow Behavior - This fast version uses a 32-bit accumulator with 2.30 format. - The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around and distorts the result. - In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). - The 2.30 accumulator is then shifted by postShift bits and the result truncated to 1.15 format by discarding the low 16 bits. - @remark - Refer to \ref arm_biquad_cascade_df1_q15() for a slower implementation of this function - which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. - Use the function \ref arm_biquad_cascade_df1_init_q15() to initialize the filter structure. - */ - -void arm_biquad_cascade_df1_fast_q15( - const arm_biquad_casd_df1_inst_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - const q15_t *pIn = pSrc; /* Source pointer */ - q15_t *pOut = pDst; /* Destination pointer */ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t acc; /* Accumulator */ - q31_t in; /* Temporary variable to hold input value */ - q31_t out; /* Temporary variable to hold output value */ - q31_t b0; /* Temporary variable to hold bo value */ - q31_t b1, a1; /* Filter coefficients */ - q31_t state_in, state_out; /* Filter state variables */ - int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */ - uint32_t sample, stage = S->numStages; /* Loop counters */ - - do - { - /* Read the b0 and 0 coefficients using SIMD */ - b0 = read_q15x2_ia (&pCoeffs); - - /* Read the b1 and b2 coefficients using SIMD */ - b1 = read_q15x2_ia (&pCoeffs); - - /* Read the a1 and a2 coefficients using SIMD */ - a1 = read_q15x2_ia (&pCoeffs); - - /* Read the input state values from the state buffer: x[n-1], x[n-2] */ - state_in = read_q15x2_ia (&pState); - - /* Read the output state values from the state buffer: y[n-1], y[n-2] */ - state_out = read_q15x2_da (&pState); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Apply loop unrolling and compute 2 output values simultaneously. */ - /* Variable acc hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - /* Loop unrolling: Compute 2 outputs at a time */ - sample = blockSize >> 1U; - - while (sample > 0U) - { - - /* Read the input */ - in = read_q15x2_ia (&pIn); - - /* out = b0 * x[n] + 0 * 0 */ - out = __SMUAD(b0, in); - /* acc = b1 * x[n-1] + acc += b2 * x[n-2] + out */ - acc = __SMLAD(b1, state_in, out); - /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */ - acc = __SMLAD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 and then saturation is applied */ - out = __SSAT((acc >> shift), 16); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ - -#ifndef ARM_MATH_BIG_ENDIAN - state_in = __PKHBT(in, state_in, 16); - state_out = __PKHBT(out, state_out, 16); -#else - state_in = __PKHBT(state_in >> 16, (in >> 16), 16); - state_out = __PKHBT(state_out >> 16, (out), 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* out = b0 * x[n] + 0 * 0 */ - out = __SMUADX(b0, in); - /* acc0 = b1 * x[n-1] , acc0 += b2 * x[n-2] + out */ - acc = __SMLAD(b1, state_in, out); - /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */ - acc = __SMLAD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 and then saturation is applied */ - out = __SSAT((acc >> shift), 16); - - /* Store the output in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16)); -#else - write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ -#ifndef ARM_MATH_BIG_ENDIAN - state_in = __PKHBT(in >> 16, state_in, 16); - state_out = __PKHBT(out, state_out, 16); -#else - state_in = __PKHBT(state_in >> 16, in, 16); - state_out = __PKHBT(state_out >> 16, out, 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = (blockSize & 0x1U); - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) - { - /* Read the input */ - in = *pIn++; - - /* out = b0 * x[n] + 0 * 0 */ -#ifndef ARM_MATH_BIG_ENDIAN - out = __SMUAD(b0, in); -#else - out = __SMUADX(b0, in); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc = b1 * x[n-1], acc += b2 * x[n-2] + out */ - acc = __SMLAD(b1, state_in, out); - /* acc += a1 * y[n-1] + acc += a2 * y[n-2] */ - acc = __SMLAD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 and then saturation is applied */ - out = __SSAT((acc >> shift), 16); - - /* Store the output in the destination buffer. */ - *pOut++ = (q15_t) out; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ -#ifndef ARM_MATH_BIG_ENDIAN - state_in = __PKHBT(in, state_in, 16); - state_out = __PKHBT(out, state_out, 16); -#else - state_in = __PKHBT(state_in >> 16, in, 16); - state_out = __PKHBT(state_out >> 16, out, 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* decrement loop counter */ - sample--; - } - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent (numStages - 1) occur in-place in the output buffer */ - pIn = pDst; - - /* Reset the output pointer */ - pOut = pDst; - - /* Store the updated state variables back into the state array */ - write_q15x2_ia(&pState, state_in); - write_q15x2_ia(&pState, state_out); - - /* Decrement loop counter */ - stage--; - - } while (stage > 0U); -} - -/** - @} end of BiquadCascadeDF1 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c deleted file mode 100644 index 67cd948..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c +++ /dev/null @@ -1,296 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_fast_q31.c - * Description: Processing function for the Q31 Fast Biquad cascade DirectFormI(DF1) filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF1 - @{ - */ - -/** - @brief Processing function for the Q31 Biquad cascade filter (fast variant). - @param[in] S points to an instance of the Q31 Biquad cascade structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process per call - @return none - - @par Scaling and Overflow Behavior - This function is optimized for speed at the expense of fixed-point precision and overflow protection. - The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. - These intermediate results are added to a 2.30 accumulator. - Finally, the accumulator is saturated and converted to a 1.31 result. - The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. - In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function - arm_biquad_cascade_df1_init_q31() to initialize filter structure. - @remark - Refer to \ref arm_biquad_cascade_df1_q31() for a slower implementation of this function - which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure. - Use the function \ref arm_biquad_cascade_df1_init_q31() to initialize the filter structure. - */ - -void arm_biquad_cascade_df1_fast_q31( - const arm_biquad_casd_df1_inst_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - const q31_t *pIn = pSrc; /* Source pointer */ - q31_t *pOut = pDst; /* Destination pointer */ - q31_t *pState = S->pState; /* pState pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t acc = 0; /* Accumulator */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q31_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ - q31_t Xn; /* Temporary input */ - int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ - uint32_t sample, stage = S->numStages; /* Loop counters */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the pState values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - /* Variables acc ... acc3 hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - /* Loop unrolling: Compute 4 outputs at a time */ - sample = blockSize >> 2U; - - while (sample > 0U) - { - /* Read the input */ - Xn = *pIn; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - /* acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/ - mult_32x32_keep32_R(acc, b1, Xn1); - /* acc += b1 * x[n-1] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/ - multAcc_32x32_keep32_R(acc, b0, Xn); - /* acc += b[2] * x[n-2] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/ - multAcc_32x32_keep32_R(acc, b2, Xn2); - /* acc += a1 * y[n-1] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/ - multAcc_32x32_keep32_R(acc, a1, Yn1); - /* acc += a2 * y[n-2] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/ - multAcc_32x32_keep32_R(acc, a2, Yn2); - - /* The result is converted to 1.31 , Yn2 variable is reused */ - Yn2 = acc << shift; - - /* Read the second input */ - Xn2 = *(pIn + 1U); - - /* Store the output in the destination buffer. */ - *pOut = Yn2; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - /* acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/ - mult_32x32_keep32_R(acc, b0, Xn2); - /* acc += b1 * x[n-1] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/ - multAcc_32x32_keep32_R(acc, b1, Xn); - /* acc += b[2] * x[n-2] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/ - multAcc_32x32_keep32_R(acc, b2, Xn1); - /* acc += a1 * y[n-1] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/ - multAcc_32x32_keep32_R(acc, a1, Yn2); - /* acc += a2 * y[n-2] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/ - multAcc_32x32_keep32_R(acc, a2, Yn1); - - /* The result is converted to 1.31, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Read the third input */ - Xn1 = *(pIn + 2U); - - /* Store the output in the destination buffer. */ - *(pOut + 1U) = Yn1; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - /* acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/ - mult_32x32_keep32_R(acc, b0, Xn1); - /* acc += b1 * x[n-1] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/ - multAcc_32x32_keep32_R(acc, b1, Xn2); - /* acc += b[2] * x[n-2] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/ - multAcc_32x32_keep32_R(acc, b2, Xn); - /* acc += a1 * y[n-1] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/ - multAcc_32x32_keep32_R(acc, a1, Yn1); - /* acc += a2 * y[n-2] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/ - multAcc_32x32_keep32_R(acc, a2, Yn2); - - /* The result is converted to 1.31, Yn2 variable is reused */ - Yn2 = acc << shift; - - /* Read the forth input */ - Xn = *(pIn + 3U); - - /* Store the output in the destination buffer. */ - *(pOut + 2U) = Yn2; - pIn += 4U; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/ - mult_32x32_keep32_R(acc, b0, Xn); - /* acc += b1 * x[n-1] */ - /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/ - multAcc_32x32_keep32_R(acc, b1, Xn1); - /* acc += b[2] * x[n-2] */ - /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/ - multAcc_32x32_keep32_R(acc, b2, Xn2); - /* acc += a1 * y[n-1] */ - /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/ - multAcc_32x32_keep32_R(acc, a1, Yn2); - /* acc += a2 * y[n-2] */ - /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/ - multAcc_32x32_keep32_R(acc, a2, Yn1); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - Xn2 = Xn1; - - /* The result is converted to 1.31, Yn1 variable is reused */ - Yn1 = acc << shift; - - /* Xn1 = Xn */ - Xn1 = Xn; - - /* Store the output in the destination buffer. */ - *(pOut + 3U) = Yn1; - pOut += 4U; - - /* decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = (blockSize & 0x3U); - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/ - mult_32x32_keep32_R(acc, b0, Xn); - /* acc += b1 * x[n-1] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/ - multAcc_32x32_keep32_R(acc, b1, Xn1); - /* acc += b[2] * x[n-2] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/ - multAcc_32x32_keep32_R(acc, b2, Xn2); - /* acc += a1 * y[n-1] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/ - multAcc_32x32_keep32_R(acc, a1, Yn1); - /* acc += a2 * y[n-2] */ - /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/ - multAcc_32x32_keep32_R(acc, a2, Yn2); - - /* The result is converted to 1.31 */ - acc = acc << shift; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = acc; - - /* Store the output in the destination buffer. */ - *pOut++ = acc; - - /* decrement loop counter */ - sample--; - } - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent stages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset to destination pointer */ - pOut = pDst; - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - } while (--stage); -} - -/** - @} end of BiquadCascadeDF1 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f16.c deleted file mode 100644 index f418259..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f16.c +++ /dev/null @@ -1,166 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_init_f16.c - * Description: Floating-point Biquad cascade DirectFormI(DF1) filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF1 - @{ - */ - -/** - @brief Initialization function for the floating-point Biquad cascade filter. - @param[in,out] S points to an instance of the floating-point Biquad cascade structure. - @param[in] numStages number of 2nd order stages in the filter. - @param[in] pCoeffs points to the filter coefficients. - @param[in] pState points to the state buffer. - @return none - - @par Coefficient and State Ordering - The coefficients are stored in the array pCoeffs in the following order: - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- - @par - where b1x and a1x are the coefficients for the first stage, - b2x and a2x are the coefficients for the second stage, - and so on. The pCoeffs array contains a total of 5*numStages values. - @par - The pState is a pointer to state array. - Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - The state variables are arranged in the pState array as: - 
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-
- The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - The state array has a total length of 4*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - - @par For MVE code, an additional buffer of modified coefficients is required. - Its size is numStages and each element of this buffer has type arm_biquad_mod_coef_f16. - So, its total size is 96*numStages float16_t elements. - - The initialization function which must be used is arm_biquad_cascade_df1_mve_init_f16. - */ - - -void arm_biquad_cascade_df1_init_f16( - arm_biquad_casd_df1_inst_f16 * S, - uint8_t numStages, - const float16_t * pCoeffs, - float16_t * pState) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float16_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -/* - -The computation of the coefficients is done in float32 otherwise the -resulting filter is too different from the expected one. - -*/ -static void generateCoefsFastBiquadF16(float16_t b0, float16_t b1, float16_t b2, float16_t a1, float16_t a2, - arm_biquad_mod_coef_f16 * newCoef) -{ - float32_t coeffs[8][12] = { - {0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, (float32_t)a1, (float32_t)a2}, - {0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, (float32_t)a2, 0.0f}, - {0.0f, 0.0f, 0.0f, 0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f}, - {0.0f, 0.0f, 0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f}, - {0.0f, 0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f}, - {0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f}, - {0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f}, - {(float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f} - }; - - for (int i = 0; i < 12; i++) - { - coeffs[1][i] += ((float32_t)a1 * coeffs[0][i]); - coeffs[2][i] += ((float32_t)a1 * coeffs[1][i]) + ((float32_t)a2 * coeffs[0][i]); - coeffs[3][i] += ((float32_t)a1 * coeffs[2][i]) + ((float32_t)a2 * coeffs[1][i]); - coeffs[4][i] += ((float32_t)a1 * coeffs[3][i]) + ((float32_t)a2 * coeffs[2][i]); - coeffs[5][i] += ((float32_t)a1 * coeffs[4][i]) + ((float32_t)a2 * coeffs[3][i]); - coeffs[6][i] += ((float32_t)a1 * coeffs[5][i]) + ((float32_t)a2 * coeffs[4][i]); - coeffs[7][i] += ((float32_t)a1 * coeffs[6][i]) + ((float32_t)a2 * coeffs[5][i]); - - /* - * transpose - */ - newCoef->coeffs[i][0] = (float16_t) coeffs[0][i]; - newCoef->coeffs[i][1] = (float16_t) coeffs[1][i]; - newCoef->coeffs[i][2] = (float16_t) coeffs[2][i]; - newCoef->coeffs[i][3] = (float16_t) coeffs[3][i]; - newCoef->coeffs[i][4] = (float16_t) coeffs[4][i]; - newCoef->coeffs[i][5] = (float16_t) coeffs[5][i]; - newCoef->coeffs[i][6] = (float16_t) coeffs[6][i]; - newCoef->coeffs[i][7] = (float16_t) coeffs[7][i]; - - } -} - -void arm_biquad_cascade_df1_mve_init_f16(arm_biquad_casd_df1_inst_f16 * S, - uint8_t numStages, - const float16_t * pCoeffs, - arm_biquad_mod_coef_f16 * pCoeffsMod, - float16_t * pState) -{ - arm_biquad_cascade_df1_init_f16(S, numStages, (float16_t *)pCoeffsMod, pState); - - /* Generate SIMD friendly modified coefs */ - for (int i = 0; i < numStages; i++) - { - generateCoefsFastBiquadF16(pCoeffs[0], pCoeffs[1], pCoeffs[2], pCoeffs[3], pCoeffs[4], pCoeffsMod); - pCoeffs += 5; - pCoeffsMod++; - } -} - -#endif - -/** - @} end of BiquadCascadeDF1 group - */ -#endif /* #if defined(ARMfloat16_t_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c deleted file mode 100644 index ae051c3..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c +++ /dev/null @@ -1,146 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_init_f32.c - * Description: Floating-point Biquad cascade DirectFormI(DF1) filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF1 - @{ - */ - -/** - @brief Initialization function for the floating-point Biquad cascade filter. - @param[in,out] S points to an instance of the floating-point Biquad cascade structure. - @param[in] numStages number of 2nd order stages in the filter. - @param[in] pCoeffs points to the filter coefficients. - @param[in] pState points to the state buffer. - @return none - - @par Coefficient and State Ordering - The coefficients are stored in the array pCoeffs in the following order: - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- - @par - where b1x and a1x are the coefficients for the first stage, - b2x and a2x are the coefficients for the second stage, - and so on. The pCoeffs array contains a total of 5*numStages values. - @par - The pState is a pointer to state array. - Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - The state variables are arranged in the pState array as: - 
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-
- The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - The state array has a total length of 4*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - - @par For MVE code, an additional buffer of modified coefficients is required. - Its size is numStages and each element of this buffer has type arm_biquad_mod_coef_f32. - So, its total size is 32*numStages float32_t elements. - - The initialization function which must be used is arm_biquad_cascade_df1_mve_init_f32. - */ - - -void arm_biquad_cascade_df1_init_f32( - arm_biquad_casd_df1_inst_f32 * S, - uint8_t numStages, - const float32_t * pCoeffs, - float32_t * pState) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; -} - - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -static void generateCoefsFastBiquadF32(float32_t b0, float32_t b1, float32_t b2, float32_t a1, float32_t a2, - arm_biquad_mod_coef_f32 * newCoef) -{ - float32_t coeffs[4][8] = { - {0, 0, 0, b0, b1, b2, a1, a2}, - {0, 0, b0, b1, b2, 0, a2, 0}, - {0, b0, b1, b2, 0, 0, 0, 0}, - {b0, b1, b2, 0, 0, 0, 0, 0}, - }; - - for (int i = 0; i < 8; i++) - { - coeffs[1][i] += a1 * coeffs[0][i]; - coeffs[2][i] += a1 * coeffs[1][i] + a2 * coeffs[0][i]; - coeffs[3][i] += a1 * coeffs[2][i] + a2 * coeffs[1][i]; - - /* - * transpose - */ - newCoef->coeffs[i][0] = (float32_t) coeffs[0][i]; - newCoef->coeffs[i][1] = (float32_t) coeffs[1][i]; - newCoef->coeffs[i][2] = (float32_t) coeffs[2][i]; - newCoef->coeffs[i][3] = (float32_t) coeffs[3][i]; - } -} - -void arm_biquad_cascade_df1_mve_init_f32( - arm_biquad_casd_df1_inst_f32 * S, - uint8_t numStages, - const float32_t * pCoeffs, - arm_biquad_mod_coef_f32 * pCoeffsMod, - float32_t * pState) -{ - arm_biquad_cascade_df1_init_f32(S, numStages, (float32_t *)pCoeffsMod, pState); - - /* Generate SIMD friendly modified coefs */ - for (int i = 0; i < numStages; i++) - { - generateCoefsFastBiquadF32(pCoeffs[0], pCoeffs[1], pCoeffs[2], pCoeffs[3], pCoeffs[4], pCoeffsMod); - pCoeffs += 5; - pCoeffsMod++; - } -} -#endif - -/** - @} end of BiquadCascadeDF1 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c deleted file mode 100644 index 755ab4d..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c +++ /dev/null @@ -1,96 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_init_q15.c - * Description: Q15 Biquad cascade DirectFormI(DF1) filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF1 - @{ - */ - -/** - @brief Initialization function for the Q15 Biquad cascade filter. - @param[in,out] S points to an instance of the Q15 Biquad cascade structure. - @param[in] numStages number of 2nd order stages in the filter. - @param[in] pCoeffs points to the filter coefficients. - @param[in] pState points to the state buffer. - @param[in] postShift Shift to be applied to the accumulator result. Varies according to the coefficients format - @return none - - @par Coefficient and State Ordering - The coefficients are stored in the array pCoeffs in the following order: - 
-      {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
-
- @par - where b1x and a1x are the coefficients for the first stage, - b2x and a2x are the coefficients for the second stage, - and so on. The pCoeffs array contains a total of 6*numStages values. - The zero coefficient between b1 and b2 facilities use of 16-bit SIMD instructions on the Cortex-M4. - @par - The state variables are stored in the array pState. - Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - The state variables are arranged in the pState array as: - 
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-
- The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - The state array has a total length of 4*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cascade_df1_init_q15( - arm_biquad_casd_df1_inst_q15 * S, - uint8_t numStages, - const q15_t * pCoeffs, - q15_t * pState, - int8_t postShift) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign postShift to be applied to the output */ - S->postShift = postShift; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of BiquadCascadeDF1 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c deleted file mode 100644 index d6fa86a..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c +++ /dev/null @@ -1,95 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_init_q31.c - * Description: Q31 Biquad cascade DirectFormI(DF1) filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF1 - @{ - */ - -/** - @brief Initialization function for the Q31 Biquad cascade filter. - @param[in,out] S points to an instance of the Q31 Biquad cascade structure. - @param[in] numStages number of 2nd order stages in the filter. - @param[in] pCoeffs points to the filter coefficients. - @param[in] pState points to the state buffer. - @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format - @return none - - @par Coefficient and State Ordering - The coefficients are stored in the array pCoeffs in the following order: - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- @par - where b1x and a1x are the coefficients for the first stage, - b2x and a2x are the coefficients for the second stage, - and so on. The pCoeffs array contains a total of 5*numStages values. - @par - The pState points to state variables array. - Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. - The state variables are arranged in the pState array as: - 
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-
- The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. - The state array has a total length of 4*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cascade_df1_init_q31( - arm_biquad_casd_df1_inst_q31 * S, - uint8_t numStages, - const q31_t * pCoeffs, - q31_t * pState, - int8_t postShift) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign postShift to be applied to the output */ - S->postShift = postShift; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of BiquadCascadeDF1 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c deleted file mode 100644 index 8e55c78..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c +++ /dev/null @@ -1,618 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_q15.c - * Description: Processing function for the Q15 Biquad cascade DirectFormI(DF1) filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF1 - @{ - */ - -/** - @brief Processing function for the Q15 Biquad cascade filter. - @param[in] S points to an instance of the Q15 Biquad cascade structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the location where the output result is written - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - The accumulator is then shifted by postShift bits to truncate the result to 1.15 format by discarding the low 16 bits. - Finally, the result is saturated to 1.15 format. - @remark - Refer to \ref arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_biquad_cascade_df1_q15( - const arm_biquad_casd_df1_inst_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - const q15_t *pIn = pSrc; /* input pointer initialization */ - q15_t *pOut = pDst; /* output pointer initialization */ - int shift; - uint32_t sample, stages = S->numStages; /* loop counters */ - int postShift = S->postShift; - q15x8_t bCoeffs0, bCoeffs1, bCoeffs2, bCoeffs3; /* Coefficients vector */ - q15_t *pState = S->pState; /* pState pointer initialization */ - q15x8_t inVec0; - int64_t acc; - const q15_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q31_t out, out1; - - shift = (15 - postShift) - 32; - - do { - q15_t a2 = pCoeffs[5]; - q15_t a1 = pCoeffs[4]; - - bCoeffs0 = vdupq_n_s16(0); - bCoeffs0[0] = pCoeffs[3]; // b2 - bCoeffs0[1] = pCoeffs[2]; // b1 - bCoeffs0[2] = pCoeffs[0]; // b0 - - uint32_t zero = 0; - bCoeffs1 = bCoeffs0; - bCoeffs1 = vshlcq_s16(bCoeffs1, &zero, 16); - - bCoeffs2 = bCoeffs1; - bCoeffs2 = vshlcq_s16(bCoeffs2, &zero, 16); - - bCoeffs3 = bCoeffs2; - bCoeffs3 = vshlcq_s16(bCoeffs3, &zero, 16); - - bCoeffs0[6] = a2; - bCoeffs0[7] = a1; - bCoeffs1[7] = a2; - bCoeffs1[6] = a1; - - bCoeffs2 = - vsetq_lane_s32(vgetq_lane_s32((q31x4_t) bCoeffs0, 3), (q31x4_t) bCoeffs2, 3); - bCoeffs3 = - vsetq_lane_s32(vgetq_lane_s32((q31x4_t) bCoeffs1, 3), (q31x4_t) bCoeffs3, 3); - - - /* 2 first elements are garbage, will be updated with history */ - inVec0 = vld1q(pIn - 2); - pIn += 2; - - inVec0[0] = pState[1]; - inVec0[1] = pState[0]; - inVec0[6] = pState[3]; - inVec0[7] = pState[2]; - - acc = vmlaldavq(bCoeffs0, inVec0); - acc = sqrshrl_sat48(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - - inVec0[6] = out1; - acc = vmlaldavq(bCoeffs1, inVec0); - acc = sqrshrl_sat48(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - inVec0[7] = out; - *pOut++ = (q15_t) out1; - *pOut++ = (q15_t) out; - - acc = vmlaldavq(bCoeffs2, inVec0); - acc = sqrshrl_sat48(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - - - inVec0[6] = out1; - acc = vmlaldavq(bCoeffs3, inVec0); - acc = sqrshrl_sat48(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - /* - * main loop - */ - sample = (blockSize - 4) >> 2U; - /* preload (efficient scheduling) */ - inVec0 = vld1q(pIn); - pIn += 4; - - /* - * Compute 4 outputs at a time. - */ - while (sample > 0U) { - - inVec0[6] = out1; - inVec0[7] = out; - - /* store */ - *pOut++ = (q15_t) out1; - *pOut++ = (q15_t) out; - - /* - * in { x0 x1 x2 x3 x4 x5 yn2 yn1 } - * x - * bCoeffs0 { b2 b1 b0 0 0 0 a2 a1 } - * - */ - acc = vmlaldavq(bCoeffs0, inVec0); - /* shift + saturate to 16 bit */ - acc = sqrshrl_sat48(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - inVec0[6] = out1; - - /* - * in { x0 x1 x2 x3 x4 x5 y0 yn1 } - * x - * bCoeffs1 { 0 b2 b1 b0 0 0 a1 a2 } - */ - acc = vmlaldavq(bCoeffs1, inVec0); - acc = sqrshrl_sat48(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - *pOut++ = (q15_t) out1; - *pOut++ = (q15_t) out; - - - inVec0[7] = out; - /* - * in { x0 x1 x2 x3 x4 x5 y0 yp1 } - * x - * bCoeffs2 { 0 0 b2 b1 b0 0 a2 a1 } - */ - acc = vmlaldavq(bCoeffs2, inVec0); - acc = sqrshrl_sat48(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - inVec0[6] = out1; - - /* - * in { x0 x1 x2 x3 x4 x5 y0 yp1 } - * x - * bCoeffs2 { 0 0 0 b2 b1 b0 a1 a2 } - */ - acc = vmlaldavq(bCoeffs3, inVec0); - acc = sqrshrl_sat48(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - inVec0 = vld1q(pIn); - pIn += 4; - - /* decrement the loop counter */ - sample--; - } - - *pOut++ = (q15_t) out1; - *pOut++ = (q15_t) out; - - /* - * Tail handling - */ - int32_t loopRemainder = blockSize & 3; - - if (loopRemainder == 3) { - inVec0[6] = out1; - inVec0[7] = out; - - acc = vmlaldavq(bCoeffs0, inVec0); - acc = sqrshrl_sat48(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - inVec0[6] = out1; - - acc = vmlaldavq(bCoeffs1, inVec0); - acc = sqrshrl_sat48(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - *pOut++ = (q15_t) out1; - *pOut++ = (q15_t) out; - - inVec0[7] = out; - acc = vmlaldavq(bCoeffs2, inVec0); - acc = sqrshrl_sat48(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - *pOut++ = (q15_t) out1; - - /* Store the updated state variables back into the pState array */ - pState[0] = vgetq_lane_s16(inVec0, 4); - pState[1] = vgetq_lane_s16(inVec0, 3); - pState[3] = out; - pState[2] = out1; - - } else if (loopRemainder == 2) { - inVec0[6] = out1; - inVec0[7] = out; - - acc = vmlaldavq(bCoeffs0, inVec0); - acc = sqrshrl_sat48(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - inVec0[6] = out1; - - acc = vmlaldavq(bCoeffs1, inVec0); - acc = sqrshrl_sat48(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - *pOut++ = (q15_t) out1; - *pOut++ = (q15_t) out; - - /* Store the updated state variables back into the pState array */ - pState[0] = vgetq_lane_s16(inVec0, 3); - pState[1] = vgetq_lane_s16(inVec0, 2); - pState[3] = out1; - pState[2] = out; - } else if (loopRemainder == 1) { - - inVec0[6] = out1; - inVec0[7] = out; - - acc = vmlaldavq(bCoeffs0, inVec0); - acc = sqrshrl_sat48(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - *pOut++ = (q15_t) out1; - - /* Store the updated state variables back into the pState array */ - pState[0] = vgetq_lane_s16(inVec0, 2); - pState[1] = vgetq_lane_s16(inVec0, 1); - pState[3] = out; - pState[2] = out1; - - - } else { - /* Store the updated state variables back into the pState array */ - pState[0] = vgetq_lane_s16(inVec0, 1); - pState[1] = vgetq_lane_s16(inVec0, 0); - pState[3] = out1; - pState[2] = out; - } - - pState += 4; - pCoeffs += 6; - - /* - * The first stage goes from the input buffer to the output buffer. - * Subsequent stages occur in-place in the output buffer - */ - pIn = pDst; - /* - * Reset to destination pointer - */ - pOut = pDst; - } - while (--stages); -} -#else -void arm_biquad_cascade_df1_q15( - const arm_biquad_casd_df1_inst_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - - -#if defined (ARM_MATH_DSP) - - const q15_t *pIn = pSrc; /* Source pointer */ - q15_t *pOut = pDst; /* Destination pointer */ - q31_t in; /* Temporary variable to hold input value */ - q31_t out; /* Temporary variable to hold output value */ - q31_t b0; /* Temporary variable to hold bo value */ - q31_t b1, a1; /* Filter coefficients */ - q31_t state_in, state_out; /* Filter state variables */ - q31_t acc_l, acc_h; - q63_t acc; /* Accumulator */ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ - uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ - int32_t uShift = (32 - lShift); - - do - { - /* Read the b0 and 0 coefficients using SIMD */ - b0 = read_q15x2_ia ((q15_t **) &pCoeffs); - - /* Read the b1 and b2 coefficients using SIMD */ - b1 = read_q15x2_ia ((q15_t **) &pCoeffs); - - /* Read the a1 and a2 coefficients using SIMD */ - a1 = read_q15x2_ia ((q15_t **) &pCoeffs); - - /* Read the input state values from the state buffer: x[n-1], x[n-2] */ - state_in = read_q15x2_ia (&pState); - - /* Read the output state values from the state buffer: y[n-1], y[n-2] */ - state_out = read_q15x2_da (&pState); - - /* Apply loop unrolling and compute 2 output values simultaneously. */ - /* The variable acc hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - sample = blockSize >> 1U; - - /* First part of the processing with loop unrolling. Compute 2 outputs at a time. - ** a second loop below computes the remaining 1 sample. */ - while (sample > 0U) - { - - /* Read the input */ - in = read_q15x2_ia ((q15_t **) &pIn); - - /* out = b0 * x[n] + 0 * 0 */ - out = __SMUAD(b0, in); - - /* acc += b1 * x[n-1] + b2 * x[n-2] + out */ - acc = __SMLALD(b1, state_in, out); - /* acc += a1 * y[n-1] + a2 * y[n-2] */ - acc = __SMLALD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - out = (uint32_t) acc_l >> lShift | acc_h << uShift; - - out = __SSAT(out, 16); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ - -#ifndef ARM_MATH_BIG_ENDIAN - state_in = __PKHBT(in, state_in, 16); - state_out = __PKHBT(out, state_out, 16); -#else - state_in = __PKHBT(state_in >> 16, (in >> 16), 16); - state_out = __PKHBT(state_out >> 16, (out), 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* out = b0 * x[n] + 0 * 0 */ - out = __SMUADX(b0, in); - /* acc += b1 * x[n-1] + b2 * x[n-2] + out */ - acc = __SMLALD(b1, state_in, out); - /* acc += a1 * y[n-1] + a2 * y[n-2] */ - acc = __SMLALD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - out = (uint32_t) acc_l >> lShift | acc_h << uShift; - - out = __SSAT(out, 16); - - /* Store the output in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16)); -#else - write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ -#ifndef ARM_MATH_BIG_ENDIAN - state_in = __PKHBT(in >> 16, state_in, 16); - state_out = __PKHBT(out, state_out, 16); -#else - state_in = __PKHBT(state_in >> 16, in, 16); - state_out = __PKHBT(state_out >> 16, out, 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement loop counter */ - sample--; - } - - /* If the blockSize is not a multiple of 2, compute any remaining output samples here. - ** No loop unrolling is used. */ - - if ((blockSize & 0x1U) != 0U) - { - /* Read the input */ - in = *pIn++; - - /* out = b0 * x[n] + 0 * 0 */ -#ifndef ARM_MATH_BIG_ENDIAN - out = __SMUAD(b0, in); -#else - out = __SMUADX(b0, in); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* acc = b1 * x[n-1] + b2 * x[n-2] + out */ - acc = __SMLALD(b1, state_in, out); - /* acc += a1 * y[n-1] + a2 * y[n-2] */ - acc = __SMLALD(a1, state_out, acc); - - /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - out = (uint32_t) acc_l >> lShift | acc_h << uShift; - - out = __SSAT(out, 16); - - /* Store the output in the destination buffer. */ - *pOut++ = (q15_t) out; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ - /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ -#ifndef ARM_MATH_BIG_ENDIAN - state_in = __PKHBT(in, state_in, 16); - state_out = __PKHBT(out, state_out, 16); -#else - state_in = __PKHBT(state_in >> 16, in, 16); - state_out = __PKHBT(state_out >> 16, out, 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - } - - /* The first stage goes from the input wire to the output wire. */ - /* Subsequent numStages occur in-place in the output wire */ - pIn = pDst; - - /* Reset the output pointer */ - pOut = pDst; - - /* Store the updated state variables back into the state array */ - write_q15x2_ia (&pState, state_in); - write_q15x2_ia (&pState, state_out); - - /* Decrement loop counter */ - stage--; - - } while (stage > 0U); - -#else - - const q15_t *pIn = pSrc; /* Source pointer */ - q15_t *pOut = pDst; /* Destination pointer */ - q15_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ - q15_t Xn; /* temporary input */ - q63_t acc; /* Accumulator */ - int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - pCoeffs++; // skip the 0 coefficient - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the state values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - - /* The variables acc holds the output value that is computed: - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - sample = blockSize; - - while (sample > 0U) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - /* acc = b0 * x[n] */ - acc = (q31_t) b0 *Xn; - - /* acc += b1 * x[n-1] */ - acc += (q31_t) b1 *Xn1; - /* acc += b[2] * x[n-2] */ - acc += (q31_t) b2 *Xn2; - /* acc += a1 * y[n-1] */ - acc += (q31_t) a1 *Yn1; - /* acc += a2 * y[n-2] */ - acc += (q31_t) a2 *Yn2; - - /* The result is converted to 1.31 */ - acc = __SSAT((acc >> shift), 16); - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = (q15_t) acc; - - /* Store the output in the destination buffer. */ - *pOut++ = (q15_t) acc; - - /* decrement the loop counter */ - sample--; - } - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent stages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset to destination pointer */ - pOut = pDst; - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - } while (--stage); - -#endif /* #if defined (ARM_MATH_DSP) */ - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BiquadCascadeDF1 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c deleted file mode 100644 index 9850229..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c +++ /dev/null @@ -1,510 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df1_q31.c - * Description: Processing function for the Q31 Biquad cascade filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF1 - @{ - */ - -/** - @brief Processing function for the Q31 Biquad cascade filter. - @param[in] S points to an instance of the Q31 Biquad cascade structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around rather than clip. - In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). - After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to - 1.31 format by discarding the low 32 bits. - @remark - Refer to \ref arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_biquad_cascade_df1_q31( - const arm_biquad_casd_df1_inst_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - const q31_t *pIn = pSrc; /* input pointer initialization */ - q31_t *pOut = pDst; /* output pointer initialization */ - int shift; - uint32_t stages = S->numStages; /* loop counters */ - int postShift = S->postShift; - q31x4_t b0Coeffs, b1Coeffs, a0Coeffs, a1Coeffs; /* Coefficients vector */ - q31x4_t stateVec; - q31_t *pState = S->pState; /* pState pointer initialization */ - q31x4_t inVec0; - int64_t acc; - const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q31_t out, out1; - - - shift = (postShift + 1 + 8); - - do { - /* - * Reading the coefficients - * generates : - * Fwd0 { b2 b1 b0 0 } - * Fwd1 { 0 b2 b1 b0 } - * Bwd0 { 0 0 a2 a1 } - * Bwd0 { 0 0 a1 a2 } - * (can be moved in init) - */ - b0Coeffs = vdupq_n_s32(0); - a0Coeffs = vdupq_n_s32(0); - - b0Coeffs[0] = pCoeffs[2]; // b2 - b0Coeffs[1] = pCoeffs[1]; // b1 - b0Coeffs[2] = pCoeffs[0]; // b0 - - b1Coeffs = b0Coeffs; - uint32_t zero = 0; - b1Coeffs = vshlcq_s32(b1Coeffs, &zero, 32); - - a0Coeffs[2] = pCoeffs[4]; - a0Coeffs[3] = pCoeffs[3]; - a1Coeffs = vrev64q_s32(a0Coeffs); - - - /* - * prologue consumes history samples - */ - - /* 2 first elements are garbage, will be updated with history */ - inVec0 = vld1q(pIn - 2); - - inVec0[0] = pState[1]; - inVec0[1] = pState[0]; - - stateVec[2] = pState[3]; - stateVec[3] = pState[2]; - - acc = vrmlaldavhq(b0Coeffs, inVec0); - acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); - acc = lsll(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - stateVec[2] = out; - acc = vrmlaldavhq(b1Coeffs, inVec0); - acc = vrmlaldavhaq(acc, a1Coeffs, stateVec); - - acc = lsll(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - - - inVec0 = vld1q(pIn); - pIn += 2; - - /* - * main loop - */ - uint32_t sample = (blockSize - 2) >> 2U; - /* - * First part of the processing with loop unrolling. - * Compute 4 outputs at a time. - */ - while (sample > 0U) { - - stateVec[3] = out1; - - *pOut++ = out; - *pOut++ = out1; - - /* - * in { x0 x1 x2 x3 } - * x - * b0Coeffs { b2 b1 b0 0 } - */ - acc = vrmlaldavhq(b0Coeffs, inVec0); - /* - * out { 0 0 yn2 yn1 } - * x - * a0Coeffs { 0 0 a2 a1 } - */ - acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); - acc = lsll(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - stateVec[2] = out; - - /* - * in { x0 x1 x2 x3 } - * x - * b0Coeffs { 0 b2 b1 b0 } - */ - acc = vrmlaldavhq(b1Coeffs, inVec0); - /* - * out { 0 0 y0 yn1 } - * x - * a0Coeffs { 0 0 a1 a2 } - */ - acc = vrmlaldavhaq(acc, a1Coeffs, stateVec); - acc = lsll(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - - stateVec[3] = out1; - - inVec0 = vld1q(pIn); - pIn += 2; - - /* unrolled part */ - *pOut++ = out; - *pOut++ = out1; - - acc = vrmlaldavhq(b0Coeffs, inVec0); - acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); - acc = lsll(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - stateVec[2] = out; - - acc = vrmlaldavhq(b1Coeffs, inVec0); - acc = vrmlaldavhaq(acc, a1Coeffs, stateVec); - acc = lsll(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - - inVec0 = vld1q(pIn); - pIn += 2; - - sample--; - } - - *pOut++ = out; - *pOut++ = out1; - - /* - * Tail handling - */ - int32_t loopRemainder = blockSize & 3; - if (loopRemainder == 2) { - /* - * Store the updated state variables back into the pState array - */ - pState[0] = inVec0[1]; - pState[1] = inVec0[0]; - pState[3] = out; - pState[2] = out1; - } else if (loopRemainder == 1) { - stateVec[3] = out1; - - acc = vrmlaldavhq(b0Coeffs, inVec0); - acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); - acc = lsll(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - stateVec[2] = out; - - acc = vrmlaldavhq(b1Coeffs, inVec0); - acc = vrmlaldavhaq(acc, a1Coeffs, stateVec); - acc = lsll(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - - stateVec[3] = out1; - - inVec0 = vld1q(pIn); - pIn += 2; - - *pOut++ = out; - *pOut++ = out1; - - acc = vrmlaldavhq(b0Coeffs, inVec0); - acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); - acc = lsll(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - *pOut++ = out; - - /* - * Store the updated state variables back into the pState array - */ - pState[0] = inVec0[2]; - pState[1] = inVec0[1]; - pState[3] = out1; - pState[2] = out; - } else if (loopRemainder == 0) { - stateVec[3] = out1; - - acc = vrmlaldavhq(b0Coeffs, inVec0); - acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); - acc = lsll(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - stateVec[2] = out; - - acc = vrmlaldavhq(b1Coeffs, inVec0); - acc = vrmlaldavhaq(acc, a1Coeffs, stateVec); - acc = lsll(acc, shift); - out1 = (q31_t) ((acc >> 32) & 0xffffffff); - - *pOut++ = out; - *pOut++ = out1; - - /* - * Store the updated state variables back into the pState array - */ - pState[0] = inVec0[3]; - pState[1] = inVec0[2]; - pState[3] = out; - pState[2] = out1; - } else { - stateVec[3] = out1; - - acc = vrmlaldavhq(b0Coeffs, inVec0); - acc = vrmlaldavhaq(acc, a0Coeffs, stateVec); - acc = lsll(acc, shift); - out = (q31_t) ((acc >> 32) & 0xffffffff); - - *pOut++ = out; - - /* - * Store the updated state variables back into the pState array - */ - pState[0] = inVec0[2]; - pState[1] = inVec0[1]; - pState[3] = out1; - pState[2] = out; - } - - - pCoeffs += 5; - pState += 4; - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent stages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset to destination pointer */ - pOut = pDst; - } - while (--stages); -} -#else -void arm_biquad_cascade_df1_q31( - const arm_biquad_casd_df1_inst_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - const q31_t *pIn = pSrc; /* Source pointer */ - q31_t *pOut = pDst; /* Destination pointer */ - q31_t *pState = S->pState; /* pState pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q63_t acc; /* Accumulator */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q31_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ - q31_t Xn; /* Temporary input */ - uint32_t uShift = ((uint32_t) S->postShift + 1U); - uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ - uint32_t sample, stage = S->numStages; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc_l, acc_h; /* temporary output variables */ -#endif - - do - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* Reading the pState values */ - Xn1 = pState[0]; - Xn2 = pState[1]; - Yn1 = pState[2]; - Yn2 = pState[3]; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Apply loop unrolling and compute 4 output values simultaneously. */ - /* Variable acc hold output values that are being computed: - * - * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] - */ - - /* Loop unrolling: Compute 4 outputs at a time */ - sample = blockSize >> 2U; - - while (sample > 0U) - { - /* Read the first input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2); - - /* The result is converted to 1.31 , Yn2 variable is reused */ - acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */ - acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */ - - /* Apply shift for lower part of acc and upper part of acc */ - Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store output in destination buffer. */ - *pOut++ = Yn2; - - /* Read the second input */ - Xn2 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - acc = ((q63_t) b0 * Xn2) + ((q63_t) b1 * Xn) + ((q63_t) b2 * Xn1) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1); - - /* The result is converted to 1.31, Yn1 variable is reused */ - acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */ - acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */ - - /* Apply shift for lower part of acc and upper part of acc */ - Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store output in destination buffer. */ - *pOut++ = Yn1; - - /* Read the third input */ - Xn1 = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - acc = ((q63_t) b0 * Xn1) + ((q63_t) b1 * Xn2) + ((q63_t) b2 * Xn) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2); - - /* The result is converted to 1.31, Yn2 variable is reused */ - acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */ - acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */ - - /* Apply shift for lower part of acc and upper part of acc */ - Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store output in destination buffer. */ - *pOut++ = Yn2; - - /* Read the forth input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1); - - /* The result is converted to 1.31, Yn1 variable is reused */ - acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */ - acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */ - - /* Apply shift for lower part of acc and upper part of acc */ - Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store output in destination buffer. */ - *pOut++ = Yn1; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - - /* decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = blockSize & 0x3U; - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) - { - /* Read the input */ - Xn = *pIn++; - - /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ - acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2); - - /* The result is converted to 1.31 */ - acc = acc >> lShift; - - /* Store output in destination buffer. */ - *pOut++ = (q31_t) acc; - - /* Every time after the output is computed state should be updated. */ - /* The states should be updated as: */ - /* Xn2 = Xn1 */ - /* Xn1 = Xn */ - /* Yn2 = Yn1 */ - /* Yn1 = acc */ - Xn2 = Xn1; - Xn1 = Xn; - Yn2 = Yn1; - Yn1 = (q31_t) acc; - - /* decrement loop counter */ - sample--; - } - - /* Store the updated state variables back into the pState array */ - *pState++ = Xn1; - *pState++ = Xn2; - *pState++ = Yn1; - *pState++ = Yn2; - - /* The first stage goes from the input buffer to the output buffer. */ - /* Subsequent numStages occur in-place in the output buffer */ - pIn = pDst; - - /* Reset output pointer */ - pOut = pDst; - - /* decrement loop counter */ - stage--; - - } while (stage > 0U); - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BiquadCascadeDF1 group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f16.c deleted file mode 100644 index 12bd531..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f16.c +++ /dev/null @@ -1,494 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df2T_f16.c - * Description: Processing function for floating-point transposed direct form II Biquad cascade filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) -/** - @ingroup groupFilters -*/ - -/** - @addtogroup BiquadCascadeDF2T - @{ - */ - -/** - @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - @param[in] S points to an instance of the filter data structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - -#if (defined(ARM_MATH_MVE_FLOAT16) && defined(ARM_MATH_HELIUM_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_biquad_cascade_df2T_f16( - const arm_biquad_cascade_df2T_instance_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - float16_t *pIn = (float16_t *)pSrc; /* source pointer */ - float16_t Xn0, Xn1; - float16_t acc0, acc1; - float16_t *pOut = pDst; /* destination pointer */ - float16_t *pState = S->pState; /* State pointer */ - uint32_t sample, stage = S->numStages; /* loop counters */ - float16_t const *pCurCoeffs = /* coefficient pointer */ - (float16_t const *) S->pCoeffs; - f16x8_t b0Coeffs, a0Coeffs; /* Coefficients vector */ - f16x8_t b1Coeffs, a1Coeffs; /* Modified coef. vector */ - f16x8_t state; /* State vector */ - - do - { - /* - * temporary carry variable for feeding the 128-bit vector shifter - */ - uint32_t tmp = 0; - /* - * Reading the coefficients - * b0Coeffs = {b0, b1, b2, x, x, x, x, x} - * a0Coeffs = { x, a1, a2, x, x, x, x, x} - */ - b0Coeffs = vld1q(pCurCoeffs); pCurCoeffs += 2; - a0Coeffs = vld1q(pCurCoeffs); pCurCoeffs += 3; - /* - * Reading the state values - * state = {d1, d2, 0, 0, x, x, x, x} - */ - state = *(f16x8_t *) pState; - state = vsetq_lane((float16_t)0.0, state, 2); - state = vsetq_lane((float16_t)0.0, state, 3); - - /* b1Coeffs = {0, b0, b1, b2, x, x, x, x} */ - /* b1Coeffs = { x, x, a1, a2, x, x, x, x} */ - b1Coeffs = (f16x8_t)vshlcq_s16((int16x8_t)b0Coeffs, &tmp, 16); - a1Coeffs = (f16x8_t)vshlcq_s16((int16x8_t)a0Coeffs, &tmp, 16); - - sample = blockSize / 2; - - /* unrolled 2 x */ - while (sample > 0U) - { - /* - * Read 2 inputs - */ - Xn0 = *pIn++; - Xn1 = *pIn++; - - /* - * 1st half: - * / acc1 \ / b0 \ / d1 \ / 0 \ - * | d1 | | b1 | | d2 | | a1 | - * | d2 | | b2 | | 0 | | a2 | - * | x | = | x | * Xn1 + | x | + | x | x acc1 - * ... ... ... ... - * \ x / \ x / \ x / \ x / - */ - - state = vfmaq(state, b0Coeffs, Xn0); - acc0 = vgetq_lane(state, 0); - state = vfmaq(state, a0Coeffs, acc0); - state = vsetq_lane((float16_t)0.0, state, 3); - - /* - * 2nd half: - * same as 1st half, but all vector elements shifted down. - * / x \ / x \ / x \ / x \ - * | acc1 | | b0 | | d1 | | 0 | - * | d1 | | b1 | | d2 | | a1 | - * | d2 | | b2 | | 0 | | a2 | - * | x | = | x | * Xn1 + | x | + | x | x acc1 - * ... ... ... ... - * \ x / \ x / \ x / \ x / - */ - - state = vfmaq(state, b1Coeffs, Xn1); - acc1 = vgetq_lane(state, 1); - state = vfmaq(state, a1Coeffs, acc1); - - /* move d1, d2 up + clearing */ - /* expect dual move or long move */ - state = vsetq_lane(vgetq_lane(state, 2), state, 0); - state = vsetq_lane(vgetq_lane(state, 3), state, 1); - state = vsetq_lane((float16_t)0.0, state, 2); - /* - * Store the results in the destination buffer. - */ - *pOut++ = acc0; - *pOut++ = acc1; - /* - * decrement the loop counter - */ - sample--; - } - - /* compiler does not come back when enabled */ - /* - * tail handling - */ - if (blockSize & 1) - { - Xn0 = *pIn++; - state = vfmaq_n_f16(state, b0Coeffs, Xn0); - acc0 = vgetq_lane(state, 0); - - state = vfmaq_n_f16(state, a0Coeffs, acc0); - *pOut++ = acc0; - *pState++ = vgetq_lane(state, 1); - *pState++ = vgetq_lane(state, 2); - } - else - { - *pState++ = vgetq_lane(state, 0); - *pState++ = vgetq_lane(state, 1); - } - /* - * The current stage input is given as the output to the next stage - */ - pIn = pDst; - /* - * Reset the output working pointer - */ - pOut = pDst; - /* - * decrement the loop counter - */ - stage--; - } - while (stage > 0U); -} -#else - -void arm_biquad_cascade_df2T_f16( - const arm_biquad_cascade_df2T_instance_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - const float16_t *pIn = pSrc; /* Source pointer */ - float16_t *pOut = pDst; /* Destination pointer */ - float16_t *pState = S->pState; /* State pointer */ - const float16_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - _Float16 acc1; /* Accumulator */ - _Float16 b0, b1, b2, a1, a2; /* Filter coefficients */ - _Float16 Xn1; /* Temporary input */ - _Float16 d1, d2; /* State variables */ - uint32_t sample, stage = S->numStages; /* Loop counters */ - - do - { - /* Reading the coefficients */ - b0 = pCoeffs[0]; - b1 = pCoeffs[1]; - b2 = pCoeffs[2]; - a1 = pCoeffs[3]; - a2 = pCoeffs[4]; - - /* Reading the state values */ - d1 = pState[0]; - d2 = pState[1]; - - pCoeffs += 5U; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 16 outputs at a time */ - sample = blockSize >> 4U; - - while (sample > 0U) { - - /* y[n] = b0 * x[n] + d1 */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - /* d2 = b2 * x[n] + a2 * y[n] */ - -/* 1 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 2 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 3 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 4 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 5 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 6 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 7 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 8 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 9 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 10 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 11 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 12 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 13 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 14 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 15 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 16 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - - /* decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = blockSize & 0xFU; - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) { - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - - /* decrement loop counter */ - sample--; - } - - /* Store the updated state variables back into the state array */ - pState[0] = d1; - pState[1] = d2; - - pState += 2U; - - /* The current stage output is given as the input to the next stage */ - pIn = pDst; - - /* Reset the output working pointer */ - pOut = pDst; - - /* decrement loop counter */ - stage--; - - } while (stage > 0U); - -} -#endif /* #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of BiquadCascadeDF2T group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c deleted file mode 100644 index 3565070..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c +++ /dev/null @@ -1,652 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df2T_f32.c - * Description: Processing function for floating-point transposed direct form II Biquad cascade filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters -*/ - -/** - @addtogroup BiquadCascadeDF2T - @{ - */ - -/** - @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - @param[in] S points to an instance of the filter data structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ -#if (defined(ARM_MATH_MVEF) && defined(ARM_MATH_HELIUM_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_helium_utils.h" - -void arm_biquad_cascade_df2T_f32( - const arm_biquad_cascade_df2T_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* source pointer */ - float32_t Xn0, Xn1; - float32_t acc0, acc1; - float32_t *pOut = pDst; /* destination pointer */ - float32_t *pState = S->pState; /* State pointer */ - uint32_t sample, stage = S->numStages; /* loop counters */ - float32_t const *pCurCoeffs = /* coefficient pointer */ - (float32_t const *) S->pCoeffs; - f32x4_t b0Coeffs, a0Coeffs; /* Coefficients vector */ - f32x4_t b1Coeffs, a1Coeffs; /* Modified coef. vector */ - f32x4_t state; /* State vector */ - - do - { - /* - * temporary carry variable for feeding the 128-bit vector shifter - */ - uint32_t tmp = 0; - /* - * Reading the coefficients - * b0Coeffs = {b0, b1, b2, x} - * a0Coeffs = { x, a1, a2, x} - */ - b0Coeffs = vld1q(pCurCoeffs); pCurCoeffs+= 2; - a0Coeffs = vld1q(pCurCoeffs); pCurCoeffs+= 3; - /* - * Reading the state values - * state = {d1, d2, 0, 0} - */ - state = *(f32x4_t *) pState; - state = vsetq_lane(0.0f, state, 2); - state = vsetq_lane(0.0f, state, 3); - - /* b1Coeffs = {b0, b1, b2, x} */ - /* b1Coeffs = { x, x, a1, a2} */ - b1Coeffs = (f32x4_t)vshlcq_s32((int32x4_t)b0Coeffs, &tmp, 32); - a1Coeffs = (f32x4_t)vshlcq_s32((int32x4_t)a0Coeffs, &tmp, 32); - - sample = blockSize / 2; - - /* unrolled 2 x */ - while (sample > 0U) - { - /* - * Read 2 inputs - */ - Xn0 = *pIn++; - Xn1 = *pIn++; - - /* - * 1st half: - * / acc0 \ / b0 \ / d1 \ / 0 \ - * | d1 | = | b1 | * Xn0 + | d2 | + | a1 | x acc0 - * | d2 | | b2 | | 0 | | a2 | - * \ x / \ x / \ x / \ x / - */ - - state = vfmaq(state, b0Coeffs, Xn0); - acc0 = vgetq_lane(state, 0); - state = vfmaq(state, a0Coeffs, acc0); - state = vsetq_lane(0.0f, state, 3); - - /* - * 2nd half: - * same as 1st half, but all vector elements shifted down. - * / x \ / x \ / x \ / x \ - * | acc1 | = | b0 | * Xn1 + | d1 | + | 0 | x acc1 - * | d1 | | b1 | | d2 | | a1 | - * \ d2 / \ b2 / \ 0 / \ a2 / - */ - - state = vfmaq(state, b1Coeffs, Xn1); - acc1 = vgetq_lane(state, 1); - state = vfmaq(state, a1Coeffs, acc1); - - /* move d1, d2 up + clearing */ - /* expect dual move or long move */ - state = vsetq_lane(vgetq_lane(state, 2), state, 0); - state = vsetq_lane(vgetq_lane(state, 3), state, 1); - state = vsetq_lane(0.0f, state, 2); - /* - * Store the results in the destination buffer. - */ - *pOut++ = acc0; - *pOut++ = acc1; - /* - * decrement the loop counter - */ - sample--; - } - - /* - * tail handling - */ - if (blockSize & 1) - { - Xn0 = *pIn++; - state = vfmaq(state, b0Coeffs, Xn0); - acc0 = vgetq_lane(state, 0); - - state = vfmaq(state, a0Coeffs, acc0); - *pOut++ = acc0; - *pState++ = vgetq_lane(state, 1); - *pState++ = vgetq_lane(state, 2); - } - else - { - *pState++ = vgetq_lane(state, 0); - *pState++ = vgetq_lane(state, 1); - } - /* - * The current stage output is given as the input to the next stage - */ - pIn = pDst; - /* - * Reset the output working pointer - */ - pOut = pDst; - /* - * decrement the loop counter - */ - stage--; - } - while (stage > 0U); -} -#else -#if defined(ARM_MATH_NEON) - -void arm_biquad_cascade_df2T_f32( - const arm_biquad_cascade_df2T_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* source pointer */ - float32_t *pOut = pDst; /* destination pointer */ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float32_t acc1; /* accumulator */ - float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ - float32_t Xn1; /* temporary input */ - float32_t d1, d2; /* state variables */ - uint32_t sample, stageCnt,stage = S->numStages; /* loop counters */ - - - float32x4_t XnV, YnV; - float32x4x2_t dV; - float32x4_t zeroV = vdupq_n_f32(0.0); - float32x4_t t1,t2,t3,t4,b1V,b2V,a1V,a2V,s; - - /* Loop unrolling. Compute 4 outputs at a time */ - stageCnt = stage >> 2; - - while (stageCnt > 0U) - { - /* Reading the coefficients */ - t1 = vld1q_f32(pCoeffs); - pCoeffs += 4; - - t2 = vld1q_f32(pCoeffs); - pCoeffs += 4; - - t3 = vld1q_f32(pCoeffs); - pCoeffs += 4; - - t4 = vld1q_f32(pCoeffs); - pCoeffs += 4; - - b1V = vld1q_f32(pCoeffs); - pCoeffs += 4; - - b2V = vld1q_f32(pCoeffs); - pCoeffs += 4; - - a1V = vld1q_f32(pCoeffs); - pCoeffs += 4; - - a2V = vld1q_f32(pCoeffs); - pCoeffs += 4; - - /* Reading the state values */ - dV = vld2q_f32(pState); - - sample = blockSize; - - while (sample > 0U) { - /* y[n] = b0 * x[n] + d1 */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - /* d2 = b2 * x[n] + a2 * y[n] */ - - XnV = vdupq_n_f32(*pIn++); - - s = dV.val[0]; - YnV = s; - - s = vextq_f32(zeroV,dV.val[0],3); - YnV = vmlaq_f32(YnV, t1, s); - - s = vextq_f32(zeroV,dV.val[0],2); - YnV = vmlaq_f32(YnV, t2, s); - - s = vextq_f32(zeroV,dV.val[0],1); - YnV = vmlaq_f32(YnV, t3, s); - - YnV = vmlaq_f32(YnV, t4, XnV); - - s = vextq_f32(XnV,YnV,3); - - dV.val[0] = vmlaq_f32(dV.val[1], s, b1V); - dV.val[0] = vmlaq_f32(dV.val[0], YnV, a1V); - - dV.val[1] = vmulq_f32(s, b2V); - dV.val[1] = vmlaq_f32(dV.val[1], YnV, a2V); - - *pOut++ = vgetq_lane_f32(YnV, 3) ; - - sample--; - } - - /* Store the updated state variables back into the state array */ - vst2q_f32(pState,dV); - pState += 8; - - /* The current stage output is given as the input to the next stage */ - pIn = pDst; - - /*Reset the output working pointer */ - pOut = pDst; - - /* decrement the loop counter */ - stageCnt--; - - } - - /* Tail */ - stageCnt = stage & 3; - - while (stageCnt > 0U) - { - /* Reading the coefficients */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /*Reading the state values */ - d1 = pState[0]; - d2 = pState[1]; - - sample = blockSize; - - while (sample > 0U) - { - /* Read the input */ - Xn1 = *pIn++; - - /* y[n] = b0 * x[n] + d1 */ - acc1 = (b0 * Xn1) + d1; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc1; - - /* Every time after the output is computed state should be updated. */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - d1 = ((b1 * Xn1) + (a1 * acc1)) + d2; - - /* d2 = b2 * x[n] + a2 * y[n] */ - d2 = (b2 * Xn1) + (a2 * acc1); - - /* decrement the loop counter */ - sample--; - } - - /* Store the updated state variables back into the state array */ - *pState++ = d1; - *pState++ = d2; - - /* The current stage output is given as the input to the next stage */ - pIn = pDst; - - /*Reset the output working pointer */ - pOut = pDst; - - /* decrement the loop counter */ - stageCnt--; - } -} -#else - -void arm_biquad_cascade_df2T_f32( - const arm_biquad_cascade_df2T_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* Source pointer */ - float32_t *pOut = pDst; /* Destination pointer */ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t acc1; /* Accumulator */ - float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ - float32_t Xn1; /* Temporary input */ - float32_t d1, d2; /* State variables */ - uint32_t sample, stage = S->numStages; /* Loop counters */ - - do - { - /* Reading the coefficients */ - b0 = pCoeffs[0]; - b1 = pCoeffs[1]; - b2 = pCoeffs[2]; - a1 = pCoeffs[3]; - a2 = pCoeffs[4]; - - /* Reading the state values */ - d1 = pState[0]; - d2 = pState[1]; - - pCoeffs += 5U; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 16 outputs at a time */ - sample = blockSize >> 4U; - - while (sample > 0U) { - - /* y[n] = b0 * x[n] + d1 */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - /* d2 = b2 * x[n] + a2 * y[n] */ - -/* 1 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 2 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 3 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 4 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 5 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 6 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 7 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 8 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 9 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 10 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 11 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 12 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 13 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 14 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 15 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 16 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - - /* decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = blockSize & 0xFU; - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) { - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - - /* decrement loop counter */ - sample--; - } - - /* Store the updated state variables back into the state array */ - pState[0] = d1; - pState[1] = d2; - - pState += 2U; - - /* The current stage output is given as the input to the next stage */ - pIn = pDst; - - /* Reset the output working pointer */ - pOut = pDst; - - /* decrement loop counter */ - stage--; - - } while (stage > 0U); - -} - -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BiquadCascadeDF2T group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c deleted file mode 100644 index f1633dc..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c +++ /dev/null @@ -1,443 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df2T_f64.c - * Description: Processing function for floating-point transposed direct form II Biquad cascade filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters -*/ - -/** - @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure - - This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure. - The filters are implemented as a cascade of second order Biquad sections. - These functions provide a slight memory savings as compared to the direct form I Biquad filter functions. - Only floating-point data is supported. - - This function operate on blocks of input and output data and each call to the function - processes blockSize samples through the filter. - pSrc points to the array of input data and - pDst points to the array of output data. - Both arrays contain blockSize values. - - @par Algorithm - Each Biquad stage implements a second order filter using the difference equation: - 
-     y[n] = b0 * x[n] + d1
-     d1 = b1 * x[n] + a1 * y[n] + d2
-     d2 = b2 * x[n] + a2 * y[n]
-
- where d1 and d2 represent the two state values. - @par - A Biquad filter using a transposed Direct Form II structure is shown below. - \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad" - Coefficients b0, b1, and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. - Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. - Pay careful attention to the sign of the feedback coefficients. - Some design tools flip the sign of the feedback coefficients: - 
-     y[n] = b0 * x[n] + d1;
-     d1 = b1 * x[n] - a1 * y[n] + d2;
-     d2 = b2 * x[n] - a2 * y[n];
-
- In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library. - @par - Higher order filters are realized as a cascade of second order sections. - numStages refers to the number of second order stages used. - For example, an 8th order filter would be realized with numStages=4 second order stages. - A 9th order filter would be realized with numStages=5 second order stages with the - coefficients for one of the stages configured as a first order filter (b2=0 and a2=0). - @par - pState points to the state variable array. - Each Biquad stage has 2 state variables d1 and d2. - The state variables are arranged in the pState array as: - 
-      {d11, d12, d21, d22, ...}
-
- where d1x refers to the state variables for the first Biquad and - d2x refers to the state variables for the second Biquad. - The state array has a total length of 2*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - @par - The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II. - The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types. - That is why the Direct Form I structure supports Q15 and Q31 data types. - The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2. - Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad. - The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage. - - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter. - Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - - @par Init Functions - There is also an associated initialization function. - The initialization function performs following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - numStages, pCoeffs, pState. Also set all of the values in pState to zero. - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - Set the values in the state buffer to zeros before static initialization. - For example, to statically initialize the instance structure use - 
-      arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};
-      arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
-
- where numStages is the number of Biquad stages in the filter; - pState is the address of the state buffer. - pCoeffs is the address of the coefficient buffer; -*/ - -/** - @addtogroup BiquadCascadeDF2T - @{ - */ - -/** - @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - @param[in] S points to an instance of the filter data structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - - -void arm_biquad_cascade_df2T_f64( - const arm_biquad_cascade_df2T_instance_f64 * S, - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize) -{ - - const float64_t *pIn = pSrc; /* Source pointer */ - float64_t *pOut = pDst; /* Destination pointer */ - float64_t *pState = S->pState; /* State pointer */ - const float64_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float64_t acc1; /* Accumulator */ - float64_t b0, b1, b2, a1, a2; /* Filter coefficients */ - float64_t Xn1; /* Temporary input */ - float64_t d1, d2; /* State variables */ - uint32_t sample, stage = S->numStages; /* Loop counters */ - - - do - { - /* Reading the coefficients */ - b0 = pCoeffs[0]; - b1 = pCoeffs[1]; - b2 = pCoeffs[2]; - a1 = pCoeffs[3]; - a2 = pCoeffs[4]; - - /* Reading the state values */ - d1 = pState[0]; - d2 = pState[1]; - - pCoeffs += 5U; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 16 outputs at a time */ - sample = blockSize >> 4U; - - while (sample > 0U) { - - /* y[n] = b0 * x[n] + d1 */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - /* d2 = b2 * x[n] + a2 * y[n] */ - -/* 1 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - - -/* 2 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 3 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 4 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 5 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 6 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 7 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 8 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 9 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 10 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 11 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 12 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 13 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 14 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 15 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - -/* 16 */ - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - - /* decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = blockSize & 0xFU; - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) { - Xn1 = *pIn++; - - acc1 = b0 * Xn1 + d1; - - d1 = b1 * Xn1 + d2; - d1 += a1 * acc1; - - d2 = b2 * Xn1; - d2 += a2 * acc1; - - *pOut++ = acc1; - - /* decrement loop counter */ - sample--; - } - - /* Store the updated state variables back into the state array */ - pState[0] = d1; - pState[1] = d2; - - pState += 2U; - - /* The current stage output is given as the input to the next stage */ - pIn = pDst; - - /* Reset the output working pointer */ - pOut = pDst; - - /* decrement loop counter */ - stage--; - - } while (stage > 0U); - -} - - -/** - @} end of BiquadCascadeDF2T group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f16.c deleted file mode 100644 index 5cbbe56..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f16.c +++ /dev/null @@ -1,114 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df2T_init_f16.c - * Description: Initialization function for floating-point transposed direct form II Biquad cascade filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF2T - @{ - */ - -/** - @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - @param[in,out] S points to an instance of the filter data structure. - @param[in] numStages number of 2nd order stages in the filter. - @param[in] pCoeffs points to the filter coefficients. - @param[in] pState points to the state buffer. - @return none - - @par Coefficient and State Ordering - The coefficients are stored in the array pCoeffs in the following order - in the not Neon version. - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- - @par - where b1x and a1x are the coefficients for the first stage, - b2x and a2x are the coefficients for the second stage, - and so on. The pCoeffs array contains a total of 5*numStages values. - - For Neon version, this array is bigger. If numstages = 4x + y, then the array has size: - 32*x + 5*y - and it must be initialized using the function - arm_biquad_cascade_df2T_compute_coefs_f16 which is taking the - standard array coefficient as parameters. - - But, an array of 8*numstages is a good approximation. - - Then, the initialization can be done with: - 
-                   arm_biquad_cascade_df2T_init_f16(&SNeon, nbCascade, neonCoefs, stateNeon);
-                   arm_biquad_cascade_df2T_compute_coefs_f16(&SNeon,nbCascade,coefs);
-
- - @par In this example, neonCoefs is a bigger array of size 8 * numStages. - coefs is the standard array: - - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- - - @par - The pState is a pointer to state array. - Each Biquad stage has 2 state variables d1, and d2. - The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. - The state array has a total length of 2*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cascade_df2T_init_f16( - arm_biquad_cascade_df2T_instance_f16 * S, - uint8_t numStages, - const float16_t * pCoeffs, - float16_t * pState) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 2 * numStages */ - memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float16_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of BiquadCascadeDF2T group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c deleted file mode 100644 index 7ead878..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c +++ /dev/null @@ -1,214 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df2T_init_f32.c - * Description: Initialization function for floating-point transposed direct form II Biquad cascade filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF2T - @{ - */ - - - -#if defined(ARM_MATH_NEON) -/** - @brief Compute new coefficient arrays for use in vectorized filter (Neon only). - @param[in] numStages number of 2nd order stages in the filter. - @param[in] pCoeffs points to the original filter coefficients. - @param[in] pComputedCoeffs points to the new computed coefficients for the vectorized Neon version. - @return none - - @par Size of coefficient arrays: - pCoeffs has size 5 * numStages - - pComputedCoeffs has size 8 * numStages - - pComputedCoeffs is the array to be used in arm_biquad_cascade_df2T_init_f32. - -*/ -void arm_biquad_cascade_df2T_compute_coefs_f32( - uint8_t numStages, - const float32_t * pCoeffs, - float32_t * pComputedCoeffs) -{ - uint8_t cnt; - float32_t b0[4],b1[4],b2[4],a1[4],a2[4]; - - cnt = numStages >> 2; - while(cnt > 0) - { - for(int i=0;i<4;i++) - { - b0[i] = pCoeffs[0]; - b1[i] = pCoeffs[1]; - b2[i] = pCoeffs[2]; - a1[i] = pCoeffs[3]; - a2[i] = pCoeffs[4]; - pCoeffs += 5; - } - - /* Vec 1 */ - *pComputedCoeffs++ = 0; - *pComputedCoeffs++ = b0[1]; - *pComputedCoeffs++ = b0[2]; - *pComputedCoeffs++ = b0[3]; - - /* Vec 2 */ - *pComputedCoeffs++ = 0; - *pComputedCoeffs++ = 0; - *pComputedCoeffs++ = b0[1] * b0[2]; - *pComputedCoeffs++ = b0[2] * b0[3]; - - /* Vec 3 */ - *pComputedCoeffs++ = 0; - *pComputedCoeffs++ = 0; - *pComputedCoeffs++ = 0; - *pComputedCoeffs++ = b0[1] * b0[2] * b0[3]; - - /* Vec 4 */ - *pComputedCoeffs++ = b0[0]; - *pComputedCoeffs++ = b0[0] * b0[1]; - *pComputedCoeffs++ = b0[0] * b0[1] * b0[2]; - *pComputedCoeffs++ = b0[0] * b0[1] * b0[2] * b0[3]; - - /* Vec 5 */ - *pComputedCoeffs++ = b1[0]; - *pComputedCoeffs++ = b1[1]; - *pComputedCoeffs++ = b1[2]; - *pComputedCoeffs++ = b1[3]; - - /* Vec 6 */ - *pComputedCoeffs++ = b2[0]; - *pComputedCoeffs++ = b2[1]; - *pComputedCoeffs++ = b2[2]; - *pComputedCoeffs++ = b2[3]; - - /* Vec 7 */ - *pComputedCoeffs++ = a1[0]; - *pComputedCoeffs++ = a1[1]; - *pComputedCoeffs++ = a1[2]; - *pComputedCoeffs++ = a1[3]; - - /* Vec 8 */ - *pComputedCoeffs++ = a2[0]; - *pComputedCoeffs++ = a2[1]; - *pComputedCoeffs++ = a2[2]; - *pComputedCoeffs++ = a2[3]; - - cnt--; - } - - cnt = numStages & 0x3; - while(cnt > 0) - { - *pComputedCoeffs++ = *pCoeffs++; - *pComputedCoeffs++ = *pCoeffs++; - *pComputedCoeffs++ = *pCoeffs++; - *pComputedCoeffs++ = *pCoeffs++; - *pComputedCoeffs++ = *pCoeffs++; - cnt--; - } - -} -#endif - -/** - @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - @param[in,out] S points to an instance of the filter data structure. - @param[in] numStages number of 2nd order stages in the filter. - @param[in] pCoeffs points to the filter coefficients. - @param[in] pState points to the state buffer. - @return none - - @par Coefficient and State Ordering - The coefficients are stored in the array pCoeffs in the following order - in the not Neon version. - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- - @par - where b1x and a1x are the coefficients for the first stage, - b2x and a2x are the coefficients for the second stage, - and so on. The pCoeffs array contains a total of 5*numStages values. - - For Neon version, this array is bigger. If numstages = 4x + y, then the array has size: - 32*x + 5*y - and it must be initialized using the function - arm_biquad_cascade_df2T_compute_coefs_f32 which is taking the - standard array coefficient as parameters. - - But, an array of 8*numstages is a good approximation. - - Then, the initialization can be done with: - 
-                   arm_biquad_cascade_df2T_compute_coefs_f32(nbCascade,coefs,computedCoefs);
-                   arm_biquad_cascade_df2T_init_f32(&SNeon, nbCascade, computedCoefs, stateNeon);
-
- - @par In this example, computedCoefs is a bigger array of size 8 * numStages. - coefs is the standard array: - - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- - - @par - The pState is a pointer to state array. - Each Biquad stage has 2 state variables d1, and d2. - The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. - The state array has a total length of 2*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - */ -void arm_biquad_cascade_df2T_init_f32( - arm_biquad_cascade_df2T_instance_f32 * S, - uint8_t numStages, - const float32_t * pCoeffs, - float32_t * pState) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 2 * numStages */ - memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of BiquadCascadeDF2T group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c deleted file mode 100644 index f4d393c..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c +++ /dev/null @@ -1,86 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_df2T_init_f64.c - * Description: Initialization function for floating-point transposed direct form II Biquad cascade filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF2T - @{ - */ - -/** - @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - @param[in,out] S points to an instance of the filter data structure - @param[in] numStages number of 2nd order stages in the filter - @param[in] pCoeffs points to the filter coefficients - @param[in] pState points to the state buffer - @return none - - @par Coefficient and State Ordering - The coefficients are stored in the array pCoeffs in the following order: - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- @par - where b1x and a1x are the coefficients for the first stage, - b2x and a2x are the coefficients for the second stage, - and so on. The pCoeffs array contains a total of 5*numStages values. - @par - The pState is a pointer to state array. - Each Biquad stage has 2 state variables d1, and d2. - The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. - The state array has a total length of 2*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cascade_df2T_init_f64( - arm_biquad_cascade_df2T_instance_f64 * S, - uint8_t numStages, - const float64_t * pCoeffs, - float64_t * pState) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 2 * numStages */ - memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float64_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of BiquadCascadeDF2T group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f16.c deleted file mode 100644 index 70099d9..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f16.c +++ /dev/null @@ -1,434 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_stereo_df2T_f16.c - * Description: Processing function for floating-point transposed direct form II Biquad cascade filter. 2 channels - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) -/** - @ingroup groupFilters -*/ - -/** - @addtogroup BiquadCascadeDF2T - @{ - */ - -/** - @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - @param[in] S points to an instance of the filter data structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H) -#pragma GCC warning "Scalar version of arm_biquad_cascade_stereo_df2T_f16 built. Helium version has build issues with gcc." -#endif - -#if (defined(ARM_MATH_MVE_FLOAT16) && defined(ARM_MATH_HELIUM_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) && !defined(__CMSIS_GCC_H) -void arm_biquad_cascade_stereo_df2T_f16( - const arm_biquad_cascade_stereo_df2T_instance_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - float16_t *pIn = (float16_t *)pSrc; /* source pointer */ - float16_t *pOut = pDst; /* destination pointer */ - float16_t *pState = S->pState; /* State pointer */ - const float16_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float16_t b0, b1, b2, a1, a2; /* Filter coefficients */ - uint32_t sample, stage = S->numStages; /* loop counters */ - static const uint16_t idx2[] = {2, 3, 8, 9, 2, 3, 8, 9}; - f16x8_t aCoeffs, bCoeffs; - float16_t scratch[16]; - uint16x8_t loadIdxVec; - uint16x8_t reshufledIdxVec; - uint16_t startIdx = 0; - f16x8_t stateVec0, stateVec1; - f16x8_t inVec; - - /* - * {0, 1, 0, 1, 0, 1, 0, 1} generator - */ - loadIdxVec = viwdupq_u16(startIdx, 2, 1); - reshufledIdxVec = *(uint16x8_t *)&idx2; - - /* - * scratch top clearing - * layout : [d1a d1b d2a d2b d1a d1b d2a d2b 0 0] - */ - scratch[8] = (float16_t)0.0; - scratch[9] = (float16_t)0.0; - - do - { - /* - * Reading the coefficients - */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* aCoeffs = {a1 a1 a2 a2 a1 a1 a2 a2} */ - aCoeffs = vdupq_n_f16(a1); - aCoeffs = vsetq_lane(a2, aCoeffs, 2); - aCoeffs = vsetq_lane(a2, aCoeffs, 3); - aCoeffs = vsetq_lane(a2, aCoeffs, 6); - aCoeffs = vsetq_lane(a2, aCoeffs, 7); - - /* bCoeffs = {b1 b1 b2 b2 b1 b1 b2 b2} */ - bCoeffs = vdupq_n_f16(b1); - bCoeffs = vsetq_lane(b2, bCoeffs, 2); - bCoeffs = vsetq_lane(b2, bCoeffs, 3); - bCoeffs = vsetq_lane(b2, bCoeffs, 6); - bCoeffs = vsetq_lane(b2, bCoeffs, 7); - - /* - * Reading the state values - * Save into scratch - */ - *(f16x8_t *) scratch = *(f16x8_t *) pState; - - sample = blockSize; - - while (sample > 0U) - { - /* - * step 1 - * - * 0 | acc1a = xn1a * b0 + d1a - * 1 | acc1b = xn1b * b0 + d1b - * 2 | acc1a = xn1a * b0 + d1a - * 3 | acc1b = xn1b * b0 + d1b - * 4 | - * 5 | ... - */ - - /* - * load {d1a, d1b, d1a, d1b, d1a, d1b, d1a, d1b} - */ - stateVec0 = vldrhq_gather_shifted_offset((float16_t const *) scratch, loadIdxVec); - /* - * load {in0 in1 in0 in1 in0 in1 in0 in1} - */ - inVec = vldrhq_gather_shifted_offset_f16(pIn, loadIdxVec); - - stateVec0 = vfmaq(stateVec0, inVec, b0); - *pOut++ = vgetq_lane(stateVec0, 0); - *pOut++ = vgetq_lane(stateVec0, 1); - - /* - * step 2 - * - * 0 | d1a = b1 * xn1a + a1 * acc1a + d2a - * 1 | d1b = b1 * xn1b + a1 * acc1b + d2b - * 2 | d2a = b2 * xn1a + a2 * acc1a + 0 - * 3 | d2b = b2 * xn1b + a2 * acc1b + 0 - * 4 | - * 5 | ... - */ - - /* - * load {d2a, d2b, 0, 0, d2a, d2b, 0, 0} - */ - stateVec1 = vldrhq_gather_shifted_offset((float16_t const *) scratch, reshufledIdxVec); - stateVec1 = vfmaq(stateVec1, stateVec0, aCoeffs); - stateVec1 = vfmaq(stateVec1, inVec, bCoeffs); - *(f16x8_t *) scratch = stateVec1; - - pIn = pIn + 2; - sample--; - } - - /* - * Store the updated state variables back into the state array - */ - *pState++ = vgetq_lane(stateVec1, 0); - *pState++ = vgetq_lane(stateVec1, 1); - *pState++ = vgetq_lane(stateVec1, 2); - *pState++ = vgetq_lane(stateVec1, 3); - - /* - * The current stage input is given as the output to the next stage - */ - pIn = pDst; - /* - * Reset the output working pointer - */ - pOut = pDst; - /* - * decrement the loop counter - */ - stage--; - } - while (stage > 0U); -} -#else - -void arm_biquad_cascade_stereo_df2T_f16( - const arm_biquad_cascade_stereo_df2T_instance_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - const float16_t *pIn = pSrc; /* Source pointer */ - float16_t *pOut = pDst; /* Destination pointer */ - float16_t *pState = S->pState; /* State pointer */ - const float16_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - _Float16 acc1a, acc1b; /* Accumulator */ - _Float16 b0, b1, b2, a1, a2; /* Filter coefficients */ - _Float16 Xn1a, Xn1b; /* Temporary input */ - _Float16 d1a, d2a, d1b, d2b; /* State variables */ - uint32_t sample, stage = S->numStages; /* Loop counters */ - - do - { - /* Reading the coefficients */ - b0 = pCoeffs[0]; - b1 = pCoeffs[1]; - b2 = pCoeffs[2]; - a1 = pCoeffs[3]; - a2 = pCoeffs[4]; - - /* Reading the state values */ - d1a = pState[0]; - d2a = pState[1]; - d1b = pState[2]; - d2b = pState[3]; - - pCoeffs += 5U; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 8 outputs at a time */ - sample = blockSize >> 3U; - - while (sample > 0U) { - /* y[n] = b0 * x[n] + d1 */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - /* d2 = b2 * x[n] + a2 * y[n] */ - -/* 1 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 2 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 3 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 4 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 5 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 6 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 7 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 8 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - - /* decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = blockSize & 0x7U; - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) { - /* Read the input */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - /* y[n] = b0 * x[n] + d1 */ - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc1a; - *pOut++ = acc1b; - - /* Every time after the output is computed state should be updated. */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - /* d2 = b2 * x[n] + a2 * y[n] */ - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - - /* decrement loop counter */ - sample--; - } - - /* Store the updated state variables back into the state array */ - pState[0] = d1a; - pState[1] = d2a; - - pState[2] = d1b; - pState[3] = d2b; - - pState += 4U; - - /* The current stage output is given as the input to the next stage */ - pIn = pDst; - - /* Reset the output working pointer */ - pOut = pDst; - - /* Decrement the loop counter */ - stage--; - - } while (stage > 0U); - -} - -#endif /* #if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of BiquadCascadeDF2T group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c deleted file mode 100644 index 8043cea..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c +++ /dev/null @@ -1,420 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_stereo_df2T_f32.c - * Description: Processing function for floating-point transposed direct form II Biquad cascade filter. 2 channels - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters -*/ - -/** - @addtogroup BiquadCascadeDF2T - @{ - */ - -/** - @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - @param[in] S points to an instance of the filter data structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ -#if (defined(ARM_MATH_MVEF) && defined(ARM_MATH_HELIUM_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_helium_utils.h" - -void arm_biquad_cascade_stereo_df2T_f32( - const arm_biquad_cascade_stereo_df2T_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* source pointer */ - float32_t *pOut = pDst; /* destination pointer */ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ - uint32_t sample, stage = S->numStages; /* loop counters */ - float32_t scratch[6]; - uint32x4_t loadIdxVec; - f32x4_t aCoeffs, bCoeffs; - f32x4_t stateVec0, stateVec1; - f32x4_t inVec; - uint32_t startIdx = 0; - - /* - * {0, 1, 0, 1} generator - */ - loadIdxVec = viwdupq_u32(&startIdx, 2, 1); - - /* - * scratch top clearing - * layout : [d1a d1b d2a d2b 0 0] - */ - scratch[4] = 0.0f; - scratch[5] = 0.0f; - - do - { - /* - * Reading the coefficients - */ - b0 = *pCoeffs++; - b1 = *pCoeffs++; - b2 = *pCoeffs++; - a1 = *pCoeffs++; - a2 = *pCoeffs++; - - /* - * aCoeffs = {a1 a1 a2 a2} - */ - aCoeffs = vdupq_n_f32(a1); - aCoeffs = vsetq_lane(a2, aCoeffs, 2); - aCoeffs = vsetq_lane(a2, aCoeffs, 3); - - /* - * bCoeffs = {b1 b1 b2 b2} - */ - bCoeffs = vdupq_n_f32(b1); - bCoeffs = vsetq_lane(b2, bCoeffs, 2); - bCoeffs = vsetq_lane(b2, bCoeffs, 3); - - /* - * Reading the state values - * Save into scratch - */ - *(f32x4_t *) scratch = *(f32x4_t *) pState; - - sample = blockSize; - - while (sample > 0U) - { - /* - * step 1 - * - * 0 | acc1a = xn1a * b0 + d1a - * 1 | acc1b = xn1b * b0 + d1b - * 2 | acc1a = xn1a * b0 + d1a - * 3 | acc1b = xn1b * b0 + d1b - */ - /* - * load {d1a, d1b, d1a, d1b} - */ - stateVec0 = (f32x4_t)vldrwq_gather_shifted_offset((uint32_t const *) scratch, loadIdxVec); - /* - * load {in0 in1 in0 in1} - */ - inVec = (f32x4_t)vldrwq_gather_shifted_offset((uint32_t const *) pIn, loadIdxVec); - - stateVec0 = vfmaq(stateVec0, inVec, b0); - *pOut++ = vgetq_lane(stateVec0, 0); - *pOut++ = vgetq_lane(stateVec0, 1); - - /* - * step 2 - * - * 0 | d1a = b1 * xn1a + a1 * acc1a + d2a - * 1 | d1b = b1 * xn1b + a1 * acc1b + d2b - * 2 | d2a = b2 * xn1a + a2 * acc1a + 0 - * 3 | d2b = b2 * xn1b + a2 * acc1b + 0 - */ - - /* - * load {d2a, d2b, 0, 0} - */ - stateVec1 = *(f32x4_t *) & scratch[2]; - stateVec1 = vfmaq(stateVec1, stateVec0, aCoeffs); - stateVec1 = vfmaq(stateVec1, inVec, bCoeffs); - *(f32x4_t *) scratch = stateVec1; - - pIn = pIn + 2; - sample--; - } - - /* - * Store the updated state variables back into the state array - */ - vst1q(pState, stateVec1); - pState += 4; - - /* - * The current stage output is given as the input to the next stage - */ - pIn = pDst; - /* - * Reset the output working pointer - */ - pOut = pDst; - /* - * decrement the loop counter - */ - stage--; - } - while (stage > 0U); -} - -#else - -void arm_biquad_cascade_stereo_df2T_f32( - const arm_biquad_cascade_stereo_df2T_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* Source pointer */ - float32_t *pOut = pDst; /* Destination pointer */ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t acc1a, acc1b; /* Accumulator */ - float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ - float32_t Xn1a, Xn1b; /* Temporary input */ - float32_t d1a, d2a, d1b, d2b; /* State variables */ - uint32_t sample, stage = S->numStages; /* Loop counters */ - - do - { - /* Reading the coefficients */ - b0 = pCoeffs[0]; - b1 = pCoeffs[1]; - b2 = pCoeffs[2]; - a1 = pCoeffs[3]; - a2 = pCoeffs[4]; - - /* Reading the state values */ - d1a = pState[0]; - d2a = pState[1]; - d1b = pState[2]; - d2b = pState[3]; - - pCoeffs += 5U; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 8 outputs at a time */ - sample = blockSize >> 3U; - - while (sample > 0U) { - /* y[n] = b0 * x[n] + d1 */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - /* d2 = b2 * x[n] + a2 * y[n] */ - -/* 1 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 2 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 3 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 4 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 5 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 6 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 7 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - -/* 8 */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - *pOut++ = acc1a; - *pOut++ = acc1b; - - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - - /* decrement loop counter */ - sample--; - } - - /* Loop unrolling: Compute remaining outputs */ - sample = blockSize & 0x7U; - -#else - - /* Initialize blkCnt with number of samples */ - sample = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (sample > 0U) { - /* Read the input */ - Xn1a = *pIn++; /* Channel a */ - Xn1b = *pIn++; /* Channel b */ - - /* y[n] = b0 * x[n] + d1 */ - acc1a = (b0 * Xn1a) + d1a; - acc1b = (b0 * Xn1b) + d1b; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc1a; - *pOut++ = acc1b; - - /* Every time after the output is computed state should be updated. */ - /* d1 = b1 * x[n] + a1 * y[n] + d2 */ - d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a; - d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b; - - /* d2 = b2 * x[n] + a2 * y[n] */ - d2a = (b2 * Xn1a) + (a2 * acc1a); - d2b = (b2 * Xn1b) + (a2 * acc1b); - - /* decrement loop counter */ - sample--; - } - - /* Store the updated state variables back into the state array */ - pState[0] = d1a; - pState[1] = d2a; - - pState[2] = d1b; - pState[3] = d2b; - - pState += 4U; - - /* The current stage output is given as the input to the next stage */ - pIn = pDst; - - /* Reset the output working pointer */ - pOut = pDst; - - /* Decrement the loop counter */ - stage--; - - } while (stage > 0U); - -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BiquadCascadeDF2T group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f16.c deleted file mode 100644 index 30fefc4..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f16.c +++ /dev/null @@ -1,90 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_stereo_df2T_init_f16.c - * Description: Initialization function for floating-point transposed direct form II Biquad cascade filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF2T - @{ - */ - -/** - @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - @param[in,out] S points to an instance of the filter data structure. - @param[in] numStages number of 2nd order stages in the filter. - @param[in] pCoeffs points to the filter coefficients. - @param[in] pState points to the state buffer. - @return none - - @par Coefficient and State Ordering - The coefficients are stored in the array pCoeffs in the following order: - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- @par - where b1x and a1x are the coefficients for the first stage, - b2x and a2x are the coefficients for the second stage, - and so on. The pCoeffs array contains a total of 5*numStages values. - @par - The pState is a pointer to state array. - Each Biquad stage has 2 state variables d1, and d2 for each channel. - The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. - The state array has a total length of 2*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cascade_stereo_df2T_init_f16( - arm_biquad_cascade_stereo_df2T_instance_f16 * S, - uint8_t numStages, - const float16_t * pCoeffs, - float16_t * pState) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float16_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of BiquadCascadeDF2T group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c deleted file mode 100644 index bcb29d5..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c +++ /dev/null @@ -1,86 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_biquad_cascade_stereo_df2T_init_f32.c - * Description: Initialization function for floating-point transposed direct form II Biquad cascade filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup BiquadCascadeDF2T - @{ - */ - -/** - @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - @param[in,out] S points to an instance of the filter data structure. - @param[in] numStages number of 2nd order stages in the filter. - @param[in] pCoeffs points to the filter coefficients. - @param[in] pState points to the state buffer. - @return none - - @par Coefficient and State Ordering - The coefficients are stored in the array pCoeffs in the following order: - 
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-
- @par - where b1x and a1x are the coefficients for the first stage, - b2x and a2x are the coefficients for the second stage, - and so on. The pCoeffs array contains a total of 5*numStages values. - @par - The pState is a pointer to state array. - Each Biquad stage has 2 state variables d1, and d2 for each channel. - The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. - The state array has a total length of 2*numStages values. - The state variables are updated after each block of data is processed; the coefficients are untouched. - */ - -void arm_biquad_cascade_stereo_df2T_init_f32( - arm_biquad_cascade_stereo_df2T_instance_f32 * S, - uint8_t numStages, - const float32_t * pCoeffs, - float32_t * pState) -{ - /* Assign filter stages */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always 4 * numStages */ - memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of BiquadCascadeDF2T group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c deleted file mode 100644 index 0888a6a..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c +++ /dev/null @@ -1,964 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_f32.c - * Description: Convolution of floating-point sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup Conv Convolution - - Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector. - Convolution is similar to correlation and is frequently used in filtering and data analysis. - The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types. - The library also provides fast versions of the Q15 and Q31 functions. - - @par Algorithm - Let a[n] and b[n] be sequences of length srcALen and - srcBLen samples respectively. Then the convolution - 
-     c[n] = a[n] * b[n]
-
- @par - is defined as - \image html ConvolutionEquation.gif - @par - Note that c[n] is of length srcALen + srcBLen - 1 and is defined over the interval n=0, 1, 2, ..., srcALen + srcBLen - 2. - pSrcA points to the first input vector of length srcALen and - pSrcB points to the second input vector of length srcBLen. - The output result is written to pDst and the calling function must allocate srcALen+srcBLen-1 words for the result. - @par - Conceptually, when two signals a[n] and b[n] are convolved, - the signal b[n] slides over a[n]. - For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together. - @par - Note that convolution is a commutative operation: - 
-     a[n] * b[n] = b[n] * a[n].
-
- @par - This means that switching the A and B arguments to the convolution functions has no effect. - - @par Fixed-Point Behavior - Convolution requires summing up a large number of intermediate products. - As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. - Refer to the function specific documentation below for further details of the particular algorithm used. - - @par Fast Versions - Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires - the input signals should be scaled down to avoid intermediate overflows. - - @par Opt Versions - Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. - These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions - */ - -/** - @addtogroup Conv - @{ - */ - -/** - @brief Convolution of floating-point sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - @return none - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_filtering.h" - - -void arm_conv_f32( - const float32_t * pSrcA, - uint32_t srcALen, - const float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst) -{ - const float32_t *pIn1 = pSrcA; /* inputA pointer */ - const float32_t *pIn2 = pSrcB; /* inputB pointer */ - /* - * Loop to perform MAC operations according to correlation equation - */ - const float32_t *pX; - const float32_t *pY; - const float32_t *pA; - const float32_t *pB; - int32_t i = 0U, j = 0; /* loop counters */ - int32_t block1, block2, block3; - uint32_t vddupStartIdx = 3; - uint32x4_t decrIdxVec = vddupq_u32(vddupStartIdx, 1); - - if (srcALen < srcBLen) - { - /* - * Initialization to inputB pointer - */ - pIn1 = pSrcB; - /* - * Initialization to the end of inputA pointer - */ - pIn2 = pSrcA; - /* - * Swapping the lengths - */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - } - - block1 = srcBLen - 1; - block2 = srcALen - srcBLen + 1; - block3 = srcBLen - 1; - - pA = pIn1; - pB = pIn2 - 3; - - for (i = 0; i <= block1 - 2; i += 2) - { - uint32_t count = i + 1; - float32_t acc0; - float32_t acc1; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is incrementing for successive accumulators - * Y pointer is incrementing for successive accumulators - */ - MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_F32(acc0, acc1, pX, pY, count); - - *pDst++ = acc0; - *pDst++ = acc1; - pB += 2; - } - - for (; i < block1; i++) - { - uint32_t count = i + 1; - float32_t acc; - - pX = pA; - pY = pB; - MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count); - - *pDst++ = acc; - pB++; - } - - for (i = 0; i <= block2 - 2; i += 2) - { - uint32_t count = srcBLen; - float32_t acc0 = 0; - float32_t acc1 = 0; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_F32(acc0, acc1, pX, pY, count); - *pDst++ = acc0; - *pDst++ = acc1; - pA += 2; - } - if (block2 & 1) - { - uint32_t count = srcBLen; - float32_t acc = 0; - - pX = pA; - pY = pB; - MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count); - - *pDst++ = acc; - pA++; - } - - for (i = block3; i >= 2; i -= 2) - { - int32_t count = i; - float32_t acc0; - float32_t acc1; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is decrementing for successive accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_F32(acc0, acc1, pX, pY, count); - - *pDst++ = acc0; - *pDst++ = acc1; - pA += 2; - } - for (; i >= 1; i--) - { - int32_t count = i; - float32_t acc; - - pX = pA; - pY = pB; - MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count); - - *pDst++ = acc; - pA++; - } -} -#else -void arm_conv_f32( - const float32_t * pSrcA, - uint32_t srcALen, - const float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst) -{ - -#if defined(ARM_MATH_DSP) - - const float32_t *pIn1; /* InputA pointer */ - const float32_t *pIn2; /* InputB pointer */ - float32_t *pOut = pDst; /* Output pointer */ - const float32_t *px; /* Intermediate inputA pointer */ - const float32_t *py; /* Intermediate inputB pointer */ - const float32_t *pSrc1, *pSrc2; /* Intermediate pointers */ - float32_t sum; /* Accumulators */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - - -#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) - float32_t acc0, acc1, acc2, acc3, c0; /* Accumulators */ -#if !defined(ARM_MATH_NEON) - float32_t x0, x1, x2, x3; /* Temporary variables to hold state and coefficient values */ -#endif -#endif - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ -#if defined(ARM_MATH_NEON) - float32x4_t vec1; - float32x4_t vec2; - float32x4_t res = vdupq_n_f32(0) ; - float32x2_t accum = vdup_n_f32(0); -#endif /* #if defined(ARM_MATH_NEON) */ - - /* The first stage starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - -#if defined(ARM_MATH_NEON) - res = vdupq_n_f32(0) ; - accum = vdup_n_f32(0); - - /* Compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - - while (k > 0U) - { - vec1 = vld1q_f32(px); - vec2 = vld1q_f32(py-3); - vec2 = vrev64q_f32(vec2); - vec2 = vcombine_f32(vget_high_f32(vec2), vget_low_f32(vec2)); - - res = vmlaq_f32(res,vec1, vec2); - - /* Increment pointers */ - px += 4; - py -= 4; - - /* Decrement the loop counter */ - k--; - } - - accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); - sum += accum[0] + accum[1]; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count & 3; -#else - while (k > 0U) - { - /* x[0] * y[srcBLen - 1] */ - sum += *px++ * *py--; - - /* x[1] * y[srcBLen - 2] */ - sum += *px++ * *py--; - - /* x[2] * y[srcBLen - 3] */ - sum += *px++ * *py--; - - /* x[3] * y[srcBLen - 4] */ - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#endif /* #if defined(ARM_MATH_NEON) */ - -#else /* defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { - -#if defined(ARM_MATH_NEON) - float32x4_t c; - float32x4_t x1v; - float32x4_t x2v; - float32x4_t x; - float32x4_t res = vdupq_n_f32(0) ; -#endif /* #if defined(ARM_MATH_NEON) */ - -#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize2 >> 2U; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - -#if defined(ARM_MATH_NEON) - res = vdupq_n_f32(0) ; - - x1v = vld1q_f32(px); - x2v = vld1q_f32(px+4); - - do - { - c = vld1q_f32(py-3); - - px += 4; - x = x1v; - res = vmlaq_n_f32(res,x,c[3]); - - x = vextq_f32(x1v,x2v,1); - - res = vmlaq_n_f32(res,x,c[2]); - - x = vextq_f32(x1v,x2v,2); - - res = vmlaq_n_f32(res,x,c[1]); - - x = vextq_f32(x1v,x2v,3); - - res = vmlaq_n_f32(res,x,c[0]); - - py -= 4; - - x1v = x2v ; - x2v = vld1q_f32(px+4); - - } while (--k); - - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen & 0x3; - - x1v = vld1q_f32(px); - px += 4; - - while (k > 0U) - { - /* Read y[srcBLen - 5] sample */ - c0 = *(py--); - - res = vmlaq_n_f32(res,x1v,c0); - - /* Reuse the present samples for the next MAC */ - x1v[0] = x1v[1]; - x1v[1] = x1v[2]; - x1v[2] = x1v[3]; - - x1v[3] = *(px++); - - /* Decrement the loop counter */ - k--; - } - - acc0 = res[0]; - acc1 = res[1]; - acc2 = res[2]; - acc3 = res[3]; - -#else - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *py--; - /* Read x[3] sample */ - x3 = *(px); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 += x0 * c0; - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 += x1 * c0; - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 += x2 * c0; - /* acc3 += x[3] * y[srcBLen - 1] */ - acc3 += x3 * c0; - - /* Read y[srcBLen - 2] sample */ - c0 = *py--; - /* Read x[4] sample */ - x0 = *(px + 1U); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 += x1 * c0; - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 += x2 * c0; - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 += x3 * c0; - /* acc3 += x[4] * y[srcBLen - 2] */ - acc3 += x0 * c0; - - /* Read y[srcBLen - 3] sample */ - c0 = *py--; - /* Read x[5] sample */ - x1 = *(px + 2U); - - /* Perform the multiply-accumulate */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 += x2 * c0; - /* acc1 += x[3] * y[srcBLen - 2] */ - acc1 += x3 * c0; - /* acc2 += x[4] * y[srcBLen - 2] */ - acc2 += x0 * c0; - /* acc3 += x[5] * y[srcBLen - 2] */ - acc3 += x1 * c0; - - /* Read y[srcBLen - 4] sample */ - c0 = *py--; - /* Read x[6] sample */ - x2 = *(px + 3U); - px += 4U; - - /* Perform the multiply-accumulate */ - /* acc0 += x[3] * y[srcBLen - 4] */ - acc0 += x3 * c0; - /* acc1 += x[4] * y[srcBLen - 4] */ - acc1 += x0 * c0; - /* acc2 += x[5] * y[srcBLen - 4] */ - acc2 += x1 * c0; - /* acc3 += x[6] * y[srcBLen - 4] */ - acc3 += x2 * c0; - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Read y[srcBLen - 5] sample */ - c0 = *py--; - /* Read x[7] sample */ - x3 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += x0 * c0; - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += x1 * c0; - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += x2 * c0; - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 += x3 * c0; - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } -#endif /* #if defined(ARM_MATH_NEON) */ - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc0; - *pOut++ = acc1; - *pOut++ = acc2; - *pOut++ = acc3; - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined (ARM_MATH_NEON)*/ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - -#if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL) - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - -#if defined (ARM_MATH_NEON) - float32x4_t res = vdupq_n_f32(0) ; - float32x4_t x = vdupq_n_f32(0) ; - float32x4_t y = vdupq_n_f32(0) ; - float32x2_t accum = vdup_n_f32(0) ; - - /* First part of the processing. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - x = vld1q_f32(px); - y = vld1q_f32(py-3); - - y = vrev64q_f32(y); - y = vcombine_f32(vget_high_f32(y), vget_low_f32(y)); - - res = vmlaq_f32(res,x,y); - - px += 4 ; - py -= 4 ; - - /* Decrement the loop counter */ - k--; - } - - accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); - sum += accum[0] + accum[1]; - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen & 0x3U; - -#else - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - sum += *px++ * *py--; - sum += *px++ * *py--; - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#endif /* if defined (ARM_MATH_NEON) */ -#else - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) - /* Loop unrolling: Compute 4 outputs at a time */ - k = blockSize3 >> 2U; - -#if defined(ARM_MATH_NEON) - float32x4_t res = vdupq_n_f32(0) ; - float32x4_t x = vdupq_n_f32(0) ; - float32x4_t y = vdupq_n_f32(0) ; - float32x2_t accum = vdup_n_f32(0) ; - - while (k > 0U) - { - x = vld1q_f32(px); - y = vld1q_f32(py-3); - - y = vrev64q_f32(y); - y = vcombine_f32(vget_high_f32(y), vget_low_f32(y)); - - res = vmlaq_f32(res,x,y); - - px += 4 ; - py -= 4 ; - - /* Decrement the loop counter */ - k--; - } - - accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); - sum += accum[0] + accum[1]; - -#else - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } -#endif /* #if defined (ARM_MATH_NEON) */ - - /* Loop unrolling: Compute remaining outputs */ - k = blockSize3 % 0x4U; -#else - - /* Initialize blkCnt with number of samples */ - k = blockSize3; - -#endif /* #if defined (ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL)*/ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else -/* alternate version for CM0_FAMILY */ - - const float32_t *pIn1 = pSrcA; /* InputA pointer */ - const float32_t *pIn2 = pSrcB; /* InputB pointer */ - float32_t sum; /* Accumulator */ - uint32_t i, j; /* Loop counters */ - - /* Loop to calculate convolution for output length number of times */ - for (i = 0U; i < (srcALen + srcBLen - 1U); i++) - { - /* Initialize sum with zero to carry out MAC operations */ - sum = 0.0f; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ( pIn1[j] * pIn2[i - j]); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = sum; - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Conv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c deleted file mode 100644 index a0b20aa..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c +++ /dev/null @@ -1,366 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_fast_opt_q15.c - * Description: Fast Q15 Convolution - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Conv - @{ - */ - -/** - @brief Convolution of Q15 sequences (fast version). - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1 - @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2 - @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen - @return none - - @par Scaling and Overflow Behavior - This fast version uses a 32-bit accumulator with 2.30 format. - The accumulator maintains full precision of the intermediate multiplication results - but provides only a single guard bit. There is no saturation on intermediate additions. - Thus, if the accumulator overflows it wraps around and distorts the result. - The input signals should be scaled down to avoid intermediate overflows. - Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, - as maximum of min(srcALen, srcBLen) number of additions are carried internally. - The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result. - - @remark - Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. - */ - -void arm_conv_fast_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2) -{ - q31_t acc0; /* Accumulators */ - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - q15_t *pOut = pDst; /* Output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ - const q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, k, blkCnt; /* Loop counter */ - uint32_t tapCnt; /* Loop count */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc1, acc2, acc3; /* Accumulators */ - q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */ - q31_t y1, y2; /* State variables */ -#endif - - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Pointer to take end of scratch2 buffer */ - pScr2 = pScratch2 + srcBLen - 1; - - /* points to smaller length sequence */ - px = pIn2; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - /* Copy smaller length input sequence in reverse order into second scratch buffer */ - while (k > 0U) - { - /* copy second buffer in reversal manner */ - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr2-- = *px++; - - /* Decrement loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Assuming scratch1 buffer is aligned by 32-bit */ - /* Fill (srcBLen - 1U) zeros in scratch1 buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1U); - - /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr1, srcALen); - - /* Update pointers */ - pScr1 += srcALen; - - - /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update pointer */ - pScr1 += (srcBLen - 1U); - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - - /* Initialization of pIn2 pointer */ - pIn2 = py; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (srcALen + srcBLen - 1U) >> 2; - - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read next two samples from scratch1 buffer */ - x2 = read_q15x2_ia (&pScr1); - - tapCnt = (srcBLen) >> 2U; - - while (tapCnt > 0U) - { - - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia ((q15_t **) &pIn2); - y2 = read_q15x2_ia ((q15_t **) &pIn2); - - /* multiply and accumulate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumulate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* multiply and accumulate */ - acc0 = __SMLAD(x2, y2, acc0); - acc2 = __SMLAD(x1, y2, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - acc1 = __SMLADX(x3, y2, acc1); - - x2 = read_q15x2_ia (&pScr1); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y2, acc3); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4U; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3U; - - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3U; - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the results in the accumulators in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); -#else - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 4U; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (srcALen + srcBLen - 1U) & 0x3; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (srcALen + srcBLen - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1U; - - while (tapCnt > 0U) - { - - /* Read next two samples from scratch1 buffer */ - acc0 += (*pScr1++ * *pIn2++); - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1U; - - /* apply same above for remaining samples of smaller length sequence */ - while (tapCnt > 0U) - { - - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - Then store the output in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 1U; - } - -} - -/** - @} end of Conv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c deleted file mode 100644 index 02b2852..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c +++ /dev/null @@ -1,663 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_fast_q15.c - * Description: Fast Q15 Convolution - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Conv - @{ - */ - -/** - @brief Convolution of Q15 sequences (fast version). - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1 - @return none - - @par Scaling and Overflow Behavior - This fast version uses a 32-bit accumulator with 2.30 format. - The accumulator maintains full precision of the intermediate multiplication results - but provides only a single guard bit. There is no saturation on intermediate additions. - Thus, if the accumulator overflows it wraps around and distorts the result. - The input signals should be scaled down to avoid intermediate overflows. - Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, - as maximum of min(srcALen, srcBLen) number of additions are carried internally. - The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result. - - @remark - Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. - */ - -void arm_conv_fast_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst) -{ - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - q15_t *pOut = pDst; /* Output pointer */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - const q15_t *px; /* Intermediate inputA pointer */ - const q15_t *py; /* Intermediate inputB pointer */ - const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations less than 4 */ - /* Second part of this stage computes the MAC operations greater than or equal to 4 */ - - /* The first part of the stage starts here */ - while ((count < 4U) && (blockSize1 > 0U)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over number of MAC operations between - * inputA samples and inputB samples */ - k = count; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* The second part of the stage starts here */ - /* The internal loop, over count, is unrolled by 4 */ - /* To, read the last two inputB samples using SIMD: - * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ - py = py - 1; - - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulates */ - /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1U; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + (count - 1U); - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* -------------------- - * Stage2 process - * -------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2U; - - while (blkCnt > 0U) - { - py = py - 1U; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1] samples */ - x0 = read_q15x2 ((q15_t *) px); - /* read x[1], x[2] samples */ - x1 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the last two inputB samples using SIMD: - * y[srcBLen - 1] and y[srcBLen - 2] */ - c0 = read_q15x2_da ((q15_t **) &py); - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLADX(x0, c0, acc0); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLADX(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = read_q15x2 ((q15_t *) px); - - /* Read x[3], x[4] */ - x3 = read_q15x2 ((q15_t *) px + 1); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLADX(x2, c0, acc2); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLADX(x3, c0, acc3); - - /* Read y[srcBLen - 3] and y[srcBLen - 4] */ - c0 = read_q15x2_da ((q15_t **) &py); - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLADX(x2, c0, acc0); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLADX(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = read_q15x2 ((q15_t *) px + 2); - - /* Read x[5], x[6] */ - x1 = read_q15x2 ((q15_t *) px + 3); - px += 4U; - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLADX(x0, c0, acc2); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLADX(x1, c0, acc3); - - } while (--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - if (k == 1U) - { - /* Read y[srcBLen - 5] */ - c0 = *(py+1); - -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - x3 = read_q15x2 ((q15_t *) px); - px++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLADX(x1, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - if (k == 2U) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = read_q15x2 ((q15_t *) py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - } - - if (k == 3U) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = read_q15x2 ((q15_t *) py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - - /* Read y[srcBLen - 7] */ - c0 = *(py-1); -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - x3 = read_q15x2 ((q15_t *) px + 2); - px += 3U; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x1, c0, acc0); - acc1 = __SMLAD(x2, c0, acc1); - acc2 = __SMLADX(x2, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - /* Store the result in the accumulator in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT((acc0 >> 15), (acc1 >> 15), 16)); - write_q15x2_ia (&pOut, __PKHBT((acc2 >> 15), (acc3 >> 15), 16)); -#else - write_q15x2_ia (&pOut, __PKHBT((acc1 >> 15), (acc0 >> 15), 16)); - write_q15x2_ia (&pOut, __PKHBT((acc3 >> 15), (acc2 >> 15), 16)); -#endif /*#ifndef ARM_MATH_BIG_ENDIAN*/ - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4U; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) *px++ * *py--); - sum += ((q31_t) *px++ * *py--); - sum += ((q31_t) *px++ * *py--); - sum += ((q31_t) *px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) *px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) *px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - pIn2 = pSrc2 - 1U; - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations greater than 4 */ - /* Second part of this stage computes the MAC operations less than or equal to 4 */ - - /* The first part of the stage starts here */ - j = blockSize3 >> 2U; - - while ((j > 0U) && (blockSize3 > 0U)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3 >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied - * with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied - * with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1U; - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = blockSize3 % 0x4U; - - while (k > 0U) - { - /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement loop counter */ - blockSize3--; - - j--; - } - - /* The second part of the stage starts here */ - /* SIMD is not used for the next MAC operations, - * so pointer py is updated to read only one sample at a time */ - py = py + 1U; - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the loop counter */ - blockSize3--; - } - -} - -/** - @} end of Conv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c deleted file mode 100644 index f1f30dd..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c +++ /dev/null @@ -1,558 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_fast_q31.c - * Description: Fast Q31 Convolution - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Conv - @{ - */ - -/** - @brief Convolution of Q31 sequences (fast version). - @param[in] pSrcA points to the first input sequence. - @param[in] srcALen length of the first input sequence. - @param[in] pSrcB points to the second input sequence. - @param[in] srcBLen length of the second input sequence. - @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - @return none - - @par Scaling and Overflow Behavior - This function is optimized for speed at the expense of fixed-point precision and overflow protection. - The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. - These intermediate results are accumulated in a 32-bit register in 2.30 format. - Finally, the accumulator is saturated and converted to a 1.31 result. - @par - The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. - In order to avoid overflows completely the input signals must be scaled down. - Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, - as maximum of min(srcALen, srcBLen) number of additions are carried internally. - @remark - Refer to \ref arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. - */ - -void arm_conv_fast_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst) -{ - const q31_t *pIn1; /* InputA pointer */ - const q31_t *pIn2; /* InputB pointer */ - q31_t *pOut = pDst; /* Output pointer */ - const q31_t *px; /* Intermediate inputA pointer */ - const q31_t *py; /* Intermediate inputB pointer */ - const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* x[0] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* x[1] * y[srcBLen - 2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* x[2] * y[srcBLen - 3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* x[3] * y[srcBLen - 4] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2U; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *py--; - /* Read x[3] sample */ - x3 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc3 += x[3] * y[srcBLen - 1] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - - /* Read y[srcBLen - 2] sample */ - c0 = *py--; - /* Read x[4] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc3 += x[4] * y[srcBLen - 2] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32); - - - /* Read y[srcBLen - 3] sample */ - c0 = *py--; - /* Read x[5] sample */ - x1 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc1 += x[3] * y[srcBLen - 3] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc2 += x[4] * y[srcBLen - 3] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc3 += x[5] * y[srcBLen - 3] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32); - - - /* Read y[srcBLen - 4] sample */ - c0 = *py--; - /* Read x[6] sample */ - x2 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[3] * y[srcBLen - 4] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc1 += x[4] * y[srcBLen - 4] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc2 += x[5] * y[srcBLen - 4] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc3 += x[6] * y[srcBLen - 4] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32); - - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Read y[srcBLen - 5] sample */ - c0 = *py--; - /* Read x[7] sample */ - x3 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (acc0 << 1); - *pOut++ = (q31_t) (acc1 << 1); - *pOut++ = (q31_t) (acc2 << 1); - *pOut++ = (q31_t) (acc3 << 1); - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4U; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3 >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = blockSize3 % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement loop counter */ - blockSize3--; - } - -} - -/** - @} end of Conv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c deleted file mode 100644 index 56adc01..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c +++ /dev/null @@ -1,362 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_opt_q15.c - * Description: Convolution of Q15 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Conv - @{ - */ - -/** - @brief Convolution of Q15 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - Both inputs are in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - This approach provides 33 guard bits and there is no risk of overflow. - The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. - @remark - Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function. - */ - -void arm_conv_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2) -{ - q63_t acc0; /* Accumulators */ - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - q15_t *pOut = pDst; /* Output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ - const q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, k, blkCnt; /* Loop counter */ - uint32_t tapCnt; /* Loop count */ - -#if defined (ARM_MATH_LOOPUNROLL) - q63_t acc1, acc2, acc3; /* Accumulators */ - q31_t x1, x2, x3; /* Temporary variables to hold state and coefficient values */ - q31_t y1, y2; /* State variables */ -#endif - - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Pointer to take end of scratch2 buffer */ - pScr2 = pScratch2 + srcBLen - 1; - - /* points to smaller length sequence */ - px = pIn2; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - /* Copy smaller length input sequence in reverse order into second scratch buffer */ - while (k > 0U) - { - /* copy second buffer in reversal manner */ - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr2-- = *px++; - - /* Decrement loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Assuming scratch1 buffer is aligned by 32-bit */ - /* Fill (srcBLen - 1U) zeros in scratch1 buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1U); - - /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr1, srcALen); - - /* Update pointers */ - pScr1 += srcALen; - - - /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update pointer */ - pScr1 += (srcBLen - 1U); - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - - /* Initialization of pIn2 pointer */ - pIn2 = py; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (srcALen + srcBLen - 1U) >> 2; - - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read next two samples from scratch1 buffer */ - x2 = read_q15x2_ia (&pScr1); - - tapCnt = (srcBLen) >> 2U; - - while (tapCnt > 0U) - { - - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia ((q15_t **) &pIn2); - y2 = read_q15x2_ia ((q15_t **) &pIn2); - - /* multiply and accumulate */ - acc0 = __SMLALD(x1, y1, acc0); - acc2 = __SMLALD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumulate */ - acc1 = __SMLALDX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* multiply and accumulate */ - acc0 = __SMLALD(x2, y2, acc0); - acc2 = __SMLALD(x1, y2, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLALDX(x3, y1, acc3); - acc1 = __SMLALDX(x3, y2, acc1); - - x2 = read_q15x2_ia (&pScr1); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLALDX(x3, y2, acc3); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4U; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3U; - - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3U; - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the results in the accumulators in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); -#else - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 4U; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (srcALen + srcBLen - 1U) & 0x3; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (srcALen + srcBLen - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1U; - - while (tapCnt > 0U) - { - - /* Read next two samples from scratch1 buffer */ - acc0 += (*pScr1++ * *pIn2++); - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1U; - - /* apply same above for remaining samples of smaller length sequence */ - while (tapCnt > 0U) - { - - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - Then store the output in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 1U; - } - -} - -/** - @} end of Conv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c deleted file mode 100644 index a2866d3..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c +++ /dev/null @@ -1,360 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_opt_q7.c - * Description: Convolution of Q7 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Conv - @{ - */ - -/** - @brief Convolution of Q7 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 32-bit internal accumulator. - Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. - The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. - The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format. - */ - -void arm_conv_opt_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2) -{ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch */ - q15_t x4; /* Temporary input variable */ - q15_t *py; /* Temporary input2 pointer */ - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - const q7_t *pIn1, *pIn2; /* InputA and inputB pointer */ - uint32_t j, k, blkCnt, tapCnt; /* Loop counter */ - q31_t x1, x2, x3, y1; /* Temporary input variables */ - const q7_t *px; /* Temporary input1 pointer */ - q7_t *pOut = pDst; /* Output pointer */ - q7_t out0, out1, out2, out3; /* Temporary variables */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* points to smaller length sequence */ - px = pIn2 + srcBLen - 1; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) *px--; - *pScr2++ = x4; - x4 = (q15_t) *px--; - *pScr2++ = x4; - x4 = (q15_t) *px--; - *pScr2++ = x4; - x4 = (q15_t) *px--; - *pScr2++ = x4; - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) *px--; - *pScr2++ = x4; - - /* Decrement loop counter */ - k--; - } - - /* Fill (srcBLen - 1U) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1U); - - /* Copy (srcALen) samples in scratch buffer */ - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcALen >> 2U; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcALen % 0x4U; - - while (k > 0U) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update pointer */ - pScr1 += (srcBLen - 1U); - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* Initialization of pIn2 pointer */ - pIn2 = (q7_t *) py; - - pScr2 = py; - - /* Actual convolution process starts here */ - blkCnt = (srcALen + srcBLen - 1U) >> 2U; - - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read next two samples from scratch1 buffer */ - x2 = read_q15x2_ia (&pScr1); - - tapCnt = (srcBLen) >> 2U; - - while (tapCnt > 0U) - { - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia (&pScr2); - - /* multiply and accumulate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumulate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia (&pScr2); - - acc0 = __SMLAD(x2, y1, acc0); - - acc2 = __SMLAD(x1, y1, acc2); - - acc1 = __SMLADX(x3, y1, acc1); - - x2 = read_q15x2_ia (&pScr1); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4U; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3U; - - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pScr2); - acc1 += (*pScr1++ * *pScr2); - acc2 += (*pScr1++ * *pScr2); - acc3 += (*pScr1++ * *pScr2++); - - pScr1 -= 3U; - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - out0 = (q7_t) (__SSAT(acc0 >> 7U, 8)); - out1 = (q7_t) (__SSAT(acc1 >> 7U, 8)); - out2 = (q7_t) (__SSAT(acc2 >> 7U, 8)); - out3 = (q7_t) (__SSAT(acc3 >> 7U, 8)); - - write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3)); - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 4U; - } - - blkCnt = (srcALen + srcBLen - 1U) & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1U; - - while (tapCnt > 0U) - { - acc0 += (*pScr1++ * *pScr2++); - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1U; - - /* apply same above for remaining samples of smaller length sequence */ - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8)); - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 1U; - } - -} - -/** - @} end of Conv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c deleted file mode 100644 index de3230a..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c +++ /dev/null @@ -1,678 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_partial_f32.c - * Description: Partial convolution of floating-point sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup PartialConv Partial Convolution - - Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated. - Each function has two additional arguments. - firstIndex specifies the starting index of the subset of output samples. - numPoints is the number of output samples to compute. - The function computes the output in the range - [firstIndex, ..., firstIndex+numPoints-1]. - The output array pDst contains numPoints values. - - The allowable range of output indices is [0 srcALen+srcBLen-2]. - If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR. - Otherwise the functions return ARM_MATH_SUCCESS. - \note Refer to \ref arm_conv_f32() for details on fixed point behavior. - - @par Fast Versions - Fast versions are supported for Q31 and Q15 of partial convolution. - Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires - the input signals should be scaled down to avoid intermediate overflows. - - @par Opt Versions - Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. - These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of partial convolution - */ - -/** - @addtogroup PartialConv - @{ - */ - -/** - @brief Partial convolution of floating-point sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written - @param[in] firstIndex is the first output sample to start with - @param[in] numPoints is the number of output points to be computed - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2] - */ - -arm_status arm_conv_partial_f32( - const float32_t * pSrcA, - uint32_t srcALen, - const float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ -#if defined (ARM_MATH_DSP) - const float32_t *pIn1 = pSrcA; /* InputA pointer */ - const float32_t *pIn2 = pSrcB; /* InputB pointer */ - float32_t *pOut = pDst; /* Output pointer */ - const float32_t *px; /* Intermediate inputA pointer */ - const float32_t *py; /* Intermediate inputB pointer */ - const float32_t *pSrc1, *pSrc2; /* Intermediate pointers */ - float32_t sum; /* Accumulator */ - uint32_t j, k, count, blkCnt, check; - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - arm_status status; /* Status of Partial convolution */ - -#if defined (ARM_MATH_LOOPUNROLL) - float32_t acc0, acc1, acc2, acc3; /* Accumulator */ - float32_t x0, x1, x2, x3, c0; /* Temporary variables */ -#endif - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; - blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3; - blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints) : 0; - blockSize2 = ((int32_t) check - blockSize3) - (blockSize1 + (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1U + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + firstIndex; - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* x[0] * y[srcBLen - 1] */ - sum += *px++ * *py--; - - /* x[1] * y[srcBLen - 2] */ - sum += *px++ * *py--; - - /* x[2] * y[srcBLen - 3] */ - sum += *px++ * *py--; - - /* x[3] * y[srcBLen - 4] */ - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc1; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) - { - pSrc1 = pIn1 + firstIndex - srcBLen + 1; - } - else - { - pSrc1 = pIn1; - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = ((uint32_t) blockSize2 >> 2U); - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *py--; - /* Read x[3] sample */ - x3 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 += x0 * c0; - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 += x1 * c0; - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 += x2 * c0; - /* acc3 += x[3] * y[srcBLen - 1] */ - acc3 += x3 * c0; - - /* Read y[srcBLen - 2] sample */ - c0 = *py--; - /* Read x[4] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 += x1 * c0; - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 += x2 * c0; - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 += x3 * c0; - /* acc3 += x[4] * y[srcBLen - 2] */ - acc3 += x0 * c0; - - /* Read y[srcBLen - 3] sample */ - c0 = *py--; - /* Read x[5] sample */ - x1 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 += x2 * c0; - /* acc1 += x[3] * y[srcBLen - 2] */ - acc1 += x3 * c0; - /* acc2 += x[4] * y[srcBLen - 2] */ - acc2 += x0 * c0; - /* acc3 += x[5] * y[srcBLen - 2] */ - acc3 += x1 * c0; - - /* Read y[srcBLen - 4] sample */ - c0 = *py--; - /* Read x[6] sample */ - x2 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[3] * y[srcBLen - 4] */ - acc0 += x3 * c0; - /* acc1 += x[4] * y[srcBLen - 4] */ - acc1 += x0 * c0; - /* acc2 += x[5] * y[srcBLen - 4] */ - acc2 += x1 * c0; - /* acc3 += x[6] * y[srcBLen - 4] */ - acc3 += x2 * c0; - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Read y[srcBLen - 5] sample */ - c0 = *py--; - /* Read x[7] sample */ - x3 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += x0 * c0; - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += x1 * c0; - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += x2 * c0; - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 += x3 * c0; - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = acc0; - *pOut++ = acc1; - *pOut++ = acc2; - *pOut++ = acc3; - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (uint32_t) blockSize2 % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += *px++ * *py--; - sum += *px++ * *py--; - sum += *px++ * *py--; - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - if (firstIndex > srcALen) - { - pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U); - } - else - { - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum += *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#else -/* alternate version for CM0_FAMILY */ - - const float32_t *pIn1 = pSrcA; /* InputA pointer */ - const float32_t *pIn2 = pSrcB; /* InputB pointer */ - float32_t sum; /* Accumulator */ - uint32_t i, j; /* Loop counters */ - arm_status status; /* Status of Partial convolution */ - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* Loop to calculate convolution for output length number of values */ - for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0.0f; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ( pIn1[j] * pIn2[i - j]); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = sum; - } - - /* Set status as ARM_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#endif /* defined(ARM_MATH_DSP) */ -} - -/** - @} end of PartialConv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c deleted file mode 100644 index 930d143..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c +++ /dev/null @@ -1,387 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_partial_fast_opt_q15.c - * Description: Fast Q15 Partial convolution - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup PartialConv - @{ - */ - -/** - @brief Partial convolution of Q15 sequences (fast version). - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written - @param[in] firstIndex is the first output sample to start with - @param[in] numPoints is the number of output points to be computed - @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2 - @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen) - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2] - - @remark - Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. - */ - -arm_status arm_conv_partial_fast_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2) -{ - q15_t *pOut = pDst; /* Output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ - q31_t acc0; /* Accumulator */ - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - const q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, k, blkCnt; /* Loop counter */ - uint32_t tapCnt; /* Loop count */ - arm_status status; /* Status variable */ - q31_t x1; /* Temporary variables to hold state and coefficient values */ - q31_t y1; /* State variables */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc1, acc2, acc3; /* Accumulator */ - q31_t x2, x3; /* Temporary variables to hold state and coefficient values */ - q31_t y2; /* State variables */ -#endif - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2 + srcBLen - 1; - - /* points to smaller length sequence */ - px = pIn2; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - /* Copy smaller length input sequence in reverse order into second scratch buffer */ - while (k > 0U) - { - /* copy second buffer in reversal manner */ - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr2-- = *px++; - - /* Decrement loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Assuming scratch1 buffer is aligned by 32-bit */ - /* Fill (srcBLen - 1U) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1U); - - /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr1, srcALen); - - /* Update pointers */ - pScr1 += srcALen; - - /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update pointer */ - pScr1 += (srcBLen - 1U); - - /* Initialization of pIn2 pointer */ - pIn2 = py; - - pScratch1 += firstIndex; - - pOut = pDst + firstIndex; - - /* Actual convolution process starts here */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (numPoints) >> 2; - - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read next two samples from scratch1 buffer */ - x2 = read_q15x2_ia (&pScr1); - - tapCnt = (srcBLen) >> 2U; - - while (tapCnt > 0U) - { - - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia ((q15_t **) &pIn2); - y2 = read_q15x2_ia ((q15_t **) &pIn2); - - /* multiply and accumulate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumulate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* multiply and accumulate */ - acc0 = __SMLAD(x2, y2, acc0); - acc2 = __SMLAD(x1, y2, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - acc1 = __SMLADX(x3, y2, acc1); - - x2 = read_q15x2_ia (&pScr1); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumulate */ - acc3 = __SMLADX(x3, y2, acc3); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4U; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3U; - - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3U; - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the results in the accumulators in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); -#else - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 4U; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numPoints & 0x3; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numPoints; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1U; - - while (tapCnt > 0U) - { - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read two samples from smaller buffer */ - y1 = read_q15x2_ia ((q15_t **) &pIn2); - - /* multiply and accumulate */ - acc0 = __SMLAD(x1, y1, acc0); - - /* Decrement loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1U; - - /* apply same above for remaining samples of smaller length sequence */ - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - ** Then store the output in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 1U; - - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - @} end of PartialConv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c deleted file mode 100644 index fface1a..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c +++ /dev/null @@ -1,707 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_partial_fast_q15.c - * Description: Fast Q15 Partial convolution - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup PartialConv - @{ - */ - -/** - @brief Partial convolution of Q15 sequences (fast version). - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written - @param[in] firstIndex is the first output sample to start with - @param[in] numPoints is the number of output points to be computed - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2] - @remark - Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. - */ - -arm_status arm_conv_partial_fast_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - q15_t *pOut = pDst; /* Output pointer */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - const q15_t *px; /* Intermediate inputA pointer */ - const q15_t *py; /* Intermediate inputB pointer */ - const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* Temporary input variables */ - uint32_t j, k, count, blkCnt, check; - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - arm_status status; /* Status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; - blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3; - blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1U + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations less than 4 */ - /* Second part of this stage computes the MAC operations greater than or equal to 4 */ - - /* The first part of the stage starts here */ - while ((count < 4U) && (blockSize1 > 0)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over number of MAC operations between - * inputA samples and inputB samples */ - k = count; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* The second part of the stage starts here */ - /* The internal loop, over count, is unrolled by 4 */ - /* To, read the last two inputB samples using SIMD: - * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ - py = py - 1; - - while (blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - So, py is incremented by 1 */ - py = py + 1U; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2 - 1U; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) - { - pSrc1 = pIn1 + firstIndex - srcBLen + 1; - } - else - { - pSrc1 = pIn1; - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = ((uint32_t) blockSize2 >> 2U); - - while (blkCnt > 0U) - { - py = py - 1U; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - - /* read x[0], x[1] samples */ - x0 = read_q15x2 ((q15_t *) px); - /* read x[1], x[2] samples */ - x1 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the last two inputB samples using SIMD: - * y[srcBLen - 1] and y[srcBLen - 2] */ - c0 = read_q15x2_da ((q15_t **) &py); - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLADX(x0, c0, acc0); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLADX(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = read_q15x2 ((q15_t *) px); - - /* Read x[3], x[4] */ - x3 = read_q15x2 ((q15_t *) px + 1); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLADX(x2, c0, acc2); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLADX(x3, c0, acc3); - - /* Read y[srcBLen - 3] and y[srcBLen - 4] */ - c0 = read_q15x2_da ((q15_t **) &py); - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLADX(x2, c0, acc0); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLADX(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = read_q15x2 ((q15_t *) px + 2); - - /* Read x[5], x[6] */ - x1 = read_q15x2 ((q15_t *) px + 3); - px += 4U; - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLADX(x0, c0, acc2); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLADX(x1, c0, acc3); - - } while (--k); - - /* For the next MAC operations, SIMD is not used - So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - No loop unrolling is used. */ - k = srcBLen % 0x4U; - - if (k == 1U) - { - /* Read y[srcBLen - 5] */ - c0 = *(py + 1); -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - x3 = read_q15x2 ((q15_t *) px); - px++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLAD (x0, c0, acc0); - acc1 = __SMLAD (x1, c0, acc1); - acc2 = __SMLADX(x1, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - if (k == 2U) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = read_q15x2 ((q15_t *) py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - /* Perform the multiply-accumulate */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - } - - if (k == 3U) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = read_q15x2 ((q15_t *) py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - - /* Perform the multiply-accumulate */ - acc0 = __SMLADX(x0, c0, acc0); - acc1 = __SMLADX(x1, c0, acc1); - acc2 = __SMLADX(x3, c0, acc2); - acc3 = __SMLADX(x2, c0, acc3); - - c0 = *(py-1); -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - x3 = read_q15x2 ((q15_t *) px + 2); - px += 3U; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x1, c0, acc0); - acc1 = __SMLAD (x2, c0, acc1); - acc2 = __SMLADX(x2, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - /* Store the results in the accumulators in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT(acc0 >> 15, acc1 >> 15, 16)); - write_q15x2_ia (&pOut, __PKHBT(acc2 >> 15, acc3 >> 15, 16)); -#else - write_q15x2_ia (&pOut, __PKHBT(acc1 >> 15, acc0 >> 15, 16)); - write_q15x2_ia (&pOut, __PKHBT(acc3 >> 15, acc2 >> 15, 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - No loop unrolling is used. */ - blkCnt = (uint32_t) blockSize2 % 0x4U; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) *px++ * *py--); - sum += ((q31_t) *px++ * *py--); - sum += ((q31_t) *px++ * *py--); - sum += ((q31_t) *px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) *px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) *px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - if (firstIndex > srcALen) - { - pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U); - } - else - { - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - pIn2 = pSrc2 - 1U; - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations greater than 4 */ - /* Second part of this stage computes the MAC operations less than or equal to 4 */ - - /* The first part of the stage starts here */ - j = count >> 2U; - - while ((j > 0U) && (blockSize3 > 0)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied - * with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied - * with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - So, py is incremented by 1 */ - py = py + 1U; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - - j--; - } - - /* The second part of the stage starts here */ - /* SIMD is not used for the next MAC operations, - * so pointer py is updated to read only one sample at a time */ - py = py + 1U; - - while (blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum = __SMLAD(*px++, *py--, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (sum >> 15); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -} - -/** - @} end of PartialConv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c deleted file mode 100644 index a65b972..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c +++ /dev/null @@ -1,625 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_partial_fast_q31.c - * Description: Fast Q31 Partial convolution - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup PartialConv - @{ - */ - -/** - @brief Partial convolution of Q31 sequences (fast version). - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written - @param[in] firstIndex is the first output sample to start with - @param[in] numPoints is the number of output points to be computed - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2] - - @remark - Refer to \ref arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. - */ - -arm_status arm_conv_partial_fast_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ - const q31_t *pIn1; /* InputA pointer */ - const q31_t *pIn2; /* InputB pointer */ - q31_t *pOut = pDst; /* Output pointer */ - const q31_t *px; /* Intermediate inputA pointer */ - const q31_t *py; /* Intermediate inputB pointer */ - const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t sum; /* Accumulators */ - uint32_t j, k, count, check, blkCnt; - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - arm_status status; /* Status of Partial convolution */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - q31_t x0, x1, x2, x3, c0; -#endif - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; - blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3; - blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1U + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* x[0] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* x[1] * y[srcBLen - 2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* x[2] * y[srcBLen - 3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* x[3] * y[srcBLen - 4] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) - { - pSrc1 = pIn1 + firstIndex - srcBLen + 1; - } - else - { - pSrc1 = pIn1; - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = ((uint32_t) blockSize2 >> 2U); - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *py--; - /* Read x[3] sample */ - x3 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc3 += x[3] * y[srcBLen - 1] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Read y[srcBLen - 2] sample */ - c0 = *py--; - /* Read x[4] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc3 += x[4] * y[srcBLen - 2] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read y[srcBLen - 3] sample */ - c0 = *py--; - /* Read x[5] sample */ - x1 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc1 += x[3] * y[srcBLen - 2] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc2 += x[4] * y[srcBLen - 2] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc3 += x[5] * y[srcBLen - 2] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32); - - /* Read y[srcBLen - 4] sample */ - c0 = *py--; - /* Read x[6] sample */ - x2 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[3] * y[srcBLen - 4] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc1 += x[4] * y[srcBLen - 4] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc2 += x[5] * y[srcBLen - 4] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc3 += x[6] * y[srcBLen - 4] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32); - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Read y[srcBLen - 5] sample */ - c0 = *py--; - /* Read x[7] sample */ - x3 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (acc0 << 1); - *pOut++ = (q31_t) (acc1 << 1); - *pOut++ = (q31_t) (acc2 << 1); - *pOut++ = (q31_t) (acc3 << 1); - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (uint32_t) blockSize2 % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) * px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - if (firstIndex > srcALen) - { - pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U); - } - else - { - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py--))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = sum << 1; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -} - -/** - @} end of PartialConv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c deleted file mode 100644 index bf72c7e..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c +++ /dev/null @@ -1,386 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_partial_opt_q15.c - * Description: Partial convolution of Q15 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup PartialConv - @{ - */ - -/** - @brief Partial convolution of Q15 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written - @param[in] firstIndex is the first output sample to start with - @param[in] numPoints is the number of output points to be computed - @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2] - - @remark - Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function. - */ - -arm_status arm_conv_partial_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2) -{ - - q15_t *pOut = pDst; /* Output pointer */ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */ - q63_t acc0; /* Accumulator */ - q31_t x1; /* Temporary variables to hold state and coefficient values */ - q31_t y1; /* State variables */ - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - const q15_t *px; /* Intermediate inputA pointer */ - q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, k, blkCnt; /* Loop counter */ - uint32_t tapCnt; /* Loop count */ - arm_status status; /* Status variable */ - -#if defined (ARM_MATH_LOOPUNROLL) - q63_t acc1, acc2, acc3; /* Accumulator */ - q31_t x2, x3; /* Temporary variables to hold state and coefficient values */ - q31_t y2; /* State variables */ -#endif - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2 + srcBLen - 1; - - /* points to smaller length sequence */ - px = pIn2; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - /* Copy smaller length input sequence in reverse order into second scratch buffer */ - while (k > 0U) - { - /* copy second buffer in reversal manner */ - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - *pScr2-- = *px++; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* copy second buffer in reversal manner for remaining samples */ - *pScr2-- = *px++; - - /* Decrement loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Assuming scratch1 buffer is aligned by 32-bit */ - /* Fill (srcBLen - 1U) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1U); - - /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */ - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr1, srcALen); - - /* Update pointers */ - pScr1 += srcALen; - - /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update pointer */ - pScr1 += (srcBLen - 1U); - - /* Initialization of pIn2 pointer */ - pIn2 = py; - - pScratch1 += firstIndex; - - pOut = pDst + firstIndex; - - /* Actual convolution process starts here */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (numPoints) >> 2; - - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read next two samples from scratch1 buffer */ - x2 = read_q15x2_ia (&pScr1); - - tapCnt = (srcBLen) >> 2U; - - while (tapCnt > 0U) - { - - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia ((q15_t **) &pIn2); - y2 = read_q15x2_ia ((q15_t **) &pIn2); - - /* multiply and accumulate */ - acc0 = __SMLALD(x1, y1, acc0); - acc2 = __SMLALD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumulate */ - acc1 = __SMLALDX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* multiply and accumulate */ - acc0 = __SMLALD(x2, y2, acc0); - acc2 = __SMLALD(x1, y2, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLALDX(x3, y1, acc3); - acc1 = __SMLALDX(x3, y2, acc1); - - x2 = read_q15x2_ia (&pScr1); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLALDX(x3, y2, acc3); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4U; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3U; - - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3U; - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the results in the accumulators in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); -#else - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 4U; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numPoints & 0x3; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numPoints; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1U; - - while (tapCnt > 0U) - { - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read two samples from smaller buffer */ - y1 = read_q15x2_ia ((q15_t **) &pIn2); - - acc0 = __SMLALD(x1, y1, acc0); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1U; - - /* apply same above for remaining samples of smaller length sequence */ - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - ** Then store the output in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch1 += 1U; - - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - @} end of PartialConv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c deleted file mode 100644 index bc54267..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c +++ /dev/null @@ -1,390 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_partial_opt_q7.c - * Description: Partial convolution of Q7 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup PartialConv - @{ - */ - -/** - @brief Partial convolution of Q7 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written - @param[in] firstIndex is the first output sample to start with - @param[in] numPoints is the number of output points to be computed - @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2] - */ - -arm_status arm_conv_partial_opt_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2) -{ - q15_t *pScr2, *pScr1; /* Intermediate pointers for scratch pointers */ - q15_t x4; /* Temporary input variable */ - const q7_t *pIn1, *pIn2; /* InputA and inputB pointer */ - uint32_t j, k, blkCnt, tapCnt; /* Loop counter */ - const q7_t *px; /* Temporary input1 pointer */ - q15_t *py; /* Temporary input2 pointer */ - q31_t acc0, acc1, acc2, acc3; /* Accumulator */ - q31_t x1, x2, x3, y1; /* Temporary input variables */ - arm_status status; - q7_t *pOut = pDst; /* Output pointer */ - q7_t out0, out1, out2, out3; /* Temporary variables */ - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* pointer to take end of scratch2 buffer */ - pScr2 = pScratch2; - - /* points to smaller length sequence */ - px = pIn2 + srcBLen - 1; - - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) *px--; - *pScr2++ = x4; - x4 = (q15_t) *px--; - *pScr2++ = x4; - x4 = (q15_t) *px--; - *pScr2++ = x4; - x4 = (q15_t) *px--; - *pScr2++ = x4; - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) *px--; - *pScr2++ = x4; - - /* Decrement loop counter */ - k--; - } - - /* Initialze temporary scratch pointer */ - pScr1 = pScratch1; - - /* Fill (srcBLen - 1U) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1U); - - /* Copy (srcALen) samples in scratch buffer */ - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcALen >> 2U; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - ** a second loop below copies for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - ** No loop unrolling is used. */ - k = srcALen % 0x4U; - - while (k > 0U) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update pointer */ - pScr1 += (srcBLen - 1U); - - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* Initialization of pIn2 pointer */ - pIn2 = (q7_t *) py; - - pScr2 = py; - - pOut = pDst + firstIndex; - - pScratch1 += firstIndex; - - /* Actual convolution process starts here */ - blkCnt = (numPoints) >> 2; - - while (blkCnt > 0) - { - /* Initialize temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumulators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read next two samples from scratch1 buffer */ - x2 = read_q15x2_ia (&pScr1); - - tapCnt = (srcBLen) >> 2U; - - while (tapCnt > 0U) - { - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia (&pScr2); - - /* multiply and accumulate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumulate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia (&pScr2); - - acc0 = __SMLAD(x2, y1, acc0); - - acc2 = __SMLAD(x1, y1, acc2); - - acc1 = __SMLADX(x3, y1, acc1); - - x2 = read_q15x2_ia (&pScr1); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4U; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3U; - - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pScr2); - acc1 += (*pScr1++ * *pScr2); - acc2 += (*pScr1++ * *pScr2); - acc3 += (*pScr1++ * *pScr2++); - - pScr1 -= 3U; - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - out0 = (q7_t) (__SSAT(acc0 >> 7U, 8)); - out1 = (q7_t) (__SSAT(acc1 >> 7U, 8)); - out2 = (q7_t) (__SSAT(acc2 >> 7U, 8)); - out3 = (q7_t) (__SSAT(acc3 >> 7U, 8)); - - write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3)); - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 4U; - } - - blkCnt = (numPoints) & 0x3; - - /* Calculate convolution for remaining samples of Bigger length sequence */ - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1U; - - while (tapCnt > 0U) - { - - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read two samples from smaller buffer */ - y1 = read_q15x2_ia (&pScr2); - - acc0 = __SMLAD(x1, y1, acc0); - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1U; - - /* apply same above for remaining samples of smaller length sequence */ - while (tapCnt > 0U) - { - - /* accumulate the results */ - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8)); - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 1U; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - return (status); -} - -/** - @} end of PartialConv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c deleted file mode 100644 index 78ae7e7..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c +++ /dev/null @@ -1,759 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_partial_q15.c - * Description: Partial convolution of Q15 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup PartialConv - @{ - */ - -/** - @brief Partial convolution of Q15 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written - @param[in] firstIndex is the first output sample to start with - @param[in] numPoints is the number of output points to be computed - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2] - - @remark - Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function. - @remark - Refer to \ref arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers. - */ - -arm_status arm_conv_partial_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ - -#if defined (ARM_MATH_DSP) - - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - q15_t *pOut = pDst; /* Output pointer */ - q63_t sum, acc0, acc1, acc2, acc3; /* Accumulator */ - const q15_t *px; /* Intermediate inputA pointer */ - const q15_t *py; /* Intermediate inputB pointer */ - const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* Temporary input variables to hold state and coefficient values */ - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt, check; - arm_status status; /* Status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; - blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3; - blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1U + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations less than 4 */ - /* Second part of this stage computes the MAC operations greater than or equal to 4 */ - - /* The first part of the stage starts here */ - while ((count < 4U) && (blockSize1 > 0)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over number of MAC operations between - * inputA samples and inputB samples */ - k = count; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* The second part of the stage starts here */ - /* The internal loop, over count, is unrolled by 4 */ - /* To, read the last two inputB samples using SIMD: - * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ - py = py - 1; - - while (blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1U; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2 - 1U; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) - { - pSrc1 = pIn1 + firstIndex - srcBLen + 1; - } - else - { - pSrc1 = pIn1; - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = ((uint32_t) blockSize2 >> 2U); - - while (blkCnt > 0U) - { - py = py - 1U; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - - /* read x[0], x[1] samples */ - x0 = read_q15x2 ((q15_t *) px); - /* read x[1], x[2] samples */ - x1 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the last two inputB samples using SIMD: - * y[srcBLen - 1] and y[srcBLen - 2] */ - c0 = read_q15x2_da ((q15_t **) &py); - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLALDX(x0, c0, acc0); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLALDX(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = read_q15x2 ((q15_t *) px); - - /* Read x[3], x[4] */ - x3 = read_q15x2 ((q15_t *) px + 1); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLALDX(x2, c0, acc2); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLALDX(x3, c0, acc3); - - /* Read y[srcBLen - 3] and y[srcBLen - 4] */ - c0 = read_q15x2_da ((q15_t **) &py); - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLALDX(x2, c0, acc0); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLALDX(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = read_q15x2 ((q15_t *) px + 2); - - /* Read x[5], x[6] */ - x1 = read_q15x2 ((q15_t *) px + 3); - px += 4U; - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLALDX(x0, c0, acc2); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLALDX(x1, c0, acc3); - - } while (--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - if (k == 1U) - { - /* Read y[srcBLen - 5] */ - c0 = *(py+1); -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - x3 = read_q15x2 ((q15_t *) px); - px++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD (x0, c0, acc0); - acc1 = __SMLALD (x1, c0, acc1); - acc2 = __SMLALDX(x1, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - if (k == 2U) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = read_q15x2 ((q15_t *) py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - /* Perform the multiply-accumulate */ - acc0 = __SMLALDX(x0, c0, acc0); - acc1 = __SMLALDX(x1, c0, acc1); - acc2 = __SMLALDX(x3, c0, acc2); - acc3 = __SMLALDX(x2, c0, acc3); - } - - if (k == 3U) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = read_q15x2 ((q15_t *) py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - - /* Perform the multiply-accumulate */ - acc0 = __SMLALDX(x0, c0, acc0); - acc1 = __SMLALDX(x1, c0, acc1); - acc2 = __SMLALDX(x3, c0, acc2); - acc3 = __SMLALDX(x2, c0, acc3); - - c0 = *(py-1); -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - x3 = read_q15x2 ((q15_t *) px + 2); - px += 3U; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALDX(x1, c0, acc0); - acc1 = __SMLALD (x2, c0, acc1); - acc2 = __SMLALDX(x2, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - /* Store the results in the accumulators in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); -#else - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - No loop unrolling is used. */ - blkCnt = (uint32_t) blockSize2 % 0x4U; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) ((q31_t) *px++ * *py--); - sum += (q63_t) ((q31_t) *px++ * *py--); - sum += (q63_t) ((q31_t) *px++ * *py--); - sum += (q63_t) ((q31_t) *px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) ((q31_t) *px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) ((q31_t) *px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - if (firstIndex > srcALen) - { - pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U); - } - else - { - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - pIn2 = pSrc2 - 1U; - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations greater than 4 */ - /* Second part of this stage computes the MAC operations less than or equal to 4 */ - - /* The first part of the stage starts here */ - j = count >> 2U; - - while ((j > 0U) && (blockSize3 > 0)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied - * with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied - * with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1U; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement MAC count */ - count--; - - /* Decrement loop counter */ - blockSize3--; - - j--; - } - - /* The second part of the stage starts here */ - /* SIMD is not used for the next MAC operations, - * so pointer py is updated to read only one sample at a time */ - py = py + 1U; - - while (blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#else /* #if defined (ARM_MATH_DSP) */ - - const q15_t *pIn1 = pSrcA; /* InputA pointer */ - const q15_t *pIn2 = pSrcB; /* InputB pointer */ - q63_t sum; /* Accumulator */ - uint32_t i, j; /* Loop counters */ - arm_status status; /* Status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* Loop to calculate convolution for output length number of values */ - for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q31_t) pIn1[j] * pIn2[i - j]); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U); - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#endif /* #if defined (ARM_MATH_DSP) */ - -} - -/** - @} end of PartialConv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c deleted file mode 100644 index 9790fa3..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c +++ /dev/null @@ -1,640 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_partial_q31.c - * Description: Partial convolution of Q31 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup PartialConv - @{ - */ - -/** - @brief Partial convolution of Q31 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written - @param[in] firstIndex is the first output sample to start with - @param[in] numPoints is the number of output points to be computed - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2] - - @remark - Refer to \ref arm_conv_partial_fast_q31() for a faster but less precise implementation of this function. - */ - -arm_status arm_conv_partial_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ - -#if defined(ARM_MATH_DSP) - - const q31_t *pIn1; /* InputA pointer */ - const q31_t *pIn2; /* InputB pointer */ - q31_t *pOut = pDst; /* Output pointer */ - const q31_t *px; /* Intermediate inputA pointer */ - const q31_t *py; /* Intermediate inputB pointer */ - const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q63_t sum; /* Accumulator */ - uint32_t j, k, count, blkCnt, check; - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - arm_status status; /* Status of Partial convolution */ - -#if defined (ARM_MATH_LOOPUNROLL) - q63_t acc0, acc1, acc2; /* Accumulator */ - q31_t x0, x1, x2, c0; /* Temporary variables */ -#endif - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; - blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3; - blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1U + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* x[0] * y[srcBLen - 1] */ - sum += (q63_t) *px++ * (*py--); - - /* x[1] * y[srcBLen - 2] */ - sum += (q63_t) *px++ * (*py--); - - /* x[2] * y[srcBLen - 3] */ - sum += (q63_t) *px++ * (*py--); - - /* x[3] * y[srcBLen - 4] */ - sum += (q63_t) *px++ * (*py--); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) *px++ * (*py--); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) - { - pSrc1 = pIn1 + firstIndex - srcBLen + 1; - } - else - { - pSrc1 = pIn1; - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unroll over blkCnt */ - blkCnt = blockSize2 / 3; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - - /* read x[0], x[1] samples */ - x0 = *px++; - x1 = *px++; - - /* Apply loop unrolling and compute 3 MACs simultaneously. */ - k = srcBLen / 3; - - /* First part of the processing with loop unrolling. Compute 3 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 2 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *(py); - - /* Read x[2] sample */ - x2 = *(px); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 += (q63_t) x0 * c0; - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 += (q63_t) x1 * c0; - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 += (q63_t) x2 * c0; - - /* Read y[srcBLen - 2] sample */ - c0 = *(py - 1U); - - /* Read x[3] sample */ - x0 = *(px + 1U); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 += (q63_t) x1 * c0; - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 += (q63_t) x2 * c0; - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 += (q63_t) x0 * c0; - - /* Read y[srcBLen - 3] sample */ - c0 = *(py - 2U); - - /* Read x[4] sample */ - x1 = *(px + 2U); - - /* Perform the multiply-accumulate */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 += (q63_t) x2 * c0; - /* acc1 += x[3] * y[srcBLen - 2] */ - acc1 += (q63_t) x0 * c0; - /* acc2 += x[4] * y[srcBLen - 2] */ - acc2 += (q63_t) x1 * c0; - - - px += 3U; - - py -= 3U; - - } while (--k); - - /* If the srcBLen is not a multiple of 3, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen - (3 * (srcBLen / 3)); - - while (k > 0U) - { - /* Read y[srcBLen - 5] sample */ - c0 = *py--; - /* Read x[7] sample */ - x2 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += (q63_t) x0 * c0; - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += (q63_t) x1 * c0; - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += (q63_t) x2 * c0; - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (acc0 >> 31); - *pOut++ = (q31_t) (acc1 >> 31); - *pOut++ = (q31_t) (acc2 >> 31); - - /* Increment the pointer pIn1 index, count by 3 */ - count += 3U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize2 - 3 * (blockSize2 / 3); - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) *px++ * (*py--); - sum += (q63_t) *px++ * (*py--); - sum += (q63_t) *px++ * (*py--); - sum += (q63_t) *px++ * (*py--); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - if (firstIndex > srcALen) - { - pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U); - } - else - { - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum += (q63_t) *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum += (q63_t) *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum += (q63_t) *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum += (q63_t) *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += (q63_t) *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#else -/* alternate version for CM0_FAMILY */ - - const q31_t *pIn1 = pSrcA; /* InputA pointer */ - const q31_t *pIn2 = pSrcB; /* InputB pointer */ - q63_t sum; /* Accumulator */ - uint32_t i, j; /* Loop counters */ - arm_status status; /* Status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* Loop to calculate convolution for output length number of values */ - for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q63_t) pIn1[j] * pIn2[i - j]); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q31_t) (sum >> 31U); - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} - -/** - @} end of PartialConv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c deleted file mode 100644 index 5de1b49..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c +++ /dev/null @@ -1,759 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_partial_q7.c - * Description: Partial convolution of Q7 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup PartialConv - @{ - */ - -/** - @brief Partial convolution of Q7 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written - @param[in] firstIndex is the first output sample to start with - @param[in] numPoints is the number of output points to be computed - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2] - - @remark - Refer to \ref arm_conv_partial_opt_q7() for a faster implementation of this function. - */ - -arm_status arm_conv_partial_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints) -{ - -#if defined(ARM_MATH_DSP) - - const q7_t *pIn1; /* InputA pointer */ - const q7_t *pIn2; /* InputB pointer */ - q7_t *pOut = pDst; /* Output pointer */ - const q7_t *px; /* Intermediate inputA pointer */ - const q7_t *py; /* Intermediate inputB pointer */ - const q7_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t sum; /* Accumulator */ - uint32_t j, k, count, blkCnt, check; /* Loop counters */ - int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - arm_status status; /* Status of Partial convolution */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc0, acc1, acc2, acc3; /* Accumulator */ - q31_t input1, input2; /* Temporary input variables */ - q15_t in1, in2; /* Temporary input variables */ - q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables to hold state and coefficient values */ -#endif - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* Conditions to check which loopCounter holds - * the first and last indices of the output samples to be calculated. */ - check = firstIndex + numPoints; - blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0; - blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3; - blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex; - blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints) : 0; - blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex); - blockSize2 = (blockSize2 > 0) ? blockSize2 : 0; - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* Set the output pointer to point to the firstIndex - * of the output sample to be calculated. */ - pOut = pDst + firstIndex; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed. - Since the partial convolution starts from firstIndex - Number of Macs to be performed is firstIndex + 1 */ - count = 1U + firstIndex; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + firstIndex; - py = pSrc2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* x[0] , x[1] */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 1] , y[srcBLen - 2] */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* x[0] * y[srcBLen - 1] */ - /* x[1] * y[srcBLen - 2] */ - sum = __SMLAD(input1, input2, sum); - - /* x[2] , x[3] */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 3] , y[srcBLen - 4] */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* x[2] * y[srcBLen - 3] */ - /* x[3] * y[srcBLen - 4] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = ++pSrc2; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) - { - pSrc1 = pIn1 + firstIndex - srcBLen + 1; - } - else - { - pSrc1 = pIn1; - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = ((uint32_t) blockSize2 >> 2U); - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *py--; - /* Read y[srcBLen - 2] sample */ - c1 = *py--; - - /* Read x[3] sample */ - x3 = *px++; - - /* x[0] and x[1] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 1] and y[srcBLen - 2] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[1] and x[2] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[4] sample */ - x0 = *px++; - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLAD(input1, input2, acc3); - - /* Read y[srcBLen - 3] sample */ - c0 = *py--; - /* Read y[srcBLen - 4] sample */ - c1 = *py--; - - /* Read x[5] sample */ - x1 = *px++; - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 3] and y[srcBLen - 4] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[4] and x[5] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[6] sample */ - x2 = *px++; - - /* x[5] and x[6] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLAD(input1, input2, acc3); - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Read y[srcBLen - 5] sample */ - c0 = *py--; - /* Read x[7] sample */ - x3 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += ((q31_t) x0 * c0); - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += ((q31_t) x1 * c0); - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += ((q31_t) x2 * c0); - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 += ((q31_t) x3 * c0); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(acc0 >> 7, 8)); - *pOut++ = (q7_t) (__SSAT(acc1 >> 7, 8)); - *pOut++ = (q7_t) (__SSAT(acc2 >> 7, 8)); - *pOut++ = (q7_t) (__SSAT(acc3 >> 7, 8)); - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (uint32_t) blockSize2 % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - while (k > 0U) - { - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Perform the multiply-accumulate */ - sum = __SMLAD(input1, input2, sum); - - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Perform the multiply-accumulate */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = (uint32_t) blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pSrc1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - if (firstIndex > srcALen) - { - pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U); - } - else - { - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - } - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum = __SMLAD(input1, input2, sum); - - /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += ((q31_t) * px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7, 8)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#else -/* alternate version for CM0_FAMILY */ - - const q7_t *pIn1 = pSrcA; /* InputA pointer */ - const q7_t *pIn2 = pSrcB; /* InputB pointer */ - q31_t sum; /* Accumulator */ - uint32_t i, j; /* Loop counters */ - arm_status status; /* Status of Partial convolution */ - - /* Check for range of output samples to be calculated */ - if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) - { - /* Set status as ARM_MATH_ARGUMENT_ERROR */ - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* Loop to calculate convolution for output length number of values */ - for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q15_t) pIn1[j] * (pIn2[i - j])); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U); - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} - -/** - @} end of PartialConv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c deleted file mode 100644 index d802a92..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c +++ /dev/null @@ -1,858 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_q15.c - * Description: Convolution of Q15 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Conv - @{ - */ - -/** - @brief Convolution of Q15 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - Both inputs are in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - This approach provides 33 guard bits and there is no risk of overflow. - The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. - - @remark - Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function. - @remark - Refer to \ref arm_conv_opt_q15() for a faster implementation of this function using scratch buffers. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_helium_utils.h" -#include "arm_vec_filtering.h" - -void arm_conv_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst) -{ - const q15_t *pIn1 = pSrcA; /* inputA pointer */ - const q15_t *pIn2 = pSrcB; /* inputB pointer */ - /* - * Loop to perform MAC operations according to correlation equation - */ - const q15_t *pX; - const q15_t *pY; - const q15_t *pA; - const q15_t *pB; - int32_t i = 0U, j = 0; /* loop counters */ - int32_t block1, block2, block3; - - - uint16x8_t decrIdxVec = vddupq_u16(7, 1); - - - if (srcALen < srcBLen) - { - /* - * Initialization to inputB pointer - */ - pIn1 = pSrcB; - /* - * Initialization to the end of inputA pointer - */ - pIn2 = pSrcA; - /* - * Swapping the lengths - */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - } - - block1 = srcBLen - 1; - block2 = srcALen - srcBLen + 1; - block3 = srcBLen - 1; - - pA = pIn1; - pB = pIn2 - 7; - - for (i = 0; i <= block1 - 2; i += 2) - { - uint32_t count = i + 1; - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q15(acc0, acc1, pX, pY, count); - *pDst++ = (q15_t) acc0; - *pDst++ = (q15_t) acc1; - pB += 2; - } - for (; i < block1; i++) - { - uint32_t count = i + 1; - int64_t acc = 0LL; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count); - *pDst++ = (q15_t) acc; - pB++; - } - - for (i = 0; i <= block2 - 4; i += 4) - { - uint32_t count = srcBLen; - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - int64_t acc2 = 0LL; - int64_t acc3 = 0LL; - - pX = pA; - pY = pB; - /* - * compute 4 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q15(acc0, acc1, acc2, acc3, pX, pY, count); - *pDst++ = (q15_t) acc0; - *pDst++ = (q15_t) acc1; - *pDst++ = (q15_t) acc2; - *pDst++ = (q15_t) acc3; - - pA += 4; - } - for (; i <= block2 - 2; i += 2) - { - uint32_t count = srcBLen; - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q15(acc0, acc1, pX, pY, count); - *pDst++ = (q15_t) acc0; - *pDst++ = (q15_t) acc1; - - pA += 2; - } - if (block2 & 1) - { - uint32_t count = srcBLen; - int64_t acc = 0LL; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count); - *pDst++ = (q15_t) acc; - pA++; - } - - for (i = block3; i >= 1; i -= 2) - { - uint32_t count = i; - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q15(acc0, acc1, pX, pY, count); - *pDst++ = (q15_t) acc0; - *pDst++ = (q15_t) acc1; - pA += 2; - } - for (; i >= 1; i--) - { - uint32_t count = i; - int64_t acc = 0LL; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count); - *pDst++ = (q15_t) acc; - pA++; - } -} -#else -void arm_conv_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst) -{ - -#if defined (ARM_MATH_DSP) - - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - q15_t *pOut = pDst; /* Output pointer */ - q63_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - const q15_t *px; /* Intermediate inputA pointer */ - const q15_t *py; /* Intermediate inputB pointer */ - const q15_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* Temporary input variables to hold state and coefficient values */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations less than 4 */ - /* Second part of this stage computes the MAC operations greater than or equal to 4 */ - - /* The first part of the stage starts here */ - while ((count < 4U) && (blockSize1 > 0U)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Loop over number of MAC operations between - * inputA samples and inputB samples */ - k = count; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* The second part of the stage starts here */ - /* The internal loop, over count, is unrolled by 4 */ - /* To, read the last two inputB samples using SIMD: - * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */ - py = py - 1; - - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1U; - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + (count - 1U); - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize2 >> 2U; - - while (blkCnt > 0U) - { - py = py - 1U; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1] samples */ - x0 = read_q15x2 ((q15_t *) px); - - /* read x[1], x[2] samples */ - x1 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the last two inputB samples using SIMD: - * y[srcBLen - 1] and y[srcBLen - 2] */ - c0 = read_q15x2_da ((q15_t **) &py); - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLALDX(x0, c0, acc0); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLALDX(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = read_q15x2 ((q15_t *) px); - - /* Read x[3], x[4] */ - x3 = read_q15x2 ((q15_t *) px + 1); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLALDX(x2, c0, acc2); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLALDX(x3, c0, acc3); - - /* Read y[srcBLen - 3] and y[srcBLen - 4] */ - c0 = read_q15x2_da ((q15_t **) &py); - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLALDX(x2, c0, acc0); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLALDX(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = read_q15x2 ((q15_t *) px + 2); - - /* Read x[5], x[6] */ - x1 = read_q15x2 ((q15_t *) px + 3); - - px += 4U; - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLALDX(x0, c0, acc2); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLALDX(x1, c0, acc3); - - } while (--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - if (k == 1U) - { - /* Read y[srcBLen - 5] */ - c0 = *(py + 1); -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - x3 = read_q15x2 ((q15_t *) px); - px++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - acc2 = __SMLALDX(x1, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - if (k == 2U) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = read_q15x2 ((q15_t *) py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - /* Perform the multiply-accumulate */ - acc0 = __SMLALDX(x0, c0, acc0); - acc1 = __SMLALDX(x1, c0, acc1); - acc2 = __SMLALDX(x3, c0, acc2); - acc3 = __SMLALDX(x2, c0, acc3); - } - - if (k == 3U) - { - /* Read y[srcBLen - 5], y[srcBLen - 6] */ - c0 = read_q15x2 ((q15_t *) py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - - /* Perform the multiply-accumulate */ - acc0 = __SMLALDX(x0, c0, acc0); - acc1 = __SMLALDX(x1, c0, acc1); - acc2 = __SMLALDX(x3, c0, acc2); - acc3 = __SMLALDX(x2, c0, acc3); - - c0 = *(py-1); -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - x3 = read_q15x2 ((q15_t *) px + 2); - px += 3U; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALDX(x1, c0, acc0); - acc1 = __SMLALD(x2, c0, acc1); - acc2 = __SMLALDX(x2, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - /* Store the result in the accumulator in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); -#else - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); - write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4U; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) ((q31_t) *px++ * *py--); - sum += (q63_t) ((q31_t) *px++ * *py--); - sum += (q63_t) ((q31_t) *px++ * *py--); - sum += (q63_t) ((q31_t) *px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) ((q31_t) *px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) ((q31_t) *px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT(sum >> 15, 16)); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - blockSize3 = srcBLen - 1U; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - pIn2 = pSrc2 - 1U; - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - /* For loop unrolling by 4, this stage is divided into two. */ - /* First part of this stage computes the MAC operations greater than 4 */ - /* Second part of this stage computes the MAC operations less than or equal to 4 */ - - /* The first part of the stage starts here */ - j = blockSize3 >> 2U; - - while ((j > 0U) && (blockSize3 > 0U)) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3 >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied - * with y[srcBLen - 1], y[srcBLen - 2] respectively */ - sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied - * with y[srcBLen - 3], y[srcBLen - 4] respectively */ - sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* For the next MAC operations, the pointer py is used without SIMD - * So, py is incremented by 1 */ - py = py + 1U; - - /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = blockSize3 % 0x4U; - - while (k > 0U) - { - /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement loop counter */ - blockSize3--; - - j--; - } - - /* The second part of the stage starts here */ - /* SIMD is not used for the next MAC operations, - * so pointer py is updated to read only one sample at a time */ - py = py + 1U; - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = blockSize3; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum = __SMLALD(*px++, *py--, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q15_t) (__SSAT((sum >> 15), 16)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement loop counter */ - blockSize3--; - } - -#else /* #if defined (ARM_MATH_DSP) */ - - const q15_t *pIn1 = pSrcA; /* InputA pointer */ - const q15_t *pIn2 = pSrcB; /* InputB pointer */ - q63_t sum; /* Accumulator */ - uint32_t i, j; /* Loop counters */ - - /* Loop to calculate convolution for output length number of values */ - for (i = 0; i < (srcALen + srcBLen - 1); i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q31_t) pIn1[j] * pIn2[i - j]); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U); - } - -#endif /* #if defined (ARM_MATH_DSP) */ - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Conv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c deleted file mode 100644 index 55bcfc6..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c +++ /dev/null @@ -1,745 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_q31.c - * Description: Convolution of Q31 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Conv - @{ - */ - -/** - @brief Convolution of Q31 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - There is no saturation on intermediate additions. - Thus, if the accumulator overflows it wraps around and distorts the result. - The input signals should be scaled down to avoid intermediate overflows. - Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, - as maximum of min(srcALen, srcBLen) number of additions are carried internally. - The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. - - @remark - Refer to \ref arm_conv_fast_q31() for a faster but less precise implementation of this function. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_helium_utils.h" -#include "arm_vec_filtering.h" - -void arm_conv_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst) -{ - const q31_t *pIn1 = pSrcA; /* inputA pointer */ - const q31_t *pIn2 = pSrcB; /* inputB pointer */ - /* - * Loop to perform MAC operations according to correlation equation - */ - const q31_t *pX; - const q31_t *pY; - const q31_t *pA; - const q31_t *pB; - int32_t i = 0U, j = 0; /* loop counters */ - int32_t block1, block2, block3; - uint32_t vddupStartIdx = 3; - uint32x4_t decrIdxVec = vddupq_u32(vddupStartIdx, 1); - - if (srcALen < srcBLen) - { - /* - * Initialization to inputB pointer - */ - pIn1 = pSrcB; - /* - * Initialization to the end of inputA pointer - */ - pIn2 = pSrcA; - /* - * Swapping the lengths - */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - } - - block1 = srcBLen - 1; - block2 = srcALen - srcBLen + 1; - block3 = srcBLen - 1; - - pA = pIn1; - pB = pIn2 - 3; - - for (i = 0; i <= block1 - 2; i += 2) - { - uint32_t count = i + 1; - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - pX = pA; - pY = pB; - MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q31(acc0, acc1, pX, pY, count); - - *pDst++ = (q31_t) acc0; - *pDst++ = (q31_t) acc1; - pB += 2; - } - for (; i < block1; i++) - { - uint32_t count = i + 1; - int64_t acc = 0LL; - - pX = pA; - pY = pB; - MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count); - - *pDst++ = (q31_t) acc; - pB++; - } - - for (i = 0; i <= block2 - 4; i += 4) - { - uint32_t count = srcBLen; - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - int64_t acc2 = 0LL; - int64_t acc3 = 0LL; - - pX = pA; - pY = pB; - /* - * compute 4 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q31(acc0, acc1, acc2, acc3, pX, pY, count); - *pDst++ = (q31_t) acc0; - *pDst++ = (q31_t) acc1; - *pDst++ = (q31_t) acc2; - *pDst++ = (q31_t) acc3; - - pA += 4; - } - - for (; i <= block2 - 2; i += 2) - { - uint32_t count = srcBLen; - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q31(acc0, acc1, pX, pY, count); - *pDst++ = (q31_t) acc0; - *pDst++ = (q31_t) acc1; - - pA += 2; - } - if (block2 & 1) - { - uint32_t count = srcBLen; - int64_t acc = 0LL; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count); - *pDst++ = (q31_t) acc; - pA++; - } - - for (i = block3; i >= 2; i -= 2) - { - uint32_t count = i; - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q31(acc0, acc1, pX, pY, count); - *pDst++ = (q31_t) acc0; - *pDst++ = (q31_t) acc1; - pA += 2; - } - - for (; i >= 1; i--) - { - uint32_t count = i; - int64_t acc = 0LL; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count); - *pDst++ = (q31_t) acc; - pA++; - } - -} - -#else -void arm_conv_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst) -{ - -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) - - const q31_t *pIn1; /* InputA pointer */ - const q31_t *pIn2; /* InputB pointer */ - q31_t *pOut = pDst; /* Output pointer */ - const q31_t *px; /* Intermediate inputA pointer */ - const q31_t *py; /* Intermediate inputB pointer */ - const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q63_t sum; /* Accumulators */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q63_t acc0, acc1, acc2; /* Accumulators */ - q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coefficient values */ -#endif - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* x[0] * y[srcBLen - 1] */ - sum += (q63_t) *px++ * (*py--); - - /* x[1] * y[srcBLen - 2] */ - sum += (q63_t) *px++ * (*py--); - - /* x[2] * y[srcBLen - 3] */ - sum += (q63_t) *px++ * (*py--); - - /* x[3] * y[srcBLen - 4] */ - sum += (q63_t) *px++ * (*py--); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unroll by 3 */ - blkCnt = blockSize2 / 3; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - - /* Apply loop unrolling and compute 3 MACs simultaneously. */ - k = srcBLen / 3; - - /* First part of the processing with loop unrolling. Compute 3 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 2 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *(py); - /* Read x[3] sample */ - x2 = *(px); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[srcBLen - 1] */ - acc0 += ((q63_t) x0 * c0); - /* acc1 += x[1] * y[srcBLen - 1] */ - acc1 += ((q63_t) x1 * c0); - /* acc2 += x[2] * y[srcBLen - 1] */ - acc2 += ((q63_t) x2 * c0); - - /* Read y[srcBLen - 2] sample */ - c0 = *(py - 1U); - /* Read x[4] sample */ - x0 = *(px + 1U); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[srcBLen - 2] */ - acc0 += ((q63_t) x1 * c0); - /* acc1 += x[2] * y[srcBLen - 2] */ - acc1 += ((q63_t) x2 * c0); - /* acc2 += x[3] * y[srcBLen - 2] */ - acc2 += ((q63_t) x0 * c0); - - /* Read y[srcBLen - 3] sample */ - c0 = *(py - 2U); - /* Read x[5] sample */ - x1 = *(px + 2U); - - /* Perform the multiply-accumulate */ - /* acc0 += x[2] * y[srcBLen - 3] */ - acc0 += ((q63_t) x2 * c0); - /* acc1 += x[3] * y[srcBLen - 2] */ - acc1 += ((q63_t) x0 * c0); - /* acc2 += x[4] * y[srcBLen - 2] */ - acc2 += ((q63_t) x1 * c0); - - /* update scratch pointers */ - px += 3U; - py -= 3U; - - } while (--k); - - /* If the srcBLen is not a multiple of 3, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen - (3 * (srcBLen / 3)); - - while (k > 0U) - { - /* Read y[srcBLen - 5] sample */ - c0 = *py--; - /* Read x[7] sample */ - x2 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += ((q63_t) x0 * c0); - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += ((q63_t) x1 * c0); - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += ((q63_t) x2 * c0); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (acc0 >> 31); - *pOut++ = (q31_t) (acc1 >> 31); - *pOut++ = (q31_t) (acc2 >> 31); - - /* Increment the pointer pIn1 index, count by 3 */ - count += 3U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize2 - 3 * (blockSize2 / 3); - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) *px++ * *py--; - sum += (q63_t) *px++ * *py--; - sum += (q63_t) *px++ * *py--; - sum += (q63_t) *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) *px++ * *py--; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = blockSize3 >> 2U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - sum += (q63_t) *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum += (q63_t) *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - sum += (q63_t) *px++ * *py--; - - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum += (q63_t) *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = blockSize3 % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = blockSize3; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += (q63_t) *px++ * *py--; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q31_t) (sum >> 31); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement loop counter */ - blockSize3--; - } - -#else -/* alternate version for CM0_FAMILY */ - - const q31_t *pIn1 = pSrcA; /* InputA pointer */ - const q31_t *pIn2 = pSrcB; /* InputB pointer */ - q63_t sum; /* Accumulators */ - uint32_t i, j; /* Loop counters */ - - /* Loop to calculate convolution for output length number of times */ - for (i = 0U; i < (srcALen + srcBLen - 1U); i++) - { - /* Initialize sum with zero to carry out MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q63_t) pIn1[j] * pIn2[i - j]); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q31_t) (sum >> 31U); - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Conv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c deleted file mode 100644 index a42ddd2..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c +++ /dev/null @@ -1,860 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_conv_q7.c - * Description: Convolution of Q7 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Conv - @{ - */ - -/** - @brief Convolution of Q7 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 32-bit internal accumulator. - Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. - The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. - The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format. - @remark - Refer to \ref arm_conv_opt_q7() for a faster implementation of this function. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_helium_utils.h" - -#include "arm_vec_filtering.h" - -void arm_conv_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst) -{ - const q7_t *pIn1 = pSrcA; /* inputA pointer */ - const q7_t *pIn2 = pSrcB; /* inputB pointer */ - /* - * Loop to perform MAC operations according to correlation equation - */ - const q7_t *pX; - const q7_t *pY; - const q7_t *pA; - const q7_t *pB; - int32_t i = 0U, j = 0; /* loop counters */ - int32_t block1, block2, block3; - uint8_t vddupStartIdx = 15; - uint8x16_t decrIdxVec = vddupq_u8(vddupStartIdx, 1); - - if (srcALen < srcBLen) - { - /* - * Initialization to inputB pointer - */ - pIn1 = pSrcB; - /* - * Initialization to the end of inputA pointer - */ - pIn2 = pSrcA; - /* - * Swapping the lengths - */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - } - - block1 = srcBLen - 1; - block2 = srcALen - srcBLen + 1; - block3 = srcBLen - 1; - - pA = pIn1; - pB = pIn2 - 15; - - for (i = 0; i <= block1 - 2; i += 2) - { - uint32_t count = i + 1; - int32_t acc0 = 0; - int32_t acc1 = 0; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q7(acc0, acc1, pX, pY, count); - *pDst++ = (q7_t) acc0; - *pDst++ = (q7_t) acc1; - pB += 2; - } - for (; i < block1; i++) - { - uint32_t count = i + 1; - int32_t acc = 0; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count); - *pDst++ = (q7_t) acc; - pB++; - } - - for (i = 0; i <= block2 - 4; i += 4) - { - uint32_t count = srcBLen; - int32_t acc0 = 0; - int32_t acc1 = 0; - int32_t acc2 = 0; - int32_t acc3 = 0; - - pX = pA; - pY = pB; - /* - * compute 4 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q7(acc0, acc1, acc2, acc3, pX, pY, count); - *pDst++ = (q7_t) acc0; - *pDst++ = (q7_t) acc1; - *pDst++ = (q7_t) acc2; - *pDst++ = (q7_t) acc3; - pA += 4; - } - for (; i <= block2 - 2; i += 2) - { - uint32_t count = srcBLen; - int32_t acc0 = 0; - int32_t acc1 = 0; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q7(acc0, acc1, pX, pY, count); - *pDst++ = (q7_t) acc0; - *pDst++ = (q7_t) acc1; - pA += 2; - } - if (block2 & 1) - { - uint32_t count = srcBLen; - int32_t acc = 0; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count); - *pDst++ = (q7_t) acc; - pA++; - } - - for (i = block3; i >= 1; i -= 2) - { - uint32_t count = i; - int32_t acc0 = 0; - int32_t acc1 = 0; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q7(acc0, acc1, pX, pY, count); - *pDst++ = (q7_t) acc0; - *pDst++ = (q7_t) acc1; - pA += 2; - } - for (; i >= 1; i--) - { - uint32_t count = i; - int32_t acc = 0; - - pX = pA; - pY = pB; - - MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count); - *pDst++ = (q7_t) acc; - pA++; - } -} - -#else -void arm_conv_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst) -{ - -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) - - const q7_t *pIn1; /* InputA pointer */ - const q7_t *pIn2; /* InputB pointer */ - q7_t *pOut = pDst; /* Output pointer */ - const q7_t *px; /* Intermediate inputA pointer */ - const q7_t *py; /* Intermediate inputB pointer */ - const q7_t *pSrc1, *pSrc2; /* Intermediate pointers */ - q31_t sum; /* Accumulators */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - q31_t input1, input2; /* Temporary input variables */ - q15_t in1, in2; /* Temporary input variables */ - q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables to hold state and coefficient values */ -#endif - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - } - - /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */ - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[0] - * sum = x[0] * y[1] + x[1] * y[0] - * .... - * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* x[0] , x[1] */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* y[srcBLen - 1] , y[srcBLen - 2] */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* x[0] * y[srcBLen - 1] */ - /* x[1] * y[srcBLen - 2] */ - sum = __SMLAD(input1, input2, sum); - - /* x[2] , x[3] */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* y[srcBLen - 3] , y[srcBLen - 4] */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* x[2] * y[srcBLen - 3] */ - /* x[3] * y[srcBLen - 4] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q15_t) *px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pIn2 + count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0] - * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0] - * .... - * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize2 >> 2U; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[srcBLen - 1] sample */ - c0 = *py--; - /* Read y[srcBLen - 2] sample */ - c1 = *py--; - - /* Read x[3] sample */ - x3 = *px++; - - /* x[0] and x[1] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* y[srcBLen - 1] and y[srcBLen - 2] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[1] and x[2] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[4] sample */ - x0 = *px++; - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */ - acc3 = __SMLAD(input1, input2, acc3); - - /* Read y[srcBLen - 3] sample */ - c0 = *py--; - /* Read y[srcBLen - 4] sample */ - c1 = *py--; - - /* Read x[5] sample */ - x1 = *px++; - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* y[srcBLen - 3] and y[srcBLen - 4] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[4] and x[5] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[6] sample */ - x2 = *px++; - - /* x[5] and x[6] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */ - acc3 = __SMLAD(input1, input2, acc3); - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Read y[srcBLen - 5] sample */ - c0 = *py--; - /* Read x[7] sample */ - x3 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[srcBLen - 5] */ - acc0 += ((q15_t) x0 * c0); - /* acc1 += x[5] * y[srcBLen - 5] */ - acc1 += ((q15_t) x1 * c0); - /* acc2 += x[6] * y[srcBLen - 5] */ - acc2 += ((q15_t) x2 * c0); - /* acc3 += x[7] * y[srcBLen - 5] */ - acc3 += ((q15_t) x3 * c0); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8)); - *pOut++ = (q7_t) (__SSAT(acc1 >> 7U, 8)); - *pOut++ = (q7_t) (__SSAT(acc2 >> 7U, 8)); - *pOut++ = (q7_t) (__SSAT(acc3 >> 7U, 8)); - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize2 % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - while (k > 0U) - { - - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* Perform the multiply-accumulate */ - sum = __SMLAD(input1, input2, sum); - - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* Perform the multiply-accumulate */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q15_t) *px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8)); - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q15_t) *px++ * *py--); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8)); - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pSrc2; - - /* Decrement loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1] - * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2] - * .... - * sum += x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2] - * sum += x[srcALen-1] * y[srcBLen-1] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The blockSize3 variable holds the number of MAC operations performed */ - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); - px = pSrc1; - - /* Working pointer of inputB */ - pSrc2 = pIn2 + (srcBLen - 1U); - py = pSrc2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = blockSize3 >> 2U; - - while (k > 0U) - { - /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */ - /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */ - sum = __SMLAD(input1, input2, sum); - - /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */ - in1 = (q15_t) *py--; - in2 = (q15_t) *py--; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */ - /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = blockSize3 % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = blockSize3; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen-1] * y[srcBLen-1] */ - sum += ((q15_t) *px++ * *py--); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8)); - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pSrc2; - - /* Decrement loop counter */ - blockSize3--; - } - -#else -/* alternate version for CM0_FAMILY */ - - const q7_t *pIn1 = pSrcA; /* InputA pointer */ - const q7_t *pIn2 = pSrcB; /* InputB pointer */ - q31_t sum; /* Accumulator */ - uint32_t i, j; /* Loop counters */ - - /* Loop to calculate convolution for output length number of times */ - for (i = 0U; i < (srcALen + srcBLen - 1U); i++) - { - /* Initialize sum with zero to carry out MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q15_t) pIn1[j] * pIn2[i - j]); - } - } - - /* Store the output in the destination buffer */ - pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U); - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Conv group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f16.c deleted file mode 100644 index 059ef8c..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f16.c +++ /dev/null @@ -1,1159 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_f16.c - * Description: Correlation of floating-point sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) -/** - @ingroup groupFilters - */ - -/** - @defgroup Corr Correlation - - Correlation is a mathematical operation that is similar to convolution. - As with convolution, correlation uses two signals to produce a third signal. - The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution. - Correlation is commonly used to measure the similarity between two signals. - It has applications in pattern recognition, cryptanalysis, and searching. - The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types. - Fast versions of the Q15 and Q31 functions are also provided. - - @par Algorithm - Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively. - The convolution of the two signals is denoted by - 
-      c[n] = a[n] * b[n]
-
- In correlation, one of the signals is flipped in time - 
-       c[n] = a[n] * b[-n]
-
- @par - and this is mathematically defined as - \image html CorrelateEquation.gif - @par - The pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen. - The result c[n] is of length 2 * max(srcALen, srcBLen) - 1 and is defined over the interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2). - The output result is written to pDst and the calling function must allocate 2 * max(srcALen, srcBLen) - 1 words for the result. - - @note - The pDst should be initialized to all zeros before being used. - - @par Fixed-Point Behavior - Correlation requires summing up a large number of intermediate products. - As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. - Refer to the function specific documentation below for further details of the particular algorithm used. - - @par Fast Versions - Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires - the input signals should be scaled down to avoid intermediate overflows. - - @par Opt Versions - Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. - These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of correlate - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of floating-point sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_filtering.h" - -#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F16(acc0, acc1, pX, pY, count) \ -{ \ - float16_t const *pSrcX, *pSrcY; \ - f16x8_t acc0Vec, acc1Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f16(0.0f); \ - acc1Vec = vdupq_n_f16(0.0f); \ - pSrcX = (float16_t const *) pX; \ - pSrcY = (float16_t const *) pY; \ - k = count >> 3; \ - while (k > 0U) \ - { \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - yVec = vldrhq_f16(&pSrcY[-1]); \ - acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec); \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - k = count % 0x8U; \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires 1 additional sample */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - mve_pred16_t p0 = vctp16q(k+1); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - yVec = vldrhq_f16(&pSrcY[-1]); \ - acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec,p0); \ - /* acc0 requires exact number of sample */ \ - /* disable extra lanes in final MAC computation */ \ - p0 = vctp16q(k); \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec,p0); \ - \ - acc0 = vecAddAcrossF16Mve(acc0Vec); \ - acc1 = vecAddAcrossF16Mve(acc1Vec); \ -} - -#define MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, count) \ -{ \ - float16_t const *pSrcX, *pSrcY; \ - f16x8_t accVec, xVec, yVec; \ - uint16_t k; \ - \ - accVec = vdupq_n_f16(0.0f); \ - pSrcX = (float16_t const *) pX; \ - pSrcY = (float16_t const *) pY; \ - k = count >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - accVec = vfmaq(accVec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* Loop with tail predication expected here */ \ - k = count % 0x8U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp16q(k); \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - accVec = vfmaq_m(accVec, xVec, yVec, p0); \ - } \ - \ - acc = vecAddAcrossF16Mve(accVec); \ -} - -#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F16(acc0, acc1, acc2, acc3, pX, pY, count) \ -{ \ - float16_t const *pSrcX, *pSrcY; \ - f16x8_t acc0Vec, acc1Vec, acc2Vec, acc3Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f16(0.0f); \ - acc1Vec = vdupq_n_f16(0.0f); \ - acc2Vec = vdupq_n_f16(0.0f); \ - acc3Vec = vdupq_n_f16(0.0f); \ - pSrcX = (float16_t const *) pX; \ - pSrcY = (float16_t const *) pY; \ - k = count >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_f16(&pSrcX[1]); \ - acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec); \ - xVec = vldrhq_f16(&pSrcX[2]); \ - acc2Vec = vfmaq_f16(acc2Vec, xVec, yVec); \ - xVec = vldrhq_f16(&pSrcX[3]); \ - acc3Vec = vfmaq_f16(acc3Vec, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* loop + tail predication expected here */ \ - k = count % 0x8U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp16q(k); \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_f16(&pSrcX[1]); \ - acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec, p0); \ - xVec = vldrhq_f16(&pSrcX[2]); \ - acc2Vec = vfmaq_m_f16(acc2Vec, xVec, yVec, p0); \ - xVec = vldrhq_f16(&pSrcX[3]); \ - acc3Vec = vfmaq_m_f16(acc3Vec, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec, p0); \ - } \ - \ - acc0 = vecAddAcrossF16Mve(acc0Vec); \ - acc1 = vecAddAcrossF16Mve(acc1Vec); \ - acc2 = vecAddAcrossF16Mve(acc2Vec); \ - acc3 = vecAddAcrossF16Mve(acc3Vec); \ -} - -#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F16(acc0, acc1, pX, pY, count) \ -{ \ - float16_t const *pSrcX, *pSrcY; \ - f16x8_t acc0Vec, acc1Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f16(0.0f); \ - acc1Vec = vdupq_n_f16(0.0f); \ - pSrcX = (float16_t const *) pX; \ - pSrcY = (float16_t const *) pY; \ - k = count >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_f16(&pSrcX[1]); \ - acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* loop + tail predication expected here */ \ - k = count % 0x8U; \ - if (k > 0U) \ - { \ - mve_pred16_t p0 = vctp16q(k); \ - yVec = vld1q(pSrcY); pSrcY += 8;; \ - xVec = vldrhq_f16(&pSrcX[1]); \ - acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec, p0); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec, p0); \ - } \ - \ - acc0 = vecAddAcrossF16Mve(acc0Vec); \ - acc1 = vecAddAcrossF16Mve(acc1Vec); \ -} - -#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F16(acc0, acc1, pX, pY, count) \ -{ \ - float16_t const *pSrcX, *pSrcY; \ - f16x8_t acc0Vec, acc1Vec, xVec, yVec; \ - uint32_t k; \ - \ - acc0Vec = vdupq_n_f16(0.0f); \ - acc1Vec = vdupq_n_f16(0.0f); \ - pSrcX = (float16_t const *) pX; \ - pSrcY = (float16_t const *) pY; \ - k = (count-1) >> 3; \ - \ - while (k > 0U) \ - { \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_f16(&pSrcX[1]); \ - acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec); \ - /* Decrement the loop counter */ \ - k--; \ - } \ - /* use predication to finalize MAC sum */ \ - /* acc1 requires exact number of sample (count-1) */ \ - /* disable extra lanes in final MAC computation */ \ - k = (count-1) % 0x8U; \ - mve_pred16_t p0 = vctp16q(k); \ - yVec = vld1q(pSrcY); pSrcY += 8; \ - xVec = vldrhq_f16(&pSrcX[1]); \ - acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec, p0); \ - /* acc0 requires 1 additional sample (count) */ \ - /* so add 1 to unmask an extra lane in final MAC computation */ \ - p0 = vctp16q(k+1); \ - xVec = vld1q(pSrcX); pSrcX += 8; \ - acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec, p0); \ - \ - acc0 = vecAddAcrossF16Mve(acc0Vec); \ - acc1 = vecAddAcrossF16Mve(acc1Vec); \ -} - - - -void arm_correlate_f16( - const float16_t * pSrcA, - uint32_t srcALen, - const float16_t * pSrcB, - uint32_t srcBLen, - float16_t * pDst) -{ - float16_t *pIn1 = (float16_t *)pSrcA; /* inputA pointer */ - float16_t *pIn2 = (float16_t *)pSrcB + (srcBLen - 1U); /* inputB pointer */ - float16_t *pX; - float16_t *pY; - float16_t *pA; - float16_t *pB; - int32_t i = 0U, j = 0; /* loop counters */ - int32_t inv = 2U; /* Reverse order flag */ - uint32_t tot = 0U; /* Length */ - int32_t block1, block2, block3; - int32_t incr; - - tot = ((srcALen + srcBLen) - 2U); - if (srcALen > srcBLen) - { - /* - * Calculating the number of zeros to be padded to the output - */ - j = srcALen - srcBLen; - /* - * Initialize the pointer after zero padding - */ - pDst += j; - } - else if (srcALen < srcBLen) - { - /* - * Initialization to inputB pointer - */ - pIn1 = (float16_t *)pSrcB; - /* - * Initialization to the end of inputA pointer - */ - pIn2 = (float16_t *)pSrcA + (srcALen - 1U); - /* - * Initialisation of the pointer after zero padding - */ - pDst = pDst + tot; - /* - * Swapping the lengths - */ - - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - /* - * Setting the reverse flag - */ - inv = -2; - - } - - block1 = srcBLen - 1; - block2 = srcALen - srcBLen + 1; - block3 = srcBLen - 1; - - pA = pIn1; - pB = pIn2; - incr = inv / 2; - - for (i = 0U; i <= block1 - 2; i += 2) - { - uint32_t count = i + 1; - _Float16 acc0; - _Float16 acc1; - /* - * compute 2 accumulators per loop - * size is incrementing for second accumulator - * Y pointer is decrementing for second accumulator - */ - pX = pA; - pY = pB; - MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F16(acc0, acc1, pX, pY, count); - - *pDst = acc0; - pDst += incr; - *pDst = acc1; - pDst += incr; - pB -= 2; - } - for (; i < block1; i++) - { - uint32_t count = i + 1; - _Float16 acc; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, count); - - *pDst = acc; - pDst += incr; - pB--; - } - - for (i = 0U; i <= block2 - 4; i += 4) - { - _Float16 acc0; - _Float16 acc1; - _Float16 acc2; - _Float16 acc3; - - pX = pA; - pY = pB; - /* - * compute 4 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F16(acc0, acc1, acc2, acc3, pX, pY, srcBLen); - - *pDst = acc0; - pDst += incr; - *pDst = acc1; - pDst += incr; - *pDst = acc2; - pDst += incr; - *pDst = acc3; - pDst += incr; - pA += 4; - } - - for (; i <= block2 - 2; i += 2) - { - _Float16 acc0; - _Float16 acc1; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for second accumulator - */ - MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F16(acc0, acc1, pX, pY, srcBLen); - - *pDst = acc0; - pDst += incr; - *pDst = acc1; - pDst += incr; - pA += 2; - } - - if (block2 & 1) - { - _Float16 acc; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, srcBLen); - - *pDst = acc; - pDst += incr; - pA++; - } - - for (i = block3 - 1; i >= 0; i -= 2) - { - - uint32_t count = (i + 1); - _Float16 acc0; - _Float16 acc1; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is decrementing for second accumulator - * X pointer is incrementing for second accumulator - */ - MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F16(acc0, acc1, pX, pY, count); - - *pDst = acc0; - pDst += incr; - *pDst = acc1; - pDst += incr; - pA += 2; - - } - for (; i >= 0; i--) - { - uint32_t count = (i + 1); - _Float16 acc; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, count); - - *pDst = acc; - pDst += incr; - pA++; - } -} - -#else -void arm_correlate_f16( - const float16_t * pSrcA, - uint32_t srcALen, - const float16_t * pSrcB, - uint32_t srcBLen, - float16_t * pDst) -{ - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_AUTOVECTORIZE) - - const float16_t *pIn1; /* InputA pointer */ - const float16_t *pIn2; /* InputB pointer */ - float16_t *pOut = pDst; /* Output pointer */ - const float16_t *px; /* Intermediate inputA pointer */ - const float16_t *py; /* Intermediate inputB pointer */ - const float16_t *pSrc1; - _Float16 sum; - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - uint32_t outBlockSize; /* Loop counter */ - int32_t inc = 1; /* Destination address modifier */ - -#if defined (ARM_MATH_LOOPUNROLL) - _Float16 acc0, acc1, acc2, acc3,c0; /* Accumulators */ - _Float16 x0, x1, x2, x3; /* temporary variables for holding input and coefficient values */ -#endif - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we assume zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (2U * srcALen) - 1U; - - /* When srcALen > srcBLen, zero padding has to be done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - } - - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1U); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f16; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* x[0] * y[srcBLen - 4] */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* x[1] * y[srcBLen - 3] */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* x[2] * y[srcBLen - 2] */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* x[3] * y[srcBLen - 1] */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0] * y[srcBLen - 1] */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize2 >> 2U; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0.0f16; - acc1 = 0.0f16; - acc2 = 0.0f16; - acc3 = 0.0f16; - - - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[0] sample */ - c0 = *(py++); - /* Read x[3] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[0] */ - acc0 += (_Float16)x0 * (_Float16)c0; - /* acc1 += x[1] * y[0] */ - acc1 += (_Float16)x1 * (_Float16)c0; - /* acc2 += x[2] * y[0] */ - acc2 += (_Float16)x2 * (_Float16)c0; - /* acc3 += x[3] * y[0] */ - acc3 += (_Float16)x3 * (_Float16)c0; - - /* Read y[1] sample */ - c0 = *(py++); - /* Read x[4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[1] */ - acc0 += (_Float16)x1 * (_Float16)c0; - /* acc1 += x[2] * y[1] */ - acc1 += (_Float16)x2 * (_Float16)c0; - /* acc2 += x[3] * y[1] */ - acc2 += (_Float16)x3 * (_Float16)c0; - /* acc3 += x[4] * y[1] */ - acc3 += (_Float16)x0 * (_Float16)c0; - - /* Read y[2] sample */ - c0 = *(py++); - /* Read x[5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[2] * y[2] */ - acc0 += (_Float16)x2 * (_Float16)c0; - /* acc1 += x[3] * y[2] */ - acc1 += (_Float16)x3 * (_Float16)c0; - /* acc2 += x[4] * y[2] */ - acc2 += (_Float16)x0 * (_Float16)c0; - /* acc3 += x[5] * y[2] */ - acc3 += (_Float16)x1 * (_Float16)c0; - - /* Read y[3] sample */ - c0 = *(py++); - /* Read x[6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[3] * y[3] */ - acc0 += (_Float16)x3 * (_Float16)c0; - /* acc1 += x[4] * y[3] */ - acc1 += (_Float16)x0 * (_Float16)c0; - /* acc2 += x[5] * y[3] */ - acc2 += (_Float16)x1 * (_Float16)c0; - /* acc3 += x[6] * y[3] */ - acc3 += (_Float16)x2 * (_Float16)c0; - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Read y[4] sample */ - c0 = *(py++); - /* Read x[7] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[4] * y[4] */ - acc0 += (_Float16)x0 * (_Float16)c0; - /* acc1 += x[5] * y[4] */ - acc1 += (_Float16)x1 * (_Float16)c0; - /* acc2 += x[6] * y[4] */ - acc2 += (_Float16)x2 * (_Float16)c0; - /* acc3 += x[7] * y[4] */ - acc3 += (_Float16)x3 * (_Float16)c0; - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = acc0; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = acc1; - pOut += inc; - - *pOut = acc2; - pOut += inc; - - *pOut = acc3; - pOut += inc; - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize2 % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f16; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (_Float16)*px++ * (_Float16)*py++; - sum += (_Float16)*px++ * (_Float16)*py++; - sum += (_Float16)*px++ * (_Float16)*py++; - sum += (_Float16)*px++ * (_Float16)*py++; - - /* Decrement loop counter */ - k--; - } - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; -#else - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f16; - - /* Loop over srcBLen */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f16; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen - srcBLen + 4] * y[3] */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* sum += x[srcALen - srcBLen + 3] * y[2] */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* sum += x[srcALen - srcBLen + 2] * y[1] */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* sum += x[srcALen - srcBLen + 1] * y[0] */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (_Float16)*px++ * (_Float16)*py++; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else -/* alternate version for CM0_FAMILY */ - - const float16_t *pIn1 = pSrcA; /* inputA pointer */ - const float16_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ - _Float16 sum; /* Accumulator */ - uint32_t i = 0U, j; /* Loop counters */ - uint32_t inv = 0U; /* Reverse order flag */ - uint32_t tot = 0U; /* Length */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and a varaible, inv is set to 1 */ - /* If lengths are not equal then zero pad has to be done to make the two - * inputs of same length. But to improve the performance, we assume zeroes - * in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the - * starting of the output buffer */ - /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the - * ending of the output buffer */ - /* Once the zero padding is done the remaining of the output is calcualted - * using convolution but with the shorter signal time shifted. */ - - /* Calculate the length of the remaining sequence */ - tot = ((srcALen + srcBLen) - 2U); - - if (srcALen > srcBLen) - { - /* Calculating the number of zeros to be padded to the output */ - j = srcALen - srcBLen; - - /* Initialise the pointer after zero padding */ - pDst += j; - } - - else if (srcALen < srcBLen) - { - /* Initialization to inputB pointer */ - pIn1 = pSrcB; - - /* Initialization to the end of inputA pointer */ - pIn2 = pSrcA + (srcALen - 1U); - - /* Initialisation of the pointer after zero padding */ - pDst = pDst + tot; - - /* Swapping the lengths */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - - /* Setting the reverse flag */ - inv = 1; - - } - - /* Loop to calculate convolution for output length number of times */ - for (i = 0U; i <= tot; i++) - { - /* Initialize sum with zero to carry out MAC operations */ - sum = 0.0f16; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if ((((i - j) < srcBLen) && (j < srcALen))) - { - /* z[i] += x[i-j] * y[j] */ - sum += (_Float16)pIn1[j] * (_Float16)pIn2[-((int32_t) i - (int32_t) j)]; - } - } - - /* Store the output in the destination buffer */ - if (inv == 1) - *pDst-- = sum; - else - *pDst++ = sum; - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Corr group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c deleted file mode 100644 index 86a2411..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c +++ /dev/null @@ -1,1095 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_f32.c - * Description: Correlation of floating-point sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup Corr Correlation - - Correlation is a mathematical operation that is similar to convolution. - As with convolution, correlation uses two signals to produce a third signal. - The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution. - Correlation is commonly used to measure the similarity between two signals. - It has applications in pattern recognition, cryptanalysis, and searching. - The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types. - Fast versions of the Q15 and Q31 functions are also provided. - - @par Algorithm - Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively. - The convolution of the two signals is denoted by - 
-      c[n] = a[n] * b[n]
-
- In correlation, one of the signals is flipped in time - 
-       c[n] = a[n] * b[-n]
-
- @par - and this is mathematically defined as - \image html CorrelateEquation.gif - @par - The pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen. - The result c[n] is of length 2 * max(srcALen, srcBLen) - 1 and is defined over the interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2). - The output result is written to pDst and the calling function must allocate 2 * max(srcALen, srcBLen) - 1 words for the result. - - @note - The pDst should be initialized to all zeros before being used. - - @par Fixed-Point Behavior - Correlation requires summing up a large number of intermediate products. - As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. - Refer to the function specific documentation below for further details of the particular algorithm used. - - @par Fast Versions - Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires - the input signals should be scaled down to avoid intermediate overflows. - - @par Opt Versions - Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. - These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of correlate - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of floating-point sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_filtering.h" - - -void arm_correlate_f32( - const float32_t * pSrcA, - uint32_t srcALen, - const float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst) -{ - const float32_t *pIn1 = pSrcA; /* inputA pointer */ - const float32_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ - const float32_t *pX, *pY; - const float32_t *pA, *pB; - int32_t i = 0U, j = 0; /* loop counters */ - int32_t inv = 4U; /* Reverse order flag */ - uint32_t tot = 0U; /* Length */ - int32_t block1, block2, block3; - int32_t incr; - - tot = ((srcALen + srcBLen) - 2U); - if (srcALen > srcBLen) - { - /* - * Calculating the number of zeros to be padded to the output - */ - j = srcALen - srcBLen; - /* - * Initialize the pointer after zero padding - */ - pDst += j; - } - else if (srcALen < srcBLen) - { - /* - * Initialization to inputB pointer - */ - pIn1 = pSrcB; - /* - * Initialization to the end of inputA pointer - */ - pIn2 = pSrcA + (srcALen - 1U); - /* - * Initialisation of the pointer after zero padding - */ - pDst = pDst + tot; - /* - * Swapping the lengths - */ - - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - /* - * Setting the reverse flag - */ - inv = -4; - } - - block1 = srcBLen - 1; - block2 = srcALen - srcBLen + 1; - block3 = srcBLen - 1; - - pA = pIn1; - pB = pIn2; - incr = inv / 4; - - for (i = 0U; i <= block1 - 2; i += 2) - { - uint32_t count = i + 1; - float32_t acc0; - float32_t acc1; - - /* - * compute 2 accumulators per loop - * size is incrementing for second accumulator - * Y pointer is decrementing for second accumulator - */ - pX = pA; - pY = pB; - MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F32(acc0, acc1, pX, pY, count); - - *pDst = acc0; - pDst += incr; - *pDst = acc1; - pDst += incr; - pB -= 2; - } - for (; i < block1; i++) - { - uint32_t count = i + 1; - float32_t acc; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, count); - - *pDst = acc; - pDst += incr; - pB--; - } - - for (i = 0U; i <= block2 - 4; i += 4) - { - float32_t acc0; - float32_t acc1; - float32_t acc2; - float32_t acc3; - - pX = pA; - pY = pB; - /* - * compute 4 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F32(acc0, acc1, acc2, acc3, pX, pY, srcBLen); - - *pDst = acc0; - pDst += incr; - *pDst = acc1; - pDst += incr; - *pDst = acc2; - pDst += incr; - *pDst = acc3; - pDst += incr; - pA += 4; - } - - for (; i <= block2 - 2; i += 2) - { - float32_t acc0; - float32_t acc1; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for second accumulator - */ - MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F32(acc0, acc1, pX, pY, srcBLen); - - *pDst = acc0; - pDst += incr; - *pDst = acc1; - pDst += incr; - pA += 2; - } - - if (block2 & 1) - { - float32_t acc; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, srcBLen); - - *pDst = acc; - pDst += incr; - pA++; - } - - for (i = block3 - 1; i >= 0; i -= 2) - { - - uint32_t count = (i + 1); - float32_t acc0; - float32_t acc1; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is decrementing for second accumulator - * X pointer is incrementing for second accumulator - */ - MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F32(acc0, acc1, pX, pY, count); - - *pDst = acc0; - pDst += incr; - *pDst = acc1; - pDst += incr; - pA += 2; - - } - for (; i >= 0; i--) - { - uint32_t count = (i + 1); - float32_t acc; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, count); - - *pDst = acc; - pDst += incr; - pA++; - } -} - -#else -void arm_correlate_f32( - const float32_t * pSrcA, - uint32_t srcALen, - const float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst) -{ - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_AUTOVECTORIZE) - - const float32_t *pIn1; /* InputA pointer */ - const float32_t *pIn2; /* InputB pointer */ - float32_t *pOut = pDst; /* Output pointer */ - const float32_t *px; /* Intermediate inputA pointer */ - const float32_t *py; /* Intermediate inputB pointer */ - const float32_t *pSrc1; - float32_t sum; - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - uint32_t outBlockSize; /* Loop counter */ - int32_t inc = 1; /* Destination address modifier */ - -#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) - float32_t acc0, acc1, acc2, acc3,c0; /* Accumulators */ -#if !defined(ARM_MATH_NEON) - float32_t x0, x1, x2, x3; /* temporary variables for holding input and coefficient values */ -#endif -#endif - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we assume zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (2U * srcALen) - 1U; - - /* When srcALen > srcBLen, zero padding has to be done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - } - - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1U); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - -#if defined(ARM_MATH_NEON) - float32x4_t x,y; - float32x4_t res = vdupq_n_f32(0) ; - float32x2_t accum = vdup_n_f32(0); - - while (k > 0U) - { - x = vld1q_f32(px); - y = vld1q_f32(py); - - res = vmlaq_f32(res,x, y); - - px += 4; - py += 4; - - /* Decrement the loop counter */ - k--; - } - - accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); - sum += accum[0] + accum[1]; - - k = count & 0x3; -#else - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* x[0] * y[srcBLen - 4] */ - sum += *px++ * *py++; - - /* x[1] * y[srcBLen - 3] */ - sum += *px++ * *py++; - - /* x[2] * y[srcBLen - 2] */ - sum += *px++ * *py++; - - /* x[3] * y[srcBLen - 1] */ - sum += *px++ * *py++; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#endif /* #if defined(ARM_MATH_NEON) */ -#else - - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0] * y[srcBLen - 1] */ - sum += *px++ * *py++; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { -#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize2 >> 2U; - -#if defined(ARM_MATH_NEON) - float32x4_t c; - float32x4_t x1v; - float32x4_t x2v; - float32x4_t x; - float32x4_t res = vdupq_n_f32(0) ; -#endif /* #if defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - -#if defined(ARM_MATH_NEON) - /* Compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - res = vdupq_n_f32(0) ; - - x1v = vld1q_f32(px); - px += 4; - do - { - x2v = vld1q_f32(px); - c = vld1q_f32(py); - - py += 4; - - x = x1v; - res = vmlaq_n_f32(res,x,c[0]); - - x = vextq_f32(x1v,x2v,1); - - res = vmlaq_n_f32(res,x,c[1]); - - x = vextq_f32(x1v,x2v,2); - - res = vmlaq_n_f32(res,x,c[2]); - - x = vextq_f32(x1v,x2v,3); - - res = vmlaq_n_f32(res,x,c[3]); - - x1v = x2v; - px+=4; - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen & 0x3; - - while (k > 0U) - { - /* Read y[srcBLen - 5] sample */ - c0 = *(py++); - - res = vmlaq_n_f32(res,x1v,c0); - - /* Reuse the present samples for the next MAC */ - x1v[0] = x1v[1]; - x1v[1] = x1v[2]; - x1v[2] = x1v[3]; - - x1v[3] = *(px++); - - /* Decrement the loop counter */ - k--; - } - - px-=1; - - acc0 = res[0]; - acc1 = res[1]; - acc2 = res[2]; - acc3 = res[3]; -#else - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[0] sample */ - c0 = *(py++); - /* Read x[3] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[0] */ - acc0 += x0 * c0; - /* acc1 += x[1] * y[0] */ - acc1 += x1 * c0; - /* acc2 += x[2] * y[0] */ - acc2 += x2 * c0; - /* acc3 += x[3] * y[0] */ - acc3 += x3 * c0; - - /* Read y[1] sample */ - c0 = *(py++); - /* Read x[4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[1] */ - acc0 += x1 * c0; - /* acc1 += x[2] * y[1] */ - acc1 += x2 * c0; - /* acc2 += x[3] * y[1] */ - acc2 += x3 * c0; - /* acc3 += x[4] * y[1] */ - acc3 += x0 * c0; - - /* Read y[2] sample */ - c0 = *(py++); - /* Read x[5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[2] * y[2] */ - acc0 += x2 * c0; - /* acc1 += x[3] * y[2] */ - acc1 += x3 * c0; - /* acc2 += x[4] * y[2] */ - acc2 += x0 * c0; - /* acc3 += x[5] * y[2] */ - acc3 += x1 * c0; - - /* Read y[3] sample */ - c0 = *(py++); - /* Read x[6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[3] * y[3] */ - acc0 += x3 * c0; - /* acc1 += x[4] * y[3] */ - acc1 += x0 * c0; - /* acc2 += x[5] * y[3] */ - acc2 += x1 * c0; - /* acc3 += x[6] * y[3] */ - acc3 += x2 * c0; - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Read y[4] sample */ - c0 = *(py++); - /* Read x[7] sample */ - x3 = *(px++); - - /* Perform the multiply-accumulate */ - /* acc0 += x[4] * y[4] */ - acc0 += x0 * c0; - /* acc1 += x[5] * y[4] */ - acc1 += x1 * c0; - /* acc2 += x[6] * y[4] */ - acc2 += x2 * c0; - /* acc3 += x[7] * y[4] */ - acc3 += x3 * c0; - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement the loop counter */ - k--; - } - -#endif /* #if defined(ARM_MATH_NEON) */ - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = acc0; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = acc1; - pOut += inc; - - *pOut = acc2; - pOut += inc; - - *pOut = acc3; - pOut += inc; - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize2 % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - -#if defined(ARM_MATH_NEON) - float32x4_t x,y; - float32x4_t res = vdupq_n_f32(0) ; - float32x2_t accum = vdup_n_f32(0); - - while (k > 0U) - { - x = vld1q_f32(px); - y = vld1q_f32(py); - - res = vmlaq_f32(res,x, y); - - px += 4; - py += 4; - /* Decrement the loop counter */ - k--; - } - - accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); - sum += accum[0] + accum[1]; -#else - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py++; - sum += *px++ * *py++; - sum += *px++ * *py++; - sum += *px++ * *py++; - - /* Decrement loop counter */ - k--; - } -#endif /* #if defined(ARM_MATH_NEON) */ - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; -#else - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - - /* Loop over srcBLen */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - -#if defined(ARM_MATH_NEON) - float32x4_t x,y; - float32x4_t res = vdupq_n_f32(0) ; - float32x2_t accum = vdup_n_f32(0); - - while (k > 0U) - { - x = vld1q_f32(px); - y = vld1q_f32(py); - - res = vmlaq_f32(res,x, y); - - px += 4; - py += 4; - - /* Decrement the loop counter */ - k--; - } - - accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res)); - sum += accum[0] + accum[1]; -#else - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen - srcBLen + 4] * y[3] */ - sum += *px++ * *py++; - - /* sum += x[srcALen - srcBLen + 3] * y[2] */ - sum += *px++ * *py++; - - /* sum += x[srcALen - srcBLen + 2] * y[1] */ - sum += *px++ * *py++; - - /* sum += x[srcALen - srcBLen + 1] * y[0] */ - sum += *px++ * *py++; - - /* Decrement loop counter */ - k--; - } - -#endif /* #if defined (ARM_MATH_NEON) */ - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py++; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - -#else -/* alternate version for CM0_FAMILY */ - - const float32_t *pIn1 = pSrcA; /* inputA pointer */ - const float32_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ - float32_t sum; /* Accumulator */ - uint32_t i = 0U, j; /* Loop counters */ - uint32_t inv = 0U; /* Reverse order flag */ - uint32_t tot = 0U; /* Length */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and a varaible, inv is set to 1 */ - /* If lengths are not equal then zero pad has to be done to make the two - * inputs of same length. But to improve the performance, we assume zeroes - * in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the - * starting of the output buffer */ - /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the - * ending of the output buffer */ - /* Once the zero padding is done the remaining of the output is calcualted - * using convolution but with the shorter signal time shifted. */ - - /* Calculate the length of the remaining sequence */ - tot = ((srcALen + srcBLen) - 2U); - - if (srcALen > srcBLen) - { - /* Calculating the number of zeros to be padded to the output */ - j = srcALen - srcBLen; - - /* Initialise the pointer after zero padding */ - pDst += j; - } - - else if (srcALen < srcBLen) - { - /* Initialization to inputB pointer */ - pIn1 = pSrcB; - - /* Initialization to the end of inputA pointer */ - pIn2 = pSrcA + (srcALen - 1U); - - /* Initialisation of the pointer after zero padding */ - pDst = pDst + tot; - - /* Swapping the lengths */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - - /* Setting the reverse flag */ - inv = 1; - - } - - /* Loop to calculate convolution for output length number of times */ - for (i = 0U; i <= tot; i++) - { - /* Initialize sum with zero to carry out MAC operations */ - sum = 0.0f; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if ((((i - j) < srcBLen) && (j < srcALen))) - { - /* z[i] += x[i-j] * y[j] */ - sum += pIn1[j] * pIn2[-((int32_t) i - (int32_t) j)]; - } - } - - /* Store the output in the destination buffer */ - if (inv == 1) - *pDst-- = sum; - else - *pDst++ = sum; - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Corr group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f64.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f64.c deleted file mode 100644 index e0bb655..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f64.c +++ /dev/null @@ -1,365 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_f64.c - * Description: Correlation of floating-point sequences - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of floating-point sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @return none - */ - -void arm_correlate_f64( - const float64_t * pSrcA, - uint32_t srcALen, - const float64_t * pSrcB, - uint32_t srcBLen, - float64_t * pDst) -{ - const float64_t *pIn1; /* InputA pointer */ - const float64_t *pIn2; /* InputB pointer */ - float64_t *pOut = pDst; /* Output pointer */ - const float64_t *px; /* Intermediate inputA pointer */ - const float64_t *py; /* Intermediate inputB pointer */ - const float64_t *pSrc1; - float64_t sum; - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - uint32_t outBlockSize; /* Loop counter */ - int32_t inc = 1; /* Destination address modifier */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we assume zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (2U * srcALen) - 1U; - - /* When srcALen > srcBLen, zero padding has to be done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - } - - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1U); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.; - - /* Initialize k with number of samples */ - k = count; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0] * y[srcBLen - 1] */ - sum += *px++ * *py++; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.; - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.; - - /* Loop over srcBLen */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0.; - - /* Initialize blkCnt with number of samples */ - k = count; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += *px++ * *py++; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } -} - -/** - @} end of Corr group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c deleted file mode 100644 index a246eb3..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c +++ /dev/null @@ -1,345 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_fast_opt_q15.c - * Description: Fast Q15 Correlation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of Q15 sequences (fast version). - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence. - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - @return none - - @par Scaling and Overflow Behavior - This fast version uses a 32-bit accumulator with 2.30 format. - The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. - There is no saturation on intermediate additions. - Thus, if the accumulator overflows it wraps around and distorts the result. - The input signals should be scaled down to avoid intermediate overflows. - Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a - maximum of min(srcALen, srcBLen) number of additions is carried internally. - The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result. - - @remark - Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. - */ - -void arm_correlate_fast_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch) -{ - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - q31_t acc0; /* Accumulators */ - q15_t *pOut = pDst; /* Output pointer */ - q15_t *pScr1 = pScratch; /* Temporary pointer for scratch */ - const q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, blkCnt, outBlockSize; /* Loop counter */ - int32_t inc = 1; /* Destination address modifier */ - uint32_t tapCnt; /* Loop count */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc1, acc2, acc3; /* Accumulators */ - q31_t x1, x2, x3; /* Temporary variables for holding input and coefficient values */ - q31_t y1, y2; /* State variables */ -#endif - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (2U * srcALen) - 1U; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - } - - pScr1 = pScratch; - - /* Fill (srcBLen - 1U) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1U); - - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr1, srcALen); - - /* Update pointers */ - pScr1 += srcALen; - - - /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update pointer */ - pScr1 += (srcBLen - 1U); - - /* Temporary pointer for scratch2 */ - py = pIn2; - - - /* Actual correlation process starts here */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (srcALen + srcBLen - 1U) >> 2; - - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read next two samples from scratch buffer */ - x2 = read_q15x2_ia (&pScr1); - - tapCnt = (srcBLen) >> 2U; - - while (tapCnt > 0U) - { - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia ((q15_t **) &pIn2); - y2 = read_q15x2_ia ((q15_t **) &pIn2); - - /* multiply and accumulate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumulate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* multiply and accumulate */ - acc0 = __SMLAD(x2, y2, acc0); - acc2 = __SMLAD(x1, y2, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - acc1 = __SMLADX(x3, y2, acc1); - - x2 = read_q15x2_ia (&pScr1); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y2, acc3); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4U; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3U; - - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3U; - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the results in the accumulators in the destination buffer. */ - *pOut = (__SSAT(acc0 >> 15U, 16)); - pOut += inc; - *pOut = (__SSAT(acc1 >> 15U, 16)); - pOut += inc; - *pOut = (__SSAT(acc2 >> 15U, 16)); - pOut += inc; - *pOut = (__SSAT(acc3 >> 15U, 16)); - pOut += inc; - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch += 4U; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (srcALen + srcBLen - 1U) & 0x3; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (srcALen + srcBLen - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Calculate correlation for remaining samples of Bigger length sequence */ - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1U; - - while (tapCnt > 0U) - { - - /* Read next two samples from scratch buffer */ - acc0 += (*pScr1++ * *pIn2++); - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1U; - - /* apply same above for remaining samples of smaller length sequence */ - while (tapCnt > 0U) - { - - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - ** Then store the output in the destination buffer. */ - *pOut = (q15_t) (__SSAT((acc0 >> 15), 16)); - pOut += inc; - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch += 1U; - } - -} - -/** - @} end of Corr group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c deleted file mode 100644 index cfddb8f..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c +++ /dev/null @@ -1,614 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_fast_q15.c - * Description: Fast Q15 Correlation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of Q15 sequences (fast version). - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @return none - - @par Scaling and Overflow Behavior - This fast version uses a 32-bit accumulator with 2.30 format. - The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. - There is no saturation on intermediate additions. - Thus, if the accumulator overflows it wraps around and distorts the result. - The input signals should be scaled down to avoid intermediate overflows. - Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a - maximum of min(srcALen, srcBLen) number of additions is carried internally. - The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result. - - @remark - Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. - */ - -void arm_correlate_fast_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst) -{ - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - q15_t *pOut = pDst; /* Output pointer */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - const q15_t *px; /* Intermediate inputA pointer */ - const q15_t *py; /* Intermediate inputB pointer */ - const q15_t *pSrc1; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* Temporary variables for holding input and coefficient values */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - uint32_t outBlockSize; - int32_t inc = 1; /* Destination address modifier */ - - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (2U * srcALen) - 1U; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1U); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first loop starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */ - sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); - /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */ - sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - /* x[0] * y[srcBLen - 1] */ - sum = __SMLAD(*px++, *py++, sum); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* -------------------- - * Stage2 process - * -------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2U; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1] samples */ - x0 = read_q15x2 ((q15_t *) px); - /* read x[1], x[2] samples */ - x1 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the first two inputB samples using SIMD: - * y[0] and y[1] */ - c0 = read_q15x2_ia ((q15_t **) &py); - - /* acc0 += x[0] * y[0] + x[1] * y[1] */ - acc0 = __SMLAD(x0, c0, acc0); - - /* acc1 += x[1] * y[0] + x[2] * y[1] */ - acc1 = __SMLAD(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = read_q15x2 ((q15_t *) px); - - /* Read x[3], x[4] */ - x3 = read_q15x2 ((q15_t *) px + 1); - - /* acc2 += x[2] * y[0] + x[3] * y[1] */ - acc2 = __SMLAD(x2, c0, acc2); - - /* acc3 += x[3] * y[0] + x[4] * y[1] */ - acc3 = __SMLAD(x3, c0, acc3); - - /* Read y[2] and y[3] */ - c0 = read_q15x2_ia ((q15_t **) &py); - - /* acc0 += x[2] * y[2] + x[3] * y[3] */ - acc0 = __SMLAD(x2, c0, acc0); - - /* acc1 += x[3] * y[2] + x[4] * y[3] */ - acc1 = __SMLAD(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = read_q15x2 ((q15_t *) px + 2); - - /* Read x[5], x[6] */ - x1 = read_q15x2 ((q15_t *) px + 3); - px += 4U; - - /* acc2 += x[4] * y[2] + x[5] * y[3] */ - acc2 = __SMLAD(x0, c0, acc2); - - /* acc3 += x[5] * y[2] + x[6] * y[3] */ - acc3 = __SMLAD(x1, c0, acc3); - - } while (--k); - - /* For the next MAC operations, SIMD is not used - * So, the 16 bit pointer if inputB, py is updated */ - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - if (k == 1U) - { - /* Read y[4] */ - c0 = *py; - -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - x3 = read_q15x2 ((q15_t *) px); - px++; - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD (x0, c0, acc0); - acc1 = __SMLAD (x1, c0, acc1); - acc2 = __SMLADX(x1, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - if (k == 2U) - { - /* Read y[4], y[5] */ - c0 = read_q15x2 ((q15_t *) py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLAD(x3, c0, acc2); - acc3 = __SMLAD(x2, c0, acc3); - } - - if (k == 3U) - { - /* Read y[4], y[5] */ - c0 = read_q15x2_ia ((q15_t **) &py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - acc2 = __SMLAD(x3, c0, acc2); - acc3 = __SMLAD(x2, c0, acc3); - - c0 = (*py); - /* Read y[6] */ -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - x3 = read_q15x2 ((q15_t *) px + 2); - px += 3U; - - /* Perform the multiply-accumulates */ - acc0 = __SMLADX(x1, c0, acc0); - acc1 = __SMLAD (x2, c0, acc1); - acc2 = __SMLADX(x2, c0, acc2); - acc3 = __SMLADX(x3, c0, acc3); - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (acc0 >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q15_t) (acc1 >> 15); - pOut += inc; - - *pOut = (q15_t) (acc2 >> 15); - pOut += inc; - - *pOut = (q15_t) (acc3 >> 15); - pOut += inc; - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4U; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) *px++ * *py++); - sum += ((q31_t) *px++ * *py++); - sum += ((q31_t) *px++ * *py++); - sum += ((q31_t) *px++ * *py++); - - /* Decrement loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += ((q31_t) * px++ * *py++); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q31_t) *px++ * *py++); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - } - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulates */ - /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */ - sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); - /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */ - sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = __SMLAD(*px++, *py++, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (sum >> 15); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement the MAC count */ - count--; - - /* Decrement the loop counter */ - blockSize3--; - } - -} - -/** - @} end of Corr group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c deleted file mode 100644 index 15a1d82..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c +++ /dev/null @@ -1,601 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_fast_q31.c - * Description: Fast Q31 Correlation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of Q31 sequences (fast version). - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @return none - - @par Scaling and Overflow Behavior - This function is optimized for speed at the expense of fixed-point precision and overflow protection. - The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. - These intermediate results are accumulated in a 32-bit register in 2.30 format. - Finally, the accumulator is saturated and converted to a 1.31 result. - @par - The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. - In order to avoid overflows completely the input signals must be scaled down. - The input signals should be scaled down to avoid intermediate overflows. - Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a - maximum of min(srcALen, srcBLen) number of additions is carried internally. - - @remark - Refer to \ref arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. - */ - -void arm_correlate_fast_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst) -{ - const q31_t *pIn1; /* InputA pointer */ - const q31_t *pIn2; /* InputB pointer */ - q31_t *pOut = pDst; /* Output pointer */ - const q31_t *px; /* Intermediate inputA pointer */ - const q31_t *py; /* Intermediate inputB pointer */ - const q31_t *pSrc1; /* Intermediate pointers */ - q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - q31_t x0, x1, x2, x3, c0; /* Temporary variables for holding input and coefficient values */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - uint32_t outBlockSize; - int32_t inc = 1; /* Destination address modifier */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (2U * srcALen) - 1U; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - - } - - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1U); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* x[0] * y[srcBLen - 4] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* x[1] * y[srcBLen - 3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* x[2] * y[srcBLen - 2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* x[3] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0] * y[srcBLen - 1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum << 1; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { - /* Loop unroll over blockSize2, by 4 */ - blkCnt = blockSize2 >> 2U; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[0] sample */ - c0 = *py++; - /* Read x[3] sample */ - x3 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[0] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc1 += x[1] * y[0] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc2 += x[2] * y[0] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc3 += x[3] * y[0] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - - /* Read y[1] sample */ - c0 = *py++; - /* Read x[4] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[1] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc1 += x[2] * y[1] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc2 += x[3] * y[1] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc3 += x[4] * y[1] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32); - - - /* Read y[2] sample */ - c0 = *py++; - /* Read x[5] sample */ - x1 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[2] * y[2] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc1 += x[3] * y[2] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc2 += x[4] * y[2] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc3 += x[5] * y[2] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32); - - - /* Read y[3] sample */ - c0 = *py++; - /* Read x[6] sample */ - x2 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[3] * y[3] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32); - /* acc1 += x[4] * y[3] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc2 += x[5] * y[3] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc3 += x[6] * y[3] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32); - - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Read y[4] sample */ - c0 = *py++; - /* Read x[7] sample */ - x3 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[4] */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - /* acc1 += x[5] * y[4] */ - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - /* acc2 += x[6] * y[4] */ - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - /* acc3 += x[7] * y[4] */ - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (acc0 << 1); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q31_t) (acc1 << 1); - pOut += inc; - - *pOut = (q31_t) (acc2 << 1); - pOut += inc; - - *pOut = (q31_t) (acc3 << 1); - pOut += inc; - - /* Increment the pointer pIn1 index, count by 4 */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4U; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum << 1; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum << 1; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1U; - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen - srcBLen + 4] * y[3] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* sum += x[srcALen - srcBLen + 3] * y[2] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* sum += x[srcALen - srcBLen + 2] * y[1] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* sum += x[srcALen - srcBLen + 1] * y[0] */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = (q31_t) ((((q63_t) sum << 32) + - ((q63_t) *px++ * (*py++))) >> 32); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = sum << 1; - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement MAC count */ - count--; - - /* Decrement loop counter */ - blockSize3--; - } - -} - -/** - @} end of Corr group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c deleted file mode 100644 index 3985623..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c +++ /dev/null @@ -1,341 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_opt_q15.c - * Description: Correlation of Q15 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of Q15 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - Both inputs are in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - This approach provides 33 guard bits and there is no risk of overflow. - The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. - - @remark - Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function. - */ - -void arm_correlate_opt_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch) -{ - q63_t acc0; /* Accumulators */ - q15_t *pOut = pDst; /* Output pointer */ - q15_t *pScr1; /* Temporary pointer for scratch1 */ - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - const q15_t *py; /* Intermediate inputB pointer */ - uint32_t j, blkCnt, outBlockSize; /* Loop counter */ - int32_t inc = 1; /* Output pointer increment */ - uint32_t tapCnt; - -#if defined (ARM_MATH_LOOPUNROLL) - q63_t acc1, acc2, acc3; /* Accumulators */ - q31_t x1, x2, x3; /* Temporary variables for holding input1 and input2 values */ - q31_t y1, y2; /* State variables */ -#endif - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (srcALen * 2U) - 1U; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - } - - pScr1 = pScratch; - - /* Fill (srcBLen - 1U) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1U); - - /* Copy (srcALen) samples in scratch buffer */ - arm_copy_q15(pIn1, pScr1, srcALen); - - /* Update pointers */ - pScr1 += srcALen; - - - /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update pointer */ - pScr1 += (srcBLen - 1U); - - /* Temporary pointer for scratch2 */ - py = pIn2; - - - /* Actual correlation process starts here */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (srcALen + srcBLen - 1U) >> 2; - - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read next two samples from scratch1 buffer */ - x2 = read_q15x2_ia (&pScr1); - - tapCnt = (srcBLen) >> 2U; - - while (tapCnt > 0U) - { - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia ((q15_t **) &pIn2); - y2 = read_q15x2_ia ((q15_t **) &pIn2); - - /* multiply and accumulate */ - acc0 = __SMLALD(x1, y1, acc0); - acc2 = __SMLALD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumulate */ - acc1 = __SMLALDX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* multiply and accumulate */ - acc0 = __SMLALD(x2, y2, acc0); - acc2 = __SMLALD(x1, y2, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLALDX(x3, y1, acc3); - acc1 = __SMLALDX(x3, y2, acc1); - - x2 = read_q15x2_ia (&pScr1); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLALDX(x3, y2, acc3); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4U; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3U; - - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2); - acc1 += (*pScr1++ * *pIn2); - acc2 += (*pScr1++ * *pIn2); - acc3 += (*pScr1++ * *pIn2++); - - pScr1 -= 3U; - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - - /* Store the results in the accumulators in the destination buffer. */ - *pOut = (__SSAT(acc0 >> 15U, 16)); - pOut += inc; - *pOut = (__SSAT(acc1 >> 15U, 16)); - pOut += inc; - *pOut = (__SSAT(acc2 >> 15U, 16)); - pOut += inc; - *pOut = (__SSAT(acc3 >> 15U, 16)); - pOut += inc; - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch += 4U; - } - - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (srcALen + srcBLen - 1U) & 0x3; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (srcALen + srcBLen - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Calculate correlation for remaining samples of Bigger length sequence */ - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1U; - - while (tapCnt > 0U) - { - - /* Read next two samples from scratch1 buffer */ - acc0 += (*pScr1++ * *pIn2++); - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1U; - - /* apply same above for remaining samples of smaller length sequence */ - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pIn2++); - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - Then store the output in the destination buffer. */ - *pOut = (q15_t) (__SSAT((acc0 >> 15), 16)); - pOut += inc; - - /* Initialization of inputB pointer */ - pIn2 = py; - - pScratch += 1U; - } - -} - -/** - @} end of Corr group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c deleted file mode 100644 index 06ad671..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c +++ /dev/null @@ -1,388 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_opt_q7.c - * Description: Correlation of Q7 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of Q7 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 32-bit internal accumulator. - Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. - The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. - The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format. - */ - -void arm_correlate_opt_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2) -{ - q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch */ - q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch */ - q15_t x4; /* Temporary input variable */ - q15_t *py; /* Temporary input2 pointer */ - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - const q7_t *pIn1, *pIn2; /* InputA and inputB pointer */ - uint32_t j, k, blkCnt, tapCnt; /* Loop counter */ - int32_t inc = 1; /* Output pointer increment */ - uint32_t outBlockSize; /* Loop counter */ - q31_t x1, x2, x3, y1; /* Temporary input variables */ - q7_t *pOut = pDst; /* Output pointer */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (srcALen * 2U) - 1U; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - } - - - /* Copy (srcBLen) samples in scratch buffer */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - a second loop below copies for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) *pIn2++; - *pScr2++ = x4; - x4 = (q15_t) *pIn2++; - *pScr2++ = x4; - x4 = (q15_t) *pIn2++; - *pScr2++ = x4; - x4 = (q15_t) *pIn2++; - *pScr2++ = x4; - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) *pIn2++; - *pScr2++ = x4; - - /* Decrement loop counter */ - k--; - } - - /* Fill (srcBLen - 1U) zeros in scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update temporary scratch pointer */ - pScr1 += (srcBLen - 1U); - - /* Copy (srcALen) samples in scratch buffer */ - /* Apply loop unrolling and do 4 Copies simultaneously. */ - k = srcALen >> 2U; - - /* First part of the processing with loop unrolling copies 4 data points at a time. - a second loop below copies for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* copy second buffer in reversal manner */ - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - x4 = (q15_t) *pIn1++; - *pScr1++ = x4; - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, copy remaining samples here. - No loop unrolling is used. */ - k = srcALen % 0x4U; - - while (k > 0U) - { - /* copy second buffer in reversal manner for remaining samples */ - x4 = (q15_t) * pIn1++; - *pScr1++ = x4; - - /* Decrement the loop counter */ - k--; - } - - /* Fill (srcBLen - 1U) zeros at end of scratch buffer */ - arm_fill_q15(0, pScr1, (srcBLen - 1U)); - - /* Update pointer */ - pScr1 += (srcBLen - 1U); - - /* Temporary pointer for scratch2 */ - py = pScratch2; - - /* Initialization of pScr2 pointer */ - pScr2 = pScratch2; - - /* Actual correlation process starts here */ - blkCnt = (srcALen + srcBLen - 1U) >> 2; - - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Read two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* Read next two samples from scratch1 buffer */ - x2 = read_q15x2_ia (&pScr1); - - tapCnt = (srcBLen) >> 2U; - - while (tapCnt > 0U) - { - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia (&pScr2); - - /* multiply and accumulate */ - acc0 = __SMLAD(x1, y1, acc0); - acc2 = __SMLAD(x2, y1, acc2); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - /* multiply and accumulate */ - acc1 = __SMLADX(x3, y1, acc1); - - /* Read next two samples from scratch1 buffer */ - x1 = read_q15x2_ia (&pScr1); - - /* pack input data */ -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x1, x2, 0); -#else - x3 = __PKHBT(x2, x1, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - /* Read four samples from smaller buffer */ - y1 = read_q15x2_ia (&pScr2); - - acc0 = __SMLAD(x2, y1, acc0); - - acc2 = __SMLAD(x1, y1, acc2); - - acc1 = __SMLADX(x3, y1, acc1); - - x2 = read_q15x2_ia (&pScr1); - -#ifndef ARM_MATH_BIG_ENDIAN - x3 = __PKHBT(x2, x1, 0); -#else - x3 = __PKHBT(x1, x2, 0); -#endif - - acc3 = __SMLADX(x3, y1, acc3); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Update scratch pointer for remaining samples of smaller length sequence */ - pScr1 -= 4U; - - /* apply same above for remaining samples of smaller length sequence */ - tapCnt = (srcBLen) & 3U; - - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pScr2); - acc1 += (*pScr1++ * *pScr2); - acc2 += (*pScr1++ * *pScr2); - acc3 += (*pScr1++ * *pScr2++); - - pScr1 -= 3U; - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8)); - pOut += inc; - *pOut = (q7_t) (__SSAT(acc1 >> 7U, 8)); - pOut += inc; - *pOut = (q7_t) (__SSAT(acc2 >> 7U, 8)); - pOut += inc; - *pOut = (q7_t) (__SSAT(acc3 >> 7U, 8)); - pOut += inc; - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 4U; - } - - blkCnt = (srcALen + srcBLen - 1U) & 0x3; - - /* Calculate correlation for remaining samples of Bigger length sequence */ - while (blkCnt > 0) - { - /* Initialze temporary scratch pointer as scratch1 */ - pScr1 = pScratch1; - - /* Clear Accumlators */ - acc0 = 0; - - tapCnt = (srcBLen) >> 1U; - - while (tapCnt > 0U) - { - acc0 += (*pScr1++ * *pScr2++); - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement loop counter */ - tapCnt--; - } - - tapCnt = (srcBLen) & 1U; - - /* apply same above for remaining samples of smaller length sequence */ - while (tapCnt > 0U) - { - /* accumulate the results */ - acc0 += (*pScr1++ * *pScr2++); - - /* Decrement loop counter */ - tapCnt--; - } - - blkCnt--; - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8)); - pOut += inc; - - /* Initialization of inputB pointer */ - pScr2 = py; - - pScratch1 += 1U; - } - -} - -/** - @} end of Corr group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c deleted file mode 100644 index f1c0ec8..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c +++ /dev/null @@ -1,903 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_q15.c - * Description: Correlation of Q15 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of Q15 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - Both inputs are in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - This approach provides 33 guard bits and there is no risk of overflow. - The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. - - @remark - Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function. - @remark - Refer to \ref arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_helium_utils.h" -#include "arm_vec_filtering.h" - -void arm_correlate_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst) -{ - const q15_t *pIn1 = pSrcA; /* inputA pointer */ - const q15_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ - /* - * Loop to perform MAC operations according to correlation equation - */ - const q15_t *pX; - const q15_t *pY; - const q15_t *pA; - const q15_t *pB; - int32_t i = 0U, j = 0; /* loop counters */ - int32_t inv = 2U; /* Reverse order flag */ - uint32_t tot = 0U; /* Length */ - int32_t block1, block2, block3; - int32_t incr; - - tot = ((srcALen + srcBLen) - 2U); - if (srcALen > srcBLen) - { - /* - * Calculating the number of zeros to be padded to the output - */ - j = srcALen - srcBLen; - /* - * Initialize the pointer after zero padding - */ - pDst += j; - } - else if (srcALen < srcBLen) - { - /* - * Initialization to inputB pointer - */ - pIn1 = pSrcB; - /* - * Initialization to the end of inputA pointer - */ - pIn2 = pSrcA + (srcALen - 1U); - /* - * Initialisation of the pointer after zero padding - */ - pDst = pDst + tot; - /* - * Swapping the lengths - */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - /* - * Setting the reverse flag - */ - inv = -2; - } - - block1 = srcBLen - 1; - block2 = srcALen - srcBLen + 1; - block3 = srcBLen - 1; - - pA = pIn1; - pB = pIn2; - incr = inv / 2; - - for (i = 0U; i <= block1 - 2; i += 2) - { - uint32_t count = i + 1; - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - /* - * compute 2 accumulators per loop - * size is incrementing for second accumulator - * Y pointer is decrementing for second accumulator - */ - pX = pA; - pY = pB; - MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q15(acc0, acc1, pX, pY, count); - - *pDst = (q15_t) acc0; - pDst += incr; - *pDst = (q15_t) acc1; - pDst += incr; - pB -= 2; - } - for (; i < block1; i++) - { - uint32_t count = i + 1; - int64_t acc = 0LL; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, count); - - *pDst = (q15_t) acc; - pDst += incr; - pB--; - } - - for (i = 0U; i <= block2 - 4; i += 4) - { - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - int64_t acc2 = 0LL; - int64_t acc3 = 0LL; - - pX = pA; - pY = pB; - /* - * compute 4 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q15(acc0, acc1, acc2, acc3, pX, pY, srcBLen); - - *pDst = (q15_t) acc0; - pDst += incr; - *pDst = (q15_t) acc1; - pDst += incr; - *pDst = (q15_t) acc2; - pDst += incr; - *pDst = (q15_t) acc3; - pDst += incr; - pA += 4; - } - - for (; i <= block2 - 2; i += 2) - { - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for second accumulator - */ - MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q15(acc0, acc1, pX, pY, srcBLen); - - *pDst = (q15_t) acc0; - pDst += incr; - *pDst = (q15_t) acc1; - pDst += incr; - pA += 2; - } - - if (block2 & 1) - { - int64_t acc = 0LL; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, srcBLen); - - *pDst = (q15_t) acc; - pDst += incr; - pA++; - } - - for (i = block3 - 1; i >= 0; i -= 2) - { - - uint32_t count = (i + 1); - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is decrementing for second accumulator - * X pointer is incrementing for second accumulator - */ - MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q15(acc0, acc1, pX, pY, count); - - *pDst = (q15_t) acc0; - pDst += incr; - *pDst = (q15_t) acc1; - pDst += incr; - pA += 2; - - } - for (; i >= 0; i--) - { - uint32_t count = (i + 1); - int64_t acc = 0LL; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, count); - - *pDst = (q15_t) acc; - pDst += incr; - pA++; - } -} - -#else -void arm_correlate_q15( - const q15_t * pSrcA, - uint32_t srcALen, - const q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst) -{ - -#if defined (ARM_MATH_DSP) - - const q15_t *pIn1; /* InputA pointer */ - const q15_t *pIn2; /* InputB pointer */ - q15_t *pOut = pDst; /* Output pointer */ - q63_t sum, acc0, acc1, acc2, acc3; /* Accumulators */ - const q15_t *px; /* Intermediate inputA pointer */ - const q15_t *py; /* Intermediate inputB pointer */ - const q15_t *pSrc1; /* Intermediate pointers */ - q31_t x0, x1, x2, x3, c0; /* Temporary input variables for holding input and coefficient values */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - uint32_t outBlockSize; - int32_t inc = 1; /* Destination address modifier */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (srcALen * 2U) - 1U; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - } - - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1U); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first loop starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */ - sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); - /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */ - sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0] * y[srcBLen - 1] */ - sum = __SMLALD(*px++, *py++, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT((sum >> 15), 16)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is the index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize2 >> 2U; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1] samples */ - x0 = read_q15x2 ((q15_t *) px); - - /* read x[1], x[2] samples */ - x1 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read the first two inputB samples using SIMD: - * y[0] and y[1] */ - c0 = read_q15x2_ia ((q15_t **) &py); - - /* acc0 += x[0] * y[0] + x[1] * y[1] */ - acc0 = __SMLALD(x0, c0, acc0); - - /* acc1 += x[1] * y[0] + x[2] * y[1] */ - acc1 = __SMLALD(x1, c0, acc1); - - /* Read x[2], x[3] */ - x2 = read_q15x2 ((q15_t *) px); - - /* Read x[3], x[4] */ - x3 = read_q15x2 ((q15_t *) px + 1); - - /* acc2 += x[2] * y[0] + x[3] * y[1] */ - acc2 = __SMLALD(x2, c0, acc2); - - /* acc3 += x[3] * y[0] + x[4] * y[1] */ - acc3 = __SMLALD(x3, c0, acc3); - - /* Read y[2] and y[3] */ - c0 = read_q15x2_ia ((q15_t **) &py); - - /* acc0 += x[2] * y[2] + x[3] * y[3] */ - acc0 = __SMLALD(x2, c0, acc0); - - /* acc1 += x[3] * y[2] + x[4] * y[3] */ - acc1 = __SMLALD(x3, c0, acc1); - - /* Read x[4], x[5] */ - x0 = read_q15x2 ((q15_t *) px + 2); - - /* Read x[5], x[6] */ - x1 = read_q15x2 ((q15_t *) px + 3); - px += 4U; - - /* acc2 += x[4] * y[2] + x[5] * y[3] */ - acc2 = __SMLALD(x0, c0, acc2); - - /* acc3 += x[5] * y[2] + x[6] * y[3] */ - acc3 = __SMLALD(x1, c0, acc3); - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - if (k == 1U) - { - /* Read y[4] */ - c0 = *py; -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[7] */ - x3 = read_q15x2 ((q15_t *) px); - px++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD (x0, c0, acc0); - acc1 = __SMLALD (x1, c0, acc1); - acc2 = __SMLALDX(x1, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - if (k == 2U) - { - /* Read y[4], y[5] */ - c0 = read_q15x2 ((q15_t *) py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - px += 2U; - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - acc2 = __SMLALD(x3, c0, acc2); - acc3 = __SMLALD(x2, c0, acc3); - } - - if (k == 3U) - { - /* Read y[4], y[5] */ - c0 = read_q15x2_ia ((q15_t **) &py); - - /* Read x[7], x[8] */ - x3 = read_q15x2 ((q15_t *) px); - - /* Read x[9] */ - x2 = read_q15x2 ((q15_t *) px + 1); - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - acc2 = __SMLALD(x3, c0, acc2); - acc3 = __SMLALD(x2, c0, acc3); - - c0 = (*py); - - /* Read y[6] */ -#ifdef ARM_MATH_BIG_ENDIAN - c0 = c0 << 16U; -#else - c0 = c0 & 0x0000FFFF; -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - /* Read x[10] */ - x3 = read_q15x2 ((q15_t *) px + 2); - px += 3U; - - /* Perform the multiply-accumulates */ - acc0 = __SMLALDX(x1, c0, acc0); - acc1 = __SMLALD (x2, c0, acc1); - acc2 = __SMLALDX(x2, c0, acc2); - acc3 = __SMLALDX(x3, c0, acc3); - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT(acc0 >> 15, 16)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q15_t) (__SSAT(acc1 >> 15, 16)); - pOut += inc; - - *pOut = (q15_t) (__SSAT(acc2 >> 15, 16)); - pOut += inc; - - *pOut = (q15_t) (__SSAT(acc3 >> 15, 16)); - pOut += inc; - - /* Increment the count by 4 as 4 output values are computed */ - count += 4U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize2 % 0x4U; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += ((q63_t) *px++ * *py++); - sum += ((q63_t) *px++ * *py++); - sum += ((q63_t) *px++ * *py++); - sum += ((q63_t) *px++ * *py++); - - /* Decrement loop counter */ - k--; - } - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += ((q63_t) *px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT(sum >> 15, 16)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment count by 1, as one output value is computed */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q63_t) *px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT(sum >> 15, 16)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = count >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */ - sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); - /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */ - sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum); - - /* Decrement loop counter */ - k--; - } - - /* If the count is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = count % 0x4U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum = __SMLALD(*px++, *py++, sum); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q15_t) (__SSAT((sum >> 15), 16)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement MAC count */ - count--; - - /* Decrement loop counter */ - blockSize3--; - } - -#else /* #if defined (ARM_MATH_DSP) */ - - const q15_t *pIn1 = pSrcA; /* InputA pointer */ - const q15_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */ - q63_t sum; /* Accumulators */ - uint32_t i = 0U, j; /* Loop counters */ - uint32_t inv = 0U; /* Reverse order flag */ - uint32_t tot = 0U; /* Length */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and a varaible, inv is set to 1 */ - /* If lengths are not equal then zero pad has to be done to make the two - * inputs of same length. But to improve the performance, we include zeroes - * in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the - * starting of the output buffer */ - /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the - * ending of the output buffer */ - /* Once the zero padding is done the remaining of the output is calcualted - * using convolution but with the shorter signal time shifted. */ - - /* Calculate the length of the remaining sequence */ - tot = ((srcALen + srcBLen) - 2U); - - if (srcALen > srcBLen) - { - /* Calculating the number of zeros to be padded to the output */ - j = srcALen - srcBLen; - - /* Initialise the pointer after zero padding */ - pDst += j; - } - - else if (srcALen < srcBLen) - { - /* Initialization to inputB pointer */ - pIn1 = pSrcB; - - /* Initialization to the end of inputA pointer */ - pIn2 = pSrcA + (srcALen - 1U); - - /* Initialisation of the pointer after zero padding */ - pDst = pDst + tot; - - /* Swapping the lengths */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - - /* Setting the reverse flag */ - inv = 1; - } - - /* Loop to calculate convolution for output length number of values */ - for (i = 0U; i <= tot; i++) - { - /* Initialize sum with zero to carry on MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - (int32_t) j)]); - } - } - - /* Store the output in the destination buffer */ - if (inv == 1) - *pDst-- = (q15_t) __SSAT((sum >> 15U), 16U); - else - *pDst++ = (q15_t) __SSAT((sum >> 15U), 16U); - } - -#endif /* #if defined (ARM_MATH_DSP) */ - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Corr group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c deleted file mode 100644 index 3715582..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c +++ /dev/null @@ -1,879 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_q31.c - * Description: Correlation of Q31 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of Q31 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - There is no saturation on intermediate additions. - Thus, if the accumulator overflows it wraps around and distorts the result. - The input signals should be scaled down to avoid intermediate overflows. - Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a - maximum of min(srcALen, srcBLen) number of additions is carried internally. - The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. - - @remark - Refer to \ref arm_correlate_fast_q31() for a faster but less precise implementation of this function. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_helium_utils.h" -#include "arm_vec_filtering.h" -void arm_correlate_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst) -{ - const q31_t *pIn1 = pSrcA; /* inputA pointer */ - const q31_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ - /* - * Loop to perform MAC operations according to correlation equation - */ - const q31_t *pX; - const q31_t *pY; - const q31_t *pA; - const q31_t *pB; - int32_t i = 0U, j = 0; /* loop counters */ - int32_t inv = 4; /* Reverse order flag */ - uint32_t tot = 0U; /* Length */ - int32_t block1, block2, block3; - int32_t incr; - - tot = ((srcALen + srcBLen) - 2U); - if (srcALen > srcBLen) - { - /* - * Calculating the number of zeros to be padded to the output - */ - j = srcALen - srcBLen; - /* - * Initialize the pointer after zero padding - */ - pDst += j; - } - else if (srcALen < srcBLen) - { - /* - * Initialization to inputB pointer - */ - pIn1 = pSrcB; - /* - * Initialization to the end of inputA pointer - */ - pIn2 = pSrcA + (srcALen - 1U); - /* - * Initialization of the pointer after zero padding - */ - pDst = pDst + tot; - /* - * Swapping the lengths - */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - /* - * Setting the reverse flag - */ - inv = -4; - - } - - block1 = srcBLen - 1; - block2 = srcALen - srcBLen + 1; - block3 = srcBLen - 1; - pA = pIn1; - pB = pIn2; - incr = inv / 4; - - for (i = 0U; i <= block1 - 2; i += 2) - { - uint32_t count = i + 1; - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - /* compute 2 accumulators per loop */ - /* size is incrementing for second accumulator */ - /* Y pointer is decrementing for second accumulator */ - pX = pA; - pY = pB; - MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q31(acc0, acc1, pX, pY, count); - - *pDst = (q31_t) acc0; - pDst += incr; - *pDst = (q31_t) acc1; - pDst += incr; - pB -= 2; - } - for (; i < block1; i++) - { - uint32_t count = i + 1; - int64_t acc = 0LL; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, count); - - *pDst = (q31_t) acc; - pDst += incr; - pB--; - } - - for (i = 0U; i <= block2 - 4; i += 4) - { - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - int64_t acc2 = 0LL; - int64_t acc3 = 0LL; - - pX = pA; - pY = pB; - /* compute 4 accumulators per loop */ - /* size is fixed for all accumulators */ - /* X pointer is incrementing for successive accumulators */ - MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q31(acc0, acc1, acc2, acc3, pX, pY, srcBLen); - - *pDst = (q31_t) acc0; - pDst += incr; - *pDst = (q31_t) acc1; - pDst += incr; - *pDst = (q31_t) acc2; - pDst += incr; - *pDst = (q31_t) acc3; - pDst += incr; - pA += 4; - } - - for (; i <= block2 - 2; i += 2) - { - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - pX = pA; - pY = pB; - /* compute 2 accumulators per loop */ - /* size is fixed for all accumulators */ - /* X pointer is incrementing for second accumulator */ - MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q31(acc0, acc1, pX, pY, srcBLen); - - *pDst = (q31_t) acc0; - pDst += incr; - *pDst = (q31_t) acc1; - pDst += incr; - pA += 2; - } - - if (block2 & 1) - { - int64_t acc = 0LL; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, srcBLen); - - *pDst = (q31_t) acc; - pDst += incr; - pA++; - } - - for (i = block3 - 1; i >= 0; i -= 2) - { - - uint32_t count = (i + 1); - int64_t acc0 = 0LL; - int64_t acc1 = 0LL; - - pX = pA; - pY = pB; - /* compute 2 accumulators per loop */ - /* size is decrementing for second accumulator */ - /* X pointer is incrementing for second accumulator */ - MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q31(acc0, acc1, pX, pY, count); - - *pDst = (q31_t) acc0; - pDst += incr; - *pDst = (q31_t) acc1; - pDst += incr; - pA += 2; - - } - for (; i >= 0; i--) - { - uint32_t count = (i + 1); - int64_t acc = 0LL; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, count); - - *pDst = (q31_t) acc; - pDst += incr; - pA++; - } -} -#else -void arm_correlate_q31( - const q31_t * pSrcA, - uint32_t srcALen, - const q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst) -{ - -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) - - const q31_t *pIn1; /* InputA pointer */ - const q31_t *pIn2; /* InputB pointer */ - q31_t *pOut = pDst; /* Output pointer */ - const q31_t *px; /* Intermediate inputA pointer */ - const q31_t *py; /* Intermediate inputB pointer */ - const q31_t *pSrc1; /* Intermediate pointers */ - q63_t sum; /* Accumulators */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - uint32_t outBlockSize; - int32_t inc = 1; /* Destination address modifier */ - -#if defined (ARM_MATH_LOOPUNROLL) - q63_t acc0, acc1, acc2; /* Accumulators */ - q31_t x0, x1, x2, c0; /* Temporary variables for holding input and coefficient values */ -#endif - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (2U * srcALen) - 1U; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - } - - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1U); - py = pSrc1; - - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* x[0] * y[srcBLen - 4] */ - sum += (q63_t) *px++ * (*py++); - - /* x[1] * y[srcBLen - 3] */ - sum += (q63_t) *px++ * (*py++); - - /* x[2] * y[srcBLen - 2] */ - sum += (q63_t) *px++ * (*py++); - - /* x[3] * y[srcBLen - 1] */ - sum += (q63_t) *px++ * (*py++); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0] * y[srcBLen - 1] */ - sum += (q63_t) *px++ * (*py++); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (sum >> 31); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unroll by 3 */ - blkCnt = blockSize2 / 3; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - - /* read x[0], x[1] samples */ - x0 = *px++; - x1 = *px++; - - /* Apply loop unrolling and compute 3 MACs simultaneously. */ - k = srcBLen / 3; - - /* First part of the processing with loop unrolling. Compute 3 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 2 samples. */ - do - { - /* Read y[0] sample */ - c0 = *(py); - /* Read x[2] sample */ - x2 = *(px); - - /* Perform the multiply-accumulate */ - /* acc0 += x[0] * y[0] */ - acc0 += ((q63_t) x0 * c0); - /* acc1 += x[1] * y[0] */ - acc1 += ((q63_t) x1 * c0); - /* acc2 += x[2] * y[0] */ - acc2 += ((q63_t) x2 * c0); - - /* Read y[1] sample */ - c0 = *(py + 1U); - /* Read x[3] sample */ - x0 = *(px + 1U); - - /* Perform the multiply-accumulate */ - /* acc0 += x[1] * y[1] */ - acc0 += ((q63_t) x1 * c0); - /* acc1 += x[2] * y[1] */ - acc1 += ((q63_t) x2 * c0); - /* acc2 += x[3] * y[1] */ - acc2 += ((q63_t) x0 * c0); - - /* Read y[2] sample */ - c0 = *(py + 2U); - /* Read x[4] sample */ - x1 = *(px + 2U); - - /* Perform the multiply-accumulate */ - /* acc0 += x[2] * y[2] */ - acc0 += ((q63_t) x2 * c0); - /* acc1 += x[3] * y[2] */ - acc1 += ((q63_t) x0 * c0); - /* acc2 += x[4] * y[2] */ - acc2 += ((q63_t) x1 * c0); - - /* update scratch pointers */ - px += 3U; - py += 3U; - - } while (--k); - - /* If the srcBLen is not a multiple of 3, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen - (3 * (srcBLen / 3)); - - while (k > 0U) - { - /* Read y[4] sample */ - c0 = *(py++); - - /* Read x[7] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[4] */ - acc0 += ((q63_t) x0 * c0); - /* acc1 += x[5] * y[4] */ - acc1 += ((q63_t) x1 * c0); - /* acc2 += x[6] * y[4] */ - acc2 += ((q63_t) x2 * c0); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (acc0 >> 31); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q31_t) (acc1 >> 31); - pOut += inc; - - *pOut = (q31_t) (acc2 >> 31); - pOut += inc; - - /* Increment the pointer pIn1 index, count by 3 */ - count += 3U; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize2 - 3 * (blockSize2 / 3); - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - while (k > 0U) - { - /* Perform the multiply-accumulates */ - sum += (q63_t) *px++ * *py++; - sum += (q63_t) *px++ * *py++; - sum += (q63_t) *px++ * *py++; - sum += (q63_t) *px++ * *py++; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (sum >> 31); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) *px++ * *py++; - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (sum >> 31); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* sum += x[srcALen - srcBLen + 4] * y[3] */ - sum += (q63_t) *px++ * *py++; - - /* sum += x[srcALen - srcBLen + 3] * y[2] */ - sum += (q63_t) *px++ * *py++; - - /* sum += x[srcALen - srcBLen + 2] * y[1] */ - sum += (q63_t) *px++ * *py++; - - /* sum += x[srcALen - srcBLen + 1] * y[0] */ - sum += (q63_t) *px++ * *py++; - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += (q63_t) *px++ * *py++; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q31_t) (sum >> 31); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement MAC count */ - count--; - - /* Decrement loop counter */ - blockSize3--; - } - -#else -/* alternate version for CM0_FAMILY */ - - const q31_t *pIn1 = pSrcA; /* InputA pointer */ - const q31_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */ - q63_t sum; /* Accumulators */ - uint32_t i = 0U, j; /* Loop counters */ - uint32_t inv = 0U; /* Reverse order flag */ - uint32_t tot = 0U; /* Length */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and a varaible, inv is set to 1 */ - /* If lengths are not equal then zero pad has to be done to make the two - * inputs of same length. But to improve the performance, we include zeroes - * in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the - * starting of the output buffer */ - /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the - * ending of the output buffer */ - /* Once the zero padding is done the remaining of the output is calcualted - * using correlation but with the shorter signal time shifted. */ - - /* Calculate the length of the remaining sequence */ - tot = ((srcALen + srcBLen) - 2U); - - if (srcALen > srcBLen) - { - /* Calculating the number of zeros to be padded to the output */ - j = srcALen - srcBLen; - - /* Initialise the pointer after zero padding */ - pDst += j; - } - - else if (srcALen < srcBLen) - { - /* Initialization to inputB pointer */ - pIn1 = pSrcB; - - /* Initialization to the end of inputA pointer */ - pIn2 = pSrcA + (srcALen - 1U); - - /* Initialisation of the pointer after zero padding */ - pDst = pDst + tot; - - /* Swapping the lengths */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - - /* Setting the reverse flag */ - inv = 1; - } - - /* Loop to calculate correlation for output length number of times */ - for (i = 0U; i <= tot; i++) - { - /* Initialize sum with zero to carry out MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to correlation equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - (int32_t) j)]); - } - } - - /* Store the output in the destination buffer */ - if (inv == 1) - *pDst-- = (q31_t) (sum >> 31U); - else - *pDst++ = (q31_t) (sum >> 31U); - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Corr group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c deleted file mode 100644 index 4dd255c..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c +++ /dev/null @@ -1,1002 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_correlate_q7.c - * Description: Correlation of Q7 sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup Corr - @{ - */ - -/** - @brief Correlation of Q7 sequences. - @param[in] pSrcA points to the first input sequence - @param[in] srcALen length of the first input sequence - @param[in] pSrcB points to the second input sequence - @param[in] srcBLen length of the second input sequence - @param[out] pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 32-bit internal accumulator. - Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. - The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. - The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format. - - @remark - Refer to \ref arm_correlate_opt_q7() for a faster implementation of this function. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_helium_utils.h" - -#include "arm_vec_filtering.h" -void arm_correlate_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst) -{ - const q7_t *pIn1 = pSrcA; /* inputA pointer */ - const q7_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */ - const q7_t *pX, *pY; - const q7_t *pA, *pB; - int32_t i = 0U, j = 0; /* loop counters */ - int32_t inv = 1U; /* Reverse order flag */ - uint32_t tot = 0U; /* Length */ - int32_t block1, block2, block3; - int32_t incr; - - tot = ((srcALen + srcBLen) - 2U); - if (srcALen > srcBLen) - { - /* - * Calculating the number of zeros to be padded to the output - */ - j = srcALen - srcBLen; - /* - * Initialize the pointer after zero padding - */ - pDst += j; - } - else if (srcALen < srcBLen) - { - /* - * Initialization to inputB pointer - */ - pIn1 = pSrcB; - /* - * Initialization to the end of inputA pointer - */ - pIn2 = pSrcA + (srcALen - 1U); - /* - * Initialisation of the pointer after zero padding - */ - pDst = pDst + tot; - /* - * Swapping the lengths - */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - /* - * Setting the reverse flag - */ - inv = -1; - } - - block1 = srcBLen - 1; - block2 = srcALen - srcBLen + 1; - block3 = srcBLen - 1; - - pA = pIn1; - pB = pIn2; - incr = inv; - - for (i = 0U; i <= block1 - 2; i += 2) - { - uint32_t count = i + 1; - int32_t acc0 = 0; - int32_t acc1 = 0; - - /* - * compute 2 accumulators per loop - * size is incrementing for second accumulator - * Y pointer is decrementing for second accumulator - */ - pX = pA; - pY = pB; - MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q7(acc0, acc1, pX, pY, count); - - *pDst = (q7_t) acc0; - pDst += incr; - *pDst = (q7_t) acc1; - pDst += incr; - pB -= 2; - } - for (; i < block1; i++) - { - uint32_t count = i + 1; - int32_t acc = 0; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, count); - - *pDst = (q7_t) acc; - pDst += incr; - pB--; - } - - for (i = 0U; i <= block2 - 4; i += 4) - { - int32_t acc0 = 0; - int32_t acc1 = 0; - int32_t acc2 = 0; - int32_t acc3 = 0; - - pX = pA; - pY = pB; - /* - * compute 4 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for successive accumulators - */ - MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q7(acc0, acc1, acc2, acc3, pX, pY, srcBLen); - - *pDst = (q7_t) acc0; - pDst += incr; - *pDst = (q7_t) acc1; - pDst += incr; - *pDst = (q7_t) acc2; - pDst += incr; - *pDst = (q7_t) acc3; - pDst += incr; - - pA += 4; - } - - for (; i <= block2 - 2; i += 2) - { - int32_t acc0 = 0LL; - int32_t acc1 = 0LL; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is fixed for all accumulators - * X pointer is incrementing for second accumulator - */ - MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q7(acc0, acc1, pX, pY, srcBLen); - - *pDst = (q7_t) acc0; - pDst += incr; - *pDst = (q7_t) acc1; - pDst += incr; - pA += 2; - } - - if (block2 & 1) - { - int32_t acc = 0LL; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, srcBLen); - - *pDst = (q7_t) acc; - pDst += incr; - pA++; - } - - for (i = block3 - 1; i >= 0; i -= 2) - { - uint32_t count = (i + 1); - int32_t acc0 = 0LL; - int32_t acc1 = 0LL; - - pX = pA; - pY = pB; - /* - * compute 2 accumulators per loop - * size is decrementing for second accumulator - * X pointer is incrementing for second accumulator - */ - MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q7(acc0, acc1, pX, pY, count); - - *pDst = (q7_t) acc0; - pDst += incr; - *pDst = (q7_t) acc1; - pDst += incr; - pA += 2; - - } - for (; i >= 0; i--) - { - uint32_t count = (i + 1); - int64_t acc = 0LL; - - pX = pA; - pY = pB; - MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, count); - - *pDst = (q7_t) acc; - pDst += incr; - pA++; - } -} - -#else -void arm_correlate_q7( - const q7_t * pSrcA, - uint32_t srcALen, - const q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst) -{ - -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) - - const q7_t *pIn1; /* InputA pointer */ - const q7_t *pIn2; /* InputB pointer */ - q7_t *pOut = pDst; /* Output pointer */ - const q7_t *px; /* Intermediate inputA pointer */ - const q7_t *py; /* Intermediate inputB pointer */ - const q7_t *pSrc1; /* Intermediate pointers */ - q31_t sum; /* Accumulators */ - uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */ - uint32_t j, k, count, blkCnt; /* Loop counters */ - uint32_t outBlockSize; - int32_t inc = 1; - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc0, acc1, acc2, acc3; /* Accumulators */ - q31_t input1, input2; /* Temporary input variables */ - q15_t in1, in2; /* Temporary input variables */ - q7_t x0, x1, x2, x3, c0, c1; /* Temporary variables for holding input and coefficient values */ -#endif - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and the destination pointer modifier, inc is set to -1 */ - /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */ - /* But to improve the performance, - * we include zeroes in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, - * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */ - /* If srcALen < srcBLen, - * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */ - if (srcALen >= srcBLen) - { - /* Initialization of inputA pointer */ - pIn1 = pSrcA; - - /* Initialization of inputB pointer */ - pIn2 = pSrcB; - - /* Number of output samples is calculated */ - outBlockSize = (2U * srcALen) - 1U; - - /* When srcALen > srcBLen, zero padding is done to srcB - * to make their lengths equal. - * Instead, (outBlockSize - (srcALen + srcBLen - 1)) - * number of output samples are made zero */ - j = outBlockSize - (srcALen + (srcBLen - 1U)); - - /* Updating the pointer position to non zero value */ - pOut += j; - } - else - { - /* Initialization of inputA pointer */ - pIn1 = pSrcB; - - /* Initialization of inputB pointer */ - pIn2 = pSrcA; - - /* srcBLen is always considered as shorter or equal to srcALen */ - j = srcBLen; - srcBLen = srcALen; - srcALen = j; - - /* CORR(x, y) = Reverse order(CORR(y, x)) */ - /* Hence set the destination pointer to point to the last output sample */ - pOut = pDst + ((srcALen + srcBLen) - 2U); - - /* Destination address modifier is set to -1 */ - inc = -1; - } - - /* The function is internally - * divided into three stages according to the number of multiplications that has to be - * taken place between inputA samples and inputB samples. In the first stage of the - * algorithm, the multiplications increase by one for every iteration. - * In the second stage of the algorithm, srcBLen number of multiplications are done. - * In the third stage of the algorithm, the multiplications decrease by one - * for every iteration. */ - - /* The algorithm is implemented in three stages. - The loop counters of each stage is initiated here. */ - blockSize1 = srcBLen - 1U; - blockSize2 = srcALen - (srcBLen - 1U); - blockSize3 = blockSize1; - - /* -------------------------- - * Initializations of stage1 - * -------------------------*/ - - /* sum = x[0] * y[srcBlen - 1] - * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1] - * .... - * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1] - */ - - /* In this stage the MAC operations are increased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = 1U; - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - pSrc1 = pIn2 + (srcBLen - 1U); - py = pSrc1; - - /* ------------------------ - * Stage1 process - * ----------------------*/ - - /* The first stage starts here */ - while (blockSize1 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* x[0] , x[1] */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 4] , y[srcBLen - 3] */ - in1 = (q15_t) *py++; - in2 = (q15_t) *py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* x[0] * y[srcBLen - 4] */ - /* x[1] * y[srcBLen - 3] */ - sum = __SMLAD(input1, input2, sum); - - /* x[2] , x[3] */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* y[srcBLen - 2] , y[srcBLen - 1] */ - in1 = (q15_t) *py++; - in2 = (q15_t) *py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16); - - /* x[2] * y[srcBLen - 2] */ - /* x[3] * y[srcBLen - 1] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize k with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - /* x[0] * y[srcBLen - 1] */ - sum += (q31_t) ((q15_t) *px++ * *py++); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(sum >> 7U, 8)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - py = pSrc1 - count; - px = pIn1; - - /* Increment MAC count */ - count++; - - /* Decrement loop counter */ - blockSize1--; - } - - /* -------------------------- - * Initializations of stage2 - * ------------------------*/ - - /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1] - * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1] - * .... - * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - */ - - /* Working pointer of inputA */ - px = pIn1; - - /* Working pointer of inputB */ - py = pIn2; - - /* count is index by which the pointer pIn1 to be incremented */ - count = 0U; - - /* ------------------- - * Stage2 process - * ------------------*/ - - /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed. - * So, to loop unroll over blockSize2, - * srcBLen should be greater than or equal to 4 */ - if (srcBLen >= 4U) - { -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize2 >> 2U; - - while (blkCnt > 0U) - { - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* read x[0], x[1], x[2] samples */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - k = srcBLen >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 MACs at a time. - ** a second loop below computes MACs for the remaining 1 to 3 samples. */ - do - { - /* Read y[0] sample */ - c0 = *py++; - /* Read y[1] sample */ - c1 = *py++; - - /* Read x[3] sample */ - x3 = *px++; - - /* x[0] and x[1] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* y[0] and y[1] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc0 += x[0] * y[0] + x[1] * y[1] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[1] and x[2] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc1 += x[1] * y[0] + x[2] * y[1] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc2 += x[2] * y[0] + x[3] * y[1] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[4] sample */ - x0 = *px++; - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc3 += x[3] * y[0] + x[4] * y[1] */ - acc3 = __SMLAD(input1, input2, acc3); - - /* Read y[2] sample */ - c0 = *py++; - /* Read y[3] sample */ - c1 = *py++; - - /* Read x[5] sample */ - x1 = *px++; - - /* x[2] and x[3] are packed */ - in1 = (q15_t) x2; - in2 = (q15_t) x3; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* y[2] and y[3] are packed */ - in1 = (q15_t) c0; - in2 = (q15_t) c1; - - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc0 += x[2] * y[2] + x[3] * y[3] */ - acc0 = __SMLAD(input1, input2, acc0); - - /* x[3] and x[4] are packed */ - in1 = (q15_t) x3; - in2 = (q15_t) x0; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc1 += x[3] * y[2] + x[4] * y[3] */ - acc1 = __SMLAD(input1, input2, acc1); - - /* x[4] and x[5] are packed */ - in1 = (q15_t) x0; - in2 = (q15_t) x1; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc2 += x[4] * y[2] + x[5] * y[3] */ - acc2 = __SMLAD(input1, input2, acc2); - - /* Read x[6] sample */ - x2 = *px++; - - /* x[5] and x[6] are packed */ - in1 = (q15_t) x1; - in2 = (q15_t) x2; - - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* acc3 += x[5] * y[2] + x[6] * y[3] */ - acc3 = __SMLAD(input1, input2, acc3); - - } while (--k); - - /* If the srcBLen is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - k = srcBLen % 0x4U; - - while (k > 0U) - { - /* Read y[4] sample */ - c0 = *py++; - /* Read x[7] sample */ - x3 = *px++; - - /* Perform the multiply-accumulates */ - /* acc0 += x[4] * y[4] */ - acc0 += ((q15_t) x0 * c0); - /* acc1 += x[5] * y[4] */ - acc1 += ((q15_t) x1 * c0); - /* acc2 += x[6] * y[4] */ - acc2 += ((q15_t) x2 * c0); - /* acc3 += x[7] * y[4] */ - acc3 += ((q15_t) x3 * c0); - - /* Reuse the present samples for the next MAC */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(acc0 >> 7, 8)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - *pOut = (q7_t) (__SSAT(acc1 >> 7, 8)); - pOut += inc; - - *pOut = (q7_t) (__SSAT(acc2 >> 7, 8)); - pOut += inc; - - *pOut = (q7_t) (__SSAT(acc3 >> 7, 8)); - pOut += inc; - - count += 4U; - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize2 % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize2; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = srcBLen >> 2U; - - while (k > 0U) - { - - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) *py++; - in2 = (q15_t) *py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* Perform the multiply-accumulate */ - sum = __SMLAD(input1, input2, sum); - - /* Reading two inputs of SrcA buffer and packing */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* Reading two inputs of SrcB buffer and packing */ - in1 = (q15_t) *py++; - in2 = (q15_t) *py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* Perform the multiply-accumulate */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = srcBLen % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = srcBLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q15_t) *px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(sum >> 7U, 8)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the pointer pIn1 index, count by 1 */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* If the srcBLen is not a multiple of 4, - * the blockSize2 loop cannot be unrolled by 4 */ - blkCnt = blockSize2; - - while (blkCnt > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - - /* srcBLen number of MACS should be performed */ - k = srcBLen; - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q15_t) *px++ * *py++); - - /* Decrement the loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(sum >> 7U, 8)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Increment the MAC count */ - count++; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = pIn1 + count; - py = pIn2; - - /* Decrement loop counter */ - blkCnt--; - } - } - - - /* -------------------------- - * Initializations of stage3 - * -------------------------*/ - - /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1] - * .... - * sum += x[srcALen-2] * y[0] + x[srcALen-1] * y[1] - * sum += x[srcALen-1] * y[0] - */ - - /* In this stage the MAC operations are decreased by 1 for every iteration. - The count variable holds the number of MAC operations performed */ - count = srcBLen - 1U; - - /* Working pointer of inputA */ - pSrc1 = pIn1 + (srcALen - (srcBLen - 1U)); - px = pSrc1; - - /* Working pointer of inputB */ - py = pIn2; - - /* ------------------- - * Stage3 process - * ------------------*/ - - while (blockSize3 > 0U) - { - /* Accumulator is made zero for every iteration */ - sum = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - k = count >> 2U; - - while (k > 0U) - { - /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2] */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* y[0] , y[1] */ - in1 = (q15_t) *py++; - in2 = (q15_t) *py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* sum += x[srcALen - srcBLen + 1] * y[0] */ - /* sum += x[srcALen - srcBLen + 2] * y[1] */ - sum = __SMLAD(input1, input2, sum); - - /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */ - in1 = (q15_t) *px++; - in2 = (q15_t) *px++; - input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* y[2] , y[3] */ - in1 = (q15_t) *py++; - in2 = (q15_t) *py++; - input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U); - - /* sum += x[srcALen - srcBLen + 3] * y[2] */ - /* sum += x[srcALen - srcBLen + 4] * y[3] */ - sum = __SMLAD(input1, input2, sum); - - /* Decrement loop counter */ - k--; - } - - /* Loop unrolling: Compute remaining outputs */ - k = count % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - k = count; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (k > 0U) - { - /* Perform the multiply-accumulate */ - sum += ((q15_t) *px++ * *py++); - - /* Decrement loop counter */ - k--; - } - - /* Store the result in the accumulator in the destination buffer. */ - *pOut = (q7_t) (__SSAT(sum >> 7U, 8)); - /* Destination pointer is updated according to the address modifier, inc */ - pOut += inc; - - /* Update the inputA and inputB pointers for next MAC calculation */ - px = ++pSrc1; - py = pIn2; - - /* Decrement MAC count */ - count--; - - /* Decrement loop counter */ - blockSize3--; - } - -#else -/* alternate version for CM0_FAMILY */ - - const q7_t *pIn1 = pSrcA; /* InputA pointer */ - const q7_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */ - q31_t sum; /* Accumulator */ - uint32_t i = 0U, j; /* Loop counters */ - uint32_t inv = 0U; /* Reverse order flag */ - uint32_t tot = 0U; /* Length */ - - /* The algorithm implementation is based on the lengths of the inputs. */ - /* srcB is always made to slide across srcA. */ - /* So srcBLen is always considered as shorter or equal to srcALen */ - /* But CORR(x, y) is reverse of CORR(y, x) */ - /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */ - /* and a varaible, inv is set to 1 */ - /* If lengths are not equal then zero pad has to be done to make the two - * inputs of same length. But to improve the performance, we include zeroes - * in the output instead of zero padding either of the the inputs*/ - /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the - * starting of the output buffer */ - /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the - * ending of the output buffer */ - /* Once the zero padding is done the remaining of the output is calcualted - * using convolution but with the shorter signal time shifted. */ - - /* Calculate the length of the remaining sequence */ - tot = ((srcALen + srcBLen) - 2U); - - if (srcALen > srcBLen) - { - /* Calculating the number of zeros to be padded to the output */ - j = srcALen - srcBLen; - - /* Initialise the pointer after zero padding */ - pDst += j; - } - - else if (srcALen < srcBLen) - { - /* Initialization to inputB pointer */ - pIn1 = pSrcB; - - /* Initialization to the end of inputA pointer */ - pIn2 = pSrcA + (srcALen - 1U); - - /* Initialisation of the pointer after zero padding */ - pDst = pDst + tot; - - /* Swapping the lengths */ - j = srcALen; - srcALen = srcBLen; - srcBLen = j; - - /* Setting the reverse flag */ - inv = 1; - } - - /* Loop to calculate convolution for output length number of times */ - for (i = 0U; i <= tot; i++) - { - /* Initialize sum with zero to carry out MAC operations */ - sum = 0; - - /* Loop to perform MAC operations according to convolution equation */ - for (j = 0U; j <= i; j++) - { - /* Check the array limitations */ - if (((i - j) < srcBLen) && (j < srcALen)) - { - /* z[i] += x[i-j] * y[j] */ - sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - (int32_t) j)]); - } - } - - /* Store the output in the destination buffer */ - if (inv == 1) - *pDst-- = (q7_t) __SSAT((sum >> 7U), 8U); - else - *pDst++ = (q7_t) __SSAT((sum >> 7U), 8U); - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Corr group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c deleted file mode 100644 index cc470bb..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c +++ /dev/null @@ -1,951 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_decimate_f32.c - * Description: FIR decimation for floating-point sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator - - These functions combine an FIR filter together with a decimator. - They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion. - Conceptually, the functions are equivalent to the block diagram below: - \image html FIRDecimator.gif "Components included in the FIR Decimator functions" - When decimating by a factor of M, the signal should be prefiltered by a lowpass filter with a normalized - cutoff frequency of 1/M in order to prevent aliasing distortion. - The user of the function is responsible for providing the filter coefficients. - - The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner. - Instead of calculating all of the FIR filter outputs and discarding M-1 out of every M, only the - samples output by the decimator are computed. - The functions operate on blocks of input and output data. - pSrc points to an array of blockSize input values and - pDst points to an array of blockSize/M output values. - In order to have an integer number of output samples blockSize - must always be a multiple of the decimation factor M. - - The library provides separate functions for Q15, Q31 and floating-point data types. - - @par Algorithm: - The FIR portion of the algorithm uses the standard form filter: - 
-      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
-
- where, b[n] are the filter coefficients. - @par - The pCoeffs points to a coefficient array of size numTaps. - Coefficients are stored in time reversed order. - @par - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to a state array of size numTaps + blockSize - 1. - Samples in the state buffer are stored in the order: - @par - 
-      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
-
- The state variables are updated after each block of data is processed, the coefficients are untouched. - - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter. - Coefficient arrays may be shared among several instances while state variable array should be allocated separately. - There are separate instance structure declarations for each of the 3 supported data types. - - @par Initialization Functions - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - - Checks to make sure that the size of the input is a multiple of the decimation factor. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero. - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - The code below statically initializes each of the 3 different data type filter instance structures - 
-      arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
-      arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
-      arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
-
- where M is the decimation factor; numTaps is the number of filter coefficients in the filter; - pCoeffs is the address of the coefficient buffer; - pState is the address of the state buffer. - Be sure to set the values in the state buffer to zeros when doing static initialization. - - @par Fixed-Point Behavior - Care must be taken when using the fixed-point versions of the FIR decimate filter functions. - In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - Refer to the function specific documentation below for usage guidelines. - */ - -/** - @addtogroup FIR_decimate - @{ - */ - -/** - @brief Processing function for floating-point FIR decimator. - @param[in] S points to an instance of the floating-point FIR decimator structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_fir_decimate_f32( - const arm_fir_decimate_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - const float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - uint32_t blkCntN4; - const float32_t *px0, *px1, *px2, *px3; - f32x4_t accv, acc0v, acc1v, acc2v, acc3v; - f32x4_t x0v, x1v, x2v, x3v; - f32x4_t c0v; - - /* - * S->pState buffer contains previous frame (numTaps - 1) samples - * pStateCurnt points to the location where the new input data should be written - */ - pStateCurnt = S->pState + (numTaps - 1U); - /* - * Total number of output samples to be computed - */ - blkCnt = outBlockSize / 4; - blkCntN4 = outBlockSize - (4 * blkCnt); - - while (blkCnt > 0U) - { - /* - * Copy 4 * decimation factor number of new input samples into the state buffer - */ - i = (4 * S->M) >> 2; - do - { - vst1q(pStateCurnt, vld1q((const float32_t *)pSrc)); - pSrc += 4; - pStateCurnt += 4; - i--; - } - while (i > 0U); - - /* - * Set accumulators to zero - */ - acc0v = vdupq_n_f32(0.0f); - acc1v = vdupq_n_f32(0.0f); - acc2v = vdupq_n_f32(0.0f); - acc3v = vdupq_n_f32(0.0f); - - /* - * Initialize state pointer for all the samples - */ - px0 = pState; - px1 = pState + S->M; - px2 = pState + 2 * S->M; - px3 = pState + 3 * S->M; - /* - * Initialize coeff pointer - */ - pb = pCoeffs; - /* - * Loop unrolling. Process 4 taps at a time. - */ - tapCnt = numTaps >> 2; - /* - * Loop over the number of taps. Unroll by a factor of 4. - * Repeat until we've computed numTaps-4 coefficients. - */ - while (tapCnt > 0U) - { - /* - * Read the b[numTaps-1] coefficient - */ - c0v = vld1q((const float32_t *)pb); - pb += 4; - /* - * Read x[n-numTaps-1] sample for acc0 - */ - x0v = vld1q(px0); - x1v = vld1q(px1); - x2v = vld1q(px2); - x3v = vld1q(px3); - px0 += 4; - px1 += 4; - px2 += 4; - px3 += 4; - - acc0v = vfmaq(acc0v, x0v, c0v); - acc1v = vfmaq(acc1v, x1v, c0v); - acc2v = vfmaq(acc2v, x2v, c0v); - acc3v = vfmaq(acc3v, x3v, c0v); - /* - * Decrement the loop counter - */ - tapCnt--; - } - - /* - * If the filter length is not a multiple of 4, compute the remaining filter taps - * should be tail predicated - */ - tapCnt = numTaps % 0x4U; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - /* - * Read the b[numTaps-1] coefficient - */ - c0v = vldrwq_z_f32(pb, p0); - pb += 4; - /* - * Read x[n-numTaps-1] sample for acc0 - */ - x0v = vld1q(px0); - x1v = vld1q(px1); - x2v = vld1q(px2); - x3v = vld1q(px3); - px0 += 4; - px1 += 4; - px2 += 4; - px3 += 4; - - acc0v = vfmaq_f32(acc0v, x0v, c0v); - acc1v = vfmaq_f32(acc1v, x1v, c0v); - acc2v = vfmaq_f32(acc2v, x2v, c0v); - acc3v = vfmaq_f32(acc3v, x3v, c0v); - } - - /* reduction */ - accv[0] = vecAddAcrossF32Mve(acc0v); - accv[1] = vecAddAcrossF32Mve(acc1v); - accv[2] = vecAddAcrossF32Mve(acc2v); - accv[3] = vecAddAcrossF32Mve(acc3v); - - /* - * Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples - */ - pState = pState + 4 * S->M; - /* - * The result is in the accumulator, store in the destination buffer. - */ - vst1q(pDst, accv); - pDst += 4; - - /* - * Decrement the loop counter - */ - blkCnt--; - } - - while (blkCntN4 > 0U) - { - /* - * Copy decimation factor number of new input samples into the state buffer - */ - i = S->M; - do - { - *pStateCurnt++ = *pSrc++; - } - while (--i); - /* - * Set accumulator to zero - */ - acc0v = vdupq_n_f32(0.0f); - /* - * Initialize state pointer - */ - px = pState; - /* - * Initialize coeff pointer - */ - pb = pCoeffs; - /* - * Loop unrolling. Process 4 taps at a time. - */ - tapCnt = numTaps >> 2; - /* - * Loop over the number of taps. Unroll by a factor of 4. - * Repeat until we've computed numTaps-4 coefficients. - */ - while (tapCnt > 0U) - { - c0v = vldrwq_f32(pb); - x0v = vldrwq_f32(px); - pb += 4; - px += 4; - acc0v = vfmaq_f32(acc0v, x0v, c0v); - /* - * Decrement the loop counter - */ - tapCnt--; - } - tapCnt = numTaps % 0x4U; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - c0v = vldrwq_z_f32(pb, p0); - x0v = vldrwq_f32(px); - acc0v = vfmaq_f32(acc0v, x0v, c0v); - } - accv[0] = vecAddAcrossF32Mve(acc0v); - - /* - * Advance the state pointer by the decimation factor - * * to process the next group of decimation factor number samples - */ - pState = pState + S->M; - /* - * The result is in the accumulator, store in the destination buffer. - */ - *pDst++ = accv[0]; - /* - * Decrement the loop counter - */ - blkCntN4--; - } - - /* - * Processing is complete. - * Now copy the last numTaps - 1 samples to the start of the state buffer. - * This prepares the state buffer for the next function call. - */ - - pStateCurnt = S->pState; - blkCnt =(numTaps - 1) >> 2; - while (blkCnt > 0U) - { - vst1q(pStateCurnt, vldrwq_f32(pState)); - pState += 4; - pStateCurnt += 4; - blkCnt--; - } - blkCnt = (numTaps - 1) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vstrwq_p_f32(pStateCurnt, vldrwq_f32(pState), p0); - } -} -#else -#if defined(ARM_MATH_NEON) -void arm_fir_decimate_f32( - const arm_fir_decimate_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px; /* Temporary pointer for state buffer */ - const float32_t *pb; /* Temporary pointer for coefficient buffer */ - float32_t sum0; /* Accumulator */ - float32_t x0, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - - uint32_t blkCntN4; - float32_t *px0, *px1, *px2, *px3; - float32_t x1, x2, x3; - - float32x4_t accv,acc0v,acc1v,acc2v,acc3v; - float32x4_t x0v, x1v, x2v, x3v; - float32x4_t c0v; - float32x2_t temp; - float32x4_t sum0v; - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (numTaps - 1U); - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize / 4; - blkCntN4 = outBlockSize - (4 * blkCnt); - - while (blkCnt > 0U) - { - /* Copy 4 * decimation factor number of new input samples into the state buffer */ - i = 4 * S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while (--i); - - /* Set accumulators to zero */ - acc0v = vdupq_n_f32(0.0); - acc1v = vdupq_n_f32(0.0); - acc2v = vdupq_n_f32(0.0); - acc3v = vdupq_n_f32(0.0); - - /* Initialize state pointer for all the samples */ - px0 = pState; - px1 = pState + S->M; - px2 = pState + 2 * S->M; - px3 = pState + 3 * S->M; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. - ** Repeat until we've computed numTaps-4 coefficients. */ - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0v = vld1q_f32(pb); - pb += 4; - - /* Read x[n-numTaps-1] sample for acc0 */ - x0v = vld1q_f32(px0); - x1v = vld1q_f32(px1); - x2v = vld1q_f32(px2); - x3v = vld1q_f32(px3); - - px0 += 4; - px1 += 4; - px2 += 4; - px3 += 4; - - acc0v = vmlaq_f32(acc0v, x0v, c0v); - acc1v = vmlaq_f32(acc1v, x1v, c0v); - acc2v = vmlaq_f32(acc2v, x2v, c0v); - acc3v = vmlaq_f32(acc3v, x3v, c0v); - - /* Decrement the loop counter */ - tapCnt--; - } - - temp = vpadd_f32(vget_low_f32(acc0v),vget_high_f32(acc0v)); - accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,0); - - temp = vpadd_f32(vget_low_f32(acc1v),vget_high_f32(acc1v)); - accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,1); - - temp = vpadd_f32(vget_low_f32(acc2v),vget_high_f32(acc2v)); - accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,2); - - temp = vpadd_f32(vget_low_f32(acc3v),vget_high_f32(acc3v)); - accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,3); - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch state variables for acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - accv = vsetq_lane_f32(vgetq_lane_f32(accv, 0) + x0 * c0,accv,0); - accv = vsetq_lane_f32(vgetq_lane_f32(accv, 1) + x1 * c0,accv,1); - accv = vsetq_lane_f32(vgetq_lane_f32(accv, 2) + x2 * c0,accv,2); - accv = vsetq_lane_f32(vgetq_lane_f32(accv, 3) + x3 * c0,accv,3); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + 4 * S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - vst1q_f32(pDst,accv); - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - while (blkCntN4 > 0U) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCurnt++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - sum0v = vdupq_n_f32(0.0); - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Loop over the number of taps. - ** Repeat until we've computed numTaps-4 coefficients. */ - while (tapCnt > 0U) - { - c0v = vld1q_f32(pb); - pb += 4; - - x0v = vld1q_f32(px); - px += 4; - - sum0v = vmlaq_f32(sum0v, x0v, c0v); - - /* Decrement the loop counter */ - tapCnt--; - } - - temp = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v)); - sum0 = vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1); - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = sum0; - - /* Decrement the loop counter */ - blkCntN4--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - i = (numTaps - 1U) >> 2; - - /* Copy data */ - while (i > 0U) - { - sum0v = vld1q_f32(pState); - vst1q_f32(pStateCurnt,sum0v); - pState += 4; - pStateCurnt += 4; - - /* Decrement the loop counter */ - i--; - } - - i = (numTaps - 1U) % 0x04U; - - /* Copy data */ - while (i > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - i--; - } -} -#else -void arm_fir_decimate_f32( - const arm_fir_decimate_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCur; /* Points to the current sample of the state */ - float32_t *px0; /* Temporary pointer for state buffer */ - const float32_t *pb; /* Temporary pointer for coefficient buffer */ - float32_t x0, c0; /* Temporary variables to hold state and coefficient values */ - float32_t acc0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - float32_t *px1, *px2, *px3; - float32_t x1, x2, x3; - float32_t acc1, acc2, acc3; -#endif - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (numTaps - 1U); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 samples at a time */ - blkCnt = outBlockSize >> 2U; - - /* Samples loop unrolled by 4 */ - while (blkCnt > 0U) - { - /* Copy 4 * decimation factor number of new input samples into the state buffer */ - i = S->M * 4; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - - /* Initialize state pointer for all the samples */ - px0 = pState; - px1 = pState + S->M; - px2 = pState + 2 * S->M; - px3 = pState + 3 * S->M; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-1] sample for acc0 */ - x0 = *(px0++); - /* Read x[n-numTaps-1] sample for acc1 */ - x1 = *(px1++); - /* Read x[n-numTaps-1] sample for acc2 */ - x2 = *(px2++); - /* Read x[n-numTaps-1] sample for acc3 */ - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch state variables for acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 4; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = acc0; - *pDst++ = acc1; - *pDst++ = acc2; - *pDst++ = acc3; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining samples */ - blkCnt = outBlockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = outBlockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - acc0 = 0.0f; - - /* Initialize state pointer */ - px0 = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-1] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-3] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = acc0; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the satrt of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = (numTaps - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numTaps - 1U) % 0x04U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} -#endif /* #if defined(ARM_MATH_NEON) */ - -#endif /*defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of FIR_decimate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c deleted file mode 100644 index 0de5d8d..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c +++ /dev/null @@ -1,595 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_decimate_fast_q15.c - * Description: Fast Q15 FIR Decimator - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_decimate - @{ - */ - -/** - @brief Processing function for the Q15 FIR decimator (fast variant). - @param[in] S points to an instance of the Q15 FIR decimator structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of input samples to process per call - @return none - - @par Scaling and Overflow Behavior - This fast version uses a 32-bit accumulator with 2.30 format. - The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around and distorts the result. - In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2). - The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result. - @remark - Refer to \ref arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. - Both the slow and the fast versions use the same instance structure. - Use function \ref arm_fir_decimate_init_q15() to initialize the filter structure. - */ - -#if defined (ARM_MATH_DSP) - -void arm_fir_decimate_fast_q15( - const arm_fir_decimate_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCur; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - const q15_t *pb; /* Temporary pointer for coefficient buffer */ - q31_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */ - q31_t sum0; /* Accumulators */ - q31_t acc0, acc1; - q15_t *px0, *px1; - uint32_t blkCntN3; - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t c1; /* Temporary variables to hold state and coefficient values */ -#endif - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (numTaps - 1U); - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize / 2; - blkCntN3 = outBlockSize - (2 * blkCnt); - - while (blkCnt > 0U) - { - /* Copy 2 * decimation factor number of new input samples into the state buffer */ - i = S->M * 2; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer for all the samples */ - px0 = pState; - px1 = pState + S->M; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] and b[numTaps-2] coefficients */ - c0 = read_q15x2_ia ((q15_t **) &pb); - - /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */ - x0 = read_q15x2_ia (&px0); - x1 = read_q15x2_ia (&px1); - - /* Perform the multiply-accumulate */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - - /* Read the b[numTaps-3] and b[numTaps-4] coefficient */ - c0 = read_q15x2_ia ((q15_t **) &pb); - - /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ - x0 = read_q15x2_ia (&px0); - x1 = read_q15x2_ia (&px1); - - /* Perform the multiply-accumulate */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch state variables for acc0, acc1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLAD(x0, c0, acc0); - acc1 = __SMLAD(x1, c0, acc1); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 2; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); - - /* Decrement loop counter */ - blkCnt--; - } - - while (blkCntN3 > 0U) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] and b[numTaps-2] coefficients */ - c0 = read_q15x2_ia ((q15_t **) &pb); - - /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */ - x0 = read_q15x2_ia (&px); - - /* Read the b[numTaps-3] and b[numTaps-4] coefficients */ - c1 = read_q15x2_ia ((q15_t **) &pb); - - /* Perform the multiply-accumulate */ - sum0 = __SMLAD(x0, c0, sum0); - - /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ - x0 = read_q15x2_ia (&px); - - /* Perform the multiply-accumulate */ - sum0 = __SMLAD(x0, c1, sum0); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 = __SMLAD(x0, c0, sum0); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Decrement loop counter */ - blkCntN3--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the satrt of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - - i = (numTaps - 1U) >> 2U; - - /* copy data */ - while (i > 0U) - { - write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); - write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); - - /* Decrement loop counter */ - i--; - } - - i = (numTaps - 1U) % 0x04U; - - /* Copy data */ - while (i > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - i--; - } - -} - -#else /* #if defined (ARM_MATH_DSP) */ - -void arm_fir_decimate_fast_q15( - const arm_fir_decimate_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCur; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - const q15_t *pb; /* Temporary pointer for coefficient buffer */ - q15_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */ - q31_t sum0; /* Accumulators */ - q31_t acc0, acc1; - q15_t *px0, *px1; - uint32_t blkCntN3; - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (numTaps - 1U); - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize / 2; - blkCntN3 = outBlockSize - (2 * blkCnt); - - while (blkCnt > 0U) - { - /* Copy 2 * decimation factor number of new input samples into the state buffer */ - i = S->M * 2; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer */ - px0 = pState; - px1 = pState + S->M; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the Read b[numTaps-1] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-1] for sample 0 and for sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-3] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-3] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 2; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); - - /* Decrement loop counter */ - blkCnt--; - } - - while (blkCntN3 > 0U) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-1] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-3] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Decrement loop counter */ - blkCntN3--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - - i = (numTaps - 1U) >> 2U; - - /* copy data */ - while (i > 0U) - { - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - i--; - } - - i = (numTaps - 1U) % 0x04U; - - /* copy data */ - while (i > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - i--; - } -} - -#endif /* #if defined (ARM_MATH_DSP) */ - -/** - @} end of FIR_decimate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c deleted file mode 100644 index 5784b6b..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c +++ /dev/null @@ -1,390 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_decimate_fast_q31.c - * Description: Fast Q31 FIR Decimator - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_decimate - @{ - */ - -/** - @brief Processing function for the Q31 FIR decimator (fast variant). - @param[in] S points to an instance of the Q31 FIR decimator structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - This function is optimized for speed at the expense of fixed-point precision and overflow protection. - The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. - These intermediate results are added to a 2.30 accumulator. - Finally, the accumulator is saturated and converted to a 1.31 result. - The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. - In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2). - - @remark - Refer to \ref arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. - Both the slow and the fast versions use the same instance structure. - Use function \ref arm_fir_decimate_init_q31() to initialize the filter structure. - */ - -void arm_fir_decimate_fast_q31( - const arm_fir_decimate_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCur; /* Points to the current sample of the state */ - q31_t *px0; /* Temporary pointer for state buffer */ - const q31_t *pb; /* Temporary pointer for coefficient buffer */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - q63_t acc0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t *px1, *px2, *px3; - q31_t x1, x2, x3; - q63_t acc1, acc2, acc3; -#endif - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (numTaps - 1U); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 samples at a time */ - blkCnt = outBlockSize >> 2U; - - /* Samples loop unrolled by 4 */ - while (blkCnt > 0U) - { - /* Copy 4 * decimation factor number of new input samples into the state buffer */ - i = S->M * 4; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Initialize state pointer for all the samples */ - px0 = pState; - px1 = pState + S->M; - px2 = pState + 2 * S->M; - px3 = pState + 3 * S->M; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-1] sample for acc0 */ - x0 = *(px0++); - /* Read x[n-numTaps-1] sample for acc1 */ - x1 = *(px1++); - /* Read x[n-numTaps-1] sample for acc2 */ - x2 = *(px2++); - /* Read x[n-numTaps-1] sample for acc3 */ - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch state variables for acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32); - acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32); - acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 4; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (acc0 << 1); - *pDst++ = (q31_t) (acc1 << 1); - *pDst++ = (q31_t) (acc2 << 1); - *pDst++ = (q31_t) (acc3 << 1); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining samples */ - blkCnt = outBlockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = outBlockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - acc0 = 0; - - /* Initialize state pointer */ - px0 = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-1] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read the b[numTaps-3] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-3] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (acc0 << 1); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the satrt of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = (numTaps - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numTaps - 1U) % 0x04U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} - -/** - @} end of FIR_decimate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c deleted file mode 100644 index 595037c..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c +++ /dev/null @@ -1,105 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_decimate_init_f32.c - * Description: Floating-point FIR Decimator initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_decimate - @{ - */ - -/** - @brief Initialization function for the floating-point FIR decimator. - @param[in,out] S points to an instance of the floating-point FIR decimator structure - @param[in] numTaps number of coefficients in the filter - @param[in] M decimation factor - @param[in] pCoeffs points to the filter coefficients - @param[in] pState points to the state buffer - @param[in] blockSize number of input samples to process per call - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of M - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to the array of state variables. - pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_f32(). - M is the decimation factor. - */ - -arm_status arm_fir_decimate_init_f32( - arm_fir_decimate_instance_f32 * S, - uint16_t numTaps, - uint8_t M, - const float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The size of the input block must be a multiple of the decimation factor */ - if ((blockSize % M) != 0U) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Decimation Factor */ - S->M = M; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -} - -/** - @} end of FIR_decimate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c deleted file mode 100644 index b579b57..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c +++ /dev/null @@ -1,106 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_decimate_init_q15.c - * Description: Initialization function for the Q15 FIR Decimator - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_decimate - @{ - */ - -/** - @brief Initialization function for the Q15 FIR decimator. - @param[in,out] S points to an instance of the Q15 FIR decimator structure - @param[in] numTaps number of coefficients in the filter - @param[in] M decimation factor - @param[in] pCoeffs points to the filter coefficients - @param[in] pState points to the state buffer - @param[in] blockSize number of input samples to process - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of M - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to the array of state variables. - pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples - to the call arm_fir_decimate_q15(). - M is the decimation factor. - */ - -arm_status arm_fir_decimate_init_q15( - arm_fir_decimate_instance_q15 * S, - uint16_t numTaps, - uint8_t M, - const q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The size of the input block must be a multiple of the decimation factor */ - if ((blockSize % M) != 0U) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Decimation Factor */ - S->M = M; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -} - -/** - @} end of FIR_decimate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c deleted file mode 100644 index 95d640a..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c +++ /dev/null @@ -1,105 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_decimate_init_q31.c - * Description: Initialization function for Q31 FIR Decimation filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_decimate - @{ - */ - -/** - @brief Initialization function for the Q31 FIR decimator. - @param[in,out] S points to an instance of the Q31 FIR decimator structure - @param[in] numTaps number of coefficients in the filter - @param[in] M decimation factor - @param[in] pCoeffs points to the filter coefficients - @param[in] pState points to the state buffer - @param[in] blockSize number of input samples to process - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of M - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to the array of state variables. - pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_q31(). - M is the decimation factor. - */ - -arm_status arm_fir_decimate_init_q31( - arm_fir_decimate_instance_q31 * S, - uint16_t numTaps, - uint8_t M, - const q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The size of the input block must be a multiple of the decimation factor */ - if ((blockSize % M) != 0U) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Decimation Factor */ - S->M = M; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -} - -/** - @} end of FIR_decimate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c deleted file mode 100644 index 7cbd2ee..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c +++ /dev/null @@ -1,851 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_decimate_q15.c - * Description: Q15 FIR Decimator - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_decimate - @{ - */ - -/** - @brief Processing function for the Q15 FIR decimator. - @param[in] S points to an instance of the Q15 FIR decimator structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of input samples to process per call - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - Lastly, the accumulator is saturated to yield a result in 1.15 format. - - @remark - Refer to \ref arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_fir_decimate_q15( - const arm_fir_decimate_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - const q15_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - uint32_t blkCntN4; - const q15_t *px0, *px1, *px2, *px3; - q63_t acc0v, acc1v, acc2v, acc3v; - q15x8_t x0v, x1v, x2v, x3v; - q15x8_t c0v; - - /* - * S->pState buffer contains previous frame (numTaps - 1) samples - * pStateCurnt points to the location where the new input data should be written - */ - pStateCurnt = S->pState + (numTaps - 1U); - /* - * Total number of output samples to be computed - */ - blkCnt = outBlockSize / 4; - blkCntN4 = outBlockSize - (4 * blkCnt); - - while (blkCnt > 0U) - { - /* - * Need extra temp variables as 4 * S->M is not necessarily a multiple of 8 - * and cause final tail predicated post incremented pointers to jump ahead - */ - const q15_t *pSrcTmp = pSrc; - q15_t *pStateCurntTmp = pStateCurnt; - - /* - * Copy 4 * decimation factor number of new input samples into the state buffer - */ - i = (4 * S->M) >> 3; - while (i > 0U) - { - vstrhq_s16(pStateCurntTmp, vldrhq_s16(pSrcTmp)); - pSrcTmp += 8; - pStateCurntTmp += 8; - i--; - } - i = (4 * S->M) & 7; - if (i > 0U) - { - mve_pred16_t p0 = vctp16q(i); - vstrhq_p_s16(pStateCurntTmp, vldrhq_s16(pSrcTmp), p0); - } - - pSrc += (4 * S->M); - pStateCurnt += (4 * S->M); - - /* - * Clear all accumulators - */ - acc0v = 0LL; - acc1v = 0LL; - acc2v = 0LL; - acc3v = 0LL; - /* - * Initialize state pointer for all the samples - */ - px0 = pState; - px1 = pState + S->M; - px2 = pState + 2 * S->M; - px3 = pState + 3 * S->M; - /* - * Initialize coeff. pointer - */ - pb = pCoeffs; - - tapCnt = numTaps >> 3; - /* - * Loop over the number of taps. Unroll by a factor of 4. - * Repeat until we've computed numTaps-4 coefficients. - */ - while (tapCnt > 0U) - { - /* - * Read the b[numTaps-1] coefficient - */ - c0v = vldrhq_s16(pb); - pb += 8; - /* - * Read x[n-numTaps-1] sample for acc0 - */ - x0v = vld1q(px0); - x1v = vld1q(px1); - x2v = vld1q(px2); - x3v = vld1q(px3); - px0 += 8; - px1 += 8; - px2 += 8; - px3 += 8; - - acc0v = vmlaldavaq(acc0v, x0v, c0v); - acc1v = vmlaldavaq(acc1v, x1v, c0v); - acc2v = vmlaldavaq(acc2v, x2v, c0v); - acc3v = vmlaldavaq(acc3v, x3v, c0v); - /* - * Decrement the loop counter - */ - tapCnt--; - } - - /* - * If the filter length is not a multiple of 4, compute the remaining filter taps - * should be tail predicated - */ - tapCnt = numTaps & 7; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp16q(tapCnt); - /* - * Read the b[numTaps-1] coefficient - */ - c0v = vldrhq_z_s16(pb, p0); - pb += 8; - /* - * Read x[n-numTaps-1] sample for acc0 - */ - x0v = vld1q(px0); - x1v = vld1q(px1); - x2v = vld1q(px2); - x3v = vld1q(px3); - px0 += 8; - px1 += 8; - px2 += 8; - px3 += 8; - - acc0v = vmlaldavaq(acc0v, x0v, c0v); - acc1v = vmlaldavaq(acc1v, x1v, c0v); - acc2v = vmlaldavaq(acc2v, x2v, c0v); - acc3v = vmlaldavaq(acc3v, x3v, c0v); - } - - acc0v = asrl(acc0v, 15); - acc1v = asrl(acc1v, 15); - acc2v = asrl(acc2v, 15); - acc3v = asrl(acc3v, 15); - /* - * store in the destination buffer. - */ - *pDst++ = (q15_t) __SSAT((q31_t) acc0v, 16); - *pDst++ = (q15_t) __SSAT((q31_t) acc1v, 16);; - *pDst++ = (q15_t) __SSAT((q31_t) acc2v, 16);; - *pDst++ = (q15_t) __SSAT((q31_t) acc3v, 16);; - - /* - * Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples - */ - pState = pState + 4 * S->M; - /* - * Decrement the loop counter - */ - blkCnt--; - } - - while (blkCntN4 > 0U) - { - /* - * Copy decimation factor number of new input samples into the state buffer - */ - i = S->M; - do - { - *pStateCurnt++ = *pSrc++; - } - while (--i); - /* - * Set accumulator to zero - */ - acc0v = 0LL; - /* - * Initialize state pointer - */ - px = pState; - /* - * Initialize coeff. pointer - */ - pb = pCoeffs; - - tapCnt = numTaps >> 3; - while (tapCnt > 0U) - { - c0v = vldrhq_s16(pb); - x0v = vldrhq_s16(px); - pb += 8; - px += 8; - acc0v = vmlaldavaq(acc0v, x0v, c0v); - /* - * Decrement the loop counter - */ - tapCnt--; - } - - tapCnt = numTaps & 7; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp16q(tapCnt); - c0v = vldrhq_z_s16(pb, p0); - x0v = vldrhq_z_s16(px, p0); - acc0v = vmlaldavaq_p(acc0v, x0v, c0v, p0); - } - - acc0v = asrl(acc0v, 15); - - /* - * Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples - */ - pState = pState + S->M; - /* - * The result is in the accumulator, store in the destination buffer. - */ - *pDst++ = (q15_t) __SSAT((q31_t) acc0v, 16); - /* - * Decrement the loop counter - */ - blkCntN4--; - } - - /* - * Processing is complete. - * Now copy the last numTaps - 1 samples to the start of the state buffer. - * This prepares the state buffer for the next function call. - */ - - pStateCurnt = S->pState; - blkCnt = (numTaps - 1) >> 3; - while (blkCnt > 0U) - { - vstrhq_s16(pStateCurnt, vldrhq_s16(pState)); - pState += 8; - pStateCurnt += 8; - blkCnt--; - } - blkCnt = (numTaps - 1) & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vstrhq_p_s16(pStateCurnt, vldrhq_s16(pState), p0); - } -} -#else -#if defined (ARM_MATH_DSP) - -void arm_fir_decimate_q15( - const arm_fir_decimate_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCur; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - const q15_t *pb; /* Temporary pointer for coefficient buffer */ - q31_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */ - q63_t sum0; /* Accumulators */ - q63_t acc0, acc1; - q15_t *px0, *px1; - uint32_t blkCntN3; - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t c1; /* Temporary variables to hold state and coefficient values */ -#endif - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (numTaps - 1U); - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize / 2; - blkCntN3 = outBlockSize - (2 * blkCnt); - - while (blkCnt > 0U) - { - /* Copy 2 * decimation factor number of new input samples into the state buffer */ - i = S->M * 2; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer for all the samples */ - px0 = pState; - px1 = pState + S->M; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] and b[numTaps-2] coefficients */ - c0 = read_q15x2_ia ((q15_t **) &pb); - - /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */ - x0 = read_q15x2_ia (&px0); - x1 = read_q15x2_ia (&px1); - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - - /* Read the b[numTaps-3] and b[numTaps-4] coefficient */ - c0 = read_q15x2_ia ((q15_t **) &pb); - - /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ - x0 = read_q15x2_ia (&px0); - x1 = read_q15x2_ia (&px1); - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch state variables for acc0, acc1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 = __SMLALD(x0, c0, acc0); - acc1 = __SMLALD(x1, c0, acc1); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 2; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); - - /* Decrement loop counter */ - blkCnt--; - } - - while (blkCntN3 > 0U) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] and b[numTaps-2] coefficients */ - c0 = read_q15x2_ia ((q15_t **) &pb); - - /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */ - x0 = read_q15x2_ia (&px); - - /* Read the b[numTaps-3] and b[numTaps-4] coefficients */ - c1 = read_q15x2_ia ((q15_t **) &pb); - - /* Perform the multiply-accumulate */ - sum0 = __SMLALD(x0, c0, sum0); - - /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */ - x0 = read_q15x2_ia (&px); - - /* Perform the multiply-accumulate */ - sum0 = __SMLALD(x0, c1, sum0); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 = __SMLALD(x0, c0, sum0); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Decrement loop counter */ - blkCntN3--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the satrt of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - i = (numTaps - 1U) >> 2U; - - /* copy data */ - while (i > 0U) - { - write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); - write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); - - /* Decrement loop counter */ - i--; - } - - i = (numTaps - 1U) % 0x04U; - - /* Copy data */ - while (i > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - i--; - } - -} - -#else /* #if defined (ARM_MATH_DSP) */ - -void arm_fir_decimate_q15( - const arm_fir_decimate_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCur; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - const q15_t *pb; /* Temporary pointer for coefficient buffer */ - q15_t x0, x1, c0; /* Temporary variables to hold state and coefficient values */ - q63_t sum0; /* Accumulators */ - q63_t acc0, acc1; - q15_t *px0, *px1; - uint32_t blkCntN3; - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (numTaps - 1U); - - /* Total number of output samples to be computed */ - blkCnt = outBlockSize / 2; - blkCntN3 = outBlockSize - (2 * blkCnt); - - while (blkCnt > 0U) - { - /* Copy 2 * decimation factor number of new input samples into the state buffer */ - i = S->M * 2; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - - /* Initialize state pointer */ - px0 = pState; - px1 = pState + S->M; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the Read b[numTaps-1] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-1] for sample 0 and for sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-3] coefficients */ - c0 = *pb++; - - /* Read x[n-numTaps-3] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] for sample 0 and sample 1 */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px0++; - x1 = *px1++; - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 2; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16)); - - /* Decrement loop counter */ - blkCnt--; - } - - while (blkCntN3 > 0U) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-1] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-3] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] sample */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px++; - - /* Perform the multiply-accumulate */ - sum0 += x0 * c0; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* Store filter output, smlad returns the values in 2.14 format */ - /* so downsacle by 15 to get output in 1.15 */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Decrement loop counter */ - blkCntN3--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - - i = (numTaps - 1U) >> 2U; - - /* copy data */ - while (i > 0U) - { - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - i--; - } - - i = (numTaps - 1U) % 0x04U; - - /* copy data */ - while (i > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - i--; - } -} - -#endif /* #if defined (ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) */ -/** - @} end of FIR_decimate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c deleted file mode 100644 index a31e20d..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c +++ /dev/null @@ -1,634 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_decimate_q31.c - * Description: Q31 FIR Decimator - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_decimate - @{ - */ - -/** - @brief Processing function for the Q31 FIR decimator. - @param[in] S points to an instance of the Q31 FIR decimator structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around rather than clip. - In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2). - After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. - - @remark - Refer to \ref arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_fir_decimate_q31( - const arm_fir_decimate_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - const q31_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - uint32_t blkCntN4; - const q31_t *px0, *px1, *px2, *px3; - q63_t acc0v, acc1v, acc2v, acc3v; - q31x4_t x0v, x1v, x2v, x3v; - q31x4_t c0v; - - /* - * S->pState buffer contains previous frame (numTaps - 1) samples - * pStateCurnt points to the location where the new input data should be written - */ - pStateCurnt = S->pState + (numTaps - 1U); - /* - * Total number of output samples to be computed - */ - blkCnt = outBlockSize / 4; - blkCntN4 = outBlockSize - (4 * blkCnt); - - while (blkCnt > 0U) - { - /* - * Copy 4 * decimation factor number of new input samples into the state buffer - */ - i = (4 * S->M) >> 2; - do - { - vst1q(pStateCurnt, vldrwq_s32(pSrc)); - pSrc += 4; - pStateCurnt += 4; - i--; - } - while (i > 0U); - - /* - * Clear all accumulators - */ - acc0v = 0LL; - acc1v = 0LL; - acc2v = 0LL; - acc3v = 0LL; - /* - * Initialize state pointer for all the samples - */ - px0 = pState; - px1 = pState + S->M; - px2 = pState + 2 * S->M; - px3 = pState + 3 * S->M; - /* - * Initialize coeff. pointer - */ - pb = pCoeffs; - /* - * Loop unrolling. Process 4 taps at a time. - */ - tapCnt = numTaps >> 2; - /* - * Loop over the number of taps. Unroll by a factor of 4. - * Repeat until we've computed numTaps-4 coefficients. - */ - while (tapCnt > 0U) - { - /* - * Read the b[numTaps-1] coefficient - */ - c0v = vldrwq_s32(pb); - pb += 4; - /* - * Read x[n-numTaps-1] sample for acc0 - */ - x0v = vld1q(px0); - x1v = vld1q(px1); - x2v = vld1q(px2); - x3v = vld1q(px3); - px0 += 4; - px1 += 4; - px2 += 4; - px3 += 4; - - acc0v = vrmlaldavhaq(acc0v, x0v, c0v); - acc1v = vrmlaldavhaq(acc1v, x1v, c0v); - acc2v = vrmlaldavhaq(acc2v, x2v, c0v); - acc3v = vrmlaldavhaq(acc3v, x3v, c0v); - /* - * Decrement the loop counter - */ - tapCnt--; - } - - /* - * If the filter length is not a multiple of 4, compute the remaining filter taps - * should be tail predicated - */ - tapCnt = numTaps % 0x4U; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - /* - * Read the b[numTaps-1] coefficient - */ - c0v = vldrwq_z_s32(pb, p0); - pb += 4; - /* - * Read x[n-numTaps-1] sample for acc0 - */ - x0v = vld1q(px0); - x1v = vld1q(px1); - x2v = vld1q(px2); - x3v = vld1q(px3); - px0 += 4; - px1 += 4; - px2 += 4; - px3 += 4; - - acc0v = vrmlaldavhaq(acc0v, x0v, c0v); - acc1v = vrmlaldavhaq(acc1v, x1v, c0v); - acc2v = vrmlaldavhaq(acc2v, x2v, c0v); - acc3v = vrmlaldavhaq(acc3v, x3v, c0v); - } - - acc0v = asrl(acc0v, 31 - 8); - acc1v = asrl(acc1v, 31 - 8); - acc2v = asrl(acc2v, 31 - 8); - acc3v = asrl(acc3v, 31 - 8); - /* - * store in the destination buffer. - */ - *pDst++ = (q31_t) acc0v; - *pDst++ = (q31_t) acc1v; - *pDst++ = (q31_t) acc2v; - *pDst++ = (q31_t) acc3v; - - /* - * Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples - */ - pState = pState + 4 * S->M; - /* - * Decrement the loop counter - */ - blkCnt--; - } - - while (blkCntN4 > 0U) - { - /* - * Copy decimation factor number of new input samples into the state buffer - */ - i = S->M; - do - { - *pStateCurnt++ = *pSrc++; - } - while (--i); - /* - * Set accumulator to zero - */ - acc0v = 0LL; - /* - * Initialize state pointer - */ - px = pState; - /* - * Initialize coeff. pointer - */ - pb = pCoeffs; - /* - * Loop unrolling. Process 4 taps at a time. - */ - tapCnt = numTaps >> 2; - /* - * Loop over the number of taps. Unroll by a factor of 4. - * Repeat until we've computed numTaps-4 coefficients. - */ - while (tapCnt > 0U) - { - c0v = vldrwq_s32(pb); - x0v = vldrwq_s32(px); - pb += 4; - px += 4; - acc0v = vrmlaldavhaq(acc0v, x0v, c0v); - /* - * Decrement the loop counter - */ - tapCnt--; - } - tapCnt = numTaps % 0x4U; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - c0v = vldrwq_z_s32(pb, p0); - x0v = vldrwq_z_s32(px, p0); - acc0v = vrmlaldavhaq_p(acc0v, x0v, c0v, p0); - } - acc0v = asrl(acc0v, 31 - 8); - - /* - * Advance the state pointer by the decimation factor - * * to process the next group of decimation factor number samples - */ - pState = pState + S->M; - /* - * The result is in the accumulator, store in the destination buffer. - */ - *pDst++ = (q31_t) acc0v; - /* - * Decrement the loop counter - */ - blkCntN4--; - } - - /* - * Processing is complete. - * Now copy the last numTaps - 1 samples to the start of the state buffer. - * This prepares the state buffer for the next function call. - */ - pStateCurnt = S->pState; - blkCnt = (numTaps - 1) >> 2; - while (blkCnt > 0U) - { - vst1q(pStateCurnt, vldrwq_s32(pState)); - pState += 4; - pStateCurnt += 4; - blkCnt--; - } - blkCnt = (numTaps - 1) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vstrwq_p_s32(pStateCurnt, vldrwq_s32(pState), p0); - } -} -#else -void arm_fir_decimate_q31( - const arm_fir_decimate_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCur; /* Points to the current sample of the state */ - q31_t *px0; /* Temporary pointer for state buffer */ - const q31_t *pb; /* Temporary pointer for coefficient buffer */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - q63_t acc0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t *px1, *px2, *px3; - q31_t x1, x2, x3; - q63_t acc1, acc2, acc3; -#endif - - /* S->pState buffer contains previous frame (numTaps - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (numTaps - 1U); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 samples at a time */ - blkCnt = outBlockSize >> 2U; - - /* Samples loop unrolled by 4 */ - while (blkCnt > 0U) - { - /* Copy 4 * decimation factor number of new input samples into the state buffer */ - i = S->M * 4; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Initialize state pointer for all the samples */ - px0 = pState; - px1 = pState + S->M; - px2 = pState + 2 * S->M; - px3 = pState + 3 * S->M; - - /* Initialize coeff pointer */ - pb = pCoeffs; - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-1] sample for acc0 */ - x0 = *(px0++); - /* Read x[n-numTaps-1] sample for acc1 */ - x1 = *(px1++); - /* Read x[n-numTaps-1] sample for acc2 */ - x2 = *(px2++); - /* Read x[n-numTaps-1] sample for acc3 */ - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - acc1 += (q63_t) x1 * c0; - acc2 += (q63_t) x2 * c0; - acc3 += (q63_t) x3 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - acc1 += (q63_t) x1 * c0; - acc2 += (q63_t) x2 * c0; - acc3 += (q63_t) x3 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - acc1 += (q63_t) x1 * c0; - acc2 += (q63_t) x2 * c0; - acc3 += (q63_t) x3 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - acc1 += (q63_t) x1 * c0; - acc2 += (q63_t) x2 * c0; - acc3 += (q63_t) x3 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch state variables for acc0, acc1, acc2, acc3 */ - x0 = *(px0++); - x1 = *(px1++); - x2 = *(px2++); - x3 = *(px3++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - acc1 += (q63_t) x1 * c0; - acc2 += (q63_t) x2 * c0; - acc3 += (q63_t) x3 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M * 4; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (acc0 >> 31); - *pDst++ = (q31_t) (acc1 >> 31); - *pDst++ = (q31_t) (acc2 >> 31); - *pDst++ = (q31_t) (acc3 >> 31); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining samples */ - blkCnt = outBlockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = outBlockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy decimation factor number of new input samples into the state buffer */ - i = S->M; - - do - { - *pStateCur++ = *pSrc++; - - } while (--i); - - /* Set accumulator to zero */ - acc0 = 0; - - /* Initialize state pointer */ - px0 = pState; - - /* Initialize coeff pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-1] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-2] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-3] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *pb++; - - /* Read x[n-numTaps-4] sample */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *pb++; - - /* Fetch 1 state variable */ - x0 = *px0++; - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by the decimation factor - * to process the next group of decimation factor number samples */ - pState = pState + S->M; - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (acc0 >> 31); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the satrt of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = (numTaps - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numTaps - 1U) % 0x04U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ -/** - @} end of FIR_decimate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f16.c deleted file mode 100644 index ff7c70c..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f16.c +++ /dev/null @@ -1,940 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_f16.c - * Description: Floating-point FIR filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) -/** - @ingroup groupFilters - */ - - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Processing function for floating-point FIR filter. - @param[in] S points to an instance of the floating-point FIR filter structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define FIR_F32_MAX_COEF_BLK 8 - -#define FIR_F16_CORE(pSamples, c, NB_TAPS) \ - vecAcc0 = vdupq_n_f16(0.0f16); \ - for (int i = 0; i < NB_TAPS; i++) { \ - vecIn0 = vld1q(&pSamples[i]); \ - vecAcc0 = vfmaq(vecAcc0, vecIn0, c[i]); \ - } - -#define NB_TAPS 4 -__STATIC_INLINE void arm_fir_f16_1_4_mve(const arm_fir_instance_f16 * S, - const float16_t * __restrict pSrc, - float16_t * __restrict pDst, uint32_t blockSize) -{ - float16_t *pState = S->pState; /* State pointer */ - const float16_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float16_t *pStateCur; /* Points to the current sample of the state */ - const float16_t *pSamples; /* Temporary pointer to the sample buffer */ - float16_t *pOutput; /* Temporary pointer to the output buffer */ - const float16_t *pTempSrc; /* Temporary pointer to the source data */ - float16_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t blkCnt; - float16x8_t vecIn0; - float16x8_t vecAcc0; - float16_t c[NB_TAPS]; - - - /* - * pState points to state array which contains previous frame (numTaps - 1) samples - * pStateCur points to the location where the new input data should be written - */ - pStateCur = &(pState[(numTaps - 1u)]); - /* - * Copy new data into state so that we obtain a continuous sample buffer - * containing both the tail end of the old data and the new data. - */ - pSamples = pState; - pTempSrc = pSrc; - pOutput = pDst; - - for (int i = 0; i < NB_TAPS; i++) - c[i] = pCoeffs[i]; - - blkCnt = blockSize >> 3; - while (blkCnt > 0) { - /* - * Save 8 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 8; - pTempSrc += 8; - - FIR_F16_CORE(pSamples, c, NB_TAPS); - - vst1q(pOutput, vecAcc0); - - pOutput += 8; - pSamples += 8; - - blkCnt--; - } - - blkCnt = blockSize & 7; - if (blkCnt) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 8; - pTempSrc += 8; - - FIR_F16_CORE(pSamples, c, NB_TAPS); - - vstrhq_p_f16(pOutput, vecAcc0, p0); - } - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pState[blockSize]; - pTempDest = pState; - - blkCnt = numTaps >> 3; - while (blkCnt > 0) { - vst1q(pTempDest, vld1q(pTempSrc)); - pTempSrc += 8; - pTempDest += 8; - blkCnt--; - } - blkCnt = numTaps & 7; - if (blkCnt > 0) { - mve_pred16_t p0 = vctp16q(blkCnt); - vstrhq_p_f16(pTempDest, vld1q(pTempSrc), p0); - } - -} -#undef NB_TAPS - -#define NB_TAPS 8 -__STATIC_INLINE void arm_fir_f16_5_8_mve(const arm_fir_instance_f16 * S, - const float16_t * __restrict pSrc, - float16_t * __restrict pDst, uint32_t blockSize) -{ - float16_t *pState = S->pState; /* State pointer */ - const float16_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float16_t *pStateCur; /* Points to the current sample of the state */ - const float16_t *pSamples; /* Temporary pointer to the sample buffer */ - float16_t *pOutput; /* Temporary pointer to the output buffer */ - const float16_t *pTempSrc; /* Temporary pointer to the source data */ - float16_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t blkCnt; - float16x8_t vecIn0; - float16x8_t vecAcc0; - float16_t c[NB_TAPS]; - - - /* - * pState points to state array which contains previous frame (numTaps - 1) samples - * pStateCur points to the location where the new input data should be written - */ - pStateCur = &(pState[(numTaps - 1u)]); - /* - * Copy new data into state so that we obtain a continuous sample buffer - * containing both the tail end of the old data and the new data. - */ - pSamples = pState; - pTempSrc = pSrc; - pOutput = pDst; - - for (int i = 0; i < NB_TAPS; i++) - c[i] = pCoeffs[i]; - - blkCnt = blockSize >> 3; - while (blkCnt > 0) { - /* - * Save 8 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 8; - pTempSrc += 8; - - FIR_F16_CORE(pSamples, c, NB_TAPS); - - vst1q(pOutput, vecAcc0); - - pOutput += 8; - pSamples += 8; - - blkCnt--; - } - - blkCnt = blockSize & 7; - if (blkCnt) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 8; - pTempSrc += 8; - - FIR_F16_CORE(pSamples, c, NB_TAPS); - - vstrhq_p_f16(pOutput, vecAcc0, p0); - } - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pState[blockSize]; - pTempDest = pState; - - blkCnt = numTaps >> 3; - while (blkCnt > 0) { - vst1q(pTempDest, vld1q(pTempSrc)); - pTempSrc += 8; - pTempDest += 8; - blkCnt--; - } - blkCnt = numTaps & 7; - if (blkCnt > 0) { - mve_pred16_t p0 = vctp16q(blkCnt); - vstrhq_p_f16(pTempDest, vld1q(pTempSrc), p0); - } - -} -#undef NB_TAPS - -void arm_fir_f16(const arm_fir_instance_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - float16_t *pRefStatePtr = S->pState + ROUND_UP(blockSize, 8); - float16_t *pState = pRefStatePtr ; /* State pointer */ - const float16_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - const float16_t *pSamples; /* Temporary pointer to the sample buffer */ - float16_t *pOutput; /* Temporary pointer to the output buffer */ - const float16_t *pTempSrc; /* Temporary pointer to the source data */ - float16_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t blkCnt; - float16_t c0, c1, c2, c3; - float16_t c4, c5, c6, c7; - - /* - * [1 to 8 taps] specialized routines - */ - if (numTaps <= 4) { - arm_fir_f16_1_4_mve(S, pSrc, pDst, blockSize); - return; - } else if (numTaps <= 8) { - arm_fir_f16_5_8_mve(S, pSrc, pDst, blockSize); - return; - } - - pTempSrc = pSrc; - pTempDest = &(pState[(numTaps - 1u)]); - int cnt = blockSize; - do { - mve_pred16_t p0 = vctp16q(cnt); - vstrhq_p_f16(pTempDest, vld1q(pTempSrc), p0); - pTempDest += 8; - pTempSrc += 8; - cnt -= 8; - } while (cnt > 0); - - float16_t *partial_accu_ptr = S->pState; - - pSamples = pState; - c0 = *pCoeffs++; - c1 = *pCoeffs++; - c2 = *pCoeffs++; - c3 = *pCoeffs++; - c4 = *pCoeffs++; - c5 = *pCoeffs++; - c6 = *pCoeffs++; - c7 = *pCoeffs++; - - cnt = blockSize >> 3; - while (cnt > 0) { - float16x8_t vecAcc0; - float16x8_t vecIn0; - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - pSamples += 8; - vst1q(partial_accu_ptr, vecAcc0); - cnt--; - partial_accu_ptr += 8; - } - - cnt = blockSize & 7; - if (cnt > 0) { - float16x8_t vecAcc0; - float16x8_t vecIn0; - - mve_pred16_t p0 = vctp16q(cnt); - - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - vstrhq_p_f16(partial_accu_ptr, vecAcc0,p0); - } - - int localTaps = numTaps - FIR_F32_MAX_COEF_BLK; - int sample_offset = FIR_F32_MAX_COEF_BLK; - while (localTaps > FIR_F32_MAX_COEF_BLK) { - c0 = *pCoeffs++; - c1 = *pCoeffs++; - c2 = *pCoeffs++; - c3 = *pCoeffs++; - c4 = *pCoeffs++; - c5 = *pCoeffs++; - c6 = *pCoeffs++; - c7 = *pCoeffs++; - - partial_accu_ptr = S->pState; - pSamples = pState + sample_offset; - int cnt = blockSize >> 3; - while (cnt > 0) { - float16x8_t vecAcc0; - float16x8_t vecIn0; - - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - pSamples += 8; - vecAcc0 += vld1q_f16(partial_accu_ptr); - vst1q(partial_accu_ptr, vecAcc0); - cnt--; - partial_accu_ptr += 8; - } - - cnt = blockSize & 7; - if (cnt > 0) { - float16x8_t vecAcc0; - float16x8_t vecIn0; - - mve_pred16_t p0 = vctp16q(cnt); - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - vecAcc0 += vld1q_f16(partial_accu_ptr); - vstrhq_p_f16(partial_accu_ptr, vecAcc0,p0); - } - - localTaps -= FIR_F32_MAX_COEF_BLK; - sample_offset += FIR_F32_MAX_COEF_BLK; - } - - pSamples = pState + sample_offset; - - if (localTaps > 4) { - c0 = *pCoeffs++; - c1 = *pCoeffs++; - c2 = *pCoeffs++; - c3 = *pCoeffs++; - c4 = *pCoeffs++; - c5 = *pCoeffs++; - c6 = *pCoeffs++; - c7 = *pCoeffs++; - pOutput = pDst; - - partial_accu_ptr = S->pState; - cnt = blockSize >> 3; - while (cnt > 0) { - float16x8_t vecAcc0; - float16x8_t vecIn0; - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - pSamples += 8; - float16x8_t pap = vld1q_f16(partial_accu_ptr); - vst1q(pOutput, vecAcc0 + pap); - cnt--; - partial_accu_ptr += 8; - pOutput += 8; - } - - cnt = blockSize & 7; - if (cnt > 0) { - float16x8_t vecAcc0; - float16x8_t vecIn0; - - mve_pred16_t p0 = vctp16q(cnt); - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - float16x8_t pap = vld1q_f16(partial_accu_ptr); - vstrhq_p_f16(pOutput, vecAcc0 + pap, p0); - pOutput += cnt; - } - - } else { - c0 = *pCoeffs++; - c1 = *pCoeffs++; - c2 = *pCoeffs++; - c3 = *pCoeffs++; - pOutput = pDst; - - partial_accu_ptr = S->pState; - cnt = blockSize >> 3; - while (cnt > 0) { - float16x8_t vecAcc0; - float16x8_t vecIn0; - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - pSamples += 8; - float16x8_t pap = vld1q_f16(partial_accu_ptr); - vst1q(pOutput, vecAcc0 + pap); - cnt--; - partial_accu_ptr += 8; - pOutput += 8; - } - - cnt = blockSize & 7; - if (cnt > 0) { - float16x8_t vecAcc0; - float16x8_t vecIn0; - - mve_pred16_t p0 = vctp16q(cnt); - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - float16x8_t pap = vld1q_f16(partial_accu_ptr); - vstrhq_p_f16(pOutput, vecAcc0 + pap, p0); - pOutput += cnt; - } - } - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pState[blockSize]; - pTempDest = pState; - - blkCnt = numTaps >> 3; - while (blkCnt > 0U) { - vst1q(pTempDest, vld1q(pTempSrc)); - pTempSrc += 8; - pTempDest += 8; - blkCnt--; - } - blkCnt = numTaps & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - vstrhq_p_f16(pTempDest, vld1q(pTempSrc), p0); - } -} - -#else - -void arm_fir_f16( - const arm_fir_instance_f16 * S, - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - float16_t *pState = S->pState; /* State pointer */ - const float16_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float16_t *pStateCurnt; /* Points to the current sample of the state */ - float16_t *px; /* Temporary pointer for state buffer */ - const float16_t *pb; /* Temporary pointer for coefficient buffer */ - _Float16 acc0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - _Float16 acc1, acc2, acc3, acc4, acc5, acc6, acc7; /* Accumulators */ - _Float16 x0, x1, x2, x3, x4, x5, x6, x7; /* Temporary variables to hold state values */ - _Float16 c0; /* Temporary variable to hold coefficient value */ -#endif - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 8 output values simultaneously. - * The variables acc0 ... acc7 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - /* Copy 4 new input samples into the state buffer. */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - acc4 = 0.0f; - acc5 = 0.0f; - acc6 = 0.0f; - acc7 = 0.0f; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* This is separated from the others to avoid - * a call to __aeabi_memmove which would be slower - */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Read the first 7 samples from the state buffer: x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - x3 = *px++; - x4 = *px++; - x5 = *px++; - x6 = *px++; - - /* Loop unrolling: process 8 taps at a time. */ - tapCnt = numTaps >> 3U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample */ - x7 = *(px++); - - /* acc0 += b[numTaps-1] * x[n-numTaps] */ - acc0 += x0 * c0; - - /* acc1 += b[numTaps-1] * x[n-numTaps-1] */ - acc1 += x1 * c0; - - /* acc2 += b[numTaps-1] * x[n-numTaps-2] */ - acc2 += x2 * c0; - - /* acc3 += b[numTaps-1] * x[n-numTaps-3] */ - acc3 += x3 * c0; - - /* acc4 += b[numTaps-1] * x[n-numTaps-4] */ - acc4 += x4 * c0; - - /* acc1 += b[numTaps-1] * x[n-numTaps-5] */ - acc5 += x5 * c0; - - /* acc2 += b[numTaps-1] * x[n-numTaps-6] */ - acc6 += x6 * c0; - - /* acc3 += b[numTaps-1] * x[n-numTaps-7] */ - acc7 += x7 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - acc0 += x1 * c0; - acc1 += x2 * c0; - acc2 += x3 * c0; - acc3 += x4 * c0; - acc4 += x5 * c0; - acc5 += x6 * c0; - acc6 += x7 * c0; - acc7 += x0 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x2 * c0; - acc1 += x3 * c0; - acc2 += x4 * c0; - acc3 += x5 * c0; - acc4 += x6 * c0; - acc5 += x7 * c0; - acc6 += x0 * c0; - acc7 += x1 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x3 * c0; - acc1 += x4 * c0; - acc2 += x5 * c0; - acc3 += x6 * c0; - acc4 += x7 * c0; - acc5 += x0 * c0; - acc6 += x1 * c0; - acc7 += x2 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x3 = *(px++); - /* Perform the multiply-accumulates */ - acc0 += x4 * c0; - acc1 += x5 * c0; - acc2 += x6 * c0; - acc3 += x7 * c0; - acc4 += x0 * c0; - acc5 += x1 * c0; - acc6 += x2 * c0; - acc7 += x3 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x4 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x5 * c0; - acc1 += x6 * c0; - acc2 += x7 * c0; - acc3 += x0 * c0; - acc4 += x1 * c0; - acc5 += x2 * c0; - acc6 += x3 * c0; - acc7 += x4 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x5 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x6 * c0; - acc1 += x7 * c0; - acc2 += x0 * c0; - acc3 += x1 * c0; - acc4 += x2 * c0; - acc5 += x3 * c0; - acc6 += x4 * c0; - acc7 += x5 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x6 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x7 * c0; - acc1 += x0 * c0; - acc2 += x1 * c0; - acc3 += x2 * c0; - acc4 += x3 * c0; - acc5 += x4 * c0; - acc6 += x5 * c0; - acc7 += x6 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - tapCnt = numTaps % 0x8U; - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x7 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - acc4 += x4 * c0; - acc5 += x5 * c0; - acc6 += x6 * c0; - acc7 += x7 * c0; - - /* Reuse the present sample states for next sample */ - x0 = x1; - x1 = x2; - x2 = x3; - x3 = x4; - x4 = x5; - x5 = x6; - x6 = x7; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by 8 to process the next group of 8 samples */ - pState = pState + 8; - - /* The results in the 8 accumulators, store in the destination buffer. */ - *pDst++ = acc0; - *pDst++ = acc1; - *pDst++ = acc2; - *pDst++ = acc3; - *pDst++ = acc4; - *pDst++ = acc5; - *pDst++ = acc6; - *pDst++ = acc7; - - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining output samples */ - blkCnt = blockSize % 0x8U; - -#else - - /* Initialize blkCnt with number of taps */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0.0f; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = pCoeffs; - - i = numTaps; - - /* Perform the multiply-accumulates */ - while (i > 0U) - { - /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */ - acc0 += (_Float16)*px++ * (_Float16)*pb++; - - i--; - } - - /* Store result in destination buffer. */ - *pDst++ = acc0; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = (numTaps - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy remaining data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} - -#endif /* #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** -* @} end of FIR group -*/ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c deleted file mode 100644 index 88466ce..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c +++ /dev/null @@ -1,1285 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_f32.c - * Description: Floating-point FIR filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup FIR Finite Impulse Response (FIR) Filters - - This set of functions implements Finite Impulse Response (FIR) filters - for Q7, Q15, Q31, and floating-point data types. Fast versions of Q15 and Q31 are also provided. - The functions operate on blocks of input and output data and each call to the function processes - blockSize samples through the filter. pSrc and - pDst points to input and output arrays containing blockSize values. - - @par Algorithm - The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations. - Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n]. - 
-      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
-
- @par - \image html FIR.GIF "Finite Impulse Response filter" - @par - pCoeffs points to a coefficient array of size numTaps. - Coefficients are stored in time reversed order. - @par - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to a state array of size numTaps + blockSize - 1. - Samples in the state buffer are stored in the following order. - @par - 
-      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[n](==pSrc[0]), x[n+1](==pSrc[1]), ..., x[n+blockSize-1](==pSrc[blockSize-1])}
-
- @par - Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1. - The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters, - to be avoided and yields a significant speed improvement. - The state variables are updated after each block of data is processed; the coefficients are untouched. - - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter. - Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - There are separate instance structure declarations for each of the 4 supported data types. - - @par Initialization Functions - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - numTaps, pCoeffs, pState. Also set all of the values in pState to zero. - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - Set the values in the state buffer to zeros before static initialization. - The code below statically initializes each of the 4 different data type filter instance structures - 
-      arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
-      arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
-      arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
-      arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};
-
- where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer; - pCoeffs is the address of the coefficient buffer. - @par Initialization of Helium version - For Helium version the array of coefficients must be padded with zero to contain - a full number of lanes. - - The array length L must be a multiple of x. L = x * a : - - x is 4 for f32 - - x is 4 for q31 - - x is 4 for f16 (so managed like the f32 version and not like the q15 one) - - x is 8 for q15 - - x is 16 for q7 - - The additional coefficients - (x * a - numTaps) must be set to 0. - numTaps is still set to its right value in the init function. It means that - the implementation may require to read more coefficients due to the vectorization and - to avoid having to manage too many different cases in the code. - - - @par Helium state buffer - The state buffer must contain some additional temporary data - used during the computation but which is not the state of the FIR. - The first A samples are temporary data. - The remaining samples are the state of the FIR filter. - @par - So the state buffer has size numTaps + A + blockSize - 1 : - - A is blockSize for f32 - - A is 8*ceil(blockSize/8) for f16 - - A is 8*ceil(blockSize/4) for q31 - - A is 0 for other datatypes (q15 and q7) - - - @par Fixed-Point Behavior - Care must be taken when using the fixed-point versions of the FIR filter functions. - In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - Refer to the function specific documentation below for usage guidelines. - - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Processing function for floating-point FIR filter. - @param[in] S points to an instance of the floating-point FIR filter structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define FIR_F32_MAX_COEF_BLK 8 - -#define FIR_F32_CORE(pSamples, c, NB_TAPS) \ - vecAcc0 = vdupq_n_f32(0.0f); \ - for (int i = 0; i < NB_TAPS; i++) { \ - vecIn0 = vld1q(&pSamples[i]); \ - vecAcc0 = vfmaq(vecAcc0, vecIn0, c[i]); \ - } - - -#define NB_TAPS 4 -__STATIC_INLINE void arm_fir_f32_1_4_mve(const arm_fir_instance_f32 * S, - const float32_t * __restrict pSrc, - float32_t * __restrict pDst, uint32_t blockSize) -{ - float32_t *pRefStatePtr = S->pState + blockSize; - float32_t *pState = pRefStatePtr; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCur; /* Points to the current sample of the state */ - const float32_t *pSamples; /* Temporary pointer to the sample buffer */ - float32_t *pOutput; /* Temporary pointer to the output buffer */ - const float32_t *pTempSrc; /* Temporary pointer to the source data */ - float32_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t blkCnt; - float32x4_t vecIn0; - float32x4_t vecAcc0; - float32_t c[NB_TAPS]; - const float32_t *pCoeffsCur = pCoeffs; - - /* - * pState points to state array which contains previous frame (numTaps - 1) samples - * pStateCur points to the location where the new input data should be written - */ - pStateCur = &(pState[(numTaps - 1u)]); - pTempSrc = pSrc; - - pSamples = pState; - pOutput = pDst; - - for (int i = 0; i < NB_TAPS; i++) - c[i] = *pCoeffsCur++; - - blkCnt = blockSize >> 2; - while (blkCnt > 0) { - /* - * Save 4 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 4; - pTempSrc += 4; - - FIR_F32_CORE(pSamples, c, NB_TAPS); - - vst1q(pOutput, vecAcc0); - - pOutput += 4; - pSamples += 4; - - blkCnt--; - } - - blkCnt = blockSize & 3; - if (blkCnt) - { - mve_pred16_t p0 = vctp32q(blkCnt); - - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 4; - pTempSrc += 4; - - FIR_F32_CORE(pSamples, c, NB_TAPS); - - vstrwq_p_f32(pOutput, vecAcc0, p0); - } - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pState[blockSize]; - pTempDest = pState; - - blkCnt = numTaps - 1; - do { - mve_pred16_t p = vctp32q(blkCnt); - - vstrwq_p_f32(pTempDest, vldrwq_z_f32(pTempSrc, p), p); - pTempSrc += 4; - pTempDest += 4; - blkCnt -= 4; - } - while (blkCnt > 0); -} -#undef NB_TAPS - -__STATIC_INLINE void arm_fir_f32_5_8_mve(const arm_fir_instance_f32 * S, - const float32_t * __restrict pSrc, - float32_t * __restrict pDst, uint32_t blockSize) -{ - float32_t *pRefStatePtr = S->pState + blockSize; - float32_t *pState = pRefStatePtr; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - const float32_t *pSamples; /* Temporary pointer to the sample buffer */ - const float32_t *pTempSrc; /* Temporary pointer to the source data */ - float32_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t blkCnt; - float32_t c0, c1, c2, c3; - float32_t c4, c5, c6, c7; - - - pTempSrc = pSrc; - pTempDest = &(pState[(numTaps - 1u)]); - int cnt = blockSize; - do { - mve_pred16_t p0 = vctp32q(cnt); - vstrwq_p_f32(pTempDest, vld1q(pTempSrc), p0); - pTempDest += 4; - pTempSrc += 4; - cnt -= 4; - } while(cnt > 0); - - - - pSamples = pState; - c0 = *pCoeffs++; - c1 = *pCoeffs++; - c2 = *pCoeffs++; - c3 = *pCoeffs++; - c4 = *pCoeffs++; - c5 = *pCoeffs++; - c6 = *pCoeffs++; - c7 = *pCoeffs++; - - cnt = blockSize >> 2; - while(cnt > 0) - { - float32x4_t vecAcc0; - float32x4_t vecIn0; - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - pSamples += 4; - vst1q(pDst, vecAcc0); - cnt--; - pDst += 4; - } - - cnt = blockSize & 3; - if (cnt > 0) - { - float32x4_t vecAcc0; - float32x4_t vecIn0; - - mve_pred16_t p0 = vctp32q(cnt); - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - vstrwq_p_f32(pDst, vecAcc0,p0); - } - - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pState[blockSize]; - pTempDest = pState; - blkCnt = numTaps; - while (blkCnt > 0) - { - *pTempDest++ = *pTempSrc++; - blkCnt--; - } -} - - - -void arm_fir_f32( -const arm_fir_instance_f32 * S, -const float32_t * pSrc, -float32_t * pDst, -uint32_t blockSize) -{ - /* - S->pState is the arm_fir_partial_accu - S->pState + blockSize is the FIR state - */ - float32_t *pRefStatePtr = S->pState + blockSize; - float32_t *pState = pRefStatePtr ; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - const float32_t *pSamples; /* Temporary pointer to the sample buffer */ - float32_t *pOutput; /* Temporary pointer to the output buffer */ - const float32_t *pTempSrc; /* Temporary pointer to the source data */ - float32_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t blkCnt; - float32_t c0, c1, c2, c3; - float32_t c4, c5, c6, c7; - - /* - * [1 to 8 taps] specialized routines - */ - if (numTaps <= 4) - { - arm_fir_f32_1_4_mve(S, pSrc, pDst, blockSize); - return; - } - else if (numTaps <= 8) - { - arm_fir_f32_5_8_mve(S, pSrc, pDst, blockSize); - return; - } - - pTempSrc = pSrc; - pTempDest = &(pState[(numTaps - 1u)]); - int cnt = blockSize; - do { - mve_pred16_t p0 = vctp32q(cnt); - vstrwq_p_f32(pTempDest, vld1q(pTempSrc), p0); - pTempDest += 4; - pTempSrc += 4; - cnt -= 4; - } while(cnt > 0); - - float32_t *partial_accu_ptr = S->pState; - - pSamples = pState; - c0 = *pCoeffs++; - c1 = *pCoeffs++; - c2 = *pCoeffs++; - c3 = *pCoeffs++; - c4 = *pCoeffs++; - c5 = *pCoeffs++; - c6 = *pCoeffs++; - c7 = *pCoeffs++; - - cnt = blockSize >> 2; - while(cnt > 0) { - float32x4_t vecAcc0; - float32x4_t vecIn0; - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - pSamples += 4; - vst1q(partial_accu_ptr, vecAcc0); - cnt--; - partial_accu_ptr += 4; - } - - cnt = blockSize & 3; - if (cnt > 0) - { - float32x4_t vecAcc0; - float32x4_t vecIn0; - - mve_pred16_t p0 = vctp32q(cnt); - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - vstrwq_p_f32(partial_accu_ptr, vecAcc0,p0); - } - - int localTaps = numTaps - FIR_F32_MAX_COEF_BLK; - int sample_offset = FIR_F32_MAX_COEF_BLK; - while (localTaps > FIR_F32_MAX_COEF_BLK) { - c0 = *pCoeffs++; - c1 = *pCoeffs++; - c2 = *pCoeffs++; - c3 = *pCoeffs++; - c4 = *pCoeffs++; - c5 = *pCoeffs++; - c6 = *pCoeffs++; - c7 = *pCoeffs++; - - partial_accu_ptr = S->pState; - pSamples = pState + sample_offset; - int cnt = blockSize >> 2; - while(cnt > 0) { - float32x4_t vecAcc0; - float32x4_t vecIn0; - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - pSamples += 4; - vecAcc0 += vld1q_f32(partial_accu_ptr); - vst1q(partial_accu_ptr, vecAcc0); - cnt--; - partial_accu_ptr += 4; - } - - cnt = blockSize & 3; - if (cnt > 0) { - float32x4_t vecAcc0; - float32x4_t vecIn0; - - mve_pred16_t p0 = vctp32q(cnt); - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - vecAcc0 += vld1q_f32(partial_accu_ptr); - vstrwq_p_f32(partial_accu_ptr, vecAcc0,p0); - } - - localTaps -= FIR_F32_MAX_COEF_BLK; - sample_offset += FIR_F32_MAX_COEF_BLK; - } - - pSamples = pState + sample_offset; - - if (localTaps > 4) { - c0 = *pCoeffs++; - c1 = *pCoeffs++; - c2 = *pCoeffs++; - c3 = *pCoeffs++; - c4 = *pCoeffs++; - c5 = *pCoeffs++; - c6 = *pCoeffs++; - c7 = *pCoeffs++; - pOutput = pDst; - - partial_accu_ptr = S->pState; - cnt = blockSize >> 2; - while(cnt > 0) { - float32x4_t vecAcc0; - float32x4_t vecIn0; - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - pSamples += 4; - float32x4_t pap = vld1q_f32(partial_accu_ptr); - vst1q(pOutput, vecAcc0+pap); - cnt--; - partial_accu_ptr += 4; - pOutput += 4; - } - - cnt = blockSize & 3; - if (cnt > 0) { - float32x4_t vecAcc0; - float32x4_t vecIn0; - - mve_pred16_t p0 = vctp32q(cnt); - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - vecIn0 = vld1q(&pSamples[4]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c4); - vecIn0 = vld1q(&pSamples[5]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c5); - vecIn0 = vld1q(&pSamples[6]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c6); - vecIn0 = vld1q(&pSamples[7]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c7); - float32x4_t pap = vld1q_f32(partial_accu_ptr); - vstrwq_p_f32(pOutput, vecAcc0+pap,p0); - pOutput += cnt; - } - } - else { - c0 = *pCoeffs++; - c1 = *pCoeffs++; - c2 = *pCoeffs++; - c3 = *pCoeffs++; - pOutput = pDst; - - partial_accu_ptr = S->pState; - cnt = blockSize >> 2; - while(cnt > 0) { - float32x4_t vecAcc0; - float32x4_t vecIn0; - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - pSamples += 4; - float32x4_t pap = vld1q_f32(partial_accu_ptr); - vst1q(pOutput, vecAcc0+pap); - cnt--; - partial_accu_ptr += 4; - pOutput += 4; - } - - cnt = blockSize & 3; - if (cnt > 0) { - float32x4_t vecAcc0; - float32x4_t vecIn0; - - mve_pred16_t p0 = vctp32q(cnt); - - vecIn0 = vld1q(pSamples); - vecAcc0 = vmulq(vecIn0, c0); - vecIn0 = vld1q(&pSamples[1]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c1); - vecIn0 = vld1q(&pSamples[2]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c2); - vecIn0 = vld1q(&pSamples[3]); - vecAcc0 = vfmaq(vecAcc0, vecIn0, c3); - float32x4_t pap = vld1q_f32(partial_accu_ptr); - vstrwq_p_f32(pOutput, vecAcc0+pap,p0); - pOutput += cnt; - } - } - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pRefStatePtr[blockSize]; - pTempDest = pRefStatePtr; - - blkCnt = numTaps >> 2; - while (blkCnt > 0) - { - vst1q(pTempDest, vld1q(pTempSrc)); - pTempSrc += 4; - pTempDest += 4; - blkCnt--; - } - blkCnt = numTaps & 3; - if (blkCnt > 0) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vstrwq_p_f32(pTempDest, vld1q(pTempSrc), p0); - } -} - -#else -#if defined(ARM_MATH_NEON) - -void arm_fir_f32( -const arm_fir_instance_f32 * S, -const float32_t * pSrc, -float32_t * pDst, -uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px; /* Temporary pointers for state buffer */ - const float32_t *pb; /* Temporary pointers for coefficient buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - - float32x4_t accv0,accv1,samples0,samples1,x0,x1,x2,xa,xb,b; - float32_t acc; - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - - /* Loop unrolling */ - blkCnt = blockSize >> 3; - - while (blkCnt > 0U) - { - /* Copy 8 samples at a time into state buffers */ - samples0 = vld1q_f32(pSrc); - vst1q_f32(pStateCurnt,samples0); - - pStateCurnt += 4; - pSrc += 4 ; - - samples1 = vld1q_f32(pSrc); - vst1q_f32(pStateCurnt,samples1); - - pStateCurnt += 4; - pSrc += 4 ; - - /* Set the accumulators to zero */ - accv0 = vdupq_n_f32(0); - accv1 = vdupq_n_f32(0); - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Loop unroling */ - i = numTaps >> 2; - - /* Perform the multiply-accumulates */ - x0 = vld1q_f32(px); - x1 = vld1q_f32(px + 4); - - while(i > 0) - { - /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */ - x2 = vld1q_f32(px + 8); - b = vld1q_f32(pb); - xa = x0; - xb = x1; - accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 0)); - accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 0)); - - xa = vextq_f32(x0,x1,1); - xb = vextq_f32(x1,x2,1); - - accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 1)); - accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 1)); - - xa = vextq_f32(x0,x1,2); - xb = vextq_f32(x1,x2,2); - - accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 2)); - accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 2)); - - xa = vextq_f32(x0,x1,3); - xb = vextq_f32(x1,x2,3); - - accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 3)); - accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 3)); - - pb += 4; - x0 = x1; - x1 = x2; - px += 4; - i--; - - } - - /* Tail */ - i = numTaps & 3; - x2 = vld1q_f32(px + 8); - - /* Perform the multiply-accumulates */ - switch(i) - { - case 3: - { - accv0 = vmlaq_n_f32(accv0,x0,*pb); - accv1 = vmlaq_n_f32(accv1,x1,*pb); - - pb++; - - xa = vextq_f32(x0,x1,1); - xb = vextq_f32(x1,x2,1); - - accv0 = vmlaq_n_f32(accv0,xa,*pb); - accv1 = vmlaq_n_f32(accv1,xb,*pb); - - pb++; - - xa = vextq_f32(x0,x1,2); - xb = vextq_f32(x1,x2,2); - - accv0 = vmlaq_n_f32(accv0,xa,*pb); - accv1 = vmlaq_n_f32(accv1,xb,*pb); - - } - break; - case 2: - { - accv0 = vmlaq_n_f32(accv0,x0,*pb); - accv1 = vmlaq_n_f32(accv1,x1,*pb); - - pb++; - - xa = vextq_f32(x0,x1,1); - xb = vextq_f32(x1,x2,1); - - accv0 = vmlaq_n_f32(accv0,xa,*pb); - accv1 = vmlaq_n_f32(accv1,xb,*pb); - - } - break; - case 1: - { - - accv0 = vmlaq_n_f32(accv0,x0,*pb); - accv1 = vmlaq_n_f32(accv1,x1,*pb); - - } - break; - default: - break; - } - - /* The result is stored in the destination buffer. */ - vst1q_f32(pDst,accv0); - pDst += 4; - vst1q_f32(pDst,accv1); - pDst += 4; - - /* Advance state pointer by 8 for the next 8 samples */ - pState = pState + 8; - - blkCnt--; - } - - /* Tail */ - blkCnt = blockSize & 0x7; - - while (blkCnt > 0U) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc = 0.0f; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = pCoeffs; - - i = numTaps; - - /* Perform the multiply-accumulates */ - do - { - /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */ - acc += *px++ * *pb++; - i--; - - } while (i > 0U); - - /* The result is stored in the destination buffer. */ - *pDst++ = acc; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last numTaps - 1 samples to the starting of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - /* Copy numTaps number of values */ - tapCnt = numTaps - 1U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} -#else -void arm_fir_f32( - const arm_fir_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px; /* Temporary pointer for state buffer */ - const float32_t *pb; /* Temporary pointer for coefficient buffer */ - float32_t acc0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - float32_t acc1, acc2, acc3, acc4, acc5, acc6, acc7; /* Accumulators */ - float32_t x0, x1, x2, x3, x4, x5, x6, x7; /* Temporary variables to hold state values */ - float32_t c0; /* Temporary variable to hold coefficient value */ -#endif - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 8 output values simultaneously. - * The variables acc0 ... acc7 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - /* Copy 4 new input samples into the state buffer. */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - acc4 = 0.0f; - acc5 = 0.0f; - acc6 = 0.0f; - acc7 = 0.0f; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* This is separated from the others to avoid - * a call to __aeabi_memmove which would be slower - */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Read the first 7 samples from the state buffer: x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - x3 = *px++; - x4 = *px++; - x5 = *px++; - x6 = *px++; - - /* Loop unrolling: process 8 taps at a time. */ - tapCnt = numTaps >> 3U; - - while (tapCnt > 0U) - { - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-3] sample */ - x7 = *(px++); - - /* acc0 += b[numTaps-1] * x[n-numTaps] */ - acc0 += x0 * c0; - - /* acc1 += b[numTaps-1] * x[n-numTaps-1] */ - acc1 += x1 * c0; - - /* acc2 += b[numTaps-1] * x[n-numTaps-2] */ - acc2 += x2 * c0; - - /* acc3 += b[numTaps-1] * x[n-numTaps-3] */ - acc3 += x3 * c0; - - /* acc4 += b[numTaps-1] * x[n-numTaps-4] */ - acc4 += x4 * c0; - - /* acc1 += b[numTaps-1] * x[n-numTaps-5] */ - acc5 += x5 * c0; - - /* acc2 += b[numTaps-1] * x[n-numTaps-6] */ - acc6 += x6 * c0; - - /* acc3 += b[numTaps-1] * x[n-numTaps-7] */ - acc7 += x7 * c0; - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-4] sample */ - x0 = *(px++); - - /* Perform the multiply-accumulate */ - acc0 += x1 * c0; - acc1 += x2 * c0; - acc2 += x3 * c0; - acc3 += x4 * c0; - acc4 += x5 * c0; - acc5 += x6 * c0; - acc6 += x7 * c0; - acc7 += x0 * c0; - - /* Read the b[numTaps-3] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-5] sample */ - x1 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x2 * c0; - acc1 += x3 * c0; - acc2 += x4 * c0; - acc3 += x5 * c0; - acc4 += x6 * c0; - acc5 += x7 * c0; - acc6 += x0 * c0; - acc7 += x1 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x3 * c0; - acc1 += x4 * c0; - acc2 += x5 * c0; - acc3 += x6 * c0; - acc4 += x7 * c0; - acc5 += x0 * c0; - acc6 += x1 * c0; - acc7 += x2 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x3 = *(px++); - /* Perform the multiply-accumulates */ - acc0 += x4 * c0; - acc1 += x5 * c0; - acc2 += x6 * c0; - acc3 += x7 * c0; - acc4 += x0 * c0; - acc5 += x1 * c0; - acc6 += x2 * c0; - acc7 += x3 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x4 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x5 * c0; - acc1 += x6 * c0; - acc2 += x7 * c0; - acc3 += x0 * c0; - acc4 += x1 * c0; - acc5 += x2 * c0; - acc6 += x3 * c0; - acc7 += x4 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x5 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x6 * c0; - acc1 += x7 * c0; - acc2 += x0 * c0; - acc3 += x1 * c0; - acc4 += x2 * c0; - acc5 += x3 * c0; - acc6 += x4 * c0; - acc7 += x5 * c0; - - /* Read the b[numTaps-4] coefficient */ - c0 = *(pb++); - - /* Read x[n-numTaps-6] sample */ - x6 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x7 * c0; - acc1 += x0 * c0; - acc2 += x1 * c0; - acc3 += x2 * c0; - acc4 += x3 * c0; - acc5 += x4 * c0; - acc6 += x5 * c0; - acc7 += x6 * c0; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - tapCnt = numTaps % 0x8U; - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x7 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - acc4 += x4 * c0; - acc5 += x5 * c0; - acc6 += x6 * c0; - acc7 += x7 * c0; - - /* Reuse the present sample states for next sample */ - x0 = x1; - x1 = x2; - x2 = x3; - x3 = x4; - x4 = x5; - x5 = x6; - x6 = x7; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by 8 to process the next group of 8 samples */ - pState = pState + 8; - - /* The results in the 8 accumulators, store in the destination buffer. */ - *pDst++ = acc0; - *pDst++ = acc1; - *pDst++ = acc2; - *pDst++ = acc3; - *pDst++ = acc4; - *pDst++ = acc5; - *pDst++ = acc6; - *pDst++ = acc7; - - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining output samples */ - blkCnt = blockSize % 0x8U; - -#else - - /* Initialize blkCnt with number of taps */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0.0f; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = pCoeffs; - - i = numTaps; - - /* Perform the multiply-accumulates */ - while (i > 0U) - { - /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */ - acc0 += *px++ * *pb++; - - i--; - } - - /* Store result in destination buffer. */ - *pDst++ = acc0; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = (numTaps - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy remaining data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} - -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** -* @} end of FIR group -*/ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f64.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f64.c deleted file mode 100644 index bbfb3a6..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f64.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_f64.c - * Description: Floating-point FIR filter processing function - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Processing function for floating-point FIR filter. - @param[in] S points to an instance of the floating-point FIR filter structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - -void arm_fir_f64( - const arm_fir_instance_f64 * S, - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize) -{ - float64_t *pState = S->pState; /* State pointer */ - const float64_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float64_t *pStateCurnt; /* Points to the current sample of the state */ - float64_t *px; /* Temporary pointer for state buffer */ - const float64_t *pb; /* Temporary pointer for coefficient buffer */ - float64_t acc0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - - /* Initialize blkCnt with number of taps */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0.; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = pCoeffs; - - i = numTaps; - - /* Perform the multiply-accumulates */ - while (i > 0U) - { - /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */ - acc0 += *px++ * *pb++; - - i--; - } - - /* Store result in destination buffer. */ - *pDst++ = acc0; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - - /* Copy remaining data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} - -/** -* @} end of FIR group -*/ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c deleted file mode 100644 index 16d98c1..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c +++ /dev/null @@ -1,332 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_fast_q15.c - * Description: Q15 Fast FIR filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Processing function for the Q15 FIR filter (fast version). - @param[in] S points to an instance of the Q15 FIR filter structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - This fast version uses a 32-bit accumulator with 2.30 format. - The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around and distorts the result. - In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. - The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result. - - @remark - Refer to \ref arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. - Use function \ref arm_fir_init_q15() to initialize the filter structure. - */ - -void arm_fir_fast_q15( - const arm_fir_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - const q15_t *pb; /* Temporary pointer for coefficient buffer */ - q31_t acc0; /* Accumulators */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc1, acc2, acc3; /* Accumulators */ - q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coefficient values */ -#endif - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Copy 4 new input samples into the state buffer. */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */ - px = pState; - - /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */ - pb = pCoeffs; - - /* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */ - x0 = read_q15x2_ia (&px); - - /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */ - x2 = read_q15x2_ia (&px); - - /* Loop over the number of taps. Unroll by a factor of 4. - Repeat until we've computed numTaps-(numTaps%4) coefficients. */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */ - c0 = read_q15x2_ia ((q15_t **) &pb); - - /* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ - acc0 = __SMLAD(x0, c0, acc0); - - /* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */ - acc2 = __SMLAD(x2, c0, acc2); - - /* pack x[n-N-1] and x[n-N-2] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* Read state x[n-N-4], x[n-N-5] */ - x0 = read_q15x2_ia (&px); - - /* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */ - acc1 = __SMLADX(x1, c0, acc1); - - /* pack x[n-N-3] and x[n-N-4] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x0, x2, 0); -#else - x1 = __PKHBT(x2, x0, 0); -#endif - - /* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */ - acc3 = __SMLADX(x1, c0, acc3); - - /* Read coefficients b[N-2], b[N-3] */ - c0 = read_q15x2_ia ((q15_t **) &pb); - - /* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */ - acc0 = __SMLAD(x2, c0, acc0); - - /* Read state x[n-N-6], x[n-N-7] with offset */ - x2 = read_q15x2_ia (&px); - - /* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */ - acc2 = __SMLAD(x0, c0, acc2); - - /* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */ - acc1 = __SMLADX(x1, c0, acc1); - - /* pack x[n-N-5] and x[n-N-6] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */ - acc3 = __SMLADX(x1, c0, acc3); - - /* Decrement tap count */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps. - This is always be 2 taps since the filter length is even. */ - if ((numTaps & 0x3U) != 0U) - { - /* Read last two coefficients */ - c0 = read_q15x2_ia ((q15_t **) &pb); - - /* Perform the multiply-accumulates */ - acc0 = __SMLAD(x0, c0, acc0); - acc2 = __SMLAD(x2, c0, acc2); - - /* pack state variables */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* Read last state variables */ - x0 = read_q15x2 (px); - - /* Perform the multiply-accumulates */ - acc1 = __SMLADX(x1, c0, acc1); - - /* pack state variables */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x0, x2, 0); -#else - x1 = __PKHBT(x2, x0, 0); -#endif - - /* Perform the multiply-accumulates */ - acc3 = __SMLADX(x1, c0, acc3); - } - - /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation. - Then store the 4 outputs in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); - write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); -#else - write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); - write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining output samples */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of taps */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy two samples into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Use SIMD to hold states and coefficients */ - px = pState; - pb = pCoeffs; - - tapCnt = numTaps >> 1U; - - do - { - acc0 += (q31_t) *px++ * *pb++; - acc0 += (q31_t) *px++ * *pb++; - - tapCnt--; - } - while (tapCnt > 0U); - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - Then store the output in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = (numTaps - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy remaining data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} - -/** - @} end of FIR group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c deleted file mode 100644 index 62e6cad..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c +++ /dev/null @@ -1,322 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_fast_q31.c - * Description: Processing function for the Q31 Fast FIR filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Processing function for the Q31 FIR filter (fast version). - @param[in] S points to an instance of the Q31 structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - This function is optimized for speed at the expense of fixed-point precision and overflow protection. - The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. - These intermediate results are added to a 2.30 accumulator. - Finally, the accumulator is saturated and converted to a 1.31 result. - The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. - In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. - - @remark - Refer to \ref arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. - Use function \ref arm_fir_init_q31() to initialize the filter structure. - */ - -void arm_fir_fast_q31( - const arm_fir_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t *px; /* Temporary pointer for state buffer */ - const q31_t *pb; /* Temporary pointer for coefficient buffer */ - q31_t acc0; /* Accumulators */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc1, acc2, acc3; /* Accumulators */ - q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold state and coefficient values */ -#endif - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Copy 4 new input samples into the state buffer. */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Read the first 3 samples from the state buffer: - * x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - /* Loop over the number of taps. Unroll by a factor of 4. - Repeat until we've computed numTaps-4 coefficients. */ - while (tapCnt > 0U) - { - /* Read the b[numTaps] coefficient */ - c0 = *pb; - - /* Read x[n-numTaps-3] sample */ - x3 = *px; - - /* acc0 += b[numTaps] * x[n-numTaps] */ - multAcc_32x32_keep32_R(acc0, x0, c0); - - /* acc1 += b[numTaps] * x[n-numTaps-1] */ - multAcc_32x32_keep32_R(acc1, x1, c0); - - /* acc2 += b[numTaps] * x[n-numTaps-2] */ - multAcc_32x32_keep32_R(acc2, x2, c0); - - /* acc3 += b[numTaps] * x[n-numTaps-3] */ - multAcc_32x32_keep32_R(acc3, x3, c0); - - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb + 1U); - - /* Read x[n-numTaps-4] sample */ - x0 = *(px + 1U); - - /* Perform the multiply-accumulates */ - multAcc_32x32_keep32_R(acc0, x1, c0); - multAcc_32x32_keep32_R(acc1, x2, c0); - multAcc_32x32_keep32_R(acc2, x3, c0); - multAcc_32x32_keep32_R(acc3, x0, c0); - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb + 2U); - - /* Read x[n-numTaps-5] sample */ - x1 = *(px + 2U); - - /* Perform the multiply-accumulates */ - multAcc_32x32_keep32_R(acc0, x2, c0); - multAcc_32x32_keep32_R(acc1, x3, c0); - multAcc_32x32_keep32_R(acc2, x0, c0); - multAcc_32x32_keep32_R(acc3, x1, c0); - - /* Read the b[numTaps-3] coefficients */ - c0 = *(pb + 3U); - - /* Read x[n-numTaps-6] sample */ - x2 = *(px + 3U); - - /* Perform the multiply-accumulates */ - multAcc_32x32_keep32_R(acc0, x3, c0); - multAcc_32x32_keep32_R(acc1, x0, c0); - multAcc_32x32_keep32_R(acc2, x1, c0); - multAcc_32x32_keep32_R(acc3, x2, c0); - - /* update coefficient pointer */ - pb += 4U; - px += 4U; - - /* Decrement loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - multAcc_32x32_keep32_R(acc0, x0, c0); - multAcc_32x32_keep32_R(acc1, x1, c0); - multAcc_32x32_keep32_R(acc2, x2, c0); - multAcc_32x32_keep32_R(acc3, x3, c0); - - /* Reuse the present sample states for next sample */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement loop counter */ - tapCnt--; - } - - /* The results in the 4 accumulators are in 2.30 format. Convert to 1.31 - Then store the 4 outputs in the destination buffer. */ - *pDst++ = (q31_t) (acc0 << 1); - *pDst++ = (q31_t) (acc1 << 1); - *pDst++ = (q31_t) (acc2 << 1); - *pDst++ = (q31_t) (acc3 << 1); - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining output samples */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of taps */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = pCoeffs; - - i = numTaps; - - /* Perform the multiply-accumulates */ - do - { - multAcc_32x32_keep32_R(acc0, (*px++), (*pb++)); - i--; - } while (i > 0U); - - /* The result is in 2.30 format. Convert to 1.31 - Then store the output in the destination buffer. */ - *pDst++ = (q31_t) (acc0 << 1); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = (numTaps - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy remaining data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} -/** - @} end of FIR group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f16.c deleted file mode 100644 index 67afbfe..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f16.c +++ /dev/null @@ -1,105 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_init_f16.c - * Description: Floating-point FIR filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Initialization function for the floating-point FIR filter. - @param[in,out] S points to an instance of the floating-point FIR filter structure - @param[in] numTaps number of filter coefficients in the filter - @param[in] pCoeffs points to the filter coefficients buffer - @param[in] pState points to the state buffer - @param[in] blockSize number of samples processed per call - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to the array of state variables. - pState is of length numTaps+blockSize-1 samples (except for Helium - see below), where blockSize is the number of input samples processed by each call to arm_fir_f16(). - @par Initialization of Helium version - For Helium version the array of coefficients must be a multiple of 4 (4a) even if less - then 4a coefficients are defined in the FIR. The additional coefficients - (4a - numTaps) must be set to 0. - numTaps is still set to its right value in the init function. It means that - the implementation may require to read more coefficients due to the vectorization and - to avoid having to manage too many different cases in the code. - - - @par Helium state buffer - The state buffer must contain some additional temporary data - used during the computation but which is not the state of the FIR. - The first 8*ceil(blockSize/8) samples are temporary data. - The remaining samples are the state of the FIR filter. - So the state buffer has size numTaps + 8*ceil(blockSize/8) + blockSize - 1 - - */ - -void arm_fir_init_f16( - arm_fir_instance_f16 * S, - uint16_t numTaps, - const float16_t * pCoeffs, - float16_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer. The size is always (blockSize + numTaps - 1) */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - memset(pState, 0, (numTaps + (blockSize - 1U) + ROUND_UP(blockSize, 8)) * sizeof(float16_t)); -#else - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float16_t)); -#endif - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c deleted file mode 100644 index 1c1ed1d..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c +++ /dev/null @@ -1,99 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_init_f32.c - * Description: Floating-point FIR filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Initialization function for the floating-point FIR filter. - @param[in,out] S points to an instance of the floating-point FIR filter structure - @param[in] numTaps number of filter coefficients in the filter - @param[in] pCoeffs points to the filter coefficients buffer - @param[in] pState points to the state buffer - @param[in] blockSize number of samples processed per call - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to the array of state variables and some working memory for the Helium version. - pState is of length numTaps+blockSize-1 samples (except for Helium - see below), where blockSize is the number of input samples processed by each call to arm_fir_f32(). - @par Initialization of Helium version - For Helium version the array of coefficients must be a multiple of 4 (4a) even if less - then 4a coefficients are defined in the FIR. The additional coefficients - (4a - numTaps) must be set to 0. - numTaps is still set to its right value in the init function. It means that - the implementation may require to read more coefficients due to the vectorization and - to avoid having to manage too many different cases in the code. - - @par Helium state buffer - The state buffer must contain some additional temporary data - used during the computation but which is not the state of the FIR. - The first blockSize samples are temporary data. - The remaining samples are the state of the FIR filter. - So the state buffer has size numTaps + 2 * blockSize - 1 - - */ - -void arm_fir_init_f32( - arm_fir_instance_f32 * S, - uint16_t numTaps, - const float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer. The size is always (blockSize + numTaps - 1) */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - memset(pState, 0, (numTaps + (blockSize - 1U) + blockSize) * sizeof(float32_t)); -#else - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t)); -#endif - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f64.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f64.c deleted file mode 100644 index 52e3d8b..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f64.c +++ /dev/null @@ -1,95 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_init_f64.c - * Description: Floating-point FIR filter initialization function - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Initialization function for the floating-point FIR filter. - @param[in,out] S points to an instance of the floating-point FIR filter structure - @param[in] numTaps number of filter coefficients in the filter - @param[in] pCoeffs points to the filter coefficients buffer - @param[in] pState points to the state buffer - @param[in] blockSize number of samples processed per call - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to the array of state variables and some working memory for the Helium version. - pState is of length numTaps+blockSize-1 samples (except for Helium - see below), where blockSize is the number of input samples processed by each call to arm_fir_f32(). - @par Initialization of Helium version - For Helium version the array of coefficients must be a multiple of 4 (4a) even if less - then 4a coefficients are defined in the FIR. The additional coefficients - (4a - numTaps) must be set to 0. - numTaps is still set to its right value in the init function. It means that - the implementation may require to read more coefficients due to the vectorization and - to avoid having to manage too many different cases in the code. - - @par Helium state buffer - The state buffer must contain some additional temporary data - used during the computation but which is not the state of the FIR. - The first blockSize samples are temporary data. - The remaining samples are the state of the FIR filter. - So the state buffer has size numTaps + 2 * blockSize - 1 - - */ - -void arm_fir_init_f64( - arm_fir_instance_f64 * S, - uint16_t numTaps, - const float64_t * pCoeffs, - float64_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer. The size is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float64_t)); - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c deleted file mode 100644 index 6e59ec7..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c +++ /dev/null @@ -1,145 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_init_q15.c - * Description: Q15 FIR filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Initialization function for the Q15 FIR filter. - @param[in,out] S points to an instance of the Q15 FIR filter structure. - @param[in] numTaps number of filter coefficients in the filter. Must be even and greater than or equal to 4. - @param[in] pCoeffs points to the filter coefficients buffer. - @param[in] pState points to the state buffer. - @param[in] blockSize number of samples processed per call. - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : numTaps is not greater than or equal to 4 and even - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- Note that numTaps must be even and greater than or equal to 4. - To implement an odd length filter simply increase numTaps by 1 and set the last coefficient to zero. - For example, to implement a filter with numTaps=3 and coefficients - 
-      {0.3, -0.8, 0.3}
-
- set numTaps=4 and use the coefficients: - 
-      {0.3, -0.8, 0.3, 0}.
-
- Similarly, to implement a two point filter - 
-      {0.3, -0.3}
-
- set numTaps=4 and use the coefficients: - 
-      {0.3, -0.3, 0, 0}.
-
- pState points to the array of state variables. - pState is of length numTaps+blockSize, when running on Cortex-M4 and Cortex-M3 and is of length numTaps+blockSize-1, when running on Cortex-M0 where blockSize is the number of input samples processed by each call to arm_fir_q15(). - - @par Initialization of Helium version - For Helium version the array of coefficients must be a multiple of 8 (8a) even if less - then 8a coefficients are defined in the FIR. The additional coefficients - (8a - numTaps) must be set to 0. - numTaps is still set to its right value in the init function. It means that - the implementation may require to read more coefficients due to the vectorization and - to avoid having to manage too many different cases in the code. - */ - -arm_status arm_fir_init_q15( - arm_fir_instance_q15 * S, - uint16_t numTaps, - const q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize) -{ - arm_status status; - -#if defined (ARM_MATH_DSP) - - /* The Number of filter coefficients in the filter must be even and at least 4 */ - if (numTaps & 0x1U) - { - status = ARM_MATH_ARGUMENT_ERROR; - } - else - { - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear the state buffer. The size is always (blockSize + numTaps ) */ - memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - status = ARM_MATH_SUCCESS; - } - - return (status); - -#else - - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer. The size is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - status = ARM_MATH_SUCCESS; - - return (status); - -#endif /* #if defined (ARM_MATH_DSP) */ - -} - -/** - @} end of FIR group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c deleted file mode 100644 index 27dc918..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c +++ /dev/null @@ -1,100 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_init_q31.c - * Description: Q31 FIR filter initialization function. - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Initialization function for the Q31 FIR filter. - @param[in,out] S points to an instance of the Q31 FIR filter structure - @param[in] numTaps number of filter coefficients in the filter - @param[in] pCoeffs points to the filter coefficients buffer - @param[in] pState points to the state buffer - @param[in] blockSize number of samples processed - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- pState points to the array of state variables. - pState is of length numTaps+blockSize-1 samples (except for Helium - see below), where blockSize is the number of input samples processed by each call to arm_fir_q31(). - - @par Initialization of Helium version - For Helium version the array of coefficients must be a multiple of 4 (4a) even if less - then 4a coefficients are defined in the FIR. The additional coefficients - (4a - numTaps) must be set to 0. - numTaps is still set to its right value in the init function. It means that - the implementation may require to read more coefficients due to the vectorization and - to avoid having to manage too many different cases in the code. - - @par Helium state buffer - The state buffer must contain some additional temporary data - used during the computation but which is not the state of the FIR. - The first 2*4*ceil(blockSize/4) samples are temporary data. - The remaining samples are the state of the FIR filter. - So the state buffer has size numTaps + 8*ceil(blockSize/4) + blockSize - 1 - - */ - -void arm_fir_init_q31( - arm_fir_instance_q31 * S, - uint16_t numTaps, - const q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer. The size is always (blockSize + numTaps - 1) */ - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - memset(pState, 0, (numTaps + (blockSize - 1U) + 2*ROUND_UP(blockSize, 4)) * sizeof(q31_t)); - #else - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t)); - #endif - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c deleted file mode 100644 index 6877f28..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c +++ /dev/null @@ -1,90 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_init_q7.c - * Description: Q7 FIR filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Initialization function for the Q7 FIR filter. - @param[in,out] S points to an instance of the Q7 FIR filter structure - @param[in] numTaps number of filter coefficients in the filter - @param[in] pCoeffs points to the filter coefficients buffer - @param[in] pState points to the state buffer - @param[in] blockSize number of samples processed - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to the array of state variables. - pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7(). - - @par Initialization of Helium version - For Helium version the array of coefficients must be a multiple of 16 (16a) even if less - then 16a coefficients are defined in the FIR. The additional coefficients - (16a - numTaps) must be set to 0. - numTaps is still set to its right value in the init function. It means that - the implementation may require to read more coefficients due to the vectorization and - to avoid having to manage too many different cases in the code. - - */ - -void arm_fir_init_q7( - arm_fir_instance_q7 * S, - uint16_t numTaps, - const q7_t * pCoeffs, - q7_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer. The size is always (blockSize + numTaps - 1) */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q7_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c deleted file mode 100644 index 38f8437..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c +++ /dev/null @@ -1,1252 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_interpolate_f32.c - * Description: Floating-point FIR interpolation sequences - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator - - These functions combine an upsampler (zero stuffer) and an FIR filter. - They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images. - Conceptually, the functions are equivalent to the block diagram below: - \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions" - After upsampling by a factor of L, the signal should be filtered by a lowpass filter with a normalized - cutoff frequency of 1/L in order to eliminate high frequency copies of the spectrum. - The user of the function is responsible for providing the filter coefficients. - - The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner. - The upsampler inserts L-1 zeros between each sample. - Instead of multiplying by these zero values, the FIR filter is designed to skip them. - This leads to an efficient implementation without any wasted effort. - The functions operate on blocks of input and output data. - pSrc points to an array of blockSize input values and - pDst points to an array of blockSize*L output values. - - The library provides separate functions for Q15, Q31, and floating-point data types. - - @par Algorithm - The functions use a polyphase filter structure: - 
-      y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
-      y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
-      ...
-      y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
-
- This approach is more efficient than straightforward upsample-then-filter algorithms. - With this method the computation is reduced by a factor of 1/L when compared to using a standard FIR filter. - @par - pCoeffs points to a coefficient array of size numTaps. - numTaps must be a multiple of the interpolation factor L and this is checked by the - initialization functions. - Internally, the function divides the FIR filter's impulse response into shorter filters of length - phaseLength=numTaps/L. - Coefficients are stored in time reversed order. - 
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to a state array of size blockSize + phaseLength - 1. - Samples in the state buffer are stored in the order: - 
-     {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
-
- @par - The state variables are updated after each block of data is processed, the coefficients are untouched. - - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter. - Coefficient arrays may be shared among several instances while state variable array should be allocated separately. - There are separate instance structure declarations for each of the 3 supported data types. - - @par Initialization Functions - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - - Checks to make sure that the length of the filter is a multiple of the interpolation factor. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero. - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - The code below statically initializes each of the 3 different data type filter instance structures - 
-      arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
-      arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
-      arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
-
- @par - where L is the interpolation factor; phaseLength=numTaps/L is the - length of each of the shorter FIR filters used internally, - pCoeffs is the address of the coefficient buffer; - pState is the address of the state buffer. - Be sure to set the values in the state buffer to zeros when doing static initialization. - - @par Fixed-Point Behavior - Care must be taken when using the fixed-point versions of the FIR interpolate filter functions. - In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - Refer to the function specific documentation below for usage guidelines. - */ - -/** - @addtogroup FIR_Interpolate - @{ - */ - -/** - @brief Processing function for floating-point FIR interpolator. - @param[in] S points to an instance of the floating-point FIR interpolator structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -static void arm_fir_interpolate2_f32_mve( - const arm_fir_interpolate_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - const float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - uint32_t tapCnt; - uint32_t blkCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - uint32_t strides[4] = { 0, 1 * 2, 2 * 2, 3 * 2 }; - uint32x4_t vec_strides0 = vld1q_u32(strides); - uint32x4_t vec_strides1 = vec_strides0 + 1; - f32x4_t acc0, acc1; - - /* - * S->pState buffer contains previous frame (phaseLen - 1) samples - * pStateCurnt points to the location where the new input data should be written - */ - pStateCurnt = S->pState + (phaseLen - 1U); - /* - * Total number of intput samples - */ - blkCnt = blockSize; - /* - * Loop over the blockSize. - */ - while (blkCnt > 0U) - { - /* - * Copy new input sample into the state buffer - */ - *pStateCurnt++ = *pSrc++; - /* - * Initialize state pointer - */ - ptr1 = pState; - - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs; - - tapCnt = phaseLen >> 2; - while (tapCnt > 0U) - { - f32x4_t vecCoef, vecState; - - vecState = vldrwq_f32(ptr1); - - vecCoef = vldrwq_gather_shifted_offset_f32(ptr2, vec_strides1); - acc1 = vfmaq_f32(acc1, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_f32(ptr2, vec_strides0); - acc0 = vfmaq_f32(acc0, vecState, vecCoef); - - ptr2 += 4 * 2; - ptr1 += 4; - /* - * Decrement the loop counter - */ - tapCnt--; - } - - tapCnt = phaseLen & 3; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - f32x4_t vecCoef, vecState; - - vecState = vldrwq_z_f32(ptr1, p0); - - vecCoef = vldrwq_gather_shifted_offset_z_f32(ptr2, vec_strides1, p0); - acc1 = vfmaq_f32(acc1, vecState, vecCoef); - vecCoef = vldrwq_gather_shifted_offset_z_f32(ptr2, vec_strides0, p0); - acc0 = vfmaq_f32(acc0, vecState, vecCoef); - - } - *pDst++ = vecAddAcrossF32Mve(acc1); - *pDst++ = vecAddAcrossF32Mve(acc0); - - /* - * Advance the state pointer by 1 - * * to process the next group of interpolation factor number samples - */ - pState = pState + 1; - /* - * Decrement the loop counter - */ - blkCnt--; - } - - /* - * Processing is complete. - * ** Now copy the last phaseLen - 1 samples to the start of the state buffer. - * ** This prepares the state buffer for the next function call. - */ - - /* - * Points to the start of the state buffer - */ - pStateCurnt = S->pState; - blkCnt = (phaseLen - 1U) >> 2; - while (blkCnt > 0U) - { - vst1q(pStateCurnt, vldrwq_f32(pState)); - pState += 4; - pStateCurnt += 4; - blkCnt--; - } - blkCnt = (phaseLen - 1U) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vstrwq_p_f32(pStateCurnt, vldrwq_f32(pState), p0); - } -} - -void arm_fir_interpolate_f32( - const arm_fir_interpolate_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - const float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - uint32_t tapCnt; - uint32_t i, blkCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - uint32_t strides[4] = { 0, 1 * S->L, 2 * S->L, 3 * S->L }; - uint32_t stridesM[4] = { 4, 3, 2, 1 }; - uint32x4_t vec_stridesM = vld1q_u32(stridesM); - uint32x4_t vec_strides = vld1q_u32(strides); - f32x4_t acc; - - - if ( S->L == 2 ) { - arm_fir_interpolate2_f32_mve(S, pSrc, pDst, blockSize); - return; - } - - /* - * S->pState buffer contains previous frame (phaseLen - 1) samples - */ - /* - * pStateCurnt points to the location where the new input data should be written - */ - pStateCurnt = S->pState + (phaseLen - 1U); - /* - * Total number of intput samples - */ - blkCnt = blockSize; - /* - * Loop over the blockSize. - */ - while (blkCnt > 0U) - { - /* - * Copy new input sample into the state buffer - */ - *pStateCurnt++ = *pSrc++; - /* - * Loop over the Interpolation factor. - */ - i = S->L; - while (i > 0U) - { - /* - * Initialize state pointer - */ - ptr1 = pState; - if (i >= 4) - { - float32_t state0, state1, state2, state3; - acc = vdupq_n_f32(0.0f); - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs + (i - 1U) - 4; - tapCnt = phaseLen >> 2; - while (tapCnt > 0U) - { - f32x4_t vecCoef; - const float32_t *pCoef = ptr2; - - state0 = ptr1[0]; - state1 = ptr1[1]; - state2 = ptr1[2]; - state3 = ptr1[3]; - ptr1 += 4; - - vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM); - pCoef += S->L; - acc = vfmaq_n_f32(acc, vecCoef, state0); - - vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM); - pCoef += S->L; - acc = vfmaq_n_f32(acc, vecCoef, state1); - - vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM); - pCoef += S->L; - acc = vfmaq_n_f32(acc, vecCoef, state2); - - vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM); - pCoef += S->L; - acc = vfmaq_n_f32(acc, vecCoef, state3); - - ptr2 = ptr2 + 4 * S->L; - /* - * Decrement the loop counter - */ - tapCnt--; - } - - tapCnt = phaseLen & 3; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - f32x4_t vecCoef; - const float32_t *pCoef = ptr2; - - state0 = ptr1[0]; - state1 = ptr1[1]; - state2 = ptr1[2]; - state3 = ptr1[3]; - - vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0); - pCoef += S->L; - acc = vfmaq_n_f32(acc, vecCoef, state0); - - vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0); - pCoef += S->L; - acc = vfmaq_n_f32(acc, vecCoef, state1); - - vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0); - pCoef += S->L; - acc = vfmaq_n_f32(acc, vecCoef, state2); - - vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0); - pCoef += S->L; - acc = vfmaq_n_f32(acc, vecCoef, state3); - } - - vst1q(pDst, acc); - pDst += 4; - i -= 4; - } - else - { - acc = vdupq_n_f32(0.0f); - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs + (i - 1U); - - tapCnt = phaseLen >> 2; - while (tapCnt > 0U) - { - f32x4_t vecCoef, vecState; - - vecState = vldrwq_f32(ptr1); - ptr1 += 4; - - vecCoef = vldrwq_gather_shifted_offset_f32(ptr2, vec_strides); - ptr2 += 4 * S->L; - acc = vfmaq_f32(acc, vecState, vecCoef); - /* - * Decrement the loop counter - */ - tapCnt--; - } - - tapCnt = phaseLen & 3; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - f32x4_t vecCoef, vecState; - - vecState = vldrwq_z_f32(ptr1, p0); - - vecCoef = vldrwq_gather_shifted_offset_z_f32(ptr2, vec_strides, p0); - acc = vfmaq_f32(acc, vecState, vecCoef); - } - *pDst++ = vecAddAcrossF32Mve(acc); - /* - * Decrement the loop counter - */ - i--; - } - } - - /* - * Advance the state pointer by 1 - * * to process the next group of interpolation factor number samples - */ - pState = pState + 1; - /* - * Decrement the loop counter - */ - blkCnt--; - } - - /* - * Processing is complete. - * ** Now copy the last phaseLen - 1 samples to the start of the state buffer. - * ** This prepares the state buffer for the next function call. - */ - - /* - * Points to the start of the state buffer - */ - pStateCurnt = S->pState; - blkCnt = (phaseLen - 1U) >> 2; - while (blkCnt > 0U) - { - vst1q(pStateCurnt, vldrwq_f32(pState)); - pState += 4; - pStateCurnt += 4; - blkCnt--; - } - blkCnt = (phaseLen - 1U) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vstrwq_p_f32(pStateCurnt, vldrwq_f32(pState), p0); - } -} - -#else -#if defined(ARM_MATH_NEON) -void arm_fir_interpolate_f32( - const arm_fir_interpolate_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *ptr1; /* Temporary pointers for state buffer */ - const float32_t *ptr2; /* Temporary pointers for coefficient buffer */ - float32_t sum0; /* Accumulators */ - float32_t c0; /* Temporary variables to hold state and coefficient values */ - uint32_t i, blkCnt, j; /* Loop counters */ - uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ - uint32_t blkCntN4; - float32_t c1, c2, c3; - - float32x4_t sum0v; - float32x4_t accV0,accV1; - float32x4_t x0v,x1v,x2v,xa,xb; - float32x2_t tempV; - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = S->pState + (phaseLen - 1U); - - /* Initialise blkCnt */ - blkCnt = blockSize >> 3; - blkCntN4 = blockSize & 7; - - /* Loop unrolling */ - while (blkCnt > 0U) - { - /* Copy new input samples into the state buffer */ - sum0v = vld1q_f32(pSrc); - vst1q_f32(pStateCurnt,sum0v); - pSrc += 4; - pStateCurnt += 4; - - sum0v = vld1q_f32(pSrc); - vst1q_f32(pStateCurnt,sum0v); - pSrc += 4; - pStateCurnt += 4; - - /* Address modifier index of coefficient buffer */ - j = 1U; - - /* Loop over the Interpolation factor. */ - i = (S->L); - - while (i > 0U) - { - /* Set accumulator to zero */ - accV0 = vdupq_n_f32(0.0); - accV1 = vdupq_n_f32(0.0); - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2U; - - x0v = vld1q_f32(ptr1); - x1v = vld1q_f32(ptr1 + 4); - - while (tapCnt > 0U) - { - /* Read the input samples */ - x2v = vld1q_f32(ptr1 + 8); - - /* Read the coefficients */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - accV0 = vmlaq_n_f32(accV0,x0v,c0); - accV1 = vmlaq_n_f32(accV1,x1v,c0); - - /* Read the coefficients, inputs and perform multiply-accumulate */ - c1 = *(ptr2 + S->L); - - xa = vextq_f32(x0v,x1v,1); - xb = vextq_f32(x1v,x2v,1); - - accV0 = vmlaq_n_f32(accV0,xa,c1); - accV1 = vmlaq_n_f32(accV1,xb,c1); - - /* Read the coefficients, inputs and perform multiply-accumulate */ - c2 = *(ptr2 + S->L * 2); - - xa = vextq_f32(x0v,x1v,2); - xb = vextq_f32(x1v,x2v,2); - - accV0 = vmlaq_n_f32(accV0,xa,c2); - accV1 = vmlaq_n_f32(accV1,xb,c2); - - /* Read the coefficients, inputs and perform multiply-accumulate */ - c3 = *(ptr2 + S->L * 3); - - xa = vextq_f32(x0v,x1v,3); - xb = vextq_f32(x1v,x2v,3); - - accV0 = vmlaq_n_f32(accV0,xa,c3); - accV1 = vmlaq_n_f32(accV1,xb,c3); - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += 4 * S->L; - ptr1 += 4; - x0v = x1v; - x1v = x2v; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen % 0x4U; - - x2v = vld1q_f32(ptr1 + 8); - - switch (tapCnt) - { - case 3: - c0 = *(ptr2); - accV0 = vmlaq_n_f32(accV0,x0v,c0); - accV1 = vmlaq_n_f32(accV1,x1v,c0); - ptr2 += S->L; - - c0 = *(ptr2); - - xa = vextq_f32(x0v,x1v,1); - xb = vextq_f32(x1v,x2v,1); - - accV0 = vmlaq_n_f32(accV0,xa,c0); - accV1 = vmlaq_n_f32(accV1,xb,c0); - ptr2 += S->L; - - c0 = *(ptr2); - - xa = vextq_f32(x0v,x1v,2); - xb = vextq_f32(x1v,x2v,2); - - accV0 = vmlaq_n_f32(accV0,xa,c0); - accV1 = vmlaq_n_f32(accV1,xb,c0); - ptr2 += S->L; - - break; - - case 2: - c0 = *(ptr2); - accV0 = vmlaq_n_f32(accV0,x0v,c0); - accV1 = vmlaq_n_f32(accV1,x1v,c0); - ptr2 += S->L; - - c0 = *(ptr2); - - xa = vextq_f32(x0v,x1v,1); - xb = vextq_f32(x1v,x2v,1); - - accV0 = vmlaq_n_f32(accV0,xa,c0); - accV1 = vmlaq_n_f32(accV1,xb,c0); - ptr2 += S->L; - - break; - - case 1: - c0 = *(ptr2); - accV0 = vmlaq_n_f32(accV0,x0v,c0); - accV1 = vmlaq_n_f32(accV1,x1v,c0); - ptr2 += S->L; - - break; - - default: - break; - - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst = vgetq_lane_f32(accV0, 0); - *(pDst + S->L) = vgetq_lane_f32(accV0, 1); - *(pDst + 2 * S->L) = vgetq_lane_f32(accV0, 2); - *(pDst + 3 * S->L) = vgetq_lane_f32(accV0, 3); - - *(pDst + 4 * S->L) = vgetq_lane_f32(accV1, 0); - *(pDst + 5 * S->L) = vgetq_lane_f32(accV1, 1); - *(pDst + 6 * S->L) = vgetq_lane_f32(accV1, 2); - *(pDst + 7 * S->L) = vgetq_lane_f32(accV1, 3); - - pDst++; - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 8; - - pDst += S->L * 7; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - - while (blkCntN4 > 0U) - { - /* Copy new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1U; - - /* Loop over the Interpolation factor. */ - i = S->L; - - while (i > 0U) - { - /* Set accumulator to zero */ - sum0v = vdupq_n_f32(0.0); - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - ** Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2U; - - while (tapCnt > 0U) - { - /* Read the coefficient */ - x1v = vsetq_lane_f32(*(ptr2),x1v,0); - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the input sample */ - x0v = vld1q_f32(ptr1); - ptr1 += 4; - - /* Read the coefficient */ - x1v = vsetq_lane_f32(*(ptr2),x1v,1); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the coefficient */ - x1v = vsetq_lane_f32(*(ptr2),x1v,2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Read the coefficient */ - x1v = vsetq_lane_f32(*(ptr2),x1v,3); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - sum0v = vmlaq_f32(sum0v,x0v,x1v); - - /* Decrement the loop counter */ - tapCnt--; - } - - tempV = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v)); - sum0 = vget_lane_f32(tempV, 0) + vget_lane_f32(tempV, 1); - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen % 0x4U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum0 += *(ptr1++) * (*ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = sum0; - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCntN4--; - } - - /* Processing is complete. - ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - - tapCnt = (phaseLen - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - sum0v = vld1q_f32(pState); - vst1q_f32(pStateCurnt,sum0v); - pState += 4; - pStateCurnt += 4; - - /* Decrement the loop counter */ - tapCnt--; - } - - tapCnt = (phaseLen - 1U) % 0x04U; - - /* copy data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} -#else - -void arm_fir_interpolate_f32( - const arm_fir_interpolate_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) - - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCur; /* Points to the current sample of the state */ - float32_t *ptr1; /* Temporary pointer for state buffer */ - const float32_t *ptr2; /* Temporary pointer for coefficient buffer */ - float32_t sum0; /* Accumulators */ - uint32_t i, blkCnt, tapCnt; /* Loop counters */ - uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - uint32_t j; - -#if defined (ARM_MATH_LOOPUNROLL) - float32_t acc0, acc1, acc2, acc3; - float32_t x0, x1, x2, x3; - float32_t c0, c1, c2, c3; -#endif - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (phaseLen - 1U); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Copy new input sample into the state buffer */ - *pStateCur++ = *pSrc++; - *pStateCur++ = *pSrc++; - *pStateCur++ = *pSrc++; - *pStateCur++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1U; - - /* Loop over the Interpolation factor. */ - i = (S->L); - - while (i > 0U) - { - /* Set accumulator to zero */ - acc0 = 0.0f; - acc1 = 0.0f; - acc2 = 0.0f; - acc3 = 0.0f; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2U; - - x0 = *(ptr1++); - x1 = *(ptr1++); - x2 = *(ptr1++); - - while (tapCnt > 0U) - { - /* Read the input sample */ - x3 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Read the coefficient */ - c1 = *(ptr2 + S->L); - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += x1 * c1; - acc1 += x2 * c1; - acc2 += x3 * c1; - acc3 += x0 * c1; - - /* Read the coefficient */ - c2 = *(ptr2 + S->L * 2); - - /* Read the input sample */ - x1 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += x2 * c2; - acc1 += x3 * c2; - acc2 += x0 * c2; - acc3 += x1 * c2; - - /* Read the coefficient */ - c3 = *(ptr2 + S->L * 3); - - /* Read the input sample */ - x2 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += x3 * c3; - acc1 += x0 * c3; - acc2 += x1 * c3; - acc3 += x2 * c3; - - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += 4 * S->L; - - /* Decrement loop counter */ - tapCnt--; - } - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen % 0x4U; - - while (tapCnt > 0U) - { - /* Read the input sample */ - x3 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += x0 * c0; - acc1 += x1 * c0; - acc2 += x2 * c0; - acc3 += x3 * c0; - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* update states for next sample processing */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *(pDst ) = acc0; - *(pDst + S->L) = acc1; - *(pDst + 2 * S->L) = acc2; - *(pDst + 3 * S->L) = acc3; - - pDst++; - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 4; - - pDst += S->L * 3; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy new input sample into the state buffer */ - *pStateCur++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1U; - - /* Loop over the Interpolation factor. */ - i = S->L; - - while (i > 0U) - { - /* Set accumulator to zero */ - sum0 = 0.0f; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. - Repeat until we've computed numTaps-(4*S->L) coefficients. */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - tapCnt = phaseLen >> 2U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum0 += *ptr1++ * *ptr2; - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - sum0 += *ptr1++ * *ptr2; - ptr2 += S->L; - - sum0 += *ptr1++ * *ptr2; - ptr2 += S->L; - - sum0 += *ptr1++ * *ptr2; - ptr2 += S->L; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - tapCnt = phaseLen % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = phaseLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum0 += *ptr1++ * *ptr2; - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Decrement loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = sum0; - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last phaseLen - 1 samples to the satrt of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - tapCnt = (phaseLen - 1U) >> 2U; - - /* copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - tapCnt = (phaseLen - 1U) % 0x04U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = (phaseLen - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -#else -/* alternate version for CM0_FAMILY */ - - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCur; /* Points to the current sample of the state */ - float32_t *ptr1; /* Temporary pointer for state buffer */ - const float32_t *ptr2; /* Temporary pointer for coefficient buffer */ - float32_t sum0; /* Accumulators */ - uint32_t i, blkCnt, tapCnt; /* Loop counters */ - uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (phaseLen - 1U); - - /* Total number of intput samples */ - blkCnt = blockSize; - - /* Loop over the blockSize. */ - while (blkCnt > 0U) - { - /* Copy new input sample into the state buffer */ - *pStateCur++ = *pSrc++; - - /* Loop over the Interpolation factor. */ - i = S->L; - - while (i > 0U) - { - /* Set accumulator to zero */ - sum0 = 0.0f; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (i - 1U); - - /* Loop over the polyPhase length */ - tapCnt = phaseLen; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum0 += *ptr1++ * *ptr2; - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = sum0; - - /* Decrement loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last phaseLen - 1 samples to the start of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - - tapCnt = phaseLen - 1U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} - -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of FIR_Interpolate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c deleted file mode 100644 index 9df54b9..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c +++ /dev/null @@ -1,106 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_interpolate_init_f32.c - * Description: Floating-point FIR interpolator initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Interpolate - @{ - */ - -/** - @brief Initialization function for the floating-point FIR interpolator. - @param[in,out] S points to an instance of the floating-point FIR interpolator structure - @param[in] L upsample factor - @param[in] numTaps number of filter coefficients in the filter - @param[in] pCoeffs points to the filter coefficient buffer - @param[in] pState points to the state buffer - @param[in] blockSize number of input samples to process per call - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : filter length numTaps is not a multiple of the interpolation factor L - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
-
- @par - The length of the filter numTaps must be a multiple of the interpolation factor L. - @par - pState points to the array of state variables. - pState is of length (numTaps/L)+blockSize-1 words - where blockSize is the number of input samples processed by each call to arm_fir_interpolate_f32(). - */ - -arm_status arm_fir_interpolate_init_f32( - arm_fir_interpolate_instance_f32 * S, - uint8_t L, - uint16_t numTaps, - const float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The filter length must be a multiple of the interpolation factor */ - if ((numTaps % L) != 0U) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign Interpolation factor */ - S->L = L; - - /* Assign polyPhaseLength */ - S->phaseLength = numTaps / L; - - /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */ - memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - - status = ARM_MATH_SUCCESS; - } - - return (status); -} - -/** - @} end of FIR_Interpolate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c deleted file mode 100644 index 8c6c825..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c +++ /dev/null @@ -1,106 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_interpolate_init_q15.c - * Description: Q15 FIR interpolator initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Interpolate - @{ - */ - -/** - @brief Initialization function for the Q15 FIR interpolator. - @param[in,out] S points to an instance of the Q15 FIR interpolator structure - @param[in] L upsample factor - @param[in] numTaps number of filter coefficients in the filter - @param[in] pCoeffs points to the filter coefficient buffer - @param[in] pState points to the state buffer - @param[in] blockSize number of input samples to process per call - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : filter length numTaps is not a multiple of the interpolation factor L - - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
-
- The length of the filter numTaps must be a multiple of the interpolation factor L. - @par - pState points to the array of state variables. - pState is of length (numTaps/L)+blockSize-1 words - where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q15(). - */ - -arm_status arm_fir_interpolate_init_q15( - arm_fir_interpolate_instance_q15 * S, - uint8_t L, - uint16_t numTaps, - const q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The filter length must be a multiple of the interpolation factor */ - if ((numTaps % L) != 0U) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign Interpolation factor */ - S->L = L; - - /* Assign polyPhaseLength */ - S->phaseLength = numTaps / L; - - /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */ - memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - status = ARM_MATH_SUCCESS; - } - - return (status); -} - -/** - @} end of FIR_Interpolate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c deleted file mode 100644 index b89189c..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c +++ /dev/null @@ -1,105 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_interpolate_init_q31.c - * Description: Q31 FIR interpolator initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Interpolate - @{ - */ - -/** - @brief Initialization function for the Q31 FIR interpolator. - @param[in,out] S points to an instance of the Q31 FIR interpolator structure - @param[in] L upsample factor - @param[in] numTaps number of filter coefficients in the filter - @param[in] pCoeffs points to the filter coefficient buffer - @param[in] pState points to the state buffer - @param[in] blockSize number of input samples to process per call - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : filter length numTaps is not a multiple of the interpolation factor L - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
-
- The length of the filter numTaps must be a multiple of the interpolation factor L. - @par - pState points to the array of state variables. - pState is of length (numTaps/L)+blockSize-1 words - where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q31(). - */ - -arm_status arm_fir_interpolate_init_q31( - arm_fir_interpolate_instance_q31 * S, - uint8_t L, - uint16_t numTaps, - const q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize) -{ - arm_status status; - - /* The filter length must be a multiple of the interpolation factor */ - if ((numTaps % L) != 0U) - { - /* Set status as ARM_MATH_LENGTH_ERROR */ - status = ARM_MATH_LENGTH_ERROR; - } - else - { - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign Interpolation factor */ - S->L = L; - - /* Assign polyPhaseLength */ - S->phaseLength = numTaps / L; - - /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */ - memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; - - status = ARM_MATH_SUCCESS; - } - - return (status); -} - -/** - @} end of FIR_Interpolate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c deleted file mode 100644 index d9892e1..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c +++ /dev/null @@ -1,774 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_interpolate_q15.c - * Description: Q15 FIR interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Interpolate - @{ - */ - -/** - @brief Processing function for the Q15 FIR interpolator. - @param[in] S points to an instance of the Q15 FIR interpolator structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - Lastly, the accumulator is saturated to yield a result in 1.15 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_fir_interpolate_q15( - const arm_fir_interpolate_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - const q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - - uint32_t i, blkCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - uint16_t strides[8] = { - 0, 1 * S->L, 2 * S->L, 3 * S->L, - 4 * S->L, 5 * S->L, 6 * S->L, 7 * S->L - }; - uint16x8_t vec_strides0 = *(uint16x8_t *) strides; - uint16x8_t vec_strides1 = vec_strides0 + 1; - uint16x8_t vec_strides2 = vec_strides0 + 2; - uint16x8_t vec_strides3 = vec_strides0 + 3; - q15x8_t vecState, vecCoef; - - /* - * S->pState buffer contains previous frame (phaseLen - 1) samples - * pStateCurnt points to the location where the new input data should be written - */ - pStateCurnt = S->pState + ((q15_t) phaseLen - 1); - /* - * Total number of intput samples - */ - blkCnt = blockSize; - /* - * Loop over the blockSize. - */ - while (blkCnt > 0U) - { - /* - * Copy new input sample into the state buffer - */ - *pStateCurnt++ = *pSrc++; - /* - * Loop over the Interpolation factor. - */ - i = S->L; - while (i > 0U) - { - /* - * Initialize state pointer - */ - ptr1 = pState; - if (i >= 4) - { - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs + (i - 1 - 3U); - - q63_t acc0 = 0LL; - q63_t acc1 = 0LL; - q63_t acc2 = 0LL; - q63_t acc3 = 0LL; - - uint32_t tapCnt = phaseLen >> 3; - while (tapCnt > 0U) - { - vecState = vldrhq_s16(ptr1); - - vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides3); - acc0 = vmlaldavaq(acc0, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides2); - acc1 = vmlaldavaq(acc1, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1); - acc2 = vmlaldavaq(acc2, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0); - acc3 = vmlaldavaq(acc3, vecState, vecCoef); - - ptr1 += 8; - ptr2 = ptr2 + S->L * 8; - tapCnt--; - } - tapCnt = phaseLen & 7; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp16q(tapCnt); - - vecState = vldrhq_z_s16(ptr1, p0); - - vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides3, p0); - acc0 = vmlaldavaq(acc0, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides2, p0); - acc1 = vmlaldavaq(acc1, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0); - acc2 = vmlaldavaq(acc2, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0); - acc3 = vmlaldavaq(acc3, vecState, vecCoef); - } - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - acc2 = asrl(acc2, 15); - acc3 = asrl(acc3, 15); - - *pDst++ = (q15_t) __SSAT(acc0, 16); - *pDst++ = (q15_t) __SSAT(acc1, 16); - *pDst++ = (q15_t) __SSAT(acc2, 16); - *pDst++ = (q15_t) __SSAT(acc3, 16); - i -= 4; - } - else if (i >= 3) - { - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs + (i - 1U - 2); - - q63_t acc0 = 0LL; - q63_t acc1 = 0LL; - q63_t acc2 = 0LL; - - uint32_t tapCnt = phaseLen >> 3; - while (tapCnt > 0U) - { - vecState = vldrhq_s16(ptr1); - - vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides2); - acc0 = vmlaldavaq(acc0, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1); - acc1 = vmlaldavaq(acc1, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0); - acc2 = vmlaldavaq(acc2, vecState, vecCoef); - - ptr1 += 8; - ptr2 = ptr2 + S->L * 8; - tapCnt--; - } - tapCnt = phaseLen & 7; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp16q(tapCnt); - - vecState = vldrhq_z_s16(ptr1, p0); - - vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides2, p0); - acc0 = vmlaldavaq(acc0, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0); - acc1 = vmlaldavaq(acc1, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0); - acc2 = vmlaldavaq(acc2, vecState, vecCoef); - } - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - acc2 = asrl(acc2, 15); - - *pDst++ = (q15_t) __SSAT(acc0, 16);; - *pDst++ = (q15_t) __SSAT(acc1, 16);; - *pDst++ = (q15_t) __SSAT(acc2, 16);; - i -= 3; - } - else if (i >= 2) - { - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs + (i - 1U - 1); - - q63_t acc0 = 0LL; - q63_t acc1 = 0LL; - - uint32_t tapCnt = phaseLen >> 3; - while (tapCnt > 0U) - { - vecState = vldrhq_s16(ptr1); - - vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1); - acc0 = vmlaldavaq(acc0, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0); - acc1 = vmlaldavaq(acc1, vecState, vecCoef); - - ptr1 += 8; - ptr2 = ptr2 + S->L * 8; - tapCnt--; - } - tapCnt = phaseLen & 7; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp16q(tapCnt); - - vecState = vldrhq_z_s16(ptr1, p0); - - vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0); - acc0 = vmlaldavaq(acc0, vecState, vecCoef); - - vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0); - acc1 = vmlaldavaq(acc1, vecState, vecCoef); - } - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - - *pDst++ = (q15_t) __SSAT(acc0, 16); - *pDst++ = (q15_t) __SSAT(acc1, 16); - i -= 2; - } - else - { - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs + (i - 1U); - - q63_t acc0 = 0LL; - - uint32_t tapCnt = phaseLen >> 3; - while (tapCnt > 0U) - { - vecState = vldrhq_s16(ptr1); - vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0); - - acc0 = vmlaldavaq(acc0, vecState, vecCoef); - - ptr1 += 8; - ptr2 = ptr2 + S->L * 8; - tapCnt--; - } - tapCnt = phaseLen & 7; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp16q(tapCnt); - - vecState = vldrhq_z_s16(ptr1, p0); - vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0); - acc0 = vmlaldavaq(acc0, vecState, vecCoef); - } - - acc0 = asrl(acc0, 15); - *pDst++ = (q15_t) __SSAT(acc0, 16); - /* - * Decrement the loop counter - */ - i--; - } - } - /* - * Advance the state pointer by 1 - * * to process the next group of interpolation factor number samples - */ - pState = pState + 1; - /* - * Decrement the loop counter - */ - blkCnt--; - } - - /* - * Processing is complete. - * Now copy the last phaseLen - 1 samples to the satrt of the state buffer. - * This prepares the state buffer for the next function call. - */ - - /* - * Points to the start of the state buffer - */ - pStateCurnt = S->pState; - blkCnt = (phaseLen - 1U) >> 3; - while (blkCnt > 0U) - { - vstrhq_s16(pStateCurnt, vldrhq_s16(pState)); - pState += 8; - pStateCurnt += 8; - blkCnt--; - } - blkCnt = (phaseLen - 1U) & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vstrhq_p_s16(pStateCurnt, vldrhq_s16(pState), p0); - } -} -#else -void arm_fir_interpolate_q15( - const arm_fir_interpolate_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) - - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCur; /* Points to the current sample of the state */ - q15_t *ptr1; /* Temporary pointer for state buffer */ - const q15_t *ptr2; /* Temporary pointer for coefficient buffer */ - q63_t sum0; /* Accumulators */ - uint32_t i, blkCnt, tapCnt; /* Loop counters */ - uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - uint32_t j; - -#if defined (ARM_MATH_LOOPUNROLL) - q63_t acc0, acc1, acc2, acc3; - q15_t x0, x1, x2, x3; - q15_t c0, c1, c2, c3; -#endif - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (phaseLen - 1U); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Copy new input sample into the state buffer */ - *pStateCur++ = *pSrc++; - *pStateCur++ = *pSrc++; - *pStateCur++ = *pSrc++; - *pStateCur++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1U; - - /* Loop over the Interpolation factor. */ - i = (S->L); - - while (i > 0U) - { - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2U; - - x0 = *(ptr1++); - x1 = *(ptr1++); - x2 = *(ptr1++); - - while (tapCnt > 0U) - { - /* Read the input sample */ - x3 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - acc1 += (q63_t) x1 * c0; - acc2 += (q63_t) x2 * c0; - acc3 += (q63_t) x3 * c0; - - /* Read the coefficient */ - c1 = *(ptr2 + S->L); - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x1 * c1; - acc1 += (q63_t) x2 * c1; - acc2 += (q63_t) x3 * c1; - acc3 += (q63_t) x0 * c1; - - /* Read the coefficient */ - c2 = *(ptr2 + S->L * 2); - - /* Read the input sample */ - x1 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x2 * c2; - acc1 += (q63_t) x3 * c2; - acc2 += (q63_t) x0 * c2; - acc3 += (q63_t) x1 * c2; - - /* Read the coefficient */ - c3 = *(ptr2 + S->L * 3); - - /* Read the input sample */ - x2 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x3 * c3; - acc1 += (q63_t) x0 * c3; - acc2 += (q63_t) x1 * c3; - acc3 += (q63_t) x2 * c3; - - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += 4 * S->L; - - /* Decrement loop counter */ - tapCnt--; - } - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen % 0x4U; - - while (tapCnt > 0U) - { - /* Read the input sample */ - x3 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - acc1 += (q63_t) x1 * c0; - acc2 += (q63_t) x2 * c0; - acc3 += (q63_t) x3 * c0; - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* update states for next sample processing */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *(pDst ) = (q15_t) (__SSAT((acc0 >> 15), 16)); - *(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16)); - *(pDst + 2 * S->L) = (q15_t) (__SSAT((acc2 >> 15), 16)); - *(pDst + 3 * S->L) = (q15_t) (__SSAT((acc3 >> 15), 16)); - - pDst++; - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 4; - - pDst += S->L * 3; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy new input sample into the state buffer */ - *pStateCur++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1U; - - /* Loop over the Interpolation factor. */ - i = S->L; - while (i > 0U) - { - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. - Repeat until we've computed numTaps-(4*S->L) coefficients. */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - tapCnt = phaseLen >> 2U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum0 += (q63_t) *ptr1++ * *ptr2; - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - sum0 += (q63_t) *ptr1++ * *ptr2; - ptr2 += S->L; - - sum0 += (q63_t) *ptr1++ * *ptr2; - ptr2 += S->L; - - sum0 += (q63_t) *ptr1++ * *ptr2; - ptr2 += S->L; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - tapCnt = phaseLen % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = phaseLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum0 += (q63_t) *ptr1++ * *ptr2; - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Decrement loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last phaseLen - 1 samples to the satrt of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - tapCnt = (phaseLen - 1U) >> 2U; - - /* copy data */ - while (tapCnt > 0U) - { - write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); - write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - tapCnt = (phaseLen - 1U) % 0x04U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = (phaseLen - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -#else -/* alternate version for CM0_FAMILY */ - - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCur; /* Points to the current sample of the state */ - q15_t *ptr1; /* Temporary pointer for state buffer */ - const q15_t *ptr2; /* Temporary pointer for coefficient buffer */ - q63_t sum0; /* Accumulators */ - uint32_t i, blkCnt, tapCnt; /* Loop counters */ - uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (phaseLen - 1U); - - /* Total number of intput samples */ - blkCnt = blockSize; - - /* Loop over the blockSize. */ - while (blkCnt > 0U) - { - /* Copy new input sample into the state buffer */ - *pStateCur++ = *pSrc++; - - /* Loop over the Interpolation factor. */ - i = S->L; - - while (i > 0U) - { - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (i - 1U); - - /* Loop over the polyPhase length */ - tapCnt = phaseLen; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum0 += ((q63_t) *ptr1++ * *ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Store the result after converting to 1.15 format in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16)); - - /* Decrement loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last phaseLen - 1 samples to the start of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - - tapCnt = phaseLen - 1U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} -#endif /* defined(ARM_MATH_MVEI)*/ -/** - @} end of FIR_Interpolate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c deleted file mode 100644 index cf70b48..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c +++ /dev/null @@ -1,773 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_interpolate_q31.c - * Description: Q31 FIR interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Interpolate - @{ - */ - -/** - @brief Processing function for the Q31 FIR interpolator. - @param[in] S points to an instance of the Q31 FIR interpolator structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around rather than clip. - In order to avoid overflows completely the input signal must be scaled down by 1/(numTaps/L). - since numTaps/L additions occur per output sample. - After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_fir_interpolate_q31( - const arm_fir_interpolate_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - const q31_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - - uint32_t i, blkCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - uint32_t strides[4] = { 0, 1 * S->L, 2 * S->L, 3 * S->L }; - uint32x4_t vec_strides0 = vld1q_u32(strides); - uint32x4_t vec_strides1 = vec_strides0 + 1; - uint32x4_t vec_strides2 = vec_strides0 + 2; - uint32x4_t vec_strides3 = vec_strides0 + 3; - q31x4_t vecState, vecCoef; - - /* - * S->pState buffer contains previous frame (phaseLen - 1) samples - * pStateCurnt points to the location where the new input data should be written - */ - pStateCurnt = S->pState + ((q31_t) phaseLen - 1); - /* - * Total number of intput samples - */ - blkCnt = blockSize; - /* - * Loop over the blockSize. - */ - while (blkCnt > 0U) - { - /* - * Copy new input sample into the state buffer - */ - *pStateCurnt++ = *pSrc++; - /* - * Loop over the Interpolation factor. - */ - i = S->L; - while (i > 0U) - { - /* - * Initialize state pointer - */ - ptr1 = pState; - if (i >= 4) - { - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs + (i - 1 - 3U); - - q63_t acc0 = 0LL; - q63_t acc1 = 0LL; - q63_t acc2 = 0LL; - q63_t acc3 = 0LL; - - uint32_t tapCnt = phaseLen >> 2; - while (tapCnt > 0U) - { - vecState = vldrwq_s32(ptr1); - - vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides3); - acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides2); - acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides1); - acc2 = vrmlaldavhaq(acc2, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0); - acc3 = vrmlaldavhaq(acc3, vecState, vecCoef); - - ptr1 += 4; - ptr2 = ptr2 + S->L * 4; - tapCnt--; - } - tapCnt = phaseLen & 3; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - - vecState = vldrwq_z_s32(ptr1, p0); - - vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides3, p0); - acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides2, p0); - acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides1, p0); - acc2 = vrmlaldavhaq(acc2, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0); - acc3 = vrmlaldavhaq(acc3, vecState, vecCoef); - } - - acc0 = asrl(acc0, 31 - 8); - acc1 = asrl(acc1, 31 - 8); - acc2 = asrl(acc2, 31 - 8); - acc3 = asrl(acc3, 31 - 8); - - *pDst++ = (q31_t) acc0; - *pDst++ = (q31_t) acc1; - *pDst++ = (q31_t) acc2; - *pDst++ = (q31_t) acc3; - i -= 4; - } - else if (i >= 3) - { - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs + (i - 1U - 2); - - q63_t acc0 = 0LL; - q63_t acc1 = 0LL; - q63_t acc2 = 0LL; - - uint32_t tapCnt = phaseLen >> 2; - while (tapCnt > 0U) - { - vecState = vldrwq_s32(ptr1); - - vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides2); - acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides1); - acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0); - acc2 = vrmlaldavhaq(acc2, vecState, vecCoef); - - ptr1 += 4; - ptr2 = ptr2 + S->L * 4; - tapCnt--; - } - tapCnt = phaseLen & 3; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - - vecState = vldrwq_z_s32(ptr1, p0); - - vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides2, p0); - acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides1, p0); - acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0); - acc2 = vrmlaldavhaq(acc2, vecState, vecCoef); - } - - acc0 = asrl(acc0, 31 - 8); - acc1 = asrl(acc1, 31 - 8); - acc2 = asrl(acc2, 31 - 8); - - *pDst++ = (q31_t) acc0; - *pDst++ = (q31_t) acc1; - *pDst++ = (q31_t) acc2; - i -= 3; - } - else if (i >= 2) - { - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs + (i - 1U - 1); - - q63_t acc0 = 0LL; - q63_t acc1 = 0LL; - - uint32_t tapCnt = phaseLen >> 2; - while (tapCnt > 0U) - { - vecState = vldrwq_s32(ptr1); - - vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides1); - acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0); - acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); - - ptr1 += 4; - ptr2 = ptr2 + S->L * 4; - tapCnt--; - } - tapCnt = phaseLen & 3; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - - vecState = vldrwq_z_s32(ptr1, p0); - - vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides1, p0); - acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); - - vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0); - acc1 = vrmlaldavhaq(acc1, vecState, vecCoef); - } - - acc0 = asrl(acc0, 31 - 8); - acc1 = asrl(acc1, 31 - 8); - - *pDst++ = (q31_t) acc0; - *pDst++ = (q31_t) acc1; - i -= 2; - } - else - { - /* - * Initialize coefficient pointer - */ - ptr2 = pCoeffs + (i - 1U); - - q63_t acc0 = 0LL; - - uint32_t tapCnt = phaseLen >> 2; - while (tapCnt > 0U) - { - vecState = vldrwq_s32(ptr1); - vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0); - - acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); - - ptr1 += 4; - ptr2 = ptr2 + S->L * 4; - tapCnt--; - } - tapCnt = phaseLen & 3; - if (tapCnt > 0U) - { - mve_pred16_t p0 = vctp32q(tapCnt); - - vecState = vldrwq_z_s32(ptr1, p0); - vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0); - acc0 = vrmlaldavhaq(acc0, vecState, vecCoef); - } - - acc0 = asrl(acc0, 31 - 8); - *pDst++ = (q31_t) acc0; - /* - * Decrement the loop counter - */ - i--; - } - } - /* - * Advance the state pointer by 1 - * * to process the next group of interpolation factor number samples - */ - pState = pState + 1; - /* - * Decrement the loop counter - */ - blkCnt--; - } - - /* - * Processing is complete. - * ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer. - * ** This prepares the state buffer for the next function call. - */ - - /* - * Points to the start of the state buffer - */ - pStateCurnt = S->pState; - blkCnt = (phaseLen - 1U) >> 2; - while (blkCnt > 0U) - { - vst1q(pStateCurnt, vldrwq_s32(pState)); - pState += 4; - pStateCurnt += 4; - blkCnt--; - } - blkCnt = (phaseLen - 1U) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vstrwq_p_s32(pStateCurnt, vldrwq_s32(pState), p0); - } -} -#else -void arm_fir_interpolate_q31( - const arm_fir_interpolate_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) - - q31_t *pState = S->pState; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCur; /* Points to the current sample of the state */ - q31_t *ptr1; /* Temporary pointer for state buffer */ - const q31_t *ptr2; /* Temporary pointer for coefficient buffer */ - q63_t sum0; /* Accumulators */ - uint32_t i, blkCnt, tapCnt; /* Loop counters */ - uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - uint32_t j; - -#if defined (ARM_MATH_LOOPUNROLL) - q63_t acc0, acc1, acc2, acc3; - q31_t x0, x1, x2, x3; - q31_t c0, c1, c2, c3; -#endif - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (phaseLen - 1U); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Copy new input sample into the state buffer */ - *pStateCur++ = *pSrc++; - *pStateCur++ = *pSrc++; - *pStateCur++ = *pSrc++; - *pStateCur++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1U; - - /* Loop over the Interpolation factor. */ - i = (S->L); - - while (i > 0U) - { - /* Set accumulator to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. Unroll by a factor of 4. - Repeat until we've computed numTaps-(4*S->L) coefficients. */ - tapCnt = phaseLen >> 2U; - - x0 = *(ptr1++); - x1 = *(ptr1++); - x2 = *(ptr1++); - - while (tapCnt > 0U) - { - /* Read the input sample */ - x3 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - acc1 += (q63_t) x1 * c0; - acc2 += (q63_t) x2 * c0; - acc3 += (q63_t) x3 * c0; - - /* Read the coefficient */ - c1 = *(ptr2 + S->L); - - /* Read the input sample */ - x0 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x1 * c1; - acc1 += (q63_t) x2 * c1; - acc2 += (q63_t) x3 * c1; - acc3 += (q63_t) x0 * c1; - - /* Read the coefficient */ - c2 = *(ptr2 + S->L * 2); - - /* Read the input sample */ - x1 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x2 * c2; - acc1 += (q63_t) x3 * c2; - acc2 += (q63_t) x0 * c2; - acc3 += (q63_t) x1 * c2; - - /* Read the coefficient */ - c3 = *(ptr2 + S->L * 3); - - /* Read the input sample */ - x2 = *(ptr1++); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x3 * c3; - acc1 += (q63_t) x0 * c3; - acc2 += (q63_t) x1 * c3; - acc3 += (q63_t) x2 * c3; - - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += 4 * S->L; - - /* Decrement loop counter */ - tapCnt--; - } - - /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = phaseLen % 0x4U; - - while (tapCnt > 0U) - { - /* Read the input sample */ - x3 = *(ptr1++); - - /* Read the coefficient */ - c0 = *(ptr2); - - /* Perform the multiply-accumulate */ - acc0 += (q63_t) x0 * c0; - acc1 += (q63_t) x1 * c0; - acc2 += (q63_t) x2 * c0; - acc3 += (q63_t) x3 * c0; - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* update states for next sample processing */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *(pDst ) = (q31_t) (acc0 >> 31); - *(pDst + S->L) = (q31_t) (acc1 >> 31); - *(pDst + 2 * S->L) = (q31_t) (acc2 >> 31); - *(pDst + 3 * S->L) = (q31_t) (acc3 >> 31); - - pDst++; - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 4; - - pDst += S->L * 3; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy new input sample into the state buffer */ - *pStateCur++ = *pSrc++; - - /* Address modifier index of coefficient buffer */ - j = 1U; - - /* Loop over the Interpolation factor. */ - i = S->L; - while (i > 0U) - { - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (S->L - j); - - /* Loop over the polyPhase length. - Repeat until we've computed numTaps-(4*S->L) coefficients. */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - tapCnt = phaseLen >> 2U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum0 += (q63_t) *ptr1++ * *ptr2; - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - sum0 += (q63_t) *ptr1++ * *ptr2; - ptr2 += S->L; - - sum0 += (q63_t) *ptr1++ * *ptr2; - ptr2 += S->L; - - sum0 += (q63_t) *ptr1++ * *ptr2; - ptr2 += S->L; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - tapCnt = phaseLen % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = phaseLen; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum0 += (q63_t) *ptr1++ * *ptr2; - - /* Upsampling is done by stuffing L-1 zeros between each sample. - * So instead of multiplying zeros with coefficients, - * Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Decrement loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (sum0 >> 31); - - /* Increment the address modifier index of coefficient buffer */ - j++; - - /* Decrement the loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last phaseLen - 1 samples to the satrt of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - tapCnt = (phaseLen - 1U) >> 2U; - - /* copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - tapCnt = (phaseLen - 1U) % 0x04U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = (phaseLen - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -#else -/* alternate version for CM0_FAMILY */ - - q31_t *pState = S->pState; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCur; /* Points to the current sample of the state */ - q31_t *ptr1; /* Temporary pointer for state buffer */ - const q31_t *ptr2; /* Temporary pointer for coefficient buffer */ - q63_t sum0; /* Accumulators */ - uint32_t i, blkCnt, tapCnt; /* Loop counters */ - uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ - - /* S->pState buffer contains previous frame (phaseLen - 1) samples */ - /* pStateCur points to the location where the new input data should be written */ - pStateCur = S->pState + (phaseLen - 1U); - - /* Total number of intput samples */ - blkCnt = blockSize; - - /* Loop over the blockSize. */ - while (blkCnt > 0U) - { - /* Copy new input sample into the state buffer */ - *pStateCur++ = *pSrc++; - - /* Loop over the Interpolation factor. */ - i = S->L; - - while (i > 0U) - { - /* Set accumulator to zero */ - sum0 = 0; - - /* Initialize state pointer */ - ptr1 = pState; - - /* Initialize coefficient pointer */ - ptr2 = pCoeffs + (i - 1U); - - /* Loop over the polyPhase length */ - tapCnt = phaseLen; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum0 += ((q63_t) *ptr1++ * *ptr2); - - /* Increment the coefficient pointer by interpolation factor times. */ - ptr2 += S->L; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result is in the accumulator, store in the destination buffer. */ - *pDst++ = (q31_t) (sum0 >> 31); - - /* Decrement loop counter */ - i--; - } - - /* Advance the state pointer by 1 - * to process the next group of interpolation factor number samples */ - pState = pState + 1; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - ** Now copy the last phaseLen - 1 samples to the start of the state buffer. - ** This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCur = S->pState; - - tapCnt = phaseLen - 1U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} -#endif /* defined(ARM_MATH_MVEI) */ -/** - @} end of FIR_Interpolate group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c deleted file mode 100644 index d7ef6b6..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c +++ /dev/null @@ -1,453 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_lattice_f32.c - * Description: Processing function for floating-point FIR Lattice filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters - - This set of functions implements Finite Impulse Response (FIR) lattice filters - for Q15, Q31 and floating-point data types. Lattice filters are used in a - variety of adaptive filter applications. The filter structure is feedforward and - the net impulse response is finite length. - The functions operate on blocks - of input and output data and each call to the function processes - blockSize samples through the filter. pSrc and - pDst point to input and output arrays containing blockSize values. - - @par Algorithm - \image html FIRLattice.gif "Finite Impulse Response Lattice filter" - The following difference equation is implemented: - @par - 
-      f0[n] = g0[n] = x[n]
-      fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
-      gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
-      y[n] = fM[n]
-
- @par - pCoeffs points to tha array of reflection coefficients of size numStages. - Reflection Coefficients are stored in the following order. - @par - 
-      {k1, k2, ..., kM}
-
- where M is number of stages - @par - pState points to a state array of size numStages. - The state variables (g values) hold previous inputs and are stored in the following order. - 
-    {g0[n], g1[n], g2[n] ...gM-1[n]}
-
- The state variables are updated after each block of data is processed; the coefficients are untouched. - - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter. - Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - There are separate instance structure declarations for each of the 3 supported data types. - - @par Initialization Functions - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - numStages, pCoeffs, pState. Also set all of the values in pState to zero. - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - Set the values in the state buffer to zeros and then manually initialize the instance structure as follows: - 
-      arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
-      arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
-      arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
-
- @par - where numStages is the number of stages in the filter; - pState is the address of the state buffer; - pCoeffs is the address of the coefficient buffer. - - @par Fixed-Point Behavior - Care must be taken when using the fixed-point versions of the FIR Lattice filter functions. - In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - Refer to the function specific documentation below for usage guidelines. - */ - -/** - @addtogroup FIR_Lattice - @{ - */ - -/** - @brief Processing function for the floating-point FIR lattice filter. - @param[in] S points to an instance of the floating-point FIR lattice structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - -void arm_fir_lattice_f32( - const arm_fir_lattice_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *px; /* Temporary state pointer */ - const float32_t *pk; /* Temporary coefficient pointer */ - uint32_t numStages = S->numStages; /* Number of stages in the filter */ - uint32_t blkCnt, stageCnt; /* Loop counters */ - float32_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */ - -#if defined (ARM_MATH_LOOPUNROLL) - float32_t fcurr1, fnext1, gnext1; /* Temporary variables for second sample in loop unrolling */ - float32_t fcurr2, fnext2, gnext2; /* Temporary variables for third sample in loop unrolling */ - float32_t fcurr3, fnext3, gnext3; /* Temporary variables for fourth sample in loop unrolling */ -#endif - - gcurr0 = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Read two samples from input buffer */ - /* f0(n) = x(n) */ - fcurr0 = *pSrc++; - fcurr1 = *pSrc++; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pk = pCoeffs; - - /* Read g0(n-1) from state buffer */ - gcurr0 = *px; - - /* Process first sample for first tap */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext0 = (gcurr0 * (*pk)) + fcurr0; - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext0 = (fcurr0 * (*pk)) + gcurr0; - - /* Process second sample for first tap */ - fnext1 = (fcurr0 * (*pk)) + fcurr1; - gnext1 = (fcurr1 * (*pk)) + fcurr0; - - /* Read next two samples from input buffer */ - /* f0(n+2) = x(n+2) */ - fcurr2 = *pSrc++; - fcurr3 = *pSrc++; - - /* Process third sample for first tap */ - fnext2 = (fcurr1 * (*pk)) + fcurr2; - gnext2 = (fcurr2 * (*pk)) + fcurr1; - - /* Process fourth sample for first tap */ - fnext3 = (fcurr2 * (*pk )) + fcurr3; - gnext3 = (fcurr3 * (*pk++)) + fcurr2; - - /* Copy only last input sample into the state buffer - which will be used for next samples processing */ - *px++ = fcurr3; - - /* Update of f values for next coefficient set processing */ - fcurr0 = fnext0; - fcurr1 = fnext1; - fcurr2 = fnext2; - fcurr3 = fnext3; - - /* Loop unrolling. Process 4 taps at a time . */ - stageCnt = (numStages - 1U) >> 2U; - - /* Loop over the number of taps. Unroll by a factor of 4. - Repeat until we've computed numStages-3 coefficients. */ - - /* Process 2nd, 3rd, 4th and 5th taps ... here */ - while (stageCnt > 0U) - { - /* Read g1(n-1), g3(n-1) .... from state */ - gcurr0 = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext3; - - /* Process first sample for 2nd, 6th .. tap */ - /* Sample processing for K2, K6.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext0 = (gcurr0 * (*pk)) + fcurr0; - - /* Process second sample for 2nd, 6th .. tap */ - /* for sample 2 processing */ - fnext1 = (gnext0 * (*pk)) + fcurr1; - - /* Process third sample for 2nd, 6th .. tap */ - fnext2 = (gnext1 * (*pk)) + fcurr2; - - /* Process fourth sample for 2nd, 6th .. tap */ - fnext3 = (gnext2 * (*pk)) + fcurr3; - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - /* Calculation of state values for next stage */ - gnext3 = (fcurr3 * (*pk)) + gnext2; - - gnext2 = (fcurr2 * (*pk)) + gnext1; - - gnext1 = (fcurr1 * (*pk)) + gnext0; - - gnext0 = (fcurr0 * (*pk++)) + gcurr0; - - - /* Read g2(n-1), g4(n-1) .... from state */ - gcurr0 = *px; - - /* save g2(n) in state buffer */ - *px++ = gnext3; - - /* Sample processing for K3, K7.... */ - /* Process first sample for 3rd, 7th .. tap */ - /* f3(n) = f2(n) + K3 * g2(n-1) */ - fcurr0 = (gcurr0 * (*pk)) + fnext0; - - /* Process second sample for 3rd, 7th .. tap */ - fcurr1 = (gnext0 * (*pk)) + fnext1; - - /* Process third sample for 3rd, 7th .. tap */ - fcurr2 = (gnext1 * (*pk)) + fnext2; - - /* Process fourth sample for 3rd, 7th .. tap */ - fcurr3 = (gnext2 * (*pk)) + fnext3; - - /* Calculation of state values for next stage */ - /* g3(n) = f2(n) * K3 + g2(n-1) */ - gnext3 = (fnext3 * (*pk)) + gnext2; - - gnext2 = (fnext2 * (*pk)) + gnext1; - - gnext1 = (fnext1 * (*pk)) + gnext0; - - gnext0 = (fnext0 * (*pk++)) + gcurr0; - - - /* Read g1(n-1), g3(n-1) .... from state */ - gcurr0 = *px; - - /* save g3(n) in state buffer */ - *px++ = gnext3; - - /* Sample processing for K4, K8.... */ - /* Process first sample for 4th, 8th .. tap */ - /* f4(n) = f3(n) + K4 * g3(n-1) */ - fnext0 = (gcurr0 * (*pk)) + fcurr0; - - /* Process second sample for 4th, 8th .. tap */ - /* for sample 2 processing */ - fnext1 = (gnext0 * (*pk)) + fcurr1; - - /* Process third sample for 4th, 8th .. tap */ - fnext2 = (gnext1 * (*pk)) + fcurr2; - - /* Process fourth sample for 4th, 8th .. tap */ - fnext3 = (gnext2 * (*pk)) + fcurr3; - - /* g4(n) = f3(n) * K4 + g3(n-1) */ - /* Calculation of state values for next stage */ - gnext3 = (fcurr3 * (*pk)) + gnext2; - - gnext2 = (fcurr2 * (*pk)) + gnext1; - - gnext1 = (fcurr1 * (*pk)) + gnext0; - - gnext0 = (fcurr0 * (*pk++)) + gcurr0; - - - /* Read g2(n-1), g4(n-1) .... from state */ - gcurr0 = *px; - - /* save g4(n) in state buffer */ - *px++ = gnext3; - - /* Sample processing for K5, K9.... */ - /* Process first sample for 5th, 9th .. tap */ - /* f5(n) = f4(n) + K5 * g4(n-1) */ - fcurr0 = (gcurr0 * (*pk)) + fnext0; - - /* Process second sample for 5th, 9th .. tap */ - fcurr1 = (gnext0 * (*pk)) + fnext1; - - /* Process third sample for 5th, 9th .. tap */ - fcurr2 = (gnext1 * (*pk)) + fnext2; - - /* Process fourth sample for 5th, 9th .. tap */ - fcurr3 = (gnext2 * (*pk)) + fnext3; - - /* Calculation of state values for next stage */ - /* g5(n) = f4(n) * K5 + g4(n-1) */ - gnext3 = (fnext3 * (*pk)) + gnext2; - - gnext2 = (fnext2 * (*pk)) + gnext1; - - gnext1 = (fnext1 * (*pk)) + gnext0; - - gnext0 = (fnext0 * (*pk++)) + gcurr0; - - stageCnt--; - } - - /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */ - stageCnt = (numStages - 1U) % 0x4U; - - while (stageCnt > 0U) - { - gcurr0 = *px; - - /* save g value in state buffer */ - *px++ = gnext3; - - /* Process four samples for last three taps here */ - fnext0 = (gcurr0 * (*pk)) + fcurr0; - - fnext1 = (gnext0 * (*pk)) + fcurr1; - - fnext2 = (gnext1 * (*pk)) + fcurr2; - - fnext3 = (gnext2 * (*pk)) + fcurr3; - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext3 = (fcurr3 * (*pk)) + gnext2; - - gnext2 = (fcurr2 * (*pk)) + gnext1; - - gnext1 = (fcurr1 * (*pk)) + gnext0; - - gnext0 = (fcurr0 * (*pk++)) + gcurr0; - - /* Update of f values for next coefficient set processing */ - fcurr0 = fnext0; - fcurr1 = fnext1; - fcurr2 = fnext2; - fcurr3 = fnext3; - - stageCnt--; - } - - /* The results in the 4 accumulators, store in the destination buffer. */ - /* y(n) = fN(n) */ - *pDst++ = fcurr0; - *pDst++ = fcurr1; - *pDst++ = fcurr2; - *pDst++ = fcurr3; - - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* f0(n) = x(n) */ - fcurr0 = *pSrc++; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pk = pCoeffs; - - /* read g2(n) from state buffer */ - gcurr0 = *px; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext0 = (gcurr0 * (*pk)) + fcurr0; - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext0 = (fcurr0 * (*pk++)) + gcurr0; - - /* save g1(n) in state buffer */ - *px++ = fcurr0; - - /* f1(n) is saved in fcurr0 for next stage processing */ - fcurr0 = fnext0; - - stageCnt = (numStages - 1U); - - /* stage loop */ - while (stageCnt > 0U) - { - /* read g2(n) from state buffer */ - gcurr0 = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext0; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext0 = (gcurr0 * (*pk)) + fcurr0; - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext0 = (fcurr0 * (*pk++)) + gcurr0; - - /* f1(n) is saved in fcurr0 for next stage processing */ - fcurr0 = fnext0; - - stageCnt--; - } - - /* y(n) = fN(n) */ - *pDst++ = fcurr0; - - blkCnt--; - } - -} - -/** - @} end of FIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c deleted file mode 100644 index 821cfa9..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c +++ /dev/null @@ -1,70 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_lattice_init_f32.c - * Description: Floating-point FIR Lattice filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Lattice - @{ - */ - -/** - @brief Initialization function for the floating-point FIR lattice filter. - @param[in] S points to an instance of the floating-point FIR lattice structure - @param[in] numStages number of filter stages - @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages - @param[in] pState points to the state buffer. The array is of length numStages - @return none - */ - -void arm_fir_lattice_init_f32( - arm_fir_lattice_instance_f32 * S, - uint16_t numStages, - const float32_t * pCoeffs, - float32_t * pState) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always numStages */ - memset(pState, 0, (numStages) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c deleted file mode 100644 index 10621ba..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c +++ /dev/null @@ -1,70 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_lattice_init_q15.c - * Description: Q15 FIR Lattice filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Lattice - @{ - */ - -/** - @brief Initialization function for the Q15 FIR lattice filter. - @param[in] S points to an instance of the Q15 FIR lattice structure - @param[in] numStages number of filter stages - @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages - @param[in] pState points to the state buffer. The array is of length numStages - @return none - */ - -void arm_fir_lattice_init_q15( - arm_fir_lattice_instance_q15 * S, - uint16_t numStages, - const q15_t * pCoeffs, - q15_t * pState) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always numStages */ - memset(pState, 0, (numStages) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c deleted file mode 100644 index 11f06fd..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c +++ /dev/null @@ -1,70 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_lattice_init_q31.c - * Description: Q31 FIR lattice filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Lattice - @{ - */ - -/** - @brief Initialization function for the Q31 FIR lattice filter. - @param[in] S points to an instance of the Q31 FIR lattice structure - @param[in] numStages number of filter stages - @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages - @param[in] pState points to the state buffer. The array is of length numStages - @return none - */ - -void arm_fir_lattice_init_q31( - arm_fir_lattice_instance_q31 * S, - uint16_t numStages, - const q31_t * pCoeffs, - q31_t * pState) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always numStages */ - memset(pState, 0, (numStages) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c deleted file mode 100644 index bb79af2..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c +++ /dev/null @@ -1,506 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_lattice_q15.c - * Description: Q15 FIR lattice filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Lattice - @{ - */ - -/** - @brief Processing function for Q15 FIR lattice filter. - @param[in] S points to an instance of the Q15 FIR lattice structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - -void arm_fir_lattice_q15( - const arm_fir_lattice_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *px; /* Temporary state pointer */ - const q15_t *pk; /* Temporary coefficient pointer */ - uint32_t numStages = S->numStages; /* Number of stages in the filter */ - uint32_t blkCnt, stageCnt; /* Loop counters */ - q31_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */ - -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t fcurr1, fnext1, gnext1; /* Temporary variables for second sample in loop unrolling */ - q31_t fcurr2, fnext2, gnext2; /* Temporary variables for third sample in loop unrolling */ - q31_t fcurr3, fnext3, gnext3; /* Temporary variables for fourth sample in loop unrolling */ -#endif - - gcurr0 = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Read two samples from input buffer */ - /* f0(n) = x(n) */ - fcurr0 = *pSrc++; - fcurr1 = *pSrc++; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pk = pCoeffs; - - /* Read g0(n-1) from state buffer */ - gcurr0 = *px; - - /* Process first sample for first tap */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0; - fnext0 = __SSAT(fnext0, 16); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext0 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + gcurr0; - gnext0 = __SSAT(gnext0, 16); - - /* Process second sample for first tap */ - fnext1 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + fcurr1; - fnext1 = __SSAT(fnext1, 16); - gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr0; - gnext1 = __SSAT(gnext1, 16); - - /* Read next two samples from input buffer */ - /* f0(n+2) = x(n+2) */ - fcurr2 = *pSrc++; - fcurr3 = *pSrc++; - - /* Process third sample for first tap */ - fnext2 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr2; - fnext2 = __SSAT(fnext2, 16); - gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + fcurr1; - gnext2 = __SSAT(gnext2, 16); - - /* Process fourth sample for first tap */ - fnext3 = (q31_t) ((fcurr2 * (*pk )) >> 15U) + fcurr3; - fnext3 = __SSAT(fnext3, 16); - gnext3 = (q31_t) ((fcurr3 * (*pk++)) >> 15U) + fcurr2; - gnext3 = __SSAT(gnext3, 16); - - /* Copy only last input sample into the state buffer - which will be used for next samples processing */ - *px++ = (q15_t) fcurr3; - - /* Update of f values for next coefficient set processing */ - fcurr0 = fnext0; - fcurr1 = fnext1; - fcurr2 = fnext2; - fcurr3 = fnext3; - - /* Loop unrolling. Process 4 taps at a time . */ - stageCnt = (numStages - 1U) >> 2U; - - /* Loop over the number of taps. Unroll by a factor of 4. - Repeat until we've computed numStages-3 coefficients. */ - - /* Process 2nd, 3rd, 4th and 5th taps ... here */ - while (stageCnt > 0U) - { - /* Read g1(n-1), g3(n-1) .... from state */ - gcurr0 = *px; - - /* save g1(n) in state buffer */ - *px++ = (q15_t) gnext3; - - /* Process first sample for 2nd, 6th .. tap */ - /* Sample processing for K2, K6.... */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0; - fnext0 = __SSAT(fnext0, 16); - - /* Process second sample for 2nd, 6th .. tap */ - /* for sample 2 processing */ - fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1; - fnext1 = __SSAT(fnext1, 16); - - /* Process third sample for 2nd, 6th .. tap */ - fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2; - fnext2 = __SSAT(fnext2, 16); - - /* Process fourth sample for 2nd, 6th .. tap */ - fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3; - fnext3 = __SSAT(fnext3, 16); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - /* Calculation of state values for next stage */ - gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2; - gnext3 = __SSAT(gnext3, 16); - - gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1; - gnext2 = __SSAT(gnext2, 16); - - gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0; - gnext1 = __SSAT(gnext1, 16); - - gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0; - gnext0 = __SSAT(gnext0, 16); - - - /* Read g2(n-1), g4(n-1) .... from state */ - gcurr0 = *px; - - /* save g1(n) in state buffer */ - *px++ = (q15_t) gnext3; - - /* Sample processing for K3, K7.... */ - /* Process first sample for 3rd, 7th .. tap */ - /* f3(n) = f2(n) + K3 * g2(n-1) */ - fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0; - fcurr0 = __SSAT(fcurr0, 16); - - /* Process second sample for 3rd, 7th .. tap */ - fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1; - fcurr1 = __SSAT(fcurr1, 16); - - /* Process third sample for 3rd, 7th .. tap */ - fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2; - fcurr2 = __SSAT(fcurr2, 16); - - /* Process fourth sample for 3rd, 7th .. tap */ - fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3; - fcurr3 = __SSAT(fcurr3, 16); - - /* Calculation of state values for next stage */ - /* g3(n) = f2(n) * K3 + g2(n-1) */ - gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2; - gnext3 = __SSAT(gnext3, 16); - - gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1; - gnext2 = __SSAT(gnext2, 16); - - gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0; - gnext1 = __SSAT(gnext1, 16); - - gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0; - gnext0 = __SSAT(gnext0, 16); - - /* Read g1(n-1), g3(n-1) .... from state */ - gcurr0 = *px; - - /* save g1(n) in state buffer */ - *px++ = (q15_t) gnext3; - - /* Sample processing for K4, K8.... */ - /* Process first sample for 4th, 8th .. tap */ - /* f4(n) = f3(n) + K4 * g3(n-1) */ - fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0; - fnext0 = __SSAT(fnext0, 16); - - /* Process second sample for 4th, 8th .. tap */ - /* for sample 2 processing */ - fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1; - fnext1 = __SSAT(fnext1, 16); - - /* Process third sample for 4th, 8th .. tap */ - fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2; - fnext2 = __SSAT(fnext2, 16); - - /* Process fourth sample for 4th, 8th .. tap */ - fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3; - fnext3 = __SSAT(fnext3, 16); - - /* g4(n) = f3(n) * K4 + g3(n-1) */ - /* Calculation of state values for next stage */ - gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2; - gnext3 = __SSAT(gnext3, 16); - - gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1; - gnext2 = __SSAT(gnext2, 16); - - gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0; - gnext1 = __SSAT(gnext1, 16); - - gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0; - gnext0 = __SSAT(gnext0, 16); - - /* Read g2(n-1), g4(n-1) .... from state */ - gcurr0 = *px; - - /* save g4(n) in state buffer */ - *px++ = (q15_t) gnext3; - - /* Sample processing for K5, K9.... */ - /* Process first sample for 5th, 9th .. tap */ - /* f5(n) = f4(n) + K5 * g4(n-1) */ - fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0; - fcurr0 = __SSAT(fcurr0, 16); - - /* Process second sample for 5th, 9th .. tap */ - fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1; - fcurr1 = __SSAT(fcurr1, 16); - - /* Process third sample for 5th, 9th .. tap */ - fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2; - fcurr2 = __SSAT(fcurr2, 16); - - /* Process fourth sample for 5th, 9th .. tap */ - fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3; - fcurr3 = __SSAT(fcurr3, 16); - - /* Calculation of state values for next stage */ - /* g5(n) = f4(n) * K5 + g4(n-1) */ - gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2; - gnext3 = __SSAT(gnext3, 16); - - gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1; - gnext2 = __SSAT(gnext2, 16); - - gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0; - gnext1 = __SSAT(gnext1, 16); - - gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0; - gnext0 = __SSAT(gnext0, 16); - - stageCnt--; - } - - /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */ - stageCnt = (numStages - 1U) % 0x4U; - - while (stageCnt > 0U) - { - gcurr0 = *px; - - /* save g value in state buffer */ - *px++ = (q15_t) gnext3; - - /* Process four samples for last three taps here */ - fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0; - fnext0 = __SSAT(fnext0, 16); - - fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1; - fnext1 = __SSAT(fnext1, 16); - - fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2; - fnext2 = __SSAT(fnext2, 16); - - fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3; - fnext3 = __SSAT(fnext3, 16); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2; - gnext3 = __SSAT(gnext3, 16); - - gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1; - gnext2 = __SSAT(gnext2, 16); - - gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0; - gnext1 = __SSAT(gnext1, 16); - - gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0; - gnext0 = __SSAT(gnext0, 16); - - /* Update of f values for next coefficient set processing */ - fcurr0 = fnext0; - fcurr1 = fnext1; - fcurr2 = fnext2; - fcurr3 = fnext3; - - stageCnt--; - } - - /* The results in the 4 accumulators, store in the destination buffer. */ - /* y(n) = fN(n) */ - -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pDst, __PKHBT(fcurr0, fcurr1, 16)); - write_q15x2_ia (&pDst, __PKHBT(fcurr2, fcurr3, 16)); -#else - write_q15x2_ia (&pDst, __PKHBT(fcurr1, fcurr0, 16)); - write_q15x2_ia (&pDst, __PKHBT(fcurr3, fcurr2, 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* f0(n) = x(n) */ - fcurr0 = *pSrc++; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pk = pCoeffs; - - /* read g2(n) from state buffer */ - gcurr0 = *px; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0; - fnext0 = __SSAT(fnext0, 16); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0; - gnext0 = __SSAT(gnext0, 16); - - /* save g1(n) in state buffer */ - *px++ = (q15_t) fcurr0; - - /* f1(n) is saved in fcurr0 for next stage processing */ - fcurr0 = fnext0; - - stageCnt = (numStages - 1U); - - /* stage loop */ - while (stageCnt > 0U) - { - /* read g2(n) from state buffer */ - gcurr0 = *px; - - /* save g1(n) in state buffer */ - *px++ = (q15_t) gnext0; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0; - fnext0 = __SSAT(fnext0, 16); - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0; - gnext0 = __SSAT(gnext0, 16); - - /* f1(n) is saved in fcurr0 for next stage processing */ - fcurr0 = fnext0; - - stageCnt--; - } - - /* y(n) = fN(n) */ - *pDst++ = __SSAT(fcurr0, 16); - - blkCnt--; - } - -#else -/* alternate version for CM0_FAMILY */ - - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* f0(n) = x(n) */ - fcurr0 = *pSrc++; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pk = pCoeffs; - - /* read g0(n-1) from state buffer */ - gcurr0 = *px; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0; - fnext0 = __SSAT(fnext, 16); - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0; - gnext0 = __SSAT(gnext0, 16); - - /* save f0(n) in state buffer */ - *px++ = (q15_t) fcurr0; - - /* f1(n) is saved in fcurr for next stage processing */ - fcurr0 = fnext0; - - stageCnt = (numStages - 1U); - - /* stage loop */ - while (stageCnt > 0U) - { - /* read g1(n-1) from state buffer */ - gcurr0 = *px; - - /* save g0(n-1) in state buffer */ - *px++ = (q15_t) gnext0; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0; - fnext0 = __SSAT(fnext0, 16); - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0; - gnext0 = __SSAT(gnext0, 16); - - /* f1(n) is saved in fcurr0 for next stage processing */ - fcurr0 = fnext0; - - stageCnt--; - } - - /* y(n) = fN(n) */ - *pDst++ = __SSAT(fcurr0, 16); - - blkCnt--; - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} - -/** - @} end of FIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c deleted file mode 100644 index 24a1980..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c +++ /dev/null @@ -1,505 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_lattice_q31.c - * Description: Q31 FIR lattice filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Lattice - @{ - */ - -/** - @brief Processing function for the Q31 FIR lattice filter. - @param[in] S points to an instance of the Q31 FIR lattice structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits. - */ - -void arm_fir_lattice_q31( - const arm_fir_lattice_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *px; /* Temporary state pointer */ - const q31_t *pk; /* Temporary coefficient pointer */ - uint32_t numStages = S->numStages; /* Number of stages in the filter */ - uint32_t blkCnt, stageCnt; /* Loop counters */ - q31_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */ - -#if (1) -//#if !defined(ARM_MATH_CM0_FAMILY) - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t fcurr1, fnext1, gnext1; /* Temporary variables for second sample in loop unrolling */ - q31_t fcurr2, fnext2, gnext2; /* Temporary variables for third sample in loop unrolling */ - q31_t fcurr3, fnext3, gnext3; /* Temporary variables for fourth sample in loop unrolling */ -#endif - - gcurr0 = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Read two samples from input buffer */ - /* f0(n) = x(n) */ - fcurr0 = *pSrc++; - fcurr1 = *pSrc++; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pk = pCoeffs; - - /* Read g0(n-1) from state buffer */ - gcurr0 = *px; - - /* Process first sample for first tap */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); - fnext0 = (fnext0 << 1U) + fcurr0; - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U); - gnext0 = (gnext0 << 1U) + gcurr0; - - /* Process second sample for first tap */ - fnext1 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U); - fnext1 = (fnext1 << 1U) + fcurr1; - gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U); - gnext1 = (gnext1 << 1U) + fcurr0; - - /* Read next two samples from input buffer */ - /* f0(n+2) = x(n+2) */ - fcurr2 = *pSrc++; - fcurr3 = *pSrc++; - - /* Process third sample for first tap */ - fnext2 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U); - fnext2 = (fnext2 << 1U) + fcurr2; - gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U); - gnext2 = (gnext2 << 1U) + fcurr1; - - /* Process fourth sample for first tap */ - fnext3 = (q31_t) (((q63_t) fcurr2 * (*pk )) >> 32U); - fnext3 = (fnext3 << 1U) + fcurr3; - gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk++)) >> 32U); - gnext3 = (gnext3 << 1U) + fcurr2; - - /* Copy only last input sample into the state buffer - which will be used for next samples processing */ - *px++ = fcurr3; - - /* Update of f values for next coefficient set processing */ - fcurr0 = fnext0; - fcurr1 = fnext1; - fcurr2 = fnext2; - fcurr3 = fnext3; - - /* Loop unrolling. Process 4 taps at a time . */ - stageCnt = (numStages - 1U) >> 2U; - - /* Loop over the number of taps. Unroll by a factor of 4. - Repeat until we've computed numStages-3 coefficients. */ - - /* Process 2nd, 3rd, 4th and 5th taps ... here */ - while (stageCnt > 0U) - { - /* Read g1(n-1), g3(n-1) .... from state */ - gcurr0 = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext3; - - /* Process first sample for 2nd, 6th .. tap */ - /* Sample processing for K2, K6.... */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); - fnext0 = (fnext0 << 1U) + fcurr0; - - /* Process second sample for 2nd, 6th .. tap */ - /* for sample 2 processing */ - fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U); - fnext1 = (fnext1 << 1U) + fcurr1; - - /* Process third sample for 2nd, 6th .. tap */ - fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U); - fnext2 = (fnext2 << 1U) + fcurr2; - - /* Process fourth sample for 2nd, 6th .. tap */ - fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U); - fnext3 = (fnext3 << 1U) + fcurr3; - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - /* Calculation of state values for next stage */ - gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U); - gnext3 = (gnext3 << 1U) + gnext2; - - gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U); - gnext2 = (gnext2 << 1U) + gnext1; - - gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U); - gnext1 = (gnext1 << 1U) + gnext0; - - gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); - gnext0 = (gnext0 << 1U) + gcurr0; - - - /* Read g2(n-1), g4(n-1) .... from state */ - gcurr0 = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext3; - - /* Sample processing for K3, K7.... */ - /* Process first sample for 3rd, 7th .. tap */ - /* f3(n) = f2(n) + K3 * g2(n-1) */ - fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); - fcurr0 = (fcurr0 << 1U) + fnext0; - - /* Process second sample for 3rd, 7th .. tap */ - fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U); - fcurr1 = (fcurr1 << 1U) + fnext1; - - /* Process third sample for 3rd, 7th .. tap */ - fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U); - fcurr2 = (fcurr2 << 1U) + fnext2; - - /* Process fourth sample for 3rd, 7th .. tap */ - fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U); - fcurr3 = (fcurr3 << 1U) + fnext3; - - /* Calculation of state values for next stage */ - /* g3(n) = f2(n) * K3 + g2(n-1) */ - gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U); - gnext3 = (gnext3 << 1U) + gnext2; - - gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U); - gnext2 = (gnext2 << 1U) + gnext1; - - gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U); - gnext1 = (gnext1 << 1U) + gnext0; - - gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U); - gnext0 = (gnext0 << 1U) + gcurr0; - - /* Read g1(n-1), g3(n-1) .... from state */ - gcurr0 = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext3; - - /* Sample processing for K4, K8.... */ - /* Process first sample for 4th, 8th .. tap */ - /* f4(n) = f3(n) + K4 * g3(n-1) */ - fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); - fnext0 = (fnext0 << 1U) + fcurr0; - - /* Process second sample for 4th, 8th .. tap */ - /* for sample 2 processing */ - fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U); - fnext1 = (fnext1 << 1U) + fcurr1; - - /* Process third sample for 4th, 8th .. tap */ - fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U); - fnext2 = (fnext2 << 1U) + fcurr2; - - /* Process fourth sample for 4th, 8th .. tap */ - fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U); - fnext3 = (fnext3 << 1U) + fcurr3; - - /* g4(n) = f3(n) * K4 + g3(n-1) */ - /* Calculation of state values for next stage */ - gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U); - gnext3 = (gnext3 << 1U) + gnext2; - - gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U); - gnext2 = (gnext2 << 1U) + gnext1; - - gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U); - gnext1 = (gnext1 << 1U) + gnext0; - - gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); - gnext0 = (gnext0 << 1U) + gcurr0; - - /* Read g2(n-1), g4(n-1) .... from state */ - gcurr0 = *px; - - /* save g4(n) in state buffer */ - *px++ = gnext3; - - /* Sample processing for K5, K9.... */ - /* Process first sample for 5th, 9th .. tap */ - /* f5(n) = f4(n) + K5 * g4(n-1) */ - fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); - fcurr0 = (fcurr0 << 1U) + fnext0; - - /* Process second sample for 5th, 9th .. tap */ - fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U); - fcurr1 = (fcurr1 << 1U) + fnext1; - - /* Process third sample for 5th, 9th .. tap */ - fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U); - fcurr2 = (fcurr2 << 1U) + fnext2; - - /* Process fourth sample for 5th, 9th .. tap */ - fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U); - fcurr3 = (fcurr3 << 1U) + fnext3; - - /* Calculation of state values for next stage */ - /* g5(n) = f4(n) * K5 + g4(n-1) */ - gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U); - gnext3 = (gnext3 << 1U) + gnext2; - - gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U); - gnext2 = (gnext2 << 1U) + gnext1; - - gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U); - gnext1 = (gnext1 << 1U) + gnext0; - - gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U); - gnext0 = (gnext0 << 1U) + gcurr0; - - stageCnt--; - } - - /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */ - stageCnt = (numStages - 1U) % 0x4U; - - while (stageCnt > 0U) - { - gcurr0 = *px; - - /* save g value in state buffer */ - *px++ = gnext3; - - /* Process four samples for last three taps here */ - fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); - fnext0 = (fnext0 << 1U) + fcurr0; - - fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U); - fnext1 = (fnext1 << 1U) + fcurr1; - - fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U); - fnext2 = (fnext2 << 1U) + fcurr2; - - fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U); - fnext3 = (fnext3 << 1U) + fcurr3; - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U); - gnext3 = (gnext3 << 1U) + gnext2; - - gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U); - gnext2 = (gnext2 << 1U) + gnext1; - - gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U); - gnext1 = (gnext1 << 1U) + gnext0; - - gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); - gnext0 = (gnext0 << 1U) + gcurr0; - - /* Update of f values for next coefficient set processing */ - fcurr0 = fnext0; - fcurr1 = fnext1; - fcurr2 = fnext2; - fcurr3 = fnext3; - - stageCnt--; - } - - /* The results in the 4 accumulators, store in the destination buffer. */ - /* y(n) = fN(n) */ - *pDst++ = fcurr0; - *pDst++ = fcurr1; - *pDst++ = fcurr2; - *pDst++ = fcurr3; - - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* f0(n) = x(n) */ - fcurr0 = *pSrc++; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pk = pCoeffs; - - /* read g2(n) from state buffer */ - gcurr0 = *px; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); - fnext0 = (fnext0 << 1U) + fcurr0; - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); - gnext0 = (gnext0 << 1U) + gcurr0; - - /* save g1(n) in state buffer */ - *px++ = fcurr0; - - /* f1(n) is saved in fcurr0 for next stage processing */ - fcurr0 = fnext0; - - stageCnt = (numStages - 1U); - - /* stage loop */ - while (stageCnt > 0U) - { - /* read g2(n) from state buffer */ - gcurr0 = *px; - - /* save g1(n) in state buffer */ - *px++ = gnext0; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); - fnext0 = (fnext0 << 1U) + fcurr0; - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); - gnext0 = (gnext0 << 1U) + gcurr0; - - /* f1(n) is saved in fcurr0 for next stage processing */ - fcurr0 = fnext0; - - stageCnt--; - } - - /* y(n) = fN(n) */ - *pDst++ = fcurr0; - - blkCnt--; - } - -#else -/* alternate version for CM0_FAMILY */ - - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* f0(n) = x(n) */ - fcurr0 = *pSrc++; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coeff pointer */ - pk = pCoeffs; - - /* read g0(n-1) from state buffer */ - gcurr0 = *px; - - /* for sample 1 processing */ - /* f1(n) = f0(n) + K1 * g0(n-1) */ - fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); - fnext0 = (fnext << 1U) + fcurr0; - - /* g1(n) = f0(n) * K1 + g0(n-1) */ - gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); - gnext0 = (gnext0 << 1U) + gcurr0; - - /* save f0(n) in state buffer */ - *px++ = fcurr0; - - /* f1(n) is saved in fcurr for next stage processing */ - fcurr0 = fnext0; - - stageCnt = (numStages - 1U); - - /* stage loop */ - while (stageCnt > 0U) - { - /* read g1(n-1) from state buffer */ - gcurr0 = *px; - - /* save g0(n-1) in state buffer */ - *px++ = gnext0; - - /* Sample processing for K2, K3.... */ - /* f2(n) = f1(n) + K2 * g1(n-1) */ - fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U); - fnext0 = (fnext0 << 1U) + fcurr0; - - /* g2(n) = f1(n) * K2 + g1(n-1) */ - gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U); - gnext0 = (gnext0 << 1U) + gcurr0; - - /* f1(n) is saved in fcurr0 for next stage processing */ - fcurr0 = fnext0; - - stageCnt--; - } - - /* y(n) = fN(n) */ - *pDst++ = fcurr0; - - blkCnt--; - } - -#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */ - -} - -/** - @} end of FIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c deleted file mode 100644 index 06227da..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c +++ /dev/null @@ -1,732 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_q15.c - * Description: Q15 FIR filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Processing function for the Q15 FIR filter. - @param[in] S points to an instance of the Q15 FIR filter structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - Lastly, the accumulator is saturated to yield a result in 1.15 format. - - @remark - Refer to \ref arm_fir_fast_q15() for a faster but less precise implementation of this function. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define MVE_ASRL_SAT16(acc, shift) ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff) - - -#define FIR_Q15_CORE(pOutput, nbAcc, nbVecTaps, pSample, vecCoeffs) \ - for (int j = 0; j < nbAcc; j++) { \ - const q15_t *pSmp = &pSample[j]; \ - q63_t acc[4]; \ - \ - acc[j] = 0; \ - for (int i = 0; i < nbVecTaps; i++) { \ - vecIn0 = vld1q(pSmp + 8 * i); \ - acc[j] = vmlaldavaq(acc[j], vecIn0, vecCoeffs[i]); \ - } \ - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc[j], 15); \ - } - -#define FIR_Q15_MAIN_CORE() \ -{ \ - q15_t *pState = S->pState; /* State pointer */ \ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ \ - q15_t *pStateCur; /* Points to the current sample of the state */ \ - const q15_t *pSamples; /* Temporary pointer to the sample buffer */ \ - q15_t *pOutput; /* Temporary pointer to the output buffer */ \ - const q15_t *pTempSrc; /* Temporary pointer to the source data */ \ - q15_t *pTempDest; /* Temporary pointer to the destination buffer */\ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */\ - int32_t blkCnt; \ - q15x8_t vecIn0; \ - \ - /* \ - * load coefs \ - */ \ - q15x8_t vecCoeffs[NBVECTAPS]; \ - \ - for (int i = 0; i < NBVECTAPS; i++) \ - vecCoeffs[i] = vldrhq_s16(pCoeffs + 8 * i); \ - \ - /* \ - * pState points to state array which contains previous frame (numTaps - 1) samples \ - * pStateCur points to the location where the new input data should be written \ - */ \ - pStateCur = &(pState[(numTaps - 1u)]); \ - pTempSrc = pSrc; \ - pSamples = pState; \ - pOutput = pDst; \ - \ - blkCnt = blockSize >> 2; \ - while (blkCnt > 0) { \ - /* \ - * Save 4 input samples in the history buffer \ - */ \ - vstrhq_s32(pStateCur, vldrhq_s32(pTempSrc)); \ - pStateCur += 4; \ - pTempSrc += 4; \ - \ - FIR_Q15_CORE(pOutput, 4, NBVECTAPS, pSamples, vecCoeffs); \ - pSamples += 4; \ - \ - blkCnt--; \ - } \ - \ - /* tail */ \ - int32_t residual = blockSize & 3; \ - \ - for (int i = 0; i < residual; i++) \ - *pStateCur++ = *pTempSrc++; \ - \ - FIR_Q15_CORE(pOutput, residual, NBVECTAPS, pSamples, vecCoeffs); \ - \ - /* \ - * Copy the samples back into the history buffer start \ - */ \ - pTempSrc = &pState[blockSize]; \ - pTempDest = pState; \ - \ - /* current compiler limitation */ \ - blkCnt = (numTaps - 1) >> 3; \ - while (blkCnt > 0) \ - { \ - vstrhq_s16(pTempDest, vldrhq_s16(pTempSrc)); \ - pTempSrc += 8; \ - pTempDest += 8; \ - blkCnt--; \ - } \ - blkCnt = (numTaps - 1) & 7; \ - if (blkCnt > 0) \ - { \ - mve_pred16_t p = vctp16q(blkCnt); \ - vstrhq_p_s16(pTempDest, vldrhq_z_s16(pTempSrc, p), p); \ - } \ -} - -static void arm_fir_q15_25_32_mve(const arm_fir_instance_q15 * S, - const q15_t * __restrict pSrc, - q15_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 32 - #define NBVECTAPS (NBTAPS / 8) - FIR_Q15_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - -static void arm_fir_q15_17_24_mve(const arm_fir_instance_q15 * S, - const q15_t * __restrict pSrc, - q15_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 24 - #define NBVECTAPS (NBTAPS / 8) - FIR_Q15_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - - -static void arm_fir_q15_9_16_mve(const arm_fir_instance_q15 * S, - const q15_t * __restrict pSrc, - q15_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 16 - #define NBVECTAPS (NBTAPS / 8) - FIR_Q15_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - -static void arm_fir_q15_1_8_mve(const arm_fir_instance_q15 * S, - const q15_t * __restrict pSrc, - q15_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 8 - #define NBVECTAPS (NBTAPS / 8) - FIR_Q15_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - - -void arm_fir_q15( - const arm_fir_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCur; /* Points to the current sample of the state */ - const q15_t *pSamples; /* Temporary pointer to the sample buffer */ - q15_t *pOutput; /* Temporary pointer to the output buffer */ - const q15_t *pTempSrc; /* Temporary pointer to the source data */ - q15_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t blkCnt; - q15x8_t vecIn0; - uint32_t tapsBlkCnt = (numTaps + 7) / 8; - q63_t acc0, acc1, acc2, acc3; - - -int32_t nbTaps = (numTaps + 7) >> 3; - -switch(nbTaps) { - - case 1: - arm_fir_q15_1_8_mve(S, pSrc, pDst, blockSize); - return; - case 2: - arm_fir_q15_9_16_mve(S, pSrc, pDst, blockSize); - return; - case 3: - arm_fir_q15_17_24_mve(S, pSrc, pDst, blockSize); - return; - case 4: - arm_fir_q15_25_32_mve(S, pSrc, pDst, blockSize); - return; - } - /* - * pState points to state array which contains previous frame (numTaps - 1) samples - * pStateCur points to the location where the new input data should be written - */ - pStateCur = &(pState[(numTaps - 1u)]); - pTempSrc = pSrc; - pSamples = pState; - pOutput = pDst; - blkCnt = blockSize >> 2; - - while (blkCnt > 0U) - { - const q15_t *pCoeffsTmp = pCoeffs; - const q15_t *pSamplesTmp = pSamples; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - acc3 = 0LL; - - /* - * Save 8 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 8; - pTempSrc += 8; - - int i = tapsBlkCnt; - while (i > 0) - { - /* - * load 8 coefs - */ - q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[1]); - acc1 = vmlaldavaq(acc1, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[2]); - acc2 = vmlaldavaq(acc2, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[3]); - acc3 = vmlaldavaq(acc3, vecIn0, vecCoeffs); - - pSamplesTmp += 8; - pCoeffsTmp += 8; - /* - * Decrement the taps block loop counter - */ - i--; - } - - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15); - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc2, 15); - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc3, 15); - - pSamples += 4; - /* - * Decrement the sample block loop counter - */ - blkCnt--; - } - - uint32_t residual = blockSize & 3; - switch (residual) - { - case 3: - { - const q15_t *pCoeffsTmp = pCoeffs; - const q15_t *pSamplesTmp = pSamples; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - - /* - * Save 8 input samples in the history buffer - */ - *(q15x8_t *) pStateCur = *(q15x8_t *) pTempSrc; - pStateCur += 8; - pTempSrc += 8; - - int i = tapsBlkCnt; - while (i > 0) - { - /* - * load 8 coefs - */ - q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[2]); - acc1 = vmlaldavaq(acc1, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[4]); - acc2 = vmlaldavaq(acc2, vecIn0, vecCoeffs); - - pSamplesTmp += 8; - pCoeffsTmp += 8; - /* - * Decrement the taps block loop counter - */ - i--; - } - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - acc2 = asrl(acc2, 15); - - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15); - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc2, 15); - } - break; - - case 2: - { - const q15_t *pCoeffsTmp = pCoeffs; - const q15_t *pSamplesTmp = pSamples; - - acc0 = 0LL; - acc1 = 0LL; - /* - * Save 8 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 8; - pTempSrc += 8; - - int i = tapsBlkCnt; - while (i > 0) - { - /* - * load 8 coefs - */ - q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[2]); - acc1 = vmlaldavaq(acc1, vecIn0, vecCoeffs); - - pSamplesTmp += 8; - pCoeffsTmp += 8; - /* - * Decrement the taps block loop counter - */ - i--; - } - - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15); - } - break; - - case 1: - { - const q15_t *pCoeffsTmp = pCoeffs; - const q15_t *pSamplesTmp = pSamples; - - acc0 = 0LL; - - /* - * Save 8 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 8; - pTempSrc += 8; - - int i = tapsBlkCnt; - while (i > 0) - { - /* - * load 8 coefs - */ - q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs); - - pSamplesTmp += 8; - pCoeffsTmp += 8; - /* - * Decrement the taps block loop counter - */ - i--; - } - - *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); - } - break; - } - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pState[blockSize]; - pTempDest = pState; - - blkCnt = numTaps >> 3; - while (blkCnt > 0U) - { - vst1q(pTempDest, vld1q(pTempSrc)); - pTempSrc += 8; - pTempDest += 8; - blkCnt--; - } - blkCnt = numTaps & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vstrhq_p_s16(pTempDest, vld1q(pTempSrc), p0); - } -} - -#else -void arm_fir_q15( - const arm_fir_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px; /* Temporary pointer for state buffer */ - const q15_t *pb; /* Temporary pointer for coefficient buffer */ - q63_t acc0; /* Accumulators */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q63_t acc1, acc2, acc3; /* Accumulators */ - q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coefficient values */ -#endif - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Copy 4 new input samples into the state buffer. */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */ - px = pState; - - /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */ - pb = pCoeffs; - - /* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */ - x0 = read_q15x2_ia (&px); - - /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */ - x2 = read_q15x2_ia (&px); - - /* Loop over the number of taps. Unroll by a factor of 4. - Repeat until we've computed numTaps-(numTaps%4) coefficients. */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */ - c0 = read_q15x2_ia (&pb); - - /* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ - acc0 = __SMLALD(x0, c0, acc0); - - /* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */ - acc2 = __SMLALD(x2, c0, acc2); - - /* pack x[n-N-1] and x[n-N-2] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* Read state x[n-N-4], x[n-N-5] */ - x0 = read_q15x2_ia (&px); - - /* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */ - acc1 = __SMLALDX(x1, c0, acc1); - - /* pack x[n-N-3] and x[n-N-4] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x0, x2, 0); -#else - x1 = __PKHBT(x2, x0, 0); -#endif - - /* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */ - acc3 = __SMLALDX(x1, c0, acc3); - - /* Read coefficients b[N-2], b[N-3] */ - c0 = read_q15x2_ia (&pb); - - /* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */ - acc0 = __SMLALD(x2, c0, acc0); - - /* Read state x[n-N-6], x[n-N-7] with offset */ - x2 = read_q15x2_ia (&px); - - /* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */ - acc2 = __SMLALD(x0, c0, acc2); - - /* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */ - acc1 = __SMLALDX(x1, c0, acc1); - - /* pack x[n-N-5] and x[n-N-6] */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */ - acc3 = __SMLALDX(x1, c0, acc3); - - /* Decrement tap count */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps. - This is always be 2 taps since the filter length is even. */ - if ((numTaps & 0x3U) != 0U) - { - /* Read last two coefficients */ - c0 = read_q15x2_ia (&pb); - - /* Perform the multiply-accumulates */ - acc0 = __SMLALD(x0, c0, acc0); - acc2 = __SMLALD(x2, c0, acc2); - - /* pack state variables */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x2, x0, 0); -#else - x1 = __PKHBT(x0, x2, 0); -#endif - - /* Read last state variables */ - x0 = read_q15x2 (px); - - /* Perform the multiply-accumulates */ - acc1 = __SMLALDX(x1, c0, acc1); - - /* pack state variables */ -#ifndef ARM_MATH_BIG_ENDIAN - x1 = __PKHBT(x0, x2, 0); -#else - x1 = __PKHBT(x2, x0, 0); -#endif - - /* Perform the multiply-accumulates */ - acc3 = __SMLALDX(x1, c0, acc3); - } - - /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation. - Then store the 4 outputs in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16)); - write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16)); -#else - write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16)); - write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining output samples */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of taps */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy two samples into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Use SIMD to hold states and coefficients */ - px = pState; - pb = pCoeffs; - - tapCnt = numTaps >> 1U; - - while (tapCnt > 0U) - { - acc0 += (q31_t) *px++ * *pb++; - acc0 += (q31_t) *px++ * *pb++; - - tapCnt--; - } - - - /* The result is in 2.30 format. Convert to 1.15 with saturation. - Then store the output in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16)); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = (numTaps - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy remaining data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of FIR group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c deleted file mode 100644 index 4141e48..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c +++ /dev/null @@ -1,1162 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_q31.c - * Description: Q31 FIR filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Processing function for Q31 FIR filter. - @param[in] S points to an instance of the Q31 FIR filter structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around rather than clip. - In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. - After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. - - @remark - Refer to \ref arm_fir_fast_q31() for a faster but less precise implementation of this filter. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - -#define FIR_Q31_CORE(nbAcc, nbVecTaps, pSample, vecCoeffs) \ - for (int j = 0; j < nbAcc; j++) { \ - const q31_t *pSmp = &pSamples[j]; \ - q31x4_t vecIn0; \ - q63_t acc[4]; \ - \ - acc[j] = 0; \ - for (int i = 0; i < nbVecTaps; i++) { \ - vecIn0 = vld1q(pSmp + 4 * i); \ - acc[j] = vrmlaldavhaq(acc[j], vecIn0, vecCoeffs[i]); \ - } \ - *pOutput++ = (q31_t)asrl(acc[j], 23); \ - } - - -#define FIR_Q31_CORE_STR_PARTIAL(nbAcc, nbVecTaps, pSample, vecCoeffs) \ - for (int j = 0; j < nbAcc; j++) { \ - const q31_t *pSmp = &pSamples[j]; \ - q31x4_t vecIn0; \ - \ - acc[j] = 0; \ - for (int i = 0; i < nbVecTaps; i++) { \ - vecIn0 = vld1q(pSmp + 4 * i); \ - acc[j] = vrmlaldavhaq(acc[j], vecIn0, vecCoeffs[i]); \ - } \ - *arm_fir_partial_accu_ptr++ = acc[j]; \ - } - - -#define FIR_Q31_CORE_LD_PARTIAL(nbAcc, nbVecTaps, pSample, vecCoeffs) \ - for (int j = 0; j < nbAcc; j++) { \ - const q31_t *pSmp = &pSamples[j]; \ - q31x4_t vecIn0; \ - \ - acc[j] = *arm_fir_partial_accu_ptr++; \ - \ - for (int i = 0; i < nbVecTaps; i++) { \ - vecIn0 = vld1q(pSmp + 4 * i); \ - acc[j] = vrmlaldavhaq(acc[j], vecIn0, vecCoeffs[i]); \ - } \ - *pOutput++ = (q31_t)asrl(acc[j], 23); \ - } - - -#define FIR_Q31_MAIN_CORE() \ -{ \ - q31_t *pRefStatePtr = S->pState + 2*ROUND_UP(blockSize, 4); \ - q31_t *pState = pRefStatePtr; /* State pointer */ \ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ \ - q31_t *pStateCur; /* Points to the current sample of the state */ \ - const q31_t *pSamples; /* Temporary pointer to the sample buffer */ \ - q31_t *pOutput; /* Temporary pointer to the output buffer */ \ - const q31_t *pTempSrc; /* Temporary pointer to the source data */ \ - q31_t *pTempDest; /* Temporary pointer to the destination buffer */\ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */\ - int32_t blkCnt; \ - \ - /* \ - * load coefs \ - */ \ - q31x4_t vecCoeffs[NBVECTAPS]; \ - \ - for (int i = 0; i < NBVECTAPS; i++) \ - vecCoeffs[i] = vld1q(pCoeffs + 4 * i); \ - \ - /* \ - * pState points to state array which contains previous frame (numTaps - 1) samples \ - * pStateCur points to the location where the new input data should be written \ - */ \ - pStateCur = &(pState[(numTaps - 1u)]); \ - pTempSrc = pSrc; \ - pSamples = pState; \ - pOutput = pDst; \ - \ - blkCnt = blockSize >> 2; \ - while (blkCnt > 0) { \ - /* \ - * Save 4 input samples in the history buffer \ - */ \ - vstrwq_s32(pStateCur, vldrwq_s32(pTempSrc)); \ - pStateCur += 4; \ - pTempSrc += 4; \ - \ - FIR_Q31_CORE(4, NBVECTAPS, pSamples, vecCoeffs); \ - \ - pSamples += 4; \ - /* \ - * Decrement the sample block loop counter \ - */ \ - blkCnt--; \ - } \ - \ - /* tail */ \ - int32_t residual = blockSize & 3; \ - switch (residual) { \ - case 3: \ - { \ - for (int i = 0; i < residual; i++) \ - *pStateCur++ = *pTempSrc++; \ - \ - FIR_Q31_CORE(3, NBVECTAPS, pSamples, vecCoeffs); \ - } \ - break; \ - \ - case 2: \ - { \ - for (int i = 0; i < residual; i++) \ - *pStateCur++ = *pTempSrc++; \ - \ - FIR_Q31_CORE(2, NBVECTAPS, pSamples, vecCoeffs); \ - } \ - break; \ - \ - case 1: \ - { \ - for (int i = 0; i < residual; i++) \ - *pStateCur++ = *pTempSrc++; \ - \ - FIR_Q31_CORE(1, NBVECTAPS, pSamples, vecCoeffs); \ - } \ - break; \ - } \ - \ - /* \ - * Copy the samples back into the history buffer start \ - */ \ - pTempSrc = &pState[blockSize]; \ - pTempDest = pState; \ - \ - blkCnt =(numTaps - 1) >> 2; \ - while (blkCnt > 0) \ - { \ - vstrwq_s32(pTempDest, vldrwq_s32(pTempSrc)); \ - pTempSrc += 4; \ - pTempDest += 4; \ - blkCnt--; \ - } \ - blkCnt = (numTaps - 1) & 3; \ - if (blkCnt > 0) \ - { \ - mve_pred16_t p0 = vctp32q(blkCnt); \ - vstrwq_p_s32(pTempDest, vldrwq_z_s32(pTempSrc, p0), p0); \ - } \ -} - -static void arm_fir_q31_1_4_mve(const arm_fir_instance_q31 * S, - const q31_t * __restrict pSrc, - q31_t * __restrict pDst, uint32_t blockSize) -{ - q31_t *pRefStatePtr = S->pState + 2*ROUND_UP(blockSize, 4); - q31_t *pState = pRefStatePtr; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCur; /* Points to the current sample of the state */ - const q31_t *pSamples; /* Temporary pointer to the sample buffer */ - q31_t *pOutput; /* Temporary pointer to the output buffer */ - const q31_t *pTempSrc; /* Temporary pointer to the source data */ - q31_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t blkCnt; - q31x4_t vecIn0; - - - /* - * pState points to state array which contains previous frame (numTaps - 1) samples - * pStateCur points to the location where the new input data should be written - */ - pStateCur = &(pState[(numTaps - 1u)]); - pTempSrc = pSrc; - pSamples = pState; - pOutput = pDst; - - q63_t acc0=0, acc1=0, acc2=0, acc3=0; - /* - * load 4 coefs - */ - q31x4_t vecCoeffs = *(q31x4_t *) pCoeffs; - - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - const q31_t *pSamplesTmp = pSamples; - - /* - * Save 4 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 4; - pTempSrc += 4; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vrmlaldavhq(vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[1]); - acc1 = vrmlaldavhq(vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[2]); - acc2 = vrmlaldavhq(vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[3]); - acc3 = vrmlaldavhq(vecIn0, vecCoeffs); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - *pOutput++ = (q31_t) acc0; - *pOutput++ = (q31_t) acc1; - *pOutput++ = (q31_t) acc2; - *pOutput++ = (q31_t) acc3; - - pSamples += 4; - /* - * Decrement the sample block loop counter - */ - blkCnt--; - } - - uint32_t residual = blockSize & 3; - switch (residual) - { - case 3: - { - /* - * Save 4 input samples in the history buffer - */ - *(q31x4_t *) pStateCur = *(q31x4_t *) pTempSrc; - pStateCur += 4; - pTempSrc += 4; - - vecIn0 = vld1q(pSamples); - acc0 = vrmlaldavhq(vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamples[1]); - acc1 = vrmlaldavhq(vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamples[2]); - acc2 = vrmlaldavhq(vecIn0, vecCoeffs); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - - *pOutput++ = (q31_t) acc0; - *pOutput++ = (q31_t) acc1; - *pOutput++ = (q31_t) acc2; - } - break; - - case 2: - { - /* - * Save 4 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 4; - pTempSrc += 4; - - vecIn0 = vld1q(pSamples); - acc0 = vrmlaldavhq(vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamples[1]); - acc1 = vrmlaldavhq(vecIn0, vecCoeffs); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - - *pOutput++ = (q31_t) acc0; - *pOutput++ = (q31_t) acc1; - } - break; - - case 1: - { - /* - * Save 4 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 4; - pTempSrc += 4; - - vecIn0 = vld1q(pSamples); - acc0 = vrmlaldavhq(vecIn0, vecCoeffs); - - acc0 = asrl(acc0, 23); - - *pOutput++ = (q31_t) acc0; - } - break; - } - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pState[blockSize]; - pTempDest = pState; - - blkCnt = (numTaps-1) >> 2; - while (blkCnt > 0U) - { - vst1q(pTempDest, vld1q(pTempSrc)); - pTempSrc += 4; - pTempDest += 4; - blkCnt--; - } - blkCnt = (numTaps-1) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vstrwq_p_s32(pTempDest, vld1q(pTempSrc), p0); - } -} - - - -static void arm_fir_q31_5_8_mve(const arm_fir_instance_q31 * S, - const q31_t * __restrict pSrc, - q31_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 8 - #define NBVECTAPS (NBTAPS / 4) - FIR_Q31_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - - -static void arm_fir_q31_9_12_mve(const arm_fir_instance_q31 * S, - const q31_t * __restrict pSrc, - q31_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 12 - #define NBVECTAPS (NBTAPS / 4) - FIR_Q31_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - - -static void arm_fir_q31_13_16_mve(const arm_fir_instance_q31 * S, - const q31_t * __restrict pSrc, - q31_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 16 - #define NBVECTAPS (NBTAPS / 4) - FIR_Q31_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - - -static void arm_fir_q31_17_20_mve(const arm_fir_instance_q31 * S, - const q31_t * __restrict pSrc, - q31_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 20 - #define NBVECTAPS (NBTAPS / 4) - FIR_Q31_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - - -static void arm_fir_q31_21_24_mve(const arm_fir_instance_q31 * S, - const q31_t * __restrict pSrc, - q31_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 24 - #define NBVECTAPS (NBTAPS / 4) - FIR_Q31_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - - -static void arm_fir_q31_25_28_mve(const arm_fir_instance_q31 * S, - const q31_t * __restrict pSrc, - q31_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 28 - #define NBVECTAPS (NBTAPS / 4) - FIR_Q31_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - -static void arm_fir_q31_29_32_mve(const arm_fir_instance_q31 * S, - const q31_t * __restrict pSrc, - q31_t * __restrict pDst, - uint32_t blockSize) -{ - q31_t *pRefStatePtr = S->pState + 2*ROUND_UP(blockSize, 4); - q31_t *pState = pRefStatePtr; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCur; /* Points to the current sample of the state */ - const q31_t *pSamples; /* Temporary pointer to the sample buffer */ - q31_t *pOutput; /* Temporary pointer to the output buffer */ - const q31_t *pTempSrc; /* Temporary pointer to the source data */ - q31_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t blkCnt; - q63_t acc0, acc1, acc2, acc3; - -#define MAX_VECT_BATCH 7 - - /* - * pre-load 28 1st coefs - */ - q31x4_t vecCoeffs0 = vld1q(pCoeffs + 4 * 0); - q31x4_t vecCoeffs1 = vld1q(pCoeffs + 4 * 1); - q31x4_t vecCoeffs2 = vld1q(pCoeffs + 4 * 2); - q31x4_t vecCoeffs3 = vld1q(pCoeffs + 4 * 3); - q31x4_t vecCoeffs4 = vld1q(pCoeffs + 4 * 4); - q31x4_t vecCoeffs5 = vld1q(pCoeffs + 4 * 5); - q31x4_t vecCoeffs6 = vld1q(pCoeffs + 4 * 6); - - /* - * pState points to state array which contains previous frame (numTaps - 1) samples - * pStateCur points to the location where the new input data should be written - */ - pStateCur = &(pState[(numTaps - 1u)]); - pTempSrc = pSrc; - pSamples = pState; - - q63_t *arm_fir_partial_accu_ptr = (q63_t*)S->pState; - - blkCnt = blockSize >> 2; - while (blkCnt > 0) { - /* - * Save 4 input samples in the history buffer - */ - vstrwq_s32(pStateCur, vldrwq_s32(pTempSrc)); - pStateCur += 4; - pTempSrc += 4; - - const q31_t *pSmp; - q31x4_t vecIn0; - - pSmp = &pSamples[0]; - - vecIn0 = vld1q(pSmp); - acc0 = vrmlaldavhq(vecIn0, vecCoeffs0); - vecIn0 = vld1q(pSmp + 4 * 1); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs1); - vecIn0 = vld1q(pSmp + 4 * 2); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs2); - vecIn0 = vld1q(pSmp + 4 * 3); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs3); - vecIn0 = vld1q(pSmp + 4 * 4); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs4); - vecIn0 = vld1q(pSmp + 4 * 5); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs5); - vecIn0 = vld1q(pSmp + 4 * 6); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs6); - - *arm_fir_partial_accu_ptr++ = acc0; - - pSmp = &pSamples[1]; - - vecIn0 = vld1q(pSmp); - acc1 = vrmlaldavhq(vecIn0, vecCoeffs0); - vecIn0 = vld1q(pSmp + 4 * 1); - acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs1); - vecIn0 = vld1q(pSmp + 4 * 2); - acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs2); - vecIn0 = vld1q(pSmp + 4 * 3); - acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs3); - vecIn0 = vld1q(pSmp + 4 * 4); - acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs4); - vecIn0 = vld1q(pSmp + 4 * 5); - acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs5); - vecIn0 = vld1q(pSmp + 4 * 6); - acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs6); - - *arm_fir_partial_accu_ptr++ = acc1; - - pSmp = &pSamples[2]; - - vecIn0 = vld1q(pSmp); - acc2 = vrmlaldavhq(vecIn0, vecCoeffs0); - vecIn0 = vld1q(pSmp + 4 * 1); - acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs1); - vecIn0 = vld1q(pSmp + 4 * 2); - acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs2); - vecIn0 = vld1q(pSmp + 4 * 3); - acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs3); - vecIn0 = vld1q(pSmp + 4 * 4); - acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs4); - vecIn0 = vld1q(pSmp + 4 * 5); - acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs5); - vecIn0 = vld1q(pSmp + 4 * 6); - acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs6); - *arm_fir_partial_accu_ptr++ = acc2; - - pSmp = &pSamples[3]; - - vecIn0 = vld1q(pSmp); - acc3 = vrmlaldavhq(vecIn0, vecCoeffs0); - vecIn0 = vld1q(pSmp + 4 * 1); - acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs1); - vecIn0 = vld1q(pSmp + 4 * 2); - acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs2); - vecIn0 = vld1q(pSmp + 4 * 3); - acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs3); - vecIn0 = vld1q(pSmp + 4 * 4); - acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs4); - vecIn0 = vld1q(pSmp + 4 * 5); - acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs5); - vecIn0 = vld1q(pSmp + 4 * 6); - acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs6); - - *arm_fir_partial_accu_ptr++ = acc3; - - pSamples += 4; - /* - * Decrement the sample block loop counter - */ - blkCnt--; - } - - - /* reminder */ - - /* load last 4 coef */ - vecCoeffs0 = vld1q(pCoeffs + 4 * MAX_VECT_BATCH); - arm_fir_partial_accu_ptr = (q63_t*)S->pState; - pOutput = pDst; - pSamples = pState + (MAX_VECT_BATCH * 4); - - - blkCnt = blockSize >> 2; - while (blkCnt > 0) { - q31x4_t vecIn0; - - /* reload intermediate MAC */ - acc0 = *arm_fir_partial_accu_ptr++; - acc1 = *arm_fir_partial_accu_ptr++; - acc2 = *arm_fir_partial_accu_ptr++; - acc3 = *arm_fir_partial_accu_ptr++; - - - vecIn0 = vld1q(&pSamples[0]); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs0); - - vecIn0 = vld1q(&pSamples[1]); - acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs0); - - vecIn0 = vld1q(&pSamples[2]); - acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs0); - - vecIn0 = vld1q(&pSamples[3]); - acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs0); - - *pOutput++ = asrl(acc0, 23); - *pOutput++ = asrl(acc1, 23); - *pOutput++ = asrl(acc2, 23); - *pOutput++ = asrl(acc3, 23); - - pSamples += 4; - /* - * Decrement the sample block loop counter - */ - blkCnt--; - } - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pState[blockSize]; - pTempDest = pState; - - blkCnt = numTaps - 1; - do { - mve_pred16_t p = vctp32q(blkCnt); - - vstrwq_p_s32(pTempDest, vldrwq_z_s32(pTempSrc, p), p); - pTempSrc += 4; - pTempDest += 4; - blkCnt -= 4; - } - while (blkCnt > 0); -} - - - -void arm_fir_q31( - const arm_fir_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pRefStatePtr = S->pState + 2*ROUND_UP(blockSize, 4); - q31_t *pState = pRefStatePtr; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCur; /* Points to the current sample of the state */ - const q31_t *pSamples; /* Temporary pointer to the sample buffer */ - q31_t *pOutput; /* Temporary pointer to the output buffer */ - const q31_t *pTempSrc; /* Temporary pointer to the source data */ - q31_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t blkCnt; - q31x4_t vecIn0; - uint32_t tapsBlkCnt = (numTaps + 3) / 4; - q63_t acc0, acc1, acc2, acc3; - q31x4_t vecCoeffs; - - - /* - * [1 to 32 taps] specialized routines - */ - if (numTaps <= 4) - { - arm_fir_q31_1_4_mve(S, pSrc, pDst, blockSize); - return; - } - else if (numTaps <= 8) - { - arm_fir_q31_5_8_mve(S, pSrc, pDst, blockSize); - return; - } - else if (numTaps <= 12) - { - arm_fir_q31_9_12_mve(S, pSrc, pDst, blockSize); - return; - } - else if (numTaps <= 16) - { - arm_fir_q31_13_16_mve(S, pSrc, pDst, blockSize); - return; - } - else if (numTaps <= 20) - { - arm_fir_q31_17_20_mve(S, pSrc, pDst, blockSize); - return; - } - else if (numTaps <= 24) - { - arm_fir_q31_21_24_mve(S, pSrc, pDst, blockSize); - return; - } - else if (numTaps <= 28) - { - arm_fir_q31_25_28_mve(S, pSrc, pDst, blockSize); - return; - } - else if ((numTaps <= 32) && (blockSize >= 32)) - { - arm_fir_q31_29_32_mve(S, pSrc, pDst, blockSize); - return; - } - - /* - * pState points to state array which contains previous frame (numTaps - 1) samples - * pStateCur points to the location where the new input data should be written - */ - pStateCur = &(pState[(numTaps - 1u)]); - pSamples = pState; - pTempSrc = pSrc; - pOutput = pDst; - blkCnt = blockSize >> 2; - while (blkCnt > 0) - { - const q31_t *pCoeffsTmp = pCoeffs; - const q31_t *pSamplesTmp = pSamples; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - acc3 = 0LL; - - /* - * Save 4 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 4; - pTempSrc += 4; - - int i = tapsBlkCnt; - while (i > 0) - { - /* - * load 4 coefs - */ - vecCoeffs = *(q31x4_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[1]); - acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[2]); - acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[3]); - acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs); - - pSamplesTmp += 4; - pCoeffsTmp += 4; - /* - * Decrement the taps block loop counter - */ - i--; - } - - /* .54-> .31 conversion and store accumulators */ - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - *pOutput++ = (q31_t) acc0; - *pOutput++ = (q31_t) acc1; - *pOutput++ = (q31_t) acc2; - *pOutput++ = (q31_t) acc3; - - pSamples += 4; - - /* - * Decrement the sample block loop counter - */ - blkCnt--; - } - - int32_t residual = blockSize & 3; - switch (residual) - { - case 3: - { - const q31_t *pCoeffsTmp = pCoeffs; - const q31_t *pSamplesTmp = pSamples; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - - /* - * Save 4 input samples in the history buffer - */ - *(q31x4_t *) pStateCur = *(q31x4_t *) pTempSrc; - pStateCur += 4; - pTempSrc += 4; - - int i = tapsBlkCnt; - while (i > 0) - { - vecCoeffs = *(q31x4_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[1]); - acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[2]); - acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs); - - pSamplesTmp += 4; - pCoeffsTmp += 4; - i--; - } - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - - *pOutput++ = (q31_t) acc0; - *pOutput++ = (q31_t) acc1; - *pOutput++ = (q31_t) acc2; - } - break; - - case 2: - { - const q31_t *pCoeffsTmp = pCoeffs; - const q31_t *pSamplesTmp = pSamples; - - acc0 = 0LL; - acc1 = 0LL; - - /* - * Save 4 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 4; - pTempSrc += 4; - - int i = tapsBlkCnt; - while (i > 0) - { - vecCoeffs = *(q31x4_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[1]); - acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs); - - pSamplesTmp += 4; - pCoeffsTmp += 4; - i--; - } - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - - *pOutput++ = (q31_t) acc0; - *pOutput++ = (q31_t) acc1; - } - break; - - case 1: - { - const q31_t *pCoeffsTmp = pCoeffs; - const q31_t *pSamplesTmp = pSamples; - - acc0 = 0LL; - - /* - * Save 4 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 4; - pTempSrc += 4; - - int i = tapsBlkCnt; - while (i > 0) - { - vecCoeffs = *(q31x4_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs); - - pSamplesTmp += 4; - pCoeffsTmp += 4; - i--; - } - - acc0 = asrl(acc0, 23); - - *pOutput++ = (q31_t) acc0; - } - break; - } - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pState[blockSize]; - pTempDest = pState; - - blkCnt = (numTaps - 1U) >> 2; - while (blkCnt > 0) - { - vst1q(pTempDest, vld1q(pTempSrc)); - pTempSrc += 4; - pTempDest += 4; - blkCnt--; - } - blkCnt = (numTaps - 1U) & 3; - if (blkCnt > 0) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vstrwq_p_s32(pTempDest, vld1q(pTempSrc), p0); - } -} - -#else -void arm_fir_q31( - const arm_fir_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t *px; /* Temporary pointer for state buffer */ - const q31_t *pb; /* Temporary pointer for coefficient buffer */ - q63_t acc0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q63_t acc1, acc2; /* Accumulators */ - q31_t x0, x1, x2; /* Temporary variables to hold state values */ - q31_t c0; /* Temporary variable to hold coefficient value */ -#endif - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - - blkCnt = blockSize / 3; - - while (blkCnt > 0U) - { - /* Copy 3 new input samples into the state buffer. */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Read the first 2 samples from the state buffer: x[n-numTaps], x[n-numTaps-1] */ - x0 = *px++; - x1 = *px++; - - /* Loop unrolling: process 3 taps at a time. */ - tapCnt = numTaps / 3; - - while (tapCnt > 0U) - { - /* Read the b[numTaps] coefficient */ - c0 = *pb; - - /* Read x[n-numTaps-2] sample */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q63_t) x0 * c0); - acc1 += ((q63_t) x1 * c0); - acc2 += ((q63_t) x2 * c0); - - /* Read the coefficient and state */ - c0 = *(pb + 1U); - x0 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q63_t) x1 * c0); - acc1 += ((q63_t) x2 * c0); - acc2 += ((q63_t) x0 * c0); - - /* Read the coefficient and state */ - c0 = *(pb + 2U); - x1 = *(px++); - - /* update coefficient pointer */ - pb += 3U; - - /* Perform the multiply-accumulates */ - acc0 += ((q63_t) x2 * c0); - acc1 += ((q63_t) x0 * c0); - acc2 += ((q63_t) x1 * c0); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - tapCnt = numTaps % 0x3U; - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x2 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q63_t) x0 * c0); - acc1 += ((q63_t) x1 * c0); - acc2 += ((q63_t) x2 * c0); - - /* Reuse the present sample states for next sample */ - x0 = x1; - x1 = x2; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Advance the state pointer by 3 to process the next group of 3 samples */ - pState = pState + 3; - - /* The result is in 2.30 format. Convert to 1.31 and store in destination buffer. */ - *pDst++ = (q31_t) (acc0 >> 31U); - *pDst++ = (q31_t) (acc1 >> 31U); - *pDst++ = (q31_t) (acc2 >> 31U); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining output samples */ - blkCnt = blockSize % 0x3U; - -#else - - /* Initialize blkCnt with number of taps */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = pCoeffs; - - i = numTaps; - - /* Perform the multiply-accumulates */ - do - { - /* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */ - acc0 += (q63_t) *px++ * *pb++; - - i--; - } while (i > 0U); - - /* Result is in 2.62 format. Convert to 1.31 and store in destination buffer. */ - *pDst++ = (q31_t) (acc0 >> 31U); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = (numTaps - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy remaining data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of FIR group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c deleted file mode 100644 index b8c1e48..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c +++ /dev/null @@ -1,714 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_q7.c - * Description: Q7 FIR filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR - @{ - */ - -/** - @brief Processing function for Q7 FIR filter. - @param[in] S points to an instance of the Q7 FIR filter structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 32-bit internal accumulator. - Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. - The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - The accumulator is converted to 18.7 format by discarding the low 7 bits. - Finally, the result is truncated to 1.7 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define FIR_Q7_CORE(pOutput, nbAcc, nbVecTaps, pSample, vecCoeffs) \ - for (int j = 0; j < nbAcc; j++) { \ - const q7_t *pSmp = &pSample[j]; \ - q31_t acc[4]; \ - \ - acc[j] = 0; \ - for (int i = 0; i < nbVecTaps; i++) { \ - vecIn0 = vld1q(pSmp + 16 * i); \ - acc[j] = vmladavaq(acc[j], vecIn0, vecCoeffs[i]); \ - } \ - *pOutput++ = (q7_t) __SSAT((acc[j] >> 7U), 8); \ - } - -#define FIR_Q7_MAIN_CORE() \ -{ \ - q7_t *pState = S->pState; /* State pointer */ \ - const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ \ - q7_t *pStateCur; /* Points to the current sample of the state */ \ - const q7_t *pSamples; /* Temporary pointer to the sample buffer */ \ - q7_t *pOutput; /* Temporary pointer to the output buffer */ \ - const q7_t *pTempSrc; /* Temporary pointer to the source data */ \ - q7_t *pTempDest; /* Temporary pointer to the destination buffer */\ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */\ - int32_t blkCnt; \ - q7x16_t vecIn0; \ - \ - /* \ - * load coefs \ - */ \ - q7x16_t vecCoeffs[NBVECTAPS]; \ - \ - for (int i = 0; i < NBVECTAPS; i++) \ - vecCoeffs[i] = vldrbq_s8(pCoeffs + 16 * i); \ - \ - /* \ - * pState points to state array which contains previous frame (numTaps - 1) samples \ - * pStateCur points to the location where the new input data should be written \ - */ \ - pStateCur = &(pState[(numTaps - 1u)]); \ - pTempSrc = pSrc; \ - pSamples = pState; \ - pOutput = pDst; \ - \ - blkCnt = blockSize >> 2; \ - while (blkCnt > 0) { \ - /* \ - * Save 4 input samples in the history buffer \ - */ \ - vstrbq_s32(pStateCur, vldrbq_s32(pTempSrc)); \ - pStateCur += 4; \ - pTempSrc += 4; \ - \ - FIR_Q7_CORE(pOutput, 4, NBVECTAPS, pSamples, vecCoeffs); \ - pSamples += 4; \ - \ - blkCnt--; \ - } \ - \ - /* tail */ \ - int32_t residual = blockSize & 3; \ - \ - for (int i = 0; i < residual; i++) \ - *pStateCur++ = *pTempSrc++; \ - \ - FIR_Q7_CORE(pOutput, residual, NBVECTAPS, pSamples, vecCoeffs); \ - \ - \ - /* \ - * Copy the samples back into the history buffer start \ - */ \ - pTempSrc = &pState[blockSize]; \ - pTempDest = pState; \ - blkCnt = numTaps - 1; \ - do { \ - mve_pred16_t p = vctp8q(blkCnt); \ - \ - vstrbq_p_s8(pTempDest, vldrbq_z_s8(pTempSrc, p), p); \ - pTempSrc += 16; \ - pTempDest += 16; \ - blkCnt -= 16; \ - } \ - while (blkCnt > 0); \ -} - - -static void arm_fir_q7_49_64_mve(const arm_fir_instance_q7 * S, - const q7_t * __restrict pSrc, - q7_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 64 - #define NBVECTAPS (NBTAPS / 16) - FIR_Q7_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - - -void arm_fir_q7_33_48_mve(const arm_fir_instance_q7 * S, - const q7_t * __restrict pSrc, - q7_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 48 - #define NBVECTAPS (NBTAPS / 16) - FIR_Q7_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - -static void arm_fir_q7_17_32_mve(const arm_fir_instance_q7 * S, - const q7_t * __restrict pSrc, - q7_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 32 - #define NBVECTAPS (NBTAPS / 16) - FIR_Q7_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - - -void arm_fir_q7_1_16_mve(const arm_fir_instance_q7 * S, - const q7_t * __restrict pSrc, - q7_t * __restrict pDst, uint32_t blockSize) -{ - #define NBTAPS 16 - #define NBVECTAPS (NBTAPS / 16) - FIR_Q7_MAIN_CORE(); - #undef NBVECTAPS - #undef NBTAPS -} - -void arm_fir_q7( - const arm_fir_instance_q7 * S, - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - q7_t *pState = S->pState; /* State pointer */ - const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q7_t *pStateCur; /* Points to the current sample of the state */ - const q7_t *pSamples; /* Temporary pointer to the sample buffer */ - q7_t *pOutput; /* Temporary pointer to the output buffer */ - const q7_t *pTempSrc; /* Temporary pointer to the source data */ - q7_t *pTempDest; /* Temporary pointer to the destination buffer */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t blkCnt; - q7x16_t vecIn0; - uint32_t tapsBlkCnt = (numTaps + 15) / 16; - q31_t acc0, acc1, acc2, acc3; - q7x16_t vecCoeffs; - - if (numTaps <= 16) - { - /* - * [1 to 16 taps] specialized routine - */ - arm_fir_q7_1_16_mve(S, pSrc, pDst, blockSize); - return; - } - else if (numTaps <= 32) - { - /* - * [17 to 32 taps] specialized routine - */ - arm_fir_q7_17_32_mve(S, pSrc, pDst, blockSize); - return; - } - else if (numTaps <= 48) - { - /* - * [33 to 48 taps] specialized routine - */ - arm_fir_q7_33_48_mve(S, pSrc, pDst, blockSize); - return; - } - else if (numTaps <= 64) - { - /* - * [49 to 64 taps] specialized routine - */ - arm_fir_q7_49_64_mve(S, pSrc, pDst, blockSize); - return; - } - - /* - * pState points to state array which contains previous frame (numTaps - 1) samples - * pStateCur points to the location where the new input data should be written - */ - pStateCur = &(pState[(numTaps - 1u)]); - pSamples = pState; - pTempSrc = pSrc; - pOutput = pDst; - blkCnt = blockSize >> 2; - - /* - * outer samples loop - */ - while (blkCnt > 0U) - { - const q7_t *pCoeffsTmp = pCoeffs; - const q7_t *pSamplesTmp = pSamples; - - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - /* - * Save 16 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 16; - pTempSrc += 16; - - /* - * inner coefficients loop - */ - int i = tapsBlkCnt; - while (i > 0) - { - /* - * load 16 coefs - */ - vecCoeffs = *(q7x16_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vmladavaq(acc0, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[1]); - acc1 = vmladavaq(acc1, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[2]); - acc2 = vmladavaq(acc2, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[3]); - acc3 = vmladavaq(acc3, vecIn0, vecCoeffs); - - pSamplesTmp += 16; - pCoeffsTmp += 16; - /* - * Decrement the taps block loop counter - */ - i--; - } - /* - * Store the 1.7 format filter output in destination buffer - */ - *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); - *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8); - *pOutput++ = (q7_t) __SSAT((acc2 >> 7U), 8); - *pOutput++ = (q7_t) __SSAT((acc3 >> 7U), 8); - - pSamples += 4; - /* - * Decrement the sample block loop counter - */ - blkCnt--; - } - - uint32_t residual = blockSize & 3; - switch (residual) - { - case 3: - { - const q7_t *pCoeffsTmp = pCoeffs; - const q7_t *pSamplesTmp = pSamples; - - acc0 = 0; - acc1 = 0; - acc2 = 0; - /* - * Save 16 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 16; - pTempSrc += 16; - - int i = tapsBlkCnt; - while (i > 0) - { - vecCoeffs = *(q7x16_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vmladavaq(acc0, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[4]); - acc1 = vmladavaq(acc1, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[8]); - acc2 = vmladavaq(acc2, vecIn0, vecCoeffs); - - pSamplesTmp += 16; - pCoeffsTmp += 16; - i--; - } - - *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); - *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8); - *pOutput++ = (q7_t) __SSAT((acc2 >> 7U), 8); - } - break; - - case 2: - { - const q7_t *pCoeffsTmp = pCoeffs; - const q7_t *pSamplesTmp = pSamples; - - acc0 = 0; - acc1 = 0; - /* - * Save 16 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 16; - pTempSrc += 16; - - int i = tapsBlkCnt; - while (i > 0) - { - vecCoeffs = *(q7x16_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vmladavaq(acc0, vecIn0, vecCoeffs); - - vecIn0 = vld1q(&pSamplesTmp[4]); - acc1 = vmladavaq(acc1, vecIn0, vecCoeffs); - - pSamplesTmp += 16; - pCoeffsTmp += 16; - i--; - } - - *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); - *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8); - } - break; - - case 1: - { - const q7_t *pCoeffsTmp = pCoeffs; - const q7_t *pSamplesTmp = pSamples; - - acc0 = 0; - /* - * Save 16 input samples in the history buffer - */ - vst1q(pStateCur, vld1q(pTempSrc)); - pStateCur += 16; - pTempSrc += 16; - - int i = tapsBlkCnt; - while (i > 0) - { - vecCoeffs = *(q7x16_t *) pCoeffsTmp; - - vecIn0 = vld1q(pSamplesTmp); - acc0 = vmladavaq(acc0, vecIn0, vecCoeffs); - - pSamplesTmp += 16; - pCoeffsTmp += 16; - i--; - } - *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8); - } - break; - } - - /* - * Copy the samples back into the history buffer start - */ - pTempSrc = &pState[blockSize]; - pTempDest = pState; - - blkCnt = numTaps >> 4; - while (blkCnt > 0U) - { - vst1q(pTempDest, vld1q(pTempSrc)); - pTempSrc += 16; - pTempDest += 16; - blkCnt--; - } - blkCnt = numTaps & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vstrbq_p_s8(pTempDest, vld1q(pTempSrc), p0); - } -} -#else -void arm_fir_q7( - const arm_fir_instance_q7 * S, - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - q7_t *pState = S->pState; /* State pointer */ - const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q7_t *pStateCurnt; /* Points to the current sample of the state */ - q7_t *px; /* Temporary pointer for state buffer */ - const q7_t *pb; /* Temporary pointer for coefficient buffer */ - q31_t acc0; /* Accumulators */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, tapCnt, blkCnt; /* Loop counters */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t acc1, acc2, acc3; /* Accumulators */ - q7_t x0, x1, x2, x3, c0; /* Temporary variables to hold state */ -#endif - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 output values simultaneously. - * The variables acc0 ... acc3 hold output values that are being computed: - * - * acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] - * acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1] - * acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2] - * acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3] - */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Copy 4 new input samples into the state buffer. */ - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - *pStateCurnt++ = *pSrc++; - - /* Set all accumulators to zero */ - acc0 = 0; - acc1 = 0; - acc2 = 0; - acc3 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Read the first 3 samples from the state buffer: - * x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */ - x0 = *px++; - x1 = *px++; - x2 = *px++; - - /* Loop unrolling. Process 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - /* Loop over the number of taps. Unroll by a factor of 4. - Repeat until we've computed numTaps-4 coefficients. */ - while (tapCnt > 0U) - { - /* Read the b[numTaps] coefficient */ - c0 = *pb; - - /* Read x[n-numTaps-3] sample */ - x3 = *px; - - /* acc0 += b[numTaps] * x[n-numTaps] */ - acc0 += ((q15_t) x0 * c0); - - /* acc1 += b[numTaps] * x[n-numTaps-1] */ - acc1 += ((q15_t) x1 * c0); - - /* acc2 += b[numTaps] * x[n-numTaps-2] */ - acc2 += ((q15_t) x2 * c0); - - /* acc3 += b[numTaps] * x[n-numTaps-3] */ - acc3 += ((q15_t) x3 * c0); - - /* Read the b[numTaps-1] coefficient */ - c0 = *(pb + 1U); - - /* Read x[n-numTaps-4] sample */ - x0 = *(px + 1U); - - /* Perform the multiply-accumulates */ - acc0 += ((q15_t) x1 * c0); - acc1 += ((q15_t) x2 * c0); - acc2 += ((q15_t) x3 * c0); - acc3 += ((q15_t) x0 * c0); - - /* Read the b[numTaps-2] coefficient */ - c0 = *(pb + 2U); - - /* Read x[n-numTaps-5] sample */ - x1 = *(px + 2U); - - /* Perform the multiply-accumulates */ - acc0 += ((q15_t) x2 * c0); - acc1 += ((q15_t) x3 * c0); - acc2 += ((q15_t) x0 * c0); - acc3 += ((q15_t) x1 * c0); - - /* Read the b[numTaps-3] coefficients */ - c0 = *(pb + 3U); - - /* Read x[n-numTaps-6] sample */ - x2 = *(px + 3U); - - /* Perform the multiply-accumulates */ - acc0 += ((q15_t) x3 * c0); - acc1 += ((q15_t) x0 * c0); - acc2 += ((q15_t) x1 * c0); - acc3 += ((q15_t) x2 * c0); - - /* update coefficient pointer */ - pb += 4U; - px += 4U; - - /* Decrement loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Read coefficients */ - c0 = *(pb++); - - /* Fetch 1 state variable */ - x3 = *(px++); - - /* Perform the multiply-accumulates */ - acc0 += ((q15_t) x0 * c0); - acc1 += ((q15_t) x1 * c0); - acc2 += ((q15_t) x2 * c0); - acc3 += ((q15_t) x3 * c0); - - /* Reuse the present sample states for next sample */ - x0 = x1; - x1 = x2; - x2 = x3; - - /* Decrement loop counter */ - tapCnt--; - } - - /* The results in the 4 accumulators are in 2.62 format. Convert to 1.31 - Then store the 4 outputs in the destination buffer. */ - acc0 = __SSAT((acc0 >> 7U), 8); - *pDst++ = acc0; - acc1 = __SSAT((acc1 >> 7U), 8); - *pDst++ = acc1; - acc2 = __SSAT((acc2 >> 7U), 8); - *pDst++ = acc2; - acc3 = __SSAT((acc3 >> 7U), 8); - *pDst++ = acc3; - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining output samples */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of taps */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Copy one sample at a time into state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Set the accumulator to zero */ - acc0 = 0; - - /* Initialize state pointer */ - px = pState; - - /* Initialize Coefficient pointer */ - pb = pCoeffs; - - i = numTaps; - - /* Perform the multiply-accumulates */ - while (i > 0U) - { - acc0 += (q15_t) * (px++) * (*(pb++)); - i--; - } - - /* The result is in 2.14 format. Convert to 1.7 - Then store the output in the destination buffer. */ - *pDst++ = __SSAT((acc0 >> 7U), 8); - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the state buffer */ - pStateCurnt = S->pState; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time */ - tapCnt = (numTaps - 1U) >> 2U; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of taps */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - /* Copy remaining data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of FIR group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c deleted file mode 100644 index f960cfc..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c +++ /dev/null @@ -1,341 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_sparse_f32.c - * Description: Floating-point sparse FIR filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters - - This group of functions implements sparse FIR filters. - Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero. - Sparse filters are used for simulating reflections in communications and audio applications. - - There are separate functions for Q7, Q15, Q31, and floating-point data types. - The functions operate on blocks of input and output data and each call to the function processes - blockSize samples through the filter. pSrc and - pDst points to input and output arrays respectively containing blockSize values. - - @par Algorithm - The sparse filter instant structure contains an array of tap indices pTapDelay which specifies the locations of the non-zero coefficients. - This is in addition to the coefficient array b. - The implementation essentially skips the multiplications by zero and leads to an efficient realization. - 
-      y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
-
- @par - \image html FIRSparse.gif "Sparse FIR filter. b[n] represents the filter coefficients" - @par - pCoeffs points to a coefficient array of size numTaps; - pTapDelay points to an array of nonzero indices and is also of size numTaps; - pState points to a state array of size maxDelay + blockSize, where - maxDelay is the largest offset value that is ever used in the pTapDelay array. - Some of the processing functions also require temporary working buffers. - - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter. - Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared. - There are separate instance structure declarations for each of the 4 supported data types. - - @par Initialization Functions - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero. - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - Set the values in the state buffer to zeros before static initialization. - The code below statically initializes each of the 4 different data type filter instance structures - 
-      arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-      arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-      arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-      arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-
- - @par Fixed-Point Behavior - Care must be taken when using the fixed-point versions of the sparse FIR filter functions. - In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - Refer to the function specific documentation below for usage guidelines. - */ - -/** - @addtogroup FIR_Sparse - @{ - */ - -/** - @brief Processing function for the floating-point sparse FIR filter. - @param[in] S points to an instance of the floating-point sparse FIR structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] pScratchIn points to a temporary buffer of size blockSize - @param[in] blockSize number of input samples to process - @return none - */ - -void arm_fir_sparse_f32( - arm_fir_sparse_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - float32_t * pScratchIn, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *px; /* Scratch buffer pointer */ - float32_t *py = pState; /* Temporary pointers for state buffer */ - float32_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - float32_t *pOut; /* Destination pointer */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - float32_t coeff = *pCoeffs++; /* Read the first coefficient value */ - - - /* BlockSize of Input samples are copied into the state buffer */ - /* StateIndex points to the starting position to write in the state buffer */ - arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, (int32_t *) pSrc, 1, blockSize); - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pOut = pDst; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform Multiplications and store in destination buffer */ - *pOut++ = *px++ * coeff; - - *pOut++ = *px++ * coeff; - - *pOut++ = *px++ * coeff; - - *pOut++ = *px++ * coeff; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiplication and store in destination buffer */ - *pOut++ = *px++ * coeff; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 2U; - - while (tapCnt > 0U) - { - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pOut = pDst; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - *pOut++ += *px++ * coeff; - - *pOut++ += *px++ * coeff; - - *pOut++ += *px++ * coeff; - - *pOut++ += *px++ * coeff; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - *pOut++ += *px++ * coeff; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement tap loop counter */ - tapCnt--; - } - - /* Compute last tap without the final read of pTapDelay */ - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pOut = pDst; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - *pOut++ += *px++ * coeff; - *pOut++ += *px++ * coeff; - *pOut++ += *px++ * coeff; - *pOut++ += *px++ * coeff; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - *pOut++ += *px++ * coeff; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of FIR_Sparse group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c deleted file mode 100644 index 2c667f8..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c +++ /dev/null @@ -1,93 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_sparse_init_f32.c - * Description: Floating-point sparse FIR filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Sparse - @{ - */ - -/** - @brief Initialization function for the floating-point sparse FIR filter. - @param[in,out] S points to an instance of the floating-point sparse FIR structure - @param[in] numTaps number of nonzero coefficients in the filter - @param[in] pCoeffs points to the array of filter coefficients - @param[in] pState points to the state buffer - @param[in] pTapDelay points to the array of offset times - @param[in] maxDelay maximum offset time supported - @param[in] blockSize number of samples that will be processed per block - @return none - - @par Details - pCoeffs holds the filter coefficients and has length numTaps. - pState holds the filter's state variables and must be of length - maxDelay + blockSize, where maxDelay - is the maximum number of delay line values. - blockSize is the - number of samples processed by the arm_fir_sparse_f32() function. - */ - -void arm_fir_sparse_init_f32( - arm_fir_sparse_instance_f32 * S, - uint16_t numTaps, - const float32_t * pCoeffs, - float32_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign TapDelay pointer */ - S->pTapDelay = pTapDelay; - - /* Assign MaxDelay */ - S->maxDelay = maxDelay; - - /* reset the stateIndex to 0 */ - S->stateIndex = 0U; - - /* Clear state buffer and size is always maxDelay + blockSize */ - memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR_Sparse group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c deleted file mode 100644 index de26ff1..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c +++ /dev/null @@ -1,93 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_sparse_init_q15.c - * Description: Q15 sparse FIR filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Sparse - @{ - */ - -/** - @brief Initialization function for the Q15 sparse FIR filter. - @param[in,out] S points to an instance of the Q15 sparse FIR structure - @param[in] numTaps number of nonzero coefficients in the filter - @param[in] pCoeffs points to the array of filter coefficients - @param[in] pState points to the state buffer - @param[in] pTapDelay points to the array of offset times - @param[in] maxDelay maximum offset time supported - @param[in] blockSize number of samples that will be processed per block - @return none - - @par Details - pCoeffs holds the filter coefficients and has length numTaps. - pState holds the filter's state variables and must be of length - maxDelay + blockSize, where maxDelay - is the maximum number of delay line values. - blockSize is the - number of words processed by arm_fir_sparse_q15() function. - */ - -void arm_fir_sparse_init_q15( - arm_fir_sparse_instance_q15 * S, - uint16_t numTaps, - const q15_t * pCoeffs, - q15_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign TapDelay pointer */ - S->pTapDelay = pTapDelay; - - /* Assign MaxDelay */ - S->maxDelay = maxDelay; - - /* reset the stateIndex to 0 */ - S->stateIndex = 0U; - - /* Clear state buffer and size is always maxDelay + blockSize */ - memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR_Sparse group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c deleted file mode 100644 index a9ef5ea..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_sparse_init_q31.c - * Description: Q31 sparse FIR filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Sparse - @{ - */ - -/** - @brief Initialization function for the Q31 sparse FIR filter. - @param[in,out] S points to an instance of the Q31 sparse FIR structure - @param[in] numTaps number of nonzero coefficients in the filter - @param[in] pCoeffs points to the array of filter coefficients - @param[in] pState points to the state buffer - @param[in] pTapDelay points to the array of offset times - @param[in] maxDelay maximum offset time supported - @param[in] blockSize number of samples that will be processed per block - @return none - - @par Details - pCoeffs holds the filter coefficients and has length numTaps. - pState holds the filter's state variables and must be of length - maxDelay + blockSize, where maxDelay - is the maximum number of delay line values. - blockSize is the number of words processed by arm_fir_sparse_q31() function. - */ - -void arm_fir_sparse_init_q31( - arm_fir_sparse_instance_q31 * S, - uint16_t numTaps, - const q31_t * pCoeffs, - q31_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign TapDelay pointer */ - S->pTapDelay = pTapDelay; - - /* Assign MaxDelay */ - S->maxDelay = maxDelay; - - /* reset the stateIndex to 0 */ - S->stateIndex = 0U; - - /* Clear state buffer and size is always maxDelay + blockSize */ - memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR_Sparse group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c deleted file mode 100644 index 827ae65..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c +++ /dev/null @@ -1,93 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_sparse_init_q7.c - * Description: Q7 sparse FIR filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Sparse - @{ - */ - -/** - @brief Initialization function for the Q7 sparse FIR filter. - @param[in,out] S points to an instance of the Q7 sparse FIR structure - @param[in] numTaps number of nonzero coefficients in the filter - @param[in] pCoeffs points to the array of filter coefficients - @param[in] pState points to the state buffer - @param[in] pTapDelay points to the array of offset times - @param[in] maxDelay maximum offset time supported - @param[in] blockSize number of samples that will be processed per block - @return none - - @par Details - pCoeffs holds the filter coefficients and has length numTaps. - pState holds the filter's state variables and must be of length - maxDelay + blockSize, where maxDelay - is the maximum number of delay line values. - blockSize is the - number of samples processed by the arm_fir_sparse_q7() function. - */ - -void arm_fir_sparse_init_q7( - arm_fir_sparse_instance_q7 * S, - uint16_t numTaps, - const q7_t * pCoeffs, - q7_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Assign TapDelay pointer */ - S->pTapDelay = pTapDelay; - - /* Assign MaxDelay */ - S->maxDelay = maxDelay; - - /* reset the stateIndex to 0 */ - S->stateIndex = 0U; - - /* Clear state buffer and size is always maxDelay + blockSize */ - memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of FIR_Sparse group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c deleted file mode 100644 index 5ed9b22..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c +++ /dev/null @@ -1,341 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_sparse_q15.c - * Description: Q15 sparse FIR filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Sparse - @{ - */ - -/** - @brief Processing function for the Q15 sparse FIR filter. - @param[in] S points to an instance of the Q15 sparse FIR structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] pScratchIn points to a temporary buffer of size blockSize - @param[in] pScratchOut points to a temporary buffer of size blockSize - @param[in] blockSize number of input samples to process per call - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 32-bit accumulator. - The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator. - Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator. - If the accumulator result overflows it will wrap around rather than saturate. - After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format. - In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits. - */ - -void arm_fir_sparse_q15( - arm_fir_sparse_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - q15_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *px; /* Temporary pointers for scratch buffer */ - q15_t *py = pState; /* Temporary pointers for state buffer */ - q15_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - q15_t *pOut = pDst; /* Working pointer for output */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */ - q15_t coeff = *pCoeffs++; /* Read the first coefficient value */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t in1, in2; /* Temporary variables */ -#endif - - /* BlockSize of Input samples are copied into the state buffer */ - /* StateIndex points to the starting position to write in the state buffer */ - arm_circularWrite_q15(py, (int32_t) delaySize, &S->stateIndex, 1,pSrc, 1, blockSize); - - /* Loop over the number of taps. */ - tapCnt = numTaps; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1, - pb, pb, (int32_t) blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform multiplication and store in the scratch buffer */ - *pScratchOut++ = ((q31_t) *px++ * coeff); - *pScratchOut++ = ((q31_t) *px++ * coeff); - *pScratchOut++ = ((q31_t) *px++ * coeff); - *pScratchOut++ = ((q31_t) *px++ * coeff); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiplication and store in the scratch buffer */ - *pScratchOut++ = ((q31_t) *px++ * coeff); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 2U; - - while (tapCnt > 0U) - { - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1, - pb, pb, (int32_t) blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - *pScratchOut++ += (q31_t) *px++ * coeff; - *pScratchOut++ += (q31_t) *px++ * coeff; - *pScratchOut++ += (q31_t) *px++ * coeff; - *pScratchOut++ += (q31_t) *px++ * coeff; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - *pScratchOut++ += (q31_t) *px++ * coeff; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement loop counter */ - tapCnt--; - } - - /* Compute last tap without the final read of pTapDelay */ - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1, - pb, pb, (int32_t) blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - *pScratchOut++ += (q31_t) *px++ * coeff; - *pScratchOut++ += (q31_t) *px++ * coeff; - *pScratchOut++ += (q31_t) *px++ * coeff; - *pScratchOut++ += (q31_t) *px++ * coeff; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - *pScratchOut++ += (q31_t) *px++ * coeff; - - /* Decrement loop counter */ - blkCnt--; - } - - /* All the output values are in pScratchOut buffer. - Convert them into 1.15 format, saturate and store in the destination buffer. */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - in1 = *pScr2++; - in2 = *pScr2++; - -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16)); -#else - write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pScr2++; - in2 = *pScr2++; - -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16)); -#else - write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of FIR_Sparse group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c deleted file mode 100644 index 96b1339..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c +++ /dev/null @@ -1,357 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_sparse_q31.c - * Description: Q31 sparse FIR filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Sparse - @{ - */ - -/** - @brief Processing function for the Q31 sparse FIR filter. - @param[in] S points to an instance of the Q31 sparse FIR structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] pScratchIn points to a temporary buffer of size blockSize - @param[in] blockSize number of input samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 32-bit accumulator. - The 1.31 x 1.31 multiplications are truncated to 2.30 format. - This leads to loss of precision on the intermediate multiplications and provides only a single guard bit. - If the accumulator result overflows, it wraps around rather than saturate. - In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits. - */ - -void arm_fir_sparse_q31( - arm_fir_sparse_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - q31_t * pScratchIn, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *px; /* Scratch buffer pointer */ - q31_t *py = pState; /* Temporary pointers for state buffer */ - q31_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - q31_t *pOut; /* Destination pointer */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - q31_t coeff = *pCoeffs++; /* Read the first coefficient value */ - q31_t in; - q63_t out; /* Temporary output variable */ - - - /* BlockSize of Input samples are copied into the state buffer */ - /* StateIndex points to the starting position to write in the state buffer */ - arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, - (int32_t *) pSrc, 1, blockSize); - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pOut = pDst; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform Multiplications and store in destination buffer */ - *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32); - - *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32); - - *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32); - - *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiplication and store in destination buffer */ - *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 2U; - - while (tapCnt > 0U) - { - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pOut = pDst; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - out = *pOut; - out += ((q63_t) *px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - out = *pOut; - out += ((q63_t) *px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - out = *pOut; - out += ((q63_t) *px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - out = *pOut; - out += ((q63_t) *px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - out = *pOut; - out += ((q63_t) *px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement tap loop counter */ - tapCnt--; - } - - /* Compute last tap without the final read of pTapDelay */ - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1, - (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pOut = pDst; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - out = *pOut; - out += ((q63_t) * px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - out = *pOut; - out += ((q63_t) * px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - out = *pOut; - out += ((q63_t) * px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - out = *pOut; - out += ((q63_t) * px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - out = *pOut; - out += ((q63_t) *px++ * coeff) >> 32; - *pOut++ = (q31_t) (out); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Working output pointer is updated */ - pOut = pDst; - - /* Output is converted into 1.31 format. */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - in = *pOut << 1; - *pOut++ = in; - in = *pOut << 1; - *pOut++ = in; - in = *pOut << 1; - *pOut++ = in; - in = *pOut << 1; - *pOut++ = in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - in = *pOut << 1; - *pOut++ = in; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of FIR_Sparse group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c deleted file mode 100644 index 221065b..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c +++ /dev/null @@ -1,341 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fir_sparse_q7.c - * Description: Q7 sparse FIR filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup FIR_Sparse - @{ - */ - -/** - @brief Processing function for the Q7 sparse FIR filter. - @param[in] S points to an instance of the Q7 sparse FIR structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] pScratchIn points to a temporary buffer of size blockSize - @param[in] pScratchOut points to a temporary buffer of size blockSize - @param[in] blockSize number of input samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 32-bit internal accumulator. - Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. - The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. - There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - The accumulator is then converted to 18.7 format by discarding the low 7 bits. - Finally, the result is truncated to 1.7 format. - */ - -void arm_fir_sparse_q7( - arm_fir_sparse_instance_q7 * S, - const q7_t * pSrc, - q7_t * pDst, - q7_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize) -{ - q7_t *pState = S->pState; /* State pointer */ - const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q7_t *px; /* Scratch buffer pointer */ - q7_t *py = pState; /* Temporary pointers for state buffer */ - q7_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - q7_t *pOut = pDst; /* Destination pointer */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */ - q31_t in; - q7_t coeff = *pCoeffs++; /* Read the coefficient value */ - -#if defined (ARM_MATH_LOOPUNROLL) - q7_t in1, in2, in3, in4; -#endif - - /* BlockSize of Input samples are copied into the state buffer */ - /* StateIndex points to the starting position to write in the state buffer */ - arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1, blockSize); - - /* Loop over the number of taps. */ - tapCnt = numTaps; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, - pb, pb, (int32_t) blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform multiplication and store in the scratch buffer */ - *pScratchOut++ = ((q31_t) *px++ * coeff); - *pScratchOut++ = ((q31_t) *px++ * coeff); - *pScratchOut++ = ((q31_t) *px++ * coeff); - *pScratchOut++ = ((q31_t) *px++ * coeff); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiplication and store in the scratch buffer */ - *pScratchOut++ = ((q31_t) *px++ * coeff); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Loop over the number of taps. */ - tapCnt = (uint32_t) numTaps - 2U; - - while (tapCnt > 0U) - { - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, - pb, pb, (int32_t) blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - in = *pScratchOut + ((q31_t) * px++ * coeff); - *pScratchOut++ = in; - in = *pScratchOut + ((q31_t) * px++ * coeff); - *pScratchOut++ = in; - in = *pScratchOut + ((q31_t) * px++ * coeff); - *pScratchOut++ = in; - in = *pScratchOut + ((q31_t) * px++ * coeff); - *pScratchOut++ = in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - in = *pScratchOut + ((q31_t) *px++ * coeff); - *pScratchOut++ = in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Load the coefficient value and - * increment the coefficient buffer for the next set of state values */ - coeff = *pCoeffs++; - - /* Read Index, from where the state buffer should be read, is calculated. */ - readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++; - - /* Wraparound of readIndex */ - if (readIndex < 0) - { - readIndex += (int32_t) delaySize; - } - - /* Decrement loop counter */ - tapCnt--; - } - - /* Compute last tap without the final read of pTapDelay */ - - /* Working pointer for state buffer is updated */ - py = pState; - - /* blockSize samples are read from the state buffer */ - arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, - pb, pb, (int32_t) blockSize, 1, blockSize); - - /* Working pointer for the scratch buffer of state values */ - px = pb; - - /* Working pointer for scratch buffer of output values */ - pScratchOut = pScr2; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - in = *pScratchOut + ((q31_t) *px++ * coeff); - *pScratchOut++ = in; - in = *pScratchOut + ((q31_t) *px++ * coeff); - *pScratchOut++ = in; - in = *pScratchOut + ((q31_t) *px++ * coeff); - *pScratchOut++ = in; - in = *pScratchOut + ((q31_t) *px++ * coeff); - *pScratchOut++ = in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Perform Multiply-Accumulate */ - in = *pScratchOut + ((q31_t) *px++ * coeff); - *pScratchOut++ = in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* All the output values are in pScratchOut buffer. - Convert them into 1.15 format, saturate and store in the destination buffer. */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time. */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8); - in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8); - in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8); - in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8); - - write_q7x4_ia (&pOut, __PACKq7(in1, in2, in3, in4)); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8); - - /* Decrement loop counter */ - blkCnt--; - } - -} - -/** - @} end of FIR_Sparse group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c deleted file mode 100644 index 6a64e66..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c +++ /dev/null @@ -1,354 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_iir_lattice_f32.c - * Description: Floating-point IIR Lattice filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters - - This set of functions implements lattice filters - for Q15, Q31 and floating-point data types. Lattice filters are used in a - variety of adaptive filter applications. The filter structure has feedforward and - feedback components and the net impulse response is infinite length. - The functions operate on blocks - of input and output data and each call to the function processes - blockSize samples through the filter. pSrc and - pDst point to input and output arrays containing blockSize values. - - @par Algorithm - \image html IIRLattice.gif "Infinite Impulse Response Lattice filter" - @par - 
-      fN(n)   = x(n)
-      fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ..., 1
-      gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ..., 1
-      y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
-
- @par - pkCoeffs points to array of reflection coefficients of size numStages. - Reflection Coefficients are stored in time-reversed order. - @par - 
-     {kN, kN-1, ..., k1}
-
- @par - pvCoeffs points to the array of ladder coefficients of size (numStages+1). - Ladder coefficients are stored in time-reversed order. - 
-      {vN, vN-1, ..., v0}
-
- @par - pState points to a state array of size numStages + blockSize. - The state variables shown in the figure above (the g values) are stored in the pState array. - The state variables are updated after each block of data is processed; the coefficients are untouched. - - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter. - Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. - There are separate instance structure declarations for each of the 3 supported data types. - - @par Initialization Functions - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero. - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - Set the values in the state buffer to zeros and then manually initialize the instance structure as follows: - 
-      arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
-      arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
-      arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
-
- @par - where numStages is the number of stages in the filter; pState points to the state buffer array; - pkCoeffs points to array of the reflection coefficients; pvCoeffs points to the array of ladder coefficients. - - @par Fixed-Point Behavior - Care must be taken when using the fixed-point versions of the IIR lattice filter functions. - In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - Refer to the function specific documentation below for usage guidelines. - */ - -/** - @addtogroup IIR_Lattice - @{ - */ - -/** - @brief Processing function for the floating-point IIR lattice filter. - @param[in] S points to an instance of the floating-point IIR lattice structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - */ - -void arm_iir_lattice_f32( - const arm_iir_lattice_instance_f32 * S, - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pStateCur; /* State current pointer */ - float32_t acc; /* Accumlator */ - float32_t fnext1, fnext2, gcurr1, gnext; /* Temporary variables for lattice stages */ - float32_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */ - uint32_t numStages = S->numStages; /* Number of stages */ - uint32_t blkCnt, tapCnt; /* Temporary variables for counts */ - -#if defined (ARM_MATH_LOOPUNROLL) - float32_t gcurr2; /* Temporary variables for lattice stages */ - float32_t k1, k2; - float32_t v1, v2, v3, v4; -#endif - - /* initialise loop count */ - blkCnt = blockSize; - - /* Sample processing */ - while (blkCnt > 0U) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fnext2 = *pSrc++; - - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - /* Initialize state read pointer */ - px1 = pState; - - /* Initialize state write pointer */ - px2 = pState; - - /* Set accumulator to zero */ - acc = 0.0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = (numStages) >> 2U; - - while (tapCnt > 0U) - { - /* Read gN-1(n-1) from state buffer */ - gcurr1 = *px1; - - /* read reflection coefficient kN */ - k1 = *pk; - - /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ - fnext1 = fnext2 - (k1 * gcurr1); - - /* read ladder coefficient vN */ - v1 = *pv; - - /* read next reflection coefficient kN-1 */ - k2 = *(pk + 1U); - - /* Read gN-2(n-1) from state buffer */ - gcurr2 = *(px1 + 1U); - - /* read next ladder coefficient vN-1 */ - v2 = *(pv + 1U); - - /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */ - fnext2 = fnext1 - (k2 * gcurr2); - - /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ - gnext = gcurr1 + (k1 * fnext1); - - /* read reflection coefficient kN-2 */ - k1 = *(pk + 2U); - - /* write gN(n) into state for next sample processing */ - *px2++ = gnext; - - /* Read gN-3(n-1) from state buffer */ - gcurr1 = *(px1 + 2U); - - /* y(n) += gN(n) * vN */ - acc += (gnext * v1); - - /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */ - fnext1 = fnext2 - (k1 * gcurr1); - - /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */ - gnext = gcurr2 + (k2 * fnext2); - - /* Read gN-4(n-1) from state buffer */ - gcurr2 = *(px1 + 3U); - - /* y(n) += gN-1(n) * vN-1 */ - acc += (gnext * v2); - - /* read reflection coefficient kN-3 */ - k2 = *(pk + 3U); - - /* write gN-1(n) into state for next sample processing */ - *px2++ = gnext; - - /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */ - fnext2 = fnext1 - (k2 * gcurr2); - - /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */ - gnext = gcurr1 + (k1 * fnext1); - - /* read ladder coefficient vN-2 */ - v3 = *(pv + 2U); - - /* y(n) += gN-2(n) * vN-2 */ - acc += (gnext * v3); - - /* write gN-2(n) into state for next sample processing */ - *px2++ = gnext; - - /* update pointer */ - pk += 4U; - - /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */ - gnext = (fnext2 * k2) + gcurr2; - - /* read next ladder coefficient vN-3 */ - v4 = *(pv + 3U); - - /* y(n) += gN-4(n) * vN-4 */ - acc += (gnext * v4); - - /* write gN-3(n) into state for next sample processing */ - *px2++ = gnext; - - /* update pointers */ - px1 += 4U; - pv += 4U; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numStages % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numStages; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - gcurr1 = *px1++; - /* Process sample for last taps */ - fnext1 = fnext2 - ((*pk) * gcurr1); - gnext = (fnext1 * (*pk++)) + gcurr1; - /* Output samples for last taps */ - acc += (gnext * (*pv++)); - *px2++ = gnext; - fnext2 = fnext1; - - /* Decrement loop counter */ - tapCnt--; - } - - /* y(n) += g0(n) * v0 */ - acc += (fnext2 * (*pv)); - - *px2++ = fnext2; - - /* write out into pDst */ - *pDst++ = acc; - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - - /* Points to the start of the state buffer */ - pStateCur = &S->pState[0]; - pState = &S->pState[blockSize]; - - /* Copy data */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numStages >> 2U; - - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numStages % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - tapCnt = numStages; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} - -/** - @} end of IIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c deleted file mode 100644 index 82262a2..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c +++ /dev/null @@ -1,77 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_iir_lattice_init_f32.c - * Description: Floating-point IIR lattice filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup IIR_Lattice - @{ - */ - -/** - @brief Initialization function for the floating-point IIR lattice filter. - @param[in] S points to an instance of the floating-point IIR lattice structure - @param[in] numStages number of stages in the filter - @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages - @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1 - @param[in] pState points to state buffer. The array is of length numStages+blockSize - @param[in] blockSize number of samples to process - @return none - */ - -void arm_iir_lattice_init_f32( - arm_iir_lattice_instance_f32 * S, - uint16_t numStages, - float32_t * pkCoeffs, - float32_t * pvCoeffs, - float32_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign reflection coefficient pointer */ - S->pkCoeffs = pkCoeffs; - - /* Assign ladder coefficient pointer */ - S->pvCoeffs = pvCoeffs; - - /* Clear state buffer and size is always blockSize + numStages */ - memset(pState, 0, (numStages + blockSize) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of IIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c deleted file mode 100644 index 6163573..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c +++ /dev/null @@ -1,77 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_iir_lattice_init_q15.c - * Description: Q15 IIR lattice filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup IIR_Lattice - @{ - */ - -/** - @brief Initialization function for the Q15 IIR lattice filter. - @param[in] S points to an instance of the Q15 IIR lattice structure - @param[in] numStages number of stages in the filter - @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages - @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1 - @param[in] pState points to state buffer. The array is of length numStages+blockSize - @param[in] blockSize number of samples to process - @return none - */ - -void arm_iir_lattice_init_q15( - arm_iir_lattice_instance_q15 * S, - uint16_t numStages, - q15_t * pkCoeffs, - q15_t * pvCoeffs, - q15_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign reflection coefficient pointer */ - S->pkCoeffs = pkCoeffs; - - /* Assign ladder coefficient pointer */ - S->pvCoeffs = pvCoeffs; - - /* Clear state buffer and size is always blockSize + numStages */ - memset(pState, 0, (numStages + blockSize) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of IIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c deleted file mode 100644 index eb5831c..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c +++ /dev/null @@ -1,77 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_iir_lattice_init_q31.c - * Description: Initialization function for the Q31 IIR lattice filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup IIR_Lattice - @{ - */ - -/** - @brief Initialization function for the Q31 IIR lattice filter. - @param[in] S points to an instance of the Q31 IIR lattice structure - @param[in] numStages number of stages in the filter - @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages - @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1 - @param[in] pState points to state buffer. The array is of length numStages+blockSize - @param[in] blockSize number of samples to process - @return none - */ - -void arm_iir_lattice_init_q31( - arm_iir_lattice_instance_q31 * S, - uint16_t numStages, - q31_t * pkCoeffs, - q31_t * pvCoeffs, - q31_t * pState, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numStages = numStages; - - /* Assign reflection coefficient pointer */ - S->pkCoeffs = pkCoeffs; - - /* Assign ladder coefficient pointer */ - S->pvCoeffs = pvCoeffs; - - /* Clear state buffer and size is always blockSize + numStages */ - memset(pState, 0, (numStages + blockSize) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; -} - -/** - @} end of IIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c deleted file mode 100644 index afd5906..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c +++ /dev/null @@ -1,396 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_iir_lattice_q15.c - * Description: Q15 IIR Lattice filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup IIR_Lattice - @{ - */ - -/** - @brief Processing function for the Q15 IIR lattice filter. - @param[in] S points to an instance of the Q15 IIR lattice structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - Lastly, the accumulator is saturated to yield a result in 1.15 format. - */ - -void arm_iir_lattice_q15( - const arm_iir_lattice_instance_q15 * S, - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pStateCur; /* State current pointer */ - q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */ - q63_t acc; /* Accumlator */ - q15_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */ - uint32_t numStages = S->numStages; /* Number of stages */ - uint32_t blkCnt, tapCnt; /* Temporary variables for counts */ - q15_t out; /* Temporary variable for output */ - -#if defined (ARM_MATH_DSP) && defined (ARM_MATH_LOOPUNROLL) - q15_t gnext1, gnext2; /* Temporary variables for lattice stages */ - q31_t v; /* Temporary variable for ladder coefficient */ -#endif - - /* initialise loop count */ - blkCnt = blockSize; - -#if defined (ARM_MATH_DSP) - - /* Sample processing */ - while (blkCnt > 0U) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - /* Initialize state read pointer */ - px1 = pState; - - /* Initialize state write pointer */ - px2 = pState; - - /* Set accumulator to zero */ - acc = 0; - - /* Process sample for first tap */ - gcurr = *px1++; - /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ - fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); - fnext = __SSAT(fnext, 16); - - /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ - gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; - gnext = __SSAT(gnext, 16); - - /* write gN(n) into state for next sample processing */ - *px2++ = (q15_t) gnext; - - /* y(n) += gN(n) * vN */ - acc += (q31_t) ((gnext * (*pv++))); - - /* Update f values for next coefficient processing */ - fcurr = fnext; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = (numStages - 1U) >> 2U; - - while (tapCnt > 0U) - { - /* Process sample for 2nd, 6th ...taps */ - /* Read gN-2(n-1) from state buffer */ - gcurr = *px1++; - /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */ - fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); - fnext = __SSAT(fnext, 16); - /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */ - gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; - gnext1 = (q15_t) __SSAT(gnext, 16); - /* write gN-1(n) into state for next sample processing */ - *px2++ = (q15_t) gnext1; - - /* Process sample for 3nd, 7th ...taps */ - /* Read gN-3(n-1) from state buffer */ - gcurr = *px1++; - /* Process sample for 3rd, 7th .. taps */ - /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */ - fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15); - fcurr = __SSAT(fcurr, 16); - /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */ - gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr; - gnext2 = (q15_t) __SSAT(gnext, 16); - /* write gN-2(n) into state */ - *px2++ = (q15_t) gnext2; - - /* Read vN-1 and vN-2 at a time */ - v = read_q15x2_ia (&pv); - - /* Pack gN-1(n) and gN-2(n) */ - -#ifndef ARM_MATH_BIG_ENDIAN - gnext = __PKHBT(gnext1, gnext2, 16); -#else - gnext = __PKHBT(gnext2, gnext1, 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* y(n) += gN-1(n) * vN-1 */ - /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */ - /* y(n) += gN-2(n) * vN-2 */ - /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */ - acc = __SMLALD(gnext, v, acc); - - /* Process sample for 4th, 8th ...taps */ - /* Read gN-4(n-1) from state buffer */ - gcurr = *px1++; - /* Process sample for 4th, 8th .. taps */ - /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */ - fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); - fnext = __SSAT(fnext, 16); - /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */ - gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; - gnext1 = (q15_t) __SSAT(gnext, 16); - /* write gN-3(n) for the next sample process */ - *px2++ = (q15_t) gnext1; - - /* Process sample for 5th, 9th ...taps */ - /* Read gN-5(n-1) from state buffer */ - gcurr = *px1++; - /* Process sample for 5th, 9th .. taps */ - /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */ - fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15); - fcurr = __SSAT(fcurr, 16); - /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */ - gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr; - gnext2 = (q15_t) __SSAT(gnext, 16); - /* write gN-4(n) for the next sample process */ - *px2++ = (q15_t) gnext2; - - /* Read vN-3 and vN-4 at a time */ - v = read_q15x2_ia (&pv); - - /* Pack gN-3(n) and gN-4(n) */ -#ifndef ARM_MATH_BIG_ENDIAN - gnext = __PKHBT(gnext1, gnext2, 16); -#else - gnext = __PKHBT(gnext2, gnext1, 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* y(n) += gN-4(n) * vN-4 */ - /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */ - /* y(n) += gN-3(n) * vN-3 */ - /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */ - acc = __SMLALD(gnext, v, acc); - - /* Decrement loop counter */ - tapCnt--; - } - - fnext = fcurr; - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numStages - 1U) % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - tapCnt = (numStages - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - gcurr = *px1++; - /* Process sample for last taps */ - fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15); - fnext = __SSAT(fnext, 16); - gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr; - gnext = __SSAT(gnext, 16); - - /* Output samples for last taps */ - acc += (q31_t) (((q31_t) gnext * (*pv++))); - *px2++ = (q15_t) gnext; - fcurr = fnext; - - /* Decrement loop counter */ - tapCnt--; - } - - /* y(n) += g0(n) * v0 */ - acc += (q31_t) (((q31_t) fnext * (*pv++))); - - out = (q15_t) __SSAT(acc >> 15, 16); - *px2++ = (q15_t) fnext; - - /* write out into pDst */ - *pDst++ = out; - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - - /* Points to the start of the state buffer */ - pStateCur = &S->pState[0]; - pState = &S->pState[blockSize]; - - /* copy data */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numStages >> 2U; - - while (tapCnt > 0U) - { - write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); - write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState)); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numStages % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - tapCnt = (numStages - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -#else /* #if defined (ARM_MATH_DSP) */ - - /* Sample processing */ - while (blkCnt > 0U) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - /* Initialize state read pointer */ - px1 = pState; - - /* Initialize state write pointer */ - px2 = pState; - - /* Set accumulator to zero */ - acc = 0; - - tapCnt = numStages; - - while (tapCnt > 0U) - { - gcurr = *px1++; - /* Process sample */ - /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ - fnext = fcurr - ((gcurr * (*pk)) >> 15); - fnext = __SSAT(fnext, 16); - - /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ - gnext = ((fnext * (*pk++)) >> 15) + gcurr; - gnext = __SSAT(gnext, 16); - - /* Output samples */ - /* y(n) += gN(n) * vN */ - acc += (q31_t) ((gnext * (*pv++))); - - /* write gN(n) into state for next sample processing */ - *px2++ = (q15_t) gnext; - - /* Update f values for next coefficient processing */ - fcurr = fnext; - - tapCnt--; - } - - /* y(n) += g0(n) * v0 */ - acc += (q31_t) ((fnext * (*pv++))); - - out = (q15_t) __SSAT(acc >> 15, 16); - *px2++ = (q15_t) fnext; - - /* write out into pDst */ - *pDst++ = out; - - /* Advance the state pointer by 1 to process the next group of samples */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - - /* Points to the start of the state buffer */ - pStateCur = &S->pState[0]; - pState = &S->pState[blockSize]; - - tapCnt = numStages; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -#endif /* #if defined (ARM_MATH_DSP) */ - -} - -/** - @} end of IIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c deleted file mode 100644 index d0379cc..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c +++ /dev/null @@ -1,356 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_iir_lattice_q31.c - * Description: Q31 IIR Lattice filter processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup IIR_Lattice - @{ - */ - -/** - @brief Processing function for the Q31 IIR lattice filter. - @param[in] S points to an instance of the Q31 IIR lattice structure - @param[in] pSrc points to the block of input data - @param[out] pDst points to the block of output data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around rather than clip. - In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits. - After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format. - */ - -void arm_iir_lattice_q31( - const arm_iir_lattice_instance_q31 * S, - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - q31_t *pStateCur; /* State current pointer */ - q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */ - q63_t acc; /* Accumlator */ - q31_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */ - uint32_t numStages = S->numStages; /* Number of stages */ - uint32_t blkCnt, tapCnt; /* Temporary variables for counts */ - - - /* initialise loop count */ - blkCnt = blockSize; - -#if defined (ARM_MATH_DSP) - - /* Sample processing */ - while (blkCnt > 0U) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - /* Initialize state read pointer */ - px1 = pState; - - /* Initialize state write pointer */ - px2 = pState; - - /* Set accumulator to zero */ - acc = 0; - - /* Process sample for first tap */ - gcurr = *px1++; - /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ - fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); - - /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ - gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); - - /* write gN-1(n-1) into state for next sample processing */ - *px2++ = gnext; - - /* y(n) += gN(n) * vN */ - acc += ((q63_t) gnext * *pv++); - - /* Update f values for next coefficient processing */ - fcurr = fnext; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = (numStages - 1U) >> 2U; - - while (tapCnt > 0U) - { - /* Process sample for 2nd, 6th ...taps */ - /* Read gN-2(n-1) from state buffer */ - gcurr = *px1++; - /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */ - fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); - /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */ - gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); - /* y(n) += gN-1(n) * vN-1 */ - /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */ - acc += ((q63_t) gnext * *pv++); - /* write gN-1(n) into state for next sample processing */ - *px2++ = gnext; - - /* Process sample for 3nd, 7th ...taps */ - /* Read gN-3(n-1) from state buffer */ - gcurr = *px1++; - /* Process sample for 3rd, 7th .. taps */ - /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */ - fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); - /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */ - gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31)); - /* y(n) += gN-2(n) * vN-2 */ - /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */ - acc += ((q63_t) gnext * *pv++); - /* write gN-2(n) into state for next sample processing */ - *px2++ = gnext; - - /* Process sample for 4th, 8th ...taps */ - /* Read gN-4(n-1) from state buffer */ - gcurr = *px1++; - /* Process sample for 4th, 8th .. taps */ - /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */ - fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); - /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */ - gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); - /* y(n) += gN-3(n) * vN-3 */ - /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */ - acc += ((q63_t) gnext * *pv++); - /* write gN-3(n) into state for next sample processing */ - *px2++ = gnext; - - /* Process sample for 5th, 9th ...taps */ - /* Read gN-5(n-1) from state buffer */ - gcurr = *px1++; - /* Process sample for 5th, 9th .. taps */ - /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */ - fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); - /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */ - gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31)); - /* y(n) += gN-4(n) * vN-4 */ - /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */ - acc += ((q63_t) gnext * *pv++); - - /* write gN-4(n) into state for next sample processing */ - *px2++ = gnext; - - /* Decrement loop counter */ - tapCnt--; - } - - fnext = fcurr; - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numStages - 1U) % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - tapCnt = (numStages - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - gcurr = *px1++; - /* Process sample for last taps */ - fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk )) >> 31)); - gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31)); - - /* Output samples for last taps */ - acc += ((q63_t) gnext * *pv++); - *px2++ = gnext; - fcurr = fnext; - - /* Decrement loop counter */ - tapCnt--; - } - - /* y(n) += g0(n) * v0 */ - acc += ((q63_t) fnext * *pv++); - - *px2++ = fnext; - - /* write out into pDst */ - *pDst++ = (q31_t) (acc >> 31U); - - /* Advance the state pointer by 4 to process the next group of 4 samples */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - - /* Points to the start of the state buffer */ - pStateCur = &S->pState[0]; - pState = &S->pState[blockSize]; - - /* Copy data */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numStages >> 2U; - - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numStages % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - tapCnt = (numStages - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -#else /* #if defined (ARM_MATH_DSP) */ - - /* Sample processing */ - while (blkCnt > 0U) - { - /* Read Sample from input buffer */ - /* fN(n) = x(n) */ - fcurr = *pSrc++; - - /* Initialize Ladder coeff pointer */ - pv = &S->pvCoeffs[0]; - - /* Initialize Reflection coeff pointer */ - pk = &S->pkCoeffs[0]; - - /* Initialize state read pointer */ - px1 = pState; - - /* Initialize state write pointer */ - px2 = pState; - - /* Set accumulator to zero */ - acc = 0; - - tapCnt = numStages; - - while (tapCnt > 0U) - { - gcurr = *px1++; - /* Process sample */ - /* fN-1(n) = fN(n) - kN * gN-1(n-1) */ - fnext = clip_q63_to_q31(((q63_t) fcurr - ((q31_t) (((q63_t) gcurr * (*pk )) >> 31)))); - - /* gN(n) = kN * fN-1(n) + gN-1(n-1) */ - gnext = clip_q63_to_q31(((q63_t) gcurr + ((q31_t) (((q63_t) fnext * (*pk++)) >> 31)))); - - /* Output samples */ - /* y(n) += gN(n) * vN */ - acc += ((q63_t) gnext * *pv++); - - /* write gN-1(n-1) into state for next sample processing */ - *px2++ = gnext; - - /* Update f values for next coefficient processing */ - fcurr = fnext; - - tapCnt--; - } - - /* y(n) += g0(n) * v0 */ - acc += ((q63_t) fnext * *pv++); - - *px2++ = fnext; - - /* write out into pDst */ - *pDst++ = (q31_t) (acc >> 31U); - - /* Advance the state pointer by 1 to process the next group of samples */ - pState = pState + 1U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. Now copy last S->numStages samples to start of the buffer - for the preperation of next frame process */ - - /* Points to the start of the state buffer */ - pStateCur = &S->pState[0]; - pState = &S->pState[blockSize]; - - tapCnt = numStages; - - /* Copy data */ - while (tapCnt > 0U) - { - *pStateCur++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -#endif /* #if defined (ARM_MATH_DSP) */ - -} - -/** - @} end of IIR_Lattice group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f16.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f16.c deleted file mode 100644 index c5fa6ef..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f16.c +++ /dev/null @@ -1,276 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_levinson_durbin_f16.c - * Description: f16 version of Levinson Durbin algorithm - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions_f16.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup LD Levinson Durbin Algorithm - - */ - -/** - @addtogroup LD - @{ - */ - -/** - @brief Levinson Durbin - @param[in] phi autocovariance vector starting with lag 0 (length is nbCoefs + 1) - @param[out] a autoregressive coefficients - @param[out] err prediction error (variance) - @param[in] nbCoefs number of autoregressive coefficients - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H) -#pragma GCC warning "Scalar version of arm_levinson_durbin_f16 built. Helium version has build issues with gcc." -#endif - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && !defined(__CMSIS_GCC_H) - -#include "arm_helium_utils.h" - -#define LANE4567_MASK 0xFF00 - -void arm_levinson_durbin_f16(const float16_t *phi, - float16_t *a, - float16_t *err, - int nbCoefs) -{ - _Float16 e; - static const uint16_t revOffsetArray[8] = {7,6,5,4,3,2,1,0}; - - a[0] = (_Float16)phi[1] / (_Float16)phi[0]; - - e = (_Float16)phi[0] - (_Float16)phi[1] * (_Float16)a[0]; - for(int p=1; p < nbCoefs; p++) - { - _Float16 suma = 0.0f16; - _Float16 sumb = 0.0f16; - f16x8_t vecA,vecRevPhi,vecPhi,vecSumA, vecSumB; - _Float16 k; - uint32_t blkCnt; - const float16_t *pPhi,*pRevPhi,*pA; - uint16x8_t revOffset; - - int nb,j,i; - - revOffset = vld1q(revOffsetArray); - vecSumA = vdupq_n_f16(0.0f16); - vecSumB = vdupq_n_f16(0.0f16); - - pRevPhi = &phi[p-7]; - pPhi = &phi[1]; - pA = a; - - i = 0; - blkCnt = p >> 3; - while(blkCnt > 0) - { - vecA = vld1q(pA); - pA += 8; - - vecPhi = vld1q(pPhi); - pPhi += 8; - - vecRevPhi = vldrhq_gather_shifted_offset_f16(pRevPhi,revOffset); - pRevPhi -= 8; - - vecSumA = vfmaq(vecSumA,vecA,vecRevPhi); - vecSumB = vfmaq(vecSumB,vecA,vecPhi); - - i += 8; - blkCnt--; - - } - - suma = vecAddAcrossF16Mve(vecSumA); - sumb = vecAddAcrossF16Mve(vecSumB); - - blkCnt = p & 7; - while(blkCnt > 0) - { - suma += (_Float16)a[i] * (_Float16)phi[p - i]; - sumb += (_Float16)a[i] * (_Float16)phi[i + 1]; - - i++; - blkCnt--; - } - - k = ((_Float16)phi[p+1] - suma)/((_Float16)phi[0] - sumb); - - f16x8_t vecRevA,tmp; - static int16_t orgOffsetArray[8]={0,1,2,3,-1,-2,-3,-4}; - static const int16_t offsetIncArray[8]={4,4,4,4,-4,-4,-4,-4}; - - uint16x8_t offset,offsetInc,vecTmp; - - - offset = vld1q_u16((uint16_t*)orgOffsetArray); - vecTmp = vdupq_n_u16(p); - - offset = vaddq_m_u16(offset,offset,vecTmp,LANE4567_MASK); - offsetInc = vld1q_u16((uint16_t*)offsetIncArray); - - nb = p >> 3; - j=0; - for(int i = 0; i < nb ; i++) - { - - /* - x0=a[j] - k * a[p-1-j]; - x1=a[j+1] - k * a[p-2-j]; - x3=a[p-1-j] - k * a[j]; - x4=a[p-2-j] - k * a[j+1]; - - a[j] = x0; - a[j+1] = x1; - a[p-1-j] = x2; - a[p-2-j] = x3; - */ - - uint64_t tmpa,tmpb; - vecA = vldrhq_gather_shifted_offset_f16(a,offset); - - - tmpa = vgetq_lane_u64((uint64x2_t)vecA,0); - tmpb = vgetq_lane_u64((uint64x2_t)vecA,1); - vecRevA = (f16x8_t) vsetq_lane_u64(tmpb,(uint64x2_t)vecRevA,0); - vecRevA = (f16x8_t) vsetq_lane_u64(tmpa,(uint64x2_t)vecRevA,1); - - - tmp = vsubq(vecA,vmulq_n_f16(vecRevA,k)); - vstrhq_scatter_shifted_offset_f16(a, offset, tmp); - - offset = vaddq(offset,offsetInc); - - j+=4; - - } - - blkCnt = p & 7; - - if (blkCnt) - { - nb = blkCnt >> 1; - for(int i =0;i < nb ; i++) - { - _Float16 x,y; - - x=(_Float16)a[j] - (_Float16)k * (_Float16)a[p-1-j]; - y=(_Float16)a[p-1-j] - (_Float16)k * (_Float16)a[j]; - - a[j] = x; - a[p-1-j] = y; - - j++; - } - - nb = blkCnt & 1; - if (nb) - { - a[j]=(_Float16)a[j]- (_Float16)k * (_Float16)a[p-1-j]; - } - } - - - a[p] = k; - e = e * (1.0f16 - k*k); - - - } - *err = e; -} - -#else - -#if defined(ARM_FLOAT16_SUPPORTED) - -void arm_levinson_durbin_f16(const float16_t *phi, - float16_t *a, - float16_t *err, - int nbCoefs) -{ - _Float16 e; - - a[0] = (_Float16)phi[1] / (_Float16)phi[0]; - - e = (_Float16)phi[0] - (_Float16)phi[1] * (_Float16)a[0]; - for(int p=1; p < nbCoefs; p++) - { - _Float16 suma=0.0f16; - _Float16 sumb=0.0f16; - _Float16 k; - int nb,j; - - for(int i=0; i < p; i++) - { - suma += (_Float16)a[i] * (_Float16)phi[p - i]; - sumb += (_Float16)a[i] * (_Float16)phi[i + 1]; - } - - k = ((_Float16)phi[p+1]-suma)/((_Float16)phi[0] - sumb); - - - nb = p >> 1; - j=0; - for(int i =0;i < nb ; i++) - { - _Float16 x,y; - - x=(_Float16)a[j] - (_Float16)k * (_Float16)a[p-1-j]; - y=(_Float16)a[p-1-j] - (_Float16)k * (_Float16)a[j]; - - a[j] = x; - a[p-1-j] = y; - - j++; - } - - nb = p & 1; - if (nb) - { - a[j]=(_Float16)a[j]- (_Float16)k * (_Float16)a[p-1-j]; - } - - a[p] = k; - e = e * (1.0f16 - k*k); - - - } - *err = e; -} -#endif /* defined(ARM_FLOAT16_SUPPORTED */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of LD group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f32.c deleted file mode 100644 index 5066d3f..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f32.c +++ /dev/null @@ -1,279 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_levinson_durbin_f32.c - * Description: f32 version of Levinson Durbin algorithm - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup LD Levinson Durbin Algorithm - - */ - -/** - @addtogroup LD - @{ - */ - -/** - @brief Levinson Durbin - @param[in] phi autocovariance vector starting with lag 0 (length is nbCoefs + 1) - @param[out] a autoregressive coefficients - @param[out] err prediction error (variance) - @param[in] nbCoefs number of autoregressive coefficients - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H) -#pragma GCC warning "Scalar version of arm_levinson_durbin_f32 built. Helium version has build issues with gcc." -#endif - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) && !defined(__CMSIS_GCC_H) - -#include "arm_helium_utils.h" - -#define LANE23_MASK 0xFF00 - -void arm_levinson_durbin_f32(const float32_t *phi, - float32_t *a, - float32_t *err, - int nbCoefs) -{ - float32_t e; - static const uint32_t revOffsetArray[4] = {3,2,1,0}; - - a[0] = phi[1] / phi[0]; - - e = phi[0] - phi[1] * a[0]; - for(int p=1; p < nbCoefs; p++) - { - float32_t suma = 0.0f; - float32_t sumb = 0.0f; - f32x4_t vecA,vecRevPhi,vecPhi,vecSumA, vecSumB; - float32_t k; - uint32_t blkCnt; - const float32_t *pPhi,*pRevPhi,*pA; - uint32x4_t revOffset; - - int nb,j,i; - - revOffset = vld1q(revOffsetArray); - vecSumA = vdupq_n_f32(0.0f); - vecSumB = vdupq_n_f32(0.0f); - - pRevPhi = &phi[p-3]; - pPhi = &phi[1]; - pA = a; - - i = 0; - blkCnt = p >> 2; - while(blkCnt > 0) - { - vecA = vld1q(pA); - pA += 4; - - vecPhi = vld1q(pPhi); - pPhi += 4; - - vecRevPhi = vldrwq_gather_shifted_offset_f32(pRevPhi,revOffset); - pRevPhi -= 4; - - vecSumA = vfmaq(vecSumA,vecA,vecRevPhi); - vecSumB = vfmaq(vecSumB,vecA,vecPhi); - - i += 4; - blkCnt--; - - } - - suma = vecAddAcrossF32Mve(vecSumA); - sumb = vecAddAcrossF32Mve(vecSumB); - - blkCnt = p & 3; - while(blkCnt > 0) - { - suma += a[i] * phi[p - i]; - sumb += a[i] * phi[i + 1]; - - i++; - blkCnt--; - } - - k = (phi[p+1] - suma)/(phi[0] - sumb); - - f32x4_t vecRevA,tmp; - static int32_t orgOffsetArray[4]={0,1,-1,-2}; - static const int32_t offsetIncArray[4]={2,2,-2,-2}; - - uint32x4_t offset,offsetInc,vecTmp; - - - offset = vld1q_u32((uint32_t*)orgOffsetArray); - vecTmp = vdupq_n_u32(p); - - offset = vaddq_m_u32(offset,offset,vecTmp,LANE23_MASK); - offsetInc = vld1q_u32((uint32_t*)offsetIncArray); - - nb = p >> 2; - j=0; - for(int i = 0; i < nb ; i++) - { - - /* - x0=a[j] - k * a[p-1-j]; - x1=a[j+1] - k * a[p-2-j]; - x3=a[p-1-j] - k * a[j]; - x4=a[p-2-j] - k * a[j+1]; - - a[j] = x0; - a[j+1] = x1; - a[p-1-j] = x2; - a[p-2-j] = x3; - */ - - uint64_t tmpa,tmpb; - vecA = vldrwq_gather_shifted_offset_f32(a,offset); - - - tmpa = vgetq_lane_u64((uint64x2_t)vecA,0); - tmpb = vgetq_lane_u64((uint64x2_t)vecA,1); - vecRevA = (f32x4_t) vsetq_lane_u64(tmpb,(uint64x2_t)vecRevA,0); - vecRevA = (f32x4_t) vsetq_lane_u64(tmpa,(uint64x2_t)vecRevA,1); - - - tmp = vsubq(vecA,vmulq_n_f32(vecRevA,k)); - vstrwq_scatter_shifted_offset_f32(a, offset, tmp); - - offset = vaddq(offset,offsetInc); - - j+=2; - - } - - switch(p & 3) - { - case 3: - { - float32_t x,y; - x = a[j] - k * a[p-1-j]; - y = a[p-1-j] - k * a[j]; - - a[j] = x; - a[p-1-j] = y; - - a[j+1] = a[j+1] - k * a[p-1-(j+1)]; - } - break; - - case 2: - { - float32_t x,y; - x = a[j] - k * a[p-1-j]; - y = a[p-1-j] - k * a[j]; - - a[j] = x; - a[p-1-j] = y; - } - break; - - case 1: - a[j] = a[j]- k * a[p-1-j]; - break; - } - - a[p] = k; - e = e * (1.0f - k*k); - - - } - *err = e; -} - -#else -void arm_levinson_durbin_f32(const float32_t *phi, - float32_t *a, - float32_t *err, - int nbCoefs) -{ - float32_t e; - int p; - - a[0] = phi[1] / phi[0]; - - e = phi[0] - phi[1] * a[0]; - for(p=1; p < nbCoefs; p++) - { - float32_t suma=0.0f; - float32_t sumb=0.0f; - float32_t k; - int nb,j,i; - - for(i=0; i < p; i++) - { - suma += a[i] * phi[p - i]; - sumb += a[i] * phi[i + 1]; - } - - k = (phi[p+1]-suma)/(phi[0] - sumb); - - - nb = p >> 1; - j=0; - for(i =0; i < nb ; i++) - { - float32_t x,y; - - x=a[j] - k * a[p-1-j]; - y=a[p-1-j] - k * a[j]; - - a[j] = x; - a[p-1-j] = y; - - j++; - } - - nb = p & 1; - if (nb) - { - a[j]=a[j]- k * a[p-1-j]; - } - - a[p] = k; - e = e * (1.0f - k*k); - - - } - *err = e; -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of LD group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_q31.c deleted file mode 100644 index 82dce38..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_q31.c +++ /dev/null @@ -1,379 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_levinson_durbin_q31.c - * Description: q31 version of Levinson Durbin algorithm - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -#define ONE_Q31 0x7FFFFFFFL -#define TWO_Q30 0x7FFFFFFFL - -#define HALF_Q31 0x00008000L -#define ONE_Q15 0x7FFF -#define HALF_Q15 0x3FFF -#define LOWPART_MASK 0x07FFF - -__STATIC_FORCEINLINE q31_t mul32x16(q31_t a, q15_t b) -{ - q31_t r = ((q63_t)a * (q63_t)b) >> 15; - - return(r); - -} - -__STATIC_FORCEINLINE q31_t mul32x32(q31_t a, q31_t b) -{ - //q31_t r = __SSAT(((q63_t)a * b) >> 31,31); - q31_t r = ((q63_t)a * b) >> 31; - - return(r); - -} - -__STATIC_FORCEINLINE q31_t divide(q31_t n, q31_t d) -{ - arm_status status; - int16_t shift; - q15_t inverse; - q31_t r; - // We are computing: - // n / d = n / (h + l) where h and l are the high end and low end part. - // 1 / (h + l) = 1 / h (1 - l / h) - // Our division algorithm has a shift. So it is returning a scaled value sh. - // So we need a << shift to convert 1/ sh to 1/h. - // In below code, we are organizing the computation differently. Instead of computing: - // 1 / h (1 - l / h) - // we are computing - // 1 / h (2 - (l + h) / h) - // 1 / h (2 - d / h) - // Also, we are not computing 1/h in Q15 but in Q14. - // 2 is expressed in Q30. - // So at the end of all computation we need a << 2 - - // Result is in Q14 because of use of HALF_Q15 instead of ONE_Q15. - status=arm_divide_q15(HALF_Q15,d>>16,&inverse,&shift); - (void)status; - - // d is used instead of l - // So we will need to substract to 2 instead of 1. - r = mul32x16(d,inverse); - r = TWO_Q30 - (r << shift); - r = mul32x16(r, inverse); - r = mul32x32(r,n) ; - r = r << (shift + 2); - - return(r); - -} - -/** - @ingroup groupFilters - */ - -/** - @defgroup LD Levinson Durbin Algorithm - - */ - -/** - @addtogroup LD - @{ - */ - -/** - @brief Levinson Durbin - @param[in] phi autocovariance vector starting with lag 0 (length is nbCoefs + 1) - @param[out] a autoregressive coefficients - @param[out] err prediction error (variance) - @param[in] nbCoefs number of autoregressive coefficients - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H) -#pragma GCC warning "Scalar version of arm_levinson_durbin_q31 built. Helium version has build issues with gcc." -#endif - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) && !defined(__CMSIS_GCC_H) - -#define LANE23_MASK 0xFF00 - -#include "arm_helium_utils.h" -void arm_levinson_durbin_q31(const q31_t *phi, - q31_t *a, - q31_t *err, - int nbCoefs) -{ - q31_t e; - - static const uint32_t revOffsetArray[4] = {3,2,1,0}; - - //a[0] = phi[1] / phi[0]; - a[0] = divide(phi[1], phi[0]); - - - //e = phi[0] - phi[1] * a[0]; - e = phi[0] - mul32x32(phi[1],a[0]); - - for(int p=1; p < nbCoefs; p++) - { - q63_t suma=0; - q63_t sumb=0; - q31x4_t vecA,vecRevPhi,vecPhi; - q31_t k; - uint32_t blkCnt; - const q31_t *pPhi,*pRevPhi,*pA; - uint32x4_t revOffset; - - - int nb,j,i; - - revOffset = vld1q(revOffsetArray); - - pRevPhi = &phi[p-3]; - pPhi = &phi[1]; - pA = a; - - i = 0; - blkCnt = p >> 2; - while(blkCnt > 0) - { - vecA = vld1q(pA); - pA += 4; - - vecPhi = vld1q(pPhi); - pPhi += 4; - - vecRevPhi = vldrwq_gather_shifted_offset_s32(pRevPhi,revOffset); - pRevPhi -= 4; - - suma = vmlaldavaq(suma,vecA,vecRevPhi); - sumb = vmlaldavaq(sumb,vecA,vecPhi); - - i += 4; - blkCnt--; - } - - - blkCnt = p & 3; - while(blkCnt > 0) - { - suma += ((q63_t)a[i] * phi[p - i]); - sumb += ((q63_t)a[i] * phi[i + 1]); - - i++; - blkCnt--; - } - - suma = asrl(suma, 31); - sumb = asrl(sumb, 31); - - - - //k = (phi[p+1]-suma)/(phi[0] - sumb); - k = divide(phi[p+1]-(q31_t)suma,phi[0] - (q31_t)sumb); - - q31x4_t vecRevA,tmp; - static int32_t orgOffsetArray[4]={0,1,-1,-2}; - static const int32_t offsetIncArray[4]={2,2,-2,-2}; - - uint32x4_t offset,offsetInc,vecTmp; - - - offset = vld1q_u32((uint32_t*)orgOffsetArray); - vecTmp = vdupq_n_u32(p); - - offset = vaddq_m_u32(offset,offset,vecTmp,LANE23_MASK); - offsetInc = vld1q_u32((uint32_t*)offsetIncArray); - - - nb = p >> 2; - j=0; - for(int i =0;i < nb ; i++) - { - /* - q31_t x0,x1,x2,x3; - - //x = a[j] - k * a[p-1-j]; - x0 = a[j] - mul32x32(k,a[p-1-j]); - x1 = a[j+1] - mul32x32(k,a[p-2-j]); - - //y = a[p-1-j] - k * a[j]; - x2 = a[p-1-j] - mul32x32(k , a[j]); - x3 = a[p-2-j] - mul32x32(k , a[j+1]); - - a[j] = x0; - a[j+1] = x1; - a[p-1-j] = x2; - a[p-2-j] = x3; - */ - - uint64_t tmpa,tmpb; - vecA = vldrwq_gather_shifted_offset_s32(a,offset); - - - tmpa = vgetq_lane_u64((uint64x2_t)vecA,0); - tmpb = vgetq_lane_u64((uint64x2_t)vecA,1); - vecRevA = (q31x4_t) vsetq_lane_u64(tmpb,(uint64x2_t)vecRevA,0); - vecRevA = (q31x4_t) vsetq_lane_u64(tmpa,(uint64x2_t)vecRevA,1); - - - tmp = vsubq(vecA,vqdmulhq_n_s32(vecRevA,k)); - vstrwq_scatter_shifted_offset_s32(a, offset, tmp); - - offset = vaddq(offset,offsetInc); - - j+=2; - } - - switch(p & 3) - { - case 3: - { - q31_t x,y; - - //x = a[j] - k * a[p-1-j]; - x = a[j] - mul32x32(k,a[p-1-j]); - - //y = a[p-1-j] - k * a[j]; - y = a[p-1-j] - mul32x32(k , a[j]); - - a[j] = x; - a[p-1-j] = y; - - //a[j] = a[j]- k * a[p-1-j]; - a[j+1] = a[j+1] - mul32x32(k,a[p-2-j]); - } - break; - - case 2: - { - q31_t x,y; - - //x = a[j] - k * a[p-1-j]; - x = a[j] - mul32x32(k,a[p-1-j]); - - //y = a[p-1-j] - k * a[j]; - y = a[p-1-j] - mul32x32(k , a[j]); - - a[j] = x; - a[p-1-j] = y; - } - break; - - case 1: - //a[j] = a[j]- k * a[p-1-j]; - a[j] = a[j] - mul32x32(k,a[p-1-j]); - break; - } - - a[p] = k; - - // e = e * (1 - k*k); - e = mul32x32(e,ONE_Q31 - mul32x32(k,k)); - - - } - *err = e; -} - -#else - -void arm_levinson_durbin_q31(const q31_t *phi, - q31_t *a, - q31_t *err, - int nbCoefs) -{ - q31_t e; - int p; - - //a[0] = phi[1] / phi[0]; - a[0] = divide(phi[1], phi[0]); - - - //e = phi[0] - phi[1] * a[0]; - e = phi[0] - mul32x32(phi[1],a[0]); - - for(p=1; p < nbCoefs; p++) - { - q63_t suma=0; - q63_t sumb=0; - q31_t k; - int nb,j,i; - - for(i=0; i < p; i++) - { - suma += ((q63_t)a[i] * phi[p - i]); - sumb += ((q63_t)a[i] * phi[i + 1]); - } - - suma = suma >> 31; - sumb = sumb >> 31; - - - - //k = (phi[p+1]-suma)/(phi[0] - sumb); - k = divide(phi[p+1]-(q31_t)suma,phi[0] - (q31_t)sumb); - - - nb = p >> 1; - j=0; - for(i =0;i < nb ; i++) - { - q31_t x,y; - - //x = a[j] - k * a[p-1-j]; - x = a[j] - mul32x32(k,a[p-1-j]); - - //y = a[p-1-j] - k * a[j]; - y = a[p-1-j] - mul32x32(k , a[j]); - - a[j] = x; - a[p-1-j] = y; - - j++; - } - - nb = p & 1; - if (nb) - { - //a[j] = a[j]- k * a[p-1-j]; - a[j] = a[j] - mul32x32(k,a[p-1-j]); - } - - a[p] = k; - - // e = e * (1 - k*k); - e = mul32x32(e,ONE_Q31 - mul32x32(k,k)); - - - } - *err = e; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of LD group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c deleted file mode 100644 index a985914..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c +++ /dev/null @@ -1,533 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_f32.c - * Description: Processing function for the floating-point LMS filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup LMS Least Mean Square (LMS) Filters - - LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions. - LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal. - Adaptive filters are often used in communication systems, equalizers, and noise removal. - The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types. - The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal. - - An LMS filter consists of two components as shown below. - The first component is a standard transversal or FIR filter. - The second component is a coefficient update mechanism. - The LMS filter has two input signals. - The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter. - That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input. - The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input. - This "error signal" tends towards zero as the filter adapts. - The LMS processing functions accept the input and reference input signals and generate the filter output and error signal. - \image html LMS.gif "Internal structure of the Least Mean Square filter" - - The functions operate on blocks of data and each call to the function processes - blockSize samples through the filter. - pSrc points to input signal, pRef points to reference signal, - pOut points to output signal and pErr points to error signal. - All arrays contain blockSize values. - - The functions operate on a block-by-block basis. - Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. - The convergence of the LMS filter is slower compared to the normalized LMS algorithm. - - @par Algorithm - The output signal y[n] is computed by a standard FIR filter: - 
-      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
-
- - @par - The error signal equals the difference between the reference signal d[n] and the filter output: - 
-      e[n] = d[n] - y[n].
-
- - @par - After each sample of the error signal is computed, the filter coefficients b[k] are updated on a sample-by-sample basis: - 
-      b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1
-
- where mu is the step size and controls the rate of coefficient convergence. - @par - In the APIs, pCoeffs points to a coefficient array of size numTaps. - Coefficients are stored in time reversed order. - @par - 
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to a state array of size numTaps + blockSize - 1. - Samples in the state buffer are stored in the order: - @par - 
-     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
-
- @par - Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples. - The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, - to be avoided and yields a significant speed improvement. - The state variables are updated after each block of data is processed. - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter and - coefficient and state arrays cannot be shared among instances. - There are separate instance structure declarations for each of the 3 supported data types. - - @par Initialization Functions - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero. - - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - Set the values in the state buffer to zeros before static initialization. - The code below statically initializes each of the 3 different data type filter instance structures - 
-     arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
-     arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
-     arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
-
- where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer; - pCoeffs is the address of the coefficient buffer; mu is the step size parameter; and postShift is the shift applied to coefficients. - - @par Fixed-Point Behavior - Care must be taken when using the Q15 and Q31 versions of the LMS filter. - The following issues must be considered: - - Scaling of coefficients - - Overflow and saturation - - @par Scaling of Coefficients - Filter coefficients are represented as fractional values and - coefficients are restricted to lie in the range [-1 +1). - The fixed-point functions have an additional scaling parameter postShift. - At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. - This essentially scales the filter coefficients by 2^postShift and - allows the filter coefficients to exceed the range [+1 -1). - The value of postShift is set by the user based on the expected gain through the system being modeled. - - @par Overflow and Saturation - Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are - described separately as part of the function specific documentation below. - */ - -/** - @addtogroup LMS - @{ - */ - -/** - @brief Processing function for floating-point LMS filter. - @param[in] S points to an instance of the floating-point LMS filter structure - @param[in] pSrc points to the block of input data - @param[in] pRef points to the block of reference data - @param[out] pOut points to the block of output data - @param[out] pErr points to the block of error data - @param[in] blockSize number of samples to process - @return none - */ -#if defined(ARM_MATH_NEON) -void arm_lms_f32( - const arm_lms_instance_f32 * S, - const float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - float32_t mu = S->mu; /* Adaptive factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - float32_t sum, e, d; /* accumulator, error, reference data sample */ - float32_t w = 0.0f; /* weight factor */ - - float32x4_t tempV, sumV, xV, bV; - float32x2_t tempV2; - - e = 0.0f; - d = 0.0f; - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Set the accumulator to zero */ - sum = 0.0f; - sumV = vdupq_n_f32(0.0); - - /* Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - xV = vld1q_f32(px); - bV = vld1q_f32(pb); - sumV = vmlaq_f32(sumV, xV, bV); - - px += 4; - pb += 4; - - /* Decrement the loop counter */ - tapCnt--; - } - tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); - sum = vget_lane_f32(tempV2, 0) + vget_lane_f32(tempV2, 1); - - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum += (*px++) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result in the accumulator, store in the destination buffer. */ - *pOut++ = sum; - - /* Compute and store error */ - d = (float32_t) (*pRef++); - e = d - sum; - *pErr++ = e; - - /* Calculation of Weighting factor for the updating filter coefficients */ - w = e * mu; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Update filter coefficients */ - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - xV = vld1q_f32(px); - bV = vld1q_f32(pb); - px += 4; - bV = vmlaq_n_f32(bV,xV,w); - - vst1q_f32(pb,bV); - pb += 4; - - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - *pb = *pb + (w * (*px++)); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - satrt of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Process 4 taps at a time for (numTaps - 1U) samples copy */ - tapCnt = (numTaps - 1U) >> 2U; - - /* copy data */ - while (tapCnt > 0U) - { - tempV = vld1q_f32(pState); - vst1q_f32(pStateCurnt,tempV); - pState += 4; - pStateCurnt += 4; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1U) % 0x4U; - - /* Copy the remaining q31_t data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - - -} -#else -void arm_lms_f32( - const arm_lms_instance_f32 * S, - const float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - float32_t mu = S->mu; /* Adaptive factor */ - float32_t acc, e; /* Accumulator, error */ - float32_t w; /* Weight factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - - /* Initializations of error, difference, Coefficient update */ - e = 0.0f; - w = 0.0f; - - /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - - /* initialise loop count */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Set the accumulator to zero */ - acc = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - acc += (*px++) * (*pb++); - - acc += (*px++) * (*pb++); - - acc += (*px++) * (*pb++); - - acc += (*px++) * (*pb++); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - acc += (*px++) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = acc; - - /* Compute and store error */ - e = (float32_t) *pRef++ - acc; - *pErr++ = e; - - /* Calculation of Weighting factor for updating filter coefficients */ - w = e * mu; - - /* Initialize pState pointer */ - /* Advance state pointer by 1 for the next sample */ - px = pState++; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - /* Update filter coefficients */ - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - *pb += w * (*px++); - pb++; - - *pb += w * (*px++); - pb++; - - *pb += w * (*px++); - pb++; - - *pb += w * (*px++); - pb++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - *pb += w * (*px++); - pb++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* copy data */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = (numTaps - 1U) >> 2U; - - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} -#endif /* #if defined(ARM_MATH_NEON) */ - -/** - @} end of LMS group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c deleted file mode 100644 index f341804..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c +++ /dev/null @@ -1,81 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_init_f32.c - * Description: Floating-point LMS filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @addtogroup LMS - @{ - */ - -/** - @brief Initialization function for floating-point LMS filter. - @param[in] S points to an instance of the floating-point LMS filter structure - @param[in] numTaps number of filter coefficients - @param[in] pCoeffs points to coefficient buffer - @param[in] pState points to state buffer - @param[in] mu step size that controls filter coefficient updates - @param[in] blockSize number of samples to process - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- The initial filter coefficients serve as a starting point for the adaptive filter. - pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32(). - */ - -void arm_lms_init_f32( - arm_lms_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - float32_t mu, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps */ - memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; -} - -/** - @} end of LMS group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c deleted file mode 100644 index 7209817..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_init_q15.c - * Description: Q15 LMS filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup LMS - @{ - */ - -/** - @brief Initialization function for the Q15 LMS filter. - @param[in] S points to an instance of the Q15 LMS filter structure. - @param[in] numTaps number of filter coefficients. - @param[in] pCoeffs points to coefficient buffer. - @param[in] pState points to state buffer. - @param[in] mu step size that controls filter coefficient updates. - @param[in] blockSize number of samples to process. - @param[in] postShift bit shift applied to coefficients. - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- The initial filter coefficients serve as a starting point for the adaptive filter. - pState points to the array of state variables and size of array is - numTaps+blockSize-1 samples, where blockSize is the number of - input samples processed by each call to arm_lms_q15(). - */ - -void arm_lms_init_q15( - arm_lms_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - q15_t mu, - uint32_t blockSize, - uint32_t postShift) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps - 1 */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; - - /* Assign postShift value to be applied */ - S->postShift = postShift; -} - -/** - @} end of LMS group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c deleted file mode 100644 index 00bc20d..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_init_q31.c - * Description: Q31 LMS filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup LMS - @{ - */ - -/** - @brief Initialization function for Q31 LMS filter. - @param[in] S points to an instance of the Q31 LMS filter structure - @param[in] numTaps number of filter coefficients - @param[in] pCoeffs points to coefficient buffer - @param[in] pState points to state buffer - @param[in] mu step size that controls filter coefficient updates - @param[in] blockSize number of samples to process - @param[in] postShift bit shift applied to coefficients - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- The initial filter coefficients serve as a starting point for the adaptive filter. - pState points to an array of length numTaps+blockSize-1 samples, - where blockSize is the number of input samples processed by each call to - arm_lms_q31(). - */ - -void arm_lms_init_q31( - arm_lms_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - q31_t mu, - uint32_t blockSize, - uint32_t postShift) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps - 1 */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; - - /* Assign postShift value to be applied */ - S->postShift = postShift; -} - -/** - @} end of LMS group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c deleted file mode 100644 index 35c44ff..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c +++ /dev/null @@ -1,564 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_norm_f32.c - * Description: Processing function for the floating-point NLMS filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @defgroup LMS_NORM Normalized LMS Filters - - This set of functions implements a commonly used adaptive filter. - It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization - factor which increases the adaptation rate of the filter. - The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types. - - A normalized least mean square (NLMS) filter consists of two components as shown below. - The first component is a standard transversal or FIR filter. - The second component is a coefficient update mechanism. - The NLMS filter has two input signals. - The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter. - That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input. - The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input. - This "error signal" tends towards zero as the filter adapts. - The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal. - \image html LMS.gif "Internal structure of the NLMS adaptive filter" - - The functions operate on blocks of data and each call to the function processes - blockSize samples through the filter. - pSrc points to input signal, pRef points to reference signal, - pOut points to output signal and pErr points to error signal. - All arrays contain blockSize values. - - The functions operate on a block-by-block basis. - Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. - The convergence of the LMS filter is slower compared to the normalized LMS algorithm. - - @par Algorithm - The output signal y[n] is computed by a standard FIR filter: - 
-      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
-
- - @par - The error signal equals the difference between the reference signal d[n] and the filter output: - 
-      e[n] = d[n] - y[n].
-
- - @par - After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated: - 
-     E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
-
- The filter coefficients b[k] are then updated on a sample-by-sample basis: - 
-      b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1
-
- where mu is the step size and controls the rate of coefficient convergence. - @par - In the APIs, pCoeffs points to a coefficient array of size numTaps. - Coefficients are stored in time reversed order. - @par - 
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- @par - pState points to a state array of size numTaps + blockSize - 1. - Samples in the state buffer are stored in the order: - @par - 
-     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
-
- @par - Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples. - The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, - to be avoided and yields a significant speed improvement. - The state variables are updated after each block of data is processed. - - @par Instance Structure - The coefficients and state variables for a filter are stored together in an instance data structure. - A separate instance structure must be defined for each filter and - coefficient and state arrays cannot be shared among instances. - There are separate instance structure declarations for each of the 3 supported data types. - - @par Initialization Functions - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Zeros out the values in the state buffer. - To do this manually without calling the init function, assign the follow subfields of the instance structure: - numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero. - For Q7, Q15, and Q31 the following fields must also be initialized; - recipTable, postShift - @par - Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. - @par Fixed-Point Behavior - Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter. - The following issues must be considered: - - Scaling of coefficients - - Overflow and saturation - - @par Scaling of Coefficients (fixed point versions) - Filter coefficients are represented as fractional values and - coefficients are restricted to lie in the range [-1 +1). - The fixed-point functions have an additional scaling parameter postShift. - At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. - This essentially scales the filter coefficients by 2^postShift and - allows the filter coefficients to exceed the range [+1 -1). - The value of postShift is set by the user based on the expected gain through the system being modeled. - - @par Overflow and Saturation (fixed point versions) - Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are - described separately as part of the function specific documentation below. - */ - -/** - @addtogroup LMS_NORM - @{ - */ - -/** - @brief Processing function for floating-point normalized LMS filter. - @param[in] S points to an instance of the floating-point normalized LMS filter structure - @param[in] pSrc points to the block of input data - @param[in] pRef points to the block of reference data - @param[out] pOut points to the block of output data - @param[out] pErr points to the block of error data - @param[in] blockSize number of samples to process - @return none - */ - -#if defined(ARM_MATH_NEON) -void arm_lms_norm_f32( - arm_lms_norm_instance_f32 * S, - const float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - float32_t mu = S->mu; /* Adaptive factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - float32_t energy; /* Energy of the input */ - float32_t sum, e, d; /* accumulator, error, reference data sample */ - float32_t w, x0, in; /* weight factor, temporary variable to hold input sample and state */ - - float32x4_t tempV, sumV, xV, bV; - float32x2_t tempV2; - - /* Initializations of error, difference, Coefficient update */ - e = 0.0f; - d = 0.0f; - w = 0.0f; - - energy = S->energy; - x0 = S->x0; - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Read the sample from input buffer */ - in = *pSrc++; - - /* Update the energy calculation */ - energy -= x0 * x0; - energy += in * in; - - /* Set the accumulator to zero */ - sum = 0.0f; - sumV = vdupq_n_f32(0.0); - - /* Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - xV = vld1q_f32(px); - bV = vld1q_f32(pb); - sumV = vmlaq_f32(sumV, xV, bV); - - px += 4; - pb += 4; - - /* Decrement the loop counter */ - tapCnt--; - } - tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); - sum = vget_lane_f32(tempV2, 0) + vget_lane_f32(tempV2, 1); - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - sum += (*px++) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* The result in the accumulator, store in the destination buffer. */ - *pOut++ = sum; - - /* Compute and store error */ - d = (float32_t) (*pRef++); - e = d - sum; - *pErr++ = e; - - /* Calculation of Weighting factor for updating filter coefficients */ - /* epsilon value 0.000000119209289f */ - w = (e * mu) / (energy + 0.000000119209289f); - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coeff pointer */ - pb = (pCoeffs); - - /* Process 4 taps at a time. */ - tapCnt = numTaps >> 2; - - /* Update filter coefficients */ - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - xV = vld1q_f32(px); - bV = vld1q_f32(pb); - px += 4; - bV = vmlaq_n_f32(bV,xV,w); - - vst1q_f32(pb,bV); - pb += 4; - - - /* Decrement the loop counter */ - tapCnt--; - } - - /* If the filter length is not a multiple of 4, compute the remaining filter taps */ - tapCnt = numTaps % 0x4U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - *pb += w * (*px++); - pb++; - - /* Decrement the loop counter */ - tapCnt--; - } - - x0 = *pState; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement the loop counter */ - blkCnt--; - } - - S->energy = energy; - S->x0 = x0; - - /* Processing is complete. Now copy the last numTaps - 1 samples to the - satrt of the state buffer. This prepares the state buffer for the - next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* Process 4 taps at a time for (numTaps - 1U)/4 samples copy */ - tapCnt = (numTaps - 1U) >> 2U; - - /* copy data */ - while (tapCnt > 0U) - { - tempV = vld1q_f32(pState); - vst1q_f32(pStateCurnt,tempV); - pState += 4; - pStateCurnt += 4; - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calculate remaining number of copies */ - tapCnt = (numTaps - 1U) % 0x4U; - - /* Copy the remaining q31_t data */ - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement the loop counter */ - tapCnt--; - } - -} -#else -void arm_lms_norm_f32( - arm_lms_norm_instance_f32 * S, - const float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize) -{ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - float32_t mu = S->mu; /* Adaptive factor */ - float32_t acc, e; /* Accumulator, error */ - float32_t w; /* Weight factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - float32_t energy; /* Energy of the input */ - float32_t x0, in; /* Temporary variable to hold input sample and state */ - - /* Initializations of error, difference, Coefficient update */ - e = 0.0f; - w = 0.0f; - - energy = S->energy; - x0 = S->x0; - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - - /* initialise loop count */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Read the sample from input buffer */ - in = *pSrc++; - - /* Update the energy calculation */ - energy -= x0 * x0; - energy += in * in; - - /* Set the accumulator to zero */ - acc = 0.0f; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - acc += (*px++) * (*pb++); - - acc += (*px++) * (*pb++); - - acc += (*px++) * (*pb++); - - acc += (*px++) * (*pb++); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - acc += (*px++) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = acc; - - /* Compute and store error */ - e = (float32_t) *pRef++ - acc; - *pErr++ = e; - - /* Calculation of Weighting factor for updating filter coefficients */ - /* epsilon value 0.000000119209289f */ - w = (e * mu) / (energy + 0.000000119209289f); - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - /* Update filter coefficients */ - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - *pb += w * (*px++); - pb++; - - *pb += w * (*px++); - pb++; - - *pb += w * (*px++); - pb++; - - *pb += w * (*px++); - pb++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - *pb += w * (*px++); - pb++; - - /* Decrement loop counter */ - tapCnt--; - } - - x0 = *pState; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Save energy and x0 values for the next frame */ - S->energy = energy; - S->x0 = x0; - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* copy data */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = (numTaps - 1U) >> 2U; - - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} -#endif /* #if defined(ARM_MATH_NEON) */ -/** - @} end of LMS_NORM group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c deleted file mode 100644 index a28c000..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_norm_init_f32.c - * Description: Floating-point NLMS filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup LMS_NORM - @{ - */ - -/** - @brief Initialization function for floating-point normalized LMS filter. - @param[in] S points to an instance of the floating-point LMS filter structure - @param[in] numTaps number of filter coefficients - @param[in] pCoeffs points to coefficient buffer - @param[in] pState points to state buffer - @param[in] mu step size that controls filter coefficient updates - @param[in] blockSize number of samples to process - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- The initial filter coefficients serve as a starting point for the adaptive filter. - pState points to an array of length numTaps+blockSize-1 samples, - where blockSize is the number of input samples processed by each call to arm_lms_norm_f32(). - */ - -void arm_lms_norm_init_f32( - arm_lms_norm_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - float32_t mu, - uint32_t blockSize) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps - 1 */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t)); - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; - - /* Initialise Energy to zero */ - S->energy = 0.0f; - - /* Initialise x0 to zero */ - S->x0 = 0.0f; -} - -/** - @} end of LMS_NORM group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c deleted file mode 100644 index 41f317e..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c +++ /dev/null @@ -1,98 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_norm_init_q15.c - * Description: Q15 NLMS filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" -#include "arm_common_tables.h" - -/** - @addtogroup LMS_NORM - @{ - */ - -/** - @brief Initialization function for Q15 normalized LMS filter. - @param[in] S points to an instance of the Q15 normalized LMS filter structure. - @param[in] numTaps number of filter coefficients. - @param[in] pCoeffs points to coefficient buffer. - @param[in] pState points to state buffer. - @param[in] mu step size that controls filter coefficient updates. - @param[in] blockSize number of samples to process. - @param[in] postShift bit shift applied to coefficients. - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- The initial filter coefficients serve as a starting point for the adaptive filter. - pState points to the array of state variables and size of array is - numTaps+blockSize-1 samples, where blockSize is the number of input samples processed - by each call to arm_lms_norm_q15(). - */ - -void arm_lms_norm_init_q15( - arm_lms_norm_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - q15_t mu, - uint32_t blockSize, - uint8_t postShift) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps - 1 */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t)); - - /* Assign post Shift value applied to coefficients */ - S->postShift = postShift; - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; - - /* Initialize reciprocal pointer table */ - S->recipTable = (q15_t *) armRecipTableQ15; - - /* Initialise Energy to zero */ - S->energy = 0; - - /* Initialise x0 to zero */ - S->x0 = 0; -} - -/** - @} end of LMS_NORM group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c deleted file mode 100644 index 996c78c..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c +++ /dev/null @@ -1,97 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_norm_init_q31.c - * Description: Q31 NLMS filter initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" -#include "arm_common_tables.h" - -/** - @addtogroup LMS_NORM - @{ - */ - -/** - @brief Initialization function for Q31 normalized LMS filter. - @param[in] S points to an instance of the Q31 normalized LMS filter structure. - @param[in] numTaps number of filter coefficients. - @param[in] pCoeffs points to coefficient buffer. - @param[in] pState points to state buffer. - @param[in] mu step size that controls filter coefficient updates. - @param[in] blockSize number of samples to process. - @param[in] postShift bit shift applied to coefficients. - @return none - - @par Details - pCoeffs points to the array of filter coefficients stored in time reversed order: - 
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-
- The initial filter coefficients serve as a starting point for the adaptive filter. - pState points to an array of length numTaps+blockSize-1 samples, - where blockSize is the number of input samples processed by each call to arm_lms_norm_q31(). - */ - -void arm_lms_norm_init_q31( - arm_lms_norm_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - q31_t mu, - uint32_t blockSize, - uint8_t postShift) -{ - /* Assign filter taps */ - S->numTaps = numTaps; - - /* Assign coefficient pointer */ - S->pCoeffs = pCoeffs; - - /* Clear state buffer and size is always blockSize + numTaps - 1 */ - memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t)); - - /* Assign post Shift value applied to coefficients */ - S->postShift = postShift; - - /* Assign state pointer */ - S->pState = pState; - - /* Assign Step size value */ - S->mu = mu; - - /* Initialize reciprocal pointer table */ - S->recipTable = (q31_t *) armRecipTableQ31; - - /* Initialise Energy to zero */ - S->energy = 0; - - /* Initialise x0 to zero */ - S->x0 = 0; -} - -/** - @} end of LMS_NORM group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c deleted file mode 100644 index 2a08ee9..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c +++ /dev/null @@ -1,297 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_norm_q15.c - * Description: Processing function for Q15 normalized LMS filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup LMS_NORM - @{ - */ - -/** - @brief Processing function for Q15 normalized LMS filter. - @param[in] S points to an instance of the Q15 normalized LMS filter structure - @param[in] pSrc points to the block of input data - @param[in] pRef points to the block of reference data - @param[out] pOut points to the block of output data - @param[out] pErr points to the block of error data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - Both coefficients and state variables are represented in 1.15 format and - multiplications yield a 2.30 result. The 2.30 intermediate results are - accumulated in a 64-bit accumulator in 34.30 format. - There is no risk of internal overflow with this approach and the full - precision of intermediate multiplications is preserved. After all additions - have been performed, the accumulator is truncated to 34.15 format by - discarding low 15 bits. Lastly, the accumulator is saturated to yield a - result in 1.15 format. - @par - In this filter, filter coefficients are updated for each sample and the - updation of filter cofficients are saturted. - */ - -void arm_lms_norm_q15( - arm_lms_norm_instance_q15 * S, - const q15_t * pSrc, - q15_t * pRef, - q15_t * pOut, - q15_t * pErr, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - q15_t mu = S->mu; /* Adaptive factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - q63_t acc; /* Accumulator */ - q31_t energy; /* Energy of the input */ - q15_t e = 0, d = 0; /* Error, reference data sample */ - q15_t w = 0, in; /* Weight factor and state */ - q15_t x0; /* Temporary variable to hold input sample */ - q15_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu product and reciprocal of energy */ - q15_t postShift; /* Post shift to be applied to weight after reciprocal calculation */ - q31_t coef; /* Temporary variable for coefficient */ - q31_t acc_l, acc_h; /* Temporary input */ - int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ - int32_t uShift = (32 - lShift); - - energy = S->energy; - x0 = S->x0; - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - - /* initialise loop count */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Read the sample from input buffer */ - in = *pSrc++; - - /* Update the energy calculation */ - energy -= (((q31_t) x0 * (x0)) >> 15); - energy += (((q31_t) in * (in)) >> 15); - - /* Set the accumulator to zero */ - acc = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - /* acc += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ - acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc); - acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - acc += (q63_t) (((q31_t) (*px++) * (*pb++))); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Converting the result to 1.15 format and saturate the output */ - acc = __SSAT(acc, 16U); - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q15_t) acc; - - /* Compute and store error */ - d = *pRef++; - e = d - (q15_t) acc; - *pErr++ = e; - - /* Calculation of 1/energy */ - postShift = arm_recip_q15((q15_t) energy + DELTA_Q15, &oneByEnergy, S->recipTable); - - /* Calculation of e * mu value */ - errorXmu = (q15_t) (((q31_t) e * mu) >> 15); - - /* Calculation of (e * mu) * (1/energy) value */ - acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift)); - - /* Weighting factor for the normalized version */ - w = (q15_t) __SSAT((q31_t) acc, 16); - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - /* Update filter coefficients */ - while (tapCnt > 0U) - { - coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT(coef, 16); - - coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT(coef, 16); - - coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT(coef, 16); - - coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT(coef, 16); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT(coef, 16); - - /* Decrement loop counter */ - tapCnt--; - } - - x0 = *pState; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Save energy and x0 values for the next frame */ - S->energy = (q15_t) energy; - S->x0 = x0; - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* copy data */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = (numTaps - 1U) >> 2U; - - while (tapCnt > 0U) - { - write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState)); - write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState)); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} - -/** - @} end of LMS_NORM group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c deleted file mode 100644 index 05dd8a2..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c +++ /dev/null @@ -1,311 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_norm_q31.c - * Description: Processing function for the Q31 NLMS filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup LMS_NORM - @{ - */ - -/** - @brief Processing function for Q31 normalized LMS filter. - @param[in] S points to an instance of the Q31 normalized LMS filter structure - @param[in] pSrc points to the block of input data - @param[in] pRef points to the block of reference data - @param[out] pOut points to the block of output data - @param[out] pErr points to the block of error data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate - multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around rather than clip. - In order to avoid overflows completely the input signal must be scaled down by - log2(numTaps) bits. The reference signal should not be scaled down. - After all multiply-accumulates are performed, the 2.62 accumulator is shifted - and saturated to 1.31 format to yield the final result. - The output signal and error signal are in 1.31 format. - @par - In this filter, filter coefficients are updated for each sample and the - updation of filter cofficients are saturted. - */ - -void arm_lms_norm_q31( - arm_lms_norm_instance_q31 * S, - const q31_t * pSrc, - q31_t * pRef, - q31_t * pOut, - q31_t * pErr, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - q31_t mu = S->mu; /* Adaptive factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - q63_t acc; /* Accumulator */ - q63_t energy; /* Energy of the input */ - q31_t e = 0; /* Error data sample */ - q31_t w = 0, in; /* Weight factor and state */ - q31_t x0; /* Temporary variable to hold input sample */ - q31_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu product and reciprocal of energy */ - q31_t postShift; /* Post shift to be applied to weight after reciprocal calculation */ - q31_t coef; /* Temporary variable for coef */ - q31_t acc_l, acc_h; /* Temporary input */ - uint32_t uShift = ((uint32_t) S->postShift + 1U); - uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ - - energy = S->energy; - x0 = S->x0; - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - - /* initialise loop count */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Read the sample from input buffer */ - in = *pSrc++; - - /* Update the energy calculation */ - energy = (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32); - energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32); - - /* Set the accumulator to zero */ - acc = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - /* acc += b[N] * x[n-N] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* acc += b[N-1] * x[n-N-1] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* acc += b[N-2] * x[n-N-2] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* acc += b[N-3] * x[n-N-3] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Converting the result to 1.31 format */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q31_t) acc; - - /* Compute and store error */ - e = *pRef++ - (q31_t) acc; - *pErr++ = e; - - /* Calculates the reciprocal of energy */ - postShift = arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]); - - /* Calculation of product of (e * mu) */ - errorXmu = (q31_t) (((q63_t) e * mu) >> 31); - - /* Weighting factor for the normalized version */ - w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift)); - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - /* Update filter coefficients */ - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - - /* coef is in 2.30 format */ - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - /* get coef in 1.31 format by left shifting */ - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); - /* update coefficient buffer to next coefficient */ - pb++; - - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); - pb++; - - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); - pb++; - - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); - pb++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - coef = (q31_t) (((q63_t) w * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); - pb++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Read the sample from state buffer */ - x0 = *pState; - - /* Advance state pointer by 1 for the next sample */ - pState = pState + 1; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Save energy and x0 values for the next frame */ - S->energy = (q31_t) energy; - S->x0 = x0; - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* copy data */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = (numTaps - 1U) >> 2U; - - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} - -/** - @} end of LMS_NORM group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c deleted file mode 100644 index 4a575c9..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c +++ /dev/null @@ -1,262 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_q15.c - * Description: Processing function for Q15 LMS filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup LMS - @{ - */ - -/** - @brief Processing function for Q15 LMS filter. - @param[in] S points to an instance of the Q15 LMS filter structure - @param[in] pSrc points to the block of input data - @param[in] pRef points to the block of reference data - @param[out] pOut points to the block of output data - @param[out] pErr points to the block of error data - @param[in] blockSize number of samples to process - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - Lastly, the accumulator is saturated to yield a result in 1.15 format. - @par - In this filter, filter coefficients are updated for each sample and - the updation of filter cofficients are saturted. - */ - -void arm_lms_q15( - const arm_lms_instance_q15 * S, - const q15_t * pSrc, - q15_t * pRef, - q15_t * pOut, - q15_t * pErr, - uint32_t blockSize) -{ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - q15_t mu = S->mu; /* Adaptive factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - q63_t acc; /* Accumulator */ - q15_t e = 0; /* Error of data sample */ - q15_t alpha; /* Intermediate constant for taps update */ - q31_t coef; /* Temporary variable for coefficient */ - q31_t acc_l, acc_h; /* Temporary input */ - int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ - int32_t uShift = (32 - lShift); - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - - /* initialise loop count */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Set the accumulator to zero */ - acc = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - /* acc += b[N] * x[n-N] + b[N-1] * x[n-N-1] */ - acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc); - acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - acc += (q63_t) (((q31_t) (*px++) * (*pb++))); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - /* Apply shift for lower part of acc and upper part of acc */ - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Converting the result to 1.15 format and saturate the output */ - acc = __SSAT(acc, 16U); - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q15_t) acc; - - /* Compute and store error */ - e = *pRef++ - (q15_t) acc; - *pErr++ = (q15_t) e; - - /* Compute alpha i.e. intermediate constant for taps update */ - alpha = (q15_t) (((q31_t) e * (mu)) >> 15); - - /* Initialize pState pointer */ - /* Advance state pointer by 1 for the next sample */ - px = pState++; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - /* Update filter coefficients */ - while (tapCnt > 0U) - { - coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - - coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - - coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - - coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15); - *pb++ = (q15_t) __SSAT((coef), 16); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* copy data */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = (numTaps - 1U) >> 2U; - - while (tapCnt > 0U) - { - write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState)); - write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState)); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} - -/** - @} end of LMS group - */ diff --git a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c b/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c deleted file mode 100644 index 67ab8dc..0000000 --- a/Drivers/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c +++ /dev/null @@ -1,283 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_lms_q31.c - * Description: Processing function for the Q31 LMS filter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/filtering_functions.h" - -/** - @ingroup groupFilters - */ - -/** - @addtogroup LMS - @{ - */ - -/** - @brief Processing function for Q31 LMS filter. - @param[in] S points to an instance of the Q31 LMS filter structure. - @param[in] pSrc points to the block of input data. - @param[in] pRef points to the block of reference data. - @param[out] pOut points to the block of output data. - @param[out] pErr points to the block of error data. - @param[in] blockSize number of samples to process. - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate - multiplication results but provides only a single guard bit. - Thus, if the accumulator result overflows it wraps around rather than clips. - In order to avoid overflows completely the input signal must be scaled down by - log2(numTaps) bits. - The reference signal should not be scaled down. - After all multiply-accumulates are performed, the 2.62 accumulator is shifted - and saturated to 1.31 format to yield the final result. - The output signal and error signal are in 1.31 format. - @par - In this filter, filter coefficients are updated for each sample and - the updation of filter cofficients are saturted. - */ - -void arm_lms_q31( - const arm_lms_instance_q31 * S, - const q31_t * pSrc, - q31_t * pRef, - q31_t * pOut, - q31_t * pErr, - uint32_t blockSize) -{ - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t *px, *pb; /* Temporary pointers for state and coefficient buffers */ - q31_t mu = S->mu; /* Adaptive factor */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t tapCnt, blkCnt; /* Loop counters */ - q63_t acc; /* Accumulator */ - q31_t e = 0; /* Error of data sample */ - q31_t alpha; /* Intermediate constant for taps update */ - q31_t coef; /* Temporary variable for coef */ - q31_t acc_l, acc_h; /* Temporary input */ - uint32_t uShift = ((uint32_t) S->postShift + 1U); - uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ - - /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */ - /* pStateCurnt points to the location where the new input data should be written */ - pStateCurnt = &(S->pState[(numTaps - 1U)]); - - /* initialise loop count */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* Copy the new input sample into the state buffer */ - *pStateCurnt++ = *pSrc++; - - /* Initialize pState pointer */ - px = pState; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - - /* Set the accumulator to zero */ - acc = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - /* acc += b[N] * x[n-N] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* acc += b[N-1] * x[n-N-1] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* acc += b[N-2] * x[n-N-2] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* acc += b[N-3] * x[n-N-3] */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - acc += ((q63_t) (*px++)) * (*pb++); - - /* Decrement the loop counter */ - tapCnt--; - } - - /* Converting the result to 1.31 format */ - /* Calc lower part of acc */ - acc_l = acc & 0xffffffff; - - /* Calc upper part of acc */ - acc_h = (acc >> 32) & 0xffffffff; - - acc = (uint32_t) acc_l >> lShift | acc_h << uShift; - - /* Store the result from accumulator into the destination buffer. */ - *pOut++ = (q31_t) acc; - - /* Compute and store error */ - e = *pRef++ - (q31_t) acc; - *pErr++ = e; - - /* Compute alpha i.e. intermediate constant for taps update */ - alpha = (q31_t) (((q63_t) e * mu) >> 31); - - /* Initialize pState pointer */ - /* Advance state pointer by 1 for the next sample */ - px = pState++; - - /* Initialize coefficient pointer */ - pb = pCoeffs; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = numTaps >> 2U; - - /* Update filter coefficients */ - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - - /* coef is in 2.30 format */ - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - /* get coef in 1.31 format by left shifting */ - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); - /* update coefficient buffer to next coefficient */ - pb++; - - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); - pb++; - - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); - pb++; - - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); - pb++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = numTaps % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = numTaps; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - /* Perform the multiply-accumulate */ - coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32)); - *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U)); - pb++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Processing is complete. - Now copy the last numTaps - 1 samples to the start of the state buffer. - This prepares the state buffer for the next function call. */ - - /* Points to the start of the pState buffer */ - pStateCurnt = S->pState; - - /* copy data */ -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 taps at a time. */ - tapCnt = (numTaps - 1U) >> 2U; - - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - - /* Loop unrolling: Compute remaining taps */ - tapCnt = (numTaps - 1U) % 0x4U; - -#else - - /* Initialize tapCnt with number of samples */ - tapCnt = (numTaps - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (tapCnt > 0U) - { - *pStateCurnt++ = *pState++; - - /* Decrement loop counter */ - tapCnt--; - } - -} - -/** - @} end of LMS group - */ diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/CMakeLists.txt deleted file mode 100644 index f0f035d..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/CMakeLists.txt +++ /dev/null @@ -1,34 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPInterpolation) - -include(configLib) -include(configDsp) - - -add_library(CMSISDSPInterpolation STATIC) - -target_sources(CMSISDSPInterpolation PRIVATE arm_bilinear_interp_f32.c) -target_sources(CMSISDSPInterpolation PRIVATE arm_bilinear_interp_q15.c) -target_sources(CMSISDSPInterpolation PRIVATE arm_bilinear_interp_q31.c) -target_sources(CMSISDSPInterpolation PRIVATE arm_bilinear_interp_q7.c) -target_sources(CMSISDSPInterpolation PRIVATE arm_linear_interp_f32.c) -target_sources(CMSISDSPInterpolation PRIVATE arm_linear_interp_q15.c) -target_sources(CMSISDSPInterpolation PRIVATE arm_linear_interp_q31.c) -target_sources(CMSISDSPInterpolation PRIVATE arm_linear_interp_q7.c) -target_sources(CMSISDSPInterpolation PRIVATE arm_spline_interp_f32.c) -target_sources(CMSISDSPInterpolation PRIVATE arm_spline_interp_init_f32.c) - - -configLib(CMSISDSPInterpolation ${ROOT}) -configDsp(CMSISDSPInterpolation ${ROOT}) - -### Includes -target_include_directories(CMSISDSPInterpolation PUBLIC "${DSP}/Include") - - - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPInterpolation PRIVATE arm_bilinear_interp_f16.c) -target_sources(CMSISDSPInterpolation PRIVATE arm_linear_interp_f16.c) -endif() \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c deleted file mode 100644 index 6c88c75..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c +++ /dev/null @@ -1,41 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: InterpolationFunctions.c - * Description: Combination of all interpolation function source files. - * - * $Date: 22. July 2020 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_bilinear_interp_f32.c" -#include "arm_bilinear_interp_q15.c" -#include "arm_bilinear_interp_q31.c" -#include "arm_bilinear_interp_q7.c" -#include "arm_linear_interp_f32.c" -#include "arm_linear_interp_q15.c" -#include "arm_linear_interp_q31.c" -#include "arm_linear_interp_q7.c" -#include "arm_spline_interp_f32.c" -#include "arm_spline_interp_init_f32.c" - - - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c deleted file mode 100644 index 09f8dff..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c +++ /dev/null @@ -1,33 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: InterpolationFunctions.c - * Description: Combination of all interpolation function source files. - * - * $Date: 22. July 2020 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_bilinear_interp_f16.c" -#include "arm_linear_interp_f16.c" - - - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f16.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f16.c deleted file mode 100644 index 71ac42c..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f16.c +++ /dev/null @@ -1,168 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_bilinear_interp_f16.c - * Description: Floating-point bilinear interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupInterpolation - */ - -/** - * @defgroup BilinearInterpolate Bilinear Interpolation - * - * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid. - * The underlying function f(x, y) is sampled on a regular grid and the interpolation process - * determines values between the grid points. - * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension. - * Bilinear interpolation is often used in image processing to rescale images. - * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types. - * - * Algorithm - * \par - * The instance structure used by the bilinear interpolation functions describes a two dimensional data table. - * For floating-point, the instance structure is defined as: - * 
-   *   typedef struct
-   *   {
-   *     uint16_t numRows;
-   *     uint16_t numCols;
-   *     float16_t *pData;
-   * } arm_bilinear_interp_instance_f16;
-   *
- * - * \par - * where numRows specifies the number of rows in the table; - * numCols specifies the number of columns in the table; - * and pData points to an array of size numRows*numCols values. - * The data table pTable is organized in row order and the supplied data values fall on integer indexes. - * That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers. - * - * \par - * Let (x, y) specify the desired interpolation point. Then define: - * 
-   *     XF = floor(x)
-   *     YF = floor(y)
-   *
- * \par - * The interpolated output point is computed as: - * 
-   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
-   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
-   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
-   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
-   *
- * Note that the coordinates (x, y) contain integer and fractional components. - * The integer components specify which portion of the table to use while the - * fractional components control the interpolation processor. - * - * \par - * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. - */ - - - /** - * @addtogroup BilinearInterpolate - * @{ - */ - - - /** - * @brief Floating-point bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate. - * @param[in] Y interpolation coordinate. - * @return out interpolated value. - */ - float16_t arm_bilinear_interp_f16( - const arm_bilinear_interp_instance_f16 * S, - float16_t X, - float16_t Y) - { - float16_t out; - float16_t f00, f01, f10, f11; - float16_t *pData = S->pData; - int32_t xIndex, yIndex, index; - float16_t xdiff, ydiff; - float16_t b1, b2, b3, b4; - - xIndex = (int32_t) X; - yIndex = (int32_t) Y; - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if (xIndex < 0 || xIndex > (S->numCols - 2) || yIndex < 0 || yIndex > (S->numRows - 2)) - { - return (0); - } - - /* Calculation of index for two nearest points in X-direction */ - index = (xIndex ) + (yIndex ) * S->numCols; - - - /* Read two nearest points in X-direction */ - f00 = pData[index]; - f01 = pData[index + 1]; - - /* Calculation of index for two nearest points in Y-direction */ - index = (xIndex ) + (yIndex+1) * S->numCols; - - - /* Read two nearest points in Y-direction */ - f10 = pData[index]; - f11 = pData[index + 1]; - - /* Calculation of intermediate values */ - b1 = f00; - b2 = (_Float16)f01 - (_Float16)f00; - b3 = (_Float16)f10 - (_Float16)f00; - b4 = (_Float16)f00 - (_Float16)f01 - (_Float16)f10 + (_Float16)f11; - - /* Calculation of fractional part in X */ - xdiff = (_Float16)X - (_Float16)xIndex; - - /* Calculation of fractional part in Y */ - ydiff = (_Float16)Y - (_Float16)yIndex; - - /* Calculation of bi-linear interpolated output */ - out = (_Float16)b1 + (_Float16)b2 * (_Float16)xdiff + - (_Float16)b3 * (_Float16)ydiff + (_Float16)b4 * (_Float16)xdiff * (_Float16)ydiff; - - /* return to application */ - return (out); - } - - /** - * @} end of BilinearInterpolate group - */ - - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f32.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f32.c deleted file mode 100644 index 7bd6957..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f32.c +++ /dev/null @@ -1,161 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_bilinear_interp_f32.c - * Description: Floating-point bilinear interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions.h" - -/** - @ingroup groupInterpolation - */ - -/** - * @defgroup BilinearInterpolate Bilinear Interpolation - * - * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid. - * The underlying function f(x, y) is sampled on a regular grid and the interpolation process - * determines values between the grid points. - * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension. - * Bilinear interpolation is often used in image processing to rescale images. - * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types. - * - * Algorithm - * \par - * The instance structure used by the bilinear interpolation functions describes a two dimensional data table. - * For floating-point, the instance structure is defined as: - * 
-   *   typedef struct
-   *   {
-   *     uint16_t numRows;
-   *     uint16_t numCols;
-   *     float32_t *pData;
-   * } arm_bilinear_interp_instance_f32;
-   *
- * - * \par - * where numRows specifies the number of rows in the table; - * numCols specifies the number of columns in the table; - * and pData points to an array of size numRows*numCols values. - * The data table pTable is organized in row order and the supplied data values fall on integer indexes. - * That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers. - * - * \par - * Let (x, y) specify the desired interpolation point. Then define: - * 
-   *     XF = floor(x)
-   *     YF = floor(y)
-   *
- * \par - * The interpolated output point is computed as: - * 
-   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
-   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
-   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
-   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
-   *
- * Note that the coordinates (x, y) contain integer and fractional components. - * The integer components specify which portion of the table to use while the - * fractional components control the interpolation processor. - * - * \par - * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. - */ - - - /** - * @addtogroup BilinearInterpolate - * @{ - */ - - - /** - * @brief Floating-point bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate. - * @param[in] Y interpolation coordinate. - * @return out interpolated value. - */ - float32_t arm_bilinear_interp_f32( - const arm_bilinear_interp_instance_f32 * S, - float32_t X, - float32_t Y) - { - float32_t out; - float32_t f00, f01, f10, f11; - float32_t *pData = S->pData; - int32_t xIndex, yIndex, index; - float32_t xdiff, ydiff; - float32_t b1, b2, b3, b4; - - xIndex = (int32_t) X; - yIndex = (int32_t) Y; - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if (xIndex < 0 || xIndex > (S->numCols - 2) || yIndex < 0 || yIndex > (S->numRows - 2)) - { - return (0); - } - - /* Calculation of index for two nearest points in X-direction */ - index = (xIndex ) + (yIndex ) * S->numCols; - - - /* Read two nearest points in X-direction */ - f00 = pData[index]; - f01 = pData[index + 1]; - - /* Calculation of index for two nearest points in Y-direction */ - index = (xIndex ) + (yIndex+1) * S->numCols; - - - /* Read two nearest points in Y-direction */ - f10 = pData[index]; - f11 = pData[index + 1]; - - /* Calculation of intermediate values */ - b1 = f00; - b2 = f01 - f00; - b3 = f10 - f00; - b4 = f00 - f01 - f10 + f11; - - /* Calculation of fractional part in X */ - xdiff = X - xIndex; - - /* Calculation of fractional part in Y */ - ydiff = Y - yIndex; - - /* Calculation of bi-linear interpolated output */ - out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff; - - /* return to application */ - return (out); - } - - /** - * @} end of BilinearInterpolate group - */ - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q15.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q15.c deleted file mode 100644 index 018fd06..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q15.c +++ /dev/null @@ -1,121 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_linear_interp_q15.c - * Description: Q15 linear interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions.h" - -/** - @ingroup groupInterpolation - */ - -/** - * @addtogroup BilinearInterpolate - * @{ - */ - - /** - * @brief Q15 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - q15_t arm_bilinear_interp_q15( - arm_bilinear_interp_instance_q15 * S, - q31_t X, - q31_t Y) - { - q63_t acc = 0; /* output */ - q31_t out; /* Temporary output */ - q15_t x1, x2, y1, y2; /* Nearest output values */ - q31_t xfract, yfract; /* X, Y fractional parts */ - int32_t rI, cI; /* Row and column indices */ - q15_t *pYData = S->pData; /* pointer to output table values */ - uint32_t nCols = S->numCols; /* num of rows */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - rI = ((X & (q31_t)0xFFF00000) >> 20); - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - cI = ((Y & (q31_t)0xFFF00000) >> 20); - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if (rI < 0 || rI > (S->numCols - 2) || cI < 0 || cI > (S->numRows - 2)) - { - return (0); - } - - /* 20 bits for the fractional part */ - /* xfract should be in 12.20 format */ - xfract = (X & 0x000FFFFF); - - /* Read two nearest output values from the index */ - x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ]; - x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1]; - - /* 20 bits for the fractional part */ - /* yfract should be in 12.20 format */ - yfract = (Y & 0x000FFFFF); - - /* Read two nearest output values from the index */ - y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ]; - y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1]; - - /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */ - - /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */ - /* convert 13.35 to 13.31 by right shifting and out is in 1.31 */ - out = (q31_t) (((q63_t) x1 * (0x0FFFFF - xfract)) >> 4U); - acc = ((q63_t) out * (0x0FFFFF - yfract)); - - /* x2 * (xfract) * (1-yfract) in 1.51 and adding to acc */ - out = (q31_t) (((q63_t) x2 * (0x0FFFFF - yfract)) >> 4U); - acc += ((q63_t) out * (xfract)); - - /* y1 * (1 - xfract) * (yfract) in 1.51 and adding to acc */ - out = (q31_t) (((q63_t) y1 * (0x0FFFFF - xfract)) >> 4U); - acc += ((q63_t) out * (yfract)); - - /* y2 * (xfract) * (yfract) in 1.51 and adding to acc */ - out = (q31_t) (((q63_t) y2 * (xfract)) >> 4U); - acc += ((q63_t) out * (yfract)); - - /* acc is in 13.51 format and down shift acc by 36 times */ - /* Convert out to 1.15 format */ - return ((q15_t)(acc >> 36)); - } - - - /** - * @} end of BilinearInterpolate group - */ - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q31.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q31.c deleted file mode 100644 index be24c66..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q31.c +++ /dev/null @@ -1,119 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_linear_interp_q31.c - * Description: Q31 linear interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions.h" - -/** - @ingroup groupInterpolation - */ - - -/** - * @addtogroup BilinearInterpolate - * @{ - */ - - /** - * @brief Q31 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - q31_t arm_bilinear_interp_q31( - arm_bilinear_interp_instance_q31 * S, - q31_t X, - q31_t Y) - { - q31_t out; /* Temporary output */ - q31_t acc = 0; /* output */ - q31_t xfract, yfract; /* X, Y fractional parts */ - q31_t x1, x2, y1, y2; /* Nearest output values */ - int32_t rI, cI; /* Row and column indices */ - q31_t *pYData = S->pData; /* pointer to output table values */ - uint32_t nCols = S->numCols; /* num of rows */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - rI = ((X & (q31_t)0xFFF00000) >> 20); - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - cI = ((Y & (q31_t)0xFFF00000) >> 20); - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if (rI < 0 || rI > (S->numCols - 2) || cI < 0 || cI > (S->numRows - 2)) - { - return (0); - } - - /* 20 bits for the fractional part */ - /* shift left xfract by 11 to keep 1.31 format */ - xfract = (X & 0x000FFFFF) << 11U; - - /* Read two nearest output values from the index */ - x1 = pYData[(rI) + (int32_t)nCols * (cI) ]; - x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1]; - - /* 20 bits for the fractional part */ - /* shift left yfract by 11 to keep 1.31 format */ - yfract = (Y & 0x000FFFFF) << 11U; - - /* Read two nearest output values from the index */ - y1 = pYData[(rI) + (int32_t)nCols * (cI + 1) ]; - y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1]; - - /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */ - out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32)); - acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32)); - - /* x2 * (xfract) * (1-yfract) in 3.29(q29) and adding to acc */ - out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32)); - acc += ((q31_t) ((q63_t) out * (xfract) >> 32)); - - /* y1 * (1 - xfract) * (yfract) in 3.29(q29) and adding to acc */ - out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32)); - acc += ((q31_t) ((q63_t) out * (yfract) >> 32)); - - /* y2 * (xfract) * (yfract) in 3.29(q29) and adding to acc */ - out = ((q31_t) ((q63_t) y2 * (xfract) >> 32)); - acc += ((q31_t) ((q63_t) out * (yfract) >> 32)); - - /* Convert acc to 1.31(q31) format */ - return ((q31_t)(acc << 2)); - } - - - - /** - * @} end of BilinearInterpolate group - */ - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q7.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q7.c deleted file mode 100644 index e3f4b9a..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q7.c +++ /dev/null @@ -1,117 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_linear_interp_q7.c - * Description: Q7 linear interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions.h" - -/** - @ingroup groupInterpolation - */ - - -/** - * @addtogroup BilinearInterpolate - * @{ - */ - -/** - * @brief Q7 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - q7_t arm_bilinear_interp_q7( - arm_bilinear_interp_instance_q7 * S, - q31_t X, - q31_t Y) - { - q63_t acc = 0; /* output */ - q31_t out; /* Temporary output */ - q31_t xfract, yfract; /* X, Y fractional parts */ - q7_t x1, x2, y1, y2; /* Nearest output values */ - int32_t rI, cI; /* Row and column indices */ - q7_t *pYData = S->pData; /* pointer to output table values */ - uint32_t nCols = S->numCols; /* num of rows */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - rI = ((X & (q31_t)0xFFF00000) >> 20); - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - cI = ((Y & (q31_t)0xFFF00000) >> 20); - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if (rI < 0 || rI > (S->numCols - 2) || cI < 0 || cI > (S->numRows - 2)) - { - return (0); - } - - /* 20 bits for the fractional part */ - /* xfract should be in 12.20 format */ - xfract = (X & (q31_t)0x000FFFFF); - - /* Read two nearest output values from the index */ - x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ]; - x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1]; - - /* 20 bits for the fractional part */ - /* yfract should be in 12.20 format */ - yfract = (Y & (q31_t)0x000FFFFF); - - /* Read two nearest output values from the index */ - y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ]; - y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1]; - - /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */ - out = ((x1 * (0xFFFFF - xfract))); - acc = (((q63_t) out * (0xFFFFF - yfract))); - - /* x2 * (xfract) * (1-yfract) in 2.22 and adding to acc */ - out = ((x2 * (0xFFFFF - yfract))); - acc += (((q63_t) out * (xfract))); - - /* y1 * (1 - xfract) * (yfract) in 2.22 and adding to acc */ - out = ((y1 * (0xFFFFF - xfract))); - acc += (((q63_t) out * (yfract))); - - /* y2 * (xfract) * (yfract) in 2.22 and adding to acc */ - out = ((y2 * (yfract))); - acc += (((q63_t) out * (xfract))); - - /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */ - return ((q7_t)(acc >> 40)); - } - - /** - * @} end of BilinearInterpolate group - */ - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f16.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f16.c deleted file mode 100644 index e79a554..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f16.c +++ /dev/null @@ -1,132 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_linear_interp_f16.c - * Description: Floating-point linear interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupInterpolation - */ - -/** - * @defgroup LinearInterpolate Linear Interpolation - * - * Linear interpolation is a method of curve fitting using linear polynomials. - * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line - * - * \par - * \image html LinearInterp.gif "Linear interpolation" - * - * \par - * A Linear Interpolate function calculates an output value(y), for the input(x) - * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values) - * - * \par Algorithm: - * 
-   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
-   *       where x0, x1 are nearest values of input x
-   *             y0, y1 are nearest values to output y
-   *
- * - * \par - * This set of functions implements Linear interpolation process - * for Q7, Q15, Q31, and floating-point data types. The functions operate on a single - * sample of data and each call to the function returns a single processed value. - * S points to an instance of the Linear Interpolate function data structure. - * x is the input sample value. The functions returns the output value. - * - * \par - * if x is outside of the table boundary, Linear interpolation returns first value of the table - * if x is below input range and returns last value of table if x is above range. - */ - -/** - * @addtogroup LinearInterpolate - * @{ - */ - - /** - * @brief Process function for the floating-point Linear Interpolation Function. - * @param[in,out] S is an instance of the floating-point Linear Interpolation structure - * @param[in] x input sample to process - * @return y processed output sample. - * - */ - float16_t arm_linear_interp_f16( - arm_linear_interp_instance_f16 * S, - float16_t x) - { - float16_t y; - float16_t x0, x1; /* Nearest input values */ - float16_t y0, y1; /* Nearest output values */ - float16_t xSpacing = S->xSpacing; /* spacing between input values */ - int32_t i; /* Index variable */ - float16_t *pYData = S->pYData; /* pointer to output table */ - - /* Calculation of index */ - i = (int32_t) (((_Float16)x - (_Float16)S->x1) / (_Float16)xSpacing); - - if (i < 0) - { - /* Iniatilize output for below specified range as least output value of table */ - y = pYData[0]; - } - else if ((uint32_t)i >= (S->nValues - 1)) - { - /* Iniatilize output for above specified range as last output value of table */ - y = pYData[S->nValues - 1]; - } - else - { - /* Calculation of nearest input values */ - x0 = (_Float16)S->x1 + (_Float16)i * (_Float16)xSpacing; - x1 = (_Float16)S->x1 + (_Float16)(i + 1) * (_Float16)xSpacing; - - /* Read of nearest output values */ - y0 = pYData[i]; - y1 = pYData[i + 1]; - - /* Calculation of output */ - y = (_Float16)y0 + ((_Float16)x - (_Float16)x0) * - (((_Float16)y1 - (_Float16)y0) / ((_Float16)x1 - (_Float16)x0)); - - } - - /* returns output value */ - return (y); - } - - /** - * @} end of LinearInterpolate group - */ - - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f32.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f32.c deleted file mode 100644 index 6157a43..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f32.c +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_linear_interp_f32.c - * Description: Floating-point linear interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions.h" - -/** - @ingroup groupInterpolation - */ - -/** - * @defgroup LinearInterpolate Linear Interpolation - * - * Linear interpolation is a method of curve fitting using linear polynomials. - * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line - * - * \par - * \image html LinearInterp.gif "Linear interpolation" - * - * \par - * A Linear Interpolate function calculates an output value(y), for the input(x) - * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values) - * - * \par Algorithm: - * 
-   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
-   *       where x0, x1 are nearest values of input x
-   *             y0, y1 are nearest values to output y
-   *
- * - * \par - * This set of functions implements Linear interpolation process - * for Q7, Q15, Q31, and floating-point data types. The functions operate on a single - * sample of data and each call to the function returns a single processed value. - * S points to an instance of the Linear Interpolate function data structure. - * x is the input sample value. The functions returns the output value. - * - * \par - * if x is outside of the table boundary, Linear interpolation returns first value of the table - * if x is below input range and returns last value of table if x is above range. - */ - -/** - * @addtogroup LinearInterpolate - * @{ - */ - - /** - * @brief Process function for the floating-point Linear Interpolation Function. - * @param[in,out] S is an instance of the floating-point Linear Interpolation structure - * @param[in] x input sample to process - * @return y processed output sample. - * - */ - float32_t arm_linear_interp_f32( - arm_linear_interp_instance_f32 * S, - float32_t x) - { - float32_t y; - float32_t x0, x1; /* Nearest input values */ - float32_t y0, y1; /* Nearest output values */ - float32_t xSpacing = S->xSpacing; /* spacing between input values */ - int32_t i; /* Index variable */ - float32_t *pYData = S->pYData; /* pointer to output table */ - - /* Calculation of index */ - i = (int32_t) ((x - S->x1) / xSpacing); - - if (i < 0) - { - /* Iniatilize output for below specified range as least output value of table */ - y = pYData[0]; - } - else if ((uint32_t)i >= (S->nValues - 1)) - { - /* Iniatilize output for above specified range as last output value of table */ - y = pYData[S->nValues - 1]; - } - else - { - /* Calculation of nearest input values */ - x0 = S->x1 + i * xSpacing; - x1 = S->x1 + (i + 1) * xSpacing; - - /* Read of nearest output values */ - y0 = pYData[i]; - y1 = pYData[i + 1]; - - /* Calculation of output */ - y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0)); - - } - - /* returns output value */ - return (y); - } - - /** - * @} end of LinearInterpolate group - */ - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q15.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q15.c deleted file mode 100644 index 53d224e..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q15.c +++ /dev/null @@ -1,101 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_linear_interp_q15.c - * Description: Q15 linear interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions.h" - -/** - @ingroup groupInterpolation - */ - -/** - * @addtogroup LinearInterpolate - * @{ - */ - - /** - * - * @brief Process function for the Q15 Linear Interpolation Function. - * @param[in] pYData pointer to Q15 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - * - */ - q15_t arm_linear_interp_q15( - const q15_t * pYData, - q31_t x, - uint32_t nValues) - { - q63_t y; /* output */ - q15_t y0, y1; /* Nearest output values */ - q31_t fract; /* fractional part */ - int32_t index; /* Index to read nearest output values */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - index = ((x & (int32_t)0xFFF00000) >> 20); - - if (index >= (int32_t)(nValues - 1)) - { - return (pYData[nValues - 1]); - } - else if (index < 0) - { - return (pYData[0]); - } - else - { - /* 20 bits for the fractional part */ - /* fract is in 12.20 format */ - fract = (x & 0x000FFFFF); - - /* Read two nearest output values from the index */ - y0 = pYData[index]; - y1 = pYData[index + 1]; - - /* Calculation of y0 * (1-fract) and y is in 13.35 format */ - y = ((q63_t) y0 * (0xFFFFF - fract)); - - /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */ - y += ((q63_t) y1 * (fract)); - - /* convert y to 1.15 format */ - return (q15_t) (y >> 20); - } - } - - - /** - * @} end of LinearInterpolate group - */ - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q31.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q31.c deleted file mode 100644 index 3abae25..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q31.c +++ /dev/null @@ -1,103 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_linear_interp_q31.c - * Description: Q31 linear interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions.h" - -/** - @ingroup groupInterpolation - */ - - -/** - * @addtogroup LinearInterpolate - * @{ - */ - - /** - * - * @brief Process function for the Q31 Linear Interpolation Function. - * @param[in] pYData pointer to Q31 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - * - */ - q31_t arm_linear_interp_q31( - const q31_t * pYData, - q31_t x, - uint32_t nValues) - { - q31_t y; /* output */ - q31_t y0, y1; /* Nearest output values */ - q31_t fract; /* fractional part */ - int32_t index; /* Index to read nearest output values */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - index = ((x & (q31_t)0xFFF00000) >> 20); - - if (index >= (int32_t)(nValues - 1)) - { - return (pYData[nValues - 1]); - } - else if (index < 0) - { - return (pYData[0]); - } - else - { - /* 20 bits for the fractional part */ - /* shift left by 11 to keep fract in 1.31 format */ - fract = (x & 0x000FFFFF) << 11; - - /* Read two nearest output values from the index in 1.31(q31) format */ - y0 = pYData[index]; - y1 = pYData[index + 1]; - - /* Calculation of y0 * (1-fract) and y is in 2.30 format */ - y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32)); - - /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */ - y += ((q31_t) (((q63_t) y1 * fract) >> 32)); - - /* Convert y to 1.31 format */ - return (y << 1U); - } - } - - - - /** - * @} end of LinearInterpolate group - */ - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q7.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q7.c deleted file mode 100644 index ef786de..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q7.c +++ /dev/null @@ -1,99 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_linear_interp_q7.c - * Description: Q7 linear interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions.h" - -/** - @ingroup groupInterpolation - */ - - -/** - * @addtogroup LinearInterpolate - * @{ - */ - - /** - * - * @brief Process function for the Q7 Linear Interpolation Function. - * @param[in] pYData pointer to Q7 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - */ - q7_t arm_linear_interp_q7( - const q7_t * pYData, - q31_t x, - uint32_t nValues) - { - q31_t y; /* output */ - q7_t y0, y1; /* Nearest output values */ - q31_t fract; /* fractional part */ - uint32_t index; /* Index to read nearest output values */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - if (x < 0) - { - return (pYData[0]); - } - index = (x >> 20) & 0xfff; - - if (index >= (nValues - 1)) - { - return (pYData[nValues - 1]); - } - else - { - /* 20 bits for the fractional part */ - /* fract is in 12.20 format */ - fract = (x & 0x000FFFFF); - - /* Read two nearest output values from the index and are in 1.7(q7) format */ - y0 = pYData[index]; - y1 = pYData[index + 1]; - - /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */ - y = ((y0 * (0xFFFFF - fract))); - - /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */ - y += (y1 * fract); - - /* convert y to 1.7(q7) format */ - return (q7_t) (y >> 20); - } - } - /** - * @} end of LinearInterpolate group - */ - diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_f32.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_f32.c deleted file mode 100644 index 7430f9c..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_f32.c +++ /dev/null @@ -1,283 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_spline_interp_f32.c - * Description: Floating-point cubic spline interpolation - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions.h" - -/** - @ingroup groupInterpolation - */ - -/** - @defgroup SplineInterpolate Cubic Spline Interpolation - - Spline interpolation is a method of interpolation where the interpolant - is a piecewise-defined polynomial called "spline". - - @par Introduction - - Given a function f defined on the interval [a,b], a set of n nodes x(i) - where a=x(1) - S1(x) x(1) < x < x(2) - S(x) = ... - Sn-1(x) x(n-1) < x < x(n) - - - where - - 
 
-  Si(x) = a_i+b_i(x-xi)+c_i(x-xi)^2+d_i(x-xi)^3    i=1, ..., n-1
-
- - @par Algorithm - - Having defined h(i) = x(i+1) - x(i) - - 
-  h(i-1)c(i-1)+2[h(i-1)+h(i)]c(i)+h(i)c(i+1) = 3/h(i)*[a(i+1)-a(i)]-3/h(i-1)*[a(i)-a(i-1)]    i=2, ..., n-1
-
- - It is possible to write the previous conditions in matrix form (Ax=B). - In order to solve the system two boundary conidtions are needed. - - Natural spline: S1''(x1)=2*c(1)=0 ; Sn''(xn)=2*c(n)=0 - In matrix form: - - 
-  |  1        0         0  ...    0         0           0     ||  c(1)  | |                        0                        |
-  | h(0) 2[h(0)+h(1)] h(1) ...    0         0           0     ||  c(2)  | |      3/h(2)*[a(3)-a(2)]-3/h(1)*[a(2)-a(1)]      |
-  | ...      ...       ... ...   ...       ...         ...    ||  ...   |=|                       ...                       |
-  |  0        0         0  ... h(n-2) 2[h(n-2)+h(n-1)] h(n-1) || c(n-1) | | 3/h(n-1)*[a(n)-a(n-1)]-3/h(n-2)*[a(n-1)-a(n-2)] |
-  |  0        0         0  ...    0         0           1     ||  c(n)  | |                        0                        |
-
- - - Parabolic runout spline: S1''(x1)=2*c(1)=S2''(x2)=2*c(2) ; Sn-1''(xn-1)=2*c(n-1)=Sn''(xn)=2*c(n) - In matrix form: - - 
-  |  1       -1         0  ...    0         0           0     ||  c(1)  | |                        0                        |
-  | h(0) 2[h(0)+h(1)] h(1) ...    0         0           0     ||  c(2)  | |      3/h(2)*[a(3)-a(2)]-3/h(1)*[a(2)-a(1)]      |
-  | ...      ...       ... ...   ...       ...         ...    ||  ...   |=|                       ...                       |
-  |  0        0         0  ... h(n-2) 2[h(n-2)+h(n-1)] h(n-1) || c(n-1) | | 3/h(n-1)*[a(n)-a(n-1)]-3/h(n-2)*[a(n-1)-a(n-2)] |
-  |  0        0         0  ...    0        -1           1     ||  c(n)  | |                        0                        |
-
- - A is a tridiagonal matrix (a band matrix of bandwidth 3) of size N=n+1. The factorization - algorithms (A=LU) can be simplified considerably because a large number of zeros appear - in regular patterns. The Crout method has been used: - 1) Solve LZ=B - - 
-  u(1,2) = A(1,2)/A(1,1)
-  z(1)   = B(1)/l(11)
- 
-  FOR i=2, ..., N-1
-    l(i,i)   = A(i,i)-A(i,i-1)u(i-1,i)
-    u(i,i+1) = a(i,i+1)/l(i,i)
-    z(i)     = [B(i)-A(i,i-1)z(i-1)]/l(i,i)
-  
-  l(N,N) = A(N,N)-A(N,N-1)u(N-1,N)
-  z(N)   = [B(N)-A(N,N-1)z(N-1)]/l(N,N)
-
- - 2) Solve UX=Z - - 
-  c(N)=z(N)
-  
-  FOR i=N-1, ..., 1
-    c(i)=z(i)-u(i,i+1)c(i+1) 
-
- - c(i) for i=1, ..., n-1 are needed to compute the n-1 polynomials. - b(i) and d(i) are computed as: - - b(i) = [y(i+1)-y(i)]/h(i)-h(i)*[c(i+1)+2*c(i)]/3 - - d(i) = [c(i+1)-c(i)]/[3*h(i)] - Moreover, a(i)=y(i). - - @par Behaviour outside the given intervals - - It is possible to compute the interpolated vector for x values outside the - input range (xqx(n)). The coefficients used to compute the y values for - xqx(n) the - coefficients used for the last interval. - - */ - -/** - @addtogroup SplineInterpolate - @{ - */ - -/** - * @brief Processing function for the floating-point cubic spline interpolation. - * @param[in] S points to an instance of the floating-point spline structure. - * @param[in] xq points to the x values of the interpolated data points. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples of output data. - */ - -void arm_spline_f32( - arm_spline_instance_f32 * S, - const float32_t * xq, - float32_t * pDst, - uint32_t blockSize) -{ - const float32_t * x = S->x; - const float32_t * y = S->y; - int32_t n = S->n_x; - - /* Coefficients (a==y for i<=n-1) */ - float32_t * b = (S->coeffs); - float32_t * c = (S->coeffs)+(n-1); - float32_t * d = (S->coeffs)+(2*(n-1)); - - const float32_t * pXq = xq; - int32_t blkCnt = (int32_t)blockSize; - int32_t blkCnt2; - int32_t i; - float32_t x_sc; - -#ifdef ARM_MATH_NEON - float32x4_t xiv; - float32x4_t aiv; - float32x4_t biv; - float32x4_t civ; - float32x4_t div; - - float32x4_t xqv; - - float32x4_t temp; - float32x4_t diff; - float32x4_t yv; -#endif - - /* Create output for x(i) 4 ) - { - /* Load [xq(k) xq(k+1) xq(k+2) xq(k+3)] */ - xqv = vld1q_f32(pXq); - pXq+=4; - - /* Compute [xq(k)-x(i) xq(k+1)-x(i) xq(k+2)-x(i) xq(k+3)-x(i)] */ - diff = vsubq_f32(xqv, xiv); - temp = diff; - - /* y(i) = a(i) + ... */ - yv = aiv; - /* ... + b(i)*(x-x(i)) + ... */ - yv = vmlaq_f32(yv, biv, temp); - /* ... + c(i)*(x-x(i))^2 + ... */ - temp = vmulq_f32(temp, diff); - yv = vmlaq_f32(yv, civ, temp); - /* ... + d(i)*(x-x(i))^3 */ - temp = vmulq_f32(temp, diff); - yv = vmlaq_f32(yv, div, temp); - - /* Store [y(k) y(k+1) y(k+2) y(k+3)] */ - vst1q_f32(pDst, yv); - pDst+=4; - - blkCnt-=4; - } -#endif - while( *pXq <= x[i+1] && blkCnt > 0 ) - { - x_sc = *pXq++; - - *pDst = y[i]+b[i]*(x_sc-x[i])+c[i]*(x_sc-x[i])*(x_sc-x[i])+d[i]*(x_sc-x[i])*(x_sc-x[i])*(x_sc-x[i]); - - pDst++; - blkCnt--; - } - } - - /* Create output for remaining samples (x>=x(n)) */ -#ifdef ARM_MATH_NEON - /* Compute 4 outputs at a time */ - blkCnt2 = blkCnt >> 2; - - while(blkCnt2 > 0) - { - /* Load [xq(k) xq(k+1) xq(k+2) xq(k+3)] */ - xqv = vld1q_f32(pXq); - pXq+=4; - - /* Compute [xq(k)-x(i) xq(k+1)-x(i) xq(k+2)-x(i) xq(k+3)-x(i)] */ - diff = vsubq_f32(xqv, xiv); - temp = diff; - - /* y(i) = a(i) + ... */ - yv = aiv; - /* ... + b(i)*(x-x(i)) + ... */ - yv = vmlaq_f32(yv, biv, temp); - /* ... + c(i)*(x-x(i))^2 + ... */ - temp = vmulq_f32(temp, diff); - yv = vmlaq_f32(yv, civ, temp); - /* ... + d(i)*(x-x(i))^3 */ - temp = vmulq_f32(temp, diff); - yv = vmlaq_f32(yv, div, temp); - - /* Store [y(k) y(k+1) y(k+2) y(k+3)] */ - vst1q_f32(pDst, yv); - pDst+=4; - - blkCnt2--; - } - - /* Tail */ - blkCnt2 = blkCnt & 3; -#else - blkCnt2 = blkCnt; -#endif - - while(blkCnt2 > 0) - { - x_sc = *pXq++; - - *pDst = y[i-1]+b[i-1]*(x_sc-x[i-1])+c[i-1]*(x_sc-x[i-1])*(x_sc-x[i-1])+d[i-1]*(x_sc-x[i-1])*(x_sc-x[i-1])*(x_sc-x[i-1]); - - pDst++; - blkCnt2--; - } -} - -/** - @} end of SplineInterpolate group - */ diff --git a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_init_f32.c b/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_init_f32.c deleted file mode 100644 index 0909aaf..0000000 --- a/Drivers/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_init_f32.c +++ /dev/null @@ -1,175 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_spline_interp_init_f32.c - * Description: Floating-point cubic spline initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/interpolation_functions.h" - -/** - @ingroup groupInterpolation - */ - -/** - @addtogroup SplineInterpolate - @{ - - @par Initialization function - - The initialization function takes as input two arrays that the user has to allocate: - coeffs will contain the b, c, and d coefficients for the (n-1) intervals - (n is the number of known points), hence its size must be 3*(n-1); tempBuffer - is temporally used for internal computations and its size is n+n-1. - - @par - - The x input array must be strictly sorted in ascending order and it must - not contain twice the same value (x(i)x = x; - S->y = y; - S->n_x = n; - - /* == Solve LZ=B to obtain z(i) and u(i) == */ - - /* -- Row 1 -- */ - /* B(0) = 0, not computed */ - /* u(1,2) = a(1,2)/a(1,1) = a(1,2) */ - if(type == ARM_SPLINE_NATURAL) - u[0] = 0; /* a(1,2) = 0 */ - else if(type == ARM_SPLINE_PARABOLIC_RUNOUT) - u[0] = -1; /* a(1,2) = -1 */ - - z[0] = 0; /* z(1) = B(1)/a(1,1) = 0 always */ - - /* -- Rows 2 to N-1 (N=n+1) -- */ - hm1 = x[1] - x[0]; /* Initialize h(i-1) = h(1) = x(2)-x(1) */ - - for (i=1; i<(int32_t)n-1; i++) - { - /* Compute B(i) */ - hi = x[i+1]-x[i]; - Bi = 3*(y[i+1]-y[i])/hi - 3*(y[i]-y[i-1])/hm1; - - /* l(i) = a(i)-a(i,i-1)*u(i-1) = 2[h(i-1)+h(i)]-h(i-1)*u(i-1) */ - li = 2*(hi+hm1) - hm1*u[i-1]; - - /* u(i) = a(i,i+1)/l(i) = h(i)/l(i) */ - u[i] = hi/li; - - /* z(i) = [B(i)-h(i-1)*z(i-1)]/l(i) */ - z[i] = (Bi-hm1*z[i-1])/li; - - /* Update h(i-1) for next iteration */ - hm1 = hi; - } - - /* -- Row N -- */ - /* l(N) = a(N,N)-a(N,N-1)u(N-1) */ - /* z(N) = [-a(N,N-1)z(N-1)]/l(N) */ - if(type == ARM_SPLINE_NATURAL) - { - /* li = 1; a(N,N) = 1; a(N,N-1) = 0 */ - z[n-1] = 0; /* a(N,N-1) = 0 */ - } - else if(type == ARM_SPLINE_PARABOLIC_RUNOUT) - { - li = 1+u[n-2]; /* a(N,N) = 1; a(N,N-1) = -1 */ - z[n-1] = z[n-2]/li; /* a(N,N-1) = -1 */ - } - - /* == Solve UX = Z to obtain c(i) and */ - /* compute b(i) and d(i) from c(i) == */ - - cp1 = z[n-1]; /* Initialize c(i+1) = c(N) = z(N) */ - - for (i=n-2; i>=0; i--) - { - /* c(i) = z(i)-u(i+1)c(i+1) */ - c[i] = z[i]-u[i]*cp1; - - hi = x[i+1]-x[i]; - /* b(i) = [y(i+1)-y(i)]/h(i)-h(i)*[c(i+1)+2*c(i)]/3 */ - b[i] = (y[i+1]-y[i])/hi-hi*(cp1+2*c[i])/3; - - /* d(i) = [c(i+1)-c(i)]/[3*h(i)] */ - d[i] = (cp1-c[i])/(3*hi); - - /* Update c(i+1) for next iteration */ - cp1 = c[i]; - } - - /* == Finally, store the coefficients in the instance == */ - - S->coeffs = coeffs; -} - -/** - @} end of SplineInterpolate group - */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/MatrixFunctions/CMakeLists.txt deleted file mode 100644 index 94a1067..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/CMakeLists.txt +++ /dev/null @@ -1,54 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPMatrix) - -include(configLib) -include(configDsp) - -file(GLOB SRCF64 "./*_f64.c") -file(GLOB SRCF32 "./*_f32.c") -file(GLOB SRCF16 "./*_f16.c") -file(GLOB SRCQ31 "./*_q31.c") -file(GLOB SRCQ15 "./*_q15.c") -file(GLOB SRCQ7 "./*_q7.c") - -file(GLOB SRCU32 "./*_u32.c") -file(GLOB SRCU16 "./*_u16.c") -file(GLOB SRCU8 "./*_u8.c") - -add_library(CMSISDSPMatrix STATIC ${SRCF64}) -target_sources(CMSISDSPMatrix PRIVATE ${SRCF32}) - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPMatrix PRIVATE ${SRCF16}) -endif() - -target_sources(CMSISDSPMatrix PRIVATE ${SRCQ31}) -target_sources(CMSISDSPMatrix PRIVATE ${SRCQ15}) -target_sources(CMSISDSPMatrix PRIVATE ${SRCQ7}) - -target_sources(CMSISDSPMatrix PRIVATE ${SRCU32}) -target_sources(CMSISDSPMatrix PRIVATE ${SRCU16}) -target_sources(CMSISDSPMatrix PRIVATE ${SRCU8}) - -configLib(CMSISDSPMatrix ${ROOT}) -configDsp(CMSISDSPMatrix ${ROOT}) - -### Includes -target_include_directories(CMSISDSPMatrix PUBLIC "${DSP}/Include") - - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_add_f16.c) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_sub_f16.c) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_trans_f16.c) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_scale_f16.c) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_mult_f16.c) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_vec_mult_f16.c) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_cmplx_trans_f16.c) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_cmplx_mult_f16.c) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_inverse_f16.c) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_init_f16.c) -target_sources(CMSISDSPMatrix PRIVATE arm_mat_cholesky_f16.c) - -endif() diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c deleted file mode 100644 index d20ab4e..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c +++ /dev/null @@ -1,74 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: MatrixFunctions.c - * Description: Combination of all matrix function source files. - * - * $Date: 18. March 2019 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_mat_add_f32.c" -#include "arm_mat_add_q15.c" -#include "arm_mat_add_q31.c" -#include "arm_mat_cmplx_mult_f32.c" -#include "arm_mat_cmplx_mult_q15.c" -#include "arm_mat_cmplx_mult_q31.c" -#include "arm_mat_init_f32.c" -#include "arm_mat_init_q15.c" -#include "arm_mat_init_q31.c" -#include "arm_mat_inverse_f32.c" -#include "arm_mat_inverse_f64.c" -#include "arm_mat_mult_f64.c" -#include "arm_mat_mult_f32.c" -#include "arm_mat_mult_fast_q15.c" -#include "arm_mat_mult_fast_q31.c" -#include "arm_mat_mult_q7.c" -#include "arm_mat_mult_q15.c" -#include "arm_mat_mult_q31.c" -#include "arm_mat_mult_opt_q31.c" -#include "arm_mat_scale_f32.c" -#include "arm_mat_scale_q15.c" -#include "arm_mat_scale_q31.c" -#include "arm_mat_sub_f64.c" -#include "arm_mat_sub_f32.c" -#include "arm_mat_sub_q15.c" -#include "arm_mat_sub_q31.c" -#include "arm_mat_trans_f32.c" -#include "arm_mat_trans_f64.c" -#include "arm_mat_trans_q7.c" -#include "arm_mat_trans_q15.c" -#include "arm_mat_trans_q31.c" -#include "arm_mat_vec_mult_f32.c" -#include "arm_mat_vec_mult_q31.c" -#include "arm_mat_vec_mult_q15.c" -#include "arm_mat_vec_mult_q7.c" -#include "arm_mat_cmplx_trans_f32.c" -#include "arm_mat_cmplx_trans_q31.c" -#include "arm_mat_cmplx_trans_q15.c" -#include "arm_mat_cholesky_f64.c" -#include "arm_mat_cholesky_f32.c" -#include "arm_mat_solve_upper_triangular_f32.c" -#include "arm_mat_solve_lower_triangular_f32.c" -#include "arm_mat_solve_upper_triangular_f64.c" -#include "arm_mat_solve_lower_triangular_f64.c" -#include "arm_mat_ldlt_f32.c" -#include "arm_mat_ldlt_f64.c" diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c deleted file mode 100644 index 7319468..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c +++ /dev/null @@ -1,41 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: MatrixFunctions.c - * Description: Combination of all matrix function f16 source files. - * - * $Date: 18. March 2020 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_mat_add_f16.c" -#include "arm_mat_sub_f16.c" -#include "arm_mat_trans_f16.c" -#include "arm_mat_scale_f16.c" -#include "arm_mat_mult_f16.c" -#include "arm_mat_vec_mult_f16.c" -#include "arm_mat_cmplx_trans_f16.c" -#include "arm_mat_cmplx_mult_f16.c" -#include "arm_mat_inverse_f16.c" -#include "arm_mat_init_f16.c" -#include "arm_mat_cholesky_f16.c" -#include "arm_mat_solve_upper_triangular_f16.c" -#include "arm_mat_solve_lower_triangular_f16.c" diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f16.c deleted file mode 100644 index 4f855c2..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f16.c +++ /dev/null @@ -1,217 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_add_f16.c - * Description: Floating-point matrix addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixAdd - @{ - */ - - -/** - @brief Floating-point matrix addition. - @param[in] pSrcA points to first input matrix structure - @param[in] pSrcB points to second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -arm_status arm_mat_add_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ - arm_status status; - uint32_t numSamples; /* total number of elements in the matrix */ - float16_t *pDataA, *pDataB, *pDataDst; - f16x8_t vecA, vecB, vecDst; - float16_t const *pSrcAVec; - float16_t const *pSrcBVec; - uint32_t blkCnt; /* loop counters */ - - pDataA = pSrcA->pData; - pDataB = pSrcB->pData; - pDataDst = pDst->pData; - pSrcAVec = (float16_t const *) pDataA; - pSrcBVec = (float16_t const *) pDataB; - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif - { - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - blkCnt = numSamples >> 3; - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add and then store the results in the destination buffer. */ - vecA = vld1q(pSrcAVec); - pSrcAVec += 8; - vecB = vld1q(pSrcBVec); - pSrcBVec += 8; - vecDst = vaddq(vecA, vecB); - vst1q(pDataDst, vecDst); - pDataDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = numSamples & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcAVec); - vecB = vld1q(pSrcBVec); - vecDst = vaddq_m(vecDst, vecA, vecB, p0); - vstrhq_p(pDataDst, vecDst, p0); - } - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - return (status); -} -#else - -arm_status arm_mat_add_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ - float16_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float16_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix addition */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - - /* Add and store result in destination buffer. */ - *pOut++ = (_Float16)*pInA++ + (_Float16)*pInB++; - - *pOut++ = (_Float16)*pInA++ + (_Float16)*pInB++; - - *pOut++ = (_Float16)*pInA++ + (_Float16)*pInB++; - - *pOut++ = (_Float16)*pInA++ + (_Float16)*pInB++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - - /* Add and store result in destination buffer. */ - *pOut++ = (_Float16)*pInA++ + (_Float16)*pInB++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixAdd group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c deleted file mode 100644 index bb96274..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c +++ /dev/null @@ -1,304 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_add_f32.c - * Description: Floating-point matrix addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixAdd Matrix Addition - - Adds two matrices. - \image html MatrixAddition.gif "Addition of two 3 x 3 matrices" - - The functions check to make sure that - pSrcA, pSrcB, and pDst have the same - number of rows and columns. - */ - -/** - @addtogroup MatrixAdd - @{ - */ - - -/** - @brief Floating-point matrix addition. - @param[in] pSrcA points to first input matrix structure - @param[in] pSrcB points to second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -arm_status arm_mat_add_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - arm_status status; - uint32_t numSamples; /* total number of elements in the matrix */ - float32_t *pDataA, *pDataB, *pDataDst; - f32x4_t vecA, vecB, vecDst; - float32_t const *pSrcAVec; - float32_t const *pSrcBVec; - uint32_t blkCnt; /* loop counters */ - - pDataA = pSrcA->pData; - pDataB = pSrcB->pData; - pDataDst = pDst->pData; - pSrcAVec = (float32_t const *) pDataA; - pSrcBVec = (float32_t const *) pDataB; - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif - { - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - blkCnt = numSamples >> 2; - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add and then store the results in the destination buffer. */ - vecA = vld1q(pSrcAVec); - pSrcAVec += 4; - vecB = vld1q(pSrcBVec); - pSrcBVec += 4; - vecDst = vaddq(vecA, vecB); - vst1q(pDataDst, vecDst); - pDataDst += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = numSamples & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcAVec); - vecB = vld1q(pSrcBVec); - vecDst = vaddq_m(vecDst, vecA, vecB, p0); - vstrwq_p(pDataDst, vecDst, p0); - } - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - return (status); -} -#else -#if defined(ARM_MATH_NEON) -/* - -Neon version is assuming the matrix is small enough. -So no blocking is used for taking into account cache effects. -For big matrix, there exist better libraries for Neon. - -*/ -arm_status arm_mat_add_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix addition */ - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif - { - float32x4_t vec1; - float32x4_t vec2; - float32x4_t res; - - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - - blkCnt = numSamples >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add and then store the results in the destination buffer. */ - vec1 = vld1q_f32(pIn1); - vec2 = vld1q_f32(pIn2); - res = vaddq_f32(vec1, vec2); - vst1q_f32(pOut, res); - - /* update pointers to process next samples */ - pIn1 += 4U; - pIn2 += 4U; - pOut += 4U; - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the numSamples is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add and then store the results in the destination buffer. */ - *pOut++ = (*pIn1++) + (*pIn2++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#else -arm_status arm_mat_add_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix addition */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - - /* Add and store result in destination buffer. */ - *pOut++ = *pInA++ + *pInB++; - - *pOut++ = *pInA++ + *pInB++; - - *pOut++ = *pInA++ + *pInB++; - - *pOut++ = *pInA++ + *pInB++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - - /* Add and store result in destination buffer. */ - *pOut++ = *pInA++ + *pInB++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixAdd group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c deleted file mode 100644 index bf5f570..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c +++ /dev/null @@ -1,227 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_add_q15.c - * Description: Q15 matrix addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixAdd - @{ - */ - -/** - @brief Q15 matrix addition. - @param[in] pSrcA points to first input matrix structure - @param[in] pSrcB points to second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -arm_status arm_mat_add_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst) -{ - uint32_t numSamples; /* total number of elements in the matrix */ - q15_t *pDataA, *pDataB, *pDataDst; - q15x8_t vecA, vecB, vecDst; - q15_t const *pSrcAVec; - q15_t const *pSrcBVec; - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix addition */ - - pDataA = pSrcA->pData; - pDataB = pSrcB->pData; - pDataDst = pDst->pData; - pSrcAVec = (q15_t const *) pDataA; - pSrcBVec = (q15_t const *) pDataB; - - #ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - blkCnt = numSamples >> 3; - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add and then store the results in the destination buffer. */ - vecA = vld1q(pSrcAVec); pSrcAVec += 8; - vecB = vld1q(pSrcBVec); pSrcBVec += 8; - vecDst = vqaddq(vecA, vecB); - vst1q(pDataDst, vecDst); pDataDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numSamples & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcAVec); pSrcAVec += 8; - vecB = vld1q(pSrcBVec); pSrcBVec += 8; - vecDst = vqaddq_m(vecDst, vecA, vecB, p0); - vstrhq_p(pDataDst, vecDst, p0); - } - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_add_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix addition */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - - /* Add, saturate and store result in destination buffer. */ -#if defined (ARM_MATH_DSP) - write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB))); - - write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB))); -#else - *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16); - - *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16); - - *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16); - - *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - - /* Add, saturate and store result in destination buffer. */ -#if defined (ARM_MATH_DSP) - *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++); -#else - *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixAdd group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c deleted file mode 100644 index e310a1f..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c +++ /dev/null @@ -1,216 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_add_q31.c - * Description: Q31 matrix addition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixAdd - @{ - */ - -/** - @brief Q31 matrix addition. - @param[in] pSrcA points to first input matrix structure - @param[in] pSrcB points to second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -arm_status arm_mat_add_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - arm_status status; /* status of matrix addition */ - uint32_t numSamples; /* total number of elements in the matrix */ - q31_t *pDataA, *pDataB, *pDataDst; - q31x4_t vecA, vecB, vecDst; - q31_t const *pSrcAVec; - q31_t const *pSrcBVec; - uint32_t blkCnt; /* loop counters */ - - pDataA = pSrcA->pData; - pDataB = pSrcB->pData; - pDataDst = pDst->pData; - pSrcAVec = (q31_t const *) pDataA; - pSrcBVec = (q31_t const *) pDataB; - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - blkCnt = numSamples >> 2; - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* Add and then store the results in the destination buffer. */ - vecA = vld1q(pSrcAVec); - pSrcAVec += 4; - vecB = vld1q(pSrcBVec); - pSrcBVec += 4; - vecDst = vqaddq(vecA, vecB); - vst1q(pDataDst, vecDst); - pDataDst += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = numSamples & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcAVec); - pSrcAVec += 4; - vecB = vld1q(pSrcBVec); - pSrcBVec += 4; - vecDst = vqaddq_m(vecDst, vecA, vecB, p0); - vstrwq_p(pDataDst, vecDst, p0); - } - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_add_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix addition */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - - /* Add, saturate and store result in destination buffer. */ - *pOut++ = __QADD(*pInA++, *pInB++); - - *pOut++ = __QADD(*pInA++, *pInB++); - - *pOut++ = __QADD(*pInA++, *pInB++); - - *pOut++ = __QADD(*pInA++, *pInB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - - /* Add, saturate and store result in destination buffer. */ - *pOut++ = __QADD(*pInA++, *pInB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixAdd group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f16.c deleted file mode 100644 index 5ed329a..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f16.c +++ /dev/null @@ -1,256 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_cholesky_f16.c - * Description: Floating-point Cholesky decomposition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixChol - @{ - */ - -/** - * @brief Floating-point Cholesky decomposition of positive-definite matrix. - * @param[in] pSrc points to the instance of the input floating-point matrix structure. - * @param[out] pDst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - \ref ARM_MATH_DECOMPOSITION_FAILURE : Input matrix cannot be decomposed - * @par - * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition. - * The decomposition of A is returning a lower triangular matrix U such that A = U U^t - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -arm_status arm_mat_cholesky_f16( - const arm_matrix_instance_f16 * pSrc, - arm_matrix_instance_f16 * pDst) -{ - - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - int i,j,k; - int n = pSrc->numRows; - _Float16 invSqrtVj; - float16_t *pA,*pG; - int kCnt; - - mve_pred16_t p0; - - f16x8_t acc, acc0, acc1, acc2, acc3; - f16x8_t vecGi; - f16x8_t vecGj,vecGj0,vecGj1,vecGj2,vecGj3; - - - pA = pSrc->pData; - pG = pDst->pData; - - for(i=0 ;i < n ; i++) - { - for(j=i ; j+3 < n ; j+=4) - { - acc0 = vdupq_n_f16(0.0f16); - acc0[0]=pA[(j + 0) * n + i]; - - acc1 = vdupq_n_f16(0.0f16); - acc1[0]=pA[(j + 1) * n + i]; - - acc2 = vdupq_n_f16(0.0f16); - acc2[0]=pA[(j + 2) * n + i]; - - acc3 = vdupq_n_f16(0.0f16); - acc3[0]=pA[(j + 3) * n + i]; - - kCnt = i; - for(k=0; k < i ; k+=8) - { - p0 = vctp16q(kCnt); - - vecGi=vldrhq_z_f16(&pG[i * n + k],p0); - - vecGj0=vldrhq_z_f16(&pG[(j + 0) * n + k],p0); - vecGj1=vldrhq_z_f16(&pG[(j + 1) * n + k],p0); - vecGj2=vldrhq_z_f16(&pG[(j + 2) * n + k],p0); - vecGj3=vldrhq_z_f16(&pG[(j + 3) * n + k],p0); - - acc0 = vfmsq_m(acc0, vecGi, vecGj0, p0); - acc1 = vfmsq_m(acc1, vecGi, vecGj1, p0); - acc2 = vfmsq_m(acc2, vecGi, vecGj2, p0); - acc3 = vfmsq_m(acc3, vecGi, vecGj3, p0); - - kCnt -= 8; - } - pG[(j + 0) * n + i] = vecAddAcrossF16Mve(acc0); - pG[(j + 1) * n + i] = vecAddAcrossF16Mve(acc1); - pG[(j + 2) * n + i] = vecAddAcrossF16Mve(acc2); - pG[(j + 3) * n + i] = vecAddAcrossF16Mve(acc3); - } - - for(; j < n ; j++) - { - - kCnt = i; - acc = vdupq_n_f16(0.0f16); - acc[0] = pA[j * n + i]; - - for(k=0; k < i ; k+=8) - { - p0 = vctp16q(kCnt); - - vecGi=vldrhq_z_f16(&pG[i * n + k],p0); - vecGj=vldrhq_z_f16(&pG[j * n + k],p0); - - acc = vfmsq_m(acc, vecGi, vecGj,p0); - - kCnt -= 8; - } - pG[j * n + i] = vecAddAcrossF16Mve(acc); - } - - if ((_Float16)pG[i * n + i] <= 0.0f16) - { - return(ARM_MATH_DECOMPOSITION_FAILURE); - } - - invSqrtVj = 1.0f16/(_Float16)sqrtf((float32_t)pG[i * n + i]); - for(j=i; j < n ; j++) - { - pG[j * n + i] = (_Float16)pG[j * n + i] * (_Float16)invSqrtVj ; - } - } - - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_cholesky_f16( - const arm_matrix_instance_f16 * pSrc, - arm_matrix_instance_f16 * pDst) -{ - - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - int i,j,k; - int n = pSrc->numRows; - float16_t invSqrtVj; - float16_t *pA,*pG; - - pA = pSrc->pData; - pG = pDst->pData; - - - for(i=0 ; i < n ; i++) - { - for(j=i ; j < n ; j++) - { - pG[j * n + i] = pA[j * n + i]; - - for(k=0; k < i ; k++) - { - pG[j * n + i] = (_Float16)pG[j * n + i] - (_Float16)pG[i * n + k] * (_Float16)pG[j * n + k]; - } - } - - if ((_Float16)pG[i * n + i] <= 0.0f16) - { - return(ARM_MATH_DECOMPOSITION_FAILURE); - } - - /* The division is done in float32 for accuracy reason and - because doing it in f16 would not have any impact on the performances. - */ - invSqrtVj = 1.0f/sqrtf((float32_t)pG[i * n + i]); - for(j=i ; j < n ; j++) - { - pG[j * n + i] = (_Float16)pG[j * n + i] * (_Float16)invSqrtVj ; - } - } - - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixChol group - */ -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f32.c deleted file mode 100644 index 20605fc..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f32.c +++ /dev/null @@ -1,438 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_cholesky_f32.c - * Description: Floating-point Cholesky decomposition - * - * $Date: 05 October 2021 - * $Revision: V1.9.1 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixChol Cholesky and LDLT decompositions - - Computes the Cholesky or LDL^t decomposition of a matrix. - - - If the input matrix does not have a decomposition, then the - algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE. - */ - -/** - @addtogroup MatrixChol - @{ - */ - -/** - * @brief Floating-point Cholesky decomposition of positive-definite matrix. - * @param[in] pSrc points to the instance of the input floating-point matrix structure. - * @param[out] pDst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - \ref ARM_MATH_DECOMPOSITION_FAILURE : Input matrix cannot be decomposed - * @par - * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition. - * The decomposition of A is returning a lower triangular matrix U such that A = U U^t - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -arm_status arm_mat_cholesky_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - int i,j,k; - int n = pSrc->numRows; - float32_t invSqrtVj; - float32_t *pA,*pG; - int kCnt; - - mve_pred16_t p0; - - f32x4_t acc, acc0, acc1, acc2, acc3; - f32x4_t vecGi; - f32x4_t vecGj,vecGj0,vecGj1,vecGj2,vecGj3; - - - pA = pSrc->pData; - pG = pDst->pData; - - for(i=0 ;i < n ; i++) - { - for(j=i ; j+3 < n ; j+=4) - { - pG[(j + 0) * n + i] = pA[(j + 0) * n + i]; - pG[(j + 1) * n + i] = pA[(j + 1) * n + i]; - pG[(j + 2) * n + i] = pA[(j + 2) * n + i]; - pG[(j + 3) * n + i] = pA[(j + 3) * n + i]; - - kCnt = i; - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - acc2 = vdupq_n_f32(0.0f); - acc3 = vdupq_n_f32(0.0f); - - for(k=0; k < i ; k+=4) - { - p0 = vctp32q(kCnt); - - vecGi=vldrwq_z_f32(&pG[i * n + k],p0); - - vecGj0=vldrwq_z_f32(&pG[(j + 0) * n + k],p0); - vecGj1=vldrwq_z_f32(&pG[(j + 1) * n + k],p0); - vecGj2=vldrwq_z_f32(&pG[(j + 2) * n + k],p0); - vecGj3=vldrwq_z_f32(&pG[(j + 3) * n + k],p0); - - acc0 = vfmaq_m(acc0, vecGi, vecGj0, p0); - acc1 = vfmaq_m(acc1, vecGi, vecGj1, p0); - acc2 = vfmaq_m(acc2, vecGi, vecGj2, p0); - acc3 = vfmaq_m(acc3, vecGi, vecGj3, p0); - - kCnt -= 4; - } - pG[(j + 0) * n + i] -= vecAddAcrossF32Mve(acc0); - pG[(j + 1) * n + i] -= vecAddAcrossF32Mve(acc1); - pG[(j + 2) * n + i] -= vecAddAcrossF32Mve(acc2); - pG[(j + 3) * n + i] -= vecAddAcrossF32Mve(acc3); - } - - for(; j < n ; j++) - { - pG[j * n + i] = pA[j * n + i]; - - kCnt = i; - acc = vdupq_n_f32(0.0f); - - for(k=0; k < i ; k+=4) - { - p0 = vctp32q(kCnt); - - vecGi=vldrwq_z_f32(&pG[i * n + k],p0); - vecGj=vldrwq_z_f32(&pG[j * n + k],p0); - - acc = vfmaq_m(acc, vecGi, vecGj,p0); - - kCnt -= 4; - } - pG[j * n + i] -= vecAddAcrossF32Mve(acc); - } - - if (pG[i * n + i] <= 0.0f) - { - return(ARM_MATH_DECOMPOSITION_FAILURE); - } - - invSqrtVj = 1.0f/sqrtf(pG[i * n + i]); - for(j=i; j < n ; j++) - { - pG[j * n + i] = pG[j * n + i] * invSqrtVj ; - } - } - - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - -arm_status arm_mat_cholesky_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - int i,j,k; - int n = pSrc->numRows; - float32_t invSqrtVj; - float32_t *pA,*pG; - int kCnt; - - - f32x4_t acc, acc0, acc1, acc2, acc3; - f32x4_t vecGi; - f32x4_t vecGj,vecGj0,vecGj1,vecGj2,vecGj3; -#if !defined(__aarch64__) - f32x2_t tmp = vdup_n_f32(0); -#endif - float32_t sum=0.0f; - float32_t sum0=0.0f,sum1=0.0f,sum2=0.0f,sum3=0.0f; - - - pA = pSrc->pData; - pG = pDst->pData; - - for(i=0 ;i < n ; i++) - { - for(j=i ; j+3 < n ; j+=4) - { - pG[(j + 0) * n + i] = pA[(j + 0) * n + i]; - pG[(j + 1) * n + i] = pA[(j + 1) * n + i]; - pG[(j + 2) * n + i] = pA[(j + 2) * n + i]; - pG[(j + 3) * n + i] = pA[(j + 3) * n + i]; - - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - acc2 = vdupq_n_f32(0.0f); - acc3 = vdupq_n_f32(0.0f); - - kCnt = i >> 2; - k=0; - while(kCnt > 0) - { - - vecGi=vld1q_f32(&pG[i * n + k]); - - vecGj0=vld1q_f32(&pG[(j + 0) * n + k]); - vecGj1=vld1q_f32(&pG[(j + 1) * n + k]); - vecGj2=vld1q_f32(&pG[(j + 2) * n + k]); - vecGj3=vld1q_f32(&pG[(j + 3) * n + k]); - - acc0 = vfmaq_f32(acc0, vecGi, vecGj0); - acc1 = vfmaq_f32(acc1, vecGi, vecGj1); - acc2 = vfmaq_f32(acc2, vecGi, vecGj2); - acc3 = vfmaq_f32(acc3, vecGi, vecGj3); - - kCnt--; - k+=4; - } - -#if defined(__aarch64__) - sum0 = vpadds_f32(vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0))); - sum1 = vpadds_f32(vpadd_f32(vget_low_f32(acc1), vget_high_f32(acc1))); - sum2 = vpadds_f32(vpadd_f32(vget_low_f32(acc2), vget_high_f32(acc2))); - sum3 = vpadds_f32(vpadd_f32(vget_low_f32(acc3), vget_high_f32(acc3))); - -#else - tmp = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0)); - sum0 = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1); - - tmp = vpadd_f32(vget_low_f32(acc1), vget_high_f32(acc1)); - sum1 = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1); - - tmp = vpadd_f32(vget_low_f32(acc2), vget_high_f32(acc2)); - sum2 = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1); - - tmp = vpadd_f32(vget_low_f32(acc3), vget_high_f32(acc3)); - sum3 = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1); -#endif - - kCnt = i & 3; - while(kCnt > 0) - { - - sum0 = sum0 + pG[i * n + k] * pG[(j + 0) * n + k]; - sum1 = sum1 + pG[i * n + k] * pG[(j + 1) * n + k]; - sum2 = sum2 + pG[i * n + k] * pG[(j + 2) * n + k]; - sum3 = sum3 + pG[i * n + k] * pG[(j + 3) * n + k]; - kCnt--; - k++; - } - - pG[(j + 0) * n + i] -= sum0; - pG[(j + 1) * n + i] -= sum1; - pG[(j + 2) * n + i] -= sum2; - pG[(j + 3) * n + i] -= sum3; - } - - for(; j < n ; j++) - { - pG[j * n + i] = pA[j * n + i]; - - acc = vdupq_n_f32(0.0f); - - kCnt = i >> 2; - k=0; - while(kCnt > 0) - { - - vecGi=vld1q_f32(&pG[i * n + k]); - vecGj=vld1q_f32(&pG[j * n + k]); - - acc = vfmaq_f32(acc, vecGi, vecGj); - - kCnt--; - k+=4; - } - -#if defined(__aarch64__) - sum = vpadds_f32(vpadd_f32(vget_low_f32(acc), vget_high_f32(acc))); -#else - tmp = vpadd_f32(vget_low_f32(acc), vget_high_f32(acc)); - sum = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1); -#endif - - kCnt = i & 3; - while(kCnt > 0) - { - sum = sum + pG[i * n + k] * pG[(j + 0) * n + k]; - - - kCnt--; - k++; - } - - pG[j * n + i] -= sum; - } - - if (pG[i * n + i] <= 0.0f) - { - return(ARM_MATH_DECOMPOSITION_FAILURE); - } - - invSqrtVj = 1.0f/sqrtf(pG[i * n + i]); - for(j=i; j < n ; j++) - { - pG[j * n + i] = pG[j * n + i] * invSqrtVj ; - } - } - - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_cholesky_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - int i,j,k; - int n = pSrc->numRows; - float32_t invSqrtVj; - float32_t *pA,*pG; - - pA = pSrc->pData; - pG = pDst->pData; - - - for(i=0 ; i < n ; i++) - { - for(j=i ; j < n ; j++) - { - pG[j * n + i] = pA[j * n + i]; - - for(k=0; k < i ; k++) - { - pG[j * n + i] = pG[j * n + i] - pG[i * n + k] * pG[j * n + k]; - } - } - - if (pG[i * n + i] <= 0.0f) - { - return(ARM_MATH_DECOMPOSITION_FAILURE); - } - - invSqrtVj = 1.0f/sqrtf(pG[i * n + i]); - for(j=i ; j < n ; j++) - { - pG[j * n + i] = pG[j * n + i] * invSqrtVj ; - } - } - - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixChol group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f64.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f64.c deleted file mode 100644 index 9633177..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f64.c +++ /dev/null @@ -1,122 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_cholesky_f64.c - * Description: Floating-point Cholesky decomposition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixChol - @{ - */ - -/** - * @brief Floating-point Cholesky decomposition of positive-definite matrix. - * @param[in] pSrc points to the instance of the input floating-point matrix structure. - * @param[out] pDst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - \ref ARM_MATH_DECOMPOSITION_FAILURE : Input matrix cannot be decomposed - * @par - * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition. - * The decomposition of A is returning a lower triangular matrix U such that A = U U^t - */ - - -arm_status arm_mat_cholesky_f64( - const arm_matrix_instance_f64 * pSrc, - arm_matrix_instance_f64 * pDst) -{ - - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - int i,j,k; - int n = pSrc->numRows; - float64_t invSqrtVj; - float64_t *pA,*pG; - - pA = pSrc->pData; - pG = pDst->pData; - - - for(i=0 ; i < n ; i++) - { - for(j=i ; j < n ; j++) - { - pG[j * n + i] = pA[j * n + i]; - - for(k=0; k < i ; k++) - { - pG[j * n + i] = pG[j * n + i] - pG[i * n + k] * pG[j * n + k]; - } - } - - if (pG[i * n + i] <= 0.0) - { - return(ARM_MATH_DECOMPOSITION_FAILURE); - } - - invSqrtVj = 1.0/sqrt(pG[i * n + i]); - for(j=i ; j < n ; j++) - { - pG[j * n + i] = pG[j * n + i] * invSqrtVj ; - } - } - - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - -/** - @} end of MatrixChol group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f16.c deleted file mode 100644 index 3640099..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f16.c +++ /dev/null @@ -1,935 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_cmplx_mult_f16.c - * Description: Floating-point matrix multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup CmplxMatrixMult - @{ - */ - -/** - @brief Floating-point Complex matrix multiplication. - @param[in] pSrcA points to first input complex matrix structure - @param[in] pSrcB points to second input complex matrix structure - @param[out] pDst points to output complex matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H) -#pragma GCC warning "Scalar version of arm_mat_cmplx_mult_f16 built. Helium version has build issues with gcc." -#endif - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && !defined(__CMSIS_GCC_H) - -#include "arm_helium_utils.h" - -#define DONTCARE 0 /* inactive lane content */ - - -__STATIC_FORCEINLINE arm_status arm_mat_cmplx_mult_f16_2x2_mve( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ -#define MATRIX_DIM 2 - float16_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ - float16_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16x8_t vecColBOffs0,vecColAOffs0,vecColAOffs1; - float16_t *pInA0 = pInA; - f16x8_t acc0, acc1; - f16x8_t vecB, vecA0, vecA1; - f16x8_t vecTmp; - uint16_t tmp; - static const uint16_t offsetB0[8] = { 0, 1, - MATRIX_DIM * CMPLX_DIM, MATRIX_DIM * CMPLX_DIM + 1, - 2, 3, - MATRIX_DIM * CMPLX_DIM + 2 , MATRIX_DIM * CMPLX_DIM + 3, - }; - - - vecColBOffs0 = vldrhq_u16((uint16_t const *) offsetB0); - - tmp = 0; - vecColAOffs0 = viwdupq_u16(tmp, 4, 1); - - tmp = (CMPLX_DIM * MATRIX_DIM); - vecColAOffs1 = vecColAOffs0 + (uint16_t)(CMPLX_DIM * MATRIX_DIM); - - - pInB = (float16_t const *)pSrcB->pData; - - vecA0 = vldrhq_gather_shifted_offset_f16(pInA0, vecColAOffs0); - vecA1 = vldrhq_gather_shifted_offset_f16(pInA0, vecColAOffs1); - - - vecB = vldrhq_gather_shifted_offset(pInB, vecColBOffs0); - - acc0 = vcmulq(vecA0, vecB); - acc0 = vcmlaq_rot90(acc0, vecA0, vecB); - - acc1 = vcmulq(vecA1, vecB); - acc1 = vcmlaq_rot90(acc1, vecA1, vecB); - - - /* - * Compute - * re0+re1 | im0+im1 | re0+re1 | im0+im1 - * re2+re3 | im2+im3 | re2+re3 | im2+im3 - */ - - vecTmp = (f16x8_t) vrev64q_s32((int32x4_t) acc0); - vecTmp = vaddq(vecTmp, acc0); - - - *(float32_t *)(&pOut[0 * CMPLX_DIM * MATRIX_DIM]) = ((f32x4_t)vecTmp)[0]; - *(float32_t *)(&pOut[0 * CMPLX_DIM * MATRIX_DIM + CMPLX_DIM]) = ((f32x4_t)vecTmp)[2]; - - vecTmp = (f16x8_t) vrev64q_s32((int32x4_t) acc1); - vecTmp = vaddq(vecTmp, acc1); - - *(float32_t *)(&pOut[1 * CMPLX_DIM * MATRIX_DIM]) = ((f32x4_t)vecTmp)[0]; - *(float32_t *)(&pOut[1 * CMPLX_DIM * MATRIX_DIM + CMPLX_DIM]) = ((f32x4_t)vecTmp)[2]; - - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -#undef MATRIX_DIM -} - - - -__STATIC_FORCEINLINE arm_status arm_mat_cmplx_mult_f16_3x3_mve( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ -#define MATRIX_DIM 3 - float16_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ - float16_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16x8_t vecColBOffs0; - float16_t *pInA0 = pInA; - float16_t *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM; - float16_t *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM; - f16x8_t acc0, acc1, acc2; - f16x8_t vecB, vecA0, vecA1, vecA2; - static const uint16_t offsetB0[8] = { 0, 1, - MATRIX_DIM * CMPLX_DIM, MATRIX_DIM * CMPLX_DIM + 1, - 2 * MATRIX_DIM * CMPLX_DIM, 2 * MATRIX_DIM * CMPLX_DIM + 1, - DONTCARE, DONTCARE - }; - - - /* enable predication to disable upper half complex vector element */ - mve_pred16_t p0 = vctp16q(MATRIX_DIM * CMPLX_DIM); - - vecColBOffs0 = vldrhq_u16((uint16_t const *) offsetB0); - - pInB = (float16_t const *)pSrcB->pData; - - vecA0 = vldrhq_f16(pInA0); - vecA1 = vldrhq_f16(pInA1); - vecA2 = vldrhq_f16(pInA2); - - vecB = vldrhq_gather_shifted_offset_z(pInB, vecColBOffs0, p0); - - acc0 = vcmulq(vecA0, vecB); - acc0 = vcmlaq_rot90(acc0, vecA0, vecB); - - acc1 = vcmulq(vecA1, vecB); - acc1 = vcmlaq_rot90(acc1, vecA1, vecB); - - acc2 = vcmulq(vecA2, vecB); - acc2 = vcmlaq_rot90(acc2, vecA2, vecB); - - mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]); - pOut += CMPLX_DIM; - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrhq_gather_shifted_offset_z(pInB, vecColBOffs0, p0); - - acc0 = vcmulq(vecA0, vecB); - acc0 = vcmlaq_rot90(acc0, vecA0, vecB); - - acc1 = vcmulq(vecA1, vecB); - acc1 = vcmlaq_rot90(acc1, vecA1, vecB); - - acc2 = vcmulq(vecA2, vecB); - acc2 = vcmlaq_rot90(acc2, vecA2, vecB); - - mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]); - pOut += CMPLX_DIM; - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrhq_gather_shifted_offset_z(pInB, vecColBOffs0, p0); - - acc0 = vcmulq(vecA0, vecB); - acc0 = vcmlaq_rot90(acc0, vecA0, vecB); - - acc1 = vcmulq(vecA1, vecB); - acc1 = vcmlaq_rot90(acc1, vecA1, vecB); - - acc2 = vcmulq(vecA2, vecB); - acc2 = vcmlaq_rot90(acc2, vecA2, vecB); - - mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -#undef MATRIX_DIM -} - - - - -__STATIC_FORCEINLINE arm_status arm_mat_cmplx_mult_f16_4x4_mve( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ -#define MATRIX_DIM 4 - float16_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ - float16_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16x8_t vecColBOffs0; - float16_t *pInA0 = pInA; - float16_t *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM; - float16_t *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM; - float16_t *pInA3 = pInA2 + CMPLX_DIM * MATRIX_DIM; - f16x8_t acc0, acc1, acc2, acc3; - f16x8_t vecB, vecA; - static const uint16_t offsetB0[8] = { 0, 1, - MATRIX_DIM * CMPLX_DIM, MATRIX_DIM * CMPLX_DIM + 1, - 2 * MATRIX_DIM * CMPLX_DIM, 2 * MATRIX_DIM * CMPLX_DIM + 1, - 3 * MATRIX_DIM * CMPLX_DIM, 3 * MATRIX_DIM * CMPLX_DIM + 1 - }; - - vecColBOffs0 = vldrhq_u16((uint16_t const *) offsetB0); - - pInB = (float16_t const *)pSrcB->pData; - - vecB = vldrhq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrhq_f16(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrhq_f16(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrhq_f16(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrhq_f16(pInA3); - acc3 = vcmulq(vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - - mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc3, &pOut[3 * CMPLX_DIM * MATRIX_DIM]); - pOut += CMPLX_DIM; - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrhq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrhq_f16(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrhq_f16(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrhq_f16(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrhq_f16(pInA3); - acc3 = vcmulq(vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - - mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc3, &pOut[3 * CMPLX_DIM * MATRIX_DIM]); - pOut += CMPLX_DIM; - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrhq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrhq_f16(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrhq_f16(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrhq_f16(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrhq_f16(pInA3); - acc3 = vcmulq(vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - - mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc3, &pOut[3 * CMPLX_DIM * MATRIX_DIM]); - pOut += CMPLX_DIM; - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrhq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrhq_f16(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrhq_f16(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrhq_f16(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrhq_f16(pInA3); - acc3 = vcmulq(vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - - mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]); - mve_cmplx_sum_intra_vec_f16(acc3, &pOut[3 * CMPLX_DIM * MATRIX_DIM]); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -#undef MATRIX_DIM -} - - - -arm_status arm_mat_cmplx_mult_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ - float16_t const *pInB = (float16_t const *) pSrcB->pData; /* input data matrix pointer B */ - float16_t const *pInA = (float16_t const *) pSrcA->pData; /* input data matrix pointer A */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - float16_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint16_t col, i = 0U, row = numRowsA; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - uint16x8_t vecOffs, vecColBOffs; - uint32_t blkCnt,rowCnt; /* loop counters */ - - #ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ -if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - /* - * small squared matrix specialized routines - */ - if (numRowsA == numColsB && numColsB == numColsA) - { - if (numRowsA == 1) - { - pOut[0] = (_Float16)pInA[0] * (_Float16)pInB[0] - (_Float16)pInA[1] * (_Float16)pInB[1]; - pOut[1] = (_Float16)pInA[0] * (_Float16)pInB[1] + (_Float16)pInA[1] * (_Float16)pInB[0]; - return (ARM_MATH_SUCCESS); - } - else if (numRowsA == 2) - return arm_mat_cmplx_mult_f16_2x2_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 3) - return arm_mat_cmplx_mult_f16_3x3_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 4) - return arm_mat_cmplx_mult_f16_4x4_mve(pSrcA, pSrcB, pDst); - } - - vecColBOffs[0] = 0; - vecColBOffs[1] = 1; - vecColBOffs[2] = numColsB * CMPLX_DIM; - vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1; - vecColBOffs[4] = 2*numColsB * CMPLX_DIM; - vecColBOffs[5] = 2*(numColsB * CMPLX_DIM) + 1; - vecColBOffs[6] = 3*numColsB * CMPLX_DIM; - vecColBOffs[7] = 3*(numColsB * CMPLX_DIM) + 1; - - /* - * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB - */ - - /* - * row loop - */ - rowCnt = row >> 2; - while (rowCnt > 0u) - { - /* - * Output pointer is set to starting address of the row being processed - */ - px = pOut + i * CMPLX_DIM; - i = i + 4 * numColsB; - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB; - /* - * For every row wise process, the pInB pointer is set - * to the starting address of the pSrcB data - */ - pInB = (float16_t const *) pSrcB->pData; - /* - * column loop - */ - while (col > 0u) - { - /* - * generate 4 columns elements - */ - /* - * Matrix A columns number of MAC operations are to be performed - */ - - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec; - float16_t const *pInA0 = pInA; - float16_t const *pInA1 = pInA0 + numColsA * CMPLX_DIM; - float16_t const *pInA2 = pInA1 + numColsA * CMPLX_DIM; - float16_t const *pInA3 = pInA2 + numColsA * CMPLX_DIM; - f16x8_t acc0, acc1, acc2, acc3; - - acc0 = vdupq_n_f16(0.0f16); - acc1 = vdupq_n_f16(0.0f16); - acc2 = vdupq_n_f16(0.0f16); - acc3 = vdupq_n_f16(0.0f16); - - pSrcA0Vec = (float16_t const *) pInA0; - pSrcA1Vec = (float16_t const *) pInA1; - pSrcA2Vec = (float16_t const *) pInA2; - pSrcA3Vec = (float16_t const *) pInA3; - - vecOffs = vecColBOffs; - - /* - * process 1 x 4 block output - */ - blkCnt = (numColsA * CMPLX_DIM) >> 3; - while (blkCnt > 0U) - { - f16x8_t vecB, vecA; - - vecB = vldrhq_gather_shifted_offset_f16(pInB, vecOffs); - /* - * move Matrix B read offsets, 4 rows down - */ - vecOffs = vaddq_n_u16(vecOffs , (uint16_t) (numColsB * 4 * CMPLX_DIM)); - - vecA = vld1q(pSrcA0Vec); pSrcA0Vec += 8; - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vld1q(pSrcA1Vec); pSrcA1Vec += 8; - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vld1q(pSrcA2Vec); pSrcA2Vec += 8; - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vld1q(pSrcA3Vec); pSrcA3Vec += 8; - acc3 = vcmlaq(acc3, vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - blkCnt--; - } - /* - * Unsupported addressing mode compiler crash - */ - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (numColsA * CMPLX_DIM) & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecB, vecA; - - vecB = vldrhq_gather_shifted_offset_z_f16(pInB, vecOffs, p0); - /* - * move Matrix B read offsets, 4 rows down - */ - vecOffs = vaddq_n_u16(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM)); - - vecA = vld1q(pSrcA0Vec); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vld1q(pSrcA1Vec); - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vld1q(pSrcA2Vec); - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vld1q(pSrcA3Vec); - acc3 = vcmlaq(acc3, vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - } - - - mve_cmplx_sum_intra_vec_f16(acc0, &px[0 * CMPLX_DIM * numColsB + 0]); - mve_cmplx_sum_intra_vec_f16(acc1, &px[1 * CMPLX_DIM * numColsB + 0]); - mve_cmplx_sum_intra_vec_f16(acc2, &px[2 * CMPLX_DIM * numColsB + 0]); - mve_cmplx_sum_intra_vec_f16(acc3, &px[3 * CMPLX_DIM * numColsB + 0]); - - px += CMPLX_DIM; - /* - * Decrement the column loop counter - */ - col--; - /* - * Update the pointer pInB to point to the starting address of the next column - */ - pInB = (float16_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM; - } - - /* - * Update the pointer pInA to point to the starting address of the next row - */ - pInA += (numColsA * 4) * CMPLX_DIM; - /* - * Decrement the row loop counter - */ - rowCnt --; - - } - - rowCnt = row & 3; - while (rowCnt > 0u) - { - /* - * Output pointer is set to starting address of the row being processed - */ - px = pOut + i * CMPLX_DIM; - i = i + numColsB; - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB; - /* - * For every row wise process, the pInB pointer is set - * to the starting address of the pSrcB data - */ - pInB = (float16_t const *) pSrcB->pData; - /* - * column loop - */ - while (col > 0u) - { - /* - * generate 4 columns elements - */ - /* - * Matrix A columns number of MAC operations are to be performed - */ - - float16_t const *pSrcA0Vec; - float16_t const *pInA0 = pInA; - f16x8_t acc0; - - acc0 = vdupq_n_f16(0.0f16); - - pSrcA0Vec = (float16_t const *) pInA0; - - vecOffs = vecColBOffs; - - /* - * process 1 x 4 block output - */ - blkCnt = (numColsA * CMPLX_DIM) >> 3; - while (blkCnt > 0U) - { - f16x8_t vecB, vecA; - - vecB = vldrhq_gather_shifted_offset(pInB, vecOffs); - /* - * move Matrix B read offsets, 4 rows down - */ - vecOffs = vaddq_n_u16(vecOffs, (uint16_t) (4*numColsB * CMPLX_DIM)); - - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - - blkCnt--; - } - - - /* - * tail - */ - blkCnt = (numColsA * CMPLX_DIM) & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecB, vecA; - - vecB = vldrhq_gather_shifted_offset_z(pInB, vecOffs, p0); - - vecA = vld1q(pSrcA0Vec); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - } - - mve_cmplx_sum_intra_vec_f16(acc0, &px[0]); - - - px += CMPLX_DIM; - /* - * Decrement the column loop counter - */ - col--; - /* - * Update the pointer pInB to point to the starting address of the next column - */ - pInB = (float16_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM; - } - - /* - * Update the pointer pInA to point to the starting address of the next row - */ - pInA += numColsA * CMPLX_DIM; - rowCnt--; - } - - /* - * set status as ARM_MATH_SUCCESS - */ - status = ARM_MATH_SUCCESS; - } - /* - * Return to application - */ - return (status); -} -#else - -arm_status arm_mat_cmplx_mult_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ - float16_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ - float16_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ - float16_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ - float16_t *pOut = pDst->pData; /* Output data matrix pointer */ - float16_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - _Float16 sumReal, sumImag; /* Accumulator */ - _Float16 a1, b1, c1, d1; - uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - -#if defined (ARM_MATH_LOOPUNROLL) - _Float16 a0, b0, c0, d0; -#endif - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + 2 * i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - j = 0U; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sumReal = 0.0f16; - sumImag = 0.0f16; - - /* Initiate pointer pIn1 to point to starting address of column being processed */ - pIn1 = pInA; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - - /* Reading real part of complex matrix A */ - a0 = *pIn1; - - /* Reading real part of complex matrix B */ - c0 = *pIn2; - - /* Reading imaginary part of complex matrix A */ - b0 = *(pIn1 + 1U); - - /* Reading imaginary part of complex matrix B */ - d0 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += a0 * c0; - sumImag += b0 * c0; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= b0 * d0; - sumImag += a0 * d0; - - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* read real and imag values from pSrcA and pSrcB buffer */ - a1 = *(pIn1 ); - c1 = *(pIn2 ); - b1 = *(pIn1 + 1U); - d1 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += a1 * c1; - sumImag += b1 * c1; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= b1 * d1; - sumImag += a1 * d1; - - a0 = *(pIn1 ); - c0 = *(pIn2 ); - b0 = *(pIn1 + 1U); - d0 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += a0 * c0; - sumImag += b0 * c0; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= b0 * d0; - sumImag += a0 * d0; - - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - a1 = *(pIn1 ); - c1 = *(pIn2 ); - b1 = *(pIn1 + 1U); - d1 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += a1 * c1; - sumImag += b1 * c1; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= b1 * d1; - sumImag += a1 * d1; - - /* Decrement loop count */ - colCnt--; - } - - /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - colCnt = numColsA % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - colCnt = numColsA; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - a1 = *(pIn1 ); - c1 = *(pIn2 ); - b1 = *(pIn1 + 1U); - d1 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += a1 * c1; - sumImag += b1 * c1; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= b1 * d1; - sumImag += a1 * d1; - - /* Decrement loop counter */ - colCnt--; - } - - /* Store result in destination buffer */ - *px++ = sumReal; - *px++ = sumImag; - - /* Update pointer pIn2 to point to starting address of next column */ - j++; - pIn2 = pSrcB->pData + 2U * j; - - /* Decrement column loop counter */ - col--; - - } while (col > 0U); - - /* Update pointer pInA to point to starting address of next row */ - i = i + numColsB; - pInA = pInA + 2 * numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixMult group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c deleted file mode 100644 index a38c09a..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c +++ /dev/null @@ -1,1407 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_cmplx_mult_f32.c - * Description: Floating-point matrix multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup CmplxMatrixMult Complex Matrix Multiplication - - Complex Matrix multiplication is only defined if the number of columns of the - first matrix equals the number of rows of the second matrix. - Multiplying an M x N matrix with an N x P matrix results - in an M x P matrix. - @par - When matrix size checking is enabled, the functions check: - - that the inner dimensions of pSrcA and pSrcB are equal; - - that the size of the output matrix equals the outer dimensions of pSrcA and pSrcB. - */ - - -/** - @addtogroup CmplxMatrixMult - @{ - */ - -/** - @brief Floating-point Complex matrix multiplication. - @param[in] pSrcA points to first input complex matrix structure - @param[in] pSrcB points to second input complex matrix structure - @param[out] pDst points to output complex matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -#define MATRIX_DIM2 2 -#define MATRIX_DIM3 3 -#define MATRIX_DIM4 4 - -__STATIC_INLINE arm_status arm_mat_cmplx_mult_f32_2x2_mve( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs0; - float32_t *pInA0 = pInA; - float32_t *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM2; - f32x4_t acc0, acc1; - f32x4_t vecB, vecA; - - static const uint32_t offsetB0[4] = { 0, 1, - MATRIX_DIM2 * CMPLX_DIM, MATRIX_DIM2 * CMPLX_DIM + 1 - }; - - vecColBOffs0 = vldrwq_u32((uint32_t const *) offsetB0); - - pInB = (float32_t const *)pSrcB->pData; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrwq_f32(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc0[0] + acc0[2]; - pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc0[1] + acc0[3]; - pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc1[0] + acc1[2]; - pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc1[1] + acc1[3]; - pOut += CMPLX_DIM; - - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrwq_f32(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc0[0] + acc0[2]; - pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc0[1] + acc0[3]; - pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc1[0] + acc1[2]; - pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc1[1] + acc1[3]; - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - -__STATIC_INLINE arm_status arm_mat_cmplx_mult_f32_3x3_mve( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs0, vecColBOffs1; - float32_t *pInA0 = pInA; - float32_t *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM3; - float32_t *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM3; - f32x4_t acc0, acc1, acc2; - f32x4_t vecB, vecA; - /* enable predication to disable upper half complex vector element */ - mve_pred16_t p0 = vctp32q(CMPLX_DIM); - - static const uint32_t offsetB0[4] = { 0, 1, - MATRIX_DIM3 * CMPLX_DIM, MATRIX_DIM3 * CMPLX_DIM + 1 - }; - static const uint32_t offsetB1[4] = { 2 * MATRIX_DIM3 * CMPLX_DIM, 2 * MATRIX_DIM3 * CMPLX_DIM + 1, - INACTIVELANE, INACTIVELANE - }; - - vecColBOffs0 = vldrwq_u32((uint32_t const *) offsetB0); - vecColBOffs1 = vldrwq_u32((uint32_t const *) offsetB1); - - pInB = (float32_t const *)pSrcB->pData; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrwq_f32(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - - vecB = vldrwq_gather_shifted_offset_z(pInB, vecColBOffs1, p0); - - vecA = vldrwq_f32(&pInA0[4]); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(&pInA1[4]); - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(&pInA2[4]); - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc0[0] + acc0[2]; - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc0[1] + acc0[3]; - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc1[0] + acc1[2]; - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc1[1] + acc1[3]; - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc2[0] + acc2[2]; - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc2[1] + acc2[3]; - pOut += CMPLX_DIM; - - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrwq_f32(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecB = vldrwq_gather_shifted_offset_z(pInB, vecColBOffs1, p0); - - vecA = vldrwq_f32(&pInA0[4]); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(&pInA1[4]); - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(&pInA2[4]); - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc0[0] + acc0[2]; - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc0[1] + acc0[3]; - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc1[0] + acc1[2]; - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc1[1] + acc1[3]; - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc2[0] + acc2[2]; - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc2[1] + acc2[3]; - pOut += CMPLX_DIM; - - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrwq_f32(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecB = vldrwq_gather_shifted_offset_z(pInB, vecColBOffs1, p0); - - vecA = vldrwq_f32(&pInA0[4]); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(&pInA1[4]); - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(&pInA2[4]); - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc0[0] + acc0[2]; - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc0[1] + acc0[3]; - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc1[0] + acc1[2]; - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc1[1] + acc1[3]; - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc2[0] + acc2[2]; - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc2[1] + acc2[3]; - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - - -__STATIC_INLINE arm_status arm_mat_cmplx_mult_f32_4x4_mve( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs0, vecColBOffs1; - float32_t *pInA0 = pInA; - float32_t *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM4; - float32_t *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM4; - float32_t *pInA3 = pInA2 + CMPLX_DIM * MATRIX_DIM4; - f32x4_t acc0, acc1, acc2, acc3; - f32x4_t vecB, vecA; - - static const uint32_t offsetB0[4] = { 0, 1, - MATRIX_DIM4 * CMPLX_DIM, MATRIX_DIM4 * CMPLX_DIM + 1 - }; - static const uint32_t offsetB1[4] = { 2 * MATRIX_DIM4 * CMPLX_DIM, 2 * MATRIX_DIM4 * CMPLX_DIM + 1, - 3 * MATRIX_DIM4 * CMPLX_DIM, 3 * MATRIX_DIM4 * CMPLX_DIM + 1 - }; - - vecColBOffs0 = vldrwq_u32((uint32_t const *) offsetB0); - vecColBOffs1 = vldrwq_u32((uint32_t const *) offsetB1); - - pInB = (float32_t const *)pSrcB->pData; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrwq_f32(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrwq_f32(pInA3); - acc3 = vcmulq(vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_f32(&pInA0[4]); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(&pInA1[4]); - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(&pInA2[4]); - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrwq_f32(&pInA3[4]); - acc3 = vcmlaq(acc3, vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2]; - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3]; - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2]; - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3]; - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2]; - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3]; - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2]; - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3]; - pOut += CMPLX_DIM; - - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrwq_f32(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrwq_f32(pInA3); - acc3 = vcmulq(vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_f32(&pInA0[4]); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(&pInA1[4]); - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(&pInA2[4]); - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrwq_f32(&pInA3[4]); - acc3 = vcmlaq(acc3, vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2]; - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3]; - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2]; - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3]; - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2]; - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3]; - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2]; - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3]; - pOut += CMPLX_DIM; - - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrwq_f32(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrwq_f32(pInA3); - acc3 = vcmulq(vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_f32(&pInA0[4]); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(&pInA1[4]); - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(&pInA2[4]); - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrwq_f32(&pInA3[4]); - acc3 = vcmlaq(acc3, vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2]; - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3]; - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2]; - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3]; - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2]; - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3]; - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2]; - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3]; - pOut += CMPLX_DIM; - - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - - vecA = vldrwq_f32(pInA0); - acc0 = vcmulq(vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(pInA1); - acc1 = vcmulq(vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(pInA2); - acc2 = vcmulq(vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrwq_f32(pInA3); - acc3 = vcmulq(vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_f32(&pInA0[4]); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - vecA = vldrwq_f32(&pInA1[4]); - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - - vecA = vldrwq_f32(&pInA2[4]); - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - - vecA = vldrwq_f32(&pInA3[4]); - acc3 = vcmlaq(acc3, vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2]; - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3]; - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2]; - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3]; - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2]; - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3]; - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2]; - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3]; - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - -arm_status arm_mat_cmplx_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t const *pInB = (float32_t const *) pSrcB->pData; /* input data matrix pointer B */ - float32_t const *pInA = (float32_t const *) pSrcA->pData; /* input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint16_t col, i = 0U, row = numRowsA; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - uint32x4_t vecOffs, vecColBOffs; - uint32_t blkCnt, rowCnt; /* loop counters */ - - #ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* - * small squared matrix specialized routines - */ - if (numRowsA == numColsB && numColsB == numColsA) - { - if (numRowsA == 1) - { - pOut[0] = pInA[0] * pInB[0] - pInA[1] * pInB[1]; - pOut[1] = pInA[0] * pInB[1] + pInA[1] * pInB[0]; - return (ARM_MATH_SUCCESS); - } - else if (numRowsA == 2) - return arm_mat_cmplx_mult_f32_2x2_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 3) - return arm_mat_cmplx_mult_f32_3x3_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 4) - return arm_mat_cmplx_mult_f32_4x4_mve(pSrcA, pSrcB, pDst); - } - - vecColBOffs[0] = 0; - vecColBOffs[1] = 1; - vecColBOffs[2] = numColsB * CMPLX_DIM; - vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1; - - /* - * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB - */ - - /* - * row loop - */ - rowCnt = row >> 2; - while (rowCnt > 0u) - { - /* - * Output pointer is set to starting address of the row being processed - */ - px = pOut + i * CMPLX_DIM; - i = i + 4 * numColsB; - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB; - /* - * For every row wise process, the pInB pointer is set - * to the starting address of the pSrcB data - */ - pInB = (float32_t const *) pSrcB->pData; - /* - * column loop - */ - while (col > 0u) - { - /* - * generate 4 columns elements - */ - /* - * Matrix A columns number of MAC operations are to be performed - */ - - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec; - float32_t const *pInA0 = pInA; - float32_t const *pInA1 = pInA0 + numColsA * CMPLX_DIM; - float32_t const *pInA2 = pInA1 + numColsA * CMPLX_DIM; - float32_t const *pInA3 = pInA2 + numColsA * CMPLX_DIM; - f32x4_t acc0, acc1, acc2, acc3; - - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - acc2 = vdupq_n_f32(0.0f); - acc3 = vdupq_n_f32(0.0f); - - pSrcA0Vec = (float32_t const *) pInA0; - pSrcA1Vec = (float32_t const *) pInA1; - pSrcA2Vec = (float32_t const *) pInA2; - pSrcA3Vec = (float32_t const *) pInA3; - - vecOffs = vecColBOffs; - - /* - * process 1 x 4 block output - */ - blkCnt = (numColsA * CMPLX_DIM) >> 2; - while (blkCnt > 0U) - { - f32x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); - /* - * move Matrix B read offsets, 4 rows down - */ - vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); - - vecA = vld1q(pSrcA0Vec); pSrcA0Vec += 4; - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - vecA = vld1q(pSrcA1Vec); pSrcA1Vec += 4; - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - vecA = vld1q(pSrcA2Vec); pSrcA2Vec += 4; - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - vecA = vld1q(pSrcA3Vec); pSrcA3Vec += 4; - acc3 = vcmlaq(acc3, vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - blkCnt--; - } - - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (numColsA * CMPLX_DIM) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); - /* - * move Matrix B read offsets, 4 rows down - */ - vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); - - vecA = vld1q(pSrcA0Vec); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - vecA = vld1q(pSrcA1Vec); - acc1 = vcmlaq(acc1, vecA, vecB); - acc1 = vcmlaq_rot90(acc1, vecA, vecB); - vecA = vld1q(pSrcA2Vec); - acc2 = vcmlaq(acc2, vecA, vecB); - acc2 = vcmlaq_rot90(acc2, vecA, vecB); - vecA = vld1q(pSrcA3Vec); - acc3 = vcmlaq(acc3, vecA, vecB); - acc3 = vcmlaq_rot90(acc3, vecA, vecB); - - } - - px[0 * CMPLX_DIM * numColsB + 0] = acc0[0] + acc0[2]; - px[0 * CMPLX_DIM * numColsB + 1] = acc0[1] + acc0[3]; - px[1 * CMPLX_DIM * numColsB + 0] = acc1[0] + acc1[2]; - px[1 * CMPLX_DIM * numColsB + 1] = acc1[1] + acc1[3]; - px[2 * CMPLX_DIM * numColsB + 0] = acc2[0] + acc2[2]; - px[2 * CMPLX_DIM * numColsB + 1] = acc2[1] + acc2[3]; - px[3 * CMPLX_DIM * numColsB + 0] = acc3[0] + acc3[2]; - px[3 * CMPLX_DIM * numColsB + 1] = acc3[1] + acc3[3]; - px += CMPLX_DIM; - /* - * Decrement the column loop counter - */ - col--; - /* - * Update the pointer pInB to point to the starting address of the next column - */ - pInB = (float32_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM; - } - - /* - * Update the pointer pInA to point to the starting address of the next row - */ - pInA += (numColsA * 4) * CMPLX_DIM; - /* - * Decrement the row loop counter - */ - rowCnt --; - - } - - rowCnt = row & 3; - while (rowCnt > 0u) - { - /* - * Output pointer is set to starting address of the row being processed - */ - px = pOut + i * CMPLX_DIM; - i = i + numColsB; - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB; - /* - * For every row wise process, the pInB pointer is set - * to the starting address of the pSrcB data - */ - pInB = (float32_t const *) pSrcB->pData; - /* - * column loop - */ - while (col > 0u) - { - /* - * generate 4 columns elements - */ - /* - * Matrix A columns number of MAC operations are to be performed - */ - - float32_t const *pSrcA0Vec; - float32_t const *pInA0 = pInA; - f32x4_t acc0; - - acc0 = vdupq_n_f32(0.0f); - - pSrcA0Vec = (float32_t const *) pInA0; - - vecOffs = vecColBOffs; - - /* - * process 1 x 4 block output - */ - blkCnt = (numColsA * CMPLX_DIM) >> 2; - while (blkCnt > 0U) - { - f32x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); - /* - * move Matrix B read offsets, 4 rows down - */ - vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); - - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - - blkCnt--; - } - - - /* - * tail - */ - blkCnt = (numColsA * CMPLX_DIM) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); - - vecA = vld1q(pSrcA0Vec); - acc0 = vcmlaq(acc0, vecA, vecB); - acc0 = vcmlaq_rot90(acc0, vecA, vecB); - - } - - px[0] = acc0[0] + acc0[2]; - px[1] = acc0[1] + acc0[3]; - - px += CMPLX_DIM; - /* - * Decrement the column loop counter - */ - col--; - /* - * Update the pointer pInB to point to the starting address of the next column - */ - pInB = (float32_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM; - } - - /* - * Update the pointer pInA to point to the starting address of the next row - */ - pInA += numColsA * CMPLX_DIM; - rowCnt--; - } - - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -} - -#else -#if defined(ARM_MATH_NEON) -arm_status arm_mat_cmplx_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - float32_t sumReal1, sumImag1; /* accumulator */ - float32_t a1, a1B,b1, b1B, c1, d1; - float32_t sumReal2, sumImag2; /* accumulator */ - - - float32x4x2_t a0V, a1V; - float32x4_t accR0,accI0, accR1,accI1,tempR, tempI; - float32x2_t accum = vdup_n_f32(0); - float32_t *pIn1B = pSrcA->pData; - - uint16_t col, i = 0U, j, rowCnt, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - float32_t sumReal1B, sumImag1B; - float32_t sumReal2B, sumImag2B; - float32_t *pxB; - -#ifdef ARM_MATH_MATRIX_CHECK - - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - - rowCnt = row >> 1; - - /* Row loop */ - while (rowCnt > 0U) - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + 2 * i; - pxB = px + 2 * numColsB; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - j = 0U; - - /* Column loop */ - while (col > 0U) - { - /* Set the variable sum, that acts as accumulator, to zero */ - sumReal1 = 0.0f; - sumImag1 = 0.0f; - sumReal1B = 0.0f; - sumImag1B = 0.0f; - - sumReal2 = 0.0f; - sumImag2 = 0.0f; - sumReal2B = 0.0f; - sumImag2B = 0.0f; - - /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ - pIn1 = pInA; - pIn1B = pIn1 + 2*numColsA; - - accR0 = vdupq_n_f32(0.0); - accI0 = vdupq_n_f32(0.0); - accR1 = vdupq_n_f32(0.0); - accI1 = vdupq_n_f32(0.0); - - /* Compute 4 MACs simultaneously. */ - colCnt = numColsA >> 2; - - /* Matrix multiplication */ - while (colCnt > 0U) - { - /* Reading real part of complex matrix A */ - a0V = vld2q_f32(pIn1); // load & separate real/imag pSrcA (de-interleave 2) - a1V = vld2q_f32(pIn1B); // load & separate real/imag pSrcA (de-interleave 2) - - pIn1 += 8; - pIn1B += 8; - - tempR = vsetq_lane_f32(*pIn2,tempR,0); - tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,0); - pIn2 += 2 * numColsB; - - - tempR = vsetq_lane_f32(*pIn2,tempR,1); - tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,1); - pIn2 += 2 * numColsB; - - tempR = vsetq_lane_f32(*pIn2,tempR,2); - tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,2); - pIn2 += 2 * numColsB; - - tempR = vsetq_lane_f32(*pIn2,tempR,3); - tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,3); - pIn2 += 2 * numColsB; - - accR0 = vmlaq_f32(accR0,a0V.val[0],tempR); - accR0 = vmlsq_f32(accR0,a0V.val[1],tempI); - - accI0 = vmlaq_f32(accI0,a0V.val[1],tempR); - accI0 = vmlaq_f32(accI0,a0V.val[0],tempI); - - accR1 = vmlaq_f32(accR1,a1V.val[0],tempR); - accR1 = vmlsq_f32(accR1,a1V.val[1],tempI); - - accI1 = vmlaq_f32(accI1,a1V.val[1],tempR); - accI1 = vmlaq_f32(accI1,a1V.val[0],tempI); - - /* Decrement the loop count */ - colCnt--; - } - - accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0)); - sumReal1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0)); - sumImag1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(accR1), vget_high_f32(accR1)); - sumReal1B += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(accI1), vget_high_f32(accI1)); - sumImag1B += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - colCnt = numColsA & 3; - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ - a1 = *pIn1; - a1B = *pIn1B; - - c1 = *pIn2; - - b1 = *(pIn1 + 1U); - b1B = *(pIn1B + 1U); - - d1 = *(pIn2 + 1U); - - sumReal1 += a1 * c1; - sumImag1 += b1 * c1; - - sumReal1B += a1B * c1; - sumImag1B += b1B * c1; - - pIn1 += 2U; - pIn1B += 2U; - pIn2 += 2 * numColsB; - - sumReal2 -= b1 * d1; - sumImag2 += a1 * d1; - - sumReal2B -= b1B * d1; - sumImag2B += a1B * d1; - - /* Decrement the loop counter */ - colCnt--; - } - - sumReal1 += sumReal2; - sumImag1 += sumImag2; - - sumReal1B += sumReal2B; - sumImag1B += sumImag2B; - - /* Store the result in the destination buffer */ - *px++ = sumReal1; - *px++ = sumImag1; - *pxB++ = sumReal1B; - *pxB++ = sumImag1B; - - /* Update the pointer pIn2 to point to the starting address of the next column */ - j++; - pIn2 = pSrcB->pData + 2U * j; - - /* Decrement the column loop counter */ - col--; - } - - /* Update the pointer pInA to point to the starting address of the next 2 row */ - i = i + 2*numColsB; - pInA = pInA + 4 * numColsA; - - /* Decrement the row loop counter */ - rowCnt--; - } - - rowCnt = row & 1; - while (rowCnt > 0U) - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + 2 * i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - j = 0U; - - /* Column loop */ - while (col > 0U) - { - /* Set the variable sum, that acts as accumulator, to zero */ - sumReal1 = 0.0f; - sumImag1 = 0.0f; - - sumReal2 = 0.0f; - sumImag2 = 0.0f; - - /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ - pIn1 = pInA; - - accR0 = vdupq_n_f32(0.0); - accI0 = vdupq_n_f32(0.0); - - /* Compute 4 MACs simultaneously. */ - colCnt = numColsA >> 2; - - /* Matrix multiplication */ - while (colCnt > 0U) - { - /* Reading real part of complex matrix A */ - a0V = vld2q_f32(pIn1); // load & separate real/imag pSrcA (de-interleave 2) - pIn1 += 8; - - tempR = vsetq_lane_f32(*pIn2,tempR,0); - tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,0); - pIn2 += 2 * numColsB; - - tempR = vsetq_lane_f32(*pIn2,tempR,1); - tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,1); - pIn2 += 2 * numColsB; - - tempR = vsetq_lane_f32(*pIn2,tempR,2); - tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,2); - pIn2 += 2 * numColsB; - - tempR = vsetq_lane_f32(*pIn2,tempR,3); - tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,3); - pIn2 += 2 * numColsB; - - accR0 = vmlaq_f32(accR0,a0V.val[0],tempR); - accR0 = vmlsq_f32(accR0,a0V.val[1],tempI); - - accI0 = vmlaq_f32(accI0,a0V.val[1],tempR); - accI0 = vmlaq_f32(accI0,a0V.val[0],tempI); - - /* Decrement the loop count */ - colCnt--; - } - - accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0)); - sumReal1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0)); - sumImag1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - colCnt = numColsA & 3; - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ - a1 = *pIn1; - c1 = *pIn2; - - b1 = *(pIn1 + 1U); - d1 = *(pIn2 + 1U); - - sumReal1 += a1 * c1; - sumImag1 += b1 * c1; - - pIn1 += 2U; - pIn2 += 2 * numColsB; - - sumReal2 -= b1 * d1; - sumImag2 += a1 * d1; - - /* Decrement the loop counter */ - colCnt--; - } - - sumReal1 += sumReal2; - sumImag1 += sumImag2; - - /* Store the result in the destination buffer */ - *px++ = sumReal1; - *px++ = sumImag1; - - /* Update the pointer pIn2 to point to the starting address of the next column */ - j++; - pIn2 = pSrcB->pData + 2U * j; - - /* Decrement the column loop counter */ - col--; - - } - - /* Update the pointer pInA to point to the starting address of the next row */ - i = i + numColsB; - pInA = pInA + 2 * numColsA; - - /* Decrement the row loop counter */ - rowCnt--; - - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#else -arm_status arm_mat_cmplx_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ - float32_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* Output data matrix pointer */ - float32_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - float32_t sumReal, sumImag; /* Accumulator */ - float32_t a1, b1, c1, d1; - uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - -#if defined (ARM_MATH_LOOPUNROLL) - float32_t a0, b0, c0, d0; -#endif - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + 2 * i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - j = 0U; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sumReal = 0.0f; - sumImag = 0.0f; - - /* Initiate pointer pIn1 to point to starting address of column being processed */ - pIn1 = pInA; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - - /* Reading real part of complex matrix A */ - a0 = *pIn1; - - /* Reading real part of complex matrix B */ - c0 = *pIn2; - - /* Reading imaginary part of complex matrix A */ - b0 = *(pIn1 + 1U); - - /* Reading imaginary part of complex matrix B */ - d0 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += a0 * c0; - sumImag += b0 * c0; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= b0 * d0; - sumImag += a0 * d0; - - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* read real and imag values from pSrcA and pSrcB buffer */ - a1 = *(pIn1 ); - c1 = *(pIn2 ); - b1 = *(pIn1 + 1U); - d1 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += a1 * c1; - sumImag += b1 * c1; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= b1 * d1; - sumImag += a1 * d1; - - a0 = *(pIn1 ); - c0 = *(pIn2 ); - b0 = *(pIn1 + 1U); - d0 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += a0 * c0; - sumImag += b0 * c0; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= b0 * d0; - sumImag += a0 * d0; - - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - a1 = *(pIn1 ); - c1 = *(pIn2 ); - b1 = *(pIn1 + 1U); - d1 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += a1 * c1; - sumImag += b1 * c1; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= b1 * d1; - sumImag += a1 * d1; - - /* Decrement loop count */ - colCnt--; - } - - /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - colCnt = numColsA % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - colCnt = numColsA; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - a1 = *(pIn1 ); - c1 = *(pIn2 ); - b1 = *(pIn1 + 1U); - d1 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += a1 * c1; - sumImag += b1 * c1; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= b1 * d1; - sumImag += a1 * d1; - - /* Decrement loop counter */ - colCnt--; - } - - /* Store result in destination buffer */ - *px++ = sumReal; - *px++ = sumImag; - - /* Update pointer pIn2 to point to starting address of next column */ - j++; - pIn2 = pSrcB->pData + 2U * j; - - /* Decrement column loop counter */ - col--; - - } while (col > 0U); - - /* Update pointer pInA to point to starting address of next row */ - i = i + numColsB; - pInA = pInA + 2 * numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c deleted file mode 100644 index 0c1ddb4..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c +++ /dev/null @@ -1,595 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cmplx_mat_mult_q15.c - * Description: Q15 complex matrix multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup CmplxMatrixMult - @{ - */ - -/** - @brief Q15 Complex matrix multiplication. - @param[in] pSrcA points to first input complex matrix structure - @param[in] pSrcB points to second input complex matrix structure - @param[out] pDst points to output complex matrix structure - @param[in] pScratch points to an array for storing intermediate results - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Conditions for optimum performance - Input, output and state buffers should be aligned by 32-bit - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. The inputs to the - multiplications are in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then - truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define MVE_ASRL_SAT16(acc, shift) ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff) - -arm_status arm_mat_cmplx_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pScratch) -{ - q15_t const *pInA = (q15_t const *) pSrcA->pData; /* input data matrix pointer A of Q15 type */ - q15_t const *pInB = (q15_t const *) pSrcB->pData; /* input data matrix pointer B of Q15 type */ - q15_t const *pInB2; - q15_t *px; /* Temporary output data matrix pointer */ - uint32_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint32_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint32_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint32_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ - uint32_t col, i = 0u, j, row = numRowsB; /* loop counters */ - uint32_t blkCnt; /* loop counters */ - uint16x8_t vecOffs, vecColBOffs; - arm_status status; /* Status of matrix multiplication */ - (void)pScratch; - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - vecColBOffs[0] = 0; - vecColBOffs[1] = 1; - vecColBOffs[2] = numColsB * CMPLX_DIM; - vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1; - vecColBOffs[4] = 2 * numColsB * CMPLX_DIM; - vecColBOffs[5] = 2 * (numColsB * CMPLX_DIM) + 1; - vecColBOffs[6] = 3 * numColsB * CMPLX_DIM; - vecColBOffs[7] = 3 * (numColsB * CMPLX_DIM) + 1; - - /* - * Reset the variables for the usage in the following multiplication process - */ - i = 0; - row = numRowsA; - px = pDst->pData; - - /* - * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB - */ - - /* - * row loop - */ - while (row > 0u) - { - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB >> 1; - j = 0; - /* - * column loop - */ - while (col > 0u) - { - q15_t const *pSrcAVec; - //, *pSrcBVec, *pSrcB2Vec; - q15x8_t vecA, vecB, vecB2; - q63_t acc0, acc1, acc2, acc3; - - /* - * Initiate the pointer pIn1 to point to the starting address of the column being processed - */ - pInA = pSrcA->pData + i; - pInB = pSrcB->pData + j; - pInB2 = pInB + CMPLX_DIM; - - j += 2 * CMPLX_DIM; - /* - * Decrement the column loop counter - */ - col--; - - /* - * Initiate the pointers - * - current Matrix A rows - * - 2 x consecutive Matrix B' rows (j increment is 2 x numRowsB) - */ - pSrcAVec = (q15_t const *) pInA; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - acc3 = 0LL; - - vecOffs = vecColBOffs; - - - blkCnt = (numColsA * CMPLX_DIM) >> 3; - while (blkCnt > 0U) - { - vecA = vld1q(pSrcAVec); - pSrcAVec += 8; - vecB = vldrhq_gather_shifted_offset(pInB, vecOffs); - - acc0 = vmlsldavaq_s16(acc0, vecA, vecB); - acc1 = vmlaldavaxq_s16(acc1, vecA, vecB); - vecB2 = vldrhq_gather_shifted_offset(pInB2, vecOffs); - /* - * move Matrix B read offsets, 4 rows down - */ - vecOffs = vaddq_n_u16(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM)); - - acc2 = vmlsldavaq_s16(acc2, vecA, vecB2); - acc3 = vmlaldavaxq_s16(acc3, vecA, vecB2); - - blkCnt--; - } - - /* - * tail - */ - blkCnt = (numColsA * CMPLX_DIM) & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecB = vldrhq_gather_shifted_offset(pInB, vecOffs); - - vecA = vldrhq_z_s16(pSrcAVec, p0); - - acc0 = vmlsldavaq_s16(acc0, vecA, vecB); - acc1 = vmlaldavaxq_s16(acc1, vecA, vecB); - vecB2 = vldrhq_gather_shifted_offset(pInB2, vecOffs); - - /* - * move Matrix B read offsets, 4 rows down - */ - vecOffs = vaddq_n_u16(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM)); - - acc2 = vmlsldavaq_s16(acc2, vecA, vecB2); - acc3 = vmlaldavaxq_s16(acc3, vecA, vecB2); - - } - /* - * Convert to 1.15, Store the results (1 x 2 block) in the destination buffer - */ - *px++ = (q15_t)MVE_ASRL_SAT16(acc0, 15); - *px++ = (q15_t)MVE_ASRL_SAT16(acc1, 15); - *px++ = (q15_t)MVE_ASRL_SAT16(acc2, 15); - *px++ = (q15_t)MVE_ASRL_SAT16(acc3, 15); - } - - col = numColsB & 1; - /* - * column loop - */ - while (col > 0u) - { - - q15_t const *pSrcAVec; - //, *pSrcBVec, *pSrcB2Vec; - q15x8_t vecA, vecB; - q63_t acc0, acc1; - - /* - * Initiate the pointer pIn1 to point to the starting address of the column being processed - */ - pInA = pSrcA->pData + i; - pInB = pSrcB->pData + j; - - j += CMPLX_DIM; - /* - * Decrement the column loop counter - */ - col--; - - /* - * Initiate the pointers - * - current Matrix A rows - * - 2 x consecutive Matrix B' rows (j increment is 2 x numRowsB) - */ - pSrcAVec = (q15_t const *) pInA; - - acc0 = 0LL; - acc1 = 0LL; - - - vecOffs = vecColBOffs; - - - - blkCnt = (numColsA * CMPLX_DIM) >> 3; - while (blkCnt > 0U) - { - vecA = vld1q(pSrcAVec); - pSrcAVec += 8; - vecB = vldrhq_gather_shifted_offset(pInB, vecOffs); - - acc0 = vmlsldavaq_s16(acc0, vecA, vecB); - acc1 = vmlaldavaxq_s16(acc1, vecA, vecB); - /* - * move Matrix B read offsets, 4 rows down - */ - vecOffs = vaddq_n_u16(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM)); - - blkCnt--; - } - - /* - * tail - */ - blkCnt = (numColsA * CMPLX_DIM) & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecB = vldrhq_gather_shifted_offset(pInB, vecOffs); - vecA = vldrhq_z_s16(pSrcAVec, p0); - - acc0 = vmlsldavaq_s16(acc0, vecA, vecB); - acc1 = vmlaldavaxq_s16(acc1, vecA, vecB); - - } - /* - * Convert to 1.15, Store the results (1 x 2 block) in the destination buffer - */ - *px++ = (q15_t)MVE_ASRL_SAT16(acc0, 15); - *px++ = (q15_t)MVE_ASRL_SAT16(acc1, 15); - - } - - i = i + numColsA * CMPLX_DIM; - - /* - * Decrement the row loop counter - */ - row--; - } - - - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#else -arm_status arm_mat_cmplx_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pScratch) -{ - q15_t *pSrcBT = pScratch; /* input data matrix pointer for transpose */ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */ - q15_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ - q63_t sumReal, sumImag; /* accumulator */ - uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */ - arm_status status; /* Status of matrix multiplication */ - -#if defined (ARM_MATH_DSP) - q31_t prod1, prod2; - q31_t pSourceA, pSourceB; -#else - q15_t a, b, c, d; -#endif /* #if defined (ARM_MATH_DSP) */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose */ - do - { - /* The pointer px is set to starting address of column being processed */ - px = pSrcBT + i; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Apply loop unrolling and exchange the columns with row elements */ - col = numColsB >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - a second loop below computes the remaining 1 to 3 samples. */ - while (col > 0U) - { - /* Read two elements from row */ - write_q15x2 (px, read_q15x2_ia (&pInB)); - - /* Update pointer px to point to next row of transposed matrix */ - px += numRowsB * 2; - - /* Read two elements from row */ - write_q15x2 (px, read_q15x2_ia (&pInB)); - - /* Update pointer px to point to next row of transposed matrix */ - px += numRowsB * 2; - - /* Read two elements from row */ - write_q15x2 (px, read_q15x2_ia (&pInB)); - - /* Update pointer px to point to next row of transposed matrix */ - px += numRowsB * 2; - - /* Read two elements from row */ - write_q15x2 (px, read_q15x2_ia (&pInB)); - - /* Update pointer px to point to next row of transposed matrix */ - px += numRowsB * 2; - - /* Decrement column loop counter */ - col--; - } - - /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - col = numColsB % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - col = numColsB; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (col > 0U) - { - /* Read two elements from row */ - write_q15x2 (px, read_q15x2_ia (&pInB)); - - /* Update pointer px to point to next row of transposed matrix */ - px += numRowsB * 2; - - /* Decrement column loop counter */ - col--; - } - - i = i + 2U; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Reset variables for usage in following multiplication process */ - row = numRowsA; - i = 0U; - px = pDst->pData; - - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* For every row wise process, column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */ - pInB = pSrcBT; - - /* column loop */ - do - { - /* Set variable sum, that acts as accumulator, to zero */ - sumReal = 0; - sumImag = 0; - - /* Initiate pointer pInA to point to starting address of column being processed */ - pInA = pSrcA->pData + i * 2; - - /* Apply loop unrolling and compute 2 MACs simultaneously. */ - colCnt = numColsA >> 1U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - -#if defined (ARM_MATH_DSP) - - /* read real and imag values from pSrcA and pSrcB buffer */ - pSourceA = read_q15x2_ia (&pInA); - pSourceB = read_q15x2_ia (&pInB); - - /* Multiply and Accumlates */ -#ifdef ARM_MATH_BIG_ENDIAN - prod1 = -__SMUSD(pSourceA, pSourceB); -#else - prod1 = __SMUSD(pSourceA, pSourceB); -#endif - prod2 = __SMUADX(pSourceA, pSourceB); - sumReal += (q63_t) prod1; - sumImag += (q63_t) prod2; - - /* read real and imag values from pSrcA and pSrcB buffer */ - pSourceA = read_q15x2_ia (&pInA); - pSourceB = read_q15x2_ia (&pInB); - - /* Multiply and Accumlates */ -#ifdef ARM_MATH_BIG_ENDIAN - prod1 = -__SMUSD(pSourceA, pSourceB); -#else - prod1 = __SMUSD(pSourceA, pSourceB); -#endif - prod2 = __SMUADX(pSourceA, pSourceB); - sumReal += (q63_t) prod1; - sumImag += (q63_t) prod2; - -#else /* #if defined (ARM_MATH_DSP) */ - - /* read real and imag values from pSrcA buffer */ - a = *pInA; - b = *(pInA + 1U); - /* read real and imag values from pSrcB buffer */ - c = *pInB; - d = *(pInB + 1U); - - /* Multiply and Accumlates */ - sumReal += (q31_t) a *c; - sumImag += (q31_t) a *d; - sumReal -= (q31_t) b *d; - sumImag += (q31_t) b *c; - - /* read next real and imag values from pSrcA buffer */ - a = *(pInA + 2U); - b = *(pInA + 3U); - /* read next real and imag values from pSrcB buffer */ - c = *(pInB + 2U); - d = *(pInB + 3U); - - /* update pointer */ - pInA += 4U; - - /* Multiply and Accumlates */ - sumReal += (q31_t) a * c; - sumImag += (q31_t) a * d; - sumReal -= (q31_t) b * d; - sumImag += (q31_t) b * c; - /* update pointer */ - pInB += 4U; - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - colCnt--; - } - - /* process odd column samples */ - if ((numColsA & 0x1U) > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - -#if defined (ARM_MATH_DSP) - /* read real and imag values from pSrcA and pSrcB buffer */ - pSourceA = read_q15x2_ia (&pInA); - pSourceB = read_q15x2_ia (&pInB); - - /* Multiply and Accumlates */ -#ifdef ARM_MATH_BIG_ENDIAN - prod1 = -__SMUSD(pSourceA, pSourceB); -#else - prod1 = __SMUSD(pSourceA, pSourceB); -#endif - prod2 = __SMUADX(pSourceA, pSourceB); - sumReal += (q63_t) prod1; - sumImag += (q63_t) prod2; - -#else /* #if defined (ARM_MATH_DSP) */ - - /* read real and imag values from pSrcA and pSrcB buffer */ - a = *pInA++; - b = *pInA++; - c = *pInB++; - d = *pInB++; - - /* Multiply and Accumlates */ - sumReal += (q31_t) a * c; - sumImag += (q31_t) a * d; - sumReal -= (q31_t) b * d; - sumImag += (q31_t) b * c; - -#endif /* #if defined (ARM_MATH_DSP) */ - - } - - /* Saturate and store result in destination buffer */ - *px++ = (q15_t) (__SSAT(sumReal >> 15, 16)); - *px++ = (q15_t) (__SSAT(sumImag >> 15, 16)); - - /* Decrement column loop counter */ - col--; - - } while (col > 0U); - - i = i + numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c deleted file mode 100644 index d696c95..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c +++ /dev/null @@ -1,1061 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_cmplx_mult_q31.c - * Description: Floating-point matrix multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup CmplxMatrixMult - @{ - */ - -/** - @brief Q31 Complex matrix multiplication. - @param[in] pSrcA points to first input complex matrix structure - @param[in] pSrcB points to second input complex matrix structure - @param[out] pDst points to output complex matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate - multiplication results but provides only a single guard bit. There is no saturation - on intermediate additions. Thus, if the accumulator overflows it wraps around and - distorts the result. The input signals should be scaled down to avoid intermediate - overflows. The input is thus scaled down by log2(numColsA) bits - to avoid overflows, as a total of numColsA additions are performed internally. - The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -#define MATRIX_DIM2 2 -#define MATRIX_DIM3 3 -#define MATRIX_DIM4 4 - -__STATIC_INLINE arm_status arm_mat_cmplx_mult_q31_2x2_mve( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t const *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs0; - q31_t const *pInA0 = pInA; - q31_t const *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM2; - q63_t acc0, acc1, acc2, acc3; - q31x4_t vecB, vecA; - - static const uint32_t offsetB0[4] = { - 0, 1, - MATRIX_DIM2 * CMPLX_DIM, MATRIX_DIM2 * CMPLX_DIM + 1 - }; - - vecColBOffs0 = vldrwq_u32(offsetB0); - - pInB = (q31_t const *) pSrcB->pData; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - vecA = vldrwq_s32(pInA0); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA1); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc0, 31); - pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc1, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc2, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc3, 31); - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - vecA = vldrwq_s32(pInA0); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA1); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - pOut += CMPLX_DIM; - - pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc0, 31); - pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc1, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc2, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc3, 31); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - -__STATIC_INLINE arm_status arm_mat_cmplx_mult_q31_3x3_mve( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t const *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs0, vecColBOffs1; - q31_t const *pInA0 = pInA; - q31_t const *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM3; - q31_t const *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM3; - q63_t acc0, acc1, acc2, acc3; - q31x4_t vecB, vecB1, vecA; - /* - * enable predication to disable upper half complex vector element - */ - mve_pred16_t p0 = vctp32q(CMPLX_DIM); - - static const uint32_t offsetB0[4] = { - 0, 1, - MATRIX_DIM3 * CMPLX_DIM, MATRIX_DIM3 * CMPLX_DIM + 1 - }; - static const uint32_t offsetB1[4] = { - 2 * MATRIX_DIM3 * CMPLX_DIM, 2 * MATRIX_DIM3 * CMPLX_DIM + 1, - INACTIVELANE, INACTIVELANE - }; - - vecColBOffs0 = vldrwq_u32(offsetB0); - vecColBOffs1 = vldrwq_u32(offsetB1); - - pInB = (q31_t const *) pSrcB->pData; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_s32(pInA0); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA1); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_z_s32(&pInA0[4], p0); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_z_s32(&pInA1[4], p0); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc2, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc3, 31); - - vecA = vldrwq_s32(pInA2); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_z_s32(&pInA2[4], p0); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); - pOut += CMPLX_DIM; - - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_s32(pInA0); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA1); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_z_s32(&pInA0[4], p0); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_z_s32(&pInA1[4], p0); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc2, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc3, 31); - - vecA = vldrwq_s32(pInA2); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_z_s32(&pInA2[4], p0); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); - pOut += CMPLX_DIM; - - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_s32(pInA0); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA1); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_z_s32(&pInA0[4], p0); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_z_s32(&pInA1[4], p0); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); - pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc2, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc3, 31); - - vecA = vldrwq_s32(pInA2); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_z_s32(&pInA2[4], p0); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31); - pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - -__STATIC_INLINE arm_status arm_mat_cmplx_mult_q31_4x4_mve( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t const *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t const *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs0, vecColBOffs1; - q31_t const *pInA0 = pInA; - q31_t const *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM4; - q31_t const *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM4; - q31_t const *pInA3 = pInA2 + CMPLX_DIM * MATRIX_DIM4; - q63_t acc0, acc1, acc2, acc3; - q31x4_t vecB, vecB1, vecA; - - static const uint32_t offsetB0[4] = { - 0, 1, - MATRIX_DIM4 * CMPLX_DIM, MATRIX_DIM4 * CMPLX_DIM + 1 - }; - static const uint32_t offsetB1[4] = { - 2 * MATRIX_DIM4 * CMPLX_DIM, 2 * MATRIX_DIM4 * CMPLX_DIM + 1, - 3 * MATRIX_DIM4 * CMPLX_DIM, 3 * MATRIX_DIM4 * CMPLX_DIM + 1 - }; - - vecColBOffs0 = vldrwq_u32(offsetB0); - vecColBOffs1 = vldrwq_u32(offsetB1); - - pInB = (q31_t const *) pSrcB->pData; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_s32(pInA0); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA1); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(&pInA0[4]); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_s32(&pInA1[4]); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); - - vecA = vldrwq_s32(pInA2); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA3); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(&pInA2[4]); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_s32(&pInA3[4]); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); - pOut += CMPLX_DIM; - - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_s32(pInA0); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA1); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(&pInA0[4]); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_s32(&pInA1[4]); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); - - vecA = vldrwq_s32(pInA2); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA3); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(&pInA2[4]); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_s32(&pInA3[4]); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); - pOut += CMPLX_DIM; - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_s32(pInA0); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA1); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(&pInA0[4]); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_s32(&pInA1[4]); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); - - vecA = vldrwq_s32(pInA2); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA3); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(&pInA2[4]); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_s32(&pInA3[4]); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); - pOut += CMPLX_DIM; - - /* - * move to next B column - */ - pInB = pInB + CMPLX_DIM; - - vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0); - vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1); - - vecA = vldrwq_s32(pInA0); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA1); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(&pInA0[4]); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_s32(&pInA1[4]); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); - pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); - pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); - - vecA = vldrwq_s32(pInA2); - acc0 = vmlsldavq_s32(vecA, vecB); - acc1 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(pInA3); - acc2 = vmlsldavq_s32(vecA, vecB); - acc3 = vmlaldavxq_s32(vecA, vecB); - - vecA = vldrwq_s32(&pInA2[4]); - acc0 = vmlsldavaq_s32(acc0, vecA, vecB1); - acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1); - - vecA = vldrwq_s32(&pInA3[4]); - acc2 = vmlsldavaq_s32(acc2, vecA, vecB1); - acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1); - - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31); - pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31); - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31); - pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - -arm_status arm_mat_cmplx_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t const *pInB = (q31_t const *) pSrcB->pData; /* input data matrix pointer B */ - q31_t const *pInA = (q31_t const *) pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - q31_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint16_t col, i = 0U, row = numRowsA; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - uint32x4_t vecOffs, vecColBOffs; - uint32_t blkCnt, rowCnt; /* loop counters */ - - #ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* - * small squared matrix specialized routines - */ - if (numRowsA == numColsB && numColsB == numColsA) - { - if (numRowsA == 1) - { - q63_t sumReal = (q63_t) pInA[0] * pInB[0]; - sumReal -= (q63_t) pInA[1] * pInB[1]; - - q63_t sumImag = (q63_t) pInA[0] * pInB[1]; - sumImag += (q63_t) pInA[1] * pInB[0]; - - /* Store result in destination buffer */ - pOut[0] = (q31_t) clip_q63_to_q31(sumReal >> 31); - pOut[1] = (q31_t) clip_q63_to_q31(sumImag >> 31); - return (ARM_MATH_SUCCESS); - } - else if (numRowsA == 2) - return arm_mat_cmplx_mult_q31_2x2_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 3) - return arm_mat_cmplx_mult_q31_3x3_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 4) - return arm_mat_cmplx_mult_q31_4x4_mve(pSrcA, pSrcB, pDst); - } - - vecColBOffs[0] = 0; - vecColBOffs[1] = 1; - vecColBOffs[2] = numColsB * CMPLX_DIM; - vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1; - - /* - * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB - */ - - /* - * row loop - */ - rowCnt = row >> 1; - while (rowCnt > 0u) - { - /* - * Output pointer is set to starting address of the row being processed - */ - px = pOut + i * CMPLX_DIM; - i = i + 2 * numColsB; - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB; - /* - * For every row wise process, the pInB pointer is set - * to the starting address of the pSrcB data - */ - pInB = (q31_t const *) pSrcB->pData; - /* - * column loop - */ - while (col > 0u) - { - /* - * generate 4 columns elements - */ - /* - * Matrix A columns number of MAC operations are to be performed - */ - - q31_t const *pSrcA0Vec, *pSrcA1Vec; - q31_t const *pInA0 = pInA; - q31_t const *pInA1 = pInA0 + numColsA * CMPLX_DIM; - q63_t acc0, acc1, acc2, acc3; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - acc3 = 0LL; - - pSrcA0Vec = (q31_t const *) pInA0; - pSrcA1Vec = (q31_t const *) pInA1; - - - vecOffs = vecColBOffs; - - /* - * process 1 x 2 block output - */ - blkCnt = (numColsA * CMPLX_DIM) >> 2; - while (blkCnt > 0U) - { - q31x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); - /* - * move Matrix B read offsets, 2 rows down - */ - vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); - - - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vmlsldavaq(acc0, vecA, vecB); - acc1 = vmlaldavaxq(acc1, vecA, vecB); - - - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - - acc2 = vmlsldavaq(acc2, vecA, vecB); - acc3 = vmlaldavaxq(acc3, vecA, vecB); - - - blkCnt--; - } - - - /* - * tail - */ - blkCnt = (numColsA * CMPLX_DIM) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - q31x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); - - /* - * move Matrix B read offsets, 2 rows down - */ - vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); - - - vecA = vld1q(pSrcA0Vec); - acc0 = vmlsldavaq(acc0, vecA, vecB); - acc1 = vmlaldavaxq(acc1, vecA, vecB); - vecA = vld1q(pSrcA1Vec); - acc2 = vmlsldavaq(acc2, vecA, vecB); - acc3 = vmlaldavaxq(acc3, vecA, vecB); - - - } - - px[0 * CMPLX_DIM * numColsB + 0] = (q31_t) clip_q63_to_q31(acc0 >> 31); - px[0 * CMPLX_DIM * numColsB + 1] = (q31_t) clip_q63_to_q31(acc1 >> 31); - px[1 * CMPLX_DIM * numColsB + 0] = (q31_t) clip_q63_to_q31(acc2 >> 31); - px[1 * CMPLX_DIM * numColsB + 1] = (q31_t) clip_q63_to_q31(acc3 >> 31); - px += CMPLX_DIM; - /* - * Decrement the column loop counter - */ - col--; - /* - * Update the pointer pInB to point to the starting address of the next column - */ - pInB = (q31_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM; - } - - /* - * Update the pointer pInA to point to the starting address of the next row - */ - pInA += (numColsA * 2) * CMPLX_DIM; - /* - * Decrement the row loop counter - */ - rowCnt --; - - } - - rowCnt = row & 1; - while (rowCnt > 0u) - { - /* - * Output pointer is set to starting address of the row being processed - */ - px = pOut + i * CMPLX_DIM; - i = i + numColsB; - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB; - /* - * For every row wise process, the pInB pointer is set - * to the starting address of the pSrcB data - */ - pInB = (q31_t const *) pSrcB->pData; - /* - * column loop - */ - while (col > 0u) - { - /* - * generate 4 columns elements - */ - /* - * Matrix A columns number of MAC operations are to be performed - */ - - q31_t const *pSrcA0Vec; - q31_t const *pInA0 = pInA; - q63_t acc0,acc1; - - acc0 = 0LL; - acc1 = 0LL; - - pSrcA0Vec = (q31_t const *) pInA0; - - vecOffs = vecColBOffs; - - /* - * process 1 x 2 block output - */ - blkCnt = (numColsA * CMPLX_DIM) >> 2; - while (blkCnt > 0U) - { - q31x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); - /* - * move Matrix B read offsets, 2 rows down - */ - vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); - - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vmlsldavaq(acc0, vecA, vecB); - acc1 = vmlaldavaxq(acc1, vecA, vecB); - - - blkCnt--; - } - - - /* - * tail - */ - blkCnt = (numColsA * CMPLX_DIM) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - q31x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); - - /* - * move Matrix B read offsets, 2 rows down - */ - vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM); - - vecA = vld1q(pSrcA0Vec); - - - acc0 = vmlsldavaq(acc0, vecA, vecB); - acc1 = vmlaldavaxq(acc1, vecA, vecB); - - - } - - px[0] = (q31_t) clip_q63_to_q31(acc0 >> 31); - px[1] = (q31_t) clip_q63_to_q31(acc1 >> 31); - - - px += CMPLX_DIM; - /* - * Decrement the column loop counter - */ - col--; - /* - * Update the pointer pInB to point to the starting address of the next column - */ - pInB = (q31_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM; - } - - /* - * Update the pointer pInA to point to the starting address of the next row - */ - pInA += numColsA * CMPLX_DIM; - rowCnt--; - } - - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_cmplx_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ - q31_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* Output data matrix pointer */ - q31_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - q63_t sumReal, sumImag; /* Accumulator */ - q31_t a1, b1, c1, d1; - uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t a0, b0, c0, d0; -#endif - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + 2 * i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - j = 0U; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sumReal = 0.0; - sumImag = 0.0; - - /* Initiate pointer pIn1 to point to starting address of column being processed */ - pIn1 = pInA; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Apply loop unrolling and compute 4 MACs simultaneously. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - - /* Reading real part of complex matrix A */ - a0 = *pIn1; - - /* Reading real part of complex matrix B */ - c0 = *pIn2; - - /* Reading imaginary part of complex matrix A */ - b0 = *(pIn1 + 1U); - - /* Reading imaginary part of complex matrix B */ - d0 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += (q63_t) a0 * c0; - sumImag += (q63_t) b0 * c0; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= (q63_t) b0 * d0; - sumImag += (q63_t) a0 * d0; - - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* read real and imag values from pSrcA and pSrcB buffer */ - a1 = *(pIn1 ); - c1 = *(pIn2 ); - b1 = *(pIn1 + 1U); - d1 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += (q63_t) a1 * c1; - sumImag += (q63_t) b1 * c1; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= (q63_t) b1 * d1; - sumImag += (q63_t) a1 * d1; - - a0 = *(pIn1 ); - c0 = *(pIn2 ); - b0 = *(pIn1 + 1U); - d0 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += (q63_t) a0 * c0; - sumImag += (q63_t) b0 * c0; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= (q63_t) b0 * d0; - sumImag += (q63_t) a0 * d0; - - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - a1 = *(pIn1 ); - c1 = *(pIn2 ); - b1 = *(pIn1 + 1U); - d1 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += (q63_t) a1 * c1; - sumImag += (q63_t) b1 * c1; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= (q63_t) b1 * d1; - sumImag += (q63_t) a1 * d1; - - /* Decrement loop count */ - colCnt--; - } - - /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - colCnt = numColsA % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - colCnt = numColsA; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - a1 = *(pIn1 ); - c1 = *(pIn2 ); - b1 = *(pIn1 + 1U); - d1 = *(pIn2 + 1U); - - /* Multiply and Accumlates */ - sumReal += (q63_t) a1 * c1; - sumImag += (q63_t) b1 * c1; - - /* update pointers */ - pIn1 += 2U; - pIn2 += 2 * numColsB; - - /* Multiply and Accumlates */ - sumReal -= (q63_t) b1 * d1; - sumImag += (q63_t) a1 * d1; - - /* Decrement loop counter */ - colCnt--; - } - - /* Store result in destination buffer */ - *px++ = (q31_t) clip_q63_to_q31(sumReal >> 31); - *px++ = (q31_t) clip_q63_to_q31(sumImag >> 31); - - /* Update pointer pIn2 to point to starting address of next column */ - j++; - pIn2 = pSrcB->pData + 2U * j; - - /* Decrement column loop counter */ - col--; - - } while (col > 0U); - - /* Update pointer pInA to point to starting address of next row */ - i = i + numColsB; - pInA = pInA + 2 * numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f16.c deleted file mode 100644 index f5dc343..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f16.c +++ /dev/null @@ -1,131 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_cmplx_trans_f16.c - * Description: Floating-point complex matrix transpose - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixComplexTrans - @{ - */ - -/** - @brief Floating-point matrix transpose. - @param[in] pSrc points to input matrix - @param[out] pDst points to output matrix - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -arm_status arm_mat_cmplx_trans_f16(const arm_matrix_instance_f16 * pSrc, arm_matrix_instance_f16 * pDst) -{ - return arm_mat_cmplx_trans_16bit(pSrc->numRows, pSrc->numCols, (uint16_t *) pSrc->pData, - pDst->numRows, pDst->numCols, (uint16_t *) pDst->pData); -} - -#else -arm_status arm_mat_cmplx_trans_f16( - const arm_matrix_instance_f16 * pSrc, - arm_matrix_instance_f16 * pDst) -{ - float16_t *pIn = pSrc->pData; /* input data matrix pointer */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - float16_t *px; /* Temporary output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of rows */ - uint16_t nColumns = pSrc->numCols; /* number of columns */ - uint16_t col, i = 0U, row = nRows; /* loop counters */ - arm_status status; /* status of matrix transpose */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* The pointer px is set to starting address of the column being processed */ - px = pOut + CMPLX_DIM * i; - - /* Initialize column loop counter */ - col = nColumns; - - while (col > 0U) - { - /* Read and store the input element in the destination */ - px[0] = *pIn++; // real - px[1] = *pIn++; // imag - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += CMPLX_DIM * nRows; - - /* Decrement the column loop counter */ - col--; - } - i++; - - /* Decrement the row loop counter */ - row--; - - } while (row > 0U); /* row loop end */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of MatrixTrans group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f32.c deleted file mode 100644 index 8be6c21..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f32.c +++ /dev/null @@ -1,133 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_cmplx_trans_f32.c - * Description: Floating-point complex matrix transpose - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixComplexTrans Complex Matrix Transpose - - Tranposes a complex matrix. - - Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix. - \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix" - */ - -/** - @addtogroup MatrixComplexTrans - @{ - */ - -/** - @brief Floating-point matrix transpose. - @param[in] pSrc points to input matrix - @param[out] pDst points to output matrix - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -arm_status arm_mat_cmplx_trans_f32(const arm_matrix_instance_f32 * pSrc, arm_matrix_instance_f32 * pDst) -{ - return arm_mat_cmplx_trans_32bit(pSrc->numRows, pSrc->numCols, (uint32_t *) pSrc->pData, - pDst->numRows, pDst->numCols, (uint32_t *) pDst->pData); -} - -#else -arm_status arm_mat_cmplx_trans_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *px; /* Temporary output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of rows */ - uint16_t nColumns = pSrc->numCols; /* number of columns */ - uint16_t col, i = 0U, row = nRows; /* loop counters */ - arm_status status; /* status of matrix transpose */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* The pointer px is set to starting address of the column being processed */ - px = pOut + CMPLX_DIM * i; - - /* Initialize column loop counter */ - col = nColumns; - - while (col > 0U) - { - /* Read and store the input element in the destination */ - px[0] = *pIn++; // real - px[1] = *pIn++; // imag - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += CMPLX_DIM * nRows; - - /* Decrement the column loop counter */ - col--; - } - i++; - - /* Decrement the row loop counter */ - row--; - - } while (row > 0U); /* row loop end */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of MatrixTrans group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q15.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q15.c deleted file mode 100644 index ac46273..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q15.c +++ /dev/null @@ -1,124 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_cmplx_trans_q31.c - * Description: Q15 complex matrix transpose - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixComplexTrans - @{ - */ - -/** - @brief Q15 complex matrix transpose. - @param[in] pSrc points to input matrix - @param[out] pDst points to output matrix - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -arm_status arm_mat_cmplx_trans_q15(const arm_matrix_instance_q15 * pSrc, arm_matrix_instance_q15 * pDst) -{ - return arm_mat_cmplx_trans_16bit(pSrc->numRows, pSrc->numCols, (uint16_t *) pSrc->pData, - pDst->numRows, pDst->numCols, (uint16_t *) pDst->pData); -} - - -#else -arm_status arm_mat_cmplx_trans_q15( - const arm_matrix_instance_q15 * pSrc, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pSrcA = pSrc->pData; /* input data matrix pointer */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of nRows */ - uint16_t nColumns = pSrc->numCols; /* number of nColumns */ - uint16_t col, row = nRows, i = 0U; /* row and column loop counters */ - arm_status status; /* status of matrix transpose */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* The pointer pOut is set to starting address of the column being processed */ - pOut = pDst->pData + CMPLX_DIM * i; - - /* Initialize column loop counter */ - col = nColumns; - - while (col > 0U) - { - /* Read and store the input element in the destination */ - pOut[0] = *pSrcA++; //real - pOut[1] = *pSrcA++; //imag - - /* Update the pointer pOut to point to the next row of the transposed matrix */ - pOut += CMPLX_DIM *nRows; - - /* Decrement the column loop counter */ - col--; - } - - i++; - - /* Decrement the row loop counter */ - row--; - - } while (row > 0U); - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - * @} end of MatrixTrans group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q31.c deleted file mode 100644 index 84b07fd..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q31.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_cmplx_trans_q31.c - * Description: Q31 complex matrix transpose - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - - - -/** - @addtogroup MatrixComplexTrans - @{ - */ - -/** - @brief Q31 complex matrix transpose. - @param[in] pSrc points to input matrix - @param[out] pDst points to output matrix - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - -arm_status arm_mat_cmplx_trans_q31(const arm_matrix_instance_q31 * pSrc, arm_matrix_instance_q31 * pDst) -{ - return arm_mat_cmplx_trans_32bit(pSrc->numRows, pSrc->numCols, (uint32_t *) pSrc->pData, - pDst->numRows, pDst->numCols, (uint32_t *) pDst->pData); -} - - -#else -arm_status arm_mat_cmplx_trans_q31( - const arm_matrix_instance_q31 * pSrc, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn = pSrc->pData; /* input data matrix pointer */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - q31_t *px; /* Temporary output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of nRows */ - uint16_t nColumns = pSrc->numCols; /* number of nColumns */ - uint16_t col, i = 0U, row = nRows; /* loop counters */ - arm_status status; /* status of matrix transpose */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* The pointer px is set to starting address of the column being processed */ - px = pOut + CMPLX_DIM * i; - - /* Initialize column loop counter */ - col = nColumns; - - while (col > 0U) - { - /* Read and store the input element in the destination */ - px[0] = *pIn++; // real - px[1] = *pIn++; // imag - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += CMPLX_DIM * nRows; - - /* Decrement the column loop counter */ - col--; - } - - i++; - - /* Decrement the row loop counter */ - row--; - - } - while (row > 0U); /* row loop end */ - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - * @} end of MatrixTrans group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f16.c deleted file mode 100644 index 0399fdb..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f16.c +++ /dev/null @@ -1,74 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_init_f16.c - * Description: Floating-point matrix initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixInit - @{ - */ - -/** - @brief Floating-point matrix initialization. - @param[in,out] S points to an instance of the floating-point matrix structure - @param[in] nRows number of rows in the matrix - @param[in] nColumns number of columns in the matrix - @param[in] pData points to the matrix data array - @return none - */ - -void arm_mat_init_f16( - arm_matrix_instance_f16 * S, - uint16_t nRows, - uint16_t nColumns, - float16_t * pData) -{ - /* Assign Number of Rows */ - S->numRows = nRows; - - /* Assign Number of Columns */ - S->numCols = nColumns; - - /* Assign Data pointer */ - S->pData = pData; -} - -/** - @} end of MatrixInit group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c deleted file mode 100644 index 9fd082e..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c +++ /dev/null @@ -1,76 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_init_f32.c - * Description: Floating-point matrix initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixInit Matrix Initialization - - Initializes the underlying matrix data structure. - The functions set the numRows, - numCols, and pData fields - of the matrix data structure. - */ - -/** - @addtogroup MatrixInit - @{ - */ - -/** - @brief Floating-point matrix initialization. - @param[in,out] S points to an instance of the floating-point matrix structure - @param[in] nRows number of rows in the matrix - @param[in] nColumns number of columns in the matrix - @param[in] pData points to the matrix data array - @return none - */ - -void arm_mat_init_f32( - arm_matrix_instance_f32 * S, - uint16_t nRows, - uint16_t nColumns, - float32_t * pData) -{ - /* Assign Number of Rows */ - S->numRows = nRows; - - /* Assign Number of Columns */ - S->numCols = nColumns; - - /* Assign Data pointer */ - S->pData = pData; -} - -/** - @} end of MatrixInit group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c deleted file mode 100644 index a6e7de6..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c +++ /dev/null @@ -1,67 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_init_q15.c - * Description: Q15 matrix initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixInit - @{ - */ - -/** - @brief Q15 matrix initialization. - @param[in,out] S points to an instance of the floating-point matrix structure - @param[in] nRows number of rows in the matrix - @param[in] nColumns number of columns in the matrix - @param[in] pData points to the matrix data array - @return none - */ - -void arm_mat_init_q15( - arm_matrix_instance_q15 * S, - uint16_t nRows, - uint16_t nColumns, - q15_t * pData) -{ - /* Assign Number of Rows */ - S->numRows = nRows; - - /* Assign Number of Columns */ - S->numCols = nColumns; - - /* Assign Data pointer */ - S->pData = pData; -} - -/** - @} end of MatrixInit group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c deleted file mode 100644 index 05cf304..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c +++ /dev/null @@ -1,72 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_init_q31.c - * Description: Q31 matrix initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixInit Matrix Initialization - - */ - -/** - @addtogroup MatrixInit - @{ - */ - -/** - @brief Q31 matrix initialization. - @param[in,out] S points to an instance of the Q31 matrix structure - @param[in] nRows number of rows in the matrix - @param[in] nColumns number of columns in the matrix - @param[in] pData points to the matrix data array - @return none - */ - -void arm_mat_init_q31( - arm_matrix_instance_q31 * S, - uint16_t nRows, - uint16_t nColumns, - q31_t * pData) -{ - /* Assign Number of Rows */ - S->numRows = nRows; - - /* Assign Number of Columns */ - S->numCols = nColumns; - - /* Assign Data pointer */ - S->pData = pData; -} - -/** - @} end of MatrixInit group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f16.c deleted file mode 100644 index b09f37b..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f16.c +++ /dev/null @@ -1,891 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_inverse_f16.c - * Description: Floating-point matrix inverse - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixInv - @{ - */ - -/** - @brief Floating-point matrix inverse. - @param[in] pSrc points to input matrix structure. The source matrix is modified by the function. - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - \ref ARM_MATH_SINGULAR : Input matrix is found to be singular (non-invertible) - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -arm_status arm_mat_inverse_f16( - const arm_matrix_instance_f16 * pSrc, - arm_matrix_instance_f16 * pDst) -{ - float16_t *pIn = pSrc->pData; /* input data matrix pointer */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - float16_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ - float16_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */ - float16_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data matrix pointer */ - - uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ - uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ - float16_t *pTmpA, *pTmpB; - - _Float16 in = 0.0f16; /* Temporary input values */ - uint32_t i, rowCnt, flag = 0U, j, loopCnt, l; /* loop counters */ - arm_status status; /* status of matrix inverse */ - uint32_t blkCnt; - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) - || (pSrc->numRows != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - - /*-------------------------------------------------------------------------------------------------------------- - * Matrix Inverse can be solved using elementary row operations. - * - * Gauss-Jordan Method: - * - * 1. First combine the identity matrix and the input matrix separated by a bar to form an - * augmented matrix as follows: - * _ _ _ _ _ _ _ _ - * | | a11 a12 | | | 1 0 | | | X11 X12 | - * | | | | | | | = | | - * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _| - * - * 2. In our implementation, pDst Matrix is used as identity matrix. - * - * 3. Begin with the first row. Let i = 1. - * - * 4. Check to see if the pivot for row i is zero. - * The pivot is the element of the main diagonal that is on the current row. - * For instance, if working with row i, then the pivot element is aii. - * If the pivot is zero, exchange that row with a row below it that does not - * contain a zero in column i. If this is not possible, then an inverse - * to that matrix does not exist. - * - * 5. Divide every element of row i by the pivot. - * - * 6. For every row below and row i, replace that row with the sum of that row and - * a multiple of row i so that each new element in column i below row i is zero. - * - * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros - * for every element below and above the main diagonal. - * - * 8. Now an identical matrix is formed to the left of the bar(input matrix, src). - * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst). - *----------------------------------------------------------------------------------------------------------------*/ - - /* - * Working pointer for destination matrix - */ - pOutT1 = pOut; - /* - * Loop over the number of rows - */ - rowCnt = numRows; - /* - * Making the destination matrix as identity matrix - */ - while (rowCnt > 0U) - { - /* - * Writing all zeroes in lower triangle of the destination matrix - */ - j = numRows - rowCnt; - while (j > 0U) - { - *pOutT1++ = 0.0f16; - j--; - } - /* - * Writing all ones in the diagonal of the destination matrix - */ - *pOutT1++ = 1.0f16; - /* - * Writing all zeroes in upper triangle of the destination matrix - */ - j = rowCnt - 1U; - while (j > 0U) - { - *pOutT1++ = 0.0f16; - j--; - } - /* - * Decrement the loop counter - */ - rowCnt--; - } - - /* - * Loop over the number of columns of the input matrix. - * All the elements in each column are processed by the row operations - */ - loopCnt = numCols; - /* - * Index modifier to navigate through the columns - */ - l = 0U; - while (loopCnt > 0U) - { - /* - * Check if the pivot element is zero.. - * If it is zero then interchange the row with non zero row below. - * If there is no non zero element to replace in the rows below, - * then the matrix is Singular. - */ - - /* - * Working pointer for the input matrix that points - * * to the pivot element of the particular row - */ - pInT1 = pIn + (l * numCols); - /* - * Working pointer for the destination matrix that points - * * to the pivot element of the particular row - */ - pOutT1 = pOut + (l * numCols); - /* - * Temporary variable to hold the pivot value - */ - in = *pInT1; - - - /* - * Check if the pivot element is zero - */ - if ((_Float16)*pInT1 == 0.0f16) - { - /* - * Loop over the number rows present below - */ - for (i = 1U; i < numRows-l; i++) - { - /* - * Update the input and destination pointers - */ - pInT2 = pInT1 + (numCols * i); - pOutT2 = pOutT1 + (numCols * i); - /* - * Check if there is a non zero pivot element to - * * replace in the rows below - */ - if ((_Float16)*pInT2 != 0.0f16) - { - f16x8_t vecA, vecB; - /* - * Loop over number of columns - * * to the right of the pilot element - */ - pTmpA = pInT1; - pTmpB = pInT2; - blkCnt = (numCols - l) >> 3; - while (blkCnt > 0U) - { - - vecA = vldrhq_f16(pTmpA); - vecB = vldrhq_f16(pTmpB); - vstrhq_f16(pTmpB, vecA); - vstrhq_f16(pTmpA, vecB); - - pTmpA += 8; - pTmpB += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (numCols - l) & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - vecA = vldrhq_f16(pTmpA); - vecB = vldrhq_f16(pTmpB); - vstrhq_p_f16(pTmpB, vecA, p0); - vstrhq_p_f16(pTmpA, vecB, p0); - } - - pInT1 += numCols - l; - pInT2 += numCols - l; - pTmpA = pOutT1; - pTmpB = pOutT2; - blkCnt = numCols >> 3; - while (blkCnt > 0U) - { - - vecA = vldrhq_f16(pTmpA); - vecB = vldrhq_f16(pTmpB); - vstrhq_f16(pTmpB, vecA); - vstrhq_f16(pTmpA, vecB); - pTmpA += 8; - pTmpB += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - vecA = vldrhq_f16(pTmpA); - vecB = vldrhq_f16(pTmpB); - vstrhq_p_f16(pTmpB, vecA, p0); - vstrhq_p_f16(pTmpA, vecB, p0); - } - - pOutT1 += numCols; - pOutT2 += numCols; - /* - * Flag to indicate whether exchange is done or not - */ - flag = 1U; - - /* - * Break after exchange is done - */ - break; - } - - } - } - - /* - * Update the status if the matrix is singular - */ - if ((flag != 1U) && (in == 0.0f16)) - { - return ARM_MATH_SINGULAR; - } - - /* - * Points to the pivot row of input and destination matrices - */ - pPivotRowIn = pIn + (l * numCols); - pPivotRowDst = pOut + (l * numCols); - - /* - * Temporary pointers to the pivot row pointers - */ - pInT1 = pPivotRowIn; - pOutT1 = pPivotRowDst; - - /* - * Pivot element of the row - */ - in = *(pIn + (l * numCols)); - - pTmpA = pInT1; - - f16x8_t invIn = vdupq_n_f16(1.0f16 / in); - - blkCnt = (numCols - l) >> 3; - f16x8_t vecA; - while (blkCnt > 0U) - { - *(f16x8_t *) pTmpA = *(f16x8_t *) pTmpA * invIn; - pTmpA += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = (numCols - l) & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - - vecA = vldrhq_f16(pTmpA); - vecA = vecA * invIn; - vstrhq_p_f16(pTmpA, vecA, p0); - } - - pInT1 += numCols - l; - /* - * Loop over number of columns - * * to the right of the pilot element - */ - - pTmpA = pOutT1; - blkCnt = numCols >> 3; - while (blkCnt > 0U) - { - *(f16x8_t *) pTmpA = *(f16x8_t *) pTmpA *invIn; - pTmpA += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - vecA = vldrhq_f16(pTmpA); - vecA = vecA * invIn; - vstrhq_p_f16(pTmpA, vecA, p0); - } - - pOutT1 += numCols; - - /* - * Replace the rows with the sum of that row and a multiple of row i - * * so that each new element in column i above row i is zero. - */ - - /* - * Temporary pointers for input and destination matrices - */ - pInT1 = pIn; - pOutT1 = pOut; - - for (i = 0U; i < numRows; i++) - { - /* - * Check for the pivot element - */ - if (i == l) - { - /* - * If the processing element is the pivot element, - * only the columns to the right are to be processed - */ - pInT1 += numCols - l; - pOutT1 += numCols; - } - else - { - /* - * Element of the reference row - */ - - /* - * Working pointers for input and destination pivot rows - */ - pPRT_in = pPivotRowIn; - pPRT_pDst = pPivotRowDst; - /* - * Loop over the number of columns to the right of the pivot element, - * to replace the elements in the input matrix - */ - - in = *pInT1; - f16x8_t tmpV = vdupq_n_f16(in); - - blkCnt = (numCols - l) >> 3; - while (blkCnt > 0U) - { - f16x8_t vec1, vec2; - /* - * Replace the element by the sum of that row - * and a multiple of the reference row - */ - vec1 = vldrhq_f16(pInT1); - vec2 = vldrhq_f16(pPRT_in); - vec1 = vfmsq_f16(vec1, tmpV, vec2); - vstrhq_f16(pInT1, vec1); - pPRT_in += 8; - pInT1 += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (numCols - l) & 7; - if (blkCnt > 0U) - { - f16x8_t vec1, vec2; - mve_pred16_t p0 = vctp16q(blkCnt); - - vec1 = vldrhq_f16(pInT1); - vec2 = vldrhq_f16(pPRT_in); - vec1 = vfmsq_f16(vec1, tmpV, vec2); - vstrhq_p_f16(pInT1, vec1, p0); - pInT1 += blkCnt; - } - - blkCnt = numCols >> 3; - while (blkCnt > 0U) - { - f16x8_t vec1, vec2; - - /* - * Replace the element by the sum of that row - * and a multiple of the reference row - */ - vec1 = vldrhq_f16(pOutT1); - vec2 = vldrhq_f16(pPRT_pDst); - vec1 = vfmsq_f16(vec1, tmpV, vec2); - vstrhq_f16(pOutT1, vec1); - pPRT_pDst += 8; - pOutT1 += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) - { - f16x8_t vec1, vec2; - mve_pred16_t p0 = vctp16q(blkCnt); - - vec1 = vldrhq_f16(pOutT1); - vec2 = vldrhq_f16(pPRT_pDst); - vec1 = vfmsq_f16(vec1, tmpV, vec2); - vstrhq_p_f16(pOutT1, vec1, p0); - - pInT2 += blkCnt; - pOutT1 += blkCnt; - } - } - /* - * Increment the temporary input pointer - */ - pInT1 = pInT1 + l; - } - /* - * Increment the input pointer - */ - pIn++; - /* - * Decrement the loop counter - */ - loopCnt--; - /* - * Increment the index modifier - */ - l++; - } - - /* - * Set status as ARM_MATH_SUCCESS - */ - status = ARM_MATH_SUCCESS; - - if ((flag != 1U) && (in == 0.0f16)) - { - pIn = pSrc->pData; - for (i = 0; i < numRows * numCols; i++) - { - if ((_Float16)pIn[i] != 0.0f16) - break; - } - - if (i == numRows * numCols) - status = ARM_MATH_SINGULAR; - } - } - /* Return to application */ - return (status); -} - -#else - -arm_status arm_mat_inverse_f16( - const arm_matrix_instance_f16 * pSrc, - arm_matrix_instance_f16 * pDst) -{ - float16_t *pIn = pSrc->pData; /* input data matrix pointer */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - float16_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ - float16_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */ - float16_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data matrix pointer */ - uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ - uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ - - _Float16 Xchg, in = 0.0f16, in1; /* Temporary input values */ - uint32_t i, rowCnt, flag = 0U, j, loopCnt, k,l; /* loop counters */ - arm_status status; /* status of matrix inverse */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - /*-------------------------------------------------------------------------------------------------------------- - * Matrix Inverse can be solved using elementary row operations. - * - * Gauss-Jordan Method: - * - * 1. First combine the identity matrix and the input matrix separated by a bar to form an - * augmented matrix as follows: - * _ _ _ _ - * | a11 a12 | 1 0 | | X11 X12 | - * | | | = | | - * |_ a21 a22 | 0 1 _| |_ X21 X21 _| - * - * 2. In our implementation, pDst Matrix is used as identity matrix. - * - * 3. Begin with the first row. Let i = 1. - * - * 4. Check to see if the pivot for row i is zero. - * The pivot is the element of the main diagonal that is on the current row. - * For instance, if working with row i, then the pivot element is aii. - * If the pivot is zero, exchange that row with a row below it that does not - * contain a zero in column i. If this is not possible, then an inverse - * to that matrix does not exist. - * - * 5. Divide every element of row i by the pivot. - * - * 6. For every row below and row i, replace that row with the sum of that row and - * a multiple of row i so that each new element in column i below row i is zero. - * - * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros - * for every element below and above the main diagonal. - * - * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc). - * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst). - *----------------------------------------------------------------------------------------------------------------*/ - - /* Working pointer for destination matrix */ - pOutT1 = pOut; - - /* Loop over the number of rows */ - rowCnt = numRows; - - /* Making the destination matrix as identity matrix */ - while (rowCnt > 0U) - { - /* Writing all zeroes in lower triangle of the destination matrix */ - j = numRows - rowCnt; - while (j > 0U) - { - *pOutT1++ = 0.0f16; - j--; - } - - /* Writing all ones in the diagonal of the destination matrix */ - *pOutT1++ = 1.0f16; - - /* Writing all zeroes in upper triangle of the destination matrix */ - j = rowCnt - 1U; - while (j > 0U) - { - *pOutT1++ = 0.0f16; - j--; - } - - /* Decrement loop counter */ - rowCnt--; - } - - /* Loop over the number of columns of the input matrix. - All the elements in each column are processed by the row operations */ - loopCnt = numCols; - - /* Index modifier to navigate through the columns */ - l = 0U; - - while (loopCnt > 0U) - { - /* Check if the pivot element is zero.. - * If it is zero then interchange the row with non zero row below. - * If there is no non zero element to replace in the rows below, - * then the matrix is Singular. */ - - /* Working pointer for the input matrix that points - * to the pivot element of the particular row */ - pInT1 = pIn + (l * numCols); - - /* Working pointer for the destination matrix that points - * to the pivot element of the particular row */ - pOutT1 = pOut + (l * numCols); - - /* Temporary variable to hold the pivot value */ - in = *pInT1; - - - /* Check if the pivot element is zero */ - if ((_Float16)*pInT1 == 0.0f16) - { - /* Loop over the number rows present below */ - - for (i = 1U; i < numRows-l; i++) - { - /* Update the input and destination pointers */ - pInT2 = pInT1 + (numCols * i); - pOutT2 = pOutT1 + (numCols * i); - - /* Check if there is a non zero pivot element to - * replace in the rows below */ - if ((_Float16)*pInT2 != 0.0f16) - { - /* Loop over number of columns - * to the right of the pilot element */ - j = numCols - l; - - while (j > 0U) - { - /* Exchange the row elements of the input matrix */ - Xchg = *pInT2; - *pInT2++ = *pInT1; - *pInT1++ = Xchg; - - /* Decrement the loop counter */ - j--; - } - - /* Loop over number of columns of the destination matrix */ - j = numCols; - - while (j > 0U) - { - /* Exchange the row elements of the destination matrix */ - Xchg = *pOutT2; - *pOutT2++ = *pOutT1; - *pOutT1++ = Xchg; - - /* Decrement loop counter */ - j--; - } - - /* Flag to indicate whether exchange is done or not */ - flag = 1U; - - /* Break after exchange is done */ - break; - } - - } - } - - /* Update the status if the matrix is singular */ - if ((flag != 1U) && (in == 0.0f16)) - { - return ARM_MATH_SINGULAR; - } - - /* Points to the pivot row of input and destination matrices */ - pPivotRowIn = pIn + (l * numCols); - pPivotRowDst = pOut + (l * numCols); - - /* Temporary pointers to the pivot row pointers */ - pInT1 = pPivotRowIn; - pInT2 = pPivotRowDst; - - /* Pivot element of the row */ - in = *pPivotRowIn; - - /* Loop over number of columns - * to the right of the pilot element */ - j = (numCols - l); - - while (j > 0U) - { - /* Divide each element of the row of the input matrix - * by the pivot element */ - in1 = *pInT1; - *pInT1++ = in1 / in; - - /* Decrement the loop counter */ - j--; - } - - /* Loop over number of columns of the destination matrix */ - j = numCols; - - while (j > 0U) - { - /* Divide each element of the row of the destination matrix - * by the pivot element */ - in1 = *pInT2; - *pInT2++ = in1 / in; - - /* Decrement the loop counter */ - j--; - } - - /* Replace the rows with the sum of that row and a multiple of row i - * so that each new element in column i above row i is zero.*/ - - /* Temporary pointers for input and destination matrices */ - pInT1 = pIn; - pInT2 = pOut; - - /* index used to check for pivot element */ - i = 0U; - - /* Loop over number of rows */ - /* to be replaced by the sum of that row and a multiple of row i */ - k = numRows; - - while (k > 0U) - { - /* Check for the pivot element */ - if (i == l) - { - /* If the processing element is the pivot element, - only the columns to the right are to be processed */ - pInT1 += numCols - l; - - pInT2 += numCols; - } - else - { - /* Element of the reference row */ - in = *pInT1; - - /* Working pointers for input and destination pivot rows */ - pPRT_in = pPivotRowIn; - pPRT_pDst = pPivotRowDst; - - /* Loop over the number of columns to the right of the pivot element, - to replace the elements in the input matrix */ - j = (numCols - l); - - while (j > 0U) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - in1 = *pInT1; - *pInT1++ = (_Float16)in1 - ((_Float16)in * (_Float16)*pPRT_in++); - - /* Decrement the loop counter */ - j--; - } - - /* Loop over the number of columns to - replace the elements in the destination matrix */ - j = numCols; - - while (j > 0U) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - in1 = *pInT2; - *pInT2++ = (_Float16)in1 - ((_Float16)in * (_Float16)*pPRT_pDst++); - - /* Decrement loop counter */ - j--; - } - - } - - /* Increment temporary input pointer */ - pInT1 = pInT1 + l; - - /* Decrement loop counter */ - k--; - - /* Increment pivot index */ - i++; - } - - /* Increment the input pointer */ - pIn++; - - /* Decrement the loop counter */ - loopCnt--; - - /* Increment the index modifier */ - l++; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - if ((flag != 1U) && ((_Float16)in == 0.0f16)) - { - pIn = pSrc->pData; - for (i = 0; i < numRows * numCols; i++) - { - if ((_Float16)pIn[i] != 0.0f16) - break; - } - - if (i == numRows * numCols) - status = ARM_MATH_SINGULAR; - } - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixInv group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c deleted file mode 100644 index 07a201d..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c +++ /dev/null @@ -1,1570 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_inverse_f32.c - * Description: Floating-point matrix inverse - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixInv Matrix Inverse - - Computes the inverse of a matrix. - - The inverse is defined only if the input matrix is square and non-singular (the determinant is non-zero). - The function checks that the input and output matrices are square and of the same size. - - Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix - inversion of floating-point matrices. - - @par Algorithm - The Gauss-Jordan method is used to find the inverse. - The algorithm performs a sequence of elementary row-operations until it - reduces the input matrix to an identity matrix. Applying the same sequence - of elementary row-operations to an identity matrix yields the inverse matrix. - If the input matrix is singular, then the algorithm terminates and returns error status - ARM_MATH_SINGULAR. - \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method" - */ - -/** - @addtogroup MatrixInv - @{ - */ - -/** - @brief Floating-point matrix inverse. - @param[in] pSrc points to input matrix structure. The source matrix is modified by the function. - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - \ref ARM_MATH_SINGULAR : Input matrix is found to be singular (non-invertible) - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -arm_status arm_mat_inverse_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ - float32_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */ - float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data matrix pointer */ - - uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ - uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ - float32_t *pTmpA, *pTmpB; - - float32_t in = 0.0f; /* Temporary input values */ - uint32_t i, rowCnt, flag = 0U, j, loopCnt, l; /* loop counters */ - arm_status status; /* status of matrix inverse */ - uint32_t blkCnt; - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) - || (pSrc->numRows != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - - /*-------------------------------------------------------------------------------------------------------------- - * Matrix Inverse can be solved using elementary row operations. - * - * Gauss-Jordan Method: - * - * 1. First combine the identity matrix and the input matrix separated by a bar to form an - * augmented matrix as follows: - * _ _ _ _ _ _ _ _ - * | | a11 a12 | | | 1 0 | | | X11 X12 | - * | | | | | | | = | | - * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _| - * - * 2. In our implementation, pDst Matrix is used as identity matrix. - * - * 3. Begin with the first row. Let i = 1. - * - * 4. Check to see if the pivot for row i is zero. - * The pivot is the element of the main diagonal that is on the current row. - * For instance, if working with row i, then the pivot element is aii. - * If the pivot is zero, exchange that row with a row below it that does not - * contain a zero in column i. If this is not possible, then an inverse - * to that matrix does not exist. - * - * 5. Divide every element of row i by the pivot. - * - * 6. For every row below and row i, replace that row with the sum of that row and - * a multiple of row i so that each new element in column i below row i is zero. - * - * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros - * for every element below and above the main diagonal. - * - * 8. Now an identical matrix is formed to the left of the bar(input matrix, src). - * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst). - *----------------------------------------------------------------------------------------------------------------*/ - - /* - * Working pointer for destination matrix - */ - pOutT1 = pOut; - /* - * Loop over the number of rows - */ - rowCnt = numRows; - /* - * Making the destination matrix as identity matrix - */ - while (rowCnt > 0U) - { - /* - * Writing all zeroes in lower triangle of the destination matrix - */ - j = numRows - rowCnt; - while (j > 0U) - { - *pOutT1++ = 0.0f; - j--; - } - /* - * Writing all ones in the diagonal of the destination matrix - */ - *pOutT1++ = 1.0f; - /* - * Writing all zeroes in upper triangle of the destination matrix - */ - j = rowCnt - 1U; - while (j > 0U) - { - *pOutT1++ = 0.0f; - j--; - } - /* - * Decrement the loop counter - */ - rowCnt--; - } - - /* - * Loop over the number of columns of the input matrix. - * All the elements in each column are processed by the row operations - */ - loopCnt = numCols; - /* - * Index modifier to navigate through the columns - */ - l = 0U; - while (loopCnt > 0U) - { - /* - * Check if the pivot element is zero.. - * If it is zero then interchange the row with non zero row below. - * If there is no non zero element to replace in the rows below, - * then the matrix is Singular. - */ - - /* - * Working pointer for the input matrix that points - * * to the pivot element of the particular row - */ - pInT1 = pIn + (l * numCols); - /* - * Working pointer for the destination matrix that points - * * to the pivot element of the particular row - */ - pOutT1 = pOut + (l * numCols); - /* - * Temporary variable to hold the pivot value - */ - in = *pInT1; - - - /* - * Check if the pivot element is zero - */ - if (*pInT1 == 0.0f) - { - /* - * Loop over the number rows present below - */ - for (i = 1U; i < numRows-l; i++) - { - /* - * Update the input and destination pointers - */ - pInT2 = pInT1 + (numCols * i); - pOutT2 = pOutT1 + (numCols * i); - /* - * Check if there is a non zero pivot element to - * * replace in the rows below - */ - if (*pInT2 != 0.0f) - { - f32x4_t vecA, vecB; - /* - * Loop over number of columns - * * to the right of the pilot element - */ - pTmpA = pInT1; - pTmpB = pInT2; - blkCnt = (numCols - l) >> 2; - while (blkCnt > 0U) - { - - vecA = vldrwq_f32(pTmpA); - vecB = vldrwq_f32(pTmpB); - vstrwq_f32(pTmpB, vecA); - vstrwq_f32(pTmpA, vecB); - - pTmpA += 4; - pTmpB += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (numCols - l) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - - vecA = vldrwq_f32(pTmpA); - vecB = vldrwq_f32(pTmpB); - vstrwq_p_f32(pTmpB, vecA, p0); - vstrwq_p_f32(pTmpA, vecB, p0); - } - - pInT1 += numCols - l; - pInT2 += numCols - l; - pTmpA = pOutT1; - pTmpB = pOutT2; - blkCnt = numCols >> 2; - while (blkCnt > 0U) - { - - vecA = vldrwq_f32(pTmpA); - vecB = vldrwq_f32(pTmpB); - vstrwq_f32(pTmpB, vecA); - vstrwq_f32(pTmpA, vecB); - pTmpA += 4; - pTmpB += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - - vecA = vldrwq_f32(pTmpA); - vecB = vldrwq_f32(pTmpB); - vstrwq_p_f32(pTmpB, vecA, p0); - vstrwq_p_f32(pTmpA, vecB, p0); - } - - pOutT1 += numCols; - pOutT2 += numCols; - /* - * Flag to indicate whether exchange is done or not - */ - flag = 1U; - - /* - * Break after exchange is done - */ - break; - } - - } - } - - /* - * Update the status if the matrix is singular - */ - if ((flag != 1U) && (in == 0.0f)) - { - return ARM_MATH_SINGULAR; - } - - /* - * Points to the pivot row of input and destination matrices - */ - pPivotRowIn = pIn + (l * numCols); - pPivotRowDst = pOut + (l * numCols); - - /* - * Temporary pointers to the pivot row pointers - */ - pInT1 = pPivotRowIn; - pOutT1 = pPivotRowDst; - - /* - * Pivot element of the row - */ - in = *(pIn + (l * numCols)); - - pTmpA = pInT1; - - f32x4_t invIn = vdupq_n_f32(1.0f / in); - - blkCnt = (numCols - l) >> 2; - f32x4_t vecA; - while (blkCnt > 0U) - { - *(f32x4_t *) pTmpA = *(f32x4_t *) pTmpA * invIn; - pTmpA += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = (numCols - l) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - - - vecA = vldrwq_f32(pTmpA); - vecA = vecA * invIn; - vstrwq_p_f32(pTmpA, vecA, p0); - } - - pInT1 += numCols - l; - /* - * Loop over number of columns - * * to the right of the pilot element - */ - - pTmpA = pOutT1; - blkCnt = numCols >> 2; - while (blkCnt > 0U) - { - *(f32x4_t *) pTmpA = *(f32x4_t *) pTmpA *invIn; - pTmpA += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - - vecA = vldrwq_f32(pTmpA); - vecA = vecA * invIn; - vstrwq_p_f32(pTmpA, vecA, p0); - } - - pOutT1 += numCols; - - /* - * Replace the rows with the sum of that row and a multiple of row i - * * so that each new element in column i above row i is zero. - */ - - /* - * Temporary pointers for input and destination matrices - */ - pInT1 = pIn; - pOutT1 = pOut; - - for (i = 0U; i < numRows; i++) - { - /* - * Check for the pivot element - */ - if (i == l) - { - /* - * If the processing element is the pivot element, - * only the columns to the right are to be processed - */ - pInT1 += numCols - l; - pOutT1 += numCols; - } - else - { - /* - * Element of the reference row - */ - - /* - * Working pointers for input and destination pivot rows - */ - pPRT_in = pPivotRowIn; - pPRT_pDst = pPivotRowDst; - /* - * Loop over the number of columns to the right of the pivot element, - * to replace the elements in the input matrix - */ - - in = *pInT1; - f32x4_t tmpV = vdupq_n_f32(in); - - blkCnt = (numCols - l) >> 2; - while (blkCnt > 0U) - { - f32x4_t vec1, vec2; - /* - * Replace the element by the sum of that row - * and a multiple of the reference row - */ - vec1 = vldrwq_f32(pInT1); - vec2 = vldrwq_f32(pPRT_in); - vec1 = vfmsq_f32(vec1, tmpV, vec2); - vstrwq_f32(pInT1, vec1); - pPRT_in += 4; - pInT1 += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (numCols - l) & 3; - if (blkCnt > 0U) - { - f32x4_t vec1, vec2; - mve_pred16_t p0 = vctp32q(blkCnt); - - vec1 = vldrwq_f32(pInT1); - vec2 = vldrwq_f32(pPRT_in); - vec1 = vfmsq_f32(vec1, tmpV, vec2); - vstrwq_p_f32(pInT1, vec1, p0); - pInT1 += blkCnt; - } - - blkCnt = numCols >> 2; - while (blkCnt > 0U) - { - f32x4_t vec1, vec2; - - /* - * Replace the element by the sum of that row - * and a multiple of the reference row - */ - vec1 = vldrwq_f32(pOutT1); - vec2 = vldrwq_f32(pPRT_pDst); - vec1 = vfmsq_f32(vec1, tmpV, vec2); - vstrwq_f32(pOutT1, vec1); - pPRT_pDst += 4; - pOutT1 += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) - { - f32x4_t vec1, vec2; - mve_pred16_t p0 = vctp32q(blkCnt); - - vec1 = vldrwq_f32(pOutT1); - vec2 = vldrwq_f32(pPRT_pDst); - vec1 = vfmsq_f32(vec1, tmpV, vec2); - vstrwq_p_f32(pOutT1, vec1, p0); - - pInT2 += blkCnt; - pOutT1 += blkCnt; - } - } - /* - * Increment the temporary input pointer - */ - pInT1 = pInT1 + l; - } - /* - * Increment the input pointer - */ - pIn++; - /* - * Decrement the loop counter - */ - loopCnt--; - /* - * Increment the index modifier - */ - l++; - } - - /* - * Set status as ARM_MATH_SUCCESS - */ - status = ARM_MATH_SUCCESS; - - if ((flag != 1U) && (in == 0.0f)) - { - pIn = pSrc->pData; - for (i = 0; i < numRows * numCols; i++) - { - if (pIn[i] != 0.0f) - break; - } - - if (i == numRows * numCols) - status = ARM_MATH_SINGULAR; - } - } - /* Return to application */ - return (status); -} - -#else -#if defined(ARM_MATH_NEON) -arm_status arm_mat_inverse_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ - float32_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */ - float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data matrix pointer */ - uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ - uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ - - - float32_t Xchg, in = 0.0f, in1; /* Temporary input values */ - uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */ - arm_status status; /* status of matrix inverse */ - float32x4_t vec1; - float32x4_t vec2; - float32x4_t tmpV; - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) - || (pSrc->numRows != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /*-------------------------------------------------------------------------------------------------------------- - * Matrix Inverse can be solved using elementary row operations. - * - * Gauss-Jordan Method: - * - * 1. First combine the identity matrix and the input matrix separated by a bar to form an - * augmented matrix as follows: - * _ _ _ _ - * | a11 a12 | 1 0 | | X11 X12 | - * | | | = | | - * |_ a21 a22 | 0 1 _| |_ X21 X21 _| - * - * 2. In our implementation, pDst Matrix is used as identity matrix. - * - * 3. Begin with the first row. Let i = 1. - * - * 4. Check to see if the pivot for row i is zero. - * The pivot is the element of the main diagonal that is on the current row. - * For instance, if working with row i, then the pivot element is aii. - * If the pivot is zero, exchange that row with a row below it that does not - * contain a zero in column i. If this is not possible, then an inverse - * to that matrix does not exist. - * - * 5. Divide every element of row i by the pivot. - * - * 6. For every row below and row i, replace that row with the sum of that row and - * a multiple of row i so that each new element in column i below row i is zero. - * - * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros - * for every element below and above the main diagonal. - * - * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc). - * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst). - *----------------------------------------------------------------------------------------------------------------*/ - - /* Working pointer for destination matrix */ - pOutT1 = pOut; - - /* Loop over the number of rows */ - rowCnt = numRows; - - /* Making the destination matrix as identity matrix */ - while (rowCnt > 0U) - { - /* Writing all zeroes in lower triangle of the destination matrix */ - j = numRows - rowCnt; - while (j > 0U) - { - *pOutT1++ = 0.0f; - j--; - } - - /* Writing all ones in the diagonal of the destination matrix */ - *pOutT1++ = 1.0f; - - /* Writing all zeroes in upper triangle of the destination matrix */ - j = rowCnt - 1U; - - while (j > 0U) - { - *pOutT1++ = 0.0f; - j--; - } - - /* Decrement the loop counter */ - rowCnt--; - } - - /* Loop over the number of columns of the input matrix. - All the elements in each column are processed by the row operations */ - loopCnt = numCols; - - /* Index modifier to navigate through the columns */ - l = 0U; - - while (loopCnt > 0U) - { - /* Check if the pivot element is zero.. - * If it is zero then interchange the row with non zero row below. - * If there is no non zero element to replace in the rows below, - * then the matrix is Singular. */ - - /* Working pointer for the input matrix that points - * to the pivot element of the particular row */ - pInT1 = pIn + (l * numCols); - - /* Working pointer for the destination matrix that points - * to the pivot element of the particular row */ - pOutT1 = pOut + (l * numCols); - - /* Temporary variable to hold the pivot value */ - in = *pInT1; - - /* Check if the pivot element is zero */ - if (*pInT1 == 0.0f) - { - /* Loop over the number rows present below */ - for (i = 1U; i < numRows - l; i++) - { - /* Update the input and destination pointers */ - pInT2 = pInT1 + (numCols * i); - pOutT2 = pOutT1 + (numCols * i); - - /* Check if there is a non zero pivot element to - * replace in the rows below */ - if (*pInT2 != 0.0f) - { - /* Loop over number of columns - * to the right of the pilot element */ - j = numCols - l; - - while (j > 0U) - { - /* Exchange the row elements of the input matrix */ - Xchg = *pInT2; - *pInT2++ = *pInT1; - *pInT1++ = Xchg; - - /* Decrement the loop counter */ - j--; - } - - /* Loop over number of columns of the destination matrix */ - j = numCols; - - while (j > 0U) - { - /* Exchange the row elements of the destination matrix */ - Xchg = *pOutT2; - *pOutT2++ = *pOutT1; - *pOutT1++ = Xchg; - - /* Decrement the loop counter */ - j--; - } - - /* Flag to indicate whether exchange is done or not */ - flag = 1U; - - /* Break after exchange is done */ - break; - } - - - } - } - - /* Update the status if the matrix is singular */ - if ((flag != 1U) && (in == 0.0f)) - { - return ARM_MATH_SINGULAR; - } - - /* Points to the pivot row of input and destination matrices */ - pPivotRowIn = pIn + (l * numCols); - pPivotRowDst = pOut + (l * numCols); - - /* Temporary pointers to the pivot row pointers */ - pInT1 = pPivotRowIn; - pInT2 = pPivotRowDst; - - /* Pivot element of the row */ - in = *pPivotRowIn; - tmpV = vdupq_n_f32(1.0f/in); - - /* Loop over number of columns - * to the right of the pilot element */ - j = (numCols - l) >> 2; - - while (j > 0U) - { - /* Divide each element of the row of the input matrix - * by the pivot element */ - vec1 = vld1q_f32(pInT1); - - vec1 = vmulq_f32(vec1, tmpV); - vst1q_f32(pInT1, vec1); - pInT1 += 4; - - /* Decrement the loop counter */ - j--; - } - - /* Tail */ - j = (numCols - l) & 3; - - while (j > 0U) - { - /* Divide each element of the row of the input matrix - * by the pivot element */ - in1 = *pInT1; - *pInT1++ = in1 / in; - - /* Decrement the loop counter */ - j--; - } - - /* Loop over number of columns of the destination matrix */ - j = numCols >> 2; - - while (j > 0U) - { - /* Divide each element of the row of the destination matrix - * by the pivot element */ - vec1 = vld1q_f32(pInT2); - - vec1 = vmulq_f32(vec1, tmpV); - vst1q_f32(pInT2, vec1); - pInT2 += 4; - - /* Decrement the loop counter */ - j--; - } - - /* Tail */ - j = numCols & 3; - - while (j > 0U) - { - /* Divide each element of the row of the destination matrix - * by the pivot element */ - in1 = *pInT2; - *pInT2++ = in1 / in; - - /* Decrement the loop counter */ - j--; - } - - /* Replace the rows with the sum of that row and a multiple of row i - * so that each new element in column i above row i is zero.*/ - - /* Temporary pointers for input and destination matrices */ - pInT1 = pIn; - pInT2 = pOut; - - /* index used to check for pivot element */ - i = 0U; - - /* Loop over number of rows */ - /* to be replaced by the sum of that row and a multiple of row i */ - k = numRows; - - while (k > 0U) - { - /* Check for the pivot element */ - if (i == l) - { - /* If the processing element is the pivot element, - only the columns to the right are to be processed */ - pInT1 += numCols - l; - - pInT2 += numCols; - } - else - { - /* Element of the reference row */ - in = *pInT1; - tmpV = vdupq_n_f32(in); - - /* Working pointers for input and destination pivot rows */ - pPRT_in = pPivotRowIn; - pPRT_pDst = pPivotRowDst; - - /* Loop over the number of columns to the right of the pivot element, - to replace the elements in the input matrix */ - j = (numCols - l) >> 2; - - while (j > 0U) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - vec1 = vld1q_f32(pInT1); - vec2 = vld1q_f32(pPRT_in); - vec1 = vmlsq_f32(vec1, tmpV, vec2); - vst1q_f32(pInT1, vec1); - pPRT_in += 4; - pInT1 += 4; - - /* Decrement the loop counter */ - j--; - } - - /* Tail */ - j = (numCols - l) & 3; - - while (j > 0U) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - in1 = *pInT1; - *pInT1++ = in1 - (in * *pPRT_in++); - - /* Decrement the loop counter */ - j--; - } - - /* Loop over the number of columns to - replace the elements in the destination matrix */ - j = numCols >> 2; - - while (j > 0U) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - vec1 = vld1q_f32(pInT2); - vec2 = vld1q_f32(pPRT_pDst); - vec1 = vmlsq_f32(vec1, tmpV, vec2); - vst1q_f32(pInT2, vec1); - pPRT_pDst += 4; - pInT2 += 4; - - /* Decrement the loop counter */ - j--; - } - - /* Tail */ - j = numCols & 3; - - while (j > 0U) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - in1 = *pInT2; - *pInT2++ = in1 - (in * *pPRT_pDst++); - - /* Decrement the loop counter */ - j--; - } - - } - - /* Increment the temporary input pointer */ - pInT1 = pInT1 + l; - - /* Decrement the loop counter */ - k--; - - /* Increment the pivot index */ - i++; - } - - /* Increment the input pointer */ - pIn++; - - /* Decrement the loop counter */ - loopCnt--; - - /* Increment the index modifier */ - l++; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - if ((flag != 1U) && (in == 0.0f)) - { - pIn = pSrc->pData; - for (i = 0; i < numRows * numCols; i++) - { - if (pIn[i] != 0.0f) - break; - } - - if (i == numRows * numCols) - status = ARM_MATH_SINGULAR; - } - } - /* Return to application */ - return (status); -} -#else -arm_status arm_mat_inverse_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ - float32_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */ - float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data matrix pointer */ - uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ - uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ - -#if defined (ARM_MATH_DSP) - - float32_t Xchg, in = 0.0f, in1; /* Temporary input values */ - uint32_t i, rowCnt, flag = 0U, j, loopCnt, k,l; /* loop counters */ - arm_status status; /* status of matrix inverse */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - /*-------------------------------------------------------------------------------------------------------------- - * Matrix Inverse can be solved using elementary row operations. - * - * Gauss-Jordan Method: - * - * 1. First combine the identity matrix and the input matrix separated by a bar to form an - * augmented matrix as follows: - * _ _ _ _ - * | a11 a12 | 1 0 | | X11 X12 | - * | | | = | | - * |_ a21 a22 | 0 1 _| |_ X21 X21 _| - * - * 2. In our implementation, pDst Matrix is used as identity matrix. - * - * 3. Begin with the first row. Let i = 1. - * - * 4. Check to see if the pivot for row i is zero. - * The pivot is the element of the main diagonal that is on the current row. - * For instance, if working with row i, then the pivot element is aii. - * If the pivot is zero, exchange that row with a row below it that does not - * contain a zero in column i. If this is not possible, then an inverse - * to that matrix does not exist. - * - * 5. Divide every element of row i by the pivot. - * - * 6. For every row below and row i, replace that row with the sum of that row and - * a multiple of row i so that each new element in column i below row i is zero. - * - * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros - * for every element below and above the main diagonal. - * - * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc). - * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst). - *----------------------------------------------------------------------------------------------------------------*/ - - /* Working pointer for destination matrix */ - pOutT1 = pOut; - - /* Loop over the number of rows */ - rowCnt = numRows; - - /* Making the destination matrix as identity matrix */ - while (rowCnt > 0U) - { - /* Writing all zeroes in lower triangle of the destination matrix */ - j = numRows - rowCnt; - while (j > 0U) - { - *pOutT1++ = 0.0f; - j--; - } - - /* Writing all ones in the diagonal of the destination matrix */ - *pOutT1++ = 1.0f; - - /* Writing all zeroes in upper triangle of the destination matrix */ - j = rowCnt - 1U; - while (j > 0U) - { - *pOutT1++ = 0.0f; - j--; - } - - /* Decrement loop counter */ - rowCnt--; - } - - /* Loop over the number of columns of the input matrix. - All the elements in each column are processed by the row operations */ - loopCnt = numCols; - - /* Index modifier to navigate through the columns */ - l = 0U; - - while (loopCnt > 0U) - { - /* Check if the pivot element is zero.. - * If it is zero then interchange the row with non zero row below. - * If there is no non zero element to replace in the rows below, - * then the matrix is Singular. */ - - /* Working pointer for the input matrix that points - * to the pivot element of the particular row */ - pInT1 = pIn + (l * numCols); - - /* Working pointer for the destination matrix that points - * to the pivot element of the particular row */ - pOutT1 = pOut + (l * numCols); - - /* Temporary variable to hold the pivot value */ - in = *pInT1; - - - - /* Check if the pivot element is zero */ - if (*pInT1 == 0.0f) - { - /* Loop over the number rows present below */ - - for (i = 1U; i < numRows - l; i++) - { - /* Update the input and destination pointers */ - pInT2 = pInT1 + (numCols * i); - pOutT2 = pOutT1 + (numCols * i); - - /* Check if there is a non zero pivot element to - * replace in the rows below */ - if (*pInT2 != 0.0f) - { - /* Loop over number of columns - * to the right of the pilot element */ - j = numCols - l; - - while (j > 0U) - { - /* Exchange the row elements of the input matrix */ - Xchg = *pInT2; - *pInT2++ = *pInT1; - *pInT1++ = Xchg; - - /* Decrement the loop counter */ - j--; - } - - /* Loop over number of columns of the destination matrix */ - j = numCols; - - while (j > 0U) - { - /* Exchange the row elements of the destination matrix */ - Xchg = *pOutT2; - *pOutT2++ = *pOutT1; - *pOutT1++ = Xchg; - - /* Decrement loop counter */ - j--; - } - - /* Flag to indicate whether exchange is done or not */ - flag = 1U; - - /* Break after exchange is done */ - break; - } - - - /* Decrement loop counter */ - } - } - - /* Update the status if the matrix is singular */ - if ((flag != 1U) && (in == 0.0f)) - { - return ARM_MATH_SINGULAR; - } - - /* Points to the pivot row of input and destination matrices */ - pPivotRowIn = pIn + (l * numCols); - pPivotRowDst = pOut + (l * numCols); - - /* Temporary pointers to the pivot row pointers */ - pInT1 = pPivotRowIn; - pInT2 = pPivotRowDst; - - /* Pivot element of the row */ - in = *pPivotRowIn; - - /* Loop over number of columns - * to the right of the pilot element */ - j = (numCols - l); - - while (j > 0U) - { - /* Divide each element of the row of the input matrix - * by the pivot element */ - in1 = *pInT1; - *pInT1++ = in1 / in; - - /* Decrement the loop counter */ - j--; - } - - /* Loop over number of columns of the destination matrix */ - j = numCols; - - while (j > 0U) - { - /* Divide each element of the row of the destination matrix - * by the pivot element */ - in1 = *pInT2; - *pInT2++ = in1 / in; - - /* Decrement the loop counter */ - j--; - } - - /* Replace the rows with the sum of that row and a multiple of row i - * so that each new element in column i above row i is zero.*/ - - /* Temporary pointers for input and destination matrices */ - pInT1 = pIn; - pInT2 = pOut; - - /* index used to check for pivot element */ - i = 0U; - - /* Loop over number of rows */ - /* to be replaced by the sum of that row and a multiple of row i */ - k = numRows; - - while (k > 0U) - { - /* Check for the pivot element */ - if (i == l) - { - /* If the processing element is the pivot element, - only the columns to the right are to be processed */ - pInT1 += numCols - l; - - pInT2 += numCols; - } - else - { - /* Element of the reference row */ - in = *pInT1; - - /* Working pointers for input and destination pivot rows */ - pPRT_in = pPivotRowIn; - pPRT_pDst = pPivotRowDst; - - /* Loop over the number of columns to the right of the pivot element, - to replace the elements in the input matrix */ - j = (numCols - l); - - while (j > 0U) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - in1 = *pInT1; - *pInT1++ = in1 - (in * *pPRT_in++); - - /* Decrement the loop counter */ - j--; - } - - /* Loop over the number of columns to - replace the elements in the destination matrix */ - j = numCols; - - while (j > 0U) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - in1 = *pInT2; - *pInT2++ = in1 - (in * *pPRT_pDst++); - - /* Decrement loop counter */ - j--; - } - - } - - /* Increment temporary input pointer */ - pInT1 = pInT1 + l; - - /* Decrement loop counter */ - k--; - - /* Increment pivot index */ - i++; - } - - /* Increment the input pointer */ - pIn++; - - /* Decrement the loop counter */ - loopCnt--; - - /* Increment the index modifier */ - l++; - } - - -#else - - float32_t Xchg, in = 0.0f; /* Temporary input values */ - uint32_t i, rowCnt, flag = 0U, j, loopCnt, l; /* loop counters */ - arm_status status; /* status of matrix inverse */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - /*-------------------------------------------------------------------------------------------------------------- - * Matrix Inverse can be solved using elementary row operations. - * - * Gauss-Jordan Method: - * - * 1. First combine the identity matrix and the input matrix separated by a bar to form an - * augmented matrix as follows: - * _ _ _ _ _ _ _ _ - * | | a11 a12 | | | 1 0 | | | X11 X12 | - * | | | | | | | = | | - * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _| - * - * 2. In our implementation, pDst Matrix is used as identity matrix. - * - * 3. Begin with the first row. Let i = 1. - * - * 4. Check to see if the pivot for row i is zero. - * The pivot is the element of the main diagonal that is on the current row. - * For instance, if working with row i, then the pivot element is aii. - * If the pivot is zero, exchange that row with a row below it that does not - * contain a zero in column i. If this is not possible, then an inverse - * to that matrix does not exist. - * - * 5. Divide every element of row i by the pivot. - * - * 6. For every row below and row i, replace that row with the sum of that row and - * a multiple of row i so that each new element in column i below row i is zero. - * - * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros - * for every element below and above the main diagonal. - * - * 8. Now an identical matrix is formed to the left of the bar(input matrix, src). - * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst). - *----------------------------------------------------------------------------------------------------------------*/ - - /* Working pointer for destination matrix */ - pOutT1 = pOut; - - /* Loop over the number of rows */ - rowCnt = numRows; - - /* Making the destination matrix as identity matrix */ - while (rowCnt > 0U) - { - /* Writing all zeroes in lower triangle of the destination matrix */ - j = numRows - rowCnt; - while (j > 0U) - { - *pOutT1++ = 0.0f; - j--; - } - - /* Writing all ones in the diagonal of the destination matrix */ - *pOutT1++ = 1.0f; - - /* Writing all zeroes in upper triangle of the destination matrix */ - j = rowCnt - 1U; - while (j > 0U) - { - *pOutT1++ = 0.0f; - j--; - } - - /* Decrement loop counter */ - rowCnt--; - } - - /* Loop over the number of columns of the input matrix. - All the elements in each column are processed by the row operations */ - loopCnt = numCols; - - /* Index modifier to navigate through the columns */ - l = 0U; - - while (loopCnt > 0U) - { - /* Check if the pivot element is zero.. - * If it is zero then interchange the row with non zero row below. - * If there is no non zero element to replace in the rows below, - * then the matrix is Singular. */ - - /* Working pointer for the input matrix that points - * to the pivot element of the particular row */ - pInT1 = pIn + (l * numCols); - - /* Working pointer for the destination matrix that points - * to the pivot element of the particular row */ - pOutT1 = pOut + (l * numCols); - - /* Temporary variable to hold the pivot value */ - in = *pInT1; - - /* Check if the pivot element is zero */ - if (*pInT1 == 0.0f) - { - /* Loop over the number rows present below */ - for (i = 1U; i < numRows-l; i++) - { - /* Update the input and destination pointers */ - pInT2 = pInT1 + (numCols * i); - pOutT2 = pOutT1 + (numCols * i); - - /* Check if there is a non zero pivot element to - * replace in the rows below */ - if (*pInT2 != 0.0f) - { - /* Loop over number of columns - * to the right of the pilot element */ - for (j = 0U; j < (numCols - l); j++) - { - /* Exchange the row elements of the input matrix */ - Xchg = *pInT2; - *pInT2++ = *pInT1; - *pInT1++ = Xchg; - } - - for (j = 0U; j < numCols; j++) - { - Xchg = *pOutT2; - *pOutT2++ = *pOutT1; - *pOutT1++ = Xchg; - } - - /* Flag to indicate whether exchange is done or not */ - flag = 1U; - - /* Break after exchange is done */ - break; - } - } - } - - - /* Update the status if the matrix is singular */ - if ((flag != 1U) && (in == 0.0f)) - { - return ARM_MATH_SINGULAR; - } - - /* Points to the pivot row of input and destination matrices */ - pPivotRowIn = pIn + (l * numCols); - pPivotRowDst = pOut + (l * numCols); - - /* Temporary pointers to the pivot row pointers */ - pInT1 = pPivotRowIn; - pOutT1 = pPivotRowDst; - - /* Pivot element of the row */ - in = *(pIn + (l * numCols)); - - /* Loop over number of columns - * to the right of the pilot element */ - for (j = 0U; j < (numCols - l); j++) - { - /* Divide each element of the row of the input matrix - * by the pivot element */ - *pInT1 = *pInT1 / in; - pInT1++; - } - for (j = 0U; j < numCols; j++) - { - /* Divide each element of the row of the destination matrix - * by the pivot element */ - *pOutT1 = *pOutT1 / in; - pOutT1++; - } - - /* Replace the rows with the sum of that row and a multiple of row i - * so that each new element in column i above row i is zero.*/ - - /* Temporary pointers for input and destination matrices */ - pInT1 = pIn; - pOutT1 = pOut; - - for (i = 0U; i < numRows; i++) - { - /* Check for the pivot element */ - if (i == l) - { - /* If the processing element is the pivot element, - only the columns to the right are to be processed */ - pInT1 += numCols - l; - pOutT1 += numCols; - } - else - { - /* Element of the reference row */ - in = *pInT1; - - /* Working pointers for input and destination pivot rows */ - pPRT_in = pPivotRowIn; - pPRT_pDst = pPivotRowDst; - - /* Loop over the number of columns to the right of the pivot element, - to replace the elements in the input matrix */ - for (j = 0U; j < (numCols - l); j++) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - *pInT1 = *pInT1 - (in * *pPRT_in++); - pInT1++; - } - - /* Loop over the number of columns to - replace the elements in the destination matrix */ - for (j = 0U; j < numCols; j++) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - *pOutT1 = *pOutT1 - (in * *pPRT_pDst++); - pOutT1++; - } - - } - - /* Increment temporary input pointer */ - pInT1 = pInT1 + l; - } - - /* Increment the input pointer */ - pIn++; - - /* Decrement the loop counter */ - loopCnt--; - - /* Increment the index modifier */ - l++; - } - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - if ((flag != 1U) && (in == 0.0f)) - { - pIn = pSrc->pData; - for (i = 0; i < numRows * numCols; i++) - { - if (pIn[i] != 0.0f) - break; - } - - if (i == numRows * numCols) - status = ARM_MATH_SINGULAR; - } - } - - /* Return to application */ - return (status); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixInv group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c deleted file mode 100644 index 1795552..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c +++ /dev/null @@ -1,644 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_inverse_f64.c - * Description: Floating-point matrix inverse - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixInv - @{ - */ - -/** - @brief Floating-point (64 bit) matrix inverse. - @param[in] pSrc points to input matrix structure. The source matrix is modified by the function. - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - \ref ARM_MATH_SINGULAR : Input matrix is found to be singular (non-invertible) - */ - -arm_status arm_mat_inverse_f64( - const arm_matrix_instance_f64 * pSrc, - arm_matrix_instance_f64 * pDst) -{ - float64_t *pIn = pSrc->pData; /* input data matrix pointer */ - float64_t *pOut = pDst->pData; /* output data matrix pointer */ - float64_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ - float64_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */ - float64_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data matrix pointer */ - uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ - uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ - -#if defined (ARM_MATH_DSP) - - float64_t Xchg, in = 0.0, in1; /* Temporary input values */ - uint32_t i, rowCnt, flag = 0U, j, loopCnt, k,l; /* loop counters */ - arm_status status; /* status of matrix inverse */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - /*-------------------------------------------------------------------------------------------------------------- - * Matrix Inverse can be solved using elementary row operations. - * - * Gauss-Jordan Method: - * - * 1. First combine the identity matrix and the input matrix separated by a bar to form an - * augmented matrix as follows: - * _ _ _ _ - * | a11 a12 | 1 0 | | X11 X12 | - * | | | = | | - * |_ a21 a22 | 0 1 _| |_ X21 X21 _| - * - * 2. In our implementation, pDst Matrix is used as identity matrix. - * - * 3. Begin with the first row. Let i = 1. - * - * 4. Check to see if the pivot for row i is zero. - * The pivot is the element of the main diagonal that is on the current row. - * For instance, if working with row i, then the pivot element is aii. - * If the pivot is zero, exchange that row with a row below it that does not - * contain a zero in column i. If this is not possible, then an inverse - * to that matrix does not exist. - * - * 5. Divide every element of row i by the pivot. - * - * 6. For every row below and row i, replace that row with the sum of that row and - * a multiple of row i so that each new element in column i below row i is zero. - * - * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros - * for every element below and above the main diagonal. - * - * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc). - * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst). - *----------------------------------------------------------------------------------------------------------------*/ - - /* Working pointer for destination matrix */ - pOutT1 = pOut; - - /* Loop over the number of rows */ - rowCnt = numRows; - - /* Making the destination matrix as identity matrix */ - while (rowCnt > 0U) - { - /* Writing all zeroes in lower triangle of the destination matrix */ - j = numRows - rowCnt; - while (j > 0U) - { - *pOutT1++ = 0.0; - j--; - } - - /* Writing all ones in the diagonal of the destination matrix */ - *pOutT1++ = 1.0; - - /* Writing all zeroes in upper triangle of the destination matrix */ - j = rowCnt - 1U; - while (j > 0U) - { - *pOutT1++ = 0.0; - j--; - } - - /* Decrement loop counter */ - rowCnt--; - } - - /* Loop over the number of columns of the input matrix. - All the elements in each column are processed by the row operations */ - loopCnt = numCols; - - /* Index modifier to navigate through the columns */ - l = 0U; - - while (loopCnt > 0U) - { - /* Check if the pivot element is zero.. - * If it is zero then interchange the row with non zero row below. - * If there is no non zero element to replace in the rows below, - * then the matrix is Singular. */ - - /* Working pointer for the input matrix that points - * to the pivot element of the particular row */ - pInT1 = pIn + (l * numCols); - - /* Working pointer for the destination matrix that points - * to the pivot element of the particular row */ - pOutT1 = pOut + (l * numCols); - - /* Temporary variable to hold the pivot value */ - in = *pInT1; - - - - /* Check if the pivot element is zero */ - if (*pInT1 == 0.0) - { - /* Loop over the number rows present below */ - - for (i = 1U; i < numRows - l; i++) - { - /* Update the input and destination pointers */ - pInT2 = pInT1 + (numCols * i); - pOutT2 = pOutT1 + (numCols * i); - - /* Check if there is a non zero pivot element to - * replace in the rows below */ - if (*pInT2 != 0.0) - { - /* Loop over number of columns - * to the right of the pilot element */ - j = numCols - l; - - while (j > 0U) - { - /* Exchange the row elements of the input matrix */ - Xchg = *pInT2; - *pInT2++ = *pInT1; - *pInT1++ = Xchg; - - /* Decrement the loop counter */ - j--; - } - - /* Loop over number of columns of the destination matrix */ - j = numCols; - - while (j > 0U) - { - /* Exchange the row elements of the destination matrix */ - Xchg = *pOutT2; - *pOutT2++ = *pOutT1; - *pOutT1++ = Xchg; - - /* Decrement loop counter */ - j--; - } - - /* Flag to indicate whether exchange is done or not */ - flag = 1U; - - /* Break after exchange is done */ - break; - } - - - /* Decrement loop counter */ - } - } - - /* Update the status if the matrix is singular */ - if ((flag != 1U) && (in == 0.0)) - { - return ARM_MATH_SINGULAR; - } - - /* Points to the pivot row of input and destination matrices */ - pPivotRowIn = pIn + (l * numCols); - pPivotRowDst = pOut + (l * numCols); - - /* Temporary pointers to the pivot row pointers */ - pInT1 = pPivotRowIn; - pInT2 = pPivotRowDst; - - /* Pivot element of the row */ - in = *pPivotRowIn; - - /* Loop over number of columns - * to the right of the pilot element */ - j = (numCols - l); - - while (j > 0U) - { - /* Divide each element of the row of the input matrix - * by the pivot element */ - in1 = *pInT1; - *pInT1++ = in1 / in; - - /* Decrement the loop counter */ - j--; - } - - /* Loop over number of columns of the destination matrix */ - j = numCols; - - while (j > 0U) - { - /* Divide each element of the row of the destination matrix - * by the pivot element */ - in1 = *pInT2; - *pInT2++ = in1 / in; - - /* Decrement the loop counter */ - j--; - } - - /* Replace the rows with the sum of that row and a multiple of row i - * so that each new element in column i above row i is zero.*/ - - /* Temporary pointers for input and destination matrices */ - pInT1 = pIn; - pInT2 = pOut; - - /* index used to check for pivot element */ - i = 0U; - - /* Loop over number of rows */ - /* to be replaced by the sum of that row and a multiple of row i */ - k = numRows; - - while (k > 0U) - { - /* Check for the pivot element */ - if (i == l) - { - /* If the processing element is the pivot element, - only the columns to the right are to be processed */ - pInT1 += numCols - l; - - pInT2 += numCols; - } - else - { - /* Element of the reference row */ - in = *pInT1; - - /* Working pointers for input and destination pivot rows */ - pPRT_in = pPivotRowIn; - pPRT_pDst = pPivotRowDst; - - /* Loop over the number of columns to the right of the pivot element, - to replace the elements in the input matrix */ - j = (numCols - l); - - while (j > 0U) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - in1 = *pInT1; - *pInT1++ = in1 - (in * *pPRT_in++); - - /* Decrement the loop counter */ - j--; - } - - /* Loop over the number of columns to - replace the elements in the destination matrix */ - j = numCols; - - while (j > 0U) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - in1 = *pInT2; - *pInT2++ = in1 - (in * *pPRT_pDst++); - - /* Decrement loop counter */ - j--; - } - - } - - /* Increment temporary input pointer */ - pInT1 = pInT1 + l; - - /* Decrement loop counter */ - k--; - - /* Increment pivot index */ - i++; - } - - /* Increment the input pointer */ - pIn++; - - /* Decrement the loop counter */ - loopCnt--; - - /* Increment the index modifier */ - l++; - } - - -#else - - float64_t Xchg, in = 0.0; /* Temporary input values */ - uint32_t i, rowCnt, flag = 0U, j, loopCnt, l; /* loop counters */ - arm_status status; /* status of matrix inverse */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pDst->numRows != pDst->numCols) || - (pSrc->numRows != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - /*-------------------------------------------------------------------------------------------------------------- - * Matrix Inverse can be solved using elementary row operations. - * - * Gauss-Jordan Method: - * - * 1. First combine the identity matrix and the input matrix separated by a bar to form an - * augmented matrix as follows: - * _ _ _ _ _ _ _ _ - * | | a11 a12 | | | 1 0 | | | X11 X12 | - * | | | | | | | = | | - * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _| - * - * 2. In our implementation, pDst Matrix is used as identity matrix. - * - * 3. Begin with the first row. Let i = 1. - * - * 4. Check to see if the pivot for row i is zero. - * The pivot is the element of the main diagonal that is on the current row. - * For instance, if working with row i, then the pivot element is aii. - * If the pivot is zero, exchange that row with a row below it that does not - * contain a zero in column i. If this is not possible, then an inverse - * to that matrix does not exist. - * - * 5. Divide every element of row i by the pivot. - * - * 6. For every row below and row i, replace that row with the sum of that row and - * a multiple of row i so that each new element in column i below row i is zero. - * - * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros - * for every element below and above the main diagonal. - * - * 8. Now an identical matrix is formed to the left of the bar(input matrix, src). - * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst). - *----------------------------------------------------------------------------------------------------------------*/ - - /* Working pointer for destination matrix */ - pOutT1 = pOut; - - /* Loop over the number of rows */ - rowCnt = numRows; - - /* Making the destination matrix as identity matrix */ - while (rowCnt > 0U) - { - /* Writing all zeroes in lower triangle of the destination matrix */ - j = numRows - rowCnt; - while (j > 0U) - { - *pOutT1++ = 0.0; - j--; - } - - /* Writing all ones in the diagonal of the destination matrix */ - *pOutT1++ = 1.0; - - /* Writing all zeroes in upper triangle of the destination matrix */ - j = rowCnt - 1U; - while (j > 0U) - { - *pOutT1++ = 0.0; - j--; - } - - /* Decrement loop counter */ - rowCnt--; - } - - /* Loop over the number of columns of the input matrix. - All the elements in each column are processed by the row operations */ - loopCnt = numCols; - - /* Index modifier to navigate through the columns */ - l = 0U; - - while (loopCnt > 0U) - { - /* Check if the pivot element is zero.. - * If it is zero then interchange the row with non zero row below. - * If there is no non zero element to replace in the rows below, - * then the matrix is Singular. */ - - /* Working pointer for the input matrix that points - * to the pivot element of the particular row */ - pInT1 = pIn + (l * numCols); - - /* Working pointer for the destination matrix that points - * to the pivot element of the particular row */ - pOutT1 = pOut + (l * numCols); - - /* Temporary variable to hold the pivot value */ - in = *pInT1; - - /* Check if the pivot element is zero */ - if (*pInT1 == 0.0) - { - /* Loop over the number rows present below */ - for (i = 1U; i < numRows-l; i++) - { - /* Update the input and destination pointers */ - pInT2 = pInT1 + (numCols * i); - pOutT2 = pOutT1 + (numCols * i); - - /* Check if there is a non zero pivot element to - * replace in the rows below */ - if (*pInT2 != 0.0) - { - /* Loop over number of columns - * to the right of the pilot element */ - for (j = 0U; j < (numCols - l); j++) - { - /* Exchange the row elements of the input matrix */ - Xchg = *pInT2; - *pInT2++ = *pInT1; - *pInT1++ = Xchg; - } - - for (j = 0U; j < numCols; j++) - { - Xchg = *pOutT2; - *pOutT2++ = *pOutT1; - *pOutT1++ = Xchg; - } - - /* Flag to indicate whether exchange is done or not */ - flag = 1U; - - /* Break after exchange is done */ - break; - } - } - } - - - /* Update the status if the matrix is singular */ - if ((flag != 1U) && (in == 0.0)) - { - return ARM_MATH_SINGULAR; - } - - /* Points to the pivot row of input and destination matrices */ - pPivotRowIn = pIn + (l * numCols); - pPivotRowDst = pOut + (l * numCols); - - /* Temporary pointers to the pivot row pointers */ - pInT1 = pPivotRowIn; - pOutT1 = pPivotRowDst; - - /* Pivot element of the row */ - in = *(pIn + (l * numCols)); - - /* Loop over number of columns - * to the right of the pilot element */ - for (j = 0U; j < (numCols - l); j++) - { - /* Divide each element of the row of the input matrix - * by the pivot element */ - *pInT1 = *pInT1 / in; - pInT1++; - } - for (j = 0U; j < numCols; j++) - { - /* Divide each element of the row of the destination matrix - * by the pivot element */ - *pOutT1 = *pOutT1 / in; - pOutT1++; - } - - /* Replace the rows with the sum of that row and a multiple of row i - * so that each new element in column i above row i is zero.*/ - - /* Temporary pointers for input and destination matrices */ - pInT1 = pIn; - pOutT1 = pOut; - - for (i = 0U; i < numRows; i++) - { - /* Check for the pivot element */ - if (i == l) - { - /* If the processing element is the pivot element, - only the columns to the right are to be processed */ - pInT1 += numCols - l; - pOutT1 += numCols; - } - else - { - /* Element of the reference row */ - in = *pInT1; - - /* Working pointers for input and destination pivot rows */ - pPRT_in = pPivotRowIn; - pPRT_pDst = pPivotRowDst; - - /* Loop over the number of columns to the right of the pivot element, - to replace the elements in the input matrix */ - for (j = 0U; j < (numCols - l); j++) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - *pInT1 = *pInT1 - (in * *pPRT_in++); - pInT1++; - } - - /* Loop over the number of columns to - replace the elements in the destination matrix */ - for (j = 0U; j < numCols; j++) - { - /* Replace the element by the sum of that row - and a multiple of the reference row */ - *pOutT1 = *pOutT1 - (in * *pPRT_pDst++); - pOutT1++; - } - - } - - /* Increment temporary input pointer */ - pInT1 = pInT1 + l; - } - - /* Increment the input pointer */ - pIn++; - - /* Decrement the loop counter */ - loopCnt--; - - /* Increment the index modifier */ - l++; - } - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - if ((flag != 1U) && (in == 0.0)) - { - pIn = pSrc->pData; - for (i = 0; i < numRows * numCols; i++) - { - if (pIn[i] != 0.0) - break; - } - - if (i == numRows * numCols) - status = ARM_MATH_SINGULAR; - } - } - - /* Return to application */ - return (status); -} - -/** - @} end of MatrixInv group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f32.c deleted file mode 100644 index 0520fc7..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f32.c +++ /dev/null @@ -1,509 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_ldl_f32.c - * Description: Floating-point LDL decomposition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - - - - - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - - -/// @private -#define SWAP_ROWS_F32(A,i,j) \ - { \ - int cnt = n; \ - \ - for(int w=0;w < n; w+=4) \ - { \ - f32x4_t tmpa,tmpb; \ - mve_pred16_t p0 = vctp32q(cnt); \ - \ - tmpa=vldrwq_z_f32(&A[i*n + w],p0);\ - tmpb=vldrwq_z_f32(&A[j*n + w],p0);\ - \ - vstrwq_p(&A[i*n + w], tmpb, p0); \ - vstrwq_p(&A[j*n + w], tmpa, p0); \ - \ - cnt -= 4; \ - } \ - } - -/// @private -#define SWAP_COLS_F32(A,i,j) \ - for(int w=0;w < n; w++) \ - { \ - float32_t tmp; \ - tmp = A[w*n + i]; \ - A[w*n + i] = A[w*n + j];\ - A[w*n + j] = tmp; \ - } - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixChol - @{ - */ - -/** - * @brief Floating-point LDL^t decomposition of positive semi-definite matrix. - * @param[in] pSrc points to the instance of the input floating-point matrix structure. - * @param[out] pl points to the instance of the output floating-point triangular matrix structure. - * @param[out] pd points to the instance of the output floating-point diagonal matrix structure. - * @param[out] pp points to the instance of the output floating-point permutation vector. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - \ref ARM_MATH_DECOMPOSITION_FAILURE : Input matrix cannot be decomposed - * @par - * Computes the LDL^t decomposition of a matrix A such that P A P^t = L D L^t. - */ -arm_status arm_mat_ldlt_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pl, - arm_matrix_instance_f32 * pd, - uint16_t * pp) -{ - - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pl->numRows != pl->numCols) || - (pd->numRows != pd->numCols) || - (pl->numRows != pd->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - const int n=pSrc->numRows; - int fullRank = 1, diag,k; - float32_t *pA; - - memset(pd->pData,0,sizeof(float32_t)*n*n); - memcpy(pl->pData,pSrc->pData,n*n*sizeof(float32_t)); - pA = pl->pData; - - int cnt = n; - uint16x8_t vecP; - - for(int k=0;k < n; k+=8) - { - mve_pred16_t p0; - p0 = vctp16q(cnt); - - vecP = vidupq_u16((uint16_t)k, 1); - - vstrhq_p(&pp[k], vecP, p0); - - cnt -= 8; - } - - - for(k=0;k < n; k++) - { - /* Find pivot */ - float32_t m=F32_MIN,a; - int j=k; - - - for(int r=k;r m) - { - m = pA[r*n+r]; - j = r; - } - } - - if(j != k) - { - SWAP_ROWS_F32(pA,k,j); - SWAP_COLS_F32(pA,k,j); - } - - - pp[k] = j; - - a = pA[k*n+k]; - - if (fabsf(a) < 1.0e-8f) - { - - fullRank = 0; - break; - } - - float32_t invA; - - invA = 1.0f / a; - - int32x4_t vecOffs; - int w; - vecOffs = vidupq_u32((uint32_t)0, 1); - vecOffs = vmulq_n_s32(vecOffs,n); - - for(w=k+1; wpData[row*n+col], zero, p0); - - cnt -= 4; - } - } - } - - for(int row=0; row < n;row++) - { - mve_pred16_t p0; - int cnt= n-row-1; - f32x4_t zero=vdupq_n_f32(0.0f); - - for(int col=row+1; col < n;col+=4) - { - p0 = vctp32q(cnt); - - vstrwq_p(&pl->pData[row*n+col], zero, p0); - - cnt -= 4; - } - } - - for(int d=0; d < diag;d++) - { - pd->pData[d*n+d] = pl->pData[d*n+d]; - pl->pData[d*n+d] = 1.0; - } - - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} -#else - -/// @private -#define SWAP_ROWS_F32(A,i,j) \ - for(w=0;w < n; w++) \ - { \ - float32_t tmp; \ - tmp = A[i*n + w]; \ - A[i*n + w] = A[j*n + w];\ - A[j*n + w] = tmp; \ - } - -/// @private -#define SWAP_COLS_F32(A,i,j) \ - for(w=0;w < n; w++) \ - { \ - float32_t tmp; \ - tmp = A[w*n + i]; \ - A[w*n + i] = A[w*n + j];\ - A[w*n + j] = tmp; \ - } - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixChol - @{ - */ - -/** - * @brief Floating-point LDL^t decomposition of positive semi-definite matrix. - * @param[in] pSrc points to the instance of the input floating-point matrix structure. - * @param[out] pl points to the instance of the output floating-point triangular matrix structure. - * @param[out] pd points to the instance of the output floating-point diagonal matrix structure. - * @param[out] pp points to the instance of the output floating-point permutation vector. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - \ref ARM_MATH_DECOMPOSITION_FAILURE : Input matrix cannot be decomposed - * @par - * Computes the LDL^t decomposition of a matrix A such that P A P^t = L D L^t. - */ -arm_status arm_mat_ldlt_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pl, - arm_matrix_instance_f32 * pd, - uint16_t * pp) -{ - - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pl->numRows != pl->numCols) || - (pd->numRows != pd->numCols) || - (pl->numRows != pd->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - const int n=pSrc->numRows; - int fullRank = 1, diag,k; - float32_t *pA; - int row,d; - - memset(pd->pData,0,sizeof(float32_t)*n*n); - memcpy(pl->pData,pSrc->pData,n*n*sizeof(float32_t)); - pA = pl->pData; - - for(k=0;k < n; k++) - { - pp[k] = k; - } - - - for(k=0;k < n; k++) - { - /* Find pivot */ - float32_t m=F32_MIN,a; - int j=k; - - - int r; - int w; - - for(r=k;r m) - { - m = pA[r*n+r]; - j = r; - } - } - - if(j != k) - { - SWAP_ROWS_F32(pA,k,j); - SWAP_COLS_F32(pA,k,j); - } - - - pp[k] = j; - - a = pA[k*n+k]; - - if (fabsf(a) < 1.0e-8f) - { - - fullRank = 0; - break; - } - - for(w=k+1;wpData[row*n+col]=0.0; - } - } - } - - for(row=0; row < n;row++) - { - int col; - for(col=row+1; col < n;col++) - { - pl->pData[row*n+col] = 0.0; - } - } - - for(d=0; d < diag;d++) - { - pd->pData[d*n+d] = pl->pData[d*n+d]; - pl->pData[d*n+d] = 1.0; - } - - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixChol group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f64.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f64.c deleted file mode 100644 index f038764..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f64.c +++ /dev/null @@ -1,229 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_ldl_f64.c - * Description: Floating-point LDL decomposition - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" -#include - - - -/// @private -#define SWAP_ROWS_F64(A,i,j) \ -{ \ - int w; \ - for(w=0;w < n; w++) \ - { \ - float64_t tmp; \ - tmp = A[i*n + w]; \ - A[i*n + w] = A[j*n + w];\ - A[j*n + w] = tmp; \ - } \ -} - -/// @private -#define SWAP_COLS_F64(A,i,j) \ -{ \ - int w; \ - for(w=0;w < n; w++) \ - { \ - float64_t tmp; \ - tmp = A[w*n + i]; \ - A[w*n + i] = A[w*n + j];\ - A[w*n + j] = tmp; \ - } \ -} - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixChol - @{ - */ - -/** - * @brief Floating-point LDL^t decomposition of positive semi-definite matrix. - * @param[in] pSrc points to the instance of the input floating-point matrix structure. - * @param[out] pl points to the instance of the output floating-point triangular matrix structure. - * @param[out] pd points to the instance of the output floating-point diagonal matrix structure. - * @param[out] pp points to the instance of the output floating-point permutation vector. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - \ref ARM_MATH_DECOMPOSITION_FAILURE : Input matrix cannot be decomposed - * @par - * Computes the LDL^t decomposition of a matrix A such that P A P^t = L D L^t. - */ - -arm_status arm_mat_ldlt_f64( - const arm_matrix_instance_f64 * pSrc, - arm_matrix_instance_f64 * pl, - arm_matrix_instance_f64 * pd, - uint16_t * pp) -{ - - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pSrc->numCols) || - (pl->numRows != pl->numCols) || - (pd->numRows != pd->numCols) || - (pl->numRows != pd->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - const int n=pSrc->numRows; - int fullRank = 1, diag,k; - float64_t *pA; - - memset(pd->pData,0,sizeof(float64_t)*n*n); - - memcpy(pl->pData,pSrc->pData,n*n*sizeof(float64_t)); - pA = pl->pData; - - for(k=0;k < n; k++) - { - pp[k] = k; - } - - - for(k=0;k < n; k++) - { - /* Find pivot */ - float64_t m=F64_MIN,a; - int w,r,j=k; - - - for(r=k;r m) - { - m = pA[r*n+r]; - j = r; - } - } - - if(j != k) - { - SWAP_ROWS_F64(pA,k,j); - SWAP_COLS_F64(pA,k,j); - } - - - pp[k] = j; - - a = pA[k*n+k]; - - if (fabs(a) < 1.0e-18) - { - - fullRank = 0; - break; - } - - for(w=k+1;wpData[row*n+col]=0.0; - } - } - } - } - - { - int row; - for(row=0; row < n;row++) - { - int col; - for(col=row+1; col < n;col++) - { - pl->pData[row*n+col] = 0.0; - } - } - } - - { - int d; - for(d=0; d < diag;d++) - { - pd->pData[d*n+d] = pl->pData[d*n+d]; - pl->pData[d*n+d] = 1.0; - } - } - - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - -/** - @} end of MatrixChol group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f16.c deleted file mode 100644 index 4135a33..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f16.c +++ /dev/null @@ -1,763 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_mult_f16.c - * Description: Floating-point matrix multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - * @ingroup groupMatrix - */ - - -/** - * @addtogroup MatrixMult - * @{ - */ - -/** - * @brief Floating-point matrix multiplication. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -__STATIC_FORCEINLINE arm_status arm_mat_mult_f16_2x2_mve( - const arm_matrix_instance_f16 *pSrcA, - const arm_matrix_instance_f16 *pSrcB, - arm_matrix_instance_f16 *pDst) -{ - static const uint16_t offsetA[8] = { 0, 0, 2, 2, 0, 0, 2, 2 }; - /* offsetB allows to read and duplicate 1 row of B */ - static const uint16_t offsetB[8] = { 0, 1, 0, 1, 0, 1, 0, 1 }; - uint16x8_t vecOffsA, vecOffsB; - f16x8_t vecInA, vecInB, vecDst; - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - - /* - * load initial offsets - */ - vecOffsA = vldrhq_u16((uint16_t const *) offsetA); - vecOffsB = vldrhq_u16((uint16_t const *) offsetB); - /* - * load {a00 a00 a10 a10 x x x x } - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * load {b00 b01 b00 b01 x x x x } - */ - vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB); - /* - * { a00 b00 a00 b01 - * a10 b00 a10 b01 - * x x - * x x } - */ - vecDst = vmulq(vecInA, vecInB); - /* - * move to 2nd column of matrix A - */ - vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 1); - /* - * load {a01 a01 a11 a11 x x x x} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * move to next B row - */ - vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 2); - /* - * load {b10, b11, b10, b11, x x x x } - */ - vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB); - /* - * { a00 b00 + a01 b10 a00 b01 + a01 b11 - * a10 b00 + a11 b10 a10 b01 + a11 b11 - * x x - * x x } - */ - vecDst = vfmaq(vecDst, vecInA, vecInB); - - mve_pred16_t p0 = vctp16q(2*2); - /* - * Store the result in the destination buffer - * (lower half of the vector) - */ - vstrhq_p(pOut, vecDst, p0); - - return (ARM_MATH_SUCCESS); -} - - - - -__STATIC_FORCEINLINE arm_status arm_mat_mult_f16_3x3_mve( - const arm_matrix_instance_f16 *pSrcA, - const arm_matrix_instance_f16 *pSrcB, - arm_matrix_instance_f16 *pDst) -{ - static const uint16_t offsetA[8] = { 0, 0, 0, 3, 3, 3, 6, 6 }; - /* offsetB allows to read and duplicate 1 row of B */ - static const uint16_t offsetB[8] = { 0, 1, 2, 0, 1, 2, 0, 1 }; - uint16x8_t vecOffsA, vecOffsB; - f16x8_t vecInA, vecInB, vecDst; - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - - /* - * load initial offsets - */ - vecOffsA = vldrhq_u16((uint16_t const *) offsetA); - vecOffsB = vldrhq_u16((uint16_t const *) offsetB); - - /* - * load {a00 a00 a00 a10 a10 a10 a20 a20} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * load {b00 b01 b02 b00 b01 b02 b00 b01} - */ - vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB); - /* - * { a00 b00 a00 b01 a00 b02 - * a10 b00 a10 b01 a10 b02 - * a20 b00 a20 b01} - */ - vecDst = vmulq(vecInA, vecInB); - - /* - * move to 2nd column of matrix A - */ - vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 1); - /* - * load {a01 a01 a01 a11 a11 a11 a21 a21} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * move to next B row - */ - vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 3); - /* - * load {b10, b11, b12, b10, b11, b12, b10, b11} - */ - vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB); - /* - * { a00 b00 + a01 b10 a00 b01 + a01 b11 a00 b02 + a01 b12 - * a10 b00 + a11 b10 a10 b01 + a11 b11 a10 b02 + a11 b12 - * a20 b00 + a21 b10 a20 b01 + a21 b11 } - */ - vecDst = vfmaq(vecDst, vecInA, vecInB); - /* - * move to 3rd column of matrix A - */ - vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 1); - /* - * load {a02 a02 a02 a12 a12 a12 a22 a22} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * move to next B row - */ - vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 3); - /* - * load {b20, b21, b22, b20, b21, b22, b20, b21} - */ - vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB); - /* - * {a00 b00 + a01 b10 + a02 b20 a00 b01 + a01 b11 + a02 b21 a00 b02 + a01 b12 + a02 b22}, - * a10 b00 + a11 b10 + a12 b20 a10 b01 + a11 b11 + a12 b21 a10 b02 + a11 b12 + a12 b22}, - * a20 b00 + a21 b10 + a22 b20 a20 b01 + a21 b11 + a22 b21 } - */ - vecDst = vfmaq(vecDst, vecInA, vecInB); - - /* - * Store the result in the destination buffer - */ - vst1q(pOut, vecDst); pOut += 8; - - /* last element computed in scalar mode - * a20 b02 + a21 b12 + a22 b22 - */ - _Float16 * pA = (_Float16 *)pSrcA->pData; - _Float16 * pB = (_Float16 *)pSrcB->pData; - *pOut = pA[2*3] * pB[2] + pA[2*3+1] * pB[3+2] + pA[2*3+2] * pB[2*3+2]; - - return (ARM_MATH_SUCCESS); -} - - - - - -__STATIC_FORCEINLINE arm_status arm_mat_mult_f16_4x4_mve( - const arm_matrix_instance_f16 *pSrcA, - const arm_matrix_instance_f16 *pSrcB, - arm_matrix_instance_f16 *pDst) -{ - /* offsetA allows to read and duplicate 2 successive column elements of A */ - static const uint16_t offsetA[8] = { 0, 0, 0, 0, 4, 4, 4, 4 }; - /* offsetB allows to read and duplicate 1 row of B */ - static const uint16_t offsetB[8] = { 0, 1, 2, 3, 0, 1, 2, 3 }; - uint16x8_t vecOffsA, vecOffsB; - f16x8_t vecInA, vecInB, vecDst0, vecDst1; - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - - /* - * load initial offsets - */ - vecOffsA = vldrhq_u16((uint16_t const *) offsetA); - vecOffsB = vldrhq_u16((uint16_t const *) offsetB); - - /* - * load {a00 a00 a00 a00 a10 a10 a10 a10} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * load {b00 b01 b02 b03 b00 b01 b02 b03} - */ - vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB); - /* - * { a00 b00 a00 b01 a00 b02 a00 b03 - * a10 b00 a10 b01 a10 b02 a10 b03 } - */ - vecDst0 = vmulq(vecInA, vecInB); - /* - * jump 2 x A rows (2nd half of matrix) - */ - vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 8); - /* - * load {a20 a20 a20 a20 a30 a30 a30 a30} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * { a20 b00 a20 b01 a20 b02 a20 b03 - * a30 b00 a30 b01 a30 b02 + a31 b12 } - */ - vecDst1 = vmulq(vecInA, vecInB); - /* - * rewind back to top half of the A matrix (2nd column) - */ - vecOffsA = vsubq(vecOffsA, (uint16_t) 7); - /* - * load {a01 a01 a01 a01 a11 a11 a11 a11} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * move to next B row - */ - vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 4); - /* - * load {b10, b11, b12, b13, b10, b11, b12, b13} - */ - vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB); - /* - * { a00 b00 + a01 b10 a00 b01 + a01 b11 a00 b02 + a01 b12 a00 b03 + a01 b13 - * a10 b00 + a11 b10 a10 b01 + a11 b11 a10 b02 + a11 b12 a10 b03 + a11 b13 } - */ - vecDst0 = vfmaq(vecDst0, vecInA, vecInB); - /* - * jump 2 x A rows (2nd half of matrix) - */ - vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 8); - /* - * load {a21 a21 a21 a21 a31 a31 a31 a31} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * {a20 b00 + a21 b10 a20 b01 + a21 b11 a20 b02 + a21 b12 a20 b03 + a21 b13 - * a30 b00 + a31 b10 a30 b01 + a31 b11 a30 b02 + a31 b12 a30 b03 + a31 b13 } - */ - vecDst1 = vfmaq(vecDst1, vecInA, vecInB); - - /* - * rewind back to top half of the A matrix (3rd column) - */ - vecOffsA = vsubq(vecOffsA, (uint16_t) 7); - /* - * load {a02 a02 a02 a02 a12 a12 a12 a12} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * move to next B row - */ - vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 4); - /* - * load {b20, b21, b22, b23, b20, b21, b22, b23} - */ - vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB); - /* - * { a00 b00 + a01 b10 + a02 b20 a00 b01 + a01 b11 + a02 b21 a00 b02 + a01 b12 + a02 b22 a00 b03 + a01 b13 + a02 b23 - * a10 b00 + a11 b10 + a12 b20 a10 b01 + a11 b11 + a12 b21 a10 b02 + a11 b12 + a12 b22 a10 b03 + a11 b13 + a12 b23 } - */ - vecDst0 = vfmaq(vecDst0, vecInA, vecInB); - /* - * jump 2 x A rows - */ - vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 8); - - /* - * load {a22 a22 a22 a22 a32 a32 a32 a32} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * {a20 b00 + a21 b10 + a22 b20 a20 b01 + a21 b11 + a22 b21 a20 b02 + a21 b12 + a22 b22 a20 b03 + a21 b13 + a22 b23 - * a30 b00 + a31 b10 + a32 b20 a30 b01 + a31 b11 + a32 b21 a30 b02 + a31 b12 + a32 b22 a30 b03 + a31 b13 + a32 b23 } - */ - vecDst1 = vfmaq(vecDst1, vecInA, vecInB); - - /* - * rewind back to top half of the A matrix (4th column) - */ - vecOffsA = vsubq(vecOffsA, (uint16_t) 7); - /* - * load {a03 a03 a03 a03 a13 a13 a13 a13} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * move to next B row - */ - vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 4); - /* - * load {b30, b31, b32, b33, b30, b31, b32, b33} - */ - vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB); - /* - * { a00 b00 +...+ a03 b30, a00 b01 +...+ a03 b31, a00 b02 +...+ a03 b32, a00 b03 +...+ a03 b33 - * a10 b00 +...+ a13 b30, a10 b01 +...+ a13 b31, a10 b02 +...+ a13 b32, a10 b03 +...+ a13 b33 } - */ - vecDst0 = vfmaq(vecDst0, vecInA, vecInB); - /* - * jump 2 x A rows - */ - vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 8); - /* - * load {a23 a23 a23 a23 a33 a33 a33 a33} - */ - vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA); - /* - * {a20 b00 +...+ a23 b30, a20 b01 +...+ a23 b31, a20 b02 +...+ a23 b32, a20 b03 +...+ a23 b33 - * a30 b00 +...+ a33 b30, a30 b01 +...+ a33 b31, a30 b02 +...+ a33 b32, a30 b03 +...+ a33 b33 } - */ - vecDst1 = vfmaq(vecDst1, vecInA, vecInB); - - /* - * Store the result in the destination buffer - */ - vst1q(pOut, vecDst0); pOut += 8; - vst1q(pOut, vecDst1); - - return (ARM_MATH_SUCCESS); -} - - -arm_status arm_mat_mult_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ - float16_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - float16_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - int numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - int numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - int numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint32_t blkCnt; /* loop counters */ - int i; - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - return(ARM_MATH_SIZE_MISMATCH); - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ -{ - /* small squared matrix specialized routines */ - if(numRowsA == numColsB && numColsB == numColsA) { - if(numRowsA == 2) - return arm_mat_mult_f16_2x2_mve(pSrcA, pSrcB, pDst); - else if(numRowsA == 3) - return arm_mat_mult_f16_3x3_mve(pSrcA, pSrcB, pDst); - else if(numRowsA == 4) - return arm_mat_mult_f16_4x4_mve(pSrcA, pSrcB, pDst); - } - - /* main loop process 4 rows */ - i = numRowsA / 4; - while(i > 0) - { - float16_t *pInA0, *pInA1, *pInA2, *pInA3; - float16_t *pInB0; - float16_t *pOut0, *pOut1, *pOut2, *pOut3; - f16x8_t vecMac0, vecMac1, vecMac2, vecMac3; - f16x8_t vecInB; - - /* pointers to 4 consecutive output rows */ - pOut0 = pOut; - pOut1 = pOut0 + numColsB; - pOut2 = pOut1 + numColsB; - pOut3 = pOut2 + numColsB; - pInB0 = pInB; - - int k = numColsB >> 3; - while(k > 0) - { - /* pointers to 4 consecutive Matrix A rows */ - pInA0 = pInA; - pInA1 = pInA0 + numColsA; - pInA2 = pInA1 + numColsA; - pInA3 = pInA2 + numColsA; - - vecMac0 = vdupq_n_f16(0.0f16); - vecMac1 = vdupq_n_f16(0.0f16); - vecMac2 = vdupq_n_f16(0.0f16); - vecMac3 = vdupq_n_f16(0.0f16); - - blkCnt = numColsA; - - while (blkCnt > 0U) - { - /* - * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3..., bi,4n+7} - */ - vecInB = *(f16x8_t *)pInB0; /* vldrhq_f16(pInB0, 0); */ - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); - vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); - vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); - - pInB0 = pInB0 + numColsB; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* Store the results (4 x 8 block) in the destination buffer */ - vst1q(pOut0, vecMac0); pOut0 += 8; - vst1q(pOut1, vecMac1); pOut1 += 8; - vst1q(pOut2, vecMac2); pOut2 += 8; - vst1q(pOut3, vecMac3); pOut3 += 8; - /* - * rewind - */ - pInB0 -= (numColsB * numColsA) - 8; - k--; - } - - int colBLeft = numColsB & 7; - if (colBLeft) - { - pInA0 = pInA; - pInA1 = pInA0 + numColsA; - pInA2 = pInA1 + numColsA; - pInA3 = pInA2 + numColsA; - mve_pred16_t p0 = vctp16q(colBLeft); - - vecMac0 = vdupq_n_f16(0.0f16); - vecMac1 = vdupq_n_f16(0.0f16); - vecMac2 = vdupq_n_f16(0.0f16); - vecMac3 = vdupq_n_f16(0.0f16); - - blkCnt = numColsA; - - while (blkCnt > 0U) - { - /* - * load {bi,4n+0, bi,4n+1, bi,4n+2, ..bi,4n+colBLeft-1, 0, ..} - */ - vecInB = vldrhq_z_f16(pInB0, p0); - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); - vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); - vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); - - pInB0 = pInB0 + numColsB; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* Store the results (4 x colBLeft block) in the destination buffer */ - vstrhq_p_f16(pOut0, vecMac0, p0); - vstrhq_p_f16(pOut1, vecMac1, p0); - vstrhq_p_f16(pOut2, vecMac2, p0); - vstrhq_p_f16(pOut3, vecMac3, p0); - } - - pInA += 4 * numColsA; - pOut += 4 * numColsB; - i--; - } - - /* - * non multiple of 4 rows for Matrix A - * process single row - */ - if (numRowsA & 3) - { - i = numRowsA & 3; - do - { - float16_t *pInA0; - float16_t *pInB0; - float16_t *pOut0; - f16x8_t vecInB; - f16x8_t vecMac0; - - pOut0 = pOut; - pInB0 = pInB; - - int k = numColsB >> 3; - while(k > 0) - { - pInA0 = pInA; - - vecMac0 = vdupq_n_f16(0.0f16); - blkCnt = numColsA; - - while (blkCnt > 0U) - { - /* - * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3, ...bi,4n+7} - */ - vecInB = *(f16x8_t *)pInB0; /* vldrhq_f16(pInB0, 0); */ - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - - pInB0 = pInB0 + numColsB; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* Store the results (1 x 8 block) in the destination buffer */ - vst1q(pOut0, vecMac0); pOut0 += 8; - /* - * rewind - */ - pInB0 -= (numColsB * numColsA) - 8; - k--; - } - - int colBLeft = numColsB & 7; - if (colBLeft) - { - pInA0 = pInA; - mve_pred16_t p0 = vctp16q(colBLeft); - - vecMac0 = vdupq_n_f16(0.0f16); - blkCnt = numColsA; - - while (blkCnt > 0U) - { - /* - * load {bi,4n+0, bi,4n+1, bi,4n+2, ..., bi,4n+colBLeft, 0, ...} - */ - vecInB = vldrhq_z_f16(pInB0, p0); - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - - pInB0 = pInB0 + numColsB; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* Store the results (1 x colBLeft block) in the destination buffer */ - vstrhq_p_f16(pOut0, vecMac0, p0); - } - - pInA += 1 * numColsA; - pOut += 1 * numColsB; - } - while (--i); - } - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); - } -} -#else - - -arm_status arm_mat_mult_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ - float16_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ - float16_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ - float16_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ - float16_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ - float16_t *pOut = pDst->pData; /* Output data matrix pointer */ - float16_t *px; /* Temporary output data matrix pointer */ - _Float16 sum; /* Accumulator */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */ - arm_status status; /* Status of matrix multiplication */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of row being processed */ - px = pOut + i; - - /* For every row wise process, column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ - pIn2 = pSrcB->pData; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0.0f16; - - /* Initialize pointer pIn1 to point to starting address of column being processed */ - pIn1 = pInA; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 MACs at a time. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* Perform the multiply-accumulates */ - sum += (_Float16)*pIn1++ * (_Float16)*pIn2; - pIn2 += numColsB; - - sum += (_Float16)*pIn1++ * (_Float16)*pIn2; - pIn2 += numColsB; - - sum += (_Float16)*pIn1++ * (_Float16)*pIn2; - pIn2 += numColsB; - - sum += (_Float16)*pIn1++ * (_Float16)*pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Loop unrolling: Compute remaining MACs */ - colCnt = numColsA % 0x4U; - -#else - - /* Initialize cntCnt with number of columns */ - colCnt = numColsA; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* Perform the multiply-accumulates */ - sum += (_Float16)*pIn1++ * (_Float16)*pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Store result in destination buffer */ - *px++ = sum; - - /* Decrement column loop counter */ - col--; - - /* Update pointer pIn2 to point to starting address of next column */ - pIn2 = pInB + (numColsB - col); - - } while (col > 0U); - - /* Update pointer pInA to point to starting address of next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of MatrixMult group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c deleted file mode 100644 index 49343e4..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c +++ /dev/null @@ -1,1001 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_mult_f32.c - * Description: Floating-point matrix multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -#if defined(ARM_MATH_NEON) -#define GROUPOFROWS 8 -#endif - -/** - * @ingroup groupMatrix - */ - -/** - * @defgroup MatrixMult Matrix Multiplication - * - * Multiplies two matrices. - * - * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices" - - * Matrix multiplication is only defined if the number of columns of the - * first matrix equals the number of rows of the second matrix. - * Multiplying an M x N matrix with an N x P matrix results - * in an M x P matrix. - * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of - * pSrcA and pSrcB are equal; and (2) that the size of the output - * matrix equals the outer dimensions of pSrcA and pSrcB. - */ - - -/** - * @addtogroup MatrixMult - * @{ - */ - - - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define MATRIX_DIM3 3 -#define MATRIX_DIM4 4 - -__STATIC_INLINE arm_status arm_mat_mult_f32_2x2_mve( - const arm_matrix_instance_f32 *pSrcA, - const arm_matrix_instance_f32 *pSrcB, - arm_matrix_instance_f32 *pDst) -{ - /* {a00, a00, a10, a10} */ - static const uint32_t offsetA0[4] = { 0, 0, 2, 2 }; - /* {b00, b01, b00, b01} */ - static const uint32_t offsetB0[4] = { 0, 1, 0, 1 }; - /* {a01, a01, a11, a11} */ - static const uint32_t offsetA1[4] = { 1, 1, 3, 3 }; - /* {b10, b11, b10, b11} */ - static const uint32_t offsetB1[4] = { 2, 3, 2, 3 }; - - uint32x4_t vecOffsA, vecOffsB; - f32x4_t vecInA, vecInB, vecDst; - - vecOffsA = vldrwq_u32((uint32_t const *) offsetA0); - vecOffsB = vldrwq_u32((uint32_t const *) offsetB0); - - vecInA = vldrwq_gather_shifted_offset((float32_t const *) pSrcA->pData, vecOffsA); - vecInB = vldrwq_gather_shifted_offset((float32_t const *) pSrcB->pData, vecOffsB); - - vecDst = vmulq(vecInA, vecInB); - - vecOffsA = vldrwq_u32((uint32_t const *) offsetA1); - vecOffsB = vldrwq_u32((uint32_t const *) offsetB1); - - vecInA = vldrwq_gather_shifted_offset((float32_t const *) pSrcA->pData, vecOffsA); - vecInB = vldrwq_gather_shifted_offset((float32_t const *) pSrcB->pData, vecOffsB); - - vecDst = vfmaq(vecDst, vecInA, vecInB); - - vstrwq_f32(pDst->pData, vecDst); - - return (ARM_MATH_SUCCESS); - -} - - -/* - * A = {{a00, a01, a02}, - * {a10, a11, a12}, - * {a20, a21, a22}} - * B = {{b00, b01, b02}, - * {b10, b11, b12}, - * {b20, b21, b22}} - * - * Dst = {{a00 b00 + a01 b10 + a02 b20, a00 b01 + a01 b11 + a02 b21, a00 b02 + a01 b12 + a02 b22}, - * {a10 b00 + a11 b10 + a12 b20, a10 b01 + a11 b11 + a12 b21, a10 b02 + a11 b12 + a12 b22}, - * {a20 b00 + a21 b10 + a22 b20, a20 b01 + a21 b11 + a22 b21, a20 b02 + a21 b12 + a22 b22}} - */ -__STATIC_INLINE arm_status arm_mat_mult_f32_3x3_mve( - const arm_matrix_instance_f32 *pSrcA, - const arm_matrix_instance_f32 *pSrcB, - arm_matrix_instance_f32 *pDst) -{ - float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *pInA0, *pInA1, *pInA2; - f32x4_t vecMac0, vecMac1, vecMac2; - f32x4_t vecInB; - float32_t const *pSrBVec; - - pSrBVec = (float32_t const *) pInB; - - pInA0 = pInA; - pInA1 = pInA0 + MATRIX_DIM3; - pInA2 = pInA1 + MATRIX_DIM3; - /* enable predication to disable last (4th) vector element */ - mve_pred16_t p0 = vctp32q(MATRIX_DIM3); - - /* - * load {b0,0, b0,1, b0,2, 0} - */ - vecInB = vldrwq_z_f32(pSrBVec, p0); - pSrBVec += MATRIX_DIM3; - - vecMac0 = vmulq(vecInB, *pInA0++); - vecMac1 = vmulq(vecInB, *pInA1++); - vecMac2 = vmulq(vecInB, *pInA2++); - /* - * load {b1,0, b1,1, b1,2, 0} - */ - vecInB = vldrwq_z_f32(pSrBVec, p0); - pSrBVec += MATRIX_DIM3; - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); - vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); - /* - * load {b2,0, b2,1 , b2,2, 0} - */ - vecInB = vldrwq_z_f32(pSrBVec, p0); - pSrBVec += MATRIX_DIM3; - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); - vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); - - /* partial vector stores */ - vstrwq_p_f32(pOut, vecMac0, p0); - pOut += MATRIX_DIM3; - vstrwq_p_f32(pOut, vecMac1, p0); - pOut += MATRIX_DIM3; - vstrwq_p_f32(pOut, vecMac2, p0); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - - - -__STATIC_INLINE arm_status arm_mat_mult_f32_4x4_mve( - const arm_matrix_instance_f32 *pSrcA, - const arm_matrix_instance_f32 *pSrcB, - arm_matrix_instance_f32 *pDst) -{ - float32_t const *pSrBVec; - float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *pInA0, *pInA1, *pInA2, *pInA3; - f32x4_t vecMac0, vecMac1, vecMac2, vecMac3; - f32x4_t vecInB; - - pSrBVec = (float32_t const *) pInB; - - pInA0 = pInA; - pInA1 = pInA0 + MATRIX_DIM4; - pInA2 = pInA1 + MATRIX_DIM4; - pInA3 = pInA2 + MATRIX_DIM4; - /* - * load {b0,0, b0,1, b0,2, b0,3} - */ - vecInB = vld1q(pSrBVec); - pSrBVec += MATRIX_DIM4; - - vecMac0 = vmulq(vecInB, *pInA0++); - vecMac1 = vmulq(vecInB, *pInA1++); - vecMac2 = vmulq(vecInB, *pInA2++); - vecMac3 = vmulq(vecInB, *pInA3++); - /* - * load {b1,0, b1,1, b1,2, b1,3} - */ - vecInB = vld1q(pSrBVec); - pSrBVec += MATRIX_DIM4; - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); - vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); - vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); - /* - * load {b2,0, b2,1, b2,2, b2,3} - */ - vecInB = vld1q(pSrBVec); - pSrBVec += MATRIX_DIM4; - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); - vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); - vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); - /* - * load {b3,0, b3,1, b3,2, b3,3} - */ - vecInB = vld1q(pSrBVec); - pSrBVec += MATRIX_DIM4; - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); - vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); - vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); - - vst1q(pOut, vecMac0); - pOut += MATRIX_DIM4; - vst1q(pOut, vecMac1); - pOut += MATRIX_DIM4; - vst1q(pOut, vecMac2); - pOut += MATRIX_DIM4; - vst1q(pOut, vecMac3); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - -/** - * @brief Floating-point matrix multiplication. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - int numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - int numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - int numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint32_t blkCnt; /* loop counters */ - uint32_t i; - arm_status status; - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - /* small squared matrix specialized routines */ - if(numRowsA == numColsB && numColsB == numColsA) { - if (numRowsA == 1) - { - pOut[0] = pInA[0] * pInB[0]; - return(ARM_MATH_SUCCESS); - } - else if(numRowsA == 2) - return arm_mat_mult_f32_2x2_mve(pSrcA, pSrcB, pDst); - else if(numRowsA == 3) - return arm_mat_mult_f32_3x3_mve(pSrcA, pSrcB, pDst); - else if(numRowsA == 4) - return arm_mat_mult_f32_4x4_mve(pSrcA, pSrcB, pDst); - } - - /* main loop process 4 rows */ - i = numRowsA >> 2; - while (i > 0U) - { - float32_t *pInA0, *pInA1, *pInA2, *pInA3; - float32_t *pInB0; - float32_t *pOut0, *pOut1, *pOut2, *pOut3; - f32x4_t vecMac0, vecMac1, vecMac2, vecMac3; - f32x4_t vecInB; - - /* pointers to 4 consecutive output rows */ - pOut0 = pOut; - pOut1 = pOut0 + numColsB; - pOut2 = pOut1 + numColsB; - pOut3 = pOut2 + numColsB; - pInB0 = pInB; - - uint32_t k = numColsB >> 2; - while (k > 0U) - { - /* pointers to 4 consecutive Matrix A rows */ - pInA0 = pInA; - pInA1 = pInA0 + numColsA; - pInA2 = pInA1 + numColsA; - pInA3 = pInA2 + numColsA; - - vecMac0 = vdupq_n_f32(0.0f); - vecMac1 = vdupq_n_f32(0.0f); - vecMac2 = vdupq_n_f32(0.0f); - vecMac3 = vdupq_n_f32(0.0f); - - blkCnt = numColsA; - - while (blkCnt > 0U) - { - /* - * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} - */ - vecInB = *(f32x4_t *)pInB0; /* vldrwq_f32(pInB0, 0); */ - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); - vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); - vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); - - pInB0 = pInB0 + numColsB; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* Store the results (4 x 4 block) in the destination buffer */ - vst1q(pOut0, vecMac0); - pOut0 += 4; - vst1q(pOut1, vecMac1); - pOut1 += 4; - vst1q(pOut2, vecMac2); - pOut2 += 4; - vst1q(pOut3, vecMac3); - pOut3 += 4; - - /* - * rewind - */ - pInB0 -= (numColsB * numColsA) - 4; - k--; - } - - int colBLeft = numColsB & 3; - if (colBLeft) - { - pInA0 = pInA; - pInA1 = pInA0 + numColsA; - pInA2 = pInA1 + numColsA; - pInA3 = pInA2 + numColsA; - mve_pred16_t p0 = vctp32q(colBLeft); - - vecMac0 = vdupq_n_f32(0.0f); - vecMac1 = vdupq_n_f32(0.0f); - vecMac2 = vdupq_n_f32(0.0f); - vecMac3 = vdupq_n_f32(0.0f); - - blkCnt = numColsA; - - while (blkCnt > 0U) - { - /* - * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} - */ - vecInB = vldrwq_z_f32(pInB0, p0); - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++); - vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++); - vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++); - - pInB0 = pInB0 + numColsB; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* Store the results (4 x colBLeft block) in the destination buffer */ - vstrwq_p_f32(pOut0, vecMac0, p0); - vstrwq_p_f32(pOut1, vecMac1, p0); - vstrwq_p_f32(pOut2, vecMac2, p0); - vstrwq_p_f32(pOut3, vecMac3, p0); - } - - /* move to next rows */ - pInA += 4 * numColsA; - pOut += 4 * numColsB; - i--; - } - - /* - * non multiple of 4 rows for Matrix A - * process single row - */ - if (numRowsA & 3) - { - i = numRowsA & 3; - while (i > 0U) - { - float32_t *pInA0; - float32_t *pInB0; - float32_t *pOut0; - f32x4_t vecInB; - f32x4_t vecMac0; - - pOut0 = pOut; - pInB0 = pInB; - - uint32_t k = numColsB >> 2; - while (k > 0U) - { - pInA0 = pInA; - - vecMac0 = vdupq_n_f32(0.0f); - blkCnt = numColsA; - while (blkCnt > 0U) - { - /* - * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} - */ - vecInB = *(f32x4_t *)pInB0; /* vldrwq_f32(pInB0, 0); */ - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - - pInB0 = pInB0 + numColsB; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* Store the results (1 x 4 block) in the destination buffer */ - vst1q(pOut0, vecMac0); - pOut0 += 4; - - /* - * rewind - */ - pInB0 -= (numColsB * numColsA) - 4; - k--; - } - - int colBLeft = numColsB & 3; - if (colBLeft) - { - pInA0 = pInA; - mve_pred16_t p0 = vctp32q(colBLeft); - - vecMac0 = vdupq_n_f32(0.0f); - blkCnt = numColsA; - while (blkCnt > 0U) - { - /* - * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3} - */ - vecInB = vldrwq_z_f32(pInB0, p0); - - vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++); - - pInB0 = pInB0 + numColsB; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* Store the results (1 x colBLeft block) in the destination buffer */ - vstrwq_p_f32(pOut0, vecMac0, p0); - } - - /* move to next row */ - pInA += 1 * numColsA; - pOut += 1 * numColsB; - i--; - } - - } - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#else - -#if defined(ARM_MATH_NEON) -/** - * @brief Floating-point matrix multiplication. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *px; /* Temporary output data matrix pointer */ - float32_t sum; /* Accumulator */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - - - uint16_t col, i = 0U, j, row = numRowsA, rowCnt, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - - float32x4_t a0V, a1V, a2V, a3V, a4V, a5V, a6V, a7V; - float32x4_t acc0,acc1,acc2,acc3,acc4,acc5,acc6,acc7,temp; - float32x2_t accum = vdup_n_f32(0); - float32_t *pIn1B = pSrcA->pData; - float32_t *pIn1C = pSrcA->pData; - float32_t *pIn1D = pSrcA->pData; - float32_t *pIn1E = pSrcA->pData; - float32_t *pIn1F = pSrcA->pData; - float32_t *pIn1G = pSrcA->pData; - float32_t *pIn1H = pSrcA->pData; - - float32_t *pxB,*pxC, *pxD, *pxE, *pxF, *pxG, *pxH; /* Temporary output data matrix pointer */ - float32_t sum0,sum1, sum2,sum3, sum4, sum5 , sum6, sum7; - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* Row loop */ - rowCnt = row >> 3; - - while(rowCnt > 0) - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + GROUPOFROWS*i; - pxB = px + numColsB; - pxC = px + 2*numColsB; - pxD = px + 3*numColsB; - pxE = px + 4*numColsB; - pxF = px + 5*numColsB; - pxG = px + 6*numColsB; - pxH = px + 7*numColsB; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - j = 0U; - - /* Column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum0 = 0.0f; - sum1 = 0.0f; - sum2 = 0.0f; - sum3 = 0.0f; - sum4 = 0.0f; - sum5 = 0.0f; - sum6 = 0.0f; - sum7 = 0.0f; - - /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ - pIn1 = pInA; - pIn1B = pIn1 + numColsA; - pIn1C = pIn1 + 2*numColsA; - pIn1D = pIn1 + 3*numColsA; - pIn1E = pIn1 + 4*numColsA; - pIn1F = pIn1 + 5*numColsA; - pIn1G = pIn1 + 6*numColsA; - pIn1H = pIn1 + 7*numColsA; - - acc0 = vdupq_n_f32(0.0); - acc1 = vdupq_n_f32(0.0); - acc2 = vdupq_n_f32(0.0); - acc3 = vdupq_n_f32(0.0); - acc4 = vdupq_n_f32(0.0); - acc5 = vdupq_n_f32(0.0); - acc6 = vdupq_n_f32(0.0); - acc7 = vdupq_n_f32(0.0); - - /* Compute 4 MACs simultaneously. */ - colCnt = numColsA >> 2U; - - /* Matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ - a0V = vld1q_f32(pIn1); - a1V = vld1q_f32(pIn1B); - a2V = vld1q_f32(pIn1C); - a3V = vld1q_f32(pIn1D); - a4V = vld1q_f32(pIn1E); - a5V = vld1q_f32(pIn1F); - a6V = vld1q_f32(pIn1G); - a7V = vld1q_f32(pIn1H); - - pIn1 += 4; - pIn1B += 4; - pIn1C += 4; - pIn1D += 4; - pIn1E += 4; - pIn1F += 4; - pIn1G += 4; - pIn1H += 4; - - temp = vsetq_lane_f32(*pIn2,temp,0); - pIn2 += numColsB; - temp = vsetq_lane_f32(*pIn2,temp,1); - pIn2 += numColsB; - temp = vsetq_lane_f32(*pIn2,temp,2); - pIn2 += numColsB; - temp = vsetq_lane_f32(*pIn2,temp,3); - pIn2 += numColsB; - - acc0 = vmlaq_f32(acc0,a0V,temp); - acc1 = vmlaq_f32(acc1,a1V,temp); - acc2 = vmlaq_f32(acc2,a2V,temp); - acc3 = vmlaq_f32(acc3,a3V,temp); - acc4 = vmlaq_f32(acc4,a4V,temp); - acc5 = vmlaq_f32(acc5,a5V,temp); - acc6 = vmlaq_f32(acc6,a6V,temp); - acc7 = vmlaq_f32(acc7,a7V,temp); - - /* Decrement the loop count */ - colCnt--; - } - - accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0)); - sum0 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(acc1), vget_high_f32(acc1)); - sum1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(acc2), vget_high_f32(acc2)); - sum2 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(acc3), vget_high_f32(acc3)); - sum3 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(acc4), vget_high_f32(acc4)); - sum4 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(acc5), vget_high_f32(acc5)); - sum5 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(acc6), vget_high_f32(acc6)); - sum6 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - accum = vpadd_f32(vget_low_f32(acc7), vget_high_f32(acc7)); - sum7 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - colCnt = numColsA & 3; - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ - sum0 += *pIn1++ * (*pIn2); - sum1 += *pIn1B++ * (*pIn2); - sum2 += *pIn1C++ * (*pIn2); - sum3 += *pIn1D++ * (*pIn2); - sum4 += *pIn1E++ * (*pIn2); - sum5 += *pIn1F++ * (*pIn2); - sum6 += *pIn1G++ * (*pIn2); - sum7 += *pIn1H++ * (*pIn2); - pIn2 += numColsB; - - /* Decrement the loop counter */ - colCnt--; - } - - /* Store the result in the destination buffer */ - *px++ = sum0; - *pxB++ = sum1; - *pxC++ = sum2; - *pxD++ = sum3; - *pxE++ = sum4; - *pxF++ = sum5; - *pxG++ = sum6; - *pxH++ = sum7; - - /* Update the pointer pIn2 to point to the starting address of the next column */ - j++; - pIn2 = pSrcB->pData + j; - - /* Decrement the column loop counter */ - col--; - - } while (col > 0U); - - /* Update the pointer pInA to point to the starting address of the next row */ - i = i + numColsB; - pInA = pInA + GROUPOFROWS*numColsA; - - /* Decrement the row loop counter */ - rowCnt--; - } - - /* - - i was the index of a group of rows computed by previous loop. - Now i is the index of a row since below code is computing row per row - and no more group of row per group of rows. - - */ - - i = GROUPOFROWS*i; - rowCnt = row & 7; - - while(rowCnt > 0) - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - j = 0U; - - /* Column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0.0f; - - /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ - pIn1 = pInA; - - acc0 = vdupq_n_f32(0.0); - - /* Compute 4 MACs simultaneously. */ - colCnt = numColsA >> 2U; - - /* Matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ - a0V = vld1q_f32(pIn1); // load & separate real/imag pSrcA (de-interleave 2) - pIn1 += 4; - - temp = vsetq_lane_f32(*pIn2,temp,0); - pIn2 += numColsB; - temp = vsetq_lane_f32(*pIn2,temp,1); - pIn2 += numColsB; - temp = vsetq_lane_f32(*pIn2,temp,2); - pIn2 += numColsB; - temp = vsetq_lane_f32(*pIn2,temp,3); - pIn2 += numColsB; - - acc0 = vmlaq_f32(acc0,a0V,temp); - - /* Decrement the loop count */ - colCnt--; - } - - accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0)); - sum += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1); - - /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. - ** No loop unrolling is used. */ - colCnt = numColsA % 0x4U; - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */ - sum += *pIn1++ * (*pIn2); - pIn2 += numColsB; - - /* Decrement the loop counter */ - colCnt--; - } - - /* Store the result in the destination buffer */ - *px++ = sum; - - /* Update the pointer pIn2 to point to the starting address of the next column */ - j++; - pIn2 = pSrcB->pData + j; - - /* Decrement the column loop counter */ - col--; - - } while (col > 0U); - - - /* Update the pointer pInA to point to the starting address of the next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement the row loop counter */ - rowCnt--; - - } - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#else -/** - * @brief Floating-point matrix multiplication. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ -arm_status arm_mat_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ - float32_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ - float32_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ - float32_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ - float32_t *pOut = pDst->pData; /* Output data matrix pointer */ - float32_t *px; /* Temporary output data matrix pointer */ - float32_t sum; /* Accumulator */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */ - arm_status status; /* Status of matrix multiplication */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of row being processed */ - px = pOut + i; - - /* For every row wise process, column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ - pIn2 = pSrcB->pData; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0.0f; - - /* Initialize pointer pIn1 to point to starting address of column being processed */ - pIn1 = pInA; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 MACs at a time. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,p) = a(m,1) * b(1,p) + a(m,2) * b(2,p) + .... + a(m,n) * b(n,p) */ - - /* Perform the multiply-accumulates */ - sum += *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += *pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Loop unrolling: Compute remaining MACs */ - colCnt = numColsA % 0x4U; - -#else - - /* Initialize cntCnt with number of columns */ - colCnt = numColsA; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (colCnt > 0U) - { - /* c(m,p) = a(m,1) * b(1,p) + a(m,2) * b(2,p) + .... + a(m,n) * b(n,p) */ - - /* Perform the multiply-accumulates */ - sum += *pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Store result in destination buffer */ - *px++ = sum; - - /* Decrement column loop counter */ - col--; - - /* Update pointer pIn2 to point to starting address of next column */ - pIn2 = pInB + (numColsB - col); - - } while (col > 0U); - - /* Update pointer pInA to point to starting address of next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f64.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f64.c deleted file mode 100644 index cb13f3f..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f64.c +++ /dev/null @@ -1,202 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_mult_f64.c - * Description: Floating-point matrix multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - * @ingroup groupMatrix - */ - -/** - * @defgroup MatrixMult Matrix Multiplication - * - * Multiplies two matrices. - * - * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices" - - * Matrix multiplication is only defined if the number of columns of the - * first matrix equals the number of rows of the second matrix. - * Multiplying an M x N matrix with an N x P matrix results - * in an M x P matrix. - * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of - * pSrcA and pSrcB are equal; and (2) that the size of the output - * matrix equals the outer dimensions of pSrcA and pSrcB. - */ - - -/** - * @addtogroup MatrixMult - * @{ - */ - -/** - * @brief Floating-point matrix multiplication. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - - -arm_status arm_mat_mult_f64( - const arm_matrix_instance_f64 * pSrcA, - const arm_matrix_instance_f64 * pSrcB, - arm_matrix_instance_f64 * pDst) -{ - float64_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ - float64_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ - float64_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ - float64_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ - float64_t *pOut = pDst->pData; /* Output data matrix pointer */ - float64_t *px; /* Temporary output data matrix pointer */ - float64_t sum; /* Accumulator */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - uint64_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */ - arm_status status; /* Status of matrix multiplication */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of row being processed */ - px = pOut + i; - - /* For every row wise process, column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ - pIn2 = pSrcB->pData; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0.0; - - /* Initialize pointer pIn1 to point to starting address of column being processed */ - pIn1 = pInA; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 MACs at a time. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* Perform the multiply-accumulates */ - sum += *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += *pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Loop unrolling: Compute remaining MACs */ - colCnt = numColsA % 0x4U; - -#else - - /* Initialize cntCnt with number of columns */ - colCnt = numColsA; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* Perform the multiply-accumulates */ - sum += *pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Store result in destination buffer */ - *px++ = sum; - - /* Decrement column loop counter */ - col--; - - /* Update pointer pIn2 to point to starting address of next column */ - pIn2 = pInB + (numColsB - col); - - } while (col > 0U); - - /* Update pointer pInA to point to starting address of next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - - -/** - * @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c deleted file mode 100644 index 18a2076..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c +++ /dev/null @@ -1,483 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_mult_fast_q15.c - * Description: Q15 matrix multiplication (fast variant) - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixMult - @{ - */ - -/** - @brief Q15 matrix multiplication (fast variant). - @param[in] pSrcA points to the first input matrix structure - @param[in] pSrcB points to the second input matrix structure - @param[out] pDst points to output matrix structure - @param[in] pState points to the array for storing intermediate results - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The difference between the function \ref arm_mat_mult_q15() and this fast variant is that - the fast variant use a 32-bit rather than a 64-bit accumulator. - The result of each 1.15 x 1.15 multiplication is truncated to - 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 - format. Finally, the accumulator is saturated and converted to a 1.15 result. - @par - The fast version has the same overflow behavior as the standard version but provides - less precision since it discards the low 16 bits of each multiplication result. - In order to avoid overflows completely the input signals must be scaled down. - Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, - as a total of numColsA additions are computed internally for each output element. - @remark - Refer to \ref arm_mat_mult_q15() for a slower implementation of this function - which uses 64-bit accumulation to provide higher precision. - */ - -arm_status arm_mat_mult_fast_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState) -{ - q31_t sum; /* Accumulator */ - q15_t *pSrcBT = pState; /* Input data matrix pointer for transpose */ - q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type */ - q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type */ - q15_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix B */ - uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */ - arm_status status; /* Status of matrix multiplication */ - -#if defined (ARM_MATH_DSP) - q31_t in; /* Temporary variable to hold the input value */ - q31_t inA1, inB1, inA2, inB2; - q31_t sum2, sum3, sum4; - q15_t *pInA2, *pInB2, *px2; - uint32_t j = 0; -#else - q15_t in; /* Temporary variable to hold the input value */ - q15_t inA1, inB1, inA2, inB2; -#endif /* #if defined (ARM_MATH_DSP) */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose */ - do - { - /* The pointer px is set to starting address of column being processed */ - px = pSrcBT + i; - - /* Apply loop unrolling and exchange columns with row elements */ - col = numColsB >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (col > 0U) - { - -#if defined (ARM_MATH_DSP) - - /* Read two elements from row */ - in = read_q15x2_ia (&pInB); - - /* Unpack and store one element in destination */ -#ifndef ARM_MATH_BIG_ENDIAN - *px = (q15_t) in; -#else - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update pointer px to point to next row of transposed matrix */ - px += numRowsB; - - /* Unpack and store second element in destination */ -#ifndef ARM_MATH_BIG_ENDIAN - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); -#else - *px = (q15_t) in; -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update pointer px to point to next row of transposed matrix */ - px += numRowsB; - - in = read_q15x2_ia (&pInB); -#ifndef ARM_MATH_BIG_ENDIAN - *px = (q15_t) in; -#else - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - px += numRowsB; - -#ifndef ARM_MATH_BIG_ENDIAN - *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); -#else - *px = (q15_t) in; -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - px += numRowsB; - -#else /* #if defined (ARM_MATH_DSP) */ - - /* Read one element from row */ - in = *pInB++; - - /* Store one element in destination */ - *px = in; - - /* Update pointer px to point to next row of transposed matrix */ - px += numRowsB; - - in = *pInB++; - *px = in; - px += numRowsB; - - in = *pInB++; - *px = in; - px += numRowsB; - - in = *pInB++; - *px = in; - px += numRowsB; - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement column loop counter */ - col--; - } - - /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - col = numColsB % 0x4U; - - while (col > 0U) - { - /* Read and store input element in destination */ - *px = *pInB++; - - /* Update pointer px to point to next row of transposed matrix */ - px += numRowsB; - - /* Decrement column loop counter */ - col--; - } - - i++; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Reset variables for usage in following multiplication process */ - row = numRowsA; - i = 0U; - px = pDst->pData; - -#if defined (ARM_MATH_DSP) - /* Process two rows from matrix A at a time and output two rows at a time */ - row = row >> 1U; - px2 = px + numColsB; -#endif - - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - while (row > 0U) - { - /* For every row wise process, column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */ - pInB = pSrcBT; - -#if defined (ARM_MATH_DSP) - /* Process two (transposed) columns from matrix B at a time */ - col = col >> 1U; - j = 0; -#endif - - /* column loop */ - while (col > 0U) - { - /* Set variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Initiate pointer pInA to point to starting address of column being processed */ - pInA = pSrcA->pData + i; - -#if defined (ARM_MATH_DSP) - sum2 = 0; - sum3 = 0; - sum4 = 0; - pInB = pSrcBT + j; - pInA2 = pInA + numColsA; - pInB2 = pInB + numRowsB; - - /* Read in two elements at once - allows dual MAC instruction */ - colCnt = numColsA >> 1U; -#else - colCnt = numColsA >> 2U; -#endif - - /* matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - -#if defined (ARM_MATH_DSP) - /* read real and imag values from pSrcA and pSrcB buffer */ - inA1 = read_q15x2_ia (&pInA); - inB1 = read_q15x2_ia (&pInB); - - inA2 = read_q15x2_ia (&pInA2); - inB2 = read_q15x2_ia (&pInB2); - - /* Multiply and Accumulates */ - sum = __SMLAD(inA1, inB1, sum); - sum2 = __SMLAD(inA1, inB2, sum2); - sum3 = __SMLAD(inA2, inB1, sum3); - sum4 = __SMLAD(inA2, inB2, sum4); -#else - /* read real and imag values from pSrcA and pSrcB buffer */ - inA1 = *pInA++; - inB1 = *pInB++; - /* Multiply and Accumulates */ - sum += inA1 * inB1; - - inA2 = *pInA++; - inB2 = *pInB++; - sum += inA2 * inB2; - - inA1 = *pInA++; - inB1 = *pInB++; - sum += inA1 * inB1; - - inA2 = *pInA++; - inB2 = *pInB++; - sum += inA2 * inB2; -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - colCnt--; - } - - /* process odd column samples */ -#if defined (ARM_MATH_DSP) - if (numColsA & 1U) { - inA1 = *pInA++; - inB1 = *pInB++; - inA2 = *pInA2++; - inB2 = *pInB2++; - sum += inA1 * inB1; - sum2 += inA1 * inB2; - sum3 += inA2 * inB1; - sum4 += inA2 * inB2; - } -#else - colCnt = numColsA % 0x4U; - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - sum += (q31_t) *pInA++ * *pInB++; - - /* Decrement loop counter */ - colCnt--; - } -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Saturate and store result in destination buffer */ - *px++ = (q15_t) (sum >> 15); - -#if defined (ARM_MATH_DSP) - *px++ = (q15_t) (sum2 >> 15); - *px2++ = (q15_t) (sum3 >> 15); - *px2++ = (q15_t) (sum4 >> 15); - j += numRowsB * 2; -#endif - - /* Decrement column loop counter */ - col--; - - } - - i = i + numColsA; - -#if defined (ARM_MATH_DSP) - i = i + numColsA; - px = px2 + (numColsB & 1U); - px2 = px + numColsB; -#endif - - /* Decrement row loop counter */ - row--; - - } - - /* Compute any remaining odd row/column below */ - -#if defined (ARM_MATH_DSP) - - /* Compute remaining output column */ - if (numColsB & 1U) { - - /* Avoid redundant computation of last element */ - row = numRowsA & (~0x1); - - /* Point to remaining unfilled column in output matrix */ - px = pDst->pData + numColsB-1; - pInA = pSrcA->pData; - - /* row loop */ - while (row > 0) - { - - /* point to last column in matrix B */ - pInB = pSrcBT + numRowsB * (numColsB-1); - - /* Set variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Compute 4 columns at once */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - inA1 = read_q15x2_ia (&pInA); - inA2 = read_q15x2_ia (&pInA); - inB1 = read_q15x2_ia (&pInB); - inB2 = read_q15x2_ia (&pInB); - - sum = __SMLAD(inA1, inB1, sum); - sum = __SMLAD(inA2, inB2, sum); - - /* Decrement loop counter */ - colCnt--; - } - - colCnt = numColsA & 3U; - while (colCnt > 0U) { - sum += (q31_t) (*pInA++) * (*pInB++); - colCnt--; - } - - /* Store result in destination buffer */ - *px = (q15_t) (sum >> 15); - px += numColsB; - - /* Decrement row loop counter */ - row--; - } - } - - /* Compute remaining output row */ - if (numRowsA & 1U) { - - /* point to last row in output matrix */ - px = pDst->pData + (numColsB) * (numRowsA-1); - - pInB = pSrcBT; - col = numColsB; - i = 0U; - - /* col loop */ - while (col > 0) - { - /* point to last row in matrix A */ - pInA = pSrcA->pData + (numRowsA-1) * numColsA; - - /* Set variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Compute 4 columns at once */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - inA1 = read_q15x2_ia (&pInA); - inA2 = read_q15x2_ia (&pInA); - inB1 = read_q15x2_ia (&pInB); - inB2 = read_q15x2_ia (&pInB); - - sum = __SMLAD(inA1, inB1, sum); - sum = __SMLAD(inA2, inB2, sum); - - /* Decrement loop counter */ - colCnt--; - } - - colCnt = numColsA % 4U; - while (colCnt > 0U) { - sum += (q31_t) (*pInA++) * (*pInB++); - - colCnt--; - } - - /* Store result in destination buffer */ - *px++ = (q15_t) (sum >> 15); - - /* Decrement column loop counter */ - col--; - } - } - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c deleted file mode 100644 index 2447768..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c +++ /dev/null @@ -1,374 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_mult_fast_q31.c - * Description: Q31 matrix multiplication (fast variant) - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixMult - @{ - */ - -/** - @brief Q31 matrix multiplication (fast variant). - @param[in] pSrcA points to the first input matrix structure - @param[in] pSrcB points to the second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The difference between the function \ref arm_mat_mult_q31() and this fast variant is that - the fast variant use a 32-bit rather than a 64-bit accumulator. - The result of each 1.31 x 1.31 multiplication is truncated to - 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 - format. Finally, the accumulator is saturated and converted to a 1.31 result. - @par - The fast version has the same overflow behavior as the standard version but provides - less precision since it discards the low 32 bits of each multiplication result. - In order to avoid overflows completely the input signals must be scaled down. - Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, - as a total of numColsA additions are computed internally for each output element. - @remark - Refer to \ref arm_mat_mult_q31() for a slower implementation of this function - which uses 64-bit accumulation to provide higher precision. - */ - -arm_status arm_mat_mult_fast_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ - q31_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ - q31_t *pInA2; - q31_t *px; /* Temporary output data matrix pointer */ - q31_t *px2; - q31_t sum1, sum2, sum3, sum4; /* Accumulator */ - q31_t inA1, inA2, inB1, inB2; - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* Loop counters */ - arm_status status; /* Status of matrix multiplication */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - px = pDst->pData; - - row = row >> 1U; - px2 = px + numColsB; - - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - while (row > 0U) - { - /* For every row wise process, column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ - pInB = pSrcB->pData; - - j = 0U; - - col = col >> 1U; - - /* column loop */ - while (col > 0U) - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum1 = 0; - sum2 = 0; - sum3 = 0; - sum4 = 0; - - /* Initiate data pointers */ - pInA = pSrcA->pData + i; - pInB = pSrcB->pData + j; - pInA2 = pInA + numColsA; - - colCnt = numColsA; - - /* matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - inA1 = *pInA++; - inB1 = pInB[0]; - inA2 = *pInA2++; - inB2 = pInB[1]; - pInB += numColsB; - -#if defined (ARM_MATH_DSP) - sum1 = __SMMLA(inA1, inB1, sum1); - sum2 = __SMMLA(inA1, inB2, sum2); - sum3 = __SMMLA(inA2, inB1, sum3); - sum4 = __SMMLA(inA2, inB2, sum4); -#else - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32); - sum2 = (q31_t) ((((q63_t) sum2 << 32) + ((q63_t) inA1 * inB2)) >> 32); - sum3 = (q31_t) ((((q63_t) sum3 << 32) + ((q63_t) inA2 * inB1)) >> 32); - sum4 = (q31_t) ((((q63_t) sum4 << 32) + ((q63_t) inA2 * inB2)) >> 32); -#endif - - /* Decrement loop counter */ - colCnt--; - } - - /* Convert the result from 2.30 to 1.31 format and store in destination buffer */ - *px++ = sum1 << 1; - *px++ = sum2 << 1; - *px2++ = sum3 << 1; - *px2++ = sum4 << 1; - - j += 2; - - /* Decrement column loop counter */ - col--; - } - - i = i + (numColsA << 1U); - px = px2 + (numColsB & 1U); - px2 = px + numColsB; - - /* Decrement row loop counter */ - row--; - } - - /* Compute any remaining odd row/column below */ - - /* Compute remaining output column */ - if (numColsB & 1U) { - - /* Avoid redundant computation of last element */ - row = numRowsA & (~1U); - - /* Point to remaining unfilled column in output matrix */ - px = pDst->pData + numColsB-1; - pInA = pSrcA->pData; - - /* row loop */ - while (row > 0) - { - - /* point to last column in matrix B */ - pInB = pSrcB->pData + numColsB-1; - - /* Set variable sum1, that acts as accumulator, to zero */ - sum1 = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 columns at a time. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { -#if defined (ARM_MATH_DSP) - sum1 = __SMMLA(*pInA++, *pInB, sum1); -#else - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); -#endif - pInB += numColsB; - -#if defined (ARM_MATH_DSP) - sum1 = __SMMLA(*pInA++, *pInB, sum1); -#else - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); -#endif - pInB += numColsB; - -#if defined (ARM_MATH_DSP) - sum1 = __SMMLA(*pInA++, *pInB, sum1); -#else - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); -#endif - pInB += numColsB; - -#if defined (ARM_MATH_DSP) - sum1 = __SMMLA(*pInA++, *pInB, sum1); -#else - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); -#endif - pInB += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Loop unrolling: Compute remaining column */ - colCnt = numColsA % 4U; - -#else - - /* Initialize colCnt with number of columns */ - colCnt = numColsA; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (colCnt > 0U) { -#if defined (ARM_MATH_DSP) - sum1 = __SMMLA(*pInA++, *pInB, sum1); -#else - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); -#endif - pInB += numColsB; - - colCnt--; - } - - /* Convert the result from 2.30 to 1.31 format and store in destination buffer */ - *px = sum1 << 1; - px += numColsB; - - /* Decrement row loop counter */ - row--; - } - } - - /* Compute remaining output row */ - if (numRowsA & 1U) { - - /* point to last row in output matrix */ - px = pDst->pData + (numColsB) * (numRowsA-1); - - col = numColsB; - i = 0U; - - /* col loop */ - while (col > 0) - { - - /* point to last row in matrix A */ - pInA = pSrcA->pData + (numRowsA-1) * numColsA; - pInB = pSrcB->pData + i; - - /* Set variable sum1, that acts as accumulator, to zero */ - sum1 = 0; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 columns at a time. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - inA1 = *pInA++; - inA2 = *pInA++; - inB1 = *pInB; - pInB += numColsB; - inB2 = *pInB; - pInB += numColsB; -#if defined (ARM_MATH_DSP) - sum1 = __SMMLA(inA1, inB1, sum1); - sum1 = __SMMLA(inA2, inB2, sum1); -#else - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32); - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32); -#endif - - inA1 = *pInA++; - inA2 = *pInA++; - inB1 = *pInB; - pInB += numColsB; - inB2 = *pInB; - pInB += numColsB; -#if defined (ARM_MATH_DSP) - sum1 = __SMMLA(inA1, inB1, sum1); - sum1 = __SMMLA(inA2, inB2, sum1); -#else - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32); - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32); -#endif - - /* Decrement loop counter */ - colCnt--; - } - - /* Loop unrolling: Compute remaining column */ - colCnt = numColsA % 4U; - -#else - - /* Initialize colCnt with number of columns */ - colCnt = numColsA; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (colCnt > 0U) { -#if defined (ARM_MATH_DSP) - sum1 = __SMMLA(*pInA++, *pInB, sum1); -#else - sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32); -#endif - pInB += numColsB; - - colCnt--; - } - - /* Saturate and store the result in the destination buffer */ - *px++ = sum1 << 1; - i++; - - /* Decrement col loop counter */ - col--; - } - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_opt_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_opt_q31.c deleted file mode 100644 index 1702e7d..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_opt_q31.c +++ /dev/null @@ -1,784 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_mult_opt_q31.c - * Description: Q31 matrix multiplication - * - * $Date: 3 Nov 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixMult - @{ - */ - -/** - @brief Q31 matrix multiplication. - @param[in] pSrcA points to the first input matrix structure - @param[in] pSrcB points to the second input matrix structure - @param[out] pDst points to output matrix structure - @param[in] pState points to the array for storing intermediate results - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate - multiplication results but provides only a single guard bit. There is no saturation - on intermediate additions. Thus, if the accumulator overflows it wraps around and - distorts the result. The input signals should be scaled down to avoid intermediate - overflows. The input is thus scaled down by log2(numColsA) bits - to avoid overflows, as a total of numColsA additions are performed internally. - The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. - @remark - Refer to \ref arm_mat_mult_fast_q31() for a faster but less precise implementation of this function. - @remark - This function is a faster implementation of arm_mat_mult_q31 for MVE but it is requiring - additional storage for intermediate results. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define MATRIX_DIM2 2 -#define MATRIX_DIM3 3 -#define MATRIX_DIM4 4 - -__STATIC_INLINE arm_status arm_mat_mult_opt_q31_2x2_mve( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs; - q31_t *pInA0 = pInA; - q31_t *pInA1 = pInA0 + MATRIX_DIM2; - q63_t acc0, acc1; - q31x4_t vecB, vecA0, vecA1; - /* enable predication to disable half of vector elements */ - mve_pred16_t p0 = vctp32q(MATRIX_DIM2); - - vecColBOffs = vidupq_u32((uint32_t)0, 1); - vecColBOffs = vecColBOffs * MATRIX_DIM2; - - pInB = pSrcB->pData; - - /* load 1st B column (partial load) */ - vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); - - /* load A rows */ - vecA0 = vldrwq_s32(pInA0); - vecA1 = vldrwq_s32(pInA1); - - acc0 = vrmlaldavhq(vecA0, vecB); - acc1 = vrmlaldavhq(vecA1, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - - pOut[0 * MATRIX_DIM2] = (q31_t) acc0; - pOut[1 * MATRIX_DIM2] = (q31_t) acc1; - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); - - acc0 = vrmlaldavhq(vecA0, vecB); - acc1 = vrmlaldavhq(vecA1, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - - pOut[0 * MATRIX_DIM2] = (q31_t) acc0; - pOut[1 * MATRIX_DIM2] = (q31_t) acc1; - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - - -__STATIC_INLINE arm_status arm_mat_mult_opt_q31_3x3_mve( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs; - q31_t *pInA0 = pInA; - q31_t *pInA1 = pInA0 + MATRIX_DIM3; - q31_t *pInA2 = pInA1 + MATRIX_DIM3; - q63_t acc0, acc1, acc2; - q31x4_t vecB, vecA; - /* enable predication to disable last (4th) vector element */ - mve_pred16_t p0 = vctp32q(MATRIX_DIM3); - - vecColBOffs = vidupq_u32((uint32_t)0, 1); - vecColBOffs = vecColBOffs * MATRIX_DIM3; - - pInB = pSrcB->pData; - - vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - - pOut[0 * MATRIX_DIM3] = (q31_t) acc0; - pOut[1 * MATRIX_DIM3] = (q31_t) acc1; - pOut[2 * MATRIX_DIM3] = (q31_t) acc2; - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - - pOut[0 * MATRIX_DIM3] = (q31_t) acc0; - pOut[1 * MATRIX_DIM3] = (q31_t) acc1; - pOut[2 * MATRIX_DIM3] = (q31_t) acc2; - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - - pOut[0 * MATRIX_DIM3] = (q31_t) acc0; - pOut[1 * MATRIX_DIM3] = (q31_t) acc1; - pOut[2 * MATRIX_DIM3] = (q31_t) acc2; - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - -__STATIC_INLINE arm_status arm_mat_mult_opt_q31_4x4_mve( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs; - q31_t *pInA0 = pInA; - q31_t *pInA1 = pInA0 + MATRIX_DIM4; - q31_t *pInA2 = pInA1 + MATRIX_DIM4; - q31_t *pInA3 = pInA2 + MATRIX_DIM4; - q63_t acc0, acc1, acc2, acc3; - q31x4_t vecB, vecA; - - vecColBOffs = vidupq_u32((uint32_t)0, 4); - - pInB = pSrcB->pData; - - vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA3); - acc3 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - pOut[0 * MATRIX_DIM4] = (q31_t) acc0; - pOut[1 * MATRIX_DIM4] = (q31_t) acc1; - pOut[2 * MATRIX_DIM4] = (q31_t) acc2; - pOut[3 * MATRIX_DIM4] = (q31_t) acc3; - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA3); - acc3 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - pOut[0 * MATRIX_DIM4] = (q31_t) acc0; - pOut[1 * MATRIX_DIM4] = (q31_t) acc1; - pOut[2 * MATRIX_DIM4] = (q31_t) acc2; - pOut[3 * MATRIX_DIM4] = (q31_t) acc3; - - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA3); - acc3 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - pOut[0 * MATRIX_DIM4] = (q31_t) acc0; - pOut[1 * MATRIX_DIM4] = (q31_t) acc1; - pOut[2 * MATRIX_DIM4] = (q31_t) acc2; - pOut[3 * MATRIX_DIM4] = (q31_t) acc3; - - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA3); - acc3 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - pOut[0 * MATRIX_DIM4] = (q31_t) acc0; - pOut[1 * MATRIX_DIM4] = (q31_t) acc1; - pOut[2 * MATRIX_DIM4] = (q31_t) acc2; - pOut[3 * MATRIX_DIM4] = (q31_t) acc3; - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - -arm_status arm_mat_mult_opt_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst, - q31_t *pState) -{ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pInA2; - q31_t *pInB2; - q31_t *px; /* Temporary output data matrix pointer */ - q31_t *px2; /* Temporary output data matrix pointer */ - uint32_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint32_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint32_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint32_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ - uint32_t col, i = 0u, j, row = numRowsB; /* loop counters */ - q31_t *pSrcBT = pState; /* input data matrix pointer for transpose */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* Status of matrix multiplication */ - arm_matrix_instance_q31 BT; -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - - /* small squared matrix specialized routines */ - if(numRowsA == numColsB && numColsB == numColsA) { - if (numRowsA == 1) - { - q63_t sum = (q63_t) *pInA * *pInB; - pDst->pData[0] = (q31_t)(sum >> 31); - return (ARM_MATH_SUCCESS); - } - else if(numRowsA == 2) - return arm_mat_mult_opt_q31_2x2_mve(pSrcA, pSrcB, pDst); - else if(numRowsA == 3) - return arm_mat_mult_opt_q31_3x3_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 4) - return arm_mat_mult_opt_q31_4x4_mve(pSrcA, pSrcB, pDst); - } - - - /* - * Matrix transpose - */ - BT.numRows = numColsB; - BT.numCols = numRowsB; - BT.pData = pSrcBT; - - arm_mat_trans_q31(pSrcB, &BT); - - - /* - * Reset the variables for the usage in the following multiplication process - */ - i = 0; - row = numRowsA >> 1; - px = pDst->pData; - px2 = px + numColsB; - - /* - * main loop - * compute 2 x 2 output blocks - * with dot products (Matrix A rows * Transposed MAtrix B rows) - */ - while (row > 0u) { - /* - * For every row wise process, the column loop counter is to be initiated - * Compute 2 columns and 2 rows in parrallel - */ - col = numColsB >> 1; - j = 0; - - /* - * column pair loop - */ - while (col > 0u) { - q31_t const *pSrcAVec, *pSrcBVec, *pSrcA2Vec, *pSrcB2Vec; - q31x4_t vecA, vecA2, vecB, vecB2; - q63_t acc0, acc1, acc2, acc3; - - /* - * Initiate the pointers - * - 2 x consecutive Matrix A rows (i increment is 2 x numColsA) - * - 2 x consecutive Matrix B' rows (j increment is 2 x numRowsB) - */ - pInA = pSrcA->pData + i; - pInA2 = pInA + numColsA; - pInB = pSrcBT + j; - pInB2 = pInB + numRowsB; - - - pSrcAVec = (q31_t const *) pInA; - pSrcA2Vec = (q31_t const *) pInA2; - pSrcBVec = (q31_t const *) pInB; - pSrcB2Vec = (q31_t const *) pInB2; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - acc3 = 0LL; - - /* load scheduling */ - vecA = vld1q(pSrcAVec); - pSrcAVec += 4; - - blkCnt = (numColsA / 4); - while (blkCnt > 0U) { - vecB = vld1q(pSrcBVec); - pSrcBVec += 4; - acc0 = vrmlaldavhaq(acc0, vecA, vecB); - vecA2 = vld1q(pSrcA2Vec); - pSrcA2Vec += 4; - acc1 = vrmlaldavhaq(acc1, vecA2, vecB); - vecB2 = vld1q(pSrcB2Vec); - pSrcB2Vec += 4; - acc2 = vrmlaldavhaq(acc2, vecA, vecB2); - vecA = vld1q(pSrcAVec); - pSrcAVec += 4; - acc3 = vrmlaldavhaq(acc3, vecA2, vecB2); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (numColsA & 3); - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - vecB = vld1q(pSrcBVec); - acc0 = vrmlaldavhaq_p(acc0, vecA, vecB, p0); - vecA2 = vld1q(pSrcA2Vec); - acc1 = vrmlaldavhaq_p(acc1, vecA2, vecB, p0); - vecB2 = vld1q(pSrcB2Vec); - acc2 = vrmlaldavhaq_p(acc2, vecA, vecB2, p0); - vecA = vld1q(pSrcAVec); - acc3 = vrmlaldavhaq_p(acc3, vecA2, vecB2, p0); - } - - /* Convert to 1.31 */ - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - /* Store the results (2 x 2 block) in the destination buffer */ - *px++ = (q31_t) acc0; - *px++ = (q31_t) acc2; - *px2++ = (q31_t) acc1; - *px2++ = (q31_t) acc3; - - j += numRowsB * 2; - /* - * Decrement the column pair loop counter - */ - col--; - - } - - i = i + numColsA * 2; - px = px2 + (numColsB & 1u); - px2 = px + numColsB; - /* - * Decrement the row pair loop counter - */ - row--; - } - - /* - * Compute remaining row and/or column below - */ - if (numColsB & 1u) { - row = numRowsA & (~0x1); //avoid redundant computation - px = pDst->pData + numColsB - 1; - i = 0; - - /* - * row loop - */ - while (row > 0) { - q31_t const *pSrcAVec, *pSrcBVec; - q31x4_t vecA, vecB; - q63_t acc0; - - /* - * point to last column in matrix B - */ - pInB = pSrcBT + numRowsB * (numColsB - 1); - pInA = pSrcA->pData + i; - - pSrcAVec = (q31_t const *) pInA; - pSrcBVec = (q31_t const *) pInB; - - /* single dot-product */ - acc0 = 0LL; - blkCnt = (numColsA / 4); - while (blkCnt > 0U) { - vecA = vld1q(pSrcAVec); - pSrcAVec += 4; - vecB = vld1q(pSrcBVec); - pSrcBVec += 4; - acc0 = vrmlaldavhaq(acc0, vecA, vecB); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (numColsA & 3); - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcAVec); - vecB = vld1q(pSrcBVec); - acc0 = vrmlaldavhaq_p(acc0, vecA, vecB, p0); - } - - acc0 = asrl(acc0, 23); - *px = (q31_t) acc0; - - px += numColsB; - - i += numColsA; - /* - * Decrement the row loop counter - */ - row--; - } - } - - if (numRowsA & 1u) { - col = numColsB; - i = 0u; - /* - * point to last row in output matrix - */ - px = pDst->pData + (numColsB) * (numRowsA - 1); - /* - * col loop - */ - while (col > 0) { - q31_t const *pSrcAVec, *pSrcBVec; - q31x4_t vecA, vecB; - q63_t acc0; - - /* - * point to last row in matrix A - */ - pInA = pSrcA->pData + (numRowsA - 1) * numColsA; - pInB = pSrcBT + i; - - /* - * Set the variable sum, that acts as accumulator, to zero - */ - pSrcAVec = (q31_t const *) pInA; - pSrcBVec = (q31_t const *) pInB; - acc0 = 0LL; - - blkCnt = (numColsA / 4); - while (blkCnt > 0U) { - vecA = vld1q(pSrcAVec); - pSrcAVec += 4; - vecB = vld1q(pSrcBVec); - pSrcBVec += 4; - acc0 = vrmlaldavhaq(acc0, vecA, vecB); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (numColsA & 3); - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcAVec); - vecB = vld1q(pSrcBVec); - acc0 = vrmlaldavhaq_p(acc0, vecA, vecB, p0); - } - - acc0 = asrl(acc0, 23); - *px++ = (q31_t) acc0; - - i += numColsA; - /* - * Decrement the col loop counter - */ - col--; - } - } - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - /* - * Return to application - */ - return (status); -} - -#else -arm_status arm_mat_mult_opt_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst, - q31_t *pState) -{ - q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ - q31_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ - q31_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ - q31_t *pOut = pDst->pData; /* Output data matrix pointer */ - q31_t *px; /* Temporary output data matrix pointer */ - q63_t sum; /* Accumulator */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */ - arm_status status; /* Status of matrix multiplication */ - (void)pState; -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of row being processed */ - px = pOut + i; - - /* For every row wise process, column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ - pIn2 = pSrcB->pData; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Initialize pointer pIn1 to point to starting address of column being processed */ - pIn1 = pInA; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 MACs at a time. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* Perform the multiply-accumulates */ - sum += (q63_t) *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += (q63_t) *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += (q63_t) *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += (q63_t) *pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Loop unrolling: Compute remaining MACs */ - colCnt = numColsA % 0x4U; - -#else - - /* Initialize cntCnt with number of columns */ - colCnt = numColsA; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* Perform the multiply-accumulates */ - sum += (q63_t) *pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Convert result from 2.62 to 1.31 format and store in destination buffer */ - *px++ = (q31_t) (sum >> 31); - - /* Decrement column loop counter */ - col--; - - /* Update pointer pIn2 to point to starting address of next column */ - pIn2 = pInB + (numColsB - col); - - } while (col > 0U); - - /* Update pointer pInA to point to starting address of next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c deleted file mode 100644 index 69ae249..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c +++ /dev/null @@ -1,843 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_mult_q15.c - * Description: Q15 matrix multiplication - * - * $Date: 3 Nov 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixMult - @{ - */ - -/** - @brief Q15 matrix multiplication. - @param[in] pSrcA points to the first input matrix structure - @param[in] pSrcB points to the second input matrix structure - @param[out] pDst points to output matrix structure - @param[in] pState points to the array for storing intermediate results - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. The inputs to the - multiplications are in 1.15 format and multiplications yield a 2.30 result. - The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - This approach provides 33 guard bits and there is no risk of overflow. - The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits - and then saturated to 1.15 format. - @par - Refer to \ref arm_mat_mult_fast_q15() for a faster but less precise version of this function. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define MVE_ASRL_SAT16(acc, shift) ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff) - -#define MATRIX_DIM2 2 -#define MATRIX_DIM3 3 -#define MATRIX_DIM4 4 - -__STATIC_INLINE arm_status arm_mat_mult_q15_2x2_mve( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16x8_t vecColBOffs; - q15_t *pInA0 = pInA; - q15_t *pInA1 = pInA0 + MATRIX_DIM2; - q63_t acc0, acc1; - q15x8_t vecB, vecA0, vecA1; - mve_pred16_t p0 = vctp16q(MATRIX_DIM2); - - vecColBOffs = vidupq_u16((uint32_t)0, 2); /* MATRIX_DIM2 */ - - pInB = pSrcB->pData; - - vecB = vldrhq_gather_shifted_offset_z_s16((q15_t const *)pInB, vecColBOffs, p0); - - vecA0 = vldrhq_s16(pInA0); - vecA1 = vldrhq_s16(pInA1); - - acc0 = vmlaldavq(vecA0, vecB); - acc1 = vmlaldavq(vecA1, vecB); - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - - pOut[0 * MATRIX_DIM2] = (q15_t) __SSAT(acc0, 16); - pOut[1 * MATRIX_DIM2] = (q15_t) __SSAT(acc1, 16); - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); - - acc0 = vmlaldavq(vecA0, vecB); - acc1 = vmlaldavq(vecA1, vecB); - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - - pOut[0 * MATRIX_DIM2] = (q15_t) __SSAT(acc0, 16); - pOut[1 * MATRIX_DIM2] = (q15_t) __SSAT(acc1, 16); - - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - - -__STATIC_INLINE arm_status arm_mat_mult_q15_3x3_mve( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16x8_t vecColBOffs; - q15_t *pInA0 = pInA; - q15_t *pInA1 = pInA0 + MATRIX_DIM3; - q15_t *pInA2 = pInA1 + MATRIX_DIM3; - q63_t acc0, acc1, acc2; - q15x8_t vecB, vecA0, vecA1, vecA2; - mve_pred16_t p0 = vctp16q(MATRIX_DIM3); - - vecColBOffs = vidupq_u16((uint32_t)0, 1); - vecColBOffs = vecColBOffs * MATRIX_DIM3; - - pInB = pSrcB->pData; - - vecB = vldrhq_gather_shifted_offset_z_s16((q15_t const *)pInB, vecColBOffs, p0); - - vecA0 = vldrhq_s16(pInA0); - vecA1 = vldrhq_s16(pInA1); - vecA2 = vldrhq_s16(pInA2); - - acc0 = vmlaldavq(vecA0, vecB); - acc1 = vmlaldavq(vecA1, vecB); - acc2 = vmlaldavq(vecA2, vecB); - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - acc2 = asrl(acc2, 15); - - pOut[0 * MATRIX_DIM3] = (q15_t) __SSAT(acc0, 16); - pOut[1 * MATRIX_DIM3] = (q15_t) __SSAT(acc1, 16); - pOut[2 * MATRIX_DIM3] = (q15_t) __SSAT(acc2, 16); - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); - - acc0 = vmlaldavq(vecA0, vecB); - acc1 = vmlaldavq(vecA1, vecB); - acc2 = vmlaldavq(vecA2, vecB); - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - acc2 = asrl(acc2, 15); - - pOut[0 * MATRIX_DIM3] = (q15_t) __SSAT(acc0, 16); - pOut[1 * MATRIX_DIM3] = (q15_t) __SSAT(acc1, 16); - pOut[2 * MATRIX_DIM3] = (q15_t) __SSAT(acc2, 16); - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); - - acc0 = vmlaldavq(vecA0, vecB); - acc1 = vmlaldavq(vecA1, vecB); - acc2 = vmlaldavq(vecA2, vecB); - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - acc2 = asrl(acc2, 15); - - pOut[0 * MATRIX_DIM3] = (q15_t) __SSAT(acc0, 16); - pOut[1 * MATRIX_DIM3] = (q15_t) __SSAT(acc1, 16); - pOut[2 * MATRIX_DIM3] = (q15_t) __SSAT(acc2, 16); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - -__STATIC_INLINE arm_status arm_mat_mult_q15_4x4_mve( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16x8_t vecColBOffs; - q15_t *pInA0 = pInA; - q15_t *pInA1 = pInA0 + MATRIX_DIM4; - q15_t *pInA2 = pInA1 + MATRIX_DIM4; - q15_t *pInA3 = pInA2 + MATRIX_DIM4; - q63_t acc0, acc1, acc2, acc3; - q15x8_t vecB, vecA0, vecA1, vecA2, vecA3; - mve_pred16_t p0 = vctp16q(MATRIX_DIM4); - - vecColBOffs = vidupq_u16((uint32_t)0, 4); - - pInB = pSrcB->pData; - - vecB = vldrhq_gather_shifted_offset_z_s16((q15_t const *)pInB, vecColBOffs, p0); - - vecA0 = vldrhq_s16(pInA0); - vecA1 = vldrhq_s16(pInA1); - vecA2 = vldrhq_s16(pInA2); - vecA3 = vldrhq_s16(pInA3); - - acc0 = vmlaldavq(vecA0, vecB); - acc1 = vmlaldavq(vecA1, vecB); - acc2 = vmlaldavq(vecA2, vecB); - acc3 = vmlaldavq(vecA3, vecB); - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - acc2 = asrl(acc2, 15); - acc3 = asrl(acc3, 15); - - pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16); - pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16); - pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16); - pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16); - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); - - acc0 = vmlaldavq(vecA0, vecB); - acc1 = vmlaldavq(vecA1, vecB); - acc2 = vmlaldavq(vecA2, vecB); - acc3 = vmlaldavq(vecA3, vecB); - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - acc2 = asrl(acc2, 15); - acc3 = asrl(acc3, 15); - - pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16); - pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16); - pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16); - pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16); - - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); - - acc0 = vmlaldavq(vecA0, vecB); - acc1 = vmlaldavq(vecA1, vecB); - acc2 = vmlaldavq(vecA2, vecB); - acc3 = vmlaldavq(vecA3, vecB); - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - acc2 = asrl(acc2, 15); - acc3 = asrl(acc3, 15); - - pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16); - pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16); - pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16); - pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16); - - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0); - - acc0 = vmlaldavq(vecA0, vecB); - acc1 = vmlaldavq(vecA1, vecB); - acc2 = vmlaldavq(vecA2, vecB); - acc3 = vmlaldavq(vecA3, vecB); - - acc0 = asrl(acc0, 15); - acc1 = asrl(acc1, 15); - acc2 = asrl(acc2, 15); - acc3 = asrl(acc3, 15); - - pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16); - pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16); - pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16); - pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - -arm_status arm_mat_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState) -{ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q15_t *pInA2; - q15_t *pInB2; - q15_t *px; /* Temporary output data matrix pointer */ - q15_t *px2; /* Temporary output data matrix pointer */ - uint32_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint32_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint32_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint32_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ - uint32_t col, i = 0u, j, row = numRowsB; /* loop counters */ - q15_t *pSrcBT = pState; /* input data matrix pointer for transpose */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* Status of matrix multiplication */ - arm_matrix_instance_q15 BT; - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif - { - /* small squared matrix specialized routines */ - if (numRowsA == numColsB && numColsB == numColsA) { - - if (numRowsA == 1) { - q63_t sum; - sum = pInA[0] * pInB[0]; - pDst->pData[0] = (q15_t) __SSAT((sum >> 15), 16); - return (ARM_MATH_SUCCESS); - } else if (numRowsA == 2) - return arm_mat_mult_q15_2x2_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 3) - return arm_mat_mult_q15_3x3_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 4) - return arm_mat_mult_q15_4x4_mve(pSrcA, pSrcB, pDst); - } - - /* - * Matrix transpose - */ - - BT.numRows = numColsB; - BT.numCols = numRowsB; - BT.pData = pSrcBT; - - arm_mat_trans_q15(pSrcB, &BT); - - - /* - * Reset the variables for the usage in the following multiplication process - */ - i = 0; - row = numRowsA >> 1; - px = pDst->pData; - px2 = px + numColsB; - - /* - * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB - */ - - /* - * row loop - */ - while (row > 0u) { - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB >> 1; - /* - * For every row wise process, the pIn2 pointer is set - * to the starting address of the transposed pSrcB data - */ - pInB = pSrcBT; - pInB2 = pInB + numRowsB; - j = 0; - - /* - * column loop - */ - while (col > 0u) { - q15_t const *pSrcAVec, *pSrcBVec, *pSrcA2Vec, *pSrcB2Vec; - q15x8_t vecA, vecA2, vecB, vecB2; - q63_t acc0, acc1, acc2, acc3; - - /* - * Initiate the pointer pIn1 to point to the starting address of the column being processed - */ - pInA = pSrcA->pData + i; - pInA2 = pInA + numColsA; - pInB = pSrcBT + j; - pInB2 = pInB + numRowsB; - - - pSrcAVec = (q15_t const *) pInA; - pSrcA2Vec = (q15_t const *) pInA2; - pSrcBVec = (q15_t const *) pInB; - pSrcB2Vec = (q15_t const *) pInB2; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - acc3 = 0LL; - - vecA = vld1q(pSrcAVec); - pSrcAVec += 8; - - blkCnt = numColsA / 8; - while (blkCnt > 0U) { - vecB = vld1q(pSrcBVec); - pSrcBVec += 8; - acc0 = vmlaldavaq(acc0, vecA, vecB); - vecA2 = vld1q(pSrcA2Vec); - pSrcA2Vec += 8; - acc1 = vmlaldavaq(acc1, vecA2, vecB); - vecB2 = vld1q(pSrcB2Vec); - pSrcB2Vec += 8; - acc2 = vmlaldavaq(acc2, vecA, vecB2); - vecA = vld1q(pSrcAVec); - pSrcAVec += 8; - acc3 = vmlaldavaq(acc3, vecA2, vecB2); - - blkCnt--; - } - /* - * tail - */ - blkCnt = numColsA & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - vecB = vld1q(pSrcBVec); - acc0 = vmlaldavaq_p(acc0, vecA, vecB, p0); - vecA2 = vld1q(pSrcA2Vec); - acc1 = vmlaldavaq_p(acc1, vecA2, vecB, p0); - vecB2 = vld1q(pSrcB2Vec); - acc2 = vmlaldavaq_p(acc2, vecA, vecB2, p0); - vecA = vld1q(pSrcAVec); - acc3 = vmlaldavaq_p(acc3, vecA2, vecB2, p0); - } - - *px++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); - *px++ = (q15_t) MVE_ASRL_SAT16(acc2, 15); - *px2++ = (q15_t) MVE_ASRL_SAT16(acc1, 15); - *px2++ = (q15_t) MVE_ASRL_SAT16(acc3, 15); - j += numRowsB * 2; - /* - * Decrement the column loop counter - */ - col--; - - } - - i = i + numColsA * 2; - px = px2 + (numColsB & 1u); - px2 = px + numColsB; - /* - * Decrement the row loop counter - */ - row--; - } - - /* - * Compute remaining row and/or column below - */ - - if (numColsB & 1u) { - row = numRowsA & (~0x1); //avoid redundant computation - px = pDst->pData + numColsB - 1; - i = 0; - - /* - * row loop - */ - while (row > 0) { - q15_t const *pSrcAVec, *pSrcBVec; - q15x8_t vecA, vecB; - q63_t acc0; - - /* - * point to last column in matrix B - */ - pInB = pSrcBT + numRowsB * (numColsB - 1); - pInA = pSrcA->pData + i; - - pSrcAVec = (q15_t const *) pInA; - pSrcBVec = (q15_t const *) pInB; - - acc0 = 0LL; - blkCnt = (numColsA) / 8; - while (blkCnt > 0U) { - vecA = vld1q(pSrcAVec); - pSrcAVec += 8; - vecB = vld1q(pSrcBVec); - pSrcBVec += 8; - acc0 = vmlaldavaq(acc0, vecA, vecB); - - blkCnt--; - } - /* - * tail - */ - blkCnt = (numColsA & 7); - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcAVec); - vecB = vld1q(pSrcBVec); - acc0 = vmlaldavaq_p(acc0, vecA, vecB, p0); - } - - *px = (q15_t) MVE_ASRL_SAT16(acc0, 15); - - px += numColsB; - - i += numColsA; - /* - * Decrement the row loop counter - */ - row--; - } - } - - if (numRowsA & 1u) { - col = numColsB; - i = 0u; - /* - * point to last row in output matrix - */ - px = pDst->pData + (numColsB) * (numRowsA - 1); - /* - * col loop - */ - while (col > 0) { - q15_t const *pSrcAVec, *pSrcBVec; - q15x8_t vecA, vecB; - q63_t acc0; - - /* - * point to last row in matrix A - */ - pInA = pSrcA->pData + (numRowsA - 1) * numColsA; - pInB = pSrcBT + i; - - /* - * Set the variable sum, that acts as accumulator, to zero - */ - pSrcAVec = (q15_t const *) pInA; - pSrcBVec = (q15_t const *) pInB; - acc0 = 0LL; - - blkCnt = ((numColsA) / 8); - while (blkCnt > 0U) { - vecA = vld1q(pSrcAVec); - pSrcAVec += 8; - vecB = vld1q(pSrcBVec); - pSrcBVec += 8; - acc0 = vmlaldavaq(acc0, vecA, vecB); - - blkCnt--; - } - /* - * tail - */ - blkCnt = (numColsA & 7); - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcAVec); - vecB = vld1q(pSrcBVec); - acc0 = vmlaldavaq_p(acc0, vecA, vecB, p0); - } - - *px++ = (q15_t) MVE_ASRL_SAT16(acc0, 15); - - i += numColsA; - - /* - * Decrement the col loop counter - */ - col--; - } - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState) -{ - q63_t sum; /* Accumulator */ - -#if defined (ARM_MATH_DSP) /* != CM0 */ - - q15_t *pSrcBT = pState; /* Input data matrix pointer for transpose */ - q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type */ - q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type */ - q15_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix B */ - uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */ - arm_status status; /* Status of matrix multiplication */ - - q31_t inA1, inB1, inA2, inB2; - arm_matrix_instance_q15 BT; - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - - BT.numRows = numColsB; - BT.numCols = numRowsB; - BT.pData = pSrcBT; - - arm_mat_trans_q15(pSrcB,&BT); - /* Reset variables for usage in following multiplication process */ - row = numRowsA; - i = 0U; - px = pDst->pData; - - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* For every row wise process, column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */ - pInB = pSrcBT; - - /* column loop */ - do - { - /* Set variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Initiate pointer pInA to point to starting address of column being processed */ - pInA = pSrcA->pData + i; - - /* Apply loop unrolling and compute 2 MACs simultaneously. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* read real and imag values from pSrcA and pSrcB buffer */ - inA1 = read_q15x2_ia (&pInA); - inB1 = read_q15x2_ia (&pInB); - - inA2 = read_q15x2_ia (&pInA); - inB2 = read_q15x2_ia (&pInB); - - /* Multiply and Accumulates */ - sum = __SMLALD(inA1, inB1, sum); - sum = __SMLALD(inA2, inB2, sum); - - /* Decrement loop counter */ - colCnt--; - } - - /* process remaining column samples */ - colCnt = numColsA % 0x4U; - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - sum += *pInA++ * *pInB++; - - /* Decrement loop counter */ - colCnt--; - } - - /* Saturate and store result in destination buffer */ - *px = (q15_t) (__SSAT((sum >> 15), 16)); - px++; - - /* Decrement column loop counter */ - col--; - - } while (col > 0U); - - i = i + numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - -#else /* #if defined (ARM_MATH_DSP) */ - - q15_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ - q15_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ - q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type */ - q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type */ - q15_t *pOut = pDst->pData; /* Output data matrix pointer */ - q15_t *px; /* Temporary output data matrix pointer */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */ - arm_status status; /* Status of matrix multiplication */ - (void)pState; - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + i; - - /* For every row wise process, column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ - pIn2 = pSrcB->pData; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Initiate pointer pIn1 to point to starting address of pSrcA */ - pIn1 = pInA; - - /* Matrix A columns number of MAC operations are to be performed */ - colCnt = numColsA; - - /* matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* Perform multiply-accumulates */ - sum += (q31_t) * pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Convert result from 34.30 to 1.15 format and store saturated value in destination buffer */ - - /* Saturate and store result in destination buffer */ - *px++ = (q15_t) __SSAT((sum >> 15), 16); - - /* Decrement column loop counter */ - col--; - - /* Update pointer pIn2 to point to starting address of next column */ - pIn2 = pInB + (numColsB - col); - - } while (col > 0U); - - /* Update pointer pSrcA to point to starting address of next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c deleted file mode 100644 index c1e7eb2..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c +++ /dev/null @@ -1,761 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_mult_q31.c - * Description: Q31 matrix multiplication - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixMult - @{ - */ - -/** - @brief Q31 matrix multiplication. - @param[in] pSrcA points to the first input matrix structure - @param[in] pSrcB points to the second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The accumulator has a 2.62 format and maintains full precision of the intermediate - multiplication results but provides only a single guard bit. There is no saturation - on intermediate additions. Thus, if the accumulator overflows it wraps around and - distorts the result. The input signals should be scaled down to avoid intermediate - overflows. The input is thus scaled down by log2(numColsA) bits - to avoid overflows, as a total of numColsA additions are performed internally. - The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. - @remark - Refer to \ref arm_mat_mult_fast_q31() for a faster but less precise implementation of this function. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#define MATRIX_DIM2 2 -#define MATRIX_DIM3 3 -#define MATRIX_DIM4 4 - -__STATIC_INLINE arm_status arm_mat_mult_q31_2x2_mve( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs; - q31_t *pInA0 = pInA; - q31_t *pInA1 = pInA0 + MATRIX_DIM2; - q63_t acc0, acc1; - q31x4_t vecB, vecA0, vecA1; - /* enable predication to disable half of vector elements */ - mve_pred16_t p0 = vctp32q(MATRIX_DIM2); - - vecColBOffs = vidupq_u32((uint32_t)0, 1); - vecColBOffs = vecColBOffs * MATRIX_DIM2; - - pInB = pSrcB->pData; - - /* load 1st B column (partial load) */ - vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); - - /* load A rows */ - vecA0 = vldrwq_s32(pInA0); - vecA1 = vldrwq_s32(pInA1); - - acc0 = vrmlaldavhq(vecA0, vecB); - acc1 = vrmlaldavhq(vecA1, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - - pOut[0 * MATRIX_DIM2] = (q31_t) acc0; - pOut[1 * MATRIX_DIM2] = (q31_t) acc1; - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); - - acc0 = vrmlaldavhq(vecA0, vecB); - acc1 = vrmlaldavhq(vecA1, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - - pOut[0 * MATRIX_DIM2] = (q31_t) acc0; - pOut[1 * MATRIX_DIM2] = (q31_t) acc1; - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - - -__STATIC_INLINE arm_status arm_mat_mult_q31_3x3_mve( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs; - q31_t *pInA0 = pInA; - q31_t *pInA1 = pInA0 + MATRIX_DIM3; - q31_t *pInA2 = pInA1 + MATRIX_DIM3; - q63_t acc0, acc1, acc2; - q31x4_t vecB, vecA; - /* enable predication to disable last (4th) vector element */ - mve_pred16_t p0 = vctp32q(MATRIX_DIM3); - - vecColBOffs = vidupq_u32((uint32_t)0, 1); - vecColBOffs = vecColBOffs * MATRIX_DIM3; - - pInB = pSrcB->pData; - - vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - - pOut[0 * MATRIX_DIM3] = (q31_t) acc0; - pOut[1 * MATRIX_DIM3] = (q31_t) acc1; - pOut[2 * MATRIX_DIM3] = (q31_t) acc2; - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - - pOut[0 * MATRIX_DIM3] = (q31_t) acc0; - pOut[1 * MATRIX_DIM3] = (q31_t) acc1; - pOut[2 * MATRIX_DIM3] = (q31_t) acc2; - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - - pOut[0 * MATRIX_DIM3] = (q31_t) acc0; - pOut[1 * MATRIX_DIM3] = (q31_t) acc1; - pOut[2 * MATRIX_DIM3] = (q31_t) acc2; - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - -__STATIC_INLINE arm_status arm_mat_mult_q31_4x4_mve( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32x4_t vecColBOffs; - q31_t *pInA0 = pInA; - q31_t *pInA1 = pInA0 + MATRIX_DIM4; - q31_t *pInA2 = pInA1 + MATRIX_DIM4; - q31_t *pInA3 = pInA2 + MATRIX_DIM4; - q63_t acc0, acc1, acc2, acc3; - q31x4_t vecB, vecA; - - vecColBOffs = vidupq_u32((uint32_t)0, 4); - - pInB = pSrcB->pData; - - vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA3); - acc3 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - pOut[0 * MATRIX_DIM4] = (q31_t) acc0; - pOut[1 * MATRIX_DIM4] = (q31_t) acc1; - pOut[2 * MATRIX_DIM4] = (q31_t) acc2; - pOut[3 * MATRIX_DIM4] = (q31_t) acc3; - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA3); - acc3 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - pOut[0 * MATRIX_DIM4] = (q31_t) acc0; - pOut[1 * MATRIX_DIM4] = (q31_t) acc1; - pOut[2 * MATRIX_DIM4] = (q31_t) acc2; - pOut[3 * MATRIX_DIM4] = (q31_t) acc3; - - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA3); - acc3 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - pOut[0 * MATRIX_DIM4] = (q31_t) acc0; - pOut[1 * MATRIX_DIM4] = (q31_t) acc1; - pOut[2 * MATRIX_DIM4] = (q31_t) acc2; - pOut[3 * MATRIX_DIM4] = (q31_t) acc3; - - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs); - - vecA = vldrwq_s32(pInA0); - acc0 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA1); - acc1 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA2); - acc2 = vrmlaldavhq(vecA, vecB); - vecA = vldrwq_s32(pInA3); - acc3 = vrmlaldavhq(vecA, vecB); - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - pOut[0 * MATRIX_DIM4] = (q31_t) acc0; - pOut[1 * MATRIX_DIM4] = (q31_t) acc1; - pOut[2 * MATRIX_DIM4] = (q31_t) acc2; - pOut[3 * MATRIX_DIM4] = (q31_t) acc3; - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - -arm_status arm_mat_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t const *pInB = (q31_t const *)pSrcB->pData; /* input data matrix pointer B */ - q31_t const *pInA = (q31_t const *)pSrcA->pData; /* input data matrix pointer A */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - q31_t *px; /* Temporary output data matrix pointer */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint16_t col, i = 0U, row = numRowsA; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - uint32x4_t vecOffs, vecColBOffs; - uint32_t blkCnt, rowCnt; /* loop counters */ - - #ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* small squared matrix specialized routines */ - if(numRowsA == numColsB && numColsB == numColsA) { - if (numRowsA == 1) - { - q63_t sum = (q63_t) *pInA * *pInB; - pOut[0] = (q31_t)(sum >> 31); - return (ARM_MATH_SUCCESS); - } - else if(numRowsA == 2) - return arm_mat_mult_q31_2x2_mve(pSrcA, pSrcB, pDst); - else if(numRowsA == 3) - return arm_mat_mult_q31_3x3_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 4) - return arm_mat_mult_q31_4x4_mve(pSrcA, pSrcB, pDst); - } - - vecColBOffs = vidupq_u32((uint32_t)0, 1); - vecColBOffs = vecColBOffs * (uint32_t) (numColsB); - - /* - * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB - */ - - /* - * row loop - */ - rowCnt = row >> 2; - while (rowCnt > 0U) - { - /* - * Output pointer is set to starting address of the row being processed - */ - px = pOut + i; - i = i + 4 * numColsB; - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB; - /* - * For every row wise process, the pInB pointer is set - * to the starting address of the pSrcB data - */ - pInB = (q31_t const *)pSrcB->pData; - /* - * column loop - */ - while (col > 0U) - { - /* - * generate 4 columns elements - */ - /* - * Matrix A columns number of MAC operations are to be performed - */ - - q31_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec; - q31_t const *pInA0 = pInA; - q31_t const *pInA1 = pInA0 + numColsA; - q31_t const *pInA2 = pInA1 + numColsA; - q31_t const *pInA3 = pInA2 + numColsA; - q63_t acc0, acc1, acc2, acc3; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - acc3 = 0LL; - - pSrcA0Vec = (q31_t const *) pInA0; - pSrcA1Vec = (q31_t const *) pInA1; - pSrcA2Vec = (q31_t const *) pInA2; - pSrcA3Vec = (q31_t const *) pInA3; - - vecOffs = vecColBOffs; - - /* process 1 x 4 block output */ - blkCnt = numColsA >> 2; - while (blkCnt > 0U) - { - q31x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); - /* move Matrix B read offsets, 4 rows down */ - vecOffs = vecOffs + (uint32_t) (numColsB * 4); - - vecA = vld1q(pSrcA0Vec); pSrcA0Vec += 4; - acc0 = vrmlaldavhaq(acc0, vecA, vecB); - vecA = vld1q(pSrcA1Vec); pSrcA1Vec += 4; - acc1 = vrmlaldavhaq(acc1, vecA, vecB); - vecA = vld1q(pSrcA2Vec); pSrcA2Vec += 4; - acc2 = vrmlaldavhaq(acc2, vecA, vecB); - vecA = vld1q(pSrcA3Vec); pSrcA3Vec += 4; - acc3 = vrmlaldavhaq(acc3, vecA, vecB); - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numColsA & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - q31x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); - //vecOffs = vecOffs + (uint32_t) (numColsB * 4); - - vecA = vld1q(pSrcA0Vec); pSrcA0Vec += 4; - acc0 = vrmlaldavhaq(acc0, vecA, vecB); - vecA = vld1q(pSrcA1Vec); pSrcA1Vec += 4; - acc1 = vrmlaldavhaq(acc1, vecA, vecB); - vecA = vld1q(pSrcA2Vec); pSrcA2Vec += 4; - acc2 = vrmlaldavhaq(acc2, vecA, vecB); - vecA = vld1q(pSrcA3Vec); pSrcA3Vec += 4; - acc3 = vrmlaldavhaq(acc3, vecA, vecB); - } - - acc0 = asrl(acc0, 23); - acc1 = asrl(acc1, 23); - acc2 = asrl(acc2, 23); - acc3 = asrl(acc3, 23); - - px[0] = (q31_t) acc0; - px[1 * numColsB] = (q31_t) acc1; - px[2 * numColsB] = (q31_t) acc2; - px[3 * numColsB] = (q31_t) acc3; - px++; - /* - * Decrement the column loop counter - */ - col--; - /* - * Update the pointer pInB to point to the starting address of the next column - */ - pInB = (q31_t const *)pSrcB->pData + (numColsB - col); - } - - /* - * Update the pointer pInA to point to the starting address of the next row - */ - pInA += (numColsA * 4); - /* - * Decrement the row loop counter - */ - rowCnt --; - - } - rowCnt = row & 3; - while (rowCnt > 0U) - { - /* - * Output pointer is set to starting address of the row being processed - */ - px = pOut + i; - i = i + numColsB; - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB; - /* - * For every row wise process, the pInB pointer is set - * to the starting address of the pSrcB data - */ - pInB = (q31_t const *)pSrcB->pData; - /* - * column loop - */ - while (col > 0U) - { - /* - * generate 4 columns elements - */ - /* - * Matrix A columns number of MAC operations are to be performed - */ - - q31_t const *pSrcA0Vec; - q31_t const *pInA0 = pInA; - q63_t acc0; - - acc0 = 0LL; - - - pSrcA0Vec = (q31_t const *) pInA0; - - vecOffs = vecColBOffs; - - /* process 1 x 4 block output */ - blkCnt = numColsA >> 2; - while (blkCnt > 0U) - { - q31x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset(pInB, vecOffs); - /* move Matrix B read offsets, 4 rows down */ - vecOffs = vecOffs + (uint32_t) (numColsB * 4); - - vecA = vld1q(pSrcA0Vec); pSrcA0Vec += 4; - acc0 = vrmlaldavhaq(acc0, vecA, vecB); - - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numColsA & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - q31x4_t vecB, vecA; - - vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0); - //vecOffs = vecOffs + (uint32_t) (numColsB * 4); - - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vrmlaldavhaq(acc0, vecA, vecB); - - } - - acc0 = asrl(acc0, 23); - - - px[0] = (q31_t) acc0; - px++; - /* - * Decrement the column loop counter - */ - col--; - /* - * Update the pointer pInB to point to the starting address of the next column - */ - pInB = (q31_t const *)pSrcB->pData + (numColsB - col); - } - - /* - * Update the pointer pInA to point to the starting address of the next row - */ - pInA += numColsA; - /* - * Decrement the row loop counter - */ - rowCnt--; - } - - /* - * set status as ARM_MATH_SUCCESS - */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */ - q31_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */ - q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */ - q31_t *pInB = pSrcB->pData; /* Input data matrix pointer B */ - q31_t *pOut = pDst->pData; /* Output data matrix pointer */ - q31_t *px; /* Temporary output data matrix pointer */ - q63_t sum; /* Accumulator */ - uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */ - uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */ - uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */ - arm_status status; /* Status of matrix multiplication */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do - { - /* Output pointer is set to starting address of row being processed */ - px = pOut + i; - - /* For every row wise process, column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */ - pIn2 = pSrcB->pData; - - /* column loop */ - do - { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Initialize pointer pIn1 to point to starting address of column being processed */ - pIn1 = pInA; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 MACs at a time. */ - colCnt = numColsA >> 2U; - - /* matrix multiplication */ - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* Perform the multiply-accumulates */ - sum += (q63_t) *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += (q63_t) *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += (q63_t) *pIn1++ * *pIn2; - pIn2 += numColsB; - - sum += (q63_t) *pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Loop unrolling: Compute remaining MACs */ - colCnt = numColsA % 0x4U; - -#else - - /* Initialize cntCnt with number of columns */ - colCnt = numColsA; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (colCnt > 0U) - { - /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */ - - /* Perform the multiply-accumulates */ - sum += (q63_t) *pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement loop counter */ - colCnt--; - } - - /* Convert result from 2.62 to 1.31 format and store in destination buffer */ - *px++ = (q31_t) (sum >> 31); - - /* Decrement column loop counter */ - col--; - - /* Update pointer pIn2 to point to starting address of next column */ - pIn2 = pInB + (numColsB - col); - - } while (col > 0U); - - /* Update pointer pInA to point to starting address of next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q7.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q7.c deleted file mode 100644 index 7d96886..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q7.c +++ /dev/null @@ -1,678 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_mult_q7.c - * Description: Q15 matrix multiplication - * - * $Date: 23 April 2021 - * - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixMult - @{ - */ - -/** - * @brief Q7 matrix multiplication - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @param[in] *pState points to the array for storing intermediate results (Unused in some versions) - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * Scaling and Overflow Behavior: - * - * \par - * The function is implemented using a 32-bit internal accumulator saturated to 1.7 format. - * - * - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -__STATIC_FORCEINLINE arm_status arm_mat_mult_q7_2x2_mve( - const arm_matrix_instance_q7 * pSrcA, - const arm_matrix_instance_q7 * pSrcB, - arm_matrix_instance_q7 * pDst) -{ - const uint32_t MATRIX_DIM = 2; - q7_t const *pInB = (q7_t const *)pSrcB->pData; /* input data matrix pointer B */ - q7_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q7_t *pOut = pDst->pData; /* output data matrix pointer */ - uint8x16_t vecColBOffs; - q7_t *pInA0 = pInA; - q7_t *pInA1 = pInA0 + MATRIX_DIM; - q31_t acc0, acc1; - q7x16_t vecB, vecA0, vecA1; - mve_pred16_t p0 = vctp8q(MATRIX_DIM); - - vecColBOffs = vidupq_u8((uint32_t)0, 2); /* MATRIX_DIM */ - - pInB = pSrcB->pData; - - vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0); - - vecA0 = vldrbq_s8(pInA0); - vecA1 = vldrbq_s8(pInA1); - - acc0 = vmladavq_s8(vecA0, vecB); - acc1 = vmladavq_s8(vecA1, vecB); - - pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8); - pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8); - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0); - - acc0 = vmladavq_s8(vecA0, vecB); - acc1 = vmladavq_s8(vecA1, vecB); - - pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8); - pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - -__STATIC_FORCEINLINE arm_status arm_mat_mult_q7_3x3_mve( - const arm_matrix_instance_q7 * pSrcA, - const arm_matrix_instance_q7 * pSrcB, - arm_matrix_instance_q7 * pDst) -{ - const uint8_t MATRIX_DIM = 3; - q7_t const *pInB = (q7_t const *)pSrcB->pData; /* input data matrix pointer B */ - q7_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q7_t *pOut = pDst->pData; /* output data matrix pointer */ - uint8x16_t vecColBOffs; - q7_t *pInA0 = pInA; - q7_t *pInA1 = pInA0 + MATRIX_DIM; - q7_t *pInA2 = pInA1 + MATRIX_DIM; - q31_t acc0, acc1, acc2; - q7x16_t vecB, vecA0, vecA1, vecA2; - mve_pred16_t p0 = vctp8q(MATRIX_DIM); - - vecColBOffs = vidupq_u8((uint32_t)0, 1); - vecColBOffs = vecColBOffs * MATRIX_DIM; - - pInB = pSrcB->pData; - - vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0); - - vecA0 = vldrbq_s8(pInA0); - vecA1 = vldrbq_s8(pInA1); - vecA2 = vldrbq_s8(pInA2); - - acc0 = vmladavq_s8(vecA0, vecB); - acc1 = vmladavq_s8(vecA1, vecB); - acc2 = vmladavq_s8(vecA2, vecB); - - pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8); - pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8); - pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8); - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0); - - acc0 = vmladavq_s8(vecA0, vecB); - acc1 = vmladavq_s8(vecA1, vecB); - acc2 = vmladavq_s8(vecA2, vecB); - - pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8); - pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8); - pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8); - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0); - - acc0 = vmladavq_s8(vecA0, vecB); - acc1 = vmladavq_s8(vecA1, vecB); - acc2 = vmladavq_s8(vecA2, vecB); - - pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8); - pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8); - pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - - -__STATIC_FORCEINLINE arm_status arm_mat_mult_q7_4x4_mve( - const arm_matrix_instance_q7 * pSrcA, - const arm_matrix_instance_q7 * pSrcB, - arm_matrix_instance_q7 * pDst) -{ - const uint32_t MATRIX_DIM = 4; - q7_t const *pInB = (q7_t const *)pSrcB->pData; /* input data matrix pointer B */ - q7_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q7_t *pOut = pDst->pData; /* output data matrix pointer */ - uint8x16_t vecColBOffs; - q7_t *pInA0 = pInA; - q7_t *pInA1 = pInA0 + MATRIX_DIM; - q7_t *pInA2 = pInA1 + MATRIX_DIM; - q7_t *pInA3 = pInA2 + MATRIX_DIM; - q31_t acc0, acc1, acc2, acc3; - q7x16_t vecB, vecA0, vecA1, vecA2, vecA3; - mve_pred16_t p0 = vctp8q(MATRIX_DIM); - - vecColBOffs = vidupq_u8((uint32_t)0, 4); - - pInB = pSrcB->pData; - - vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0); - - vecA0 = vldrbq_s8(pInA0); - vecA1 = vldrbq_s8(pInA1); - vecA2 = vldrbq_s8(pInA2); - vecA3 = vldrbq_s8(pInA3); - - acc0 = vmladavq_s8(vecA0, vecB); - acc1 = vmladavq_s8(vecA1, vecB); - acc2 = vmladavq_s8(vecA2, vecB); - acc3 = vmladavq_s8(vecA3, vecB); - - pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8); - pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8); - pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8); - pOut[3 * MATRIX_DIM] = (q7_t) __SSAT(acc3 >> 7, 8); - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0); - - acc0 = vmladavq_s8(vecA0, vecB); - acc1 = vmladavq_s8(vecA1, vecB); - acc2 = vmladavq_s8(vecA2, vecB); - acc3 = vmladavq_s8(vecA3, vecB); - - pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8); - pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8); - pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8); - pOut[3 * MATRIX_DIM] = (q7_t) __SSAT(acc3 >> 7, 8); - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0); - - acc0 = vmladavq_s8(vecA0, vecB); - acc1 = vmladavq_s8(vecA1, vecB); - acc2 = vmladavq_s8(vecA2, vecB); - acc3 = vmladavq_s8(vecA3, vecB); - - pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8); - pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8); - pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8); - pOut[3 * MATRIX_DIM] = (q7_t) __SSAT(acc3 >> 7, 8); - pOut++; - - /* move to next B column */ - pInB = pInB + 1; - - vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0); - - acc0 = vmladavq_s8(vecA0, vecB); - acc1 = vmladavq_s8(vecA1, vecB); - acc2 = vmladavq_s8(vecA2, vecB); - acc3 = vmladavq_s8(vecA3, vecB); - - pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8); - pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8); - pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8); - pOut[3 * MATRIX_DIM] = (q7_t) __SSAT(acc3 >> 7, 8); - /* - * Return to application - */ - return (ARM_MATH_SUCCESS); -} - -arm_status arm_mat_mult_q7( - const arm_matrix_instance_q7 * pSrcA, - const arm_matrix_instance_q7 * pSrcB, - arm_matrix_instance_q7 * pDst, - q7_t * pState) -{ - q7_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q7 type */ - q7_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q7 type */ - q7_t *pInA2; - q7_t *pInB2; - q7_t *px; /* Temporary output data matrix pointer */ - q7_t *px2; /* Temporary output data matrix pointer */ - uint32_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint32_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint32_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint32_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ - uint32_t col, i = 0u, j, row = numRowsB; /* loop counters */ - q7_t *pSrcBT = pState; /* input data matrix pointer for transpose */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - arm_matrix_instance_q7 BT; - - - #ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - /* small squared matrix specialized routines */ - if(numRowsA == numColsB && numColsB == numColsA) { - if(numRowsA == 2) - return arm_mat_mult_q7_2x2_mve(pSrcA, pSrcB, pDst); - else if(numRowsA == 3) - return arm_mat_mult_q7_3x3_mve(pSrcA, pSrcB, pDst); - else if (numRowsA == 4) - return arm_mat_mult_q7_4x4_mve(pSrcA, pSrcB, pDst); - } - /* - * Matrix transpose - */ - - BT.numRows = numColsB; - BT.numCols = numRowsB; - BT.pData = pSrcBT; - - arm_mat_trans_q7(pSrcB, &BT); - - /* - * Reset the variables for the usage in the following multiplication process - */ - i = 0; - row = numRowsA >> 1; - px = pDst->pData; - px2 = px + numColsB; - - /* - * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB - */ - - /* - * row loop - */ - while (row > 0u) - { - /* - * For every row wise process, the column loop counter is to be initiated - */ - col = numColsB >> 1; - /* - * For every row wise process, the pIn2 pointer is set - * to the starting address of the transposed pSrcB data - */ - pInB = pSrcBT; - pInB2 = pInB + numRowsB; - j = 0; - - /* - * column loop - */ - while (col > 0u) - { - q7_t const *pSrcAVec, *pSrcBVec, *pSrcA2Vec, *pSrcB2Vec; - q7x16_t vecA, vecA2, vecB, vecB2; - q31_t acc0, acc1, acc2, acc3; - - /* - * Initiate the pointer pIn1 to point to the starting address of the column being processed - */ - pInA = pSrcA->pData + i; - pInA2 = pInA + numColsA; - pInB = pSrcBT + j; - pInB2 = pInB + numRowsB; - - pSrcAVec = (q7_t const *) pInA; - pSrcA2Vec = (q7_t const *)pInA2; - pSrcBVec = (q7_t const *) pInB; - pSrcB2Vec = (q7_t const *)pInB2; - - acc0 = 0L; - acc1 = 0L; - acc2 = 0L; - acc3 = 0L; - - vecA = vld1q(pSrcAVec); - pSrcAVec += 16; - - blkCnt = numColsA >> 4; - while (blkCnt > 0U) - { - vecB = vld1q(pSrcBVec); - pSrcBVec += 16; - acc0 = vmladavaq_s8(acc0, vecA, vecB); - vecA2 = vld1q(pSrcA2Vec); - pSrcA2Vec += 16; - acc1 = vmladavaq_s8(acc1, vecA2, vecB); - vecB2 = vld1q(pSrcB2Vec); - pSrcB2Vec += 16; - acc2 = vmladavaq_s8(acc2, vecA, vecB2); - vecA = vld1q(pSrcAVec); - pSrcAVec += 16; - acc3 = vmladavaq_s8(acc3, vecA2, vecB2); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numColsA & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecB = vld1q(pSrcBVec); - acc0 = vmladavaq_p_s8(acc0, vecA, vecB, p0); - vecA2 = vld1q(pSrcA2Vec); - acc1 = vmladavaq_p_s8(acc1, vecA2, vecB, p0); - vecB2 = vld1q(pSrcB2Vec); - acc2 = vmladavaq_p_s8(acc2, vecA, vecB2, p0); - vecA = vld1q(pSrcAVec); - acc3 = vmladavaq_p_s8(acc3, vecA2, vecB2, p0); - } - - *px++ = (q7_t) __SSAT(acc0 >> 7, 8); - *px++ = (q7_t) __SSAT(acc2 >> 7, 8); - *px2++ = (q7_t) __SSAT(acc1 >> 7, 8); - *px2++ = (q7_t) __SSAT(acc3 >> 7, 8); - j += numRowsB * 2; - /* - * Decrement the column loop counter - */ - col--; - - } - - i = i + numColsA * 2; - px = px2 + (numColsB & 1u); - px2 = px + numColsB; - /* - * Decrement the row loop counter - */ - row--; - } - - /* - * Compute remaining row and/or column below - */ - - if (numColsB & 1u) - { - row = numRowsA & (~0x1); //avoid redundant computation - px = pDst->pData + numColsB - 1; - i = 0; - - /* - * row loop - */ - while (row > 0) - { - q7_t const *pSrcAVec, *pSrcBVec; - q7x16_t vecA, vecB; - q63_t acc0; - - /* - * point to last column in matrix B - */ - pInB = pSrcBT + numRowsB * (numColsB - 1); - pInA = pSrcA->pData + i; - - pSrcAVec = (q7_t const *) pInA; - pSrcBVec = (q7_t const *) pInB; - - acc0 = 0LL; - blkCnt = (numColsA) >> 4; - while (blkCnt > 0U) - { - vecA = vld1q(pSrcAVec); - pSrcAVec += 16; - vecB = vld1q(pSrcBVec); - pSrcBVec += 16; - acc0 = vmladavaq_s8(acc0, vecA, vecB); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numColsA & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecA = vld1q(pSrcAVec); - vecB = vld1q(pSrcBVec); - acc0 = vmladavaq_p_s8(acc0, vecA, vecB, p0); - } - - *px = (q7_t) __SSAT(acc0 >> 7, 8); - - px += numColsB; - - i += numColsA; - /* - * Decrement the row loop counter - */ - row--; - } - } - - if (numRowsA & 1u) - { - col = numColsB; - i = 0u; - /* - * point to last row in output matrix - */ - px = pDst->pData + (numColsB) * (numRowsA - 1); - /* - * col loop - */ - while (col > 0) - { - q7_t const *pSrcAVec, *pSrcBVec; - q7x16_t vecA, vecB; - q63_t acc0; - - /* - * point to last row in matrix A - */ - pInA = pSrcA->pData + (numRowsA - 1) * numColsA; - pInB = pSrcBT + i; - - /* - * Set the variable sum, that acts as accumulator, to zero - */ - pSrcAVec = (q7_t const *) pInA; - pSrcBVec = (q7_t const *) pInB; - acc0 = 0LL; - - blkCnt = (numColsA) >> 4; - while (blkCnt > 0U) - { - vecA = vld1q(pSrcAVec); - pSrcAVec += 16; - vecB = vld1q(pSrcBVec); - pSrcBVec += 16; - acc0 = vmladavaq_s8(acc0, vecA, vecB); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numColsA & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecA = vld1q(pSrcAVec); - vecB = vld1q(pSrcBVec); - acc0 = vmladavaq_p_s8(acc0, vecA, vecB, p0); - } - - *px++ = (q7_t) __SSAT(acc0 >> 7, 8); - - i += numColsA; - - /* - * Decrement the col loop counter - */ - col--; - } - } - /* - * Return to application - */ - status = ARM_MATH_SUCCESS; - } - return(status); -} -#else -arm_status arm_mat_mult_q7(const arm_matrix_instance_q7 *pSrcA, const arm_matrix_instance_q7 *pSrcB, arm_matrix_instance_q7 *pDst, q7_t *pState) -{ - q31_t sum; /* accumulator */ - q7_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - q7_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - q7_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q7 type */ - q7_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q7 type */ - q7_t *pOut = pDst->pData; /* output data matrix pointer */ - q7_t *px; /* Temporary output data matrix pointer */ - uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ - uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ - uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ - uint16_t col, i = 0U, row = numRowsA, colCnt; /* loop counters */ - arm_status status; /* status of matrix multiplication */ - - (void)pState; - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numCols != pSrcB->numRows) || - (pSrcA->numRows != pDst->numRows) || - (pSrcB->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ - /* row loop */ - do { - /* Output pointer is set to starting address of the row being processed */ - px = pOut + i; - - /* For every row wise process, the column loop counter is to be initiated */ - col = numColsB; - - /* For every row wise process, the pIn2 pointer is set - ** to the starting address of the pSrcB data */ - pIn2 = pSrcB->pData; - - /* column loop */ - do { - /* Set the variable sum, that acts as accumulator, to zero */ - sum = 0; - - /* Initiate the pointer pIn1 to point to the starting address of pSrcA */ - pIn1 = pInA; - - /* Matrix A columns number of MAC operations are to be performed */ - colCnt = numColsA; - - /* matrix multiplication */ - while (colCnt > 0U) { - /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ - /* Perform the multiply-accumulates */ - sum += (q31_t)*pIn1++ * *pIn2; - pIn2 += numColsB; - - /* Decrement the loop counter */ - colCnt--; - } - - /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */ - /* Saturate and store the result in the destination buffer */ - *px++ = (q7_t)__SSAT((sum >> 7), 8); - - /* Decrement the column loop counter */ - col--; - - /* Update the pointer pIn2 to point to the starting address of the next column */ - pIn2 = pInB + (numColsB - col); - - } while (col > 0U); - - /* Update the pointer pSrcA to point to the starting address of the next row */ - i = i + numColsB; - pInA = pInA + numColsA; - - /* Decrement the row loop counter */ - row--; - - } while (row > 0U); - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f16.c deleted file mode 100644 index 43f209c..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f16.c +++ /dev/null @@ -1,208 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_scale_f16.c - * Description: Multiplies a floating-point matrix by a scalar - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixScale - @{ - */ - -/** - @brief Floating-point matrix scaling. - @param[in] pSrc points to input matrix - @param[in] scale scale factor to be applied - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -arm_status arm_mat_scale_f16( - const arm_matrix_instance_f16 * pSrc, - float16_t scale, - arm_matrix_instance_f16 * pDst) -{ - arm_status status; /* status of matrix scaling */ - #ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - float16_t *pIn = pSrc->pData; /* input data matrix pointer */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - f16x8_t vecIn, vecOut, vecScale; - float16_t const *pInVec; - - pInVec = (float16_t const *) pIn; - - vecScale = vdupq_n_f16(scale); - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - blkCnt = numSamples >> 3; - while (blkCnt > 0U) - { - /* - * C(m,n) = A(m,n) * scale - * Scaling and results are stored in the destination buffer. - */ - vecIn = vld1q(pInVec); - pInVec += 8; - - vecOut = vmulq_f16(vecIn, vecScale); - - vst1q(pOut, vecOut); - pOut += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = numSamples & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecIn = vld1q(pInVec); - vecOut = vecIn * scale; - - vstrhq_p(pOut, vecOut, p0); - } - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -} -#else - -arm_status arm_mat_scale_f16( - const arm_matrix_instance_f16 * pSrc, - float16_t scale, - arm_matrix_instance_f16 * pDst) -{ - float16_t *pIn = pSrc->pData; /* Input data matrix pointer */ - float16_t *pOut = pDst->pData; /* Output data matrix pointer */ - uint32_t numSamples; /* Total number of elements in the matrix */ - uint32_t blkCnt; /* Loop counters */ - arm_status status; /* Status of matrix scaling */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numRows) || - (pSrc->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) * scale */ - - /* Scale and store result in destination buffer. */ - *pOut++ = (_Float16)(*pIn++) * (_Float16)scale; - *pOut++ = (_Float16)(*pIn++) * (_Float16)scale; - *pOut++ = (_Float16)(*pIn++) * (_Float16)scale; - *pOut++ = (_Float16)(*pIn++) * (_Float16)scale; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) * scale */ - - /* Scale and store result in destination buffer. */ - *pOut++ = (_Float16)(*pIn++) * (_Float16)scale; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixScale group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c deleted file mode 100644 index 123aaef..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c +++ /dev/null @@ -1,287 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_scale_f32.c - * Description: Multiplies a floating-point matrix by a scalar - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixScale Matrix Scale - - Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the - matrix by the scalar. For example: - \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix" - - The function checks to make sure that the input and output matrices are of the same size. - - In the fixed-point Q15 and Q31 functions, scale is represented by - a fractional multiplication scaleFract and an arithmetic shift shift. - The shift allows the gain of the scaling operation to exceed 1.0. - The overall scale factor applied to the fixed-point data is - 
-      scale = scaleFract * 2^shift.
-
- */ - -/** - @addtogroup MatrixScale - @{ - */ - -/** - @brief Floating-point matrix scaling. - @param[in] pSrc points to input matrix - @param[in] scale scale factor to be applied - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -arm_status arm_mat_scale_f32( - const arm_matrix_instance_f32 * pSrc, - float32_t scale, - arm_matrix_instance_f32 * pDst) -{ - arm_status status; /* status of matrix scaling */ - #ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - f32x4_t vecIn, vecOut; - float32_t const *pInVec; - - pInVec = (float32_t const *) pIn; - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - blkCnt = numSamples >> 2; - while (blkCnt > 0U) - { - /* - * C(m,n) = A(m,n) * scale - * Scaling and results are stored in the destination buffer. - */ - vecIn = vld1q(pInVec); - pInVec += 4; - - vecOut = vecIn * scale; - - vst1q(pOut, vecOut); - pOut += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = numSamples & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecIn = vld1q(pInVec); - vecOut = vecIn * scale; - - vstrwq_p(pOut, vecOut, p0); - } - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); - -} -#else -#if defined(ARM_MATH_NEON_EXPERIMENTAL) -arm_status arm_mat_scale_f32( - const arm_matrix_instance_f32 * pSrc, - float32_t scale, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix scaling */ - - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - float32x4_t vec1; - float32x4_t res; - - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - - blkCnt = numSamples >> 2; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) * scale */ - /* Scaling and results are stored in the destination buffer. */ - vec1 = vld1q_f32(pIn); - res = vmulq_f32(vec1, vdupq_n_f32(scale)); - vst1q_f32(pOut, res); - - /* update pointers to process next sampels */ - pIn += 4U; - pOut += 4U; - - /* Decrement the numSamples loop counter */ - blkCnt--; - } - - /* If the numSamples is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) * scale */ - /* The results are stored in the destination buffer. */ - *pOut++ = (*pIn++) * scale; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#else -arm_status arm_mat_scale_f32( - const arm_matrix_instance_f32 * pSrc, - float32_t scale, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* Input data matrix pointer */ - float32_t *pOut = pDst->pData; /* Output data matrix pointer */ - uint32_t numSamples; /* Total number of elements in the matrix */ - uint32_t blkCnt; /* Loop counters */ - arm_status status; /* Status of matrix scaling */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numRows) || - (pSrc->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) * scale */ - - /* Scale and store result in destination buffer. */ - *pOut++ = (*pIn++) * scale; - *pOut++ = (*pIn++) * scale; - *pOut++ = (*pIn++) * scale; - *pOut++ = (*pIn++) * scale; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) * scale */ - - /* Scale and store result in destination buffer. */ - *pOut++ = (*pIn++) * scale; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixScale group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c deleted file mode 100644 index 1af251e..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c +++ /dev/null @@ -1,249 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_scale_q15.c - * Description: Multiplies a Q15 matrix by a scalar - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixScale - @{ - */ - -/** - @brief Q15 matrix scaling. - @param[in] pSrc points to input matrix - @param[in] scaleFract fractional portion of the scale factor - @param[in] shift number of bits to shift the result by - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The input data *pSrc and scaleFract are in 1.15 format. - These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -arm_status arm_mat_scale_q15( - const arm_matrix_instance_q15 * pSrc, - q15_t scaleFract, - int32_t shift, - arm_matrix_instance_q15 * pDst) -{ - arm_status status; /* Status of matrix scaling */ - q15_t *pIn = pSrc->pData; /* input data matrix pointer */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecIn, vecOut; - q15_t const *pInVec; - int32_t totShift = shift + 1; /* shift to apply after scaling */ - - pInVec = (q15_t const *) pIn; - - #ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numRows) || - (pSrc->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - blkCnt = numSamples >> 3; - while (blkCnt > 0U) - { - /* - * C(m,n) = A(m,n) * scale - * Scaling and results are stored in the destination buffer. - */ - vecIn = vld1q(pInVec); pInVec += 8; - - /* multiply input with scaler value */ - vecOut = vmulhq(vecIn, vdupq_n_s16(scaleFract)); - /* apply shifting */ - vecOut = vqshlq_r(vecOut, totShift); - - vst1q(pOut, vecOut); pOut += 8; - - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numSamples & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecIn = vld1q(pInVec); pInVec += 8; - vecOut = vmulhq(vecIn, vdupq_n_s16(scaleFract)); - vecOut = vqshlq_r(vecOut, totShift); - vstrhq_p(pOut, vecOut, p0); - } - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_scale_q15( - const arm_matrix_instance_q15 * pSrc, - q15_t scaleFract, - int32_t shift, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pIn = pSrc->pData; /* Input data matrix pointer */ - q15_t *pOut = pDst->pData; /* Output data matrix pointer */ - uint32_t numSamples; /* Total number of elements in the matrix */ - uint32_t blkCnt; /* Loop counter */ - arm_status status; /* Status of matrix scaling */ - int32_t kShift = 15 - shift; /* Total shift to apply after scaling */ - -#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) - q31_t inA1, inA2; - q31_t out1, out2, out3, out4; /* Temporary output variables */ - q15_t in1, in2, in3, in4; /* Temporary input variables */ -#endif - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numRows) || - (pSrc->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) * k */ - -#if defined (ARM_MATH_DSP) - /* read 2 times 2 samples at a time from source */ - inA1 = read_q15x2_ia (&pIn); - inA2 = read_q15x2_ia (&pIn); - - /* Scale inputs and store result in temporary variables - * in single cycle by packing the outputs */ - out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract); - out2 = (q31_t) ((q15_t) (inA1 ) * scaleFract); - out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract); - out4 = (q31_t) ((q15_t) (inA2 ) * scaleFract); - - /* apply shifting */ - out1 = out1 >> kShift; - out2 = out2 >> kShift; - out3 = out3 >> kShift; - out4 = out4 >> kShift; - - /* saturate the output */ - in1 = (q15_t) (__SSAT(out1, 16)); - in2 = (q15_t) (__SSAT(out2, 16)); - in3 = (q15_t) (__SSAT(out3, 16)); - in4 = (q15_t) (__SSAT(out4, 16)); - - /* store result to destination */ - write_q15x2_ia (&pOut, __PKHBT(in2, in1, 16)); - write_q15x2_ia (&pOut, __PKHBT(in4, in3, 16)); - -#else - *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16)); - *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16)); - *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16)); - *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16)); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) * k */ - - /* Scale, saturate and store result in destination buffer. */ - *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16)); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixScale group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c deleted file mode 100644 index 487f740..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c +++ /dev/null @@ -1,242 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_scale_q31.c - * Description: Multiplies a Q31 matrix by a scalar - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixScale - @{ - */ - -/** - @brief Q31 matrix scaling. - @param[in] pSrc points to input matrix - @param[in] scaleFract fractional portion of the scale factor - @param[in] shift number of bits to shift the result by - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The input data *pSrc and scaleFract are in 1.31 format. - These are multiplied to yield a 2.62 intermediate result which is shifted with saturation to 1.31 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -arm_status arm_mat_scale_q31( - const arm_matrix_instance_q31 * pSrc, - q31_t scaleFract, - int32_t shift, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn = pSrc->pData; /* input data matrix pointer */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecIn, vecOut; - q31_t const *pInVec; - int32_t totShift = shift + 1; /* shift to apply after scaling */ - arm_status status; /* Status of matrix scaling */ - - pInVec = (q31_t const *) pIn; - #ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numRows) || - (pSrc->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - blkCnt = numSamples >> 2; - while (blkCnt > 0U) - { - /* - * C(m,n) = A(m,n) * scale - * Scaling and results are stored in the destination buffer. - */ - vecIn = vld1q(pInVec); - pInVec += 4; - /* multiply input with scaler value */ - vecOut = vmulhq(vecIn, vdupq_n_s32(scaleFract)); - /* apply shifting */ - vecOut = vqshlq_r(vecOut, totShift); - - vst1q(pOut, vecOut); - pOut += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = numSamples & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecIn = vld1q(pInVec); - pInVec += 4; - vecOut = vmulhq(vecIn, vdupq_n_s32(scaleFract)); - vecOut = vqshlq_r(vecOut, totShift); - vstrwq_p(pOut, vecOut, p0); - } - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_scale_q31( - const arm_matrix_instance_q31 * pSrc, - q31_t scaleFract, - int32_t shift, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn = pSrc->pData; /* Input data matrix pointer */ - q31_t *pOut = pDst->pData; /* Output data matrix pointer */ - uint32_t numSamples; /* Total number of elements in the matrix */ - uint32_t blkCnt; /* Loop counter */ - arm_status status; /* Status of matrix scaling */ - int32_t kShift = shift + 1; /* Shift to apply after scaling */ - q31_t in, out; /* Temporary variabels */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numRows) || - (pSrc->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) * k */ - - /* Scale, saturate and store result in destination buffer. */ - in = *pIn++; /* read four inputs from source */ - in = ((q63_t) in * scaleFract) >> 32; /* multiply input with scaler value */ - out = in << kShift; /* apply shifting */ - if (in != (out >> kShift)) /* saturate the results. */ - out = 0x7FFFFFFF ^ (in >> 31); - *pOut++ = out; /* Store result destination */ - - in = *pIn++; - in = ((q63_t) in * scaleFract) >> 32; - out = in << kShift; - if (in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - *pOut++ = out; - - in = *pIn++; - in = ((q63_t) in * scaleFract) >> 32; - out = in << kShift; - if (in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - *pOut++ = out; - - in = *pIn++; - in = ((q63_t) in * scaleFract) >> 32; - out = in << kShift; - if (in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - *pOut++ = out; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) * k */ - - /* Scale, saturate and store result in destination buffer. */ - in = *pIn++; - in = ((q63_t) in * scaleFract) >> 32; - out = in << kShift; - if (in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - *pOut++ = out; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixScale group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f16.c deleted file mode 100644 index d17e26b..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f16.c +++ /dev/null @@ -1,234 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_solve_lower_triangular_f16.c - * Description: Solve linear system LT X = A with LT lower triangular matrix - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixInv - @{ - */ - - - /** - * @brief Solve LT . X = A where LT is a lower triangular matrix - * @param[in] lt The lower triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of LT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - arm_status arm_mat_solve_lower_triangular_f16( - const arm_matrix_instance_f16 * lt, - const arm_matrix_instance_f16 * a, - arm_matrix_instance_f16 * dst) - { - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((lt->numRows != lt->numCols) || - (lt->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* a1 b1 c1 x1 = a1 - b2 c2 x2 a2 - c3 x3 a3 - - x3 = a3 / c3 - x2 = (a2 - c2 x3) / b2 - - */ - int i,j,k,n,cols; - - n = dst->numRows; - cols = dst->numCols; - - float16_t *pX = dst->pData; - float16_t *pLT = lt->pData; - float16_t *pA = a->pData; - - float16_t *lt_row; - float16_t *a_col; - - _Float16 invLT; - - f16x8_t vecA; - f16x8_t vecX; - - for(i=0; i < n ; i++) - { - - for(j=0; j+7 < cols; j += 8) - { - vecA = vld1q_f16(&pA[i * cols + j]); - - for(k=0; k < i; k++) - { - vecX = vld1q_f16(&pX[cols*k+j]); - vecA = vfmsq(vecA,vdupq_n_f16(pLT[n*i + k]),vecX); - } - - if ((_Float16)pLT[n*i + i]==0.0f16) - { - return(ARM_MATH_SINGULAR); - } - - invLT = 1.0f16 / (_Float16)pLT[n*i + i]; - vecA = vmulq(vecA,vdupq_n_f16(invLT)); - vst1q(&pX[i*cols+j],vecA); - - } - - for(; j < cols; j ++) - { - a_col = &pA[j]; - lt_row = &pLT[n*i]; - - _Float16 tmp=a_col[i * cols]; - - for(k=0; k < i; k++) - { - tmp -= (_Float16)lt_row[k] * (_Float16)pX[cols*k+j]; - } - - if ((_Float16)lt_row[i]==0.0f16) - { - return(ARM_MATH_SINGULAR); - } - tmp = tmp / (_Float16)lt_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - /* Return to application */ - return (status); -} - -#else - arm_status arm_mat_solve_lower_triangular_f16( - const arm_matrix_instance_f16 * lt, - const arm_matrix_instance_f16 * a, - arm_matrix_instance_f16 * dst) - { - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((lt->numRows != lt->numCols) || - (lt->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* a1 b1 c1 x1 = a1 - b2 c2 x2 a2 - c3 x3 a3 - - x3 = a3 / c3 - x2 = (a2 - c2 x3) / b2 - - */ - int i,j,k,n,cols; - - n = dst->numRows; - cols = dst->numCols; - - float16_t *pX = dst->pData; - float16_t *pLT = lt->pData; - float16_t *pA = a->pData; - - float16_t *lt_row; - float16_t *a_col; - - for(j=0; j < cols; j ++) - { - a_col = &pA[j]; - - for(i=0; i < n ; i++) - { - lt_row = &pLT[n*i]; - - float16_t tmp=a_col[i * cols]; - - for(k=0; k < i; k++) - { - tmp -= (_Float16)lt_row[k] * (_Float16)pX[cols*k+j]; - } - - if ((_Float16)lt_row[i]==0.0f16) - { - return(ARM_MATH_SINGULAR); - } - tmp = (_Float16)tmp / (_Float16)lt_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixInv group - */ -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f32.c deleted file mode 100644 index fccba8f..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f32.c +++ /dev/null @@ -1,333 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_solve_lower_triangular_f32.c - * Description: Solve linear system LT X = A with LT lower triangular matrix - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixInv - @{ - */ - - - /** - * @brief Solve LT . X = A where LT is a lower triangular matrix - * @param[in] lt The lower triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of LT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - arm_status arm_mat_solve_lower_triangular_f32( - const arm_matrix_instance_f32 * lt, - const arm_matrix_instance_f32 * a, - arm_matrix_instance_f32 * dst) - { - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((lt->numRows != lt->numCols) || - (lt->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* a1 b1 c1 x1 = a1 - b2 c2 x2 a2 - c3 x3 a3 - - x3 = a3 / c3 - x2 = (a2 - c2 x3) / b2 - - */ - int i,j,k,n,cols; - - n = dst->numRows; - cols = dst->numCols; - - float32_t *pX = dst->pData; - float32_t *pLT = lt->pData; - float32_t *pA = a->pData; - - float32_t *lt_row; - float32_t *a_col; - - float32_t invLT; - - f32x4_t vecA; - f32x4_t vecX; - - for(i=0; i < n ; i++) - { - - for(j=0; j+3 < cols; j += 4) - { - vecA = vld1q_f32(&pA[i * cols + j]); - - for(k=0; k < i; k++) - { - vecX = vld1q_f32(&pX[cols*k+j]); - vecA = vfmsq(vecA,vdupq_n_f32(pLT[n*i + k]),vecX); - } - - if (pLT[n*i + i]==0.0f) - { - return(ARM_MATH_SINGULAR); - } - - invLT = 1.0f / pLT[n*i + i]; - vecA = vmulq(vecA,vdupq_n_f32(invLT)); - vst1q(&pX[i*cols+j],vecA); - - } - - for(; j < cols; j ++) - { - a_col = &pA[j]; - lt_row = &pLT[n*i]; - - float32_t tmp=a_col[i * cols]; - - for(k=0; k < i; k++) - { - tmp -= lt_row[k] * pX[cols*k+j]; - } - - if (lt_row[i]==0.0f) - { - return(ARM_MATH_SINGULAR); - } - tmp = tmp / lt_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - /* Return to application */ - return (status); -} -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - arm_status arm_mat_solve_lower_triangular_f32( - const arm_matrix_instance_f32 * lt, - const arm_matrix_instance_f32 * a, - arm_matrix_instance_f32 * dst) - { - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((lt->numRows != lt->numCols) || - (lt->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* a1 b1 c1 x1 = a1 - b2 c2 x2 a2 - c3 x3 a3 - - x3 = a3 / c3 - x2 = (a2 - c2 x3) / b2 - - */ - int i,j,k,n,cols; - - n = dst->numRows; - cols = dst->numCols; - - float32_t *pX = dst->pData; - float32_t *pLT = lt->pData; - float32_t *pA = a->pData; - - float32_t *lt_row; - float32_t *a_col; - - float32_t invLT; - - f32x4_t vecA; - f32x4_t vecX; - - for(i=0; i < n ; i++) - { - - for(j=0; j+3 < cols; j += 4) - { - vecA = vld1q_f32(&pA[i * cols + j]); - - for(k=0; k < i; k++) - { - vecX = vld1q_f32(&pX[cols*k+j]); - vecA = vfmsq_f32(vecA,vdupq_n_f32(pLT[n*i + k]),vecX); - } - - if (pLT[n*i + i]==0.0f) - { - return(ARM_MATH_SINGULAR); - } - - invLT = 1.0f / pLT[n*i + i]; - vecA = vmulq_f32(vecA,vdupq_n_f32(invLT)); - vst1q_f32(&pX[i*cols+j],vecA); - - } - - for(; j < cols; j ++) - { - a_col = &pA[j]; - lt_row = &pLT[n*i]; - - float32_t tmp=a_col[i * cols]; - - for(k=0; k < i; k++) - { - tmp -= lt_row[k] * pX[cols*k+j]; - } - - if (lt_row[i]==0.0f) - { - return(ARM_MATH_SINGULAR); - } - tmp = tmp / lt_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - /* Return to application */ - return (status); -} -#else - arm_status arm_mat_solve_lower_triangular_f32( - const arm_matrix_instance_f32 * lt, - const arm_matrix_instance_f32 * a, - arm_matrix_instance_f32 * dst) - { - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((lt->numRows != lt->numCols) || - (lt->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* a1 b1 c1 x1 = a1 - b2 c2 x2 a2 - c3 x3 a3 - - x3 = a3 / c3 - x2 = (a2 - c2 x3) / b2 - - */ - int i,j,k,n,cols; - - float32_t *pX = dst->pData; - float32_t *pLT = lt->pData; - float32_t *pA = a->pData; - - float32_t *lt_row; - float32_t *a_col; - - n = dst->numRows; - cols = dst -> numCols; - - - for(j=0; j < cols; j ++) - { - a_col = &pA[j]; - - for(i=0; i < n ; i++) - { - float32_t tmp=a_col[i * cols]; - - lt_row = &pLT[n*i]; - - for(k=0; k < i; k++) - { - tmp -= lt_row[k] * pX[cols*k+j]; - } - - if (lt_row[i]==0.0f) - { - return(ARM_MATH_SINGULAR); - } - tmp = tmp / lt_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - /* Return to application */ - return (status); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixInv group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f64.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f64.c deleted file mode 100644 index 25433ec..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f64.c +++ /dev/null @@ -1,124 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_solve_lower_triangular_f64.c - * Description: Solve linear system LT X = A with LT lower triangular matrix - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixInv - @{ - */ - - - /** - * @brief Solve LT . X = A where LT is a lower triangular matrix - * @param[in] lt The lower triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of LT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - arm_status arm_mat_solve_lower_triangular_f64( - const arm_matrix_instance_f64 * lt, - const arm_matrix_instance_f64 * a, - arm_matrix_instance_f64 * dst) - { - arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((lt->numRows != lt->numCols) || - (lt->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* a1 b1 c1 x1 = a1 - b2 c2 x2 a2 - c3 x3 a3 - - x3 = a3 / c3 - x2 = (a2 - c2 x3) / b2 - - */ - int i,j,k,n,cols; - - float64_t *pX = dst->pData; - float64_t *pLT = lt->pData; - float64_t *pA = a->pData; - - float64_t *lt_row; - float64_t *a_col; - - n = dst->numRows; - cols = dst->numCols; - - for(j=0; j < cols; j ++) - { - a_col = &pA[j]; - - for(i=0; i < n ; i++) - { - float64_t tmp=a_col[i * cols]; - - lt_row = &pLT[n*i]; - - for(k=0; k < i; k++) - { - tmp -= lt_row[k] * pX[cols*k+j]; - } - - if (lt_row[i]==0.0) - { - return(ARM_MATH_SINGULAR); - } - tmp = tmp / lt_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - /* Return to application */ - return (status); -} -/** - @} end of MatrixInv group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f16.c deleted file mode 100644 index dead982..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f16.c +++ /dev/null @@ -1,226 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_solve_upper_triangular_f16.c - * Description: Solve linear system UT X = A with UT upper triangular matrix - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixInv - @{ - */ - -/** - * @brief Solve UT . X = A where UT is an upper triangular matrix - * @param[in] ut The upper triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of UT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - arm_status arm_mat_solve_upper_triangular_f16( - const arm_matrix_instance_f16 * ut, - const arm_matrix_instance_f16 * a, - arm_matrix_instance_f16 * dst) - { -arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((ut->numRows != ut->numCols) || - (ut->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - int i,j,k,n,cols; - - n = dst->numRows; - cols = dst->numCols; - - float16_t *pX = dst->pData; - float16_t *pUT = ut->pData; - float16_t *pA = a->pData; - - float16_t *ut_row; - float16_t *a_col; - - _Float16 invUT; - - f16x8_t vecA; - f16x8_t vecX; - - for(i=n-1; i >= 0 ; i--) - { - for(j=0; j+7 < cols; j +=8) - { - vecA = vld1q_f16(&pA[i * cols + j]); - - for(k=n-1; k > i; k--) - { - vecX = vld1q_f16(&pX[cols*k+j]); - vecA = vfmsq(vecA,vdupq_n_f16(pUT[n*i + k]),vecX); - } - - if ((_Float16)pUT[n*i + i]==0.0f16) - { - return(ARM_MATH_SINGULAR); - } - - invUT = 1.0f16 / (_Float16)pUT[n*i + i]; - vecA = vmulq(vecA,vdupq_n_f16(invUT)); - - - vst1q(&pX[i*cols+j],vecA); - } - - for(; j < cols; j ++) - { - a_col = &pA[j]; - - ut_row = &pUT[n*i]; - - _Float16 tmp=a_col[i * cols]; - - for(k=n-1; k > i; k--) - { - tmp -= (_Float16)ut_row[k] * (_Float16)pX[cols*k+j]; - } - - if ((_Float16)ut_row[i]==0.0f16) - { - return(ARM_MATH_SINGULAR); - } - tmp = tmp / (_Float16)ut_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - -#else - arm_status arm_mat_solve_upper_triangular_f16( - const arm_matrix_instance_f16 * ut, - const arm_matrix_instance_f16 * a, - arm_matrix_instance_f16 * dst) - { -arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((ut->numRows != ut->numCols) || - (ut->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - int i,j,k,n,cols; - - n = dst->numRows; - cols = dst->numCols; - - float16_t *pX = dst->pData; - float16_t *pUT = ut->pData; - float16_t *pA = a->pData; - - float16_t *ut_row; - float16_t *a_col; - - for(j=0; j < cols; j ++) - { - a_col = &pA[j]; - - for(i=n-1; i >= 0 ; i--) - { - ut_row = &pUT[n*i]; - - float16_t tmp=a_col[i * cols]; - - for(k=n-1; k > i; k--) - { - tmp -= (_Float16)ut_row[k] * (_Float16)pX[cols*k+j]; - } - - if ((_Float16)ut_row[i]==0.0f16) - { - return(ARM_MATH_SINGULAR); - } - tmp = (_Float16)tmp / (_Float16)ut_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixInv group - */ -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f32.c deleted file mode 100644 index e096af1..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f32.c +++ /dev/null @@ -1,319 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_solve_upper_triangular_f32.c - * Description: Solve linear system UT X = A with UT upper triangular matrix - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixInv - @{ - */ - -/** - * @brief Solve UT . X = A where UT is an upper triangular matrix - * @param[in] ut The upper triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of UT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - arm_status arm_mat_solve_upper_triangular_f32( - const arm_matrix_instance_f32 * ut, - const arm_matrix_instance_f32 * a, - arm_matrix_instance_f32 * dst) - { -arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((ut->numRows != ut->numCols) || - (ut->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - int i,j,k,n,cols; - - n = dst->numRows; - cols = dst->numCols; - - float32_t *pX = dst->pData; - float32_t *pUT = ut->pData; - float32_t *pA = a->pData; - - float32_t *ut_row; - float32_t *a_col; - - float32_t invUT; - - f32x4_t vecA; - f32x4_t vecX; - - for(i=n-1; i >= 0 ; i--) - { - for(j=0; j+3 < cols; j +=4) - { - vecA = vld1q_f32(&pA[i * cols + j]); - - for(k=n-1; k > i; k--) - { - vecX = vld1q_f32(&pX[cols*k+j]); - vecA = vfmsq(vecA,vdupq_n_f32(pUT[n*i + k]),vecX); - } - - if (pUT[n*i + i]==0.0f) - { - return(ARM_MATH_SINGULAR); - } - - invUT = 1.0f / pUT[n*i + i]; - vecA = vmulq(vecA,vdupq_n_f32(invUT)); - - - vst1q(&pX[i*cols+j],vecA); - } - - for(; j < cols; j ++) - { - a_col = &pA[j]; - - ut_row = &pUT[n*i]; - - float32_t tmp=a_col[i * cols]; - - for(k=n-1; k > i; k--) - { - tmp -= ut_row[k] * pX[cols*k+j]; - } - - if (ut_row[i]==0.0f) - { - return(ARM_MATH_SINGULAR); - } - tmp = tmp / ut_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - arm_status arm_mat_solve_upper_triangular_f32( - const arm_matrix_instance_f32 * ut, - const arm_matrix_instance_f32 * a, - arm_matrix_instance_f32 * dst) - { -arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((ut->numRows != ut->numCols) || - (ut->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - int i,j,k,n,cols; - - n = dst->numRows; - cols = dst->numCols; - - float32_t *pX = dst->pData; - float32_t *pUT = ut->pData; - float32_t *pA = a->pData; - - float32_t *ut_row; - float32_t *a_col; - - float32_t invUT; - - f32x4_t vecA; - f32x4_t vecX; - - for(i=n-1; i >= 0 ; i--) - { - for(j=0; j+3 < cols; j +=4) - { - vecA = vld1q_f32(&pA[i * cols + j]); - - for(k=n-1; k > i; k--) - { - vecX = vld1q_f32(&pX[cols*k+j]); - vecA = vfmsq_f32(vecA,vdupq_n_f32(pUT[n*i + k]),vecX); - } - - if (pUT[n*i + i]==0.0f) - { - return(ARM_MATH_SINGULAR); - } - - invUT = 1.0f / pUT[n*i + i]; - vecA = vmulq_f32(vecA,vdupq_n_f32(invUT)); - - - vst1q_f32(&pX[i*cols+j],vecA); - } - - for(; j < cols; j ++) - { - a_col = &pA[j]; - - ut_row = &pUT[n*i]; - - float32_t tmp=a_col[i * cols]; - - for(k=n-1; k > i; k--) - { - tmp -= ut_row[k] * pX[cols*k+j]; - } - - if (ut_row[i]==0.0f) - { - return(ARM_MATH_SINGULAR); - } - tmp = tmp / ut_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - -#else - arm_status arm_mat_solve_upper_triangular_f32( - const arm_matrix_instance_f32 * ut, - const arm_matrix_instance_f32 * a, - arm_matrix_instance_f32 * dst) - { -arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((ut->numRows != ut->numCols) || - (ut->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - int i,j,k,n,cols; - - float32_t *pX = dst->pData; - float32_t *pUT = ut->pData; - float32_t *pA = a->pData; - - float32_t *ut_row; - float32_t *a_col; - - n = dst->numRows; - cols = dst->numCols; - - for(j=0; j < cols; j ++) - { - a_col = &pA[j]; - - for(i=n-1; i >= 0 ; i--) - { - float32_t tmp=a_col[i * cols]; - - ut_row = &pUT[n*i]; - - for(k=n-1; k > i; k--) - { - tmp -= ut_row[k] * pX[cols*k+j]; - } - - if (ut_row[i]==0.0f) - { - return(ARM_MATH_SINGULAR); - } - tmp = tmp / ut_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixInv group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f64.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f64.c deleted file mode 100644 index 9c5f85a..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f64.c +++ /dev/null @@ -1,120 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_solve_upper_triangular_f64.c - * Description: Solve linear system UT X = A with UT upper triangular matrix - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixInv - @{ - */ - -/** - * @brief Solve UT . X = A where UT is an upper triangular matrix - * @param[in] ut The upper triangular matrix - * @param[in] a The matrix a - * @param[out] dst The solution X of UT . X = A - * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved. - */ - arm_status arm_mat_solve_upper_triangular_f64( - const arm_matrix_instance_f64 * ut, - const arm_matrix_instance_f64 * a, - arm_matrix_instance_f64 * dst) - { -arm_status status; /* status of matrix inverse */ - - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((ut->numRows != ut->numCols) || - (ut->numRows != a->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - - int i,j,k,n,cols; - - float64_t *pX = dst->pData; - float64_t *pUT = ut->pData; - float64_t *pA = a->pData; - - float64_t *ut_row; - float64_t *a_col; - - n = dst->numRows; - cols = dst->numCols; - - for(j=0; j < cols; j ++) - { - a_col = &pA[j]; - - for(i=n-1; i >= 0 ; i--) - { - float64_t tmp=a_col[i * cols]; - - ut_row = &pUT[n*i]; - - for(k=n-1; k > i; k--) - { - tmp -= ut_row[k] * pX[cols*k+j]; - } - - if (ut_row[i]==0.0) - { - return(ARM_MATH_SINGULAR); - } - tmp = tmp / ut_row[i]; - pX[i*cols+j] = tmp; - } - - } - status = ARM_MATH_SUCCESS; - - } - - - /* Return to application */ - return (status); -} - - -/** - @} end of MatrixInv group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f16.c deleted file mode 100644 index 0b4514c..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f16.c +++ /dev/null @@ -1,215 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_sub_f16.c - * Description: Floating-point matrix subtraction - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupMatrix - */ - - -/** - @addtogroup MatrixSub - @{ - */ - -/** - @brief Floating-point matrix subtraction. - @param[in] pSrcA points to the first input matrix structure - @param[in] pSrcB points to the second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -arm_status arm_mat_sub_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ - arm_status status; /* status of matrix subtraction */ - uint32_t numSamples; /* total number of elements in the matrix */ - float16_t *pDataA, *pDataB, *pDataDst; - f16x8_t vecA, vecB, vecDst; - float16_t const *pSrcAVec; - float16_t const *pSrcBVec; - uint32_t blkCnt; /* loop counters */ - - pDataA = pSrcA->pData; - pDataB = pSrcB->pData; - pDataDst = pDst->pData; - pSrcAVec = (float16_t const *) pDataA; - pSrcBVec = (float16_t const *) pDataB; - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - blkCnt = numSamples >> 3; - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* sub and then store the results in the destination buffer. */ - vecA = vld1q(pSrcAVec); - pSrcAVec += 8; - vecB = vld1q(pSrcBVec); - pSrcBVec += 8; - vecDst = vsubq(vecA, vecB); - vst1q(pDataDst, vecDst); - pDataDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numSamples & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcAVec); - vecB = vld1q(pSrcBVec); - vecDst = vsubq_m(vecDst, vecA, vecB, p0); - vstrhq_p(pDataDst, vecDst, p0); - } - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else - -arm_status arm_mat_sub_f16( - const arm_matrix_instance_f16 * pSrcA, - const arm_matrix_instance_f16 * pSrcB, - arm_matrix_instance_f16 * pDst) -{ - float16_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float16_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - - /* Subtract and store result in destination buffer. */ - *pOut++ = (_Float16)(*pInA++) - (_Float16)(*pInB++); - *pOut++ = (_Float16)(*pInA++) - (_Float16)(*pInB++); - *pOut++ = (_Float16)(*pInA++) - (_Float16)(*pInB++); - *pOut++ = (_Float16)(*pInA++) - (_Float16)(*pInB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - - /* Subtract and store result in destination buffer. */ - *pOut++ = (_Float16)(*pInA++) - (_Float16)(*pInB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixSub group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c deleted file mode 100644 index ee9d439..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c +++ /dev/null @@ -1,298 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_sub_f32.c - * Description: Floating-point matrix subtraction - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixSub Matrix Subtraction - - Subtract two matrices. - \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices" - - The functions check to make sure that - pSrcA, pSrcB, and pDst have the same - number of rows and columns. - */ - -/** - @addtogroup MatrixSub - @{ - */ - -/** - @brief Floating-point matrix subtraction. - @param[in] pSrcA points to the first input matrix structure - @param[in] pSrcB points to the second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -arm_status arm_mat_sub_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - arm_status status; /* status of matrix subtraction */ - uint32_t numSamples; /* total number of elements in the matrix */ - float32_t *pDataA, *pDataB, *pDataDst; - f32x4_t vecA, vecB, vecDst; - float32_t const *pSrcAVec; - float32_t const *pSrcBVec; - uint32_t blkCnt; /* loop counters */ - - pDataA = pSrcA->pData; - pDataB = pSrcB->pData; - pDataDst = pDst->pData; - pSrcAVec = (float32_t const *) pDataA; - pSrcBVec = (float32_t const *) pDataB; - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - blkCnt = numSamples >> 2; - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* sub and then store the results in the destination buffer. */ - vecA = vld1q(pSrcAVec); - pSrcAVec += 4; - vecB = vld1q(pSrcBVec); - pSrcBVec += 4; - vecDst = vsubq(vecA, vecB); - vst1q(pDataDst, vecDst); - pDataDst += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numSamples & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcAVec); - vecB = vld1q(pSrcBVec); - vecDst = vsubq_m(vecDst, vecA, vecB, p0); - vstrwq_p(pDataDst, vecDst, p0); - } - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else -#if defined(ARM_MATH_NEON) -arm_status arm_mat_sub_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - float32x4_t vec1; - float32x4_t vec2; - float32x4_t res; - - /* Total number of samples in the input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - - blkCnt = numSamples >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - /* Subtract and then store the results in the destination buffer. */ - /* Read values from source A */ - vec1 = vld1q_f32(pIn1); - vec2 = vld1q_f32(pIn2); - res = vsubq_f32(vec1, vec2); - vst1q_f32(pOut, res); - - /* Update pointers to process next samples */ - pIn1 += 4U; - pIn2 += 4U; - pOut += 4U; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the numSamples is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = numSamples % 0x4U; - - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - /* Subtract and then store the results in the destination buffer. */ - *pOut++ = (*pIn1++) - (*pIn2++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#else -arm_status arm_mat_sub_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - - /* Subtract and store result in destination buffer. */ - *pOut++ = (*pInA++) - (*pInB++); - *pOut++ = (*pInA++) - (*pInB++); - *pOut++ = (*pInA++) - (*pInB++); - *pOut++ = (*pInA++) - (*pInB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - - /* Subtract and store result in destination buffer. */ - *pOut++ = (*pInA++) - (*pInB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of MatrixSub group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f64.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f64.c deleted file mode 100644 index 19bfa14..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f64.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_sub_f64.c - * Description: Floating-point matrix subtraction - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixSub Matrix Subtraction - - Subtract two matrices. - \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices" - - The functions check to make sure that - pSrcA, pSrcB, and pDst have the same - number of rows and columns. - */ - -/** - @addtogroup MatrixSub - @{ - */ - -/** - @brief Floating-point matrix subtraction. - @param[in] pSrcA points to the first input matrix structure - @param[in] pSrcB points to the second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ - -arm_status arm_mat_sub_f64( - const arm_matrix_instance_f64 * pSrcA, - const arm_matrix_instance_f64 * pSrcB, - arm_matrix_instance_f64 * pDst) -{ - float64_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - float64_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - float64_t *pOut = pDst->pData; /* output data matrix pointer */ - - uint64_t numSamples; /* total number of elements in the matrix */ - uint64_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint64_t) pSrcA->numRows * pSrcA->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - - /* Subtract and store result in destination buffer. */ - *pOut++ = (*pInA++) - (*pInB++); - *pOut++ = (*pInA++) - (*pInB++); - *pOut++ = (*pInA++) - (*pInB++); - *pOut++ = (*pInA++) - (*pInB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - - /* Subtract and store result in destination buffer. */ - *pOut++ = (*pInA++) - (*pInB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - @} end of MatrixSub group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c deleted file mode 100644 index 5de3d7e..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c +++ /dev/null @@ -1,219 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_sub_q15.c - * Description: Q15 Matrix subtraction - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixSub - @{ - */ - -/** - @brief Q15 matrix subtraction. - @param[in] pSrcA points to the first input matrix structure - @param[in] pSrcB points to the second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -arm_status arm_mat_sub_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst) -{ - uint32_t numSamples; /* total number of elements in the matrix */ - q15_t *pDataA, *pDataB, *pDataDst; - q15x8_t vecA, vecB, vecDst; - q15_t const *pSrcAVec; - q15_t const *pSrcBVec; - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - - - pDataA = pSrcA->pData; - pDataB = pSrcB->pData; - pDataDst = pDst->pData; - pSrcAVec = (q15_t const *) pDataA; - pSrcBVec = (q15_t const *) pDataB; - - #ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - blkCnt = numSamples >> 3; - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* sub and then store the results in the destination buffer. */ - vecA = vld1q(pSrcAVec); pSrcAVec += 8; - vecB = vld1q(pSrcBVec); pSrcBVec += 8; - vecDst = vqsubq(vecA, vecB); - vst1q(pDataDst, vecDst); pDataDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = numSamples & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcAVec); pSrcAVec += 8; - vecB = vld1q(pSrcBVec); pSrcBVec += 8; - vecDst = vqsubq_m(vecDst, vecA, vecB, p0); - vstrhq_p(pDataDst, vecDst, p0); - } - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_sub_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - - /* Subtract, Saturate and store result in destination buffer. */ -#if defined (ARM_MATH_DSP) - write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB))); - write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB))); -#else - *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); - *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); - *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); - *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - - /* Subtract and store result in destination buffer. */ -#if defined (ARM_MATH_DSP) - *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++); -#else - *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); -#endif - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixSub group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c deleted file mode 100644 index ab729ba..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c +++ /dev/null @@ -1,218 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_sub_q31.c - * Description: Q31 matrix subtraction - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixSub - @{ - */ - -/** - @brief Q31 matrix subtraction. - @param[in] pSrcA points to the first input matrix structure - @param[in] pSrcB points to the second input matrix structure - @param[out] pDst points to output matrix structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -arm_status arm_mat_sub_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - uint32_t numSamples; /* total number of elements in the matrix */ - q31_t *pDataA, *pDataB, *pDataDst; - q31x4_t vecA, vecB, vecDst; - q31_t const *pSrcAVec; - q31_t const *pSrcBVec; - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - - pDataA = pSrcA->pData; - pDataB = pSrcB->pData; - pDataDst = pDst->pData; - pSrcAVec = (q31_t const *) pDataA; - pSrcBVec = (q31_t const *) pDataB; - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - - /* - * Total number of samples in the input matrix - */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - blkCnt = numSamples >> 2; - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) + B(m,n) */ - /* sub and then store the results in the destination buffer. */ - vecA = vld1q(pSrcAVec); - pSrcAVec += 4; - vecB = vld1q(pSrcBVec); - pSrcBVec += 4; - vecDst = vqsubq(vecA, vecB); - vst1q(pDataDst, vecDst); - pDataDst += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = numSamples & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcAVec); - pSrcAVec += 4; - vecB = vld1q(pSrcBVec); - pSrcBVec += 4; - vecDst = vqsubq_m(vecDst, vecA, vecB, p0); - vstrwq_p(pDataDst, vecDst, p0); - } - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else -arm_status arm_mat_sub_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ - q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - - uint32_t numSamples; /* total number of elements in the matrix */ - uint32_t blkCnt; /* loop counters */ - arm_status status; /* status of matrix subtraction */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrcA->numRows != pSrcB->numRows) || - (pSrcA->numCols != pSrcB->numCols) || - (pSrcA->numRows != pDst->numRows) || - (pSrcA->numCols != pDst->numCols) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Total number of samples in input matrix */ - numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = numSamples >> 2U; - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - - /* Subtract, saturate and then store the results in the destination buffer. */ - *pOut++ = __QSUB(*pInA++, *pInB++); - - *pOut++ = __QSUB(*pInA++, *pInB++); - - *pOut++ = __QSUB(*pInA++, *pInB++); - - *pOut++ = __QSUB(*pInA++, *pInB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = numSamples % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = numSamples; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C(m,n) = A(m,n) - B(m,n) */ - - /* Subtract, saturate and store result in destination buffer. */ - *pOut++ = __QSUB(*pInA++, *pInB++); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixSub group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f16.c deleted file mode 100644 index deb2a53..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f16.c +++ /dev/null @@ -1,202 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_trans_f16.c - * Description: Floating-point matrix transpose - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixTrans - @{ - */ - -/** - @brief Floating-point matrix transpose. - @param[in] pSrc points to input matrix - @param[out] pDst points to output matrix - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -arm_status arm_mat_trans_f16( - const arm_matrix_instance_f16 * pSrc, - arm_matrix_instance_f16 * pDst) -{ - arm_status status; /* status of matrix transpose */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || - (pSrc->numCols != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - if (pDst->numRows == pDst->numCols) - { - if (pDst->numCols == 1) - { - pDst->pData[0] = pSrc->pData[0]; - return(ARM_MATH_SUCCESS); - } - if (pDst->numCols == 2) - return arm_mat_trans_16bit_2x2((uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); - if (pDst->numCols == 3) - return arm_mat_trans_16bit_3x3_mve((uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); - if (pDst->numCols == 4) - return arm_mat_trans_16bit_4x4_mve((uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); - } - - arm_mat_trans_16bit_generic(pSrc->numRows, pSrc->numCols, (uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else - -arm_status arm_mat_trans_f16( - const arm_matrix_instance_f16 * pSrc, - arm_matrix_instance_f16 * pDst) -{ - float16_t *pIn = pSrc->pData; /* input data matrix pointer */ - float16_t *pOut = pDst->pData; /* output data matrix pointer */ - float16_t *px; /* Temporary output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of rows */ - uint16_t nCols = pSrc->numCols; /* number of columns */ - uint32_t col, row = nRows, i = 0U; /* Loop counters */ - arm_status status; /* status of matrix transpose */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || - (pSrc->numCols != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* Pointer px is set to starting address of column being processed */ - px = pOut + i; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - col = nCols >> 2U; - - while (col > 0U) /* column loop */ - { - /* Read and store input element in destination */ - *px = *pIn++; - /* Update pointer px to point to next row of transposed matrix */ - px += nRows; - - *px = *pIn++; - px += nRows; - - *px = *pIn++; - px += nRows; - - *px = *pIn++; - px += nRows; - - /* Decrement column loop counter */ - col--; - } - - /* Loop unrolling: Compute remaining outputs */ - col = nCols % 0x4U; - -#else - - /* Initialize col with number of samples */ - col = nCols; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (col > 0U) - { - /* Read and store input element in destination */ - *px = *pIn++; - - /* Update pointer px to point to next row of transposed matrix */ - px += nRows; - - /* Decrement column loop counter */ - col--; - } - - i++; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); /* row loop end */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of MatrixTrans group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c deleted file mode 100644 index 6fcc1fc..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c +++ /dev/null @@ -1,325 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_trans_f32.c - * Description: Floating-point matrix transpose - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixTrans Matrix Transpose - - Tranposes a matrix. - - Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix. - \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix" - */ - -/** - @addtogroup MatrixTrans - @{ - */ - -/** - @brief Floating-point matrix transpose. - @param[in] pSrc points to input matrix - @param[out] pDst points to output matrix - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -arm_status arm_mat_trans_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - arm_status status; /* status of matrix transpose */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - { - if (pDst->numRows == pDst->numCols) - { - if (pDst->numCols == 2) - return arm_mat_trans_32bit_2x2_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); - if (pDst->numCols == 3) - return arm_mat_trans_32bit_3x3_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); - if (pDst->numCols == 4) - return arm_mat_trans_32bit_4x4_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); - } - - arm_mat_trans_32bit_generic_mve(pSrc->numRows, pSrc->numCols, (uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -#else -#if defined(ARM_MATH_NEON) - -arm_status arm_mat_trans_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *px; /* Temporary output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of rows */ - uint16_t nColumns = pSrc->numCols; /* number of columns */ - - uint16_t blkCnt, rowCnt, i = 0U, row = nRows; /* loop counters */ - arm_status status; /* status of matrix transpose */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* Row loop */ - rowCnt = row >> 2; - while (rowCnt > 0U) - { - float32x4_t row0V,row1V,row2V,row3V; - float32x4x2_t ra0,ra1,rb0,rb1; - - blkCnt = nColumns >> 2; - - /* The pointer px is set to starting address of the column being processed */ - px = pOut + i; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) /* Column loop */ - { - row0V = vld1q_f32(pIn); - row1V = vld1q_f32(pIn + 1 * nColumns); - row2V = vld1q_f32(pIn + 2 * nColumns); - row3V = vld1q_f32(pIn + 3 * nColumns); - pIn += 4; - - ra0 = vzipq_f32(row0V,row2V); - ra1 = vzipq_f32(row1V,row3V); - - rb0 = vzipq_f32(ra0.val[0],ra1.val[0]); - rb1 = vzipq_f32(ra0.val[1],ra1.val[1]); - - vst1q_f32(px,rb0.val[0]); - px += nRows; - - vst1q_f32(px,rb0.val[1]); - px += nRows; - - vst1q_f32(px,rb1.val[0]); - px += nRows; - - vst1q_f32(px,rb1.val[1]); - px += nRows; - - /* Decrement the column loop counter */ - blkCnt--; - } - - /* Perform matrix transpose for last 3 samples here. */ - blkCnt = nColumns % 0x4U; - - while (blkCnt > 0U) - { - /* Read and store the input element in the destination */ - *px++ = *pIn; - *px++ = *(pIn + 1 * nColumns); - *px++ = *(pIn + 2 * nColumns); - *px++ = *(pIn + 3 * nColumns); - - px += (nRows - 4); - pIn++; - - /* Decrement the column loop counter */ - blkCnt--; - } - - i += 4; - pIn += 3 * nColumns; - - /* Decrement the row loop counter */ - rowCnt--; - - } /* Row loop end */ - - rowCnt = row & 3; - while (rowCnt > 0U) - { - blkCnt = nColumns ; - /* The pointer px is set to starting address of the column being processed */ - px = pOut + i; - - while (blkCnt > 0U) - { - /* Read and store the input element in the destination */ - *px = *pIn++; - - /* Update the pointer px to point to the next row of the transposed matrix */ - px += nRows; - - /* Decrement the column loop counter */ - blkCnt--; - } - i++; - rowCnt -- ; - } - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#else -arm_status arm_mat_trans_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst) -{ - float32_t *pIn = pSrc->pData; /* input data matrix pointer */ - float32_t *pOut = pDst->pData; /* output data matrix pointer */ - float32_t *px; /* Temporary output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of rows */ - uint16_t nCols = pSrc->numCols; /* number of columns */ - uint32_t col, row = nRows, i = 0U; /* Loop counters */ - arm_status status; /* status of matrix transpose */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || - (pSrc->numCols != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* Pointer px is set to starting address of column being processed */ - px = pOut + i; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - col = nCols >> 2U; - - while (col > 0U) /* column loop */ - { - /* Read and store input element in destination */ - *px = *pIn++; - /* Update pointer px to point to next row of transposed matrix */ - px += nRows; - - *px = *pIn++; - px += nRows; - - *px = *pIn++; - px += nRows; - - *px = *pIn++; - px += nRows; - - /* Decrement column loop counter */ - col--; - } - - /* Loop unrolling: Compute remaining outputs */ - col = nCols % 0x4U; - -#else - - /* Initialize col with number of samples */ - col = nCols; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (col > 0U) - { - /* Read and store input element in destination */ - *px = *pIn++; - - /* Update pointer px to point to next row of transposed matrix */ - px += nRows; - - /* Decrement column loop counter */ - col--; - } - - i++; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); /* row loop end */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of MatrixTrans group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f64.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f64.c deleted file mode 100644 index e516b52..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f64.c +++ /dev/null @@ -1,155 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_trans_f64.c - * Description: Floating-point matrix transpose - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @defgroup MatrixTrans Matrix Transpose - - Tranposes a matrix. - - Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix. - \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix" - */ - -/** - @addtogroup MatrixTrans - @{ - */ - -/** - @brief Floating-point matrix transpose. - @param[in] pSrc points to input matrix - @param[out] pDst points to output matrix - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ - -arm_status arm_mat_trans_f64( - const arm_matrix_instance_f64 * pSrc, - arm_matrix_instance_f64 * pDst) -{ - float64_t *pIn = pSrc->pData; /* input data matrix pointer */ - float64_t *pOut = pDst->pData; /* output data matrix pointer */ - float64_t *px; /* Temporary output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of rows */ - uint16_t nCols = pSrc->numCols; /* number of columns */ - uint64_t col, row = nRows, i = 0U; /* Loop counters */ - arm_status status; /* status of matrix transpose */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || - (pSrc->numCols != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* Pointer px is set to starting address of column being processed */ - px = pOut + i; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - col = nCols >> 2U; - - while (col > 0U) /* column loop */ - { - /* Read and store input element in destination */ - *px = *pIn++; - /* Update pointer px to point to next row of transposed matrix */ - px += nRows; - - *px = *pIn++; - px += nRows; - - *px = *pIn++; - px += nRows; - - *px = *pIn++; - px += nRows; - - /* Decrement column loop counter */ - col--; - } - - /* Loop unrolling: Compute remaining outputs */ - col = nCols % 0x4U; - -#else - - /* Initialize col with number of samples */ - col = nCols; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (col > 0U) - { - /* Read and store input element in destination */ - *px = *pIn++; - - /* Update pointer px to point to next row of transposed matrix */ - px += nRows; - - /* Decrement column loop counter */ - col--; - } - - i++; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); /* row loop end */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} - -/** - * @} end of MatrixTrans group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c deleted file mode 100644 index 5e12400..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c +++ /dev/null @@ -1,233 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_trans_q15.c - * Description: Q15 matrix transpose - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixTrans - @{ - */ - -/** - @brief Q15 matrix transpose. - @param[in] pSrc points to input matrix - @param[out] pDst points to output matrix - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - - -arm_status arm_mat_trans_q15( - const arm_matrix_instance_q15 * pSrc, - arm_matrix_instance_q15 * pDst) -{ - arm_status status; /* status of matrix transpose */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || - (pSrc->numCols != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - if (pDst->numRows == pDst->numCols) - { - if (pDst->numCols == 1) - { - pDst->pData[0] = pSrc->pData[0]; - return(ARM_MATH_SUCCESS); - } - if (pDst->numCols == 2) - return arm_mat_trans_16bit_2x2((uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); - if (pDst->numCols == 3) - return arm_mat_trans_16bit_3x3_mve((uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); - if (pDst->numCols == 4) - return arm_mat_trans_16bit_4x4_mve((uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); - } - - arm_mat_trans_16bit_generic(pSrc->numRows, pSrc->numCols, (uint16_t *)pSrc->pData, (uint16_t *)pDst->pData); - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#else -arm_status arm_mat_trans_q15( - const arm_matrix_instance_q15 * pSrc, - arm_matrix_instance_q15 * pDst) -{ - q15_t *pIn = pSrc->pData; /* input data matrix pointer */ - q15_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of rows */ - uint16_t nCols = pSrc->numCols; /* number of columns */ - uint32_t col, row = nRows, i = 0U; /* Loop counters */ - arm_status status; /* status of matrix transpose */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t in; /* variable to hold temporary output */ -#endif - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || - (pSrc->numCols != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* Pointer pOut is set to starting address of column being processed */ - pOut = pDst->pData + i; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - col = nCols >> 2U; - - while (col > 0U) /* column loop */ - { - /* Read two elements from row */ - in = read_q15x2_ia (&pIn); - - /* Unpack and store one element in destination */ -#ifndef ARM_MATH_BIG_ENDIAN - *pOut = (q15_t) in; -#else - *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update pointer pOut to point to next row of transposed matrix */ - pOut += nRows; - - /* Unpack and store second element in destination */ -#ifndef ARM_MATH_BIG_ENDIAN - *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); -#else - *pOut = (q15_t) in; -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update pointer pOut to point to next row of transposed matrix */ - pOut += nRows; - - /* Read two elements from row */ - in = read_q15x2_ia (&pIn); - - /* Unpack and store one element in destination */ -#ifndef ARM_MATH_BIG_ENDIAN - *pOut = (q15_t) in; -#else - *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update pointer pOut to point to next row of transposed matrix */ - pOut += nRows; - - /* Unpack and store second element in destination */ -#ifndef ARM_MATH_BIG_ENDIAN - *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); -#else - *pOut = (q15_t) in; -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Update pointer pOut to point to next row of transposed matrix */ - pOut += nRows; - - /* Decrement column loop counter */ - col--; - } - - /* Loop unrolling: Compute remaining outputs */ - col = nCols % 0x4U; - -#else - - /* Initialize col with number of samples */ - col = nCols; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (col > 0U) - { - /* Read and store input element in destination */ - *pOut = *pIn++; - - /* Update pointer pOut to point to next row of transposed matrix */ - pOut += nRows; - - /* Decrement column loop counter */ - col--; - } - - i++; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); /* row loop end */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixTrans group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c deleted file mode 100644 index d093324..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c +++ /dev/null @@ -1,191 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_trans_q31.c - * Description: Q31 matrix transpose - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixTrans - @{ - */ - -/** - @brief Q31 matrix transpose. - @param[in] pSrc points to input matrix - @param[out] pDst points to output matrix - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -arm_status arm_mat_trans_q31( - const arm_matrix_instance_q31 * pSrc, - arm_matrix_instance_q31 * pDst) -{ - arm_status status; /* status of matrix transpose */ - #ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || - (pSrc->numCols != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - if (pDst->numRows == pDst->numCols) - { - if (pDst->numCols == 2) - return arm_mat_trans_32bit_2x2_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); - if (pDst->numCols == 3) - return arm_mat_trans_32bit_3x3_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); - if (pDst->numCols == 4) - return arm_mat_trans_32bit_4x4_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); - } - - arm_mat_trans_32bit_generic_mve(pSrc->numRows, pSrc->numCols, (uint32_t *)pSrc->pData, (uint32_t *)pDst->pData); - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#else -arm_status arm_mat_trans_q31( - const arm_matrix_instance_q31 * pSrc, - arm_matrix_instance_q31 * pDst) -{ - q31_t *pIn = pSrc->pData; /* input data matrix pointer */ - q31_t *pOut = pDst->pData; /* output data matrix pointer */ - q31_t *px; /* Temporary output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of rows */ - uint16_t nCols = pSrc->numCols; /* number of columns */ - uint32_t col, row = nRows, i = 0U; /* Loop counters */ - arm_status status; /* status of matrix transpose */ - -#ifdef ARM_MATH_MATRIX_CHECK - - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || - (pSrc->numCols != pDst->numRows) ) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } - else - -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do - { - /* Pointer px is set to starting address of column being processed */ - px = pOut + i; - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - col = nCols >> 2U; - - while (col > 0U) /* column loop */ - { - /* Read and store input element in destination */ - *px = *pIn++; - /* Update pointer px to point to next row of transposed matrix */ - px += nRows; - - *px = *pIn++; - px += nRows; - - *px = *pIn++; - px += nRows; - - *px = *pIn++; - px += nRows; - - /* Decrement column loop counter */ - col--; - } - - /* Loop unrolling: Compute remaining outputs */ - col = nCols % 0x4U; - -#else - - /* Initialize col with number of samples */ - col = nCols; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (col > 0U) - { - /* Read and store input element in destination */ - *px = *pIn++; - - /* Update pointer px to point to next row of transposed matrix */ - px += nRows; - - /* Decrement column loop counter */ - col--; - } - - i++; - - /* Decrement row loop counter */ - row--; - - } while (row > 0U); /* row loop end */ - - /* Set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MatrixTrans group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q7.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q7.c deleted file mode 100644 index 69bb991..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q7.c +++ /dev/null @@ -1,171 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_trans_q7.c - * Description: Q7 matrix transpose - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - @ingroup groupMatrix - */ - -/** - @addtogroup MatrixTrans - @{ - */ - -/** - @brief Q7 matrix transpose. - @param[in] pSrc points to input matrix - @param[out] pDst points to output matrix - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -arm_status arm_mat_trans_q7(const arm_matrix_instance_q7 *pSrc, arm_matrix_instance_q7 *pDst) -{ - - uint16x8_t vecOffs; - uint32_t i; - uint32_t blkCnt; - uint8_t const *pDataC; - uint8_t *pDataDestR; - uint16x8_t vecIn; - - const uint8_t * pDataSrc=(const uint8_t *)pSrc->pData; - uint8_t * pDataDst=(uint8_t *)pDst->pData; - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) - { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - return ARM_MATH_SIZE_MISMATCH; - } -#endif - - vecOffs = vidupq_u16((uint32_t)0, 1); - vecOffs = vecOffs * pSrc->numCols; - - i = pSrc->numCols; - do - { - pDataC = (uint8_t const *) pDataSrc; - pDataDestR = (uint8_t*)pDataDst; - - blkCnt = pSrc->numRows >> 3; - while (blkCnt > 0U) - { - /* widened loads */ - vecIn = vldrbq_gather_offset_u16(pDataC, vecOffs); - vstrbq_u16(pDataDestR, vecIn); - pDataDestR += 8; - pDataC = pDataC + pSrc->numCols * 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = pSrc->numRows & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecIn = vldrbq_gather_offset_u16(pDataC, vecOffs); - vstrbq_p_u16(pDataDestR, vecIn, p0); - } - pDataSrc += 1; - pDataDst += pSrc->numRows; - } - while (--i); - - return (ARM_MATH_SUCCESS); -} -#else -arm_status arm_mat_trans_q7(const arm_matrix_instance_q7 *pSrc, arm_matrix_instance_q7 *pDst) -{ - q7_t *pSrcA = pSrc->pData; /* input data matrix pointer */ - q7_t *pOut = pDst->pData; /* output data matrix pointer */ - uint16_t nRows = pSrc->numRows; /* number of nRows */ - uint16_t nColumns = pSrc->numCols; /* number of nColumns */ - uint16_t col, row = nRows, i = 0U; /* row and column loop counters */ - arm_status status; /* status of matrix transpose */ - - -#ifdef ARM_MATH_MATRIX_CHECK - /* Check for matrix mismatch condition */ - if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) { - /* Set status as ARM_MATH_SIZE_MISMATCH */ - status = ARM_MATH_SIZE_MISMATCH; - } else -#endif /* #ifdef ARM_MATH_MATRIX_CHECK */ - - { - /* Matrix transpose by exchanging the rows with columns */ - /* row loop */ - do { - /* The pointer pOut is set to starting address of the column being processed */ - pOut = pDst->pData + i; - - /* Initialize column loop counter */ - col = nColumns; - - - while (col > 0U) { - /* Read and store the input element in the destination */ - *pOut = *pSrcA++; - - /* Update the pointer pOut to point to the next row of the transposed matrix */ - pOut += nRows; - - /* Decrement the column loop counter */ - col--; - } - - i++; - - /* Decrement the row loop counter */ - row--; - - } while (row > 0U); - - /* set status as ARM_MATH_SUCCESS */ - status = ARM_MATH_SUCCESS; - } - /* Return to application */ - return (status); -} -#endif /* defined(ARM_MATH_MVEI) */ - - -/** - @} end of MatrixTrans group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f16.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f16.c deleted file mode 100644 index 532d80c..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f16.c +++ /dev/null @@ -1,396 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_vec_mult_f16.c - * Description: Floating-point matrix and vector multiplication - * - * $Date: 23 April 2021 - * - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - * @ingroup groupMatrix - */ - - -/** - * @addtogroup MatrixVectMult - * @{ - */ - -/** - * @brief Floating-point matrix and vector multiplication. - * @param[in] *pSrcMat points to the input matrix structure - * @param[in] *pVec points to input vector - * @param[out] *pDst points to output vector - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mat_vec_mult_f16( - const arm_matrix_instance_f16 *pSrcMat, - const float16_t *pSrcVec, - float16_t *pDstVec) -{ - uint32_t numRows = pSrcMat->numRows; - uint32_t numCols = pSrcMat->numCols; - const float16_t *pSrcA = pSrcMat->pData; - const float16_t *pInA0; - const float16_t *pInA1; - float16_t *px; - int32_t row; - uint32_t blkCnt; /* loop counters */ - - row = numRows; - px = pDstVec; - - /* - * compute 4 rows in parallel - */ - while (row >= 4) - { - const float16_t *pInA2, *pInA3; - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec; - f16x8_t vecIn, acc0, acc1, acc2, acc3; - float16_t const *pSrcVecPtr = pSrcVec; - - /* - * Initialize the pointers to 4 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - acc1 = vdupq_n_f16(0.0f); - acc2 = vdupq_n_f16(0.0f); - acc3 = vdupq_n_f16(0.0f); - - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - pSrcA2Vec = pInA2; - pSrcA3Vec = pInA3; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) - { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 8; - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vld1q(pSrcA2Vec); - pSrcA2Vec += 8; - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vld1q(pSrcA3Vec); - pSrcA3Vec += 8; - acc3 = vfmaq(acc3, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vld1q(pSrcA0Vec); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vld1q(pSrcA2Vec); - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vld1q(pSrcA3Vec); - acc3 = vfmaq(acc3, vecIn, vecA); - } - /* - * Sum the partial parts - */ - *px++ = vecAddAcrossF16Mve(acc0); - *px++ = vecAddAcrossF16Mve(acc1); - *px++ = vecAddAcrossF16Mve(acc2); - *px++ = vecAddAcrossF16Mve(acc3); - - pSrcA += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * compute 2 rows in parrallel - */ - if (row >= 2) - { - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec; - f16x8_t vecIn, acc0, acc1; - float16_t const *pSrcVecPtr = pSrcVec; - - /* - * Initialize the pointers to 2 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - acc1 = vdupq_n_f16(0.0f); - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) - { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 8; - acc1 = vfmaq(acc1, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vld1q(pSrcA0Vec); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - acc1 = vfmaq(acc1, vecIn, vecA); - } - /* - * Sum the partial parts - */ - *px++ = vecAddAcrossF16Mve(acc0); - *px++ = vecAddAcrossF16Mve(acc1); - - pSrcA += numCols * 2; - row -= 2; - } - - if (row >= 1) - { - f16x8_t vecIn, acc0; - float16_t const *pSrcA0Vec, *pInVec; - float16_t const *pSrcVecPtr = pSrcVec; - /* - * Initialize the pointers to last MatrixA row - */ - pInA0 = pSrcA; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - - pSrcA0Vec = pInA0; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) - { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vld1q(pSrcA0Vec); - acc0 = vfmaq(acc0, vecIn, vecA); - } - /* - * Sum the partial parts - */ - *px++ = vecAddAcrossF16Mve(acc0); - } -} -#else -void arm_mat_vec_mult_f16(const arm_matrix_instance_f16 *pSrcMat, const float16_t *pVec, float16_t *pDst) -{ - uint32_t numRows = pSrcMat->numRows; - uint32_t numCols = pSrcMat->numCols; - const float16_t *pSrcA = pSrcMat->pData; - const float16_t *pInA1; /* input data matrix pointer A of Q31 type */ - const float16_t *pInA2; /* input data matrix pointer A of Q31 type */ - const float16_t *pInA3; /* input data matrix pointer A of Q31 type */ - const float16_t *pInA4; /* input data matrix pointer A of Q31 type */ - const float16_t *pInVec; /* input data matrix pointer B of Q31 type */ - float16_t *px; /* Temporary output data matrix pointer */ - uint16_t i, row, colCnt; /* loop counters */ - float16_t matData, matData2, vecData, vecData2; - - - /* Process 4 rows at a time */ - row = numRows >> 2; - i = 0u; - px = pDst; - - /* The following loop performs the dot-product of each row in pSrcA with the vector */ - /* row loop */ - while (row > 0) { - /* For every row wise process, the pInVec pointer is set - ** to the starting address of the vector */ - pInVec = pVec; - - /* Initialize accumulators */ - float16_t sum1 = 0.0f16; - float16_t sum2 = 0.0f16; - float16_t sum3 = 0.0f16; - float16_t sum4 = 0.0f16; - - /* Loop unrolling: process 2 columns per iteration */ - colCnt = numCols; - - /* Initialize pointers to the starting address of the column being processed */ - pInA1 = pSrcA + i; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - pInA4 = pInA3 + numCols; - - - // Main loop: matrix-vector multiplication - while (colCnt > 0u) { - // Read 2 values from vector - vecData = *(pInVec)++; - // Read 8 values from the matrix - 2 values from each of 4 rows, and do multiply accumulate - matData = *(pInA1)++; - sum1 += (_Float16)matData * (_Float16)vecData; - matData = *(pInA2)++; - sum2 += (_Float16)matData * (_Float16)vecData; - matData = *(pInA3)++; - sum3 += (_Float16)matData * (_Float16)vecData; - matData = *(pInA4)++; - sum4 += (_Float16)matData * (_Float16)vecData; - - // Decrement the loop counter - colCnt--; - } - - /* Saturate and store the result in the destination buffer */ - *px++ = sum1; - *px++ = sum2; - *px++ = sum3; - *px++ = sum4; - - i = i + numCols * 4; - - /* Decrement the row loop counter */ - row--; - } - - /* process any remaining rows */ - row = numRows & 3u; - while (row > 0) { - - float16_t sum = 0.0f16; - pInVec = pVec; - pInA1 = pSrcA + i; - - colCnt = numCols >> 1; - - while (colCnt > 0) { - vecData = *(pInVec)++; - vecData2 = *(pInVec)++; - matData = *(pInA1)++; - matData2 = *(pInA1)++; - sum += (_Float16)matData * (_Float16)vecData; - sum += (_Float16)matData2 * (_Float16)vecData2; - colCnt--; - } - // process remainder of row - colCnt = numCols & 1u; - while (colCnt > 0) { - sum += (_Float16)*pInA1++ * (_Float16)*pInVec++; - colCnt--; - } - - *px++ = sum; - i = i + numCols; - row--; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of MatrixMult group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f32.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f32.c deleted file mode 100644 index d1ddb0c..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f32.c +++ /dev/null @@ -1,399 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_vec_mult_f32.c - * Description: Floating-point matrix and vector multiplication - * - * $Date: 23 April 2021 - * - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - - -/** - * @ingroup groupMatrix - */ - -/** - * @defgroup MatrixVectMult Matrix Vector Multiplication - * - * Multiplies a matrix and a vector. - * - */ - -/** - * @addtogroup MatrixVectMult - * @{ - */ - -/** - * @brief Floating-point matrix and vector multiplication. - * @param[in] *pSrcMat points to the input matrix structure - * @param[in] *pVec points to input vector - * @param[out] *pDst points to output vector - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mat_vec_mult_f32( - const arm_matrix_instance_f32 *pSrcMat, - const float32_t *pSrcVec, - float32_t *pDstVec) -{ - uint32_t numRows = pSrcMat->numRows; - uint32_t numCols = pSrcMat->numCols; - const float32_t *pSrcA = pSrcMat->pData; - const float32_t *pInA0; - const float32_t *pInA1; - float32_t *px; - int32_t row; - uint32_t blkCnt; /* loop counters */ - - row = numRows; - px = pDstVec; - - /* - * compute 4 rows in parallel - */ - while (row >= 4) - { - const float32_t *pInA2, *pInA3; - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec; - f32x4_t vecIn, acc0, acc1, acc2, acc3; - float32_t const *pSrcVecPtr = pSrcVec; - - /* - * Initialize the pointers to 4 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - acc2 = vdupq_n_f32(0.0f); - acc3 = vdupq_n_f32(0.0f); - - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - pSrcA2Vec = pInA2; - pSrcA3Vec = pInA3; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) - { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vld1q(pSrcA2Vec); - pSrcA2Vec += 4; - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vld1q(pSrcA3Vec); - pSrcA3Vec += 4; - acc3 = vfmaq(acc3, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vld1q(pSrcA0Vec); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vld1q(pSrcA2Vec); - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vld1q(pSrcA3Vec); - acc3 = vfmaq(acc3, vecIn, vecA); - } - /* - * Sum the partial parts - */ - *px++ = vecAddAcrossF32Mve(acc0); - *px++ = vecAddAcrossF32Mve(acc1); - *px++ = vecAddAcrossF32Mve(acc2); - *px++ = vecAddAcrossF32Mve(acc3); - - pSrcA += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * compute 2 rows in parrallel - */ - if (row >= 2) - { - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec; - f32x4_t vecIn, acc0, acc1; - float32_t const *pSrcVecPtr = pSrcVec; - - /* - * Initialize the pointers to 2 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) - { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - acc1 = vfmaq(acc1, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vld1q(pSrcA0Vec); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - acc1 = vfmaq(acc1, vecIn, vecA); - } - /* - * Sum the partial parts - */ - *px++ = vecAddAcrossF32Mve(acc0); - *px++ = vecAddAcrossF32Mve(acc1); - - pSrcA += numCols * 2; - row -= 2; - } - - if (row >= 1) - { - f32x4_t vecIn, acc0; - float32_t const *pSrcA0Vec, *pInVec; - float32_t const *pSrcVecPtr = pSrcVec; - /* - * Initialize the pointers to last MatrixA row - */ - pInA0 = pSrcA; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - - pSrcA0Vec = pInA0; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) - { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vld1q(pSrcA0Vec); - acc0 = vfmaq(acc0, vecIn, vecA); - } - /* - * Sum the partial parts - */ - *px++ = vecAddAcrossF32Mve(acc0); - } -} -#else - -void arm_mat_vec_mult_f32(const arm_matrix_instance_f32 *pSrcMat, const float32_t *pVec, float32_t *pDst) -{ - uint32_t numRows = pSrcMat->numRows; - uint32_t numCols = pSrcMat->numCols; - const float32_t *pSrcA = pSrcMat->pData; - const float32_t *pInA1; /* input data matrix pointer A of Q31 type */ - const float32_t *pInA2; /* input data matrix pointer A of Q31 type */ - const float32_t *pInA3; /* input data matrix pointer A of Q31 type */ - const float32_t *pInA4; /* input data matrix pointer A of Q31 type */ - const float32_t *pInVec; /* input data matrix pointer B of Q31 type */ - float32_t *px; /* Temporary output data matrix pointer */ - uint16_t i, row, colCnt; /* loop counters */ - float32_t matData, matData2, vecData, vecData2; - - - /* Process 4 rows at a time */ - row = numRows >> 2; - i = 0u; - px = pDst; - - /* The following loop performs the dot-product of each row in pSrcA with the vector */ - /* row loop */ - while (row > 0) { - /* Initialize accumulators */ - float32_t sum1 = 0.0f; - float32_t sum2 = 0.0f; - float32_t sum3 = 0.0f; - float32_t sum4 = 0.0f; - - /* For every row wise process, the pInVec pointer is set - ** to the starting address of the vector */ - pInVec = pVec; - - /* Loop unrolling: process 2 columns per iteration */ - colCnt = numCols; - - /* Initialize pointers to the starting address of the column being processed */ - pInA1 = pSrcA + i; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - pInA4 = pInA3 + numCols; - - - // Main loop: matrix-vector multiplication - while (colCnt > 0u) { - // Read 2 values from vector - vecData = *(pInVec)++; - // Read 8 values from the matrix - 2 values from each of 4 rows, and do multiply accumulate - matData = *(pInA1)++; - sum1 += matData * vecData; - matData = *(pInA2)++; - sum2 += matData * vecData; - matData = *(pInA3)++; - sum3 += matData * vecData; - matData = *(pInA4)++; - sum4 += matData * vecData; - - // Decrement the loop counter - colCnt--; - } - - /* Saturate and store the result in the destination buffer */ - *px++ = sum1; - *px++ = sum2; - *px++ = sum3; - *px++ = sum4; - - i = i + numCols * 4; - - /* Decrement the row loop counter */ - row--; - } - - /* process any remaining rows */ - row = numRows & 3u; - while (row > 0) { - - float32_t sum = 0.0f; - pInVec = pVec; - pInA1 = pSrcA + i; - - colCnt = numCols >> 1; - while (colCnt > 0) { - vecData = *(pInVec)++; - vecData2 = *(pInVec)++; - matData = *(pInA1)++; - matData2 = *(pInA1)++; - sum += matData * vecData; - sum += matData2 * vecData2; - colCnt--; - } - // process remainder of row - colCnt = numCols & 1u; - - - while (colCnt > 0) { - sum += *pInA1++ * *pInVec++; - colCnt--; - } - - *px++ = sum; - i = i + numCols; - row--; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q15.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q15.c deleted file mode 100644 index 1f5a738..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q15.c +++ /dev/null @@ -1,388 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_vec_mult_q15.c - * Description: Q15 matrix and vector multiplication - * - * $Date: 23 April 2021 - * - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - * @ingroup groupMatrix - */ - - - -/** - * @addtogroup MatrixVectMult - * @{ - */ - -/** - * @brief Q15 matrix and vector multiplication. - * @param[in] *pSrcMat points to the input matrix structure - * @param[in] *pVec points to input vector - * @param[out] *pDst points to output vector - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mat_vec_mult_q15( - const arm_matrix_instance_q15 * pSrcMat, - const q15_t *pSrcVec, - q15_t *pDstVec) -{ - const q15_t *pMatSrc = pSrcMat->pData; - const q15_t *pMat0, *pMat1; - uint32_t numRows = pSrcMat->numRows; - uint32_t numCols = pSrcMat->numCols; - q15_t *px; - int32_t row; - uint16_t blkCnt; /* loop counters */ - - row = numRows; - px = pDstVec; - - /* - * compute 3x64-bit accumulators per loop - */ - while (row >= 3) - { - q15_t const *pMat0Vec, *pMat1Vec, *pMat2Vec, *pVec; - const q15_t *pMat2; - q15_t const *pSrcVecPtr = pSrcVec; - q63_t acc0, acc1, acc2; - q15x8_t vecMatA0, vecMatA1, vecMatA2, vecIn; - - - pVec = pSrcVec; - /* - * Initialize the pointer pIn1 to point to the starting address of the column being processed - */ - pMat0 = pMatSrc; - pMat1 = pMat0 + numCols; - pMat2 = pMat1 + numCols; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - - pMat0Vec = pMat0; - pMat1Vec = pMat1; - pMat2Vec = pMat2; - pVec = pSrcVecPtr; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) - { - vecMatA0 = vld1q(pMat0Vec); - pMat0Vec += 8; - vecMatA1 = vld1q(pMat1Vec); - pMat1Vec += 8; - vecMatA2 = vld1q(pMat2Vec); - pMat2Vec += 8; - vecIn = vld1q(pVec); - pVec += 8; - - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - acc1 = vmlaldavaq(acc1, vecIn, vecMatA1); - acc2 = vmlaldavaq(acc2, vecIn, vecMatA2); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - vecMatA0 = vld1q(pMat0Vec); - vecMatA1 = vld1q(pMat1Vec); - vecMatA2 = vld1q(pMat2Vec); - vecIn = vldrhq_z_s16(pVec, p0); - - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - acc1 = vmlaldavaq(acc1, vecIn, vecMatA1); - acc2 = vmlaldavaq(acc2, vecIn, vecMatA2); - } - - *px++ = MVE_ASRL_SAT16(acc0, 15); - *px++ = MVE_ASRL_SAT16(acc1, 15); - *px++ = MVE_ASRL_SAT16(acc2, 15); - - pMatSrc += numCols * 3; - /* - * Decrement the row loop counter - */ - row -= 3; - } - - /* - * process any remaining rows pair - */ - if (row >= 2) - { - q15_t const *pMat0Vec, *pMat1Vec, *pVec; - q15_t const *pSrcVecPtr = pSrcVec; - q63_t acc0, acc1; - q15x8_t vecMatA0, vecMatA1, vecIn; - - /* - * For every row wise process, the pInVec pointer is set - * to the starting address of the vector - */ - pVec = pSrcVec; - - /* - * Initialize the pointer pIn1 to point to the starting address of the column being processed - */ - pMat0 = pMatSrc; - pMat1 = pMat0 + numCols; - - acc0 = 0LL; - acc1 = 0LL; - - pMat0Vec = pMat0; - pMat1Vec = pMat1; - pVec = pSrcVecPtr; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) - { - vecMatA0 = vld1q(pMat0Vec); - pMat0Vec += 8; - vecMatA1 = vld1q(pMat1Vec); - pMat1Vec += 8; - vecIn = vld1q(pVec); - pVec += 8; - - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - acc1 = vmlaldavaq(acc1, vecIn, vecMatA1); - - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - vecMatA0 = vld1q(pMat0Vec); - vecMatA1 = vld1q(pMat1Vec); - vecIn = vldrhq_z_s16(pVec, p0); - - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - acc1 = vmlaldavaq(acc1, vecIn, vecMatA1); - } - - *px++ = MVE_ASRL_SAT16(acc0, 15); - *px++ = MVE_ASRL_SAT16(acc1, 15); - - pMatSrc += numCols * 2; - /* - * Decrement the row loop counter - */ - row -= 2; - } - - if (row >= 1) - { - q15_t const *pMat0Vec, *pVec; - q15_t const *pSrcVecPtr = pSrcVec; - q63_t acc0; - q15x8_t vecMatA0, vecIn; - - /* - * For every row wise process, the pInVec pointer is set - * to the starting address of the vector - */ - pVec = pSrcVec; - - /* - * Initialize the pointer pIn1 to point to the starting address of the column being processed - */ - pMat0 = pMatSrc; - - acc0 = 0LL; - - pMat0Vec = pMat0; - pVec = pSrcVecPtr; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) - { - vecMatA0 = vld1q(pMat0Vec); - pMat0Vec += 8; - vecIn = vld1q(pVec); - pVec += 8; - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - vecMatA0 = vld1q(pMat0Vec); - vecIn = vldrhq_z_s16(pVec, p0); - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - } - *px++ = MVE_ASRL_SAT16(acc0, 15); - } -} - -#else -void arm_mat_vec_mult_q15(const arm_matrix_instance_q15 *pSrcMat, const q15_t *pVec, q15_t *pDst) -{ - uint32_t numRows = pSrcMat->numRows; - uint32_t numCols = pSrcMat->numCols; - const q15_t *pSrcA = pSrcMat->pData; - const q15_t *pInA1; /* input data matrix pointer A of Q15 type */ - const q15_t *pInA2; /* input data matrix pointer A of Q15 type */ - const q15_t *pInA3; /* input data matrix pointer A of Q15 type */ - const q15_t *pInA4; /* input data matrix pointer A of Q15 type */ - const q15_t *pInVec; /* input data matrix pointer B of Q15 type */ - q15_t *px; /* Temporary output data matrix pointer */ - uint16_t i, row, colCnt; /* loop counters */ - q31_t matData, matData2, vecData, vecData2; - - - /* Process 4 rows at a time */ - row = numRows >> 2; - i = 0u; - px = pDst; - - /* The following loop performs the dot-product of each row in pSrcA with the vector */ - /* row loop */ - while (row > 0) { - /* Initialize accumulators */ - q63_t sum1 = 0; - q63_t sum2 = 0; - q63_t sum3 = 0; - q63_t sum4 = 0; - - /* For every row wise process, the pInVec pointer is set - ** to the starting address of the vector */ - pInVec = pVec; - - /* Loop unrolling: process 2 columns per iteration */ - colCnt = numCols >> 1; - - /* Initialize pointers to the starting address of the column being processed */ - pInA1 = pSrcA + i; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - pInA4 = pInA3 + numCols; - - // Main loop: matrix-vector multiplication - while (colCnt > 0u) { - // Read 2 values from vector - vecData = read_q15x2_ia (&pInVec); - - // Read 8 values from the matrix - 2 values from each of 4 rows, and do multiply accumulate - matData = read_q15x2_ia (&pInA1); - sum1 = __SMLALD(matData, vecData, sum1); - matData = read_q15x2_ia (&pInA2); - sum2 = __SMLALD(matData, vecData, sum2); - matData = read_q15x2_ia (&pInA3); - sum3 = __SMLALD(matData, vecData, sum3); - matData = read_q15x2_ia (&pInA4); - sum4 = __SMLALD(matData, vecData, sum4); - - // Decrement the loop counter - colCnt--; - } - - /* process any remaining columns */ - colCnt = numCols & 1u; - if (numCols & 1u) { - vecData = *pInVec++; - sum1 += (q63_t)*pInA1++ * vecData; - sum2 += (q63_t)*pInA2++ * vecData; - sum3 += (q63_t)*pInA3++ * vecData; - sum4 += (q63_t)*pInA4++ * vecData; - } - - /* Saturate and store the result in the destination buffer */ - *px++ = (q15_t)(__SSAT((sum1 >> 15), 16)); - *px++ = (q15_t)(__SSAT((sum2 >> 15), 16)); - *px++ = (q15_t)(__SSAT((sum3 >> 15), 16)); - *px++ = (q15_t)(__SSAT((sum4 >> 15), 16)); - - i = i + numCols * 4; - - /* Decrement the row loop counter */ - row--; - } - - /* process any remaining rows */ - row = numRows & 3u; - while (row > 0) { - - q63_t sum = 0; - pInVec = pVec; - pInA1 = pSrcA + i; - - // loop unrolling - process 4 elements at a time - colCnt = numCols >> 2; - - while (colCnt > 0) { - vecData = read_q15x2_ia (&pInVec); - vecData2 = read_q15x2_ia (&pInVec); - matData = read_q15x2_ia (&pInA1); - matData2 = read_q15x2_ia (&pInA1); - sum = __SMLALD(matData, vecData, sum); - sum = __SMLALD(matData2, vecData2, sum); - colCnt--; - } - - // process remainder of row - colCnt = numCols & 3u; - while (colCnt > 0) { - sum += (q63_t)*pInA1++ * *pInVec++; - colCnt--; - } - *px++ = (q15_t)(__SSAT((sum >> 15), 16)); - i = i + numCols; - row--; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - * @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q31.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q31.c deleted file mode 100644 index c26a0a5..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q31.c +++ /dev/null @@ -1,376 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_vec_mult_q31.c - * Description: Q31 matrix and vector multiplication - * - * $Date: 23 April 2021 - * - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - * @ingroup groupMatrix - */ - - - -/** - * @addtogroup MatrixVectMult - * @{ - */ - -/** - * @brief Q31 matrix and vector multiplication. - * @param[in] *pSrcMat points to the input matrix structure - * @param[in] *pVec points to the input vector - * @param[out] *pDst points to the output vector - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_mat_vec_mult_q31( - const arm_matrix_instance_q31 * pSrcMat, - const q31_t *pSrcVec, - q31_t *pDstVec) -{ - const q31_t *pMatSrc = pSrcMat->pData; - const q31_t *pMat0, *pMat1; - uint32_t numRows = pSrcMat->numRows; - uint32_t numCols = pSrcMat->numCols; - q31_t *px; - int32_t row; - uint16_t blkCnt; /* loop counters */ - - row = numRows; - px = pDstVec; - - /* - * compute 3x64-bit accumulators per loop - */ - while (row >= 3) - { - q31_t const *pMat0Vec, *pMat1Vec, *pMat2Vec, *pVec; - const q31_t *pMat2; - q31_t const *pSrcVecPtr = pSrcVec; - q63_t acc0, acc1, acc2; - q31x4_t vecMatA0, vecMatA1, vecMatA2, vecIn; - - - pVec = pSrcVec; - /* - * Initialize the pointer pIn1 to point to the starting address of the column being processed - */ - pMat0 = pMatSrc; - pMat1 = pMat0 + numCols; - pMat2 = pMat1 + numCols; - - acc0 = 0LL; - acc1 = 0LL; - acc2 = 0LL; - - pMat0Vec = pMat0; - pMat1Vec = pMat1; - pMat2Vec = pMat2; - pVec = pSrcVecPtr; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) - { - vecMatA0 = vld1q(pMat0Vec); - pMat0Vec += 4; - vecMatA1 = vld1q(pMat1Vec); - pMat1Vec += 4; - vecMatA2 = vld1q(pMat2Vec); - pMat2Vec += 4; - vecIn = vld1q(pVec); - pVec += 4; - - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - acc1 = vmlaldavaq(acc1, vecIn, vecMatA1); - acc2 = vmlaldavaq(acc2, vecIn, vecMatA2); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - - vecMatA0 = vld1q(pMat0Vec); - vecMatA1 = vld1q(pMat1Vec); - vecMatA2 = vld1q(pMat2Vec); - vecIn = vldrwq_z_s32(pVec, p0); - - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - acc1 = vmlaldavaq(acc1, vecIn, vecMatA1); - acc2 = vmlaldavaq(acc2, vecIn, vecMatA2); - } - - *px++ = asrl(acc0, 31); - *px++ = asrl(acc1, 31); - *px++ = asrl(acc2, 31); - - pMatSrc += numCols * 3; - /* - * Decrement the row loop counter - */ - row -= 3; - } - - /* - * process any remaining rows pair - */ - if (row >= 2) - { - q31_t const *pMat0Vec, *pMat1Vec, *pVec; - q31_t const *pSrcVecPtr = pSrcVec; - q63_t acc0, acc1; - q31x4_t vecMatA0, vecMatA1, vecIn; - - /* - * For every row wise process, the pInVec pointer is set - * to the starting address of the vector - */ - pVec = pSrcVec; - - /* - * Initialize the pointer pIn1 to point to the starting address of the column being processed - */ - pMat0 = pMatSrc; - pMat1 = pMat0 + numCols; - - acc0 = 0LL; - acc1 = 0LL; - - pMat0Vec = pMat0; - pMat1Vec = pMat1; - pVec = pSrcVecPtr; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) - { - vecMatA0 = vld1q(pMat0Vec); - pMat0Vec += 4; - vecMatA1 = vld1q(pMat1Vec); - pMat1Vec += 4; - vecIn = vld1q(pVec); - pVec += 4; - - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - acc1 = vmlaldavaq(acc1, vecIn, vecMatA1); - - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - - vecMatA0 = vld1q(pMat0Vec); - vecMatA1 = vld1q(pMat1Vec); - vecIn = vldrwq_z_s32(pVec, p0); - - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - acc1 = vmlaldavaq(acc1, vecIn, vecMatA1); - } - - *px++ = asrl(acc0, 31); - *px++ = asrl(acc1, 31); - - pMatSrc += numCols * 2; - /* - * Decrement the row loop counter - */ - row -= 2; - } - - if (row >= 1) - { - q31_t const *pMat0Vec, *pVec; - q31_t const *pSrcVecPtr = pSrcVec; - q63_t acc0; - q31x4_t vecMatA0, vecIn; - - /* - * For every row wise process, the pInVec pointer is set - * to the starting address of the vector - */ - pVec = pSrcVec; - - /* - * Initialize the pointer pIn1 to point to the starting address of the column being processed - */ - pMat0 = pMatSrc; - - acc0 = 0LL; - - pMat0Vec = pMat0; - pVec = pSrcVecPtr; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) - { - vecMatA0 = vld1q(pMat0Vec); - pMat0Vec += 4; - vecIn = vld1q(pVec); - pVec += 4; - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - - vecMatA0 = vld1q(pMat0Vec); - vecIn = vldrwq_z_s32(pVec, p0); - acc0 = vmlaldavaq(acc0, vecIn, vecMatA0); - } - - *px++ = asrl(acc0, 31); - } -} -#else -void arm_mat_vec_mult_q31(const arm_matrix_instance_q31 *pSrcMat, const q31_t *pVec, q31_t *pDst) -{ - uint32_t numRows = pSrcMat->numRows; - uint32_t numCols = pSrcMat->numCols; - const q31_t *pSrcA = pSrcMat->pData; - const q31_t *pInA1; /* input data matrix pointer A of Q31 type */ - const q31_t *pInA2; /* input data matrix pointer A of Q31 type */ - const q31_t *pInA3; /* input data matrix pointer A of Q31 type */ - const q31_t *pInA4; /* input data matrix pointer A of Q31 type */ - const q31_t *pInVec; /* input data matrix pointer B of Q31 type */ - q31_t *px; /* Temporary output data matrix pointer */ - uint16_t i, row, colCnt; /* loop counters */ - q31_t matData, matData2, vecData, vecData2; - - - /* Process 4 rows at a time */ - row = numRows >> 2; - i = 0u; - px = pDst; - - /* The following loop performs the dot-product of each row in pSrcA with the vector */ - /* row loop */ - while (row > 0) { - /* Initialize accumulators */ - q63_t sum1 = 0; - q63_t sum2 = 0; - q63_t sum3 = 0; - q63_t sum4 = 0; - - /* For every row wise process, the pInVec pointer is set - ** to the starting address of the vector */ - pInVec = pVec; - - /* Loop unrolling: process 2 columns per iteration */ - colCnt = numCols; - - /* Initialize pointers to the starting address of the column being processed */ - pInA1 = pSrcA + i; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - pInA4 = pInA3 + numCols; - - - // Main loop: matrix-vector multiplication - while (colCnt > 0u) { - // Read 2 values from vector - vecData = *(pInVec)++; - - // Read 8 values from the matrix - 2 values from each of 4 rows, and do multiply accumulate - matData = *(pInA1)++; - sum1 += (q63_t)matData * vecData; - matData = *(pInA2)++; - sum2 += (q63_t)matData * vecData; - matData = *(pInA3)++; - sum3 += (q63_t)matData * vecData; - matData = *(pInA4)++; - sum4 += (q63_t)matData * vecData; - - // Decrement the loop counter - colCnt--; - } - - /* Saturate and store the result in the destination buffer */ - *px++ = (q31_t)(sum1 >> 31); - *px++ = (q31_t)(sum2 >> 31); - *px++ = (q31_t)(sum3 >> 31); - *px++ = (q31_t)(sum4 >> 31); - - i = i + numCols * 4; - - /* Decrement the row loop counter */ - row--; - } - - /* process any remaining rows */ - row = numRows & 3u; - while (row > 0) { - - q63_t sum = 0; - pInVec = pVec; - pInA1 = pSrcA + i; - - colCnt = numCols >> 1; - - while (colCnt > 0) { - vecData = *(pInVec)++; - vecData2 = *(pInVec)++; - matData = *(pInA1)++; - matData2 = *(pInA1)++; - sum += (q63_t)matData * vecData; - sum += (q63_t)matData2 * vecData2; - colCnt--; - } - - // process remainder of row - colCnt = numCols & 1u; - while (colCnt > 0) { - sum += (q63_t)*pInA1++ * *pInVec++; - colCnt--; - } - - *px++ = (q31_t)(sum >> 31); - i = i + numCols; - row--; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - * @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q7.c b/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q7.c deleted file mode 100644 index 65f3954..0000000 --- a/Drivers/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q7.c +++ /dev/null @@ -1,420 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mat_vec_mult_q7.c - * Description: Q7 matrix and vector multiplication - * - * $Date: 23 April 2021 - * - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/matrix_functions.h" - -/** - * @ingroup groupMatrix - */ - - - -/** - * @addtogroup MatrixVectMult - * @{ - */ - -/** - * @brief Q7 matrix and vector multiplication. - * @param[in] *pSrcMat points to the input matrix structure - * @param[in] *pVec points to the input vector - * @param[out] *pDst points to the output vector - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mat_vec_mult_q7( - const arm_matrix_instance_q7 * pSrcMat, - const q7_t *pSrcVec, - q7_t *pDstVec) -{ - const q7_t *pMatSrc = pSrcMat->pData; - const q7_t *pMat0, *pMat1; - uint32_t numRows = pSrcMat->numRows; - uint32_t numCols = pSrcMat->numCols; - q7_t *px; - int32_t row; - uint16_t blkCnt; /* loop counters */ - - row = numRows; - px = pDstVec; - - /* - * compute 4x64-bit accumulators per loop - */ - while (row >= 4) - { - q7_t const *pMat0Vec, *pMat1Vec, *pMat2Vec, *pMat3Vec, *pVec; - const q7_t *pMat2, *pMat3; - q7_t const *pSrcVecPtr = pSrcVec; - q31_t acc0, acc1, acc2, acc3; - q7x16_t vecMatA0, vecMatA1, vecMatA2, vecMatA3, vecIn; - - pVec = pSrcVec; - /* - * Initialize the pointer pIn1 to point to the starting address of the column being processed - */ - pMat0 = pMatSrc; - pMat1 = pMat0 + numCols; - pMat2 = pMat1 + numCols; - pMat3 = pMat2 + numCols; - - acc0 = 0L; - acc1 = 0L; - acc2 = 0L; - acc3 = 0L; - - pMat0Vec = pMat0; - pMat1Vec = pMat1; - pMat2Vec = pMat2; - pMat3Vec = pMat3; - pVec = pSrcVecPtr; - - blkCnt = numCols >> 4; - while (blkCnt > 0U) - { - - vecMatA0 = vld1q(pMat0Vec); - pMat0Vec += 16; - vecMatA1 = vld1q(pMat1Vec); - pMat1Vec += 16; - vecMatA2 = vld1q(pMat2Vec); - pMat2Vec += 16; - vecMatA3 = vld1q(pMat3Vec); - pMat3Vec += 16; - vecIn = vld1q(pVec); - pVec += 16; - - acc0 = vmladavaq(acc0, vecIn, vecMatA0); - acc1 = vmladavaq(acc1, vecIn, vecMatA1); - acc2 = vmladavaq(acc2, vecIn, vecMatA2); - acc3 = vmladavaq(acc3, vecIn, vecMatA3); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - - vecMatA0 = vld1q(pMat0Vec); - vecMatA1 = vld1q(pMat1Vec); - vecMatA2 = vld1q(pMat2Vec); - vecMatA3 = vld1q(pMat3Vec); - vecIn = vldrbq_z_s8(pVec, p0); - - acc0 = vmladavaq(acc0, vecIn, vecMatA0); - acc1 = vmladavaq(acc1, vecIn, vecMatA1); - acc2 = vmladavaq(acc2, vecIn, vecMatA2); - acc3 = vmladavaq(acc3, vecIn, vecMatA3); - } - - *px++ = __SSAT(acc0 >> 7, 8); - *px++ = __SSAT(acc1 >> 7, 8); - *px++ = __SSAT(acc2 >> 7, 8); - *px++ = __SSAT(acc3 >> 7, 8); - - pMatSrc += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * process any remaining rows pair - */ - if (row >= 2) - { - q7_t const *pMat0Vec, *pMat1Vec, *pVec; - q7_t const *pSrcVecPtr = pSrcVec; - q31_t acc0, acc1; - q7x16_t vecMatA0, vecMatA1, vecIn; - - /* - * For every row wise process, the pInVec pointer is set - * to the starting address of the vector - */ - pVec = pSrcVec; - - /* - * Initialize the pointer pIn1 to point to the starting address of the column being processed - */ - pMat0 = pMatSrc; - pMat1 = pMat0 + numCols; - - acc0 = 0; - acc1 = 0; - - pMat0Vec = pMat0; - pMat1Vec = pMat1; - pVec = pSrcVecPtr; - - blkCnt = numCols >> 4; - while (blkCnt > 0U) - { - vecMatA0 = vld1q(pMat0Vec); - pMat0Vec += 16; - vecMatA1 = vld1q(pMat1Vec); - pMat1Vec += 16; - vecIn = vld1q(pVec); - pVec += 16; - - acc0 = vmladavaq(acc0, vecIn, vecMatA0); - acc1 = vmladavaq(acc1, vecIn, vecMatA1); - - blkCnt--; - } - - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - - vecMatA0 = vld1q(pMat0Vec); - vecMatA1 = vld1q(pMat1Vec); - vecIn = vldrbq_z_s8(pVec, p0); - - acc0 = vmladavaq(acc0, vecIn, vecMatA0); - acc1 = vmladavaq(acc1, vecIn, vecMatA1); - } - - *px++ = __SSAT(acc0 >> 7, 8); - *px++ = __SSAT(acc1 >> 7, 8); - - pMatSrc += numCols * 2; - /* - * Decrement the row loop counter - */ - row -= 2; - } - - if (row >= 1) - { - q7_t const *pMat0Vec, *pVec; - q7_t const *pSrcVecPtr = pSrcVec; - q31_t acc0; - q7x16_t vecMatA0, vecIn; - - /* - * For every row wise process, the pInVec pointer is set - * to the starting address of the vector - */ - pVec = pSrcVec; - - /* - * Initialize the pointer pIn1 to point to the starting address of the column being processed - */ - pMat0 = pMatSrc; - - acc0 = 0LL; - - pMat0Vec = pMat0; - pVec = pSrcVecPtr; - - blkCnt = numCols >> 4; - while (blkCnt > 0U) - { - vecMatA0 = vld1q(pMat0Vec); - pMat0Vec += 16; - vecIn = vld1q(pVec); - pVec += 16; - - acc0 = vmladavaq(acc0, vecIn, vecMatA0); - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - - vecMatA0 = vld1q(pMat0Vec); - vecIn = vldrbq_z_s8(pVec, p0); - acc0 = vmladavaq(acc0, vecIn, vecMatA0); - } - *px++ = __SSAT(acc0 >> 7, 8); - } -} - -#else -void arm_mat_vec_mult_q7(const arm_matrix_instance_q7 *pSrcMat, const q7_t *pVec, q7_t *pDst) -{ - uint32_t numRows = pSrcMat->numRows; - uint32_t numCols = pSrcMat->numCols; - const q7_t *pSrcA = pSrcMat->pData; - const q7_t *pInA1; /* input data matrix pointer of Q7 type */ - const q7_t *pInA2; /* input data matrix pointer of Q7 type */ - const q7_t *pInA3; /* input data matrix pointer of Q7 type */ - const q7_t *pInA4; /* input data matrix pointer of Q7 type */ - const q7_t *pInVec; /* input data vector pointer of Q7 type */ - q7_t *px; /* output data pointer */ - uint32_t i, row, colCnt; /* loop counters */ - - q31_t matData, matData2, vecData, vecData2; - - - /* Process 4 rows at a time */ - row = numRows >> 2; - i = 0u; - px = pDst; - - - - /* The following loop performs the dot-product of each row in pSrcA with the vector */ - while (row > 0) { - /* Initialize accumulators */ - q31_t sum1 = 0; - q31_t sum2 = 0; - q31_t sum3 = 0; - q31_t sum4 = 0; - - /* For every row wise process, the pInVec pointer is set - ** to the starting address of the vector */ - pInVec = pVec; - - /* Loop unrolling: process 4 columns per iteration */ - colCnt = numCols >> 2; - - /* Initialize row pointers so we can track 4 rows at once */ - pInA1 = pSrcA + i; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - pInA4 = pInA3 + numCols; - - - // Inner loop: matrix-vector multiplication - - while (colCnt > 0u) { - // Read 4 values from vector - vecData = read_q7x4_ia (&pInVec); - vecData2 = __SXTB16(__ROR(vecData, 8)); - vecData = __SXTB16(vecData); - // Read 16 values from the matrix - 4 values from each of 4 rows, and do multiply accumulate - matData = read_q7x4_ia (&pInA1); - matData2 = __SXTB16(__ROR(matData, 8)); - matData = __SXTB16(matData); - sum1 = __SMLAD(matData, vecData, sum1); - sum1 = __SMLAD(matData2, vecData2, sum1); - matData = read_q7x4_ia (&pInA2); - matData2 = __SXTB16(__ROR(matData, 8)); - matData = __SXTB16(matData); - sum2 = __SMLAD(matData, vecData, sum2); - sum2 = __SMLAD(matData2, vecData2, sum2); - matData = read_q7x4_ia (&pInA3); - matData2 = __SXTB16(__ROR(matData, 8)); - matData = __SXTB16(matData); - sum3 = __SMLAD(matData, vecData, sum3); - sum3 = __SMLAD(matData2, vecData2, sum3); - matData = read_q7x4_ia (&pInA4); - matData2 = __SXTB16(__ROR(matData, 8)); - matData = __SXTB16(matData); - sum4 = __SMLAD(matData, vecData, sum4); - sum4 = __SMLAD(matData2, vecData2, sum4); - - // Decrement the loop counter - colCnt--; - } - - /* process any remaining columns */ - - colCnt = numCols & 3u; - - while (colCnt > 0) { - vecData = *pInVec++; - sum1 += *pInA1++ * vecData; - sum2 += *pInA2++ * vecData; - sum3 += *pInA3++ * vecData; - sum4 += *pInA4++ * vecData; - colCnt--; - } - - /* Saturate and store the result in the destination buffer */ - *px++ = (q7_t)(__SSAT((sum1 >> 7), 8)); - *px++ = (q7_t)(__SSAT((sum2 >> 7), 8)); - *px++ = (q7_t)(__SSAT((sum3 >> 7), 8)); - *px++ = (q7_t)(__SSAT((sum4 >> 7), 8)); - - i = i + numCols * 4; - - /* Decrement the row loop counter */ - row--; - } - - /* process any remaining rows */ - row = numRows & 3u; - while (row > 0) { - - q31_t sum = 0; - pInVec = pVec; - pInA1 = pSrcA + i; - - // loop unrolling - process 4 elements at a time - colCnt = numCols >> 2; - - while (colCnt > 0) { - vecData = read_q7x4_ia (&pInVec); - vecData2 = __SXTB16(__ROR(vecData, 8)); - vecData = __SXTB16(vecData); - matData = read_q7x4_ia (&pInA1); - matData2 = __SXTB16(__ROR(matData, 8)); - matData = __SXTB16(matData); - sum = __SMLAD(matData, vecData, sum); - sum = __SMLAD(matData2, vecData2, sum); - colCnt--; - } - - // process remainder of row - colCnt = numCols & 3u; - while (colCnt > 0) { - sum += *pInA1++ * *pInVec++; - colCnt--; - } - *px++ = (q7_t)(__SSAT((sum >> 7), 8)); - i = i + numCols; - row--; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - * @} end of MatrixMult group - */ diff --git a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/CMakeLists.txt deleted file mode 100644 index ed79d1f..0000000 --- a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/CMakeLists.txt +++ /dev/null @@ -1,31 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPQuaternionMath) - -include(configLib) -include(configDsp) - - - -add_library(CMSISDSPQuaternionMath STATIC arm_quaternion_norm_f32.c) -target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion_inverse_f32.c) -target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion_conjugate_f32.c) -target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion_normalize_f32.c) -target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion_product_single_f32.c) -target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion_product_f32.c) -target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion2rotation_f32.c) -target_sources(CMSISDSPQuaternionMath PRIVATE arm_rotation2quaternion_f32.c) - - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -endif() - - -configLib(CMSISDSPQuaternionMath ${ROOT}) -configDsp(CMSISDSPQuaternionMath ${ROOT}) - -### Includes -target_include_directories(CMSISDSPQuaternionMath PUBLIC "${DSP}/Include") - - - diff --git a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c b/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c deleted file mode 100644 index 8055806..0000000 --- a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c +++ /dev/null @@ -1,34 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: QuaternionMathFunctions.c - * Description: Combination of all quaternion math function source files. - * - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_quaternion_norm_f32.c" -#include "arm_quaternion_inverse_f32.c" -#include "arm_quaternion_conjugate_f32.c" -#include "arm_quaternion_normalize_f32.c" -#include "arm_quaternion_product_single_f32.c" -#include "arm_quaternion_product_f32.c" -#include "arm_quaternion2rotation_f32.c" -#include "arm_rotation2quaternion_f32.c" diff --git a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion2rotation_f32.c b/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion2rotation_f32.c deleted file mode 100644 index 6900d6b..0000000 --- a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion2rotation_f32.c +++ /dev/null @@ -1,181 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_quaternion2rotation_f32.c - * Description: Floating-point quaternion 2 rotation conversion - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/quaternion_math_functions.h" -#include - -/** - @ingroup groupQuaternionMath - */ - -/** - @defgroup QuatConv Quaternion conversions - - Conversions between quaternion and rotation representations. - */ - -/** - @ingroup QuatConv - */ - -/** - @defgroup QuatRot Quaternion to Rotation - - Conversions from quaternion to rotation. - */ - -/** - @addtogroup QuatRot - @{ - */ - -/** - @brief Conversion of quaternion to equivalent rotation matrix. - @param[in] pInputQuaternions points to an array of normalized quaternions - @param[out] pOutputRotations points to an array of 3x3 rotations (in row order) - @param[in] nbQuaternions number of quaternions in the array - @return none. - - @par - Format of rotation matrix - - - The quaternion a + ib + jc + kd is converted into rotation matrix: - 
-     a^2 + b^2 - c^2 - d^2                 2bc - 2ad                 2bd + 2ac
-                 2bc + 2ad     a^2 - b^2 + c^2 - d^2                 2cd - 2ab
-                 2bd - 2ac                 2cd + 2ab     a^2 - b^2 - c^2 + d^2
-
- Rotation matrix is saved in row order : R00 R01 R02 R10 R11 R12 R20 R21 R22 - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_quaternion2rotation_f32(const float32_t *pInputQuaternions, - float32_t *pOutputRotations, - uint32_t nbQuaternions) -{ - f32x4_t vec0,vec1, vec2 ,vec3; - float32_t q2q3, tmp1, tmp2 ; - - for(uint32_t nb=0; nb < nbQuaternions; nb++) - { - - // q0 q1 q2 q3 - vec0 = vld1q(pInputQuaternions); - - // q0^2 q1^2 q2^2 q3^2 - vec1 = vmulq(vec0,vec0); - - // q0^2 q1q0 q2q0 q3q0 - vec2 = vmulq_n_f32(vec0, vgetq_lane(vec0,0)); - - // 2 (q0^2 q1q0 q2q0 q3q0) - vec2 = vmulq_n_f32(vec2, 2.0f); - - - // 2 q2q3 - q2q3 = vgetq_lane(vec0,2) * vgetq_lane(vec0,3); - q2q3 = q2q3 * 2.0f; - - // 2 (q0q1 q1^2 q2q1 q3q1) - vec3 = vmulq_n_f32(vec0, vgetq_lane(vec0,1)); - vec3 = vmulq_n_f32(vec3, 2.0f); - - - - vec0 = vsetq_lane(vgetq_lane(vec1,0) + vgetq_lane(vec1,1),vec0,0); - vec0 = vsetq_lane(vgetq_lane(vec0,0) - vgetq_lane(vec1,2),vec0,0); - vec0 = vsetq_lane(vgetq_lane(vec0,0) - vgetq_lane(vec1,3),vec0,0); - vec0 = vsetq_lane(vgetq_lane(vec3,2) - vgetq_lane(vec2,3),vec0,1); - vec0 = vsetq_lane(vgetq_lane(vec3,3) + vgetq_lane(vec2,2),vec0,2); - vec0 = vsetq_lane(vgetq_lane(vec3,2) + vgetq_lane(vec2,3),vec0,3); - - vst1q(pOutputRotations, vec0); - pOutputRotations += 4; - - tmp1 = vgetq_lane(vec1,0) - vgetq_lane(vec1,1); - tmp2 = vgetq_lane(vec1,2) - vgetq_lane(vec1,3); - - - vec0 = vsetq_lane(tmp1 + tmp2,vec0,0); - vec0 = vsetq_lane(q2q3 - vgetq_lane(vec2,1) ,vec0,1); - vec0 = vsetq_lane(vgetq_lane(vec3,3) - vgetq_lane(vec2,2),vec0,2); - vec0 = vsetq_lane(q2q3 + vgetq_lane(vec2,1) ,vec0,3); - - vst1q(pOutputRotations, vec0); - pOutputRotations += 4; - - *pOutputRotations = tmp1 - tmp2; - pOutputRotations ++; - - pInputQuaternions += 4; - } -} - -#else -void arm_quaternion2rotation_f32(const float32_t *pInputQuaternions, - float32_t *pOutputRotations, - uint32_t nbQuaternions) -{ - uint32_t nb; - for(nb=0; nb < nbQuaternions; nb++) - { - float32_t q00 = SQ(pInputQuaternions[0 + nb * 4]); - float32_t q11 = SQ(pInputQuaternions[1 + nb * 4]); - float32_t q22 = SQ(pInputQuaternions[2 + nb * 4]); - float32_t q33 = SQ(pInputQuaternions[3 + nb * 4]); - float32_t q01 = pInputQuaternions[0 + nb * 4]*pInputQuaternions[1 + nb * 4]; - float32_t q02 = pInputQuaternions[0 + nb * 4]*pInputQuaternions[2 + nb * 4]; - float32_t q03 = pInputQuaternions[0 + nb * 4]*pInputQuaternions[3 + nb * 4]; - float32_t q12 = pInputQuaternions[1 + nb * 4]*pInputQuaternions[2 + nb * 4]; - float32_t q13 = pInputQuaternions[1 + nb * 4]*pInputQuaternions[3 + nb * 4]; - float32_t q23 = pInputQuaternions[2 + nb * 4]*pInputQuaternions[3 + nb * 4]; - - float32_t xx = q00 + q11 - q22 - q33; - float32_t yy = q00 - q11 + q22 - q33; - float32_t zz = q00 - q11 - q22 + q33; - float32_t xy = 2*(q12 - q03); - float32_t xz = 2*(q13 + q02); - float32_t yx = 2*(q12 + q03); - float32_t yz = 2*(q23 - q01); - float32_t zx = 2*(q13 - q02); - float32_t zy = 2*(q23 + q01); - - pOutputRotations[0 + nb * 9] = xx; pOutputRotations[1 + nb * 9] = xy; pOutputRotations[2 + nb * 9] = xz; - pOutputRotations[3 + nb * 9] = yx; pOutputRotations[4 + nb * 9] = yy; pOutputRotations[5 + nb * 9] = yz; - pOutputRotations[6 + nb * 9] = zx; pOutputRotations[7 + nb * 9] = zy; pOutputRotations[8 + nb * 9] = zz; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of QuatRot group - */ diff --git a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_conjugate_f32.c b/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_conjugate_f32.c deleted file mode 100644 index 48d0454..0000000 --- a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_conjugate_f32.c +++ /dev/null @@ -1,98 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_quaternion_conjugate_f32.c - * Description: Floating-point quaternion conjugate - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/quaternion_math_functions.h" -#include - -/** - @ingroup groupQuaternionMath - */ - -/** - @defgroup QuatConjugate Quaternion Conjugate - - Compute the conjugate of a quaternion. - */ - -/** - @addtogroup QuatConjugate - @{ - */ - -/** - @brief Floating-point quaternion conjugates. - @param[in] pInputQuaternions points to the input vector of quaternions - @param[out] pConjugateQuaternions points to the output vector of conjugate quaternions - @param[in] nbQuaternions number of quaternions in each vector - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_quaternion_conjugate_f32(const float32_t *pInputQuaternions, - float32_t *pConjugateQuaternions, - uint32_t nbQuaternions) -{ - f32x4_t vec1; - - for(uint32_t i=0; i < nbQuaternions; i++) - { - vec1 = vld1q(pInputQuaternions); - - - vec1 = vsetq_lane_f32(-vgetq_lane(vec1, 0),vec1,0); - vec1 = vnegq_f32(vec1); - - vst1q(pConjugateQuaternions, vec1); - - - pInputQuaternions += 4; - pConjugateQuaternions += 4; - } -} -#else -void arm_quaternion_conjugate_f32(const float32_t *pInputQuaternions, - float32_t *pConjugateQuaternions, - uint32_t nbQuaternions) -{ - uint32_t i; - for(i=0; i < nbQuaternions; i++) - { - - pConjugateQuaternions[4 * i + 0] = pInputQuaternions[4 * i + 0]; - pConjugateQuaternions[4 * i + 1] = -pInputQuaternions[4 * i + 1]; - pConjugateQuaternions[4 * i + 2] = -pInputQuaternions[4 * i + 2]; - pConjugateQuaternions[4 * i + 3] = -pInputQuaternions[4 * i + 3]; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of QuatConjugate group - */ diff --git a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_inverse_f32.c b/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_inverse_f32.c deleted file mode 100644 index 33ddca0..0000000 --- a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_inverse_f32.c +++ /dev/null @@ -1,114 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_quaternion_inverse_f32.c - * Description: Floating-point quaternion inverse - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/quaternion_math_functions.h" -#include - -/** - @ingroup groupQuaternionMath - */ - -/** - @defgroup QuatInverse Quaternion Inverse - - Compute the inverse of a quaternion. - */ - -/** - @addtogroup QuatInverse - @{ - */ - -/** - @brief Floating-point quaternion inverse. - @param[in] pInputQuaternions points to the input vector of quaternions - @param[out] pInverseQuaternions points to the output vector of inverse quaternions - @param[in] nbQuaternions number of quaternions in each vector - @return none - */ - - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_quaternion_inverse_f32(const float32_t *pInputQuaternions, - float32_t *pInverseQuaternions, - uint32_t nbQuaternions) -{ - f32x4_t vec1,vec2; - float32_t squaredSum; - - for(uint32_t i=0; i < nbQuaternions; i++) - { - - vec1 = vld1q(pInputQuaternions); - vec2 = vmulq(vec1,vec1); - squaredSum = vecAddAcrossF32Mve(vec2); - - - vec1 = vmulq_n_f32(vec1, 1.0f / squaredSum); - vec1 = vsetq_lane_f32(-vgetq_lane(vec1, 0),vec1,0); - vec1 = vnegq_f32(vec1); - - vst1q(pInverseQuaternions, vec1); - - - pInputQuaternions += 4; - pInverseQuaternions += 4; - - } -} - -#else -void arm_quaternion_inverse_f32(const float32_t *pInputQuaternions, - float32_t *pInverseQuaternions, - uint32_t nbQuaternions) -{ - float32_t temp; - - uint32_t i; - for(i=0; i < nbQuaternions; i++) - { - - temp = SQ(pInputQuaternions[4 * i + 0]) + - SQ(pInputQuaternions[4 * i + 1]) + - SQ(pInputQuaternions[4 * i + 2]) + - SQ(pInputQuaternions[4 * i + 3]); - - pInverseQuaternions[4 * i + 0] = pInputQuaternions[4 * i + 0] / temp; - pInverseQuaternions[4 * i + 1] = -pInputQuaternions[4 * i + 1] / temp; - pInverseQuaternions[4 * i + 2] = -pInputQuaternions[4 * i + 2] / temp; - pInverseQuaternions[4 * i + 3] = -pInputQuaternions[4 * i + 3] / temp; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of QuatInverse group - */ diff --git a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_norm_f32.c b/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_norm_f32.c deleted file mode 100644 index cf7cdb8..0000000 --- a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_norm_f32.c +++ /dev/null @@ -1,102 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_quaternion_norm_f32.c - * Description: Floating-point quaternion Norm - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/quaternion_math_functions.h" -#include - -/** - @ingroup groupQuaternionMath - */ - -/** - @defgroup QuatNorm Quaternion Norm - - Compute the norm of a quaternion. - */ - -/** - @addtogroup QuatNorm - @{ - */ - -/** - @brief Floating-point quaternion Norm. - @param[in] pInputQuaternions points to the input vector of quaternions - @param[out] pNorms points to the output vector of norms - @param[in] nbQuaternions number of quaternions in the input vector - @return none - */ - - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_quaternion_norm_f32(const float32_t *pInputQuaternions, - float32_t *pNorms, - uint32_t nbQuaternions) -{ - f32x4_t vec1; - float32_t squaredSum; - - for(uint32_t i=0; i < nbQuaternions; i++) - { - vec1 = vld1q(pInputQuaternions); - vec1 = vmulq(vec1,vec1); - squaredSum = vecAddAcrossF32Mve(vec1); - arm_sqrt_f32(squaredSum,pNorms); - - pInputQuaternions+= 4; - pNorms ++; - } - -} - -#else - -void arm_quaternion_norm_f32(const float32_t *pInputQuaternions, - float32_t *pNorms, - uint32_t nbQuaternions) -{ - float32_t temp; - uint32_t i; - - for(i=0; i < nbQuaternions; i++) - { - temp = SQ(pInputQuaternions[4 * i + 0]) + - SQ(pInputQuaternions[4 * i + 1]) + - SQ(pInputQuaternions[4 * i + 2]) + - SQ(pInputQuaternions[4 * i + 3]); - pNorms[i] = sqrtf(temp); - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of QuatNorm group - */ diff --git a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_normalize_f32.c b/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_normalize_f32.c deleted file mode 100644 index d83f854..0000000 --- a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_normalize_f32.c +++ /dev/null @@ -1,107 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_quaternion_normalize_f32.c - * Description: Floating-point quaternion normalization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/quaternion_math_functions.h" -#include - -/** - @ingroup groupQuaternionMath - */ - -/** - @defgroup QuatNormalized Quaternion normalization - - Compute a normalized quaternion. - */ - -/** - @addtogroup QuatNormalized - @{ - */ - -/** - @brief Floating-point normalization of quaternions. - @param[in] pInputQuaternions points to the input vector of quaternions - @param[out] pNormalizedQuaternions points to the output vector of normalized quaternions - @param[in] nbQuaternions number of quaternions in each vector - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_quaternion_normalize_f32(const float32_t *pInputQuaternions, - float32_t *pNormalizedQuaternions, - uint32_t nbQuaternions) -{ - f32x4_t vec1,vec2; - float32_t squaredSum,norm; - - for(uint32_t i=0; i < nbQuaternions; i++) - { - vec1 = vld1q(pInputQuaternions); - vec2 = vmulq(vec1,vec1); - squaredSum = vecAddAcrossF32Mve(vec2); - arm_sqrt_f32(squaredSum,&norm); - vec1 = vmulq_n_f32(vec1, 1.0f / norm); - vst1q(pNormalizedQuaternions, vec1); - - pInputQuaternions += 4; - pNormalizedQuaternions += 4; - - } -} - -#else -void arm_quaternion_normalize_f32(const float32_t *pInputQuaternions, - float32_t *pNormalizedQuaternions, - uint32_t nbQuaternions) -{ - float32_t temp; - - uint32_t i; - for(i=0; i < nbQuaternions; i++) - { - temp = SQ(pInputQuaternions[4 * i + 0]) + - SQ(pInputQuaternions[4 * i + 1]) + - SQ(pInputQuaternions[4 * i + 2]) + - SQ(pInputQuaternions[4 * i + 3]); - temp = sqrtf(temp); - - pNormalizedQuaternions[4 * i + 0] = pInputQuaternions[4 * i + 0] / temp; - pNormalizedQuaternions[4 * i + 1] = pInputQuaternions[4 * i + 1] / temp; - pNormalizedQuaternions[4 * i + 2] = pInputQuaternions[4 * i + 2] / temp; - pNormalizedQuaternions[4 * i + 3] = pInputQuaternions[4 * i + 3] / temp; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of QuatNormalized group - */ diff --git a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_f32.c b/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_f32.c deleted file mode 100644 index 1ccc416..0000000 --- a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_f32.c +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_quaternion_product_f32.c - * Description: Floating-point quaternion product - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/quaternion_math_functions.h" -#include - -/** - @ingroup groupQuaternionMath - */ - -/** - @defgroup QuatProd Quaternion Product - - Compute the product of quaternions. - */ - -/** - @ingroup QuatProd - */ - -/** - @defgroup QuatProdVect Elementwise Quaternion Product - - Compute the elementwise product of quaternions. - */ - -/** - @addtogroup QuatProdVect - @{ - */ - -/** - @brief Floating-point elementwise product two quaternions. - @param[in] qa first array of quaternions - @param[in] qb second array of quaternions - @param[out] qr elementwise product of quaternions - @param[in] nbQuaternions number of quaternions in the array - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_quaternion_product_f32(const float32_t *qa, - const float32_t *qb, - float32_t *qr, - uint32_t nbQuaternions) -{ - static uint32_t patternA[4] = { 0, 1, 0, 1 }; - static uint32_t patternB[4] = { 3, 2, 3, 2 }; - static uint32_t patternC[4] = { 3, 2, 1, 0 }; - static float32_t signA[4] = { -1, -1, 1, 1 }; - - uint32x4_t vecA = vld1q_u32(patternA); - uint32x4_t vecB = vld1q_u32(patternB); - uint32x4_t vecC = vld1q_u32(patternC); - f32x4_t vecSignA = vld1q_f32(signA); - - while (nbQuaternions > 0U) - { - f32x4_t vecTmpA, vecTmpB, vecAcc; - - vecTmpA = vldrwq_gather_shifted_offset_f32(qa, vecA); - vecTmpB = vld1q(qb); - /* - * vcmul(r, [a1, a2, a1, a2], [b1, b2, b3, b4], 0) - */ - vecAcc = vcmulq(vecTmpA, vecTmpB); - /* - * vcmla(r, [a1, a2, a1, a2], [b1, b2, b3, b4], 90) - */ - vecAcc = vcmlaq_rot90(vecAcc, vecTmpA, vecTmpB); - - vecTmpA = vldrwq_gather_shifted_offset_f32(qa, vecB); - vecTmpB = vldrwq_gather_shifted_offset_f32(qb, vecC); - /* - * build [-b4, -b3, b2, b1] - */ - vecTmpB = vecTmpB * vecSignA; - /* - * vcmla(r, [a4, a3, a4, a3], [-b4, -b3, b2, b1], 270) - */ - vecAcc = vcmlaq_rot270(vecAcc, vecTmpA, vecTmpB); - /* - * vcmla(r, [a4, a3, a4, a3], [-b4, -b3, b2, b1], 0) - */ - vecAcc = vcmlaq(vecAcc, vecTmpA, vecTmpB); - /* - * store accumulator - */ - vst1q_f32(qr, vecAcc); - - /* move to next quaternion */ - qa += 4; - qb += 4; - qr += 4; - - nbQuaternions--; - } -} - -#else - -void arm_quaternion_product_f32(const float32_t *qa, - const float32_t *qb, - float32_t *qr, - uint32_t nbQuaternions) -{ - uint32_t i; - for(i=0; i < nbQuaternions; i++) - { - arm_quaternion_product_single_f32(qa, qb, qr); - - qa += 4; - qb += 4; - qr += 4; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of QuatProdVect group - */ diff --git a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_single_f32.c b/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_single_f32.c deleted file mode 100644 index 866af6f..0000000 --- a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_single_f32.c +++ /dev/null @@ -1,107 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_quaternion_product_single_f32.c - * Description: Floating-point quaternion product - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/quaternion_math_functions.h" -#include - - -/** - @ingroup QuatProd - */ - -/** - @defgroup QuatProdSingle Quaternion Product - - Compute the product of two quaternions. - */ - -/** - @addtogroup QuatProdSingle - @{ - */ - -/** - @brief Floating-point product of two quaternions. - @param[in] qa first quaternion - @param[in] qb second quaternion - @param[out] qr product of two quaternions - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_quaternion_product_single_f32(const float32_t *qa, - const float32_t *qb, - float32_t *qr) -{ - static uint32_t patternA[4] = { 0, 1, 0, 1 }; - static uint32_t patternB[4] = { 3, 2, 3, 2 }; - static uint32_t patternC[4] = { 3, 2, 1, 0 }; - static float32_t signA[4] = { -1, -1, 1, 1 }; - - uint32x4_t vecA = vld1q_u32(patternA); - uint32x4_t vecB = vld1q_u32(patternB); - uint32x4_t vecC = vld1q_u32(patternC); - f32x4_t vecSignA = vld1q_f32(signA); - - - f32x4_t vecTmpA, vecTmpB, vecAcc; - - vecTmpA = vldrwq_gather_shifted_offset_f32(qa, vecA); - vecTmpB = vld1q_f32(qb); - - vecAcc = vcmulq_f32(vecTmpA, vecTmpB); - vecAcc = vcmlaq_rot90_f32(vecAcc, vecTmpA, vecTmpB); - - vecTmpA = vldrwq_gather_shifted_offset_f32(qa, vecB); - vecTmpB = vldrwq_gather_shifted_offset_f32(qb, vecC); - - vecTmpB = vecTmpB * vecSignA; - - vecAcc = vcmlaq_rot270_f32(vecAcc, vecTmpA, vecTmpB); - vecAcc = vcmlaq_f32(vecAcc, vecTmpA, vecTmpB); - - vst1q_f32(qr, vecAcc); -} - -#else -void arm_quaternion_product_single_f32(const float32_t *qa, - const float32_t *qb, - float32_t *qr) -{ - qr[0] = qa[0] * qb[0] - qa[1] * qb[1] - qa[2] * qb[2] - qa[3] * qb[3]; - qr[1] = qa[0] * qb[1] + qa[1] * qb[0] + qa[2] * qb[3] - qa[3] * qb[2]; - qr[2] = qa[0] * qb[2] + qa[2] * qb[0] + qa[3] * qb[1] - qa[1] * qb[3]; - qr[3] = qa[0] * qb[3] + qa[3] * qb[0] + qa[1] * qb[2] - qa[2] * qb[1]; -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of QuatProdSingle group - */ diff --git a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_rotation2quaternion_f32.c b/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_rotation2quaternion_f32.c deleted file mode 100644 index 5896308..0000000 --- a/Drivers/CMSIS/DSP/Source/QuaternionMathFunctions/arm_rotation2quaternion_f32.c +++ /dev/null @@ -1,225 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rotation2quaternion_f32.c - * Description: Floating-point rotation to quaternion conversion - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/quaternion_math_functions.h" -#include - -#define RI(x,y) r[(3*(x) + (y))] - - -/** - @ingroup QuatConv - */ - -/** - @defgroup RotQuat Rotation to Quaternion - - Conversions from rotation to quaternion. - */ - -/** - @addtogroup RotQuat - @{ - */ - -/** - * @brief Conversion of a rotation matrix to an equivalent quaternion. - * @param[in] pInputRotations points to an array 3x3 rotation matrix (in row order) - * @param[out] pOutputQuaternions points to an array quaternions - * @param[in] nbQuaternions number of quaternions in the array - * @return none. - * - * q and -q are representing the same rotation. This ambiguity must be taken into - * account when using the output of this function. - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -#define R00 vgetq_lane(q1,0) -#define R01 vgetq_lane(q1,1) -#define R02 vgetq_lane(q1,2) -#define R10 vgetq_lane(q1,3) -#define R11 vgetq_lane(q2,0) -#define R12 vgetq_lane(q2,1) -#define R20 vgetq_lane(q2,2) -#define R21 vgetq_lane(q2,3) -#define R22 ro22 - -void arm_rotation2quaternion_f32(const float32_t *pInputRotations, - float32_t *pOutputQuaternions, - uint32_t nbQuaternions) -{ - float32_t ro22, trace; - f32x4_t q1,q2, q; - - float32_t doubler; - float32_t s; - - q = vdupq_n_f32(0.0f); - - for(uint32_t nb=0; nb < nbQuaternions; nb++) - { - q1 = vld1q(pInputRotations); - pInputRotations += 4; - - q2 = vld1q(pInputRotations); - pInputRotations += 4; - - ro22 = *pInputRotations++; - - trace = R00 + R11 + R22; - - - if (trace > 0) - { - (void)arm_sqrt_f32(trace + 1.0f, &doubler) ; // invs=4*qw - doubler = 2.0f*doubler; - s = 1.0f / doubler; - - q1 = vmulq_n_f32(q1,s); - q2 = vmulq_n_f32(q2,s); - - q[0] = 0.25f * doubler; - q[1] = R21 - R12; - q[2] = R02 - R20; - q[3] = R10 - R01; - } - else if ((R00 > R11) && (R00 > R22) ) - { - (void)arm_sqrt_f32(1.0f + R00 - R11 - R22,&doubler); // invs=4*qx - doubler = 2.0f*doubler; - s = 1.0f / doubler; - - q1 = vmulq_n_f32(q1,s); - q2 = vmulq_n_f32(q2,s); - - q[0] = R21 - R12; - q[1] = 0.25f * doubler; - q[2] = R01 + R10; - q[3] = R02 + R20; - } - else if (R11 > R22) - { - (void)arm_sqrt_f32(1.0f + R11 - R00 - R22,&doubler); // invs=4*qy - doubler = 2.0f*doubler; - s = 1.0f / doubler; - - q1 = vmulq_n_f32(q1,s); - q2 = vmulq_n_f32(q2,s); - - q[0] = R02 - R20; - q[1] = R01 + R10; - q[2] = 0.25f * doubler; - q[3] = R12 + R21; - } - else - { - (void)arm_sqrt_f32(1.0f + R22 - R00 - R11,&doubler); // invs=4*qz - doubler = 2.0f*doubler; - s = 1.0f / doubler; - - q1 = vmulq_n_f32(q1,s); - q2 = vmulq_n_f32(q2,s); - - q[0] = R10 - R01; - q[1] = R02 + R20; - q[2] = R12 + R21; - q[3] = 0.25f * doubler; - } - - vst1q(pOutputQuaternions, q); - pOutputQuaternions += 4; - - } -} - -#else -void arm_rotation2quaternion_f32(const float32_t *pInputRotations, - float32_t *pOutputQuaternions, - uint32_t nbQuaternions) -{ - uint32_t nb; - for(nb=0; nb < nbQuaternions; nb++) - { - const float32_t *r=&pInputRotations[nb*9]; - float32_t *q=&pOutputQuaternions[nb*4]; - - float32_t trace = RI(0,0) + RI(1,1) + RI(2,2); - - float32_t doubler; - float32_t s; - - - - if (trace > 0.0f) - { - doubler = sqrtf(trace + 1.0f) * 2.0f; // invs=4*qw - s = 1.0f / doubler; - q[0] = 0.25f * doubler; - q[1] = (RI(2,1) - RI(1,2)) * s; - q[2] = (RI(0,2) - RI(2,0)) * s; - q[3] = (RI(1,0) - RI(0,1)) * s; - } - else if ((RI(0,0) > RI(1,1)) && (RI(0,0) > RI(2,2)) ) - { - doubler = sqrtf(1.0f + RI(0,0) - RI(1,1) - RI(2,2)) * 2.0f; // invs=4*qx - s = 1.0f / doubler; - q[0] = (RI(2,1) - RI(1,2)) * s; - q[1] = 0.25f * doubler; - q[2] = (RI(0,1) + RI(1,0)) * s; - q[3] = (RI(0,2) + RI(2,0)) * s; - } - else if (RI(1,1) > RI(2,2)) - { - doubler = sqrtf(1.0f + RI(1,1) - RI(0,0) - RI(2,2)) * 2.0f; // invs=4*qy - s = 1.0f / doubler; - q[0] = (RI(0,2) - RI(2,0)) * s; - q[1] = (RI(0,1) + RI(1,0)) * s; - q[2] = 0.25f * doubler; - q[3] = (RI(1,2) + RI(2,1)) * s; - } - else - { - doubler = sqrtf(1.0f + RI(2,2) - RI(0,0) - RI(1,1)) * 2.0f; // invs=4*qz - s = 1.0f / doubler; - q[0] = (RI(1,0) - RI(0,1)) * s; - q[1] = (RI(0,2) + RI(2,0)) * s; - q[2] = (RI(1,2) + RI(2,1)) * s; - q[3] = 0.25f * doubler; - } - - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of RotQuat group - */ diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/SVMFunctions/CMakeLists.txt deleted file mode 100644 index 502d6cf..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/CMakeLists.txt +++ /dev/null @@ -1,41 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPSVM) - -include(configLib) -include(configDsp) - - -add_library(CMSISDSPSVM STATIC) - -target_sources(CMSISDSPSVM PRIVATE arm_svm_linear_init_f32.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_rbf_init_f32.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_linear_predict_f32.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_rbf_predict_f32.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_polynomial_init_f32.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_sigmoid_init_f32.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_polynomial_predict_f32.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_sigmoid_predict_f32.c) - - - -configLib(CMSISDSPSVM ${ROOT}) -configDsp(CMSISDSPSVM ${ROOT}) - -### Includes -target_include_directories(CMSISDSPSVM PUBLIC "${DSP}/Include") - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPSVM PRIVATE arm_svm_linear_init_f16.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_rbf_init_f16.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_linear_predict_f16.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_rbf_predict_f16.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_polynomial_init_f16.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_sigmoid_init_f16.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_polynomial_predict_f16.c) -target_sources(CMSISDSPSVM PRIVATE arm_svm_sigmoid_predict_f16.c) -endif() - - - - diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c deleted file mode 100644 index 91c67af..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c +++ /dev/null @@ -1,36 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: BayesFunctions.c - * Description: Combination of all SVM function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_svm_linear_init_f32.c" -#include "arm_svm_linear_predict_f32.c" -#include "arm_svm_polynomial_init_f32.c" -#include "arm_svm_polynomial_predict_f32.c" -#include "arm_svm_rbf_init_f32.c" -#include "arm_svm_rbf_predict_f32.c" -#include "arm_svm_sigmoid_init_f32.c" -#include "arm_svm_sigmoid_predict_f32.c" diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c deleted file mode 100644 index 29e175f..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c +++ /dev/null @@ -1,36 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: BayesFunctions.c - * Description: Combination of all SVM function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_svm_linear_init_f16.c" -#include "arm_svm_linear_predict_f16.c" -#include "arm_svm_polynomial_init_f16.c" -#include "arm_svm_polynomial_predict_f16.c" -#include "arm_svm_rbf_init_f16.c" -#include "arm_svm_rbf_predict_f16.c" -#include "arm_svm_sigmoid_init_f16.c" -#include "arm_svm_sigmoid_predict_f16.c" diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f16.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f16.c deleted file mode 100644 index 4373c9d..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f16.c +++ /dev/null @@ -1,98 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_linear_init_f16.c - * Description: SVM Linear Instance Initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - * @defgroup groupSVM SVM Functions - * - */ - -/** - @ingroup groupSVM - */ - -/** - @defgroup linearsvm Linear SVM - - Linear SVM classifier - */ - -/** - * @addtogroup linearsvm - * @{ - */ - - -/** - * @brief SVM linear instance init function - * - * Classes are integer used as output of the function (instead of having -1,1 - * as class values). - * - * @param[in] S Parameters for the SVM function - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @return none. - * - */ - - -void arm_svm_linear_init_f16(arm_svm_linear_instance_f16 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float16_t intercept, - const float16_t *dualCoefficients, - const float16_t *supportVectors, - const int32_t *classes) -{ - S->nbOfSupportVectors = nbOfSupportVectors; - S->vectorDimension = vectorDimension; - S->intercept = intercept; - S->dualCoefficients = dualCoefficients; - S->supportVectors = supportVectors; - S->classes = classes; -} - - - -/** - * @} end of linearsvm group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c deleted file mode 100644 index fd0f931..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_linear_init_f32.c - * Description: SVM Linear Instance Initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions.h" -#include -#include - -/** - * @defgroup groupSVM SVM Functions - * - */ - -/** - @ingroup groupSVM - */ - -/** - @defgroup linearsvm Linear SVM - - Linear SVM classifier - */ - -/** - * @addtogroup linearsvm - * @{ - */ - - -/** - * @brief SVM linear instance init function - * - * Classes are integer used as output of the function (instead of having -1,1 - * as class values). - * - * @param[in] S Parameters for the SVM function - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @return none. - * - */ - - -void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float32_t intercept, - const float32_t *dualCoefficients, - const float32_t *supportVectors, - const int32_t *classes) -{ - S->nbOfSupportVectors = nbOfSupportVectors; - S->vectorDimension = vectorDimension; - S->intercept = intercept; - S->dualCoefficients = dualCoefficients; - S->supportVectors = supportVectors; - S->classes = classes; -} - - - -/** - * @} end of linearsvm group - */ diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f16.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f16.c deleted file mode 100644 index 4430580..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f16.c +++ /dev/null @@ -1,314 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_linear_predict_f16.c - * Description: SVM Linear Classifier - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - - -/** - * @addtogroup linearsvm - * @{ - */ - - -/** - * @brief SVM linear prediction - * @param[in] S Pointer to an instance of the linear SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_svm_linear_predict_f16( - const arm_svm_linear_instance_f16 *S, - const float16_t * in, - int32_t * pResult) -{ - /* inlined Matrix x Vector function interleaved with dot prod */ - uint32_t numRows = S->nbOfSupportVectors; - uint32_t numCols = S->vectorDimension; - const float16_t *pSupport = S->supportVectors; - const float16_t *pSrcA = pSupport; - const float16_t *pInA0; - const float16_t *pInA1; - uint32_t row; - uint32_t blkCnt; /* loop counters */ - const float16_t *pDualCoef = S->dualCoefficients; - _Float16 sum = S->intercept; - row = numRows; - - /* - * compute 4 rows in parrallel - */ - while (row >= 4) - { - const float16_t *pInA2, *pInA3; - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec; - f16x8_t vecIn, acc0, acc1, acc2, acc3; - float16_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 4 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - acc1 = vdupq_n_f16(0.0f); - acc2 = vdupq_n_f16(0.0f); - acc3 = vdupq_n_f16(0.0f); - - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - pSrcA2Vec = pInA2; - pSrcA3Vec = pInA3; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 8; - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vld1q(pSrcA2Vec); - pSrcA2Vec += 8; - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vld1q(pSrcA3Vec); - pSrcA3Vec += 8; - acc3 = vfmaq(acc3, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA2Vec, p0); - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA3Vec, p0); - acc3 = vfmaq(acc3, vecIn, vecA); - } - /* - * Sum the partial parts - */ - acc0 = vmulq_n_f16(acc0,*pDualCoef++); - acc0 = vfmaq_n_f16(acc0,acc1,*pDualCoef++); - acc0 = vfmaq_n_f16(acc0,acc2,*pDualCoef++); - acc0 = vfmaq_n_f16(acc0,acc3,*pDualCoef++); - - sum += (_Float16)vecAddAcrossF16Mve(acc0); - - pSrcA += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * compute 2 rows in parallel - */ - if (row >= 2) { - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec; - f16x8_t vecIn, acc0, acc1; - float16_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 2 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - acc1 = vdupq_n_f16(0.0f); - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 8; - acc1 = vfmaq(acc1, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - } - /* - * Sum the partial parts - */ - acc0 = vmulq_n_f16(acc0,*pDualCoef++); - acc0 = vfmaq_n_f16(acc0,acc1,*pDualCoef++); - - sum += (_Float16)vecAddAcrossF16Mve(acc0); - - pSrcA += numCols * 2; - row -= 2; - } - - if (row >= 1) { - f16x8_t vecIn, acc0; - float16_t const *pSrcA0Vec, *pInVec; - float16_t const *pSrcVecPtr = in; - /* - * Initialize the pointers to last MatrixA row - */ - pInA0 = pSrcA; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - - pSrcA0Vec = pInA0; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - } - /* - * Sum the partial parts - */ - sum += (_Float16)*pDualCoef++ * (_Float16)vecAddAcrossF16Mve(acc0); - - } - - *pResult = S->classes[STEP(sum)]; -} - -#else -void arm_svm_linear_predict_f16( - const arm_svm_linear_instance_f16 *S, - const float16_t * in, - int32_t * pResult) -{ - _Float16 sum=S->intercept; - _Float16 dot=0; - uint32_t i,j; - const float16_t *pSupport = S->supportVectors; - - for(i=0; i < S->nbOfSupportVectors; i++) - { - dot=0; - for(j=0; j < S->vectorDimension; j++) - { - dot = dot + in[j]* *pSupport++; - } - sum += S->dualCoefficients[i] * dot; - } - *pResult=S->classes[STEP(sum)]; -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of linearsvm group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c deleted file mode 100644 index a8239dc..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c +++ /dev/null @@ -1,461 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_linear_predict_f32.c - * Description: SVM Linear Classifier - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions.h" -#include -#include - - -/** - * @addtogroup linearsvm - * @{ - */ - - -/** - * @brief SVM linear prediction - * @param[in] S Pointer to an instance of the linear SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_svm_linear_predict_f32( - const arm_svm_linear_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - /* inlined Matrix x Vector function interleaved with dot prod */ - uint32_t numRows = S->nbOfSupportVectors; - uint32_t numCols = S->vectorDimension; - const float32_t *pSupport = S->supportVectors; - const float32_t *pSrcA = pSupport; - const float32_t *pInA0; - const float32_t *pInA1; - uint32_t row; - uint32_t blkCnt; /* loop counters */ - const float32_t *pDualCoef = S->dualCoefficients; - float32_t sum = S->intercept; - row = numRows; - - /* - * compute 4 rows in parrallel - */ - while (row >= 4) - { - const float32_t *pInA2, *pInA3; - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec; - f32x4_t vecIn, acc0, acc1, acc2, acc3; - float32_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 4 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - acc2 = vdupq_n_f32(0.0f); - acc3 = vdupq_n_f32(0.0f); - - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - pSrcA2Vec = pInA2; - pSrcA3Vec = pInA3; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vld1q(pSrcA2Vec); - pSrcA2Vec += 4; - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vld1q(pSrcA3Vec); - pSrcA3Vec += 4; - acc3 = vfmaq(acc3, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA2Vec, p0); - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA3Vec, p0); - acc3 = vfmaq(acc3, vecIn, vecA); - } - /* - * Sum the partial parts - */ - - acc0 = vmulq_n_f32(acc0,*pDualCoef++); - acc0 = vfmaq_n_f32(acc0,acc1,*pDualCoef++); - acc0 = vfmaq_n_f32(acc0,acc2,*pDualCoef++); - acc0 = vfmaq_n_f32(acc0,acc3,*pDualCoef++); - - sum += vecAddAcrossF32Mve(acc0); - - pSrcA += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * compute 2 rows in parallel - */ - if (row >= 2) { - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec; - f32x4_t vecIn, acc0, acc1; - float32_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 2 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - acc1 = vfmaq(acc1, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - } - /* - * Sum the partial parts - */ - acc0 = vmulq_n_f32(acc0,*pDualCoef++); - acc0 = vfmaq_n_f32(acc0,acc1,*pDualCoef++); - - sum += vecAddAcrossF32Mve(acc0); - - - pSrcA += numCols * 2; - row -= 2; - } - - if (row >= 1) { - f32x4_t vecIn, acc0; - float32_t const *pSrcA0Vec, *pInVec; - float32_t const *pSrcVecPtr = in; - /* - * Initialize the pointers to last MatrixA row - */ - pInA0 = pSrcA; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - - pSrcA0Vec = pInA0; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - } - /* - * Sum the partial parts - */ - sum += *pDualCoef++ * vecAddAcrossF32Mve(acc0); - - } - - *pResult = S->classes[STEP(sum)]; -} - -#else -#if defined(ARM_MATH_NEON) -void arm_svm_linear_predict_f32( - const arm_svm_linear_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - float32_t sum = S->intercept; - - float32_t dot; - float32x4_t dotV; - - float32x4_t accuma,accumb,accumc,accumd,accum; - float32x2_t accum2; - float32x4_t vec1; - - float32x4_t vec2,vec2a,vec2b,vec2c,vec2d; - - uint32_t blkCnt; - uint32_t vectorBlkCnt; - - const float32_t *pIn = in; - - const float32_t *pSupport = S->supportVectors; - - const float32_t *pSupporta = S->supportVectors; - const float32_t *pSupportb; - const float32_t *pSupportc; - const float32_t *pSupportd; - - pSupportb = pSupporta + S->vectorDimension; - pSupportc = pSupportb + S->vectorDimension; - pSupportd = pSupportc + S->vectorDimension; - - const float32_t *pDualCoefs = S->dualCoefficients; - - vectorBlkCnt = S->nbOfSupportVectors >> 2; - - while (vectorBlkCnt > 0U) - { - accuma = vdupq_n_f32(0); - accumb = vdupq_n_f32(0); - accumc = vdupq_n_f32(0); - accumd = vdupq_n_f32(0); - - pIn = in; - - blkCnt = S->vectorDimension >> 2; - while (blkCnt > 0U) - { - - vec1 = vld1q_f32(pIn); - vec2a = vld1q_f32(pSupporta); - vec2b = vld1q_f32(pSupportb); - vec2c = vld1q_f32(pSupportc); - vec2d = vld1q_f32(pSupportd); - - pIn += 4; - pSupporta += 4; - pSupportb += 4; - pSupportc += 4; - pSupportd += 4; - - accuma = vmlaq_f32(accuma, vec1,vec2a); - accumb = vmlaq_f32(accumb, vec1,vec2b); - accumc = vmlaq_f32(accumc, vec1,vec2c); - accumd = vmlaq_f32(accumd, vec1,vec2d); - - blkCnt -- ; - } - accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0); - - accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1); - - accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2); - - accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3); - - - blkCnt = S->vectorDimension & 3; - while (blkCnt > 0U) - { - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + *pIn * *pSupporta++, dotV,0); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + *pIn * *pSupportb++, dotV,1); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + *pIn * *pSupportc++, dotV,2); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + *pIn * *pSupportd++, dotV,3); - - pIn++; - - blkCnt -- ; - } - - vec1 = vld1q_f32(pDualCoefs); - pDualCoefs += 4; - - accum = vmulq_f32(vec1,dotV); - accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); - sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1); - - pSupporta += 3*S->vectorDimension; - pSupportb += 3*S->vectorDimension; - pSupportc += 3*S->vectorDimension; - pSupportd += 3*S->vectorDimension; - - vectorBlkCnt -- ; - } - - pSupport = pSupporta; - vectorBlkCnt = S->nbOfSupportVectors & 3; - while (vectorBlkCnt > 0U) - { - accum = vdupq_n_f32(0); - dot = 0.0f; - pIn = in; - - blkCnt = S->vectorDimension >> 2; - while (blkCnt > 0U) - { - - vec1 = vld1q_f32(pIn); - vec2 = vld1q_f32(pSupport); - pIn += 4; - pSupport += 4; - - accum = vmlaq_f32(accum, vec1,vec2); - - blkCnt -- ; - } - accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); - dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1); - - - blkCnt = S->vectorDimension & 3; - while (blkCnt > 0U) - { - dot = dot + *pIn++ * *pSupport++; - - blkCnt -- ; - } - - sum += *pDualCoefs++ * dot; - vectorBlkCnt -- ; - } - - *pResult=S->classes[STEP(sum)]; -} -#else -void arm_svm_linear_predict_f32( - const arm_svm_linear_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - float32_t sum=S->intercept; - float32_t dot=0; - uint32_t i,j; - const float32_t *pSupport = S->supportVectors; - - for(i=0; i < S->nbOfSupportVectors; i++) - { - dot=0; - for(j=0; j < S->vectorDimension; j++) - { - dot = dot + in[j]* *pSupport++; - } - sum += S->dualCoefficients[i] * dot; - } - *pResult=S->classes[STEP(sum)]; -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of linearsvm group - */ diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f16.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f16.c deleted file mode 100644 index 12828ab..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f16.c +++ /dev/null @@ -1,103 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_polynomial_init_f16.c - * Description: SVM Polynomial Instance Initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup groupSVM - */ - -/** - @defgroup polysvm Polynomial SVM - - Polynomial SVM classifier - */ - -/** - * @addtogroup polysvm - * @{ - */ - - -/** - * @brief SVM polynomial instance init function - * - * Classes are integer used as output of the function (instead of having -1,1 - * as class values). - * - * @param[in] S points to an instance of the polynomial SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] degree Polynomial degree - * @param[in] coef0 coeff0 (scikit-learn terminology) - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - - -void arm_svm_polynomial_init_f16(arm_svm_polynomial_instance_f16 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float16_t intercept, - const float16_t *dualCoefficients, - const float16_t *supportVectors, - const int32_t *classes, - int32_t degree, - float16_t coef0, - float16_t gamma - ) -{ - S->nbOfSupportVectors = nbOfSupportVectors; - S->vectorDimension = vectorDimension; - S->intercept = intercept; - S->dualCoefficients = dualCoefficients; - S->supportVectors = supportVectors; - S->classes = classes; - S->degree = degree; - S->coef0 = coef0; - S->gamma = gamma; -} - - - -/** - * @} end of polysvm group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c deleted file mode 100644 index 9fb6e2f..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c +++ /dev/null @@ -1,97 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_polynomial_init_f32.c - * Description: SVM Polynomial Instance Initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions.h" -#include -#include - -/** - @ingroup groupSVM - */ - -/** - @defgroup polysvm Polynomial SVM - - Polynomial SVM classifier - */ - -/** - * @addtogroup polysvm - * @{ - */ - - -/** - * @brief SVM polynomial instance init function - * - * Classes are integer used as output of the function (instead of having -1,1 - * as class values). - * - * @param[in] S points to an instance of the polynomial SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] degree Polynomial degree - * @param[in] coef0 coeff0 (scikit-learn terminology) - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - - -void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float32_t intercept, - const float32_t *dualCoefficients, - const float32_t *supportVectors, - const int32_t *classes, - int32_t degree, - float32_t coef0, - float32_t gamma - ) -{ - S->nbOfSupportVectors = nbOfSupportVectors; - S->vectorDimension = vectorDimension; - S->intercept = intercept; - S->dualCoefficients = dualCoefficients; - S->supportVectors = supportVectors; - S->classes = classes; - S->degree = degree; - S->coef0 = coef0; - S->gamma = gamma; -} - - - -/** - * @} end of polysvm group - */ diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f16.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f16.c deleted file mode 100644 index 76d0248..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f16.c +++ /dev/null @@ -1,336 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_polynomial_predict_f16.c - * Description: SVM Polynomial Classifier - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - - -/** - * @addtogroup polysvm - * @{ - */ - - -/** - * @brief SVM polynomial prediction - * @param[in] S Pointer to an instance of the polynomial SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math_f16.h" - -void arm_svm_polynomial_predict_f16( - const arm_svm_polynomial_instance_f16 *S, - const float16_t * in, - int32_t * pResult) -{ - /* inlined Matrix x Vector function interleaved with dot prod */ - uint32_t numRows = S->nbOfSupportVectors; - uint32_t numCols = S->vectorDimension; - const float16_t *pSupport = S->supportVectors; - const float16_t *pSrcA = pSupport; - const float16_t *pInA0; - const float16_t *pInA1; - uint32_t row; - uint32_t blkCnt; /* loop counters */ - const float16_t *pDualCoef = S->dualCoefficients; - _Float16 sum = S->intercept; - f16x8_t vSum = vdupq_n_f16(0.0f); - - row = numRows; - - /* - * compute 4 rows in parrallel - */ - while (row >= 4) { - const float16_t *pInA2, *pInA3; - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec; - f16x8_t vecIn, acc0, acc1, acc2, acc3; - float16_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 4 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - acc1 = vdupq_n_f16(0.0f); - acc2 = vdupq_n_f16(0.0f); - acc3 = vdupq_n_f16(0.0f); - - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - pSrcA2Vec = pInA2; - pSrcA3Vec = pInA3; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 8; - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vld1q(pSrcA2Vec); - pSrcA2Vec += 8; - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vld1q(pSrcA3Vec); - pSrcA3Vec += 8; - acc3 = vfmaq(acc3, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA2Vec, p0); - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA3Vec, p0); - acc3 = vfmaq(acc3, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f16x8_t vtmp = vuninitializedq_f16(); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc2), vtmp, 2); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc3), vtmp, 3); - - vSum = vfmaq_m_f16(vSum, vld1q(pDualCoef), - arm_vec_exponent_f16 - (vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0), - S->degree),vctp16q(4)); - - pDualCoef += 4; - - pSrcA += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * compute 2 rows in parrallel - */ - if (row >= 2) { - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec; - f16x8_t vecIn, acc0, acc1; - float16_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 2 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - acc1 = vdupq_n_f16(0.0f); - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 8; - acc1 = vfmaq(acc1, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f16x8_t vtmp = vuninitializedq_f16(); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1); - - vSum = vfmaq_m_f16(vSum, vld1q(pDualCoef), - arm_vec_exponent_f16 - (vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0), S->degree), - vctp16q(2)); - - pDualCoef += 2; - pSrcA += numCols * 2; - row -= 2; - } - - if (row >= 1) { - f16x8_t vecIn, acc0; - float16_t const *pSrcA0Vec, *pInVec; - float16_t const *pSrcVecPtr = in; - /* - * Initialize the pointers to last MatrixA row - */ - pInA0 = pSrcA; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - - pSrcA0Vec = pInA0; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f16x8_t vtmp = vuninitializedq_f16(); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0); - vSum = vfmaq_m_f16(vSum, vld1q(pDualCoef), - arm_vec_exponent_f16 - (vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0), S->degree), - vctp16q(1)); - } - sum += (_Float16)vecAddAcrossF16Mve(vSum); - - - *pResult = S->classes[STEP(sum)]; -} - -#else -void arm_svm_polynomial_predict_f16( - const arm_svm_polynomial_instance_f16 *S, - const float16_t * in, - int32_t * pResult) -{ - _Float16 sum=S->intercept; - _Float16 dot=0; - uint32_t i,j; - const float16_t *pSupport = S->supportVectors; - - for(i=0; i < S->nbOfSupportVectors; i++) - { - dot=0; - for(j=0; j < S->vectorDimension; j++) - { - dot = dot + (_Float16)in[j]* (_Float16)*pSupport++; - } - sum += S->dualCoefficients[i] * (_Float16)arm_exponent_f16(S->gamma * dot + S->coef0, S->degree); - } - - *pResult=S->classes[STEP(sum)]; -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of polysvm group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c deleted file mode 100644 index 62c584c..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c +++ /dev/null @@ -1,490 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_polynomial_predict_f32.c - * Description: SVM Polynomial Classifier - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions.h" -#include -#include - -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) -#include "arm_vec_math.h" -#endif - -/** - * @addtogroup polysvm - * @{ - */ - - -/** - * @brief SVM polynomial prediction - * @param[in] S Pointer to an instance of the polynomial SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -void arm_svm_polynomial_predict_f32( - const arm_svm_polynomial_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - /* inlined Matrix x Vector function interleaved with dot prod */ - uint32_t numRows = S->nbOfSupportVectors; - uint32_t numCols = S->vectorDimension; - const float32_t *pSupport = S->supportVectors; - const float32_t *pSrcA = pSupport; - const float32_t *pInA0; - const float32_t *pInA1; - uint32_t row; - uint32_t blkCnt; /* loop counters */ - const float32_t *pDualCoef = S->dualCoefficients; - float32_t sum = S->intercept; - f32x4_t vSum = vdupq_n_f32(0.0f); - - row = numRows; - - /* - * compute 4 rows in parrallel - */ - while (row >= 4) { - const float32_t *pInA2, *pInA3; - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec; - f32x4_t vecIn, acc0, acc1, acc2, acc3; - float32_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 4 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - acc2 = vdupq_n_f32(0.0f); - acc3 = vdupq_n_f32(0.0f); - - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - pSrcA2Vec = pInA2; - pSrcA3Vec = pInA3; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vld1q(pSrcA2Vec); - pSrcA2Vec += 4; - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vld1q(pSrcA3Vec); - pSrcA3Vec += 4; - acc3 = vfmaq(acc3, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA2Vec, p0); - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA3Vec, p0); - acc3 = vfmaq(acc3, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f32x4_t vtmp = vuninitializedq_f32(); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc2), vtmp, 2); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc3), vtmp, 3); - - vSum = vfmaq_f32(vSum, vld1q(pDualCoef), - arm_vec_exponent_f32 - (vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0), S->degree)); - - pDualCoef += 4; - - pSrcA += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * compute 2 rows in parrallel - */ - if (row >= 2) { - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec; - f32x4_t vecIn, acc0, acc1; - float32_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 2 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - acc1 = vfmaq(acc1, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f32x4_t vtmp = vuninitializedq_f32(); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1); - - vSum = vfmaq_m_f32(vSum, vld1q(pDualCoef), - arm_vec_exponent_f32 - (vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0), S->degree), - vctp32q(2)); - - pDualCoef += 2; - pSrcA += numCols * 2; - row -= 2; - } - - if (row >= 1) { - f32x4_t vecIn, acc0; - float32_t const *pSrcA0Vec, *pInVec; - float32_t const *pSrcVecPtr = in; - /* - * Initialize the pointers to last MatrixA row - */ - pInA0 = pSrcA; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - - pSrcA0Vec = pInA0; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f32x4_t vtmp = vuninitializedq_f32(); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0); - vSum = vfmaq_m_f32(vSum, vld1q(pDualCoef), - arm_vec_exponent_f32 - (vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0), S->degree), - vctp32q(1)); - } - sum += vecAddAcrossF32Mve(vSum); - - - *pResult = S->classes[STEP(sum)]; -} - -#else -#if defined(ARM_MATH_NEON) -void arm_svm_polynomial_predict_f32( - const arm_svm_polynomial_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - float32_t sum = S->intercept; - - float32_t dot; - float32x4_t dotV; - - float32x4_t accuma,accumb,accumc,accumd,accum; - float32x2_t accum2; - float32x4_t vec1; - float32x4_t coef0 = vdupq_n_f32(S->coef0); - - float32x4_t vec2,vec2a,vec2b,vec2c,vec2d; - - uint32_t blkCnt; - uint32_t vectorBlkCnt; - - const float32_t *pIn = in; - - const float32_t *pSupport = S->supportVectors; - - const float32_t *pSupporta = S->supportVectors; - const float32_t *pSupportb; - const float32_t *pSupportc; - const float32_t *pSupportd; - - pSupportb = pSupporta + S->vectorDimension; - pSupportc = pSupportb + S->vectorDimension; - pSupportd = pSupportc + S->vectorDimension; - - const float32_t *pDualCoefs = S->dualCoefficients; - - vectorBlkCnt = S->nbOfSupportVectors >> 2; - while (vectorBlkCnt > 0U) - { - accuma = vdupq_n_f32(0); - accumb = vdupq_n_f32(0); - accumc = vdupq_n_f32(0); - accumd = vdupq_n_f32(0); - - pIn = in; - - blkCnt = S->vectorDimension >> 2; - while (blkCnt > 0U) - { - - vec1 = vld1q_f32(pIn); - vec2a = vld1q_f32(pSupporta); - vec2b = vld1q_f32(pSupportb); - vec2c = vld1q_f32(pSupportc); - vec2d = vld1q_f32(pSupportd); - - pIn += 4; - pSupporta += 4; - pSupportb += 4; - pSupportc += 4; - pSupportd += 4; - - accuma = vmlaq_f32(accuma, vec1,vec2a); - accumb = vmlaq_f32(accumb, vec1,vec2b); - accumc = vmlaq_f32(accumc, vec1,vec2c); - accumd = vmlaq_f32(accumd, vec1,vec2d); - - blkCnt -- ; - } - accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0); - - accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1); - - accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2); - - accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3); - - - blkCnt = S->vectorDimension & 3; - while (blkCnt > 0U) - { - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + *pIn * *pSupporta++, dotV,0); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + *pIn * *pSupportb++, dotV,1); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + *pIn * *pSupportc++, dotV,2); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + *pIn * *pSupportd++, dotV,3); - - pIn++; - - blkCnt -- ; - } - - vec1 = vld1q_f32(pDualCoefs); - pDualCoefs += 4; - - // To vectorize later - dotV = vmulq_n_f32(dotV, S->gamma); - dotV = vaddq_f32(dotV, coef0); - - dotV = arm_vec_exponent_f32(dotV,S->degree); - - accum = vmulq_f32(vec1,dotV); - accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); - sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1); - - pSupporta += 3*S->vectorDimension; - pSupportb += 3*S->vectorDimension; - pSupportc += 3*S->vectorDimension; - pSupportd += 3*S->vectorDimension; - - vectorBlkCnt -- ; - } - - pSupport = pSupporta; - vectorBlkCnt = S->nbOfSupportVectors & 3; - - while (vectorBlkCnt > 0U) - { - accum = vdupq_n_f32(0); - dot = 0.0f; - pIn = in; - - blkCnt = S->vectorDimension >> 2; - while (blkCnt > 0U) - { - - vec1 = vld1q_f32(pIn); - vec2 = vld1q_f32(pSupport); - pIn += 4; - pSupport += 4; - - accum = vmlaq_f32(accum, vec1,vec2); - - blkCnt -- ; - } - accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); - dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1); - - - blkCnt = S->vectorDimension & 3; - while (blkCnt > 0U) - { - dot = dot + *pIn++ * *pSupport++; - - blkCnt -- ; - } - - sum += *pDualCoefs++ * arm_exponent_f32(S->gamma * dot + S->coef0, S->degree); - vectorBlkCnt -- ; - } - - *pResult=S->classes[STEP(sum)]; -} -#else -void arm_svm_polynomial_predict_f32( - const arm_svm_polynomial_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - float32_t sum=S->intercept; - float32_t dot=0; - uint32_t i,j; - const float32_t *pSupport = S->supportVectors; - - for(i=0; i < S->nbOfSupportVectors; i++) - { - dot=0; - for(j=0; j < S->vectorDimension; j++) - { - dot = dot + in[j]* *pSupport++; - } - sum += S->dualCoefficients[i] * arm_exponent_f32(S->gamma * dot + S->coef0, S->degree); - } - - *pResult=S->classes[STEP(sum)]; -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - - -/** - * @} end of polysvm group - */ diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f16.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f16.c deleted file mode 100644 index af37358..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f16.c +++ /dev/null @@ -1,97 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_rbf_init_f16.c - * Description: SVM Radial Basis Function Instance Initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup groupSVM - */ - -/** - @defgroup rbfsvm RBF SVM - - RBF SVM classifier - */ - - -/** - * @addtogroup rbfsvm - * @{ - */ - - -/** - * @brief SVM radial basis function instance init function - * - * Classes are integer used as output of the function (instead of having -1,1 - * as class values). - * - * @param[in] S points to an instance of the polynomial SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - -void arm_svm_rbf_init_f16(arm_svm_rbf_instance_f16 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float16_t intercept, - const float16_t *dualCoefficients, - const float16_t *supportVectors, - const int32_t *classes, - float16_t gamma - ) -{ - S->nbOfSupportVectors = nbOfSupportVectors; - S->vectorDimension = vectorDimension; - S->intercept = intercept; - S->dualCoefficients = dualCoefficients; - S->supportVectors = supportVectors; - S->classes = classes; - S->gamma = gamma; -} - - - -/** - * @} end of rbfsvm group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c deleted file mode 100644 index 1259836..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c +++ /dev/null @@ -1,91 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_rbf_init_f32.c - * Description: SVM Radial Basis Function Instance Initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions.h" -#include -#include - -/** - @ingroup groupSVM - */ - -/** - @defgroup rbfsvm RBF SVM - - RBF SVM classifier - */ - - -/** - * @addtogroup rbfsvm - * @{ - */ - - -/** - * @brief SVM radial basis function instance init function - * - * Classes are integer used as output of the function (instead of having -1,1 - * as class values). - * - * @param[in] S points to an instance of the polynomial SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - -void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float32_t intercept, - const float32_t *dualCoefficients, - const float32_t *supportVectors, - const int32_t *classes, - float32_t gamma - ) -{ - S->nbOfSupportVectors = nbOfSupportVectors; - S->vectorDimension = vectorDimension; - S->intercept = intercept; - S->dualCoefficients = dualCoefficients; - S->supportVectors = supportVectors; - S->classes = classes; - S->gamma = gamma; -} - - - -/** - * @} end of rbfsvm group - */ diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f16.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f16.c deleted file mode 100644 index d40c8d6..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f16.c +++ /dev/null @@ -1,352 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_rbf_predict_f16.c - * Description: SVM Radial Basis Function Classifier - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - - -/** - * @addtogroup rbfsvm - * @{ - */ - - -/** - * @brief SVM rbf prediction - * @param[in] S Pointer to an instance of the rbf SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult decision value - * @return none. - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math_f16.h" - -void arm_svm_rbf_predict_f16( - const arm_svm_rbf_instance_f16 *S, - const float16_t * in, - int32_t * pResult) -{ - /* inlined Matrix x Vector function interleaved with dot prod */ - uint32_t numRows = S->nbOfSupportVectors; - uint32_t numCols = S->vectorDimension; - const float16_t *pSupport = S->supportVectors; - const float16_t *pSrcA = pSupport; - const float16_t *pInA0; - const float16_t *pInA1; - uint32_t row; - uint32_t blkCnt; /* loop counters */ - const float16_t *pDualCoef = S->dualCoefficients; - _Float16 sum = S->intercept; - f16x8_t vSum = vdupq_n_f16(0); - - row = numRows; - - /* - * compute 4 rows in parrallel - */ - while (row >= 4) { - const float16_t *pInA2, *pInA3; - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec; - f16x8_t vecIn, acc0, acc1, acc2, acc3; - float16_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 4 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - acc1 = vdupq_n_f16(0.0f); - acc2 = vdupq_n_f16(0.0f); - acc3 = vdupq_n_f16(0.0f); - - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - pSrcA2Vec = pInA2; - pSrcA3Vec = pInA3; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - f16x8_t vecDif; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 8; - vecDif = vsubq(vecIn, vecA); - acc1 = vfmaq(acc1, vecDif, vecDif); - vecA = vld1q(pSrcA2Vec); - pSrcA2Vec += 8; - vecDif = vsubq(vecIn, vecA); - acc2 = vfmaq(acc2, vecDif, vecDif); - vecA = vld1q(pSrcA3Vec); - pSrcA3Vec += 8; - vecDif = vsubq(vecIn, vecA); - acc3 = vfmaq(acc3, vecDif, vecDif); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - f16x8_t vecDif; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif); - vecA = vldrhq_z_f16(pSrcA1Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc1 = vfmaq(acc1, vecDif, vecDif); - vecA = vldrhq_z_f16(pSrcA2Vec, p0);; - vecDif = vsubq(vecIn, vecA); - acc2 = vfmaq(acc2, vecDif, vecDif); - vecA = vldrhq_z_f16(pSrcA3Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc3 = vfmaq(acc3, vecDif, vecDif); - } - /* - * Sum the partial parts - */ - - //sum += *pDualCoef++ * expf(-S->gamma * vecReduceF16Mve(acc0)); - f16x8_t vtmp = vuninitializedq_f16(); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc2), vtmp, 2); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc3), vtmp, 3); - - vSum = - vfmaq_m_f16(vSum, vld1q(pDualCoef), - vexpq_f16(vmulq_n_f16(vtmp, -S->gamma)),vctp16q(4)); - pDualCoef += 4; - pSrcA += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * compute 2 rows in parrallel - */ - if (row >= 2) { - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec; - f16x8_t vecIn, acc0, acc1; - float16_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 2 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - acc1 = vdupq_n_f16(0.0f); - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - f16x8_t vecDif; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif);; - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 8; - vecDif = vsubq(vecIn, vecA); - acc1 = vfmaq(acc1, vecDif, vecDif); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA, vecDif; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif); - vecA = vldrhq_z_f16(pSrcA1Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc1 = vfmaq(acc1, vecDif, vecDif); - } - /* - * Sum the partial parts - */ - f16x8_t vtmp = vuninitializedq_f16(); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1); - - vSum = - vfmaq_m_f16(vSum, vld1q(pDualCoef), - vexpq_f16(vmulq_n_f16(vtmp, -S->gamma)), vctp16q(2)); - pDualCoef += 2; - - pSrcA += numCols * 2; - row -= 2; - } - - if (row >= 1) { - f16x8_t vecIn, acc0; - float16_t const *pSrcA0Vec, *pInVec; - float16_t const *pSrcVecPtr = in; - /* - * Initialize the pointers to last MatrixA row - */ - pInA0 = pSrcA; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - - pSrcA0Vec = pInA0; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA, vecDif; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA, vecDif; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif); - } - /* - * Sum the partial parts - */ - f16x8_t vtmp = vuninitializedq_f16(); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0); - - vSum = - vfmaq_m_f16(vSum, vld1q(pDualCoef), - vexpq_f16(vmulq_n_f16(vtmp, -S->gamma)), vctp16q(1)); - - } - - - sum += vecAddAcrossF16Mve(vSum); - *pResult = S->classes[STEP(sum)]; -} - -#else -void arm_svm_rbf_predict_f16( - const arm_svm_rbf_instance_f16 *S, - const float16_t * in, - int32_t * pResult) -{ - _Float16 sum=S->intercept; - _Float16 dot=00.f16; - uint32_t i,j; - const float16_t *pSupport = S->supportVectors; - - for(i=0; i < S->nbOfSupportVectors; i++) - { - dot=0.0f16; - for(j=0; j < S->vectorDimension; j++) - { - dot = dot + SQ((_Float16)in[j] - (_Float16) *pSupport); - pSupport++; - } - sum += (_Float16)S->dualCoefficients[i] * (_Float16)expf(-(_Float16)S->gamma * dot); - } - *pResult=S->classes[STEP(sum)]; -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of rbfsvm group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c deleted file mode 100644 index 64750b1..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c +++ /dev/null @@ -1,523 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_rbf_predict_f32.c - * Description: SVM Radial Basis Function Classifier - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions.h" -#include -#include - - -/** - * @addtogroup rbfsvm - * @{ - */ - - -/** - * @brief SVM rbf prediction - * @param[in] S Pointer to an instance of the rbf SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult decision value - * @return none. - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -void arm_svm_rbf_predict_f32( - const arm_svm_rbf_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - /* inlined Matrix x Vector function interleaved with dot prod */ - uint32_t numRows = S->nbOfSupportVectors; - uint32_t numCols = S->vectorDimension; - const float32_t *pSupport = S->supportVectors; - const float32_t *pSrcA = pSupport; - const float32_t *pInA0; - const float32_t *pInA1; - uint32_t row; - uint32_t blkCnt; /* loop counters */ - const float32_t *pDualCoef = S->dualCoefficients; - float32_t sum = S->intercept; - f32x4_t vSum = vdupq_n_f32(0); - - row = numRows; - - /* - * compute 4 rows in parrallel - */ - while (row >= 4) { - const float32_t *pInA2, *pInA3; - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec; - f32x4_t vecIn, acc0, acc1, acc2, acc3; - float32_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 4 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - acc2 = vdupq_n_f32(0.0f); - acc3 = vdupq_n_f32(0.0f); - - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - pSrcA2Vec = pInA2; - pSrcA3Vec = pInA3; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - f32x4_t vecDif; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - vecDif = vsubq(vecIn, vecA); - acc1 = vfmaq(acc1, vecDif, vecDif); - vecA = vld1q(pSrcA2Vec); - pSrcA2Vec += 4; - vecDif = vsubq(vecIn, vecA); - acc2 = vfmaq(acc2, vecDif, vecDif); - vecA = vld1q(pSrcA3Vec); - pSrcA3Vec += 4; - vecDif = vsubq(vecIn, vecA); - acc3 = vfmaq(acc3, vecDif, vecDif); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - f32x4_t vecDif; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif); - vecA = vldrwq_z_f32(pSrcA1Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc1 = vfmaq(acc1, vecDif, vecDif); - vecA = vldrwq_z_f32(pSrcA2Vec, p0);; - vecDif = vsubq(vecIn, vecA); - acc2 = vfmaq(acc2, vecDif, vecDif); - vecA = vldrwq_z_f32(pSrcA3Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc3 = vfmaq(acc3, vecDif, vecDif); - } - /* - * Sum the partial parts - */ - - //sum += *pDualCoef++ * expf(-S->gamma * vecReduceF32Mve(acc0)); - f32x4_t vtmp = vuninitializedq_f32(); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc2), vtmp, 2); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc3), vtmp, 3); - - vSum = - vfmaq_f32(vSum, vld1q(pDualCoef), - vexpq_f32(vmulq_n_f32(vtmp, -S->gamma))); - pDualCoef += 4; - pSrcA += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * compute 2 rows in parrallel - */ - if (row >= 2) { - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec; - f32x4_t vecIn, acc0, acc1; - float32_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 2 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - f32x4_t vecDif; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif);; - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - vecDif = vsubq(vecIn, vecA); - acc1 = vfmaq(acc1, vecDif, vecDif); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA, vecDif; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif); - vecA = vldrwq_z_f32(pSrcA1Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc1 = vfmaq(acc1, vecDif, vecDif); - } - /* - * Sum the partial parts - */ - f32x4_t vtmp = vuninitializedq_f32(); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1); - - vSum = - vfmaq_m_f32(vSum, vld1q(pDualCoef), - vexpq_f32(vmulq_n_f32(vtmp, -S->gamma)), vctp32q(2)); - pDualCoef += 2; - - pSrcA += numCols * 2; - row -= 2; - } - - if (row >= 1) { - f32x4_t vecIn, acc0; - float32_t const *pSrcA0Vec, *pInVec; - float32_t const *pSrcVecPtr = in; - /* - * Initialize the pointers to last MatrixA row - */ - pInA0 = pSrcA; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - - pSrcA0Vec = pInA0; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA, vecDif; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA, vecDif; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - vecDif = vsubq(vecIn, vecA); - acc0 = vfmaq(acc0, vecDif, vecDif); - } - /* - * Sum the partial parts - */ - f32x4_t vtmp = vuninitializedq_f32(); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0); - - vSum = - vfmaq_m_f32(vSum, vld1q(pDualCoef), - vexpq_f32(vmulq_n_f32(vtmp, -S->gamma)), vctp32q(1)); - - } - - - sum += vecAddAcrossF32Mve(vSum); - *pResult = S->classes[STEP(sum)]; -} - - -#else -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" - -void arm_svm_rbf_predict_f32( - const arm_svm_rbf_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - float32_t sum = S->intercept; - - float32_t dot; - float32x4_t dotV; - - float32x4_t accuma,accumb,accumc,accumd,accum; - float32x2_t accum2; - float32x4_t temp; - float32x4_t vec1; - - float32x4_t vec2,vec2a,vec2b,vec2c,vec2d; - - uint32_t blkCnt; - uint32_t vectorBlkCnt; - - const float32_t *pIn = in; - - const float32_t *pSupport = S->supportVectors; - - const float32_t *pSupporta = S->supportVectors; - const float32_t *pSupportb; - const float32_t *pSupportc; - const float32_t *pSupportd; - - pSupportb = pSupporta + S->vectorDimension; - pSupportc = pSupportb + S->vectorDimension; - pSupportd = pSupportc + S->vectorDimension; - - const float32_t *pDualCoefs = S->dualCoefficients; - - - vectorBlkCnt = S->nbOfSupportVectors >> 2; - while (vectorBlkCnt > 0U) - { - accuma = vdupq_n_f32(0); - accumb = vdupq_n_f32(0); - accumc = vdupq_n_f32(0); - accumd = vdupq_n_f32(0); - - pIn = in; - - blkCnt = S->vectorDimension >> 2; - while (blkCnt > 0U) - { - - vec1 = vld1q_f32(pIn); - vec2a = vld1q_f32(pSupporta); - vec2b = vld1q_f32(pSupportb); - vec2c = vld1q_f32(pSupportc); - vec2d = vld1q_f32(pSupportd); - - pIn += 4; - pSupporta += 4; - pSupportb += 4; - pSupportc += 4; - pSupportd += 4; - - temp = vsubq_f32(vec1, vec2a); - accuma = vmlaq_f32(accuma, temp, temp); - - temp = vsubq_f32(vec1, vec2b); - accumb = vmlaq_f32(accumb, temp, temp); - - temp = vsubq_f32(vec1, vec2c); - accumc = vmlaq_f32(accumc, temp, temp); - - temp = vsubq_f32(vec1, vec2d); - accumd = vmlaq_f32(accumd, temp, temp); - - blkCnt -- ; - } - accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0); - - accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1); - - accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2); - - accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3); - - - blkCnt = S->vectorDimension & 3; - while (blkCnt > 0U) - { - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + SQ(*pIn - *pSupporta), dotV,0); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + SQ(*pIn - *pSupportb), dotV,1); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + SQ(*pIn - *pSupportc), dotV,2); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + SQ(*pIn - *pSupportd), dotV,3); - - pSupporta++; - pSupportb++; - pSupportc++; - pSupportd++; - - pIn++; - - blkCnt -- ; - } - - vec1 = vld1q_f32(pDualCoefs); - pDualCoefs += 4; - - // To vectorize later - dotV = vmulq_n_f32(dotV, -S->gamma); - dotV = vexpq_f32(dotV); - - accum = vmulq_f32(vec1,dotV); - accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); - sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1); - - pSupporta += 3*S->vectorDimension; - pSupportb += 3*S->vectorDimension; - pSupportc += 3*S->vectorDimension; - pSupportd += 3*S->vectorDimension; - - vectorBlkCnt -- ; - } - - pSupport = pSupporta; - vectorBlkCnt = S->nbOfSupportVectors & 3; - - while (vectorBlkCnt > 0U) - { - accum = vdupq_n_f32(0); - dot = 0.0f; - pIn = in; - - blkCnt = S->vectorDimension >> 2; - while (blkCnt > 0U) - { - - vec1 = vld1q_f32(pIn); - vec2 = vld1q_f32(pSupport); - pIn += 4; - pSupport += 4; - - temp = vsubq_f32(vec1,vec2); - accum = vmlaq_f32(accum, temp,temp); - - blkCnt -- ; - } - accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); - dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1); - - - blkCnt = S->vectorDimension & 3; - while (blkCnt > 0U) - { - - dot = dot + SQ(*pIn - *pSupport); - pIn++; - pSupport++; - - blkCnt -- ; - } - - sum += *pDualCoefs++ * expf(-S->gamma * dot); - vectorBlkCnt -- ; - } - - *pResult=S->classes[STEP(sum)]; -} -#else -void arm_svm_rbf_predict_f32( - const arm_svm_rbf_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - float32_t sum=S->intercept; - float32_t dot=0; - uint32_t i,j; - const float32_t *pSupport = S->supportVectors; - - for(i=0; i < S->nbOfSupportVectors; i++) - { - dot=0; - for(j=0; j < S->vectorDimension; j++) - { - dot = dot + SQ(in[j] - *pSupport); - pSupport++; - } - sum += S->dualCoefficients[i] * expf(-S->gamma * dot); - } - *pResult=S->classes[STEP(sum)]; -} -#endif - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of rbfsvm group - */ diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f16.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f16.c deleted file mode 100644 index 3ff3e1d..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f16.c +++ /dev/null @@ -1,98 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_sigmoid_predict_f16.c - * Description: SVM Sigmoid Instance Initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup groupSVM - */ - -/** - @defgroup sigmoidsvm Sigmoid SVM - - Sigmoid SVM classifier - */ - -/** - * @addtogroup sigmoidsvm - * @{ - */ - - -/** - * @brief SVM sigmoid instance init function - * - * Classes are integer used as output of the function (instead of having -1,1 - * as class values). - * - * @param[in] S points to an instance of the rbf SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] coef0 coeff0 (scikit-learn terminology) - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - -void arm_svm_sigmoid_init_f16(arm_svm_sigmoid_instance_f16 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float16_t intercept, - const float16_t *dualCoefficients, - const float16_t *supportVectors, - const int32_t *classes, - float16_t coef0, - float16_t gamma - ) -{ - S->nbOfSupportVectors = nbOfSupportVectors; - S->vectorDimension = vectorDimension; - S->intercept = intercept; - S->dualCoefficients = dualCoefficients; - S->supportVectors = supportVectors; - S->classes = classes; - S->coef0 = coef0; - S->gamma = gamma; -} - - -/** - * @} end of sigmoidsvm group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c deleted file mode 100644 index d9fbfe1..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_sigmoid_predict_f32.c - * Description: SVM Sigmoid Instance Initialization - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions.h" -#include -#include - -/** - @ingroup groupSVM - */ - -/** - @defgroup sigmoidsvm Sigmoid SVM - - Sigmoid SVM classifier - */ - -/** - * @addtogroup sigmoidsvm - * @{ - */ - - -/** - * @brief SVM sigmoid instance init function - * - * Classes are integer used as output of the function (instead of having -1,1 - * as class values). - * - * @param[in] S points to an instance of the rbf SVM structure. - * @param[in] nbOfSupportVectors Number of support vectors - * @param[in] vectorDimension Dimension of vector space - * @param[in] intercept Intercept - * @param[in] dualCoefficients Array of dual coefficients - * @param[in] supportVectors Array of support vectors - * @param[in] classes Array of 2 classes ID - * @param[in] coef0 coeff0 (scikit-learn terminology) - * @param[in] gamma gamma (scikit-learn terminology) - * @return none. - * - */ - -void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S, - uint32_t nbOfSupportVectors, - uint32_t vectorDimension, - float32_t intercept, - const float32_t *dualCoefficients, - const float32_t *supportVectors, - const int32_t *classes, - float32_t coef0, - float32_t gamma - ) -{ - S->nbOfSupportVectors = nbOfSupportVectors; - S->vectorDimension = vectorDimension; - S->intercept = intercept; - S->dualCoefficients = dualCoefficients; - S->supportVectors = supportVectors; - S->classes = classes; - S->coef0 = coef0; - S->gamma = gamma; -} - - -/** - * @} end of sigmoidsvm group - */ diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f16.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f16.c deleted file mode 100644 index fa9ec25..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f16.c +++ /dev/null @@ -1,333 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_sigmoid_predict_f16.c - * Description: SVM Sigmoid Classifier - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - * @addtogroup sigmoidsvm - * @{ - */ - - - -/** - * @brief SVM sigmoid prediction - * @param[in] S Pointer to an instance of the rbf SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math_f16.h" - -void arm_svm_sigmoid_predict_f16( - const arm_svm_sigmoid_instance_f16 *S, - const float16_t * in, - int32_t * pResult) -{ - /* inlined Matrix x Vector function interleaved with dot prod */ - uint32_t numRows = S->nbOfSupportVectors; - uint32_t numCols = S->vectorDimension; - const float16_t *pSupport = S->supportVectors; - const float16_t *pSrcA = pSupport; - const float16_t *pInA0; - const float16_t *pInA1; - uint32_t row; - uint32_t blkCnt; /* loop counters */ - const float16_t *pDualCoef = S->dualCoefficients; - _Float16 sum = S->intercept; - f16x8_t vSum = vdupq_n_f16(0.0f); - - row = numRows; - - /* - * compute 4 rows in parrallel - */ - while (row >= 4) { - const float16_t *pInA2, *pInA3; - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec; - f16x8_t vecIn, acc0, acc1, acc2, acc3; - float16_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 4 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - acc1 = vdupq_n_f16(0.0f); - acc2 = vdupq_n_f16(0.0f); - acc3 = vdupq_n_f16(0.0f); - - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - pSrcA2Vec = pInA2; - pSrcA3Vec = pInA3; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 8; - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vld1q(pSrcA2Vec); - pSrcA2Vec += 8; - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vld1q(pSrcA3Vec); - pSrcA3Vec += 8; - acc3 = vfmaq(acc3, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA2Vec, p0); - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA3Vec, p0); - acc3 = vfmaq(acc3, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f16x8_t vtmp = vuninitializedq_f16(); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc2), vtmp, 2); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc3), vtmp, 3); - - vSum = - vfmaq_m_f16(vSum, vld1q(pDualCoef), - vtanhq_f16(vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0)),vctp16q(4)); - - pDualCoef += 4; - - pSrcA += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * compute 2 rows in parrallel - */ - if (row >= 2) { - float16_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec; - f16x8_t vecIn, acc0, acc1; - float16_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 2 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - acc1 = vdupq_n_f16(0.0f); - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 8; - acc1 = vfmaq(acc1, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrhq_z_f16(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f16x8_t vtmp = vuninitializedq_f16(); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1); - - vSum = - vfmaq_m_f16(vSum, vld1q(pDualCoef), - vtanhq_f16(vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0)), - vctp16q(2)); - - pSrcA += numCols * 2; - row -= 2; - } - - if (row >= 1) { - f16x8_t vecIn, acc0; - float16_t const *pSrcA0Vec, *pInVec; - float16_t const *pSrcVecPtr = in; - /* - * Initialize the pointers to last MatrixA row - */ - pInA0 = pSrcA; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f16(0.0f); - - pSrcA0Vec = pInA0; - - blkCnt = numCols >> 3; - while (blkCnt > 0U) { - f16x8_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 8; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 8; - acc0 = vfmaq(acc0, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 7; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp16q(blkCnt); - f16x8_t vecA; - - vecIn = vldrhq_z_f16(pInVec, p0); - vecA = vldrhq_z_f16(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f16x8_t vtmp = vuninitializedq_f16(); - vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0); - - vSum = - vfmaq_m_f16(vSum, vld1q(pDualCoef), - vtanhq_f16(vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0)), - vctp16q(1)); - } - sum += vecAddAcrossF16Mve(vSum); - - *pResult = S->classes[STEP(sum)]; -} - -#else -void arm_svm_sigmoid_predict_f16( - const arm_svm_sigmoid_instance_f16 *S, - const float16_t * in, - int32_t * pResult) -{ - _Float16 sum=S->intercept; - _Float16 dot=0.0f16; - uint32_t i,j; - const float16_t *pSupport = S->supportVectors; - - for(i=0; i < S->nbOfSupportVectors; i++) - { - dot=0.0f16; - for(j=0; j < S->vectorDimension; j++) - { - dot = dot + (_Float16)in[j] * (_Float16)*pSupport++; - } - sum += (_Float16)S->dualCoefficients[i] * (_Float16)tanhf((_Float16)S->gamma * dot + (_Float16)S->coef0); - } - *pResult=S->classes[STEP(sum)]; -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of sigmoidsvm group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c b/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c deleted file mode 100644 index 303d6f6..0000000 --- a/Drivers/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c +++ /dev/null @@ -1,487 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_svm_sigmoid_predict_f32.c - * Description: SVM Sigmoid Classifier - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/svm_functions.h" -#include -#include - -/** - * @addtogroup sigmoidsvm - * @{ - */ - - - -/** - * @brief SVM sigmoid prediction - * @param[in] S Pointer to an instance of the rbf SVM structure. - * @param[in] in Pointer to input vector - * @param[out] pResult Decision value - * @return none. - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -void arm_svm_sigmoid_predict_f32( - const arm_svm_sigmoid_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - /* inlined Matrix x Vector function interleaved with dot prod */ - uint32_t numRows = S->nbOfSupportVectors; - uint32_t numCols = S->vectorDimension; - const float32_t *pSupport = S->supportVectors; - const float32_t *pSrcA = pSupport; - const float32_t *pInA0; - const float32_t *pInA1; - uint32_t row; - uint32_t blkCnt; /* loop counters */ - const float32_t *pDualCoef = S->dualCoefficients; - float32_t sum = S->intercept; - f32x4_t vSum = vdupq_n_f32(0.0f); - - row = numRows; - - /* - * compute 4 rows in parrallel - */ - while (row >= 4) { - const float32_t *pInA2, *pInA3; - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec; - f32x4_t vecIn, acc0, acc1, acc2, acc3; - float32_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 4 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - pInA2 = pInA1 + numCols; - pInA3 = pInA2 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - acc2 = vdupq_n_f32(0.0f); - acc3 = vdupq_n_f32(0.0f); - - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - pSrcA2Vec = pInA2; - pSrcA3Vec = pInA3; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vld1q(pSrcA2Vec); - pSrcA2Vec += 4; - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vld1q(pSrcA3Vec); - pSrcA3Vec += 4; - acc3 = vfmaq(acc3, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA2Vec, p0); - acc2 = vfmaq(acc2, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA3Vec, p0); - acc3 = vfmaq(acc3, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f32x4_t vtmp = vuninitializedq_f32(); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc2), vtmp, 2); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc3), vtmp, 3); - - vSum = - vfmaq_f32(vSum, vld1q(pDualCoef), - vtanhq_f32(vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0))); - - pDualCoef += 4; - - pSrcA += numCols * 4; - /* - * Decrement the row loop counter - */ - row -= 4; - } - - /* - * compute 2 rows in parrallel - */ - if (row >= 2) { - float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec; - f32x4_t vecIn, acc0, acc1; - float32_t const *pSrcVecPtr = in; - - /* - * Initialize the pointers to 2 consecutive MatrixA rows - */ - pInA0 = pSrcA; - pInA1 = pInA0 + numCols; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - acc1 = vdupq_n_f32(0.0f); - pSrcA0Vec = pInA0; - pSrcA1Vec = pInA1; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vld1q(pSrcA1Vec); - pSrcA1Vec += 4; - acc1 = vfmaq(acc1, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - vecA = vldrwq_z_f32(pSrcA1Vec, p0); - acc1 = vfmaq(acc1, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f32x4_t vtmp = vuninitializedq_f32(); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1); - - vSum = - vfmaq_m_f32(vSum, vld1q(pDualCoef), - vtanhq_f32(vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0)), - vctp32q(2)); - - pSrcA += numCols * 2; - row -= 2; - } - - if (row >= 1) { - f32x4_t vecIn, acc0; - float32_t const *pSrcA0Vec, *pInVec; - float32_t const *pSrcVecPtr = in; - /* - * Initialize the pointers to last MatrixA row - */ - pInA0 = pSrcA; - /* - * Initialize the vector pointer - */ - pInVec = pSrcVecPtr; - /* - * reset accumulators - */ - acc0 = vdupq_n_f32(0.0f); - - pSrcA0Vec = pInA0; - - blkCnt = numCols >> 2; - while (blkCnt > 0U) { - f32x4_t vecA; - - vecIn = vld1q(pInVec); - pInVec += 4; - vecA = vld1q(pSrcA0Vec); - pSrcA0Vec += 4; - acc0 = vfmaq(acc0, vecIn, vecA); - - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = numCols & 3; - if (blkCnt > 0U) { - mve_pred16_t p0 = vctp32q(blkCnt); - f32x4_t vecA; - - vecIn = vldrwq_z_f32(pInVec, p0); - vecA = vldrwq_z_f32(pSrcA0Vec, p0); - acc0 = vfmaq(acc0, vecIn, vecA); - } - /* - * Sum the partial parts - */ - f32x4_t vtmp = vuninitializedq_f32(); - vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0); - - vSum = - vfmaq_m_f32(vSum, vld1q(pDualCoef), - vtanhq_f32(vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0)), - vctp32q(1)); - } - sum += vecAddAcrossF32Mve(vSum); - - *pResult = S->classes[STEP(sum)]; -} - -#else -#if defined(ARM_MATH_NEON) -#include "NEMath.h" - -void arm_svm_sigmoid_predict_f32( - const arm_svm_sigmoid_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - float32_t sum = S->intercept; - - float32_t dot; - float32x4_t dotV; - - float32x4_t accuma,accumb,accumc,accumd,accum; - float32x2_t accum2; - float32x4_t vec1; - float32x4_t coef0 = vdupq_n_f32(S->coef0); - - float32x4_t vec2,vec2a,vec2b,vec2c,vec2d; - - uint32_t blkCnt; - uint32_t vectorBlkCnt; - - const float32_t *pIn = in; - - const float32_t *pSupport = S->supportVectors; - - const float32_t *pSupporta = S->supportVectors; - const float32_t *pSupportb; - const float32_t *pSupportc; - const float32_t *pSupportd; - - pSupportb = pSupporta + S->vectorDimension; - pSupportc = pSupportb + S->vectorDimension; - pSupportd = pSupportc + S->vectorDimension; - - const float32_t *pDualCoefs = S->dualCoefficients; - - vectorBlkCnt = S->nbOfSupportVectors >> 2; - while (vectorBlkCnt > 0U) - { - accuma = vdupq_n_f32(0); - accumb = vdupq_n_f32(0); - accumc = vdupq_n_f32(0); - accumd = vdupq_n_f32(0); - - pIn = in; - - blkCnt = S->vectorDimension >> 2; - while (blkCnt > 0U) - { - - vec1 = vld1q_f32(pIn); - vec2a = vld1q_f32(pSupporta); - vec2b = vld1q_f32(pSupportb); - vec2c = vld1q_f32(pSupportc); - vec2d = vld1q_f32(pSupportd); - - pIn += 4; - pSupporta += 4; - pSupportb += 4; - pSupportc += 4; - pSupportd += 4; - - accuma = vmlaq_f32(accuma, vec1,vec2a); - accumb = vmlaq_f32(accumb, vec1,vec2b); - accumc = vmlaq_f32(accumc, vec1,vec2c); - accumd = vmlaq_f32(accumd, vec1,vec2d); - - blkCnt -- ; - } - accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0); - - accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1); - - accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2); - - accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd)); - dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3); - - - blkCnt = S->vectorDimension & 3; - while (blkCnt > 0U) - { - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + *pIn * *pSupporta++, dotV,0); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + *pIn * *pSupportb++, dotV,1); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + *pIn * *pSupportc++, dotV,2); - dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + *pIn * *pSupportd++, dotV,3); - - pIn++; - - blkCnt -- ; - } - - vec1 = vld1q_f32(pDualCoefs); - pDualCoefs += 4; - - // To vectorize later - dotV = vmulq_n_f32(dotV, S->gamma); - dotV = vaddq_f32(dotV, coef0); - - dotV = vtanhq_f32(dotV); - - accum = vmulq_f32(vec1,dotV); - accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); - sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1); - - pSupporta += 3*S->vectorDimension; - pSupportb += 3*S->vectorDimension; - pSupportc += 3*S->vectorDimension; - pSupportd += 3*S->vectorDimension; - - vectorBlkCnt -- ; - } - - pSupport = pSupporta; - vectorBlkCnt = S->nbOfSupportVectors & 3; - - while (vectorBlkCnt > 0U) - { - accum = vdupq_n_f32(0); - dot = 0.0f; - pIn = in; - - blkCnt = S->vectorDimension >> 2; - while (blkCnt > 0U) - { - - vec1 = vld1q_f32(pIn); - vec2 = vld1q_f32(pSupport); - pIn += 4; - pSupport += 4; - - accum = vmlaq_f32(accum, vec1,vec2); - - blkCnt -- ; - } - accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum)); - dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1); - - - blkCnt = S->vectorDimension & 3; - while (blkCnt > 0U) - { - dot = dot + *pIn++ * *pSupport++; - - blkCnt -- ; - } - - sum += *pDualCoefs++ * tanhf(S->gamma * dot + S->coef0); - vectorBlkCnt -- ; - } - - *pResult=S->classes[STEP(sum)]; -} -#else -void arm_svm_sigmoid_predict_f32( - const arm_svm_sigmoid_instance_f32 *S, - const float32_t * in, - int32_t * pResult) -{ - float32_t sum=S->intercept; - float32_t dot=0; - uint32_t i,j; - const float32_t *pSupport = S->supportVectors; - - for(i=0; i < S->nbOfSupportVectors; i++) - { - dot=0; - for(j=0; j < S->vectorDimension; j++) - { - dot = dot + in[j]* *pSupport++; - } - sum += S->dualCoefficients[i] * tanhf(S->gamma * dot + S->coef0); - } - *pResult=S->classes[STEP(sum)]; -} - -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of sigmoidsvm group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/CMakeLists.txt deleted file mode 100644 index 95955df..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/CMakeLists.txt +++ /dev/null @@ -1,80 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPStatistics) - -include(configLib) -include(configDsp) - - - -add_library(CMSISDSPStatistics STATIC) - -target_sources(CMSISDSPStatistics PRIVATE arm_entropy_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_entropy_f64.c) -target_sources(CMSISDSPStatistics PRIVATE arm_kullback_leibler_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_kullback_leibler_f64.c) -target_sources(CMSISDSPStatistics PRIVATE arm_logsumexp_dot_prod_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_logsumexp_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_max_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_max_no_idx_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_max_q15.c) -target_sources(CMSISDSPStatistics PRIVATE arm_max_q31.c) -target_sources(CMSISDSPStatistics PRIVATE arm_max_q7.c) -target_sources(CMSISDSPStatistics PRIVATE arm_mean_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_mean_q15.c) -target_sources(CMSISDSPStatistics PRIVATE arm_mean_q31.c) -target_sources(CMSISDSPStatistics PRIVATE arm_mean_q7.c) -target_sources(CMSISDSPStatistics PRIVATE arm_min_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_min_q15.c) -target_sources(CMSISDSPStatistics PRIVATE arm_min_q31.c) -target_sources(CMSISDSPStatistics PRIVATE arm_min_q7.c) -target_sources(CMSISDSPStatistics PRIVATE arm_power_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_power_q15.c) -target_sources(CMSISDSPStatistics PRIVATE arm_power_q31.c) -target_sources(CMSISDSPStatistics PRIVATE arm_power_q7.c) -target_sources(CMSISDSPStatistics PRIVATE arm_rms_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_rms_q15.c) -target_sources(CMSISDSPStatistics PRIVATE arm_rms_q31.c) -target_sources(CMSISDSPStatistics PRIVATE arm_std_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_std_q15.c) -target_sources(CMSISDSPStatistics PRIVATE arm_std_q31.c) -target_sources(CMSISDSPStatistics PRIVATE arm_var_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_var_q15.c) -target_sources(CMSISDSPStatistics PRIVATE arm_var_q31.c) - -target_sources(CMSISDSPStatistics PRIVATE arm_absmax_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_absmax_q15.c) -target_sources(CMSISDSPStatistics PRIVATE arm_absmax_q31.c) -target_sources(CMSISDSPStatistics PRIVATE arm_absmax_q7.c) - -target_sources(CMSISDSPStatistics PRIVATE arm_absmin_f32.c) -target_sources(CMSISDSPStatistics PRIVATE arm_absmin_q15.c) -target_sources(CMSISDSPStatistics PRIVATE arm_absmin_q31.c) -target_sources(CMSISDSPStatistics PRIVATE arm_absmin_q7.c) - -configLib(CMSISDSPStatistics ${ROOT}) -configDsp(CMSISDSPStatistics ${ROOT}) - -### Includes -target_include_directories(CMSISDSPStatistics PUBLIC "${DSP}/Include") - - - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPStatistics PRIVATE arm_max_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_min_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_mean_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_power_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_rms_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_std_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_var_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_entropy_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_kullback_leibler_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_logsumexp_dot_prod_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_logsumexp_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_max_no_idx_f16.c) - -target_sources(CMSISDSPStatistics PRIVATE arm_absmax_f16.c) -target_sources(CMSISDSPStatistics PRIVATE arm_absmin_f16.c) - -endif() \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c deleted file mode 100644 index 50b8a24..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c +++ /dev/null @@ -1,68 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: StatisticsFunctions.c - * Description: Combination of all statistics function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_entropy_f32.c" -#include "arm_entropy_f64.c" -#include "arm_kullback_leibler_f32.c" -#include "arm_kullback_leibler_f64.c" -#include "arm_logsumexp_dot_prod_f32.c" -#include "arm_logsumexp_f32.c" -#include "arm_max_f32.c" -#include "arm_max_q15.c" -#include "arm_max_q31.c" -#include "arm_max_q7.c" -#include "arm_max_no_idx_f32.c" -#include "arm_mean_f32.c" -#include "arm_mean_q15.c" -#include "arm_mean_q31.c" -#include "arm_mean_q7.c" -#include "arm_min_f32.c" -#include "arm_min_q15.c" -#include "arm_min_q31.c" -#include "arm_min_q7.c" -#include "arm_power_f32.c" -#include "arm_power_q15.c" -#include "arm_power_q31.c" -#include "arm_power_q7.c" -#include "arm_rms_f32.c" -#include "arm_rms_q15.c" -#include "arm_rms_q31.c" -#include "arm_std_f32.c" -#include "arm_std_q15.c" -#include "arm_std_q31.c" -#include "arm_var_f32.c" -#include "arm_var_q15.c" -#include "arm_var_q31.c" -#include "arm_absmax_f32.c" -#include "arm_absmax_q15.c" -#include "arm_absmax_q31.c" -#include "arm_absmax_q7.c" -#include "arm_absmin_f32.c" -#include "arm_absmin_q15.c" -#include "arm_absmin_q31.c" -#include "arm_absmin_q7.c" \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c deleted file mode 100644 index 19eafb7..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c +++ /dev/null @@ -1,42 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: StatisticsFunctions.c - * Description: Combination of all statistics function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_max_f16.c" -#include "arm_min_f16.c" -#include "arm_mean_f16.c" -#include "arm_power_f16.c" -#include "arm_rms_f16.c" -#include "arm_std_f16.c" -#include "arm_var_f16.c" -#include "arm_entropy_f16.c" -#include "arm_kullback_leibler_f16.c" -#include "arm_logsumexp_dot_prod_f16.c" -#include "arm_logsumexp_f16.c" -#include "arm_max_no_idx_f16.c" -#include "arm_absmax_f16.c" -#include "arm_absmin_f16.c" \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f16.c deleted file mode 100644 index 0b90d53..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f16.c +++ /dev/null @@ -1,274 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_f16.c - * Description: Maximum value of a absolute values of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - -/** - @ingroup groupStats - */ - - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_absmax_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex) -{ - uint16_t blkCnt; /* loop counters */ - f16x8_t vecSrc; - float16_t const *pSrcVec; - f16x8_t curExtremValVec = vdupq_n_f16(F16_ABSMIN); - float16_t maxValue = F16_ABSMIN; - uint16_t idx = blockSize; - uint16x8_t indexVec; - uint16x8_t curExtremIdxVec; - mve_pred16_t p0; - - - indexVec = vidupq_u16((uint32_t)0, 1); - curExtremIdxVec = vdupq_n_u16(0); - - pSrcVec = (float16_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - vecSrc = vldrhq_f16(pSrcVec); - pSrcVec += 8; - vecSrc = vabsq(vecSrc); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = indexVec + 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - vecSrc = vldrhq_f16(pSrcVec); - pSrcVec += 8; - vecSrc = vabsq(vecSrc); - - p0 = vctp16q(blkCnt); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq_m(vecSrc, curExtremValVec, p0); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - } - /* - * Get max value across the vector - */ - maxValue = vmaxnmvq(maxValue, curExtremValVec); - /* - * set index for lower values to max possible index - */ - p0 = vcmpgeq(curExtremValVec, maxValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0); - /* - * Get min index which is thus for a max value - */ - idx = vminvq(idx, indexVec); - /* - * Save result - */ - *pIndex = idx; - *pResult = maxValue; -} -#else -#if defined(ARM_MATH_LOOPUNROLL) -void arm_absmax_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex) -{ - float16_t cur_absmax, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt, outIndex; /* Loop counter */ \ - uint32_t index; /* index of maximum value */ \ - \ - /* Initialize index value to zero. */ \ - outIndex = 0U; \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0.0f16) ? out : -out; \ - /* Initialize index of extrema value. */ \ - index = 0U; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmax to next consecutive values one by one */ \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f16) ? cur_absmax : -cur_absmax; \ - /* compare for the extrema value */ \ - if (cur_absmax > out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmax; \ - outIndex = index + 1U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f16) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 2U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f16) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 3U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f16) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 4U; \ - } \ - \ - index += 4U; \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f16) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = blockSize - blkCnt; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ - *pIndex = outIndex; -} -#else -void arm_absmax_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex) -{ - float16_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = fabsf(*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = fabsf(*pSrc++); - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_LOOPUNROLL) */ -#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMax group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f32.c deleted file mode 100644 index 228eb94..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f32.c +++ /dev/null @@ -1,260 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_f32.c - * Description: Maximum value of absolute values of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - -/** - @ingroup groupStats - */ - -/** - @defgroup AbsMax Absolute Maximum - - Computes the maximum value of absolute values of an array of data. - The function returns both the maximum value and its position within the array. - There are separate functions for floating-point, Q31, Q15, and Q7 data types. - */ - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_absmax_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - int32_t blkSize = blockSize; - f32x4_t vecSrc; - f32x4_t curExtremValVec = vdupq_n_f32(F32_ABSMIN); - float32_t maxValue = F32_ABSMIN; - uint32_t idx = blockSize; - uint32x4_t indexVec; - uint32x4_t curExtremIdxVec; - uint32_t curIdx = 0; - mve_pred16_t p0; - - - indexVec = vidupq_wb_u32(&curIdx, 1); - curExtremIdxVec = vdupq_n_u32(0); - - do { - mve_pred16_t p = vctp32q(blkSize); - - vecSrc = vldrwq_z_f32((float32_t const *) pSrc, p); - vecSrc = vabsq_m(vuninitializedq_f32(), vecSrc, p); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq_m(vecSrc, curExtremValVec, p); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - /* Does TP detection works here ?? */ - indexVec = vidupq_wb_u32(&curIdx, 1); - - blkSize -= 4; - pSrc += 4; - } - while (blkSize > 0); - - /* - * Get max value across the vector - */ - maxValue = vmaxnmvq(maxValue, curExtremValVec); - /* - * set index for lower values to max possible index - */ - p0 = vcmpgeq(curExtremValVec, maxValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0); - /* - * Get min index which is thus for a max value - */ - idx = vminvq(idx, indexVec); - /* - * Save result - */ - *pIndex = idx; - *pResult = maxValue; -} - - -#else -#if defined(ARM_MATH_LOOPUNROLL) -void arm_absmax_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - float32_t cur_absmax, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt, outIndex; /* Loop counter */ \ - uint32_t index; /* index of maximum value */ \ - \ - /* Initialize index value to zero. */ \ - outIndex = 0U; \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0.0f) ? out : -out; \ - /* Initialize index of extrema value. */ \ - index = 0U; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmax to next consecutive values one by one */ \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax; \ - /* compare for the extrema value */ \ - if (cur_absmax > out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmax; \ - outIndex = index + 1U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 2U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 3U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 4U; \ - } \ - \ - index += 4U; \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = blockSize - blkCnt; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ - *pIndex = outIndex; -} -#else -void arm_absmax_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - float32_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = fabsf(*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = fabsf(*pSrc++); - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_LOOPUNROLL) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMax group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f64.c deleted file mode 100644 index 0e01655..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f64.c +++ /dev/null @@ -1,92 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_f64.c - * Description: Maximum value of absolute values of a floating-point vector - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ -void arm_absmax_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult, - uint32_t * pIndex) -{ - float64_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = fabs(*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = fabs(*pSrc++); - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -/** - @} end of AbsMax group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f16.c deleted file mode 100644 index 02b81de..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f16.c +++ /dev/null @@ -1,228 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_no_idx_f16.c - * Description: Maximum value of a absolute values of a floating-point vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - -/** - @ingroup groupStats - */ - - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_absmax_no_idx_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - uint16_t blkCnt; /* loop counters */ - f16x8_t vecSrc; - float16_t const *pSrcVec; - f16x8_t curExtremValVec = vdupq_n_f16(F16_ABSMIN); - float16_t maxValue = F16_ABSMIN; - mve_pred16_t p0; - - - pSrcVec = (float16_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - vecSrc = vldrhq_f16(pSrcVec); - pSrcVec += 8; - /* - * update per-lane max. - */ - curExtremValVec = vmaxnmaq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - vecSrc = vldrhq_f16(pSrcVec); - pSrcVec += 8; - p0 = vctp16q(blkCnt); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - curExtremValVec = vmaxnmaq_m(curExtremValVec, vecSrc, p0); - } - /* - * Get max value across the vector - */ - maxValue = vmaxnmavq(maxValue, curExtremValVec); - *pResult = maxValue; -} -#else -#if defined(ARM_MATH_LOOPUNROLL) -void arm_absmax_no_idx_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - float16_t cur_absmax, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt; /* Loop counter */ \ - \ - \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = ((_Float16)out > 0.0f16) ? out : -(_Float16)out; \ - \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmax to next consecutive values one by one */ \ - cur_absmax = *pSrc++; \ - cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax; \ - /* compare for the extrema value */ \ - if ((_Float16)cur_absmax > (_Float16)out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax; \ - if ((_Float16)cur_absmax > (_Float16)out) \ - { \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax; \ - if ((_Float16)cur_absmax > (_Float16)out) \ - { \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax; \ - if ((_Float16)cur_absmax > (_Float16)out) \ - { \ - out = cur_absmax; \ - } \ - \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmax = *pSrc++; \ - cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax; \ - if ((_Float16)cur_absmax > (_Float16)out) \ - { \ - out = cur_absmax; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ -} -#else -void arm_absmax_no_idx_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - float16_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - - /* Load first input value that act as reference value for comparision */ - out = (_Float16)fabsf((float32_t)*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = (_Float16)fabsf((float32_t)*pSrc++); - - /* compare for the maximum value */ - if ((_Float16)out < (_Float16)maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; -} -#endif /* defined(ARM_MATH_LOOPUNROLL) */ -#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMax group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f32.c deleted file mode 100644 index b360b2f..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f32.c +++ /dev/null @@ -1,225 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_no_idx_f32.c - * Description: Maximum value of absolute values of a floating-point vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - -/** - @ingroup groupStats - */ - - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_absmax_no_idx_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - f32x4_t vecSrc; - float32_t const *pSrcVec; - f32x4_t curExtremValVec = vdupq_n_f32(F32_ABSMIN); - float32_t maxValue = F32_ABSMIN; - mve_pred16_t p0; - - - pSrcVec = (float32_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0) - { - vecSrc = vldrwq_f32(pSrcVec); - pSrcVec += 4; - /* - * update per-lane max. - */ - curExtremValVec = vmaxnmaq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0) - { - vecSrc = vldrwq_f32(pSrcVec); - pSrcVec += 4; - p0 = vctp32q(blkCnt); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - curExtremValVec = vmaxnmaq_m(curExtremValVec, vecSrc, p0); - } - /* - * Get max value across the vector - */ - maxValue = vmaxnmavq(maxValue, curExtremValVec); - *pResult = maxValue; -} - - -#else -#if defined(ARM_MATH_LOOPUNROLL) -void arm_absmax_no_idx_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t cur_absmax, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt; /* Loop counter */ \ - \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0.0f) ? out : -out; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmax to next consecutive values one by one */ \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax; \ - /* compare for the extrema value */ \ - if (cur_absmax > out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax; \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ -} -#else -void arm_absmax_no_idx_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - - - - /* Load first input value that act as reference value for comparision */ - out = fabsf(*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = fabsf(*pSrc++); - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; -} -#endif /* defined(ARM_MATH_LOOPUNROLL) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMax group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f64.c deleted file mode 100644 index 55f23be..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f64.c +++ /dev/null @@ -1,87 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_no_idx_f64.c - * Description: Maximum value of absolute values of a floating-point vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ -void arm_absmax_no_idx_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult) -{ - float64_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - - - - /* Load first input value that act as reference value for comparision */ - out = fabs(*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = fabs(*pSrc++); - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; -} - -/** - @} end of AbsMax group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q15.c deleted file mode 100644 index c3975c6..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q15.c +++ /dev/null @@ -1,220 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_no_idx_q15.c - * Description: Maximum value of absolute values of a Q15 vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_absmax_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - uint16_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - q15_t const *pSrcVec; - uint16x8_t curExtremValVec = vdupq_n_s16(Q15_ABSMIN); - q15_t maxValue = Q15_ABSMIN; - mve_pred16_t p0; - - - pSrcVec = (q15_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - /* - * update per-lane max. - */ - curExtremValVec = vmaxaq(curExtremValVec, vecSrc); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - p0 = vctp16q(blkCnt); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - curExtremValVec = vmaxaq_m(curExtremValVec, vecSrc, p0); - } - /* - * Get max value across the vector - */ - maxValue = vmaxavq(maxValue, (q15x8_t)curExtremValVec); - *pResult = maxValue; -} - -#else -#if defined(ARM_MATH_DSP) -void arm_absmax_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q15_t cur_absmax, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt; /* Loop counter */ \ - \ - \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q15_t)__QSUB16(0, out); \ - \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmax to next consecutive values one by one */ \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax); \ - /* compare for the extrema value */ \ - if (cur_absmax > out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ -} -#else -void arm_absmax_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q15_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc); - pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMax group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q31.c deleted file mode 100644 index 7edf50a..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q31.c +++ /dev/null @@ -1,220 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_no_idx_q31.c - * Description: Maximum value of absolute values of a Q31 vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_absmax_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - q31_t const *pSrcVec; - uint32x4_t curExtremValVec = vdupq_n_s32(Q31_ABSMIN); - q31_t maxValue = Q31_ABSMIN; - mve_pred16_t p0; - - - pSrcVec = (q31_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0) - { - vecSrc = vldrwq_s32(pSrcVec); - pSrcVec += 4; - /* - * update per-lane max. - */ - curExtremValVec = vmaxaq(curExtremValVec, vecSrc); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0) - { - vecSrc = vldrwq_s32(pSrcVec); - pSrcVec += 4; - p0 = vctp32q(blkCnt); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - curExtremValVec = vmaxaq_m(curExtremValVec, vecSrc, p0); - } - /* - * Get max value across the vector - */ - maxValue = vmaxavq(maxValue, (q31x4_t)curExtremValVec); - *pResult = maxValue; -} -#else -#if defined(ARM_MATH_DSP) -void arm_absmax_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q31_t cur_absmax, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt; /* Loop counter */ \ - \ - \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q31_t)__QSUB(0, out); \ - \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmax to next consecutive values one by one */ \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax); \ - /* compare for the extrema value */ \ - if (cur_absmax > out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ -} -#else -void arm_absmax_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q31_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc); - pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMax group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q7.c deleted file mode 100644 index b09b878..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q7.c +++ /dev/null @@ -1,224 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_no_idx_q7.c - * Description: Maximum value of absolute values of a Q7 vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a Q7 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include -#include "arm_helium_utils.h" - - - -void arm_absmax_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q7_t const *pSrcVec; - uint8x16_t curExtremValVec = vdupq_n_s8(Q7_ABSMIN); - q7_t maxValue = Q7_ABSMIN; - mve_pred16_t p0; - - - pSrcVec = (q7_t const *) pSrc; - blkCnt = blockSize >> 4; - while (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 16; - /* - * update per-lane max. - */ - curExtremValVec = vmaxaq(curExtremValVec, vecSrc); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 16; - p0 = vctp8q(blkCnt); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - curExtremValVec = vmaxaq_m(curExtremValVec, vecSrc, p0); - } - /* - * Get max value across the vector - */ - maxValue = vmaxavq(maxValue, (q7x16_t)curExtremValVec); - *pResult = maxValue; -} -#else -#if defined(ARM_MATH_DSP) -void arm_absmax_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - q7_t cur_absmax, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt; /* Loop counter */ \ - \ - \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q7_t)__QSUB8(0, out); \ - \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmax to next consecutive values one by one */ \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax); \ - /* compare for the extrema value */ \ - if (cur_absmax > out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ -} -#else -void arm_absmax_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - q7_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc); - pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMax group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q15.c deleted file mode 100644 index 06c101a..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q15.c +++ /dev/null @@ -1,236 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_q15.c - * Description: Maximum value of absolute values of a Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_absmax_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ - int32_t blkCnt; /* loop counters */ - q15x8_t extremValVec = vdupq_n_s16(Q15_ABSMIN); - q15_t maxValue = Q15_ABSMIN; - uint16x8_t indexVec; - uint16x8_t extremIdxVec; - mve_pred16_t p0; - uint16_t extremIdxArr[8]; - - indexVec = vidupq_u16(0U, 1); - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp16q(blkCnt); - q15x8_t extremIdxVal = vld1q_z_s16(pSrc, p); - - extremIdxVal = vabsq(extremIdxVal); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq_m(extremIdxVal, extremValVec, p); - - extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0); - /* store per-lane extrema indexes */ - vst1q_p_u16(extremIdxArr, indexVec, p0); - - indexVec += 8; - pSrc += 8; - blkCnt -= 8; - } - while (blkCnt > 0); - - - /* Get max value across the vector */ - maxValue = vmaxvq(maxValue, extremValVec); - - /* set index for lower values to max possible index */ - p0 = vcmpgeq(extremValVec, maxValue); - extremIdxVec = vld1q_u16(extremIdxArr); - - indexVec = vpselq(extremIdxVec, vdupq_n_u16(blockSize - 1), p0); - *pIndex = vminvq(blockSize - 1, indexVec); - *pResult = maxValue; -} - -#else -#if defined(ARM_MATH_DSP) -void arm_absmax_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ - q15_t cur_absmax, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt, outIndex; /* Loop counter */ \ - uint32_t index; /* index of maximum value */ \ - \ - /* Initialize index value to zero. */ \ - outIndex = 0U; \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q15_t)__QSUB16(0, out); \ - /* Initialize index of extrema value. */ \ - index = 0U; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmax to next consecutive values one by one */ \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax); \ - /* compare for the extrema value */ \ - if (cur_absmax > out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmax; \ - outIndex = index + 1U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 2U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 3U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 4U; \ - } \ - \ - index += 4U; \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = blockSize - blkCnt; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ - *pIndex = outIndex; -} -#else -void arm_absmax_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ - q15_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc); - pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMax group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q31.c deleted file mode 100644 index 34e6caf..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q31.c +++ /dev/null @@ -1,236 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_q31.c - * Description: Maximum value of absolute values of a Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_absmax_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ - int32_t blkCnt; /* loop counters */ - q31x4_t extremValVec = vdupq_n_s32(Q31_ABSMIN); - q31_t maxValue = Q31_ABSMIN; - uint32x4_t indexVec; - uint32x4_t extremIdxVec; - mve_pred16_t p0; - uint32_t extremIdxArr[4]; - - indexVec = vidupq_u32(0U, 1); - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp32q(blkCnt); - q31x4_t extremIdxVal = vld1q_z_s32(pSrc, p); - - extremIdxVal = vabsq(extremIdxVal); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq_m(extremIdxVal, extremValVec, p); - - extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0); - /* store per-lane extrema indexes */ - vst1q_p_u32(extremIdxArr, indexVec, p0); - - indexVec += 4; - pSrc += 4; - blkCnt -= 4; - } - while (blkCnt > 0); - - - /* Get max value across the vector */ - maxValue = vmaxvq(maxValue, extremValVec); - - /* set index for lower values to max possible index */ - p0 = vcmpgeq(extremValVec, maxValue); - extremIdxVec = vld1q_u32(extremIdxArr); - - indexVec = vpselq(extremIdxVec, vdupq_n_u32(blockSize - 1), p0); - *pIndex = vminvq(blockSize - 1, indexVec); - *pResult = maxValue; -} -#else -#if defined(ARM_MATH_DSP) -void arm_absmax_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ - q31_t cur_absmax, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt, outIndex; /* Loop counter */ \ - uint32_t index; /* index of maximum value */ \ - \ - /* Initialize index value to zero. */ \ - outIndex = 0U; \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q31_t)__QSUB(0, out); \ - /* Initialize index of extrema value. */ \ - index = 0U; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmax to next consecutive values one by one */ \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax); \ - /* compare for the extrema value */ \ - if (cur_absmax > out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmax; \ - outIndex = index + 1U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 2U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 3U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 4U; \ - } \ - \ - index += 4U; \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = blockSize - blkCnt; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ - *pIndex = outIndex; -} -#else -void arm_absmax_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ - q31_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc); - pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMax group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q7.c deleted file mode 100644 index 963584f..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q7.c +++ /dev/null @@ -1,294 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmax_q7.c - * Description: Maximum value of absolute values of a Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMax - @{ - */ - -/** - @brief Maximum value of absolute values of a Q7 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include -#include "arm_helium_utils.h" - -#define MAX_BLKSZ_S8 (UINT8_MAX+1) - -static void arm_small_blk_absmax_q7( - const q7_t * pSrc, - uint16_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - int32_t blkCnt; /* loop counters */ - q7x16_t extremValVec = vdupq_n_s8(Q7_ABSMIN); - q7_t maxValue = Q7_ABSMIN; - uint8x16_t indexVec; - uint8x16_t extremIdxVec; - mve_pred16_t p0; - uint8_t extremIdxArr[16]; - - indexVec = vidupq_u8(0U, 1); - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp8q(blkCnt); - q7x16_t extremIdxVal = vld1q_z_s8(pSrc, p); - - extremIdxVal = vabsq(extremIdxVal); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq_m(extremIdxVal, extremValVec, p); - - extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0); - /* store per-lane extrema indexes */ - vst1q_p_u8(extremIdxArr, indexVec, p0); - - indexVec += 16; - pSrc += 16; - blkCnt -= 16; - } - while (blkCnt > 0); - - - /* Get max value across the vector */ - maxValue = vmaxvq(maxValue, extremValVec); - - /* set index for lower values to max possible index */ - p0 = vcmpgeq(extremValVec, maxValue); - extremIdxVec = vld1q_u8(extremIdxArr); - - indexVec = vpselq(extremIdxVec, vdupq_n_u8(blockSize - 1), p0); - *pIndex = vminvq_u8(blockSize - 1, indexVec); - *pResult = maxValue; -} - -void arm_absmax_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - int32_t totalSize = blockSize; - - if (totalSize <= MAX_BLKSZ_S8) - { - arm_small_blk_absmax_q7(pSrc, blockSize, pResult, pIndex); - } - else - { - uint32_t curIdx = 0; - q7_t curBlkExtr = Q7_MIN; - uint32_t curBlkPos = 0; - uint32_t curBlkIdx = 0; - /* - * process blocks of 255 elts - */ - while (totalSize >= MAX_BLKSZ_S8) - { - const q7_t *curSrc = pSrc; - - arm_small_blk_absmax_q7(curSrc, MAX_BLKSZ_S8, pResult, pIndex); - if (*pResult > curBlkExtr) - { - /* - * update partial extrema - */ - curBlkExtr = *pResult; - curBlkPos = *pIndex; - curBlkIdx = curIdx; - } - curIdx++; - pSrc += MAX_BLKSZ_S8; - totalSize -= MAX_BLKSZ_S8; - } - /* - * remainder - */ - arm_small_blk_absmax_q7(pSrc, totalSize, pResult, pIndex); - if (*pResult > curBlkExtr) - { - curBlkExtr = *pResult; - curBlkPos = *pIndex; - curBlkIdx = curIdx; - } - *pIndex = curBlkIdx * MAX_BLKSZ_S8 + curBlkPos; - *pResult = curBlkExtr; - } -} -#else -#if defined(ARM_MATH_DSP) -void arm_absmax_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - q7_t cur_absmax, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt, outIndex; /* Loop counter */ \ - uint32_t index; /* index of maximum value */ \ - \ - /* Initialize index value to zero. */ \ - outIndex = 0U; \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q7_t)__QSUB8(0, out); \ - /* Initialize index of extrema value. */ \ - index = 0U; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmax to next consecutive values one by one */ \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax); \ - /* compare for the extrema value */ \ - if (cur_absmax > out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmax; \ - outIndex = index + 1U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 2U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 3U; \ - } \ - \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = index + 4U; \ - } \ - \ - index += 4U; \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmax = *pSrc++; \ - cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax); \ - if (cur_absmax > out) \ - { \ - out = cur_absmax; \ - outIndex = blockSize - blkCnt; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ - *pIndex = outIndex; -} -#else -void arm_absmax_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - q7_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc); - pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMax group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f16.c deleted file mode 100644 index 0ed3533..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f16.c +++ /dev/null @@ -1,276 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_f16.c - * Description: Minimum value of absolute values of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_absmin_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex) -{ - uint16_t blkCnt; /* loop counters */ - f16x8_t vecSrc; - float16_t const *pSrcVec; - f16x8_t curExtremValVec = vdupq_n_f16(F16_ABSMAX); - float16_t minValue = F16_ABSMAX; - uint16_t idx = blockSize; - uint16x8_t indexVec; - uint16x8_t curExtremIdxVec; - mve_pred16_t p0; - - - indexVec = vidupq_u16((uint32_t)0, 1); - curExtremIdxVec = vdupq_n_u16(0); - - pSrcVec = (float16_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - vecSrc = vldrhq_f16(pSrcVec); - pSrcVec += 8; - vecSrc = vabsq(vecSrc); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpleq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = indexVec + 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - p0 = vctp16q(blkCnt); - - vecSrc = vldrhq_f16(pSrcVec); - pSrcVec += 8; - vecSrc = vabsq(vecSrc); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpleq_m(vecSrc, curExtremValVec, p0); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - } - /* - * Get min value across the vector - */ - minValue = vminnmvq(minValue, curExtremValVec); - /* - * set index for lower values to max possible index - */ - p0 = vcmpleq(curExtremValVec, minValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0); - /* - * Get min index which is thus for a max value - */ - idx = vminvq(idx, indexVec); - /* - * Save result - */ - *pIndex = idx; - *pResult = minValue; -} - -#else -#if defined(ARM_MATH_LOOPUNROLL) -void arm_absmin_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex) -{ - float16_t cur_absmin, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt, outIndex; /* Loop counter */ \ - uint32_t index; /* index of maximum value */ \ - \ - /* Initialize index value to zero. */ \ - outIndex = 0U; \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0.0f16) ? out : -out; \ - /* Initialize index of extrema value. */ \ - index = 0U; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmin to next consecutive values one by one */ \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f16) ? cur_absmin : -cur_absmin; \ - /* compare for the extrema value */ \ - if (cur_absmin < out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmin; \ - outIndex = index + 1U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f16) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 2U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f16) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 3U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f16) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 4U; \ - } \ - \ - index += 4U; \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f16) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = blockSize - blkCnt; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ - *pIndex = outIndex; -} -#else -void arm_absmin_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex) -{ - float16_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = fabsf(*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = fabsf(*pSrc++); - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_LOOPUNROLL) */ -#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMin group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f32.c deleted file mode 100644 index 7f2ec5d..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f32.c +++ /dev/null @@ -1,279 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_f32.c - * Description: Minimum value of absolute values of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - - -/** - @ingroup groupStats - */ - -/** - @defgroup AbsMin Absolute Minimum - - Computes the minimum value of absolute values of an array of data. - The function returns both the minimum value and its position within the array. - There are separate functions for floating-point, Q31, Q15, and Q7 data types. - */ - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_absmin_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - int32_t blkCnt; /* loop counters */ - f32x4_t vecSrc; - float32_t const *pSrcVec; - f32x4_t curExtremValVec = vdupq_n_f32(F32_ABSMAX); - float32_t minValue = F32_ABSMAX; - uint32_t idx = blockSize; - uint32x4_t indexVec; - uint32x4_t curExtremIdxVec; - mve_pred16_t p0; - - - indexVec = vidupq_u32((uint32_t)0, 1); - curExtremIdxVec = vdupq_n_u32(0); - - pSrcVec = (float32_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0) - { - vecSrc = vldrwq_f32(pSrcVec); - pSrcVec += 4; - vecSrc = vabsq(vecSrc); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpleq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = indexVec + 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0) - { - p0 = vctp32q(blkCnt); - - vecSrc = vldrwq_f32(pSrcVec); - pSrcVec += 4; - vecSrc = vabsq(vecSrc); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpleq_m(vecSrc, curExtremValVec, p0); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - } - /* - * Get min value across the vector - */ - minValue = vminnmvq(minValue, curExtremValVec); - /* - * set index for lower values to max possible index - */ - p0 = vcmpleq(curExtremValVec, minValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0); - /* - * Get min index which is thus for a max value - */ - idx = vminvq(idx, indexVec); - /* - * Save result - */ - *pIndex = idx; - *pResult = minValue; -} - -#else -#if defined(ARM_MATH_LOOPUNROLL) -void arm_absmin_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - float32_t cur_absmin, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt, outIndex; /* Loop counter */ \ - uint32_t index; /* index of maximum value */ \ - \ - /* Initialize index value to zero. */ \ - outIndex = 0U; \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0.0f) ? out : -out; \ - /* Initialize index of extrema value. */ \ - index = 0U; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmin to next consecutive values one by one */ \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin; \ - /* compare for the extrema value */ \ - if (cur_absmin < out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmin; \ - outIndex = index + 1U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 2U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 3U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 4U; \ - } \ - \ - index += 4U; \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = blockSize - blkCnt; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ - *pIndex = outIndex; -} -#else -void arm_absmin_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - float32_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = fabsf(*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = fabsf(*pSrc++); - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -#endif /* defined(ARM_MATH_LOOPUNROLL) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMin group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f64.c deleted file mode 100644 index 5dd04cc..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f64.c +++ /dev/null @@ -1,90 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_f64.c - * Description: Minimum value of absolute values of a floating-point vector - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ -void arm_absmin_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult, - uint32_t * pIndex) -{ - float64_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = fabs(*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = fabs(*pSrc++); - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -/** - @} end of AbsMin group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f16.c deleted file mode 100644 index 5f6ca74..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f16.c +++ /dev/null @@ -1,230 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_no_idx_f16.c - * Description: Minimum value of absolute values of a floating-point vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_absmin_no_idx_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - f16x8_t vecSrc; - float16_t const *pSrcVec; - f16x8_t curExtremValVec = vdupq_n_f16(F16_ABSMAX); - float16_t minValue = F16_ABSMAX; - mve_pred16_t p0; - - - pSrcVec = (float16_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - /* - * update per-lane min. - */ - curExtremValVec = vminnmaq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - p0 = vctp16q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - curExtremValVec = vminnmaq_m(curExtremValVec, vecSrc, p0); - } - /* - * Get min value across the vector - */ - minValue = vminnmavq(minValue, curExtremValVec); - *pResult = minValue; -} - -#else -#if defined(ARM_MATH_LOOPUNROLL) -void arm_absmin_no_idx_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - float16_t cur_absmin, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt; /* Loop counter */ \ - \ - \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = ((_Float16)out > 0.0f16) ? out : -(_Float16)out; \ - \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmin to next consecutive values one by one */ \ - cur_absmin = *pSrc++; \ - cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin; \ - /* compare for the extrema value */ \ - if ((_Float16)cur_absmin < (_Float16)out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin; \ - if ((_Float16)cur_absmin < (_Float16)out) \ - { \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin; \ - if ((_Float16)cur_absmin < (_Float16)out) \ - { \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin; \ - if ((_Float16)cur_absmin < (_Float16)out) \ - { \ - out = cur_absmin; \ - } \ - \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmin = *pSrc++; \ - cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin; \ - if ((_Float16)cur_absmin < (_Float16)out) \ - { \ - out = cur_absmin; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ -} -#else -void arm_absmin_no_idx_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - float16_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - - /* Load first input value that act as reference value for comparision */ - out = (_Float16)fabsf((float32_t)*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = (_Float16)fabsf((float32_t)*pSrc++); - - /* compare for the minimum value */ - if ((_Float16)out > (_Float16)minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; -} -#endif /* defined(ARM_MATH_LOOPUNROLL) */ -#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMin group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f32.c deleted file mode 100644 index 1e7e481..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f32.c +++ /dev/null @@ -1,226 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_no_idx_f32.c - * Description: Minimum value of absolute values of a floating-point vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - - -/** - @ingroup groupStats - */ - - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_absmin_no_idx_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - f32x4_t vecSrc; - float32_t const *pSrcVec; - f32x4_t curExtremValVec = vdupq_n_f32(F32_ABSMAX); - float32_t minValue = F32_ABSMAX; - mve_pred16_t p0; - - - pSrcVec = (float32_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0) - { - vecSrc = vldrwq_f32(pSrcVec); - pSrcVec += 4; - /* - * update per-lane min. - */ - curExtremValVec = vminnmaq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0) - { - vecSrc = vldrwq_f32(pSrcVec); - pSrcVec += 4; - p0 = vctp32q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - curExtremValVec = vminnmaq_m(curExtremValVec, vecSrc, p0); - } - /* - * Get min value across the vector - */ - minValue = vminnmavq(minValue, curExtremValVec); - *pResult = minValue; -} - -#else -#if defined(ARM_MATH_LOOPUNROLL) -void arm_absmin_no_idx_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t cur_absmin, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt; /* Loop counter */ \ - \ - \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0.0f) ? out : -out; \ - \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmin to next consecutive values one by one */ \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin; \ - /* compare for the extrema value */ \ - if (cur_absmin < out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin; \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ -} -#else -void arm_absmin_no_idx_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - - /* Load first input value that act as reference value for comparision */ - out = fabsf(*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = fabsf(*pSrc++); - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; -} - -#endif /* defined(ARM_MATH_LOOPUNROLL) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMin group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f64.c deleted file mode 100644 index 2da8362..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f64.c +++ /dev/null @@ -1,84 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_no_idx_f64.c - * Description: Minimum value of absolute values of a floating-point vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ -void arm_absmin_no_idx_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult) -{ - float64_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - /* Load first input value that act as reference value for comparision */ - out = fabs(*pSrc++); - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = fabs(*pSrc++); - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; -} - -/** - @} end of AbsMin group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q15.c deleted file mode 100644 index eb00ac8..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q15.c +++ /dev/null @@ -1,222 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_no_idx_q15.c - * Description: Minimum value of absolute values of a Q15 vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_absmin_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - uint16_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - q15_t const *pSrcVec; - uint16x8_t curExtremValVec = vdupq_n_s16(Q15_ABSMAX); - q15_t minValue = Q15_ABSMAX; - mve_pred16_t p0; - - - pSrcVec = (q15_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - /* - * update per-lane min. - */ - curExtremValVec = vminaq(curExtremValVec, vecSrc); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - p0 = vctp16q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - curExtremValVec = vminaq_m(curExtremValVec, vecSrc, p0); - } - /* - * Get min value across the vector - */ - minValue = vminavq(minValue, (q15x8_t)curExtremValVec); - *pResult = minValue; -} - -#else -#if defined(ARM_MATH_DSP) -void arm_absmin_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q15_t cur_absmin, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt; /* Loop counter */ \ - \ - \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q15_t)__QSUB16(0, out); \ - \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmin to next consecutive values one by one */ \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin); \ - /* compare for the extrema value */ \ - if (cur_absmin < out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ -} -#else -void arm_absmin_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q15_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc); - pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMin group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q31.c deleted file mode 100644 index bd31beb..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q31.c +++ /dev/null @@ -1,221 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_no_idx_q31.c - * Description: Minimum value of absolute values of a Q31 vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_absmin_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - q31_t const *pSrcVec; - uint32x4_t curExtremValVec = vdupq_n_s32(Q31_ABSMAX); - q31_t minValue = Q31_ABSMAX; - mve_pred16_t p0; - - - pSrcVec = (q31_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0) - { - vecSrc = vldrwq_s32(pSrcVec); - pSrcVec += 4; - /* - * update per-lane min. - */ - curExtremValVec = vminaq(curExtremValVec, vecSrc); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0) - { - vecSrc = vldrwq_s32(pSrcVec); - pSrcVec += 4; - p0 = vctp32q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - curExtremValVec = vminaq_m(curExtremValVec, vecSrc, p0); - } - /* - * Get min value across the vector - */ - minValue = vminavq(minValue, (q31x4_t)curExtremValVec); - *pResult = minValue; -} - -#else -#if defined(ARM_MATH_DSP) -void arm_absmin_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q31_t cur_absmin, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt; /* Loop counter */ \ - \ - \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q31_t)__QSUB(0, out); \ - \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmin to next consecutive values one by one */ \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin); \ - /* compare for the extrema value */ \ - if (cur_absmin < out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ -} -#else -void arm_absmin_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q31_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc); - pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMin group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q7.c deleted file mode 100644 index abe248c..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q7.c +++ /dev/null @@ -1,223 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_no_idx_q7.c - * Description: Minimum value of absolute values of a Q7 vector - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a Q7 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include -#include "arm_helium_utils.h" - - - -void arm_absmin_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q7_t const *pSrcVec; - uint8x16_t curExtremValVec = vdupq_n_s8(Q7_ABSMAX); - q7_t minValue = Q7_ABSMAX; - mve_pred16_t p0; - - - pSrcVec = (q7_t const *) pSrc; - blkCnt = blockSize >> 4; - while (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 16; - /* - * update per-lane min. - */ - curExtremValVec = vminaq(curExtremValVec, vecSrc); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 16; - p0 = vctp8q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - curExtremValVec = vminaq_m(curExtremValVec, vecSrc, p0); - } - /* - * Get min value across the vector - */ - minValue = vminavq(minValue, (q7x16_t)curExtremValVec); - *pResult = minValue; -} - -#else -#if defined(ARM_MATH_DSP) -void arm_absmin_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - q7_t cur_absmin, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt; /* Loop counter */ \ - \ - \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q7_t)__QSUB8(0, out); \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmin to next consecutive values one by one */ \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin); \ - /* compare for the extrema value */ \ - if (cur_absmin < out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ -} -#else -void arm_absmin_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - q7_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* Loop counter */ - - - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc); - pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMin group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q15.c deleted file mode 100644 index f1c468e..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q15.c +++ /dev/null @@ -1,269 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_q15.c - * Description: Minimum value of absolute values of a Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_absmin_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ - uint16_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - q15_t const *pSrcVec; - q15x8_t curExtremValVec = vdupq_n_s16(Q15_ABSMAX); - q15_t minValue = Q15_ABSMAX; - uint16_t idx = blockSize; - uint16x8_t indexVec; - uint16x8_t curExtremIdxVec; - uint32_t startIdx = 0; - mve_pred16_t p0; - - - indexVec = vidupq_wb_u16(&startIdx, 1); - curExtremIdxVec = vdupq_n_u16(0); - - pSrcVec = (q15_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - vecSrc = vabsq(vecSrc); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = vidupq_wb_u16(&startIdx, 1); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - vecSrc = vabsq(vecSrc); - - p0 = vctp16q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq_m(vecSrc, curExtremValVec, p0); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - } - /* - * Get min value across the vector - */ - minValue = vminvq(minValue, curExtremValVec); - /* - * set index for lower values to min possible index - */ - p0 = vcmpleq(curExtremValVec, minValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0); - /* - * Get min index which is thus for a min value - */ - idx = vminvq(idx, indexVec); - /* - * Save result - */ - *pIndex = idx; - *pResult = minValue; -} - -#else -#if defined(ARM_MATH_DSP) -void arm_absmin_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ - q15_t cur_absmin, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt, outIndex; /* Loop counter */ \ - uint32_t index; /* index of maximum value */ \ - \ - /* Initialize index value to zero. */ \ - outIndex = 0U; \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q15_t)__QSUB16(0, out); \ - /* Initialize index of extrema value. */ \ - index = 0U; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmin to next consecutive values one by one */ \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin); \ - /* compare for the extrema value */ \ - if (cur_absmin < out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmin; \ - outIndex = index + 1U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 2U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 3U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 4U; \ - } \ - \ - index += 4U; \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = blockSize - blkCnt; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ - *pIndex = outIndex; -} -#else -void arm_absmin_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ - q15_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc); - pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMin group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q31.c deleted file mode 100644 index cca8648..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q31.c +++ /dev/null @@ -1,269 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_q31.c - * Description: Minimum value of absolute values of a Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_absmin_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ - uint16_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - q31_t const *pSrcVec; - q31x4_t curExtremValVec = vdupq_n_s32(Q31_ABSMAX); - q31_t minValue = Q31_ABSMAX; - uint16_t idx = blockSize; - uint32x4_t indexVec; - uint32x4_t curExtremIdxVec; - uint32_t startIdx = 0; - mve_pred16_t p0; - - - indexVec = vidupq_wb_u32(&startIdx, 1); - curExtremIdxVec = vdupq_n_u32(0); - - pSrcVec = (q31_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - vecSrc = vldrwq_s32(pSrcVec); - pSrcVec += 4; - vecSrc = vabsq(vecSrc); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = vidupq_wb_u32(&startIdx, 1); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - vecSrc = vldrwq_s32(pSrcVec); - pSrcVec += 4; - vecSrc = vabsq(vecSrc); - - p0 = vctp32q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq_m(vecSrc, curExtremValVec, p0); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - } - /* - * Get min value across the vector - */ - minValue = vminvq(minValue, curExtremValVec); - /* - * set index for lower values to min possible index - */ - p0 = vcmpleq(curExtremValVec, minValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0); - /* - * Get min index which is thus for a min value - */ - idx = vminvq(idx, indexVec); - /* - * Save result - */ - *pIndex = idx; - *pResult = minValue; -} - -#else -#if defined(ARM_MATH_DSP) -void arm_absmin_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ - q31_t cur_absmin, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt, outIndex; /* Loop counter */ \ - uint32_t index; /* index of maximum value */ \ - \ - /* Initialize index value to zero. */ \ - outIndex = 0U; \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q31_t)__QSUB(0, out); \ - /* Initialize index of extrema value. */ \ - index = 0U; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmin to next consecutive values one by one */ \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin); \ - /* compare for the extrema value */ \ - if (cur_absmin < out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmin; \ - outIndex = index + 1U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 2U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 3U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 4U; \ - } \ - \ - index += 4U; \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = blockSize - blkCnt; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ - *pIndex = outIndex; -} -#else -void arm_absmin_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ - q31_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc); - pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMin group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q7.c deleted file mode 100644 index c59bc7b..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q7.c +++ /dev/null @@ -1,322 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_absmin_q7.c - * Description: Minimum value of absolute values of a Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup AbsMin - @{ - */ - -/** - @brief Minimum value of absolute values of a Q7 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include -#include "arm_helium_utils.h" - -#define MAX_BLKSZ_S8 (UINT8_MAX+1) - -static void arm_small_blk_absmin_q7( - const q7_t *pSrc, - uint32_t blockSize, - q7_t *pResult, - uint32_t *pIndex) -{ - uint16_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q7_t const *pSrcVec; - q7x16_t curExtremValVec = vdupq_n_s8(Q7_ABSMAX); - q7_t minValue = Q7_ABSMAX; - uint16_t idx = blockSize - 1; - uint8x16_t indexVec; - uint8x16_t curExtremIdxVec; - uint32_t startIdx = 0; - mve_pred16_t p0; - - - indexVec = vidupq_wb_u8(&startIdx, 1); - curExtremIdxVec = vdupq_n_u8(0); - - pSrcVec = (q7_t const *) pSrc; - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 16; - vecSrc = vabsq(vecSrc); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = vidupq_wb_u8(&startIdx, 1); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 16; - vecSrc = vabsq(vecSrc); - - p0 = vctp8q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq_m(vecSrc, curExtremValVec, p0); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - } - /* - * Get min value across the vector - */ - minValue = vminvq(minValue, curExtremValVec); - /* - * set index for lower values to min possible index - */ - p0 = vcmpleq(curExtremValVec, minValue); - idx = vminvq_p_u8(idx, curExtremIdxVec, p0); - /* - * Save result - */ - *pIndex = idx; - *pResult = minValue; -} - - -void arm_absmin_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - int32_t totalSize = blockSize; - - if (totalSize <= MAX_BLKSZ_S8) - { - arm_small_blk_absmin_q7(pSrc, blockSize, pResult, pIndex); - } - else - { - uint32_t curIdx = 0; - q7_t curBlkExtr = Q7_MAX; - uint32_t curBlkPos = 0; - uint32_t curBlkIdx = 0; - /* - * process blocks of 255 elts - */ - while (totalSize >= MAX_BLKSZ_S8) - { - const q7_t *curSrc = pSrc; - - arm_small_blk_absmin_q7(curSrc, MAX_BLKSZ_S8, pResult, pIndex); - if (*pResult < curBlkExtr) - { - /* - * update partial extrema - */ - curBlkExtr = *pResult; - curBlkPos = *pIndex; - curBlkIdx = curIdx; - } - curIdx++; - pSrc += MAX_BLKSZ_S8; - totalSize -= MAX_BLKSZ_S8; - } - /* - * remainder - */ - arm_small_blk_absmin_q7(pSrc, totalSize, pResult, pIndex); - if (*pResult < curBlkExtr) - { - curBlkExtr = *pResult; - curBlkPos = *pIndex; - curBlkIdx = curIdx; - } - *pIndex = curBlkIdx * MAX_BLKSZ_S8 + curBlkPos; - *pResult = curBlkExtr; - } -} - -#else -#if defined(ARM_MATH_DSP) -void arm_absmin_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - q7_t cur_absmin, out; /* Temporary variables to store the output value. */\ - uint32_t blkCnt, outIndex; /* Loop counter */ \ - uint32_t index; /* index of maximum value */ \ - \ - /* Initialize index value to zero. */ \ - outIndex = 0U; \ - /* Load first input value that act as reference value for comparision */ \ - out = *pSrc++; \ - out = (out > 0) ? out : (q7_t)__QSUB8(0, out); \ - /* Initialize index of extrema value. */ \ - index = 0U; \ - \ - /* Loop unrolling: Compute 4 outputs at a time */ \ - blkCnt = (blockSize - 1U) >> 2U; \ - \ - while (blkCnt > 0U) \ - { \ - /* Initialize cur_absmin to next consecutive values one by one */ \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin); \ - /* compare for the extrema value */ \ - if (cur_absmin < out) \ - { \ - /* Update the extrema value and it's index */ \ - out = cur_absmin; \ - outIndex = index + 1U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 2U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 3U; \ - } \ - \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = index + 4U; \ - } \ - \ - index += 4U; \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Loop unrolling: Compute remaining outputs */ \ - blkCnt = (blockSize - 1U) % 4U; \ - \ - \ - while (blkCnt > 0U) \ - { \ - cur_absmin = *pSrc++; \ - cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin); \ - if (cur_absmin < out) \ - { \ - out = cur_absmin; \ - outIndex = blockSize - blkCnt; \ - } \ - \ - /* Decrement loop counter */ \ - blkCnt--; \ - } \ - \ - /* Store the extrema value and it's index into destination pointers */ \ - *pResult = out; \ - *pIndex = outIndex; -} -#else -void arm_absmin_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - q7_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc); - pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc); - pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_DSP) */ -#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of AbsMin group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f16.c deleted file mode 100644 index 4fd0621..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f16.c +++ /dev/null @@ -1,140 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_logsumexp_f16.c - * Description: LogSumExp - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup groupStats - */ - -/** - @defgroup Entropy Entropy - - Computes the entropy of a distribution - - */ - -/** - * @addtogroup Entropy - * @{ - */ - - -/** - * @brief Entropy - * - * @param[in] pSrcA Array of input values. - * @param[in] blockSize Number of samples in the input array. - * @return Entropy -Sum(p ln p) - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math_f16.h" - -float16_t arm_entropy_f16(const float16_t * pSrcA,uint32_t blockSize) -{ - uint32_t blkCnt; - _Float16 accum=0.0f16,p; - - - blkCnt = blockSize; - - f16x8_t vSum = vdupq_n_f16(0.0f); - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - f16x8_t vecIn = vld1q(pSrcA); - - vSum = vaddq_f16(vSum, vmulq(vecIn, vlogq_f16(vecIn))); - - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrcA += 8; - blkCnt --; - } - - accum = vecAddAcrossF16Mve(vSum); - - /* Tail */ - blkCnt = blockSize & 0x7; - while(blkCnt > 0) - { - p = *pSrcA++; - accum += p * logf(p); - - blkCnt--; - - } - - return (-accum); -} - -#else - -float16_t arm_entropy_f16(const float16_t * pSrcA,uint32_t blockSize) -{ - const float16_t *pIn; - uint32_t blkCnt; - _Float16 accum, p; - - pIn = pSrcA; - blkCnt = blockSize; - - accum = 0.0f; - - while(blkCnt > 0) - { - p = *pIn++; - accum += p * logf(p); - - blkCnt--; - - } - - return(-accum); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of Entropy group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c deleted file mode 100644 index ee5555d..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c +++ /dev/null @@ -1,174 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_logsumexp_f32.c - * Description: LogSumExp - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#include -#include - - -/** - * @addtogroup Entropy - * @{ - */ - - -/** - * @brief Entropy - * - * @param[in] pSrcA Array of input values. - * @param[in] blockSize Number of samples in the input array. - * @return Entropy -Sum(p ln p) - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize) -{ - uint32_t blkCnt; - float32_t accum=0.0f,p; - - - blkCnt = blockSize; - - f32x4_t vSum = vdupq_n_f32(0.0f); - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - f32x4_t vecIn = vld1q(pSrcA); - - vSum = vaddq_f32(vSum, vmulq(vecIn, vlogq_f32(vecIn))); - - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrcA += 4; - blkCnt --; - } - - accum = vecAddAcrossF32Mve(vSum); - - /* Tail */ - blkCnt = blockSize & 0x3; - while(blkCnt > 0) - { - p = *pSrcA++; - accum += p * logf(p); - - blkCnt--; - - } - - return (-accum); -} - -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "NEMath.h" - -float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize) -{ - const float32_t *pIn; - uint32_t blkCnt; - float32_t accum, p; - - float32x4_t accumV; - float32x2_t accumV2; - float32x4_t tmpV, tmpV2; - - pIn = pSrcA; - - accum = 0.0f; - accumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - tmpV = vld1q_f32(pIn); - pIn += 4; - - tmpV2 = vlogq_f32(tmpV); - accumV = vmlaq_f32(accumV, tmpV, tmpV2); - - blkCnt--; - - } - - accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV)); - accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); - - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - p = *pIn++; - accum += p * logf(p); - - blkCnt--; - - } - - return(-accum); -} - -#else -float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize) -{ - const float32_t *pIn; - uint32_t blkCnt; - float32_t accum, p; - - pIn = pSrcA; - blkCnt = blockSize; - - accum = 0.0f; - - while(blkCnt > 0) - { - p = *pIn++; - accum += p * logf(p); - - blkCnt--; - - } - - return(-accum); -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of Entropy group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c deleted file mode 100644 index da2a744..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c +++ /dev/null @@ -1,73 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_logsumexp_f64.c - * Description: LogSumExp - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#include -#include - -/** - * @addtogroup Entropy - * @{ - */ - -/** - * @brief Entropy - * - * @param[in] pSrcA Array of input values. - * @param[in] blockSize Number of samples in the input array. - * @return Entropy -Sum(p ln p) - * - */ - -float64_t arm_entropy_f64(const float64_t * pSrcA, uint32_t blockSize) -{ - const float64_t *pIn; - uint32_t blkCnt; - float64_t accum, p; - - pIn = pSrcA; - blkCnt = blockSize; - - accum = 0.0f; - - while(blkCnt > 0) - { - p = *pIn++; - - accum += p * log(p); - - blkCnt--; - - } - - return(-accum); -} - -/** - * @} end of Entropy group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f16.c deleted file mode 100644 index 320c45f..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f16.c +++ /dev/null @@ -1,152 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_logsumexp_f16.c - * Description: LogSumExp - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup groupStats - */ - -/** - @defgroup Kullback-Leibler Kullback-Leibler divergence - - Computes the Kullback-Leibler divergence between two distributions - - */ - - -/** - * @addtogroup Kullback-Leibler - * @{ - */ - - -/** - * @brief Kullback-Leibler - * - * Distribution A may contain 0 with Neon version. - * Result will be right but some exception flags will be set. - * - * Distribution B must not contain 0 probability. - * - * @param[in] *pSrcA points to an array of input values for probaility distribution A. - * @param[in] *pSrcB points to an array of input values for probaility distribution B. - * @param[in] blockSize number of samples in the input array. - * @return Kullback-Leibler divergence D(A || B) - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math_f16.h" - -float16_t arm_kullback_leibler_f16(const float16_t * pSrcA,const float16_t * pSrcB,uint32_t blockSize) -{ - uint32_t blkCnt; - _Float16 accum, pA,pB; - - - blkCnt = blockSize; - - accum = 0.0f16; - - f16x8_t vSum = vdupq_n_f16(0.0f); - blkCnt = blockSize >> 3; - while(blkCnt > 0) - { - f16x8_t vecA = vld1q(pSrcA); - f16x8_t vecB = vld1q(pSrcB); - f16x8_t vRatio; - - vRatio = vdiv_f16(vecB, vecA); - vSum = vaddq_f16(vSum, vmulq(vecA, vlogq_f16(vRatio))); - - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrcA += 8; - pSrcB += 8; - blkCnt --; - } - - accum = vecAddAcrossF16Mve(vSum); - - blkCnt = blockSize & 7; - while(blkCnt > 0) - { - pA = *pSrcA++; - pB = *pSrcB++; - accum += pA * logf(pB / pA); - - blkCnt--; - - } - - return(-accum); -} - -#else -float16_t arm_kullback_leibler_f16(const float16_t * pSrcA,const float16_t * pSrcB,uint32_t blockSize) -{ - const float16_t *pInA, *pInB; - uint32_t blkCnt; - _Float16 accum, pA,pB; - - pInA = pSrcA; - pInB = pSrcB; - blkCnt = blockSize; - - accum = 0.0f; - - while(blkCnt > 0) - { - pA = *pInA++; - pB = *pInB++; - accum += pA * logf(pB / pA); - - blkCnt--; - - } - - return(-accum); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of Kullback-Leibler group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c deleted file mode 100644 index f5b715b..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c +++ /dev/null @@ -1,193 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_logsumexp_f32.c - * Description: LogSumExp - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#include -#include - - -/** - * @addtogroup Kullback-Leibler - * @{ - */ - - -/** - * @brief Kullback-Leibler - * - * Distribution A may contain 0 with Neon version. - * Result will be right but some exception flags will be set. - * - * Distribution B must not contain 0 probability. - * - * @param[in] *pSrcA points to an array of input values for probaility distribution A. - * @param[in] *pSrcB points to an array of input values for probaility distribution B. - * @param[in] blockSize number of samples in the input array. - * @return Kullback-Leibler divergence D(A || B) - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -float32_t arm_kullback_leibler_f32(const float32_t * pSrcA,const float32_t * pSrcB,uint32_t blockSize) -{ - uint32_t blkCnt; - float32_t accum, pA,pB; - - - blkCnt = blockSize; - - accum = 0.0f; - - f32x4_t vSum = vdupq_n_f32(0.0f); - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - f32x4_t vecA = vld1q(pSrcA); - f32x4_t vecB = vld1q(pSrcB); - f32x4_t vRatio; - - vRatio = vdiv_f32(vecB, vecA); - vSum = vaddq_f32(vSum, vmulq(vecA, vlogq_f32(vRatio))); - - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrcA += 4; - pSrcB += 4; - blkCnt --; - } - - accum = vecAddAcrossF32Mve(vSum); - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - pA = *pSrcA++; - pB = *pSrcB++; - accum += pA * logf(pB / pA); - - blkCnt--; - - } - - return(-accum); -} - -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "NEMath.h" - -float32_t arm_kullback_leibler_f32(const float32_t * pSrcA,const float32_t * pSrcB,uint32_t blockSize) -{ - const float32_t *pInA, *pInB; - uint32_t blkCnt; - float32_t accum, pA,pB; - - float32x4_t accumV; - float32x2_t accumV2; - float32x4_t tmpVA, tmpVB,tmpV; - - pInA = pSrcA; - pInB = pSrcB; - - accum = 0.0f; - accumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - tmpVA = vld1q_f32(pInA); - pInA += 4; - - tmpVB = vld1q_f32(pInB); - pInB += 4; - - tmpV = vinvq_f32(tmpVA); - tmpVB = vmulq_f32(tmpVB, tmpV); - tmpVB = vlogq_f32(tmpVB); - - accumV = vmlaq_f32(accumV, tmpVA, tmpVB); - - blkCnt--; - - } - - accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV)); - accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - pA = *pInA++; - pB = *pInB++; - accum += pA * logf(pB/pA); - - blkCnt--; - - } - - return(-accum); -} - -#else -float32_t arm_kullback_leibler_f32(const float32_t * pSrcA,const float32_t * pSrcB,uint32_t blockSize) -{ - const float32_t *pInA, *pInB; - uint32_t blkCnt; - float32_t accum, pA,pB; - - pInA = pSrcA; - pInB = pSrcB; - blkCnt = blockSize; - - accum = 0.0f; - - while(blkCnt > 0) - { - pA = *pInA++; - pB = *pInB++; - accum += pA * logf(pB / pA); - - blkCnt--; - - } - - return(-accum); -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of Kullback-Leibler group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c deleted file mode 100644 index 8df6bbf..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_logsumexp_f64.c - * Description: LogSumExp - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#include -#include - -/** - * @addtogroup Kullback-Leibler - * @{ - */ - -/** - * @brief Kullback-Leibler - * - * @param[in] *pSrcA points to an array of input values for probaility distribution A. - * @param[in] *pSrcB points to an array of input values for probaility distribution B. - * @param[in] blockSize number of samples in the input array. - * @return Kullback-Leibler divergence D(A || B) - * - */ - -float64_t arm_kullback_leibler_f64(const float64_t * pSrcA, const float64_t * pSrcB, uint32_t blockSize) -{ - const float64_t *pInA, *pInB; - uint32_t blkCnt; - float64_t accum, pA,pB; - - pInA = pSrcA; - pInB = pSrcB; - blkCnt = blockSize; - - accum = 0.0f; - - while(blkCnt > 0) - { - pA = *pInA++; - pB = *pInB++; - - accum += pA * log(pB / pA); - - blkCnt--; - } - - return(-accum); -} - -/** - * @} end of Kullback-Leibler group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f16.c deleted file mode 100644 index 0e96f69..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f16.c +++ /dev/null @@ -1,84 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_logsumexp_f16.c - * Description: LogSumExp - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup groupStats - */ - -/** - @defgroup LogSumExp LogSumExp - - LogSumExp optimizations to compute sum of probabilities with Gaussian distributions - - */ - -/** - * @addtogroup LogSumExp - * @{ - */ - - -/** - * @brief Dot product with log arithmetic - * - * Vectors are containing the log of the samples - * - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[in] *pTmpBuffer temporary buffer of length blockSize - * @return The log of the dot product. - * - */ - - -float16_t arm_logsumexp_dot_prod_f16(const float16_t * pSrcA, - const float16_t * pSrcB, - uint32_t blockSize, - float16_t *pTmpBuffer) -{ - float16_t result; - arm_add_f16((float16_t*)pSrcA, (float16_t*)pSrcB, pTmpBuffer, blockSize); - - result = arm_logsumexp_f16(pTmpBuffer, blockSize); - return(result); -} - -/** - * @} end of LogSumExp group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c deleted file mode 100644 index 2ee543a..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c +++ /dev/null @@ -1,68 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_logsumexp_f32.c - * Description: LogSumExp - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#include -#include - - -/** - * @addtogroup LogSumExp - * @{ - */ - - -/** - * @brief Dot product with log arithmetic - * - * Vectors are containing the log of the samples - * - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[in] *pTmpBuffer temporary buffer of length blockSize - * @return The log of the dot product. - * - */ - - -float32_t arm_logsumexp_dot_prod_f32(const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t blockSize, - float32_t *pTmpBuffer) -{ - float32_t result; - arm_add_f32((float32_t*)pSrcA, (float32_t*)pSrcB, pTmpBuffer, blockSize); - - result = arm_logsumexp_f32(pTmpBuffer, blockSize); - return(result); -} - -/** - * @} end of LogSumExp group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f16.c deleted file mode 100644 index c09bfb2..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f16.c +++ /dev/null @@ -1,172 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_logsumexp_f16.c - * Description: LogSumExp - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - - -/** - * @addtogroup LogSumExp - * @{ - */ - - -/** - * @brief Computation of the LogSumExp - * - * In probabilistic computations, the dynamic of the probability values can be very - * wide because they come from gaussian functions. - * To avoid underflow and overflow issues, the values are represented by their log. - * In this representation, multiplying the original exp values is easy : their logs are added. - * But adding the original exp values is requiring some special handling and it is the - * goal of the LogSumExp function. - * - * If the values are x1...xn, the function is computing: - * - * ln(exp(x1) + ... + exp(xn)) and the computation is done in such a way that - * rounding issues are minimised. - * - * The max xm of the values is extracted and the function is computing: - * xm + ln(exp(x1 - xm) + ... + exp(xn - xm)) - * - * @param[in] *in Pointer to an array of input values. - * @param[in] blockSize Number of samples in the input array. - * @return LogSumExp - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math_f16.h" - -float16_t arm_logsumexp_f16(const float16_t *in, uint32_t blockSize) -{ - float16_t maxVal; - const float16_t *pIn; - int32_t blkCnt; - _Float16 accum=0.0f16; - _Float16 tmp; - - - arm_max_no_idx_f16((float16_t *) in, blockSize, &maxVal); - - - blkCnt = blockSize; - pIn = in; - - - f16x8_t vSum = vdupq_n_f16(0.0f16); - blkCnt = blockSize >> 3; - while(blkCnt > 0) - { - f16x8_t vecIn = vld1q(pIn); - f16x8_t vecExp; - - vecExp = vexpq_f16(vsubq_n_f16(vecIn, maxVal)); - - vSum = vaddq_f16(vSum, vecExp); - - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pIn += 8; - blkCnt --; - } - - /* sum + log */ - accum = vecAddAcrossF16Mve(vSum); - - blkCnt = blockSize & 0x7; - while(blkCnt > 0) - { - tmp = *pIn++; - accum += expf(tmp - maxVal); - blkCnt--; - - } - - accum = maxVal + logf(accum); - - return (accum); -} - -#else -float16_t arm_logsumexp_f16(const float16_t *in, uint32_t blockSize) -{ - _Float16 maxVal; - _Float16 tmp; - const float16_t *pIn; - uint32_t blkCnt; - _Float16 accum; - - pIn = in; - blkCnt = blockSize; - - maxVal = *pIn++; - blkCnt--; - - while(blkCnt > 0) - { - tmp = *pIn++; - - if (tmp > maxVal) - { - maxVal = tmp; - } - blkCnt--; - - } - - blkCnt = blockSize; - pIn = in; - accum = 0; - while(blkCnt > 0) - { - tmp = *pIn++; - accum += expf(tmp - maxVal); - blkCnt--; - - } - accum = maxVal + logf(accum); - - return(accum); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of LogSumExp group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c deleted file mode 100644 index e5a2caf..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c +++ /dev/null @@ -1,277 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_logsumexp_f32.c - * Description: LogSumExp - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#include -#include - - -/** - * @addtogroup LogSumExp - * @{ - */ - - -/** - * @brief Computation of the LogSumExp - * - * In probabilistic computations, the dynamic of the probability values can be very - * wide because they come from gaussian functions. - * To avoid underflow and overflow issues, the values are represented by their log. - * In this representation, multiplying the original exp values is easy : their logs are added. - * But adding the original exp values is requiring some special handling and it is the - * goal of the LogSumExp function. - * - * If the values are x1...xn, the function is computing: - * - * ln(exp(x1) + ... + exp(xn)) and the computation is done in such a way that - * rounding issues are minimised. - * - * The max xm of the values is extracted and the function is computing: - * xm + ln(exp(x1 - xm) + ... + exp(xn - xm)) - * - * @param[in] *in Pointer to an array of input values. - * @param[in] blockSize Number of samples in the input array. - * @return LogSumExp - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_math.h" - -float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize) -{ - float32_t maxVal; - const float32_t *pIn; - int32_t blkCnt; - float32_t accum=0.0f; - float32_t tmp; - - - arm_max_no_idx_f32((float32_t *) in, blockSize, &maxVal); - - - blkCnt = blockSize; - pIn = in; - - - f32x4_t vSum = vdupq_n_f32(0.0f); - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - f32x4_t vecIn = vld1q(pIn); - f32x4_t vecExp; - - vecExp = vexpq_f32(vsubq_n_f32(vecIn, maxVal)); - - vSum = vaddq_f32(vSum, vecExp); - - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pIn += 4; - blkCnt --; - } - - /* sum + log */ - accum = vecAddAcrossF32Mve(vSum); - - blkCnt = blockSize & 0x3; - while(blkCnt > 0) - { - tmp = *pIn++; - accum += expf(tmp - maxVal); - blkCnt--; - - } - - accum = maxVal + log(accum); - - return (accum); -} - -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "NEMath.h" -float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize) -{ - float32_t maxVal; - float32_t tmp; - float32x4_t tmpV, tmpVb; - float32x4_t maxValV; - uint32x4_t idxV; - float32x4_t accumV; - float32x2_t accumV2; - - const float32_t *pIn; - uint32_t blkCnt; - float32_t accum; - - pIn = in; - - blkCnt = blockSize; - - if (blockSize <= 3) - { - maxVal = *pIn++; - blkCnt--; - - while(blkCnt > 0) - { - tmp = *pIn++; - - if (tmp > maxVal) - { - maxVal = tmp; - } - blkCnt--; - } - } - else - { - maxValV = vld1q_f32(pIn); - pIn += 4; - blkCnt = (blockSize - 4) >> 2; - - while(blkCnt > 0) - { - tmpVb = vld1q_f32(pIn); - pIn += 4; - - idxV = vcgtq_f32(tmpVb, maxValV); - maxValV = vbslq_f32(idxV, tmpVb, maxValV ); - - blkCnt--; - } - - accumV2 = vpmax_f32(vget_low_f32(maxValV),vget_high_f32(maxValV)); - accumV2 = vpmax_f32(accumV2,accumV2); - maxVal = vget_lane_f32(accumV2, 0) ; - - blkCnt = (blockSize - 4) & 3; - - while(blkCnt > 0) - { - tmp = *pIn++; - - if (tmp > maxVal) - { - maxVal = tmp; - } - blkCnt--; - } - - } - - - - maxValV = vdupq_n_f32(maxVal); - pIn = in; - accum = 0; - accumV = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - - while(blkCnt > 0) - { - tmpV = vld1q_f32(pIn); - pIn += 4; - tmpV = vsubq_f32(tmpV, maxValV); - tmpV = vexpq_f32(tmpV); - accumV = vaddq_f32(accumV, tmpV); - - blkCnt--; - - } - accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV)); - accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); - - blkCnt = blockSize & 0x3; - while(blkCnt > 0) - { - tmp = *pIn++; - accum += expf(tmp - maxVal); - blkCnt--; - - } - - accum = maxVal + logf(accum); - - return(accum); -} -#else -float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize) -{ - float32_t maxVal; - float32_t tmp; - const float32_t *pIn; - uint32_t blkCnt; - float32_t accum; - - pIn = in; - blkCnt = blockSize; - - maxVal = *pIn++; - blkCnt--; - - while(blkCnt > 0) - { - tmp = *pIn++; - - if (tmp > maxVal) - { - maxVal = tmp; - } - blkCnt--; - - } - - blkCnt = blockSize; - pIn = in; - accum = 0; - while(blkCnt > 0) - { - tmp = *pIn++; - accum += expf(tmp - maxVal); - blkCnt--; - - } - accum = maxVal + logf(accum); - - return(accum); -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of LogSumExp group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f16.c deleted file mode 100644 index 958baf3..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f16.c +++ /dev/null @@ -1,246 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_f16.c - * Description: Maximum value of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - -/** - @ingroup groupStats - */ - - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_max_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex) -{ - int32_t blkCnt; - f16x8_t vecSrc; - f16x8_t curExtremValVec = vdupq_n_f16(F16_MIN); - float16_t maxValue = F16_MIN; - uint32_t idx = blockSize; - uint16x8_t indexVec; - uint16x8_t curExtremIdxVec; - uint32_t curIdx = 0; - mve_pred16_t p0; - float16_t tmp; - - - indexVec = vidupq_wb_u16(&curIdx, 1); - curExtremIdxVec = vdupq_n_u16(0); - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - vecSrc = vldrhq_f16(pSrc); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = vidupq_wb_u16(&curIdx, 1); - - pSrc += 8; - /* Decrement the loop counter */ - blkCnt--; - } - - - /* - * Get max value across the vector - */ - maxValue = vmaxnmvq(maxValue, curExtremValVec); - /* - * set index for lower values to max possible index - */ - p0 = vcmpgeq(curExtremValVec, maxValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0); - /* - * Get min index which is thus for a max value - */ - idx = vminvq(idx, indexVec); - - /* Tail */ - blkCnt = blockSize & 7; - - while (blkCnt > 0) - { - /* Initialize tmp to the next consecutive values one by one */ - tmp = *pSrc++; - - /* compare for the maximum value */ - if (maxValue < tmp) - { - /* Update the maximum value and it's index */ - maxValue = tmp; - idx = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* - * Save result - */ - *pIndex = idx; - *pResult = maxValue; -} - -#else -void arm_max_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex) -{ - float16_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32_t index; /* index of maximum value */ -#endif - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - /* Initialise index of maximum value. */ - index = 0U; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize - 1U) >> 2U; - - while (blkCnt > 0U) - { - /* Initialize maxVal to next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = index + 1U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 2U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 3U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 4U; - } - - index += 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize - 1U) % 4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Max group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c deleted file mode 100644 index 80eb21e..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c +++ /dev/null @@ -1,365 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_f32.c - * Description: Maximum value of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - -/** - @ingroup groupStats - */ - -/** - @defgroup Max Maximum - - Computes the maximum value of an array of data. - The function returns both the maximum value and its position within the array. - There are separate functions for floating-point, Q31, Q15, and Q7 data types. - */ - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_max_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - uint32_t blkCnt; - f32x4_t vecSrc; - f32x4_t curExtremValVec = vdupq_n_f32(F32_MIN); - float32_t maxValue = F32_MIN; - uint32_t idx = blockSize; - uint32x4_t indexVec; - uint32x4_t curExtremIdxVec; - uint32_t curIdx = 0; - mve_pred16_t p0; - float32_t tmp; - - - indexVec = vidupq_wb_u32(&curIdx, 1); - curExtremIdxVec = vdupq_n_u32(0); - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - vecSrc = vldrwq_f32(pSrc); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = vidupq_wb_u32(&curIdx, 1); - - pSrc += 4; - /* Decrement the loop counter */ - blkCnt--; - } - - - /* - * Get max value across the vector - */ - maxValue = vmaxnmvq(maxValue, curExtremValVec); - /* - * set index for lower values to max possible index - */ - p0 = vcmpgeq(curExtremValVec, maxValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0); - /* - * Get min index which is thus for a max value - */ - idx = vminvq(idx, indexVec); - - /* Tail */ - blkCnt = blockSize & 0x3; - - while (blkCnt > 0U) - { - /* Initialize tmp to the next consecutive values one by one */ - tmp = *pSrc++; - - /* compare for the maximum value */ - if (maxValue < tmp) - { - /* Update the maximum value and it's index */ - maxValue = tmp; - idx = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* - * Save result - */ - *pIndex = idx; - *pResult = maxValue; -} - -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_max_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - float32_t maxVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* loop counter */ - - float32x4_t outV, srcV; - float32x2_t outV2; - - uint32x4_t idxV; - uint32x4_t maxIdx; - static const uint32_t indexInit[4]={4,5,6,7}; - static const uint32_t countVInit[4]={0,1,2,3}; - - uint32x4_t index; - uint32x4_t delta; - uint32x4_t countV; - uint32x2_t countV2; - - maxIdx = vdupq_n_u32(ULONG_MAX); - delta = vdupq_n_u32(4); - index = vld1q_u32(indexInit); - countV = vld1q_u32(countVInit); - - - /* Initialise the index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparison */ - if (blockSize <= 3) - { - out = *pSrc++; - - blkCnt = blockSize - 1; - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal1) - { - /* Update the maximum value and it's index */ - out = maxVal1; - outIndex = blockSize - blkCnt; - } - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - outV = vld1q_f32(pSrc); - pSrc += 4; - - /* Compute 4 outputs at a time */ - blkCnt = (blockSize - 4 ) >> 2U; - - while (blkCnt > 0U) - { - srcV = vld1q_f32(pSrc); - pSrc += 4; - - idxV = vcgtq_f32(srcV, outV); - outV = vbslq_f32(idxV, srcV, outV ); - countV = vbslq_u32(idxV, index,countV ); - - index = vaddq_u32(index,delta); - - /* Decrement the loop counter */ - blkCnt--; - } - - outV2 = vpmax_f32(vget_low_f32(outV),vget_high_f32(outV)); - outV2 = vpmax_f32(outV2,outV2); - out = vget_lane_f32(outV2, 0); - - idxV = vceqq_f32(outV, vdupq_n_f32(out)); - countV = vbslq_u32(idxV, countV,maxIdx); - - countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV)); - countV2 = vpmin_u32(countV2,countV2); - outIndex = vget_lane_u32(countV2,0); - - /* if (blockSize - 1U) is not multiple of 4 */ - blkCnt = (blockSize - 4 ) % 4U; - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal1) - { - /* Update the maximum value and it's index */ - out = maxVal1; - outIndex = blockSize - blkCnt ; - } - - /* Decrement the loop counter */ - blkCnt--; - } - - - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#else -void arm_max_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - float32_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32_t index; /* index of maximum value */ -#endif - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - /* Initialise index of maximum value. */ - index = 0U; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize - 1U) >> 2U; - - while (blkCnt > 0U) - { - /* Initialize maxVal to next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = index + 1U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 2U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 3U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 4U; - } - - index += 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize - 1U) % 4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Max group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f64.c deleted file mode 100644 index ded2a01..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f64.c +++ /dev/null @@ -1,90 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_f64.c - * Description: Maximum value of a floating-point vector - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ -void arm_max_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult, - uint32_t * pIndex) -{ - float64_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -/** - @} end of Max group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f16.c deleted file mode 100644 index 4958e08..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f16.c +++ /dev/null @@ -1,144 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_no_idx_f16.c - * Description: Maximum value of a floating-point vector without returning the index - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - -/** - @ingroup groupStats - */ - - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_max_no_idx_f16( - const float16_t *pSrc, - uint32_t blockSize, - float16_t *pResult) -{ - f16x8_t vecSrc; - f16x8_t curExtremValVec = vdupq_n_f16(F16_MIN); - float16_t maxValue = F16_MIN; - float16_t newVal; - uint32_t blkCnt; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - - vecSrc = vldrhq_f16(pSrc); - /* - * update per-lane max. - */ - curExtremValVec = vmaxnmq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 8; - blkCnt --; - } - /* - * Get max value across the vector - */ - maxValue = vmaxnmvq(maxValue, curExtremValVec); - - blkCnt = blockSize & 7; - - while (blkCnt > 0U) - { - newVal = *pSrc++; - - /* compare for the maximum value */ - if (maxValue < newVal) - { - /* Update the maximum value and it's index */ - maxValue = newVal; - } - - blkCnt --; - } - - *pResult = maxValue; -} - -#else - -void arm_max_no_idx_f16( - const float16_t *pSrc, - uint32_t blockSize, - float16_t *pResult) -{ - float16_t maxValue = F16_MIN; - float16_t newVal; - - while (blockSize > 0U) - { - newVal = *pSrc++; - - /* compare for the maximum value */ - if (maxValue < newVal) - { - /* Update the maximum value and it's index */ - maxValue = newVal; - } - - blockSize --; - } - - *pResult = maxValue; -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Max group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c deleted file mode 100644 index eb3d3a0..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c +++ /dev/null @@ -1,138 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_no_idx_f32.c - * Description: Maximum value of a floating-point vector without returning the index - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - -/** - @ingroup groupStats - */ - - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_max_no_idx_f32( - const float32_t *pSrc, - uint32_t blockSize, - float32_t *pResult) -{ - f32x4_t vecSrc; - f32x4_t curExtremValVec = vdupq_n_f32(F32_MIN); - float32_t maxValue = F32_MIN; - float32_t newVal; - uint32_t blkCnt; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - - vecSrc = vldrwq_f32(pSrc); - /* - * update per-lane max. - */ - curExtremValVec = vmaxnmq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 4; - blkCnt --; - } - /* - * Get max value across the vector - */ - maxValue = vmaxnmvq(maxValue, curExtremValVec); - - blkCnt = blockSize & 3; - - while (blkCnt > 0U) - { - newVal = *pSrc++; - - /* compare for the maximum value */ - if (maxValue < newVal) - { - /* Update the maximum value and it's index */ - maxValue = newVal; - } - - blkCnt --; - } - - *pResult = maxValue; -} - -#else - -void arm_max_no_idx_f32( - const float32_t *pSrc, - uint32_t blockSize, - float32_t *pResult) -{ - float32_t maxValue = F32_MIN; - float32_t newVal; - - while (blockSize > 0U) - { - newVal = *pSrc++; - - /* compare for the maximum value */ - if (maxValue < newVal) - { - /* Update the maximum value and it's index */ - maxValue = newVal; - } - - blockSize --; - } - - *pResult = maxValue; -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Max group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f64.c deleted file mode 100644 index 9b4c5b6..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f64.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_no_idx_f64.c - * Description: Maximum value of a floating-point vector without returning the index - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ -void arm_max_no_idx_f64( - const float64_t *pSrc, - uint32_t blockSize, - float64_t *pResult) -{ - float64_t maxValue = F64_MIN; - float64_t newVal; - - while (blockSize > 0U) - { - newVal = *pSrc++; - - /* compare for the maximum value */ - if (maxValue < newVal) - { - /* Update the maximum value and it's index */ - maxValue = newVal; - } - - blockSize --; - } - - *pResult = maxValue; -} - -/** - @} end of Max group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q15.c deleted file mode 100644 index 8198e4d..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q15.c +++ /dev/null @@ -1,142 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_no_idx_q15.c - * Description: Maximum value of a q15 vector without returning the index - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - - -/** - @ingroup groupStats - */ - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a q15 vector without index. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_max_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - q15_t const *pSrcVec; - q15x8_t curExtremValVec = vdupq_n_s16(Q15_MIN); - q15_t maxValue = Q15_MIN; - mve_pred16_t p0; - - - pSrcVec = (q15_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - /* - * update per-lane max. - */ - curExtremValVec = vmaxq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - p0 = vctp16q(blkCnt); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - curExtremValVec = vmaxq_m(curExtremValVec, vecSrc, curExtremValVec, p0); - } - /* - * Get max value across the vector - */ - maxValue = vmaxvq(maxValue, curExtremValVec); - *pResult = maxValue; -} - -#else -void arm_max_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q15_t maxVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* loop counter */ - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1U); - - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal1) - { - /* Update the maximum value */ - out = maxVal1; - } - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the maximum value into destination pointer */ - *pResult = out; -} - -#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of Max group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q31.c deleted file mode 100644 index cbb3b32..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q31.c +++ /dev/null @@ -1,142 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_no_idx_q31.c - * Description: Maximum value of a q31 vector without returning the index - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - - -/** - @ingroup groupStats - */ - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a q31 vector without index. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_max_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - q31_t const *pSrcVec; - q31x4_t curExtremValVec = vdupq_n_s32(Q31_MIN); - q31_t maxValue = Q31_MIN; - mve_pred16_t p0; - - - pSrcVec = (q31_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0) - { - vecSrc = vldrwq_s32(pSrcVec); - pSrcVec += 4; - /* - * update per-lane max. - */ - curExtremValVec = vmaxq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0) - { - vecSrc = vldrwq_s32(pSrcVec); - pSrcVec += 4; - p0 = vctp32q(blkCnt); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - curExtremValVec = vmaxq_m(curExtremValVec, vecSrc, curExtremValVec, p0); - } - /* - * Get max value across the vector - */ - maxValue = vmaxvq(maxValue, curExtremValVec); - *pResult = maxValue; -} - -#else -void arm_max_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q31_t maxVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* loop counter */ - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1U); - - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal1) - { - /* Update the maximum value */ - out = maxVal1; - } - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the maximum value into destination pointer */ - *pResult = out; -} - -#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of Max group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q7.c deleted file mode 100644 index 5dcb40b..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q7.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_no_idx_q7.c - * Description: Maximum value of a q7 vector without returning the index - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - - -/** - @ingroup groupStats - */ - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a q7 vector without index. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_max_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q7_t const *pSrcVec; - q7x16_t curExtremValVec = vdupq_n_s8(Q7_MIN); - q7_t maxValue = Q7_MIN; - mve_pred16_t p0; - - - pSrcVec = (q7_t const *) pSrc; - blkCnt = blockSize >> 4; - while (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 16; - /* - * update per-lane max. - */ - curExtremValVec = vmaxq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 16; - p0 = vctp8q(blkCnt); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - curExtremValVec = vmaxq_m(curExtremValVec, vecSrc, curExtremValVec, p0); - } - /* - * Get max value across the vector - */ - maxValue = vmaxvq(maxValue, curExtremValVec); - *pResult = maxValue; -} - -#else - -void arm_max_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - q7_t maxVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* loop counter */ - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1U); - - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal1) - { - /* Update the maximum value */ - out = maxVal1; - } - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the maximum value into destination pointer */ - *pResult = out; -} - -#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of Max group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c deleted file mode 100644 index c23523d..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c +++ /dev/null @@ -1,201 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_q15.c - * Description: Maximum value of a Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_max_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ - int32_t blkCnt; /* loop counters */ - q15x8_t extremValVec = vdupq_n_s16(Q15_MIN); - q15_t maxValue = Q15_MIN; - uint16x8_t indexVec; - uint16x8_t extremIdxVec; - mve_pred16_t p0; - uint16_t extremIdxArr[8]; - - indexVec = vidupq_u16(0U, 1); - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp16q(blkCnt); - q15x8_t extremIdxVal = vld1q_z_s16(pSrc, p); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq_m(extremIdxVal, extremValVec, p); - - extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0); - /* store per-lane extrema indexes */ - vst1q_p_u16(extremIdxArr, indexVec, p0); - - indexVec += 8; - pSrc += 8; - blkCnt -= 8; - } - while (blkCnt > 0); - - - /* Get max value across the vector */ - maxValue = vmaxvq(maxValue, extremValVec); - - /* set index for lower values to max possible index */ - p0 = vcmpgeq(extremValVec, maxValue); - extremIdxVec = vld1q_u16(extremIdxArr); - - indexVec = vpselq(extremIdxVec, vdupq_n_u16(blockSize - 1), p0); - *pIndex = vminvq(blockSize - 1, indexVec); - *pResult = maxValue; -} - -#else -void arm_max_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ - q15_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - uint32_t index; /* index of maximum value */ -#endif - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#if defined (ARM_MATH_LOOPUNROLL) - /* Initialise index of maximum value. */ - index = 0U; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize - 1U) >> 2U; - - while (blkCnt > 0U) - { - /* Initialize maxVal to next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = index + 1U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 2U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 3U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 4U; - } - - index += 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize - 1U) % 4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_MVEI) */ -/** - @} end of Max group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c deleted file mode 100644 index 68044f7..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c +++ /dev/null @@ -1,202 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_q31.c - * Description: Maximum value of a Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_max_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ - int32_t blkCnt; /* loop counters */ - q31x4_t extremValVec = vdupq_n_s32(Q31_MIN); - q31_t maxValue = Q31_MIN; - uint32x4_t indexVec; - uint32x4_t extremIdxVec; - mve_pred16_t p0; - uint32_t extremIdxArr[4]; - - indexVec = vidupq_u32(0U, 1); - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp32q(blkCnt); - q31x4_t extremIdxVal = vld1q_z_s32(pSrc, p); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq_m(extremIdxVal, extremValVec, p); - - extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0); - /* store per-lane extrema indexes */ - vst1q_p_u32(extremIdxArr, indexVec, p0); - - indexVec += 4; - pSrc += 4; - blkCnt -= 4; - } - while (blkCnt > 0); - - - /* Get max value across the vector */ - maxValue = vmaxvq(maxValue, extremValVec); - - /* set index for lower values to max possible index */ - p0 = vcmpgeq(extremValVec, maxValue); - extremIdxVec = vld1q_u32(extremIdxArr); - - indexVec = vpselq(extremIdxVec, vdupq_n_u32(blockSize - 1), p0); - *pIndex = vminvq(blockSize - 1, indexVec); - *pResult = maxValue; -} - -#else -void arm_max_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ - q31_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - uint32_t index; /* index of maximum value */ -#endif - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#if defined (ARM_MATH_LOOPUNROLL) - /* Initialise index of maximum value. */ - index = 0U; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize - 1U) >> 2U; - - while (blkCnt > 0U) - { - /* Initialize maxVal to next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = index + 1U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 2U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 3U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 4U; - } - - index += 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize - 1U) % 4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Max group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c deleted file mode 100644 index b20729a..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c +++ /dev/null @@ -1,256 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_max_q7.c - * Description: Maximum value of a Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup Max - @{ - */ - -/** - @brief Maximum value of a Q7 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult maximum value returned here - @param[out] pIndex index of maximum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -static void arm_small_blk_max_q7( - const q7_t * pSrc, - uint16_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - int32_t blkCnt; /* loop counters */ - q7x16_t extremValVec = vdupq_n_s8(Q7_MIN); - q7_t maxValue = Q7_MIN; - uint8x16_t indexVec; - uint8x16_t extremIdxVec; - mve_pred16_t p0; - uint8_t extremIdxArr[16]; - - indexVec = vidupq_u8(0U, 1); - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp8q(blkCnt); - q7x16_t extremIdxVal = vld1q_z_s8(pSrc, p); - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpgeq_m(extremIdxVal, extremValVec, p); - - extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0); - /* store per-lane extrema indexes */ - vst1q_p_u8(extremIdxArr, indexVec, p0); - - indexVec += 16; - pSrc += 16; - blkCnt -= 16; - } - while (blkCnt > 0); - - - /* Get max value across the vector */ - maxValue = vmaxvq(maxValue, extremValVec); - - /* set index for lower values to max possible index */ - p0 = vcmpgeq(extremValVec, maxValue); - extremIdxVec = vld1q_u8(extremIdxArr); - - indexVec = vpselq(extremIdxVec, vdupq_n_u8(blockSize - 1), p0); - *pIndex = vminvq_u8(blockSize - 1, indexVec); - *pResult = maxValue; -} - -void arm_max_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - int32_t totalSize = blockSize; - const uint16_t sub_blk_sz = UINT8_MAX + 1; - - if (totalSize <= sub_blk_sz) - { - arm_small_blk_max_q7(pSrc, blockSize, pResult, pIndex); - } - else - { - uint32_t curIdx = 0; - q7_t curBlkExtr = Q7_MIN; - uint32_t curBlkPos = 0; - uint32_t curBlkIdx = 0; - /* - * process blocks of 255 elts - */ - while (totalSize >= sub_blk_sz) - { - const q7_t *curSrc = pSrc; - - arm_small_blk_max_q7(curSrc, sub_blk_sz, pResult, pIndex); - if (*pResult > curBlkExtr) - { - /* - * update partial extrema - */ - curBlkExtr = *pResult; - curBlkPos = *pIndex; - curBlkIdx = curIdx; - } - curIdx++; - pSrc += sub_blk_sz; - totalSize -= sub_blk_sz; - } - /* - * remainder - */ - arm_small_blk_max_q7(pSrc, totalSize, pResult, pIndex); - if (*pResult > curBlkExtr) - { - curBlkExtr = *pResult; - curBlkPos = *pIndex; - curBlkIdx = curIdx; - } - *pIndex = curBlkIdx * sub_blk_sz + curBlkPos; - *pResult = curBlkExtr; - } -} -#else -void arm_max_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - q7_t maxVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - uint32_t index; /* index of maximum value */ -#endif - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#if defined (ARM_MATH_LOOPUNROLL) - /* Initialise index of maximum value. */ - index = 0U; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize - 1U) >> 2U; - - while (blkCnt > 0U) - { - /* Initialize maxVal to next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = index + 1U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 2U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 3U; - } - - maxVal = *pSrc++; - if (out < maxVal) - { - out = maxVal; - outIndex = index + 4U; - } - - index += 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize - 1U) % 4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal = *pSrc++; - - /* compare for the maximum value */ - if (out < maxVal) - { - /* Update the maximum value and it's index */ - out = maxVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Max group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f16.c deleted file mode 100644 index 07bf072..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f16.c +++ /dev/null @@ -1,152 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mean_f16.c - * Description: Mean value of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupStats - */ - -/** - @defgroup mean Mean - - Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector. - The underlying algorithm is used: - - 
-      Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
-
- - There are separate functions for floating-point, Q31, Q15, and Q7 data types. - */ - -/** - @addtogroup mean - @{ - */ - -/** - @brief Mean value of a floating-point vector. - @param[in] pSrc points to the input vector. - @param[in] blockSize number of samples in input vector. - @param[out] pResult mean value returned here. - @return none - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mean_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - f16x8_t vecSrc; - f16x8_t sumVec = vdupq_n_f16(0.0f16); - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp16q(blkCnt); - - vecSrc = vldrhq_z_f16((float16_t const *) pSrc, p); - sumVec = vaddq_m_f16(sumVec, sumVec, vecSrc, p); - - blkCnt -= 8; - pSrc += 8; - } - while (blkCnt > 0); - - *pResult = vecAddAcrossF16Mve(sumVec) / (float16_t) blockSize; -} - - -#else - -void arm_mean_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - float16_t sum = 0.0f; /* Temporary result storage */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - sum += *pSrc++; - - sum += *pSrc++; - - sum += *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store result to destination */ - *pResult = (sum / (float16_t)blockSize); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of mean group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c deleted file mode 100644 index ff26c56..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c +++ /dev/null @@ -1,198 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mean_f32.c - * Description: Mean value of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup mean - @{ - */ - -/** - @brief Mean value of a floating-point vector. - @param[in] pSrc points to the input vector. - @param[in] blockSize number of samples in input vector. - @param[out] pResult mean value returned here. - @return none - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_mean_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - f32x4_t vecSrc; - f32x4_t sumVec = vdupq_n_f32(0.0f); - float32_t sum = 0.0f; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - vecSrc = vldrwq_f32(pSrc); - sumVec = vaddq_f32(sumVec, vecSrc); - - blkCnt --; - pSrc += 4; - } - - sum = vecAddAcrossF32Mve(sumVec); - - /* Tail */ - blkCnt = blockSize & 0x3; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - *pResult = sum / (float32_t) blockSize; -} - - -#else -#if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_mean_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t sum = 0.0f; /* Temporary result storage */ - float32x4_t sumV = vdupq_n_f32(0.0f); /* Temporary result storage */ - float32x2_t sumV2; - - uint32_t blkCnt; /* Loop counter */ - - float32x4_t inV; - - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - inV = vld1q_f32(pSrc); - sumV = vaddq_f32(sumV, inV); - - pSrc += 4; - /* Decrement the loop counter */ - blkCnt--; - } - - sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); - sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1); - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize & 3; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store the result to the destination */ - *pResult = sum / (float32_t) blockSize; -} -#else -void arm_mean_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - float32_t sum = 0.0f; /* Temporary result storage */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - sum += *pSrc++; - - sum += *pSrc++; - - sum += *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store result to destination */ - *pResult = (sum / blockSize); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of mean group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f64.c deleted file mode 100644 index c238505..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f64.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mean_f64.c - * Description: Mean value of a floating-point vector - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup mean - @{ - */ - -/** - @brief Mean value of a floating-point vector. - @param[in] pSrc points to the input vector. - @param[in] blockSize number of samples in input vector. - @param[out] pResult mean value returned here. - @return none - */ -void arm_mean_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - float64_t sum = 0.; /* Temporary result storage */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store result to destination */ - *pResult = (sum / blockSize); -} - -/** - @} end of mean group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c deleted file mode 100644 index 1a12a84..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c +++ /dev/null @@ -1,156 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mean_q15.c - * Description: Mean value of a Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup mean - @{ - */ - -/** - @brief Mean value of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 32-bit internal accumulator. - The input is represented in 1.15 format and is accumulated in a 32-bit - accumulator in 17.15 format. - There is no risk of internal overflow with this approach, and the - full precision of intermediate result is preserved. - Finally, the accumulator is truncated to yield a result of 1.15 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_mean_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - q31_t sum = 0L; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3U; - while (blkCnt > 0U) - { - vecSrc = vldrhq_s16(pSrc); - /* - * sum lanes - */ - sum = vaddvaq(sum, vecSrc); - - blkCnt--; - pSrc += 8; - } - - /* Tail */ - blkCnt = blockSize & 0x7; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store the result to the destination */ - *pResult = (q15_t) (sum / (int32_t) blockSize); -} -#else -void arm_mean_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t sum = 0; /* Temporary result storage */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t in; -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - in = read_q15x2_ia ((q15_t **) &pSrc); - sum += ((in << 16U) >> 16U); - sum += (in >> 16U); - - in = read_q15x2_ia ((q15_t **) &pSrc); - sum += ((in << 16U) >> 16U); - sum += (in >> 16U); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store result to destination */ - *pResult = (q15_t) (sum / (int32_t) blockSize); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of mean group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c deleted file mode 100644 index 99fbaaf..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mean_q31.c - * Description: Mean value of a Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup mean - @{ - */ - -/** - @brief Mean value of a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - The input is represented in 1.31 format and is accumulated in a 64-bit - accumulator in 33.31 format. - There is no risk of internal overflow with this approach, and the - full precision of intermediate result is preserved. - Finally, the accumulator is truncated to yield a result of 1.31 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_mean_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - q63_t sum = 0LL; - - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - - vecSrc = vldrwq_s32(pSrc); - /* - * sum lanes - */ - sum = vaddlvaq(sum, vecSrc); - - blkCnt --; - pSrc += 4; - } - - /* Tail */ - blkCnt = blockSize & 0x3; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - blkCnt --; - } - - *pResult = arm_div_q63_to_q31(sum, blockSize); -} -#else -void arm_mean_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t sum = 0; /* Temporary result storage */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - sum += *pSrc++; - - sum += *pSrc++; - - sum += *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store result to destination */ - *pResult = (q31_t) (sum / blockSize); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of mean group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c deleted file mode 100644 index cbac132..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c +++ /dev/null @@ -1,153 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mean_q7.c - * Description: Mean value of a Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup mean - @{ - */ - -/** - @brief Mean value of a Q7 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 32-bit internal accumulator. - The input is represented in 1.7 format and is accumulated in a 32-bit - accumulator in 25.7 format. - There is no risk of internal overflow with this approach, and the - full precision of intermediate result is preserved. - Finally, the accumulator is truncated to yield a result of 1.7 format. - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_mean_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q31_t sum = 0L; - - - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - vecSrc = vldrbq_s8(pSrc); - /* - * sum lanes - */ - sum = vaddvaq(sum, vecSrc); - - blkCnt--; - pSrc += 16; - } - - blkCnt = blockSize & 0xF; - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store the result to the destination */ - *pResult = (q7_t) (sum / (int32_t) blockSize); -} -#else -void arm_mean_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t sum = 0; /* Temporary result storage */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t in; -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - in = read_q7x4_ia ((q7_t **) &pSrc); - sum += ((in << 24U) >> 24U); - sum += ((in << 16U) >> 24U); - sum += ((in << 8U) >> 24U); - sum += (in >> 24U); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - sum += *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - /* Store result to destination */ - *pResult = (q7_t) (sum / (int32_t) blockSize); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of mean group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f16.c deleted file mode 100644 index b8297ec..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f16.c +++ /dev/null @@ -1,240 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_f16.c - * Description: Minimum value of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - - -/** - @ingroup groupStats - */ - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_min_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex) -{ - int32_t blkCnt; /* loop counters */ - f16x8_t vecSrc; - float16_t const *pSrcVec; - f16x8_t curExtremValVec = vdupq_n_f16(F16_MAX); - float16_t minValue = F16_MAX; - uint32_t idx = blockSize; - uint16x8_t indexVec; - uint16x8_t curExtremIdxVec; - mve_pred16_t p0; - - indexVec = vidupq_u16((uint32_t)0, 1); - curExtremIdxVec = vdupq_n_u16(0); - - pSrcVec = (float16_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - vecSrc = vldrhq_f16(pSrcVec); pSrcVec += 8; - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = indexVec + 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0) - { - vecSrc = vldrhq_f16(pSrcVec); pSrcVec += 8; - p0 = vctp16q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq_m(vecSrc, curExtremValVec, p0); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - } - /* - * Get min value across the vector - */ - minValue = vminnmvq(minValue, curExtremValVec); - /* - * set index for lower values to min possible index - */ - p0 = vcmpleq(curExtremValVec, minValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0); - /* - * Get min index which is thus for a min value - */ - idx = vminvq(idx, indexVec); - /* - * Save result - */ - *pIndex = idx; - *pResult = minValue; -} - -#else - -void arm_min_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult, - uint32_t * pIndex) -{ - float16_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32_t index; /* index of maximum value */ -#endif - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - /* Initialise index of maximum value. */ - index = 0U; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize - 1U) >> 2U; - - while (blkCnt > 0U) - { - /* Initialize minVal to next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = index + 1U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 2U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 3U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 4U; - } - - index += 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize - 1U) % 4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Min group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c deleted file mode 100644 index 8de17b7..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c +++ /dev/null @@ -1,363 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_f32.c - * Description: Minimum value of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - - -/** - @ingroup groupStats - */ - -/** - @defgroup Min Minimum - - Computes the minimum value of an array of data. - The function returns both the minimum value and its position within the array. - There are separate functions for floating-point, Q31, Q15, and Q7 data types. - */ - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_min_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - uint32_t blkCnt; /* loop counters */ - f32x4_t vecSrc; - float32_t const *pSrcVec; - f32x4_t curExtremValVec = vdupq_n_f32(F32_MAX); - float32_t minValue = F32_MAX; - uint32_t idx = blockSize; - uint32x4_t indexVec; - uint32x4_t curExtremIdxVec; - float32_t tmp; - mve_pred16_t p0; - - indexVec = vidupq_u32((uint32_t)0, 1); - curExtremIdxVec = vdupq_n_u32(0); - - pSrcVec = (float32_t const *) pSrc; - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - vecSrc = vldrwq_f32(pSrcVec); - pSrcVec += 4; - /* - * Get current max per lane and current index per lane - * when a max is selected - */ - p0 = vcmpleq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = indexVec + 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* - * Get min value across the vector - */ - minValue = vminnmvq(minValue, curExtremValVec); - /* - * set index for lower values to max possible index - */ - p0 = vcmpleq(curExtremValVec, minValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0); - /* - * Get min index which is thus for a max value - */ - idx = vminvq(idx, indexVec); - - /* - * tail - */ - blkCnt = blockSize & 0x3; - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - tmp = *pSrc++; - - /* compare for the minimum value */ - if (minValue > tmp) - { - /* Update the minimum value and it's index */ - minValue = tmp; - idx = blockSize - blkCnt; - } - blkCnt--; - } - /* - * Save result - */ - *pIndex = idx; - *pResult = minValue; -} - -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_min_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - float32_t maxVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* loop counter */ - - float32x4_t outV, srcV; - float32x2_t outV2; - - uint32x4_t idxV; - static const uint32_t indexInit[4]={4,5,6,7}; - static const uint32_t countVInit[4]={0,1,2,3}; - uint32x4_t maxIdx; - uint32x4_t index; - uint32x4_t delta; - uint32x4_t countV; - uint32x2_t countV2; - - maxIdx = vdupq_n_u32(ULONG_MAX); - delta = vdupq_n_u32(4); - index = vld1q_u32(indexInit); - countV = vld1q_u32(countVInit); - - /* Initialise the index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparison */ - if (blockSize <= 3) - { - out = *pSrc++; - - blkCnt = blockSize - 1; - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if (out > maxVal1) - { - /* Update the maximum value and it's index */ - out = maxVal1; - outIndex = blockSize - blkCnt; - } - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - outV = vld1q_f32(pSrc); - pSrc += 4; - - /* Compute 4 outputs at a time */ - blkCnt = (blockSize - 4 ) >> 2U; - - while (blkCnt > 0U) - { - srcV = vld1q_f32(pSrc); - pSrc += 4; - - idxV = vcltq_f32(srcV, outV); - outV = vbslq_f32(idxV, srcV, outV ); - countV = vbslq_u32(idxV, index,countV ); - - index = vaddq_u32(index,delta); - - /* Decrement the loop counter */ - blkCnt--; - } - - outV2 = vpmin_f32(vget_low_f32(outV),vget_high_f32(outV)); - outV2 = vpmin_f32(outV2,outV2); - out = vget_lane_f32(outV2,0); - - idxV = vceqq_f32(outV, vdupq_n_f32(out)); - countV = vbslq_u32(idxV, countV,maxIdx); - - countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV)); - countV2 = vpmin_u32(countV2,countV2); - outIndex = vget_lane_u32(countV2,0); - - /* if (blockSize - 1U) is not multiple of 4 */ - blkCnt = (blockSize - 4 ) % 4U; - - while (blkCnt > 0U) - { - /* Initialize maxVal to the next consecutive values one by one */ - maxVal1 = *pSrc++; - - /* compare for the maximum value */ - if (out > maxVal1) - { - /* Update the maximum value and it's index */ - out = maxVal1; - outIndex = blockSize - blkCnt ; - } - - /* Decrement the loop counter */ - blkCnt--; - } - } - - /* Store the maximum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#else -void arm_min_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex) -{ - float32_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - uint32_t index; /* index of maximum value */ -#endif - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - /* Initialise index of maximum value. */ - index = 0U; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize - 1U) >> 2U; - - while (blkCnt > 0U) - { - /* Initialize minVal to next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = index + 1U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 2U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 3U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 4U; - } - - index += 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize - 1U) % 4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Min group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f64.c deleted file mode 100644 index 63db0c5..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f64.c +++ /dev/null @@ -1,90 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_f64.c - * Description: Minimum value of a floating-point vector - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ -void arm_min_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult, - uint32_t * pIndex) -{ - float64_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - - /* Initialise index value to zero. */ - outIndex = 0U; - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} - -/** - @} end of Min group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f16.c deleted file mode 100644 index 83dd97e..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f16.c +++ /dev/null @@ -1,144 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_no_idx_f16.c - * Description: Minimum value of a floating-point vector without returning the index - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - -/** - @ingroup groupStats - */ - - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_min_no_idx_f16( - const float16_t *pSrc, - uint32_t blockSize, - float16_t *pResult) -{ - f16x8_t vecSrc; - f16x8_t curExtremValVec = vdupq_n_f16(F16_MAX); - float16_t minValue = F16_MAX; - float16_t newVal; - uint32_t blkCnt; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 3U; - - while (blkCnt > 0U) - { - - vecSrc = vldrhq_f16(pSrc); - /* - * update per-lane min. - */ - curExtremValVec = vminnmq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 8; - blkCnt --; - } - /* - * Get min value across the vector - */ - minValue = vminnmvq(minValue, curExtremValVec); - - blkCnt = blockSize & 7; - - while (blkCnt > 0U) - { - newVal = *pSrc++; - - /* compare for the minimum value */ - if ((_Float16)minValue > (_Float16)newVal) - { - /* Update the minimum value and it's index */ - minValue = newVal; - } - - blkCnt --; - } - - *pResult = minValue; -} - -#else - -void arm_min_no_idx_f16( - const float16_t *pSrc, - uint32_t blockSize, - float16_t *pResult) -{ - float16_t minValue = F16_MAX; - float16_t newVal; - - while (blockSize > 0U) - { - newVal = *pSrc++; - - /* compare for the minimum value */ - if ((_Float16)minValue > (_Float16)newVal) - { - /* Update the minimum value and it's index */ - minValue = newVal; - } - - blockSize --; - } - - *pResult = minValue; -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Min group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f32.c deleted file mode 100644 index 6df8425..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f32.c +++ /dev/null @@ -1,138 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_no_idx_f32.c - * Description: Minimum value of a floating-point vector without returning the index - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" -#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) -#include -#endif - -/** - @ingroup groupStats - */ - - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_min_no_idx_f32( - const float32_t *pSrc, - uint32_t blockSize, - float32_t *pResult) -{ - f32x4_t vecSrc; - f32x4_t curExtremValVec = vdupq_n_f32(F32_MAX); - float32_t minValue = F32_MAX; - float32_t newVal; - uint32_t blkCnt; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - - vecSrc = vldrwq_f32(pSrc); - /* - * update per-lane min. - */ - curExtremValVec = vminnmq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 4; - blkCnt --; - } - /* - * Get min value across the vector - */ - minValue = vminnmvq(minValue, curExtremValVec); - - blkCnt = blockSize & 3; - - while (blkCnt > 0U) - { - newVal = *pSrc++; - - /* compare for the minimum value */ - if (minValue > newVal) - { - /* Update the minimum value and it's index */ - minValue = newVal; - } - - blkCnt --; - } - - *pResult = minValue; -} - -#else - -void arm_min_no_idx_f32( - const float32_t *pSrc, - uint32_t blockSize, - float32_t *pResult) -{ - float32_t minValue = F32_MAX; - float32_t newVal; - - while (blockSize > 0U) - { - newVal = *pSrc++; - - /* compare for the minimum value */ - if (minValue > newVal) - { - /* Update the minimum value and it's index */ - minValue = newVal; - } - - blockSize --; - } - - *pResult = minValue; -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Min group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f64.c deleted file mode 100644 index 9721d7e..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f64.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_no_idx_f64.c - * Description: Maximum value of a floating-point vector without returning the index - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup Min - @{ - */ - -/** - @brief Maximum value of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ -void arm_min_no_idx_f64( - const float64_t *pSrc, - uint32_t blockSize, - float64_t *pResult) -{ - float64_t minValue = F64_MAX; - float64_t newVal; - - while (blockSize > 0U) - { - newVal = *pSrc++; - - /* compare for the minimum value */ - if (minValue > newVal) - { - /* Update the minimum value and it's index */ - minValue = newVal; - } - - blockSize --; - } - - *pResult = minValue; -} - -/** - @} end of Min group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q15.c deleted file mode 100644 index 69b0972..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q15.c +++ /dev/null @@ -1,142 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_no_idx_q15.c - * Description: Minimum value of a q15 vector without returning the index - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - - -/** - @ingroup groupStats - */ - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a q15 vector without index. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_min_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - q15_t const *pSrcVec; - q15x8_t curExtremValVec = vdupq_n_s16(Q15_MAX); - q15_t minValue = Q15_MAX; - mve_pred16_t p0; - - - pSrcVec = (q15_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - /* - * update per-lane min. - */ - curExtremValVec = vminq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 8; - p0 = vctp16q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - curExtremValVec = vminq_m(curExtremValVec, vecSrc, curExtremValVec, p0); - } - /* - * Get min value across the vector - */ - minValue = vminvq(minValue, curExtremValVec); - *pResult = minValue; -} - -#else -void arm_min_no_idx_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q15_t minVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* loop counter */ - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1U); - - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal1) - { - /* Update the minimum value */ - out = minVal1; - } - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the minimum value into destination pointer */ - *pResult = out; -} - -#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of Min group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q31.c deleted file mode 100644 index 43ac1f6..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q31.c +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_no_idx_q31.c - * Description: Minimum value of a q31 vector without returning the index - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - - -/** - @ingroup groupStats - */ - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a q31 vector without index. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -void arm_min_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - q31_t const *pSrcVec; - q31x4_t curExtremValVec = vdupq_n_s32(Q31_MAX); - q31_t minValue = Q31_MAX; - mve_pred16_t p0; - - - pSrcVec = (q31_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0) - { - vecSrc = vldrwq_s32(pSrcVec); - pSrcVec += 4; - /* - * update per-lane min. - */ - curExtremValVec = vminq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - if (blkCnt > 0) - { - vecSrc = vldrwq_s32(pSrcVec); - pSrcVec += 4; - p0 = vctp32q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - curExtremValVec = vminq_m(curExtremValVec, vecSrc, curExtremValVec, p0); - } - /* - * Get min value across the vector - */ - minValue = vminvq(minValue, curExtremValVec); - *pResult = minValue; -} - -#else -void arm_min_no_idx_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q31_t minVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* loop counter */ - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1U); - - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal1) - { - /* Update the minimum value */ - out = minVal1; - } - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the minimum value into destination pointer */ - *pResult = out; -} - -#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of Min group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q7.c deleted file mode 100644 index 4f60bd1..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q7.c +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_no_idx_q7.c - * Description: Minimum value of a q7 vector without returning the index - * - * $Date: 16 November 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - - -/** - @ingroup groupStats - */ - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a q7 vector without index. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_min_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q7_t const *pSrcVec; - q7x16_t curExtremValVec = vdupq_n_s8(Q7_MAX); - q7_t minValue = Q7_MAX; - mve_pred16_t p0; - - - pSrcVec = (q7_t const *) pSrc; - blkCnt = blockSize >> 4; - while (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 16; - /* - * update per-lane min. - */ - curExtremValVec = vminq(vecSrc, curExtremValVec); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0) - { - vecSrc = vld1q(pSrcVec); - pSrcVec += 16; - p0 = vctp8q(blkCnt); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - curExtremValVec = vminq_m(curExtremValVec, vecSrc, curExtremValVec, p0); - } - /* - * Get min value across the vector - */ - minValue = vminvq(minValue, curExtremValVec); - *pResult = minValue; -} - -#else -void arm_min_no_idx_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult) -{ - q7_t minVal1, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt; /* loop counter */ - - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - - blkCnt = (blockSize - 1U); - - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal1 = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal1) - { - /* Update the minimum value */ - out = minVal1; - } - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the minimum value into destination pointer */ - *pResult = out; -} - -#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */ -/** - @} end of Min group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c deleted file mode 100644 index 148f3f3..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c +++ /dev/null @@ -1,203 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_q15.c - * Description: Minimum value of a Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_min_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ - - int32_t blkCnt; /* loop counters */ - q15x8_t extremValVec = vdupq_n_s16(Q15_MAX); - q15_t minValue = Q15_MAX; - uint16x8_t indexVec; - uint16x8_t extremIdxVec; - mve_pred16_t p0; - uint16_t extremIdxArr[8]; - - indexVec = vidupq_u16(0U, 1); - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp16q(blkCnt); - q15x8_t extremIdxVal = vld1q_z_s16(pSrc, p); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq_m(extremIdxVal, extremValVec, p); - - extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0); - /* store per-lane extrema indexes */ - vst1q_p_u16(extremIdxArr, indexVec, p0); - - indexVec += 8; - pSrc += 8; - blkCnt -= 8; - } - while (blkCnt > 0); - - /* Get min value across the vector */ - minValue = vminvq(minValue, extremValVec); - - /* set index for lower values to min possible index */ - p0 = vcmpleq(extremValVec, minValue); - extremIdxVec = vld1q_u16(extremIdxArr); - - indexVec = vpselq(extremIdxVec, vdupq_n_u16(blockSize - 1), p0); - *pIndex = vminvq(blockSize - 1, indexVec); - *pResult = minValue; - -} -#else -void arm_min_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex) -{ - q15_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - uint32_t index; /* index of maximum value */ -#endif - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#if defined (ARM_MATH_LOOPUNROLL) - /* Initialise index of maximum value. */ - index = 0U; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize - 1U) >> 2U; - - while (blkCnt > 0U) - { - /* Initialize minVal to next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = index + 1U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 2U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 3U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 4U; - } - - index += 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize - 1U) % 4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Min group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c deleted file mode 100644 index 3c5a9a8..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c +++ /dev/null @@ -1,203 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_q31.c - * Description: Minimum value of a Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_min_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ - int32_t blkCnt; /* loop counters */ - q31x4_t extremValVec = vdupq_n_s32(Q31_MAX); - q31_t minValue = Q31_MAX; - uint32x4_t indexVec; - uint32x4_t extremIdxVec; - mve_pred16_t p0; - uint32_t extremIdxArr[4]; - - indexVec = vidupq_u32(0U, 1); - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp32q(blkCnt); - q31x4_t extremIdxVal = vld1q_z_s32(pSrc, p); - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq_m(extremIdxVal, extremValVec, p); - - extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0); - /* store per-lane extrema indexes */ - vst1q_p_u32(extremIdxArr, indexVec, p0); - - indexVec += 4; - pSrc += 4; - blkCnt -= 4; - } - while (blkCnt > 0); - - - /* Get min value across the vector */ - minValue = vminvq(minValue, extremValVec); - - /* set index for lower values to min possible index */ - p0 = vcmpleq(extremValVec, minValue); - extremIdxVec = vld1q_u32(extremIdxArr); - - indexVec = vpselq(extremIdxVec, vdupq_n_u32(blockSize - 1), p0); - *pIndex = vminvq(blockSize - 1, indexVec); - *pResult = minValue; -} - -#else -void arm_min_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex) -{ - q31_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - uint32_t index; /* index of maximum value */ -#endif - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#if defined (ARM_MATH_LOOPUNROLL) - /* Initialise index of maximum value. */ - index = 0U; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize - 1U) >> 2U; - - while (blkCnt > 0U) - { - /* Initialize minVal to next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = index + 1U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 2U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 3U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 4U; - } - - index += 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize - 1U) % 4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Min group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c deleted file mode 100644 index 05295c1..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c +++ /dev/null @@ -1,284 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_min_q7.c - * Description: Minimum value of a Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup Min - @{ - */ - -/** - @brief Minimum value of a Q7 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult minimum value returned here - @param[out] pIndex index of minimum value returned here - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -static void arm_small_blk_min_q7( - const q7_t * pSrc, - uint8_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q7x16_t curExtremValVec = vdupq_n_s8(Q7_MAX); - q7_t minValue = Q7_MAX,temp; - uint32_t idx = blockSize; - uint8x16_t indexVec; - uint8x16_t curExtremIdxVec; - mve_pred16_t p0; - - - indexVec = vidupq_u8((uint32_t)0, 1); - curExtremIdxVec = vdupq_n_u8(0); - - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - vecSrc = vldrbq_s8(pSrc); - pSrc += 16; - /* - * Get current min per lane and current index per lane - * when a min is selected - */ - p0 = vcmpleq(vecSrc, curExtremValVec); - curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); - curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); - - indexVec = indexVec + 16; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* - * Get min value across the vector - */ - minValue = vminvq(minValue, curExtremValVec); - /* - * set index for lower values to min possible index - */ - p0 = vcmpleq(curExtremValVec, minValue); - indexVec = vpselq(curExtremIdxVec, vdupq_n_u8(blockSize), p0); - /* - * Get min index which is thus for a min value - */ - idx = vminvq(idx, indexVec); - - blkCnt = blockSize & 0xF; - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - temp = *pSrc++; - - /* compare for the minimum value */ - if (minValue > temp) - { - /* Update the minimum value and it's index */ - minValue = temp; - idx = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - /* - * Save result - */ - *pIndex = idx; - *pResult = minValue; -} - -void arm_min_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - int32_t totalSize = blockSize; - - if (totalSize <= UINT8_MAX) - { - arm_small_blk_min_q7(pSrc, blockSize, pResult, pIndex); - } - else - { - uint32_t curIdx = 0; - q7_t curBlkExtr = Q7_MAX; - uint32_t curBlkPos = 0; - uint32_t curBlkIdx = 0; - /* - * process blocks of 255 elts - */ - while (totalSize >= UINT8_MAX) - { - const q7_t *curSrc = pSrc; - - arm_small_blk_min_q7(curSrc, UINT8_MAX, pResult, pIndex); - if (*pResult < curBlkExtr) - { - /* - * update partial extrema - */ - curBlkExtr = *pResult; - curBlkPos = *pIndex; - curBlkIdx = curIdx; - } - curIdx++; - pSrc += UINT8_MAX; - totalSize -= UINT8_MAX; - } - /* - * remainder - */ - arm_small_blk_min_q7(pSrc, totalSize, pResult, pIndex); - if (*pResult < curBlkExtr) - { - curBlkExtr = *pResult; - curBlkPos = *pIndex; - curBlkIdx = curIdx; - } - *pIndex = curBlkIdx * UINT8_MAX + curBlkPos; - *pResult = curBlkExtr; - } -} -#else -void arm_min_q7( - const q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex) -{ - q7_t minVal, out; /* Temporary variables to store the output value. */ - uint32_t blkCnt, outIndex; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - uint32_t index; /* index of maximum value */ -#endif - - /* Initialise index value to zero. */ - outIndex = 0U; - /* Load first input value that act as reference value for comparision */ - out = *pSrc++; - -#if defined (ARM_MATH_LOOPUNROLL) - /* Initialise index of maximum value. */ - index = 0U; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize - 1U) >> 2U; - - while (blkCnt > 0U) - { - /* Initialize minVal to next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = index + 1U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 2U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 3U; - } - - minVal = *pSrc++; - if (out > minVal) - { - out = minVal; - outIndex = index + 4U; - } - - index += 4U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize - 1U) % 4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = (blockSize - 1U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* Initialize minVal to the next consecutive values one by one */ - minVal = *pSrc++; - - /* compare for the minimum value */ - if (out > minVal) - { - /* Update the minimum value and it's index */ - out = minVal; - outIndex = blockSize - blkCnt; - } - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store the minimum value and it's index into destination pointers */ - *pResult = out; - *pIndex = outIndex; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Min group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_f16.c deleted file mode 100644 index 9683d86..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_f16.c +++ /dev/null @@ -1,203 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mse_f16.c - * Description: Half floating point mean square error - * - * $Date: 05 April 2022 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2022 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup MSE - @{ - */ - -/** - @brief Mean square error between two half floating point vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] result mean square error - @return none - */ - -#if !defined(ARM_MATH_AUTOVECTORIZE) - -#if defined(ARM_MATH_MVE_FLOAT16) -#include "arm_helium_utils.h" - -void arm_mse_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - uint32_t blockSize, - float16_t * result) - -{ - float16x8_t vecA, vecB; - float16x8_t vecSum; - uint32_t blkCnt; - _Float16 sum = 0.0f16; - vecSum = vdupq_n_f16(0.0f16); - - blkCnt = (blockSize) >> 3; - while (blkCnt > 0U) - { - vecA = vld1q(pSrcA); - pSrcA += 8; - - vecB = vld1q(pSrcB); - pSrcB += 8; - - vecA = vsubq(vecA, vecB); - - vecSum = vfmaq(vecSum, vecA, vecA); - /* - * Decrement the blockSize loop counter - */ - blkCnt --; - } - - - blkCnt = (blockSize) & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - - vecA = vsubq(vecA, vecB); - vecSum = vfmaq_m(vecSum, vecA, vecA, p0); - } - - sum = vecAddAcrossF16Mve(vecSum); - - /* Store result in destination buffer */ - *result = (_Float16)sum / (_Float16)blockSize; - -} - -#endif - - -#endif /*#if !defined(ARM_MATH_AUTOVECTORIZE)*/ - - -#if defined(ARM_FLOAT16_SUPPORTED) - -#if (!defined(ARM_MATH_MVE_FLOAT16)) || defined(ARM_MATH_AUTOVECTORIZE) - - - -void arm_mse_f16( - const float16_t * pSrcA, - const float16_t * pSrcB, - uint32_t blockSize, - float16_t * result) - -{ - uint32_t blkCnt; /* Loop counter */ - _Float16 inA, inB; - _Float16 sum = 0.0f16; /* Temporary return variable */ -#if defined (ARM_MATH_LOOPUNROLL) - blkCnt = (blockSize) >> 3; - - - while (blkCnt > 0U) - { - inA = *pSrcA++; - inB = *pSrcB++; - inA = (_Float16)inA - (_Float16)inB; - sum += (_Float16)inA * (_Float16)inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = (_Float16)inA - (_Float16)inB; - sum += (_Float16)inA * (_Float16)inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = (_Float16)inA - (_Float16)inB; - sum += (_Float16)inA * (_Float16)inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = (_Float16)inA - (_Float16)inB; - sum += (_Float16)inA * (_Float16)inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = (_Float16)inA - (_Float16)inB; - sum += (_Float16)inA * (_Float16)inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = (_Float16)inA - (_Float16)inB; - sum += (_Float16)inA * (_Float16)inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = (_Float16)inA - (_Float16)inB; - sum += (_Float16)inA * (_Float16)inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = (_Float16)inA - (_Float16)inB; - sum += (_Float16)inA * (_Float16)inA; - - /* Decrement loop counter */ - blkCnt--; - } - - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize) & 7; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - while (blkCnt > 0U) - { - inA = *pSrcA++; - inB = *pSrcB++; - inA = (_Float16)inA - (_Float16)inB; - sum += (_Float16)inA * (_Float16)inA; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in destination buffer */ - *result = (_Float16)sum / (_Float16)blockSize; -} - -#endif /* end of test for vector instruction availability */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ -/** - @} end of MSE group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_f32.c deleted file mode 100644 index eebf679..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_f32.c +++ /dev/null @@ -1,247 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mse_f32.c - * Description: Floating point mean square error - * - * $Date: 05 April 2022 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2022 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup MSE - @{ - */ - -/** - @brief Mean square error between two floating point vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] result mean square error - @return none - */ - -#if !defined(ARM_MATH_AUTOVECTORIZE) - -#if defined(ARM_MATH_MVEF) -#include "arm_helium_utils.h" - -void arm_mse_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t blockSize, - float32_t * result) - -{ - float32x4_t vecA, vecB; - float32x4_t vecSum; - uint32_t blkCnt; - float32_t sum = 0.0f; - vecSum = vdupq_n_f32(0.0f); - - /* Compute 4 outputs at a time */ - blkCnt = (blockSize) >> 2; - while (blkCnt > 0U) - { - vecA = vld1q(pSrcA); - pSrcA += 4; - - vecB = vld1q(pSrcB); - pSrcB += 4; - - vecA = vsubq(vecA, vecB); - - vecSum = vfmaq(vecSum, vecA, vecA); - /* - * Decrement the blockSize loop counter - */ - blkCnt --; - } - - - blkCnt = (blockSize) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecA = vld1q(pSrcA); - vecB = vld1q(pSrcB); - - vecA = vsubq(vecA, vecB); - vecSum = vfmaq_m(vecSum, vecA, vecA, p0); - } - - sum = vecAddAcrossF32Mve(vecSum); - - /* Store result in destination buffer */ - *result = sum / blockSize; - -} - -#endif - -#if defined(ARM_MATH_NEON) -void arm_mse_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t blockSize, - float32_t * result) - -{ - float32x4_t vecA, vecB; - float32x4_t vecSum; - uint32_t blkCnt; - float32_t inA, inB; - float32_t sum = 0.0f; - vecSum = vdupq_n_f32(0.0f); -#if !defined(__aarch64__) - f32x2_t tmp = vdup_n_f32(0.0f); -#endif - - /* Compute 4 outputs at a time */ - blkCnt = (blockSize) >> 2; - while (blkCnt > 0U) - { - vecA = vld1q_f32(pSrcA); - pSrcA += 4; - - vecB = vld1q_f32(pSrcB); - pSrcB += 4; - - vecA = vsubq_f32(vecA, vecB); - - vecSum = vfmaq_f32(vecSum, vecA, vecA); - /* - * Decrement the blockSize loop counter - */ - blkCnt --; - } - -#if defined(__aarch64__) - sum = vpadds_f32(vpadd_f32(vget_low_f32(vecSum), vget_high_f32(vecSum))); -#else - tmp = vpadd_f32(vget_low_f32(vecSum), vget_high_f32(vecSum)); - sum = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1); - -#endif - - blkCnt = (blockSize) & 3; - while (blkCnt > 0U) - { - /* Calculate dot product and store result in a temporary buffer. */ - inA = *pSrcA++; - inB = *pSrcB++; - inA = inA - inB; - sum += inA * inA; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in destination buffer */ - *result = sum / blockSize; - -} -#endif - -#endif /*#if !defined(ARM_MATH_AUTOVECTORIZE)*/ - - - -#if (!defined(ARM_MATH_MVEF) && !defined(ARM_MATH_NEON)) || defined(ARM_MATH_AUTOVECTORIZE) - - -void arm_mse_f32( - const float32_t * pSrcA, - const float32_t * pSrcB, - uint32_t blockSize, - float32_t * result) - -{ - uint32_t blkCnt; /* Loop counter */ - float32_t inA, inB; - float32_t sum = 0.0f; /* Temporary return variable */ -#if defined (ARM_MATH_LOOPUNROLL) - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = (blockSize) >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - - inA = *pSrcA++; - inB = *pSrcB++; - inA = inA - inB; - sum += inA * inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = inA - inB; - sum += inA * inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = inA - inB; - sum += inA * inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = inA - inB; - sum += inA * inA; - - /* Decrement loop counter */ - blkCnt--; - } - - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize) & 3; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - while (blkCnt > 0U) - { - inA = *pSrcA++; - inB = *pSrcB++; - inA = inA - inB; - sum += inA * inA; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in destination buffer */ - *result = sum / blockSize; -} - -#endif /* end of test for vector instruction availability */ - -/** - @} end of MSE group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_f64.c deleted file mode 100644 index ecb61f7..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_f64.c +++ /dev/null @@ -1,110 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mse_f64.c - * Description: Double floating point mean square error - * - * $Date: 05 April 2022 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2022 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup MSE - @{ - */ - -/** - @brief Mean square error between two double floating point vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] result mean square error - @return none - */ - - - - - -void arm_mse_f64( - const float64_t * pSrcA, - const float64_t * pSrcB, - uint32_t blockSize, - float64_t * result) - -{ - uint32_t blkCnt; /* Loop counter */ - float64_t inA, inB; - float64_t sum = 0.0; /* Temporary return variable */ -#if defined (ARM_MATH_LOOPUNROLL) - blkCnt = (blockSize) >> 1; - - - while (blkCnt > 0U) - { - - - inA = *pSrcA++; - inB = *pSrcB++; - inA = inA - inB; - sum += inA * inA; - - inA = *pSrcA++; - inB = *pSrcB++; - inA = inA - inB; - sum += inA * inA; - - /* Decrement loop counter */ - blkCnt--; - } - - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = (blockSize) & 1; -#else - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; -#endif - while (blkCnt > 0U) - { - inA = *pSrcA++; - inB = *pSrcB++; - inA = inA - inB; - sum += inA * inA; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in destination buffer */ - *result = sum / blockSize; -} - - -/** - @} end of MSE group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_q15.c deleted file mode 100644 index e5853dd..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_q15.c +++ /dev/null @@ -1,175 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mse_q15.c - * Description: Mean square error between two Q15 vectors - * - * $Date: 04 April 2022 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2022 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup MSE - @{ - */ - -/** - @brief Mean square error between two Q15 vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean square error - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_mse_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - uint32_t blockSize, - q15_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecSrcA,vecSrcB; - q63_t sum = 0LL; - - blkCnt = blockSize >> 3U; - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vecSrcA = vshrq(vecSrcA,1); - vecSrcB = vshrq(vecSrcB,1); - - vecSrcA = vqsubq(vecSrcA,vecSrcB); - /* - * sum lanes - */ - sum = vmlaldavaq(sum, vecSrcA, vecSrcA); - - blkCnt--; - pSrcA += 8; - pSrcB += 8; - } - - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vecSrcA = vshrq(vecSrcA,1); - vecSrcB = vshrq(vecSrcB,1); - - vecSrcA = vqsubq(vecSrcA,vecSrcB); - - sum = vmlaldavaq_p(sum, vecSrcA, vecSrcA, p0); - } - - - - *pResult = (q15_t) __SSAT((q31_t) (sum / blockSize)>>13, 16); -} -#else -void arm_mse_q15( - const q15_t * pSrcA, - const q15_t * pSrcB, - uint32_t blockSize, - q15_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t sum = 0; /* Temporary result storage */ - q15_t inA,inB; /* Temporary variable to store input value */ - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - - inA = *pSrcA++ >> 1; - inB = *pSrcB++ >> 1; - inA = (q15_t) __SSAT(((q31_t) inA - (q31_t)inB), 16); - sum += (q63_t)((q31_t) inA * inA); - - inA = *pSrcA++ >> 1; - inB = *pSrcB++ >> 1; - inA = (q15_t) __SSAT(((q31_t) inA - (q31_t)inB), 16); - sum += (q63_t)((q31_t) inA * inA); - - inA = *pSrcA++ >> 1; - inB = *pSrcB++ >> 1; - inA = (q15_t) __SSAT(((q31_t) inA - (q31_t)inB), 16); - sum += (q63_t)((q31_t) inA * inA); - - inA = *pSrcA++ >> 1; - inB = *pSrcB++ >> 1; - inA = (q15_t) __SSAT(((q31_t) inA - (q31_t)inB), 16); - sum += (q63_t)((q31_t) inA * inA); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - - inA = *pSrcA++ >> 1; - inB = *pSrcB++ >> 1; - inA = (q15_t) __SSAT(((q31_t) inA - (q31_t)inB), 16); - sum += (q63_t)((q31_t) inA * inA); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in q15 format */ - *pResult = (q15_t) __SSAT((q31_t) (sum / blockSize)>>13, 16); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MSE group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_q31.c deleted file mode 100644 index b64723d..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_q31.c +++ /dev/null @@ -1,176 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mse_q31.c - * Description: Mean square error between two Q31 vectors - * - * $Date: 04 April 2022 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2022 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - - -/** - @addtogroup MSE - @{ - */ - -/** - @brief Mean square error between two Q31 vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean square error - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_mse_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - uint32_t blockSize, - q31_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecSrcA,vecSrcB; - q63_t sum = 0LL; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vecSrcA = vshrq(vecSrcA,1); - vecSrcB = vshrq(vecSrcB,1); - - - vecSrcA = vqsubq(vecSrcA,vecSrcB); - /* - * sum lanes - */ - sum = vrmlaldavhaq(sum, vecSrcA, vecSrcA); - - blkCnt--; - pSrcA += 4; - pSrcB += 4; - } - - /* - * tail - */ - blkCnt = blockSize & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vecSrcA = vshrq(vecSrcA,1); - vecSrcB = vshrq(vecSrcB,1); - - vecSrcA = vqsubq(vecSrcA,vecSrcB); - - sum = vrmlaldavhaq_p(sum, vecSrcA, vecSrcA, p0); - } - - - *pResult = (q31_t) ((sum / blockSize)>>21); - -} -#else -void arm_mse_q31( - const q31_t * pSrcA, - const q31_t * pSrcB, - uint32_t blockSize, - q31_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t sum = 0; /* Temporary result storage */ - - q31_t inA32,inB32; /* Temporary variable to store packed input value */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - inA32 = *pSrcA++ >> 1; - inB32 = *pSrcB++ >> 1; - inA32 = __QSUB(inA32, inB32); - sum += ((q63_t) inA32 * inA32) >> 14U; - - inA32 = *pSrcA++ >> 1; - inB32 = *pSrcB++ >> 1; - inA32 = __QSUB(inA32, inB32); - sum += ((q63_t) inA32 * inA32) >> 14U; - - inA32 = *pSrcA++ >> 1; - inB32 = *pSrcB++ >> 1; - inA32 = __QSUB(inA32, inB32); - sum += ((q63_t) inA32 * inA32) >> 14U; - - inA32 = *pSrcA++ >> 1; - inB32 = *pSrcB++ >> 1; - inA32 = __QSUB(inA32, inB32); - sum += ((q63_t) inA32 * inA32) >> 14U; - - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - inA32 = *pSrcA++ >> 1; - inB32 = *pSrcB++ >> 1; - inA32 = __QSUB(inA32, inB32); - sum += ((q63_t) inA32 * inA32) >> 14U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in q31 format */ - *pResult = (q31_t) ((sum / blockSize)>>15); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MSE group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_q7.c deleted file mode 100644 index 65632c3..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_mse_q7.c +++ /dev/null @@ -1,179 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mse_q7.c - * Description: Mean square error between two Q7 vectors - * - * $Date: 04 April 2022 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2022 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @defgroup MSE Mean Square Error - - Calculates the mean square error between two vectors. - - */ - -/** - @addtogroup MSE - @{ - */ - -/** - @brief Mean square error between two Q7 vectors. - @param[in] pSrcA points to the first input vector - @param[in] pSrcB points to the second input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult mean square error - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_mse_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - uint32_t blockSize, - q7_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecSrcA,vecSrcB; - q31_t sum = 0LL; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4U; - while (blkCnt > 0U) - { - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vecSrcA = vshrq(vecSrcA,1); - vecSrcB = vshrq(vecSrcB,1); - - vecSrcA = vqsubq(vecSrcA,vecSrcB); - /* - * sum lanes - */ - sum = vmladavaq(sum, vecSrcA, vecSrcA); - - blkCnt--; - pSrcA += 16; - pSrcB += 16; - } - - /* - * tail - */ - blkCnt = blockSize & 0xF; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp8q(blkCnt); - vecSrcA = vld1q(pSrcA); - vecSrcB = vld1q(pSrcB); - - vecSrcA = vshrq(vecSrcA,1); - vecSrcB = vshrq(vecSrcB,1); - - vecSrcA = vqsubq(vecSrcA,vecSrcB); - - sum = vmladavaq_p(sum, vecSrcA, vecSrcA, p0); - } - - *pResult = (q7_t) __SSAT((q15_t) (sum / blockSize)>>5, 8); -} -#else -void arm_mse_q7( - const q7_t * pSrcA, - const q7_t * pSrcB, - uint32_t blockSize, - q7_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t sum = 0; /* Temporary result storage */ - q7_t inA,inB; /* Temporary variable to store input value */ - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - inA = *pSrcA++ >> 1; - inB = *pSrcB++ >> 1; - inA = (q7_t) __SSAT((q15_t) inA - (q15_t)inB, 8); - sum += ((q15_t) inA * inA); - - inA = *pSrcA++ >> 1; - inB = *pSrcB++ >> 1; - inA = (q7_t) __SSAT((q15_t) inA - (q15_t)inB, 8); - sum += ((q15_t) inA * inA); - - inA = *pSrcA++ >> 1; - inB = *pSrcB++ >> 1; - inA = (q7_t) __SSAT((q15_t) inA - (q15_t)inB, 8); - sum += ((q15_t) inA * inA); - - inA = *pSrcA++ >> 1; - inB = *pSrcB++ >> 1; - inA = (q7_t) __SSAT((q15_t) inA - (q15_t)inB, 8); - sum += ((q15_t) inA * inA); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - inA = *pSrcA++ >> 1; - inB = *pSrcB++ >> 1; - - inA = (q7_t) __SSAT((q15_t) inA - (q15_t)inB, 8); - sum += ((q15_t) inA * inA); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in q7 format */ - *pResult = (q7_t) __SSAT((q15_t) (sum / blockSize)>>5, 8);; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of MSE group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f16.c deleted file mode 100644 index 2525619..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f16.c +++ /dev/null @@ -1,152 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_power_f16.c - * Description: Sum of the squares of the elements of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupStats - */ - - - -/** - @addtogroup power - @{ - */ - -/** - @brief Sum of the squares of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult sum of the squares value returned here - @return none - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_power_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - f16x8_t vecSrc; - f16x8_t sumVec = vdupq_n_f16(0.0f); - - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp16q(blkCnt); - - vecSrc = vldrhq_z_f16((float16_t const *) pSrc, p); - /* - * sum lanes - */ - sumVec = vfmaq_m(sumVec, vecSrc, vecSrc, p); - - blkCnt -= 8; - pSrc += 8; - } - while (blkCnt > 0); - - *pResult = vecAddAcrossF16Mve(sumVec); -} -#else - -void arm_power_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - _Float16 sum = 0.0f16; /* Temporary result storage */ - _Float16 in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += in * in; - - in = *pSrc++; - sum += in * in; - - in = *pSrc++; - sum += in * in; - - in = *pSrc++; - sum += in * in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += in * in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result to destination */ - *pResult = sum; -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of power group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c deleted file mode 100644 index 14dbf05..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c +++ /dev/null @@ -1,229 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_power_f32.c - * Description: Sum of the squares of the elements of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @defgroup power Power - - Calculates the sum of the squares of the elements in the input vector. - The underlying algorithm is used: - - 
-      Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
-
- - There are separate functions for floating point, Q31, Q15, and Q7 data types. - - Since the result is not divided by the length, those functions are in fact computing - something which is more an energy than a power. - - */ - -/** - @addtogroup power - @{ - */ - -/** - @brief Sum of the squares of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult sum of the squares value returned here - @return none - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_power_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - f32x4_t vecSrc; - f32x4_t sumVec = vdupq_n_f32(0.0f); - float32_t sum = 0.0f; - float32_t in; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - vecSrc = vldrwq_f32(pSrc); - /* - * sum lanes - */ - sumVec = vfmaq(sumVec, vecSrc, vecSrc); - - blkCnt --; - pSrc += 4; - } - sum = vecAddAcrossF32Mve(sumVec); - - /* - * tail - */ - blkCnt = blockSize & 0x3; - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += in * in; - - /* Decrement loop counter */ - blkCnt--; - } - - *pResult = sum; -} -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_power_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t sum = 0.0f; /* accumulator */ - float32_t in; /* Temporary variable to store input value */ - uint32_t blkCnt; /* loop counter */ - - float32x4_t sumV = vdupq_n_f32(0.0f); /* Temporary result storage */ - float32x2_t sumV2; - float32x4_t inV; - - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute Power and then store the result in a temporary variable, sum. */ - inV = vld1q_f32(pSrc); - sumV = vmlaq_f32(sumV, inV, inV); - pSrc += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); - sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1); - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* compute power and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the result to the destination */ - *pResult = sum; -} -#else -void arm_power_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - float32_t sum = 0.0f; /* Temporary result storage */ - float32_t in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += in * in; - - in = *pSrc++; - sum += in * in; - - in = *pSrc++; - sum += in * in; - - in = *pSrc++; - sum += in * in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += in * in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result to destination */ - *pResult = sum; -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of power group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f64.c deleted file mode 100644 index 16724bc..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f64.c +++ /dev/null @@ -1,77 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_power_f64.c - * Description: Sum of the squares of the elements of a floating-point vector - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup power - @{ - */ - -/** - @brief Sum of the squares of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult sum of the squares value returned here - @return none - */ -void arm_power_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - float64_t sum = 0.; /* Temporary result storage */ - float64_t in; /* Temporary variable to store input value */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += in * in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result to destination */ - *pResult = sum; -} - -/** - @} end of power group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c deleted file mode 100644 index 7c319ad..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c +++ /dev/null @@ -1,177 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_power_q15.c - * Description: Sum of the squares of the elements of a Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup power - @{ - */ - -/** - @brief Sum of the squares of the elements of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult sum of the squares value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - The input is represented in 1.15 format. - Intermediate multiplication yields a 2.30 format, and this - result is added without saturation to a 64-bit accumulator in 34.30 format. - With 33 guard bits in the accumulator, there is no risk of overflow, and the - full precision of the intermediate multiplication is preserved. - Finally, the return result is in 34.30 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_power_q15( - const q15_t * pSrc, - uint32_t blockSize, - q63_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - q63_t sum = 0LL; - q15_t in; - - /* Compute 8 outputs at a time */ - blkCnt = blockSize >> 3U; - while (blkCnt > 0U) - { - vecSrc = vldrhq_s16(pSrc); - /* - * sum lanes - */ - sum = vmlaldavaq(sum, vecSrc, vecSrc); - - blkCnt --; - pSrc += 8; - } - - /* - * tail - */ - blkCnt = blockSize & 0x7; - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += ((q31_t) in * in); - - /* Decrement loop counter */ - blkCnt--; - } - - *pResult = sum; -} -#else -void arm_power_q15( - const q15_t * pSrc, - uint32_t blockSize, - q63_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t sum = 0; /* Temporary result storage */ - q15_t in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) - q31_t in32; /* Temporary variable to store packed input value */ -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ -#if defined (ARM_MATH_DSP) - in32 = read_q15x2_ia ((q15_t **) &pSrc); - sum = __SMLALD(in32, in32, sum); - - in32 = read_q15x2_ia ((q15_t **) &pSrc); - sum = __SMLALD(in32, in32, sum); -#else - in = *pSrc++; - sum += ((q31_t) in * in); - - in = *pSrc++; - sum += ((q31_t) in * in); - - in = *pSrc++; - sum += ((q31_t) in * in); - - in = *pSrc++; - sum += ((q31_t) in * in); -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += ((q31_t) in * in); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in 34.30 format */ - *pResult = sum; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of power group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c deleted file mode 100644 index 2e94086..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c +++ /dev/null @@ -1,165 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_power_q31.c - * Description: Sum of the squares of the elements of a Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup power - @{ - */ - -/** - @brief Sum of the squares of the elements of a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult sum of the squares value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - The input is represented in 1.31 format. - Intermediate multiplication yields a 2.62 format, and this - result is truncated to 2.48 format by discarding the lower 14 bits. - The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. - With 15 guard bits in the accumulator, there is no risk of overflow, and the - full precision of the intermediate multiplication is preserved. - Finally, the return result is in 16.48 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_power_q31( - const q31_t * pSrc, - uint32_t blockSize, - q63_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - q63_t sum = 0LL; - q31_t in; - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - vecSrc = vldrwq_s32(pSrc); - /* - * sum lanes - */ - sum = vrmlaldavhaq(sum, vecSrc, vecSrc); - - blkCnt --; - pSrc += 4; - } - - /* - * tail - */ - blkCnt = blockSize & 0x3; - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += ((q63_t) in * in) >> 8; - - /* Decrement loop counter */ - blkCnt--; - } - - *pResult = asrl(sum, 6); -} -#else -void arm_power_q31( - const q31_t * pSrc, - uint32_t blockSize, - q63_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t sum = 0; /* Temporary result storage */ - q31_t in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and store result in a temporary variable sum, providing 15 guard bits. */ - in = *pSrc++; - sum += ((q63_t) in * in) >> 14U; - - in = *pSrc++; - sum += ((q63_t) in * in) >> 14U; - - in = *pSrc++; - sum += ((q63_t) in * in) >> 14U; - - in = *pSrc++; - sum += ((q63_t) in * in) >> 14U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += ((q63_t) in * in) >> 14U; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store results in 16.48 format */ - *pResult = sum; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of power group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c deleted file mode 100644 index 0991725..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c +++ /dev/null @@ -1,180 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_power_q7.c - * Description: Sum of the squares of the elements of a Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup power - @{ - */ - -/** - @brief Sum of the squares of the elements of a Q7 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult sum of the squares value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 32-bit internal accumulator. - The input is represented in 1.7 format. - Intermediate multiplication yields a 2.14 format, and this - result is added without saturation to an accumulator in 18.14 format. - With 17 guard bits in the accumulator, there is no risk of overflow, and the - full precision of the intermediate multiplication is preserved. - Finally, the return result is in 18.14 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_power_q7( - const q7_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecSrc; - q31_t sum = 0LL; - q7_t in; - - /* Compute 16 outputs at a time */ - blkCnt = blockSize >> 4U; - while (blkCnt > 0U) - { - vecSrc = vldrbq_s8(pSrc); - /* - * sum lanes - */ - sum = vmladavaq(sum, vecSrc, vecSrc); - - blkCnt--; - pSrc += 16; - } - - /* - * tail - */ - blkCnt = blockSize & 0xF; - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += ((q15_t) in * in); - - /* Decrement loop counter */ - blkCnt--; - } - - *pResult = sum; -} -#else -void arm_power_q7( - const q7_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t sum = 0; /* Temporary result storage */ - q7_t in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) - q31_t in32; /* Temporary variable to store packed input value */ - q31_t in1, in2; /* Temporary variables to store input value */ -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ -#if defined (ARM_MATH_DSP) - in32 = read_q7x4_ia (&pSrc); - - in1 = __SXTB16(__ROR(in32, 8)); - in2 = __SXTB16(in32); - - /* calculate power and accumulate to accumulator */ - sum = __SMLAD(in1, in1, sum); - sum = __SMLAD(in2, in2, sum); -#else - in = *pSrc++; - sum += ((q15_t) in * in); - - in = *pSrc++; - sum += ((q15_t) in * in); - - in = *pSrc++; - sum += ((q15_t) in * in); - - in = *pSrc++; - sum += ((q15_t) in * in); -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute Power and store result in a temporary variable, sum. */ - in = *pSrc++; - sum += ((q15_t) in * in); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Store result in 18.14 format */ - *pResult = sum; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of power group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f16.c deleted file mode 100644 index 4fb0c4c..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f16.c +++ /dev/null @@ -1,147 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rms_f16.c - * Description: Root mean square value of the elements of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupStats - */ - -/** - @defgroup RMS Root mean square (RMS) - - Calculates the Root Mean Square of the elements in the input vector. - The underlying algorithm is used: - - 
-      Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
-
- - There are separate functions for floating point, Q31, and Q15 data types. - */ - -/** - @addtogroup RMS - @{ - */ - -/** - @brief Root Mean Square of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult root mean square value returned here - @return none - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_rms_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - float16_t pow = 0.0f; - - arm_power_f16(pSrc, blockSize, &pow); - - /* Compute Rms and store the result in the destination */ - arm_sqrt_f16((_Float16)pow / (_Float16) blockSize, pResult); -} -#else - -void arm_rms_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - _Float16 sum = 0.0f16; /* Temporary result storage */ - _Float16 in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - in = *pSrc++; - /* Compute sum of squares and store result in a temporary variable, sum. */ - sum += in * in; - - in = *pSrc++; - sum += in * in; - - in = *pSrc++; - sum += in * in; - - in = *pSrc++; - sum += in * in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - in = *pSrc++; - /* Compute sum of squares and store result in a temporary variable. */ - sum += ( in * in); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Compute Rms and store result in destination */ - arm_sqrt_f16((_Float16)sum / (_Float16) blockSize, pResult); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of RMS group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c deleted file mode 100644 index ddfad2d..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c +++ /dev/null @@ -1,192 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rms_f32.c - * Description: Root mean square value of the elements of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @defgroup RMS Root mean square (RMS) - - Calculates the Root Mean Square of the elements in the input vector. - The underlying algorithm is used: - - 
-      Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
-
- - There are separate functions for floating point, Q31, and Q15 data types. - */ - -/** - @addtogroup RMS - @{ - */ - -/** - @brief Root Mean Square of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult root mean square value returned here - @return none - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_rms_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t pow = 0.0f; - - arm_power_f32(pSrc, blockSize, &pow); - - /* Compute Rms and store the result in the destination */ - arm_sqrt_f32(pow / (float32_t) blockSize, pResult); -} -#else -#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_rms_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t sum = 0.0f; /* accumulator */ - float32_t in; /* Temporary variable to store input value */ - uint32_t blkCnt; /* loop counter */ - - float32x4_t sumV = vdupq_n_f32(0.0f); /* Temporary result storage */ - float32x2_t sumV2; - float32x4_t inV; - - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute Power and then store the result in a temporary variable, sum. */ - inV = vld1q_f32(pSrc); - sumV = vmlaq_f32(sumV, inV, inV); - pSrc += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); - sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1); - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* compute power and then store the result in a temporary variable, sum. */ - in = *pSrc++; - sum += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Compute Rms and store the result in the destination */ - arm_sqrt_f32(sum / (float32_t) blockSize, pResult); -} -#else -void arm_rms_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - float32_t sum = 0.0f; /* Temporary result storage */ - float32_t in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - in = *pSrc++; - /* Compute sum of squares and store result in a temporary variable, sum. */ - sum += in * in; - - in = *pSrc++; - sum += in * in; - - in = *pSrc++; - sum += in * in; - - in = *pSrc++; - sum += in * in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - in = *pSrc++; - /* Compute sum of squares and store result in a temporary variable. */ - sum += ( in * in); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Compute Rms and store result in destination */ - arm_sqrt_f32(sum / (float32_t) blockSize, pResult); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of RMS group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c deleted file mode 100644 index 893eb34..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rms_q15.c - * Description: Root Mean Square of the elements of a Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup RMS - @{ - */ - -/** - @brief Root Mean Square of the elements of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult root mean square value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - The input is represented in 1.15 format. - Intermediate multiplication yields a 2.30 format, and this - result is added without saturation to a 64-bit accumulator in 34.30 format. - With 33 guard bits in the accumulator, there is no risk of overflow, and the - full precision of the intermediate multiplication is preserved. - Finally, the 34.30 result is truncated to 34.15 format by discarding the lower - 15 bits, and then saturated to yield a result in 1.15 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_rms_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q63_t pow = 0.0f; - q15_t normalizedPower; - - arm_power_q15(pSrc, blockSize, &pow); - - normalizedPower=__SSAT((pow / (q63_t) blockSize) >> 15,16); - arm_sqrt_q15(normalizedPower, pResult); -} -#else -void arm_rms_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t sum = 0; /* Temporary result storage */ - q15_t in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) - q31_t in32; /* Temporary variable to store input value */ -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - /* Compute sum of squares and store result in a temporary variable. */ -#if defined (ARM_MATH_DSP) - in32 = read_q15x2_ia (&pSrc); - sum = __SMLALD(in32, in32, sum); - - in32 = read_q15x2_ia (&pSrc); - sum = __SMLALD(in32, in32, sum); -#else - in = *pSrc++; - sum += ((q31_t) in * in); - - in = *pSrc++; - sum += ((q31_t) in * in); - - in = *pSrc++; - sum += ((q31_t) in * in); - - in = *pSrc++; - sum += ((q31_t) in * in); -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - in = *pSrc++; - /* Compute sum of squares and store result in a temporary variable. */ - sum += ((q31_t) in * in); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Truncating and saturating the accumulator to 1.15 format */ - /* Store result in destination */ - arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of RMS group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c deleted file mode 100644 index fd49017..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rms_q31.c - * Description: Root Mean Square of the elements of a Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup RMS - @{ - */ - -/** - @brief Root Mean Square of the elements of a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult root mean square value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The input is represented in 1.31 format, and intermediate multiplication - yields a 2.62 format. - The accumulator maintains full precision of the intermediate multiplication results, - but provides only a single guard bit. - There is no saturation on intermediate additions. - If the accumulator overflows, it wraps around and distorts the result. - In order to avoid overflows completely, the input signal must be scaled down by - log2(blockSize) bits, as a total of blockSize additions are performed internally. - Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_rms_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q63_t pow = 0.0f; - q31_t normalizedPower; - arm_power_q31(pSrc, blockSize, &pow); - - normalizedPower=clip_q63_to_q31((pow / (q63_t) blockSize) >> 17); - arm_sqrt_q31(normalizedPower, pResult); - -} - -#else -void arm_rms_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - uint64_t sum = 0; /* Temporary result storage (can get never negative. changed type from q63 to uint64 */ - q31_t in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - in = *pSrc++; - /* Compute sum of squares and store result in a temporary variable, sum. */ - sum += ((q63_t) in * in); - - in = *pSrc++; - sum += ((q63_t) in * in); - - in = *pSrc++; - sum += ((q63_t) in * in); - - in = *pSrc++; - sum += ((q63_t) in * in); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - - in = *pSrc++; - /* Compute sum of squares and store result in a temporary variable. */ - sum += ((q63_t) in * in); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */ - /* Compute Rms and store result in destination vector */ - arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of RMS group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f16.c deleted file mode 100644 index d67eb79..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f16.c +++ /dev/null @@ -1,67 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_std_f16.c - * Description: Standard deviation of the elements of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupStats - */ - - - -/** - @addtogroup STD - @{ - */ - -/** - @brief Standard deviation of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult standard deviation value returned here - @return none - */ -void arm_std_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - float16_t var; - arm_var_f16(pSrc,blockSize,&var); - arm_sqrt_f16(var, pResult); -} - -/** - @} end of STD group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c deleted file mode 100644 index e80038a..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c +++ /dev/null @@ -1,83 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_std_f32.c - * Description: Standard deviation of the elements of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @defgroup STD Standard deviation - - Calculates the standard deviation of the elements in the input vector. - - The float implementation is relying on arm_var_f32 which is using a two-pass algorithm - to avoid problem of numerical instabilities and cancellation errors. - - Fixed point versions are using the standard textbook algorithm since the fixed point - numerical behavior is different from the float one. - - Algorithm for fixed point versions is summarized below: - - - 
-      Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize - 1))
-
-      sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
-      sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
-
- - There are separate functions for floating point, Q31, and Q15 data types. - */ - -/** - @addtogroup STD - @{ - */ - -/** - @brief Standard deviation of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult standard deviation value returned here - @return none - */ -void arm_std_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t var; - arm_var_f32(pSrc,blockSize,&var); - arm_sqrt_f32(var, pResult); -} - -/** - @} end of STD group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f64.c deleted file mode 100644 index fcb1cc6..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f64.c +++ /dev/null @@ -1,59 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_std_f64.c - * Description: Standard deviation of the elements of a floating-point vector - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup STD - @{ - */ - -/** - @brief Standard deviation of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult standard deviation value returned here - @return none - */ -void arm_std_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult) -{ - float64_t var; - arm_var_f64(pSrc,blockSize,&var); - *pResult = sqrt(var); -} - -/** - @} end of STD group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c deleted file mode 100644 index 549059f..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c +++ /dev/null @@ -1,173 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_std_q15.c - * Description: Standard deviation of an array of Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup STD - @{ - */ - -/** - @brief Standard deviation of the elements of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult standard deviation value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - The input is represented in 1.15 format. - Intermediate multiplication yields a 2.30 format, and this - result is added without saturation to a 64-bit accumulator in 34.30 format. - With 33 guard bits in the accumulator, there is no risk of overflow, and the - full precision of the intermediate multiplication is preserved. - Finally, the 34.30 result is truncated to 34.15 format by discarding the lower - 15 bits, and then saturated to yield a result in 1.15 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_std_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - q15_t var=0; - - arm_var_q15(pSrc, blockSize, &var); - arm_sqrt_q15(var,pResult); -} -#else -void arm_std_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t sum = 0; /* Accumulator */ - q31_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ - q63_t sumOfSquares = 0; /* Sum of squares */ - q15_t in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) - q31_t in32; /* Temporary variable to store input value */ -#endif - - if (blockSize <= 1U) - { - *pResult = 0; - return; - } - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - /* C = A[0] + A[1] + ... + A[blockSize-1] */ - - /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ - /* Compute sum and store result in a temporary variable, sum. */ -#if defined (ARM_MATH_DSP) - in32 = read_q15x2_ia (&pSrc); - sumOfSquares = __SMLALD(in32, in32, sumOfSquares); - sum += ((in32 << 16U) >> 16U); - sum += (in32 >> 16U); - - in32 = read_q15x2_ia (&pSrc); - sumOfSquares = __SMLALD(in32, in32, sumOfSquares); - sum += ((in32 << 16U) >> 16U); - sum += (in32 >> 16U); -#else - in = *pSrc++; - sumOfSquares += (in * in); - sum += in; - - in = *pSrc++; - sumOfSquares += (in * in); - sum += in; - - in = *pSrc++; - sumOfSquares += (in * in); - sum += in; - - in = *pSrc++; - sumOfSquares += (in * in); - sum += in; -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - /* C = A[0] + A[1] + ... + A[blockSize-1] */ - - in = *pSrc++; - /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ - sumOfSquares += (in * in); - /* Compute sum and store result in a temporary variable, sum. */ - sum += in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */ - meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U)); - - /* Compute square of mean */ - squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U))); - - /* mean of squares minus the square of mean. */ - /* Compute standard deviation and store result in destination */ - arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15U, 16U), pResult); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of STD group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c deleted file mode 100644 index 39177a9..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c +++ /dev/null @@ -1,159 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_std_q31.c - * Description: Standard deviation of the elements of a Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup STD - @{ - */ - -/** - @brief Standard deviation of the elements of a Q31 vector. - @param[in] pSrc points to the input vector. - @param[in] blockSize number of samples in input vector. - @param[out] pResult standard deviation value returned here. - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The input is represented in 1.31 format, which is then downshifted by 8 bits - which yields 1.23, and intermediate multiplication yields a 2.46 format. - The accumulator maintains full precision of the intermediate multiplication results, - but provides only a 16 guard bits. - There is no saturation on intermediate additions. - If the accumulator overflows it wraps around and distorts the result. - In order to avoid overflows completely the input signal must be scaled down by - log2(blockSize)-8 bits, as a total of blockSize additions are performed internally. - After division, internal variables should be Q18.46 - Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_std_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - q31_t var=0; - - arm_var_q31(pSrc, blockSize, &var); - arm_sqrt_q31(var, pResult); -} -#else -void arm_std_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t sum = 0; /* Accumulator */ - q63_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ - q63_t sumOfSquares = 0; /* Sum of squares */ - q31_t in; /* Temporary variable to store input value */ - - if (blockSize <= 1U) - { - *pResult = 0; - return; - } - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - /* C = A[0] + A[1] + ... + A[blockSize-1] */ - - in = *pSrc++ >> 8U; - /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ - sumOfSquares += ((q63_t) (in) * (in)); - /* Compute sum and store result in a temporary variable, sum. */ - sum += in; - - in = *pSrc++ >> 8U; - sumOfSquares += ((q63_t) (in) * (in)); - sum += in; - - in = *pSrc++ >> 8U; - sumOfSquares += ((q63_t) (in) * (in)); - sum += in; - - in = *pSrc++ >> 8U; - sumOfSquares += ((q63_t) (in) * (in)); - sum += in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - /* C = A[0] + A[1] + ... + A[blockSize-1] */ - - in = *pSrc++ >> 8U; - /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ - sumOfSquares += ((q63_t) (in) * (in)); - /* Compute sum and store result in a temporary variable, sum. */ - sum += in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */ - meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U)); - - /* Compute square of mean */ - squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U))); - - /* Compute standard deviation and store result in destination */ - arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15U, pResult); -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of STD group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f16.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f16.c deleted file mode 100644 index 03eeada..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f16.c +++ /dev/null @@ -1,209 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_var_f16.c - * Description: Variance of the elements of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions_f16.h" - - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupStats - */ - - -/** - @addtogroup variance - @{ - */ - -/** - @brief Variance of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult variance value returned here - @return none - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - - -void arm_var_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - int32_t blkCnt; /* loop counters */ - f16x8_t vecSrc; - f16x8_t sumVec = vdupq_n_f16(0.0f16); - float16_t fMean; - - if (blockSize <= 1U) { - *pResult = 0; - return; - } - - - arm_mean_f16(pSrc, blockSize, &fMean); - - blkCnt = blockSize; - do { - mve_pred16_t p = vctp16q(blkCnt); - - vecSrc = vldrhq_z_f16((float16_t const *) pSrc, p); - /* - * sum lanes - */ - vecSrc = vsubq_m(vuninitializedq_f16(), vecSrc, fMean, p); - sumVec = vfmaq_m(sumVec, vecSrc, vecSrc, p); - - blkCnt -= 8; - pSrc += 8; - } - while (blkCnt > 0); - - /* Variance */ - *pResult = (_Float16)vecAddAcrossF16Mve(sumVec) / (_Float16) (blockSize - 1.0f16); -} -#else - -void arm_var_f16( - const float16_t * pSrc, - uint32_t blockSize, - float16_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - _Float16 sum = 0.0f; /* Temporary result storage */ - _Float16 fSum = 0.0f; - _Float16 fMean, fValue; - const float16_t * pInput = pSrc; - - if (blockSize <= 1U) - { - *pResult = 0; - return; - } - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - - sum += (_Float16)*pInput++; - sum += (_Float16)*pInput++; - sum += (_Float16)*pInput++; - sum += (_Float16)*pInput++; - - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - - sum += (_Float16)*pInput++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - fMean = (_Float16)sum / (_Float16) blockSize; - - pInput = pSrc; - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - fValue = (_Float16)*pInput++ - (_Float16)fMean; - fSum += (_Float16)fValue * (_Float16)fValue; - - fValue = (_Float16)*pInput++ - (_Float16)fMean; - fSum += (_Float16)fValue * (_Float16)fValue; - - fValue = (_Float16)*pInput++ - (_Float16)fMean; - fSum += (_Float16)fValue * (_Float16)fValue; - - fValue = (_Float16)*pInput++ - (_Float16)fMean; - fSum += (_Float16)fValue * (_Float16)fValue; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - fValue = (_Float16)*pInput++ - (_Float16)fMean; - fSum += (_Float16)fValue * (_Float16)fValue; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Variance */ - *pResult = (_Float16)fSum / ((_Float16)blockSize - 1.0f16); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of variance group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c deleted file mode 100644 index 2d8b9a1..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c +++ /dev/null @@ -1,293 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_var_f32.c - * Description: Variance of the elements of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @defgroup variance Variance - - Calculates the variance of the elements in the input vector. - The underlying algorithm used is the direct method sometimes referred to as the two-pass method: - - 
-      Result = sum(element - meanOfElements)^2) / numElement - 1
-
-      meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize
-
- - There are separate functions for floating point, Q31, and Q15 data types. - */ - -/** - @addtogroup variance - @{ - */ - -/** - @brief Variance of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult variance value returned here - @return none - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -void arm_var_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - f32x4_t vecSrc; - f32x4_t sumVec = vdupq_n_f32(0.0f); - float32_t fMean; - float32_t sum = 0.0f; /* accumulator */ - float32_t in; /* Temporary variable to store input value */ - - if (blockSize <= 1U) { - *pResult = 0; - return; - } - - arm_mean_f32(pSrc, blockSize, &fMean); - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - - vecSrc = vldrwq_f32(pSrc); - /* - * sum lanes - */ - vecSrc = vsubq(vecSrc, fMean); - sumVec = vfmaq(sumVec, vecSrc, vecSrc); - - blkCnt --; - pSrc += 4; - } - - sum = vecAddAcrossF32Mve(sumVec); - - /* - * tail - */ - blkCnt = blockSize & 0x3; - while (blkCnt > 0U) - { - in = *pSrc++ - fMean; - sum += in * in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Variance */ - *pResult = sum / (float32_t) (blockSize - 1); -} -#else -#if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_var_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - float32_t mean; - - float32_t sum = 0.0f; /* accumulator */ - float32_t in; /* Temporary variable to store input value */ - uint32_t blkCnt; /* loop counter */ - - float32x4_t sumV = vdupq_n_f32(0.0f); /* Temporary result storage */ - float32x2_t sumV2; - float32x4_t inV; - float32x4_t avg; - - arm_mean_f32(pSrc,blockSize,&mean); - avg = vdupq_n_f32(mean); - - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* Compute Power and then store the result in a temporary variable, sum. */ - inV = vld1q_f32(pSrc); - inV = vsubq_f32(inV, avg); - sumV = vmlaq_f32(sumV, inV, inV); - pSrc += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); - sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1); - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ - /* compute power and then store the result in a temporary variable, sum. */ - in = *pSrc++; - in = in - mean; - sum += in * in; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Variance */ - *pResult = sum / (float32_t)(blockSize - 1.0f); - -} - -#else -void arm_var_f32( - const float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - float32_t sum = 0.0f; /* Temporary result storage */ - float32_t fSum = 0.0f; - float32_t fMean, fValue; - const float32_t * pInput = pSrc; - - if (blockSize <= 1U) - { - *pResult = 0; - return; - } - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - - sum += *pInput++; - sum += *pInput++; - sum += *pInput++; - sum += *pInput++; - - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - - sum += *pInput++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - fMean = sum / (float32_t) blockSize; - - pInput = pSrc; - -#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - fValue = *pInput++ - fMean; - fSum += fValue * fValue; - - fValue = *pInput++ - fMean; - fSum += fValue * fValue; - - fValue = *pInput++ - fMean; - fSum += fValue * fValue; - - fValue = *pInput++ - fMean; - fSum += fValue * fValue; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - fValue = *pInput++ - fMean; - fSum += fValue * fValue; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Variance */ - *pResult = fSum / (float32_t)(blockSize - 1.0f); -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of variance group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f64.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f64.c deleted file mode 100644 index e45bcc6..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f64.c +++ /dev/null @@ -1,100 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_var_f64.c - * Description: Variance of the elements of a floating-point vector - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup variance - @{ - */ - -/** - @brief Variance of the elements of a floating-point vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult variance value returned here - @return none - */ -void arm_var_f64( - const float64_t * pSrc, - uint32_t blockSize, - float64_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - float64_t sum = 0.; /* Temporary result storage */ - float64_t fSum = 0.; - float64_t fMean, fValue; - const float64_t * pInput = pSrc; - - if (blockSize <= 1U) - { - *pResult = 0; - return; - } - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ - - sum += *pInput++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ - fMean = sum / (float64_t) blockSize; - - pInput = pSrc; - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - fValue = *pInput++ - fMean; - fSum += fValue * fValue; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Variance */ - *pResult = fSum / (float64_t)(blockSize - 1.); -} - -/** - @} end of variance group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c deleted file mode 100644 index 9c41c7a..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c +++ /dev/null @@ -1,230 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_var_q15.c - * Description: Variance of an array of Q15 type - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup variance - @{ - */ - -/** - @brief Variance of the elements of a Q15 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult variance value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using a 64-bit internal accumulator. - The input is represented in 1.15 format. - Intermediate multiplication yields a 2.30 format, and this - result is added without saturation to a 64-bit accumulator in 34.30 format. - With 33 guard bits in the accumulator, there is no risk of overflow, and the - full precision of the intermediate multiplication is preserved. - Finally, the 34.30 result is truncated to 34.15 format by discarding the lower - 15 bits, and then saturated to yield a result in 1.15 format. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_var_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q15x8_t vecSrc; - q63_t sumOfSquares = 0LL; - q63_t meanOfSquares, squareOfMean; /* square of mean and mean of square */ - q63_t sum = 0LL; - q15_t in; - - if (blockSize <= 1U) { - *pResult = 0; - return; - } - - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - vecSrc = vldrhq_s16(pSrc); - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sumOfSquares. */ - - sumOfSquares = vmlaldavaq_s16(sumOfSquares, vecSrc, vecSrc); - sum = vaddvaq_s16(sum, vecSrc); - - blkCnt --; - pSrc += 8; - } - - /* Tail */ - blkCnt = blockSize & 7; - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - /* C = A[0] + A[1] + ... + A[blockSize-1] */ - - in = *pSrc++; - /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ -#if defined (ARM_MATH_DSP) - sumOfSquares = __SMLALD(in, in, sumOfSquares); -#else - sumOfSquares += (in * in); -#endif /* #if defined (ARM_MATH_DSP) */ - /* Compute sum and store result in a temporary variable, sum. */ - sum += in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - meanOfSquares = arm_div_q63_to_q31(sumOfSquares, (blockSize - 1U)); - - /* Compute square of mean */ - squareOfMean = arm_div_q63_to_q31((q63_t)sum * sum, (q31_t)(blockSize * (blockSize - 1U))); - - /* mean of the squares minus the square of the mean. */ - *pResult = (meanOfSquares - squareOfMean) >> 15; -} -#else -void arm_var_q15( - const q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q31_t sum = 0; /* Accumulator */ - q31_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ - q63_t sumOfSquares = 0; /* Sum of squares */ - q15_t in; /* Temporary variable to store input value */ - -#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) - q31_t in32; /* Temporary variable to store input value */ -#endif - - if (blockSize <= 1U) - { - *pResult = 0; - return; - } - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - /* C = A[0] + A[1] + ... + A[blockSize-1] */ - - /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ - /* Compute sum and store result in a temporary variable, sum. */ -#if defined (ARM_MATH_DSP) - in32 = read_q15x2_ia (&pSrc); - sumOfSquares = __SMLALD(in32, in32, sumOfSquares); - sum += ((in32 << 16U) >> 16U); - sum += (in32 >> 16U); - - in32 = read_q15x2_ia (&pSrc); - sumOfSquares = __SMLALD(in32, in32, sumOfSquares); - sum += ((in32 << 16U) >> 16U); - sum += (in32 >> 16U); -#else - in = *pSrc++; - sumOfSquares += (in * in); - sum += in; - - in = *pSrc++; - sumOfSquares += (in * in); - sum += in; - - in = *pSrc++; - sumOfSquares += (in * in); - sum += in; - - in = *pSrc++; - sumOfSquares += (in * in); - sum += in; -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - /* C = A[0] + A[1] + ... + A[blockSize-1] */ - - in = *pSrc++; - /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ -#if defined (ARM_MATH_DSP) - sumOfSquares = __SMLALD(in, in, sumOfSquares); -#else - sumOfSquares += (in * in); -#endif /* #if defined (ARM_MATH_DSP) */ - /* Compute sum and store result in a temporary variable, sum. */ - sum += in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */ - meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U)); - - /* Compute square of mean */ - squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U))); - - /* mean of squares minus the square of mean. */ - *pResult = (meanOfSquares - squareOfMean) >> 15U; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of variance group - */ diff --git a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c b/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c deleted file mode 100644 index 725ae8b..0000000 --- a/Drivers/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c +++ /dev/null @@ -1,214 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_var_q31.c - * Description: Variance of an array of Q31 type - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/statistics_functions.h" - -/** - @ingroup groupStats - */ - -/** - @addtogroup variance - @{ - */ - -/** - @brief Variance of the elements of a Q31 vector. - @param[in] pSrc points to the input vector - @param[in] blockSize number of samples in input vector - @param[out] pResult variance value returned here - @return none - - @par Scaling and Overflow Behavior - The function is implemented using an internal 64-bit accumulator. - The input is represented in 1.31 format, which is then downshifted by 8 bits - which yields 1.23, and intermediate multiplication yields a 2.46 format. - The accumulator maintains full precision of the intermediate multiplication results, - and as a consequence has only 16 guard bits. - There is no saturation on intermediate additions. - If the accumulator overflows it wraps around and distorts the result. - In order to avoid overflows completely the input signal must be scaled down by - log2(blockSize)-8 bits, as a total of blockSize additions are performed internally. - After division, internal variables should be Q18.46 - Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value. - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_var_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecSrc; - q63_t sumOfSquares = 0LL; - q63_t meanOfSquares, squareOfMean; /* square of mean and mean of square */ - q63_t sum = 0LL; - q31_t in; - - if (blockSize <= 1U) { - *pResult = 0; - return; - } - - - /* Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - while (blkCnt > 0U) - { - vecSrc = vldrwq_s32(pSrc); - /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ - /* Compute Sum of squares of the input samples - * and then store the result in a temporary variable, sumOfSquares. */ - - /* downscale */ - vecSrc = vshrq(vecSrc, 8); - sumOfSquares = vmlaldavaq(sumOfSquares, vecSrc, vecSrc); - sum = vaddlvaq(sum, vecSrc); - - blkCnt --; - pSrc += 4; - } - - - /* - * tail - */ - blkCnt = blockSize & 0x3; - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - /* C = A[0] + A[1] + ... + A[blockSize-1] */ - - in = *pSrc++ >> 8U; - /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ - sumOfSquares += ((q63_t) (in) * (in)); - /* Compute sum and store result in a temporary variable, sum. */ - sum += in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Compute Mean of squares of the input samples - * and then store the result in a temporary variable, meanOfSquares. */ - meanOfSquares = sumOfSquares / (q63_t) (blockSize - 1U); - - /* Compute square of mean */ - squareOfMean = sum * sum / (q63_t) (blockSize * (blockSize - 1U)); - - /* Compute standard deviation and then store the result to the destination */ - *pResult = asrl(meanOfSquares - squareOfMean, 15U); -} -#else -void arm_var_q31( - const q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult) -{ - uint32_t blkCnt; /* Loop counter */ - q63_t sum = 0; /* Temporary result storage */ - q63_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ - q63_t sumOfSquares = 0; /* Sum of squares */ - q31_t in; /* Temporary variable to store input value */ - - if (blockSize <= 1U) - { - *pResult = 0; - return; - } - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - /* C = A[0] + A[1] + ... + A[blockSize-1] */ - - in = *pSrc++ >> 8U; - /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ - sumOfSquares += ((q63_t) (in) * (in)); - /* Compute sum and store result in a temporary variable, sum. */ - sum += in; - - in = *pSrc++ >> 8U; - sumOfSquares += ((q63_t) (in) * (in)); - sum += in; - - in = *pSrc++ >> 8U; - sumOfSquares += ((q63_t) (in) * (in)); - sum += in; - - in = *pSrc++ >> 8U; - sumOfSquares += ((q63_t) (in) * (in)); - sum += in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ - /* C = A[0] + A[1] + ... + A[blockSize-1] */ - - in = *pSrc++ >> 8U; - /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ - sumOfSquares += ((q63_t) (in) * (in)); - /* Compute sum and store result in a temporary variable, sum. */ - sum += in; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */ - meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U)); - - /* Compute square of mean */ - squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U))); - - /* Compute variance and store result in destination */ - *pResult = (meanOfSquares - squareOfMean) >> 15U; -} -#endif -/** - @} end of variance group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/SupportFunctions/CMakeLists.txt deleted file mode 100644 index 5f4daee..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/CMakeLists.txt +++ /dev/null @@ -1,28 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPSupport) - -include(configLib) -include(configDsp) - -file(GLOB SRC "./*_*.c") - -add_library(CMSISDSPSupport STATIC ${SRC}) - -configLib(CMSISDSPSupport ${ROOT}) -configDsp(CMSISDSPSupport ${ROOT}) - -### Includes -target_include_directories(CMSISDSPSupport PUBLIC "${DSP}/Include") - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPSupport PRIVATE arm_copy_f16.c) -target_sources(CMSISDSPSupport PRIVATE arm_fill_f16.c) -target_sources(CMSISDSPSupport PRIVATE arm_f16_to_q15.c) -target_sources(CMSISDSPSupport PRIVATE arm_q15_to_f16.c) -target_sources(CMSISDSPSupport PRIVATE arm_float_to_f16.c) -target_sources(CMSISDSPSupport PRIVATE arm_f16_to_float.c) -target_sources(CMSISDSPSupport PRIVATE arm_weighted_sum_f16.c) -target_sources(CMSISDSPSupport PRIVATE arm_barycenter_f16.c) -endif() - diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c deleted file mode 100644 index 325bc48..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c +++ /dev/null @@ -1,63 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: SupportFunctions.c - * Description: Combination of all support function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_barycenter_f32.c" -#include "arm_bitonic_sort_f32.c" -#include "arm_bubble_sort_f32.c" -#include "arm_copy_f32.c" -#include "arm_copy_f64.c" -#include "arm_copy_q15.c" -#include "arm_copy_q31.c" -#include "arm_copy_q7.c" -#include "arm_fill_f32.c" -#include "arm_fill_f64.c" -#include "arm_fill_q15.c" -#include "arm_fill_q31.c" -#include "arm_fill_q7.c" -#include "arm_heap_sort_f32.c" -#include "arm_insertion_sort_f32.c" -#include "arm_merge_sort_f32.c" -#include "arm_merge_sort_init_f32.c" -#include "arm_quick_sort_f32.c" -#include "arm_selection_sort_f32.c" -#include "arm_sort_f32.c" -#include "arm_sort_init_f32.c" -#include "arm_weighted_sum_f32.c" - -#include "arm_float_to_q15.c" -#include "arm_float_to_q31.c" -#include "arm_float_to_q7.c" -#include "arm_q15_to_float.c" -#include "arm_q15_to_q31.c" -#include "arm_q15_to_q7.c" -#include "arm_q31_to_float.c" -#include "arm_q31_to_q15.c" -#include "arm_q31_to_q7.c" -#include "arm_q7_to_float.c" -#include "arm_q7_to_q15.c" -#include "arm_q7_to_q31.c" diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c deleted file mode 100644 index e30edb3..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c +++ /dev/null @@ -1,36 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: SupportFunctions.c - * Description: Combination of all support function source files. - * - * $Date: 16. March 2020 - * $Revision: V1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_copy_f16.c" -#include "arm_fill_f16.c" -#include "arm_f16_to_q15.c" -#include "arm_f16_to_float.c" -#include "arm_q15_to_f16.c" -#include "arm_float_to_f16.c" -#include "arm_weighted_sum_f16.c" -#include "arm_barycenter_f16.c" diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f16.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f16.c deleted file mode 100644 index ddc097f..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f16.c +++ /dev/null @@ -1,274 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_barycenter_f16.c - * Description: Barycenter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -#include -#include - -/** - @ingroup groupSupport - */ - -/** - @defgroup barycenter Barycenter - - Barycenter of weighted vectors - */ - -/** - @addtogroup barycenter - @{ - */ - - -/** - * @brief Barycenter - * - * - * @param[in] *in List of vectors - * @param[in] *weights Weights of the vectors - * @param[out] *out Barycenter - * @param[in] nbVectors Number of vectors - * @param[in] vecDim Dimension of space (vector dimension) - * @return None - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_barycenter_f16(const float16_t *in, - const float16_t *weights, - float16_t *out, - uint32_t nbVectors, - uint32_t vecDim) -{ - const float16_t *pIn, *pW; - const float16_t *pIn1, *pIn2, *pIn3, *pIn4; - float16_t *pOut; - uint32_t blkCntVector, blkCntSample; - float16_t accum, w; - - blkCntVector = nbVectors; - blkCntSample = vecDim; - - accum = 0.0f; - - pW = weights; - pIn = in; - - - arm_fill_f16(0.0f, out, vecDim); - - - /* Sum */ - pIn1 = pIn; - pIn2 = pIn1 + vecDim; - pIn3 = pIn2 + vecDim; - pIn4 = pIn3 + vecDim; - - blkCntVector = nbVectors >> 2; - while (blkCntVector > 0) - { - f16x8_t outV, inV1, inV2, inV3, inV4; - float16_t w1, w2, w3, w4; - - pOut = out; - w1 = *pW++; - w2 = *pW++; - w3 = *pW++; - w4 = *pW++; - accum += (_Float16)w1 + (_Float16)w2 + (_Float16)w3 + (_Float16)w4; - - blkCntSample = vecDim >> 3; - while (blkCntSample > 0) { - outV = vld1q((const float16_t *) pOut); - inV1 = vld1q(pIn1); - inV2 = vld1q(pIn2); - inV3 = vld1q(pIn3); - inV4 = vld1q(pIn4); - outV = vfmaq(outV, inV1, w1); - outV = vfmaq(outV, inV2, w2); - outV = vfmaq(outV, inV3, w3); - outV = vfmaq(outV, inV4, w4); - vst1q(pOut, outV); - - pOut += 8; - pIn1 += 8; - pIn2 += 8; - pIn3 += 8; - pIn4 += 8; - - blkCntSample--; - } - - blkCntSample = vecDim & 7; - while (blkCntSample > 0) { - *pOut = (_Float16)*pOut + (_Float16)*pIn1++ * (_Float16)w1; - *pOut = (_Float16)*pOut + (_Float16)*pIn2++ * (_Float16)w2; - *pOut = (_Float16)*pOut + (_Float16)*pIn3++ * (_Float16)w3; - *pOut = (_Float16)*pOut + (_Float16)*pIn4++ * (_Float16)w4; - pOut++; - blkCntSample--; - } - - pIn1 += 3 * vecDim; - pIn2 += 3 * vecDim; - pIn3 += 3 * vecDim; - pIn4 += 3 * vecDim; - - blkCntVector--; - } - - pIn = pIn1; - - blkCntVector = nbVectors & 3; - while (blkCntVector > 0) - { - f16x8_t inV, outV; - - pOut = out; - w = *pW++; - accum += (_Float16)w; - - blkCntSample = vecDim >> 3; - while (blkCntSample > 0) - { - outV = vld1q_f16(pOut); - inV = vld1q_f16(pIn); - outV = vfmaq(outV, inV, w); - vst1q_f16(pOut, outV); - pOut += 8; - pIn += 8; - - blkCntSample--; - } - - blkCntSample = vecDim & 7; - while (blkCntSample > 0) - { - *pOut = (_Float16)*pOut + (_Float16)*pIn++ * (_Float16)w; - pOut++; - blkCntSample--; - } - - blkCntVector--; - } - - /* Normalize */ - pOut = out; - accum = 1.0f16 / (_Float16)accum; - - blkCntSample = vecDim >> 3; - while (blkCntSample > 0) - { - f16x8_t tmp; - - tmp = vld1q((const float16_t *) pOut); - tmp = vmulq(tmp, accum); - vst1q(pOut, tmp); - pOut += 8; - blkCntSample--; - } - - blkCntSample = vecDim & 7; - while (blkCntSample > 0) - { - *pOut = (_Float16)*pOut * (_Float16)accum; - pOut++; - blkCntSample--; - } -} -#else -void arm_barycenter_f16(const float16_t *in, const float16_t *weights, float16_t *out, uint32_t nbVectors,uint32_t vecDim) -{ - - const float16_t *pIn,*pW; - float16_t *pOut; - uint32_t blkCntVector,blkCntSample; - float16_t accum, w; - - blkCntVector = nbVectors; - blkCntSample = vecDim; - - accum = 0.0f16; - - pW = weights; - pIn = in; - - /* Set counters to 0 */ - blkCntSample = vecDim; - pOut = out; - - while(blkCntSample > 0) - { - *pOut = 0.0f16; - pOut++; - blkCntSample--; - } - - /* Sum */ - while(blkCntVector > 0) - { - pOut = out; - w = *pW++; - accum += (_Float16)w; - - blkCntSample = vecDim; - while(blkCntSample > 0) - { - *pOut = (_Float16)*pOut + (_Float16)*pIn++ * (_Float16)w; - pOut++; - blkCntSample--; - } - - blkCntVector--; - } - - /* Normalize */ - blkCntSample = vecDim; - pOut = out; - - while(blkCntSample > 0) - { - *pOut = (_Float16)*pOut / (_Float16)accum; - pOut++; - blkCntSample--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of barycenter group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f32.c deleted file mode 100644 index a148ac6..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f32.c +++ /dev/null @@ -1,414 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_barycenter_f32.c - * Description: Barycenter - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" -#include -#include - - -/** - @ingroup barycenter - */ - - -/** - * @brief Barycenter - * - * - * @param[in] *in List of vectors - * @param[in] *weights Weights of the vectors - * @param[out] *out Barycenter - * @param[in] nbVectors Number of vectors - * @param[in] vecDim Dimension of space (vector dimension) - * @return None - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_barycenter_f32(const float32_t *in, - const float32_t *weights, - float32_t *out, - uint32_t nbVectors, - uint32_t vecDim) -{ - const float32_t *pIn, *pW; - const float32_t *pIn1, *pIn2, *pIn3, *pIn4; - float32_t *pOut; - uint32_t blkCntVector, blkCntSample; - float32_t accum, w; - - blkCntVector = nbVectors; - blkCntSample = vecDim; - - accum = 0.0f; - - pW = weights; - pIn = in; - - - arm_fill_f32(0.0f, out, vecDim); - - - /* Sum */ - pIn1 = pIn; - pIn2 = pIn1 + vecDim; - pIn3 = pIn2 + vecDim; - pIn4 = pIn3 + vecDim; - - blkCntVector = nbVectors >> 2; - while (blkCntVector > 0) - { - f32x4_t outV, inV1, inV2, inV3, inV4; - float32_t w1, w2, w3, w4; - - pOut = out; - w1 = *pW++; - w2 = *pW++; - w3 = *pW++; - w4 = *pW++; - accum += w1 + w2 + w3 + w4; - - blkCntSample = vecDim >> 2; - while (blkCntSample > 0) { - outV = vld1q((const float32_t *) pOut); - inV1 = vld1q(pIn1); - inV2 = vld1q(pIn2); - inV3 = vld1q(pIn3); - inV4 = vld1q(pIn4); - outV = vfmaq(outV, inV1, w1); - outV = vfmaq(outV, inV2, w2); - outV = vfmaq(outV, inV3, w3); - outV = vfmaq(outV, inV4, w4); - vst1q(pOut, outV); - - pOut += 4; - pIn1 += 4; - pIn2 += 4; - pIn3 += 4; - pIn4 += 4; - - blkCntSample--; - } - - blkCntSample = vecDim & 3; - while (blkCntSample > 0) { - *pOut = *pOut + *pIn1++ * w1; - *pOut = *pOut + *pIn2++ * w2; - *pOut = *pOut + *pIn3++ * w3; - *pOut = *pOut + *pIn4++ * w4; - pOut++; - blkCntSample--; - } - - pIn1 += 3 * vecDim; - pIn2 += 3 * vecDim; - pIn3 += 3 * vecDim; - pIn4 += 3 * vecDim; - - blkCntVector--; - } - - pIn = pIn1; - - blkCntVector = nbVectors & 3; - while (blkCntVector > 0) - { - f32x4_t inV, outV; - - pOut = out; - w = *pW++; - accum += w; - - blkCntSample = vecDim >> 2; - while (blkCntSample > 0) - { - outV = vld1q_f32(pOut); - inV = vld1q_f32(pIn); - outV = vfmaq(outV, inV, w); - vst1q_f32(pOut, outV); - pOut += 4; - pIn += 4; - - blkCntSample--; - } - - blkCntSample = vecDim & 3; - while (blkCntSample > 0) - { - *pOut = *pOut + *pIn++ * w; - pOut++; - blkCntSample--; - } - - blkCntVector--; - } - - /* Normalize */ - pOut = out; - accum = 1.0f / accum; - - blkCntSample = vecDim >> 2; - while (blkCntSample > 0) - { - f32x4_t tmp; - - tmp = vld1q((const float32_t *) pOut); - tmp = vmulq(tmp, accum); - vst1q(pOut, tmp); - pOut += 4; - blkCntSample--; - } - - blkCntSample = vecDim & 3; - while (blkCntSample > 0) - { - *pOut = *pOut * accum; - pOut++; - blkCntSample--; - } -} -#else -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" -void arm_barycenter_f32(const float32_t *in, const float32_t *weights, float32_t *out, uint32_t nbVectors,uint32_t vecDim) -{ - - const float32_t *pIn,*pW, *pIn1, *pIn2, *pIn3, *pIn4; - float32_t *pOut; - uint32_t blkCntVector,blkCntSample; - float32_t accum, w,w1,w2,w3,w4; - - float32x4_t tmp, inV,outV, inV1, inV2, inV3, inV4; - - blkCntVector = nbVectors; - blkCntSample = vecDim; - - accum = 0.0f; - - pW = weights; - pIn = in; - - /* Set counters to 0 */ - tmp = vdupq_n_f32(0.0f); - pOut = out; - - blkCntSample = vecDim >> 2; - while(blkCntSample > 0) - { - vst1q_f32(pOut, tmp); - pOut += 4; - blkCntSample--; - } - - blkCntSample = vecDim & 3; - while(blkCntSample > 0) - { - *pOut = 0.0f; - pOut++; - blkCntSample--; - } - - /* Sum */ - - pIn1 = pIn; - pIn2 = pIn1 + vecDim; - pIn3 = pIn2 + vecDim; - pIn4 = pIn3 + vecDim; - - blkCntVector = nbVectors >> 2; - while(blkCntVector > 0) - { - pOut = out; - w1 = *pW++; - w2 = *pW++; - w3 = *pW++; - w4 = *pW++; - accum += w1 + w2 + w3 + w4; - - blkCntSample = vecDim >> 2; - while(blkCntSample > 0) - { - outV = vld1q_f32(pOut); - inV1 = vld1q_f32(pIn1); - inV2 = vld1q_f32(pIn2); - inV3 = vld1q_f32(pIn3); - inV4 = vld1q_f32(pIn4); - outV = vmlaq_n_f32(outV,inV1,w1); - outV = vmlaq_n_f32(outV,inV2,w2); - outV = vmlaq_n_f32(outV,inV3,w3); - outV = vmlaq_n_f32(outV,inV4,w4); - vst1q_f32(pOut, outV); - pOut += 4; - pIn1 += 4; - pIn2 += 4; - pIn3 += 4; - pIn4 += 4; - - blkCntSample--; - } - - blkCntSample = vecDim & 3; - while(blkCntSample > 0) - { - *pOut = *pOut + *pIn1++ * w1; - *pOut = *pOut + *pIn2++ * w2; - *pOut = *pOut + *pIn3++ * w3; - *pOut = *pOut + *pIn4++ * w4; - pOut++; - blkCntSample--; - } - - pIn1 += 3*vecDim; - pIn2 += 3*vecDim; - pIn3 += 3*vecDim; - pIn4 += 3*vecDim; - - blkCntVector--; - } - - pIn = pIn1; - - blkCntVector = nbVectors & 3; - while(blkCntVector > 0) - { - pOut = out; - w = *pW++; - accum += w; - - blkCntSample = vecDim >> 2; - while(blkCntSample > 0) - { - outV = vld1q_f32(pOut); - inV = vld1q_f32(pIn); - outV = vmlaq_n_f32(outV,inV,w); - vst1q_f32(pOut, outV); - pOut += 4; - pIn += 4; - - blkCntSample--; - } - - blkCntSample = vecDim & 3; - while(blkCntSample > 0) - { - *pOut = *pOut + *pIn++ * w; - pOut++; - blkCntSample--; - } - - blkCntVector--; - } - - /* Normalize */ - pOut = out; - accum = 1.0f / accum; - - blkCntSample = vecDim >> 2; - while(blkCntSample > 0) - { - tmp = vld1q_f32(pOut); - tmp = vmulq_n_f32(tmp,accum); - vst1q_f32(pOut, tmp); - pOut += 4; - blkCntSample--; - } - - blkCntSample = vecDim & 3; - while(blkCntSample > 0) - { - *pOut = *pOut * accum; - pOut++; - blkCntSample--; - } - -} -#else -void arm_barycenter_f32(const float32_t *in, const float32_t *weights, float32_t *out, uint32_t nbVectors,uint32_t vecDim) -{ - - const float32_t *pIn,*pW; - float32_t *pOut; - uint32_t blkCntVector,blkCntSample; - float32_t accum, w; - - blkCntVector = nbVectors; - blkCntSample = vecDim; - - accum = 0.0f; - - pW = weights; - pIn = in; - - /* Set counters to 0 */ - blkCntSample = vecDim; - pOut = out; - - while(blkCntSample > 0) - { - *pOut = 0.0f; - pOut++; - blkCntSample--; - } - - /* Sum */ - while(blkCntVector > 0) - { - pOut = out; - w = *pW++; - accum += w; - - blkCntSample = vecDim; - while(blkCntSample > 0) - { - *pOut = *pOut + *pIn++ * w; - pOut++; - blkCntSample--; - } - - blkCntVector--; - } - - /* Normalize */ - blkCntSample = vecDim; - pOut = out; - - while(blkCntSample > 0) - { - *pOut = *pOut / accum; - pOut++; - blkCntSample--; - } - -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of barycenter group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_bitonic_sort_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_bitonic_sort_f32.c deleted file mode 100644 index 2ee08fb..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_bitonic_sort_f32.c +++ /dev/null @@ -1,1039 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_bitonic_sort_f32.c - * Description: Floating point bitonic sort - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" -#include "arm_sorting.h" - - -#if !defined(ARM_MATH_NEON) - -static void arm_bitonic_sort_core_f32(float32_t *pSrc, uint32_t n, uint8_t dir) -{ - uint32_t step; - uint32_t k, j; - float32_t *leftPtr, *rightPtr; - float32_t temp; - - step = n>>1; - leftPtr = pSrc; - rightPtr = pSrc+n-1; - - for(k=0; k *rightPtr)) - { - // Swap - temp=*leftPtr; - *leftPtr=*rightPtr; - *rightPtr=temp; - } - - leftPtr++; // Move right - rightPtr--; // Move left - } - - // Merge - for(step=(n>>2); step>0; step/=2) - { - for(j=0; j *rightPtr) - { - // Swap - temp=*leftPtr; - *leftPtr=*rightPtr; - *rightPtr=temp; - } - - leftPtr++; - rightPtr++; - } - } - } -} -#endif - -#if defined(ARM_MATH_NEON) - - -static float32x4x2_t arm_bitonic_resort_8_f32(float32x4_t a, float32x4_t b, uint8_t dir) -{ - /* Start with two vectors: - * +---+---+---+---+ - * | a | b | c | d | - * +---+---+---+---+ - * +---+---+---+---+ - * | e | f | g | h | - * +---+---+---+---+ - * All the elements of the first are guaranteed to be less than or equal to - * all of the elements in the second, and both vectors are bitonic. - * We need to perform these operations to completely sort both lists: - * vminmax([abcd],[efgh]) - * vminmax([acbd],[egfh]) - */ - vtrn128_64q(a, b); - /* +---+---+---+---+ - * | a | b | e | f | - * +---+---+---+---+ - * +---+---+---+---+ - * | c | d | g | h | - * +---+---+---+---+ - */ - if(dir) - vminmaxq(a, b); - else - vminmaxq(b, a); - - vtrn128_32q(a, b); - /* +---+---+---+---+ - * | a | c | e | g | - * +---+---+---+---+ - * +---+---+---+---+ - * | b | d | f | h | - * +---+---+---+---+ - */ - if(dir) - vminmaxq(a, b); - else - vminmaxq(b, a); - - return vzipq_f32(a, b); -} - - -static float32x4x2_t arm_bitonic_merge_8_f32(float32x4_t a, float32x4_t b, uint8_t dir) -{ - /* a and b are guaranteed to be bitonic */ - // Reverse the element of the second vector - b = vrev128q_f32(b); - - // Compare the two vectors - if(dir) - vminmaxq(a, b); - else - vminmaxq(b, a); - - // Merge the two vectors - float32x4x2_t ab = arm_bitonic_resort_8_f32(a, b, dir); - - return ab; -} - -static void arm_bitonic_resort_16_f32(float32_t * pOut, float32x4x2_t a, float32x4x2_t b, uint8_t dir) -{ - /* Start with two vectors: - * +---+---+---+---+---+---+---+---+ - * | a | b | c | d | e | f | g | h | - * +---+---+---+---+---+---+---+---+ - * +---+---+---+---+---+---+---+---+ - * | i | j | k | l | m | n | o | p | - * +---+---+---+---+---+---+---+---+ - * All the elements of the first are guaranteed to be less than or equal to - * all of the elements in the second, and both vectors are bitonic. - * We need to perform these operations to completely sort both lists: - * vminmax([abcd],[efgh]) vminmax([ijkl],[mnop]) - * vminmax([abef],[cdgh]) vminmax([ijmn],[klop]) - * vminmax([acef],[bdfh]) vminmax([ikmo],[jlmp]) - */ - - vtrn256_128q(a, b); - /* +---+---+---+---+---+---+---+---+ - * | a | b | c | d | i | j | k | l | - * +---+---+---+---+---+---+---+---+ - * +---+---+---+---+---+---+---+---+ - * | e | f | g | h | m | n | o | p | - * +---+---+---+---+---+---+---+---+ - */ - if(dir) - vminmax256q(a, b); - else - vminmax256q(b, a); - - vtrn256_64q(a, b); - - /* +---+---+---+---+---+---+---+---+ - * | a | b | e | f | i | j | m | n | - * +---+---+---+---+---+---+---+---+ - * +---+---+---+---+---+---+---+---+ - * | c | d | g | h | k | l | o | p | - * +---+---+---+---+---+---+---+---+ - */ - if(dir) - vminmax256q(a, b); - else - vminmax256q(b, a); - - vtrn256_32q(a, b); - /* We now have: - * +---+---+---+---+---+---+---+---+ - * | a | c | e | g | i | k | m | o | - * +---+---+---+---+---+---+---+---+ - * +---+---+---+---+---+---+---+---+ - * | b | d | f | h | j | l | n | p | - * +---+---+---+---+---+---+---+---+ - */ - if(dir) - vminmax256q(a, b); - else - vminmax256q(b, a); - - float32x4x2_t out1 = vzipq_f32(a.val[0], b.val[0]); - float32x4x2_t out2 = vzipq_f32(a.val[1], b.val[1]); - - vst1q_f32(pOut, out1.val[0]); - vst1q_f32(pOut+4, out1.val[1]); - vst1q_f32(pOut+8, out2.val[0]); - vst1q_f32(pOut+12, out2.val[1]); -} - -static void arm_bitonic_merge_16_f32(float32_t * pOut, float32x4x2_t a, float32x4x2_t b, uint8_t dir) -{ - // Merge two preordered float32x4x2_t - vrev256q_f32(b); - - if(dir) - vminmax256q(a, b); - else - vminmax256q(b, a); - - arm_bitonic_resort_16_f32(pOut, a, b, dir); -} - -static void arm_bitonic_sort_16_f32(float32_t *pSrc, float32_t *pDst, uint8_t dir) -{ - float32x4_t a; - float32x4_t b; - float32x4_t c; - float32x4_t d; - - // Load 16 samples - a = vld1q_f32(pSrc); - b = vld1q_f32(pSrc+4); - c = vld1q_f32(pSrc+8); - d = vld1q_f32(pSrc+12); - - // Bitonic sorting network for 4 samples x 4 times - if(dir) - { - vminmaxq(a, b); - vminmaxq(c, d); - - vminmaxq(a, d); - vminmaxq(b, c); - - vminmaxq(a, b); - vminmaxq(c, d); - } - else - { - vminmaxq(b, a); - vminmaxq(d, c); - - vminmaxq(d, a); - vminmaxq(c, b); - - vminmaxq(b, a); - vminmaxq(d, c); - } - - float32x4x2_t ab = vtrnq_f32 (a, b); - float32x4x2_t cd = vtrnq_f32 (c, d); - - // Transpose 4 ordered arrays of 4 samples - a = vcombine_f32(vget_low_f32(ab.val[0]), vget_low_f32(cd.val[0])); - b = vcombine_f32(vget_low_f32(ab.val[1]), vget_low_f32(cd.val[1])); - c = vcombine_f32(vget_high_f32(ab.val[0]), vget_high_f32(cd.val[0])); - d = vcombine_f32(vget_high_f32(ab.val[1]), vget_high_f32(cd.val[1])); - - // Merge pairs of arrays of 4 samples - ab = arm_bitonic_merge_8_f32(a, b, dir); - cd = arm_bitonic_merge_8_f32(c, d, dir); - - // Merge arrays of 8 samples - arm_bitonic_merge_16_f32(pDst, ab, cd, dir); -} - - - - - -static void arm_bitonic_merge_32_f32(float32_t * pSrc, float32x4x2_t ab1, float32x4x2_t ab2, float32x4x2_t cd1, float32x4x2_t cd2, uint8_t dir) -{ - //Compare - if(dir) - { - vminmax256q(ab1, cd1); - vminmax256q(ab2, cd2); - } - else - { - vminmax256q(cd1, ab1); - vminmax256q(cd2, ab2); - } - //Transpose 256 - float32x4_t temp; - - temp = ab2.val[0]; - ab2.val[0] = cd1.val[0]; - cd1.val[0] = temp; - temp = ab2.val[1]; - ab2.val[1] = cd1.val[1]; - cd1.val[1] = temp; - - //Compare - if(dir) - { - vminmax256q(ab1, cd1); - vminmax256q(ab2, cd2); - } - else - { - vminmax256q(cd1, ab1); - vminmax256q(cd2, ab2); - } - - //Transpose 128 - arm_bitonic_merge_16_f32(pSrc+0, ab1, cd1, dir); - arm_bitonic_merge_16_f32(pSrc+16, ab2, cd2, dir); -} - -static void arm_bitonic_merge_64_f32(float32_t * pSrc, uint8_t dir) -{ - float32x4x2_t ab1, ab2, ab3, ab4; - float32x4x2_t cd1, cd2, cd3, cd4; - - //Load and reverse second array - ab1.val[0] = vld1q_f32(pSrc+0 ); - ab1.val[1] = vld1q_f32(pSrc+4 ); - ab2.val[0] = vld1q_f32(pSrc+8 ); - ab2.val[1] = vld1q_f32(pSrc+12); - ab3.val[0] = vld1q_f32(pSrc+16); - ab3.val[1] = vld1q_f32(pSrc+20); - ab4.val[0] = vld1q_f32(pSrc+24); - ab4.val[1] = vld1q_f32(pSrc+28); - - vldrev128q_f32(cd4.val[1], pSrc+32); - vldrev128q_f32(cd4.val[0], pSrc+36); - vldrev128q_f32(cd3.val[1], pSrc+40); - vldrev128q_f32(cd3.val[0], pSrc+44); - vldrev128q_f32(cd2.val[1], pSrc+48); - vldrev128q_f32(cd2.val[0], pSrc+52); - vldrev128q_f32(cd1.val[1], pSrc+56); - vldrev128q_f32(cd1.val[0], pSrc+60); - - //Compare - if(dir) - { - vminmax256q(ab1, cd1); - vminmax256q(ab2, cd2); - vminmax256q(ab3, cd3); - vminmax256q(ab4, cd4); - } - else - { - vminmax256q(cd1, ab1); - vminmax256q(cd2, ab2); - vminmax256q(cd3, ab3); - vminmax256q(cd4, ab4); - } - - //Transpose 512 - float32x4_t temp; - - temp = ab3.val[0]; - ab3.val[0] = cd1.val[0]; - cd1.val[0] = temp; - temp = ab3.val[1]; - ab3.val[1] = cd1.val[1]; - cd1.val[1] = temp; - temp = ab4.val[0]; - ab4.val[0] = cd2.val[0]; - cd2.val[0] = temp; - temp = ab4.val[1]; - ab4.val[1] = cd2.val[1]; - cd2.val[1] = temp; - - //Compare - if(dir) - { - vminmax256q(ab1, cd1); - vminmax256q(ab2, cd2); - vminmax256q(ab3, cd3); - vminmax256q(ab4, cd4); - } - else - { - vminmax256q(cd1, ab1); - vminmax256q(cd2, ab2); - vminmax256q(cd3, ab3); - vminmax256q(cd4, ab4); - } - - //Transpose 256 - arm_bitonic_merge_32_f32(pSrc+0, ab1, ab2, cd1, cd2, dir); - arm_bitonic_merge_32_f32(pSrc+32, ab3, ab4, cd3, cd4, dir); -} - -static void arm_bitonic_merge_128_f32(float32_t * pSrc, uint8_t dir) -{ - float32x4x2_t ab1, ab2, ab3, ab4, ab5, ab6, ab7, ab8; - float32x4x2_t cd1, cd2, cd3, cd4, cd5, cd6, cd7, cd8; - - //Load and reverse second array - ab1.val[0] = vld1q_f32(pSrc+0 ); - ab1.val[1] = vld1q_f32(pSrc+4 ); - ab2.val[0] = vld1q_f32(pSrc+8 ); - ab2.val[1] = vld1q_f32(pSrc+12); - ab3.val[0] = vld1q_f32(pSrc+16); - ab3.val[1] = vld1q_f32(pSrc+20); - ab4.val[0] = vld1q_f32(pSrc+24); - ab4.val[1] = vld1q_f32(pSrc+28); - ab5.val[0] = vld1q_f32(pSrc+32); - ab5.val[1] = vld1q_f32(pSrc+36); - ab6.val[0] = vld1q_f32(pSrc+40); - ab6.val[1] = vld1q_f32(pSrc+44); - ab7.val[0] = vld1q_f32(pSrc+48); - ab7.val[1] = vld1q_f32(pSrc+52); - ab8.val[0] = vld1q_f32(pSrc+56); - ab8.val[1] = vld1q_f32(pSrc+60); - - vldrev128q_f32(cd8.val[1], pSrc+64); - vldrev128q_f32(cd8.val[0], pSrc+68); - vldrev128q_f32(cd7.val[1], pSrc+72); - vldrev128q_f32(cd7.val[0], pSrc+76); - vldrev128q_f32(cd6.val[1], pSrc+80); - vldrev128q_f32(cd6.val[0], pSrc+84); - vldrev128q_f32(cd5.val[1], pSrc+88); - vldrev128q_f32(cd5.val[0], pSrc+92); - vldrev128q_f32(cd4.val[1], pSrc+96); - vldrev128q_f32(cd4.val[0], pSrc+100); - vldrev128q_f32(cd3.val[1], pSrc+104); - vldrev128q_f32(cd3.val[0], pSrc+108); - vldrev128q_f32(cd2.val[1], pSrc+112); - vldrev128q_f32(cd2.val[0], pSrc+116); - vldrev128q_f32(cd1.val[1], pSrc+120); - vldrev128q_f32(cd1.val[0], pSrc+124); - - //Compare - if(dir) - { - vminmax256q(ab1, cd1); - vminmax256q(ab2, cd2); - vminmax256q(ab3, cd3); - vminmax256q(ab4, cd4); - vminmax256q(ab5, cd5); - vminmax256q(ab6, cd6); - vminmax256q(ab7, cd7); - vminmax256q(ab8, cd8); - } - else - { - vminmax256q(cd1, ab1); - vminmax256q(cd2, ab2); - vminmax256q(cd3, ab3); - vminmax256q(cd4, ab4); - vminmax256q(cd5, ab5); - vminmax256q(cd6, ab6); - vminmax256q(cd7, ab7); - vminmax256q(cd8, ab8); - } - - //Transpose - float32x4_t temp; - - temp = ab5.val[0]; - ab5.val[0] = cd1.val[0]; - cd1.val[0] = temp; - temp = ab5.val[1]; - ab5.val[1] = cd1.val[1]; - cd1.val[1] = temp; - temp = ab6.val[0]; - ab6.val[0] = cd2.val[0]; - cd2.val[0] = temp; - temp = ab6.val[1]; - ab6.val[1] = cd2.val[1]; - cd2.val[1] = temp; - temp = ab7.val[0]; - ab7.val[0] = cd3.val[0]; - cd3.val[0] = temp; - temp = ab7.val[1]; - ab7.val[1] = cd3.val[1]; - cd3.val[1] = temp; - temp = ab8.val[0]; - ab8.val[0] = cd4.val[0]; - cd4.val[0] = temp; - temp = ab8.val[1]; - ab8.val[1] = cd4.val[1]; - cd4.val[1] = temp; - - //Compare - if(dir) - { - vminmax256q(ab1, cd1); - vminmax256q(ab2, cd2); - vminmax256q(ab3, cd3); - vminmax256q(ab4, cd4); - vminmax256q(ab5, cd5); - vminmax256q(ab6, cd6); - vminmax256q(ab7, cd7); - vminmax256q(ab8, cd8); - } - else - { - vminmax256q(cd1, ab1); - vminmax256q(cd2, ab2); - vminmax256q(cd3, ab3); - vminmax256q(cd4, ab4); - vminmax256q(cd5, ab5); - vminmax256q(cd6, ab6); - vminmax256q(cd7, ab7); - vminmax256q(cd8, ab8); - } - - vst1q_f32(pSrc, ab1.val[0]); - vst1q_f32(pSrc+4, ab1.val[1]); - vst1q_f32(pSrc+8, ab2.val[0]); - vst1q_f32(pSrc+12, ab2.val[1]); - vst1q_f32(pSrc+16, ab3.val[0]); - vst1q_f32(pSrc+20, ab3.val[1]); - vst1q_f32(pSrc+24, ab4.val[0]); - vst1q_f32(pSrc+28, ab4.val[1]); - vst1q_f32(pSrc+32, cd1.val[0]); - vst1q_f32(pSrc+36, cd1.val[1]); - vst1q_f32(pSrc+40, cd2.val[0]); - vst1q_f32(pSrc+44, cd2.val[1]); - vst1q_f32(pSrc+48, cd3.val[0]); - vst1q_f32(pSrc+52, cd3.val[1]); - vst1q_f32(pSrc+56, cd4.val[0]); - vst1q_f32(pSrc+60, cd4.val[1]); - vst1q_f32(pSrc+64, ab5.val[0]); - vst1q_f32(pSrc+68, ab5.val[1]); - vst1q_f32(pSrc+72, ab6.val[0]); - vst1q_f32(pSrc+76, ab6.val[1]); - vst1q_f32(pSrc+80, ab7.val[0]); - vst1q_f32(pSrc+84, ab7.val[1]); - vst1q_f32(pSrc+88, ab8.val[0]); - vst1q_f32(pSrc+92, ab8.val[1]); - vst1q_f32(pSrc+96, cd5.val[0]); - vst1q_f32(pSrc+100, cd5.val[1]); - vst1q_f32(pSrc+104, cd6.val[0]); - vst1q_f32(pSrc+108, cd6.val[1]); - vst1q_f32(pSrc+112, cd7.val[0]); - vst1q_f32(pSrc+116, cd7.val[1]); - vst1q_f32(pSrc+120, cd8.val[0]); - vst1q_f32(pSrc+124, cd8.val[1]); - - //Transpose - arm_bitonic_merge_64_f32(pSrc+0 , dir); - arm_bitonic_merge_64_f32(pSrc+64, dir); -} - -static void arm_bitonic_merge_256_f32(float32_t * pSrc, uint8_t dir) -{ - float32x4x2_t ab1, ab2, ab3, ab4, ab5, ab6, ab7, ab8; - float32x4x2_t ab9, ab10, ab11, ab12, ab13, ab14, ab15, ab16; - float32x4x2_t cd1, cd2, cd3, cd4, cd5, cd6, cd7, cd8; - float32x4x2_t cd9, cd10, cd11, cd12, cd13, cd14, cd15, cd16; - - //Load and reverse second array - ab1.val[0] = vld1q_f32(pSrc+0 ); - ab1.val[1] = vld1q_f32(pSrc+4 ); - ab2.val[0] = vld1q_f32(pSrc+8 ); - ab2.val[1] = vld1q_f32(pSrc+12 ); - ab3.val[0] = vld1q_f32(pSrc+16 ); - ab3.val[1] = vld1q_f32(pSrc+20 ); - ab4.val[0] = vld1q_f32(pSrc+24 ); - ab4.val[1] = vld1q_f32(pSrc+28 ); - ab5.val[0] = vld1q_f32(pSrc+32 ); - ab5.val[1] = vld1q_f32(pSrc+36 ); - ab6.val[0] = vld1q_f32(pSrc+40 ); - ab6.val[1] = vld1q_f32(pSrc+44 ); - ab7.val[0] = vld1q_f32(pSrc+48 ); - ab7.val[1] = vld1q_f32(pSrc+52 ); - ab8.val[0] = vld1q_f32(pSrc+56 ); - ab8.val[1] = vld1q_f32(pSrc+60 ); - ab9.val[0] = vld1q_f32(pSrc+64 ); - ab9.val[1] = vld1q_f32(pSrc+68 ); - ab10.val[0] = vld1q_f32(pSrc+72 ); - ab10.val[1] = vld1q_f32(pSrc+76 ); - ab11.val[0] = vld1q_f32(pSrc+80 ); - ab11.val[1] = vld1q_f32(pSrc+84 ); - ab12.val[0] = vld1q_f32(pSrc+88 ); - ab12.val[1] = vld1q_f32(pSrc+92 ); - ab13.val[0] = vld1q_f32(pSrc+96 ); - ab13.val[1] = vld1q_f32(pSrc+100); - ab14.val[0] = vld1q_f32(pSrc+104); - ab14.val[1] = vld1q_f32(pSrc+108); - ab15.val[0] = vld1q_f32(pSrc+112); - ab15.val[1] = vld1q_f32(pSrc+116); - ab16.val[0] = vld1q_f32(pSrc+120); - ab16.val[1] = vld1q_f32(pSrc+124); - - vldrev128q_f32(cd16.val[1], pSrc+128); - vldrev128q_f32(cd16.val[0], pSrc+132); - vldrev128q_f32(cd15.val[1], pSrc+136); - vldrev128q_f32(cd15.val[0], pSrc+140); - vldrev128q_f32(cd14.val[1], pSrc+144); - vldrev128q_f32(cd14.val[0], pSrc+148); - vldrev128q_f32(cd13.val[1], pSrc+152); - vldrev128q_f32(cd13.val[0], pSrc+156); - vldrev128q_f32(cd12.val[1], pSrc+160); - vldrev128q_f32(cd12.val[0], pSrc+164); - vldrev128q_f32(cd11.val[1], pSrc+168); - vldrev128q_f32(cd11.val[0], pSrc+172); - vldrev128q_f32(cd10.val[1], pSrc+176); - vldrev128q_f32(cd10.val[0], pSrc+180); - vldrev128q_f32(cd9.val[1] , pSrc+184); - vldrev128q_f32(cd9.val[0] , pSrc+188); - vldrev128q_f32(cd8.val[1] , pSrc+192); - vldrev128q_f32(cd8.val[0] , pSrc+196); - vldrev128q_f32(cd7.val[1] , pSrc+200); - vldrev128q_f32(cd7.val[0] , pSrc+204); - vldrev128q_f32(cd6.val[1] , pSrc+208); - vldrev128q_f32(cd6.val[0] , pSrc+212); - vldrev128q_f32(cd5.val[1] , pSrc+216); - vldrev128q_f32(cd5.val[0] , pSrc+220); - vldrev128q_f32(cd4.val[1] , pSrc+224); - vldrev128q_f32(cd4.val[0] , pSrc+228); - vldrev128q_f32(cd3.val[1] , pSrc+232); - vldrev128q_f32(cd3.val[0] , pSrc+236); - vldrev128q_f32(cd2.val[1] , pSrc+240); - vldrev128q_f32(cd2.val[0] , pSrc+244); - vldrev128q_f32(cd1.val[1] , pSrc+248); - vldrev128q_f32(cd1.val[0] , pSrc+252); - - //Compare - if(dir) - { - vminmax256q(ab1 , cd1 ); - vminmax256q(ab2 , cd2 ); - vminmax256q(ab3 , cd3 ); - vminmax256q(ab4 , cd4 ); - vminmax256q(ab5 , cd5 ); - vminmax256q(ab6 , cd6 ); - vminmax256q(ab7 , cd7 ); - vminmax256q(ab8 , cd8 ); - vminmax256q(ab9 , cd9 ); - vminmax256q(ab10, cd10); - vminmax256q(ab11, cd11); - vminmax256q(ab12, cd12); - vminmax256q(ab13, cd13); - vminmax256q(ab14, cd14); - vminmax256q(ab15, cd15); - vminmax256q(ab16, cd16); - } - else - { - vminmax256q(cd1 , ab1 ); - vminmax256q(cd2 , ab2 ); - vminmax256q(cd3 , ab3 ); - vminmax256q(cd4 , ab4 ); - vminmax256q(cd5 , ab5 ); - vminmax256q(cd6 , ab6 ); - vminmax256q(cd7 , ab7 ); - vminmax256q(cd8 , ab8 ); - vminmax256q(cd9 , ab9 ); - vminmax256q(cd10, ab10); - vminmax256q(cd11, ab11); - vminmax256q(cd12, ab12); - vminmax256q(cd13, ab13); - vminmax256q(cd14, ab14); - vminmax256q(cd15, ab15); - vminmax256q(cd16, ab16); - } - - //Transpose - float32x4_t temp; - - temp = ab9.val[0]; - ab9.val[0] = cd1.val[0]; - cd1.val[0] = temp; - temp = ab9.val[1]; - ab9.val[1] = cd1.val[1]; - cd1.val[1] = temp; - temp = ab10.val[0]; - ab10.val[0] = cd2.val[0]; - cd2.val[0] = temp; - temp = ab10.val[1]; - ab10.val[1] = cd2.val[1]; - cd2.val[1] = temp; - temp = ab11.val[0]; - ab11.val[0] = cd3.val[0]; - cd3.val[0] = temp; - temp = ab11.val[1]; - ab11.val[1] = cd3.val[1]; - cd3.val[1] = temp; - temp = ab12.val[0]; - ab12.val[0] = cd4.val[0]; - cd4.val[0] = temp; - temp = ab12.val[1]; - ab12.val[1] = cd4.val[1]; - cd4.val[1] = temp; - temp = ab13.val[0]; - ab13.val[0] = cd5.val[0]; - cd5.val[0] = temp; - temp = ab13.val[1]; - ab13.val[1] = cd5.val[1]; - cd5.val[1] = temp; - temp = ab14.val[0]; - ab14.val[0] = cd6.val[0]; - cd6.val[0] = temp; - temp = ab14.val[1]; - ab14.val[1] = cd6.val[1]; - cd6.val[1] = temp; - temp = ab15.val[0]; - ab15.val[0] = cd7.val[0]; - cd7.val[0] = temp; - temp = ab15.val[1]; - ab15.val[1] = cd7.val[1]; - cd7.val[1] = temp; - temp = ab16.val[0]; - ab16.val[0] = cd8.val[0]; - cd8.val[0] = temp; - temp = ab16.val[1]; - ab16.val[1] = cd8.val[1]; - cd8.val[1] = temp; - - //Compare - if(dir) - { - vminmax256q(ab1 , cd1 ); - vminmax256q(ab2 , cd2 ); - vminmax256q(ab3 , cd3 ); - vminmax256q(ab4 , cd4 ); - vminmax256q(ab5 , cd5 ); - vminmax256q(ab6 , cd6 ); - vminmax256q(ab7 , cd7 ); - vminmax256q(ab8 , cd8 ); - vminmax256q(ab9 , cd9 ); - vminmax256q(ab10, cd10); - vminmax256q(ab11, cd11); - vminmax256q(ab12, cd12); - vminmax256q(ab13, cd13); - vminmax256q(ab14, cd14); - vminmax256q(ab15, cd15); - vminmax256q(ab16, cd16); - } - else - { - vminmax256q(cd1 , ab1 ); - vminmax256q(cd2 , ab2 ); - vminmax256q(cd3 , ab3 ); - vminmax256q(cd4 , ab4 ); - vminmax256q(cd5 , ab5 ); - vminmax256q(cd6 , ab6 ); - vminmax256q(cd7 , ab7 ); - vminmax256q(cd8 , ab8 ); - vminmax256q(cd9 , ab9 ); - vminmax256q(cd10, ab10); - vminmax256q(cd11, ab11); - vminmax256q(cd12, ab12); - vminmax256q(cd13, ab13); - vminmax256q(cd14, ab14); - vminmax256q(cd15, ab15); - vminmax256q(cd16, ab16); - } - - vst1q_f32(pSrc, ab1.val[0] ); - vst1q_f32(pSrc+4, ab1.val[1] ); - vst1q_f32(pSrc+8, ab2.val[0] ); - vst1q_f32(pSrc+12, ab2.val[1] ); - vst1q_f32(pSrc+16, ab3.val[0] ); - vst1q_f32(pSrc+20, ab3.val[1] ); - vst1q_f32(pSrc+24, ab4.val[0] ); - vst1q_f32(pSrc+28, ab4.val[1] ); - vst1q_f32(pSrc+32, ab5.val[0] ); - vst1q_f32(pSrc+36, ab5.val[1] ); - vst1q_f32(pSrc+40, ab6.val[0] ); - vst1q_f32(pSrc+44, ab6.val[1] ); - vst1q_f32(pSrc+48, ab7.val[0] ); - vst1q_f32(pSrc+52, ab7.val[1] ); - vst1q_f32(pSrc+56, ab8.val[0] ); - vst1q_f32(pSrc+60, ab8.val[1] ); - vst1q_f32(pSrc+64, cd1.val[0] ); - vst1q_f32(pSrc+68, cd1.val[1] ); - vst1q_f32(pSrc+72, cd2.val[0] ); - vst1q_f32(pSrc+76, cd2.val[1] ); - vst1q_f32(pSrc+80, cd3.val[0] ); - vst1q_f32(pSrc+84, cd3.val[1] ); - vst1q_f32(pSrc+88, cd4.val[0] ); - vst1q_f32(pSrc+92, cd4.val[1] ); - vst1q_f32(pSrc+96, cd5.val[0] ); - vst1q_f32(pSrc+100, cd5.val[1] ); - vst1q_f32(pSrc+104, cd6.val[0] ); - vst1q_f32(pSrc+108, cd6.val[1] ); - vst1q_f32(pSrc+112, cd7.val[0] ); - vst1q_f32(pSrc+116, cd7.val[1] ); - vst1q_f32(pSrc+120, cd8.val[0] ); - vst1q_f32(pSrc+124, cd8.val[1] ); - vst1q_f32(pSrc+128, ab9.val[0] ); - vst1q_f32(pSrc+132, ab9.val[1] ); - vst1q_f32(pSrc+136, ab10.val[0]); - vst1q_f32(pSrc+140, ab10.val[1]); - vst1q_f32(pSrc+144, ab11.val[0]); - vst1q_f32(pSrc+148, ab11.val[1]); - vst1q_f32(pSrc+152, ab12.val[0]); - vst1q_f32(pSrc+156, ab12.val[1]); - vst1q_f32(pSrc+160, ab13.val[0]); - vst1q_f32(pSrc+164, ab13.val[1]); - vst1q_f32(pSrc+168, ab14.val[0]); - vst1q_f32(pSrc+172, ab14.val[1]); - vst1q_f32(pSrc+176, ab15.val[0]); - vst1q_f32(pSrc+180, ab15.val[1]); - vst1q_f32(pSrc+184, ab16.val[0]); - vst1q_f32(pSrc+188, ab16.val[1]); - vst1q_f32(pSrc+192, cd9.val[0] ); - vst1q_f32(pSrc+196, cd9.val[1] ); - vst1q_f32(pSrc+200, cd10.val[0]); - vst1q_f32(pSrc+204, cd10.val[1]); - vst1q_f32(pSrc+208, cd11.val[0]); - vst1q_f32(pSrc+212, cd11.val[1]); - vst1q_f32(pSrc+216, cd12.val[0]); - vst1q_f32(pSrc+220, cd12.val[1]); - vst1q_f32(pSrc+224, cd13.val[0]); - vst1q_f32(pSrc+228, cd13.val[1]); - vst1q_f32(pSrc+232, cd14.val[0]); - vst1q_f32(pSrc+236, cd14.val[1]); - vst1q_f32(pSrc+240, cd15.val[0]); - vst1q_f32(pSrc+244, cd15.val[1]); - vst1q_f32(pSrc+248, cd16.val[0]); - vst1q_f32(pSrc+252, cd16.val[1]); - - //Transpose - arm_bitonic_merge_128_f32(pSrc+0 , dir); - arm_bitonic_merge_128_f32(pSrc+128, dir); -} - -#define SWAP(a,i,j) \ - temp = vgetq_lane_f32(a, j); \ - a = vsetq_lane_f32(vgetq_lane_f32(a, i), a, j);\ - a = vsetq_lane_f32(temp, a, i); - -static float32x4_t arm_bitonic_sort_4_f32(float32x4_t a, uint8_t dir) -{ - float32_t temp; - - - if( dir==(vgetq_lane_f32(a, 0) > vgetq_lane_f32(a, 1)) ) - { - SWAP(a,0,1); - } - if( dir==(vgetq_lane_f32(a, 2) > vgetq_lane_f32(a, 3)) ) - { - SWAP(a,2,3); - } - - if( dir==(vgetq_lane_f32(a, 0) > vgetq_lane_f32(a, 3)) ) - { - SWAP(a,0,3); - } - if( dir==(vgetq_lane_f32(a, 1) > vgetq_lane_f32(a, 2)) ) - { - SWAP(a,1,2); - } - - if( dir==(vgetq_lane_f32(a, 0) > vgetq_lane_f32(a, 1)) ) - { - SWAP(a,0,1); - } - if( dir==(vgetq_lane_f32(a, 2)>vgetq_lane_f32(a, 3)) ) - { - SWAP(a,2,3); - } - - return a; -} - -static float32x4x2_t arm_bitonic_sort_8_f32(float32x4_t a, float32x4_t b, uint8_t dir) -{ - a = arm_bitonic_sort_4_f32(a, dir); - b = arm_bitonic_sort_4_f32(b, dir); - return arm_bitonic_merge_8_f32(a, b, dir); -} - - - -#endif - -/** - @ingroup groupSupport - */ - -/** - @defgroup Sorting Vector sorting algorithms - - Sort the elements of a vector - - There are separate functions for floating-point, Q31, Q15, and Q7 data types. - */ - -/** - @addtogroup Sorting - @{ - */ - -/** - * @private - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ -void arm_bitonic_sort_f32( -const arm_sort_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint16_t s, i; - uint8_t dir = S->dir; - -#ifdef ARM_MATH_NEON - (void)s; - - float32_t * pOut; - uint16_t counter = blockSize>>5; - - if( (blockSize & (blockSize-1)) == 0 ) // Powers of 2 only - { - if(pSrc == pDst) // in-place - pOut = pSrc; - else - pOut = pDst; - - float32x4x2_t ab1, ab2; - float32x4x2_t cd1, cd2; - - if(blockSize == 1) - pOut = pSrc; - else if(blockSize == 2) - { - float32_t temp; - - if( dir==(pSrc[0]>pSrc[1]) ) - { - temp = pSrc[1]; - pOut[1] = pSrc[0]; - pOut[0] = temp; - } - else - pOut = pSrc; - } - else if(blockSize == 4) - { - float32x4_t a = vld1q_f32(pSrc); - - a = arm_bitonic_sort_4_f32(a, dir); - - vst1q_f32(pOut, a); - } - else if(blockSize == 8) - { - float32x4_t a; - float32x4_t b; - float32x4x2_t ab; - - a = vld1q_f32(pSrc); - b = vld1q_f32(pSrc+4); - - ab = arm_bitonic_sort_8_f32(a, b, dir); - - vst1q_f32(pOut, ab.val[0]); - vst1q_f32(pOut+4, ab.val[1]); - } - else if(blockSize >=16) - { - // Order 16 bits long vectors - for(i=0; i>1; - for(i=0; i>1; - for(i=0; i>1; - for(i=0; idir; - uint32_t i; - uint8_t swapped =1; - float32_t * pA; - float32_t temp; - - if(pSrc != pDst) // out-of-place - { - memcpy(pDst, pSrc, blockSize*sizeof(float32_t) ); - pA = pDst; - } - else - pA = pSrc; - - while(swapped==1) // If nothing has been swapped after one loop stop - { - swapped=0; - - for(i=0; ipA[i+1])) - { - // Swap - temp = pA[i]; - pA[i] = pA[i+1]; - pA[i+1] = temp; - - // Update flag - swapped = 1; - } - } - - blockSize--; - } -} - -/** - @} end of Sorting group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_f16.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_f16.c deleted file mode 100644 index 3274dde..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_f16.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_copy_f16.c - * Description: Copies the elements of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupSupport - */ - - -/** - @addtogroup copy - @{ - */ - -/** - @brief Copies the elements of a f16 vector. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_copy_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - do { - mve_pred16_t p = vctp16q(blockSize); - - vstrhq_p_f16(pDst, - vldrhq_z_f16((float16_t const *) pSrc, p), p); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 8; - pDst += 8; - blockSize -= 8; - } - while ((int32_t) blockSize > 0); -} - -#else - -void arm_copy_f16( - const float16_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicCopy group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c deleted file mode 100644 index 64aaeb7..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c +++ /dev/null @@ -1,192 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_copy_f32.c - * Description: Copies the elements of a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @defgroup copy Vector Copy - - Copies sample by sample from source vector to destination vector. - - 
-      pDst[n] = pSrc[n];   0 <= n < blockSize.
-
- - There are separate functions for floating point, Q31, Q15, and Q7 data types. - */ - -/** - @addtogroup copy - @{ - */ - -/** - @brief Copies the elements of a floating-point vector. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_copy_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time */ - while (blkCnt > 0U) - { - vstrwq_f32(pDst, vldrwq_f32(pSrc)); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 4; - pDst += 4; - blkCnt --; - } - - blkCnt = blockSize & 3; - - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -#else -#if defined(ARM_MATH_NEON_EXPERIMENTAL) -void arm_copy_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - float32x4_t inV; - - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C = A */ - /* Copy and then store the results in the destination buffer */ - inV = vld1q_f32(pSrc); - vst1q_f32(pDst, inV); - pSrc += 4; - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize & 3; - - while (blkCnt > 0U) - { - /* C = A */ - /* Copy and then store the results in the destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } -} -#else -void arm_copy_f32( - const float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of BasicCopy group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_f64.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_f64.c deleted file mode 100644 index e8b00ce..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_f64.c +++ /dev/null @@ -1,71 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_copy_f64.c - * Description: Copies the elements of a floating-point vector - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup copy - @{ - */ - -/** - @brief Copies the elements of a floating-point vector. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -void arm_copy_f64( - const float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } -} - -/** - @} end of BasicCopy group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c deleted file mode 100644 index 2b752e1..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_copy_q15.c - * Description: Copies the elements of a Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup copy - @{ - */ - -/** - @brief Copies the elements of a Q15 vector. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_copy_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - vstrhq_s16(pDst,vldrhq_s16(pSrc)); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 8; - pDst += 8; - blkCnt --; - } - - blkCnt = blockSize & 7; - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -void arm_copy_q15( - const q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A */ - - /* read 2 times 2 samples at a time */ - write_q15x2_ia (&pDst, read_q15x2_ia (&pSrc)); - write_q15x2_ia (&pDst, read_q15x2_ia (&pSrc)); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicCopy group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c deleted file mode 100644 index fd30477..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_copy_q31.c - * Description: Copies the elements of a Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup copy - @{ - */ - -/** - @brief Copies the elements of a Q31 vector. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_copy_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time */ - while (blkCnt > 0U) - { - vstrwq_s32(pDst,vldrwq_s32(pSrc)); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 4; - pDst += 4; - blkCnt --; - } - - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -#else -void arm_copy_q31( - const q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicCopy group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c deleted file mode 100644 index 76858d2..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c +++ /dev/null @@ -1,132 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_copy_q7.c - * Description: Copies the elements of a Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup copy - @{ - */ - -/** - @brief Copies the elements of a Q7 vector. - @param[in] pSrc points to input vector - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_copy_q7( - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - - uint32_t blkCnt; - - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - - vstrbq_s8(pDst,vldrbq_s8(pSrc)); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 16; - pDst += 16; - blkCnt --; - } - - blkCnt = blockSize & 0xF; - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -void arm_copy_q7( - const q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A */ - - /* read 4 samples at a time */ - write_q7x4_ia (&pDst, read_q7x4_ia (&pSrc)); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A */ - - /* Copy and store result in destination buffer */ - *pDst++ = *pSrc++; - - /* Decrement loop counter */ - blkCnt--; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of BasicCopy group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_float.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_float.c deleted file mode 100644 index 105e6d4..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_float.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_float_to_q15.c - * Description: Converts the elements of the floating-point vector to Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupSupport - */ - -/** - * @defgroup f16_to_x Convert 16-bit floating point value - */ - -/** - @addtogroup f16_to_x - @{ - */ - -/** - @brief Converts the elements of the f16 vector to f32 vector. - @param[in] pSrc points to the f16 input vector - @param[out] pDst points to the f32 output vector - @param[in] blockSize number of samples in each vector - @return none - - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H) -#pragma GCC warning "Scalar version of arm_f16_to_float built. Helium version has build issues with gcc." -#endif - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && !defined(__CMSIS_GCC_H) - -void arm_f16_to_float( - const float16_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - int32_t blkCnt; /* loop counters */ - float16x8_t vecDst; - float32x4x2_t tmp; - - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - vecDst = vldrhq_f16(pSrc); - pSrc += 8; - - tmp.val[0] = vcvtbq_f32_f16(vecDst); - tmp.val[1] = vcvttq_f32_f16(vecDst); - vst2q(pDst,tmp); - - pDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - while (blkCnt > 0) - { - - *pDst++ = (float32_t) *pSrc++; - /* - * Decrement the loop counter - */ - blkCnt--; - } -} - -#else -void arm_f16_to_float( - const float16_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const float16_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - /* - * Loop over blockSize number of values - */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - - *pDst++ = (float32_t) * pIn++; - /* - * Decrement the loop counter - */ - blkCnt--; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of f16_to_x group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_q15.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_q15.c deleted file mode 100644 index 3873d38..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_q15.c +++ /dev/null @@ -1,157 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_float_to_q15.c - * Description: Converts the elements of the floating-point vector to Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupSupport - */ - -/** - @addtogroup f16_to_x - @{ - */ - -/** - @brief Converts the elements of the f16 vector to Q15 vector. - @param[in] pSrc points to the f16 input vector - @param[out] pDst points to the Q15 output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.
-
- - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - - @note - In order to apply rounding in scalar version, the library should be rebuilt with the ROUNDING macro - defined in the preprocessor section of project options. - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_f16_to_q15( - const float16_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - float16_t maxQ = (float16_t) Q15_MAX; - float16x8_t vecDst; - - - do { - mve_pred16_t p = vctp16q(blockSize); - - vecDst = vldrhq_z_f16((float16_t const *) pSrc, p); - /* C = A * 32767 */ - /* convert from float to Q15 and then store the results in the destination buffer */ - vecDst = vmulq_m(vuninitializedq_f16(), vecDst, maxQ, p); - - vstrhq_p_s16(pDst, - vcvtaq_m(vuninitializedq_s16(), vecDst, p), p); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 8; - pDst += 8; - blockSize -= 8; - } - while ((int32_t) blockSize > 0); -} - -#else - -void arm_f16_to_q15( - const float16_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - const float16_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ -#ifdef ARM_MATH_ROUNDING - float16_t in; -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* - * Loop over blockSize number of values - */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - -#ifdef ARM_MATH_ROUNDING - - /* - * C = A * 65536 - */ - /* - * convert from float to Q31 and then store the results in the destination buffer - */ - in = *pIn++; - in = (in * 32768.0); - in += in > 0.0 ? 0.5 : -0.5; - *pDst++ = clip_q31_to_q15((q31_t) (in)); - -#else - - /* - * C = A * 32768 - */ - /* - * convert from float to Q31 and then store the results in the destination buffer - */ - *pDst++ = clip_q31_to_q15((q31_t) ((_Float16)*pIn++ * 32768.0f16)); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* - * Decrement the loop counter - */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of f16_to_x group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_f16.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_f16.c deleted file mode 100644 index 08a069f..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_f16.c +++ /dev/null @@ -1,127 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fill_f16.c - * Description: Fills a constant value into a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupSupport - */ - - -/** - @addtogroup Fill - @{ - */ - -/** - @brief Fills a constant value into a f16 vector. - @param[in] value input value to be filled - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_fill_f16( - float16_t value, - float16_t * pDst, - uint32_t blockSize) -{ - do { - mve_pred16_t p = vctp16q(blockSize); - - vstrhq_p_f16(pDst, - vdupq_m_n_f16(vuninitializedq_f16(), value, p), p); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pDst += 8; - blockSize -= 8; - } - while ((int32_t) blockSize > 0); -} -#else -void arm_fill_f16( - float16_t value, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - *pDst++ = value; - *pDst++ = value; - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Fill group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c deleted file mode 100644 index bc46df0..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c +++ /dev/null @@ -1,189 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fill_f32.c - * Description: Fills a constant value into a floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @defgroup Fill Vector Fill - - Fills the destination vector with a constant value. - - 
-      pDst[n] = value;   0 <= n < blockSize.
-
- - There are separate functions for floating point, Q31, Q15, and Q7 data types. - */ - -/** - @addtogroup Fill - @{ - */ - -/** - @brief Fills a constant value into a floating-point vector. - @param[in] value input value to be filled - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_fill_f32( - float32_t value, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time */ - while (blkCnt > 0U) - { - - vstrwq_f32(pDst,vdupq_n_f32(value)); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pDst += 4; - blkCnt --; - } - - blkCnt = blockSize & 3; - - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#else -#if defined(ARM_MATH_NEON_EXPERIMENTAL) -void arm_fill_f32( - float32_t value, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - - float32x4_t inV = vdupq_n_f32(value); - - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C = value */ - /* Fill the value in the destination buffer */ - vst1q_f32(pDst, inV); - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize & 3; - - while (blkCnt > 0U) - { - /* C = value */ - /* Fill the value in the destination buffer */ - *pDst++ = value; - - /* Decrement the loop counter */ - blkCnt--; - } -} -#else -void arm_fill_f32( - float32_t value, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - *pDst++ = value; - *pDst++ = value; - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of Fill group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_f64.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_f64.c deleted file mode 100644 index a4b33ec..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_f64.c +++ /dev/null @@ -1,71 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fill_f64.c - * Description: Fills a constant value into a floating-point vector - * - * $Date: 13 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup Fill - @{ - */ - -/** - @brief Fills a constant value into a floating-point vector. - @param[in] value input value to be filled - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -void arm_fill_f64( - float64_t value, - float64_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } -} - -/** - @} end of Fill group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c deleted file mode 100644 index eeb0119..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fill_q15.c - * Description: Fills a constant value into a Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup Fill - @{ - */ - -/** - @brief Fills a constant value into a Q15 vector. - @param[in] value input value to be filled - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_fill_q15( - q15_t value, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - - vstrhq_s16(pDst,vdupq_n_s16(value)); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pDst += 8; - blkCnt --; - } - - blkCnt = blockSize & 7; - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -void arm_fill_q15( - q15_t value, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t packedValue; /* value packed to 32 bits */ - - /* Packing two 16 bit values to 32 bit value in order to use SIMD */ - packedValue = __PKHBT(value, value, 16U); - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = value */ - - /* fill 2 times 2 samples at a time */ - write_q15x2_ia (&pDst, packedValue); - write_q15x2_ia (&pDst, packedValue); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Fill group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c deleted file mode 100644 index 646ef61..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fill_q31.c - * Description: Fills a constant value into a Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup Fill - @{ - */ - -/** - @brief Fills a constant value into a Q31 vector. - @param[in] value input value to be filled - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_fill_q31( - q31_t value, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time */ - while (blkCnt > 0U) - { - - vstrwq_s32(pDst,vdupq_n_s32(value)); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pDst += 4; - blkCnt --; - } - - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } - -} - -#else -void arm_fill_q31( - q31_t value, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - *pDst++ = value; - *pDst++ = value; - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Fill group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c deleted file mode 100644 index 10e14a3..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c +++ /dev/null @@ -1,133 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_fill_q7.c - * Description: Fills a constant value into a Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup Fill - @{ - */ - -/** - @brief Fills a constant value into a Q7 vector. - @param[in] value input value to be filled - @param[out] pDst points to output vector - @param[in] blockSize number of samples in each vector - @return none - */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_fill_q7( - q7_t value, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - - vstrbq_s8(pDst,vdupq_n_s8(value)); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pDst += 16; - blkCnt --; - } - - blkCnt = blockSize & 0xF; - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -void arm_fill_q7( - q7_t value, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t packedValue; /* value packed to 32 bits */ - - /* Packing four 8 bit values to 32 bit value in order to use SIMD */ - packedValue = __PACKq7(value, value, value, value); - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = value */ - - /* fill 4 samples at a time */ - write_q7x4_ia (&pDst, packedValue); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = value */ - - /* Fill value in destination buffer */ - *pDst++ = value; - - /* Decrement loop counter */ - blkCnt--; - } -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of Fill group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_f16.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_f16.c deleted file mode 100644 index 3ad2e08..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_f16.c +++ /dev/null @@ -1,131 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_float_to_q15.c - * Description: Converts the elements of the floating-point vector to Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupSupport - */ - -/** - @addtogroup float_to_x - @{ - */ - -/** - @brief Converts the elements of the floating-point vector to f16 vector. - @param[in] pSrc points to the f32 input vector - @param[out] pDst points to the f16 output vector - @param[in] blockSize number of samples in each vector - @return none - - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H) -#pragma GCC warning "Scalar version of arm_float_to_f16 built. Helium version has build issues with gcc." -#endif - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && !defined(__CMSIS_GCC_H) - -void arm_float_to_f16( - const float32_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - int32_t blkCnt; /* loop counters */ - float32x4x2_t tmp; - float16x8_t vecDst; - float32_t const *pSrcVec; - - - pSrcVec = (float32_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - /* convert from float32 to float16 and then store the results in the destination buffer */ - tmp = vld2q(pSrcVec); pSrcVec += 8; - /* narrow / merge */ - vecDst = vcvtbq_f16_f32(vecDst, tmp.val[0]); - vecDst = vcvttq_f16_f32(vecDst, tmp.val[1]); - vst1q(pDst, vecDst); pDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* - * tail - */ - blkCnt = blockSize & 7; - if (blkCnt > 0) - { - mve_pred16_t p0 = vctp16q(blkCnt); - tmp = vld2q(pSrcVec); - vecDst = vcvtbq_f16_f32(vecDst, tmp.val[0]); - vecDst = vcvttq_f16_f32(vecDst, tmp.val[1]); - vstrhq_p(pDst, vecDst, p0); - } -} - -#else - -void arm_float_to_f16( - const float32_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - /* - * Loop over blockSize number of values - */ - blkCnt = blockSize; - - while (blkCnt > 0U) - { - - *pDst++ = (float16_t) * pIn++; - /* - * Decrement the loop counter - */ - blkCnt--; - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of float_to_x group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c deleted file mode 100644 index 89c8e83..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c +++ /dev/null @@ -1,308 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_float_to_q15.c - * Description: Converts the elements of the floating-point vector to Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup float_to_x - @{ - */ - -/** - @brief Converts the elements of the floating-point vector to Q15 vector. - @param[in] pSrc points to the floating-point input vector - @param[out] pDst points to the Q15 output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.
-
- - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - - @note - In order to apply rounding, the library should be rebuilt with the ROUNDING macro - defined in the preprocessor section of project options. - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_float_to_q15( - const float32_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - float32_t maxQ = (float32_t) Q15_MAX; - f32x4x2_t tmp; - q15x8_t vecDst; -#ifdef ARM_MATH_ROUNDING - float32_t in; -#endif - - - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* C = A * 32768 */ - /* convert from float to q15 and then store the results in the destination buffer */ - tmp = vld2q(pSrc); - - tmp.val[0] = vmulq(tmp.val[0], maxQ); - tmp.val[1] = vmulq(tmp.val[1], maxQ); - - vecDst = vqmovnbq(vecDst, vcvtaq_s32_f32(tmp.val[0])); - vecDst = vqmovntq(vecDst, vcvtaq_s32_f32(tmp.val[1])); - vst1q(pDst, vecDst); - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - pDst += 8; - pSrc += 8; - } - - blkCnt = blockSize & 7; - while (blkCnt > 0U) - { - /* C = A * 32768 */ - - /* convert from float to Q15 and store result in destination buffer */ -#ifdef ARM_MATH_ROUNDING - - in = (*pSrc++ * 32768.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - -#else - - /* C = A * 32768 */ - /* Convert from float to q15 and then store the results in the destination buffer */ - *pDst++ = (q15_t) __SSAT((q31_t) (*pSrc++ * 32768.0f), 16); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -#if defined(ARM_MATH_NEON_EXPERIMENTAL) -void arm_float_to_q15( - const float32_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - float32x4_t inV; - #ifdef ARM_MATH_ROUNDING - float32x4_t zeroV = vdupq_n_f32(0.0f); - float32x4_t pHalf = vdupq_n_f32(0.5f / 32768.0f); - float32x4_t mHalf = vdupq_n_f32(-0.5f / 32768.0f); - float32x4_t r; - uint32x4_t cmp; - float32_t in; - #endif - - int32x4_t cvt; - int16x4_t outV; - - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - -#ifdef ARM_MATH_ROUNDING - /* C = A * 32768 */ - /* Convert from float to q15 and then store the results in the destination buffer */ - inV = vld1q_f32(pIn); - cmp = vcgtq_f32(inV,zeroV); - r = vbslq_f32(cmp,pHalf,mHalf); - inV = vaddq_f32(inV, r); - - pIn += 4; - - cvt = vcvtq_n_s32_f32(inV,15); - outV = vqmovn_s32(cvt); - - vst1_s16(pDst, outV); - pDst += 4; - -#else - - /* C = A * 32768 */ - /* Convert from float to q15 and then store the results in the destination buffer */ - inV = vld1q_f32(pIn); - - cvt = vcvtq_n_s32_f32(inV,15); - outV = vqmovn_s32(cvt); - - vst1_s16(pDst, outV); - pDst += 4; - pIn += 4; - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize & 3; - - while (blkCnt > 0U) - { - -#ifdef ARM_MATH_ROUNDING - /* C = A * 32768 */ - /* Convert from float to q15 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 32768.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - -#else - - /* C = A * 32768 */ - /* Convert from float to q15 and then store the results in the destination buffer */ - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } -} -#else -void arm_float_to_q15( - const float32_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const float32_t *pIn = pSrc; /* Source pointer */ - -#ifdef ARM_MATH_ROUNDING - float32_t in; -#endif /* #ifdef ARM_MATH_ROUNDING */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * 32768 */ - - /* convert from float to Q15 and store result in destination buffer */ -#ifdef ARM_MATH_ROUNDING - - in = (*pIn++ * 32768.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - - in = (*pIn++ * 32768.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - - in = (*pIn++ * 32768.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - - in = (*pIn++ * 32768.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - -#else - - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A * 32768 */ - - /* convert from float to Q15 and store result in destination buffer */ -#ifdef ARM_MATH_ROUNDING - - in = (*pIn++ * 32768.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16)); - -#else - - /* C = A * 32768 */ - /* Convert from float to q15 and then store the results in the destination buffer */ - *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of float_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c deleted file mode 100644 index c7c3bab..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c +++ /dev/null @@ -1,314 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_float_to_q31.c - * Description: Converts the elements of the floating-point vector to Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - * @defgroup float_to_x Convert 32-bit floating point value - */ - -/** - @addtogroup float_to_x - @{ - */ - -/** - @brief Converts the elements of the floating-point vector to Q31 vector. - @param[in] pSrc points to the floating-point input vector - @param[out] pDst points to the Q31 output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.
-
- - @par Scaling and Overflow Behavior - The function uses saturating arithmetic. - Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated. - - @note - In order to apply rounding, the library should be rebuilt with the ROUNDING macro - defined in the preprocessor section of project options. - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_float_to_q31( - const float32_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - float32_t maxQ = (float32_t) Q31_MAX; - f32x4_t vecDst; -#ifdef ARM_MATH_ROUNDING - float32_t in; -#endif - - - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time. */ - while (blkCnt > 0U) - { - - vecDst = vldrwq_f32(pSrc); - /* C = A * 2147483648 */ - /* convert from float to Q31 and then store the results in the destination buffer */ - vecDst = vmulq(vecDst, maxQ); - - vstrwq_s32(pDst, vcvtaq_s32_f32(vecDst)); - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pSrc += 4; - pDst += 4; - blkCnt --; - } - - blkCnt = blockSize & 3; - - while (blkCnt > 0U) - { - /* C = A * 2147483648 */ - - /* convert from float to Q31 and store result in destination buffer */ -#ifdef ARM_MATH_ROUNDING - - in = (*pSrc++ * 2147483648.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - -#else - - /* C = A * 2147483648 */ - /* Convert from float to Q31 and then store the results in the destination buffer */ - *pDst++ = clip_q63_to_q31((q63_t) (*pSrc++ * 2147483648.0f)); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -#if defined(ARM_MATH_NEON) -void arm_float_to_q31( - const float32_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - float32x4_t inV; - #ifdef ARM_MATH_ROUNDING - float32_t in; - float32x4_t zeroV = vdupq_n_f32(0.0f); - float32x4_t pHalf = vdupq_n_f32(0.5f / 2147483648.0f); - float32x4_t mHalf = vdupq_n_f32(-0.5f / 2147483648.0f); - float32x4_t r; - uint32x4_t cmp; - #endif - - int32x4_t outV; - - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - -#ifdef ARM_MATH_ROUNDING - - /* C = A * 32768 */ - /* Convert from float to Q31 and then store the results in the destination buffer */ - inV = vld1q_f32(pIn); - cmp = vcgtq_f32(inV,zeroV); - r = vbslq_f32(cmp,pHalf,mHalf); - inV = vaddq_f32(inV, r); - - pIn += 4; - - outV = vcvtq_n_s32_f32(inV,31); - - vst1q_s32(pDst, outV); - pDst += 4; - -#else - - /* C = A * 2147483648 */ - /* Convert from float to Q31 and then store the results in the destination buffer */ - inV = vld1q_f32(pIn); - - outV = vcvtq_n_s32_f32(inV,31); - - vst1q_s32(pDst, outV); - pDst += 4; - pIn += 4; - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize & 3; - - while (blkCnt > 0U) - { - -#ifdef ARM_MATH_ROUNDING - - /* C = A * 2147483648 */ - /* Convert from float to Q31 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 2147483648.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - -#else - - /* C = A * 2147483648 */ - /* Convert from float to Q31 and then store the results in the destination buffer */ - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - - -} -#else -void arm_float_to_q31( - const float32_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const float32_t *pIn = pSrc; /* Source pointer */ - -#ifdef ARM_MATH_ROUNDING - float32_t in; -#endif /* #ifdef ARM_MATH_ROUNDING */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * 2147483648 */ - - /* convert from float to Q31 and store result in destination buffer */ -#ifdef ARM_MATH_ROUNDING - - in = (*pIn++ * 2147483648.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - - in = (*pIn++ * 2147483648.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - - in = (*pIn++ * 2147483648.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - - in = (*pIn++ * 2147483648.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - -#else - - /* C = A * 2147483648 */ - /* Convert from float to Q31 and then store the results in the destination buffer */ - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A * 2147483648 */ - - /* convert from float to Q31 and store result in destination buffer */ -#ifdef ARM_MATH_ROUNDING - - in = (*pIn++ * 2147483648.0f); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = clip_q63_to_q31((q63_t) (in)); - -#else - - /* C = A * 2147483648 */ - /* Convert from float to Q31 and then store the results in the destination buffer */ - *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f)); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of float_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c deleted file mode 100644 index 0cf6f8a..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c +++ /dev/null @@ -1,330 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_float_to_q7.c - * Description: Converts the elements of the floating-point vector to Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup float_to_x - @{ - */ - -/** - * @brief Converts the elements of the floating-point vector to Q7 vector. - * @param[in] *pSrc points to the floating-point input vector - * @param[out] *pDst points to the Q7 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - *\par Description: - * \par - * The equation used for the conversion process is: - * 
- * 	pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.
- *
- * \par Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - * \note - * In order to apply rounding, the library should be rebuilt with the ROUNDING macro - * defined in the preprocessor section of project options. - */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_float_to_q7( - const float32_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - float32_t maxQ = powf(2.0, 7); - f32x4x4_t tmp; - q15x8_t evVec, oddVec; - q7x16_t vecDst; - float32_t const *pSrcVec; -#ifdef ARM_MATH_ROUNDING - float32_t in; -#endif - - pSrcVec = (float32_t const *) pSrc; - blkCnt = blockSize >> 4; - while (blkCnt > 0U) { - tmp = vld4q(pSrcVec); - pSrcVec += 16; - /* - * C = A * 128.0 - * convert from float to q7 and then store the results in the destination buffer - */ - tmp.val[0] = vmulq(tmp.val[0], maxQ); - tmp.val[1] = vmulq(tmp.val[1], maxQ); - tmp.val[2] = vmulq(tmp.val[2], maxQ); - tmp.val[3] = vmulq(tmp.val[3], maxQ); - - /* - * convert and pack evens - */ - evVec = vqmovnbq(evVec, vcvtaq_s32_f32(tmp.val[0])); - evVec = vqmovntq(evVec, vcvtaq_s32_f32(tmp.val[2])); - /* - * convert and pack odds - */ - oddVec = vqmovnbq(oddVec, vcvtaq_s32_f32(tmp.val[1])); - oddVec = vqmovntq(oddVec, vcvtaq_s32_f32(tmp.val[3])); - /* - * merge - */ - vecDst = vqmovnbq(vecDst, evVec); - vecDst = vqmovntq(vecDst, oddVec); - - vst1q(pDst, vecDst); - pDst += 16; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - blkCnt = blockSize & 0xF; - while (blkCnt > 0U) - { - /* C = A * 128 */ - - /* Convert from float to q7 and store result in destination buffer */ -#ifdef ARM_MATH_ROUNDING - - in = (*pSrcVec++ * 128); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - -#else - - *pDst++ = (q7_t) __SSAT((q31_t) (*pSrcVec++ * 128.0f), 8); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement loop counter */ - blkCnt--; - } - -} -#else -#if defined(ARM_MATH_NEON) -void arm_float_to_q7( - const float32_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - const float32_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - float32x4_t inV; - #ifdef ARM_MATH_ROUNDING - float32_t in; - float32x4_t zeroV = vdupq_n_f32(0.0f); - float32x4_t pHalf = vdupq_n_f32(0.5f / 128.0f); - float32x4_t mHalf = vdupq_n_f32(-0.5f / 128.0f); - float32x4_t r; - uint32x4_t cmp; - #endif - - int16x4_t cvt1,cvt2; - int8x8_t outV; - - blkCnt = blockSize >> 3U; - - /* Compute 8 outputs at a time. - ** a second loop below computes the remaining 1 to 7 samples. */ - while (blkCnt > 0U) - { - -#ifdef ARM_MATH_ROUNDING - /* C = A * 128 */ - /* Convert from float to q7 and then store the results in the destination buffer */ - inV = vld1q_f32(pIn); - cmp = vcgtq_f32(inV,zeroV); - r = vbslq_f32(cmp,pHalf,mHalf); - inV = vaddq_f32(inV, r); - cvt1 = vqmovn_s32(vcvtq_n_s32_f32(inV,7)); - pIn += 4; - - inV = vld1q_f32(pIn); - cmp = vcgtq_f32(inV,zeroV); - r = vbslq_f32(cmp,pHalf,mHalf); - inV = vaddq_f32(inV, r); - cvt2 = vqmovn_s32(vcvtq_n_s32_f32(inV,7)); - pIn += 4; - - outV = vqmovn_s16(vcombine_s16(cvt1,cvt2)); - vst1_s8(pDst, outV); - pDst += 8; - -#else - - /* C = A * 128 */ - /* Convert from float to q7 and then store the results in the destination buffer */ - inV = vld1q_f32(pIn); - cvt1 = vqmovn_s32(vcvtq_n_s32_f32(inV,7)); - pIn += 4; - - inV = vld1q_f32(pIn); - cvt2 = vqmovn_s32(vcvtq_n_s32_f32(inV,7)); - pIn += 4; - - outV = vqmovn_s16(vcombine_s16(cvt1,cvt2)); - - vst1_s8(pDst, outV); - pDst += 8; -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize & 7; - - while (blkCnt > 0U) - { - -#ifdef ARM_MATH_ROUNDING - /* C = A * 128 */ - /* Convert from float to q7 and then store the results in the destination buffer */ - in = *pIn++; - in = (in * 128); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - -#else - - /* C = A * 128 */ - /* Convert from float to q7 and then store the results in the destination buffer */ - *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement the loop counter */ - blkCnt--; - } - -} -#else -void arm_float_to_q7( - const float32_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const float32_t *pIn = pSrc; /* Source pointer */ - -#ifdef ARM_MATH_ROUNDING - float32_t in; -#endif /* #ifdef ARM_MATH_ROUNDING */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = A * 128 */ - - /* Convert from float to q7 and store result in destination buffer */ -#ifdef ARM_MATH_ROUNDING - - in = (*pIn++ * 128); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - - in = (*pIn++ * 128); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - - in = (*pIn++ * 128); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - - in = (*pIn++ * 128); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - -#else - - *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8); - *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8); - *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8); - *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = A * 128 */ - - /* Convert from float to q7 and store result in destination buffer */ -#ifdef ARM_MATH_ROUNDING - - in = (*pIn++ * 128); - in += in > 0.0f ? 0.5f : -0.5f; - *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8)); - -#else - - *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8); - -#endif /* #ifdef ARM_MATH_ROUNDING */ - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of float_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_heap_sort_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_heap_sort_f32.c deleted file mode 100644 index 17a95c9..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_heap_sort_f32.c +++ /dev/null @@ -1,119 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_heap_sort_f32.c - * Description: Floating point heap sort - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" -#include "arm_sorting.h" - - - -static void arm_heapify(float32_t * pSrc, uint32_t n, uint32_t i, uint8_t dir) -{ - /* Put all the elements of pSrc in heap order */ - uint32_t k = i; // Initialize largest/smallest as root - uint32_t l = 2*i + 1; // left = 2*i + 1 - uint32_t r = 2*i + 2; // right = 2*i + 2 - float32_t temp; - - if (l < n && dir==(pSrc[l] > pSrc[k]) ) - k = l; - - if (r < n && dir==(pSrc[r] > pSrc[k]) ) - k = r; - - if (k != i) - { - temp = pSrc[i]; - pSrc[i]=pSrc[k]; - pSrc[k]=temp; - - arm_heapify(pSrc, n, k, dir); - } -} - -/** - @ingroup groupSupport - */ - -/** - @addtogroup Sorting - @{ - */ - -/** - * @private - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - * - * @par Algorithm - * The heap sort algorithm is a comparison algorithm that - * divides the input array into a sorted and an unsorted region, - * and shrinks the unsorted region by extracting the largest - * element and moving it to the sorted region. A heap data - * structure is used to find the maximum. - * - * @par It's an in-place algorithm. In order to obtain an out-of-place - * function, a memcpy of the source vector is performed. - */ -void arm_heap_sort_f32( - const arm_sort_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - float32_t * pA; - int32_t i; - float32_t temp; - - if(pSrc != pDst) // out-of-place - { - memcpy(pDst, pSrc, blockSize*sizeof(float32_t) ); - pA = pDst; - } - else - pA = pSrc; - - // Build the heap array so that the largest value is the root - for (i = blockSize/2 - 1; i >= 0; i--) - arm_heapify(pA, blockSize, i, S->dir); - - for (i = blockSize - 1; i >= 0; i--) - { - // Swap - temp = pA[i]; - pA[i] = pA[0]; - pA[0] = temp; - - // Restore heap order - arm_heapify(pA, i, 0, S->dir); - } -} -/** - @} end of Sorting group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_insertion_sort_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_insertion_sort_f32.c deleted file mode 100644 index 08dcd60..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_insertion_sort_f32.c +++ /dev/null @@ -1,93 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_insertion_sort_f32.c - * Description: Floating point insertion sort - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" -#include "arm_sorting.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup Sorting - @{ - */ - -/** - * @private - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - * - * @par Algorithm - * The insertion sort is a simple sorting algorithm that - * reads all the element of the input array and removes one element - * at a time, finds the location it belongs in the final sorted list, - * and inserts it there. - * - * @par It's an in-place algorithm. In order to obtain an out-of-place - * function, a memcpy of the source vector is performed. - */ - -void arm_insertion_sort_f32( - const arm_sort_instance_f32 * S, - float32_t *pSrc, - float32_t* pDst, - uint32_t blockSize) -{ - float32_t * pA; - uint8_t dir = S->dir; - uint32_t i, j; - float32_t temp; - - if(pSrc != pDst) // out-of-place - { - memcpy(pDst, pSrc, blockSize*sizeof(float32_t) ); - pA = pDst; - } - else - pA = pSrc; - - // Real all the element of the input array - for(i=0; i0 && dir==(pA[j]= end || dir==(pA[i] <= pA[j])) ) - { - pB[k] = pA[i]; - i++; - } - else - { - pB[k] = pA[j]; - j++; - } - } -} - -static void arm_merge_sort_core_f32(float32_t * pB, uint32_t begin, uint32_t end, float32_t * pA, uint8_t dir) -{ - if((int32_t)end - (int32_t)begin >= 2 ) // If run size != 1 divide - { - int32_t middle = (end + begin) / 2; // Take the middle point - - arm_merge_sort_core_f32(pA, begin, middle, pB, dir); // Sort the left part - arm_merge_sort_core_f32(pA, middle, end, pB, dir); // Sort the right part - - topDownMerge(pB, begin, middle, end, pA, dir); - } -} - - -/** - @ingroup groupSupport - */ - -/** - @addtogroup Sorting - @{ - */ - -/** - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - * - * @par Algorithm - * The merge sort algorithm is a comparison algorithm that - * divide the input array in sublists and merge them to produce - * longer sorted sublists until there is only one list remaining. - * - * @par A work array is always needed. It must be allocated by the user - * linked to the instance at initialization time. - * - * @par It's an in-place algorithm. In order to obtain an out-of-place - * function, a memcpy of the source vector is performed - */ - - -void arm_merge_sort_f32( - const arm_merge_sort_instance_f32 * S, - float32_t *pSrc, - float32_t *pDst, - uint32_t blockSize) -{ - float32_t * pA; - - /* Out-of-place */ - if(pSrc != pDst) - { - memcpy(pDst, pSrc, blockSize*sizeof(float32_t)); - pA = pDst; - } - else - pA = pSrc; - - /* A working buffer is needed */ - memcpy(S->buffer, pSrc, blockSize*sizeof(float32_t)); - - arm_merge_sort_core_f32(S->buffer, 0, blockSize, pA, S->dir); -} -/** - @} end of Sorting group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_merge_sort_init_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_merge_sort_init_f32.c deleted file mode 100644 index df8ff13..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_merge_sort_init_f32.c +++ /dev/null @@ -1,53 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_merge_sort_init_f32.c - * Description: Floating point merge sort initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup Sorting - @{ - */ - - - /** - * @param[in,out] S points to an instance of the sorting structure. - * @param[in] dir Sorting order. - * @param[in] buffer Working buffer. - */ -void arm_merge_sort_init_f32(arm_merge_sort_instance_f32 * S, arm_sort_dir dir, float32_t * buffer) -{ - S->dir = dir; - S->buffer = buffer; -} -/** - @} end of Sorting group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_f16.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_f16.c deleted file mode 100644 index d6b9340..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_f16.c +++ /dev/null @@ -1,155 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_q15_to_float.c - * Description: Converts the elements of the Q15 vector to floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/** - @ingroup groupSupport - */ - -/** - * @defgroup q15_to_x Convert 16-bit fixed point value - */ - -/** - @addtogroup q15_to_x - @{ - */ - -/** - @brief Converts the elements of the Q15 vector to f16 vector. - @param[in] pSrc points to the Q15 input vector - @param[out] pDst points to the f16 output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (float16_t) pSrc[n] / 32768;   0 <= n < blockSize.
-
- */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_q15_to_f16( - const q15_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - int32_t blkCnt; /* loop counters */ - q15x8_t vecDst; - q15_t const *pSrcVec; - - pSrcVec = (q15_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - /* C = (float16_t) A / 32768 */ - /* convert from q15 to float and then store the results in the destination buffer */ - vecDst = vld1q(pSrcVec); pSrcVec += 8; - vstrhq(pDst, vcvtq_n_f16_s16(vecDst, 15)); pDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 7; - if (blkCnt > 0) - { - mve_pred16_t p0 = vctp16q(blkCnt); - vecDst = vld1q(pSrcVec); pSrcVec += 8; - vstrhq_p(pDst, vcvtq_n_f16_s16(vecDst, 15), p0); - } -} -#else - -void arm_q15_to_f16( - const q15_t * pSrc, - float16_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const q15_t *pIn = pSrc; /* Source pointer */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (float16_t) A / 32768 */ - - /* Convert from q15 to float and store result in destination buffer */ - *pDst++ = ((_Float16) * pIn++ / 32768.0f16); - *pDst++ = ((_Float16) * pIn++ / 32768.0f16); - *pDst++ = ((_Float16) * pIn++ / 32768.0f16); - *pDst++ = ((_Float16) * pIn++ / 32768.0f16); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (float16_t) A / 32768 */ - - /* Convert from q15 to float and store result in destination buffer */ - *pDst++ = ((_Float16) *pIn++ / 32768.0f16); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of q15_to_x group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c deleted file mode 100644 index 4634518..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c +++ /dev/null @@ -1,207 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_q15_to_float.c - * Description: Converts the elements of the Q15 vector to floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - * @defgroup q15_to_x Convert 16-bit fixed point value - */ - -/** - @addtogroup q15_to_x - @{ - */ - -/** - @brief Converts the elements of the Q15 vector to floating-point vector. - @param[in] pSrc points to the Q15 input vector - @param[out] pDst points to the floating-point output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.
-
- */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_q15_to_float( - const q15_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - - q15x8_t vecDst; - q15_t const *pSrcVec; - - pSrcVec = (q15_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* C = (float32_t) A / 32768 */ - /* convert from q15 to float and then store the results in the destination buffer */ - vecDst = vldrhq_s32(pSrcVec); - pSrcVec += 4; - vstrwq(pDst, vcvtq_n_f32_s32((int32x4_t)vecDst, 15)); - pDst += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C = (float32_t) A / 32768 */ - - /* Convert from q15 to float and store result in destination buffer */ - *pDst++ = ((float32_t) *pSrcVec++ / 32768.0f); - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -#if defined(ARM_MATH_NEON_EXPERIMENTAL) -void arm_q15_to_float( - const q15_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const q15_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - int16x8_t inV; - int32x4_t inV0, inV1; - float32x4_t outV; - - blkCnt = blockSize >> 3U; - - /* Compute 8 outputs at a time. - ** a second loop below computes the remaining 1 to 7 samples. */ - while (blkCnt > 0U) - { - /* C = (float32_t) A / 32768 */ - /* convert from q15 to float and then store the results in the destination buffer */ - inV = vld1q_s16(pIn); - pIn += 8; - - inV0 = vmovl_s16(vget_low_s16(inV)); - inV1 = vmovl_s16(vget_high_s16(inV)); - - outV = vcvtq_n_f32_s32(inV0,15); - vst1q_f32(pDst, outV); - pDst += 4; - - outV = vcvtq_n_f32_s32(inV1,15); - vst1q_f32(pDst, outV); - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 8, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize & 7; - - - while (blkCnt > 0U) - { - /* C = (float32_t) A / 32768 */ - /* convert from q15 to float and then store the results in the destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 32768.0f); - - /* Decrement the loop counter */ - blkCnt--; - } -} -#else -void arm_q15_to_float( - const q15_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const q15_t *pIn = pSrc; /* Source pointer */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (float32_t) A / 32768 */ - - /* Convert from q15 to float and store result in destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 32768.0f); - *pDst++ = ((float32_t) * pIn++ / 32768.0f); - *pDst++ = ((float32_t) * pIn++ / 32768.0f); - *pDst++ = ((float32_t) * pIn++ / 32768.0f); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (float32_t) A / 32768 */ - - /* Convert from q15 to float and store result in destination buffer */ - *pDst++ = ((float32_t) *pIn++ / 32768.0f); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of q15_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c deleted file mode 100644 index 7550559..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c +++ /dev/null @@ -1,182 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_q15_to_q31.c - * Description: Converts the elements of the Q15 vector to Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup q15_to_x - @{ - */ - -/** - @brief Converts the elements of the Q15 vector to Q31 vector. - @param[in] pSrc points to the Q15 input vector - @param[out] pDst points to the Q31 output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.
-
- */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_q15_to_q31( - const q15_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - - uint32_t blkCnt; - - q31x4_t vecDst; - - blkCnt = blockSize>> 2; - while (blkCnt > 0U) - { - - /* C = (q31_t)A << 16 */ - /* convert from q15 to q31 and then store the results in the destination buffer */ - /* load q15 + 32-bit widening */ - vecDst = vldrhq_s32((q15_t const *) pSrc); - vecDst = vshlq_n(vecDst, 16); - vstrwq_s32(pDst, vecDst); - - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pDst += 4; - pSrc += 4; - blkCnt --; - } - - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C = (q31_t) A << 16 */ - - /* Convert from q15 to q31 and store result in destination buffer */ - *pDst++ = (q31_t) *pSrc++ << 16; - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -void arm_q15_to_q31( - const q15_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const q15_t *pIn = pSrc; /* Source pointer */ - -#if defined (ARM_MATH_LOOPUNROLL) - q31_t in1, in2; - q31_t out1, out2, out3, out4; -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (q31_t)A << 16 */ - - /* Convert from q15 to q31 and store result in destination buffer */ - in1 = read_q15x2_ia (&pIn); - in2 = read_q15x2_ia (&pIn); - -#ifndef ARM_MATH_BIG_ENDIAN - - /* extract lower 16 bits to 32 bit result */ - out1 = in1 << 16U; - /* extract upper 16 bits to 32 bit result */ - out2 = in1 & 0xFFFF0000; - /* extract lower 16 bits to 32 bit result */ - out3 = in2 << 16U; - /* extract upper 16 bits to 32 bit result */ - out4 = in2 & 0xFFFF0000; - -#else - - /* extract upper 16 bits to 32 bit result */ - out1 = in1 & 0xFFFF0000; - /* extract lower 16 bits to 32 bit result */ - out2 = in1 << 16U; - /* extract upper 16 bits to 32 bit result */ - out3 = in2 & 0xFFFF0000; - /* extract lower 16 bits to 32 bit result */ - out4 = in2 << 16U; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - *pDst++ = out1; - *pDst++ = out2; - *pDst++ = out3; - *pDst++ = out4; - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (q31_t) A << 16 */ - - /* Convert from q15 to q31 and store result in destination buffer */ - *pDst++ = (q31_t) *pIn++ << 16; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of q15_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c deleted file mode 100644 index 54e8740..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c +++ /dev/null @@ -1,190 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_q15_to_q7.c - * Description: Converts the elements of the Q15 vector to Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup q15_to_x - @{ - */ - -/** - @brief Converts the elements of the Q15 vector to Q7 vector. - @param[in] pSrc points to the Q15 input vector - @param[out] pDst points to the Q7 output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.
-
- */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_q15_to_q7( - const q15_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - - uint32_t blkCnt; /* loop counters */ - q15x8x2_t tmp; - q15_t const *pSrcVec; - q7x16_t vecDst; - - - pSrcVec = (q15_t const *) pSrc; - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - /* C = (q7_t) A >> 8 */ - /* convert from q15 to q7 and then store the results in the destination buffer */ - tmp = vld2q(pSrcVec); - pSrcVec += 16; - vecDst = vqshrnbq_n_s16(vecDst, tmp.val[0], 8); - vecDst = vqshrntq_n_s16(vecDst, tmp.val[1], 8); - vst1q(pDst, vecDst); - pDst += 16; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - blkCnt = blockSize & 0xF; - while (blkCnt > 0U) - { - /* C = (q7_t) A >> 8 */ - - /* Convert from q15 to q7 and store result in destination buffer */ - *pDst++ = (q7_t) (*pSrcVec++ >> 8); - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -void arm_q15_to_q7( - const q15_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const q15_t *pIn = pSrc; /* Source pointer */ - -#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) - q31_t in1, in2; - q31_t out1, out2; -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (q7_t) A >> 8 */ - - /* Convert from q15 to q7 and store result in destination buffer */ -#if defined (ARM_MATH_DSP) - - in1 = read_q15x2_ia (&pIn); - in2 = read_q15x2_ia (&pIn); - -#ifndef ARM_MATH_BIG_ENDIAN - - out1 = __PKHTB(in2, in1, 16); - out2 = __PKHBT(in2, in1, 16); - -#else - - out1 = __PKHTB(in1, in2, 16); - out2 = __PKHBT(in1, in2, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* rotate packed value by 24 */ - out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24); - - /* anding with 0xff00ff00 to get two 8 bit values */ - out1 = out1 & 0xFF00FF00; - /* anding with 0x00ff00ff to get two 8 bit values */ - out2 = out2 & 0x00FF00FF; - - /* oring two values(contains two 8 bit values) to get four packed 8 bit values */ - out1 = out1 | out2; - - /* store 4 samples at a time to destiantion buffer */ - write_q7x4_ia (&pDst, out1); - -#else - - *pDst++ = (q7_t) (*pIn++ >> 8); - *pDst++ = (q7_t) (*pIn++ >> 8); - *pDst++ = (q7_t) (*pIn++ >> 8); - *pDst++ = (q7_t) (*pIn++ >> 8); - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (q7_t) A >> 8 */ - - /* Convert from q15 to q7 and store result in destination buffer */ - *pDst++ = (q7_t) (*pIn++ >> 8); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of q15_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c deleted file mode 100644 index 16f8807..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c +++ /dev/null @@ -1,202 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_q31_to_float.c - * Description: Converts the elements of the Q31 vector to floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - * @defgroup q31_to_x Convert 32-bit fixed point value - */ - -/** - @addtogroup q31_to_x - @{ - */ - -/** - @brief Converts the elements of the Q31 vector to floating-point vector. - @param[in] pSrc points to the Q31 input vector - @param[out] pDst points to the floating-point output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.
-
- */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_q31_to_float( - const q31_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q31x4_t vecDst; - q31_t const *pSrcVec; - - pSrcVec = (q31_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* C = (float32_t) A / 2147483648 */ - /* convert from q31 to float and then store the results in the destination buffer */ - vecDst = vld1q(pSrcVec); - pSrcVec += 4; - vstrwq(pDst, vcvtq_n_f32_s32(vecDst, 31)); - pDst += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C = (float32_t) A / 2147483648 */ - - /* Convert from q31 to float and store result in destination buffer */ - *pDst++ = ((float32_t) *pSrcVec++ / 2147483648.0f); - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -#if defined(ARM_MATH_NEON_EXPERIMENTAL) -void arm_q31_to_float( - const q31_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const q31_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - int32x4_t inV; - float32x4_t outV; - - blkCnt = blockSize >> 2U; - - /* Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0U) - { - /* C = (float32_t) A / 2147483648 */ - /* Convert from q31 to float and then store the results in the destination buffer */ - inV = vld1q_s32(pIn); - pIn += 4; - - outV = vcvtq_n_f32_s32(inV,31); - - vst1q_f32(pDst, outV); - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize & 3; - - - while (blkCnt > 0U) - { - /* C = (float32_t) A / 2147483648 */ - /* Convert from q31 to float and then store the results in the destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 2147483648.0f); - - /* Decrement the loop counter */ - blkCnt--; - } -} -#else -void arm_q31_to_float( - const q31_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const q31_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (float32_t) A / 2147483648 */ - - /* Convert from q31 to float and store result in destination buffer */ - *pDst++ = ((float32_t) *pIn++ / 2147483648.0f); - *pDst++ = ((float32_t) *pIn++ / 2147483648.0f); - *pDst++ = ((float32_t) *pIn++ / 2147483648.0f); - *pDst++ = ((float32_t) *pIn++ / 2147483648.0f); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (float32_t) A / 2147483648 */ - - /* Convert from q31 to float and store result in destination buffer */ - *pDst++ = ((float32_t) *pIn++ / 2147483648.0f); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of q31_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c deleted file mode 100644 index 720e884..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c +++ /dev/null @@ -1,181 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_q31_to_q15.c - * Description: Converts the elements of the Q31 vector to Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup q31_to_x - @{ - */ - -/** - @brief Converts the elements of the Q31 vector to Q15 vector. - @param[in] pSrc points to the Q31 input vector - @param[out] pDst points to the Q15 output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.
-
- */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_q31_to_q15( - const q31_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q31x4x2_t tmp; - q15x8_t vecDst; - q31_t const *pSrcVec; - - - pSrcVec = (q31_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* C = (q15_t) A >> 16 */ - /* convert from q31 to q15 and then store the results in the destination buffer */ - tmp = vld2q(pSrcVec); - pSrcVec += 8; - vecDst = vshrnbq_n_s32(vecDst, tmp.val[0], 16); - vecDst = vshrntq_n_s32(vecDst, tmp.val[1], 16); - vst1q(pDst, vecDst); - pDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - /* - * tail - */ - blkCnt = blockSize & 7; - while (blkCnt > 0U) - { - /* C = (q15_t) (A >> 16) */ - - /* Convert from q31 to q15 and store result in destination buffer */ - *pDst++ = (q15_t) (*pSrcVec++ >> 16); - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -void arm_q31_to_q15( - const q31_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const q31_t *pIn = pSrc; /* Source pointer */ - -#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) - q31_t in1, in2, in3, in4; - q31_t out1, out2; -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (q15_t) (A >> 16) */ - - /* Convert from q31 to q15 and store result in destination buffer */ -#if defined (ARM_MATH_DSP) - - in1 = *pIn++; - in2 = *pIn++; - in3 = *pIn++; - in4 = *pIn++; - - /* pack two higher 16-bit values from two 32-bit values */ -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __PKHTB(in2, in1, 16); - out2 = __PKHTB(in4, in3, 16); -#else - out1 = __PKHTB(in1, in2, 16); - out2 = __PKHTB(in3, in4, 16); -#endif /* #ifdef ARM_MATH_BIG_ENDIAN */ - - write_q15x2_ia (&pDst, out1); - write_q15x2_ia (&pDst, out2); - -#else - - *pDst++ = (q15_t) (*pIn++ >> 16); - *pDst++ = (q15_t) (*pIn++ >> 16); - *pDst++ = (q15_t) (*pIn++ >> 16); - *pDst++ = (q15_t) (*pIn++ >> 16); - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (q15_t) (A >> 16) */ - - /* Convert from q31 to q15 and store result in destination buffer */ - *pDst++ = (q15_t) (*pIn++ >> 16); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of q31_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c deleted file mode 100644 index 7614659..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c +++ /dev/null @@ -1,169 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_q31_to_q7.c - * Description: Converts the elements of the Q31 vector to Q7 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup q31_to_x - @{ - */ - -/** - @brief Converts the elements of the Q31 vector to Q7 vector. - @param[in] pSrc points to the Q31 input vector - @param[out] pDst points to the Q7 output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.
-
- */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_q31_to_q7( - const q31_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q31x4x4_t tmp; - q15x8_t evVec, oddVec; - q7x16_t vecDst; - q31_t const *pSrcVec; - - pSrcVec = (q31_t const *) pSrc; - blkCnt = blockSize >> 4; - while (blkCnt > 0U) - { - tmp = vld4q(pSrcVec); - pSrcVec += 16; - /* C = (q7_t) A >> 24 */ - /* convert from q31 to q7 and then store the results in the destination buffer */ - /* - * narrow and pack evens - */ - evVec = vshrnbq_n_s32(evVec, tmp.val[0], 16); - evVec = vshrntq_n_s32(evVec, tmp.val[2], 16); - /* - * narrow and pack odds - */ - oddVec = vshrnbq_n_s32(oddVec, tmp.val[1], 16); - oddVec = vshrntq_n_s32(oddVec, tmp.val[3], 16); - /* - * narrow & merge - */ - vecDst = vshrnbq_n_s16(vecDst, evVec, 8); - vecDst = vshrntq_n_s16(vecDst, oddVec, 8); - - vst1q(pDst, vecDst); - pDst += 16; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - /* - * tail - */ - blkCnt = blockSize & 0xF; - while (blkCnt > 0U) - { - /* C = (q7_t) (A >> 24) */ - - /* Convert from q31 to q7 and store result in destination buffer */ - *pDst++ = (q7_t) (*pSrcVec++ >> 24); - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -void arm_q31_to_q7( - const q31_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const q31_t *pIn = pSrc; /* Source pointer */ - -#if defined (ARM_MATH_LOOPUNROLL) - - q7_t out1, out2, out3, out4; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (q7_t) (A >> 24) */ - - /* Convert from q31 to q7 and store result in destination buffer */ - - out1 = (q7_t) (*pIn++ >> 24); - out2 = (q7_t) (*pIn++ >> 24); - out3 = (q7_t) (*pIn++ >> 24); - out4 = (q7_t) (*pIn++ >> 24); - write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4)); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (q7_t) (A >> 24) */ - - /* Convert from q31 to q7 and store result in destination buffer */ - *pDst++ = (q7_t) (*pIn++ >> 24); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of q31_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c deleted file mode 100644 index 3b29841..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c +++ /dev/null @@ -1,218 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_q7_to_float.c - * Description: Converts the elements of the Q7 vector to floating-point vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - * @defgroup q7_to_x Convert 8-bit fixed point value - */ - -/** - @addtogroup q7_to_x - @{ - */ - -/** - @brief Converts the elements of the Q7 vector to floating-point vector. - @param[in] pSrc points to the Q7 input vector - @param[out] pDst points to the floating-point output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.
-
- */ -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_q7_to_float( - const q7_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - q7x16_t vecDst; - q7_t const *pSrcVec; - - pSrcVec = (q7_t const *) pSrc; - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - /* C = (float32_t) A / 32768 */ - /* convert from q7 to float and then store the results in the destination buffer */ - vecDst = vldrbq_s32(pSrcVec); - pSrcVec += 4; - vstrwq(pDst, vcvtq_n_f32_s32((int32x4_t)vecDst, 7)); - pDst += 4; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C = (float32_t) A / 128 */ - - /* Convert from q7 to float and store result in destination buffer */ - *pDst++ = ((float32_t) * pSrcVec++ / 128.0f); - - /* Decrement loop counter */ - blkCnt--; - } -} -#else -#if defined(ARM_MATH_NEON) -void arm_q7_to_float( - const q7_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - const q7_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - - int8x16_t inV; - int16x8_t inVLO, inVHI; - int32x4_t inVLL, inVLH, inVHL, inVHH; - float32x4_t outV; - - blkCnt = blockSize >> 4U; - - /* Compute 16 outputs at a time. - ** a second loop below computes the remaining 1 to 15 samples. */ - while (blkCnt > 0U) - { - /* C = (float32_t) A / 128 */ - /* Convert from q7 to float and then store the results in the destination buffer */ - inV = vld1q_s8(pIn); - pIn += 16; - - inVLO = vmovl_s8(vget_low_s8(inV)); - inVHI = vmovl_s8(vget_high_s8(inV)); - - inVLL = vmovl_s16(vget_low_s16(inVLO)); - inVLH = vmovl_s16(vget_high_s16(inVLO)); - inVHL = vmovl_s16(vget_low_s16(inVHI)); - inVHH = vmovl_s16(vget_high_s16(inVHI)); - - outV = vcvtq_n_f32_s32(inVLL,7); - vst1q_f32(pDst, outV); - pDst += 4; - - outV = vcvtq_n_f32_s32(inVLH,7); - vst1q_f32(pDst, outV); - pDst += 4; - - outV = vcvtq_n_f32_s32(inVHL,7); - vst1q_f32(pDst, outV); - pDst += 4; - - outV = vcvtq_n_f32_s32(inVHH,7); - vst1q_f32(pDst, outV); - pDst += 4; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 16, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize & 0xF; - - while (blkCnt > 0U) - { - /* C = (float32_t) A / 128 */ - /* Convert from q7 to float and then store the results in the destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 128.0f); - - /* Decrement the loop counter */ - blkCnt--; - } -} -#else -void arm_q7_to_float( - const q7_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const q7_t *pIn = pSrc; /* Source pointer */ - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (float32_t) A / 128 */ - - /* Convert from q7 to float and store result in destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 128.0f); - *pDst++ = ((float32_t) * pIn++ / 128.0f); - *pDst++ = ((float32_t) * pIn++ / 128.0f); - *pDst++ = ((float32_t) * pIn++ / 128.0f); - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (float32_t) A / 128 */ - - /* Convert from q7 to float and store result in destination buffer */ - *pDst++ = ((float32_t) * pIn++ / 128.0f); - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* #if defined(ARM_MATH_NEON) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of q7_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c deleted file mode 100644 index 752aadf..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c +++ /dev/null @@ -1,188 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_q7_to_q15.c - * Description: Converts the elements of the Q7 vector to Q15 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup q7_to_x - @{ - */ - -/** - @brief Converts the elements of the Q7 vector to Q15 vector. - @param[in] pSrc points to the Q7 input vector - @param[out] pDst points to the Q15 output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.
-
- */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_q7_to_q15( - const q7_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - - uint32_t blkCnt; /* loop counters */ - q15x8_t vecDst; - q7_t const *pSrcVec; - - - pSrcVec = (q7_t const *) pSrc; - blkCnt = blockSize >> 3; - while (blkCnt > 0U) - { - /* C = (q15_t) A << 8 */ - /* convert from q7 to q15 and then store the results in the destination buffer */ - /* load q7 + 32-bit widening */ - vecDst = vldrbq_s16(pSrcVec); - pSrcVec += 8; - vecDst = vecDst << 8; - vstrhq(pDst, vecDst); - pDst += 8; - /* - * Decrement the blockSize loop counter - */ - blkCnt--; - } - - blkCnt = blockSize & 7; - while (blkCnt > 0U) - { - /* C = (q15_t) A << 8 */ - - /* Convert from q7 to q15 and store result in destination buffer */ - *pDst++ = (q15_t) * pSrcVec++ << 8; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#else -void arm_q7_to_q15( - const q7_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const q7_t *pIn = pSrc; /* Source pointer */ - -#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) - q31_t in; - q31_t in1, in2; - q31_t out1, out2; -#endif - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (q15_t) A << 8 */ - - /* Convert from q7 to q15 and store result in destination buffer */ -#if defined (ARM_MATH_DSP) - - in = read_q7x4_ia (&pIn); - - /* rotatate in by 8 and extend two q7_t values to q15_t values */ - in1 = __SXTB16(__ROR(in, 8)); - - /* extend remainig two q7_t values to q15_t values */ - in2 = __SXTB16(in); - - in1 = in1 << 8U; - in2 = in2 << 8U; - - in1 = in1 & 0xFF00FF00; - in2 = in2 & 0xFF00FF00; - -#ifndef ARM_MATH_BIG_ENDIAN - out2 = __PKHTB(in1, in2, 16); - out1 = __PKHBT(in2, in1, 16); -#else - out1 = __PKHTB(in1, in2, 16); - out2 = __PKHBT(in2, in1, 16); -#endif - - write_q15x2_ia (&pDst, out1); - write_q15x2_ia (&pDst, out2); - -#else - - *pDst++ = (q15_t) *pIn++ << 8; - *pDst++ = (q15_t) *pIn++ << 8; - *pDst++ = (q15_t) *pIn++ << 8; - *pDst++ = (q15_t) *pIn++ << 8; - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (q15_t) A << 8 */ - - /* Convert from q7 to q15 and store result in destination buffer */ - *pDst++ = (q15_t) * pIn++ << 8; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of q7_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c deleted file mode 100644 index f4f6574..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c +++ /dev/null @@ -1,164 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_q7_to_q31.c - * Description: Converts the elements of the Q7 vector to Q31 vector - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/support_functions.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup q7_to_x - @{ - */ - -/** - @brief Converts the elements of the Q7 vector to Q31 vector. - @param[in] pSrc points to the Q7 input vector - @param[out] pDst points to the Q31 output vector - @param[in] blockSize number of samples in each vector - @return none - - @par Details - The equation used for the conversion process is: - 
-      pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.
-
- */ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) -void arm_q7_to_q31( - const q7_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; - q31x4_t vecDst; - - blkCnt = blockSize >> 2; - while (blkCnt > 0U) - { - - /* C = (q31_t)A << 16 */ - /* convert from q15 to q31 and then store the results in the destination buffer */ - /* load q15 + 32-bit widening */ - vecDst = vldrbq_s32((q7_t const *) pSrc); - vecDst = vshlq_n(vecDst, 24); - vstrwq_s32(pDst, vecDst); - - /* - * Decrement the blockSize loop counter - * Advance vector source and destination pointers - */ - pDst += 4; - pSrc += 4; - blkCnt --; - } - - blkCnt = blockSize & 3; - while (blkCnt > 0U) - { - /* C = (q31_t) A << 24 */ - - /* Convert from q7 to q31 and store result in destination buffer */ - *pDst++ = (q31_t) *pSrc++ << 24; - - /* Decrement loop counter */ - blkCnt--; - } -} - -#else -void arm_q7_to_q31( - const q7_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* Loop counter */ - const q7_t *pIn = pSrc; /* Source pointer */ - -#if defined (ARM_MATH_LOOPUNROLL) - - q31_t in; - - /* Loop unrolling: Compute 4 outputs at a time */ - blkCnt = blockSize >> 2U; - - while (blkCnt > 0U) - { - /* C = (q31_t) A << 24 */ - - /* Convert from q7 to q31 and store result in destination buffer */ - in = read_q7x4_ia (&pIn); - -#ifndef ARM_MATH_BIG_ENDIAN - - *pDst++ = (__ROR(in, 8)) & 0xFF000000; - *pDst++ = (__ROR(in, 16)) & 0xFF000000; - *pDst++ = (__ROR(in, 24)) & 0xFF000000; - *pDst++ = (in & 0xFF000000); - -#else - - *pDst++ = (in & 0xFF000000); - *pDst++ = (__ROR(in, 24)) & 0xFF000000; - *pDst++ = (__ROR(in, 16)) & 0xFF000000; - *pDst++ = (__ROR(in, 8)) & 0xFF000000; - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement loop counter */ - blkCnt--; - } - - /* Loop unrolling: Compute remaining outputs */ - blkCnt = blockSize % 0x4U; - -#else - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - - while (blkCnt > 0U) - { - /* C = (q31_t) A << 24 */ - - /* Convert from q7 to q31 and store result in destination buffer */ - *pDst++ = (q31_t) * pIn++ << 24; - - /* Decrement loop counter */ - blkCnt--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @} end of q7_to_x group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_quick_sort_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_quick_sort_f32.c deleted file mode 100644 index b7e44ba..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_quick_sort_f32.c +++ /dev/null @@ -1,181 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_quick_sort_f32.c - * Description: Floating point quick sort - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_sorting.h" - -static uint32_t arm_quick_sort_partition_f32(float32_t *pSrc, int32_t first, int32_t last, uint8_t dir) -{ - /* This function will be called */ - int32_t i, j, pivot_index; - float32_t pivot; - float32_t temp; - - /* The first element is the pivot */ - pivot_index = first; - pivot = pSrc[pivot_index]; - - /* Initialize indices for do-while loops */ - i = first - 1; - j = last + 1; - - while(i < j) - { - /* The loop will stop as soon as the indices i and j cross each other. - * - * This event will happen surely since the values of the indices are incremented and - * decrement in the do-while loops that are executed at least once. - * It is impossible to loop forever inside the do-while loops since the pivot is - * always an element of the array and the conditions cannot be always true (at least - * the i-th or the j-th element will be equal to the pivot-th element). - * For example, in the extreme case of an ordered array the do-while loop related to i will stop - * at the first iteration (because pSrc[i]=pSrc[pivot] already), and the loop related to j - * will stop after (last-first) iterations (when j=pivot=i=first). j is returned and - * j+1 is going to be used as pivot by other calls of the function, until j=pivot=last. */ - - /* Move indices to the right and to the left */ - if(dir) - { - /* Compare left elements with pivot */ - do - { - i++; - } while (pSrc[i] < pivot && i pivot); - } - else - { - /* Compare left elements with pivot */ - do - { - i++; - } while (pSrc[i] > pivot && i Swap */ - temp=pSrc[i]; - pSrc[i]=pSrc[j]; - pSrc[j]=temp; - } - } - - return j; -} - -static void arm_quick_sort_core_f32(float32_t *pSrc, int32_t first, int32_t last, uint8_t dir) -{ - /* If the array [first ... last] has more than one element */ - if(firstdir); - /* The previous function could be called recursively a maximum - * of (blockSize-1) times, generating a stack consumption of 4*(blockSize-1) bytes. */ -} - -/** - @} end of Sorting group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_selection_sort_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_selection_sort_f32.c deleted file mode 100644 index 6d4489e..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_selection_sort_f32.c +++ /dev/null @@ -1,107 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_selection_sort_f32.c - * Description: Floating point selection sort - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_sorting.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup Sorting - @{ - */ - -/** - * @private - * @param[in] S points to an instance of the sorting structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - * - * @par Algorithm - * The Selection sort algorithm is a comparison algorithm that - * divides the input array into a sorted and an unsorted sublist - * (initially the sorted sublist is empty and the unsorted sublist - * is the input array), looks for the smallest (or biggest) - * element in the unsorted sublist, swapping it with the leftmost - * one, and moving the sublists boundary one element to the right. - * - * @par It's an in-place algorithm. In order to obtain an out-of-place - * function, a memcpy of the source vector is performed. - */ - -void arm_selection_sort_f32( - const arm_sort_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t i, j, k; - uint8_t dir = S->dir; - float32_t temp; - - float32_t * pA; - - if(pSrc != pDst) // out-of-place - { - memcpy(pDst, pSrc, blockSize*sizeof(float32_t) ); - pA = pDst; - } - else - pA = pSrc; - - /* Move the boundary one element to the right */ - for (i=0; ialg) - { - case ARM_SORT_BITONIC: - arm_bitonic_sort_f32(S, pSrc, pDst, blockSize); - break; - - case ARM_SORT_BUBBLE: - arm_bubble_sort_f32(S, pSrc, pDst, blockSize); - break; - - case ARM_SORT_HEAP: - arm_heap_sort_f32(S, pSrc, pDst, blockSize); - break; - - case ARM_SORT_INSERTION: - arm_insertion_sort_f32(S, pSrc, pDst, blockSize); - break; - - case ARM_SORT_QUICK: - arm_quick_sort_f32(S, pSrc, pDst, blockSize); - break; - - case ARM_SORT_SELECTION: - arm_selection_sort_f32(S, pSrc, pDst, blockSize); - break; - } -} - -/** - @} end of Sorting group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_sort_init_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_sort_init_f32.c deleted file mode 100644 index 04dcc71..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_sort_init_f32.c +++ /dev/null @@ -1,54 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_sort_init_f32.c - * Description: Floating point sort initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_sorting.h" - -/** - @ingroup groupSupport - */ - -/** - @addtogroup Sorting - @{ - */ - - - /** - * @param[in,out] S points to an instance of the sorting structure. - * @param[in] alg Selected algorithm. - * @param[in] dir Sorting order. - */ -void arm_sort_init_f32(arm_sort_instance_f32 * S, arm_sort_alg alg, arm_sort_dir dir) -{ - S->alg = alg; - S->dir = dir; -} - -/** - @} end of Sorting group - */ diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f16.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f16.c deleted file mode 100644 index f0ebaf4..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f16.c +++ /dev/null @@ -1,146 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_weighted_sum_f16.c - * Description: Weighted Sum - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include - -#include "dsp/support_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - @ingroup groupSupport - */ - -/** - @defgroup weightedsum Weighted Sum - - Weighted sum of values - */ - - -/** - * @addtogroup weightedsum - * @{ - */ - - -/** - * @brief Weighted sum - * - * - * @param[in] *in Array of input values. - * @param[in] *weigths Weights - * @param[in] blockSize Number of samples in the input array. - * @return Weighted sum - * - */ - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -float16_t arm_weighted_sum_f16(const float16_t *in,const float16_t *weigths, uint32_t blockSize) -{ - _Float16 accum1, accum2; - float16x8_t accum1V, accum2V; - float16x8_t inV, wV; - const float16_t *pIn, *pW; - uint32_t blkCnt; - - - pIn = in; - pW = weigths; - - - accum1V = vdupq_n_f16(0.0f16); - accum2V = vdupq_n_f16(0.0f16); - - blkCnt = blockSize >> 3; - while (blkCnt > 0) - { - inV = vld1q(pIn); - wV = vld1q(pW); - - pIn += 4; - pW += 4; - - accum1V = vfmaq(accum1V, inV, wV); - accum2V = vaddq(accum2V, wV); - blkCnt--; - } - - accum1 = vecAddAcrossF16Mve(accum1V); - accum2 = vecAddAcrossF16Mve(accum2V); - - blkCnt = blockSize & 7; - while(blkCnt > 0) - { - accum1 += (_Float16)*pIn++ * (_Float16)*pW; - accum2 += (_Float16)*pW++; - blkCnt--; - } - - - return (accum1 / accum2); -} - -#else - -float16_t arm_weighted_sum_f16(const float16_t *in, const float16_t *weigths, uint32_t blockSize) -{ - - _Float16 accum1, accum2; - const float16_t *pIn, *pW; - uint32_t blkCnt; - - - pIn = in; - pW = weigths; - - accum1=0.0f16; - accum2=0.0f16; - - blkCnt = blockSize; - while(blkCnt > 0) - { - accum1 += (_Float16)*pIn++ * (_Float16)*pW; - accum2 += (_Float16)*pW++; - blkCnt--; - } - - return(accum1 / accum2); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of weightedsum group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ - diff --git a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f32.c b/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f32.c deleted file mode 100644 index dc83a4d..0000000 --- a/Drivers/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f32.c +++ /dev/null @@ -1,187 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_weighted_sum_f32.c - * Description: Weighted Sum - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include - -#include "dsp/support_functions.h" - -/** - * @addtogroup weightedsum - * @{ - */ - - -/** - * @brief Weighted sum - * - * - * @param[in] *in Array of input values. - * @param[in] *weigths Weights - * @param[in] blockSize Number of samples in the input array. - * @return Weighted sum - * - */ - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" - -float32_t arm_weighted_sum_f32(const float32_t *in,const float32_t *weigths, uint32_t blockSize) -{ - float32_t accum1, accum2; - f32x4_t accum1V, accum2V; - f32x4_t inV, wV; - const float32_t *pIn, *pW; - uint32_t blkCnt; - - - pIn = in; - pW = weigths; - - - accum1V = vdupq_n_f32(0.0); - accum2V = vdupq_n_f32(0.0); - - blkCnt = blockSize >> 2; - while (blkCnt > 0) - { - inV = vld1q(pIn); - wV = vld1q(pW); - - pIn += 4; - pW += 4; - - accum1V = vfmaq(accum1V, inV, wV); - accum2V = vaddq(accum2V, wV); - blkCnt--; - } - - accum1 = vecAddAcrossF32Mve(accum1V); - accum2 = vecAddAcrossF32Mve(accum2V); - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - accum1 += *pIn++ * *pW; - accum2 += *pW++; - blkCnt--; - } - - - return (accum1 / accum2); -} - -#else -#if defined(ARM_MATH_NEON) - -#include "NEMath.h" -float32_t arm_weighted_sum_f32(const float32_t *in,const float32_t *weigths, uint32_t blockSize) -{ - - float32_t accum1, accum2; - float32x4_t accum1V, accum2V; - float32x2_t tempV; - - float32x4_t inV,wV; - - const float32_t *pIn, *pW; - uint32_t blkCnt; - - - pIn = in; - pW = weigths; - - accum1=0.0f; - accum2=0.0f; - - accum1V = vdupq_n_f32(0.0f); - accum2V = vdupq_n_f32(0.0f); - - blkCnt = blockSize >> 2; - while(blkCnt > 0) - { - inV = vld1q_f32(pIn); - wV = vld1q_f32(pW); - - pIn += 4; - pW += 4; - - accum1V = vmlaq_f32(accum1V,inV,wV); - accum2V = vaddq_f32(accum2V,wV); - blkCnt--; - } - - tempV = vpadd_f32(vget_low_f32(accum1V),vget_high_f32(accum1V)); - accum1 = vget_lane_f32(tempV, 0) + vget_lane_f32(tempV, 1); - - tempV = vpadd_f32(vget_low_f32(accum2V),vget_high_f32(accum2V)); - accum2 = vget_lane_f32(tempV, 0) + vget_lane_f32(tempV, 1); - - blkCnt = blockSize & 3; - while(blkCnt > 0) - { - accum1 += *pIn++ * *pW; - accum2 += *pW++; - blkCnt--; - } - - - return(accum1 / accum2); -} -#else -float32_t arm_weighted_sum_f32(const float32_t *in, const float32_t *weigths, uint32_t blockSize) -{ - - float32_t accum1, accum2; - const float32_t *pIn, *pW; - uint32_t blkCnt; - - - pIn = in; - pW = weigths; - - accum1=0.0f; - accum2=0.0f; - - blkCnt = blockSize; - while(blkCnt > 0) - { - accum1 += *pIn++ * *pW; - accum2 += *pW++; - blkCnt--; - } - - return(accum1 / accum2); -} -#endif -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - * @} end of weightedsum group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/CMakeLists.txt b/Drivers/CMSIS/DSP/Source/TransformFunctions/CMakeLists.txt deleted file mode 100644 index 4e0c2c6..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/CMakeLists.txt +++ /dev/null @@ -1,213 +0,0 @@ -cmake_minimum_required (VERSION 3.14) - -project(CMSISDSPTransform) - -include(configLib) -include(configDsp) - -add_library(CMSISDSPTransform STATIC) -configLib(CMSISDSPTransform ${ROOT}) -configDsp(CMSISDSPTransform ${ROOT}) - -include(fft) -fft(CMSISDSPTransform) - -if (CONFIGTABLE AND ALLFFT) -target_compile_definitions(CMSISDSPTransform PUBLIC ARM_ALL_FFT_TABLES) -endif() - -target_sources(CMSISDSPTransform PRIVATE arm_bitreversal.c) -target_sources(CMSISDSPTransform PRIVATE arm_bitreversal2.c) - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPTransform PRIVATE arm_bitreversal_f16.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR CFFT_F32_16 OR CFFT_F32_32 OR CFFT_F32_64 OR CFFT_F32_128 OR CFFT_F32_256 OR CFFT_F32_512 - OR CFFT_F32_1024 OR CFFT_F32_2048 OR CFFT_F32_4096) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_f32.c) -endif() - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -if (NOT CONFIGTABLE OR ALLFFT OR CFFT_F16_16 OR CFFT_F16_32 OR CFFT_F16_64 OR CFFT_F16_128 OR CFFT_F16_256 OR CFFT_F16_512 - OR CFFT_F16_1024 OR CFFT_F16_2048 OR CFFT_F16_4096) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_f16.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f16.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_f16.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_f16.c) -endif() -endif() - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -if (NOT CONFIGTABLE OR ALLFFT OR RFFT_F16_128 OR RFFT_F16_512 OR RFFT_F16_2048 OR RFFT_F16_8192) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f16.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f16.c) -endif() -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR CFFT_F64_16 OR CFFT_F64_32 OR CFFT_F64_64 OR CFFT_F64_128 OR CFFT_F64_256 OR CFFT_F64_512 - OR CFFT_F64_1024 OR CFFT_F64_2048 OR CFFT_F64_4096) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_f64.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_f64.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR CFFT_Q15_16 OR CFFT_Q15_32 OR CFFT_Q15_64 OR CFFT_Q15_128 OR CFFT_Q15_256 OR CFFT_Q15_512 - OR CFFT_Q15_1024 OR CFFT_Q15_2048 OR CFFT_Q15_4096) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_q15.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR CFFT_Q31_16 OR CFFT_Q31_32 OR CFFT_Q31_64 OR CFFT_Q31_128 OR CFFT_Q31_256 OR CFFT_Q31_512 - OR CFFT_Q31_1024 OR CFFT_Q31_2048 OR CFFT_Q31_4096) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_q31.c) -endif() - - -if (NOT CONFIGTABLE OR ALLFFT OR DCT4_F32_128 OR DCT4_F32_512 OR DCT4_F32_2048 OR DCT4_F32_8192) -target_sources(CMSISDSPTransform PRIVATE arm_dct4_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_f32.c) - -target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR DCT4_Q31_128 OR DCT4_Q31_512 OR DCT4_Q31_2048 OR DCT4_Q31_8192) -target_sources(CMSISDSPTransform PRIVATE arm_dct4_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q31.c) - -target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR ALLFFT OR DCT4_Q15_128 OR DCT4_Q15_512 OR DCT4_Q15_2048 OR DCT4_Q15_8192) -target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_dct4_q15.c) - -target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR RFFT_FAST_F32_32 OR RFFT_FAST_F32_64 OR RFFT_FAST_F32_128 - OR RFFT_FAST_F32_256 OR RFFT_FAST_F32_512 OR RFFT_FAST_F32_1024 OR RFFT_FAST_F32_2048 - OR RFFT_FAST_F32_4096 ) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_init_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR RFFT_FAST_F64_32 OR RFFT_FAST_F64_64 OR RFFT_FAST_F64_128 - OR RFFT_FAST_F64_256 OR RFFT_FAST_F64_512 OR RFFT_FAST_F64_1024 OR RFFT_FAST_F64_2048 - OR RFFT_FAST_F64_4096 ) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_f64.c) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_init_f64.c) -endif() - -if ((NOT DISABLEFLOAT16)) -if (NOT CONFIGTABLE OR ALLFFT OR RFFT_FAST_F16_32 OR RFFT_FAST_F16_64 OR RFFT_FAST_F16_128 - OR RFFT_FAST_F16_256 OR RFFT_FAST_F16_512 OR RFFT_FAST_F16_1024 OR RFFT_FAST_F16_2048 - OR RFFT_FAST_F16_4096 ) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_f16.c) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_init_f16.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_f16.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_f16.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f16.c) -endif() -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR RFFT_F32_128 OR RFFT_F32_512 OR RFFT_F32_2048 OR RFFT_F32_8192) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR RFFT_Q15_32 OR RFFT_Q15_64 OR RFFT_Q15_128 OR RFFT_Q15_256 - OR RFFT_Q15_512 OR RFFT_Q15_1024 OR RFFT_Q15_2048 OR RFFT_Q15_4096 OR RFFT_Q15_8192) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR RFFT_Q31_32 OR RFFT_Q31_64 OR RFFT_Q31_128 OR RFFT_Q31_256 - OR RFFT_Q31_512 OR RFFT_Q31_1024 OR RFFT_Q31_2048 OR RFFT_Q31_4096 OR RFFT_Q31_8192) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_init_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) -endif() - -if (WRAPPER OR ARM_CFFT_RADIX2_Q15) - target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q15.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR ARM_CFFT_RADIX4_Q15) - target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q15.c) -endif() - -if (WRAPPER OR ARM_CFFT_RADIX2_Q31) - target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q31.c) -endif() - -if (NOT CONFIGTABLE OR ALLFFT OR ARM_CFFT_RADIX4_Q31) - target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q31.c) -endif() - -# For scipy or wrappers or benchmarks -if (WRAPPER) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_f32.c) -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_f16.c) -endif() - - target_compile_definitions(CMSISDSPTransform PUBLIC ARM_TABLE_BITREV_1024) - target_compile_definitions(CMSISDSPTransform PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096) - target_compile_definitions(CMSISDSPTransform PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_4096) - target_compile_definitions(CMSISDSPTransform PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_4096) -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) - target_compile_definitions(CMSISDSPTransform PUBLIC ARM_TABLE_TWIDDLECOEF_F16_4096) -endif() -endif() - -target_sources(CMSISDSPTransform PRIVATE arm_mfcc_init_f32.c) -target_sources(CMSISDSPTransform PRIVATE arm_mfcc_f32.c) - -target_sources(CMSISDSPTransform PRIVATE arm_mfcc_init_q31.c) -target_sources(CMSISDSPTransform PRIVATE arm_mfcc_q31.c) - -target_sources(CMSISDSPTransform PRIVATE arm_mfcc_init_q15.c) -target_sources(CMSISDSPTransform PRIVATE arm_mfcc_q15.c) - -if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) -target_sources(CMSISDSPTransform PRIVATE arm_mfcc_init_f16.c) -target_sources(CMSISDSPTransform PRIVATE arm_mfcc_f16.c) -endif() - -### Includes -target_include_directories(CMSISDSPTransform PUBLIC "${DSP}/Include") - - - diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c deleted file mode 100644 index e71c60b..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c +++ /dev/null @@ -1,83 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: TransformFunctions.c - * Description: Combination of all transform function source files. - * - * $Date: 18. March 2019 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_bitreversal.c" -#include "arm_bitreversal2.c" -#include "arm_cfft_f32.c" -#include "arm_cfft_f64.c" -#include "arm_cfft_q15.c" -#include "arm_cfft_q31.c" -#include "arm_cfft_init_f32.c" -#include "arm_cfft_init_f64.c" -#include "arm_cfft_init_q15.c" -#include "arm_cfft_init_q31.c" -#include "arm_cfft_radix2_f32.c" -#include "arm_cfft_radix2_q15.c" -#include "arm_cfft_radix2_q31.c" -#include "arm_cfft_radix4_f32.c" -#include "arm_cfft_radix4_q15.c" -#include "arm_cfft_radix4_q31.c" -#include "arm_cfft_radix8_f32.c" -#include "arm_rfft_fast_f32.c" -#include "arm_rfft_fast_f64.c" -#include "arm_rfft_fast_init_f32.c" -#include "arm_rfft_fast_init_f64.c" - -#include "arm_mfcc_init_f32.c" -#include "arm_mfcc_f32.c" - -#include "arm_mfcc_init_q31.c" -#include "arm_mfcc_q31.c" - -#include "arm_mfcc_init_q15.c" -#include "arm_mfcc_q15.c" - -/* Deprecated */ - -#include "arm_dct4_f32.c" -#include "arm_dct4_init_f32.c" -#include "arm_dct4_init_q15.c" -#include "arm_dct4_init_q31.c" -#include "arm_dct4_q15.c" -#include "arm_dct4_q31.c" - -#include "arm_rfft_f32.c" -#include "arm_rfft_q15.c" -#include "arm_rfft_q31.c" - -#include "arm_rfft_init_f32.c" -#include "arm_rfft_init_q15.c" -#include "arm_rfft_init_q31.c" - -#include "arm_cfft_radix4_init_f32.c" -#include "arm_cfft_radix4_init_q15.c" -#include "arm_cfft_radix4_init_q31.c" - -#include "arm_cfft_radix2_init_f32.c" -#include "arm_cfft_radix2_init_q15.c" -#include "arm_cfft_radix2_init_q31.c" diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c deleted file mode 100644 index c8136d8..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c +++ /dev/null @@ -1,44 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: TransformFunctionsF16.c - * Description: Combination of all transform function f16 source files. - * - * $Date: 20. April 2020 - * $Revision: V1.0.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "arm_cfft_f16.c" -#include "arm_cfft_init_f16.c" -#include "arm_cfft_radix2_f16.c" -#include "arm_cfft_radix4_f16.c" -#include "arm_rfft_fast_init_f16.c" -#include "arm_rfft_fast_f16.c" -#include "arm_cfft_radix8_f16.c" - -#include "arm_bitreversal_f16.c" - -#include "arm_mfcc_init_f16.c" -#include "arm_mfcc_f16.c" - -/* Deprecated */ -#include "arm_cfft_radix2_init_f16.c" -#include "arm_cfft_radix4_init_f16.c" diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c deleted file mode 100644 index cc8050d..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c +++ /dev/null @@ -1,230 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_bitreversal.c - * Description: Bitreversal functions - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - - -/** - @brief In-place floating-point bit reversal function. - @param[in,out] pSrc points to in-place floating-point data buffer - @param[in] fftSize length of FFT - @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table - @param[in] pBitRevTab points to bit reversal table - @return none - */ - -void arm_bitreversal_f32( - float32_t * pSrc, - uint16_t fftSize, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab) -{ - uint16_t fftLenBy2, fftLenBy2p1; - uint16_t i, j; - float32_t in; - - /* Initializations */ - j = 0U; - fftLenBy2 = fftSize >> 1U; - fftLenBy2p1 = (fftSize >> 1U) + 1U; - - /* Bit Reversal Implementation */ - for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U) - { - if (i < j) - { - /* pSrc[i] <-> pSrc[j]; */ - in = pSrc[2U * i]; - pSrc[2U * i] = pSrc[2U * j]; - pSrc[2U * j] = in; - - /* pSrc[i+1U] <-> pSrc[j+1U] */ - in = pSrc[(2U * i) + 1U]; - pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U]; - pSrc[(2U * j) + 1U] = in; - - /* pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */ - in = pSrc[2U * (i + fftLenBy2p1)]; - pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; - pSrc[2U * (j + fftLenBy2p1)] = in; - - /* pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */ - in = pSrc[(2U * (i + fftLenBy2p1)) + 1U]; - pSrc[(2U * (i + fftLenBy2p1)) + 1U] = - pSrc[(2U * (j + fftLenBy2p1)) + 1U]; - pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in; - - } - - /* pSrc[i+1U] <-> pSrc[j+1U] */ - in = pSrc[2U * (i + 1U)]; - pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)]; - pSrc[2U * (j + fftLenBy2)] = in; - - /* pSrc[i+2U] <-> pSrc[j+2U] */ - in = pSrc[(2U * (i + 1U)) + 1U]; - pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U]; - pSrc[(2U * (j + fftLenBy2)) + 1U] = in; - - /* Reading the index for the bit reversal */ - j = *pBitRevTab; - - /* Updating the bit reversal index depending on the fft length */ - pBitRevTab += bitRevFactor; - } -} - - -/** - @brief In-place Q31 bit reversal function. - @param[in,out] pSrc points to in-place Q31 data buffer. - @param[in] fftLen length of FFT. - @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table - @param[in] pBitRevTab points to bit reversal table - @return none -*/ - -void arm_bitreversal_q31( - q31_t * pSrc, - uint32_t fftLen, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab) -{ - uint32_t fftLenBy2, fftLenBy2p1, i, j; - q31_t in; - - /* Initializations */ - j = 0U; - fftLenBy2 = fftLen / 2U; - fftLenBy2p1 = (fftLen / 2U) + 1U; - - /* Bit Reversal Implementation */ - for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U) - { - if (i < j) - { - /* pSrc[i] <-> pSrc[j]; */ - in = pSrc[2U * i]; - pSrc[2U * i] = pSrc[2U * j]; - pSrc[2U * j] = in; - - /* pSrc[i+1U] <-> pSrc[j+1U] */ - in = pSrc[(2U * i) + 1U]; - pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U]; - pSrc[(2U * j) + 1U] = in; - - /* pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */ - in = pSrc[2U * (i + fftLenBy2p1)]; - pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; - pSrc[2U * (j + fftLenBy2p1)] = in; - - /* pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */ - in = pSrc[(2U * (i + fftLenBy2p1)) + 1U]; - pSrc[(2U * (i + fftLenBy2p1)) + 1U] = - pSrc[(2U * (j + fftLenBy2p1)) + 1U]; - pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in; - - } - - /* pSrc[i+1U] <-> pSrc[j+1U] */ - in = pSrc[2U * (i + 1U)]; - pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)]; - pSrc[2U * (j + fftLenBy2)] = in; - - /* pSrc[i+2U] <-> pSrc[j+2U] */ - in = pSrc[(2U * (i + 1U)) + 1U]; - pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U]; - pSrc[(2U * (j + fftLenBy2)) + 1U] = in; - - /* Reading the index for the bit reversal */ - j = *pBitRevTab; - - /* Updating the bit reversal index depending on the fft length */ - pBitRevTab += bitRevFactor; - } -} - - - -/** - @brief In-place Q15 bit reversal function. - @param[in,out] pSrc16 points to in-place Q15 data buffer - @param[in] fftLen length of FFT - @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table - @param[in] pBitRevTab points to bit reversal table - @return none -*/ - -void arm_bitreversal_q15( - q15_t * pSrc16, - uint32_t fftLen, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab) -{ - q31_t *pSrc = (q31_t *) pSrc16; - q31_t in; - uint32_t fftLenBy2, fftLenBy2p1; - uint32_t i, j; - - /* Initializations */ - j = 0U; - fftLenBy2 = fftLen / 2U; - fftLenBy2p1 = (fftLen / 2U) + 1U; - - /* Bit Reversal Implementation */ - for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U) - { - if (i < j) - { - /* pSrc[i] <-> pSrc[j]; */ - /* pSrc[i+1U] <-> pSrc[j+1U] */ - in = pSrc[i]; - pSrc[i] = pSrc[j]; - pSrc[j] = in; - - /* pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1]; */ - /* pSrc[i + fftLenBy2p1+1U] <-> pSrc[j + fftLenBy2p1+1U] */ - in = pSrc[i + fftLenBy2p1]; - pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1]; - pSrc[j + fftLenBy2p1] = in; - } - - /* pSrc[i+1U] <-> pSrc[j+fftLenBy2]; */ - /* pSrc[i+2] <-> pSrc[j+fftLenBy2+1U] */ - in = pSrc[i + 1U]; - pSrc[i + 1U] = pSrc[j + fftLenBy2]; - pSrc[j + fftLenBy2] = in; - - /* Reading the index for the bit reversal */ - j = *pBitRevTab; - - /* Updating the bit reversal index depending on the fft length */ - pBitRevTab += bitRevFactor; - } -} diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S deleted file mode 100644 index 01c1e76..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S +++ /dev/null @@ -1,216 +0,0 @@ -;/* ---------------------------------------------------------------------- -; * Project: CMSIS DSP Library -; * Title: arm_bitreversal2.S -; * Description: arm_bitreversal_32 function done in assembly for maximum speed. -; * Called after doing an fft to reorder the output. -; * The function is loop unrolled by 2. arm_bitreversal_16 as well. -; * -; * $Date: 18. March 2019 -; * $Revision: V1.5.2 -; * -; * Target Processor: Cortex-M cores -; * -------------------------------------------------------------------- */ -;/* -; * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - -#if defined ( __CC_ARM ) /* Keil */ - #define CODESECT AREA ||.text||, CODE, READONLY, ALIGN=2 - #define LABEL -#elif defined ( __IASMARM__ ) /* IAR */ - #define CODESECT SECTION `.text`:CODE - #define PROC - #define LABEL - #define ENDP - #define EXPORT PUBLIC -#elif defined ( __CSMC__ ) /* Cosmic */ - #define CODESECT switch .text - #define THUMB - #define EXPORT xdef - #define PROC : - #define LABEL : - #define ENDP - #define arm_bitreversal_32 _arm_bitreversal_32 -#elif defined ( __TI_ARM__ ) /* TI ARM */ - #define THUMB .thumb - #define CODESECT .text - #define EXPORT .global - #define PROC : .asmfunc - #define LABEL : - #define ENDP .endasmfunc - #define END -#elif defined ( __GNUC__ ) /* GCC */ - #define THUMB .thumb - #define CODESECT .section .text - #define EXPORT .global - #define PROC : - #define LABEL : - #define ENDP - #define END - - .syntax unified -#endif - - CODESECT - THUMB - -;/** -; @brief In-place bit reversal function. -; @param[in,out] pSrc points to the in-place buffer of unknown 32-bit data type -; @param[in] bitRevLen bit reversal table length -; @param[in] pBitRevTab points to bit reversal table -; @return none -; */ - EXPORT arm_bitreversal_32 - EXPORT arm_bitreversal_16 - -#if defined ( __CC_ARM ) /* Keil */ -#elif defined ( __IASMARM__ ) /* IAR */ -#elif defined ( __CSMC__ ) /* Cosmic */ -#elif defined ( __TI_ARM__ ) /* TI ARM */ -#elif defined ( __GNUC__ ) /* GCC */ - .type arm_bitreversal_16, %function - .type arm_bitreversal_32, %function -#endif - -#if defined (ARM_MATH_CM0_FAMILY) - -arm_bitreversal_32 PROC - ADDS r3,r1,#1 - PUSH {r4-r6} - ADDS r1,r2,#0 - LSRS r3,r3,#1 -arm_bitreversal_32_0 LABEL - LDRH r2,[r1,#2] - LDRH r6,[r1,#0] - ADD r2,r0,r2 - ADD r6,r0,r6 - LDR r5,[r2,#0] - LDR r4,[r6,#0] - STR r5,[r6,#0] - STR r4,[r2,#0] - LDR r5,[r2,#4] - LDR r4,[r6,#4] - STR r5,[r6,#4] - STR r4,[r2,#4] - ADDS r1,r1,#4 - SUBS r3,r3,#1 - BNE arm_bitreversal_32_0 - POP {r4-r6} - BX lr - ENDP - -arm_bitreversal_16 PROC - ADDS r3,r1,#1 - PUSH {r4-r6} - ADDS r1,r2,#0 - LSRS r3,r3,#1 -arm_bitreversal_16_0 LABEL - LDRH r2,[r1,#2] - LDRH r6,[r1,#0] - LSRS r2,r2,#1 - LSRS r6,r6,#1 - ADD r2,r0,r2 - ADD r6,r0,r6 - LDR r5,[r2,#0] - LDR r4,[r6,#0] - STR r5,[r6,#0] - STR r4,[r2,#0] - ADDS r1,r1,#4 - SUBS r3,r3,#1 - BNE arm_bitreversal_16_0 - POP {r4-r6} - BX lr - ENDP - -#else - -arm_bitreversal_32 PROC - ADDS r3,r1,#1 - CMP r3,#1 - IT LS - BXLS lr - PUSH {r4-r9} - ADDS r1,r2,#2 - LSRS r3,r3,#2 -arm_bitreversal_32_0 LABEL ;/* loop unrolled by 2 */ - LDRH r8,[r1,#4] - LDRH r9,[r1,#2] - LDRH r2,[r1,#0] - LDRH r12,[r1,#-2] - ADD r8,r0,r8 - ADD r9,r0,r9 - ADD r2,r0,r2 - ADD r12,r0,r12 - LDR r7,[r9,#0] - LDR r6,[r8,#0] - LDR r5,[r2,#0] - LDR r4,[r12,#0] - STR r6,[r9,#0] - STR r7,[r8,#0] - STR r5,[r12,#0] - STR r4,[r2,#0] - LDR r7,[r9,#4] - LDR r6,[r8,#4] - LDR r5,[r2,#4] - LDR r4,[r12,#4] - STR r6,[r9,#4] - STR r7,[r8,#4] - STR r5,[r12,#4] - STR r4,[r2,#4] - ADDS r1,r1,#8 - SUBS r3,r3,#1 - BNE arm_bitreversal_32_0 - POP {r4-r9} - BX lr - ENDP - -arm_bitreversal_16 PROC - ADDS r3,r1,#1 - CMP r3,#1 - IT LS - BXLS lr - PUSH {r4-r9} - ADDS r1,r2,#2 - LSRS r3,r3,#2 -arm_bitreversal_16_0 LABEL ;/* loop unrolled by 2 */ - LDRH r8,[r1,#4] - LDRH r9,[r1,#2] - LDRH r2,[r1,#0] - LDRH r12,[r1,#-2] - ADD r8,r0,r8,LSR #1 - ADD r9,r0,r9,LSR #1 - ADD r2,r0,r2,LSR #1 - ADD r12,r0,r12,LSR #1 - LDR r7,[r9,#0] - LDR r6,[r8,#0] - LDR r5,[r2,#0] - LDR r4,[r12,#0] - STR r6,[r9,#0] - STR r7,[r8,#0] - STR r5,[r12,#0] - STR r4,[r2,#0] - ADDS r1,r1,#8 - SUBS r3,r3,#1 - BNE arm_bitreversal_16_0 - POP {r4-r9} - BX lr - ENDP - -#endif - - END diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c deleted file mode 100644 index c7c8a07..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_bitreversal2.c - * Description: Bitreversal functions - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - - -/** - @brief In-place 64 bit reversal function. - @param[in,out] pSrc points to in-place buffer of unknown 64-bit data type - @param[in] bitRevLen bit reversal table length - @param[in] pBitRevTab points to bit reversal table - @return none -*/ - -void arm_bitreversal_64( - uint64_t *pSrc, - const uint16_t bitRevLen, - const uint16_t *pBitRevTab) -{ - uint64_t a, b, i, tmp; - - for (i = 0; i < bitRevLen; ) - { - a = pBitRevTab[i ] >> 2; - b = pBitRevTab[i + 1] >> 2; - - //real - tmp = pSrc[a]; - pSrc[a] = pSrc[b]; - pSrc[b] = tmp; - - //complex - tmp = pSrc[a+1]; - pSrc[a+1] = pSrc[b+1]; - pSrc[b+1] = tmp; - - i += 2; - } -} - -/** - @brief In-place 32 bit reversal function. - @param[in,out] pSrc points to in-place buffer of unknown 32-bit data type - @param[in] bitRevLen bit reversal table length - @param[in] pBitRevTab points to bit reversal table - @return none -*/ - -void arm_bitreversal_32( - uint32_t *pSrc, - const uint16_t bitRevLen, - const uint16_t *pBitRevTab) -{ - uint32_t a, b, i, tmp; - - for (i = 0; i < bitRevLen; ) - { - a = pBitRevTab[i ] >> 2; - b = pBitRevTab[i + 1] >> 2; - - //real - tmp = pSrc[a]; - pSrc[a] = pSrc[b]; - pSrc[b] = tmp; - - //complex - tmp = pSrc[a+1]; - pSrc[a+1] = pSrc[b+1]; - pSrc[b+1] = tmp; - - i += 2; - } -} - - -/** - @brief In-place 16 bit reversal function. - @param[in,out] pSrc points to in-place buffer of unknown 16-bit data type - @param[in] bitRevLen bit reversal table length - @param[in] pBitRevTab points to bit reversal table - @return none -*/ - -void arm_bitreversal_16( - uint16_t *pSrc, - const uint16_t bitRevLen, - const uint16_t *pBitRevTab) -{ - uint16_t a, b, i, tmp; - - for (i = 0; i < bitRevLen; ) - { - a = pBitRevTab[i ] >> 2; - b = pBitRevTab[i + 1] >> 2; - - //real - tmp = pSrc[a]; - pSrc[a] = pSrc[b]; - pSrc[b] = tmp; - - //complex - tmp = pSrc[a+1]; - pSrc[a+1] = pSrc[b+1]; - pSrc[b+1] = tmp; - - i += 2; - } -} diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal_f16.c deleted file mode 100644 index 053573e..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal_f16.c +++ /dev/null @@ -1,102 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_bitreversal_f16.c - * Description: Bitreversal functions - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions_f16.h" - -/* -* @brief In-place bit reversal function. -* @param[in, out] *pSrc points to the in-place buffer of floating-point data type. -* @param[in] fftSize length of the FFT. -* @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table. -* @param[in] *pBitRevTab points to the bit reversal table. -* @return none. -*/ - -#if defined(ARM_FLOAT16_SUPPORTED) - -void arm_bitreversal_f16( -float16_t * pSrc, -uint16_t fftSize, -uint16_t bitRevFactor, -const uint16_t * pBitRevTab) -{ - uint16_t fftLenBy2, fftLenBy2p1; - uint16_t i, j; - float16_t in; - - /* Initializations */ - j = 0U; - fftLenBy2 = fftSize >> 1U; - fftLenBy2p1 = (fftSize >> 1U) + 1U; - - /* Bit Reversal Implementation */ - for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U) - { - if (i < j) - { - /* pSrc[i] <-> pSrc[j]; */ - in = pSrc[2U * i]; - pSrc[2U * i] = pSrc[2U * j]; - pSrc[2U * j] = in; - - /* pSrc[i+1U] <-> pSrc[j+1U] */ - in = pSrc[(2U * i) + 1U]; - pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U]; - pSrc[(2U * j) + 1U] = in; - - /* pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */ - in = pSrc[2U * (i + fftLenBy2p1)]; - pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)]; - pSrc[2U * (j + fftLenBy2p1)] = in; - - /* pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */ - in = pSrc[(2U * (i + fftLenBy2p1)) + 1U]; - pSrc[(2U * (i + fftLenBy2p1)) + 1U] = - pSrc[(2U * (j + fftLenBy2p1)) + 1U]; - pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in; - - } - - /* pSrc[i+1U] <-> pSrc[j+1U] */ - in = pSrc[2U * (i + 1U)]; - pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)]; - pSrc[2U * (j + fftLenBy2)] = in; - - /* pSrc[i+2U] <-> pSrc[j+2U] */ - in = pSrc[(2U * (i + 1U)) + 1U]; - pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U]; - pSrc[(2U * (j + fftLenBy2)) + 1U] = in; - - /* Reading the index for the bit reversal */ - j = *pBitRevTab; - - /* Updating the bit reversal index depending on the fft length */ - pBitRevTab += bitRevFactor; - } -} -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f16.c deleted file mode 100644 index d63eef7..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f16.c +++ /dev/null @@ -1,842 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_f32.c - * Description: Combined Radix Decimation in Frequency CFFT Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions_f16.h" -#include "arm_common_tables_f16.h" - - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_fft.h" -#include "arm_mve_tables_f16.h" - - -static float16_t arm_inverse_fft_length_f16(uint16_t fftLen) -{ - float16_t retValue=1.0; - - switch (fftLen) - { - - case 4096U: - retValue = (float16_t)0.000244140625f; - break; - - case 2048U: - retValue = (float16_t)0.00048828125f; - break; - - case 1024U: - retValue = (float16_t)0.0009765625f; - break; - - case 512U: - retValue = (float16_t)0.001953125f; - break; - - case 256U: - retValue = (float16_t)0.00390625f; - break; - - case 128U: - retValue = (float16_t)0.0078125f; - break; - - case 64U: - retValue = (float16_t)0.015625f; - break; - - case 32U: - retValue = (float16_t)0.03125f; - break; - - case 16U: - retValue = (float16_t)0.0625f; - break; - - - default: - break; - } - return(retValue); -} - - -static void _arm_radix4_butterfly_f16_mve(const arm_cfft_instance_f16 * S,float16_t * pSrc, uint32_t fftLen) -{ - f16x8_t vecTmp0, vecTmp1; - f16x8_t vecSum0, vecDiff0, vecSum1, vecDiff1; - f16x8_t vecA, vecB, vecC, vecD; - uint32_t blkCnt; - uint32_t n1, n2; - uint32_t stage = 0; - int32_t iter = 1; - static const int32_t strides[4] = - { ( 0 - 16) * (int32_t)sizeof(float16_t *) - , ( 4 - 16) * (int32_t)sizeof(float16_t *) - , ( 8 - 16) * (int32_t)sizeof(float16_t *) - , (12 - 16) * (int32_t)sizeof(float16_t *)}; - - n2 = fftLen; - n1 = n2; - n2 >>= 2u; - for (int k = fftLen / 4u; k > 1; k >>= 2) - { - float16_t const *p_rearranged_twiddle_tab_stride1 = - &S->rearranged_twiddle_stride1[ - S->rearranged_twiddle_tab_stride1_arr[stage]]; - float16_t const *p_rearranged_twiddle_tab_stride2 = - &S->rearranged_twiddle_stride2[ - S->rearranged_twiddle_tab_stride2_arr[stage]]; - float16_t const *p_rearranged_twiddle_tab_stride3 = - &S->rearranged_twiddle_stride3[ - S->rearranged_twiddle_tab_stride3_arr[stage]]; - float16_t * pBase = pSrc; - for (int i = 0; i < iter; i++) - { - float16_t *inA = pBase; - float16_t *inB = inA + n2 * CMPLX_DIM; - float16_t *inC = inB + n2 * CMPLX_DIM; - float16_t *inD = inC + n2 * CMPLX_DIM; - float16_t const *pW1 = p_rearranged_twiddle_tab_stride1; - float16_t const *pW2 = p_rearranged_twiddle_tab_stride2; - float16_t const *pW3 = p_rearranged_twiddle_tab_stride3; - f16x8_t vecW; - - blkCnt = n2 / 4; - /* - * load 2 f16 complex pair - */ - vecA = vldrhq_f16(inA); - vecC = vldrhq_f16(inC); - while (blkCnt > 0U) - { - vecB = vldrhq_f16(inB); - vecD = vldrhq_f16(inD); - - vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ - vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ - - vecSum1 = vecB + vecD; - vecDiff1 = vecB - vecD; - /* - * [ 1 1 1 1 ] * [ A B C D ]' .* 1 - */ - vecTmp0 = vecSum0 + vecSum1; - vst1q(inA, vecTmp0); - inA += 8; - - /* - * [ 1 -1 1 -1 ] * [ A B C D ]' - */ - vecTmp0 = vecSum0 - vecSum1; - /* - * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 - */ - vecW = vld1q(pW2); - pW2 += 8; - vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0); - vst1q(inB, vecTmp1); - inB += 8; - - /* - * [ 1 -i -1 +i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 - */ - vecW = vld1q(pW1); - pW1 +=8; - vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0); - vst1q(inC, vecTmp1); - inC += 8; - - /* - * [ 1 +i -1 -i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 - */ - vecW = vld1q(pW3); - pW3 += 8; - vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0); - vst1q(inD, vecTmp1); - inD += 8; - - vecA = vldrhq_f16(inA); - vecC = vldrhq_f16(inC); - - blkCnt--; - } - pBase += CMPLX_DIM * n1; - } - n1 = n2; - n2 >>= 2u; - iter = iter << 2; - stage++; - } - - /* - * start of Last stage process - */ - uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides); - vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; - - /* load scheduling */ - vecA = (f16x8_t)vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); - vecC = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 8); - - blkCnt = (fftLen >> 4); - while (blkCnt > 0U) - { - vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ - vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ - - vecB = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 4); - vecD = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 12); - - vecSum1 = vecB + vecD; - vecDiff1 = vecB - vecD; - - /* pre-load for next iteration */ - vecA = (f16x8_t)vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); - vecC = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 8); - - vecTmp0 = vecSum0 + vecSum1; - vstrwq_scatter_base_f32(vecScGathAddr, -64, (f32x4_t)vecTmp0); - - vecTmp0 = vecSum0 - vecSum1; - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 4, (f32x4_t)vecTmp0); - - vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 8, (f32x4_t)vecTmp0); - - vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 12, (f32x4_t)vecTmp0); - - blkCnt--; - } - - /* - * End of last stage process - */ -} - -static void arm_cfft_radix4by2_f16_mve(const arm_cfft_instance_f16 * S, float16_t *pSrc, uint32_t fftLen) -{ - float16_t const *pCoefVec; - float16_t const *pCoef = S->pTwiddle; - float16_t *pIn0, *pIn1; - uint32_t n2; - uint32_t blkCnt; - f16x8_t vecIn0, vecIn1, vecSum, vecDiff; - f16x8_t vecCmplxTmp, vecTw; - - - n2 = fftLen >> 1; - pIn0 = pSrc; - pIn1 = pSrc + fftLen; - pCoefVec = pCoef; - - blkCnt = n2 / 4; - while (blkCnt > 0U) - { - vecIn0 = *(f16x8_t *) pIn0; - vecIn1 = *(f16x8_t *) pIn1; - vecTw = vld1q(pCoefVec); - pCoefVec += 8; - - vecSum = vaddq(vecIn0, vecIn1); - vecDiff = vsubq(vecIn0, vecIn1); - - vecCmplxTmp = MVE_CMPLX_MULT_FLT_Conj_AxB(vecTw, vecDiff); - - vst1q(pIn0, vecSum); - pIn0 += 8; - vst1q(pIn1, vecCmplxTmp); - pIn1 += 8; - - blkCnt--; - } - - _arm_radix4_butterfly_f16_mve(S, pSrc, n2); - - _arm_radix4_butterfly_f16_mve(S, pSrc + fftLen, n2); - - pIn0 = pSrc; -} - -static void _arm_radix4_butterfly_inverse_f16_mve(const arm_cfft_instance_f16 * S,float16_t * pSrc, uint32_t fftLen, float16_t onebyfftLen) -{ - f16x8_t vecTmp0, vecTmp1; - f16x8_t vecSum0, vecDiff0, vecSum1, vecDiff1; - f16x8_t vecA, vecB, vecC, vecD; - uint32_t blkCnt; - uint32_t n1, n2; - uint32_t stage = 0; - int32_t iter = 1; - static const int32_t strides[4] = { - ( 0 - 16) * (int32_t)sizeof(q31_t *), - ( 4 - 16) * (int32_t)sizeof(q31_t *), - ( 8 - 16) * (int32_t)sizeof(q31_t *), - (12 - 16) * (int32_t)sizeof(q31_t *) - }; - - n2 = fftLen; - n1 = n2; - n2 >>= 2u; - for (int k = fftLen / 4; k > 1; k >>= 2) - { - float16_t const *p_rearranged_twiddle_tab_stride1 = - &S->rearranged_twiddle_stride1[ - S->rearranged_twiddle_tab_stride1_arr[stage]]; - float16_t const *p_rearranged_twiddle_tab_stride2 = - &S->rearranged_twiddle_stride2[ - S->rearranged_twiddle_tab_stride2_arr[stage]]; - float16_t const *p_rearranged_twiddle_tab_stride3 = - &S->rearranged_twiddle_stride3[ - S->rearranged_twiddle_tab_stride3_arr[stage]]; - - float16_t * pBase = pSrc; - for (int i = 0; i < iter; i++) - { - float16_t *inA = pBase; - float16_t *inB = inA + n2 * CMPLX_DIM; - float16_t *inC = inB + n2 * CMPLX_DIM; - float16_t *inD = inC + n2 * CMPLX_DIM; - float16_t const *pW1 = p_rearranged_twiddle_tab_stride1; - float16_t const *pW2 = p_rearranged_twiddle_tab_stride2; - float16_t const *pW3 = p_rearranged_twiddle_tab_stride3; - f16x8_t vecW; - - blkCnt = n2 / 4; - /* - * load 2 f32 complex pair - */ - vecA = vldrhq_f16(inA); - vecC = vldrhq_f16(inC); - while (blkCnt > 0U) - { - vecB = vldrhq_f16(inB); - vecD = vldrhq_f16(inD); - - vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ - vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ - - vecSum1 = vecB + vecD; - vecDiff1 = vecB - vecD; - /* - * [ 1 1 1 1 ] * [ A B C D ]' .* 1 - */ - vecTmp0 = vecSum0 + vecSum1; - vst1q(inA, vecTmp0); - inA += 8; - /* - * [ 1 -1 1 -1 ] * [ A B C D ]' - */ - vecTmp0 = vecSum0 - vecSum1; - /* - * [ 1 -1 1 -1 ] * [ A B C D ]'.* W1 - */ - vecW = vld1q(pW2); - pW2 += 8; - vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0); - vst1q(inB, vecTmp1); - inB += 8; - - /* - * [ 1 -i -1 +i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 -i -1 +i ] * [ A B C D ]'.* W2 - */ - vecW = vld1q(pW1); - pW1 += 8; - vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0); - vst1q(inC, vecTmp1); - inC += 8; - - /* - * [ 1 +i -1 -i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 - */ - vecW = vld1q(pW3); - pW3 += 8; - vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0); - vst1q(inD, vecTmp1); - inD += 8; - - vecA = vldrhq_f16(inA); - vecC = vldrhq_f16(inC); - - blkCnt--; - } - pBase += CMPLX_DIM * n1; - } - n1 = n2; - n2 >>= 2u; - iter = iter << 2; - stage++; - } - - /* - * start of Last stage process - */ - uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides); - vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; - - /* - * load scheduling - */ - vecA = (f16x8_t)vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); - vecC = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 8); - - blkCnt = (fftLen >> 4); - while (blkCnt > 0U) - { - vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ - vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ - - vecB = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 4); - vecD = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 12); - - vecSum1 = vecB + vecD; - vecDiff1 = vecB - vecD; - - vecA = (f16x8_t)vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); - vecC = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 8); - - vecTmp0 = vecSum0 + vecSum1; - vecTmp0 = vecTmp0 * onebyfftLen; - vstrwq_scatter_base_f32(vecScGathAddr, -64, (f32x4_t)vecTmp0); - - vecTmp0 = vecSum0 - vecSum1; - vecTmp0 = vecTmp0 * onebyfftLen; - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 4, (f32x4_t)vecTmp0); - - vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); - vecTmp0 = vecTmp0 * onebyfftLen; - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 8, (f32x4_t)vecTmp0); - - vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); - vecTmp0 = vecTmp0 * onebyfftLen; - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 12, (f32x4_t)vecTmp0); - - blkCnt--; - } - - /* - * End of last stage process - */ -} - -static void arm_cfft_radix4by2_inverse_f16_mve(const arm_cfft_instance_f16 * S,float16_t *pSrc, uint32_t fftLen) -{ - float16_t const *pCoefVec; - float16_t const *pCoef = S->pTwiddle; - float16_t *pIn0, *pIn1; - uint32_t n2; - float16_t onebyfftLen = arm_inverse_fft_length_f16(fftLen); - uint32_t blkCnt; - f16x8_t vecIn0, vecIn1, vecSum, vecDiff; - f16x8_t vecCmplxTmp, vecTw; - - - n2 = fftLen >> 1; - pIn0 = pSrc; - pIn1 = pSrc + fftLen; - pCoefVec = pCoef; - - blkCnt = n2 / 4; - while (blkCnt > 0U) - { - vecIn0 = *(f16x8_t *) pIn0; - vecIn1 = *(f16x8_t *) pIn1; - vecTw = vld1q(pCoefVec); - pCoefVec += 8; - - vecSum = vaddq(vecIn0, vecIn1); - vecDiff = vsubq(vecIn0, vecIn1); - - vecCmplxTmp = MVE_CMPLX_MULT_FLT_AxB(vecTw, vecDiff); - - vst1q(pIn0, vecSum); - pIn0 += 8; - vst1q(pIn1, vecCmplxTmp); - pIn1 += 8; - - blkCnt--; - } - - _arm_radix4_butterfly_inverse_f16_mve(S, pSrc, n2, onebyfftLen); - - _arm_radix4_butterfly_inverse_f16_mve(S, pSrc + fftLen, n2, onebyfftLen); -} - - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for the floating-point complex FFT. - @param[in] S points to an instance of the floating-point CFFT structure - @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return none - */ - - -void arm_cfft_f16( - const arm_cfft_instance_f16 * S, - float16_t * pSrc, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - uint32_t fftLen = S->fftLen; - - if (ifftFlag == 1U) { - - switch (fftLen) { - case 16: - case 64: - case 256: - case 1024: - case 4096: - _arm_radix4_butterfly_inverse_f16_mve(S, pSrc, fftLen, arm_inverse_fft_length_f16(S->fftLen)); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_inverse_f16_mve(S, pSrc, fftLen); - break; - } - } else { - switch (fftLen) { - case 16: - case 64: - case 256: - case 1024: - case 4096: - _arm_radix4_butterfly_f16_mve(S, pSrc, fftLen); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_f16_mve(S, pSrc, fftLen); - break; - } - } - - - if (bitReverseFlag) - { - - arm_bitreversal_16_inpl_mve((uint16_t*)pSrc, S->bitRevLength, S->pBitRevTable); - - } -} - -#else - -#if defined(ARM_FLOAT16_SUPPORTED) - -extern void arm_bitreversal_16( - uint16_t * pSrc, - const uint16_t bitRevLen, - const uint16_t * pBitRevTable); - - -extern void arm_cfft_radix4by2_f16( - float16_t * pSrc, - uint32_t fftLen, - const float16_t * pCoef); - -extern void arm_radix4_butterfly_f16( - float16_t * pSrc, - uint16_t fftLen, - const float16_t * pCoef, - uint16_t twidCoefModifier); - -/** - @ingroup groupTransforms - */ - -/** - @defgroup ComplexFFT Complex FFT Functions - - @par - The Fast Fourier Transform (FFT) is an efficient algorithm for computing the - Discrete Fourier Transform (DFT). The FFT can be orders of magnitude faster - than the DFT, especially for long lengths. - The algorithms described in this section - operate on complex data. A separate set of functions is devoted to handling - of real sequences. - @par - There are separate algorithms for handling floating-point, Q15, and Q31 data - types. The algorithms available for each data type are described next. - @par - The FFT functions operate in-place. That is, the array holding the input data - will also be used to hold the corresponding result. The input data is complex - and contains 2*fftLen interleaved values as shown below. - 
{real[0], imag[0], real[1], imag[1], ...}
- The FFT result will be contained in the same array and the frequency domain - values will have the same interleaving. - - @par Floating-point - The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-8 - stages are performed along with a single radix-2 or radix-4 stage, as needed. - The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses - a different twiddle factor table. - @par - The function uses the standard FFT definition and output values may grow by a - factor of fftLen when computing the forward transform. The - inverse transform includes a scale of 1/fftLen as part of the - calculation and this matches the textbook definition of the inverse FFT. - @par - For the MVE version, the new arm_cfft_init_f32 initialization function is - mandatory. Compilation flags are available to include only the required tables for the - needed FFTs. Other FFT versions can continue to be initialized as - explained below. - @par - For not MVE versions, pre-initialized data structures containing twiddle factors - and bit reversal tables are provided and defined in arm_const_structs.h. Include - this header in your function and then pass one of the constant structures as - an argument to arm_cfft_f32. For example: - @par - arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1) - @par - computes a 64-point inverse complex FFT including bit reversal. - The data structures are treated as constant data and not modified during the - calculation. The same data structure can be reused for multiple transforms - including mixing forward and inverse transforms. - @par - Earlier releases of the library provided separate radix-2 and radix-4 - algorithms that operated on floating-point data. These functions are still - provided but are deprecated. The older functions are slower and less general - than the new functions. - @par - An example of initialization of the constants for the arm_cfft_f32 function follows: - @code - const static arm_cfft_instance_f32 *S; - ... - switch (length) { - case 16: - S = &arm_cfft_sR_f32_len16; - break; - case 32: - S = &arm_cfft_sR_f32_len32; - break; - case 64: - S = &arm_cfft_sR_f32_len64; - break; - case 128: - S = &arm_cfft_sR_f32_len128; - break; - case 256: - S = &arm_cfft_sR_f32_len256; - break; - case 512: - S = &arm_cfft_sR_f32_len512; - break; - case 1024: - S = &arm_cfft_sR_f32_len1024; - break; - case 2048: - S = &arm_cfft_sR_f32_len2048; - break; - case 4096: - S = &arm_cfft_sR_f32_len4096; - break; - } - @endcode - @par - The new arm_cfft_init_f32 can also be used. - @par Q15 and Q31 - The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-4 - stages are performed along with a single radix-2 stage, as needed. - The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses - a different twiddle factor table. - @par - The function uses the standard FFT definition and output values may grow by a - factor of fftLen when computing the forward transform. The - inverse transform includes a scale of 1/fftLen as part of the - calculation and this matches the textbook definition of the inverse FFT. - @par - Pre-initialized data structures containing twiddle factors and bit reversal - tables are provided and defined in arm_const_structs.h. Include - this header in your function and then pass one of the constant structures as - an argument to arm_cfft_q31. For example: - @par - arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1) - @par - computes a 64-point inverse complex FFT including bit reversal. - The data structures are treated as constant data and not modified during the - calculation. The same data structure can be reused for multiple transforms - including mixing forward and inverse transforms. - @par - Earlier releases of the library provided separate radix-2 and radix-4 - algorithms that operated on floating-point data. These functions are still - provided but are deprecated. The older functions are slower and less general - than the new functions. - @par - An example of initialization of the constants for the arm_cfft_q31 function follows: - @code - const static arm_cfft_instance_q31 *S; - ... - switch (length) { - case 16: - S = &arm_cfft_sR_q31_len16; - break; - case 32: - S = &arm_cfft_sR_q31_len32; - break; - case 64: - S = &arm_cfft_sR_q31_len64; - break; - case 128: - S = &arm_cfft_sR_q31_len128; - break; - case 256: - S = &arm_cfft_sR_q31_len256; - break; - case 512: - S = &arm_cfft_sR_q31_len512; - break; - case 1024: - S = &arm_cfft_sR_q31_len1024; - break; - case 2048: - S = &arm_cfft_sR_q31_len2048; - break; - case 4096: - S = &arm_cfft_sR_q31_len4096; - break; - } - @endcode - - */ - - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for the floating-point complex FFT. - @param[in] S points to an instance of the floating-point CFFT structure - @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return none - */ - -void arm_cfft_f16( - const arm_cfft_instance_f16 * S, - float16_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - uint32_t L = S->fftLen, l; - float16_t invL, * pSrc; - - if (ifftFlag == 1U) - { - /* Conjugate input data */ - pSrc = p1 + 1; - for(l=0; lpTwiddle, 1U); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_f16 ( p1, L, (float16_t*)S->pTwiddle); - break; - - } - - if ( bitReverseFlag ) - arm_bitreversal_16((uint16_t*)p1, S->bitRevLength,(uint16_t*)S->pBitRevTable); - - if (ifftFlag == 1U) - { - invL = 1.0f16/(_Float16)L; - /* Conjugate and scale output data */ - pSrc = p1; - for(l=0; l>= 2u; - for (int k = fftLen / 4u; k > 1; k >>= 2) - { - float32_t const *p_rearranged_twiddle_tab_stride1 = - &S->rearranged_twiddle_stride1[ - S->rearranged_twiddle_tab_stride1_arr[stage]]; - float32_t const *p_rearranged_twiddle_tab_stride2 = - &S->rearranged_twiddle_stride2[ - S->rearranged_twiddle_tab_stride2_arr[stage]]; - float32_t const *p_rearranged_twiddle_tab_stride3 = - &S->rearranged_twiddle_stride3[ - S->rearranged_twiddle_tab_stride3_arr[stage]]; - - float32_t * pBase = pSrc; - for (int i = 0; i < iter; i++) - { - float32_t *inA = pBase; - float32_t *inB = inA + n2 * CMPLX_DIM; - float32_t *inC = inB + n2 * CMPLX_DIM; - float32_t *inD = inC + n2 * CMPLX_DIM; - float32_t const *pW1 = p_rearranged_twiddle_tab_stride1; - float32_t const *pW2 = p_rearranged_twiddle_tab_stride2; - float32_t const *pW3 = p_rearranged_twiddle_tab_stride3; - f32x4_t vecW; - - blkCnt = n2 / 2; - /* - * load 2 f32 complex pair - */ - vecA = vldrwq_f32(inA); - vecC = vldrwq_f32(inC); - while (blkCnt > 0U) - { - vecB = vldrwq_f32(inB); - vecD = vldrwq_f32(inD); - - vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ - vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ - - vecSum1 = vecB + vecD; - vecDiff1 = vecB - vecD; - /* - * [ 1 1 1 1 ] * [ A B C D ]' .* 1 - */ - vecTmp0 = vecSum0 + vecSum1; - vst1q(inA, vecTmp0); - inA += 4; - - /* - * [ 1 -1 1 -1 ] * [ A B C D ]' - */ - vecTmp0 = vecSum0 - vecSum1; - /* - * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 - */ - vecW = vld1q(pW2); - pW2 += 4; - vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0); - vst1q(inB, vecTmp1); - inB += 4; - - /* - * [ 1 -i -1 +i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 - */ - vecW = vld1q(pW1); - pW1 +=4; - vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0); - vst1q(inC, vecTmp1); - inC += 4; - - /* - * [ 1 +i -1 -i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 - */ - vecW = vld1q(pW3); - pW3 += 4; - vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0); - vst1q(inD, vecTmp1); - inD += 4; - - vecA = vldrwq_f32(inA); - vecC = vldrwq_f32(inC); - - blkCnt--; - } - pBase += CMPLX_DIM * n1; - } - n1 = n2; - n2 >>= 2u; - iter = iter << 2; - stage++; - } - - /* - * start of Last stage process - */ - uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides); - vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; - - /* load scheduling */ - vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); - vecC = vldrwq_gather_base_f32(vecScGathAddr, 16); - - blkCnt = (fftLen >> 3); - while (blkCnt > 0U) - { - vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ - vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ - - vecB = vldrwq_gather_base_f32(vecScGathAddr, 8); - vecD = vldrwq_gather_base_f32(vecScGathAddr, 24); - - vecSum1 = vecB + vecD; - vecDiff1 = vecB - vecD; - - /* pre-load for next iteration */ - vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); - vecC = vldrwq_gather_base_f32(vecScGathAddr, 16); - - vecTmp0 = vecSum0 + vecSum1; - vstrwq_scatter_base_f32(vecScGathAddr, -64, vecTmp0); - - vecTmp0 = vecSum0 - vecSum1; - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 8, vecTmp0); - - vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 16, vecTmp0); - - vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 24, vecTmp0); - - blkCnt--; - } - - /* - * End of last stage process - */ -} - -static void arm_cfft_radix4by2_f32_mve(const arm_cfft_instance_f32 * S, float32_t *pSrc, uint32_t fftLen) -{ - float32_t const *pCoefVec; - float32_t const *pCoef = S->pTwiddle; - float32_t *pIn0, *pIn1; - uint32_t n2; - uint32_t blkCnt; - f32x4_t vecIn0, vecIn1, vecSum, vecDiff; - f32x4_t vecCmplxTmp, vecTw; - - - n2 = fftLen >> 1; - pIn0 = pSrc; - pIn1 = pSrc + fftLen; - pCoefVec = pCoef; - - blkCnt = n2 / 2; - while (blkCnt > 0U) - { - vecIn0 = *(f32x4_t *) pIn0; - vecIn1 = *(f32x4_t *) pIn1; - vecTw = vld1q(pCoefVec); - pCoefVec += 4; - - vecSum = vecIn0 + vecIn1; - vecDiff = vecIn0 - vecIn1; - - vecCmplxTmp = MVE_CMPLX_MULT_FLT_Conj_AxB(vecTw, vecDiff); - - vst1q(pIn0, vecSum); - pIn0 += 4; - vst1q(pIn1, vecCmplxTmp); - pIn1 += 4; - - blkCnt--; - } - - _arm_radix4_butterfly_f32_mve(S, pSrc, n2); - - _arm_radix4_butterfly_f32_mve(S, pSrc + fftLen, n2); - - pIn0 = pSrc; -} - -static void _arm_radix4_butterfly_inverse_f32_mve(const arm_cfft_instance_f32 * S,float32_t * pSrc, uint32_t fftLen, float32_t onebyfftLen) -{ - f32x4_t vecTmp0, vecTmp1; - f32x4_t vecSum0, vecDiff0, vecSum1, vecDiff1; - f32x4_t vecA, vecB, vecC, vecD; - uint32_t blkCnt; - uint32_t n1, n2; - uint32_t stage = 0; - int32_t iter = 1; - static const int32_t strides[4] = { - (0 - 16) * (int32_t)sizeof(q31_t *), - (1 - 16) * (int32_t)sizeof(q31_t *), - (8 - 16) * (int32_t)sizeof(q31_t *), - (9 - 16) * (int32_t)sizeof(q31_t *) - }; - - n2 = fftLen; - n1 = n2; - n2 >>= 2u; - for (int k = fftLen / 4; k > 1; k >>= 2) - { - float32_t const *p_rearranged_twiddle_tab_stride1 = - &S->rearranged_twiddle_stride1[ - S->rearranged_twiddle_tab_stride1_arr[stage]]; - float32_t const *p_rearranged_twiddle_tab_stride2 = - &S->rearranged_twiddle_stride2[ - S->rearranged_twiddle_tab_stride2_arr[stage]]; - float32_t const *p_rearranged_twiddle_tab_stride3 = - &S->rearranged_twiddle_stride3[ - S->rearranged_twiddle_tab_stride3_arr[stage]]; - - float32_t * pBase = pSrc; - for (int i = 0; i < iter; i++) - { - float32_t *inA = pBase; - float32_t *inB = inA + n2 * CMPLX_DIM; - float32_t *inC = inB + n2 * CMPLX_DIM; - float32_t *inD = inC + n2 * CMPLX_DIM; - float32_t const *pW1 = p_rearranged_twiddle_tab_stride1; - float32_t const *pW2 = p_rearranged_twiddle_tab_stride2; - float32_t const *pW3 = p_rearranged_twiddle_tab_stride3; - f32x4_t vecW; - - blkCnt = n2 / 2; - /* - * load 2 f32 complex pair - */ - vecA = vldrwq_f32(inA); - vecC = vldrwq_f32(inC); - while (blkCnt > 0U) - { - vecB = vldrwq_f32(inB); - vecD = vldrwq_f32(inD); - - vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ - vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ - - vecSum1 = vecB + vecD; - vecDiff1 = vecB - vecD; - /* - * [ 1 1 1 1 ] * [ A B C D ]' .* 1 - */ - vecTmp0 = vecSum0 + vecSum1; - vst1q(inA, vecTmp0); - inA += 4; - /* - * [ 1 -1 1 -1 ] * [ A B C D ]' - */ - vecTmp0 = vecSum0 - vecSum1; - /* - * [ 1 -1 1 -1 ] * [ A B C D ]'.* W1 - */ - vecW = vld1q(pW2); - pW2 += 4; - vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0); - vst1q(inB, vecTmp1); - inB += 4; - - /* - * [ 1 -i -1 +i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 -i -1 +i ] * [ A B C D ]'.* W2 - */ - vecW = vld1q(pW1); - pW1 += 4; - vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0); - vst1q(inC, vecTmp1); - inC += 4; - - /* - * [ 1 +i -1 -i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 - */ - vecW = vld1q(pW3); - pW3 += 4; - vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0); - vst1q(inD, vecTmp1); - inD += 4; - - vecA = vldrwq_f32(inA); - vecC = vldrwq_f32(inC); - - blkCnt--; - } - pBase += CMPLX_DIM * n1; - } - n1 = n2; - n2 >>= 2u; - iter = iter << 2; - stage++; - } - - /* - * start of Last stage process - */ - uint32x4_t vecScGathAddr = vld1q_u32 ((uint32_t*)strides); - vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; - - /* - * load scheduling - */ - vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); - vecC = vldrwq_gather_base_f32(vecScGathAddr, 16); - - blkCnt = (fftLen >> 3); - while (blkCnt > 0U) - { - vecSum0 = vecA + vecC; /* vecSum0 = vaddq(vecA, vecC) */ - vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */ - - vecB = vldrwq_gather_base_f32(vecScGathAddr, 8); - vecD = vldrwq_gather_base_f32(vecScGathAddr, 24); - - vecSum1 = vecB + vecD; - vecDiff1 = vecB - vecD; - - vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64); - vecC = vldrwq_gather_base_f32(vecScGathAddr, 16); - - vecTmp0 = vecSum0 + vecSum1; - vecTmp0 = vecTmp0 * onebyfftLen; - vstrwq_scatter_base_f32(vecScGathAddr, -64, vecTmp0); - - vecTmp0 = vecSum0 - vecSum1; - vecTmp0 = vecTmp0 * onebyfftLen; - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 8, vecTmp0); - - vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1); - vecTmp0 = vecTmp0 * onebyfftLen; - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 16, vecTmp0); - - vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1); - vecTmp0 = vecTmp0 * onebyfftLen; - vstrwq_scatter_base_f32(vecScGathAddr, -64 + 24, vecTmp0); - - blkCnt--; - } - - /* - * End of last stage process - */ -} - -static void arm_cfft_radix4by2_inverse_f32_mve(const arm_cfft_instance_f32 * S,float32_t *pSrc, uint32_t fftLen) -{ - float32_t const *pCoefVec; - float32_t const *pCoef = S->pTwiddle; - float32_t *pIn0, *pIn1; - uint32_t n2; - float32_t onebyfftLen = arm_inverse_fft_length_f32(fftLen); - uint32_t blkCnt; - f32x4_t vecIn0, vecIn1, vecSum, vecDiff; - f32x4_t vecCmplxTmp, vecTw; - - - n2 = fftLen >> 1; - pIn0 = pSrc; - pIn1 = pSrc + fftLen; - pCoefVec = pCoef; - - blkCnt = n2 / 2; - while (blkCnt > 0U) - { - vecIn0 = *(f32x4_t *) pIn0; - vecIn1 = *(f32x4_t *) pIn1; - vecTw = vld1q(pCoefVec); - pCoefVec += 4; - - vecSum = vecIn0 + vecIn1; - vecDiff = vecIn0 - vecIn1; - - vecCmplxTmp = MVE_CMPLX_MULT_FLT_AxB(vecTw, vecDiff); - - vst1q(pIn0, vecSum); - pIn0 += 4; - vst1q(pIn1, vecCmplxTmp); - pIn1 += 4; - - blkCnt--; - } - - _arm_radix4_butterfly_inverse_f32_mve(S, pSrc, n2, onebyfftLen); - - _arm_radix4_butterfly_inverse_f32_mve(S, pSrc + fftLen, n2, onebyfftLen); -} - - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for the floating-point complex FFT. - @param[in] S points to an instance of the floating-point CFFT structure - @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return none - */ - - -void arm_cfft_f32( - const arm_cfft_instance_f32 * S, - float32_t * pSrc, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - uint32_t fftLen = S->fftLen; - - if (ifftFlag == 1U) { - - switch (fftLen) { - case 16: - case 64: - case 256: - case 1024: - case 4096: - _arm_radix4_butterfly_inverse_f32_mve(S, pSrc, fftLen, arm_inverse_fft_length_f32(S->fftLen)); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_inverse_f32_mve(S, pSrc, fftLen); - break; - } - } else { - switch (fftLen) { - case 16: - case 64: - case 256: - case 1024: - case 4096: - _arm_radix4_butterfly_f32_mve(S, pSrc, fftLen); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_f32_mve(S, pSrc, fftLen); - break; - } - } - - - if (bitReverseFlag) - { - - arm_bitreversal_32_inpl_mve((uint32_t*)pSrc, S->bitRevLength, S->pBitRevTable); - - } -} - - -#else -extern void arm_radix8_butterfly_f32( - float32_t * pSrc, - uint16_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier); - -extern void arm_bitreversal_32( - uint32_t * pSrc, - const uint16_t bitRevLen, - const uint16_t * pBitRevTable); - -/** - @ingroup groupTransforms - */ - -/** - @defgroup ComplexFFT Complex FFT Functions - - @par - The Fast Fourier Transform (FFT) is an efficient algorithm for computing the - Discrete Fourier Transform (DFT). The FFT can be orders of magnitude faster - than the DFT, especially for long lengths. - The algorithms described in this section - operate on complex data. A separate set of functions is devoted to handling - of real sequences. - @par - There are separate algorithms for handling floating-point, Q15, and Q31 data - types. The algorithms available for each data type are described next. - @par - The FFT functions operate in-place. That is, the array holding the input data - will also be used to hold the corresponding result. The input data is complex - and contains 2*fftLen interleaved values as shown below. - 
{real[0], imag[0], real[1], imag[1], ...}
- The FFT result will be contained in the same array and the frequency domain - values will have the same interleaving. - - @par Floating-point - The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-8 - stages are performed along with a single radix-2 or radix-4 stage, as needed. - The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses - a different twiddle factor table. - @par - The function uses the standard FFT definition and output values may grow by a - factor of fftLen when computing the forward transform. The - inverse transform includes a scale of 1/fftLen as part of the - calculation and this matches the textbook definition of the inverse FFT. - @par - For the MVE version, the new arm_cfft_init_f32 initialization function is - mandatory. Compilation flags are available to include only the required tables for the - needed FFTs. Other FFT versions can continue to be initialized as - explained below. - @par - For not MVE versions, pre-initialized data structures containing twiddle factors - and bit reversal tables are provided and defined in arm_const_structs.h. Include - this header in your function and then pass one of the constant structures as - an argument to arm_cfft_f32. For example: - @par - arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1) - @par - computes a 64-point inverse complex FFT including bit reversal. - The data structures are treated as constant data and not modified during the - calculation. The same data structure can be reused for multiple transforms - including mixing forward and inverse transforms. - @par - Earlier releases of the library provided separate radix-2 and radix-4 - algorithms that operated on floating-point data. These functions are still - provided but are deprecated. The older functions are slower and less general - than the new functions. - @par - An example of initialization of the constants for the arm_cfft_f32 function follows: - @code - const static arm_cfft_instance_f32 *S; - ... - switch (length) { - case 16: - S = &arm_cfft_sR_f32_len16; - break; - case 32: - S = &arm_cfft_sR_f32_len32; - break; - case 64: - S = &arm_cfft_sR_f32_len64; - break; - case 128: - S = &arm_cfft_sR_f32_len128; - break; - case 256: - S = &arm_cfft_sR_f32_len256; - break; - case 512: - S = &arm_cfft_sR_f32_len512; - break; - case 1024: - S = &arm_cfft_sR_f32_len1024; - break; - case 2048: - S = &arm_cfft_sR_f32_len2048; - break; - case 4096: - S = &arm_cfft_sR_f32_len4096; - break; - } - @endcode - @par - The new arm_cfft_init_f32 can also be used. - @par Q15 and Q31 - The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-4 - stages are performed along with a single radix-2 stage, as needed. - The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses - a different twiddle factor table. - @par - The function uses the standard FFT definition and output values may grow by a - factor of fftLen when computing the forward transform. The - inverse transform includes a scale of 1/fftLen as part of the - calculation and this matches the textbook definition of the inverse FFT. - @par - Pre-initialized data structures containing twiddle factors and bit reversal - tables are provided and defined in arm_const_structs.h. Include - this header in your function and then pass one of the constant structures as - an argument to arm_cfft_q31. For example: - @par - arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1) - @par - computes a 64-point inverse complex FFT including bit reversal. - The data structures are treated as constant data and not modified during the - calculation. The same data structure can be reused for multiple transforms - including mixing forward and inverse transforms. - @par - Earlier releases of the library provided separate radix-2 and radix-4 - algorithms that operated on floating-point data. These functions are still - provided but are deprecated. The older functions are slower and less general - than the new functions. - @par - An example of initialization of the constants for the arm_cfft_q31 function follows: - @code - const static arm_cfft_instance_q31 *S; - ... - switch (length) { - case 16: - S = &arm_cfft_sR_q31_len16; - break; - case 32: - S = &arm_cfft_sR_q31_len32; - break; - case 64: - S = &arm_cfft_sR_q31_len64; - break; - case 128: - S = &arm_cfft_sR_q31_len128; - break; - case 256: - S = &arm_cfft_sR_q31_len256; - break; - case 512: - S = &arm_cfft_sR_q31_len512; - break; - case 1024: - S = &arm_cfft_sR_q31_len1024; - break; - case 2048: - S = &arm_cfft_sR_q31_len2048; - break; - case 4096: - S = &arm_cfft_sR_q31_len4096; - break; - } - @endcode - - */ - -void arm_cfft_radix8by2_f32 (arm_cfft_instance_f32 * S, float32_t * p1) -{ - uint32_t L = S->fftLen; - float32_t * pCol1, * pCol2, * pMid1, * pMid2; - float32_t * p2 = p1 + L; - const float32_t * tw = (float32_t *) S->pTwiddle; - float32_t t1[4], t2[4], t3[4], t4[4], twR, twI; - float32_t m0, m1, m2, m3; - uint32_t l; - - pCol1 = p1; - pCol2 = p2; - - /* Define new length */ - L >>= 1; - - /* Initialize mid pointers */ - pMid1 = p1 + L; - pMid2 = p2 + L; - - /* do two dot Fourier transform */ - for (l = L >> 2; l > 0; l-- ) - { - t1[0] = p1[0]; - t1[1] = p1[1]; - t1[2] = p1[2]; - t1[3] = p1[3]; - - t2[0] = p2[0]; - t2[1] = p2[1]; - t2[2] = p2[2]; - t2[3] = p2[3]; - - t3[0] = pMid1[0]; - t3[1] = pMid1[1]; - t3[2] = pMid1[2]; - t3[3] = pMid1[3]; - - t4[0] = pMid2[0]; - t4[1] = pMid2[1]; - t4[2] = pMid2[2]; - t4[3] = pMid2[3]; - - *p1++ = t1[0] + t2[0]; - *p1++ = t1[1] + t2[1]; - *p1++ = t1[2] + t2[2]; - *p1++ = t1[3] + t2[3]; /* col 1 */ - - t2[0] = t1[0] - t2[0]; - t2[1] = t1[1] - t2[1]; - t2[2] = t1[2] - t2[2]; - t2[3] = t1[3] - t2[3]; /* for col 2 */ - - *pMid1++ = t3[0] + t4[0]; - *pMid1++ = t3[1] + t4[1]; - *pMid1++ = t3[2] + t4[2]; - *pMid1++ = t3[3] + t4[3]; /* col 1 */ - - t4[0] = t4[0] - t3[0]; - t4[1] = t4[1] - t3[1]; - t4[2] = t4[2] - t3[2]; - t4[3] = t4[3] - t3[3]; /* for col 2 */ - - twR = *tw++; - twI = *tw++; - - /* multiply by twiddle factors */ - m0 = t2[0] * twR; - m1 = t2[1] * twI; - m2 = t2[1] * twR; - m3 = t2[0] * twI; - - /* R = R * Tr - I * Ti */ - *p2++ = m0 + m1; - /* I = I * Tr + R * Ti */ - *p2++ = m2 - m3; - - /* use vertical symmetry */ - /* 0.9988 - 0.0491i <==> -0.0491 - 0.9988i */ - m0 = t4[0] * twI; - m1 = t4[1] * twR; - m2 = t4[1] * twI; - m3 = t4[0] * twR; - - *pMid2++ = m0 - m1; - *pMid2++ = m2 + m3; - - twR = *tw++; - twI = *tw++; - - m0 = t2[2] * twR; - m1 = t2[3] * twI; - m2 = t2[3] * twR; - m3 = t2[2] * twI; - - *p2++ = m0 + m1; - *p2++ = m2 - m3; - - m0 = t4[2] * twI; - m1 = t4[3] * twR; - m2 = t4[3] * twI; - m3 = t4[2] * twR; - - *pMid2++ = m0 - m1; - *pMid2++ = m2 + m3; - } - - /* first col */ - arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 2U); - - /* second col */ - arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 2U); -} - -void arm_cfft_radix8by4_f32 (arm_cfft_instance_f32 * S, float32_t * p1) -{ - uint32_t L = S->fftLen >> 1; - float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4; - const float32_t *tw2, *tw3, *tw4; - float32_t * p2 = p1 + L; - float32_t * p3 = p2 + L; - float32_t * p4 = p3 + L; - float32_t t2[4], t3[4], t4[4], twR, twI; - float32_t p1ap3_0, p1sp3_0, p1ap3_1, p1sp3_1; - float32_t m0, m1, m2, m3; - uint32_t l, twMod2, twMod3, twMod4; - - pCol1 = p1; /* points to real values by default */ - pCol2 = p2; - pCol3 = p3; - pCol4 = p4; - pEnd1 = p2 - 1; /* points to imaginary values by default */ - pEnd2 = p3 - 1; - pEnd3 = p4 - 1; - pEnd4 = pEnd3 + L; - - tw2 = tw3 = tw4 = (float32_t *) S->pTwiddle; - - L >>= 1; - - /* do four dot Fourier transform */ - - twMod2 = 2; - twMod3 = 4; - twMod4 = 6; - - /* TOP */ - p1ap3_0 = p1[0] + p3[0]; - p1sp3_0 = p1[0] - p3[0]; - p1ap3_1 = p1[1] + p3[1]; - p1sp3_1 = p1[1] - p3[1]; - - /* col 2 */ - t2[0] = p1sp3_0 + p2[1] - p4[1]; - t2[1] = p1sp3_1 - p2[0] + p4[0]; - /* col 3 */ - t3[0] = p1ap3_0 - p2[0] - p4[0]; - t3[1] = p1ap3_1 - p2[1] - p4[1]; - /* col 4 */ - t4[0] = p1sp3_0 - p2[1] + p4[1]; - t4[1] = p1sp3_1 + p2[0] - p4[0]; - /* col 1 */ - *p1++ = p1ap3_0 + p2[0] + p4[0]; - *p1++ = p1ap3_1 + p2[1] + p4[1]; - - /* Twiddle factors are ones */ - *p2++ = t2[0]; - *p2++ = t2[1]; - *p3++ = t3[0]; - *p3++ = t3[1]; - *p4++ = t4[0]; - *p4++ = t4[1]; - - tw2 += twMod2; - tw3 += twMod3; - tw4 += twMod4; - - for (l = (L - 2) >> 1; l > 0; l-- ) - { - /* TOP */ - p1ap3_0 = p1[0] + p3[0]; - p1sp3_0 = p1[0] - p3[0]; - p1ap3_1 = p1[1] + p3[1]; - p1sp3_1 = p1[1] - p3[1]; - /* col 2 */ - t2[0] = p1sp3_0 + p2[1] - p4[1]; - t2[1] = p1sp3_1 - p2[0] + p4[0]; - /* col 3 */ - t3[0] = p1ap3_0 - p2[0] - p4[0]; - t3[1] = p1ap3_1 - p2[1] - p4[1]; - /* col 4 */ - t4[0] = p1sp3_0 - p2[1] + p4[1]; - t4[1] = p1sp3_1 + p2[0] - p4[0]; - /* col 1 - top */ - *p1++ = p1ap3_0 + p2[0] + p4[0]; - *p1++ = p1ap3_1 + p2[1] + p4[1]; - - /* BOTTOM */ - p1ap3_1 = pEnd1[-1] + pEnd3[-1]; - p1sp3_1 = pEnd1[-1] - pEnd3[-1]; - p1ap3_0 = pEnd1[ 0] + pEnd3[0]; - p1sp3_0 = pEnd1[ 0] - pEnd3[0]; - /* col 2 */ - t2[2] = pEnd2[0] - pEnd4[0] + p1sp3_1; - t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1]; - /* col 3 */ - t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1]; - t3[3] = p1ap3_0 - pEnd2[ 0] - pEnd4[ 0]; - /* col 4 */ - t4[2] = pEnd2[ 0] - pEnd4[ 0] - p1sp3_1; - t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0; - /* col 1 - Bottom */ - *pEnd1-- = p1ap3_0 + pEnd2[ 0] + pEnd4[ 0]; - *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1]; - - /* COL 2 */ - /* read twiddle factors */ - twR = *tw2++; - twI = *tw2++; - /* multiply by twiddle factors */ - /* let Z1 = a + i(b), Z2 = c + i(d) */ - /* => Z1 * Z2 = (a*c - b*d) + i(b*c + a*d) */ - - /* Top */ - m0 = t2[0] * twR; - m1 = t2[1] * twI; - m2 = t2[1] * twR; - m3 = t2[0] * twI; - - *p2++ = m0 + m1; - *p2++ = m2 - m3; - /* use vertical symmetry col 2 */ - /* 0.9997 - 0.0245i <==> 0.0245 - 0.9997i */ - /* Bottom */ - m0 = t2[3] * twI; - m1 = t2[2] * twR; - m2 = t2[2] * twI; - m3 = t2[3] * twR; - - *pEnd2-- = m0 - m1; - *pEnd2-- = m2 + m3; - - /* COL 3 */ - twR = tw3[0]; - twI = tw3[1]; - tw3 += twMod3; - /* Top */ - m0 = t3[0] * twR; - m1 = t3[1] * twI; - m2 = t3[1] * twR; - m3 = t3[0] * twI; - - *p3++ = m0 + m1; - *p3++ = m2 - m3; - /* use vertical symmetry col 3 */ - /* 0.9988 - 0.0491i <==> -0.9988 - 0.0491i */ - /* Bottom */ - m0 = -t3[3] * twR; - m1 = t3[2] * twI; - m2 = t3[2] * twR; - m3 = t3[3] * twI; - - *pEnd3-- = m0 - m1; - *pEnd3-- = m3 - m2; - - /* COL 4 */ - twR = tw4[0]; - twI = tw4[1]; - tw4 += twMod4; - /* Top */ - m0 = t4[0] * twR; - m1 = t4[1] * twI; - m2 = t4[1] * twR; - m3 = t4[0] * twI; - - *p4++ = m0 + m1; - *p4++ = m2 - m3; - /* use vertical symmetry col 4 */ - /* 0.9973 - 0.0736i <==> -0.0736 + 0.9973i */ - /* Bottom */ - m0 = t4[3] * twI; - m1 = t4[2] * twR; - m2 = t4[2] * twI; - m3 = t4[3] * twR; - - *pEnd4-- = m0 - m1; - *pEnd4-- = m2 + m3; - } - - /* MIDDLE */ - /* Twiddle factors are */ - /* 1.0000 0.7071-0.7071i -1.0000i -0.7071-0.7071i */ - p1ap3_0 = p1[0] + p3[0]; - p1sp3_0 = p1[0] - p3[0]; - p1ap3_1 = p1[1] + p3[1]; - p1sp3_1 = p1[1] - p3[1]; - - /* col 2 */ - t2[0] = p1sp3_0 + p2[1] - p4[1]; - t2[1] = p1sp3_1 - p2[0] + p4[0]; - /* col 3 */ - t3[0] = p1ap3_0 - p2[0] - p4[0]; - t3[1] = p1ap3_1 - p2[1] - p4[1]; - /* col 4 */ - t4[0] = p1sp3_0 - p2[1] + p4[1]; - t4[1] = p1sp3_1 + p2[0] - p4[0]; - /* col 1 - Top */ - *p1++ = p1ap3_0 + p2[0] + p4[0]; - *p1++ = p1ap3_1 + p2[1] + p4[1]; - - /* COL 2 */ - twR = tw2[0]; - twI = tw2[1]; - - m0 = t2[0] * twR; - m1 = t2[1] * twI; - m2 = t2[1] * twR; - m3 = t2[0] * twI; - - *p2++ = m0 + m1; - *p2++ = m2 - m3; - /* COL 3 */ - twR = tw3[0]; - twI = tw3[1]; - - m0 = t3[0] * twR; - m1 = t3[1] * twI; - m2 = t3[1] * twR; - m3 = t3[0] * twI; - - *p3++ = m0 + m1; - *p3++ = m2 - m3; - /* COL 4 */ - twR = tw4[0]; - twI = tw4[1]; - - m0 = t4[0] * twR; - m1 = t4[1] * twI; - m2 = t4[1] * twR; - m3 = t4[0] * twI; - - *p4++ = m0 + m1; - *p4++ = m2 - m3; - - /* first col */ - arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 4U); - - /* second col */ - arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 4U); - - /* third col */ - arm_radix8_butterfly_f32 (pCol3, L, (float32_t *) S->pTwiddle, 4U); - - /* fourth col */ - arm_radix8_butterfly_f32 (pCol4, L, (float32_t *) S->pTwiddle, 4U); -} - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for the floating-point complex FFT. - @param[in] S points to an instance of the floating-point CFFT structure - @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return none - */ - -void arm_cfft_f32( - const arm_cfft_instance_f32 * S, - float32_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - uint32_t L = S->fftLen, l; - float32_t invL, * pSrc; - - if (ifftFlag == 1U) - { - /* Conjugate input data */ - pSrc = p1 + 1; - for (l = 0; l < L; l++) - { - *pSrc = -*pSrc; - pSrc += 2; - } - } - - switch (L) - { - case 16: - case 128: - case 1024: - arm_cfft_radix8by2_f32 ( (arm_cfft_instance_f32 *) S, p1); - break; - case 32: - case 256: - case 2048: - arm_cfft_radix8by4_f32 ( (arm_cfft_instance_f32 *) S, p1); - break; - case 64: - case 512: - case 4096: - arm_radix8_butterfly_f32 ( p1, L, (float32_t *) S->pTwiddle, 1); - break; - } - - if ( bitReverseFlag ) - arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable); - - if (ifftFlag == 1U) - { - invL = 1.0f / (float32_t)L; - - /* Conjugate and scale output data */ - pSrc = p1; - for (l= 0; l < L; l++) - { - *pSrc++ *= invL ; - *pSrc = -(*pSrc) * invL; - pSrc++; - } - } -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c deleted file mode 100644 index 3ff4778..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c +++ /dev/null @@ -1,318 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_f64.c - * Description: Combined Radix Decimation in Frequency CFFT Double Precision Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - - -extern void arm_radix4_butterfly_f64( - float64_t * pSrc, - uint16_t fftLen, - const float64_t * pCoef, - uint16_t twidCoefModifier); - -extern void arm_bitreversal_64( - uint64_t * pSrc, - const uint16_t bitRevLen, - const uint16_t * pBitRevTable); - -/** -* @} end of ComplexFFT group -*/ - -/* ---------------------------------------------------------------------- - * Internal helper function used by the FFTs - * ---------------------------------------------------------------------- */ - -/* -* @brief Core function for the Double Precision floating-point CFFT butterfly process. -* @param[in, out] *pSrc points to the in-place buffer of F64 data type. -* @param[in] fftLen length of the FFT. -* @param[in] *pCoef points to the twiddle coefficient buffer. -* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. -* @return none. -*/ - -void arm_radix4_butterfly_f64( - float64_t * pSrc, - uint16_t fftLen, - const float64_t * pCoef, - uint16_t twidCoefModifier) -{ - - float64_t co1, co2, co3, si1, si2, si3; - uint32_t ia1, ia2, ia3; - uint32_t i0, i1, i2, i3; - uint32_t n1, n2, j, k; - - float64_t t1, t2, r1, r2, s1, s2; - - - /* Initializations for the fft calculation */ - n2 = fftLen; - n1 = n2; - for (k = fftLen; k > 1U; k >>= 2U) - { - /* Initializations for the fft calculation */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - /* FFT Calculation */ - j = 0; - do - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - i0 = j; - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* xa + xc */ - r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)]; - - /* xa - xc */ - r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)]; - - /* ya + yc */ - s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; - - /* ya - yc */ - s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; - - /* xb + xd */ - t1 = pSrc[2U * i1] + pSrc[2U * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = r1 + t1; - - /* xa + xc -(xb + xd) */ - r1 = r1 - t1; - - /* yb + yd */ - t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = s1 + t2; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb - yd) */ - t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; - - /* (xb - xd) */ - t2 = pSrc[2U * i1] - pSrc[2U * i3]; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = (r1 * co2) + (s1 * si2); - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = (s1 * co2) - (r1 * si2); - - /* (xa - xc) + (yb - yd) */ - r1 = r2 + t1; - - /* (xa - xc) - (yb - yd) */ - r2 = r2 - t1; - - /* (ya - yc) - (xb - xd) */ - s1 = s2 - t2; - - /* (ya - yc) + (xb - xd) */ - s2 = s2 + t2; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = (r1 * co1) + (s1 * si1); - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = (s1 * co1) - (r1 * si1); - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = (r2 * co3) + (s2 * si3); - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = (s2 * co3) - (r2 * si3); - - i0 += n1; - } while ( i0 < fftLen); - j++; - } while (j <= (n2 - 1U)); - twidCoefModifier <<= 2U; - } -} - -/* -* @brief Core function for the Double Precision floating-point CFFT butterfly process. -* @param[in, out] *pSrc points to the in-place buffer of F64 data type. -* @param[in] fftLen length of the FFT. -* @param[in] *pCoef points to the twiddle coefficient buffer. -* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. -* @return none. -*/ - -void arm_cfft_radix4by2_f64( - float64_t * pSrc, - uint32_t fftLen, - const float64_t * pCoef) -{ - uint32_t i, l; - uint32_t n2, ia; - float64_t xt, yt, cosVal, sinVal; - float64_t p0, p1,p2,p3,a0,a1; - - n2 = fftLen >> 1; - ia = 0; - for (i = 0; i < n2; i++) - { - cosVal = pCoef[2*ia]; - sinVal = pCoef[2*ia + 1]; - ia++; - - l = i + n2; - - /* Butterfly implementation */ - a0 = pSrc[2 * i] + pSrc[2 * l]; - xt = pSrc[2 * i] - pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - p0 = xt * cosVal; - p1 = yt * sinVal; - p2 = yt * cosVal; - p3 = xt * sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = p0 + p1; - pSrc[2 * l + 1] = p2 - p3; - - } - - // first col - arm_radix4_butterfly_f64( pSrc, n2, (float64_t*)pCoef, 2U); - // second col - arm_radix4_butterfly_f64( pSrc + fftLen, n2, (float64_t*)pCoef, 2U); - -} - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for the Double Precision floating-point complex FFT. - @param[in] S points to an instance of the Double Precision floating-point CFFT structure - @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return none - */ - -void arm_cfft_f64( - const arm_cfft_instance_f64 * S, - float64_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - uint32_t L = S->fftLen, l; - float64_t invL, * pSrc; - - if (ifftFlag == 1U) - { - /* Conjugate input data */ - pSrc = p1 + 1; - for(l=0; lpTwiddle, 1U); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_f64 ( p1, L, (float64_t*)S->pTwiddle); - break; - - } - - if ( bitReverseFlag ) - arm_bitreversal_64((uint64_t*)p1, S->bitRevLength,S->pBitRevTable); - - if (ifftFlag == 1U) - { - invL = 1.0 / (float64_t)L; - /* Conjugate and scale output data */ - pSrc = p1; - for(l=0; lbitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength; \ - S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable; \ - S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle; - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the cfft f16 function - @param[in,out] S points to an instance of the floating-point CFFT structure - @param[in] fftLen fft length (number of complex samples) - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - - @par Use of this function is mandatory only for the MVE version of the FFT. - Other versions can still initialize directly the data structure using - variables declared in arm_const_structs.h - */ - -#include "dsp/transform_functions_f16.h" -#include "arm_common_tables_f16.h" -#include "arm_const_structs_f16.h" - - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_vec_fft.h" -#include "arm_mve_tables_f16.h" - -arm_status arm_cfft_radix4by2_rearrange_twiddles_f16(arm_cfft_instance_f16 *S, int twidCoefModifier) -{ - - switch (S->fftLen >> (twidCoefModifier - 1)) { - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \ - || defined(ARM_TABLE_TWIDDLECOEF_F16_4096) - case 4096U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_f16; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_4096_f16; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_f16; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_4096_f16; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_f16; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_4096_f16; - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \ - || defined(ARM_TABLE_TWIDDLECOEF_F16_1024) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048) - case 1024U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_f16; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_1024_f16; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_f16; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_1024_f16; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_f16; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_1024_f16; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \ - || defined(ARM_TABLE_TWIDDLECOEF_F16_256) || defined(ARM_TABLE_TWIDDLECOEF_F16_512) - case 256U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_f16; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_256_f16; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_f16; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_256_f16; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_f16; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_256_f16; - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \ - || defined(ARM_TABLE_TWIDDLECOEF_F16_64) || defined(ARM_TABLE_TWIDDLECOEF_F16_128) - case 64U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_f16; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_64_f16; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_f16; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_64_f16; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_f16; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_64_f16; - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \ - || defined(ARM_TABLE_TWIDDLECOEF_F16_16) || defined(ARM_TABLE_TWIDDLECOEF_F16_32) - case 16U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_f16; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_16_f16; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_f16; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_16_f16; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_f16; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_16_f16; - break; -#endif - - default: - return(ARM_MATH_ARGUMENT_ERROR); - break; - /* invalid sizes already filtered */ - } - - return(ARM_MATH_SUCCESS); - -} - -arm_status arm_cfft_init_f16( - arm_cfft_instance_f16 * S, - uint16_t fftLen) -{ - - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = NULL; - - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) { - /* Initializations of structure parameters for 4096 point FFT */ -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_F16_4096)) - case 4096U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096; - S->pTwiddle = (float16_t *)twiddleCoefF16_4096; - status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F16_2048)) - /* Initializations of structure parameters for 2048 point FFT */ - case 2048U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048; - S->pTwiddle = (float16_t *)twiddleCoefF16_2048; - status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F16_1024)) - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; - S->pTwiddle = (float16_t *)twiddleCoefF16_1024; - status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_F16_512)) - /* Initializations of structure parameters for 512 point FFT */ - case 512U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512; - S->pTwiddle = (float16_t *)twiddleCoefF16_512; - status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_F16_256)) - case 256U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; - S->pTwiddle = (float16_t *)twiddleCoefF16_256; - status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_F16_128)) - case 128U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; - S->pTwiddle = (float16_t *)twiddleCoefF16_128; - status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_F16_64)) - case 64U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64; - S->pTwiddle = (float16_t *)twiddleCoefF16_64; - status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_F16_32)) - case 32U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32; - S->pTwiddle = (float16_t *)twiddleCoefF16_32; - status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_F16_16)) - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; - S->pTwiddle = (float16_t *)twiddleCoefF16_16; - status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 1); - break; -#endif - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - - return (status); -} -#else - -#if defined(ARM_FLOAT16_SUPPORTED) - -arm_status arm_cfft_init_f16( - arm_cfft_instance_f16 * S, - uint16_t fftLen) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = NULL; - - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) { -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096)) - /* Initializations of structure parameters for 4096 point FFT */ - case 4096U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f16,4096); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048)) - /* Initializations of structure parameters for 2048 point FFT */ - case 2048U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f16,2048); - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024)) - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f16,1024); - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512)) - /* Initializations of structure parameters for 512 point FFT */ - case 512U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f16,512); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256)) - case 256U: - FFTINIT(f16,256); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128)) - case 128U: - FFTINIT(f16,128); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64)) - case 64U: - FFTINIT(f16,64); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32)) - case 32U: - FFTINIT(f16,32); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16)) - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - FFTINIT(f16,16); - break; -#endif - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - - return (status); -} -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c deleted file mode 100644 index 7e7ecf9..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c +++ /dev/null @@ -1,358 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_init_f32.c - * Description: Initialization function for cfft f32 instance - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#define FFTINIT(EXT,SIZE) \ - S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength; \ - S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable; \ - S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle; - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the cfft f32 function - @param[in,out] S points to an instance of the floating-point CFFT structure - @param[in] fftLen fft length (number of complex samples) - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - - @par Use of this function is mandatory only for the MVE version of the FFT. - Other versions can still initialize directly the data structure using - variables declared in arm_const_structs.h - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" -#include "arm_const_structs.h" - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_vec_fft.h" -#include "arm_mve_tables.h" - -arm_status arm_cfft_radix4by2_rearrange_twiddles_f32(arm_cfft_instance_f32 *S, int twidCoefModifier) -{ - - switch (S->fftLen >> (twidCoefModifier - 1)) { - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \ - || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) - case 4096U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_f32; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_4096_f32; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_f32; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_4096_f32; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_f32; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_4096_f32; - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \ - || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048) - case 1024U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_f32; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_1024_f32; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_f32; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_1024_f32; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_f32; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_1024_f32; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \ - || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512) - case 256U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_f32; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_256_f32; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_f32; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_256_f32; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_f32; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_256_f32; - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \ - || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128) - case 64U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_f32; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_64_f32; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_f32; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_64_f32; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_f32; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_64_f32; - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \ - || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32) - case 16U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_f32; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_16_f32; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_f32; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_16_f32; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_f32; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_16_f32; - break; -#endif - - default: - return(ARM_MATH_ARGUMENT_ERROR); - break; - /* invalid sizes already filtered */ - } - - return(ARM_MATH_SUCCESS); - -} - -arm_status arm_cfft_init_f32( - arm_cfft_instance_f32 * S, - uint16_t fftLen) -{ - - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = NULL; - - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) { - /* Initializations of structure parameters for 4096 point FFT */ -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_F32_4096)) - case 4096U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096; - S->pTwiddle = (float32_t *)twiddleCoef_4096; - status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F32_2048)) - /* Initializations of structure parameters for 2048 point FFT */ - case 2048U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048; - S->pTwiddle = (float32_t *)twiddleCoef_2048; - status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F32_1024)) - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; - S->pTwiddle = (float32_t *)twiddleCoef_1024; - status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_F32_512)) - /* Initializations of structure parameters for 512 point FFT */ - case 512U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512; - S->pTwiddle = (float32_t *)twiddleCoef_512; - status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_F32_256)) - case 256U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; - S->pTwiddle = (float32_t *)twiddleCoef_256; - status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_F32_128)) - case 128U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; - S->pTwiddle = (float32_t *)twiddleCoef_128; - status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_F32_64)) - case 64U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64; - S->pTwiddle = (float32_t *)twiddleCoef_64; - status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_F32_32)) - case 32U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32; - S->pTwiddle = (float32_t *)twiddleCoef_32; - status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_F32_16)) - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; - S->pTwiddle = (float32_t *)twiddleCoef_16; - status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1); - break; -#endif - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - - return (status); -} -#else -arm_status arm_cfft_init_f32( - arm_cfft_instance_f32 * S, - uint16_t fftLen) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = NULL; - - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) { -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096)) - /* Initializations of structure parameters for 4096 point FFT */ - case 4096U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f32,4096); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048)) - /* Initializations of structure parameters for 2048 point FFT */ - case 2048U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f32,2048); - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024)) - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f32,1024); - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512)) - /* Initializations of structure parameters for 512 point FFT */ - case 512U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f32,512); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256)) - case 256U: - FFTINIT(f32,256); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128)) - case 128U: - FFTINIT(f32,128); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64)) - case 64U: - FFTINIT(f32,64); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32)) - case 32U: - FFTINIT(f32,32); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16)) - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - FFTINIT(f32,16); - break; -#endif - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c deleted file mode 100644 index 9a46175..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c +++ /dev/null @@ -1,150 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_init_f64.c - * Description: Initialization function for cfft f64 instance - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#define FFTINIT(EXT,SIZE) \ - S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength; \ - S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable; \ - S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle; - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the cfft f64 function - @param[in,out] S points to an instance of the floating-point CFFT structure - @param[in] fftLen fft length (number of complex samples) - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - - @par Use of this function is mandatory only for the MVE version of the FFT. - Other versions can still initialize directly the data structure using - variables declared in arm_const_structs.h - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" -#include "arm_const_structs.h" - - -arm_status arm_cfft_init_f64( - arm_cfft_instance_f64 * S, - uint16_t fftLen) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = NULL; - - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) { -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096)) - /* Initializations of structure parameters for 4096 point FFT */ - case 4096U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f64,4096); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048)) - /* Initializations of structure parameters for 2048 point FFT */ - case 2048U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f64,2048); - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024)) - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f64,1024); - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT_512)) - /* Initializations of structure parameters for 512 point FFT */ - case 512U: - /* Initialise the bit reversal table modifier */ - FFTINIT(f64,512); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT_256)) - case 256U: - FFTINIT(f64,256); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT_128)) - case 128U: - FFTINIT(f64,128); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT_64)) - case 64U: - FFTINIT(f64,64); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT_32)) - case 32U: - FFTINIT(f64,32); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_BITREVIDX_FLT_16)) - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - FFTINIT(f64,16); - break; -#endif - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - - return (status); -} - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c deleted file mode 100644 index b7b04a9..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c +++ /dev/null @@ -1,356 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_init_q15.c - * Description: Initialization function for cfft q15 instance - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#define FFTINIT(EXT,SIZE) \ - S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength; \ - S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable; \ - S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle; - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the cfft q15 function - @param[in,out] S points to an instance of the floating-point CFFT structure - @param[in] fftLen fft length (number of complex samples) - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - - @par Use of this function is mandatory only for the MVE version of the FFT. - Other versions can still initialize directly the data structure using - variables declared in arm_const_structs.h - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" -#include "arm_const_structs.h" - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_vec_fft.h" -#include "arm_mve_tables.h" - - -arm_status arm_cfft_radix4by2_rearrange_twiddles_q15(arm_cfft_instance_q15 *S, int twidCoefModifier) -{ - - switch (S->fftLen >> (twidCoefModifier - 1)) { - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)) - case 4096U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_q15; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_4096_q15; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_q15; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_4096_q15; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_q15; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_4096_q15; - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)) - case 1024U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_q15; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_1024_q15; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_q15; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_1024_q15; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_q15; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_1024_q15; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256)) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512)) - case 256U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_q15; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_256_q15; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_q15; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_256_q15; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_q15; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_256_q15; - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64)) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128)) - case 64U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_q15; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_64_q15; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_q15; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_64_q15; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_q15; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_64_q15; - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16)) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32)) - case 16U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_q15; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_16_q15; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_q15; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_16_q15; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_q15; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_16_q15; - break; -#endif - - default: - return(ARM_MATH_ARGUMENT_ERROR); - break; - /* invalid sizes already filtered */ - } - - return(ARM_MATH_SUCCESS); - -} - - - -arm_status arm_cfft_init_q15( - arm_cfft_instance_q15 * S, - uint16_t fftLen) -{ - - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = NULL; - - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) { - /* Initializations of structure parameters for 4096 point FFT */ -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)) - case 4096U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096; - S->pTwiddle = (q15_t *)twiddleCoef_4096_q15; - status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)) - /* Initializations of structure parameters for 2048 point FFT */ - case 2048U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048; - S->pTwiddle = (q15_t *)twiddleCoef_2048_q15; - status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)) - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; - S->pTwiddle = (q15_t *)twiddleCoef_1024_q15; - status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512)) - /* Initializations of structure parameters for 512 point FFT */ - case 512U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512; - S->pTwiddle = (q15_t *)twiddleCoef_512_q15; - status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256)) - case 256U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; - S->pTwiddle = (q15_t *)twiddleCoef_256_q15; - status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128)) - case 128U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; - S->pTwiddle = (q15_t *)twiddleCoef_128_q15; - status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64)) - case 64U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64; - S->pTwiddle = (q15_t *)twiddleCoef_64_q15; - status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32)) - case 32U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32; - S->pTwiddle = (q15_t *)twiddleCoef_32_q15; - status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16)) - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; - S->pTwiddle = (q15_t *)twiddleCoef_16_q15; - status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1); - break; -#endif - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - - return (status); -} -#else -arm_status arm_cfft_init_q15( - arm_cfft_instance_q15 * S, - uint16_t fftLen) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = NULL; - - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) { -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) - /* Initializations of structure parameters for 4096 point FFT */ - case 4096U: - /* Initialise the bit reversal table modifier */ - FFTINIT(q15,4096); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) - /* Initializations of structure parameters for 2048 point FFT */ - case 2048U: - /* Initialise the bit reversal table modifier */ - FFTINIT(q15,2048); - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the bit reversal table modifier */ - FFTINIT(q15,1024); - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) - /* Initializations of structure parameters for 512 point FFT */ - case 512U: - /* Initialise the bit reversal table modifier */ - FFTINIT(q15,512); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) - case 256U: - FFTINIT(q15,256); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) - case 128U: - FFTINIT(q15,128); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) - case 64U: - FFTINIT(q15,64); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) - case 32U: - FFTINIT(q15,32); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - FFTINIT(q15,16); - break; -#endif - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c deleted file mode 100644 index 34ef96f..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c +++ /dev/null @@ -1,356 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_init_q31.c - * Description: Initialization function for cfft q31 instance - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#define FFTINIT(EXT,SIZE) \ - S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength; \ - S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable; \ - S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle; - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the cfft q31 function - @param[in,out] S points to an instance of the floating-point CFFT structure - @param[in] fftLen fft length (number of complex samples) - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - - @par Use of this function is mandatory only for the MVE version of the FFT. - Other versions can still initialize directly the data structure using - variables declared in arm_const_structs.h - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" -#include "arm_const_structs.h" - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_vec_fft.h" -#include "arm_mve_tables.h" - - -arm_status arm_cfft_radix4by2_rearrange_twiddles_q31(arm_cfft_instance_q31 *S, int twidCoefModifier) -{ - - switch (S->fftLen >> (twidCoefModifier - 1)) { - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)) - case 4096U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_q31; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_4096_q31; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_q31; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_4096_q31; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_q31; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_4096_q31; - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)) - case 1024U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_q31; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_1024_q31; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_q31; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_1024_q31; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_q31; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_1024_q31; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256)) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512)) - case 256U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_q31; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_256_q31; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_q31; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_256_q31; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_q31; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_256_q31; - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64)) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128)) - case 64U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_q31; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_64_q31; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_q31; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_64_q31; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_q31; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_64_q31; - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16)) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32)) - case 16U: - S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_q31; - S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_16_q31; - - S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_q31; - S->rearranged_twiddle_stride2 = rearranged_twiddle_stride2_16_q31; - - S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_q31; - S->rearranged_twiddle_stride3 = rearranged_twiddle_stride3_16_q31; - break; -#endif - - default: - return(ARM_MATH_ARGUMENT_ERROR); - break; - /* invalid sizes already filtered */ - } - - return(ARM_MATH_SUCCESS); - -} - - - -arm_status arm_cfft_init_q31( - arm_cfft_instance_q31 * S, - uint16_t fftLen) -{ - - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = NULL; - - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) { - /* Initializations of structure parameters for 4096 point FFT */ -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)) - case 4096U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096; - S->pTwiddle = (q31_t *)twiddleCoef_4096_q31; - status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)) - /* Initializations of structure parameters for 2048 point FFT */ - case 2048U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048; - S->pTwiddle = (q31_t *)twiddleCoef_2048_q31; - status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)) - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; - S->pTwiddle = (q31_t *)twiddleCoef_1024_q31; - status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512)) - /* Initializations of structure parameters for 512 point FFT */ - case 512U: - /* Initialise the bit reversal table modifier */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512; - S->pTwiddle = (q31_t *)twiddleCoef_512_q31; - status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256)) - case 256U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; - S->pTwiddle = (q31_t *)twiddleCoef_256_q31; - status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128)) - case 128U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; - S->pTwiddle = (q31_t *)twiddleCoef_128_q31; - status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64)) - case 64U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64; - S->pTwiddle = (q31_t *)twiddleCoef_64_q31; - status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32)) - case 32U: - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32; - S->pTwiddle = (q31_t *)twiddleCoef_32_q31; - status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16)) - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH; - S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; - S->pTwiddle = (q31_t *)twiddleCoef_16_q31; - status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1); - break; -#endif - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - - return (status); -} -#else -arm_status arm_cfft_init_q31( - arm_cfft_instance_q31 * S, - uint16_t fftLen) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = NULL; - - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) { -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) - /* Initializations of structure parameters for 4096 point FFT */ - case 4096U: - /* Initialise the bit reversal table modifier */ - FFTINIT(q31,4096); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) - /* Initializations of structure parameters for 2048 point FFT */ - case 2048U: - /* Initialise the bit reversal table modifier */ - FFTINIT(q31,2048); - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the bit reversal table modifier */ - FFTINIT(q31,1024); - - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) - /* Initializations of structure parameters for 512 point FFT */ - case 512U: - /* Initialise the bit reversal table modifier */ - FFTINIT(q31,512); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) - case 256U: - FFTINIT(q31,256); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) - case 128U: - FFTINIT(q31,128); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) - case 64U: - FFTINIT(q31,64); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) - case 32U: - FFTINIT(q31,32); - break; -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - FFTINIT(q31,16); - break; -#endif - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - - return (status); -} -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c deleted file mode 100644 index b3ea003..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c +++ /dev/null @@ -1,893 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_q15.c - * Description: Combined Radix Decimation in Q15 Frequency CFFT processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_vec_fft.h" - - -static void _arm_radix4_butterfly_q15_mve( - const arm_cfft_instance_q15 * S, - q15_t *pSrc, - uint32_t fftLen) -{ - q15x8_t vecTmp0, vecTmp1; - q15x8_t vecSum0, vecDiff0, vecSum1, vecDiff1; - q15x8_t vecA, vecB, vecC, vecD; - uint32_t blkCnt; - uint32_t n1, n2; - uint32_t stage = 0; - int32_t iter = 1; - static const int32_t strides[4] = { - (0 - 16) * (int32_t)sizeof(q15_t *), (4 - 16) * (int32_t)sizeof(q15_t *), - (8 - 16) * (int32_t)sizeof(q15_t *), (12 - 16) * (int32_t)sizeof(q15_t *) - }; - - /* - * Process first stages - * Each stage in middle stages provides two down scaling of the input - */ - n2 = fftLen; - n1 = n2; - n2 >>= 2u; - - for (int k = fftLen / 4u; k > 1; k >>= 2u) - { - q15_t const *p_rearranged_twiddle_tab_stride2 = - &S->rearranged_twiddle_stride2[ - S->rearranged_twiddle_tab_stride2_arr[stage]]; - q15_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[ - S->rearranged_twiddle_tab_stride3_arr[stage]]; - q15_t const *p_rearranged_twiddle_tab_stride1 = - &S->rearranged_twiddle_stride1[ - S->rearranged_twiddle_tab_stride1_arr[stage]]; - - q15_t * pBase = pSrc; - for (int i = 0; i < iter; i++) - { - q15_t *inA = pBase; - q15_t *inB = inA + n2 * CMPLX_DIM; - q15_t *inC = inB + n2 * CMPLX_DIM; - q15_t *inD = inC + n2 * CMPLX_DIM; - q15_t const *pW1 = p_rearranged_twiddle_tab_stride1; - q15_t const *pW2 = p_rearranged_twiddle_tab_stride2; - q15_t const *pW3 = p_rearranged_twiddle_tab_stride3; - q15x8_t vecW; - - blkCnt = n2 / 4; - /* - * load 4 x q15 complex pair - */ - vecA = vldrhq_s16(inA); - vecC = vldrhq_s16(inC); - while (blkCnt > 0U) - { - vecB = vldrhq_s16(inB); - vecD = vldrhq_s16(inD); - - vecSum0 = vhaddq(vecA, vecC); - vecDiff0 = vhsubq(vecA, vecC); - - vecSum1 = vhaddq(vecB, vecD); - vecDiff1 = vhsubq(vecB, vecD); - /* - * [ 1 1 1 1 ] * [ A B C D ]' .* 1 - */ - vecTmp0 = vhaddq(vecSum0, vecSum1); - vst1q(inA, vecTmp0); - inA += 8; - /* - * [ 1 -1 1 -1 ] * [ A B C D ]' - */ - vecTmp0 = vhsubq(vecSum0, vecSum1); - /* - * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 - */ - vecW = vld1q(pW2); - pW2 += 8; - vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q15x8_t); - - vst1q(inB, vecTmp1); - inB += 8; - /* - * [ 1 -i -1 +i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 - */ - vecW = vld1q(pW1); - pW1 += 8; - vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q15x8_t); - vst1q(inC, vecTmp1); - inC += 8; - - /* - * [ 1 +i -1 -i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 - */ - vecW = vld1q(pW3); - pW3 += 8; - vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q15x8_t); - vst1q(inD, vecTmp1); - inD += 8; - - vecA = vldrhq_s16(inA); - vecC = vldrhq_s16(inC); - - blkCnt--; - } - pBase += CMPLX_DIM * n1; - } - n1 = n2; - n2 >>= 2u; - iter = iter << 2; - stage++; - } - - /* - * start of Last stage process - */ - uint32x4_t vecScGathAddr = vld1q_u32 ((uint32_t*)strides); - vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; - - /* - * load scheduling - */ - vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); - vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8); - - blkCnt = (fftLen >> 4); - while (blkCnt > 0U) - { - vecSum0 = vhaddq(vecA, vecC); - vecDiff0 = vhsubq(vecA, vecC); - - vecB = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 4); - vecD = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 12); - - vecSum1 = vhaddq(vecB, vecD); - vecDiff1 = vhsubq(vecB, vecD); - /* - * pre-load for next iteration - */ - vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); - vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8); - - vecTmp0 = vhaddq(vecSum0, vecSum1); - vstrwq_scatter_base_s32(vecScGathAddr, -64, (int32x4_t) vecTmp0); - - vecTmp0 = vhsubq(vecSum0, vecSum1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 4, (int32x4_t) vecTmp0); - - vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, (int32x4_t) vecTmp0); - - vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 12, (int32x4_t) vecTmp0); - - blkCnt--; - } - -} - -static void arm_cfft_radix4by2_q15_mve(const arm_cfft_instance_q15 *S, q15_t *pSrc, uint32_t fftLen) -{ - uint32_t n2; - q15_t *pIn0; - q15_t *pIn1; - const q15_t *pCoef = S->pTwiddle; - uint32_t blkCnt; - q15x8_t vecIn0, vecIn1, vecSum, vecDiff; - q15x8_t vecCmplxTmp, vecTw; - q15_t const *pCoefVec; - - n2 = fftLen >> 1; - - pIn0 = pSrc; - pIn1 = pSrc + fftLen; - pCoefVec = pCoef; - - blkCnt = n2 / 4; - - while (blkCnt > 0U) - { - vecIn0 = *(q15x8_t *) pIn0; - vecIn1 = *(q15x8_t *) pIn1; - - vecIn0 = vecIn0 >> 1; - vecIn1 = vecIn1 >> 1; - vecSum = vhaddq(vecIn0, vecIn1); - vst1q(pIn0, vecSum); - pIn0 += 8; - - vecTw = vld1q(pCoefVec); - pCoefVec += 8; - - vecDiff = vhsubq(vecIn0, vecIn1); - vecCmplxTmp = MVE_CMPLX_MULT_FX_AxConjB(vecDiff, vecTw, q15x8_t); - vst1q(pIn1, vecCmplxTmp); - pIn1 += 8; - - blkCnt--; - } - - _arm_radix4_butterfly_q15_mve(S, pSrc, n2); - - _arm_radix4_butterfly_q15_mve(S, pSrc + fftLen, n2); - - - pIn0 = pSrc; - blkCnt = (fftLen << 1) >> 3; - while (blkCnt > 0U) - { - vecIn0 = *(q15x8_t *) pIn0; - vecIn0 = vecIn0 << 1; - vst1q(pIn0, vecIn0); - pIn0 += 8; - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (fftLen << 1) & 7; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - vecIn0 = *(q15x8_t *) pIn0; - vecIn0 = vecIn0 << 1; - vstrhq_p(pIn0, vecIn0, p0); - } -} - -static void _arm_radix4_butterfly_inverse_q15_mve(const arm_cfft_instance_q15 *S,q15_t *pSrc, uint32_t fftLen) -{ - q15x8_t vecTmp0, vecTmp1; - q15x8_t vecSum0, vecDiff0, vecSum1, vecDiff1; - q15x8_t vecA, vecB, vecC, vecD; - uint32_t blkCnt; - uint32_t n1, n2; - uint32_t stage = 0; - int32_t iter = 1; - static const int32_t strides[4] = { - (0 - 16) * (int32_t)sizeof(q15_t *), (4 - 16) * (int32_t)sizeof(q15_t *), - (8 - 16) * (int32_t)sizeof(q15_t *), (12 - 16) * (int32_t)sizeof(q15_t *) - }; - - - /* - * Process first stages - * Each stage in middle stages provides two down scaling of the input - */ - n2 = fftLen; - n1 = n2; - n2 >>= 2u; - - for (int k = fftLen / 4u; k > 1; k >>= 2u) - { - q15_t const *p_rearranged_twiddle_tab_stride2 = - &S->rearranged_twiddle_stride2[ - S->rearranged_twiddle_tab_stride2_arr[stage]]; - q15_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[ - S->rearranged_twiddle_tab_stride3_arr[stage]]; - q15_t const *p_rearranged_twiddle_tab_stride1 = - &S->rearranged_twiddle_stride1[ - S->rearranged_twiddle_tab_stride1_arr[stage]]; - - q15_t * pBase = pSrc; - for (int i = 0; i < iter; i++) - { - q15_t *inA = pBase; - q15_t *inB = inA + n2 * CMPLX_DIM; - q15_t *inC = inB + n2 * CMPLX_DIM; - q15_t *inD = inC + n2 * CMPLX_DIM; - q15_t const *pW1 = p_rearranged_twiddle_tab_stride1; - q15_t const *pW2 = p_rearranged_twiddle_tab_stride2; - q15_t const *pW3 = p_rearranged_twiddle_tab_stride3; - q15x8_t vecW; - - - blkCnt = n2 / 4; - /* - * load 4 x q15 complex pair - */ - vecA = vldrhq_s16(inA); - vecC = vldrhq_s16(inC); - while (blkCnt > 0U) - { - vecB = vldrhq_s16(inB); - vecD = vldrhq_s16(inD); - - vecSum0 = vhaddq(vecA, vecC); - vecDiff0 = vhsubq(vecA, vecC); - - vecSum1 = vhaddq(vecB, vecD); - vecDiff1 = vhsubq(vecB, vecD); - /* - * [ 1 1 1 1 ] * [ A B C D ]' .* 1 - */ - vecTmp0 = vhaddq(vecSum0, vecSum1); - vst1q(inA, vecTmp0); - inA += 8; - /* - * [ 1 -1 1 -1 ] * [ A B C D ]' - */ - vecTmp0 = vhsubq(vecSum0, vecSum1); - /* - * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 - */ - vecW = vld1q(pW2); - pW2 += 8; - vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q15x8_t); - - vst1q(inB, vecTmp1); - inB += 8; - /* - * [ 1 -i -1 +i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 - */ - vecW = vld1q(pW1); - pW1 += 8; - vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q15x8_t); - vst1q(inC, vecTmp1); - inC += 8; - /* - * [ 1 +i -1 -i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 - */ - vecW = vld1q(pW3); - pW3 += 8; - vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q15x8_t); - vst1q(inD, vecTmp1); - inD += 8; - - vecA = vldrhq_s16(inA); - vecC = vldrhq_s16(inC); - - blkCnt--; - } - pBase += CMPLX_DIM * n1; - } - n1 = n2; - n2 >>= 2u; - iter = iter << 2; - stage++; - } - - /* - * start of Last stage process - */ - uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides); - vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; - - /* - * load scheduling - */ - vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); - vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8); - - blkCnt = (fftLen >> 4); - while (blkCnt > 0U) - { - vecSum0 = vhaddq(vecA, vecC); - vecDiff0 = vhsubq(vecA, vecC); - - vecB = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 4); - vecD = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 12); - - vecSum1 = vhaddq(vecB, vecD); - vecDiff1 = vhsubq(vecB, vecD); - /* - * pre-load for next iteration - */ - vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); - vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8); - - vecTmp0 = vhaddq(vecSum0, vecSum1); - vstrwq_scatter_base_s32(vecScGathAddr, -64, (int32x4_t) vecTmp0); - - vecTmp0 = vhsubq(vecSum0, vecSum1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 4, (int32x4_t) vecTmp0); - - vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, (int32x4_t) vecTmp0); - - vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 12, (int32x4_t) vecTmp0); - - blkCnt--; - } -} - -static void arm_cfft_radix4by2_inverse_q15_mve(const arm_cfft_instance_q15 *S, q15_t *pSrc, uint32_t fftLen) -{ - uint32_t n2; - q15_t *pIn0; - q15_t *pIn1; - const q15_t *pCoef = S->pTwiddle; - - uint32_t blkCnt; - q15x8_t vecIn0, vecIn1, vecSum, vecDiff; - q15x8_t vecCmplxTmp, vecTw; - q15_t const *pCoefVec; - - n2 = fftLen >> 1; - - pIn0 = pSrc; - pIn1 = pSrc + fftLen; - pCoefVec = pCoef; - - blkCnt = n2 / 4; - - while (blkCnt > 0U) - { - vecIn0 = *(q15x8_t *) pIn0; - vecIn1 = *(q15x8_t *) pIn1; - - vecIn0 = vecIn0 >> 1; - vecIn1 = vecIn1 >> 1; - vecSum = vhaddq(vecIn0, vecIn1); - vst1q(pIn0, vecSum); - pIn0 += 8; - - vecTw = vld1q(pCoefVec); - pCoefVec += 8; - - vecDiff = vhsubq(vecIn0, vecIn1); - vecCmplxTmp = vqrdmlsdhq(vuninitializedq_s16() , vecDiff, vecTw); - vecCmplxTmp = vqrdmladhxq(vecCmplxTmp, vecDiff, vecTw); - vst1q(pIn1, vecCmplxTmp); - pIn1 += 8; - - blkCnt--; - } - - - _arm_radix4_butterfly_inverse_q15_mve(S, pSrc, n2); - - _arm_radix4_butterfly_inverse_q15_mve(S, pSrc + fftLen, n2); - - pIn0 = pSrc; - blkCnt = (fftLen << 1) >> 3; - while (blkCnt > 0U) - { - vecIn0 = *(q15x8_t *) pIn0; - vecIn0 = vecIn0 << 1; - vst1q(pIn0, vecIn0); - pIn0 += 8; - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (fftLen << 1) & 7; - while (blkCnt > 0U) - { - mve_pred16_t p0 = vctp16q(blkCnt); - - vecIn0 = *(q15x8_t *) pIn0; - vecIn0 = vecIn0 << 1; - vstrhq_p(pIn0, vecIn0, p0); - } -} - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for Q15 complex FFT. - @param[in] S points to an instance of Q15 CFFT structure - @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return none - */ -void arm_cfft_q15( - const arm_cfft_instance_q15 * S, - q15_t * pSrc, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - uint32_t fftLen = S->fftLen; - - if (ifftFlag == 1U) { - - switch (fftLen) { - case 16: - case 64: - case 256: - case 1024: - case 4096: - _arm_radix4_butterfly_inverse_q15_mve(S, pSrc, fftLen); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_inverse_q15_mve(S, pSrc, fftLen); - break; - } - } else { - switch (fftLen) { - case 16: - case 64: - case 256: - case 1024: - case 4096: - _arm_radix4_butterfly_q15_mve(S, pSrc, fftLen); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_q15_mve(S, pSrc, fftLen); - break; - } - } - - - if (bitReverseFlag) - { - - arm_bitreversal_16_inpl_mve((uint16_t*)pSrc, S->bitRevLength, S->pBitRevTable); - - } -} - -#else - -extern void arm_radix4_butterfly_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pCoef, - uint32_t twidCoefModifier); - -extern void arm_radix4_butterfly_inverse_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pCoef, - uint32_t twidCoefModifier); - -extern void arm_bitreversal_16( - uint16_t * pSrc, - const uint16_t bitRevLen, - const uint16_t * pBitRevTable); - -void arm_cfft_radix4by2_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pCoef); - -void arm_cfft_radix4by2_inverse_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pCoef); - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for Q15 complex FFT. - @param[in] S points to an instance of Q15 CFFT structure - @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return none - */ - -void arm_cfft_q15( - const arm_cfft_instance_q15 * S, - q15_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - uint32_t L = S->fftLen; - - if (ifftFlag == 1U) - { - switch (L) - { - case 16: - case 64: - case 256: - case 1024: - case 4096: - arm_radix4_butterfly_inverse_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 ); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_inverse_q15 ( p1, L, S->pTwiddle ); - break; - } - } - else - { - switch (L) - { - case 16: - case 64: - case 256: - case 1024: - case 4096: - arm_radix4_butterfly_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 ); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_q15 ( p1, L, S->pTwiddle ); - break; - } - } - - if ( bitReverseFlag ) - arm_bitreversal_16 ((uint16_t*) p1, S->bitRevLength, S->pBitRevTable); -} - -/** - @} end of ComplexFFT group - */ - -void arm_cfft_radix4by2_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pCoef) -{ - uint32_t i; - uint32_t n2; - q15_t p0, p1, p2, p3; -#if defined (ARM_MATH_DSP) - q31_t T, S, R; - q31_t coeff, out1, out2; - const q15_t *pC = pCoef; - q15_t *pSi = pSrc; - q15_t *pSl = pSrc + fftLen; -#else - uint32_t l; - q15_t xt, yt, cosVal, sinVal; -#endif - - n2 = fftLen >> 1U; - -#if defined (ARM_MATH_DSP) - - for (i = n2; i > 0; i--) - { - coeff = read_q15x2_ia (&pC); - - T = read_q15x2 (pSi); - T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */ - - S = read_q15x2 (pSl); - S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */ - - R = __QSUB16(T, S); - - write_q15x2_ia (&pSi, __SHADD16(T, S)); - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUAD(coeff, R) >> 16U; - out2 = __SMUSDX(coeff, R); -#else - out1 = __SMUSDX(R, coeff) >> 16U; - out2 = __SMUAD(coeff, R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - write_q15x2_ia (&pSl, (q31_t)__PKHBT( out1, out2, 0 ) ); - } - -#else /* #if defined (ARM_MATH_DSP) */ - - for (i = 0; i < n2; i++) - { - cosVal = pCoef[2 * i]; - sinVal = pCoef[2 * i + 1]; - - l = i + n2; - - xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); - pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; - - yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); - pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; - - pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) + - ((int16_t) (((q31_t) yt * sinVal) >> 16U)) ); - - pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) - - ((int16_t) (((q31_t) xt * sinVal) >> 16U)) ); - } - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* first col */ - arm_radix4_butterfly_q15( pSrc, n2, (q15_t*)pCoef, 2U); - - /* second col */ - arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U); - - n2 = fftLen >> 1U; - for (i = 0; i < n2; i++) - { - p0 = pSrc[4 * i + 0]; - p1 = pSrc[4 * i + 1]; - p2 = pSrc[4 * i + 2]; - p3 = pSrc[4 * i + 3]; - - p0 <<= 1U; - p1 <<= 1U; - p2 <<= 1U; - p3 <<= 1U; - - pSrc[4 * i + 0] = p0; - pSrc[4 * i + 1] = p1; - pSrc[4 * i + 2] = p2; - pSrc[4 * i + 3] = p3; - } - -} - -void arm_cfft_radix4by2_inverse_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pCoef) -{ - uint32_t i; - uint32_t n2; - q15_t p0, p1, p2, p3; -#if defined (ARM_MATH_DSP) - q31_t T, S, R; - q31_t coeff, out1, out2; - const q15_t *pC = pCoef; - q15_t *pSi = pSrc; - q15_t *pSl = pSrc + fftLen; -#else - uint32_t l; - q15_t xt, yt, cosVal, sinVal; -#endif - - n2 = fftLen >> 1U; - -#if defined (ARM_MATH_DSP) - - for (i = n2; i > 0; i--) - { - coeff = read_q15x2_ia (&pC); - - T = read_q15x2 (pSi); - T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */ - - S = read_q15x2 (pSl); - S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */ - - R = __QSUB16(T, S); - - write_q15x2_ia (&pSi, __SHADD16(T, S)); - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUSD(coeff, R) >> 16U; - out2 = __SMUADX(coeff, R); -#else - out1 = __SMUADX(R, coeff) >> 16U; - out2 = __SMUSD(__QSUB(0, coeff), R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - write_q15x2_ia (&pSl, (q31_t)__PKHBT( out1, out2, 0 )); - } - -#else /* #if defined (ARM_MATH_DSP) */ - - for (i = 0; i < n2; i++) - { - cosVal = pCoef[2 * i]; - sinVal = pCoef[2 * i + 1]; - - l = i + n2; - - xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); - pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; - - yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); - pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; - - pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) - - ((int16_t) (((q31_t) yt * sinVal) >> 16U)) ); - - pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) + - ((int16_t) (((q31_t) xt * sinVal) >> 16U)) ); - } - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* first col */ - arm_radix4_butterfly_inverse_q15( pSrc, n2, (q15_t*)pCoef, 2U); - - /* second col */ - arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U); - - n2 = fftLen >> 1U; - for (i = 0; i < n2; i++) - { - p0 = pSrc[4 * i + 0]; - p1 = pSrc[4 * i + 1]; - p2 = pSrc[4 * i + 2]; - p3 = pSrc[4 * i + 3]; - - p0 <<= 1U; - p1 <<= 1U; - p2 <<= 1U; - p3 <<= 1U; - - pSrc[4 * i + 0] = p0; - pSrc[4 * i + 1] = p1; - pSrc[4 * i + 2] = p2; - pSrc[4 * i + 3] = p3; - } -} - -#endif /* defined(ARM_MATH_MVEI) */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c deleted file mode 100644 index 9c0da1d..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c +++ /dev/null @@ -1,847 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_q31.c - * Description: Combined Radix Decimation in Frequency CFFT fixed point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - - - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_vec_fft.h" - - -static void _arm_radix4_butterfly_q31_mve( - const arm_cfft_instance_q31 * S, - q31_t *pSrc, - uint32_t fftLen) -{ - q31x4_t vecTmp0, vecTmp1; - q31x4_t vecSum0, vecDiff0, vecSum1, vecDiff1; - q31x4_t vecA, vecB, vecC, vecD; - uint32_t blkCnt; - uint32_t n1, n2; - uint32_t stage = 0; - int32_t iter = 1; - static const int32_t strides[4] = { - (0 - 16) * (int32_t)sizeof(q31_t *), (1 - 16) * (int32_t)sizeof(q31_t *), - (8 - 16) * (int32_t)sizeof(q31_t *), (9 - 16) * (int32_t)sizeof(q31_t *) - }; - - - /* - * Process first stages - * Each stage in middle stages provides two down scaling of the input - */ - n2 = fftLen; - n1 = n2; - n2 >>= 2u; - - for (int k = fftLen / 4u; k > 1; k >>= 2u) - { - q31_t const *p_rearranged_twiddle_tab_stride2 = - &S->rearranged_twiddle_stride2[ - S->rearranged_twiddle_tab_stride2_arr[stage]]; - q31_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[ - S->rearranged_twiddle_tab_stride3_arr[stage]]; - q31_t const *p_rearranged_twiddle_tab_stride1 = - &S->rearranged_twiddle_stride1[ - S->rearranged_twiddle_tab_stride1_arr[stage]]; - - q31_t * pBase = pSrc; - for (int i = 0; i < iter; i++) - { - q31_t *inA = pBase; - q31_t *inB = inA + n2 * CMPLX_DIM; - q31_t *inC = inB + n2 * CMPLX_DIM; - q31_t *inD = inC + n2 * CMPLX_DIM; - q31_t const *pW1 = p_rearranged_twiddle_tab_stride1; - q31_t const *pW2 = p_rearranged_twiddle_tab_stride2; - q31_t const *pW3 = p_rearranged_twiddle_tab_stride3; - q31x4_t vecW; - - - blkCnt = n2 / 2; - /* - * load 2 x q31 complex pair - */ - vecA = vldrwq_s32(inA); - vecC = vldrwq_s32(inC); - while (blkCnt > 0U) - { - vecB = vldrwq_s32(inB); - vecD = vldrwq_s32(inD); - - vecSum0 = vhaddq(vecA, vecC); - vecDiff0 = vhsubq(vecA, vecC); - - vecSum1 = vhaddq(vecB, vecD); - vecDiff1 = vhsubq(vecB, vecD); - /* - * [ 1 1 1 1 ] * [ A B C D ]' .* 1 - */ - vecTmp0 = vhaddq(vecSum0, vecSum1); - vst1q(inA, vecTmp0); - inA += 4; - /* - * [ 1 -1 1 -1 ] * [ A B C D ]' - */ - vecTmp0 = vhsubq(vecSum0, vecSum1); - /* - * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 - */ - vecW = vld1q(pW2); - pW2 += 4; - vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q31x4_t); - - vst1q(inB, vecTmp1); - inB += 4; - /* - * [ 1 -i -1 +i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 - */ - vecW = vld1q(pW1); - pW1 += 4; - vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q31x4_t); - vst1q(inC, vecTmp1); - inC += 4; - /* - * [ 1 +i -1 -i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 - */ - vecW = vld1q(pW3); - pW3 += 4; - vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q31x4_t); - vst1q(inD, vecTmp1); - inD += 4; - - vecA = vldrwq_s32(inA); - vecC = vldrwq_s32(inC); - - blkCnt--; - } - pBase += CMPLX_DIM * n1; - } - n1 = n2; - n2 >>= 2u; - iter = iter << 2; - stage++; - } - - /* - * End of 1st stages process - * data is in 11.21(q21) format for the 1024 point as there are 3 middle stages - * data is in 9.23(q23) format for the 256 point as there are 2 middle stages - * data is in 7.25(q25) format for the 64 point as there are 1 middle stage - * data is in 5.27(q27) format for the 16 point as there are no middle stages - */ - - /* - * start of Last stage process - */ - uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides); - vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; - - /* - * load scheduling - */ - vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); - vecC = vldrwq_gather_base_s32(vecScGathAddr, 16); - - blkCnt = (fftLen >> 3); - while (blkCnt > 0U) - { - vecSum0 = vhaddq(vecA, vecC); - vecDiff0 = vhsubq(vecA, vecC); - - vecB = vldrwq_gather_base_s32(vecScGathAddr, 8); - vecD = vldrwq_gather_base_s32(vecScGathAddr, 24); - - vecSum1 = vhaddq(vecB, vecD); - vecDiff1 = vhsubq(vecB, vecD); - /* - * pre-load for next iteration - */ - vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); - vecC = vldrwq_gather_base_s32(vecScGathAddr, 16); - - vecTmp0 = vhaddq(vecSum0, vecSum1); - vstrwq_scatter_base_s32(vecScGathAddr, -64, vecTmp0); - - vecTmp0 = vhsubq(vecSum0, vecSum1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, vecTmp0); - - vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 16, vecTmp0); - - vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 24, vecTmp0); - - blkCnt--; - } - - /* - * output is in 11.21(q21) format for the 1024 point - * output is in 9.23(q23) format for the 256 point - * output is in 7.25(q25) format for the 64 point - * output is in 5.27(q27) format for the 16 point - */ -} - - -static void arm_cfft_radix4by2_q31_mve(const arm_cfft_instance_q31 *S, q31_t *pSrc, uint32_t fftLen) -{ - uint32_t n2; - q31_t *pIn0; - q31_t *pIn1; - const q31_t *pCoef = S->pTwiddle; - uint32_t blkCnt; - q31x4_t vecIn0, vecIn1, vecSum, vecDiff; - q31x4_t vecCmplxTmp, vecTw; - - n2 = fftLen >> 1; - pIn0 = pSrc; - pIn1 = pSrc + fftLen; - - blkCnt = n2 / 2; - - while (blkCnt > 0U) - { - vecIn0 = vld1q_s32(pIn0); - vecIn1 = vld1q_s32(pIn1); - - vecIn0 = vecIn0 >> 1; - vecIn1 = vecIn1 >> 1; - vecSum = vhaddq(vecIn0, vecIn1); - vst1q(pIn0, vecSum); - pIn0 += 4; - - vecTw = vld1q_s32(pCoef); - pCoef += 4; - vecDiff = vhsubq(vecIn0, vecIn1); - - vecCmplxTmp = MVE_CMPLX_MULT_FX_AxConjB(vecDiff, vecTw, q31x4_t); - vst1q(pIn1, vecCmplxTmp); - pIn1 += 4; - - blkCnt--; - } - - _arm_radix4_butterfly_q31_mve(S, pSrc, n2); - - _arm_radix4_butterfly_q31_mve(S, pSrc + fftLen, n2); - - pIn0 = pSrc; - blkCnt = (fftLen << 1) >> 2; - while (blkCnt > 0U) - { - vecIn0 = vld1q_s32(pIn0); - vecIn0 = vecIn0 << 1; - vst1q(pIn0, vecIn0); - pIn0 += 4; - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (fftLen << 1) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - - vecIn0 = vld1q_s32(pIn0); - vecIn0 = vecIn0 << 1; - vstrwq_p(pIn0, vecIn0, p0); - } - -} - -static void _arm_radix4_butterfly_inverse_q31_mve( - const arm_cfft_instance_q31 *S, - q31_t *pSrc, - uint32_t fftLen) -{ - q31x4_t vecTmp0, vecTmp1; - q31x4_t vecSum0, vecDiff0, vecSum1, vecDiff1; - q31x4_t vecA, vecB, vecC, vecD; - uint32_t blkCnt; - uint32_t n1, n2; - uint32_t stage = 0; - int32_t iter = 1; - static const int32_t strides[4] = { - (0 - 16) * (int32_t)sizeof(q31_t *), (1 - 16) * (int32_t)sizeof(q31_t *), - (8 - 16) * (int32_t)sizeof(q31_t *), (9 - 16) * (int32_t)sizeof(q31_t *) - }; - - /* - * Process first stages - * Each stage in middle stages provides two down scaling of the input - */ - n2 = fftLen; - n1 = n2; - n2 >>= 2u; - - for (int k = fftLen / 4u; k > 1; k >>= 2u) - { - q31_t const *p_rearranged_twiddle_tab_stride2 = - &S->rearranged_twiddle_stride2[ - S->rearranged_twiddle_tab_stride2_arr[stage]]; - q31_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[ - S->rearranged_twiddle_tab_stride3_arr[stage]]; - q31_t const *p_rearranged_twiddle_tab_stride1 = - &S->rearranged_twiddle_stride1[ - S->rearranged_twiddle_tab_stride1_arr[stage]]; - - q31_t * pBase = pSrc; - for (int i = 0; i < iter; i++) - { - q31_t *inA = pBase; - q31_t *inB = inA + n2 * CMPLX_DIM; - q31_t *inC = inB + n2 * CMPLX_DIM; - q31_t *inD = inC + n2 * CMPLX_DIM; - q31_t const *pW1 = p_rearranged_twiddle_tab_stride1; - q31_t const *pW2 = p_rearranged_twiddle_tab_stride2; - q31_t const *pW3 = p_rearranged_twiddle_tab_stride3; - q31x4_t vecW; - - blkCnt = n2 / 2; - /* - * load 2 x q31 complex pair - */ - vecA = vldrwq_s32(inA); - vecC = vldrwq_s32(inC); - while (blkCnt > 0U) - { - vecB = vldrwq_s32(inB); - vecD = vldrwq_s32(inD); - - vecSum0 = vhaddq(vecA, vecC); - vecDiff0 = vhsubq(vecA, vecC); - - vecSum1 = vhaddq(vecB, vecD); - vecDiff1 = vhsubq(vecB, vecD); - /* - * [ 1 1 1 1 ] * [ A B C D ]' .* 1 - */ - vecTmp0 = vhaddq(vecSum0, vecSum1); - vst1q(inA, vecTmp0); - inA += 4; - /* - * [ 1 -1 1 -1 ] * [ A B C D ]' - */ - vecTmp0 = vhsubq(vecSum0, vecSum1); - /* - * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2 - */ - vecW = vld1q(pW2); - pW2 += 4; - vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q31x4_t); - - vst1q(inB, vecTmp1); - inB += 4; - /* - * [ 1 -i -1 +i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 -i -1 +i ] * [ A B C D ]'.* W1 - */ - vecW = vld1q(pW1); - pW1 += 4; - vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q31x4_t); - vst1q(inC, vecTmp1); - inC += 4; - /* - * [ 1 +i -1 -i ] * [ A B C D ]' - */ - vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); - /* - * [ 1 +i -1 -i ] * [ A B C D ]'.* W3 - */ - vecW = vld1q(pW3); - pW3 += 4; - vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q31x4_t); - vst1q(inD, vecTmp1); - inD += 4; - - vecA = vldrwq_s32(inA); - vecC = vldrwq_s32(inC); - - blkCnt--; - } - pBase += CMPLX_DIM * n1; - } - n1 = n2; - n2 >>= 2u; - iter = iter << 2; - stage++; - } - - /* - * End of 1st stages process - * data is in 11.21(q21) format for the 1024 point as there are 3 middle stages - * data is in 9.23(q23) format for the 256 point as there are 2 middle stages - * data is in 7.25(q25) format for the 64 point as there are 1 middle stage - * data is in 5.27(q27) format for the 16 point as there are no middle stages - */ - - /* - * start of Last stage process - */ - uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides); - vecScGathAddr = vecScGathAddr + (uint32_t) pSrc; - - /* - * load scheduling - */ - vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); - vecC = vldrwq_gather_base_s32(vecScGathAddr, 16); - - blkCnt = (fftLen >> 3); - while (blkCnt > 0U) - { - vecSum0 = vhaddq(vecA, vecC); - vecDiff0 = vhsubq(vecA, vecC); - - vecB = vldrwq_gather_base_s32(vecScGathAddr, 8); - vecD = vldrwq_gather_base_s32(vecScGathAddr, 24); - - vecSum1 = vhaddq(vecB, vecD); - vecDiff1 = vhsubq(vecB, vecD); - /* - * pre-load for next iteration - */ - vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64); - vecC = vldrwq_gather_base_s32(vecScGathAddr, 16); - - vecTmp0 = vhaddq(vecSum0, vecSum1); - vstrwq_scatter_base_s32(vecScGathAddr, -64, vecTmp0); - - vecTmp0 = vhsubq(vecSum0, vecSum1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, vecTmp0); - - vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 16, vecTmp0); - - vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1); - vstrwq_scatter_base_s32(vecScGathAddr, -64 + 24, vecTmp0); - - blkCnt--; - } - /* - * output is in 11.21(q21) format for the 1024 point - * output is in 9.23(q23) format for the 256 point - * output is in 7.25(q25) format for the 64 point - * output is in 5.27(q27) format for the 16 point - */ -} - -static void arm_cfft_radix4by2_inverse_q31_mve(const arm_cfft_instance_q31 *S, q31_t *pSrc, uint32_t fftLen) -{ - uint32_t n2; - q31_t *pIn0; - q31_t *pIn1; - const q31_t *pCoef = S->pTwiddle; - - //uint16_t twidCoefModifier = arm_cfft_radix2_twiddle_factor(S->fftLen); - //q31_t twidIncr = (2 * twidCoefModifier * sizeof(q31_t)); - uint32_t blkCnt; - //uint64x2_t vecOffs; - q31x4_t vecIn0, vecIn1, vecSum, vecDiff; - q31x4_t vecCmplxTmp, vecTw; - - n2 = fftLen >> 1; - - pIn0 = pSrc; - pIn1 = pSrc + fftLen; - //vecOffs[0] = 0; - //vecOffs[1] = (uint64_t) twidIncr; - blkCnt = n2 / 2; - - while (blkCnt > 0U) - { - vecIn0 = vld1q_s32(pIn0); - vecIn1 = vld1q_s32(pIn1); - - vecIn0 = vecIn0 >> 1; - vecIn1 = vecIn1 >> 1; - vecSum = vhaddq(vecIn0, vecIn1); - vst1q(pIn0, vecSum); - pIn0 += 4; - - //vecTw = (q31x4_t) vldrdq_gather_offset_s64(pCoef, vecOffs); - vecTw = vld1q_s32(pCoef); - pCoef += 4; - vecDiff = vhsubq(vecIn0, vecIn1); - - vecCmplxTmp = MVE_CMPLX_MULT_FX_AxB(vecDiff, vecTw, q31x4_t); - vst1q(pIn1, vecCmplxTmp); - pIn1 += 4; - - //vecOffs = vaddq((q31x4_t) vecOffs, 2 * twidIncr); - blkCnt--; - } - - _arm_radix4_butterfly_inverse_q31_mve(S, pSrc, n2); - - _arm_radix4_butterfly_inverse_q31_mve(S, pSrc + fftLen, n2); - - pIn0 = pSrc; - blkCnt = (fftLen << 1) >> 2; - while (blkCnt > 0U) - { - vecIn0 = vld1q_s32(pIn0); - vecIn0 = vecIn0 << 1; - vst1q(pIn0, vecIn0); - pIn0 += 4; - blkCnt--; - } - /* - * tail - * (will be merged thru tail predication) - */ - blkCnt = (fftLen << 1) & 3; - if (blkCnt > 0U) - { - mve_pred16_t p0 = vctp32q(blkCnt); - - vecIn0 = vld1q_s32(pIn0); - vecIn0 = vecIn0 << 1; - vstrwq_p(pIn0, vecIn0, p0); - } - -} - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for the Q31 complex FFT. - @param[in] S points to an instance of the fixed-point CFFT structure - @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return none - */ -void arm_cfft_q31( - const arm_cfft_instance_q31 * S, - q31_t * pSrc, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - uint32_t fftLen = S->fftLen; - - if (ifftFlag == 1U) { - - switch (fftLen) { - case 16: - case 64: - case 256: - case 1024: - case 4096: - _arm_radix4_butterfly_inverse_q31_mve(S, pSrc, fftLen); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_inverse_q31_mve(S, pSrc, fftLen); - break; - } - } else { - switch (fftLen) { - case 16: - case 64: - case 256: - case 1024: - case 4096: - _arm_radix4_butterfly_q31_mve(S, pSrc, fftLen); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_q31_mve(S, pSrc, fftLen); - break; - } - } - - - if (bitReverseFlag) - { - - arm_bitreversal_32_inpl_mve((uint32_t*)pSrc, S->bitRevLength, S->pBitRevTable); - - } -} -#else - -extern void arm_radix4_butterfly_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef, - uint32_t twidCoefModifier); - -extern void arm_radix4_butterfly_inverse_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef, - uint32_t twidCoefModifier); - -extern void arm_bitreversal_32( - uint32_t * pSrc, - const uint16_t bitRevLen, - const uint16_t * pBitRevTable); - -void arm_cfft_radix4by2_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef); - -void arm_cfft_radix4by2_inverse_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef); - - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for the Q31 complex FFT. - @param[in] S points to an instance of the fixed-point CFFT structure - @param[in,out] p1 points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return none - */ -void arm_cfft_q31( - const arm_cfft_instance_q31 * S, - q31_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - uint32_t L = S->fftLen; - - if (ifftFlag == 1U) - { - switch (L) - { - case 16: - case 64: - case 256: - case 1024: - case 4096: - arm_radix4_butterfly_inverse_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 ); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_inverse_q31 ( p1, L, S->pTwiddle ); - break; - } - } - else - { - switch (L) - { - case 16: - case 64: - case 256: - case 1024: - case 4096: - arm_radix4_butterfly_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 ); - break; - - case 32: - case 128: - case 512: - case 2048: - arm_cfft_radix4by2_q31 ( p1, L, S->pTwiddle ); - break; - } - } - - if ( bitReverseFlag ) - arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable); -} - -/** - @} end of ComplexFFT group - */ - -void arm_cfft_radix4by2_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef) -{ - uint32_t i, l; - uint32_t n2; - q31_t xt, yt, cosVal, sinVal; - q31_t p0, p1; - - n2 = fftLen >> 1U; - for (i = 0; i < n2; i++) - { - cosVal = pCoef[2 * i]; - sinVal = pCoef[2 * i + 1]; - - l = i + n2; - - xt = (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U); - pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U); - - yt = (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U); - pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U); - - mult_32x32_keep32_R(p0, xt, cosVal); - mult_32x32_keep32_R(p1, yt, cosVal); - multAcc_32x32_keep32_R(p0, yt, sinVal); - multSub_32x32_keep32_R(p1, xt, sinVal); - - pSrc[2 * l] = p0 << 1; - pSrc[2 * l + 1] = p1 << 1; - } - - - /* first col */ - arm_radix4_butterfly_q31 (pSrc, n2, (q31_t*)pCoef, 2U); - - /* second col */ - arm_radix4_butterfly_q31 (pSrc + fftLen, n2, (q31_t*)pCoef, 2U); - - n2 = fftLen >> 1U; - for (i = 0; i < n2; i++) - { - p0 = pSrc[4 * i + 0]; - p1 = pSrc[4 * i + 1]; - xt = pSrc[4 * i + 2]; - yt = pSrc[4 * i + 3]; - - p0 <<= 1U; - p1 <<= 1U; - xt <<= 1U; - yt <<= 1U; - - pSrc[4 * i + 0] = p0; - pSrc[4 * i + 1] = p1; - pSrc[4 * i + 2] = xt; - pSrc[4 * i + 3] = yt; - } - -} - -void arm_cfft_radix4by2_inverse_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef) -{ - uint32_t i, l; - uint32_t n2; - q31_t xt, yt, cosVal, sinVal; - q31_t p0, p1; - - n2 = fftLen >> 1U; - for (i = 0; i < n2; i++) - { - cosVal = pCoef[2 * i]; - sinVal = pCoef[2 * i + 1]; - - l = i + n2; - - xt = (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U); - pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U); - - yt = (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U); - pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U); - - mult_32x32_keep32_R(p0, xt, cosVal); - mult_32x32_keep32_R(p1, yt, cosVal); - multSub_32x32_keep32_R(p0, yt, sinVal); - multAcc_32x32_keep32_R(p1, xt, sinVal); - - pSrc[2 * l] = p0 << 1U; - pSrc[2 * l + 1] = p1 << 1U; - } - - /* first col */ - arm_radix4_butterfly_inverse_q31( pSrc, n2, (q31_t*)pCoef, 2U); - - /* second col */ - arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U); - - n2 = fftLen >> 1U; - for (i = 0; i < n2; i++) - { - p0 = pSrc[4 * i + 0]; - p1 = pSrc[4 * i + 1]; - xt = pSrc[4 * i + 2]; - yt = pSrc[4 * i + 3]; - - p0 <<= 1U; - p1 <<= 1U; - xt <<= 1U; - yt <<= 1U; - - pSrc[4 * i + 0] = p0; - pSrc[4 * i + 1] = p1; - pSrc[4 * i + 2] = xt; - pSrc[4 * i + 3] = yt; - } -} -#endif /* defined(ARM_MATH_MVEI) */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f16.c deleted file mode 100644 index 8a3ae5a..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f16.c +++ /dev/null @@ -1,475 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix2_f16.c - * Description: Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -void arm_radix2_butterfly_f16( - float16_t * pSrc, - uint32_t fftLen, - const float16_t * pCoef, - uint16_t twidCoefModifier); - -void arm_radix2_butterfly_inverse_f16( - float16_t * pSrc, - uint32_t fftLen, - const float16_t * pCoef, - uint16_t twidCoefModifier, - float16_t onebyfftLen); - -extern void arm_bitreversal_f16( - float16_t * pSrc, - uint16_t fftSize, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab); - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Radix-2 CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f16 and will be removed in the future - @param[in] S points to an instance of the floating-point Radix-2 CFFT/CIFFT structure - @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @return none - */ - -void arm_cfft_radix2_f16( -const arm_cfft_radix2_instance_f16 * S, - float16_t * pSrc) -{ - - if (S->ifftFlag == 1U) - { - /* Complex IFFT radix-2 */ - arm_radix2_butterfly_inverse_f16(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier, S->onebyfftLen); - } - else - { - /* Complex FFT radix-2 */ - arm_radix2_butterfly_f16(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier); - } - - if (S->bitReverseFlag == 1U) - { - /* Bit Reversal */ - arm_bitreversal_f16(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); - } - -} - - -/** - @} end of ComplexFFT group - */ - - - -/* ---------------------------------------------------------------------- -** Internal helper function used by the FFTs -** ------------------------------------------------------------------- */ - -/* -* @brief Core function for the floating-point CFFT butterfly process. -* @param[in, out] *pSrc points to the in-place buffer of floating-point data type. -* @param[in] fftLen length of the FFT. -* @param[in] *pCoef points to the twiddle coefficient buffer. -* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. -* @return none. -*/ - -void arm_radix2_butterfly_f16( -float16_t * pSrc, -uint32_t fftLen, -const float16_t * pCoef, -uint16_t twidCoefModifier) -{ - - uint32_t i, j, k, l; - uint32_t n1, n2, ia; - float16_t xt, yt, cosVal, sinVal; - float16_t p0, p1, p2, p3; - float16_t a0, a1; - -#if defined (ARM_MATH_DSP) - - /* Initializations for the first stage */ - n2 = fftLen >> 1; - ia = 0; - i = 0; - - // loop for groups - for (k = n2; k > 0; k--) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - - /* Twiddle coefficients index modifier */ - ia += twidCoefModifier; - - /* index calculation for the input as, */ - /* pSrc[i + 0], pSrc[i + fftLen/1] */ - l = i + n2; - - /* Butterfly implementation */ - a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l]; - xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l]; - - yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1]; - a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1]; - - p0 = (_Float16)xt * (_Float16)cosVal; - p1 = (_Float16)yt * (_Float16)sinVal; - p2 = (_Float16)yt * (_Float16)cosVal; - p3 = (_Float16)xt * (_Float16)sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = (_Float16)p0 + (_Float16)p1; - pSrc[2 * l + 1] = (_Float16)p2 - (_Float16)p3; - - i++; - } // groups loop end - - twidCoefModifier <<= 1U; - - // loop for stage - for (k = n2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - j = 0; - do - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia += twidCoefModifier; - - // loop for butterfly - i = j; - do - { - l = i + n2; - a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l]; - xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l]; - - yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1]; - a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1]; - - p0 = (_Float16)xt * (_Float16)cosVal; - p1 = (_Float16)yt * (_Float16)sinVal; - p2 = (_Float16)yt * (_Float16)cosVal; - p3 = (_Float16)xt * (_Float16)sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = (_Float16)p0 + (_Float16)p1; - pSrc[2 * l + 1] = (_Float16)p2 - (_Float16)p3; - - i += n1; - } while ( i < fftLen ); // butterfly loop end - j++; - } while ( j < n2); // groups loop end - twidCoefModifier <<= 1U; - } // stages loop end - - // loop for butterfly - for (i = 0; i < fftLen; i += 2) - { - a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * i + 2]; - xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * i + 2]; - - yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * i + 3]; - a1 = (_Float16)pSrc[2 * i + 3] + (_Float16)pSrc[2 * i + 1]; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - pSrc[2 * i + 2] = xt; - pSrc[2 * i + 3] = yt; - } // groups loop end - -#else - - n2 = fftLen; - - // loop for stage - for (k = fftLen; k > 1; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - j = 0; - do - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia += twidCoefModifier; - - // loop for butterfly - i = j; - do - { - l = i + n2; - a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l]; - xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l]; - - yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1]; - a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1]; - - p0 = (_Float16)xt * (_Float16)cosVal; - p1 = (_Float16)yt * (_Float16)sinVal; - p2 = (_Float16)yt * (_Float16)cosVal; - p3 = (_Float16)xt * (_Float16)sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = (_Float16)p0 + (_Float16)p1; - pSrc[2 * l + 1] = (_Float16)p2 - (_Float16)p3; - - i += n1; - } while (i < fftLen); - j++; - } while (j < n2); - twidCoefModifier <<= 1U; - } - -#endif // #if defined (ARM_MATH_DSP) - -} - - -void arm_radix2_butterfly_inverse_f16( -float16_t * pSrc, -uint32_t fftLen, -const float16_t * pCoef, -uint16_t twidCoefModifier, -float16_t onebyfftLen) -{ - - uint32_t i, j, k, l; - uint32_t n1, n2, ia; - float16_t xt, yt, cosVal, sinVal; - float16_t p0, p1, p2, p3; - float16_t a0, a1; - -#if defined (ARM_MATH_DSP) - - n2 = fftLen >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia += twidCoefModifier; - - l = i + n2; - a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l]; - xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l]; - - yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1]; - a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1]; - - p0 = (_Float16)xt * (_Float16)cosVal; - p1 = (_Float16)yt * (_Float16)sinVal; - p2 = (_Float16)yt * (_Float16)cosVal; - p3 = (_Float16)xt * (_Float16)sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = (_Float16)p0 - (_Float16)p1; - pSrc[2 * l + 1] = (_Float16)p2 + (_Float16)p3; - } // groups loop end - - twidCoefModifier <<= 1U; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - j = 0; - do - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia += twidCoefModifier; - - // loop for butterfly - i = j; - do - { - l = i + n2; - a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l]; - xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l]; - - yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1]; - a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1]; - - p0 = (_Float16)xt * (_Float16)cosVal; - p1 = (_Float16)yt * (_Float16)sinVal; - p2 = (_Float16)yt * (_Float16)cosVal; - p3 = (_Float16)xt * (_Float16)sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = (_Float16)p0 - (_Float16)p1; - pSrc[2 * l + 1] = (_Float16)p2 + (_Float16)p3; - - i += n1; - } while ( i < fftLen ); // butterfly loop end - j++; - } while (j < n2); // groups loop end - - twidCoefModifier <<= 1U; - } // stages loop end - - // loop for butterfly - for (i = 0; i < fftLen; i += 2) - { - a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * i + 2]; - xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * i + 2]; - - a1 = (_Float16)pSrc[2 * i + 3] + (_Float16)pSrc[2 * i + 1]; - yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * i + 3]; - - p0 = (_Float16)a0 * (_Float16)onebyfftLen; - p2 = (_Float16)xt * (_Float16)onebyfftLen; - p1 = (_Float16)a1 * (_Float16)onebyfftLen; - p3 = (_Float16)yt * (_Float16)onebyfftLen; - - pSrc[2 * i] = p0; - pSrc[2 * i + 1] = p1; - pSrc[2 * i + 2] = p2; - pSrc[2 * i + 3] = p3; - } // butterfly loop end - -#else - - n2 = fftLen; - - // loop for stage - for (k = fftLen; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - j = 0; - do - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - i = j; - do - { - l = i + n2; - a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l]; - xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l]; - - yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1]; - a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1]; - - p0 = (_Float16)xt * (_Float16)cosVal; - p1 = (_Float16)yt * (_Float16)sinVal; - p2 = (_Float16)yt * (_Float16)cosVal; - p3 = (_Float16)xt * (_Float16)sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = (_Float16)p0 - (_Float16)p1; - pSrc[2 * l + 1] = (_Float16)p2 + (_Float16)p3; - - i += n1; - } while ( i < fftLen ); // butterfly loop end - j++; - } while ( j < n2 ); // groups loop end - - twidCoefModifier = twidCoefModifier << 1U; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - - a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l]; - xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l]; - - a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1]; - yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1]; - - p0 = (_Float16)a0 * (_Float16)onebyfftLen; - p2 = (_Float16)xt * (_Float16)onebyfftLen; - p1 = (_Float16)a1 * (_Float16)onebyfftLen; - p3 = (_Float16)yt * (_Float16)onebyfftLen; - - pSrc[2 * i] = p0; - pSrc[2U * l] = p2; - - pSrc[2 * i + 1] = p1; - pSrc[2U * l + 1U] = p3; - } // butterfly loop end - -#endif // #if defined (ARM_MATH_DSP) - -} - - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c deleted file mode 100644 index d11bc12..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c +++ /dev/null @@ -1,470 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix2_f32.c - * Description: Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -void arm_radix2_butterfly_f32( - float32_t * pSrc, - uint32_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier); - -void arm_radix2_butterfly_inverse_f32( - float32_t * pSrc, - uint32_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier, - float32_t onebyfftLen); - -extern void arm_bitreversal_f32( - float32_t * pSrc, - uint16_t fftSize, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab); - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Radix-2 CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future - @param[in] S points to an instance of the floating-point Radix-2 CFFT/CIFFT structure - @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @return none - */ - -void arm_cfft_radix2_f32( -const arm_cfft_radix2_instance_f32 * S, - float32_t * pSrc) -{ - - if (S->ifftFlag == 1U) - { - /* Complex IFFT radix-2 */ - arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier, S->onebyfftLen); - } - else - { - /* Complex FFT radix-2 */ - arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, - S->twidCoefModifier); - } - - if (S->bitReverseFlag == 1U) - { - /* Bit Reversal */ - arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); - } - -} - - -/** - @} end of ComplexFFT group - */ - - - -/* ---------------------------------------------------------------------- - ** Internal helper function used by the FFTs - ** ------------------------------------------------------------------- */ - -/** - brief Core function for the floating-point CFFT butterfly process. - param[in,out] pSrc points to in-place buffer of floating-point data type - param[in] fftLen length of the FFT - param[in] pCoef points to twiddle coefficient buffer - param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table - return none - */ - -void arm_radix2_butterfly_f32( - float32_t * pSrc, - uint32_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier) -{ - - uint32_t i, j, k, l; - uint32_t n1, n2, ia; - float32_t xt, yt, cosVal, sinVal; - float32_t p0, p1, p2, p3; - float32_t a0, a1; - -#if defined (ARM_MATH_DSP) - - /* Initializations for the first stage */ - n2 = fftLen >> 1; - ia = 0; - i = 0; - - // loop for groups - for (k = n2; k > 0; k--) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - - /* Twiddle coefficients index modifier */ - ia += twidCoefModifier; - - /* index calculation for the input as, */ - /* pSrc[i + 0], pSrc[i + fftLen/1] */ - l = i + n2; - - /* Butterfly implementation */ - a0 = pSrc[2 * i] + pSrc[2 * l]; - xt = pSrc[2 * i] - pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - p0 = xt * cosVal; - p1 = yt * sinVal; - p2 = yt * cosVal; - p3 = xt * sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = p0 + p1; - pSrc[2 * l + 1] = p2 - p3; - - i++; - } // groups loop end - - twidCoefModifier <<= 1U; - - // loop for stage - for (k = n2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - j = 0; - do - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia += twidCoefModifier; - - // loop for butterfly - i = j; - do - { - l = i + n2; - a0 = pSrc[2 * i] + pSrc[2 * l]; - xt = pSrc[2 * i] - pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - p0 = xt * cosVal; - p1 = yt * sinVal; - p2 = yt * cosVal; - p3 = xt * sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = p0 + p1; - pSrc[2 * l + 1] = p2 - p3; - - i += n1; - } while ( i < fftLen ); // butterfly loop end - j++; - } while ( j < n2); // groups loop end - twidCoefModifier <<= 1U; - } // stages loop end - - // loop for butterfly - for (i = 0; i < fftLen; i += 2) - { - a0 = pSrc[2 * i] + pSrc[2 * i + 2]; - xt = pSrc[2 * i] - pSrc[2 * i + 2]; - - yt = pSrc[2 * i + 1] - pSrc[2 * i + 3]; - a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1]; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - pSrc[2 * i + 2] = xt; - pSrc[2 * i + 3] = yt; - } // groups loop end - -#else /* #if defined (ARM_MATH_DSP) */ - - n2 = fftLen; - - // loop for stage - for (k = fftLen; k > 1; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - j = 0; - do - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia += twidCoefModifier; - - // loop for butterfly - i = j; - do - { - l = i + n2; - a0 = pSrc[2 * i] + pSrc[2 * l]; - xt = pSrc[2 * i] - pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - p0 = xt * cosVal; - p1 = yt * sinVal; - p2 = yt * cosVal; - p3 = xt * sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = p0 + p1; - pSrc[2 * l + 1] = p2 - p3; - - i += n1; - } while (i < fftLen); - j++; - } while (j < n2); - twidCoefModifier <<= 1U; - } - -#endif /* #if defined (ARM_MATH_DSP) */ - -} - - -void arm_radix2_butterfly_inverse_f32( - float32_t * pSrc, - uint32_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier, - float32_t onebyfftLen) -{ - - uint32_t i, j, k, l; - uint32_t n1, n2, ia; - float32_t xt, yt, cosVal, sinVal; - float32_t p0, p1, p2, p3; - float32_t a0, a1; - -#if defined (ARM_MATH_DSP) - - n2 = fftLen >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia += twidCoefModifier; - - l = i + n2; - a0 = pSrc[2 * i] + pSrc[2 * l]; - xt = pSrc[2 * i] - pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - p0 = xt * cosVal; - p1 = yt * sinVal; - p2 = yt * cosVal; - p3 = xt * sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = p0 - p1; - pSrc[2 * l + 1] = p2 + p3; - } // groups loop end - - twidCoefModifier <<= 1U; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - j = 0; - do - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia += twidCoefModifier; - - // loop for butterfly - i = j; - do - { - l = i + n2; - a0 = pSrc[2 * i] + pSrc[2 * l]; - xt = pSrc[2 * i] - pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - p0 = xt * cosVal; - p1 = yt * sinVal; - p2 = yt * cosVal; - p3 = xt * sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = p0 - p1; - pSrc[2 * l + 1] = p2 + p3; - - i += n1; - } while ( i < fftLen ); // butterfly loop end - j++; - } while (j < n2); // groups loop end - - twidCoefModifier <<= 1U; - } // stages loop end - - // loop for butterfly - for (i = 0; i < fftLen; i += 2) - { - a0 = pSrc[2 * i] + pSrc[2 * i + 2]; - xt = pSrc[2 * i] - pSrc[2 * i + 2]; - - a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1]; - yt = pSrc[2 * i + 1] - pSrc[2 * i + 3]; - - p0 = a0 * onebyfftLen; - p2 = xt * onebyfftLen; - p1 = a1 * onebyfftLen; - p3 = yt * onebyfftLen; - - pSrc[2 * i] = p0; - pSrc[2 * i + 1] = p1; - pSrc[2 * i + 2] = p2; - pSrc[2 * i + 3] = p3; - } // butterfly loop end - -#else /* #if defined (ARM_MATH_DSP) */ - - n2 = fftLen; - - // loop for stage - for (k = fftLen; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - j = 0; - do - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - i = j; - do - { - l = i + n2; - a0 = pSrc[2 * i] + pSrc[2 * l]; - xt = pSrc[2 * i] - pSrc[2 * l]; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - - p0 = xt * cosVal; - p1 = yt * sinVal; - p2 = yt * cosVal; - p3 = xt * sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = p0 - p1; - pSrc[2 * l + 1] = p2 + p3; - - i += n1; - } while ( i < fftLen ); // butterfly loop end - j++; - } while ( j < n2 ); // groups loop end - - twidCoefModifier = twidCoefModifier << 1U; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - - a0 = pSrc[2 * i] + pSrc[2 * l]; - xt = pSrc[2 * i] - pSrc[2 * l]; - - a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1]; - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - - p0 = a0 * onebyfftLen; - p2 = xt * onebyfftLen; - p1 = a1 * onebyfftLen; - p3 = yt * onebyfftLen; - - pSrc[2 * i] = p0; - pSrc[2 * l] = p2; - - pSrc[2 * i + 1] = p1; - pSrc[2 * l + 1] = p3; - } // butterfly loop end - -#endif /* #if defined (ARM_MATH_DSP) */ - -} diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f16.c deleted file mode 100644 index 1166058..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f16.c +++ /dev/null @@ -1,214 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix2_init_f16.c - * Description: Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions_f16.h" -#include "arm_common_tables.h" -#include "arm_common_tables_f16.h" - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the floating-point CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f16 and will be removed in the future. - @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure - @param[in] fftLen length of the FFT - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Details - The parameter ifftFlag controls whether a forward or inverse transform is computed. - Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ - -#if defined(ARM_FLOAT16_SUPPORTED) - -arm_status arm_cfft_radix2_init_f16( - arm_cfft_radix2_instance_f16 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096) - - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (float16_t *) twiddleCoefF16_4096; - - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024) - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLen) - { - - case 4096U: - /* Initializations of structure parameters for 4096 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.000244140625; - break; - - case 2048U: - /* Initializations of structure parameters for 2048 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 2U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 2U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[1]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.00048828125; - break; - - case 1024U: - /* Initializations of structure parameters for 1024 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 4U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 4U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.0009765625f; - break; - - case 512U: - /* Initializations of structure parameters for 512 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 8U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 8U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[7]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.001953125; - break; - - case 256U: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16U; - S->bitRevFactor = 16U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - S->onebyfftLen = 0.00390625f; - break; - - case 128U: - /* Initializations of structure parameters for 128 point FFT */ - S->twidCoefModifier = 32U; - S->bitRevFactor = 32U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[31]; - S->onebyfftLen = 0.0078125; - break; - - case 64U: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64U; - S->bitRevFactor = 64U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - S->onebyfftLen = 0.015625f; - break; - - case 32U: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 128U; - S->bitRevFactor = 128U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[127]; - S->onebyfftLen = 0.03125; - break; - - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256U; - S->bitRevFactor = 256U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - S->onebyfftLen = 0.0625f; - break; - - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - -#endif -#endif -#endif - return (status); -} - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c deleted file mode 100644 index 7e792a9..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c +++ /dev/null @@ -1,209 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix2_init_f32.c - * Description: Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the floating-point CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future. - @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure - @param[in] fftLen length of the FFT - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Details - The parameter ifftFlag controls whether a forward or inverse transform is computed. - Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ - -arm_status arm_cfft_radix2_init_f32( - arm_cfft_radix2_instance_f32 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (float32_t *) twiddleCoef; - - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLen) - { - - case 4096U: - /* Initializations of structure parameters for 4096 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.000244140625; - break; - - case 2048U: - /* Initializations of structure parameters for 2048 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 2U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 2U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[1]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.00048828125; - break; - - case 1024U: - /* Initializations of structure parameters for 1024 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 4U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 4U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.0009765625f; - break; - - case 512U: - /* Initializations of structure parameters for 512 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 8U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 8U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[7]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.001953125; - break; - - case 256U: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16U; - S->bitRevFactor = 16U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - S->onebyfftLen = 0.00390625f; - break; - - case 128U: - /* Initializations of structure parameters for 128 point FFT */ - S->twidCoefModifier = 32U; - S->bitRevFactor = 32U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[31]; - S->onebyfftLen = 0.0078125; - break; - - case 64U: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64U; - S->bitRevFactor = 64U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - S->onebyfftLen = 0.015625f; - break; - - case 32U: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 128U; - S->bitRevFactor = 128U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[127]; - S->onebyfftLen = 0.03125; - break; - - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256U; - S->bitRevFactor = 256U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - S->onebyfftLen = 0.0625f; - break; - - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - -#endif -#endif -#endif - return (status); -} - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c deleted file mode 100644 index e891c6d..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c +++ /dev/null @@ -1,194 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix2_init_q15.c - * Description: Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the Q15 CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed - @param[in,out] S points to an instance of the Q15 CFFT/CIFFT structure. - @param[in] fftLen length of the FFT. - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Details - The parameter ifftFlag controls whether a forward or inverse transform is computed. - Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ - -arm_status arm_cfft_radix2_init_q15( - arm_cfft_radix2_instance_q15 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (q15_t *) twiddleCoef_4096_q15; - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024) - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLen) - { - case 4096U: - /* Initializations of structure parameters for 4096 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - - break; - - case 2048U: - /* Initializations of structure parameters for 2048 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 2U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 2U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[1]; - - break; - - case 1024U: - /* Initializations of structure parameters for 1024 point FFT */ - S->twidCoefModifier = 4U; - S->bitRevFactor = 4U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - - break; - - case 512U: - /* Initializations of structure parameters for 512 point FFT */ - S->twidCoefModifier = 8U; - S->bitRevFactor = 8U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[7]; - - break; - - case 256U: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16U; - S->bitRevFactor = 16U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - - break; - - case 128U: - /* Initializations of structure parameters for 128 point FFT */ - S->twidCoefModifier = 32U; - S->bitRevFactor = 32U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[31]; - - break; - - case 64U: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64U; - S->bitRevFactor = 64U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - - break; - - case 32U: - /* Initializations of structure parameters for 32 point FFT */ - S->twidCoefModifier = 128U; - S->bitRevFactor = 128U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[127]; - - break; - - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256U; - S->bitRevFactor = 256U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - - break; - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - -#endif -#endif -#endif - return (status); -} - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c deleted file mode 100644 index be8e56b..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c +++ /dev/null @@ -1,191 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix2_init_q31.c - * Description: Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the Q31 CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future. - @param[in,out] S points to an instance of the Q31 CFFT/CIFFT structure - @param[in] fftLen length of the FFT - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Details - The parameter ifftFlag controls whether a forward or inverse transform is computed. - Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ - -arm_status arm_cfft_radix2_init_q31( - arm_cfft_radix2_instance_q31 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (q31_t *) twiddleCoef_4096_q31; - - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024) - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) - { - /* Initializations of structure parameters for 4096 point FFT */ - case 4096U: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - break; - - /* Initializations of structure parameters for 2048 point FFT */ - case 2048U: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 2U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 2U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[1]; - break; - - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 4U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 4U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - break; - - /* Initializations of structure parameters for 512 point FFT */ - case 512U: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 8U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 8U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[7]; - break; - - case 256U: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16U; - S->bitRevFactor = 16U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - break; - - case 128U: - /* Initializations of structure parameters for 128 point FFT */ - S->twidCoefModifier = 32U; - S->bitRevFactor = 32U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[31]; - break; - - case 64U: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64U; - S->bitRevFactor = 64U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - break; - - case 32U: - /* Initializations of structure parameters for 32 point FFT */ - S->twidCoefModifier = 128U; - S->bitRevFactor = 128U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[127]; - break; - - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256U; - S->bitRevFactor = 256U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - break; - - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - -#endif -#endif -#endif - return (status); -} - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c deleted file mode 100644 index 7e121d3..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c +++ /dev/null @@ -1,689 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix2_q15.c - * Description: Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -void arm_radix2_butterfly_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pCoef, - uint16_t twidCoefModifier); - -void arm_radix2_butterfly_inverse_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pCoef, - uint16_t twidCoefModifier); - -void arm_bitreversal_q15( - q15_t * pSrc, - uint32_t fftLen, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab); - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for the fixed-point CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future. - @param[in] S points to an instance of the fixed-point CFFT/CIFFT structure - @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @return none - */ - -void arm_cfft_radix2_q15( - const arm_cfft_radix2_instance_q15 * S, - q15_t * pSrc) -{ - - if (S->ifftFlag == 1U) - { - arm_radix2_butterfly_inverse_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); - } - else - { - arm_radix2_butterfly_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); - } - - arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); -} - -/** - @} end of ComplexFFT group - */ - -void arm_radix2_butterfly_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pCoef, - uint16_t twidCoefModifier) -{ -#if defined (ARM_MATH_DSP) - - uint32_t i, j, k, l; - uint32_t n1, n2, ia; - q15_t in; - q31_t T, S, R; - q31_t coeff, out1, out2; - - //N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); - - ia = ia + twidCoefModifier; - - l = i + n2; - - T = read_q15x2 (pSrc + (2 * i)); - in = ((int16_t) (T & 0xFFFF)) >> 1; - T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF); - - S = read_q15x2 (pSrc + (2 * l)); - in = ((int16_t) (S & 0xFFFF)) >> 1; - S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUAD(coeff, R) >> 16; - out2 = __SMUSDX(coeff, R); -#else - out1 = __SMUSDX(R, coeff) >> 16U; - out2 = __SMUAD(coeff, R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); - - coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); - - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - i++; - l++; - - T = read_q15x2 (pSrc + (2 * i)); - in = ((int16_t) (T & 0xFFFF)) >> 1; - T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF); - - S = read_q15x2 (pSrc + (2 * l)); - in = ((int16_t) (S & 0xFFFF)) >> 1; - S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUAD(coeff, R) >> 16; - out2 = __SMUSDX(coeff, R); -#else - - out1 = __SMUSDX(R, coeff) >> 16U; - out2 = __SMUAD(coeff, R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); - - } /* groups loop end */ - - twidCoefModifier = twidCoefModifier << 1U; - - /* loop for stage */ - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - /* loop for groups */ - for (j = 0; j < n2; j++) - { - coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); - - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - - T = read_q15x2 (pSrc + (2 * i)); - - S = read_q15x2 (pSrc + (2 * l)); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUAD(coeff, R) >> 16; - out2 = __SMUSDX(coeff, R); -#else - out1 = __SMUSDX(R, coeff) >> 16U; - out2 = __SMUAD(coeff, R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); - - i += n1; - - l = i + n2; - - T = read_q15x2 (pSrc + (2 * i)); - - S = read_q15x2 (pSrc + (2 * l)); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUAD(coeff, R) >> 16; - out2 = __SMUSDX(coeff, R); -#else - out1 = __SMUSDX(R, coeff) >> 16U; - out2 = __SMUAD(coeff, R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); - - } /* butterfly loop end */ - - } /* groups loop end */ - - twidCoefModifier = twidCoefModifier << 1U; - } /* stages loop end */ - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); - - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - - T = read_q15x2 (pSrc + (2 * i)); - - S = read_q15x2 (pSrc + (2 * l)); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __QADD16(T, S)); - - write_q15x2 (pSrc + (2 * l), R); - - i += n1; - l = i + n2; - - T = read_q15x2 (pSrc + (2 * i)); - - S = read_q15x2 (pSrc + (2 * l)); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __QADD16(T, S)); - - write_q15x2 (pSrc + (2 * l), R); - - } /* groups loop end */ - - -#else /* #if defined (ARM_MATH_DSP) */ - - uint32_t i, j, k, l; - uint32_t n1, n2, ia; - q15_t xt, yt, cosVal, sinVal; - - - // N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - /* loop for groups */ - for (j = 0; j < n2; j++) - { - cosVal = pCoef[(ia * 2)]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); - pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; - - yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); - pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + - (pSrc[2 * i + 1] >> 1U) ) >> 1U; - - pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) + - ((int16_t) (((q31_t) yt * sinVal) >> 16))); - - pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) - - ((int16_t) (((q31_t) xt * sinVal) >> 16))); - - } /* butterfly loop end */ - - } /* groups loop end */ - - twidCoefModifier = twidCoefModifier << 1U; - - /* loop for stage */ - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - /* loop for groups */ - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; - - pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) + - ((int16_t) (((q31_t) yt * sinVal) >> 16))); - - pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) - - ((int16_t) (((q31_t) xt * sinVal) >> 16))); - - } /* butterfly loop end */ - - } /* groups loop end */ - - twidCoefModifier = twidCoefModifier << 1U; - } /* stages loop end */ - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - /* loop for groups */ - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2 * l] = xt; - - pSrc[2 * l + 1] = yt; - - } /* butterfly loop end */ - - } /* groups loop end */ - - twidCoefModifier = twidCoefModifier << 1U; - -#endif /* #if defined (ARM_MATH_DSP) */ - -} - - -void arm_radix2_butterfly_inverse_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pCoef, - uint16_t twidCoefModifier) -{ -#if defined (ARM_MATH_DSP) - - uint32_t i, j, k, l; - uint32_t n1, n2, ia; - q15_t in; - q31_t T, S, R; - q31_t coeff, out1, out2; - - // N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - /* loop for groups */ - for (i = 0; i < n2; i++) - { - coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); - - ia = ia + twidCoefModifier; - - l = i + n2; - - T = read_q15x2 (pSrc + (2 * i)); - in = ((int16_t) (T & 0xFFFF)) >> 1; - T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF); - - S = read_q15x2 (pSrc + (2 * l)); - in = ((int16_t) (S & 0xFFFF)) >> 1; - S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUSD(coeff, R) >> 16; - out2 = __SMUADX(coeff, R); -#else - out1 = __SMUADX(R, coeff) >> 16U; - out2 = __SMUSD(__QSUB(0, coeff), R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); - - coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); - - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - i++; - l++; - - T = read_q15x2 (pSrc + (2 * i)); - in = ((int16_t) (T & 0xFFFF)) >> 1; - T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF); - - S = read_q15x2 (pSrc + (2 * l)); - in = ((int16_t) (S & 0xFFFF)) >> 1; - S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUSD(coeff, R) >> 16; - out2 = __SMUADX(coeff, R); -#else - out1 = __SMUADX(R, coeff) >> 16U; - out2 = __SMUSD(__QSUB(0, coeff), R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); - - } /* groups loop end */ - - twidCoefModifier = twidCoefModifier << 1U; - - /* loop for stage */ - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - /* loop for groups */ - for (j = 0; j < n2; j++) - { - coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); - - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - - T = read_q15x2 (pSrc + (2 * i)); - - S = read_q15x2 (pSrc + (2 * l)); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUSD(coeff, R) >> 16; - out2 = __SMUADX(coeff, R); -#else - out1 = __SMUADX(R, coeff) >> 16U; - out2 = __SMUSD(__QSUB(0, coeff), R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); - - i += n1; - - l = i + n2; - - T = read_q15x2 (pSrc + (2 * i)); - - S = read_q15x2 (pSrc + (2 * l)); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __SHADD16(T, S)); - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUSD(coeff, R) >> 16; - out2 = __SMUADX(coeff, R); -#else - out1 = __SMUADX(R, coeff) >> 16U; - out2 = __SMUSD(__QSUB(0, coeff), R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF)); - - } /* butterfly loop end */ - - } /* groups loop end */ - - twidCoefModifier = twidCoefModifier << 1U; - } /* stages loop end */ - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - /* loop for groups */ - for (j = 0; j < n2; j++) - { - coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U)); - - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - - T = read_q15x2 (pSrc + (2 * i)); - - S = read_q15x2 (pSrc + (2 * l)); - - R = __QSUB16(T, S); - - write_q15x2 (pSrc + (2 * i), __QADD16(T, S)); - - write_q15x2 (pSrc + (2 * l), R); - - } /* butterfly loop end */ - - } /* groups loop end */ - - twidCoefModifier = twidCoefModifier << 1U; - -#else /* #if defined (ARM_MATH_DSP) */ - - uint32_t i, j, k, l; - uint32_t n1, n2, ia; - q15_t xt, yt, cosVal, sinVal; - - // N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - /* loop for groups */ - for (j = 0; j < n2; j++) - { - cosVal = pCoef[(ia * 2)]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); - pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; - - yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); - pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + - (pSrc[2 * i + 1] >> 1U) ) >> 1U; - - pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) - - ((int16_t) (((q31_t) yt * sinVal) >> 16))); - - pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) + - ((int16_t) (((q31_t) xt * sinVal) >> 16))); - - } /* butterfly loop end */ - - } /* groups loop end */ - - twidCoefModifier = twidCoefModifier << 1U; - - /* loop for stage */ - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - /* loop for groups */ - for (j = 0; j < n2; j++) - { - cosVal = pCoef[(ia * 2)]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; - - pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) - - ((int16_t) (((q31_t) yt * sinVal) >> 16)) ); - - pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) + - ((int16_t) (((q31_t) xt * sinVal) >> 16)) ); - - } /* butterfly loop end */ - - } /* groups loop end */ - - twidCoefModifier = twidCoefModifier << 1U; - } /* stages loop end */ - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - cosVal = pCoef[(ia * 2)]; - sinVal = pCoef[(ia * 2) + 1]; - - ia = ia + twidCoefModifier; - - /* loop for butterfly */ - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2 * l] = xt; - - pSrc[2 * l + 1] = yt; - - } /* groups loop end */ - - -#endif /* #if defined (ARM_MATH_DSP) */ - -} diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c deleted file mode 100644 index 17fa59a..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c +++ /dev/null @@ -1,337 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix2_q31.c - * Description: Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -void arm_radix2_butterfly_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef, - uint16_t twidCoefModifier); - -void arm_radix2_butterfly_inverse_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef, - uint16_t twidCoefModifier); - -void arm_bitreversal_q31( - q31_t * pSrc, - uint32_t fftLen, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab); - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for the fixed-point CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future. - @param[in] S points to an instance of the fixed-point CFFT/CIFFT structure - @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @return none - */ - -void arm_cfft_radix2_q31( - const arm_cfft_radix2_instance_q31 * S, - q31_t * pSrc) -{ - - if (S->ifftFlag == 1U) - { - arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen, - S->pTwiddle, S->twidCoefModifier); - } - else - { - arm_radix2_butterfly_q31(pSrc, S->fftLen, - S->pTwiddle, S->twidCoefModifier); - } - - arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); -} - -/** - @} end of ComplexFFT group - */ - -void arm_radix2_butterfly_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef, - uint16_t twidCoefModifier) -{ - - unsigned i, j, k, l, m; - unsigned n1, n2, ia; - q31_t xt, yt, cosVal, sinVal; - q31_t p0, p1; - - //N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - l = i + n2; - xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); - pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; - - yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); - pSrc[2 * i + 1] = - ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; - - mult_32x32_keep32_R(p0, xt, cosVal); - mult_32x32_keep32_R(p1, yt, cosVal); - multAcc_32x32_keep32_R(p0, yt, sinVal); - multSub_32x32_keep32_R(p1, xt, sinVal); - - pSrc[2U * l] = p0; - pSrc[2U * l + 1U] = p1; - - } // groups loop end - - twidCoefModifier <<= 1U; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - i = j; - m = fftLen / n1; - do - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; - - mult_32x32_keep32_R(p0, xt, cosVal); - mult_32x32_keep32_R(p1, yt, cosVal); - multAcc_32x32_keep32_R(p0, yt, sinVal); - multSub_32x32_keep32_R(p1, xt, sinVal); - - pSrc[2U * l] = p0; - pSrc[2U * l + 1U] = p1; - i += n1; - m--; - } while ( m > 0); // butterfly loop end - - } // groups loop end - - twidCoefModifier <<= 1U; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2U * l] = xt; - - pSrc[2U * l + 1U] = yt; - - i += n1; - l = i + n2; - - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2U * l] = xt; - - pSrc[2U * l + 1U] = yt; - - } // butterfly loop end - -} - - -void arm_radix2_butterfly_inverse_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef, - uint16_t twidCoefModifier) -{ - - unsigned i, j, k, l; - unsigned n1, n2, ia; - q31_t xt, yt, cosVal, sinVal; - q31_t p0, p1; - - //N = fftLen; - n2 = fftLen; - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (i = 0; i < n2; i++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - l = i + n2; - xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); - pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; - - yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); - pSrc[2 * i + 1] = - ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; - - mult_32x32_keep32_R(p0, xt, cosVal); - mult_32x32_keep32_R(p1, yt, cosVal); - multSub_32x32_keep32_R(p0, yt, sinVal); - multAcc_32x32_keep32_R(p1, xt, sinVal); - - pSrc[2U * l] = p0; - pSrc[2U * l + 1U] = p1; - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1U; - - // loop for stage - for (k = fftLen / 2; k > 2; k = k >> 1) - { - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - // loop for groups - for (j = 0; j < n2; j++) - { - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = j; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U; - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U; - - mult_32x32_keep32_R(p0, xt, cosVal); - mult_32x32_keep32_R(p1, yt, cosVal); - multSub_32x32_keep32_R(p0, yt, sinVal); - multAcc_32x32_keep32_R(p1, xt, sinVal); - - pSrc[2U * l] = p0; - pSrc[2U * l + 1U] = p1; - } // butterfly loop end - - } // groups loop end - - twidCoefModifier = twidCoefModifier << 1U; - } // stages loop end - - n1 = n2; - n2 = n2 >> 1; - ia = 0; - - cosVal = pCoef[ia * 2]; - sinVal = pCoef[(ia * 2) + 1]; - ia = ia + twidCoefModifier; - - // loop for butterfly - for (i = 0; i < fftLen; i += n1) - { - l = i + n2; - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2U * l] = xt; - - pSrc[2U * l + 1U] = yt; - - i += n1; - l = i + n2; - - xt = pSrc[2 * i] - pSrc[2 * l]; - pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]); - - yt = pSrc[2 * i + 1] - pSrc[2 * l + 1]; - pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]); - - pSrc[2U * l] = xt; - - pSrc[2U * l + 1U] = yt; - - } // butterfly loop end - -} diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f16.c deleted file mode 100644 index 2ef96dd..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f16.c +++ /dev/null @@ -1,1272 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix4_f16.c - * Description: Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -extern void arm_bitreversal_f16( - float16_t * pSrc, - uint16_t fftSize, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab); - -void arm_radix4_butterfly_f16( - float16_t * pSrc, - uint16_t fftLen, - const float16_t * pCoef, - uint16_t twidCoefModifier); - -void arm_radix4_butterfly_inverse_f16( - float16_t * pSrc, - uint16_t fftLen, - const float16_t * pCoef, - uint16_t twidCoefModifier, - float16_t onebyfftLen); - - -void arm_cfft_radix4by2_f16( - float16_t * pSrc, - uint32_t fftLen, - const float16_t * pCoef); - - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/* -* @brief Core function for the floating-point CFFT butterfly process. -* @param[in, out] *pSrc points to the in-place buffer of floating-point data type. -* @param[in] fftLen length of the FFT. -* @param[in] *pCoef points to the twiddle coefficient buffer. -* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. -* @return none. -*/ - -void arm_cfft_radix4by2_f16( - float16_t * pSrc, - uint32_t fftLen, - const float16_t * pCoef) -{ - uint32_t i, l; - uint32_t n2, ia; - float16_t xt, yt, cosVal, sinVal; - float16_t p0, p1,p2,p3,a0,a1; - - n2 = fftLen >> 1; - ia = 0; - for (i = 0; i < n2; i++) - { - cosVal = pCoef[2*ia]; - sinVal = pCoef[2*ia + 1]; - ia++; - - l = i + n2; - - /* Butterfly implementation */ - a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l]; - xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l]; - - yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1]; - a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1]; - - p0 = (_Float16)xt * (_Float16)cosVal; - p1 = (_Float16)yt * (_Float16)sinVal; - p2 = (_Float16)yt * (_Float16)cosVal; - p3 = (_Float16)xt * (_Float16)sinVal; - - pSrc[2 * i] = a0; - pSrc[2 * i + 1] = a1; - - pSrc[2 * l] = (_Float16)p0 + (_Float16)p1; - pSrc[2 * l + 1] = (_Float16)p2 - (_Float16)p3; - - } - - // first col - arm_radix4_butterfly_f16( pSrc, n2, (float16_t*)pCoef, 2U); - // second col - arm_radix4_butterfly_f16( pSrc + fftLen, n2, (float16_t*)pCoef, 2U); - -} - - -/** - @brief Processing function for the floating-point Radix-4 CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f16 and will be removed in the future. - @param[in] S points to an instance of the floating-point Radix-4 CFFT/CIFFT structure - @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @return none - */ - -void arm_cfft_radix4_f16( - const arm_cfft_radix4_instance_f16 * S, - float16_t * pSrc) -{ - if (S->ifftFlag == 1U) - { - /* Complex IFFT radix-4 */ - arm_radix4_butterfly_inverse_f16(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier, S->onebyfftLen); - } - else - { - /* Complex FFT radix-4 */ - arm_radix4_butterfly_f16(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); - } - - if (S->bitReverseFlag == 1U) - { - /* Bit Reversal */ - arm_bitreversal_f16(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); - } - -} - -/** - @} end of ComplexFFT group - */ - -/* ---------------------------------------------------------------------- - * Internal helper function used by the FFTs - * ---------------------------------------------------------------------- */ - -/* -* @brief Core function for the floating-point CFFT butterfly process. -* @param[in, out] *pSrc points to the in-place buffer of floating-point data type. -* @param[in] fftLen length of the FFT. -* @param[in] *pCoef points to the twiddle coefficient buffer. -* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. -* @return none. -*/ - -void arm_radix4_butterfly_f16( -float16_t * pSrc, -uint16_t fftLen, -const float16_t * pCoef, -uint16_t twidCoefModifier) -{ - - float16_t co1, co2, co3, si1, si2, si3; - uint32_t ia1, ia2, ia3; - uint32_t i0, i1, i2, i3; - uint32_t n1, n2, j, k; - -#if defined (ARM_MATH_DSP) - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - float16_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn; - float16_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc, - Ybminusd; - float16_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out; - float16_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out; - float16_t *ptr1; - float16_t p0,p1,p2,p3,p4,p5; - float16_t a0,a1,a2,a3,a4,a5,a6,a7; - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2U; - i0 = 0U; - ia1 = 0U; - - j = n2; - - /* Calculation of first stage */ - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - xaIn = pSrc[(2U * i0)]; - yaIn = pSrc[(2U * i0) + 1U]; - - xbIn = pSrc[(2U * i1)]; - ybIn = pSrc[(2U * i1) + 1U]; - - xcIn = pSrc[(2U * i2)]; - ycIn = pSrc[(2U * i2) + 1U]; - - xdIn = pSrc[(2U * i3)]; - ydIn = pSrc[(2U * i3) + 1U]; - - /* xa + xc */ - Xaplusc = (_Float16)xaIn + (_Float16)xcIn; - /* xb + xd */ - Xbplusd = (_Float16)xbIn + (_Float16)xdIn; - /* ya + yc */ - Yaplusc = (_Float16)yaIn + (_Float16)ycIn; - /* yb + yd */ - Ybplusd = (_Float16)ybIn + (_Float16)ydIn; - - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - - /* xa - xc */ - Xaminusc = (_Float16)xaIn - (_Float16)xcIn; - /* xb - xd */ - Xbminusd = (_Float16)xbIn - (_Float16)xdIn; - /* ya - yc */ - Yaminusc = (_Float16)yaIn - (_Float16)ycIn; - /* yb - yd */ - Ybminusd = (_Float16)ybIn - (_Float16)ydIn; - - /* xa' = xa + xb + xc + xd */ - pSrc[(2U * i0)] = (_Float16)Xaplusc + (_Float16)Xbplusd; - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = (_Float16)Yaplusc + (_Float16)Ybplusd; - - /* (xa - xc) + (yb - yd) */ - Xb12C_out = ((_Float16)Xaminusc + (_Float16)Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yb12C_out = ((_Float16)Yaminusc - (_Float16)Xbminusd); - /* (xa + xc) - (xb + xd) */ - Xc12C_out = ((_Float16)Xaplusc - (_Float16)Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = ((_Float16)Yaplusc - (_Float16)Ybplusd); - /* (xa - xc) - (yb - yd) */ - Xd12C_out = ((_Float16)Xaminusc - (_Float16)Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yd12C_out = ((_Float16)Xbminusd + (_Float16)Yaminusc); - - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - - /* index calculation for the coefficients */ - ia3 = ia2 + ia1; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - Xb12_out = (_Float16)Xb12C_out * (_Float16)co1; - Yb12_out = (_Float16)Yb12C_out * (_Float16)co1; - Xc12_out = (_Float16)Xc12C_out * (_Float16)co2; - Yc12_out = (_Float16)Yc12C_out * (_Float16)co2; - Xd12_out = (_Float16)Xd12C_out * (_Float16)co3; - Yd12_out = (_Float16)Yd12C_out * (_Float16)co3; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - //Xb12_out -= Yb12C_out * si1; - p0 = (_Float16)Yb12C_out * (_Float16)si1; - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - //Yb12_out += Xb12C_out * si1; - p1 = (_Float16)Xb12C_out * (_Float16)si1; - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - //Xc12_out -= Yc12C_out * si2; - p2 = (_Float16)Yc12C_out * (_Float16)si2; - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - //Yc12_out += Xc12C_out * si2; - p3 = (_Float16)Xc12C_out * (_Float16)si2; - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - //Xd12_out -= Yd12C_out * si3; - p4 = (_Float16)Yd12C_out * (_Float16)si3; - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - //Yd12_out += Xd12C_out * si3; - p5 = (_Float16)Xd12C_out * (_Float16)si3; - - Xb12_out += (_Float16)p0; - Yb12_out -= (_Float16)p1; - Xc12_out += (_Float16)p2; - Yc12_out -= (_Float16)p3; - Xd12_out += (_Float16)p4; - Yd12_out -= (_Float16)p5; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = Yd12_out; - - /* Twiddle coefficients index modifier */ - ia1 += twidCoefModifier; - - /* Updating input index */ - i0++; - - } - while (--j); - - twidCoefModifier <<= 2U; - - /* Calculation of second stage to excluding last stage */ - for (k = fftLen >> 2U; k > 4U; k >>= 2U) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - /* Calculation of first stage */ - j = 0; - do - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* Twiddle coefficients index modifier */ - ia1 += twidCoefModifier; - - i0 = j; - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - xaIn = pSrc[(2U * i0)]; - yaIn = pSrc[(2U * i0) + 1U]; - - xbIn = pSrc[(2U * i1)]; - ybIn = pSrc[(2U * i1) + 1U]; - - xcIn = pSrc[(2U * i2)]; - ycIn = pSrc[(2U * i2) + 1U]; - - xdIn = pSrc[(2U * i3)]; - ydIn = pSrc[(2U * i3) + 1U]; - - /* xa - xc */ - Xaminusc = (_Float16)xaIn - (_Float16)xcIn; - /* (xb - xd) */ - Xbminusd = (_Float16)xbIn - (_Float16)xdIn; - /* ya - yc */ - Yaminusc = (_Float16)yaIn - (_Float16)ycIn; - /* (yb - yd) */ - Ybminusd = (_Float16)ybIn - (_Float16)ydIn; - - /* xa + xc */ - Xaplusc = (_Float16)xaIn + (_Float16)xcIn; - /* xb + xd */ - Xbplusd = (_Float16)xbIn + (_Float16)xdIn; - /* ya + yc */ - Yaplusc = (_Float16)yaIn + (_Float16)ycIn; - /* yb + yd */ - Ybplusd = (_Float16)ybIn + (_Float16)ydIn; - - /* (xa - xc) + (yb - yd) */ - Xb12C_out = ((_Float16)Xaminusc + (_Float16)Ybminusd); - /* (ya - yc) - (xb - xd) */ - Yb12C_out = ((_Float16)Yaminusc - (_Float16)Xbminusd); - /* xa + xc -(xb + xd) */ - Xc12C_out = ((_Float16)Xaplusc - (_Float16)Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = ((_Float16)Yaplusc - (_Float16)Ybplusd); - /* (xa - xc) - (yb - yd) */ - Xd12C_out = ((_Float16)Xaminusc - (_Float16)Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yd12C_out = ((_Float16)Xbminusd + (_Float16)Yaminusc); - - pSrc[(2U * i0)] = (_Float16)Xaplusc + (_Float16)Xbplusd; - pSrc[(2U * i0) + 1U] = (_Float16)Yaplusc + (_Float16)Ybplusd; - - Xb12_out = (_Float16)Xb12C_out * (_Float16)co1; - Yb12_out = (_Float16)Yb12C_out * (_Float16)co1; - Xc12_out = (_Float16)Xc12C_out * (_Float16)co2; - Yc12_out = (_Float16)Yc12C_out * (_Float16)co2; - Xd12_out = (_Float16)Xd12C_out * (_Float16)co3; - Yd12_out = (_Float16)Yd12C_out * (_Float16)co3; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - //Xb12_out -= Yb12C_out * si1; - p0 = (_Float16)Yb12C_out * (_Float16)si1; - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - //Yb12_out += Xb12C_out * si1; - p1 = (_Float16)Xb12C_out * (_Float16)si1; - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - //Xc12_out -= Yc12C_out * si2; - p2 = (_Float16)Yc12C_out * (_Float16)si2; - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - //Yc12_out += Xc12C_out * si2; - p3 = (_Float16)Xc12C_out * (_Float16)si2; - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - //Xd12_out -= Yd12C_out * si3; - p4 = (_Float16)Yd12C_out * (_Float16)si3; - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - //Yd12_out += Xd12C_out * si3; - p5 = (_Float16)Xd12C_out * (_Float16)si3; - - Xb12_out += (_Float16)p0; - Yb12_out -= (_Float16)p1; - Xc12_out += (_Float16)p2; - Yc12_out -= (_Float16)p3; - Xd12_out += (_Float16)p4; - Yd12_out -= (_Float16)p5; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = Yd12_out; - - i0 += n1; - } while (i0 < fftLen); - j++; - } while (j <= (n2 - 1U)); - twidCoefModifier <<= 2U; - } - - j = fftLen >> 2; - ptr1 = &pSrc[0]; - - /* Calculations of last stage */ - do - { - xaIn = ptr1[0]; - yaIn = ptr1[1]; - xbIn = ptr1[2]; - ybIn = ptr1[3]; - xcIn = ptr1[4]; - ycIn = ptr1[5]; - xdIn = ptr1[6]; - ydIn = ptr1[7]; - - /* xa + xc */ - Xaplusc = (_Float16)xaIn + (_Float16)xcIn; - - /* xa - xc */ - Xaminusc = (_Float16)xaIn - (_Float16)xcIn; - - /* ya + yc */ - Yaplusc = (_Float16)yaIn + (_Float16)ycIn; - - /* ya - yc */ - Yaminusc = (_Float16)yaIn - (_Float16)ycIn; - - /* xb + xd */ - Xbplusd = (_Float16)xbIn + (_Float16)xdIn; - - /* yb + yd */ - Ybplusd = (_Float16)ybIn + (_Float16)ydIn; - - /* (xb-xd) */ - Xbminusd = (_Float16)xbIn - (_Float16)xdIn; - - /* (yb-yd) */ - Ybminusd = (_Float16)ybIn - (_Float16)ydIn; - - /* xa' = xa + xb + xc + xd */ - a0 = ((_Float16)Xaplusc + (_Float16)Xbplusd); - /* ya' = ya + yb + yc + yd */ - a1 = ((_Float16)Yaplusc + (_Float16)Ybplusd); - /* xc' = (xa-xb+xc-xd) */ - a2 = ((_Float16)Xaplusc - (_Float16)Xbplusd); - /* yc' = (ya-yb+yc-yd) */ - a3 = ((_Float16)Yaplusc - (_Float16)Ybplusd); - /* xb' = (xa+yb-xc-yd) */ - a4 = ((_Float16)Xaminusc + (_Float16)Ybminusd); - /* yb' = (ya-xb-yc+xd) */ - a5 = ((_Float16)Yaminusc - (_Float16)Xbminusd); - /* xd' = (xa-yb-xc+yd)) */ - a6 = ((_Float16)Xaminusc - (_Float16)Ybminusd); - /* yd' = (ya+xb-yc-xd) */ - a7 = ((_Float16)Xbminusd + (_Float16)Yaminusc); - - ptr1[0] = a0; - ptr1[1] = a1; - ptr1[2] = a2; - ptr1[3] = a3; - ptr1[4] = a4; - ptr1[5] = a5; - ptr1[6] = a6; - ptr1[7] = a7; - - /* increment pointer by 8 */ - ptr1 += 8U; - } while (--j); - -#else - - float16_t t1, t2, r1, r2, s1, s2; - - /* Run the below code for Cortex-M0 */ - - /* Initializations for the fft calculation */ - n2 = fftLen; - n1 = n2; - for (k = fftLen; k > 1U; k >>= 2U) - { - /* Initializations for the fft calculation */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - /* FFT Calculation */ - j = 0; - do - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - i0 = j; - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* xa + xc */ - r1 = (_Float16)pSrc[(2U * i0)] + (_Float16)pSrc[(2U * i2)]; - - /* xa - xc */ - r2 = (_Float16)pSrc[(2U * i0)] - (_Float16)pSrc[(2U * i2)]; - - /* ya + yc */ - s1 = (_Float16)pSrc[(2U * i0) + 1U] + (_Float16)pSrc[(2U * i2) + 1U]; - - /* ya - yc */ - s2 = (_Float16)pSrc[(2U * i0) + 1U] - (_Float16)pSrc[(2U * i2) + 1U]; - - /* xb + xd */ - t1 = (_Float16)pSrc[2U * i1] + (_Float16)pSrc[2U * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = (_Float16)r1 + (_Float16)t1; - - /* xa + xc -(xb + xd) */ - r1 = (_Float16)r1 - (_Float16)t1; - - /* yb + yd */ - t2 = (_Float16)pSrc[(2U * i1) + 1U] + (_Float16)pSrc[(2U * i3) + 1U]; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = (_Float16)s1 + (_Float16)t2; - - /* (ya + yc) - (yb + yd) */ - s1 = (_Float16)s1 - (_Float16)t2; - - /* (yb - yd) */ - t1 = (_Float16)pSrc[(2U * i1) + 1U] - (_Float16)pSrc[(2U * i3) + 1U]; - - /* (xb - xd) */ - t2 = (_Float16)pSrc[2U * i1] - (_Float16)pSrc[2U * i3]; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = ((_Float16)r1 * (_Float16)co2) + ((_Float16)s1 * (_Float16)si2); - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = ((_Float16)s1 * (_Float16)co2) - ((_Float16)r1 * (_Float16)si2); - - /* (xa - xc) + (yb - yd) */ - r1 = (_Float16)r2 + (_Float16)t1; - - /* (xa - xc) - (yb - yd) */ - r2 = (_Float16)r2 - (_Float16)t1; - - /* (ya - yc) - (xb - xd) */ - s1 = (_Float16)s2 - (_Float16)t2; - - /* (ya - yc) + (xb - xd) */ - s2 = (_Float16)s2 + (_Float16)t2; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = ((_Float16)r1 * (_Float16)co1) + ((_Float16)s1 * (_Float16)si1); - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = ((_Float16)s1 * (_Float16)co1) - ((_Float16)r1 * (_Float16)si1); - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = ((_Float16)r2 * (_Float16)co3) + ((_Float16)s2 * (_Float16)si3); - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = ((_Float16)s2 * (_Float16)co3) - ((_Float16)r2 * (_Float16)si3); - - i0 += n1; - } while ( i0 < fftLen); - j++; - } while (j <= (n2 - 1U)); - twidCoefModifier <<= 2U; - } - -#endif /* #if defined (ARM_MATH_DSP) */ - -} - -/* -* @brief Core function for the floating-point CIFFT butterfly process. -* @param[in, out] *pSrc points to the in-place buffer of floating-point data type. -* @param[in] fftLen length of the FFT. -* @param[in] *pCoef points to twiddle coefficient buffer. -* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. -* @param[in] onebyfftLen value of 1/fftLen. -* @return none. -*/ - -void arm_radix4_butterfly_inverse_f16( -float16_t * pSrc, -uint16_t fftLen, -const float16_t * pCoef, -uint16_t twidCoefModifier, -float16_t onebyfftLen) -{ - float16_t co1, co2, co3, si1, si2, si3; - uint32_t ia1, ia2, ia3; - uint32_t i0, i1, i2, i3; - uint32_t n1, n2, j, k; - -#if defined (ARM_MATH_DSP) - - float16_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn; - float16_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc, - Ybminusd; - float16_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out; - float16_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out; - float16_t *ptr1; - float16_t p0,p1,p2,p3,p4,p5,p6,p7; - float16_t a0,a1,a2,a3,a4,a5,a6,a7; - - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2U; - i0 = 0U; - ia1 = 0U; - - j = n2; - - /* Calculation of first stage */ - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - xaIn = pSrc[(2U * i0)]; - yaIn = pSrc[(2U * i0) + 1U]; - - xcIn = pSrc[(2U * i2)]; - ycIn = pSrc[(2U * i2) + 1U]; - - xbIn = pSrc[(2U * i1)]; - ybIn = pSrc[(2U * i1) + 1U]; - - xdIn = pSrc[(2U * i3)]; - ydIn = pSrc[(2U * i3) + 1U]; - - /* xa + xc */ - Xaplusc = (_Float16)xaIn + (_Float16)xcIn; - /* xb + xd */ - Xbplusd = (_Float16)xbIn + (_Float16)xdIn; - /* ya + yc */ - Yaplusc = (_Float16)yaIn + (_Float16)ycIn; - /* yb + yd */ - Ybplusd = (_Float16)ybIn + (_Float16)ydIn; - - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - - /* xa - xc */ - Xaminusc = (_Float16)xaIn - (_Float16)xcIn; - /* xb - xd */ - Xbminusd = (_Float16)xbIn - (_Float16)xdIn; - /* ya - yc */ - Yaminusc = (_Float16)yaIn - (_Float16)ycIn; - /* yb - yd */ - Ybminusd = (_Float16)ybIn - (_Float16)ydIn; - - /* xa' = xa + xb + xc + xd */ - pSrc[(2U * i0)] = (_Float16)Xaplusc + (_Float16)Xbplusd; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = (_Float16)Yaplusc + (_Float16)Ybplusd; - - /* (xa - xc) - (yb - yd) */ - Xb12C_out = ((_Float16)Xaminusc - (_Float16)Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yb12C_out = ((_Float16)Yaminusc + (_Float16)Xbminusd); - /* (xa + xc) - (xb + xd) */ - Xc12C_out = ((_Float16)Xaplusc - (_Float16)Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = ((_Float16)Yaplusc - (_Float16)Ybplusd); - /* (xa - xc) + (yb - yd) */ - Xd12C_out = ((_Float16)Xaminusc + (_Float16)Ybminusd); - /* (ya - yc) - (xb - xd) */ - Yd12C_out = ((_Float16)Yaminusc - (_Float16)Xbminusd); - - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - - /* index calculation for the coefficients */ - ia3 = ia2 + ia1; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - Xb12_out = (_Float16)Xb12C_out * (_Float16)co1; - Yb12_out = (_Float16)Yb12C_out * (_Float16)co1; - Xc12_out = (_Float16)Xc12C_out * (_Float16)co2; - Yc12_out = (_Float16)Yc12C_out * (_Float16)co2; - Xd12_out = (_Float16)Xd12C_out * (_Float16)co3; - Yd12_out = (_Float16)Yd12C_out * (_Float16)co3; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - //Xb12_out -= Yb12C_out * si1; - p0 = (_Float16)Yb12C_out * (_Float16)si1; - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - //Yb12_out += Xb12C_out * si1; - p1 = (_Float16)Xb12C_out * (_Float16)si1; - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - //Xc12_out -= Yc12C_out * si2; - p2 = (_Float16)Yc12C_out * (_Float16)si2; - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - //Yc12_out += Xc12C_out * si2; - p3 = (_Float16)Xc12C_out * (_Float16)si2; - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - //Xd12_out -= Yd12C_out * si3; - p4 = (_Float16)Yd12C_out * (_Float16)si3; - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - //Yd12_out += Xd12C_out * si3; - p5 =(_Float16) Xd12C_out * (_Float16)si3; - - Xb12_out -= (_Float16)p0; - Yb12_out += (_Float16)p1; - Xc12_out -= (_Float16)p2; - Yc12_out += (_Float16)p3; - Xd12_out -= (_Float16)p4; - Yd12_out += (_Float16)p5; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = Yd12_out; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1U; - - } while (--j); - - twidCoefModifier <<= 2U; - - /* Calculation of second stage to excluding last stage */ - for (k = fftLen >> 2U; k > 4U; k >>= 2U) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - /* Calculation of first stage */ - j = 0; - do - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - i0 = j; - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - xaIn = pSrc[(2U * i0)]; - yaIn = pSrc[(2U * i0) + 1U]; - - xbIn = pSrc[(2U * i1)]; - ybIn = pSrc[(2U * i1) + 1U]; - - xcIn = pSrc[(2U * i2)]; - ycIn = pSrc[(2U * i2) + 1U]; - - xdIn = pSrc[(2U * i3)]; - ydIn = pSrc[(2U * i3) + 1U]; - - /* xa - xc */ - Xaminusc = (_Float16)xaIn - (_Float16)xcIn; - /* (xb - xd) */ - Xbminusd = (_Float16)xbIn - (_Float16)xdIn; - /* ya - yc */ - Yaminusc = (_Float16)yaIn - (_Float16)ycIn; - /* (yb - yd) */ - Ybminusd = (_Float16)ybIn - (_Float16)ydIn; - - /* xa + xc */ - Xaplusc = (_Float16)xaIn + (_Float16)xcIn; - /* xb + xd */ - Xbplusd = (_Float16)xbIn + (_Float16)xdIn; - /* ya + yc */ - Yaplusc = (_Float16)yaIn + (_Float16)ycIn; - /* yb + yd */ - Ybplusd = (_Float16)ybIn + (_Float16)ydIn; - - /* (xa - xc) - (yb - yd) */ - Xb12C_out = ((_Float16)Xaminusc - (_Float16)Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yb12C_out = ((_Float16)Yaminusc + (_Float16)Xbminusd); - /* xa + xc -(xb + xd) */ - Xc12C_out = ((_Float16)Xaplusc - (_Float16)Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = ((_Float16)Yaplusc - (_Float16)Ybplusd); - /* (xa - xc) + (yb - yd) */ - Xd12C_out = ((_Float16)Xaminusc + (_Float16)Ybminusd); - /* (ya - yc) - (xb - xd) */ - Yd12C_out = ((_Float16)Yaminusc - (_Float16)Xbminusd); - - pSrc[(2U * i0)] = (_Float16)Xaplusc + (_Float16)Xbplusd; - pSrc[(2U * i0) + 1U] = (_Float16)Yaplusc + (_Float16)Ybplusd; - - Xb12_out = (_Float16)Xb12C_out * (_Float16)co1; - Yb12_out = (_Float16)Yb12C_out * (_Float16)co1; - Xc12_out = (_Float16)Xc12C_out * (_Float16)co2; - Yc12_out = (_Float16)Yc12C_out * (_Float16)co2; - Xd12_out = (_Float16)Xd12C_out * (_Float16)co3; - Yd12_out = (_Float16)Yd12C_out * (_Float16)co3; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - //Xb12_out -= Yb12C_out * si1; - p0 = (_Float16)Yb12C_out * (_Float16)si1; - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - //Yb12_out += Xb12C_out * si1; - p1 = (_Float16)Xb12C_out * (_Float16)si1; - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - //Xc12_out -= Yc12C_out * si2; - p2 = (_Float16)Yc12C_out * (_Float16)si2; - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - //Yc12_out += Xc12C_out * si2; - p3 = (_Float16)Xc12C_out * (_Float16)si2; - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - //Xd12_out -= Yd12C_out * si3; - p4 = (_Float16)Yd12C_out * (_Float16)si3; - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - //Yd12_out += Xd12C_out * si3; - p5 = (_Float16)Xd12C_out * (_Float16)si3; - - Xb12_out -= (_Float16)p0; - Yb12_out += (_Float16)p1; - Xc12_out -= (_Float16)p2; - Yc12_out += (_Float16)p3; - Xd12_out -= (_Float16)p4; - Yd12_out += (_Float16)p5; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = Yd12_out; - - i0 += n1; - } while (i0 < fftLen); - j++; - } while (j <= (n2 - 1U)); - twidCoefModifier <<= 2U; - } - /* Initializations of last stage */ - - j = fftLen >> 2; - ptr1 = &pSrc[0]; - - /* Calculations of last stage */ - do - { - xaIn = ptr1[0]; - yaIn = ptr1[1]; - xbIn = ptr1[2]; - ybIn = ptr1[3]; - xcIn = ptr1[4]; - ycIn = ptr1[5]; - xdIn = ptr1[6]; - ydIn = ptr1[7]; - - /* Butterfly implementation */ - /* xa + xc */ - Xaplusc = (_Float16)xaIn + (_Float16)xcIn; - - /* xa - xc */ - Xaminusc = (_Float16)xaIn - (_Float16)xcIn; - - /* ya + yc */ - Yaplusc = (_Float16)yaIn + (_Float16)ycIn; - - /* ya - yc */ - Yaminusc = (_Float16)yaIn - (_Float16)ycIn; - - /* xb + xd */ - Xbplusd = (_Float16)xbIn + (_Float16)xdIn; - - /* yb + yd */ - Ybplusd = (_Float16)ybIn + (_Float16)ydIn; - - /* (xb-xd) */ - Xbminusd = (_Float16)xbIn - (_Float16)xdIn; - - /* (yb-yd) */ - Ybminusd = (_Float16)ybIn - (_Float16)ydIn; - - /* xa' = (xa+xb+xc+xd) * onebyfftLen */ - a0 = ((_Float16)Xaplusc + (_Float16)Xbplusd); - /* ya' = (ya+yb+yc+yd) * onebyfftLen */ - a1 = ((_Float16)Yaplusc + (_Float16)Ybplusd); - /* xc' = (xa-xb+xc-xd) * onebyfftLen */ - a2 = ((_Float16)Xaplusc - (_Float16)Xbplusd); - /* yc' = (ya-yb+yc-yd) * onebyfftLen */ - a3 = ((_Float16)Yaplusc - (_Float16)Ybplusd); - /* xb' = (xa-yb-xc+yd) * onebyfftLen */ - a4 = ((_Float16)Xaminusc - (_Float16)Ybminusd); - /* yb' = (ya+xb-yc-xd) * onebyfftLen */ - a5 = ((_Float16)Yaminusc + (_Float16)Xbminusd); - /* xd' = (xa-yb-xc+yd) * onebyfftLen */ - a6 = ((_Float16)Xaminusc + (_Float16)Ybminusd); - /* yd' = (ya-xb-yc+xd) * onebyfftLen */ - a7 = ((_Float16)Yaminusc - (_Float16)Xbminusd); - - p0 = (_Float16)a0 * (_Float16)onebyfftLen; - p1 = (_Float16)a1 * (_Float16)onebyfftLen; - p2 = (_Float16)a2 * (_Float16)onebyfftLen; - p3 = (_Float16)a3 * (_Float16)onebyfftLen; - p4 = (_Float16)a4 * (_Float16)onebyfftLen; - p5 = (_Float16)a5 * (_Float16)onebyfftLen; - p6 = (_Float16)a6 * (_Float16)onebyfftLen; - p7 = (_Float16)a7 * (_Float16)onebyfftLen; - - /* xa' = (xa+xb+xc+xd) * onebyfftLen */ - ptr1[0] = p0; - /* ya' = (ya+yb+yc+yd) * onebyfftLen */ - ptr1[1] = p1; - /* xc' = (xa-xb+xc-xd) * onebyfftLen */ - ptr1[2] = p2; - /* yc' = (ya-yb+yc-yd) * onebyfftLen */ - ptr1[3] = p3; - /* xb' = (xa-yb-xc+yd) * onebyfftLen */ - ptr1[4] = p4; - /* yb' = (ya+xb-yc-xd) * onebyfftLen */ - ptr1[5] = p5; - /* xd' = (xa-yb-xc+yd) * onebyfftLen */ - ptr1[6] = p6; - /* yd' = (ya-xb-yc+xd) * onebyfftLen */ - ptr1[7] = p7; - - /* increment source pointer by 8 for next calculations */ - ptr1 = ptr1 + 8U; - - } while (--j); - -#else - - float16_t t1, t2, r1, r2, s1, s2; - - /* Run the below code for Cortex-M0 */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* Calculation of first stage */ - for (k = fftLen; k > 4U; k >>= 2U) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - /* Calculation of first stage */ - j = 0; - do - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - i0 = j; - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* xa + xc */ - r1 = (_Float16)pSrc[(2U * i0)] + (_Float16)pSrc[(2U * i2)]; - - /* xa - xc */ - r2 = (_Float16)pSrc[(2U * i0)] - (_Float16)pSrc[(2U * i2)]; - - /* ya + yc */ - s1 = (_Float16)pSrc[(2U * i0) + 1U] + (_Float16)pSrc[(2U * i2) + 1U]; - - /* ya - yc */ - s2 = (_Float16)pSrc[(2U * i0) + 1U] - (_Float16)pSrc[(2U * i2) + 1U]; - - /* xb + xd */ - t1 = (_Float16)pSrc[2U * i1] + (_Float16)pSrc[2U * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = (_Float16)r1 + (_Float16)t1; - - /* xa + xc -(xb + xd) */ - r1 = (_Float16)r1 - (_Float16)t1; - - /* yb + yd */ - t2 = (_Float16)pSrc[(2U * i1) + 1U] + (_Float16)pSrc[(2U * i3) + 1U]; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = (_Float16)s1 + (_Float16)t2; - - /* (ya + yc) - (yb + yd) */ - s1 = (_Float16)s1 - (_Float16)t2; - - /* (yb - yd) */ - t1 = (_Float16)pSrc[(2U * i1) + 1U] - (_Float16)pSrc[(2U * i3) + 1U]; - - /* (xb - xd) */ - t2 = (_Float16)pSrc[2U * i1] - (_Float16)pSrc[2U * i3]; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = ((_Float16)r1 * (_Float16)co2) - ((_Float16)s1 * (_Float16)si2); - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = ((_Float16)s1 * (_Float16)co2) + ((_Float16)r1 * (_Float16)si2); - - /* (xa - xc) - (yb - yd) */ - r1 = (_Float16)r2 - (_Float16)t1; - - /* (xa - xc) + (yb - yd) */ - r2 = (_Float16)r2 + (_Float16)t1; - - /* (ya - yc) + (xb - xd) */ - s1 = (_Float16)s2 + (_Float16)t2; - - /* (ya - yc) - (xb - xd) */ - s2 = (_Float16)s2 - (_Float16)t2; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = ((_Float16)r1 * (_Float16)co1) - ((_Float16)s1 * (_Float16)si1); - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = ((_Float16)s1 * (_Float16)co1) + ((_Float16)r1 * (_Float16)si1); - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = ((_Float16)r2 * (_Float16)co3) - ((_Float16)s2 * (_Float16)si3); - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = ((_Float16)s2 * (_Float16)co3) + ((_Float16)r2 * (_Float16)si3); - - i0 += n1; - } while ( i0 < fftLen); - j++; - } while (j <= (n2 - 1U)); - twidCoefModifier <<= 2U; - } - /* Initializations of last stage */ - n1 = n2; - n2 >>= 2U; - - /* Calculations of last stage */ - for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - /* xa + xc */ - r1 = (_Float16)pSrc[2U * i0] + (_Float16)pSrc[2U * i2]; - - /* xa - xc */ - r2 = (_Float16)pSrc[2U * i0] - (_Float16)pSrc[2U * i2]; - - /* ya + yc */ - s1 = (_Float16)pSrc[(2U * i0) + 1U] + (_Float16)pSrc[(2U * i2) + 1U]; - - /* ya - yc */ - s2 = (_Float16)pSrc[(2U * i0) + 1U] - (_Float16)pSrc[(2U * i2) + 1U]; - - /* xc + xd */ - t1 = (_Float16)pSrc[2U * i1] + (_Float16)pSrc[2U * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = ((_Float16)r1 + (_Float16)t1) * (_Float16)onebyfftLen; - - /* (xa + xb) - (xc + xd) */ - r1 = (_Float16)r1 - (_Float16)t1; - - /* yb + yd */ - t2 = (_Float16)pSrc[(2U * i1) + 1U] + (_Float16)pSrc[(2U * i3) + 1U]; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = ((_Float16)s1 + (_Float16)t2) * (_Float16)onebyfftLen; - - /* (ya + yc) - (yb + yd) */ - s1 = (_Float16)s1 - (_Float16)t2; - - /* (yb-yd) */ - t1 = (_Float16)pSrc[(2U * i1) + 1U] - (_Float16)pSrc[(2U * i3) + 1U]; - - /* (xb-xd) */ - t2 = (_Float16)pSrc[2U * i1] - (_Float16)pSrc[2U * i3]; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = (_Float16)r1 * (_Float16)onebyfftLen; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = (_Float16)s1 * (_Float16)onebyfftLen; - - /* (xa - xc) - (yb-yd) */ - r1 = (_Float16)r2 - (_Float16)t1; - - /* (xa - xc) + (yb-yd) */ - r2 = (_Float16)r2 + (_Float16)t1; - - /* (ya - yc) + (xb-xd) */ - s1 = (_Float16)s2 + (_Float16)t2; - - /* (ya - yc) - (xb-xd) */ - s2 = (_Float16)s2 - (_Float16)t2; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = (_Float16)r1 * (_Float16)onebyfftLen; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = (_Float16)s1 * (_Float16)onebyfftLen; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = (_Float16)r2 * (_Float16)onebyfftLen; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = (_Float16)s2 * (_Float16)onebyfftLen; - } - -#endif /* #if defined (ARM_MATH_DSP) */ -} - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c deleted file mode 100644 index 21a9547..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c +++ /dev/null @@ -1,1203 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix4_f32.c - * Description: Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -extern void arm_bitreversal_f32( - float32_t * pSrc, - uint16_t fftSize, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab); - -void arm_radix4_butterfly_f32( - float32_t * pSrc, - uint16_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier); - -void arm_radix4_butterfly_inverse_f32( - float32_t * pSrc, - uint16_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier, - float32_t onebyfftLen); - - - - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - - -/** - @brief Processing function for the floating-point Radix-4 CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future. - @param[in] S points to an instance of the floating-point Radix-4 CFFT/CIFFT structure - @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @return none - */ - -void arm_cfft_radix4_f32( - const arm_cfft_radix4_instance_f32 * S, - float32_t * pSrc) -{ - if (S->ifftFlag == 1U) - { - /* Complex IFFT radix-4 */ - arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier, S->onebyfftLen); - } - else - { - /* Complex FFT radix-4 */ - arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); - } - - if (S->bitReverseFlag == 1U) - { - /* Bit Reversal */ - arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); - } - -} - -/** - @} end of ComplexFFT group - */ - -/* ---------------------------------------------------------------------- - * Internal helper function used by the FFTs - * ---------------------------------------------------------------------- */ - -/** - brief Core function for the floating-point CFFT butterfly process. - param[in,out] pSrc points to the in-place buffer of floating-point data type - param[in] fftLen length of the FFT - param[in] pCoef points to the twiddle coefficient buffer - param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table - return none - */ - -void arm_radix4_butterfly_f32( - float32_t * pSrc, - uint16_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier) -{ - float32_t co1, co2, co3, si1, si2, si3; - uint32_t ia1, ia2, ia3; - uint32_t i0, i1, i2, i3; - uint32_t n1, n2, j, k; - -#if defined (ARM_MATH_LOOPUNROLL) - - float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn; - float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc, - Ybminusd; - float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out; - float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out; - float32_t *ptr1; - float32_t p0,p1,p2,p3,p4,p5; - float32_t a0,a1,a2,a3,a4,a5,a6,a7; - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2U; - i0 = 0U; - ia1 = 0U; - - j = n2; - - /* Calculation of first stage */ - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - xaIn = pSrc[(2U * i0)]; - yaIn = pSrc[(2U * i0) + 1U]; - - xbIn = pSrc[(2U * i1)]; - ybIn = pSrc[(2U * i1) + 1U]; - - xcIn = pSrc[(2U * i2)]; - ycIn = pSrc[(2U * i2) + 1U]; - - xdIn = pSrc[(2U * i3)]; - ydIn = pSrc[(2U * i3) + 1U]; - - /* xa + xc */ - Xaplusc = xaIn + xcIn; - /* xb + xd */ - Xbplusd = xbIn + xdIn; - /* ya + yc */ - Yaplusc = yaIn + ycIn; - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - /* xb - xd */ - Xbminusd = xbIn - xdIn; - /* ya - yc */ - Yaminusc = yaIn - ycIn; - /* yb - yd */ - Ybminusd = ybIn - ydIn; - - /* xa' = xa + xb + xc + xd */ - pSrc[(2U * i0)] = Xaplusc + Xbplusd; - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd; - - /* (xa - xc) + (yb - yd) */ - Xb12C_out = (Xaminusc + Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yb12C_out = (Yaminusc - Xbminusd); - /* (xa + xc) - (xb + xd) */ - Xc12C_out = (Xaplusc - Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = (Yaplusc - Ybplusd); - /* (xa - xc) - (yb - yd) */ - Xd12C_out = (Xaminusc - Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yd12C_out = (Xbminusd + Yaminusc); - - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - - /* index calculation for the coefficients */ - ia3 = ia2 + ia1; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - Xb12_out = Xb12C_out * co1; - Yb12_out = Yb12C_out * co1; - Xc12_out = Xc12C_out * co2; - Yc12_out = Yc12C_out * co2; - Xd12_out = Xd12C_out * co3; - Yd12_out = Yd12C_out * co3; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - //Xb12_out -= Yb12C_out * si1; - p0 = Yb12C_out * si1; - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - //Yb12_out += Xb12C_out * si1; - p1 = Xb12C_out * si1; - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - //Xc12_out -= Yc12C_out * si2; - p2 = Yc12C_out * si2; - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - //Yc12_out += Xc12C_out * si2; - p3 = Xc12C_out * si2; - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - //Xd12_out -= Yd12C_out * si3; - p4 = Yd12C_out * si3; - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - //Yd12_out += Xd12C_out * si3; - p5 = Xd12C_out * si3; - - Xb12_out += p0; - Yb12_out -= p1; - Xc12_out += p2; - Yc12_out -= p3; - Xd12_out += p4; - Yd12_out -= p5; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = Yd12_out; - - /* Twiddle coefficients index modifier */ - ia1 += twidCoefModifier; - - /* Updating input index */ - i0++; - - } - while (--j); - - twidCoefModifier <<= 2U; - - /* Calculation of second stage to excluding last stage */ - for (k = fftLen >> 2U; k > 4U; k >>= 2U) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - /* Calculation of first stage */ - j = 0; - do - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[(ia1 * 2U)]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[(ia2 * 2U)]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[(ia3 * 2U)]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* Twiddle coefficients index modifier */ - ia1 += twidCoefModifier; - - i0 = j; - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - xaIn = pSrc[(2U * i0)]; - yaIn = pSrc[(2U * i0) + 1U]; - - xbIn = pSrc[(2U * i1)]; - ybIn = pSrc[(2U * i1) + 1U]; - - xcIn = pSrc[(2U * i2)]; - ycIn = pSrc[(2U * i2) + 1U]; - - xdIn = pSrc[(2U * i3)]; - ydIn = pSrc[(2U * i3) + 1U]; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - /* (xb - xd) */ - Xbminusd = xbIn - xdIn; - /* ya - yc */ - Yaminusc = yaIn - ycIn; - /* (yb - yd) */ - Ybminusd = ybIn - ydIn; - - /* xa + xc */ - Xaplusc = xaIn + xcIn; - /* xb + xd */ - Xbplusd = xbIn + xdIn; - /* ya + yc */ - Yaplusc = yaIn + ycIn; - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* (xa - xc) + (yb - yd) */ - Xb12C_out = (Xaminusc + Ybminusd); - /* (ya - yc) - (xb - xd) */ - Yb12C_out = (Yaminusc - Xbminusd); - /* xa + xc -(xb + xd) */ - Xc12C_out = (Xaplusc - Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = (Yaplusc - Ybplusd); - /* (xa - xc) - (yb - yd) */ - Xd12C_out = (Xaminusc - Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yd12C_out = (Xbminusd + Yaminusc); - - pSrc[(2U * i0)] = Xaplusc + Xbplusd; - pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd; - - Xb12_out = Xb12C_out * co1; - Yb12_out = Yb12C_out * co1; - Xc12_out = Xc12C_out * co2; - Yc12_out = Yc12C_out * co2; - Xd12_out = Xd12C_out * co3; - Yd12_out = Yd12C_out * co3; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - //Xb12_out -= Yb12C_out * si1; - p0 = Yb12C_out * si1; - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - //Yb12_out += Xb12C_out * si1; - p1 = Xb12C_out * si1; - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - //Xc12_out -= Yc12C_out * si2; - p2 = Yc12C_out * si2; - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - //Yc12_out += Xc12C_out * si2; - p3 = Xc12C_out * si2; - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - //Xd12_out -= Yd12C_out * si3; - p4 = Yd12C_out * si3; - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - //Yd12_out += Xd12C_out * si3; - p5 = Xd12C_out * si3; - - Xb12_out += p0; - Yb12_out -= p1; - Xc12_out += p2; - Yc12_out -= p3; - Xd12_out += p4; - Yd12_out -= p5; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = Yd12_out; - - i0 += n1; - } while (i0 < fftLen); - j++; - } while (j <= (n2 - 1U)); - twidCoefModifier <<= 2U; - } - - j = fftLen >> 2; - ptr1 = &pSrc[0]; - - /* Calculations of last stage */ - do - { - xaIn = ptr1[0]; - yaIn = ptr1[1]; - xbIn = ptr1[2]; - ybIn = ptr1[3]; - xcIn = ptr1[4]; - ycIn = ptr1[5]; - xdIn = ptr1[6]; - ydIn = ptr1[7]; - - /* xa + xc */ - Xaplusc = xaIn + xcIn; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - - /* ya + yc */ - Yaplusc = yaIn + ycIn; - - /* ya - yc */ - Yaminusc = yaIn - ycIn; - - /* xb + xd */ - Xbplusd = xbIn + xdIn; - - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* (xb-xd) */ - Xbminusd = xbIn - xdIn; - - /* (yb-yd) */ - Ybminusd = ybIn - ydIn; - - /* xa' = xa + xb + xc + xd */ - a0 = (Xaplusc + Xbplusd); - /* ya' = ya + yb + yc + yd */ - a1 = (Yaplusc + Ybplusd); - /* xc' = (xa-xb+xc-xd) */ - a2 = (Xaplusc - Xbplusd); - /* yc' = (ya-yb+yc-yd) */ - a3 = (Yaplusc - Ybplusd); - /* xb' = (xa+yb-xc-yd) */ - a4 = (Xaminusc + Ybminusd); - /* yb' = (ya-xb-yc+xd) */ - a5 = (Yaminusc - Xbminusd); - /* xd' = (xa-yb-xc+yd)) */ - a6 = (Xaminusc - Ybminusd); - /* yd' = (ya+xb-yc-xd) */ - a7 = (Xbminusd + Yaminusc); - - ptr1[0] = a0; - ptr1[1] = a1; - ptr1[2] = a2; - ptr1[3] = a3; - ptr1[4] = a4; - ptr1[5] = a5; - ptr1[6] = a6; - ptr1[7] = a7; - - /* increment pointer by 8 */ - ptr1 += 8U; - } while (--j); - -#else - - float32_t t1, t2, r1, r2, s1, s2; - - /* Initializations for the fft calculation */ - n2 = fftLen; - n1 = n2; - for (k = fftLen; k > 1U; k >>= 2U) - { - /* Initializations for the fft calculation */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - /* FFT Calculation */ - j = 0; - do - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - i0 = j; - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* xa + xc */ - r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)]; - - /* xa - xc */ - r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)]; - - /* ya + yc */ - s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; - - /* ya - yc */ - s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; - - /* xb + xd */ - t1 = pSrc[2U * i1] + pSrc[2U * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = r1 + t1; - - /* xa + xc -(xb + xd) */ - r1 = r1 - t1; - - /* yb + yd */ - t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = s1 + t2; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb - yd) */ - t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; - - /* (xb - xd) */ - t2 = pSrc[2U * i1] - pSrc[2U * i3]; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = (r1 * co2) + (s1 * si2); - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = (s1 * co2) - (r1 * si2); - - /* (xa - xc) + (yb - yd) */ - r1 = r2 + t1; - - /* (xa - xc) - (yb - yd) */ - r2 = r2 - t1; - - /* (ya - yc) - (xb - xd) */ - s1 = s2 - t2; - - /* (ya - yc) + (xb - xd) */ - s2 = s2 + t2; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = (r1 * co1) + (s1 * si1); - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = (s1 * co1) - (r1 * si1); - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = (r2 * co3) + (s2 * si3); - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = (s2 * co3) - (r2 * si3); - - i0 += n1; - } while ( i0 < fftLen); - j++; - } while (j <= (n2 - 1U)); - twidCoefModifier <<= 2U; - } - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - -} - -/** - brief Core function for the floating-point CIFFT butterfly process. - param[in,out] pSrc points to the in-place buffer of floating-point data type - param[in] fftLen length of the FFT - param[in] pCoef points to twiddle coefficient buffer - param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - param[in] onebyfftLen value of 1/fftLen - return none - */ - -void arm_radix4_butterfly_inverse_f32( - float32_t * pSrc, - uint16_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier, - float32_t onebyfftLen) -{ - float32_t co1, co2, co3, si1, si2, si3; - uint32_t ia1, ia2, ia3; - uint32_t i0, i1, i2, i3; - uint32_t n1, n2, j, k; - -#if defined (ARM_MATH_LOOPUNROLL) - - float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn; - float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc, - Ybminusd; - float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out; - float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out; - float32_t *ptr1; - float32_t p0,p1,p2,p3,p4,p5,p6,p7; - float32_t a0,a1,a2,a3,a4,a5,a6,a7; - - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2U; - i0 = 0U; - ia1 = 0U; - - j = n2; - - /* Calculation of first stage */ - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - xaIn = pSrc[(2U * i0)]; - yaIn = pSrc[(2U * i0) + 1U]; - - xcIn = pSrc[(2U * i2)]; - ycIn = pSrc[(2U * i2) + 1U]; - - xbIn = pSrc[(2U * i1)]; - ybIn = pSrc[(2U * i1) + 1U]; - - xdIn = pSrc[(2U * i3)]; - ydIn = pSrc[(2U * i3) + 1U]; - - /* xa + xc */ - Xaplusc = xaIn + xcIn; - /* xb + xd */ - Xbplusd = xbIn + xdIn; - /* ya + yc */ - Yaplusc = yaIn + ycIn; - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - /* xb - xd */ - Xbminusd = xbIn - xdIn; - /* ya - yc */ - Yaminusc = yaIn - ycIn; - /* yb - yd */ - Ybminusd = ybIn - ydIn; - - /* xa' = xa + xb + xc + xd */ - pSrc[(2U * i0)] = Xaplusc + Xbplusd; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd; - - /* (xa - xc) - (yb - yd) */ - Xb12C_out = (Xaminusc - Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yb12C_out = (Yaminusc + Xbminusd); - /* (xa + xc) - (xb + xd) */ - Xc12C_out = (Xaplusc - Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = (Yaplusc - Ybplusd); - /* (xa - xc) + (yb - yd) */ - Xd12C_out = (Xaminusc + Ybminusd); - /* (ya - yc) - (xb - xd) */ - Yd12C_out = (Yaminusc - Xbminusd); - - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - - /* index calculation for the coefficients */ - ia3 = ia2 + ia1; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - Xb12_out = Xb12C_out * co1; - Yb12_out = Yb12C_out * co1; - Xc12_out = Xc12C_out * co2; - Yc12_out = Yc12C_out * co2; - Xd12_out = Xd12C_out * co3; - Yd12_out = Yd12C_out * co3; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - //Xb12_out -= Yb12C_out * si1; - p0 = Yb12C_out * si1; - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - //Yb12_out += Xb12C_out * si1; - p1 = Xb12C_out * si1; - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - //Xc12_out -= Yc12C_out * si2; - p2 = Yc12C_out * si2; - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - //Yc12_out += Xc12C_out * si2; - p3 = Xc12C_out * si2; - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - //Xd12_out -= Yd12C_out * si3; - p4 = Yd12C_out * si3; - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - //Yd12_out += Xd12C_out * si3; - p5 = Xd12C_out * si3; - - Xb12_out -= p0; - Yb12_out += p1; - Xc12_out -= p2; - Yc12_out += p3; - Xd12_out -= p4; - Yd12_out += p5; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = Yd12_out; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1U; - - } while (--j); - - twidCoefModifier <<= 2U; - - /* Calculation of second stage to excluding last stage */ - for (k = fftLen >> 2U; k > 4U; k >>= 2U) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - /* Calculation of first stage */ - j = 0; - do - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - i0 = j; - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - xaIn = pSrc[(2U * i0)]; - yaIn = pSrc[(2U * i0) + 1U]; - - xbIn = pSrc[(2U * i1)]; - ybIn = pSrc[(2U * i1) + 1U]; - - xcIn = pSrc[(2U * i2)]; - ycIn = pSrc[(2U * i2) + 1U]; - - xdIn = pSrc[(2U * i3)]; - ydIn = pSrc[(2U * i3) + 1U]; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - /* (xb - xd) */ - Xbminusd = xbIn - xdIn; - /* ya - yc */ - Yaminusc = yaIn - ycIn; - /* (yb - yd) */ - Ybminusd = ybIn - ydIn; - - /* xa + xc */ - Xaplusc = xaIn + xcIn; - /* xb + xd */ - Xbplusd = xbIn + xdIn; - /* ya + yc */ - Yaplusc = yaIn + ycIn; - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* (xa - xc) - (yb - yd) */ - Xb12C_out = (Xaminusc - Ybminusd); - /* (ya - yc) + (xb - xd) */ - Yb12C_out = (Yaminusc + Xbminusd); - /* xa + xc -(xb + xd) */ - Xc12C_out = (Xaplusc - Xbplusd); - /* (ya + yc) - (yb + yd) */ - Yc12C_out = (Yaplusc - Ybplusd); - /* (xa - xc) + (yb - yd) */ - Xd12C_out = (Xaminusc + Ybminusd); - /* (ya - yc) - (xb - xd) */ - Yd12C_out = (Yaminusc - Xbminusd); - - pSrc[(2U * i0)] = Xaplusc + Xbplusd; - pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd; - - Xb12_out = Xb12C_out * co1; - Yb12_out = Yb12C_out * co1; - Xc12_out = Xc12C_out * co2; - Yc12_out = Yc12C_out * co2; - Xd12_out = Xd12C_out * co3; - Yd12_out = Yd12C_out * co3; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - //Xb12_out -= Yb12C_out * si1; - p0 = Yb12C_out * si1; - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - //Yb12_out += Xb12C_out * si1; - p1 = Xb12C_out * si1; - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - //Xc12_out -= Yc12C_out * si2; - p2 = Yc12C_out * si2; - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - //Yc12_out += Xc12C_out * si2; - p3 = Xc12C_out * si2; - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - //Xd12_out -= Yd12C_out * si3; - p4 = Yd12C_out * si3; - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - //Yd12_out += Xd12C_out * si3; - p5 = Xd12C_out * si3; - - Xb12_out -= p0; - Yb12_out += p1; - Xc12_out -= p2; - Yc12_out += p3; - Xd12_out -= p4; - Yd12_out += p5; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = Xc12_out; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = Yc12_out; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = Xb12_out; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = Yb12_out; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = Xd12_out; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = Yd12_out; - - i0 += n1; - } while (i0 < fftLen); - j++; - } while (j <= (n2 - 1U)); - twidCoefModifier <<= 2U; - } - /* Initializations of last stage */ - - j = fftLen >> 2; - ptr1 = &pSrc[0]; - - /* Calculations of last stage */ - do - { - xaIn = ptr1[0]; - yaIn = ptr1[1]; - xbIn = ptr1[2]; - ybIn = ptr1[3]; - xcIn = ptr1[4]; - ycIn = ptr1[5]; - xdIn = ptr1[6]; - ydIn = ptr1[7]; - - /* Butterfly implementation */ - /* xa + xc */ - Xaplusc = xaIn + xcIn; - - /* xa - xc */ - Xaminusc = xaIn - xcIn; - - /* ya + yc */ - Yaplusc = yaIn + ycIn; - - /* ya - yc */ - Yaminusc = yaIn - ycIn; - - /* xb + xd */ - Xbplusd = xbIn + xdIn; - - /* yb + yd */ - Ybplusd = ybIn + ydIn; - - /* (xb-xd) */ - Xbminusd = xbIn - xdIn; - - /* (yb-yd) */ - Ybminusd = ybIn - ydIn; - - /* xa' = (xa+xb+xc+xd) * onebyfftLen */ - a0 = (Xaplusc + Xbplusd); - /* ya' = (ya+yb+yc+yd) * onebyfftLen */ - a1 = (Yaplusc + Ybplusd); - /* xc' = (xa-xb+xc-xd) * onebyfftLen */ - a2 = (Xaplusc - Xbplusd); - /* yc' = (ya-yb+yc-yd) * onebyfftLen */ - a3 = (Yaplusc - Ybplusd); - /* xb' = (xa-yb-xc+yd) * onebyfftLen */ - a4 = (Xaminusc - Ybminusd); - /* yb' = (ya+xb-yc-xd) * onebyfftLen */ - a5 = (Yaminusc + Xbminusd); - /* xd' = (xa-yb-xc+yd) * onebyfftLen */ - a6 = (Xaminusc + Ybminusd); - /* yd' = (ya-xb-yc+xd) * onebyfftLen */ - a7 = (Yaminusc - Xbminusd); - - p0 = a0 * onebyfftLen; - p1 = a1 * onebyfftLen; - p2 = a2 * onebyfftLen; - p3 = a3 * onebyfftLen; - p4 = a4 * onebyfftLen; - p5 = a5 * onebyfftLen; - p6 = a6 * onebyfftLen; - p7 = a7 * onebyfftLen; - - /* xa' = (xa+xb+xc+xd) * onebyfftLen */ - ptr1[0] = p0; - /* ya' = (ya+yb+yc+yd) * onebyfftLen */ - ptr1[1] = p1; - /* xc' = (xa-xb+xc-xd) * onebyfftLen */ - ptr1[2] = p2; - /* yc' = (ya-yb+yc-yd) * onebyfftLen */ - ptr1[3] = p3; - /* xb' = (xa-yb-xc+yd) * onebyfftLen */ - ptr1[4] = p4; - /* yb' = (ya+xb-yc-xd) * onebyfftLen */ - ptr1[5] = p5; - /* xd' = (xa-yb-xc+yd) * onebyfftLen */ - ptr1[6] = p6; - /* yd' = (ya-xb-yc+xd) * onebyfftLen */ - ptr1[7] = p7; - - /* increment source pointer by 8 for next calculations */ - ptr1 = ptr1 + 8U; - - } while (--j); - -#else - - float32_t t1, t2, r1, r2, s1, s2; - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* Calculation of first stage */ - for (k = fftLen; k > 4U; k >>= 2U) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - /* Calculation of first stage */ - j = 0; - do - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - i0 = j; - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* xa + xc */ - r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)]; - - /* xa - xc */ - r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)]; - - /* ya + yc */ - s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; - - /* ya - yc */ - s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; - - /* xb + xd */ - t1 = pSrc[2U * i1] + pSrc[2U * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = r1 + t1; - - /* xa + xc -(xb + xd) */ - r1 = r1 - t1; - - /* yb + yd */ - t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = s1 + t2; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb - yd) */ - t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; - - /* (xb - xd) */ - t2 = pSrc[2U * i1] - pSrc[2U * i3]; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = (r1 * co2) - (s1 * si2); - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = (s1 * co2) + (r1 * si2); - - /* (xa - xc) - (yb - yd) */ - r1 = r2 - t1; - - /* (xa - xc) + (yb - yd) */ - r2 = r2 + t1; - - /* (ya - yc) + (xb - xd) */ - s1 = s2 + t2; - - /* (ya - yc) - (xb - xd) */ - s2 = s2 - t2; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = (r1 * co1) - (s1 * si1); - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = (s1 * co1) + (r1 * si1); - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = (r2 * co3) - (s2 * si3); - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = (s2 * co3) + (r2 * si3); - - i0 += n1; - } while ( i0 < fftLen); - j++; - } while (j <= (n2 - 1U)); - twidCoefModifier <<= 2U; - } - /* Initializations of last stage */ - n1 = n2; - n2 >>= 2U; - - /* Calculations of last stage */ - for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - /* xa + xc */ - r1 = pSrc[2U * i0] + pSrc[2U * i2]; - - /* xa - xc */ - r2 = pSrc[2U * i0] - pSrc[2U * i2]; - - /* ya + yc */ - s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; - - /* ya - yc */ - s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; - - /* xc + xd */ - t1 = pSrc[2U * i1] + pSrc[2U * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = (r1 + t1) * onebyfftLen; - - /* (xa + xb) - (xc + xd) */ - r1 = r1 - t1; - - /* yb + yd */ - t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; - - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = (s1 + t2) * onebyfftLen; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb-yd) */ - t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; - - /* (xb-xd) */ - t2 = pSrc[2U * i1] - pSrc[2U * i3]; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = r1 * onebyfftLen; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = s1 * onebyfftLen; - - /* (xa - xc) - (yb-yd) */ - r1 = r2 - t1; - - /* (xa - xc) + (yb-yd) */ - r2 = r2 + t1; - - /* (ya - yc) + (xb-xd) */ - s1 = s2 + t2; - - /* (ya - yc) - (xb-xd) */ - s2 = s2 - t2; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = r1 * onebyfftLen; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = s1 * onebyfftLen; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = r2 * onebyfftLen; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = s2 * onebyfftLen; - } - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ -} - - diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f16.c deleted file mode 100644 index 26850b8..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f16.c +++ /dev/null @@ -1,171 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix4_init_f16.c - * Description: Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions_f16.h" -#include "arm_common_tables.h" -#include "arm_common_tables_f16.h" - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the floating-point CFFT/CIFFT. - @deprecated Do not use this function. It has been superceded by \ref arm_cfft_f16 and will be removed in the future. - @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure - @param[in] fftLen length of the FFT - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Details - The parameter ifftFlag controls whether a forward or inverse transform is computed. - Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. - */ - -#if defined(ARM_FLOAT16_SUPPORTED) - -arm_status arm_cfft_radix4_init_f16( - arm_cfft_radix4_instance_f16 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096) - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (float16_t *) twiddleCoefF16; - - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024) - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLen) - { - - case 4096U: - /* Initializations of structure parameters for 4096 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.000244140625; - break; - - case 1024U: - /* Initializations of structure parameters for 1024 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 4U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 4U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.0009765625f; - break; - - - case 256U: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16U; - S->bitRevFactor = 16U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - S->onebyfftLen = 0.00390625f; - break; - - case 64U: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64U; - S->bitRevFactor = 64U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - S->onebyfftLen = 0.015625f; - break; - - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256U; - S->bitRevFactor = 256U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - S->onebyfftLen = 0.0625f; - break; - - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - -#endif -#endif -#endif - return (status); -} -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c deleted file mode 100644 index c0558cf..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c +++ /dev/null @@ -1,168 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix4_init_f32.c - * Description: Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Initialization function for the floating-point CFFT/CIFFT. - @deprecated Do not use this function. It has been superceded by \ref arm_cfft_f32 and will be removed in the future. - @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure - @param[in] fftLen length of the FFT - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Details - The parameter ifftFlag controls whether a forward or inverse transform is computed. - Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. - */ - -arm_status arm_cfft_radix4_init_f32( - arm_cfft_radix4_instance_f32 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - - /* Initialise the FFT length */ - S->fftLen = fftLen; - - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (float32_t *) twiddleCoef; - - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLen) - { - - case 4096U: - /* Initializations of structure parameters for 4096 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.000244140625; - break; - - case 1024U: - /* Initializations of structure parameters for 1024 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 4U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 4U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - /* Initialise the 1/fftLen Value */ - S->onebyfftLen = 0.0009765625f; - break; - - - case 256U: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16U; - S->bitRevFactor = 16U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - S->onebyfftLen = 0.00390625f; - break; - - case 64U: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64U; - S->bitRevFactor = 64U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - S->onebyfftLen = 0.015625f; - break; - - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256U; - S->bitRevFactor = 256U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - S->onebyfftLen = 0.0625f; - break; - - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } -#endif -#endif -#endif - - return (status); -} - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c deleted file mode 100644 index 3ea740a..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c +++ /dev/null @@ -1,157 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix4_init_q15.c - * Description: Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - - -/** - @addtogroup ComplexFFT - @{ - */ - - -/** - @brief Initialization function for the Q15 CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future. - @param[in,out] S points to an instance of the Q15 CFFT/CIFFT structure - @param[in] fftLen length of the FFT - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Details - The parameter ifftFlag controls whether a forward or inverse transform is computed. - Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. - */ - -arm_status arm_cfft_radix4_init_q15( - arm_cfft_radix4_instance_q15 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - /* Initialise the FFT length */ - S->fftLen = fftLen; - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (q15_t *) twiddleCoef_4096_q15; - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024) - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLen) - { - case 4096U: - /* Initializations of structure parameters for 4096 point FFT */ - - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - - break; - - case 1024U: - /* Initializations of structure parameters for 1024 point FFT */ - S->twidCoefModifier = 4U; - S->bitRevFactor = 4U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - - break; - - case 256U: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16U; - S->bitRevFactor = 16U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - - break; - - case 64U: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64U; - S->bitRevFactor = 64U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - - break; - - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256U; - S->bitRevFactor = 256U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - - break; - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - -#endif -#endif -#endif - return (status); -} - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c deleted file mode 100644 index 3133fad..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c +++ /dev/null @@ -1,154 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix4_init_q31.c - * Description: Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - - @brief Initialization function for the Q31 CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future. - @param[in,out] S points to an instance of the Q31 CFFT/CIFFT structure. - @param[in] fftLen length of the FFT. - @param[in] ifftFlag flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Details - The parameter ifftFlag controls whether a forward or inverse transform is computed. - Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. -*/ - -arm_status arm_cfft_radix4_init_q31( - arm_cfft_radix4_instance_q31 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag) -{ - - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - /* Initialise the FFT length */ - S->fftLen = fftLen; - /* Initialise the Twiddle coefficient pointer */ - S->pTwiddle = (q31_t *) twiddleCoef_4096_q31; - /* Initialise the Flag for selection of CFFT or CIFFT */ - S->ifftFlag = ifftFlag; - /* Initialise the Flag for calculation Bit reversal or not */ - S->bitReverseFlag = bitReverseFlag; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024) - - /* Initializations of Instance structure depending on the FFT length */ - switch (S->fftLen) - { - /* Initializations of structure parameters for 4096 point FFT */ - case 4096U: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 1U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 1U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) armBitRevTable; - break; - - /* Initializations of structure parameters for 1024 point FFT */ - case 1024U: - /* Initialise the twiddle coef modifier value */ - S->twidCoefModifier = 4U; - /* Initialise the bit reversal table modifier */ - S->bitRevFactor = 4U; - /* Initialise the bit reversal table pointer */ - S->pBitRevTable = (uint16_t *) & armBitRevTable[3]; - break; - - case 256U: - /* Initializations of structure parameters for 256 point FFT */ - S->twidCoefModifier = 16U; - S->bitRevFactor = 16U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[15]; - break; - - case 64U: - /* Initializations of structure parameters for 64 point FFT */ - S->twidCoefModifier = 64U; - S->bitRevFactor = 64U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[63]; - break; - - case 16U: - /* Initializations of structure parameters for 16 point FFT */ - S->twidCoefModifier = 256U; - S->bitRevFactor = 256U; - S->pBitRevTable = (uint16_t *) & armBitRevTable[255]; - break; - - default: - /* Reporting argument error if fftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - -#endif -#endif -#endif - return (status); -} - -/** - @} end of ComplexFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c deleted file mode 100644 index 98eced8..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c +++ /dev/null @@ -1,1809 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix4_q15.c - * Description: This file has function definition of Radix-4 FFT & IFFT function and - * In-place bit reversal using bit reversal table - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - - -void arm_radix4_butterfly_q15( - q15_t * pSrc16, - uint32_t fftLen, - const q15_t * pCoef16, - uint32_t twidCoefModifier); - -void arm_radix4_butterfly_inverse_q15( - q15_t * pSrc16, - uint32_t fftLen, - const q15_t * pCoef16, - uint32_t twidCoefModifier); - -void arm_bitreversal_q15( - q15_t * pSrc, - uint32_t fftLen, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab); - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - - -/** - @brief Processing function for the Q15 CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future. - @param[in] S points to an instance of the Q15 CFFT/CIFFT structure. - @param[in,out] pSrc points to the complex data buffer. Processing occurs in-place. - @return none - - @par Input and output formats: - Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. - Hence the output format is different for different FFT sizes. - The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT: - @par - \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT" - \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT" - */ - -void arm_cfft_radix4_q15( - const arm_cfft_radix4_instance_q15 * S, - q15_t * pSrc) -{ - if (S->ifftFlag == 1U) - { - /* Complex IFFT radix-4 */ - arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); - } - else - { - /* Complex FFT radix-4 */ - arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); - } - - if (S->bitReverseFlag == 1U) - { - /* Bit Reversal */ - arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); - } - -} - -/** - @} end of ComplexFFT group - */ - -/* - * Radix-4 FFT algorithm used is : - * - * Input real and imaginary data: - * x(n) = xa + j * ya - * x(n+N/4 ) = xb + j * yb - * x(n+N/2 ) = xc + j * yc - * x(n+3N 4) = xd + j * yd - * - * - * Output real and imaginary data: - * x(4r) = xa'+ j * ya' - * x(4r+1) = xb'+ j * yb' - * x(4r+2) = xc'+ j * yc' - * x(4r+3) = xd'+ j * yd' - * - * - * Twiddle factors for radix-4 FFT: - * Wn = co1 + j * (- si1) - * W2n = co2 + j * (- si2) - * W3n = co3 + j * (- si3) - - * The real and imaginary output values for the radix-4 butterfly are - * xa' = xa + xb + xc + xd - * ya' = ya + yb + yc + yd - * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) - * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) - * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) - * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) - * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) - * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) - * - */ - -/** - @brief Core function for the Q15 CFFT butterfly process. - @param[in,out] pSrc16 points to the in-place buffer of Q15 data type - @param[in] fftLen length of the FFT - @param[in] pCoef16 points to twiddle coefficient buffer - @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table - @return none - */ - -void arm_radix4_butterfly_q15( - q15_t * pSrc16, - uint32_t fftLen, - const q15_t * pCoef16, - uint32_t twidCoefModifier) -{ - -#if defined (ARM_MATH_DSP) - - q31_t R, S, T, U; - q31_t C1, C2, C3, out1, out2; - uint32_t n1, n2, ic, i0, j, k; - - q15_t *ptr1; - q15_t *pSi0; - q15_t *pSi1; - q15_t *pSi2; - q15_t *pSi3; - - q31_t xaya, xbyb, xcyc, xdyd; - - /* Total process is divided into three stages */ - - /* process first stage, middle stages, & last stage */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2U; - - /* Index for twiddle coefficient */ - ic = 0U; - - /* Index for input read and output write */ - j = n2; - - pSi0 = pSrc16; - pSi1 = pSi0 + 2 * n2; - pSi2 = pSi1 + 2 * n2; - pSi3 = pSi2 + 2 * n2; - - /* Input is in 1.15(q15) format */ - - /* start of first stage process */ - do - { - /* Butterfly implementation */ - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T = read_q15x2 (pSi0); - T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */ - T = __SHADD16(T, 0); /* it turns out doing this twice is 2 cycles, the alternative takes 3 cycles */ -/* - in = ((int16_t) (T & 0xFFFF)) >> 2; // alternative code that takes 3 cycles - T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF); -*/ - - /* Read yc (real), xc(imag) input */ - S = read_q15x2 (pSi2); - S = __SHADD16(S, 0); - S = __SHADD16(S, 0); - - /* R = packed((ya + yc), (xa + xc) ) */ - R = __QADD16(T, S); - - /* S = packed((ya - yc), (xa - xc) ) */ - S = __QSUB16(T, S); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T = read_q15x2 (pSi1); - T = __SHADD16(T, 0); - T = __SHADD16(T, 0); - - /* Read yd (real), xd(imag) input */ - U = read_q15x2 (pSi3); - U = __SHADD16(U, 0); - U = __SHADD16(U, 0); - - /* T = packed((yb + yd), (xb + xd) ) */ - T = __QADD16(T, U); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - write_q15x2_ia (&pSi0, __SHADD16(R, T)); - - /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */ - R = __QSUB16(R, T); - - /* co2 & si2 are read from SIMD Coefficient pointer */ - C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic)); - -#ifndef ARM_MATH_BIG_ENDIAN - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - out1 = __SMUAD(C2, R) >> 16U; - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = __SMUSDX(C2, R); -#else - /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out1 = __SMUSDX(R, C2) >> 16U; - /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - out2 = __SMUAD(C2, R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Reading i0+fftLen/4 */ - /* T = packed(yb, xb) */ - T = read_q15x2 (pSi1); - T = __SHADD16(T, 0); - T = __SHADD16(T, 0); - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* writing output(xc', yc') in little endian format */ - write_q15x2_ia (&pSi1, (q31_t) __PKHBT( out1, out2, 0 )); - - /* Butterfly calculations */ - /* U = packed(yd, xd) */ - U = read_q15x2 (pSi3); - U = __SHADD16(U, 0); - U = __SHADD16(U, 0); - - /* T = packed(yb-yd, xb-xd) */ - T = __QSUB16(T, U); - -#ifndef ARM_MATH_BIG_ENDIAN - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __QASX(S, T); - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __QSAX(S, T); -#else - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __QSAX(S, T); - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __QASX(S, T); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* co1 & si1 are read from SIMD Coefficient pointer */ - C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic)); - /* Butterfly process for the i0+fftLen/2 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - out1 = __SMUAD(C1, S) >> 16U; - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - out2 = __SMUSDX(C1, S); -#else - /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - out1 = __SMUSDX(S, C1) >> 16U; - /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - out2 = __SMUAD(C1, S); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* writing output(xb', yb') in little endian format */ - write_q15x2_ia (&pSi2, __PKHBT( out1, out2, 0 )); - - /* co3 & si3 are read from SIMD Coefficient pointer */ - C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic)); - /* Butterfly process for the i0+3fftLen/4 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - out1 = __SMUAD(C3, R) >> 16U; - /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - out2 = __SMUSDX(C3, R); -#else - /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - out1 = __SMUSDX(R, C3) >> 16U; - /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - out2 = __SMUAD(C3, R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* writing output(xd', yd') in little endian format */ - write_q15x2_ia (&pSi3, __PKHBT( out1, out2, 0 )); - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - } while (--j); - /* data is in 4.11(q11) format */ - - /* end of first stage process */ - - - /* start of middle stage process */ - - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2U; - - /* Calculation of Middle stage */ - for (k = fftLen / 4U; k > 4U; k >>= 2U) - { - /* Initializations for the middle stage */ - n1 = n2; - n2 >>= 2U; - ic = 0U; - - for (j = 0U; j <= (n2 - 1U); j++) - { - /* index calculation for the coefficients */ - C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic)); - C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic)); - C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic)); - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - pSi0 = pSrc16 + 2 * j; - pSi1 = pSi0 + 2 * n2; - pSi2 = pSi1 + 2 * n2; - pSi3 = pSi2 + 2 * n2; - - /* Butterfly implementation */ - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T = read_q15x2 (pSi0); - - /* Read yc (real), xc(imag) input */ - S = read_q15x2 (pSi2); - - /* R = packed( (ya + yc), (xa + xc)) */ - R = __QADD16(T, S); - - /* S = packed((ya - yc), (xa - xc)) */ - S = __QSUB16(T, S); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T = read_q15x2 (pSi1); - - /* Read yd (real), xd(imag) input */ - U = read_q15x2 (pSi3); - - /* T = packed( (yb + yd), (xb + xd)) */ - T = __QADD16(T, U); - - /* writing the butterfly processed i0 sample */ - - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - out1 = __SHADD16(R, T); - out1 = __SHADD16(out1, 0); - write_q15x2 (pSi0, out1); - pSi0 += 2 * n1; - - /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */ - R = __SHSUB16(R, T); - -#ifndef ARM_MATH_BIG_ENDIAN - /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ - out1 = __SMUAD(C2, R) >> 16U; - - /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = __SMUSDX(C2, R); -#else - /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out1 = __SMUSDX(R, C2) >> 16U; - - /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ - out2 = __SMUAD(C2, R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Reading i0+3fftLen/4 */ - /* Read yb (real), xb(imag) input */ - T = read_q15x2 (pSi1); - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - write_q15x2 (pSi1, __PKHBT( out1, out2, 0 )); - pSi1 += 2 * n1; - - /* Butterfly calculations */ - - /* Read yd (real), xd(imag) input */ - U = read_q15x2 (pSi3); - - /* T = packed(yb-yd, xb-xd) */ - T = __QSUB16(T, U); - -#ifndef ARM_MATH_BIG_ENDIAN - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __SHASX(S, T); - - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __SHSAX(S, T); - - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = __SMUAD(C1, S) >> 16U; - out2 = __SMUSDX(C1, S); -#else - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __SHSAX(S, T); - - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __SHASX(S, T); - - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = __SMUSDX(S, C1) >> 16U; - out2 = __SMUAD(C1, S); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - write_q15x2 (pSi2, __PKHBT( out1, out2, 0 )); - pSi2 += 2 * n1; - - /* Butterfly process for the i0+3fftLen/4 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUAD(C3, R) >> 16U; - out2 = __SMUSDX(C3, R); -#else - out1 = __SMUSDX(R, C3) >> 16U; - out2 = __SMUAD(C3, R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - write_q15x2 (pSi3, __PKHBT( out1, out2, 0 )); - pSi3 += 2 * n1; - } - } - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2U; - } - /* end of middle stage process */ - - - /* data is in 10.6(q6) format for the 1024 point */ - /* data is in 8.8(q8) format for the 256 point */ - /* data is in 6.10(q10) format for the 64 point */ - /* data is in 4.12(q12) format for the 16 point */ - - /* Initializations for the last stage */ - j = fftLen >> 2; - - ptr1 = &pSrc16[0]; - - /* start of last stage process */ - - /* Butterfly implementation */ - do - { - /* Read xa (real), ya(imag) input */ - xaya = read_q15x2_ia (&ptr1); - - /* Read xb (real), yb(imag) input */ - xbyb = read_q15x2_ia (&ptr1); - - /* Read xc (real), yc(imag) input */ - xcyc = read_q15x2_ia (&ptr1); - - /* Read xd (real), yd(imag) input */ - xdyd = read_q15x2_ia (&ptr1); - - /* R = packed((ya + yc), (xa + xc)) */ - R = __QADD16(xaya, xcyc); - - /* T = packed((yb + yd), (xb + xd)) */ - T = __QADD16(xbyb, xdyd); - - /* pointer updation for writing */ - ptr1 = ptr1 - 8U; - - - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - write_q15x2_ia (&ptr1, __SHADD16(R, T)); - - /* T = packed((yb + yd), (xb + xd)) */ - T = __QADD16(xbyb, xdyd); - - /* xc' = (xa-xb+xc-xd) */ - /* yc' = (ya-yb+yc-yd) */ - write_q15x2_ia (&ptr1, __SHSUB16(R, T)); - - /* S = packed((ya - yc), (xa - xc)) */ - S = __QSUB16(xaya, xcyc); - - /* Read yd (real), xd(imag) input */ - /* T = packed( (yb - yd), (xb - xd)) */ - U = __QSUB16(xbyb, xdyd); - -#ifndef ARM_MATH_BIG_ENDIAN - /* xb' = (xa+yb-xc-yd) */ - /* yb' = (ya-xb-yc+xd) */ - write_q15x2_ia (&ptr1, __SHSAX(S, U)); - - /* xd' = (xa-yb-xc+yd) */ - /* yd' = (ya+xb-yc-xd) */ - write_q15x2_ia (&ptr1, __SHASX(S, U)); -#else - /* xb' = (xa+yb-xc-yd) */ - /* yb' = (ya-xb-yc+xd) */ - write_q15x2_ia (&ptr1, __SHASX(S, U)); - - /* xd' = (xa-yb-xc+yd) */ - /* yd' = (ya+xb-yc-xd) */ - write_q15x2_ia (&ptr1, __SHSAX(S, U)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - } while (--j); - - /* end of last stage process */ - - /* output is in 11.5(q5) format for the 1024 point */ - /* output is in 9.7(q7) format for the 256 point */ - /* output is in 7.9(q9) format for the 64 point */ - /* output is in 5.11(q11) format for the 16 point */ - - -#else /* #if defined (ARM_MATH_DSP) */ - - q15_t R0, R1, S0, S1, T0, T1, U0, U1; - q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2; - uint32_t n1, n2, ic, i0, i1, i2, i3, j, k; - - /* Total process is divided into three stages */ - - /* process first stage, middle stages, & last stage */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2U; - - /* Index for twiddle coefficient */ - ic = 0U; - - /* Index for input read and output write */ - i0 = 0U; - j = n2; - - /* Input is in 1.15(q15) format */ - - /* start of first stage process */ - do - { - /* Butterfly implementation */ - - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - - /* input is down scale by 4 to avoid overflow */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2U] >> 2U; - T1 = pSrc16[(i0 * 2U) + 1U] >> 2U; - - /* input is down scale by 4 to avoid overflow */ - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2U] >> 2U; - S1 = pSrc16[(i2 * 2U) + 1U] >> 2U; - - /* R0 = (ya + yc) */ - R0 = __SSAT(T0 + S0, 16U); - /* R1 = (xa + xc) */ - R1 = __SSAT(T1 + S1, 16U); - - /* S0 = (ya - yc) */ - S0 = __SSAT(T0 - S0, 16); - /* S1 = (xa - xc) */ - S1 = __SSAT(T1 - S1, 16); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* input is down scale by 4 to avoid overflow */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2U] >> 2U; - T1 = pSrc16[(i1 * 2U) + 1U] >> 2U; - - /* input is down scale by 4 to avoid overflow */ - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2U] >> 2U; - U1 = pSrc16[(i3 * 2U) + 1] >> 2U; - - /* T0 = (yb + yd) */ - T0 = __SSAT(T0 + U0, 16U); - /* T1 = (xb + xd) */ - T1 = __SSAT(T1 + U1, 16U); - - /* writing the butterfly processed i0 sample */ - /* ya' = ya + yb + yc + yd */ - /* xa' = xa + xb + xc + xd */ - pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U); - pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U); - - /* R0 = (ya + yc) - (yb + yd) */ - /* R1 = (xa + xc) - (xb + xd) */ - R0 = __SSAT(R0 - T0, 16U); - R1 = __SSAT(R1 - T1, 16U); - - /* co2 & si2 are read from Coefficient pointer */ - Co2 = pCoef16[2U * ic * 2U]; - Si2 = pCoef16[(2U * ic * 2U) + 1]; - - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16U); - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16U); - - /* Reading i0+fftLen/4 */ - /* input is down scale by 4 to avoid overflow */ - /* T0 = yb, T1 = xb */ - T0 = pSrc16[i1 * 2U] >> 2; - T1 = pSrc16[(i1 * 2U) + 1] >> 2; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* writing output(xc', yc') in little endian format */ - pSrc16[i1 * 2U] = out1; - pSrc16[(i1 * 2U) + 1] = out2; - - /* Butterfly calculations */ - /* input is down scale by 4 to avoid overflow */ - /* U0 = yd, U1 = xd */ - U0 = pSrc16[i3 * 2U] >> 2; - U1 = pSrc16[(i3 * 2U) + 1] >> 2; - /* T0 = yb-yd */ - T0 = __SSAT(T0 - U0, 16); - /* T1 = xb-xd */ - T1 = __SSAT(T1 - U1, 16); - - /* R1 = (ya-yc) + (xb- xd), R0 = (xa-xc) - (yb-yd)) */ - R0 = (q15_t) __SSAT((q31_t) (S0 - T1), 16); - R1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16); - - /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */ - S0 = (q15_t) __SSAT(((q31_t) S0 + T1), 16U); - S1 = (q15_t) __SSAT(((q31_t) S1 - T0), 16U); - - /* co1 & si1 are read from Coefficient pointer */ - Co1 = pCoef16[ic * 2U]; - Si1 = pCoef16[(ic * 2U) + 1]; - /* Butterfly process for the i0+fftLen/2 sample */ - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - out1 = (q15_t) ((Si1 * S1 + Co1 * S0) >> 16); - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16); - - /* writing output(xb', yb') in little endian format */ - pSrc16[i2 * 2U] = out1; - pSrc16[(i2 * 2U) + 1] = out2; - - /* Co3 & si3 are read from Coefficient pointer */ - Co3 = pCoef16[3U * (ic * 2U)]; - Si3 = pCoef16[(3U * (ic * 2U)) + 1]; - /* Butterfly process for the i0+3fftLen/4 sample */ - /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */ - out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16U); - /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */ - out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16U); - /* writing output(xd', yd') in little endian format */ - pSrc16[i3 * 2U] = out1; - pSrc16[(i3 * 2U) + 1] = out2; - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1U; - - } while (--j); - /* data is in 4.11(q11) format */ - - /* end of first stage process */ - - - /* start of middle stage process */ - - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2U; - - /* Calculation of Middle stage */ - for (k = fftLen / 4U; k > 4U; k >>= 2U) - { - /* Initializations for the middle stage */ - n1 = n2; - n2 >>= 2U; - ic = 0U; - - for (j = 0U; j <= (n2 - 1U); j++) - { - /* index calculation for the coefficients */ - Co1 = pCoef16[ic * 2U]; - Si1 = pCoef16[(ic * 2U) + 1U]; - Co2 = pCoef16[2U * (ic * 2U)]; - Si2 = pCoef16[(2U * (ic * 2U)) + 1U]; - Co3 = pCoef16[3U * (ic * 2U)]; - Si3 = pCoef16[(3U * (ic * 2U)) + 1U]; - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Butterfly implementation */ - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2U]; - T1 = pSrc16[(i0 * 2U) + 1U]; - - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2U]; - S1 = pSrc16[(i2 * 2U) + 1U]; - - /* R0 = (ya + yc), R1 = (xa + xc) */ - R0 = __SSAT(T0 + S0, 16); - R1 = __SSAT(T1 + S1, 16); - - /* S0 = (ya - yc), S1 =(xa - xc) */ - S0 = __SSAT(T0 - S0, 16); - S1 = __SSAT(T1 - S1, 16); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2U]; - T1 = pSrc16[(i1 * 2U) + 1U]; - - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2U]; - U1 = pSrc16[(i3 * 2U) + 1U]; - - - /* T0 = (yb + yd), T1 = (xb + xd) */ - T0 = __SSAT(T0 + U0, 16); - T1 = __SSAT(T1 + U1, 16); - - /* writing the butterfly processed i0 sample */ - - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - out1 = ((R0 >> 1U) + (T0 >> 1U)) >> 1U; - out2 = ((R1 >> 1U) + (T1 >> 1U)) >> 1U; - - pSrc16[i0 * 2U] = out1; - pSrc16[(2U * i0) + 1U] = out2; - - /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ - R0 = (R0 >> 1U) - (T0 >> 1U); - R1 = (R1 >> 1U) - (T1 >> 1U); - - /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ - out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16U); - - /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16U); - - /* Reading i0+3fftLen/4 */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2U]; - T1 = pSrc16[(i1 * 2U) + 1U]; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - pSrc16[i1 * 2U] = out1; - pSrc16[(i1 * 2U) + 1U] = out2; - - /* Butterfly calculations */ - - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2U]; - U1 = pSrc16[(i3 * 2U) + 1U]; - - /* T0 = yb-yd, T1 = xb-xd */ - T0 = __SSAT(T0 - U0, 16); - T1 = __SSAT(T1 - U1, 16); - - /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */ - R0 = (S0 >> 1U) - (T1 >> 1U); - R1 = (S1 >> 1U) + (T0 >> 1U); - - /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */ - S0 = (S0 >> 1U) + (T1 >> 1U); - S1 = (S1 >> 1U) - (T0 >> 1U); - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = (q15_t) ((Co1 * S0 + Si1 * S1) >> 16U); - - out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16U); - - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - pSrc16[i2 * 2U] = out1; - pSrc16[(i2 * 2U) + 1U] = out2; - - /* Butterfly process for the i0+3fftLen/4 sample */ - out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16U); - - out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16U); - /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */ - /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */ - pSrc16[i3 * 2U] = out1; - pSrc16[(i3 * 2U) + 1U] = out2; - } - } - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2U; - } - /* end of middle stage process */ - - - /* data is in 10.6(q6) format for the 1024 point */ - /* data is in 8.8(q8) format for the 256 point */ - /* data is in 6.10(q10) format for the 64 point */ - /* data is in 4.12(q12) format for the 16 point */ - - /* Initializations for the last stage */ - n1 = n2; - n2 >>= 2U; - - /* start of last stage process */ - - /* Butterfly implementation */ - for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2U]; - T1 = pSrc16[(i0 * 2U) + 1U]; - - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2U]; - S1 = pSrc16[(i2 * 2U) + 1U]; - - /* R0 = (ya + yc), R1 = (xa + xc) */ - R0 = __SSAT(T0 + S0, 16U); - R1 = __SSAT(T1 + S1, 16U); - - /* S0 = (ya - yc), S1 = (xa - xc) */ - S0 = __SSAT(T0 - S0, 16U); - S1 = __SSAT(T1 - S1, 16U); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2U]; - T1 = pSrc16[(i1 * 2U) + 1U]; - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2U]; - U1 = pSrc16[(i3 * 2U) + 1U]; - - /* T0 = (yb + yd), T1 = (xb + xd)) */ - T0 = __SSAT(T0 + U0, 16U); - T1 = __SSAT(T1 + U1, 16U); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U); - pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U); - - /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ - R0 = (R0 >> 1U) - (T0 >> 1U); - R1 = (R1 >> 1U) - (T1 >> 1U); - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2U]; - T1 = pSrc16[(i1 * 2U) + 1U]; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd) */ - /* yc' = (ya-yb+yc-yd) */ - pSrc16[i1 * 2U] = R0; - pSrc16[(i1 * 2U) + 1U] = R1; - - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2U]; - U1 = pSrc16[(i3 * 2U) + 1U]; - /* T0 = (yb - yd), T1 = (xb - xd) */ - T0 = __SSAT(T0 - U0, 16U); - T1 = __SSAT(T1 - U1, 16U); - - /* writing the butterfly processed i0 + fftLen/2 sample */ - /* xb' = (xa+yb-xc-yd) */ - /* yb' = (ya-xb-yc+xd) */ - pSrc16[i2 * 2U] = (S0 >> 1U) + (T1 >> 1U); - pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U); - - /* writing the butterfly processed i0 + 3fftLen/4 sample */ - /* xd' = (xa-yb-xc+yd) */ - /* yd' = (ya+xb-yc-xd) */ - pSrc16[i3 * 2U] = (S0 >> 1U) - (T1 >> 1U); - pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U); - - } - - /* end of last stage process */ - - /* output is in 11.5(q5) format for the 1024 point */ - /* output is in 9.7(q7) format for the 256 point */ - /* output is in 7.9(q9) format for the 64 point */ - /* output is in 5.11(q11) format for the 16 point */ - -#endif /* #if defined (ARM_MATH_DSP) */ - -} - - -/** - @brief Core function for the Q15 CIFFT butterfly process. - @param[in,out] pSrc16 points to the in-place buffer of Q15 data type - @param[in] fftLen length of the FFT - @param[in] pCoef16 points to twiddle coefficient buffer - @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - @return none - */ - -/* - * Radix-4 IFFT algorithm used is : - * - * CIFFT uses same twiddle coefficients as CFFT function - * x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4] - * - * - * IFFT is implemented with following changes in equations from FFT - * - * Input real and imaginary data: - * x(n) = xa + j * ya - * x(n+N/4 ) = xb + j * yb - * x(n+N/2 ) = xc + j * yc - * x(n+3N 4) = xd + j * yd - * - * - * Output real and imaginary data: - * x(4r) = xa'+ j * ya' - * x(4r+1) = xb'+ j * yb' - * x(4r+2) = xc'+ j * yc' - * x(4r+3) = xd'+ j * yd' - * - * - * Twiddle factors for radix-4 IFFT: - * Wn = co1 + j * (si1) - * W2n = co2 + j * (si2) - * W3n = co3 + j * (si3) - - * The real and imaginary output values for the radix-4 butterfly are - * xa' = xa + xb + xc + xd - * ya' = ya + yb + yc + yd - * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) - * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) - * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) - * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) - * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) - * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) - * - */ - -void arm_radix4_butterfly_inverse_q15( - q15_t * pSrc16, - uint32_t fftLen, - const q15_t * pCoef16, - uint32_t twidCoefModifier) -{ - -#if defined (ARM_MATH_DSP) - - q31_t R, S, T, U; - q31_t C1, C2, C3, out1, out2; - uint32_t n1, n2, ic, i0, j, k; - - q15_t *ptr1; - q15_t *pSi0; - q15_t *pSi1; - q15_t *pSi2; - q15_t *pSi3; - - q31_t xaya, xbyb, xcyc, xdyd; - - /* Total process is divided into three stages */ - - /* process first stage, middle stages, & last stage */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2U; - - /* Index for twiddle coefficient */ - ic = 0U; - - /* Index for input read and output write */ - j = n2; - - pSi0 = pSrc16; - pSi1 = pSi0 + 2 * n2; - pSi2 = pSi1 + 2 * n2; - pSi3 = pSi2 + 2 * n2; - - /* Input is in 1.15(q15) format */ - - /* start of first stage process */ - do - { - /* Butterfly implementation */ - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T = read_q15x2 (pSi0); - T = __SHADD16(T, 0); - T = __SHADD16(T, 0); - - /* Read yc (real), xc(imag) input */ - S = read_q15x2 (pSi2); - S = __SHADD16(S, 0); - S = __SHADD16(S, 0); - - /* R = packed((ya + yc), (xa + xc) ) */ - R = __QADD16(T, S); - - /* S = packed((ya - yc), (xa - xc) ) */ - S = __QSUB16(T, S); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T = read_q15x2 (pSi1); - T = __SHADD16(T, 0); - T = __SHADD16(T, 0); - - /* Read yd (real), xd(imag) input */ - U = read_q15x2 (pSi3); - U = __SHADD16(U, 0); - U = __SHADD16(U, 0); - - /* T = packed((yb + yd), (xb + xd) ) */ - T = __QADD16(T, U); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - write_q15x2_ia (&pSi0, __SHADD16(R, T)); - - /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */ - R = __QSUB16(R, T); - - /* co2 & si2 are read from SIMD Coefficient pointer */ - C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic)); - -#ifndef ARM_MATH_BIG_ENDIAN - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - out1 = __SMUSD(C2, R) >> 16U; - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = __SMUADX(C2, R); -#else - /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out1 = __SMUADX(C2, R) >> 16U; - /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - out2 = __SMUSD(__QSUB16(0, C2), R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Reading i0+fftLen/4 */ - /* T = packed(yb, xb) */ - T = read_q15x2 (pSi1); - T = __SHADD16(T, 0); - T = __SHADD16(T, 0); - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* writing output(xc', yc') in little endian format */ - write_q15x2_ia (&pSi1, (q31_t) __PKHBT( out1, out2, 0 )); - - /* Butterfly calculations */ - /* U = packed(yd, xd) */ - U = read_q15x2 (pSi3); - U = __SHADD16(U, 0); - U = __SHADD16(U, 0); - - /* T = packed(yb-yd, xb-xd) */ - T = __QSUB16(T, U); - -#ifndef ARM_MATH_BIG_ENDIAN - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __QSAX(S, T); - /* S = packed((ya-yc) + (xb- xd), (xa-xc) - (yb-yd)) */ - S = __QASX(S, T); -#else - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __QASX(S, T); - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __QSAX(S, T); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* co1 & si1 are read from SIMD Coefficient pointer */ - C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic)); - /* Butterfly process for the i0+fftLen/2 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - out1 = __SMUSD(C1, S) >> 16U; - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - out2 = __SMUADX(C1, S); -#else - /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - out1 = __SMUADX(C1, S) >> 16U; - /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - out2 = __SMUSD(__QSUB16(0, C1), S); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* writing output(xb', yb') in little endian format */ - write_q15x2_ia (&pSi2, __PKHBT( out1, out2, 0 )); - - /* co3 & si3 are read from SIMD Coefficient pointer */ - C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic)); - /* Butterfly process for the i0+3fftLen/4 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - out1 = __SMUSD(C3, R) >> 16U; - /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - out2 = __SMUADX(C3, R); -#else - /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - out1 = __SMUADX(C3, R) >> 16U; - /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - out2 = __SMUSD(__QSUB16(0, C3), R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* writing output(xd', yd') in little endian format */ - write_q15x2_ia (&pSi3, __PKHBT( out1, out2, 0 )); - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - } while (--j); - /* data is in 4.11(q11) format */ - - /* end of first stage process */ - - - /* start of middle stage process */ - - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2U; - - /* Calculation of Middle stage */ - for (k = fftLen / 4U; k > 4U; k >>= 2U) - { - /* Initializations for the middle stage */ - n1 = n2; - n2 >>= 2U; - ic = 0U; - - for (j = 0U; j <= (n2 - 1U); j++) - { - /* index calculation for the coefficients */ - C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic)); - C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic)); - C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic)); - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - pSi0 = pSrc16 + 2 * j; - pSi1 = pSi0 + 2 * n2; - pSi2 = pSi1 + 2 * n2; - pSi3 = pSi2 + 2 * n2; - - /* Butterfly implementation */ - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T = read_q15x2 (pSi0); - - /* Read yc (real), xc(imag) input */ - S = read_q15x2 (pSi2); - - /* R = packed( (ya + yc), (xa + xc)) */ - R = __QADD16(T, S); - - /* S = packed((ya - yc), (xa - xc)) */ - S = __QSUB16(T, S); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T = read_q15x2 (pSi1); - - /* Read yd (real), xd(imag) input */ - U = read_q15x2 (pSi3); - - /* T = packed( (yb + yd), (xb + xd)) */ - T = __QADD16(T, U); - - /* writing the butterfly processed i0 sample */ - - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - out1 = __SHADD16(R, T); - out1 = __SHADD16(out1, 0); - write_q15x2 (pSi0, out1); - pSi0 += 2 * n1; - - /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */ - R = __SHSUB16(R, T); - -#ifndef ARM_MATH_BIG_ENDIAN - /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ - out1 = __SMUSD(C2, R) >> 16U; - - /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out2 = __SMUADX(C2, R); -#else - /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - out1 = __SMUADX(R, C2) >> 16U; - - /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */ - out2 = __SMUSD(__QSUB16(0, C2), R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Reading i0+3fftLen/4 */ - /* Read yb (real), xb(imag) input */ - T = read_q15x2 (pSi1); - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */ - /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */ - write_q15x2 (pSi1, __PKHBT( out1, out2, 0 )); - pSi1 += 2 * n1; - - /* Butterfly calculations */ - - /* Read yd (real), xd(imag) input */ - U = read_q15x2 (pSi3); - - /* T = packed(yb-yd, xb-xd) */ - T = __QSUB16(T, U); - -#ifndef ARM_MATH_BIG_ENDIAN - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __SHSAX(S, T); - - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __SHASX(S, T); - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = __SMUSD(C1, S) >> 16U; - out2 = __SMUADX(C1, S); -#else - /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */ - R = __SHASX(S, T); - - /* S = packed((ya-yc) - (xb- xd), (xa-xc) + (yb-yd)) */ - S = __SHSAX(S, T); - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = __SMUADX(S, C1) >> 16U; - out2 = __SMUSD(__QSUB16(0, C1), S); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */ - /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */ - write_q15x2 (pSi2, __PKHBT( out1, out2, 0 )); - pSi2 += 2 * n1; - - /* Butterfly process for the i0+3fftLen/4 sample */ - -#ifndef ARM_MATH_BIG_ENDIAN - out1 = __SMUSD(C3, R) >> 16U; - out2 = __SMUADX(C3, R); -#else - out1 = __SMUADX(C3, R) >> 16U; - out2 = __SMUSD(__QSUB16(0, C3), R); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */ - /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */ - write_q15x2 (pSi3, __PKHBT( out1, out2, 0 )); - pSi3 += 2 * n1; - } - } - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2U; - } - /* end of middle stage process */ - - /* data is in 10.6(q6) format for the 1024 point */ - /* data is in 8.8(q8) format for the 256 point */ - /* data is in 6.10(q10) format for the 64 point */ - /* data is in 4.12(q12) format for the 16 point */ - - /* Initializations for the last stage */ - j = fftLen >> 2; - - ptr1 = &pSrc16[0]; - - /* start of last stage process */ - - /* Butterfly implementation */ - do - { - /* Read xa (real), ya(imag) input */ - xaya = read_q15x2_ia (&ptr1); - - /* Read xb (real), yb(imag) input */ - xbyb = read_q15x2_ia (&ptr1); - - /* Read xc (real), yc(imag) input */ - xcyc = read_q15x2_ia (&ptr1); - - /* Read xd (real), yd(imag) input */ - xdyd = read_q15x2_ia (&ptr1); - - /* R = packed((ya + yc), (xa + xc)) */ - R = __QADD16(xaya, xcyc); - - /* T = packed((yb + yd), (xb + xd)) */ - T = __QADD16(xbyb, xdyd); - - /* pointer updation for writing */ - ptr1 = ptr1 - 8U; - - - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - write_q15x2_ia (&ptr1, __SHADD16(R, T)); - - /* T = packed((yb + yd), (xb + xd)) */ - T = __QADD16(xbyb, xdyd); - - /* xc' = (xa-xb+xc-xd) */ - /* yc' = (ya-yb+yc-yd) */ - write_q15x2_ia (&ptr1, __SHSUB16(R, T)); - - /* S = packed((ya - yc), (xa - xc)) */ - S = __QSUB16(xaya, xcyc); - - /* Read yd (real), xd(imag) input */ - /* T = packed( (yb - yd), (xb - xd)) */ - U = __QSUB16(xbyb, xdyd); - -#ifndef ARM_MATH_BIG_ENDIAN - /* xb' = (xa+yb-xc-yd) */ - /* yb' = (ya-xb-yc+xd) */ - write_q15x2_ia (&ptr1, __SHASX(S, U)); - - /* xd' = (xa-yb-xc+yd) */ - /* yd' = (ya+xb-yc-xd) */ - write_q15x2_ia (&ptr1, __SHSAX(S, U)); -#else - /* xb' = (xa+yb-xc-yd) */ - /* yb' = (ya-xb-yc+xd) */ - write_q15x2_ia (&ptr1, __SHSAX(S, U)); - - /* xd' = (xa-yb-xc+yd) */ - /* yd' = (ya+xb-yc-xd) */ - write_q15x2_ia (&ptr1, __SHASX(S, U)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - } while (--j); - - /* end of last stage process */ - - /* output is in 11.5(q5) format for the 1024 point */ - /* output is in 9.7(q7) format for the 256 point */ - /* output is in 7.9(q9) format for the 64 point */ - /* output is in 5.11(q11) format for the 16 point */ - - -#else /* arm_radix4_butterfly_inverse_q15 */ - - q15_t R0, R1, S0, S1, T0, T1, U0, U1; - q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2; - uint32_t n1, n2, ic, i0, i1, i2, i3, j, k; - - /* Total process is divided into three stages */ - - /* process first stage, middle stages, & last stage */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - - /* n2 = fftLen/4 */ - n2 >>= 2U; - - /* Index for twiddle coefficient */ - ic = 0U; - - /* Index for input read and output write */ - i0 = 0U; - - j = n2; - - /* Input is in 1.15(q15) format */ - - /* Start of first stage process */ - do - { - /* Butterfly implementation */ - - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* input is down scale by 4 to avoid overflow */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2U] >> 2U; - T1 = pSrc16[(i0 * 2U) + 1U] >> 2U; - /* input is down scale by 4 to avoid overflow */ - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2U] >> 2U; - S1 = pSrc16[(i2 * 2U) + 1U] >> 2U; - - /* R0 = (ya + yc), R1 = (xa + xc) */ - R0 = __SSAT(T0 + S0, 16U); - R1 = __SSAT(T1 + S1, 16U); - /* S0 = (ya - yc), S1 = (xa - xc) */ - S0 = __SSAT(T0 - S0, 16U); - S1 = __SSAT(T1 - S1, 16U); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* input is down scale by 4 to avoid overflow */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2U] >> 2U; - T1 = pSrc16[(i1 * 2U) + 1U] >> 2U; - /* Read yd (real), xd(imag) input */ - /* input is down scale by 4 to avoid overflow */ - U0 = pSrc16[i3 * 2U] >> 2U; - U1 = pSrc16[(i3 * 2U) + 1U] >> 2U; - - /* T0 = (yb + yd), T1 = (xb + xd) */ - T0 = __SSAT(T0 + U0, 16U); - T1 = __SSAT(T1 + U1, 16U); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U); - pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U); - - /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */ - R0 = __SSAT(R0 - T0, 16U); - R1 = __SSAT(R1 - T1, 16U); - /* co2 & si2 are read from Coefficient pointer */ - Co2 = pCoef16[2U * ic * 2U]; - Si2 = pCoef16[(2U * ic * 2U) + 1U]; - /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */ - out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16U); - /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */ - out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16U); - - /* Reading i0+fftLen/4 */ - /* input is down scale by 4 to avoid overflow */ - /* T0 = yb, T1 = xb */ - T0 = pSrc16[i1 * 2U] >> 2U; - T1 = pSrc16[(i1 * 2U) + 1U] >> 2U; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* writing output(xc', yc') in little endian format */ - pSrc16[i1 * 2U] = out1; - pSrc16[(i1 * 2U) + 1U] = out2; - - /* Butterfly calculations */ - /* input is down scale by 4 to avoid overflow */ - /* U0 = yd, U1 = xd) */ - U0 = pSrc16[i3 * 2U] >> 2U; - U1 = pSrc16[(i3 * 2U) + 1U] >> 2U; - - /* T0 = yb-yd, T1 = xb-xd) */ - T0 = __SSAT(T0 - U0, 16U); - T1 = __SSAT(T1 - U1, 16U); - /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */ - R0 = (q15_t) __SSAT((q31_t) (S0 + T1), 16); - R1 = (q15_t) __SSAT((q31_t) (S1 - T0), 16); - /* S = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */ - S0 = (q15_t) __SSAT((q31_t) (S0 - T1), 16); - S1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16); - - /* co1 & si1 are read from Coefficient pointer */ - Co1 = pCoef16[ic * 2U]; - Si1 = pCoef16[(ic * 2U) + 1U]; - /* Butterfly process for the i0+fftLen/2 sample */ - /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */ - out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16U); - /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */ - out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16U); - /* writing output(xb', yb') in little endian format */ - pSrc16[i2 * 2U] = out1; - pSrc16[(i2 * 2U) + 1U] = out2; - - /* Co3 & si3 are read from Coefficient pointer */ - Co3 = pCoef16[3U * ic * 2U]; - Si3 = pCoef16[(3U * ic * 2U) + 1U]; - /* Butterfly process for the i0+3fftLen/4 sample */ - /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */ - out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16U); - /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */ - out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16U); - /* writing output(xd', yd') in little endian format */ - pSrc16[i3 * 2U] = out1; - pSrc16[(i3 * 2U) + 1U] = out2; - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1U; - - } while (--j); - - /* End of first stage process */ - - /* data is in 4.11(q11) format */ - - - /* Start of Middle stage process */ - - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2U; - - /* Calculation of Middle stage */ - for (k = fftLen / 4U; k > 4U; k >>= 2U) - { - /* Initializations for the middle stage */ - n1 = n2; - n2 >>= 2U; - ic = 0U; - - for (j = 0U; j <= (n2 - 1U); j++) - { - /* index calculation for the coefficients */ - Co1 = pCoef16[ic * 2U]; - Si1 = pCoef16[(ic * 2U) + 1U]; - Co2 = pCoef16[2U * ic * 2U]; - Si2 = pCoef16[2U * ic * 2U + 1U]; - Co3 = pCoef16[3U * ic * 2U]; - Si3 = pCoef16[(3U * ic * 2U) + 1U]; - - /* Twiddle coefficients index modifier */ - ic = ic + twidCoefModifier; - - /* Butterfly implementation */ - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2U]; - T1 = pSrc16[(i0 * 2U) + 1U]; - - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2U]; - S1 = pSrc16[(i2 * 2U) + 1U]; - - - /* R0 = (ya + yc), R1 = (xa + xc) */ - R0 = __SSAT(T0 + S0, 16U); - R1 = __SSAT(T1 + S1, 16U); - /* S0 = (ya - yc), S1 = (xa - xc) */ - S0 = __SSAT(T0 - S0, 16U); - S1 = __SSAT(T1 - S1, 16U); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2U]; - T1 = pSrc16[(i1 * 2U) + 1U]; - - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2U]; - U1 = pSrc16[(i3 * 2U) + 1U]; - - /* T0 = (yb + yd), T1 = (xb + xd) */ - T0 = __SSAT(T0 + U0, 16U); - T1 = __SSAT(T1 + U1, 16U); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - pSrc16[i0 * 2U] = ((R0 >> 1U) + (T0 >> 1U)) >> 1U; - pSrc16[(i0 * 2U) + 1U] = ((R1 >> 1U) + (T1 >> 1U)) >> 1U; - - /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ - R0 = (R0 >> 1U) - (T0 >> 1U); - R1 = (R1 >> 1U) - (T1 >> 1U); - - /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */ - out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16); - /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */ - out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16); - - /* Reading i0+3fftLen/4 */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2U]; - T1 = pSrc16[(i1 * 2U) + 1U]; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */ - /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */ - pSrc16[i1 * 2U] = out1; - pSrc16[(i1 * 2U) + 1U] = out2; - - /* Butterfly calculations */ - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2U]; - U1 = pSrc16[(i3 * 2U) + 1U]; - - /* T0 = yb-yd, T1 = xb-xd) */ - T0 = __SSAT(T0 - U0, 16U); - T1 = __SSAT(T1 - U1, 16U); - - /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */ - R0 = (S0 >> 1U) + (T1 >> 1U); - R1 = (S1 >> 1U) - (T0 >> 1U); - - /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */ - S0 = (S0 >> 1U) - (T1 >> 1U); - S1 = (S1 >> 1U) + (T0 >> 1U); - - /* Butterfly process for the i0+fftLen/2 sample */ - out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16U); - out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16U); - /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */ - /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */ - pSrc16[i2 * 2U] = out1; - pSrc16[(i2 * 2U) + 1U] = out2; - - /* Butterfly process for the i0+3fftLen/4 sample */ - out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16U); - - out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16U); - /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */ - /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */ - pSrc16[i3 * 2U] = out1; - pSrc16[(i3 * 2U) + 1U] = out2; - - - } - } - /* Twiddle coefficients index modifier */ - twidCoefModifier <<= 2U; - } - /* End of Middle stages process */ - - - /* data is in 10.6(q6) format for the 1024 point */ - /* data is in 8.8(q8) format for the 256 point */ - /* data is in 6.10(q10) format for the 64 point */ - /* data is in 4.12(q12) format for the 16 point */ - - /* start of last stage process */ - - - /* Initializations for the last stage */ - n1 = n2; - n2 >>= 2U; - - /* Butterfly implementation */ - for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Reading i0, i0+fftLen/2 inputs */ - /* Read ya (real), xa(imag) input */ - T0 = pSrc16[i0 * 2U]; - T1 = pSrc16[(i0 * 2U) + 1U]; - /* Read yc (real), xc(imag) input */ - S0 = pSrc16[i2 * 2U]; - S1 = pSrc16[(i2 * 2U) + 1U]; - - /* R0 = (ya + yc), R1 = (xa + xc) */ - R0 = __SSAT(T0 + S0, 16U); - R1 = __SSAT(T1 + S1, 16U); - /* S0 = (ya - yc), S1 = (xa - xc) */ - S0 = __SSAT(T0 - S0, 16U); - S1 = __SSAT(T1 - S1, 16U); - - /* Reading i0+fftLen/4 , i0+3fftLen/4 inputs */ - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2U]; - T1 = pSrc16[(i1 * 2U) + 1U]; - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2U]; - U1 = pSrc16[(i3 * 2U) + 1U]; - - /* T0 = (yb + yd), T1 = (xb + xd) */ - T0 = __SSAT(T0 + U0, 16U); - T1 = __SSAT(T1 + U1, 16U); - - /* writing the butterfly processed i0 sample */ - /* xa' = xa + xb + xc + xd */ - /* ya' = ya + yb + yc + yd */ - pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U); - pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U); - - /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */ - R0 = (R0 >> 1U) - (T0 >> 1U); - R1 = (R1 >> 1U) - (T1 >> 1U); - - /* Read yb (real), xb(imag) input */ - T0 = pSrc16[i1 * 2U]; - T1 = pSrc16[(i1 * 2U) + 1U]; - - /* writing the butterfly processed i0 + fftLen/4 sample */ - /* xc' = (xa-xb+xc-xd) */ - /* yc' = (ya-yb+yc-yd) */ - pSrc16[i1 * 2U] = R0; - pSrc16[(i1 * 2U) + 1U] = R1; - - /* Read yd (real), xd(imag) input */ - U0 = pSrc16[i3 * 2U]; - U1 = pSrc16[(i3 * 2U) + 1U]; - /* T0 = (yb - yd), T1 = (xb - xd) */ - T0 = __SSAT(T0 - U0, 16U); - T1 = __SSAT(T1 - U1, 16U); - - /* writing the butterfly processed i0 + fftLen/2 sample */ - /* xb' = (xa-yb-xc+yd) */ - /* yb' = (ya+xb-yc-xd) */ - pSrc16[i2 * 2U] = (S0 >> 1U) - (T1 >> 1U); - pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U); - - - /* writing the butterfly processed i0 + 3fftLen/4 sample */ - /* xd' = (xa+yb-xc-yd) */ - /* yd' = (ya-xb-yc+xd) */ - pSrc16[i3 * 2U] = (S0 >> 1U) + (T1 >> 1U); - pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U); - } - /* end of last stage process */ - - /* output is in 11.5(q5) format for the 1024 point */ - /* output is in 9.7(q7) format for the 256 point */ - /* output is in 7.9(q9) format for the 64 point */ - /* output is in 5.11(q11) format for the 16 point */ - -#endif /* #if defined (ARM_MATH_DSP) */ - -} diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c deleted file mode 100644 index a198c01..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c +++ /dev/null @@ -1,827 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix4_q31.c - * Description: This file has function definition of Radix-4 FFT & IFFT function and - * In-place bit reversal using bit reversal table - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -void arm_radix4_butterfly_inverse_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef, - uint32_t twidCoefModifier); - -void arm_radix4_butterfly_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef, - uint32_t twidCoefModifier); - -void arm_bitreversal_q31( - q31_t * pSrc, - uint32_t fftLen, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab); - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup ComplexFFT - @{ - */ - -/** - @brief Processing function for the Q31 CFFT/CIFFT. - @deprecated Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future. - @param[in] S points to an instance of the Q31 CFFT/CIFFT structure - @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place - @return none - - @par Input and output formats: - Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. - Hence the output format is different for different FFT sizes. - The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT: - @par - \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT" - \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT" - */ - -void arm_cfft_radix4_q31( - const arm_cfft_radix4_instance_q31 * S, - q31_t * pSrc) -{ - if (S->ifftFlag == 1U) - { - /* Complex IFFT radix-4 */ - arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); - } - else - { - /* Complex FFT radix-4 */ - arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier); - } - - if (S->bitReverseFlag == 1U) - { - /* Bit Reversal */ - arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable); - } - -} - -/** - @} end of ComplexFFT group - */ - -/* - * Radix-4 FFT algorithm used is : - * - * Input real and imaginary data: - * x(n) = xa + j * ya - * x(n+N/4 ) = xb + j * yb - * x(n+N/2 ) = xc + j * yc - * x(n+3N 4) = xd + j * yd - * - * - * Output real and imaginary data: - * x(4r) = xa'+ j * ya' - * x(4r+1) = xb'+ j * yb' - * x(4r+2) = xc'+ j * yc' - * x(4r+3) = xd'+ j * yd' - * - * - * Twiddle factors for radix-4 FFT: - * Wn = co1 + j * (- si1) - * W2n = co2 + j * (- si2) - * W3n = co3 + j * (- si3) - * - * Butterfly implementation: - * xa' = xa + xb + xc + xd - * ya' = ya + yb + yc + yd - * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) - * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) - * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) - * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) - * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) - * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) - * - */ - -/** - @brief Core function for the Q31 CFFT butterfly process. - @param[in,out] pSrc points to the in-place buffer of Q31 data type. - @param[in] fftLen length of the FFT. - @param[in] pCoef points to twiddle coefficient buffer. - @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - @return none - */ - -void arm_radix4_butterfly_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef, - uint32_t twidCoefModifier) -{ - uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; - q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3; - - q31_t xa, xb, xc, xd; - q31_t ya, yb, yc, yd; - q31_t xa_out, xb_out, xc_out, xd_out; - q31_t ya_out, yb_out, yc_out, yd_out; - - q31_t *ptr1; - - /* Total process is divided into three stages */ - - /* process first stage, middle stages, & last stage */ - - - /* start of first stage process */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - /* n2 = fftLen/4 */ - n2 >>= 2U; - i0 = 0U; - ia1 = 0U; - - j = n2; - - /* Calculation of first stage */ - do - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* input is in 1.31(q31) format and provide 4 guard bits for the input */ - - /* Butterfly implementation */ - /* xa + xc */ - r1 = (pSrc[(2U * i0)] >> 4U) + (pSrc[(2U * i2)] >> 4U); - /* xa - xc */ - r2 = (pSrc[(2U * i0)] >> 4U) - (pSrc[(2U * i2)] >> 4U); - - /* xb + xd */ - t1 = (pSrc[(2U * i1)] >> 4U) + (pSrc[(2U * i3)] >> 4U); - - /* ya + yc */ - s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U); - /* ya - yc */ - s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U); - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = (r1 + t1); - /* (xa + xc) - (xb + xd) */ - r1 = r1 - t1; - /* yb + yd */ - t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U); - - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = (s1 + t2); - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* yb - yd */ - t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U); - /* xb - xd */ - t2 = (pSrc[(2U * i1)] >> 4U) - (pSrc[(2U * i3)] >> 4U); - - /* index calculation for the coefficients */ - ia2 = 2U * ia1; - co2 = pCoef[(ia2 * 2U)]; - si2 = pCoef[(ia2 * 2U) + 1U]; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) + - ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) - - ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; - - /* (xa - xc) + (yb - yd) */ - r1 = r2 + t1; - /* (xa - xc) - (yb - yd) */ - r2 = r2 - t1; - - /* (ya - yc) - (xb - xd) */ - s1 = s2 - t2; - /* (ya - yc) + (xb - xd) */ - s2 = s2 + t2; - - co1 = pCoef[(ia1 * 2U)]; - si1 = pCoef[(ia1 * 2U) + 1U]; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) + - ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) - - ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; - - /* index calculation for the coefficients */ - ia3 = 3U * ia1; - co3 = pCoef[(ia3 * 2U)]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) + - ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) - - ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1U; - - } while (--j); - - /* end of first stage process */ - - /* data is in 5.27(q27) format */ - - - /* start of Middle stages process */ - - - /* each stage in middle stages provides two down scaling of the input */ - - twidCoefModifier <<= 2U; - - - for (k = fftLen / 4U; k > 4U; k >>= 2U) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - /* Calculation of first stage */ - for (j = 0U; j <= (n2 - 1U); j++) - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[(ia1 * 2U)]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[(ia2 * 2U)]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[(ia3 * 2U)]; - si3 = pCoef[(ia3 * 2U) + 1U]; - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - /* xa + xc */ - r1 = pSrc[2U * i0] + pSrc[2U * i2]; - /* xa - xc */ - r2 = pSrc[2U * i0] - pSrc[2U * i2]; - - /* ya + yc */ - s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; - /* ya - yc */ - s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; - - /* xb + xd */ - t1 = pSrc[2U * i1] + pSrc[2U * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = (r1 + t1) >> 2U; - /* xa + xc -(xb + xd) */ - r1 = r1 - t1; - - /* yb + yd */ - t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb - yd) */ - t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; - /* (xb - xd) */ - t2 = pSrc[2U * i1] - pSrc[2U * i3]; - - /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) + - ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U; - - /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) - - ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U; - - /* (xa - xc) + (yb - yd) */ - r1 = r2 + t1; - /* (xa - xc) - (yb - yd) */ - r2 = r2 - t1; - - /* (ya - yc) - (xb - xd) */ - s1 = s2 - t2; - /* (ya - yc) + (xb - xd) */ - s2 = s2 + t2; - - /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) + - ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; - - /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) - - ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; - - /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) + - ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; - - /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) - - ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; - } - } - twidCoefModifier <<= 2U; - } - - /* End of Middle stages process */ - - /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */ - /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */ - /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */ - /* data is in 5.27(q27) format for the 16 point as there are no middle stages */ - - - /* start of Last stage process */ - /* Initializations for the last stage */ - j = fftLen >> 2; - ptr1 = &pSrc[0]; - - /* Calculations of last stage */ - do - { - /* Read xa (real), ya(imag) input */ - xa = *ptr1++; - ya = *ptr1++; - - /* Read xb (real), yb(imag) input */ - xb = *ptr1++; - yb = *ptr1++; - - /* Read xc (real), yc(imag) input */ - xc = *ptr1++; - yc = *ptr1++; - - /* Read xc (real), yc(imag) input */ - xd = *ptr1++; - yd = *ptr1++; - - /* xa' = xa + xb + xc + xd */ - xa_out = xa + xb + xc + xd; - - /* ya' = ya + yb + yc + yd */ - ya_out = ya + yb + yc + yd; - - /* pointer updation for writing */ - ptr1 = ptr1 - 8U; - - /* writing xa' and ya' */ - *ptr1++ = xa_out; - *ptr1++ = ya_out; - - xc_out = (xa - xb + xc - xd); - yc_out = (ya - yb + yc - yd); - - /* writing xc' and yc' */ - *ptr1++ = xc_out; - *ptr1++ = yc_out; - - xb_out = (xa + yb - xc - yd); - yb_out = (ya - xb - yc + xd); - - /* writing xb' and yb' */ - *ptr1++ = xb_out; - *ptr1++ = yb_out; - - xd_out = (xa - yb - xc + yd); - yd_out = (ya + xb - yc - xd); - - /* writing xd' and yd' */ - *ptr1++ = xd_out; - *ptr1++ = yd_out; - - - } while (--j); - - /* output is in 11.21(q21) format for the 1024 point */ - /* output is in 9.23(q23) format for the 256 point */ - /* output is in 7.25(q25) format for the 64 point */ - /* output is in 5.27(q27) format for the 16 point */ - - /* End of last stage process */ - -} - - -/** - @brief Core function for the Q31 CIFFT butterfly process. - @param[in,out] pSrc points to the in-place buffer of Q31 data type. - @param[in] fftLen length of the FFT. - @param[in] pCoef points to twiddle coefficient buffer. - @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - @return none - */ - -/* - * Radix-4 IFFT algorithm used is : - * - * CIFFT uses same twiddle coefficients as CFFT Function - * x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4] - * - * - * IFFT is implemented with following changes in equations from FFT - * - * Input real and imaginary data: - * x(n) = xa + j * ya - * x(n+N/4 ) = xb + j * yb - * x(n+N/2 ) = xc + j * yc - * x(n+3N 4) = xd + j * yd - * - * - * Output real and imaginary data: - * x(4r) = xa'+ j * ya' - * x(4r+1) = xb'+ j * yb' - * x(4r+2) = xc'+ j * yc' - * x(4r+3) = xd'+ j * yd' - * - * - * Twiddle factors for radix-4 IFFT: - * Wn = co1 + j * (si1) - * W2n = co2 + j * (si2) - * W3n = co3 + j * (si3) - - * The real and imaginary output values for the radix-4 butterfly are - * xa' = xa + xb + xc + xd - * ya' = ya + yb + yc + yd - * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) - * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) - * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) - * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) - * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) - * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) - * - */ - -void arm_radix4_butterfly_inverse_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pCoef, - uint32_t twidCoefModifier) -{ - uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k; - q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3; - q31_t xa, xb, xc, xd; - q31_t ya, yb, yc, yd; - q31_t xa_out, xb_out, xc_out, xd_out; - q31_t ya_out, yb_out, yc_out, yd_out; - - q31_t *ptr1; - - /* input is be 1.31(q31) format for all FFT sizes */ - /* Total process is divided into three stages */ - /* process first stage, middle stages, & last stage */ - - /* Start of first stage process */ - - /* Initializations for the first stage */ - n2 = fftLen; - n1 = n2; - /* n2 = fftLen/4 */ - n2 >>= 2U; - i0 = 0U; - ia1 = 0U; - - j = n2; - - do - { - /* input is in 1.31(q31) format and provide 4 guard bits for the input */ - - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - /* xa + xc */ - r1 = (pSrc[2U * i0] >> 4U) + (pSrc[2U * i2] >> 4U); - /* xa - xc */ - r2 = (pSrc[2U * i0] >> 4U) - (pSrc[2U * i2] >> 4U); - - /* xb + xd */ - t1 = (pSrc[2U * i1] >> 4U) + (pSrc[2U * i3] >> 4U); - - /* ya + yc */ - s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U); - /* ya - yc */ - s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U); - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = (r1 + t1); - /* (xa + xc) - (xb + xd) */ - r1 = r1 - t1; - /* yb + yd */ - t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U); - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = (s1 + t2); - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* yb - yd */ - t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U); - /* xb - xd */ - t2 = (pSrc[2U * i1] >> 4U) - (pSrc[2U * i3] >> 4U); - - /* index calculation for the coefficients */ - ia2 = 2U * ia1; - co2 = pCoef[ia2 * 2U]; - si2 = pCoef[(ia2 * 2U) + 1U]; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) - - ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[2U * i1 + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) + - ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U; - - /* (xa - xc) - (yb - yd) */ - r1 = r2 - t1; - /* (xa - xc) + (yb - yd) */ - r2 = r2 + t1; - - /* (ya - yc) + (xb - xd) */ - s1 = s2 + t2; - /* (ya - yc) - (xb - xd) */ - s2 = s2 - t2; - - co1 = pCoef[ia1 * 2U]; - si1 = pCoef[(ia1 * 2U) + 1U]; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) - - ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) + - ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U; - - /* index calculation for the coefficients */ - ia3 = 3U * ia1; - co3 = pCoef[ia3 * 2U]; - si3 = pCoef[(ia3 * 2U) + 1U]; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) - - ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) + - ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U; - - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - /* Updating input index */ - i0 = i0 + 1U; - - } while (--j); - - /* data is in 5.27(q27) format */ - /* each stage provides two down scaling of the input */ - - - /* Start of Middle stages process */ - - twidCoefModifier <<= 2U; - - /* Calculation of second stage to excluding last stage */ - for (k = fftLen / 4U; k > 4U; k >>= 2U) - { - /* Initializations for the first stage */ - n1 = n2; - n2 >>= 2U; - ia1 = 0U; - - for (j = 0; j <= (n2 - 1U); j++) - { - /* index calculation for the coefficients */ - ia2 = ia1 + ia1; - ia3 = ia2 + ia1; - co1 = pCoef[(ia1 * 2U)]; - si1 = pCoef[(ia1 * 2U) + 1U]; - co2 = pCoef[(ia2 * 2U)]; - si2 = pCoef[(ia2 * 2U) + 1U]; - co3 = pCoef[(ia3 * 2U)]; - si3 = pCoef[(ia3 * 2U) + 1U]; - /* Twiddle coefficients index modifier */ - ia1 = ia1 + twidCoefModifier; - - for (i0 = j; i0 < fftLen; i0 += n1) - { - /* index calculation for the input as, */ - /* pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */ - i1 = i0 + n2; - i2 = i1 + n2; - i3 = i2 + n2; - - /* Butterfly implementation */ - /* xa + xc */ - r1 = pSrc[2U * i0] + pSrc[2U * i2]; - /* xa - xc */ - r2 = pSrc[2U * i0] - pSrc[2U * i2]; - - /* ya + yc */ - s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U]; - /* ya - yc */ - s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U]; - - /* xb + xd */ - t1 = pSrc[2U * i1] + pSrc[2U * i3]; - - /* xa' = xa + xb + xc + xd */ - pSrc[2U * i0] = (r1 + t1) >> 2U; - /* xa + xc -(xb + xd) */ - r1 = r1 - t1; - /* yb + yd */ - t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U]; - /* ya' = ya + yb + yc + yd */ - pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U; - - /* (ya + yc) - (yb + yd) */ - s1 = s1 - t2; - - /* (yb - yd) */ - t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U]; - /* (xb - xd) */ - t2 = pSrc[2U * i1] - pSrc[2U * i3]; - - /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */ - pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32U)) - - ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U; - - /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */ - pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32U)) + - ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U; - - /* (xa - xc) - (yb - yd) */ - r1 = r2 - t1; - /* (xa - xc) + (yb - yd) */ - r2 = r2 + t1; - - /* (ya - yc) + (xb - xd) */ - s1 = s2 + t2; - /* (ya - yc) - (xb - xd) */ - s2 = s2 - t2; - - /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */ - pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) - - ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U; - - /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */ - pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) + - ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U; - - /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */ - pSrc[(2U * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) - - ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U; - - /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */ - pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) + - ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U; - } - } - twidCoefModifier <<= 2U; - } - - /* End of Middle stages process */ - - /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */ - /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */ - /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */ - /* data is in 5.27(q27) format for the 16 point as there are no middle stages */ - - - /* Start of last stage process */ - - - /* Initializations for the last stage */ - j = fftLen >> 2; - ptr1 = &pSrc[0]; - - /* Calculations of last stage */ - do - { - /* Read xa (real), ya(imag) input */ - xa = *ptr1++; - ya = *ptr1++; - - /* Read xb (real), yb(imag) input */ - xb = *ptr1++; - yb = *ptr1++; - - /* Read xc (real), yc(imag) input */ - xc = *ptr1++; - yc = *ptr1++; - - /* Read xc (real), yc(imag) input */ - xd = *ptr1++; - yd = *ptr1++; - - /* xa' = xa + xb + xc + xd */ - xa_out = xa + xb + xc + xd; - - /* ya' = ya + yb + yc + yd */ - ya_out = ya + yb + yc + yd; - - /* pointer updation for writing */ - ptr1 = ptr1 - 8U; - - /* writing xa' and ya' */ - *ptr1++ = xa_out; - *ptr1++ = ya_out; - - xc_out = (xa - xb + xc - xd); - yc_out = (ya - yb + yc - yd); - - /* writing xc' and yc' */ - *ptr1++ = xc_out; - *ptr1++ = yc_out; - - xb_out = (xa - yb - xc + yd); - yb_out = (ya + xb - yc - xd); - - /* writing xb' and yb' */ - *ptr1++ = xb_out; - *ptr1++ = yb_out; - - xd_out = (xa + yb - xc - yd); - yd_out = (ya - xb - yc + xd); - - /* writing xd' and yd' */ - *ptr1++ = xd_out; - *ptr1++ = yd_out; - - } while (--j); - - /* output is in 11.21(q21) format for the 1024 point */ - /* output is in 9.23(q23) format for the 256 point */ - /* output is in 7.25(q25) format for the 64 point */ - /* output is in 5.27(q27) format for the 16 point */ - - /* End of last stage process */ -} diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f16.c deleted file mode 100644 index 3282ea0..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f16.c +++ /dev/null @@ -1,289 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix8_f16.c - * Description: Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -/* ---------------------------------------------------------------------- - * Internal helper function used by the FFTs - * -------------------------------------------------------------------- */ - -/** - brief Core function for the floating-point CFFT butterfly process. - param[in,out] pSrc points to the in-place buffer of floating-point data type. - param[in] fftLen length of the FFT. - param[in] pCoef points to the twiddle coefficient buffer. - param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - return none -*/ - -void arm_radix8_butterfly_f16( - float16_t * pSrc, - uint16_t fftLen, - const float16_t * pCoef, - uint16_t twidCoefModifier) -{ - uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7; - uint32_t i1, i2, i3, i4, i5, i6, i7, i8; - uint32_t id; - uint32_t n1, n2, j; - - float16_t r1, r2, r3, r4, r5, r6, r7, r8; - float16_t t1, t2; - float16_t s1, s2, s3, s4, s5, s6, s7, s8; - float16_t p1, p2, p3, p4; - float16_t co2, co3, co4, co5, co6, co7, co8; - float16_t si2, si3, si4, si5, si6, si7, si8; - const float16_t C81 = 0.70710678118f16; - - n2 = fftLen; - - do - { - n1 = n2; - n2 = n2 >> 3; - i1 = 0; - - do - { - i2 = i1 + n2; - i3 = i2 + n2; - i4 = i3 + n2; - i5 = i4 + n2; - i6 = i5 + n2; - i7 = i6 + n2; - i8 = i7 + n2; - r1 = (_Float16)pSrc[2 * i1] + (_Float16)pSrc[2 * i5]; - r5 = (_Float16)pSrc[2 * i1] - (_Float16)pSrc[2 * i5]; - r2 = (_Float16)pSrc[2 * i2] + (_Float16)pSrc[2 * i6]; - r6 = (_Float16)pSrc[2 * i2] - (_Float16)pSrc[2 * i6]; - r3 = (_Float16)pSrc[2 * i3] + (_Float16)pSrc[2 * i7]; - r7 = (_Float16)pSrc[2 * i3] - (_Float16)pSrc[2 * i7]; - r4 = (_Float16)pSrc[2 * i4] + (_Float16)pSrc[2 * i8]; - r8 = (_Float16)pSrc[2 * i4] - (_Float16)pSrc[2 * i8]; - t1 = (_Float16)r1 - (_Float16)r3; - r1 = (_Float16)r1 + (_Float16)r3; - r3 = (_Float16)r2 - (_Float16)r4; - r2 = (_Float16)r2 + (_Float16)r4; - pSrc[2 * i1] = (_Float16)r1 + (_Float16)r2; - pSrc[2 * i5] = (_Float16)r1 - (_Float16)r2; - r1 = (_Float16)pSrc[2 * i1 + 1] + (_Float16)pSrc[2 * i5 + 1]; - s5 = (_Float16)pSrc[2 * i1 + 1] - (_Float16)pSrc[2 * i5 + 1]; - r2 = (_Float16)pSrc[2 * i2 + 1] + (_Float16)pSrc[2 * i6 + 1]; - s6 = (_Float16)pSrc[2 * i2 + 1] - (_Float16)pSrc[2 * i6 + 1]; - s3 = (_Float16)pSrc[2 * i3 + 1] + (_Float16)pSrc[2 * i7 + 1]; - s7 = (_Float16)pSrc[2 * i3 + 1] - (_Float16)pSrc[2 * i7 + 1]; - r4 = (_Float16)pSrc[2 * i4 + 1] + (_Float16)pSrc[2 * i8 + 1]; - s8 = (_Float16)pSrc[2 * i4 + 1] - (_Float16)pSrc[2 * i8 + 1]; - t2 = (_Float16)r1 - (_Float16)s3; - r1 = (_Float16)r1 + (_Float16)s3; - s3 = (_Float16)r2 - (_Float16)r4; - r2 = (_Float16)r2 + (_Float16)r4; - pSrc[2 * i1 + 1] = (_Float16)r1 + (_Float16)r2; - pSrc[2 * i5 + 1] = (_Float16)r1 - (_Float16)r2; - pSrc[2 * i3] = (_Float16)t1 + (_Float16)s3; - pSrc[2 * i7] = (_Float16)t1 - (_Float16)s3; - pSrc[2 * i3 + 1] = (_Float16)t2 - (_Float16)r3; - pSrc[2 * i7 + 1] = (_Float16)t2 + (_Float16)r3; - r1 = ((_Float16)r6 - (_Float16)r8) * (_Float16)C81; - r6 = ((_Float16)r6 + (_Float16)r8) * (_Float16)C81; - r2 = ((_Float16)s6 - (_Float16)s8) * (_Float16)C81; - s6 = ((_Float16)s6 + (_Float16)s8) * (_Float16)C81; - t1 = (_Float16)r5 - (_Float16)r1; - r5 = (_Float16)r5 + (_Float16)r1; - r8 = (_Float16)r7 - (_Float16)r6; - r7 = (_Float16)r7 + (_Float16)r6; - t2 = (_Float16)s5 - (_Float16)r2; - s5 = (_Float16)s5 + (_Float16)r2; - s8 = (_Float16)s7 - (_Float16)s6; - s7 = (_Float16)s7 + (_Float16)s6; - pSrc[2 * i2] = (_Float16)r5 + (_Float16)s7; - pSrc[2 * i8] = (_Float16)r5 - (_Float16)s7; - pSrc[2 * i6] = (_Float16)t1 + (_Float16)s8; - pSrc[2 * i4] = (_Float16)t1 - (_Float16)s8; - pSrc[2 * i2 + 1] = (_Float16)s5 - (_Float16)r7; - pSrc[2 * i8 + 1] = (_Float16)s5 + (_Float16)r7; - pSrc[2 * i6 + 1] = (_Float16)t2 - (_Float16)r8; - pSrc[2 * i4 + 1] = (_Float16)t2 + (_Float16)r8; - - i1 += n1; - } while (i1 < fftLen); - - if (n2 < 8) - break; - - ia1 = 0; - j = 1; - - do - { - /* index calculation for the coefficients */ - id = ia1 + twidCoefModifier; - ia1 = id; - ia2 = ia1 + id; - ia3 = ia2 + id; - ia4 = ia3 + id; - ia5 = ia4 + id; - ia6 = ia5 + id; - ia7 = ia6 + id; - - co2 = pCoef[2 * ia1]; - co3 = pCoef[2 * ia2]; - co4 = pCoef[2 * ia3]; - co5 = pCoef[2 * ia4]; - co6 = pCoef[2 * ia5]; - co7 = pCoef[2 * ia6]; - co8 = pCoef[2 * ia7]; - si2 = pCoef[2 * ia1 + 1]; - si3 = pCoef[2 * ia2 + 1]; - si4 = pCoef[2 * ia3 + 1]; - si5 = pCoef[2 * ia4 + 1]; - si6 = pCoef[2 * ia5 + 1]; - si7 = pCoef[2 * ia6 + 1]; - si8 = pCoef[2 * ia7 + 1]; - - i1 = j; - - do - { - /* index calculation for the input */ - i2 = i1 + n2; - i3 = i2 + n2; - i4 = i3 + n2; - i5 = i4 + n2; - i6 = i5 + n2; - i7 = i6 + n2; - i8 = i7 + n2; - r1 = (_Float16)pSrc[2 * i1] + (_Float16)pSrc[2 * i5]; - r5 = (_Float16)pSrc[2 * i1] - (_Float16)pSrc[2 * i5]; - r2 = (_Float16)pSrc[2 * i2] + (_Float16)pSrc[2 * i6]; - r6 = (_Float16)pSrc[2 * i2] - (_Float16)pSrc[2 * i6]; - r3 = (_Float16)pSrc[2 * i3] + (_Float16)pSrc[2 * i7]; - r7 = (_Float16)pSrc[2 * i3] - (_Float16)pSrc[2 * i7]; - r4 = (_Float16)pSrc[2 * i4] + (_Float16)pSrc[2 * i8]; - r8 = (_Float16)pSrc[2 * i4] - (_Float16)pSrc[2 * i8]; - t1 = (_Float16)r1 - (_Float16)r3; - r1 = (_Float16)r1 + (_Float16)r3; - r3 = (_Float16)r2 - (_Float16)r4; - r2 = (_Float16)r2 + (_Float16)r4; - pSrc[2 * i1] = (_Float16)r1 + (_Float16)r2; - r2 = (_Float16)r1 - (_Float16)r2; - s1 = (_Float16)pSrc[2 * i1 + 1] + (_Float16)pSrc[2 * i5 + 1]; - s5 = (_Float16)pSrc[2 * i1 + 1] - (_Float16)pSrc[2 * i5 + 1]; - s2 = (_Float16)pSrc[2 * i2 + 1] + (_Float16)pSrc[2 * i6 + 1]; - s6 = (_Float16)pSrc[2 * i2 + 1] - (_Float16)pSrc[2 * i6 + 1]; - s3 = (_Float16)pSrc[2 * i3 + 1] + (_Float16)pSrc[2 * i7 + 1]; - s7 = (_Float16)pSrc[2 * i3 + 1] - (_Float16)pSrc[2 * i7 + 1]; - s4 = (_Float16)pSrc[2 * i4 + 1] + (_Float16)pSrc[2 * i8 + 1]; - s8 = (_Float16)pSrc[2 * i4 + 1] - (_Float16)pSrc[2 * i8 + 1]; - t2 = (_Float16)s1 - (_Float16)s3; - s1 = (_Float16)s1 + (_Float16)s3; - s3 = (_Float16)s2 - (_Float16)s4; - s2 = (_Float16)s2 + (_Float16)s4; - r1 = (_Float16)t1 + (_Float16)s3; - t1 = (_Float16)t1 - (_Float16)s3; - pSrc[2 * i1 + 1] = (_Float16)s1 + (_Float16)s2; - s2 = (_Float16)s1 - (_Float16)s2; - s1 = (_Float16)t2 - (_Float16)r3; - t2 = (_Float16)t2 + (_Float16)r3; - p1 = (_Float16)co5 * (_Float16)r2; - p2 = (_Float16)si5 * (_Float16)s2; - p3 = (_Float16)co5 * (_Float16)s2; - p4 = (_Float16)si5 * (_Float16)r2; - pSrc[2 * i5] = (_Float16)p1 + (_Float16)p2; - pSrc[2 * i5 + 1] = (_Float16)p3 - (_Float16)p4; - p1 = (_Float16)co3 * (_Float16)r1; - p2 = (_Float16)si3 * (_Float16)s1; - p3 = (_Float16)co3 * (_Float16)s1; - p4 = (_Float16)si3 * (_Float16)r1; - pSrc[2 * i3] = (_Float16)p1 + (_Float16)p2; - pSrc[2 * i3 + 1] = (_Float16)p3 - (_Float16)p4; - p1 = (_Float16)co7 * (_Float16)t1; - p2 = (_Float16)si7 * (_Float16)t2; - p3 = (_Float16)co7 * (_Float16)t2; - p4 = (_Float16)si7 * (_Float16)t1; - pSrc[2 * i7] = (_Float16)p1 + (_Float16)p2; - pSrc[2 * i7 + 1] = (_Float16)p3 - (_Float16)p4; - r1 = ((_Float16)r6 - (_Float16)r8) * (_Float16)C81; - r6 = ((_Float16)r6 + (_Float16)r8) * (_Float16)C81; - s1 = ((_Float16)s6 - (_Float16)s8) * (_Float16)C81; - s6 = ((_Float16)s6 + (_Float16)s8) * (_Float16)C81; - t1 = (_Float16)r5 - (_Float16)r1; - r5 = (_Float16)r5 + (_Float16)r1; - r8 = (_Float16)r7 - (_Float16)r6; - r7 = (_Float16)r7 + (_Float16)r6; - t2 = (_Float16)s5 - (_Float16)s1; - s5 = (_Float16)s5 + (_Float16)s1; - s8 = (_Float16)s7 - (_Float16)s6; - s7 = (_Float16)s7 + (_Float16)s6; - r1 = (_Float16)r5 + (_Float16)s7; - r5 = (_Float16)r5 - (_Float16)s7; - r6 = (_Float16)t1 + (_Float16)s8; - t1 = (_Float16)t1 - (_Float16)s8; - s1 = (_Float16)s5 - (_Float16)r7; - s5 = (_Float16)s5 + (_Float16)r7; - s6 = (_Float16)t2 - (_Float16)r8; - t2 = (_Float16)t2 + (_Float16)r8; - p1 = (_Float16)co2 * (_Float16)r1; - p2 = (_Float16)si2 * (_Float16)s1; - p3 = (_Float16)co2 * (_Float16)s1; - p4 = (_Float16)si2 * (_Float16)r1; - pSrc[2 * i2] = (_Float16)p1 + (_Float16)p2; - pSrc[2 * i2 + 1] = (_Float16)p3 - (_Float16)p4; - p1 = (_Float16)co8 * (_Float16)r5; - p2 = (_Float16)si8 * (_Float16)s5; - p3 = (_Float16)co8 * (_Float16)s5; - p4 = (_Float16)si8 * (_Float16)r5; - pSrc[2 * i8] = (_Float16)p1 + (_Float16)p2; - pSrc[2 * i8 + 1] = (_Float16)p3 - (_Float16)p4; - p1 = (_Float16)co6 * (_Float16)r6; - p2 = (_Float16)si6 * (_Float16)s6; - p3 = (_Float16)co6 * (_Float16)s6; - p4 = (_Float16)si6 * (_Float16)r6; - pSrc[2 * i6] = (_Float16)p1 + (_Float16)p2; - pSrc[2 * i6 + 1] = (_Float16)p3 - (_Float16)p4; - p1 = (_Float16)co4 * (_Float16)t1; - p2 = (_Float16)si4 * (_Float16)t2; - p3 = (_Float16)co4 * (_Float16)t2; - p4 = (_Float16)si4 * (_Float16)t1; - pSrc[2 * i4] = (_Float16)p1 + (_Float16)p2; - pSrc[2 * i4 + 1] = (_Float16)p3 - (_Float16)p4; - - i1 += n1; - } while (i1 < fftLen); - - j++; - } while (j < n2); - - twidCoefModifier <<= 3; - } while (n2 > 7); -} - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c deleted file mode 100644 index 35ec3d9..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c +++ /dev/null @@ -1,285 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_cfft_radix8_f32.c - * Description: Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - - -/* ---------------------------------------------------------------------- - * Internal helper function used by the FFTs - * -------------------------------------------------------------------- */ - -/** - brief Core function for the floating-point CFFT butterfly process. - param[in,out] pSrc points to the in-place buffer of floating-point data type. - param[in] fftLen length of the FFT. - param[in] pCoef points to the twiddle coefficient buffer. - param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. - return none -*/ - -void arm_radix8_butterfly_f32( - float32_t * pSrc, - uint16_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier) -{ - uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7; - uint32_t i1, i2, i3, i4, i5, i6, i7, i8; - uint32_t id; - uint32_t n1, n2, j; - - float32_t r1, r2, r3, r4, r5, r6, r7, r8; - float32_t t1, t2; - float32_t s1, s2, s3, s4, s5, s6, s7, s8; - float32_t p1, p2, p3, p4; - float32_t co2, co3, co4, co5, co6, co7, co8; - float32_t si2, si3, si4, si5, si6, si7, si8; - const float32_t C81 = 0.70710678118f; - - n2 = fftLen; - - do - { - n1 = n2; - n2 = n2 >> 3; - i1 = 0; - - do - { - i2 = i1 + n2; - i3 = i2 + n2; - i4 = i3 + n2; - i5 = i4 + n2; - i6 = i5 + n2; - i7 = i6 + n2; - i8 = i7 + n2; - r1 = pSrc[2 * i1] + pSrc[2 * i5]; - r5 = pSrc[2 * i1] - pSrc[2 * i5]; - r2 = pSrc[2 * i2] + pSrc[2 * i6]; - r6 = pSrc[2 * i2] - pSrc[2 * i6]; - r3 = pSrc[2 * i3] + pSrc[2 * i7]; - r7 = pSrc[2 * i3] - pSrc[2 * i7]; - r4 = pSrc[2 * i4] + pSrc[2 * i8]; - r8 = pSrc[2 * i4] - pSrc[2 * i8]; - t1 = r1 - r3; - r1 = r1 + r3; - r3 = r2 - r4; - r2 = r2 + r4; - pSrc[2 * i1] = r1 + r2; - pSrc[2 * i5] = r1 - r2; - r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1]; - s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1]; - r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1]; - s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1]; - s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1]; - s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1]; - r4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1]; - s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1]; - t2 = r1 - s3; - r1 = r1 + s3; - s3 = r2 - r4; - r2 = r2 + r4; - pSrc[2 * i1 + 1] = r1 + r2; - pSrc[2 * i5 + 1] = r1 - r2; - pSrc[2 * i3] = t1 + s3; - pSrc[2 * i7] = t1 - s3; - pSrc[2 * i3 + 1] = t2 - r3; - pSrc[2 * i7 + 1] = t2 + r3; - r1 = (r6 - r8) * C81; - r6 = (r6 + r8) * C81; - r2 = (s6 - s8) * C81; - s6 = (s6 + s8) * C81; - t1 = r5 - r1; - r5 = r5 + r1; - r8 = r7 - r6; - r7 = r7 + r6; - t2 = s5 - r2; - s5 = s5 + r2; - s8 = s7 - s6; - s7 = s7 + s6; - pSrc[2 * i2] = r5 + s7; - pSrc[2 * i8] = r5 - s7; - pSrc[2 * i6] = t1 + s8; - pSrc[2 * i4] = t1 - s8; - pSrc[2 * i2 + 1] = s5 - r7; - pSrc[2 * i8 + 1] = s5 + r7; - pSrc[2 * i6 + 1] = t2 - r8; - pSrc[2 * i4 + 1] = t2 + r8; - - i1 += n1; - } while (i1 < fftLen); - - if (n2 < 8) - break; - - ia1 = 0; - j = 1; - - do - { - /* index calculation for the coefficients */ - id = ia1 + twidCoefModifier; - ia1 = id; - ia2 = ia1 + id; - ia3 = ia2 + id; - ia4 = ia3 + id; - ia5 = ia4 + id; - ia6 = ia5 + id; - ia7 = ia6 + id; - - co2 = pCoef[2 * ia1]; - co3 = pCoef[2 * ia2]; - co4 = pCoef[2 * ia3]; - co5 = pCoef[2 * ia4]; - co6 = pCoef[2 * ia5]; - co7 = pCoef[2 * ia6]; - co8 = pCoef[2 * ia7]; - si2 = pCoef[2 * ia1 + 1]; - si3 = pCoef[2 * ia2 + 1]; - si4 = pCoef[2 * ia3 + 1]; - si5 = pCoef[2 * ia4 + 1]; - si6 = pCoef[2 * ia5 + 1]; - si7 = pCoef[2 * ia6 + 1]; - si8 = pCoef[2 * ia7 + 1]; - - i1 = j; - - do - { - /* index calculation for the input */ - i2 = i1 + n2; - i3 = i2 + n2; - i4 = i3 + n2; - i5 = i4 + n2; - i6 = i5 + n2; - i7 = i6 + n2; - i8 = i7 + n2; - r1 = pSrc[2 * i1] + pSrc[2 * i5]; - r5 = pSrc[2 * i1] - pSrc[2 * i5]; - r2 = pSrc[2 * i2] + pSrc[2 * i6]; - r6 = pSrc[2 * i2] - pSrc[2 * i6]; - r3 = pSrc[2 * i3] + pSrc[2 * i7]; - r7 = pSrc[2 * i3] - pSrc[2 * i7]; - r4 = pSrc[2 * i4] + pSrc[2 * i8]; - r8 = pSrc[2 * i4] - pSrc[2 * i8]; - t1 = r1 - r3; - r1 = r1 + r3; - r3 = r2 - r4; - r2 = r2 + r4; - pSrc[2 * i1] = r1 + r2; - r2 = r1 - r2; - s1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1]; - s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1]; - s2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1]; - s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1]; - s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1]; - s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1]; - s4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1]; - s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1]; - t2 = s1 - s3; - s1 = s1 + s3; - s3 = s2 - s4; - s2 = s2 + s4; - r1 = t1 + s3; - t1 = t1 - s3; - pSrc[2 * i1 + 1] = s1 + s2; - s2 = s1 - s2; - s1 = t2 - r3; - t2 = t2 + r3; - p1 = co5 * r2; - p2 = si5 * s2; - p3 = co5 * s2; - p4 = si5 * r2; - pSrc[2 * i5] = p1 + p2; - pSrc[2 * i5 + 1] = p3 - p4; - p1 = co3 * r1; - p2 = si3 * s1; - p3 = co3 * s1; - p4 = si3 * r1; - pSrc[2 * i3] = p1 + p2; - pSrc[2 * i3 + 1] = p3 - p4; - p1 = co7 * t1; - p2 = si7 * t2; - p3 = co7 * t2; - p4 = si7 * t1; - pSrc[2 * i7] = p1 + p2; - pSrc[2 * i7 + 1] = p3 - p4; - r1 = (r6 - r8) * C81; - r6 = (r6 + r8) * C81; - s1 = (s6 - s8) * C81; - s6 = (s6 + s8) * C81; - t1 = r5 - r1; - r5 = r5 + r1; - r8 = r7 - r6; - r7 = r7 + r6; - t2 = s5 - s1; - s5 = s5 + s1; - s8 = s7 - s6; - s7 = s7 + s6; - r1 = r5 + s7; - r5 = r5 - s7; - r6 = t1 + s8; - t1 = t1 - s8; - s1 = s5 - r7; - s5 = s5 + r7; - s6 = t2 - r8; - t2 = t2 + r8; - p1 = co2 * r1; - p2 = si2 * s1; - p3 = co2 * s1; - p4 = si2 * r1; - pSrc[2 * i2] = p1 + p2; - pSrc[2 * i2 + 1] = p3 - p4; - p1 = co8 * r5; - p2 = si8 * s5; - p3 = co8 * s5; - p4 = si8 * r5; - pSrc[2 * i8] = p1 + p2; - pSrc[2 * i8 + 1] = p3 - p4; - p1 = co6 * r6; - p2 = si6 * s6; - p3 = co6 * s6; - p4 = si6 * r6; - pSrc[2 * i6] = p1 + p2; - pSrc[2 * i6 + 1] = p3 - p4; - p1 = co4 * t1; - p2 = si4 * t2; - p3 = co4 * t2; - p4 = si4 * t1; - pSrc[2 * i4] = p1 + p2; - pSrc[2 * i4 + 1] = p3 - p4; - - i1 += n1; - } while (i1 < fftLen); - - j++; - } while (j < n2); - - twidCoefModifier <<= 3; - } while (n2 > 7); -} diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c deleted file mode 100644 index 1ee3848..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c +++ /dev/null @@ -1,448 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dct4_f32.c - * Description: Processing function of DCT4 & IDCT4 F32 - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -/** - @ingroup groupTransforms - */ - -/** - @defgroup DCT4_IDCT4 DCT Type IV Functions - - Representation of signals by minimum number of values is important for storage and transmission. - The possibility of large discontinuity between the beginning and end of a period of a signal - in DFT can be avoided by extending the signal so that it is even-symmetric. - Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the - spectrum and is very widely used in signal and image coding applications. - The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions. - DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular. - - DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal. - Reordering of the input data makes the computation of DCT just a problem of - computing the DFT of a real signal with a few additional operations. - This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations. - - DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used. - DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing. - DCT2 implementation can be described in the following steps: - - Re-ordering input - - Calculating Real FFT - - Multiplication of weights and Real FFT output and getting real part from the product. - - This process is explained by the block diagram below: - \image html DCT4.gif "Discrete Cosine Transform - type-IV" - - @par Algorithm - The N-point type-IV DCT is defined as a real, linear transformation by the formula: - \image html DCT4Equation.gif - where k = 0, 1, 2, ..., N-1 - @par - Its inverse is defined as follows: - \image html IDCT4Equation.gif - where n = 0, 1, 2, ..., N-1 - @par - The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N). - The symmetry of the transform matrix indicates that the fast algorithms for the forward - and inverse transform computation are identical. - Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both. - - @par Lengths supported by the transform: - As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 8192. - The library provides separate functions for Q15, Q31, and floating-point data types. - - @par Instance Structure - The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure. - A separate instance structure must be defined for each transform. - There are separate instance structure declarations for each of the 3 supported data types. - - @par Initialization Functions - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Initializes Real FFT as its process function is used internally in DCT4, by calling \ref arm_rfft_init_f32(). - @par - Use of the initialization function is optional. - However, if the initialization function is used, then the instance structure cannot be placed into a const data section. - To place an instance structure into a const data section, the instance structure must be manually initialized. - Manually initialize the instance structure as follows: - 
-      arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
-      arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
-      arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
-
- where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4; - \c normalize is normalizing factor used and is equal to sqrt(2/N); - \c pTwiddle points to the twiddle factor table; - \c pCosFactor points to the cosFactor table; - \c pRfft points to the real FFT instance; - \c pCfft points to the complex FFT instance; - The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32() - and arm_rfft_f32() respectively for details regarding static initialization. - - @par Fixed-Point Behavior - Care must be taken when using the fixed-point versions of the DCT4 transform functions. - In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - Refer to the function specific documentation below for usage guidelines. - */ - - /** - @addtogroup DCT4_IDCT4 - @{ - */ - -/** - @brief Processing function for the floating-point DCT4/IDCT4. - @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure - @param[in] pState points to state buffer - @param[in,out] pInlineBuffer points to the in-place input and output buffer - @return none - */ - -void arm_dct4_f32( - const arm_dct4_instance_f32 * S, - float32_t * pState, - float32_t * pInlineBuffer) -{ - const float32_t *weights = S->pTwiddle; /* Pointer to the Weights table */ - const float32_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */ - float32_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */ - float32_t in; /* Temporary variable */ - uint32_t i; /* Loop counter */ - - - /* DCT4 computation involves DCT2 (which is calculated using RFFT) - * along with some pre-processing and post-processing. - * Computational procedure is explained as follows: - * (a) Pre-processing involves multiplying input with cos factor, - * r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n)) - * where, - * r(n) -- output of preprocessing - * u(n) -- input to preprocessing(actual Source buffer) - * (b) Calculation of DCT2 using FFT is divided into three steps: - * Step1: Re-ordering of even and odd elements of input. - * Step2: Calculating FFT of the re-ordered input. - * Step3: Taking the real part of the product of FFT output and weights. - * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation: - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * where, - * Y4 -- DCT4 output, Y2 -- DCT2 output - * (d) Multiplying the output with the normalizing factor sqrt(2/N). - */ - - /*-------- Pre-processing ------------*/ - /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */ - arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N); - arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N); - - /* ---------------------------------------------------------------- - * Step1: Re-ordering of even and odd elements as - * pState[i] = pInlineBuffer[2*i] and - * pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2 - ---------------------------------------------------------------------*/ - - /* pS1 initialized to pState */ - pS1 = pState; - - /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */ - pS2 = pState + (S->N - 1U); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */ - i = S->Nby2 >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - /* Decrement loop counter */ - i--; - } while (i > 0U); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = S->N >> 2U; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. - * Compute 4 outputs at a time */ - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_f32 (S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */ - i = (S->N - 1U) >> 2U; - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ * (float32_t) 0.5; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - i = (S->N - 1U) % 0x4U; - - while (i > 0U) - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - - /* points to the next real value */ - pS1++; - - /* Decrement the loop counter */ - i--; - } - - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = S->N >> 2U; - - /* pbuff initialized to the pInlineBuffer(now contains the output values) */ - pbuff = pInlineBuffer; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. Compute 4 outputs at a time */ - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = in * S->normalize; - - in = *pbuff; - *pbuff++ = in * S->normalize; - - in = *pbuff; - *pbuff++ = in * S->normalize; - - in = *pbuff; - *pbuff++ = in * S->normalize; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - -#else - - /* Initializing the loop counter to N/2 */ - i = S->Nby2; - - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter */ - i = S->N; - - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_f32 (S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ * (float32_t) 0.5; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* Initializing the loop counter */ - i = (S->N - 1U); - - do - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - - /* points to the next real value */ - pS1++; - - /* Decrement loop counter */ - i--; - } while (i > 0U); - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing loop counter */ - i = S->N; - - /* pbuff initialized to the pInlineBuffer (now contains the output values) */ - pbuff = pInlineBuffer; - - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = in * S->normalize; - - /* Decrement loop counter */ - i--; - } while (i > 0U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - -} - -/** - @} end of DCT4_IDCT4 group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c deleted file mode 100644 index 11cb988..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dct4_init_f32.c - * Description: Initialization function of DCT-4 & IDCT4 F32 - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - - /** - @addtogroup DCT4_IDCT4 - @{ - */ - -/** - @brief Initialization function for the floating-point DCT4/IDCT4. - @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure - @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure - @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure - @param[in] N length of the DCT4 - @param[in] Nby2 half of the length of the DCT4 - @param[in] normalize normalizing factor. - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : N is not a supported transform length - - @par Normalizing factor - The normalizing factor is sqrt(2/N), which depends on the size of transform N. - Floating-point normalizing factors are mentioned in the table below for different DCT sizes: - - \image html dct4NormalizingF32Table.gif - */ - -arm_status arm_dct4_init_f32( - arm_dct4_instance_f32 * S, - arm_rfft_instance_f32 * S_RFFT, - arm_cfft_radix4_instance_f32 * S_CFFT, - uint16_t N, - uint16_t Nby2, - float32_t normalize) -{ - /* Initialize the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - - /* Initialize the DCT4 length */ - S->N = N; - - /* Initialize the half of DCT4 length */ - S->Nby2 = Nby2; - - /* Initialize the DCT4 Normalizing factor */ - S->normalize = normalize; - - /* Initialize Real FFT Instance */ - S->pRfft = S_RFFT; - - /* Initialize Complex FFT Instance */ - S->pCfft = S_CFFT; - - switch (N) - { - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192) - /* Initialize the table modifier values */ - case 8192U: - S->pTwiddle = Weights_8192; - S->pCosFactor = cos_factors_8192; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048) - case 2048U: - S->pTwiddle = Weights_2048; - S->pCosFactor = cos_factors_2048; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512) - case 512U: - S->pTwiddle = Weights_512; - S->pCosFactor = cos_factors_512; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128) - case 128U: - S->pTwiddle = Weights_128; - S->pCosFactor = cos_factors_128; - break; - #endif - default: - status = ARM_MATH_ARGUMENT_ERROR; - } - - /* Initialize the RFFT/RIFFT Function */ - arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0U, 1U); - - /* return the status of DCT4 Init function */ - return (status); -} - -/** - @} end of DCT4_IDCT4 group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c deleted file mode 100644 index b7ef992..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dct4_init_q15.c - * Description: Initialization function of DCT-4 & IDCT4 Q15 - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - - /** - @addtogroup DCT4_IDCT4 - @{ - */ - -/** - @brief Initialization function for the Q15 DCT4/IDCT4. - @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure - @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure - @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure - @param[in] N length of the DCT4 - @param[in] Nby2 half of the length of the DCT4 - @param[in] normalize normalizing factor - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : N is not a supported transform length - - @par Normalizing factor - The normalizing factor is sqrt(2/N), which depends on the size of transform N. - Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes: - - \image html dct4NormalizingQ15Table.gif - */ - -arm_status arm_dct4_init_q15( - arm_dct4_instance_q15 * S, - arm_rfft_instance_q15 * S_RFFT, - arm_cfft_radix4_instance_q15 * S_CFFT, - uint16_t N, - uint16_t Nby2, - q15_t normalize) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialize the DCT4 length */ - S->N = N; - - /* Initialize the half of DCT4 length */ - S->Nby2 = Nby2; - - /* Initialize the DCT4 Normalizing factor */ - S->normalize = normalize; - - /* Initialize Real FFT Instance */ - S->pRfft = S_RFFT; - - /* Initialize Complex FFT Instance */ - S->pCfft = S_CFFT; - - switch (N) - { - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192) - /* Initialize the table modifier values */ - case 8192U: - S->pTwiddle = WeightsQ15_8192; - S->pCosFactor = cos_factorsQ15_8192; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048) - case 2048U: - S->pTwiddle = WeightsQ15_2048; - S->pCosFactor = cos_factorsQ15_2048; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512) - case 512U: - S->pTwiddle = WeightsQ15_512; - S->pCosFactor = cos_factorsQ15_512; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128) - case 128U: - S->pTwiddle = WeightsQ15_128; - S->pCosFactor = cos_factorsQ15_128; - break; - #endif - - default: - status = ARM_MATH_ARGUMENT_ERROR; - } - - /* Initialize the RFFT/RIFFT */ - arm_rfft_init_q15(S->pRfft, S->N, 0U, 1U); - - /* return the status of DCT4 Init function */ - return (status); -} - -/** - @} end of DCT4_IDCT4 group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c deleted file mode 100644 index 1d75243..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dct4_init_q31.c - * Description: Initialization function of DCT-4 & IDCT4 Q31 - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - - /** - @addtogroup DCT4_IDCT4 - @{ - */ - -/** - @brief Initialization function for the Q31 DCT4/IDCT4. - @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure. - @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure - @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure - @param[in] N length of the DCT4. - @param[in] Nby2 half of the length of the DCT4. - @param[in] normalize normalizing factor. - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : N is not a supported transform length - - @par Normalizing factor: - The normalizing factor is sqrt(2/N), which depends on the size of transform N. - Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes: - - \image html dct4NormalizingQ31Table.gif - */ - -arm_status arm_dct4_init_q31( - arm_dct4_instance_q31 * S, - arm_rfft_instance_q31 * S_RFFT, - arm_cfft_radix4_instance_q31 * S_CFFT, - uint16_t N, - uint16_t Nby2, - q31_t normalize) -{ - /* Initialize the default arm status */ - arm_status status = ARM_MATH_SUCCESS; - - /* Initialize the DCT4 length */ - S->N = N; - - /* Initialize the half of DCT4 length */ - S->Nby2 = Nby2; - - /* Initialize the DCT4 Normalizing factor */ - S->normalize = normalize; - - /* Initialize Real FFT Instance */ - S->pRfft = S_RFFT; - - /* Initialize Complex FFT Instance */ - S->pCfft = S_CFFT; - - switch (N) - { - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192) - /* Initialize the table modifier values */ - case 8192U: - S->pTwiddle = WeightsQ31_8192; - S->pCosFactor = cos_factorsQ31_8192; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048) - case 2048U: - S->pTwiddle = WeightsQ31_2048; - S->pCosFactor = cos_factorsQ31_2048; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512) - case 512U: - S->pTwiddle = WeightsQ31_512; - S->pCosFactor = cos_factorsQ31_512; - break; - #endif - - #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128) - case 128U: - S->pTwiddle = WeightsQ31_128; - S->pCosFactor = cos_factorsQ31_128; - break; - #endif - default: - status = ARM_MATH_ARGUMENT_ERROR; - } - - /* Initialize the RFFT/RIFFT Function */ - arm_rfft_init_q31(S->pRfft, S->N, 0U, 1U); - - /* return the status of DCT4 Init function */ - return (status); -} - -/** - @} end of DCT4_IDCT4 group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c deleted file mode 100644 index 3c16f42..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c +++ /dev/null @@ -1,381 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dct4_q15.c - * Description: Processing function of DCT4 & IDCT4 Q15 - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -/** - @addtogroup DCT4_IDCT4 - @{ - */ - -/** - @brief Processing function for the Q15 DCT4/IDCT4. - @param[in] S points to an instance of the Q15 DCT4 structure. - @param[in] pState points to state buffer. - @param[in,out] pInlineBuffer points to the in-place input and output buffer. - @return none - - @par Input an output formats - Internally inputs are downscaled in the RFFT process function to avoid overflows. - Number of bits downscaled, depends on the size of the transform. The input and output - formats for different DCT sizes and number of bits to upscale are mentioned in the table below: - - \image html dct4FormatsQ15Table.gif - */ - -void arm_dct4_q15( - const arm_dct4_instance_q15 * S, - q15_t * pState, - q15_t * pInlineBuffer) -{ - const q15_t *weights = S->pTwiddle; /* Pointer to the Weights table */ - const q15_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */ - q15_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */ - q15_t in; /* Temporary variable */ - uint32_t i; /* Loop counter */ - - - /* DCT4 computation involves DCT2 (which is calculated using RFFT) - * along with some pre-processing and post-processing. - * Computational procedure is explained as follows: - * (a) Pre-processing involves multiplying input with cos factor, - * r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n)) - * where, - * r(n) -- output of preprocessing - * u(n) -- input to preprocessing(actual Source buffer) - * (b) Calculation of DCT2 using FFT is divided into three steps: - * Step1: Re-ordering of even and odd elements of input. - * Step2: Calculating FFT of the re-ordered input. - * Step3: Taking the real part of the product of FFT output and weights. - * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation: - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * where, - * Y4 -- DCT4 output, Y2 -- DCT2 output - * (d) Multiplying the output with the normalizing factor sqrt(2/N). - */ - - /*-------- Pre-processing ------------*/ - /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */ - arm_mult_q15 (pInlineBuffer, cosFact, pInlineBuffer, S->N); - arm_shift_q15 (pInlineBuffer, 1, pInlineBuffer, S->N); - - /* ---------------------------------------------------------------- - * Step1: Re-ordering of even and odd elements as - * pState[i] = pInlineBuffer[2*i] and - * pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2 - ---------------------------------------------------------------------*/ - - /* pS1 initialized to pState */ - pS1 = pState; - - /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */ - pS2 = pState + (S->N - 1U); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */ - i = S->Nby2 >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - /* Decrement loop counter */ - i--; - } while (i > 0U); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = S->N >> 2U; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. - * Compute 4 outputs at a time */ - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_q15 (S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N); - - /* The output of complex multiplication is in 3.13 format. - * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */ - arm_shift_q15 (pState, 2, pState, S->N * 2); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */ - i = (S->N - 1U) >> 2U; - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ >> 1U; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - i = (S->N - 1U) % 0x4U; - - while (i > 0U) - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - - /* points to the next real value */ - pS1++; - - /* Decrement loop counter */ - i--; - } - - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = S->N >> 2U; - - /* pbuff initialized to the pInlineBuffer(now contains the output values) */ - pbuff = pInlineBuffer; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. Compute 4 outputs at a time */ - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); - - in = *pbuff; - *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); - - in = *pbuff; - *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); - - in = *pbuff; - *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); - - /* Decrement loop counter */ - i--; - } while (i > 0U); - - -#else - - /* Initializing the loop counter to N/2 */ - i = S->Nby2; - - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter */ - i = S->N; - - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_q15 (S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N); - - /* The output of complex multiplication is in 3.13 format. - * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */ - arm_shift_q15 (pState, 2, pState, S->N * 2); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ >> 1U; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* Initializing the loop counter */ - i = (S->N - 1U); - - do - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - - /* points to the next real value */ - pS1++; - - /* Decrement loop counter */ - i--; - } while (i > 0U); - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing loop counter */ - i = S->N; - - /* pbuff initialized to the pInlineBuffer (now contains the output values) */ - pbuff = pInlineBuffer; - - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15)); - - /* Decrement loop counter */ - i--; - - } while (i > 0U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - -} - -/** - @} end of DCT4_IDCT4 group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c deleted file mode 100644 index b0c65ab..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c +++ /dev/null @@ -1,383 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_dct4_q31.c - * Description: Processing function of DCT4 & IDCT4 Q31 - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -/** - @addtogroup DCT4_IDCT4 - @{ - */ - -/** - @brief Processing function for the Q31 DCT4/IDCT4. - @param[in] S points to an instance of the Q31 DCT4 structure. - @param[in] pState points to state buffer. - @param[in,out] pInlineBuffer points to the in-place input and output buffer. - @return none - - @par Input an output formats - Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process, - as the conversion from DCT2 to DCT4 involves one subtraction. - Internally inputs are downscaled in the RFFT process function to avoid overflows. - Number of bits downscaled, depends on the size of the transform. - The input and output formats for different DCT sizes and number of bits to upscale are - mentioned in the table below: - - \image html dct4FormatsQ31Table.gif - */ - -void arm_dct4_q31( - const arm_dct4_instance_q31 * S, - q31_t * pState, - q31_t * pInlineBuffer) -{ - const q31_t *weights = S->pTwiddle; /* Pointer to the Weights table */ - const q31_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */ - q31_t *pS1, *pS2, *pbuff; /* Temporary pointers for input buffer and pState buffer */ - q31_t in; /* Temporary variable */ - uint32_t i; /* Loop counter */ - - - /* DCT4 computation involves DCT2 (which is calculated using RFFT) - * along with some pre-processing and post-processing. - * Computational procedure is explained as follows: - * (a) Pre-processing involves multiplying input with cos factor, - * r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n)) - * where, - * r(n) -- output of preprocessing - * u(n) -- input to preprocessing(actual Source buffer) - * (b) Calculation of DCT2 using FFT is divided into three steps: - * Step1: Re-ordering of even and odd elements of input. - * Step2: Calculating FFT of the re-ordered input. - * Step3: Taking the real part of the product of FFT output and weights. - * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation: - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * where, - * Y4 -- DCT4 output, Y2 -- DCT2 output - * (d) Multiplying the output with the normalizing factor sqrt(2/N). - */ - - /*-------- Pre-processing ------------*/ - /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */ - arm_mult_q31 (pInlineBuffer, cosFact, pInlineBuffer, S->N); - arm_shift_q31 (pInlineBuffer, 1, pInlineBuffer, S->N); - - /* ---------------------------------------------------------------- - * Step1: Re-ordering of even and odd elements as - * pState[i] = pInlineBuffer[2*i] and - * pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2 - ---------------------------------------------------------------------*/ - - /* pS1 initialized to pState */ - pS1 = pState; - - /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */ - pS2 = pState + (S->N - 1U); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - -#if defined (ARM_MATH_LOOPUNROLL) - - /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */ - i = S->Nby2 >> 2U; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - *pS1++ = *pbuff++; - *pS2-- = *pbuff++; - - /* Decrement loop counter */ - i--; - } while (i > 0U); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = S->N >> 2U; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. - * Compute 4 outputs at a time */ - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_q31 (S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N); - - /* The output of complex multiplication is in 3.29 format. - * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */ - arm_shift_q31 (pState, 2, pState, S->N * 2); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */ - i = (S->N - 1U) >> 2U; - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ >> 1U; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - do - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - /* points to the next real value */ - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - in = *pS1++ - in; - *pbuff++ = in; - pS1++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - i = (S->N - 1U) % 0x4U; - - while (i > 0U) - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - - /* points to the next real value */ - pS1++; - - /* Decrement loop counter */ - i--; - } - - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing the loop counter to N/4 instead of N for loop unrolling */ - i = S->N >> 2U; - - /* pbuff initialized to the pInlineBuffer(now contains the output values) */ - pbuff = pInlineBuffer; - - /* Processing with loop unrolling 4 times as N is always multiple of 4. Compute 4 outputs at a time */ - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); - - in = *pbuff; - *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); - - in = *pbuff; - *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); - - in = *pbuff; - *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); - - /* Decrement loop counter */ - i--; - } while (i > 0U); - - -#else - - /* Initializing the loop counter to N/2 */ - i = S->Nby2; - - do - { - /* Re-ordering of even and odd elements */ - /* pState[i] = pInlineBuffer[2*i] */ - *pS1++ = *pbuff++; - /* pState[N-i-1] = pInlineBuffer[2*i+1] */ - *pS2-- = *pbuff++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - /* pbuff initialized to input buffer */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Initializing the loop counter */ - i = S->N; - - do - { - /* Writing the re-ordered output back to inplace input buffer */ - *pbuff++ = *pS1++; - - /* Decrement the loop counter */ - i--; - } while (i > 0U); - - - /* --------------------------------------------------------- - * Step2: Calculate RFFT for N-point input - * ---------------------------------------------------------- */ - /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */ - arm_rfft_q31 (S->pRfft, pInlineBuffer, pState); - - /*---------------------------------------------------------------------- - * Step3: Multiply the FFT output with the weights. - *----------------------------------------------------------------------*/ - arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N); - - /* The output of complex multiplication is in 3.29 format. - * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */ - arm_shift_q31(pState, 2, pState, S->N * 2); - - /* ----------- Post-processing ---------- */ - /* DCT-IV can be obtained from DCT-II by the equation, - * Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0) - * Hence, Y4(0) = Y2(0)/2 */ - /* Getting only real part from the output and Converting to DCT-IV */ - - /* pbuff initialized to input buffer. */ - pbuff = pInlineBuffer; - - /* pS1 initialized to pState */ - pS1 = pState; - - /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */ - in = *pS1++ >> 1U; - /* input buffer acts as inplace, so output values are stored in the input itself. */ - *pbuff++ = in; - - /* pState pointer is incremented twice as the real values are located alternatively in the array */ - pS1++; - - /* Initializing the loop counter */ - i = (S->N - 1U); - - while (i > 0U) - { - /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */ - /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */ - in = *pS1++ - in; - *pbuff++ = in; - - /* points to the next real value */ - pS1++; - - /* Decrement loop counter */ - i--; - } - - /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/ - - /* Initializing loop counter */ - i = S->N; - - /* pbuff initialized to the pInlineBuffer (now contains the output values) */ - pbuff = pInlineBuffer; - - do - { - /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */ - in = *pbuff; - *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31)); - - /* Decrement loop counter */ - i--; - } while (i > 0U); - -#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ - -} - -/** - @} end of DCT4_IDCT4 group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f16.c deleted file mode 100644 index 6e15371..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f16.c +++ /dev/null @@ -1,161 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mfcc_f16.c - * Description: MFCC function for the f16 version - * - * $Date: 07 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#include "dsp/transform_functions_f16.h" -#include "dsp/statistics_functions_f16.h" -#include "dsp/basic_math_functions_f16.h" -#include "dsp/complex_math_functions_f16.h" -#include "dsp/fast_math_functions_f16.h" -#include "dsp/matrix_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - @ingroup groupTransforms - */ - - -/** - @defgroup MFCC MFCC - - MFCC Transform - - There are separate functions for floating-point, Q15, and Q31 data types. - */ - - - -/** - @addtogroup MFCC - @{ - */ - -/** - @brief MFCC F16 - @param[in] S points to the mfcc instance structure - @param[in] pSrc points to the input samples - @param[out] pDst points to the output MFCC values - @param[inout] pTmp points to a temporary buffer of complex - - @return none - - @par Description - The number of input samples if the FFT length used - when initializing the instance data structure. - - The temporary buffer has a 2*fft length size when MFCC - is implemented with CFFT. - It has length FFT Length + 2 when implemented with RFFT - (default implementation). - - The source buffer is modified by this function. - - */ -void arm_mfcc_f16( - const arm_mfcc_instance_f16 * S, - float16_t *pSrc, - float16_t *pDst, - float16_t *pTmp - ) -{ - float16_t maxValue; - uint32_t index; - uint32_t i; - float16_t result; - const float16_t *coefs=S->filterCoefs; - arm_matrix_instance_f16 pDctMat; - - /* Normalize */ - arm_absmax_f16(pSrc,S->fftLen,&maxValue,&index); - - arm_scale_f16(pSrc,1.0f16/(_Float16)maxValue,pSrc,S->fftLen); - - /* Multiply by window */ - arm_mult_f16(pSrc,S->windowCoefs,pSrc,S->fftLen); - - /* Compute spectrum magnitude - */ -#if defined(ARM_MFCC_CFFT_BASED) - /* some HW accelerator for CMSIS-DSP used in some boards - are only providing acceleration for CFFT. - With ARM_MFCC_CFFT_BASED enabled, CFFT is used and the MFCC - will be accelerated on those boards. - - The default is to use RFFT - */ - /* Convert from real to complex */ - for(i=0; i < S->fftLen ; i++) - { - pTmp[2*i] = pSrc[i]; - pTmp[2*i+1] = 0.0f16; - } - arm_cfft_f16(&(S->cfft),pTmp,0,1); -#else - /* Default RFFT based implementation */ - arm_rfft_fast_f16(&(S->rfft),pSrc,pTmp,0); - /* Unpack real values */ - pTmp[S->fftLen]=pTmp[1]; - pTmp[S->fftLen+1]=0.0f16; - pTmp[1]=0.0f; -#endif - arm_cmplx_mag_f16(pTmp,pSrc,S->fftLen); - - /* Apply MEL filters */ - for(i=0; inbMelFilters; i++) - { - arm_dot_prod_f16(pSrc+S->filterPos[i], - coefs, - S->filterLengths[i], - &result); - - coefs += S->filterLengths[i]; - - pTmp[i] = result; - - } - - /* Compute the log */ - arm_offset_f16(pTmp,1.0e-4f16,pTmp,S->nbMelFilters); - arm_vlog_f16(pTmp,pTmp,S->nbMelFilters); - - /* Multiply with the DCT matrix */ - - pDctMat.numRows=S->nbDctOutputs; - pDctMat.numCols=S->nbMelFilters; - pDctMat.pData=(float16_t*)S->dctCoefs; - - arm_mat_vec_mult_f16(&pDctMat, pTmp, pDst); - - -} - -#endif /* defined(ARM_FLOAT16_SUPPORTED) */ -/** - @} end of MFCC group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f32.c deleted file mode 100644 index 75692cc..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f32.c +++ /dev/null @@ -1,159 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mfcc_f32.c - * Description: MFCC function for the f32 version - * - * $Date: 07 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - - -#include "dsp/transform_functions.h" -#include "dsp/statistics_functions.h" -#include "dsp/basic_math_functions.h" -#include "dsp/complex_math_functions.h" -#include "dsp/fast_math_functions.h" -#include "dsp/matrix_functions.h" - -/** - @ingroup groupTransforms - */ - - -/** - @defgroup MFCC MFCC - - MFCC Transform - - There are separate functions for floating-point, Q15, and Q31 data types. - */ - - - -/** - @addtogroup MFCC - @{ - */ - -/** - @brief MFCC F32 - @param[in] S points to the mfcc instance structure - @param[in] pSrc points to the input samples - @param[out] pDst points to the output MFCC values - @param[inout] pTmp points to a temporary buffer of complex - - @return none - - @par Description - The number of input samples if the FFT length used - when initializing the instance data structure. - - The temporary buffer has a 2*fft length size when MFCC - is implemented with CFFT. - It has length FFT Length + 2 when implemented with RFFT - (default implementation). - - The source buffer is modified by this function. - - */ -void arm_mfcc_f32( - const arm_mfcc_instance_f32 * S, - float32_t *pSrc, - float32_t *pDst, - float32_t *pTmp - ) -{ - float32_t maxValue; - uint32_t index; - uint32_t i; - float32_t result; - const float32_t *coefs=S->filterCoefs; - arm_matrix_instance_f32 pDctMat; - - /* Normalize */ - arm_absmax_f32(pSrc,S->fftLen,&maxValue,&index); - - arm_scale_f32(pSrc,1.0f/maxValue,pSrc,S->fftLen); - - /* Multiply by window */ - arm_mult_f32(pSrc,S->windowCoefs,pSrc,S->fftLen); - - /* Compute spectrum magnitude - */ -#if defined(ARM_MFCC_CFFT_BASED) - /* some HW accelerator for CMSIS-DSP used in some boards - are only providing acceleration for CFFT. - With ARM_MFCC_CFFT_BASED enabled, CFFT is used and the MFCC - will be accelerated on those boards. - - The default is to use RFFT - */ - /* Convert from real to complex */ - for(i=0; i < S->fftLen ; i++) - { - pTmp[2*i] = pSrc[i]; - pTmp[2*i+1] = 0.0f; - } - arm_cfft_f32(&(S->cfft),pTmp,0,1); -#else - /* Default RFFT based implementation */ - arm_rfft_fast_f32(&(S->rfft),pSrc,pTmp,0); - /* Unpack real values */ - pTmp[S->fftLen]=pTmp[1]; - pTmp[S->fftLen+1]=0.0f; - pTmp[1]=0.0f; -#endif - arm_cmplx_mag_f32(pTmp,pSrc,S->fftLen); - - /* Apply MEL filters */ - for(i=0; inbMelFilters; i++) - { - arm_dot_prod_f32(pSrc+S->filterPos[i], - coefs, - S->filterLengths[i], - &result); - - coefs += S->filterLengths[i]; - - pTmp[i] = result; - - } - - /* Compute the log */ - arm_offset_f32(pTmp,1.0e-6f,pTmp,S->nbMelFilters); - arm_vlog_f32(pTmp,pTmp,S->nbMelFilters); - - /* Multiply with the DCT matrix */ - - pDctMat.numRows=S->nbDctOutputs; - pDctMat.numCols=S->nbMelFilters; - pDctMat.pData=(float32_t*)S->dctCoefs; - - arm_mat_vec_mult_f32(&pDctMat, pTmp, pDst); - - -} - -/** - @} end of MFCC group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f16.c deleted file mode 100644 index f6275a2..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f16.c +++ /dev/null @@ -1,110 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mfcc_init_f16.c - * Description: MFCC initialization function for the f16 version - * - * $Date: 07 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - @ingroup groupTransforms - */ - - -/** - @addtogroup MFCC - @{ - */ - - -#include "dsp/transform_functions_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - - -/** - @brief Initialization of the MFCC F16 instance structure - @param[out] S points to the mfcc instance structure - @param[in] fftLen fft length - @param[in] nbMelFilters number of Mel filters - @param[in] nbDctOutputs number of Dct outputs - @param[in] dctCoefs points to an array of DCT coefficients - @param[in] filterPos points of the array of filter positions - @param[in] filterLengths points to the array of filter lengths - @param[in] filterCoefs points to the array of filter coefficients - @param[in] windowCoefs points to the array of window coefficients - - @return error status - - @par Description - The matrix of Mel filter coefficients is sparse. - Most of the coefficients are zero. - To avoid multiplying the spectrogram by those zeros, the - filter is applied only to a given position in the spectrogram - and on a given number of FFT bins (the filter length). - It is the reason for the arrays filterPos and filterLengths. - - window coefficients can describe (for instance) a Hamming window. - The array has the same size as the FFT length. - - The folder Scripts is containing a Python script which can be used - to generate the filter, dct and window arrays. - */ - -arm_status arm_mfcc_init_f16( - arm_mfcc_instance_f16 * S, - uint32_t fftLen, - uint32_t nbMelFilters, - uint32_t nbDctOutputs, - const float16_t *dctCoefs, - const uint32_t *filterPos, - const uint32_t *filterLengths, - const float16_t *filterCoefs, - const float16_t *windowCoefs - ) -{ - arm_status status; - - S->fftLen=fftLen; - S->nbMelFilters=nbMelFilters; - S->nbDctOutputs=nbDctOutputs; - S->dctCoefs=dctCoefs; - S->filterPos=filterPos; - S->filterLengths=filterLengths; - S->filterCoefs=filterCoefs; - S->windowCoefs=windowCoefs; - - #if defined(ARM_MFCC_CFFT_BASED) - status=arm_cfft_init_f16(&(S->cfft),fftLen); - #else - status=arm_rfft_fast_init_f16(&(S->rfft),fftLen); - #endif - - return(status); -} - -#endif /* defined(ARM_FLOAT16_SUPPORTED) */ -/** - @} end of MFCC group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f32.c deleted file mode 100644 index 756eb49..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f32.c +++ /dev/null @@ -1,107 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mfcc_init_f32.c - * Description: MFCC initialization function for the f32 version - * - * $Date: 07 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - @ingroup groupTransforms - */ - - -/** - @addtogroup MFCC - @{ - */ - - -#include "dsp/transform_functions.h" - - - -/** - @brief Initialization of the MFCC F32 instance structure - @param[out] S points to the mfcc instance structure - @param[in] fftLen fft length - @param[in] nbMelFilters number of Mel filters - @param[in] nbDctOutputs number of Dct outputs - @param[in] dctCoefs points to an array of DCT coefficients - @param[in] filterPos points of the array of filter positions - @param[in] filterLengths points to the array of filter lengths - @param[in] filterCoefs points to the array of filter coefficients - @param[in] windowCoefs points to the array of window coefficients - - @return error status - - @par Description - The matrix of Mel filter coefficients is sparse. - Most of the coefficients are zero. - To avoid multiplying the spectrogram by those zeros, the - filter is applied only to a given position in the spectrogram - and on a given number of FFT bins (the filter length). - It is the reason for the arrays filterPos and filterLengths. - - window coefficients can describe (for instance) a Hamming window. - The array has the same size as the FFT length. - - The folder Scripts is containing a Python script which can be used - to generate the filter, dct and window arrays. - */ - -arm_status arm_mfcc_init_f32( - arm_mfcc_instance_f32 * S, - uint32_t fftLen, - uint32_t nbMelFilters, - uint32_t nbDctOutputs, - const float32_t *dctCoefs, - const uint32_t *filterPos, - const uint32_t *filterLengths, - const float32_t *filterCoefs, - const float32_t *windowCoefs - ) -{ - arm_status status; - - S->fftLen=fftLen; - S->nbMelFilters=nbMelFilters; - S->nbDctOutputs=nbDctOutputs; - S->dctCoefs=dctCoefs; - S->filterPos=filterPos; - S->filterLengths=filterLengths; - S->filterCoefs=filterCoefs; - S->windowCoefs=windowCoefs; - - #if defined(ARM_MFCC_CFFT_BASED) - status=arm_cfft_init_f32(&(S->cfft),fftLen); - #else - status=arm_rfft_fast_init_f32(&(S->rfft),fftLen); - #endif - - return(status); -} - -/** - @} end of MFCC group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q15.c deleted file mode 100644 index ca83791..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q15.c +++ /dev/null @@ -1,107 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mfcc_init_q15.c - * Description: MFCC initialization function for the q15 version - * - * $Date: 07 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - @ingroup groupTransforms - */ - - -/** - @addtogroup MFCC - @{ - */ - - -#include "dsp/transform_functions.h" - - - -/** - @brief Initialization of the MFCC F32 instance structure - @param[out] S points to the mfcc instance structure - @param[in] fftLen fft length - @param[in] nbMelFilters number of Mel filters - @param[in] nbDctOutputs number of Dct outputs - @param[in] dctCoefs points to an array of DCT coefficients - @param[in] filterPos points of the array of filter positions - @param[in] filterLengths points to the array of filter lengths - @param[in] filterCoefs points to the array of filter coefficients - @param[in] windowCoefs points to the array of window coefficients - - @return error status - - @par Description - The matrix of Mel filter coefficients is sparse. - Most of the coefficients are zero. - To avoid multiplying the spectrogram by those zeros, the - filter is applied only to a given position in the spectrogram - and on a given number of FFT bins (the filter length). - It is the reason for the arrays filterPos and filterLengths. - - window coefficients can describe (for instance) a Hamming window. - The array has the same size as the FFT length. - - The folder Scripts is containing a Python script which can be used - to generate the filter, dct and window arrays. - */ - -arm_status arm_mfcc_init_q15( - arm_mfcc_instance_q15 * S, - uint32_t fftLen, - uint32_t nbMelFilters, - uint32_t nbDctOutputs, - const q15_t *dctCoefs, - const uint32_t *filterPos, - const uint32_t *filterLengths, - const q15_t *filterCoefs, - const q15_t *windowCoefs - ) -{ - arm_status status; - - S->fftLen=fftLen; - S->nbMelFilters=nbMelFilters; - S->nbDctOutputs=nbDctOutputs; - S->dctCoefs=dctCoefs; - S->filterPos=filterPos; - S->filterLengths=filterLengths; - S->filterCoefs=filterCoefs; - S->windowCoefs=windowCoefs; - - #if defined(ARM_MFCC_CFFT_BASED) - status=arm_cfft_init_q15(&(S->cfft),fftLen); - #else - status=arm_rfft_init_q15(&(S->rfft),fftLen,0,1); - #endif - - return(status); -} - -/** - @} end of MFCC group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q31.c deleted file mode 100644 index 7d112af..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q31.c +++ /dev/null @@ -1,107 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mfcc_init_q31.c - * Description: MFCC initialization function for the q31 version - * - * $Date: 07 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - @ingroup groupTransforms - */ - - -/** - @addtogroup MFCC - @{ - */ - - -#include "dsp/transform_functions.h" - - - -/** - @brief Initialization of the MFCC F32 instance structure - @param[out] S points to the mfcc instance structure - @param[in] fftLen fft length - @param[in] nbMelFilters number of Mel filters - @param[in] nbDctOutputs number of Dct outputs - @param[in] dctCoefs points to an array of DCT coefficients - @param[in] filterPos points of the array of filter positions - @param[in] filterLengths points to the array of filter lengths - @param[in] filterCoefs points to the array of filter coefficients - @param[in] windowCoefs points to the array of window coefficients - - @return error status - - @par Description - The matrix of Mel filter coefficients is sparse. - Most of the coefficients are zero. - To avoid multiplying the spectrogram by those zeros, the - filter is applied only to a given position in the spectrogram - and on a given number of FFT bins (the filter length). - It is the reason for the arrays filterPos and filterLengths. - - window coefficients can describe (for instance) a Hamming window. - The array has the same size as the FFT length. - - The folder Scripts is containing a Python script which can be used - to generate the filter, dct and window arrays. - */ - -arm_status arm_mfcc_init_q31( - arm_mfcc_instance_q31 * S, - uint32_t fftLen, - uint32_t nbMelFilters, - uint32_t nbDctOutputs, - const q31_t *dctCoefs, - const uint32_t *filterPos, - const uint32_t *filterLengths, - const q31_t *filterCoefs, - const q31_t *windowCoefs - ) -{ - arm_status status; - - S->fftLen=fftLen; - S->nbMelFilters=nbMelFilters; - S->nbDctOutputs=nbDctOutputs; - S->dctCoefs=dctCoefs; - S->filterPos=filterPos; - S->filterLengths=filterLengths; - S->filterCoefs=filterCoefs; - S->windowCoefs=windowCoefs; - - #if defined(ARM_MFCC_CFFT_BASED) - status=arm_cfft_init_q31(&(S->cfft),fftLen); - #else - status=arm_rfft_init_q31(&(S->rfft),fftLen,0,1); - #endif - - return(status); -} - -/** - @} end of MFCC group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q15.c deleted file mode 100644 index d26fddb..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q15.c +++ /dev/null @@ -1,208 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mfcc_q15.c - * Description: MFCC function for the q15 version - * - * $Date: 07 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - - -#include "dsp/transform_functions.h" -#include "dsp/statistics_functions.h" -#include "dsp/basic_math_functions.h" -#include "dsp/complex_math_functions.h" -#include "dsp/fast_math_functions.h" -#include "dsp/matrix_functions.h" - -/* Constants for Q15 implementation */ -#define LOG2TOLOG_Q15 0x02C5C860 -#define MICRO_Q15 0x00000219 -#define SHIFT_MELFILTER_SATURATION_Q15 10 -/** - @ingroup groupTransforms - */ - - -/** - @defgroup MFCC MFCC - - MFCC Transform - - There are separate functions for floating-point, Q15, and Q15 data types. - */ - - - -/** - @addtogroup MFCC - @{ - */ - -/** - @brief MFCC Q15 - @param[in] S points to the mfcc instance structure - @param[in] pSrc points to the input samples in Q15 - @param[out] pDst points to the output MFCC values in q8.7 format - @param[inout] pTmp points to a temporary buffer of complex - - @return none - - @par Description - The number of input samples is the FFT length used - when initializing the instance data structure. - - The temporary buffer has a 2*fft length. - - The source buffer is modified by this function. - - The function may saturate. If the FFT length is too - big and the number of MEL filters too small then the fixed - point computations may saturate. - - */ - -arm_status arm_mfcc_q15( - const arm_mfcc_instance_q15 * S, - q15_t *pSrc, - q15_t *pDst, - q31_t *pTmp - ) -{ - q15_t m; - uint32_t index; - uint32_t fftShift=0; - q31_t logExponent; - q63_t result; - arm_matrix_instance_q15 pDctMat; - uint32_t i; - uint32_t coefsPos; - uint32_t filterLimit; - q15_t *pTmp2=(q15_t*)pTmp; - - arm_status status = ARM_MATH_SUCCESS; - - // q15 - arm_absmax_q15(pSrc,S->fftLen,&m,&index); - - if (m !=0) - { - q15_t quotient; - int16_t shift; - - status = arm_divide_q15(0x7FFF,m,"ient,&shift); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - - arm_scale_q15(pSrc,quotient,shift,pSrc,S->fftLen); - } - - - // q15 - arm_mult_q15(pSrc,S->windowCoefs, pSrc, S->fftLen); - - - /* Compute spectrum magnitude - */ - fftShift = 31 - __CLZ(S->fftLen); -#if defined(ARM_MFCC_CFFT_BASED) - /* some HW accelerator for CMSIS-DSP used in some boards - are only providing acceleration for CFFT. - With ARM_MFCC_CFFT_BASED enabled, CFFT is used and the MFCC - will be accelerated on those boards. - - The default is to use RFFT - */ - /* Convert from real to complex */ - for(i=0; i < S->fftLen ; i++) - { - pTmp2[2*i] = pSrc[i]; - pTmp2[2*i+1] = 0; - } - arm_cfft_q15(&(S->cfft),pTmp2,0,1); -#else - /* Default RFFT based implementation */ - arm_rfft_q15(&(S->rfft),pSrc,pTmp2); -#endif - filterLimit = 1 + (S->fftLen >> 1); - - - // q15 - fftShift - arm_cmplx_mag_q15(pTmp2,pSrc,filterLimit); - // q14 - fftShift - - /* Apply MEL filters */ - coefsPos = 0; - for(i=0; inbMelFilters; i++) - { - arm_dot_prod_q15(pSrc+S->filterPos[i], - &(S->filterCoefs[coefsPos]), - S->filterLengths[i], - &result); - - coefsPos += S->filterLengths[i]; - - // q34.29 - fftShift - result += MICRO_Q15; - result >>= SHIFT_MELFILTER_SATURATION_Q15; - // q34.29 - fftShift - satShift - pTmp[i] = __SSAT(result,31) ; - - } - - - // q34.29 - fftShift - satShift - /* Compute the log */ - arm_vlog_q31(pTmp,pTmp,S->nbMelFilters); - - - // q5.26 - - logExponent = fftShift + 2 + SHIFT_MELFILTER_SATURATION_Q15; - logExponent = logExponent * LOG2TOLOG_Q15; - - - // q8.26 - arm_offset_q31(pTmp,logExponent,pTmp,S->nbMelFilters); - arm_shift_q31(pTmp,-19,pTmp,S->nbMelFilters); - for(i=0; inbMelFilters; i++) - { - pSrc[i] = __SSAT((q15_t)pTmp[i],16); - } - - // q8.7 - - pDctMat.numRows=S->nbDctOutputs; - pDctMat.numCols=S->nbMelFilters; - pDctMat.pData=(q15_t*)S->dctCoefs; - - arm_mat_vec_mult_q15(&pDctMat, pSrc, pDst); - - return(status); -} - -/** - @} end of MFCC group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q31.c deleted file mode 100644 index c65b9d2..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q31.c +++ /dev/null @@ -1,207 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_mfcc_q31.c - * Description: MFCC function for the q31 version - * - * $Date: 07 September 2021 - * $Revision: V1.10.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - - -#include "dsp/transform_functions.h" -#include "dsp/statistics_functions.h" -#include "dsp/basic_math_functions.h" -#include "dsp/complex_math_functions.h" -#include "dsp/fast_math_functions.h" -#include "dsp/matrix_functions.h" - -/* Constants for Q31 implementation */ -#define LOG2TOLOG_Q31 0x02C5C860 -#define MICRO_Q31 0x08637BD0 -#define SHIFT_MELFILTER_SATURATION_Q31 10 -/** - @ingroup groupTransforms - */ - - -/** - @defgroup MFCC MFCC - - MFCC Transform - - There are separate functions for floating-point, Q31, and Q31 data types. - */ - - - -/** - @addtogroup MFCC - @{ - */ - -/** - @brief MFCC Q31 - @param[in] S points to the mfcc instance structure - @param[in] pSrc points to the input samples in Q31 - @param[out] pDst points to the output MFCC values in q8.23 format - @param[inout] pTmp points to a temporary buffer of complex - - @return none - - @par Description - The number of input samples is the FFT length used - when initializing the instance data structure. - - The temporary buffer has a 2*fft length. - - The source buffer is modified by this function. - - The function may saturate. If the FFT length is too - big and the number of MEL filters too small then the fixed - point computations may saturate. - - */ - - -arm_status arm_mfcc_q31( - const arm_mfcc_instance_q31 * S, - q31_t *pSrc, - q31_t *pDst, - q31_t *pTmp - ) -{ - q31_t m; - uint32_t index; - uint32_t fftShift=0; - q31_t logExponent; - q63_t result; - arm_matrix_instance_q31 pDctMat; - uint32_t i; - uint32_t coefsPos; - uint32_t filterLimit; - q31_t *pTmp2=(q31_t*)pTmp; - - arm_status status = ARM_MATH_SUCCESS; - - // q31 - arm_absmax_q31(pSrc,S->fftLen,&m,&index); - - if (m !=0) - { - q31_t quotient; - int16_t shift; - - status = arm_divide_q31(0x7FFFFFFF,m,"ient,&shift); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - - arm_scale_q31(pSrc,quotient,shift,pSrc,S->fftLen); - } - - - // q31 - arm_mult_q31(pSrc,S->windowCoefs, pSrc, S->fftLen); - - - /* Compute spectrum magnitude - */ - fftShift = 31 - __CLZ(S->fftLen); -#if defined(ARM_MFCC_CFFT_BASED) - /* some HW accelerator for CMSIS-DSP used in some boards - are only providing acceleration for CFFT. - With ARM_MFCC_CFFT_BASED enabled, CFFT is used and the MFCC - will be accelerated on those boards. - - The default is to use RFFT - */ - /* Convert from real to complex */ - for(i=0; i < S->fftLen ; i++) - { - pTmp2[2*i] = pSrc[i]; - pTmp2[2*i+1] = 0; - } - arm_cfft_q31(&(S->cfft),pTmp2,0,1); -#else - /* Default RFFT based implementation */ - arm_rfft_q31(&(S->rfft),pSrc,pTmp2); -#endif - filterLimit = 1 + (S->fftLen >> 1); - - - // q31 - fftShift - arm_cmplx_mag_q31(pTmp2,pSrc,filterLimit); - // q30 - fftShift - - - /* Apply MEL filters */ - coefsPos = 0; - for(i=0; inbMelFilters; i++) - { - arm_dot_prod_q31(pSrc+S->filterPos[i], - &(S->filterCoefs[coefsPos]), - S->filterLengths[i], - &result); - - coefsPos += S->filterLengths[i]; - - // q16.48 - fftShift - result += MICRO_Q31; - result >>= (SHIFT_MELFILTER_SATURATION_Q31 + 18); - // q16.29 - fftShift - satShift - pTmp[i] = __SSAT(result,31) ; - - } - - - // q16.29 - fftShift - satShift - /* Compute the log */ - arm_vlog_q31(pTmp,pTmp,S->nbMelFilters); - - - // q5.26 - - logExponent = fftShift + 2 + SHIFT_MELFILTER_SATURATION_Q31; - logExponent = logExponent * LOG2TOLOG_Q31; - - - // q5.26 - arm_offset_q31(pTmp,logExponent,pTmp,S->nbMelFilters); - arm_shift_q31(pTmp,-3,pTmp,S->nbMelFilters); - - - // q8.23 - - pDctMat.numRows=S->nbDctOutputs; - pDctMat.numCols=S->nbMelFilters; - pDctMat.pData=(q31_t*)S->dctCoefs; - - arm_mat_vec_mult_q31(&pDctMat, pTmp, pDst); - - return(status); -} - -/** - @} end of MFCC group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c deleted file mode 100644 index a0adfad..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c +++ /dev/null @@ -1,318 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_f32.c - * Description: RFFT & RIFFT Floating point process function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -/* ---------------------------------------------------------------------- - * Internal functions prototypes - * -------------------------------------------------------------------- */ - -extern void arm_radix4_butterfly_f32( - float32_t * pSrc, - uint16_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier); - -extern void arm_radix4_butterfly_inverse_f32( - float32_t * pSrc, - uint16_t fftLen, - const float32_t * pCoef, - uint16_t twidCoefModifier, - float32_t onebyfftLen); - -extern void arm_bitreversal_f32( - float32_t * pSrc, - uint16_t fftSize, - uint16_t bitRevFactor, - const uint16_t * pBitRevTab); - -void arm_split_rfft_f32( - float32_t * pSrc, - uint32_t fftLen, - const float32_t * pATable, - const float32_t * pBTable, - float32_t * pDst, - uint32_t modifier); - -void arm_split_rifft_f32( - float32_t * pSrc, - uint32_t fftLen, - const float32_t * pATable, - const float32_t * pBTable, - float32_t * pDst, - uint32_t modifier); - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup RealFFT - @{ - */ - -/** - @brief Processing function for the floating-point RFFT/RIFFT. - Source buffer is modified by this function. - - @deprecated Do not use this function. It has been superceded by \ref arm_rfft_fast_f32 and will be removed in the future. - @param[in] S points to an instance of the floating-point RFFT/RIFFT structure - @param[in] pSrc points to the input buffer - @param[out] pDst points to the output buffer - @return none - - @par - For the RIFFT, the source buffer must at least have length - fftLenReal + 2. - The last two elements must be equal to what would be generated - by the RFFT: - (pSrc[0] - pSrc[1]) and 0.0f - */ - -void arm_rfft_f32( - const arm_rfft_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst) -{ - const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft; - - /* Calculation of Real IFFT of input */ - if (S->ifftFlagR == 1U) - { - /* Real IFFT core process */ - arm_split_rifft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier); - - - /* Complex radix-4 IFFT process */ - arm_radix4_butterfly_inverse_f32 (pDst, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier, S_CFFT->onebyfftLen); - - /* Bit reversal process */ - if (S->bitReverseFlagR == 1U) - { - arm_bitreversal_f32 (pDst, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable); - } - } - else - { - /* Calculation of RFFT of input */ - - /* Complex radix-4 FFT process */ - arm_radix4_butterfly_f32 (pSrc, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier); - - /* Bit reversal process */ - if (S->bitReverseFlagR == 1U) - { - arm_bitreversal_f32 (pSrc, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable); - } - - /* Real FFT core process */ - arm_split_rfft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier); - } - -} - -/** - @} end of RealFFT group - */ - -/** - @brief Core Real FFT process - @param[in] pSrc points to input buffer - @param[in] fftLen length of FFT - @param[in] pATable points to twiddle Coef A buffer - @param[in] pBTable points to twiddle Coef B buffer - @param[out] pDst points to output buffer - @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table - @return none - */ - -void arm_split_rfft_f32( - float32_t * pSrc, - uint32_t fftLen, - const float32_t * pATable, - const float32_t * pBTable, - float32_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - float32_t outR, outI; /* Temporary variables for output */ - const float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - float32_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */ - float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U]; /* temp pointers for output buffer */ - float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U]; /* temp pointers for input buffer */ - - /* Init coefficient pointers */ - pCoefA = &pATable[modifier * 2]; - pCoefB = &pBTable[modifier * 2]; - - i = fftLen - 1U; - - while (i > 0U) - { - /* - outR = ( pSrc[2 * i] * pATable[2 * i] - - pSrc[2 * i + 1] * pATable[2 * i + 1] - + pSrc[2 * n - 2 * i] * pBTable[2 * i] - + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - - outI = ( pIn[2 * i + 1] * pATable[2 * i] - + pIn[2 * i] * pATable[2 * i + 1] - + pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - */ - - /* read pATable[2 * i] */ - CoefA1 = *pCoefA++; - /* pATable[2 * i + 1] */ - CoefA2 = *pCoefA; - - /* pSrc[2 * i] * pATable[2 * i] */ - outR = *pSrc1 * CoefA1; - /* pSrc[2 * i] * CoefA2 */ - outI = *pSrc1++ * CoefA2; - - /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */ - outR -= (*pSrc1 + *pSrc2) * CoefA2; - /* pSrc[2 * i + 1] * CoefA1 */ - outI += *pSrc1++ * CoefA1; - - CoefB1 = *pCoefB; - - /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */ - outI -= *pSrc2-- * CoefB1; - /* pSrc[2 * fftLen - 2 * i] * CoefA2 */ - outI -= *pSrc2 * CoefA2; - - /* pSrc[2 * fftLen - 2 * i] * CoefB1 */ - outR += *pSrc2-- * CoefB1; - - /* write output */ - *pDst1++ = outR; - *pDst1++ = outI; - - /* write complex conjugate output */ - *pDst2-- = -outI; - *pDst2-- = outR; - - /* update coefficient pointer */ - pCoefB = pCoefB + (modifier * 2U); - pCoefA = pCoefA + ((modifier * 2U) - 1U); - - i--; - - } - - pDst[2U * fftLen] = pSrc[0] - pSrc[1]; - pDst[(2U * fftLen) + 1U] = 0.0f; - - pDst[0] = pSrc[0] + pSrc[1]; - pDst[1] = 0.0f; - -} - - -/** - @brief Core Real IFFT process - @param[in] pSrc points to input buffer - @param[in] fftLen length of FFT - @param[in] pATable points to twiddle Coef A buffer - @param[in] pBTable points to twiddle Coef B buffer - @param[out] pDst points to output buffer - @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table - @return none - */ - -void arm_split_rifft_f32( - float32_t * pSrc, - uint32_t fftLen, - const float32_t * pATable, - const float32_t * pBTable, - float32_t * pDst, - uint32_t modifier) -{ - float32_t outR, outI; /* Temporary variables for output */ - const float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - float32_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */ - float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U]; - - pCoefA = &pATable[0]; - pCoefB = &pBTable[0]; - - while (fftLen > 0U) - { - /* - outR = ( pIn[2 * i] * pATable[2 * i] - + pIn[2 * i + 1] * pATable[2 * i + 1] - + pIn[2 * n - 2 * i] * pBTable[2 * i] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - - outI = ( pIn[2 * i + 1] * pATable[2 * i] - - pIn[2 * i] * pATable[2 * i + 1] - - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - */ - - CoefA1 = *pCoefA++; - CoefA2 = *pCoefA; - - /* outR = (pSrc[2 * i] * CoefA1 */ - outR = *pSrc1 * CoefA1; - - /* - pSrc[2 * i] * CoefA2 */ - outI = -(*pSrc1++) * CoefA2; - - /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */ - outR += (*pSrc1 + *pSrc2) * CoefA2; - - /* pSrc[2 * i + 1] * CoefA1 */ - outI += (*pSrc1++) * CoefA1; - - CoefB1 = *pCoefB; - - /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */ - outI -= *pSrc2-- * CoefB1; - - /* pSrc[2 * fftLen - 2 * i] * CoefB1 */ - outR += *pSrc2 * CoefB1; - - /* pSrc[2 * fftLen - 2 * i] * CoefA2 */ - outI += *pSrc2-- * CoefA2; - - /* write output */ - *pDst++ = outR; - *pDst++ = outI; - - /* update coefficient pointer */ - pCoefB = pCoefB + (modifier * 2); - pCoefA = pCoefA + (modifier * 2 - 1); - - /* Decrement loop count */ - fftLen--; - } - -} diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f16.c deleted file mode 100644 index 8da4ce4..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f16.c +++ /dev/null @@ -1,612 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_fast_f16.c - * Description: RFFT & RIFFT Floating point process function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions_f16.h" -#include "arm_common_tables_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - - -#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) - -void stage_rfft_f16( - const arm_rfft_fast_instance_f16 * S, - float16_t * p, - float16_t * pOut) -{ - int32_t k; /* Loop Counter */ - float16_t twR, twI; /* RFFT Twiddle coefficients */ - const float16_t * pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ - float16_t *pA = p; /* increasing pointer */ - float16_t *pB = p; /* decreasing pointer */ - float16_t xAR, xAI, xBR, xBI; /* temporary variables */ - float16_t t1a, t1b; /* temporary variables */ - float16_t p0, p1, p2, p3; /* temporary variables */ - - float16x8x2_t tw,xA,xB; - float16x8x2_t tmp1, tmp2, res; - - uint16x8_t vecStridesBkwd; - - vecStridesBkwd = vddupq_u16((uint16_t)14, 2); - - - int blockCnt; - - - k = (S->Sint).fftLen - 1; - - /* Pack first and last sample of the frequency domain together */ - - xBR = pB[0]; - xBI = pB[1]; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++ ; - twI = *pCoeff++ ; - - // U1 = XA(1) + XB(1); % It is real - t1a = (_Float16)xBR + (_Float16)xAR ; - - // U2 = XB(1) - XA(1); % It is imaginary - t1b = (_Float16)xBI + (_Float16)xAI ; - - // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); - // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); - *pOut++ = 0.5f16 * ( (_Float16)t1a + (_Float16)t1b ); - *pOut++ = 0.5f16 * ( (_Float16)t1a - (_Float16)t1b ); - - // XA(1) = 1/2*( U1 - imag(U2) + i*( U1 +imag(U2) )); - pB = p + 2*k - 14; - pA += 2; - - blockCnt = k >> 3; - while (blockCnt > 0) - { - /* - function X = my_split_rfft(X, ifftFlag) - % X is a series of real numbers - L = length(X); - XC = X(1:2:end) +i*X(2:2:end); - XA = fft(XC); - XB = conj(XA([1 end:-1:2])); - TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; - for l = 2:L/2 - XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); - end - XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1)))); - X = XA; - */ - - - xA = vld2q_f16(pA); - pA += 16; - - xB = vld2q_f16(pB); - - xB.val[0] = vldrhq_gather_shifted_offset_f16(pB, vecStridesBkwd); - xB.val[1] = vldrhq_gather_shifted_offset_f16(&pB[1], vecStridesBkwd); - - xB.val[1] = vnegq_f16(xB.val[1]); - pB -= 16; - - - tw = vld2q_f16(pCoeff); - pCoeff += 16; - - - tmp1.val[0] = vaddq_f16(xA.val[0],xB.val[0]); - tmp1.val[1] = vaddq_f16(xA.val[1],xB.val[1]); - - tmp2.val[0] = vsubq_f16(xB.val[0],xA.val[0]); - tmp2.val[1] = vsubq_f16(xB.val[1],xA.val[1]); - - res.val[0] = vmulq(tw.val[0], tmp2.val[0]); - res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]); - - res.val[1] = vmulq(tw.val[0], tmp2.val[1]); - res.val[1] = vfmaq(res.val[1], tw.val[1], tmp2.val[0]); - - res.val[0] = vaddq_f16(res.val[0],tmp1.val[0] ); - res.val[1] = vaddq_f16(res.val[1],tmp1.val[1] ); - - res.val[0] = vmulq_n_f16(res.val[0], 0.5f); - res.val[1] = vmulq_n_f16(res.val[1], 0.5f); - - - vst2q_f16(pOut, res); - pOut += 16; - - - blockCnt--; - } - - pB += 14; - blockCnt = k & 7; - while (blockCnt > 0) - { - /* - function X = my_split_rfft(X, ifftFlag) - % X is a series of real numbers - L = length(X); - XC = X(1:2:end) +i*X(2:2:end); - XA = fft(XC); - XB = conj(XA([1 end:-1:2])); - TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; - for l = 2:L/2 - XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); - end - XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1)))); - X = XA; - */ - - xBI = pB[1]; - xBR = pB[0]; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++; - twI = *pCoeff++; - - t1a = (_Float16)xBR - (_Float16)xAR ; - t1b = (_Float16)xBI + (_Float16)xAI ; - - // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); - // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); - p0 = (_Float16)twR * (_Float16)t1a; - p1 = (_Float16)twI * (_Float16)t1a; - p2 = (_Float16)twR * (_Float16)t1b; - p3 = (_Float16)twI * (_Float16)t1b; - - *pOut++ = 0.5f16 * ((_Float16)xAR + (_Float16)xBR + (_Float16)p0 + (_Float16)p3 ); //xAR - *pOut++ = 0.5f16 * ((_Float16)xAI - (_Float16)xBI + (_Float16)p1 - (_Float16)p2 ); //xAI - - pA += 2; - pB -= 2; - blockCnt--; - } -} - -/* Prepares data for inverse cfft */ -void merge_rfft_f16( - const arm_rfft_fast_instance_f16 * S, - float16_t * p, - float16_t * pOut) -{ - int32_t k; /* Loop Counter */ - float16_t twR, twI; /* RFFT Twiddle coefficients */ - const float16_t *pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ - float16_t *pA = p; /* increasing pointer */ - float16_t *pB = p; /* decreasing pointer */ - float16_t xAR, xAI, xBR, xBI; /* temporary variables */ - float16_t t1a, t1b, r, s, t, u; /* temporary variables */ - - float16x8x2_t tw,xA,xB; - float16x8x2_t tmp1, tmp2, res; - uint16x8_t vecStridesBkwd; - - vecStridesBkwd = vddupq_u16((uint16_t)14, 2); - - int blockCnt; - - - k = (S->Sint).fftLen - 1; - - xAR = pA[0]; - xAI = pA[1]; - - pCoeff += 2 ; - - *pOut++ = 0.5f16 * ( (_Float16)xAR + (_Float16)xAI ); - *pOut++ = 0.5f16 * ( (_Float16)xAR - (_Float16)xAI ); - - pB = p + 2*k - 14; - pA += 2 ; - - blockCnt = k >> 3; - while (blockCnt > 0) - { - /* G is half of the frequency complex spectrum */ - //for k = 2:N - // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); - xA = vld2q_f16(pA); - pA += 16; - - xB = vld2q_f16(pB); - - xB.val[0] = vldrhq_gather_shifted_offset_f16(pB, vecStridesBkwd); - xB.val[1] = vldrhq_gather_shifted_offset_f16(&pB[1], vecStridesBkwd); - - xB.val[1] = vnegq_f16(xB.val[1]); - pB -= 16; - - - tw = vld2q_f16(pCoeff); - tw.val[1] = vnegq_f16(tw.val[1]); - pCoeff += 16; - - - tmp1.val[0] = vaddq_f16(xA.val[0],xB.val[0]); - tmp1.val[1] = vaddq_f16(xA.val[1],xB.val[1]); - - tmp2.val[0] = vsubq_f16(xB.val[0],xA.val[0]); - tmp2.val[1] = vsubq_f16(xB.val[1],xA.val[1]); - - res.val[0] = vmulq(tw.val[0], tmp2.val[0]); - res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]); - - res.val[1] = vmulq(tw.val[0], tmp2.val[1]); - res.val[1] = vfmaq(res.val[1], tw.val[1], tmp2.val[0]); - - res.val[0] = vaddq_f16(res.val[0],tmp1.val[0] ); - res.val[1] = vaddq_f16(res.val[1],tmp1.val[1] ); - - res.val[0] = vmulq_n_f16(res.val[0], 0.5f); - res.val[1] = vmulq_n_f16(res.val[1], 0.5f); - - - vst2q_f16(pOut, res); - pOut += 16; - - - blockCnt--; - } - - pB += 14; - blockCnt = k & 7; - while (blockCnt > 0) - { - /* G is half of the frequency complex spectrum */ - //for k = 2:N - // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); - xBI = pB[1] ; - xBR = pB[0] ; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++; - twI = *pCoeff++; - - t1a = (_Float16)xAR - (_Float16)xBR ; - t1b = (_Float16)xAI + (_Float16)xBI ; - - r = (_Float16)twR * (_Float16)t1a; - s = (_Float16)twI * (_Float16)t1b; - t = (_Float16)twI * (_Float16)t1a; - u = (_Float16)twR * (_Float16)t1b; - - // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI); - // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI); - *pOut++ = 0.5f16 * ((_Float16)xAR + (_Float16)xBR - (_Float16)r - (_Float16)s ); //xAR - *pOut++ = 0.5f16 * ((_Float16)xAI - (_Float16)xBI + (_Float16)t - (_Float16)u ); //xAI - - pA += 2; - pB -= 2; - blockCnt--; - } - -} -#else -void stage_rfft_f16( - const arm_rfft_fast_instance_f16 * S, - float16_t * p, - float16_t * pOut) -{ - int32_t k; /* Loop Counter */ - float16_t twR, twI; /* RFFT Twiddle coefficients */ - const float16_t * pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ - float16_t *pA = p; /* increasing pointer */ - float16_t *pB = p; /* decreasing pointer */ - float16_t xAR, xAI, xBR, xBI; /* temporary variables */ - float16_t t1a, t1b; /* temporary variables */ - float16_t p0, p1, p2, p3; /* temporary variables */ - - - k = (S->Sint).fftLen - 1; - - /* Pack first and last sample of the frequency domain together */ - - xBR = pB[0]; - xBI = pB[1]; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++ ; - twI = *pCoeff++ ; - - - // U1 = XA(1) + XB(1); % It is real - t1a = (_Float16)xBR + (_Float16)xAR ; - - // U2 = XB(1) - XA(1); % It is imaginary - t1b = (_Float16)xBI + (_Float16)xAI ; - - // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); - // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); - *pOut++ = 0.5f16 * ( (_Float16)t1a + (_Float16)t1b ); - *pOut++ = 0.5f16 * ( (_Float16)t1a - (_Float16)t1b ); - - // XA(1) = 1/2*( U1 - imag(U2) + i*( U1 +imag(U2) )); - pB = p + 2*k; - pA += 2; - - do - { - /* - function X = my_split_rfft(X, ifftFlag) - % X is a series of real numbers - L = length(X); - XC = X(1:2:end) +i*X(2:2:end); - XA = fft(XC); - XB = conj(XA([1 end:-1:2])); - TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; - for l = 2:L/2 - XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); - end - XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1)))); - X = XA; - */ - - xBI = pB[1]; - xBR = pB[0]; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++; - twI = *pCoeff++; - - t1a = (_Float16)xBR - (_Float16)xAR ; - t1b = (_Float16)xBI + (_Float16)xAI ; - - // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); - // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); - p0 = (_Float16)twR * (_Float16)t1a; - p1 = (_Float16)twI * (_Float16)t1a; - p2 = (_Float16)twR * (_Float16)t1b; - p3 = (_Float16)twI * (_Float16)t1b; - - *pOut++ = 0.5f16 * ((_Float16)xAR + (_Float16)xBR + (_Float16)p0 + (_Float16)p3 ); //xAR - *pOut++ = 0.5f16 * ((_Float16)xAI - (_Float16)xBI + (_Float16)p1 - (_Float16)p2 ); //xAI - - - pA += 2; - pB -= 2; - k--; - } while (k > 0); -} - -/* Prepares data for inverse cfft */ -void merge_rfft_f16( - const arm_rfft_fast_instance_f16 * S, - float16_t * p, - float16_t * pOut) -{ - int32_t k; /* Loop Counter */ - float16_t twR, twI; /* RFFT Twiddle coefficients */ - const float16_t *pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ - float16_t *pA = p; /* increasing pointer */ - float16_t *pB = p; /* decreasing pointer */ - float16_t xAR, xAI, xBR, xBI; /* temporary variables */ - float16_t t1a, t1b, r, s, t, u; /* temporary variables */ - - k = (S->Sint).fftLen - 1; - - xAR = pA[0]; - xAI = pA[1]; - - pCoeff += 2 ; - - *pOut++ = 0.5f16 * ( (_Float16)xAR + (_Float16)xAI ); - *pOut++ = 0.5f16 * ( (_Float16)xAR - (_Float16)xAI ); - - pB = p + 2*k ; - pA += 2 ; - - while (k > 0) - { - /* G is half of the frequency complex spectrum */ - //for k = 2:N - // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); - xBI = pB[1] ; - xBR = pB[0] ; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++; - twI = *pCoeff++; - - t1a = (_Float16)xAR - (_Float16)xBR ; - t1b = (_Float16)xAI + (_Float16)xBI ; - - r = (_Float16)twR * (_Float16)t1a; - s = (_Float16)twI * (_Float16)t1b; - t = (_Float16)twI * (_Float16)t1a; - u = (_Float16)twR * (_Float16)t1b; - - // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI); - // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI); - *pOut++ = 0.5f16 * ((_Float16)xAR + (_Float16)xBR - (_Float16)r - (_Float16)s ); //xAR - *pOut++ = 0.5f16 * ((_Float16)xAI - (_Float16)xBI + (_Float16)t - (_Float16)u ); //xAI - - pA += 2; - pB -= 2; - k--; - } - -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @ingroup groupTransforms -*/ - -/** - @defgroup RealFFT Real FFT Functions - - @par - The CMSIS DSP library includes specialized algorithms for computing the - FFT of real data sequences. The FFT is defined over complex data but - in many applications the input is real. Real FFT algorithms take advantage - of the symmetry properties of the FFT and have a speed advantage over complex - algorithms of the same length. - @par - The Fast RFFT algorithm relays on the mixed radix CFFT that save processor usage. - @par - The real length N forward FFT of a sequence is computed using the steps shown below. - @par - \image html RFFT.gif "Real Fast Fourier Transform" - @par - The real sequence is initially treated as if it were complex to perform a CFFT. - Later, a processing stage reshapes the data to obtain half of the frequency spectrum - in complex format. Except the first complex number that contains the two real numbers - X[0] and X[N/2] all the data is complex. In other words, the first complex sample - contains two real values packed. - @par - The input for the inverse RFFT should keep the same format as the output of the - forward RFFT. A first processing stage pre-process the data to later perform an - inverse CFFT. - @par - \image html RIFFT.gif "Real Inverse Fast Fourier Transform" - @par - The algorithms for floating-point, Q15, and Q31 data are slightly different - and we describe each algorithm in turn. - @par Floating-point - The main functions are \ref arm_rfft_fast_f16() and \ref arm_rfft_fast_init_f16(). - - @par - The FFT of a real N-point sequence has even symmetry in the frequency domain. - The second half of the data equals the conjugate of the first half flipped in frequency. - Looking at the data, we see that we can uniquely represent the FFT using only N/2 complex numbers. - These are packed into the output array in alternating real and imaginary components: - @par - X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ... - real[(N/2)-1], imag[(N/2)-1 } - @par - It happens that the first complex number (real[0], imag[0]) is actually - all real. real[0] represents the DC offset, and imag[0] should be 0. - (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is - the first harmonic and so on. - @par - The real FFT functions pack the frequency domain data in this fashion. - The forward transform outputs the data in this form and the inverse - transform expects input data in this form. The function always performs - the needed bitreversal so that the input and output data is always in - normal order. The functions support lengths of [32, 64, 128, ..., 4096] - samples. - @par Q15 and Q31 - The real algorithms are defined in a similar manner and utilize N/2 complex - transforms behind the scenes. - @par - The complex transforms used internally include scaling to prevent fixed-point - overflows. The overall scaling equals 1/(fftLen/2). - Due to the use of complex transform internally, the source buffer is - modified by the rfft. - @par - A separate instance structure must be defined for each transform used but - twiddle factor and bit reversal tables can be reused. - @par - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Initializes twiddle factor table and bit reversal table pointers. - - Initializes the internal complex FFT data structure. - @par - Use of the initialization function is optional **except for MVE versions where it is mandatory**. - If you don't use the initialization functions, then the structures should be initialized with code - similar to the one below: - 
-      arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
-      arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
-
- where fftLenReal is the length of the real transform; - fftLenBy2 length of the internal complex transform (fftLenReal/2). - ifftFlagR Selects forward (=0) or inverse (=1) transform. - bitReverseFlagR Selects bit reversed output (=0) or normal order - output (=1). - twidCoefRModifier stride modifier for the twiddle factor table. - The value is based on the FFT length; - pTwiddleARealpoints to the A array of twiddle coefficients; - pTwiddleBRealpoints to the B array of twiddle coefficients; - pCfft points to the CFFT Instance structure. The CFFT structure - must also be initialized. -@par - Note that with MVE versions you can't initialize instance structures directly and **must - use the initialization function**. - */ - -/** - @addtogroup RealFFT - @{ -*/ - -/** - @brief Processing function for the floating-point real FFT. - @param[in] S points to an arm_rfft_fast_instance_f16 structure - @param[in] p points to input buffer (Source buffer is modified by this function.) - @param[in] pOut points to output buffer - @param[in] ifftFlag - - value = 0: RFFT - - value = 1: RIFFT - @return none -*/ - -void arm_rfft_fast_f16( - const arm_rfft_fast_instance_f16 * S, - float16_t * p, - float16_t * pOut, - uint8_t ifftFlag) -{ - const arm_cfft_instance_f16 * Sint = &(S->Sint); - - - /* Calculation of Real FFT */ - if (ifftFlag) - { - /* Real FFT compression */ - merge_rfft_f16(S, p, pOut); - /* Complex radix-4 IFFT process */ - arm_cfft_f16( Sint, pOut, ifftFlag, 1); - } - else - { - - /* Calculation of RFFT of input */ - arm_cfft_f16( Sint, p, ifftFlag, 1); - - /* Real FFT extraction */ - stage_rfft_f16(S, p, pOut); - } -} - -/** -* @} end of RealFFT group -*/ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c deleted file mode 100644 index b924912..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c +++ /dev/null @@ -1,603 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_fast_f32.c - * Description: RFFT & RIFFT Floating point process function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) -void stage_rfft_f32( - const arm_rfft_fast_instance_f32 * S, - float32_t * p, - float32_t * pOut) -{ - int32_t k; /* Loop Counter */ - float32_t twR, twI; /* RFFT Twiddle coefficients */ - const float32_t * pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ - float32_t *pA = p; /* increasing pointer */ - float32_t *pB = p; /* decreasing pointer */ - float32_t xAR, xAI, xBR, xBI; /* temporary variables */ - float32_t t1a, t1b; /* temporary variables */ - float32_t p0, p1, p2, p3; /* temporary variables */ - - float32x4x2_t tw,xA,xB; - float32x4x2_t tmp1, tmp2, res; - - uint32x4_t vecStridesFwd, vecStridesBkwd; - - vecStridesFwd = vidupq_u32((uint32_t)0, 2); - vecStridesBkwd = -vecStridesFwd; - - int blockCnt; - - - k = (S->Sint).fftLen - 1; - - /* Pack first and last sample of the frequency domain together */ - - xBR = pB[0]; - xBI = pB[1]; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++ ; - twI = *pCoeff++ ; - - // U1 = XA(1) + XB(1); % It is real - t1a = xBR + xAR ; - - // U2 = XB(1) - XA(1); % It is imaginary - t1b = xBI + xAI ; - - // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); - // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); - *pOut++ = 0.5f * ( t1a + t1b ); - *pOut++ = 0.5f * ( t1a - t1b ); - - // XA(1) = 1/2*( U1 - imag(U2) + i*( U1 +imag(U2) )); - pB = p + 2*k; - pA += 2; - - blockCnt = k >> 2; - while (blockCnt > 0) - { - /* - function X = my_split_rfft(X, ifftFlag) - % X is a series of real numbers - L = length(X); - XC = X(1:2:end) +i*X(2:2:end); - XA = fft(XC); - XB = conj(XA([1 end:-1:2])); - TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; - for l = 2:L/2 - XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); - end - XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1)))); - X = XA; - */ - - - xA = vld2q_f32(pA); - pA += 8; - - xB = vld2q_f32(pB); - - xB.val[0] = vldrwq_gather_shifted_offset_f32(pB, vecStridesBkwd); - xB.val[1] = vldrwq_gather_shifted_offset_f32(&pB[1], vecStridesBkwd); - - xB.val[1] = vnegq_f32(xB.val[1]); - pB -= 8; - - - tw = vld2q_f32(pCoeff); - pCoeff += 8; - - - tmp1.val[0] = vaddq_f32(xA.val[0],xB.val[0]); - tmp1.val[1] = vaddq_f32(xA.val[1],xB.val[1]); - - tmp2.val[0] = vsubq_f32(xB.val[0],xA.val[0]); - tmp2.val[1] = vsubq_f32(xB.val[1],xA.val[1]); - - res.val[0] = vmulq(tw.val[0], tmp2.val[0]); - res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]); - - res.val[1] = vmulq(tw.val[0], tmp2.val[1]); - res.val[1] = vfmaq(res.val[1], tw.val[1], tmp2.val[0]); - - res.val[0] = vaddq_f32(res.val[0],tmp1.val[0] ); - res.val[1] = vaddq_f32(res.val[1],tmp1.val[1] ); - - res.val[0] = vmulq_n_f32(res.val[0], 0.5f); - res.val[1] = vmulq_n_f32(res.val[1], 0.5f); - - - vst2q_f32(pOut, res); - pOut += 8; - - - blockCnt--; - } - - blockCnt = k & 3; - while (blockCnt > 0) - { - /* - function X = my_split_rfft(X, ifftFlag) - % X is a series of real numbers - L = length(X); - XC = X(1:2:end) +i*X(2:2:end); - XA = fft(XC); - XB = conj(XA([1 end:-1:2])); - TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; - for l = 2:L/2 - XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); - end - XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1)))); - X = XA; - */ - - xBI = pB[1]; - xBR = pB[0]; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++; - twI = *pCoeff++; - - t1a = xBR - xAR ; - t1b = xBI + xAI ; - - // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); - // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); - p0 = twR * t1a; - p1 = twI * t1a; - p2 = twR * t1b; - p3 = twI * t1b; - - *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR - *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI - - pA += 2; - pB -= 2; - blockCnt--; - } -} - -/* Prepares data for inverse cfft */ -void merge_rfft_f32( - const arm_rfft_fast_instance_f32 * S, - float32_t * p, - float32_t * pOut) -{ - int32_t k; /* Loop Counter */ - float32_t twR, twI; /* RFFT Twiddle coefficients */ - const float32_t *pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ - float32_t *pA = p; /* increasing pointer */ - float32_t *pB = p; /* decreasing pointer */ - float32_t xAR, xAI, xBR, xBI; /* temporary variables */ - float32_t t1a, t1b, r, s, t, u; /* temporary variables */ - - float32x4x2_t tw,xA,xB; - float32x4x2_t tmp1, tmp2, res; - uint32x4_t vecStridesFwd, vecStridesBkwd; - - vecStridesFwd = vidupq_u32((uint32_t)0, 2); - vecStridesBkwd = -vecStridesFwd; - - int blockCnt; - - - k = (S->Sint).fftLen - 1; - - xAR = pA[0]; - xAI = pA[1]; - - pCoeff += 2 ; - - *pOut++ = 0.5f * ( xAR + xAI ); - *pOut++ = 0.5f * ( xAR - xAI ); - - pB = p + 2*k ; - pA += 2 ; - - blockCnt = k >> 2; - while (blockCnt > 0) - { - /* G is half of the frequency complex spectrum */ - //for k = 2:N - // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); - xA = vld2q_f32(pA); - pA += 8; - - xB = vld2q_f32(pB); - - xB.val[0] = vldrwq_gather_shifted_offset_f32(pB, vecStridesBkwd); - xB.val[1] = vldrwq_gather_shifted_offset_f32(&pB[1], vecStridesBkwd); - - xB.val[1] = vnegq_f32(xB.val[1]); - pB -= 8; - - - tw = vld2q_f32(pCoeff); - tw.val[1] = vnegq_f32(tw.val[1]); - pCoeff += 8; - - - tmp1.val[0] = vaddq_f32(xA.val[0],xB.val[0]); - tmp1.val[1] = vaddq_f32(xA.val[1],xB.val[1]); - - tmp2.val[0] = vsubq_f32(xB.val[0],xA.val[0]); - tmp2.val[1] = vsubq_f32(xB.val[1],xA.val[1]); - - res.val[0] = vmulq(tw.val[0], tmp2.val[0]); - res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]); - - res.val[1] = vmulq(tw.val[0], tmp2.val[1]); - res.val[1] = vfmaq(res.val[1], tw.val[1], tmp2.val[0]); - - res.val[0] = vaddq_f32(res.val[0],tmp1.val[0] ); - res.val[1] = vaddq_f32(res.val[1],tmp1.val[1] ); - - res.val[0] = vmulq_n_f32(res.val[0], 0.5f); - res.val[1] = vmulq_n_f32(res.val[1], 0.5f); - - - vst2q_f32(pOut, res); - pOut += 8; - - - blockCnt--; - } - - blockCnt = k & 3; - while (blockCnt > 0) - { - /* G is half of the frequency complex spectrum */ - //for k = 2:N - // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); - xBI = pB[1] ; - xBR = pB[0] ; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++; - twI = *pCoeff++; - - t1a = xAR - xBR ; - t1b = xAI + xBI ; - - r = twR * t1a; - s = twI * t1b; - t = twI * t1a; - u = twR * t1b; - - // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI); - // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI); - *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR - *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI - - pA += 2; - pB -= 2; - blockCnt--; - } - -} -#else -void stage_rfft_f32( - const arm_rfft_fast_instance_f32 * S, - float32_t * p, - float32_t * pOut) -{ - int32_t k; /* Loop Counter */ - float32_t twR, twI; /* RFFT Twiddle coefficients */ - const float32_t * pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ - float32_t *pA = p; /* increasing pointer */ - float32_t *pB = p; /* decreasing pointer */ - float32_t xAR, xAI, xBR, xBI; /* temporary variables */ - float32_t t1a, t1b; /* temporary variables */ - float32_t p0, p1, p2, p3; /* temporary variables */ - - - k = (S->Sint).fftLen - 1; - - /* Pack first and last sample of the frequency domain together */ - - xBR = pB[0]; - xBI = pB[1]; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++ ; - twI = *pCoeff++ ; - - - // U1 = XA(1) + XB(1); % It is real - t1a = xBR + xAR ; - - // U2 = XB(1) - XA(1); % It is imaginary - t1b = xBI + xAI ; - - // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); - // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); - *pOut++ = 0.5f * ( t1a + t1b ); - *pOut++ = 0.5f * ( t1a - t1b ); - - // XA(1) = 1/2*( U1 - imag(U2) + i*( U1 +imag(U2) )); - pB = p + 2*k; - pA += 2; - - do - { - /* - function X = my_split_rfft(X, ifftFlag) - % X is a series of real numbers - L = length(X); - XC = X(1:2:end) +i*X(2:2:end); - XA = fft(XC); - XB = conj(XA([1 end:-1:2])); - TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; - for l = 2:L/2 - XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); - end - XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1)))); - X = XA; - */ - - xBI = pB[1]; - xBR = pB[0]; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++; - twI = *pCoeff++; - - t1a = xBR - xAR ; - t1b = xBI + xAI ; - - // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); - // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); - p0 = twR * t1a; - p1 = twI * t1a; - p2 = twR * t1b; - p3 = twI * t1b; - - *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR - *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI - - - pA += 2; - pB -= 2; - k--; - } while (k > 0); -} - -/* Prepares data for inverse cfft */ -void merge_rfft_f32( - const arm_rfft_fast_instance_f32 * S, - float32_t * p, - float32_t * pOut) -{ - int32_t k; /* Loop Counter */ - float32_t twR, twI; /* RFFT Twiddle coefficients */ - const float32_t *pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ - float32_t *pA = p; /* increasing pointer */ - float32_t *pB = p; /* decreasing pointer */ - float32_t xAR, xAI, xBR, xBI; /* temporary variables */ - float32_t t1a, t1b, r, s, t, u; /* temporary variables */ - - k = (S->Sint).fftLen - 1; - - xAR = pA[0]; - xAI = pA[1]; - - pCoeff += 2 ; - - *pOut++ = 0.5f * ( xAR + xAI ); - *pOut++ = 0.5f * ( xAR - xAI ); - - pB = p + 2*k ; - pA += 2 ; - - while (k > 0) - { - /* G is half of the frequency complex spectrum */ - //for k = 2:N - // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); - xBI = pB[1] ; - xBR = pB[0] ; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++; - twI = *pCoeff++; - - t1a = xAR - xBR ; - t1b = xAI + xBI ; - - r = twR * t1a; - s = twI * t1b; - t = twI * t1a; - u = twR * t1b; - - // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI); - // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI); - *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR - *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI - - pA += 2; - pB -= 2; - k--; - } - -} - -#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */ - -/** - @ingroup groupTransforms -*/ - -/** - @defgroup RealFFT Real FFT Functions - - @par - The CMSIS DSP library includes specialized algorithms for computing the - FFT of real data sequences. The FFT is defined over complex data but - in many applications the input is real. Real FFT algorithms take advantage - of the symmetry properties of the FFT and have a speed advantage over complex - algorithms of the same length. - @par - The Fast RFFT algorithm relays on the mixed radix CFFT that save processor usage. - @par - The real length N forward FFT of a sequence is computed using the steps shown below. - @par - \image html RFFT.gif "Real Fast Fourier Transform" - @par - The real sequence is initially treated as if it were complex to perform a CFFT. - Later, a processing stage reshapes the data to obtain half of the frequency spectrum - in complex format. Except the first complex number that contains the two real numbers - X[0] and X[N/2] all the data is complex. In other words, the first complex sample - contains two real values packed. - @par - The input for the inverse RFFT should keep the same format as the output of the - forward RFFT. A first processing stage pre-process the data to later perform an - inverse CFFT. - @par - \image html RIFFT.gif "Real Inverse Fast Fourier Transform" - @par - The algorithms for floating-point, Q15, and Q31 data are slightly different - and we describe each algorithm in turn. - @par Floating-point - The main functions are \ref arm_rfft_fast_f32() and \ref arm_rfft_fast_init_f32(). - The older functions \ref arm_rfft_f32() and \ref arm_rfft_init_f32() have been deprecated - but are still documented. - @par - The FFT of a real N-point sequence has even symmetry in the frequency domain. - The second half of the data equals the conjugate of the first half flipped in frequency. - Looking at the data, we see that we can uniquely represent the FFT using only N/2 complex numbers. - These are packed into the output array in alternating real and imaginary components: - @par - X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ... - real[(N/2)-1], imag[(N/2)-1 } - @par - It happens that the first complex number (real[0], imag[0]) is actually - all real. real[0] represents the DC offset, and imag[0] should be 0. - (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is - the first harmonic and so on. - @par - The real FFT functions pack the frequency domain data in this fashion. - The forward transform outputs the data in this form and the inverse - transform expects input data in this form. The function always performs - the needed bitreversal so that the input and output data is always in - normal order. The functions support lengths of [32, 64, 128, ..., 4096] - samples. - @par Q15 and Q31 - The real algorithms are defined in a similar manner and utilize N/2 complex - transforms behind the scenes. - @par - The complex transforms used internally include scaling to prevent fixed-point - overflows. The overall scaling equals 1/(fftLen/2). - Due to the use of complex transform internally, the source buffer is - modified by the rfft. - @par - A separate instance structure must be defined for each transform used but - twiddle factor and bit reversal tables can be reused. - @par - There is also an associated initialization function for each data type. - The initialization function performs the following operations: - - Sets the values of the internal structure fields. - - Initializes twiddle factor table and bit reversal table pointers. - - Initializes the internal complex FFT data structure. - @par - Use of the initialization function is optional **except for MVE versions where it is mandatory**. - If you don't use the initialization functions, then the structures should be initialized with code - similar to the one below: - 
-      arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
-      arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
-
- where fftLenReal is the length of the real transform; - fftLenBy2 length of the internal complex transform (fftLenReal/2). - ifftFlagR Selects forward (=0) or inverse (=1) transform. - bitReverseFlagR Selects bit reversed output (=0) or normal order - output (=1). - twidCoefRModifier stride modifier for the twiddle factor table. - The value is based on the FFT length; - pTwiddleARealpoints to the A array of twiddle coefficients; - pTwiddleBRealpoints to the B array of twiddle coefficients; - pCfft points to the CFFT Instance structure. The CFFT structure - must also be initialized. -@par - Note that with MVE versions you can't initialize instance structures directly and **must - use the initialization function**. - */ - -/** - @addtogroup RealFFT - @{ -*/ - -/** - @brief Processing function for the floating-point real FFT. - @param[in] S points to an arm_rfft_fast_instance_f32 structure - @param[in] p points to input buffer (Source buffer is modified by this function.) - @param[in] pOut points to output buffer - @param[in] ifftFlag - - value = 0: RFFT - - value = 1: RIFFT - @return none -*/ - -void arm_rfft_fast_f32( - const arm_rfft_fast_instance_f32 * S, - float32_t * p, - float32_t * pOut, - uint8_t ifftFlag) -{ - const arm_cfft_instance_f32 * Sint = &(S->Sint); - - /* Calculation of Real FFT */ - if (ifftFlag) - { - /* Real FFT compression */ - merge_rfft_f32(S, p, pOut); - /* Complex radix-4 IFFT process */ - arm_cfft_f32( Sint, pOut, ifftFlag, 1); - } - else - { - /* Calculation of RFFT of input */ - arm_cfft_f32( Sint, p, ifftFlag, 1); - - /* Real FFT extraction */ - stage_rfft_f32(S, p, pOut); - } -} - -/** -* @} end of RealFFT group -*/ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c deleted file mode 100644 index b038f29..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c +++ /dev/null @@ -1,228 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_fast_f64.c - * Description: RFFT & RIFFT Double precision Floating point process function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -void stage_rfft_f64( - const arm_rfft_fast_instance_f64 * S, - float64_t * p, - float64_t * pOut) -{ - uint32_t k; /* Loop Counter */ - float64_t twR, twI; /* RFFT Twiddle coefficients */ - const float64_t * pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ - float64_t *pA = p; /* increasing pointer */ - float64_t *pB = p; /* decreasing pointer */ - float64_t xAR, xAI, xBR, xBI; /* temporary variables */ - float64_t t1a, t1b; /* temporary variables */ - float64_t p0, p1, p2, p3; /* temporary variables */ - - - k = (S->Sint).fftLen - 1; - - /* Pack first and last sample of the frequency domain together */ - - xBR = pB[0]; - xBI = pB[1]; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++ ; - twI = *pCoeff++ ; - - // U1 = XA(1) + XB(1); % It is real - t1a = xBR + xAR ; - - // U2 = XB(1) - XA(1); % It is imaginary - t1b = xBI + xAI ; - - // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); - // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); - *pOut++ = 0.5 * ( t1a + t1b ); - *pOut++ = 0.5 * ( t1a - t1b ); - - // XA(1) = 1/2*( U1 - imag(U2) + i*( U1 +imag(U2) )); - pB = p + 2*k; - pA += 2; - - do - { - /* - function X = my_split_rfft(X, ifftFlag) - % X is a series of real numbers - L = length(X); - XC = X(1:2:end) +i*X(2:2:end); - XA = fft(XC); - XB = conj(XA([1 end:-1:2])); - TW = i*exp(-2*pi*i*[0:L/2-1]/L).'; - for l = 2:L/2 - XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l))); - end - XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1)))); - X = XA; - */ - - xBI = pB[1]; - xBR = pB[0]; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++; - twI = *pCoeff++; - - t1a = xBR - xAR ; - t1b = xBI + xAI ; - - // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI); - // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI); - p0 = twR * t1a; - p1 = twI * t1a; - p2 = twR * t1b; - p3 = twI * t1b; - - *pOut++ = 0.5 * (xAR + xBR + p0 + p3 ); //xAR - *pOut++ = 0.5 * (xAI - xBI + p1 - p2 ); //xAI - - pA += 2; - pB -= 2; - k--; - } while (k > 0U); -} - -/* Prepares data for inverse cfft */ -void merge_rfft_f64( - const arm_rfft_fast_instance_f64 * S, - float64_t * p, - float64_t * pOut) -{ - uint32_t k; /* Loop Counter */ - float64_t twR, twI; /* RFFT Twiddle coefficients */ - const float64_t *pCoeff = S->pTwiddleRFFT; /* Points to RFFT Twiddle factors */ - float64_t *pA = p; /* increasing pointer */ - float64_t *pB = p; /* decreasing pointer */ - float64_t xAR, xAI, xBR, xBI; /* temporary variables */ - float64_t t1a, t1b, r, s, t, u; /* temporary variables */ - - k = (S->Sint).fftLen - 1; - - xAR = pA[0]; - xAI = pA[1]; - - pCoeff += 2 ; - - *pOut++ = 0.5 * ( xAR + xAI ); - *pOut++ = 0.5 * ( xAR - xAI ); - - pB = p + 2*k ; - pA += 2 ; - - while (k > 0U) - { - /* G is half of the frequency complex spectrum */ - //for k = 2:N - // Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2)))); - xBI = pB[1] ; - xBR = pB[0] ; - xAR = pA[0]; - xAI = pA[1]; - - twR = *pCoeff++; - twI = *pCoeff++; - - t1a = xAR - xBR ; - t1b = xAI + xBI ; - - r = twR * t1a; - s = twI * t1b; - t = twI * t1a; - u = twR * t1b; - - // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI); - // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI); - *pOut++ = 0.5 * (xAR + xBR - r - s ); //xAR - *pOut++ = 0.5 * (xAI - xBI + t - u ); //xAI - - pA += 2; - pB -= 2; - k--; - } - -} - -/** - @ingroup groupTransforms -*/ - - -/** - @addtogroup RealFFT - @{ -*/ - -/** - @brief Processing function for the Double Precision floating-point real FFT. - @param[in] S points to an arm_rfft_fast_instance_f64 structure - @param[in] p points to input buffer (Source buffer is modified by this function.) - @param[in] pOut points to output buffer - @param[in] ifftFlag - - value = 0: RFFT - - value = 1: RIFFT - @return none -*/ - -void arm_rfft_fast_f64( - arm_rfft_fast_instance_f64 * S, - float64_t * p, - float64_t * pOut, - uint8_t ifftFlag) -{ - arm_cfft_instance_f64 * Sint = &(S->Sint); - Sint->fftLen = S->fftLenRFFT / 2; - - /* Calculation of Real FFT */ - if (ifftFlag) - { - /* Real FFT compression */ - merge_rfft_f64(S, p, pOut); - - /* Complex radix-4 IFFT process */ - arm_cfft_f64( Sint, pOut, ifftFlag, 1); - } - else - { - /* Calculation of RFFT of input */ - arm_cfft_f64( Sint, p, ifftFlag, 1); - - /* Real FFT extraction */ - stage_rfft_f64(S, p, pOut); - } -} - -/** -* @} end of RealFFT group -*/ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f16.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f16.c deleted file mode 100644 index 42db325..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f16.c +++ /dev/null @@ -1,357 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_fast_init_f16.c - * Description: Split Radix Decimation in Frequency CFFT Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions_f16.h" -#include "arm_common_tables_f16.h" -#include "arm_const_structs_f16.h" - -#if defined(ARM_FLOAT16_SUPPORTED) - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup RealFFT - @{ - */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_32)) - -/** - @private - @brief Initialization function for the 32pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f16 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_32_fast_init_f16( arm_rfft_fast_instance_f16 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f16(&(S->Sint),16); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - - S->fftLenRFFT = 32U; - S->pTwiddleRFFT = (float16_t *) twiddleCoefF16_rfft_32; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_64)) - -/** - @private - @brief Initialization function for the 64pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f16 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_64_fast_init_f16( arm_rfft_fast_instance_f16 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f16(&(S->Sint),32); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 64U; - - S->pTwiddleRFFT = (float16_t *) twiddleCoefF16_rfft_64; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_128)) - -/** - @private - @brief Initialization function for the 128pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f16 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_128_fast_init_f16( arm_rfft_fast_instance_f16 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f16(&(S->Sint),64); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 128; - - S->pTwiddleRFFT = (float16_t *) twiddleCoefF16_rfft_128; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_256)) - -/** - @private - @brief Initialization function for the 256pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f16 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected -*/ - -static arm_status arm_rfft_256_fast_init_f16( arm_rfft_fast_instance_f16 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f16(&(S->Sint),128); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 256U; - - S->pTwiddleRFFT = (float16_t *) twiddleCoefF16_rfft_256; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_512)) - -/** - @private - @brief Initialization function for the 512pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f16 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_512_fast_init_f16( arm_rfft_fast_instance_f16 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f16(&(S->Sint),256); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 512U; - - S->pTwiddleRFFT = (float16_t *) twiddleCoefF16_rfft_512; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_1024)) -/** - @private - @brief Initialization function for the 1024pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f16 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_1024_fast_init_f16( arm_rfft_fast_instance_f16 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f16(&(S->Sint),512); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 1024U; - - S->pTwiddleRFFT = (float16_t *) twiddleCoefF16_rfft_1024; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_2048)) -/** - @private - @brief Initialization function for the 2048pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f16 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ -static arm_status arm_rfft_2048_fast_init_f16( arm_rfft_fast_instance_f16 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f16(&(S->Sint),1024); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 2048U; - - S->pTwiddleRFFT = (float16_t *) twiddleCoefF16_rfft_2048; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_4096)) -/** - @private -* @brief Initialization function for the 4096pt floating-point real FFT. -* @param[in,out] S points to an arm_rfft_fast_instance_f16 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_4096_fast_init_f16( arm_rfft_fast_instance_f16 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f16(&(S->Sint),2048); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 4096U; - - S->pTwiddleRFFT = (float16_t *) twiddleCoefF16_rfft_4096; - - return ARM_MATH_SUCCESS; -} -#endif - -/** - @brief Initialization function for the floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f16 structure - @param[in] fftLen length of the Real Sequence - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Description - The parameter fftLen specifies the length of RFFT/CIFFT process. - Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. - */ - -arm_status arm_rfft_fast_init_f16( - arm_rfft_fast_instance_f16 * S, - uint16_t fftLen) -{ - typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f16 *); - fft_init_ptr fptr = 0x0; - - switch (fftLen) - { -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_4096)) - case 4096U: - fptr = arm_rfft_4096_fast_init_f16; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_2048)) - case 2048U: - fptr = arm_rfft_2048_fast_init_f16; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_1024)) - case 1024U: - fptr = arm_rfft_1024_fast_init_f16; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_512)) - case 512U: - fptr = arm_rfft_512_fast_init_f16; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_256)) - case 256U: - fptr = arm_rfft_256_fast_init_f16; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_128)) - case 128U: - fptr = arm_rfft_128_fast_init_f16; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_64)) - case 64U: - fptr = arm_rfft_64_fast_init_f16; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_32)) - case 32U: - fptr = arm_rfft_32_fast_init_f16; - break; -#endif - default: - break; - } - - if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR; - return fptr( S ); - -} - -/** - @} end of RealFFT group - */ - -#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c deleted file mode 100644 index 33afc39..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c +++ /dev/null @@ -1,352 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_fast_init_f32.c - * Description: Split Radix Decimation in Frequency CFFT Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup RealFFT - @{ - */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)) - -/** - @private - @brief Initialization function for the 32pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f32 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_32_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f32(&(S->Sint),16); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - - S->fftLenRFFT = 32U; - S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_32; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)) - -/** - @private - @brief Initialization function for the 64pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f32 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_64_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f32(&(S->Sint),32); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 64U; - - S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_64; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)) - -/** - @private - @brief Initialization function for the 128pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f32 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_128_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f32(&(S->Sint),64); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 128; - - S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_128; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)) - -/** - @private - @brief Initialization function for the 256pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f32 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected -*/ - -static arm_status arm_rfft_256_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f32(&(S->Sint),128); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 256U; - - S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_256; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)) - -/** - @private - @brief Initialization function for the 512pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f32 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_512_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f32(&(S->Sint),256); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 512U; - - S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_512; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)) -/** - @private - @brief Initialization function for the 1024pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f32 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_1024_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f32(&(S->Sint),512); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 1024U; - - S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_1024; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)) -/** - @private - @brief Initialization function for the 2048pt floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f32 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ -static arm_status arm_rfft_2048_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f32(&(S->Sint),1024); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 2048U; - - S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_2048; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)) -/** - @private -* @brief Initialization function for the 4096pt floating-point real FFT. -* @param[in,out] S points to an arm_rfft_fast_instance_f32 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_4096_fast_init_f32( arm_rfft_fast_instance_f32 * S ) { - - arm_status status; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - status=arm_cfft_init_f32(&(S->Sint),2048); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - S->fftLenRFFT = 4096U; - - S->pTwiddleRFFT = (float32_t *) twiddleCoef_rfft_4096; - - return ARM_MATH_SUCCESS; -} -#endif - -/** - @brief Initialization function for the floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f32 structure - @param[in] fftLen length of the Real Sequence - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Description - The parameter fftLen specifies the length of RFFT/CIFFT process. - Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. - */ - -arm_status arm_rfft_fast_init_f32( - arm_rfft_fast_instance_f32 * S, - uint16_t fftLen) -{ - typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f32 *); - fft_init_ptr fptr = 0x0; - - switch (fftLen) - { -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)) - case 4096U: - fptr = arm_rfft_4096_fast_init_f32; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)) - case 2048U: - fptr = arm_rfft_2048_fast_init_f32; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)) - case 1024U: - fptr = arm_rfft_1024_fast_init_f32; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)) - case 512U: - fptr = arm_rfft_512_fast_init_f32; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)) - case 256U: - fptr = arm_rfft_256_fast_init_f32; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)) - case 128U: - fptr = arm_rfft_128_fast_init_f32; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)) - case 64U: - fptr = arm_rfft_64_fast_init_f32; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)) - case 32U: - fptr = arm_rfft_32_fast_init_f32; - break; -#endif - default: - break; - } - - if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR; - return fptr( S ); - -} - -/** - @} end of RealFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c deleted file mode 100644 index 0d31a43..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c +++ /dev/null @@ -1,344 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_fast_init_f64.c - * Description: Split Radix Decimation in Frequency CFFT Double Precision Floating point processing function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - -/** - @ingroup groupTransforms - */ - -/** - @addtogroup RealFFT - @{ - */ - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_BITREVIDX_FLT64_16) && defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32)) - -/** - @brief Initialization function for the 32pt double precision floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f64 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_32_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { - - arm_cfft_instance_f64 * Sint; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - Sint = &(S->Sint); - Sint->fftLen = 16U; - S->fftLenRFFT = 32U; - - Sint->bitRevLength = ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH; - Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_16; - Sint->pTwiddle = (float64_t *) twiddleCoefF64_16; - S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_32; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32) && defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64)) - -/** - @brief Initialization function for the 64pt Double Precision floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f64 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_64_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { - - arm_cfft_instance_f64 * Sint; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - Sint = &(S->Sint); - Sint->fftLen = 32U; - S->fftLenRFFT = 64U; - - Sint->bitRevLength = ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH; - Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_32; - Sint->pTwiddle = (float64_t *) twiddleCoefF64_32; - S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_64; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64) && defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128)) - -/** - @brief Initialization function for the 128pt Double Precision floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f64 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_128_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { - - arm_cfft_instance_f64 * Sint; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - Sint = &(S->Sint); - Sint->fftLen = 64U; - S->fftLenRFFT = 128U; - - Sint->bitRevLength = ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH; - Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_64; - Sint->pTwiddle = (float64_t *) twiddleCoefF64_64; - S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_128; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128) && defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256)) - -/** - @brief Initialization function for the 256pt Double Precision floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f64 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected -*/ - -static arm_status arm_rfft_256_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { - - arm_cfft_instance_f64 * Sint; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - Sint = &(S->Sint); - Sint->fftLen = 128U; - S->fftLenRFFT = 256U; - - Sint->bitRevLength = ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH; - Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_128; - Sint->pTwiddle = (float64_t *) twiddleCoefF64_128; - S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_256; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256) && defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512)) - -/** - @brief Initialization function for the 512pt Double Precision floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f64 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_512_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { - - arm_cfft_instance_f64 * Sint; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - Sint = &(S->Sint); - Sint->fftLen = 256U; - S->fftLenRFFT = 512U; - - Sint->bitRevLength = ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH; - Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_256; - Sint->pTwiddle = (float64_t *) twiddleCoefF64_256; - S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_512; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512) && defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024)) -/** - @brief Initialization function for the 1024pt Double Precision floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f64 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_1024_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { - - arm_cfft_instance_f64 * Sint; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - Sint = &(S->Sint); - Sint->fftLen = 512U; - S->fftLenRFFT = 1024U; - - Sint->bitRevLength = ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH; - Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_512; - Sint->pTwiddle = (float64_t *) twiddleCoefF64_512; - S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_1024; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024) && defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048)) -/** - @brief Initialization function for the 2048pt Double Precision floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f64 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ -static arm_status arm_rfft_2048_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { - - arm_cfft_instance_f64 * Sint; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - Sint = &(S->Sint); - Sint->fftLen = 1024U; - S->fftLenRFFT = 2048U; - - Sint->bitRevLength = ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH; - Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_1024; - Sint->pTwiddle = (float64_t *) twiddleCoefF64_1024; - S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_2048; - - return ARM_MATH_SUCCESS; -} -#endif - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048) && defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096)) -/** -* @brief Initialization function for the 4096pt Double Precision floating-point real FFT. -* @param[in,out] S points to an arm_rfft_fast_instance_f64 structure - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected - */ - -static arm_status arm_rfft_4096_fast_init_f64( arm_rfft_fast_instance_f64 * S ) { - - arm_cfft_instance_f64 * Sint; - - if( !S ) return ARM_MATH_ARGUMENT_ERROR; - - Sint = &(S->Sint); - Sint->fftLen = 2048U; - S->fftLenRFFT = 4096U; - - Sint->bitRevLength = ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH; - Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_2048; - Sint->pTwiddle = (float64_t *) twiddleCoefF64_2048; - S->pTwiddleRFFT = (float64_t *) twiddleCoefF64_rfft_4096; - - return ARM_MATH_SUCCESS; -} -#endif - -/** - @brief Initialization function for the Double Precision floating-point real FFT. - @param[in,out] S points to an arm_rfft_fast_instance_f64 structure - @param[in] fftLen length of the Real Sequence - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length - - @par Description - The parameter fftLen specifies the length of RFFT/CIFFT process. - Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096. - @par - This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. - */ - -arm_status arm_rfft_fast_init_f64( - arm_rfft_fast_instance_f64 * S, - uint16_t fftLen) -{ - typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f64 *); - fft_init_ptr fptr = 0x0; - - switch (fftLen) - { -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048) && defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096)) - case 4096U: - fptr = arm_rfft_4096_fast_init_f64; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024) && defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048)) - case 2048U: - fptr = arm_rfft_2048_fast_init_f64; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512) && defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024)) - case 1024U: - fptr = arm_rfft_1024_fast_init_f64; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256) && defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512)) - case 512U: - fptr = arm_rfft_512_fast_init_f64; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128) && defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256)) - case 256U: - fptr = arm_rfft_256_fast_init_f64; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64) && defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128)) - case 128U: - fptr = arm_rfft_128_fast_init_f64; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32) && defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64)) - case 64U: - fptr = arm_rfft_64_fast_init_f64; - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_BITREVIDX_FLT64_16) && defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32)) - case 32U: - fptr = arm_rfft_32_fast_init_f64; - break; -#endif - default: - break; - } - - if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR; - return fptr( S ); - -} - -/** - @} end of RealFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c deleted file mode 100644 index 3552602..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c +++ /dev/null @@ -1,147 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_init_f32.c - * Description: RFFT & RIFFT Floating point initialisation function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" - - -/** - @addtogroup RealFFT - @{ - */ - -/** - @brief Initialization function for the floating-point RFFT/RIFFT. - @deprecated Do not use this function. It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed in the future. - @param[in,out] S points to an instance of the floating-point RFFT/RIFFT structure - @param[in,out] S_CFFT points to an instance of the floating-point CFFT/CIFFT structure - @param[in] fftLenReal length of the FFT. - @param[in] ifftFlagR flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is not a supported length - - @par Description - The parameter fftLenRealspecifies length of RFFT/RIFFT Process. - Supported FFT Lengths are 128, 512, 2048. - @par - The parameter ifftFlagR controls whether a forward or inverse transform is computed. - Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - This function also initializes Twiddle factor table. - */ - -arm_status arm_rfft_init_f32( - arm_rfft_instance_f32 * S, - arm_cfft_radix4_instance_f32 * S_CFFT, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32) - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - - /* Initialize the Real FFT length */ - S->fftLenReal = (uint16_t) fftLenReal; - - /* Initialize the Complex FFT length */ - S->fftLenBy2 = (uint16_t) fftLenReal / 2U; - - /* Initialize the Twiddle coefficientA pointer */ - S->pTwiddleAReal = (float32_t *) realCoefA; - - /* Initialize the Twiddle coefficientB pointer */ - S->pTwiddleBReal = (float32_t *) realCoefB; - - /* Initialize the Flag for selection of RFFT or RIFFT */ - S->ifftFlagR = (uint8_t) ifftFlagR; - - /* Initialize the Flag for calculation Bit reversal or not */ - S->bitReverseFlagR = (uint8_t) bitReverseFlag; - - /* Initializations of structure parameters depending on the FFT length */ - switch (S->fftLenReal) - { - /* Init table modifier value */ - case 8192U: - S->twidCoefRModifier = 1U; - break; - case 2048U: - S->twidCoefRModifier = 4U; - break; - case 512U: - S->twidCoefRModifier = 16U; - break; - case 128U: - S->twidCoefRModifier = 64U; - break; - default: - /* Reporting argument error if rfftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - - /* Init Complex FFT Instance */ - S->pCfft = S_CFFT; - - if (S->ifftFlagR) - { - /* Initializes the CIFFT Module for fftLenreal/2 length */ - arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 1U, 0U); - } - else - { - /* Initializes the CFFT Module for fftLenreal/2 length */ - arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 0U, 0U); - } - -#endif -#endif - /* return the status of RFFT Init function */ - return (status); - -} - -/** - @} end of RealFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c deleted file mode 100644 index 1d7e196..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c +++ /dev/null @@ -1,248 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_init_q15.c - * Description: RFFT & RIFFT Q15 initialisation function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" -#include "arm_const_structs.h" - -/** - @addtogroup RealFFT - @{ - */ - -/** - @brief Initialization function for the Q15 RFFT/RIFFT. - @param[in,out] S points to an instance of the Q15 RFFT/RIFFT structure - @param[in] fftLenReal length of the FFT - @param[in] ifftFlagR flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is not a supported length - - @par Details - The parameter fftLenReal specifies length of RFFT/RIFFT Process. - Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192. - @par - The parameter ifftFlagR controls whether a forward or inverse transform is computed. - Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - This function also initializes Twiddle factor table. - */ - -arm_status arm_rfft_init_q15( - arm_rfft_instance_q15 * S, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15) - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - - /* Initialize the Real FFT length */ - S->fftLenReal = (uint16_t) fftLenReal; - - /* Initialize the Twiddle coefficientA pointer */ - S->pTwiddleAReal = (q15_t *) realCoefAQ15; - - /* Initialize the Twiddle coefficientB pointer */ - S->pTwiddleBReal = (q15_t *) realCoefBQ15; - - /* Initialize the Flag for selection of RFFT or RIFFT */ - S->ifftFlagR = (uint8_t) ifftFlagR; - - /* Initialize the Flag for calculation Bit reversal or not */ - S->bitReverseFlagR = (uint8_t) bitReverseFlag; - - /* Initialization of coef modifier depending on the FFT length */ - switch (S->fftLenReal) - { -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) - case 8192U: - S->twidCoefRModifier = 1U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q15(&(S->cfftInst),4096); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q15_len4096; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) - case 4096U: - S->twidCoefRModifier = 2U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q15(&(S->cfftInst),2048); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q15_len2048; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) - case 2048U: - S->twidCoefRModifier = 4U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q15(&(S->cfftInst),1024); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q15_len1024; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) - case 1024U: - S->twidCoefRModifier = 8U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q15(&(S->cfftInst),512); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q15_len512; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) - case 512U: - S->twidCoefRModifier = 16U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q15(&(S->cfftInst),256); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q15_len256; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) - case 256U: - S->twidCoefRModifier = 32U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q15(&(S->cfftInst),128); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q15_len128; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) - case 128U: - S->twidCoefRModifier = 64U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q15(&(S->cfftInst),64); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q15_len64; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) - case 64U: - S->twidCoefRModifier = 128U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q15(&(S->cfftInst),32); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q15_len32; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) - case 32U: - S->twidCoefRModifier = 256U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q15(&(S->cfftInst),16); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q15_len16; - #endif - break; -#endif - default: - /* Reporting argument error if rfftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - -#endif -#endif - /* return the status of RFFT Init function */ - return (status); -} - -/** - @} end of RealFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c deleted file mode 100644 index 569a2b6..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c +++ /dev/null @@ -1,246 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_init_q31.c - * Description: RFFT & RIFFT Q31 initialisation function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" -#include "arm_common_tables.h" -#include "arm_const_structs.h" - - - -/** - @addtogroup RealFFT - @{ - */ - -/** - @brief Initialization function for the Q31 RFFT/RIFFT. - @param[in,out] S points to an instance of the Q31 RFFT/RIFFT structure - @param[in] fftLenReal length of the FFT - @param[in] ifftFlagR flag that selects transform direction - - value = 0: forward transform - - value = 1: inverse transform - @param[in] bitReverseFlag flag that enables / disables bit reversal of output - - value = 0: disables bit reversal of output - - value = 1: enables bit reversal of output - @return execution status - - \ref ARM_MATH_SUCCESS : Operation successful - - \ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is not a supported length - - @par Details - The parameter fftLenReal specifies length of RFFT/RIFFT Process. - Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192. - @par - The parameter ifftFlagR controls whether a forward or inverse transform is computed. - Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. - @par - The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. - Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. - @par - This function also initializes Twiddle factor table. -*/ - -arm_status arm_rfft_init_q31( - arm_rfft_instance_q31 * S, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag) -{ - /* Initialise the default arm status */ - arm_status status = ARM_MATH_ARGUMENT_ERROR; - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) - -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31) - - /* Initialise the default arm status */ - status = ARM_MATH_SUCCESS; - - /* Initialize the Real FFT length */ - S->fftLenReal = (uint16_t) fftLenReal; - - /* Initialize the Twiddle coefficientA pointer */ - S->pTwiddleAReal = (q31_t *) realCoefAQ31; - - /* Initialize the Twiddle coefficientB pointer */ - S->pTwiddleBReal = (q31_t *) realCoefBQ31; - - /* Initialize the Flag for selection of RFFT or RIFFT */ - S->ifftFlagR = (uint8_t) ifftFlagR; - - /* Initialize the Flag for calculation Bit reversal or not */ - S->bitReverseFlagR = (uint8_t) bitReverseFlag; - - /* Initialization of coef modifier depending on the FFT length */ - switch (S->fftLenReal) - { -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096)) - case 8192U: - - - S->twidCoefRModifier = 1U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q31(&(S->cfftInst),4096); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q31_len4096; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048)) - case 4096U: - S->twidCoefRModifier = 2U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q31(&(S->cfftInst),2048); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q31_len2048; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024)) - case 2048U: - S->twidCoefRModifier = 4U; - - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q31(&(S->cfftInst),1024); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q31_len1024; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512)) - case 1024U: - S->twidCoefRModifier = 8U; - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q31(&(S->cfftInst),512); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q31_len512; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256)) - case 512U: - S->twidCoefRModifier = 16U; - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q31(&(S->cfftInst),256); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q31_len256; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128)) - case 256U: - S->twidCoefRModifier = 32U; - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q31(&(S->cfftInst),128); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q31_len128; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64)) - case 128U: - S->twidCoefRModifier = 64U; - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q31(&(S->cfftInst),64); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q31_len64; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32)) - case 64U: - S->twidCoefRModifier = 128U; - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q31(&(S->cfftInst),32); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q31_len32; - #endif - break; -#endif -#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16)) - case 32U: - S->twidCoefRModifier = 256U; - #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - status=arm_cfft_init_q31(&(S->cfftInst),16); - if (status != ARM_MATH_SUCCESS) - { - return(status); - } - #else - S->pCfft = &arm_cfft_sR_q31_len16; - #endif - break; -#endif - default: - /* Reporting argument error if rfftSize is not valid value */ - status = ARM_MATH_ARGUMENT_ERROR; - break; - } - -#endif -#endif - /* return the status of RFFT Init function */ - return (status); -} - -/** - @} end of RealFFT group - */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c deleted file mode 100644 index 68fbd07..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c +++ /dev/null @@ -1,526 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_q15.c - * Description: RFFT & RIFFT Q15 process function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -/* ---------------------------------------------------------------------- - * Internal functions prototypes - * -------------------------------------------------------------------- */ - -void arm_split_rfft_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pATable, - const q15_t * pBTable, - q15_t * pDst, - uint32_t modifier); - -void arm_split_rifft_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pATable, - const q15_t * pBTable, - q15_t * pDst, - uint32_t modifier); - -/** - @addtogroup RealFFT - @{ - */ - -/** - @brief Processing function for the Q15 RFFT/RIFFT. - @param[in] S points to an instance of the Q15 RFFT/RIFFT structure - @param[in] pSrc points to input buffer (Source buffer is modified by this function.) - @param[out] pDst points to output buffer - @return none - - @par Input an output formats - Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. - Hence the output format is different for different RFFT sizes. - The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT: - @par - \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT" - @par - \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT" - @par - If the input buffer is of length N, the output buffer must have length 2*N. - The input buffer is modified by this function. - @par - For the RIFFT, the source buffer must at least have length - fftLenReal + 2. - The last two elements must be equal to what would be generated - by the RFFT: - (pSrc[0] - pSrc[1]) >> 1 and 0 - */ - -void arm_rfft_q15( - const arm_rfft_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst) -{ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - const arm_cfft_instance_q15 *S_CFFT = &(S->cfftInst); -#else - const arm_cfft_instance_q15 *S_CFFT = S->pCfft; -#endif - uint32_t L2 = S->fftLenReal >> 1U; - - /* Calculation of RIFFT of input */ - if (S->ifftFlagR == 1U) - { - /* Real IFFT core process */ - arm_split_rifft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier); - - /* Complex IFFT process */ - arm_cfft_q15 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR); - - arm_shift_q15(pDst, 1, pDst, S->fftLenReal); - } - else - { - /* Calculation of RFFT of input */ - - /* Complex FFT process */ - arm_cfft_q15 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR); - - /* Real FFT core process */ - arm_split_rfft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier); - } - -} - -/** - @} end of RealFFT group - */ - -/** - @brief Core Real FFT process - @param[in] pSrc points to input buffer - @param[in] fftLen length of FFT - @param[in] pATable points to twiddle Coef A buffer - @param[in] pBTable points to twiddle Coef B buffer - @param[out] pDst points to output buffer - @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table - @return none - - @par - The function implements a Real FFT - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_fft.h" - -#if defined(__CMSIS_GCC_H) -#define MVE_CMPLX_MULT_FX_AxB_S16(A,B) vqdmladhxq_s16(vqdmlsdhq_s16((__typeof(A))vuninitializedq_s16(), A, B), A, B) -#define MVE_CMPLX_MULT_FX_AxConjB_S16(A,B) vqdmladhq_s16(vqdmlsdhxq_s16((__typeof(A))vuninitializedq_s16(), A, B), A, B) - -#endif - -void arm_split_rfft_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pATable, - const q15_t * pBTable, - q15_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - const q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q15_t *pOut1 = &pDst[2]; - q15_t *pIn1 = &pSrc[2]; - uint16x8_t offsetIn = { 6, 7, 4, 5, 2, 3, 0, 1 }; - uint16x8_t offsetCoef; - const uint16_t offsetCoefArr[16] = { - 0, 0, 2, 2, 4, 4, 6, 6, - 0, 1, 0, 1, 0, 1, 0, 1 - }; - - offsetCoef = vmulq_n_u16(vld1q_u16(offsetCoefArr), modifier) + vld1q_u16(offsetCoefArr + 8); - offsetIn = vaddq_n_u16(offsetIn, (2 * fftLen - 8)); - - /* Init coefficient pointers */ - pCoefA = &pATable[modifier * 2]; - pCoefB = &pBTable[modifier * 2]; - - const q15_t *pCoefAb, *pCoefBb; - pCoefAb = pCoefA; - pCoefBb = pCoefB; - - pIn1 = &pSrc[2]; - - i = fftLen - 1U; - i = i / 4 + 1; - while (i > 0U) { - q15x8_t in1 = vld1q_s16(pIn1); - q15x8_t in2 = vldrhq_gather_shifted_offset_s16(pSrc, offsetIn); - q15x8_t coefA = vldrhq_gather_shifted_offset_s16(pCoefAb, offsetCoef); - q15x8_t coefB = vldrhq_gather_shifted_offset_s16(pCoefBb, offsetCoef); - -#if defined(__CMSIS_GCC_H) - q15x8_t out = vhaddq_s16(MVE_CMPLX_MULT_FX_AxB_S16(in1, coefA), - MVE_CMPLX_MULT_FX_AxConjB_S16(coefB, in2)); -#else - q15x8_t out = vhaddq_s16(MVE_CMPLX_MULT_FX_AxB(in1, coefA, q15x8_t), - MVE_CMPLX_MULT_FX_AxConjB(coefB, in2, q15x8_t)); -#endif - vst1q_s16(pOut1, out); - pOut1 += 8; - - offsetCoef = vaddq_n_u16(offsetCoef, modifier * 8); - offsetIn -= 8; - pIn1 += 8; - i -= 1; - } - - pDst[2 * fftLen] = (pSrc[0] - pSrc[1]) >> 1U; - pDst[2 * fftLen + 1] = 0; - - pDst[0] = (pSrc[0] + pSrc[1]) >> 1U; - pDst[1] = 0; -} -#else -void arm_split_rfft_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pATable, - const q15_t * pBTable, - q15_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - q31_t outR, outI; /* Temporary variables for output */ - const q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q15_t *pSrc1, *pSrc2; -#if defined (ARM_MATH_DSP) - q15_t *pD1, *pD2; -#endif - - /* Init coefficient pointers */ - pCoefA = &pATable[modifier * 2]; - pCoefB = &pBTable[modifier * 2]; - - pSrc1 = &pSrc[2]; - pSrc2 = &pSrc[(2U * fftLen) - 2U]; - -#if defined (ARM_MATH_DSP) - - i = 1U; - pD1 = pDst + 2; - pD2 = pDst + (4U * fftLen) - 2; - - for (i = fftLen - 1; i > 0; i--) - { - /* - outR = ( pSrc[2 * i] * pATable[2 * i] - - pSrc[2 * i + 1] * pATable[2 * i + 1] - + pSrc[2 * n - 2 * i] * pBTable[2 * i] - + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - - outI = ( pIn[2 * i + 1] * pATable[2 * i] - + pIn[2 * i] * pATable[2 * i + 1] - + pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]) - */ - - -#ifndef ARM_MATH_BIG_ENDIAN - /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */ - outR = __SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA)); -#else - /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */ - outR = -(__SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA))); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* pSrc[2 * n - 2 * i] * pBTable[2 * i] + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */ - outR = __SMLAD(read_q15x2 (pSrc2), read_q15x2((q15_t *) pCoefB), outR) >> 16U; - - /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ -#ifndef ARM_MATH_BIG_ENDIAN - outI = __SMUSDX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB)); -#else - outI = __SMUSDX(read_q15x2 ((q15_t *) pCoefB), read_q15x2_da (&pSrc2)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */ - outI = __SMLADX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), outI); - - /* write output */ - *pD1++ = (q15_t) outR; - *pD1++ = outI >> 16U; - - /* write complex conjugate output */ - pD2[0] = (q15_t) outR; - pD2[1] = -(outI >> 16U); - pD2 -= 2; - - /* update coefficient pointer */ - pCoefB = pCoefB + (2U * modifier); - pCoefA = pCoefA + (2U * modifier); - } - - pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1U; - pDst[2U * fftLen + 1U] = 0; - - pDst[0] = (pSrc[0] + pSrc[1]) >> 1U; - pDst[1] = 0; - -#else - - i = 1U; - - while (i < fftLen) - { - /* - outR = ( pSrc[2 * i] * pATable[2 * i] - - pSrc[2 * i + 1] * pATable[2 * i + 1] - + pSrc[2 * n - 2 * i] * pBTable[2 * i] - + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - */ - - outR = *pSrc1 * *pCoefA; - outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1)); - outR = outR + (*pSrc2 * *pCoefB); - outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16; - - /* - outI = ( pIn[2 * i + 1] * pATable[2 * i] - + pIn[2 * i] * pATable[2 * i + 1] - + pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - */ - - outI = *pSrc2 * *(pCoefB + 1); - outI = outI - (*(pSrc2 + 1) * *pCoefB); - outI = outI + (*(pSrc1 + 1) * *pCoefA); - outI = outI + (*pSrc1 * *(pCoefA + 1)); - - /* update input pointers */ - pSrc1 += 2U; - pSrc2 -= 2U; - - /* write output */ - pDst[2U * i] = (q15_t) outR; - pDst[2U * i + 1U] = outI >> 16U; - - /* write complex conjugate output */ - pDst[(4U * fftLen) - (2U * i)] = (q15_t) outR; - pDst[((4U * fftLen) - (2U * i)) + 1U] = -(outI >> 16U); - - /* update coefficient pointer */ - pCoefB = pCoefB + (2U * modifier); - pCoefA = pCoefA + (2U * modifier); - - i++; - } - - pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1; - pDst[2U * fftLen + 1U] = 0; - - pDst[0] = (pSrc[0] + pSrc[1]) >> 1; - pDst[1] = 0; - -#endif /* #if defined (ARM_MATH_DSP) */ -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @brief Core Real IFFT process - @param[in] pSrc points to input buffer - @param[in] fftLen length of FFT - @param[in] pATable points to twiddle Coef A buffer - @param[in] pBTable points to twiddle Coef B buffer - @param[out] pDst points to output buffer - @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table - @return none - - @par - The function implements a Real IFFT - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_fft.h" - -void arm_split_rifft_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pATable, - const q15_t * pBTable, - q15_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - const q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q15_t *pIn1; - uint16x8_t offset = { 6, 7, 4, 5, 2, 3, 0, 1 }; - uint16x8_t offsetCoef; - int16x8_t conj = { 1, -1, 1, -1, 1, -1, 1, -1 }; /* conjugate */ - const uint16_t offsetCoefArr[16] = { - 0, 0, 2, 2, 4, 4, 6, 6, - 0, 1, 0, 1, 0, 1, 0, 1 - }; - - offsetCoef = vmulq_n_u16(vld1q_u16(offsetCoefArr), modifier) + vld1q_u16(offsetCoefArr + 8); - - offset = vaddq_n_u16(offset, (2 * fftLen - 6)); - - /* Init coefficient pointers */ - pCoefA = &pATable[0]; - pCoefB = &pBTable[0]; - - const q15_t *pCoefAb, *pCoefBb; - pCoefAb = pCoefA; - pCoefBb = pCoefB; - - pIn1 = &pSrc[0]; - - i = fftLen; - i = i / 4; - - while (i > 0U) { - q15x8_t in1 = vld1q_s16(pIn1); - q15x8_t in2 = vldrhq_gather_shifted_offset_s16(pSrc, offset); - q15x8_t coefA = vldrhq_gather_shifted_offset_s16(pCoefAb, offsetCoef); - q15x8_t coefB = vldrhq_gather_shifted_offset_s16(pCoefBb, offsetCoef); - - /* can we avoid the conjugate here ? */ - q15x8_t out = vhaddq_s16(MVE_CMPLX_MULT_FX_AxConjB(in1, coefA, q15x8_t), - vmulq(conj, MVE_CMPLX_MULT_FX_AxB(in2, coefB, q15x8_t))); - - vst1q_s16(pDst, out); - pDst += 8; - - offsetCoef = vaddq_n_u16(offsetCoef, modifier * 8); - offset -= 8; - - pIn1 += 8; - i -= 1; - } -} -#else -void arm_split_rifft_q15( - q15_t * pSrc, - uint32_t fftLen, - const q15_t * pATable, - const q15_t * pBTable, - q15_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - q31_t outR, outI; /* Temporary variables for output */ - const q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q15_t *pSrc1, *pSrc2; - q15_t *pDst1 = &pDst[0]; - - pCoefA = &pATable[0]; - pCoefB = &pBTable[0]; - - pSrc1 = &pSrc[0]; - pSrc2 = &pSrc[2 * fftLen]; - - i = fftLen; - while (i > 0U) - { - /* - outR = ( pIn[2 * i] * pATable[2 * i] - + pIn[2 * i + 1] * pATable[2 * i + 1] - + pIn[2 * n - 2 * i] * pBTable[2 * i] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - - outI = ( pIn[2 * i + 1] * pATable[2 * i] - - pIn[2 * i] * pATable[2 * i + 1] - - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - */ - -#if defined (ARM_MATH_DSP) - -#ifndef ARM_MATH_BIG_ENDIAN - /* pIn[2 * n - 2 * i] * pBTable[2 * i] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */ - outR = __SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB)); -#else - /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */ - outR = -(__SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB))); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + pIn[2 * n - 2 * i] * pBTable[2 * i] */ - outR = __SMLAD(read_q15x2(pSrc1), read_q15x2 ((q15_t *) pCoefA), outR) >> 16U; - - /* -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ - outI = __SMUADX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB)); - - /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */ -#ifndef ARM_MATH_BIG_ENDIAN - outI = __SMLSDX(read_q15x2 ((q15_t *) pCoefA), read_q15x2_ia (&pSrc1), -outI); -#else - outI = __SMLSDX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), -outI); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* write output */ -#ifndef ARM_MATH_BIG_ENDIAN - write_q15x2_ia (&pDst1, __PKHBT(outR, (outI >> 16U), 16)); -#else - write_q15x2_ia (&pDst1, __PKHBT((outI >> 16U), outR, 16)); -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - -#else /* #if defined (ARM_MATH_DSP) */ - - outR = *pSrc2 * *pCoefB; - outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1)); - outR = outR + (*pSrc1 * *pCoefA); - outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16; - - outI = *(pSrc1 + 1) * *pCoefA; - outI = outI - (*pSrc1 * *(pCoefA + 1)); - outI = outI - (*pSrc2 * *(pCoefB + 1)); - outI = outI - (*(pSrc2 + 1) * *(pCoefB)); - - /* update input pointers */ - pSrc1 += 2U; - pSrc2 -= 2U; - - /* write output */ - *pDst1++ = (q15_t) outR; - *pDst1++ = (q15_t) (outI >> 16); - -#endif /* #if defined (ARM_MATH_DSP) */ - - /* update coefficient pointer */ - pCoefB = pCoefB + (2 * modifier); - pCoefA = pCoefA + (2 * modifier); - - i--; - } - -} -#endif /* defined(ARM_MATH_MVEI) */ diff --git a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c b/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c deleted file mode 100644 index 183bced..0000000 --- a/Drivers/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c +++ /dev/null @@ -1,430 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS DSP Library - * Title: arm_rfft_q31.c - * Description: FFT & RIFFT Q31 process function - * - * $Date: 23 April 2021 - * $Revision: V1.9.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "dsp/transform_functions.h" - -/* ---------------------------------------------------------------------- - * Internal functions prototypes - * -------------------------------------------------------------------- */ - -void arm_split_rfft_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pATable, - const q31_t * pBTable, - q31_t * pDst, - uint32_t modifier); - -void arm_split_rifft_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pATable, - const q31_t * pBTable, - q31_t * pDst, - uint32_t modifier); - -/** - @addtogroup RealFFT - @{ - */ - -/** - @brief Processing function for the Q31 RFFT/RIFFT. - @param[in] S points to an instance of the Q31 RFFT/RIFFT structure - @param[in] pSrc points to input buffer (Source buffer is modified by this function) - @param[out] pDst points to output buffer - @return none - - @par Input an output formats - Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. - Hence the output format is different for different RFFT sizes. - The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT: - @par - \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT" - @par - \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT" - @par - If the input buffer is of length N, the output buffer must have length 2*N. - The input buffer is modified by this function. - @par - For the RIFFT, the source buffer must at least have length - fftLenReal + 2. - The last two elements must be equal to what would be generated - by the RFFT: - (pSrc[0] - pSrc[1]) >> 1 and 0 - - */ - -void arm_rfft_q31( - const arm_rfft_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst) -{ -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - const arm_cfft_instance_q31 *S_CFFT = &(S->cfftInst); -#else - const arm_cfft_instance_q31 *S_CFFT = S->pCfft; -#endif - uint32_t L2 = S->fftLenReal >> 1U; - - /* Calculation of RIFFT of input */ - if (S->ifftFlagR == 1U) - { - /* Real IFFT core process */ - arm_split_rifft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier); - - /* Complex IFFT process */ - arm_cfft_q31 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR); - - arm_shift_q31(pDst, 1, pDst, S->fftLenReal); - } - else - { - /* Calculation of RFFT of input */ - - /* Complex FFT process */ - arm_cfft_q31 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR); - - /* Real FFT core process */ - arm_split_rfft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier); - } - -} - -/** - @} end of RealFFT group - */ - -/** - @brief Core Real FFT process - @param[in] pSrc points to input buffer - @param[in] fftLen length of FFT - @param[in] pATable points to twiddle Coef A buffer - @param[in] pBTable points to twiddle Coef B buffer - @param[out] pDst points to output buffer - @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -#include "arm_helium_utils.h" -#include "arm_vec_fft.h" - -#if defined(__CMSIS_GCC_H) - -#define MVE_CMPLX_MULT_FX_AxB_S32(A,B) vqdmladhxq_s32(vqdmlsdhq_s32((__typeof(A))vuninitializedq_s32(), A, B), A, B) -#define MVE_CMPLX_MULT_FX_AxConjB_S32(A,B) vqdmladhq_s32(vqdmlsdhxq_s32((__typeof(A))vuninitializedq_s32(), A, B), A, B) - -#endif - -void arm_split_rfft_q31( - q31_t *pSrc, - uint32_t fftLen, - const q31_t *pATable, - const q31_t *pBTable, - q31_t *pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - const q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q31_t *pOut1 = &pDst[2]; - q31_t *pIn1 = &pSrc[2]; - uint32x4_t offset = { 2, 3, 0, 1 }; - uint32x4_t offsetCoef = { 0, 1, modifier * 2, modifier * 2 + 1 }; - - offset = offset + (2 * fftLen - 4); - - - /* Init coefficient pointers */ - pCoefA = &pATable[modifier * 2]; - pCoefB = &pBTable[modifier * 2]; - - const q31_t *pCoefAb, *pCoefBb; - pCoefAb = pCoefA; - pCoefBb = pCoefB; - - pIn1 = &pSrc[2]; - - i = fftLen - 1U; - i = i / 2 + 1; - while (i > 0U) { - q31x4_t in1 = vld1q_s32(pIn1); - q31x4_t in2 = vldrwq_gather_shifted_offset_s32(pSrc, offset); - q31x4_t coefA = vldrwq_gather_shifted_offset_s32(pCoefAb, offsetCoef); - q31x4_t coefB = vldrwq_gather_shifted_offset_s32(pCoefBb, offsetCoef); -#if defined(__CMSIS_GCC_H) - q31x4_t out = vhaddq_s32(MVE_CMPLX_MULT_FX_AxB_S32(in1, coefA),MVE_CMPLX_MULT_FX_AxConjB_S32(coefB, in2)); -#else - q31x4_t out = vhaddq_s32(MVE_CMPLX_MULT_FX_AxB(in1, coefA, q31x4_t), - MVE_CMPLX_MULT_FX_AxConjB(coefB, in2, q31x4_t)); -#endif - vst1q(pOut1, out); - pOut1 += 4; - - offsetCoef += modifier * 4; - offset -= 4; - - pIn1 += 4; - i -= 1; - } - - pDst[2 * fftLen] = (pSrc[0] - pSrc[1]) >> 1U; - pDst[2 * fftLen + 1] = 0; - - pDst[0] = (pSrc[0] + pSrc[1]) >> 1U; - pDst[1] = 0; -} -#else -void arm_split_rfft_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pATable, - const q31_t * pBTable, - q31_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - q31_t outR, outI; /* Temporary variables for output */ - const q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q31_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */ - q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[4 * fftLen - 1]; - q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[2 * fftLen - 1]; - - /* Init coefficient pointers */ - pCoefA = &pATable[modifier * 2]; - pCoefB = &pBTable[modifier * 2]; - - i = fftLen - 1U; - - while (i > 0U) - { - /* - outR = ( pSrc[2 * i] * pATable[2 * i] - - pSrc[2 * i + 1] * pATable[2 * i + 1] - + pSrc[2 * n - 2 * i] * pBTable[2 * i] - + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - - outI = ( pIn[2 * i + 1] * pATable[2 * i] - + pIn[2 * i] * pATable[2 * i + 1] - + pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - */ - - CoefA1 = *pCoefA++; - CoefA2 = *pCoefA; - - /* outR = (pSrc[2 * i] * pATable[2 * i] */ - mult_32x32_keep32_R (outR, *pIn1, CoefA1); - - /* outI = pIn[2 * i] * pATable[2 * i + 1] */ - mult_32x32_keep32_R (outI, *pIn1++, CoefA2); - - /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */ - multSub_32x32_keep32_R (outR, *pIn1, CoefA2); - - /* (pIn[2 * i + 1] * pATable[2 * i] */ - multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1); - - /* pSrc[2 * n - 2 * i] * pBTable[2 * i] */ - multSub_32x32_keep32_R (outR, *pIn2, CoefA2); - CoefB1 = *pCoefB; - - /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */ - multSub_32x32_keep32_R (outI, *pIn2--, CoefB1); - - /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */ - multAcc_32x32_keep32_R (outR, *pIn2, CoefB1); - - /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ - multSub_32x32_keep32_R (outI, *pIn2--, CoefA2); - - /* write output */ - *pOut1++ = outR; - *pOut1++ = outI; - - /* write complex conjugate output */ - *pOut2-- = -outI; - *pOut2-- = outR; - - /* update coefficient pointer */ - pCoefB = pCoefB + (2 * modifier); - pCoefA = pCoefA + (2 * modifier - 1); - - /* Decrement loop count */ - i--; - } - - pDst[2 * fftLen] = (pSrc[0] - pSrc[1]) >> 1U; - pDst[2 * fftLen + 1] = 0; - - pDst[0] = (pSrc[0] + pSrc[1]) >> 1U; - pDst[1] = 0; -} -#endif /* defined(ARM_MATH_MVEI) */ - -/** - @brief Core Real IFFT process - @param[in] pSrc points to input buffer - @param[in] fftLen length of FFT - @param[in] pATable points to twiddle Coef A buffer - @param[in] pBTable points to twiddle Coef B buffer - @param[out] pDst points to output buffer - @param[in] modifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table - @return none - */ - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - -void arm_split_rifft_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pATable, - const q31_t * pBTable, - q31_t * pDst, - uint32_t modifier) -{ - uint32_t i; /* Loop Counter */ - const q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q31_t *pIn1; - uint32x4_t offset = { 2, 3, 0, 1 }; - uint32x4_t offsetCoef = { 0, 1, modifier * 2, modifier * 2 + 1 }; - int32x4_t conj = { 1, -1, 1, -1 }; - - offset = offset + (2 * fftLen - 2); - - /* Init coefficient pointers */ - pCoefA = &pATable[0]; - pCoefB = &pBTable[0]; - - const q31_t *pCoefAb, *pCoefBb; - pCoefAb = pCoefA; - pCoefBb = pCoefB; - - pIn1 = &pSrc[0]; - - i = fftLen; - i = i >> 1; - while (i > 0U) { - q31x4_t in1 = vld1q_s32(pIn1); - q31x4_t in2 = vldrwq_gather_shifted_offset_s32(pSrc, offset); - q31x4_t coefA = vldrwq_gather_shifted_offset_s32(pCoefAb, offsetCoef); - q31x4_t coefB = vldrwq_gather_shifted_offset_s32(pCoefBb, offsetCoef); - - /* can we avoid the conjugate here ? */ -#if defined(__CMSIS_GCC_H) - q31x4_t out = vhaddq_s32(MVE_CMPLX_MULT_FX_AxConjB_S32(in1, coefA), - vmulq_s32(conj, MVE_CMPLX_MULT_FX_AxB_S32(in2, coefB))); -#else - q31x4_t out = vhaddq_s32(MVE_CMPLX_MULT_FX_AxConjB(in1, coefA, q31x4_t), - vmulq_s32(conj, MVE_CMPLX_MULT_FX_AxB(in2, coefB, q31x4_t))); -#endif - vst1q_s32(pDst, out); - pDst += 4; - - offsetCoef += modifier * 4; - offset -= 4; - - pIn1 += 4; - i -= 1; - } -} -#else -void arm_split_rifft_q31( - q31_t * pSrc, - uint32_t fftLen, - const q31_t * pATable, - const q31_t * pBTable, - q31_t * pDst, - uint32_t modifier) -{ - q31_t outR, outI; /* Temporary variables for output */ - const q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */ - q31_t CoefA1, CoefA2, CoefB1; /* Temporary variables for twiddle coefficients */ - q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[2 * fftLen + 1]; - - pCoefA = &pATable[0]; - pCoefB = &pBTable[0]; - - while (fftLen > 0U) - { - /* - outR = ( pIn[2 * i] * pATable[2 * i] - + pIn[2 * i + 1] * pATable[2 * i + 1] - + pIn[2 * n - 2 * i] * pBTable[2 * i] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]); - - outI = ( pIn[2 * i + 1] * pATable[2 * i] - - pIn[2 * i] * pATable[2 * i + 1] - - pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); - */ - - CoefA1 = *pCoefA++; - CoefA2 = *pCoefA; - - /* outR = (pIn[2 * i] * pATable[2 * i] */ - mult_32x32_keep32_R (outR, *pIn1, CoefA1); - - /* - pIn[2 * i] * pATable[2 * i + 1] */ - mult_32x32_keep32_R (outI, *pIn1++, -CoefA2); - - /* pIn[2 * i + 1] * pATable[2 * i + 1] */ - multAcc_32x32_keep32_R (outR, *pIn1, CoefA2); - - /* pIn[2 * i + 1] * pATable[2 * i] */ - multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1); - - /* pIn[2 * n - 2 * i] * pBTable[2 * i] */ - multAcc_32x32_keep32_R (outR, *pIn2, CoefA2); - CoefB1 = *pCoefB; - - /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */ - multSub_32x32_keep32_R (outI, *pIn2--, CoefB1); - - /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */ - multAcc_32x32_keep32_R (outR, *pIn2, CoefB1); - - /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */ - multAcc_32x32_keep32_R (outI, *pIn2--, CoefA2); - - /* write output */ - *pDst++ = outR; - *pDst++ = outI; - - /* update coefficient pointer */ - pCoefB = pCoefB + (modifier * 2); - pCoefA = pCoefA + (modifier * 2 - 1); - - /* Decrement loop count */ - fftLen--; - } - -} - -#endif /* defined(ARM_MATH_MVEI) */ diff --git a/Drivers/CMSIS/Documentation/General/html/LICENSE.txt b/Drivers/CMSIS/Documentation/General/html/LICENSE.txt deleted file mode 100644 index c0ee812..0000000 --- a/Drivers/CMSIS/Documentation/General/html/LICENSE.txt +++ /dev/null @@ -1,201 +0,0 @@ - Apache License - Version 2.0, January 2004 - http://www.apache.org/licenses/ - - TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION - - 1. 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We also recommend that a - file or class name and description of purpose be included on the - same "printed page" as the copyright notice for easier - identification within third-party archives. - - Copyright {yyyy} {name of copyright owner} - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. diff --git a/Drivers/CMSIS/NN/CMakeLists.txt b/Drivers/CMSIS/NN/CMakeLists.txt deleted file mode 100644 index 41e66cc..0000000 --- a/Drivers/CMSIS/NN/CMakeLists.txt +++ /dev/null @@ -1,29 +0,0 @@ -# -# Copyright (c) 2019-2021 Arm Limited. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -cmake_minimum_required(VERSION 3.15.6) - -project(CMSISNN) - -set(CMSIS_PATH "${CMAKE_CURRENT_SOURCE_DIR}/../..") - -option(BUILD_CMSIS_NN_FUNCTIONS "Build CMSIS-NN Source." ON) - -if(BUILD_CMSIS_NN_FUNCTIONS) - add_subdirectory(Source) -endif() diff --git a/Drivers/CMSIS/NN/Include/arm_nn_math_types.h b/Drivers/CMSIS/NN/Include/arm_nn_math_types.h deleted file mode 100644 index c9a1ccf..0000000 --- a/Drivers/CMSIS/NN/Include/arm_nn_math_types.h +++ /dev/null @@ -1,169 +0,0 @@ -/****************************************************************************** - * @file arm_nn_math_types.h - * @brief Compiler include and basic types - * @version V1.1.0 - * @date 09 March 2022 - * Target Processor: Cortex-M - ******************************************************************************/ -/* - * Copyright (c) 2010-2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - Copied from CMSIS/DSP/arm_math_types.h and modified -*/ - -#ifndef _ARM_NN_MATH_TYPES_H_ - -#define _ARM_NN_MATH_TYPES_H_ - -/* DSP inlcude for enum arm_status. */ -#include "arm_math_types.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Compiler specific diagnostic adjustment */ -#if defined(__CC_ARM) - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - -#elif defined(__GNUC__) - -#elif defined(__ICCARM__) - -#elif defined(__TI_ARM__) - -#elif defined(__CSMC__) - -#elif defined(__TASKING__) - -#elif defined(_MSC_VER) - -#else -#error Unknown compiler -#endif - -/* Included for instrinsics definitions */ -#if defined(_MSC_VER) -#include -#ifndef __STATIC_FORCEINLINE -#define __STATIC_FORCEINLINE static __forceinline -#endif -#ifndef __STATIC_INLINE -#define __STATIC_INLINE static __inline -#endif -#ifndef __ALIGNED -#define __ALIGNED(x) __declspec(align(x)) -#endif - -#elif defined(__GNUC_PYTHON__) -#include -#ifndef __ALIGNED -#define __ALIGNED(x) __attribute__((aligned(x))) -#endif -#ifndef __STATIC_FORCEINLINE -#define __STATIC_FORCEINLINE static inline __attribute__((always_inline)) -#endif -#ifndef __STATIC_INLINE -#define __STATIC_INLINE static inline -#endif - -#else -#include "cmsis_compiler.h" -#endif - -#include -#include -#include -#include - -/* evaluate ARM DSP feature */ -#if (defined(__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) -#ifndef ARM_MATH_DSP -#define ARM_MATH_DSP 1 -#endif -#endif - -#if __ARM_FEATURE_MVE -#ifndef ARM_MATH_MVEI -#define ARM_MATH_MVEI -#endif -#endif - -/* Compiler specific diagnostic adjustment */ -#if defined(__CC_ARM) - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - -#elif defined(__GNUC__) -// #pragma GCC diagnostic pop - -#elif defined(__ICCARM__) - -#elif defined(__TI_ARM__) - -#elif defined(__CSMC__) - -#elif defined(__TASKING__) - -#elif defined(_MSC_VER) - -#else -#error Unknown compiler -#endif - -#ifdef __cplusplus -} -#endif - -#if __ARM_FEATURE_MVE -#include -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Add necessary typedefs - */ - -#define NN_Q31_MAX ((q31_t)(0x7FFFFFFFL)) -#define NN_Q15_MAX ((q15_t)(0x7FFF)) -#define NN_Q7_MAX ((q7_t)(0x7F)) -#define NN_Q31_MIN ((q31_t)(0x80000000L)) -#define NN_Q15_MIN ((q15_t)(0x8000)) -#define NN_Q7_MIN ((q7_t)(0x80)) - -/** - * @brief Error status returned by some functions in the library. - */ - -typedef enum -{ - ARM_CMSIS_NN_SUCCESS = 0, /**< No error */ - ARM_CMSIS_NN_ARG_ERROR = -1, /**< One or more arguments are incorrect */ - ARM_CMSIS_NN_NO_IMPL_ERROR = -2, /**< No implementation available */ -} arm_cmsis_nn_status; - -#ifdef __cplusplus -} -#endif - -#endif /*ifndef _ARM_NN_MATH_TYPES_H_ */ diff --git a/Drivers/CMSIS/NN/Include/arm_nn_tables.h b/Drivers/CMSIS/NN/Include/arm_nn_tables.h deleted file mode 100644 index 89a300d..0000000 --- a/Drivers/CMSIS/NN/Include/arm_nn_tables.h +++ /dev/null @@ -1,56 +0,0 @@ -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_tables.h - * Description: Extern declaration for NN tables - * - * $Date: 17. August 2021 - * $Revision: V.1.0.2 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ -/* - * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef _ARM_NN_TABLES_H -#define _ARM_NN_TABLES_H - -#include "arm_nn_math_types.h" - -/** - * @brief tables for various activation functions - * - */ - -extern const q15_t sigmoidTable_q15[256]; -extern const q7_t sigmoidTable_q7[256]; - -extern const q7_t tanhTable_q7[256]; -extern const q15_t tanhTable_q15[256]; - -/** - * @brief 2-way tables for various activation functions - * - * 2-way table, H table for value larger than 1/4 - * L table for value smaller than 1/4, H table for remaining - * We have this only for the q15_t version. It does not make - * sense to have it for q7_t type - */ -extern const q15_t sigmoidHTable_q15[192]; -extern const q15_t sigmoidLTable_q15[128]; - -#endif /* ARM_NN_TABLES_H */ diff --git a/Drivers/CMSIS/NN/Include/arm_nn_types.h b/Drivers/CMSIS/NN/Include/arm_nn_types.h deleted file mode 100644 index 99530f3..0000000 --- a/Drivers/CMSIS/NN/Include/arm_nn_types.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright (C) 2020-2022 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_types.h - * Description: Public header file to contain the CMSIS-NN structs for the - * TensorFlowLite micro compliant functions - * - * $Date: 22. Februari 2022 - * $Revision: V.2.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ - -#ifndef _ARM_NN_TYPES_H -#define _ARM_NN_TYPES_H - -#include - -/** CMSIS-NN object to contain the width and height of a tile */ -typedef struct -{ - int32_t w; /**< Width */ - int32_t h; /**< Height */ -} cmsis_nn_tile; - -/** CMSIS-NN object used for the function context. */ -typedef struct -{ - void *buf; /**< Pointer to a buffer needed for the optimization */ - int32_t size; /**< Buffer size */ -} cmsis_nn_context; - -/** CMSIS-NN object to contain the dimensions of the tensors */ -typedef struct -{ - int32_t n; /**< Generic dimension to contain either the batch size or output channels. - Please refer to the function documentation for more information */ - int32_t h; /**< Height */ - int32_t w; /**< Width */ - int32_t c; /**< Input channels */ -} cmsis_nn_dims; - -/** CMSIS-NN object for the per-channel quantization parameters */ -typedef struct -{ - int32_t *multiplier; /**< Multiplier values */ - int32_t *shift; /**< Shift values */ -} cmsis_nn_per_channel_quant_params; - -/** CMSIS-NN object for the per-tensor quantization parameters */ -typedef struct -{ - int32_t multiplier; /**< Multiplier value */ - int32_t shift; /**< Shift value */ -} cmsis_nn_per_tensor_quant_params; - -/** CMSIS-NN object for the quantized Relu activation */ -typedef struct -{ - int32_t min; /**< Min value used to clamp the result */ - int32_t max; /**< Max value used to clamp the result */ -} cmsis_nn_activation; - -/** CMSIS-NN object for the convolution layer parameters */ -typedef struct -{ - int32_t input_offset; /**< Zero value for the input tensor */ - int32_t output_offset; /**< Zero value for the output tensor */ - cmsis_nn_tile stride; - cmsis_nn_tile padding; - cmsis_nn_tile dilation; - cmsis_nn_activation activation; -} cmsis_nn_conv_params; - -/** CMSIS-NN object for Depthwise convolution layer parameters */ -typedef struct -{ - int32_t input_offset; /**< Zero value for the input tensor */ - int32_t output_offset; /**< Zero value for the output tensor */ - int32_t ch_mult; /**< Channel Multiplier. ch_mult * in_ch = out_ch */ - cmsis_nn_tile stride; - cmsis_nn_tile padding; - cmsis_nn_tile dilation; - cmsis_nn_activation activation; -} cmsis_nn_dw_conv_params; -/** CMSIS-NN object for pooling layer parameters */ -typedef struct -{ - cmsis_nn_tile stride; - cmsis_nn_tile padding; - cmsis_nn_activation activation; -} cmsis_nn_pool_params; - -/** CMSIS-NN object for Fully Connected layer parameters */ -typedef struct -{ - int32_t input_offset; /**< Zero value for the input tensor */ - int32_t filter_offset; /**< Zero value for the filter tensor. Not used */ - int32_t output_offset; /**< Zero value for the output tensor */ - cmsis_nn_activation activation; -} cmsis_nn_fc_params; - -/** CMSIS-NN object for SVDF layer parameters */ -typedef struct -{ - int32_t rank; - int32_t input_offset; /**< Zero value for the input tensor */ - int32_t output_offset; /**< Zero value for the output tensor */ - cmsis_nn_activation input_activation; - cmsis_nn_activation output_activation; -} cmsis_nn_svdf_params; - -/** CMSIS-NN object for Softmax s16 layer parameters */ -typedef struct -{ - const int16_t *exp_lut; - const int16_t *one_by_one_lut; -} cmsis_nn_softmax_lut_s16; - -#endif // _ARM_NN_TYPES_H diff --git a/Drivers/CMSIS/NN/Include/arm_nnfunctions.h b/Drivers/CMSIS/NN/Include/arm_nnfunctions.h deleted file mode 100644 index 98d9286..0000000 --- a/Drivers/CMSIS/NN/Include/arm_nnfunctions.h +++ /dev/null @@ -1,2532 +0,0 @@ -/* - * Copyright (C) 2010-2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nnfunctions.h - * Description: Public header file for CMSIS NN Library - * - * $Date: 19 April 2022 - * $Revision: V.9.0.0 - * - * Target Processor: Cortex-M CPUs - * -------------------------------------------------------------------- */ - -/** - \mainpage CMSIS NN Software Library - * - * Introduction - * ------------ - * - * This user manual describes the CMSIS NN software library, - * a collection of efficient neural network kernels developed to maximize the - * performance and minimize the memory footprint of neural networks on Cortex-M processor cores. - * - * The library is divided into a number of functions each covering a specific category: - * - Convolution Functions - * - Activation Functions - * - Fully-connected Layer Functions - * - SVDF Layer Functions - * - Pooling Functions - * - Softmax Functions - * - Basic math Functions - * - * The library has separate functions for operating on different weight and activation data - * types including 8-bit integers (q7_t) and 16-bit integers (q15_t). The descrition of the - * kernels are included in the function description. The implementation details are also - * described in this paper [1]. - * - * Supported Processors - * ------- - * CMSIS-NN targets Cortex-M processors with typically three different implementations for each function. Each - * targets a different group of processors. - * - Processors without SIMD capability (e.g, Cortex-M0) - * - Processors with DSP extention (e.g Cortex-M4) - * - Processors with MVE extension (e.g Cortex-M55) - * The right implementation is picked through feature flags and the user usually does not have to explicit set it. - * - * Function Classification - * -------- - * The functions can be classified into two segments - * - Legacy functions supporting ARM's internal symmetric quantization(8 bits). - * - Functions that support TensorFlow Lite framework with symmetric quantization(8 bits). - * - * The legacy functions can be identified with their suffix of _q7 or _q15 and are no new development is done there. - * The article in [2] describes in detail how to run a network using the legacy functions. - * - * The functions supporting TensorFlow Lite framework is identified by the _s8 suffix and can be invoked from TFL - * micro. The functions are bit exact to TensorFlow Lite. Refer to the TensorFlow's documentation in [3] on how to run - * a TensorFlow Lite model using optimized CMSIS-NN kernels. - * - * Block Diagram - * -------- - * \image html CMSIS-NN-OVERVIEW.PNG - * - * Examples - * -------- - * - * The library ships with a number of examples which demonstrate how to use the library functions. - * - * Pre-processor Macros - * ------------ - * - * Each library project have different pre-processor macros. - * - * - ARM_MATH_DSP: - * - * Define macro ARM_MATH_DSP, If the silicon supports DSP instructions(DSP extension). - * - * - ARM_MATH_MVEI: - * - * Define macro ARM_MATH_MVEI, If the silicon supports M-Profile Vector Extension. - - * - ARM_MATH_AUTOVECTORIZE - * Used in conjucture with ARM_MATH_MVEI to let the compiler auto vectorize for the functions that uses inline - * assembly. It does not affect functions that use C or intrinsics. - * - ARM_MATH_BIG_ENDIAN: - * - * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. This is supported only for the legacy - * functions i.e, functions targetted at TensorFlow Lite do not support big endianness. By default library builds for - * little endian targets. - * - * - ARM_NN_TRUNCATE: - * - * Define macro ARM_NN_TRUNCATE to use floor instead of round-to-the-nearest-int for the computation. - * - * - * Copyright Notice - * ------------ - * - * Copyright (C) 2010-2019 Arm Limited. All rights reserved. - * - * [1] CMSIS-NN: Efficient Neural Network Kernels for Arm Cortex-M CPUs https://arxiv.org/abs/1801.06601 - * - * [2] Converting a Neural Network for Arm Cortex-M with CMSIS-NN - * - https://developer.arm.com/solutions/machine-learning-on-arm/developer-material/how-to-guides/converting-a-neural-network-for-arm-cortex-m-with-cmsis-nn/single-page - * [3] https://www.tensorflow.org/lite/microcontrollers/library - * - * [4] https://github.com/ARM-software/CMSIS_5/tree/develop/CMSIS/NN#legacy-vs-tfl-micro-compliant-apis - */ - -/** - * @defgroup groupNN Neural Network Functions - * A collection of functions to perform basic operations for neural network layers. Functions with a _s8 suffix support - * TensorFlow Lite framework. - */ - -#ifndef _ARM_NNFUNCTIONS_H -#define _ARM_NNFUNCTIONS_H - -#include "arm_nn_math_types.h" -#include "arm_nn_types.h" - -#define USE_INTRINSIC - -//#define ARM_NN_TRUNCATE /* This config the rounding model to floor or round to the nearest int */ - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Struct for specifying activation function types - * - */ -typedef enum -{ - ARM_SIGMOID = 0, - /**< Sigmoid activation function */ - ARM_TANH = 1, - /**< Tanh activation function */ -} arm_nn_activation_type; - -/** - * @defgroup NNConv Convolution Functions - * - * Collection of convolution, depthwise convolution functions and their variants. - * - * The convolution is implemented in 2 steps: im2col and GEMM - * - * im2col is a process of converting each patch of image data into - * a column. After im2col, the convolution is computed as matrix-matrix - * multiplication. - * - * To reduce the memory footprint, the im2col is performed partially. - * Each iteration, only a few column (i.e., patches) are generated and - * computed with GEMM kernels similar to CMSIS-DSP arm_mat_mult functions. - * - */ - -/** - * @brief s8 convolution layer wrapper function with the main purpose to call the optimal kernel available in - cmsis-nn - * to perform the convolution. - * - * @param[in, out] ctx Function context that contains the additional buffer if required by the function. - arm_convolve_wrapper_s8_get_buffer_size will return the buffer_size if required - * @param[in] conv_params Convolution parameters (e.g. strides, dilations, pads,...). - * Range of conv_params->input_offset : [-127, 128] - * Range of conv_params->output_offset : [-128, 127] - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] input_data Input (activation) data pointer. Data type: int8 - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK are the - * spatial filter dimensions - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Bias data pointer. Data type: int32 - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * @param[out] output_data Output data pointer. Data type: int8 - * - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH if argument constraints fail. or, - * ARM_MATH_SUCCESS on successful completion. - * - */ -arm_status arm_convolve_wrapper_s8(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief Get the required buffer size for arm_convolve_wrapper_s8 - * - * @param[in] conv_params Convolution parameters (e.g. strides, dilations, pads,...). - * Range of conv_params->input_offset : [-127, 128] - * Range of conv_params->output_offset : [-128, 127] - * @param[in] input_dims Input (activation) dimensions. Format: [N, H, W, C_IN] - * @param[in] filter_dims Filter dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK are the spatial - * filter dimensions - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * - * @return The function returns required buffer size(bytes) - * - */ -int32_t arm_convolve_wrapper_s8_get_buffer_size(const cmsis_nn_conv_params *conv_params, - const cmsis_nn_dims *input_dims, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims); - -/** - * @brief s16 convolution layer wrapper function with the main purpose to call the optimal kernel available in - cmsis-nn - * to perform the convolution. - * - * @param[in, out] ctx Function context that contains the additional buffer if required by the function. - arm_convolve_wrapper_s8_get_buffer_size will return the buffer_size if required - * @param[in] conv_params Convolution parameters (e.g. strides, dilations, pads,...). - * conv_params->input_offset : Not used - * conv_params->output_offset : Not used - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] input_data Input (activation) data pointer. Data type: int16 - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK are the - * spatial filter dimensions - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Bias data pointer. Data type: int64 - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * @param[out] output_data Output data pointer. Data type: int16 - * - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH if argument constraints fail. or, - * ARM_MATH_SUCCESS on successful completion. - * - */ -arm_status arm_convolve_wrapper_s16(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q15_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int64_t *bias_data, - const cmsis_nn_dims *output_dims, - q15_t *output_data); - -/** - * @brief Get the required buffer size for arm_convolve_wrapper_s16 - * - * @param[in] conv_params Convolution parameters (e.g. strides, dilations, pads,...). - * conv_params->input_offset : Not used - * conv_params->output_offset : Not used - * @param[in] input_dims Input (activation) dimensions. Format: [N, H, W, C_IN] - * @param[in] filter_dims Filter dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK are the spatial - * filter dimensions - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * - * @return The function returns required buffer size(bytes) - * - */ -int32_t arm_convolve_wrapper_s16_get_buffer_size(const cmsis_nn_conv_params *conv_params, - const cmsis_nn_dims *input_dims, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims); - -/** - * @brief Basic s8 convolution function - * @param[in, out] ctx Function context that contains the additional buffer if required by the function. - arm_convolve_s8_get_buffer_size will return the buffer_size if required - * @param[in] conv_params Convolution parameters (e.g. strides, dilations, pads,...). - * Range of conv_params->input_offset : [-127, 128] - * Range of conv_params->output_offset : [-128, 127] - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] input_data Input (activation) data pointer. Data type: int8 - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK are the - * spatial filter dimensions - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Optional bias data pointer. Data type: int32 - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * @param[out] output_data Output data pointer. Data type: int8 - - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * 1. Supported framework: TensorFlow Lite micro - * 2. q7 is used as data type eventhough it is s8 data. It is done so to be consistent with existing APIs. - * 3. Additional memory is required for optimization. Refer to argument 'ctx' for details. - * - */ -arm_status arm_convolve_s8(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief Get the required buffer size for s8 convolution function - * - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK - * are the spatial filter dimensions - * @return The function returns required buffer size(bytes) - * - */ -int32_t arm_convolve_s8_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims); - -/** - * @brief Basic s16 convolution function - * @param[in, out] ctx Function context that contains the additional buffer if required by the function. - arm_convolve_s16_get_buffer_size will return the buffer_size if required - * @param[in] conv_params Convolution parameters (e.g. strides, dilations, pads,...). - * conv_params->input_offset : Not used - * conv_params->output_offset : Not used - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] input_data Input (activation) data pointer. Data type: int16 - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK are the - * spatial filter dimensions - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Optional bias data pointer. Data type: int64 - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * @param[out] output_data Output data pointer. Data type: int16 - - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * 1. Supported framework: TensorFlow Lite micro - * 2. q7/q15 is used as data type eventhough it is s8/s16 data. It is done so to be consistent with existing APIs. - * 3. Additional memory is required for optimization. Refer to argument 'ctx' for details. - * - */ -arm_status arm_convolve_s16(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q15_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int64_t *bias_data, - const cmsis_nn_dims *output_dims, - q15_t *output_data); -/** - * @brief Optimized s16 convolution function - * @param[in, out] ctx Function context that contains the additional buffer if required by the function. - arm_convolve_fast_s16_get_buffer_size will return the buffer_size if required - * @param[in] conv_params Convolution parameters (e.g. strides, dilations, pads,...). - * conv_params->input_offset : Not used - * conv_params->output_offset : Not used - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] input_data Input (activation) data pointer. Data type: int16 - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK are the - * spatial filter dimensions. (filter_dims->w * filter_dims->h * input_dims->c) must not - exceed 512 - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Optional bias data pointer. Data type: int64 - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * @param[out] output_data Output data pointer. Data type: int16 - - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * 1. Supported framework: TensorFlow Lite micro - * 2. q7/q15 is used as data type eventhough it is s8/s16 data. It is done so to be consistent with existing APIs. - * 3. Additional memory is required for optimization. Refer to argument 'ctx' for details. - * 4. Implementation supports kernel volumes (filter width * filter height * input channels) < 512. - * - */ - -arm_status arm_convolve_fast_s16(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q15_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int64_t *bias_data, - const cmsis_nn_dims *output_dims, - q15_t *output_data); - -/** - * @brief Get the required buffer size for s16 convolution function - * - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK - * are the spatial filter dimensions - * @return The function returns required buffer size(bytes) - * - */ -int32_t arm_convolve_s16_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims); - -/** - * @brief Get the required buffer size for fast s16 convolution function - * - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, HK, WK, C_IN] where HK and WK - * are the spatial filter dimensions - * @return The function returns required buffer size(bytes) - * - */ -int32_t arm_convolve_fast_s16_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims); - -/** - * @brief Basic Q7 convolution function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimension - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns ARM_MATH_SUCCESS - * - */ -arm_status arm_convolve_HWC_q7_basic(const q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Basic Q7 convolution function (non-square shape) - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in_x input tensor dimension x - * @param[in] dim_im_in_y input tensor dimension y - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel_x filter kernel size x - * @param[in] dim_kernel_y filter kernel size y - * @param[in] padding_x padding size x - * @param[in] padding_y padding size y - * @param[in] stride_x convolution stride x - * @param[in] stride_y convolution stride y - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out_x output tensor dimension x - * @param[in] dim_im_out_y output tensor dimension y - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns ARM_MATH_SUCCESS - */ -arm_status arm_convolve_HWC_q7_basic_nonsquare(const q7_t *Im_in, - const uint16_t dim_im_in_x, - const uint16_t dim_im_in_y, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel_x, - const uint16_t dim_kernel_y, - const uint16_t padding_x, - const uint16_t padding_y, - const uint16_t stride_x, - const uint16_t stride_y, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out_x, - const uint16_t dim_im_out_y, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Basic Q15 convolution function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimension - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns ARM_MATH_SUCCESS - * - */ -arm_status arm_convolve_HWC_q15_basic(const q15_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q15_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q15_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q15_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Fast Q7 convolution function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimension - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * This function is the version with full list of optimization tricks, but with - * some contraints: - * ch_im_in is multiple of 4 - * ch_im_out is multiple of 2 - */ -arm_status arm_convolve_HWC_q7_fast(const q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Fast Q7 convolution function (non-sqaure shape) - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in_x input tensor dimension x - * @param[in] dim_im_in_y input tensor dimension y - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel_x filter kernel size x - * @param[in] dim_kernel_y filter kernel size y - * @param[in] padding_x padding size x - * @param[in] padding_y padding size y - * @param[in] stride_x convolution stride x - * @param[in] stride_y convolution stride y - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out_x output tensor dimension x - * @param[in] dim_im_out_y output tensor dimension y - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * This function is the version with full list of optimization tricks, but with - * some contraints: - * ch_im_in is multiple of 4 - * ch_im_out is multiple of 2 - */ - -arm_status arm_convolve_HWC_q7_fast_nonsquare(const q7_t *Im_in, - const uint16_t dim_im_in_x, - const uint16_t dim_im_in_y, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel_x, - const uint16_t dim_kernel_y, - const uint16_t padding_x, - const uint16_t padding_y, - const uint16_t stride_x, - const uint16_t stride_y, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out_x, - const uint16_t dim_im_out_y, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Fast Q7 version of 1x1 convolution (non-sqaure shape) - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in_x input tensor dimension x - * @param[in] dim_im_in_y input tensor dimension y - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel_x filter kernel size x - * @param[in] dim_kernel_y filter kernel size y - * @param[in] padding_x padding size x - * @param[in] padding_y padding size y - * @param[in] stride_x convolution stride x - * @param[in] stride_y convolution stride y - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out_x output tensor dimension x - * @param[in] dim_im_out_y output tensor dimension y - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH if argument constraints fail. or, - * ARM_MATH_SUCCESS on successful completion. - * - * This function implement convolution with 1x1 kernel size (i.e., dim_kernel_x=1 - * and dim_kernel_y=1). It can be used for - * second half of MobileNets after depthwise separable convolution. - * - * This function is the version with full list of optimization tricks, but with - * some contraints: - * ch_im_in is multiple of 4 - * ch_im_out is multiple of 2 - */ -arm_status arm_convolve_1x1_HWC_q7_fast_nonsquare(const q7_t *Im_in, - const uint16_t dim_im_in_x, - const uint16_t dim_im_in_y, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel_x, - const uint16_t dim_kernel_y, - const uint16_t padding_x, - const uint16_t padding_y, - const uint16_t stride_x, - const uint16_t stride_y, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out_x, - const uint16_t dim_im_out_y, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Fast s8 version for 1x1 convolution (non-square shape) - * - * @param[in, out] ctx Function context that contains the additional buffer if required by the function. - arm_convolve_1x1_s8_fast_get_buffer_size will return the buffer_size if required - * @param[in] conv_params Convolution parameters (e.g. strides, dilations, pads,...). - * Range of conv_params->input_offset : [-127, 128] - * Range of conv_params->output_offset : [-128, 127] - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] input_data Input (activation) data pointer. Data type: int8 - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, 1, 1, C_IN] - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Optional bias data pointer. Data type: int32 - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * @param[out] output_data Output data pointer. Data type: int8 - * - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH if argument constraints fail. or, - * ARM_MATH_SUCCESS on successful completion. - * - * @details - * - Supported framework : TensorFlow Lite Micro - * - The following constrains on the arguments apply - * -# input_dims->c is a multiple of 4 - * -# conv_params->padding.w = conv_params->padding.h = 0 - * -# conv_params->stride.w = conv_params->stride.h = 1 - * - */ -arm_status arm_convolve_1x1_s8_fast(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief Get the required buffer size for arm_convolve_1x1_s8_fast - * - * @param[in] input_dims Input (activation) dimensions - * @return The function returns the required buffer size in bytes - * - */ -int32_t arm_convolve_1x1_s8_fast_get_buffer_size(const cmsis_nn_dims *input_dims); - -/** - * @brief 1xn convolution - * - * @param[in, out] ctx Function context that contains the additional buffer if required by the function. - arm_convolve_1_x_n_s8_get_buffer_size will return the buffer_size if required - * @param[in] conv_params Convolution parameters (e.g. strides, dilations, pads,...). - * Range of conv_params->input_offset : [-127, 128] - * Range of conv_params->output_offset : [-128, 127] - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] input_data Input (activation) data pointer. Data type: int8 - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, 1, WK, C_IN] where WK is the horizontal - * spatial filter dimension - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Optional bias data pointer. Data type: int32 - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * @param[out] output_data Output data pointer. Data type: int8 - * - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH if argument constraints fail. or, - * ARM_MATH_SUCCESS on successful completion. - * - * @details - * - Supported framework : TensorFlow Lite Micro - * - The following constrains on the arguments apply - * -# input_dims->n equals 1 - * -# ouput_dims->w is a multiple of 4 - * -# Explicit constraints(since it is for 1xN convolution) - * -## input_dims->h equals 1 - * -## output_dims->h equals 1 - * -## filter_dims->h equals 1 - *@todo Remove constraint on output_dims->w to make the function generic. - * - */ -arm_status arm_convolve_1_x_n_s8(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief Get the required additional buffer size for 1xn convolution - * - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * @param[in] filter_dims Filter tensor dimensions. Format: [C_OUT, 1, WK, C_IN] where WK is the - * horizontal spatial filter dimension - * @return The function returns required buffer size(bytes) - * - */ -int32_t arm_convolve_1_x_n_s8_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims); - -/** - * @brief Q7 version of convolution for RGB image - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimension - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * This kernel is written exclusively for convolution with ch_im_in - * equals 3. This applies on the first layer of CNNs which has input - * image with RGB format. - */ - -arm_status arm_convolve_HWC_q7_RGB(const q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Fast Q15 convolution function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimension - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * This function is the version with full list of optimization tricks, but with - * some contraints: - * ch_im_in is multiple of 2 - * ch_im_out is multiple of 2 - * dim_im_out is a multiple of 2 - */ - -arm_status arm_convolve_HWC_q15_fast(const q15_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q15_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q15_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q15_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Fast Q15 convolution function (non-sqaure shape) - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in_x input tensor dimension x - * @param[in] dim_im_in_y input tensor dimension y - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel_x filter kernel size x - * @param[in] dim_kernel_y filter kernel size y - * @param[in] padding_x padding size x - * @param[in] padding_y padding size y - * @param[in] stride_x convolution stride x - * @param[in] stride_y convolution stride y - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out_x output tensor dimension x - * @param[in] dim_im_out_y output tensor dimension y - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * - * Buffer size: - * - * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel - * - * bufferB size: 0 - * - * Input dimension constraints: - * - * ch_im_in is multiple of 2 - * - * ch_im_out is multipe of 2 - * - */ - -arm_status arm_convolve_HWC_q15_fast_nonsquare(const q15_t *Im_in, - const uint16_t dim_im_in_x, - const uint16_t dim_im_in_y, - const uint16_t ch_im_in, - const q15_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel_x, - const uint16_t dim_kernel_y, - const uint16_t padding_x, - const uint16_t padding_y, - const uint16_t stride_x, - const uint16_t stride_y, - const q15_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q15_t *Im_out, - const uint16_t dim_im_out_x, - const uint16_t dim_im_out_y, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Q7 depthwise separable convolution function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimension - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * This function is the version with full list of optimization tricks, but with - * some contraints: - * ch_im_in is multiple of 2 - * ch_im_out is multiple of 2 - */ - -arm_status arm_depthwise_separable_conv_HWC_q7(const q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Q7 depthwise separable convolution function (non-square shape) - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in_x input tensor dimension x - * @param[in] dim_im_in_y input tensor dimension y - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel_x filter kernel size x - * @param[in] dim_kernel_y filter kernel size y - * @param[in] padding_x padding sizes x - * @param[in] padding_y padding sizes y - * @param[in] stride_x convolution stride x - * @param[in] stride_y convolution stride y - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out_x output tensor dimension x - * @param[in] dim_im_out_y output tensor dimension y - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * This function is the version with full list of optimization tricks, but with - * some contraints: - * ch_im_in is multiple of 2 - * ch_im_out is multiple of 2 - */ -arm_status arm_depthwise_separable_conv_HWC_q7_nonsquare(const q7_t *Im_in, - const uint16_t dim_im_in_x, - const uint16_t dim_im_in_y, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel_x, - const uint16_t dim_kernel_y, - const uint16_t padding_x, - const uint16_t padding_y, - const uint16_t stride_x, - const uint16_t stride_y, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out_x, - const uint16_t dim_im_out_y, - q15_t *bufferA, - q7_t *bufferB); - -/** - * @brief Wrapper function to pick the right optimized s8 depthwise convolution function - * - * @param[in, out] ctx Function context (e.g. temporary buffer). Check the function - * definition file to see if an additional buffer is required. - * Optional function {API}_get_buffer_size() provides the buffer - * size if required. - * @param[in] dw_conv_params Depthwise convolution parameters (e.g. strides, dilations, pads,...) - * dw_conv_params->dilation is not used. - * Range of dw_conv_params->input_offset : [-127, 128] - * Range of dw_conv_params->output_offset : [-128, 127] - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each - * output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [H, W, C_IN] - * Batch argument N is not used and assumed to be 1. - * @param[in] input_data Input (activation) data pointer. Data type: int8 - * @param[in] filter_dims Filter tensor dimensions. Format: [1, H, W, C_OUT] - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Bias data pointer. Data type: int32 - * @param[in] output_dims Output tensor dimensions. Format: [1, H, W, C_OUT] - * @param[in, out] output_data Output data pointer. Data type: int8 - * @return The function returns - * ARM_MATH_SUCCESS - Successful completion. - * - * @details - * - Supported framework: TensorFlow Lite - * - Picks one of the the following functions - * -# arm_depthwise_conv_s8() - * -# arm_depthwise_conv_3x3_s8() - Cortex-M CPUs with DSP extension only - * -# arm_depthwise_conv_s8_opt() - * - q7 is used as data type eventhough it is s8 data. It is done so to be consistent with existing APIs. - * - Check details of arm_depthwise_conv_s8_opt() for potential data that can be accessed outside of the - * boundary. - */ -arm_status arm_depthwise_conv_wrapper_s8(const cmsis_nn_context *ctx, - const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief Get size of additional buffer required by arm_depthwise_conv_wrapper_s8() - * - * @param[in] dw_conv_params Depthwise convolution parameters (e.g. strides, dilations, pads,...) - * dw_conv_params->dilation is not used. - * Range of dw_conv_params->input_offset : [-127, 128] - * Range of dw_conv_params->input_offset : [-128, 127] - * @param[in] input_dims Input (activation) tensor dimensions. Format: [H, W, C_IN] - * Batch argument N is not used and assumed to be 1. - * @param[in] filter_dims Filter tensor dimensions. Format: [1, H, W, C_OUT] - * @param[in] output_dims Output tensor dimensions. Format: [1, H, W, C_OUT] - * @return Size of additional memory required for optimizations in bytes. - * - */ -int32_t arm_depthwise_conv_wrapper_s8_get_buffer_size(const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_dims *input_dims, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims); - -/** - * @brief Basic s8 depthwise convolution function that doesn't have any constraints on the input dimensions. - * - * @param[in, out] ctx Function context (e.g. temporary buffer). Check the function - * definition file to see if an additional buffer is required. - * Optional function {API}_get_buffer_size() provides the buffer - * size if an additional buffer is required. - * exists if additional memory is. - * @param[in] dw_conv_params Depthwise convolution parameters (e.g. strides, dilations, pads,...) - * dw_conv_params->dilation is not used. - * Range of dw_conv_params->input_offset : [-127, 128] - * Range of dw_conv_params->input_offset : [-128, 127] - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each - * output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * Batch argument N is not used. - * @param[in] input_data Input (activation) data pointer. Data type: int8 - * @param[in] filter_dims Filter tensor dimensions. Format: [1, H, W, C_OUT] - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Bias data pointer. Data type: int32 - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * @param[in, out] output_data Output data pointer. Data type: int8 - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * - Supported framework: TensorFlow Lite - * - q7 is used as data type eventhough it is s8 data. It is done so to be consistent with existing APIs. - */ -arm_status arm_depthwise_conv_s8(const cmsis_nn_context *ctx, - const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief Basic s16 depthwise convolution function that doesn't have any constraints on the input dimensions. - * - * @param[in, out] ctx Function context (e.g. temporary buffer). Check the function - * definition file to see if an additional buffer is required. - * Optional function {API}_get_buffer_size() provides the buffer - * size if an additional buffer is required. - * exists if additional memory is. - * @param[in] dw_conv_params Depthwise convolution parameters (e.g. strides, dilations, pads,...) - * conv_params->input_offset : Not used - * conv_params->output_offset : Not used - * @param[in] quant_params Per-channel quantization info. - * It contains the multiplier and shift values to be applied to each - * output channel - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * Batch argument N is not used. - * @param[in] input_data Input (activation) data pointer. Data type: int8 - * @param[in] filter_dims Filter tensor dimensions. Format: [1, H, W, C_OUT] - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * @param[in] bias_data Bias data pointer. Data type: int64 - * @param[in] output_dims Output tensor dimensions. Format: [N, H, W, C_OUT] - * @param[in, out] output_data Output data pointer. Data type: int16 - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * - Supported framework: TensorFlow Lite - * - q15 is used as data type eventhough it is s16 data. It is done so to be consistent with existing APIs. - */ -arm_status arm_depthwise_conv_s16(const cmsis_nn_context *ctx, - const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q15_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int64_t *bias_data, - const cmsis_nn_dims *output_dims, - q15_t *output_data); - -/** - * @brief Optimized s8 depthwise convolution function for 3x3 kernel size with some constraints on - * the input arguments(documented below). Refer arm_depthwise_conv_s8() for function - * argument details. - * - * @return The function returns one of the following - * ARM_MATH_SIZE_MISMATCH - Unsupported dimension of tensors - * ARM_MATH_ARGUMENT_ERROR - Unsupported pad size along the x axis - * ARM_MATH_SUCCESS - Successful operation - * - * @details - * - Supported framework : TensorFlow Lite Micro - * - The following constrains on the arguments apply - * -# Number of input channel equals number of output channels - * -# Filter height and width equals 3 - * -# Padding along x is either 0 or 1. - * - */ -arm_status arm_depthwise_conv_3x3_s8(const cmsis_nn_context *ctx, - const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief Optimized s8 depthwise convolution function with constraint that in_channel equals out_channel. - * Refer arm_depthwise_conv_s8() for function argument details. - * - * @return The function returns one of the following - * ARM_MATH_SIZE_MISMATCH - input channel != output channel or - * ch_mult != 1 - * ARM_MATH_SUCCESS - Successful operation - * - * @note If number of channels is not a multiple of 4, upto 3 elements outside the boundary will be read out - * for the following if MVE optimizations(Arm Helium Technology) are used. - * - Output shift - * - Output multiplier - * - Output bias - * - kernel - * @details - * - Supported framework: TensorFlow Lite - * - The following constrains on the arguments apply - * -# Number of input channel equals number of output channels or ch_mult equals 1 - * - q7 is used as data type eventhough it is s8 data. It is done so to be consistent with existing APIs. - * - Reccomended when number of channels is 4 or greater. - * - */ -arm_status arm_depthwise_conv_s8_opt(const cmsis_nn_context *ctx, - const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief Get the required buffer size for optimized s8 depthwise convolution - * function with constraint that in_channel equals out_channel. - * @param[in] input_dims Input (activation) tensor dimensions. Format: [1, H, W, C_IN] - * Batch argument N is not used. - * @param[in] filter_dims Filter tensor dimensions. Format: [1, H, W, C_OUT] - * @return The function returns required buffer size in bytes - * - */ -int32_t arm_depthwise_conv_s8_opt_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims); - -/** - * @defgroup FC Fully-connected Layer Functions - * - * Collection of fully-connected and matrix multiplication functions. - * - * Fully-connected layer is basically a matrix-vector multiplication - * with bias. The matrix is the weights and the input/output vectors - * are the activation values. Supported {weight, activation} precisions - * include {8-bit, 8-bit}, {16-bit, 16-bit}, and {8-bit, 16-bit}. - * - * Here we have two types of kernel functions. The basic function - * implements the function using regular GEMV approach. The opt functions - * operates with weights in interleaved formats. - * - */ - -/** - *@brief Q7 basic fully-connected layer function - *@param[in] pV pointer to input vector - *@param[in] pM pointer to matrix weights - *@param[in] dim_vec length of the vector - *@param[in] num_of_rows number of rows in weight matrix - *@param[in] bias_shift amount of left-shift for bias - *@param[in] out_shift amount of right-shift for output - *@param[in] bias pointer to bias - *@param[in,out] pOut pointer to output vector - *@param[in,out] vec_buffer pointer to buffer space for input - *@return The function returns ARM_MATH_SUCCESS - * - */ - -arm_status arm_fully_connected_q7(const q7_t *pV, - const q7_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q7_t *pOut, - q15_t *vec_buffer); - -/** - * @brief Basic s8 Fully Connected function. - * - * @param[in, out] ctx Function context (e.g. temporary buffer). Check the function - * definition file to see if an additional buffer is required. - * Optional function {API}_get_buffer_size() provides the buffer - * size if an additional buffer is required. - * @param[in] fc_params Fully Connected layer parameters. - * Range of fc_params->input_offset : [-127, 128] - * fc_params->filter_offset : 0 - * Range of fc_params->output_offset : [-128, 127] - * @param[in] quant_params Per-tensor quantization info. - * It contains the multiplier and shift values to be applied to the output tensor. - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * Input dimension is taken as Nx(H * W * C_IN) - * @param[in] input_data Input (activation) data pointer. Data type: int8 - * @param[in] filter_dims Two dimensional filter dimensions. Format: [N, C] - * N : accumulation depth and equals (H * W * C_IN) from input_dims - * C : output depth and equals C_OUT in output_dims - * H & W : Not used - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * N, H, W : Not used - * @param[in] bias_data Bias data pointer. Data type: int32 - * @param[in] output_dims Output tensor dimensions. Format: [N, C_OUT] - * N : Batches - * C_OUT : Output depth - * H & W : Not used. - * @param[in, out] output_data Output data pointer. Data type: int8 - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * - Supported framework: TensorFlow Lite - * - q7 is used as data type eventhough it is s8 data. It is done so to be consistent with existing APIs. - */ -arm_status arm_fully_connected_s8(const cmsis_nn_context *ctx, - const cmsis_nn_fc_params *fc_params, - const cmsis_nn_per_tensor_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief Get the required buffer size for S8 basic fully-connected and - * matrix multiplication layer function for TF Lite - * @param[in] filter_dims dimension of filter - * @return The function returns required buffer size in bytes - * - */ -int32_t arm_fully_connected_s8_get_buffer_size(const cmsis_nn_dims *filter_dims); - -/** - * @brief Basic s16 Fully Connected function. - * - * @param[in, out] ctx Function context (e.g. temporary buffer). Check the function - * definition file to see if an additional buffer is required. - * Optional function {API}_get_buffer_size() provides the buffer - * size if an additional buffer is required. - * @param[in] fc_params Fully Connected layer parameters. - * fc_params->input_offset : 0 - * fc_params->filter_offset : 0 - * fc_params->output_offset : 0 - * @param[in] quant_params Per-tensor quantization info. - * It contains the multiplier and shift values to be applied to the output tensor. - * @param[in] input_dims Input (activation) tensor dimensions. Format: [N, H, W, C_IN] - * Input dimension is taken as Nx(H * W * C_IN) - * @param[in] input_data Input (activation) data pointer. Data type: int16 - * @param[in] filter_dims Two dimensional filter dimensions. Format: [N, C] - * N : accumulation depth and equals (H * W * C_IN) from input_dims - * C : output depth and equals C_OUT in output_dims - * H & W : Not used - * @param[in] filter_data Filter data pointer. Data type: int8 - * @param[in] bias_dims Bias tensor dimensions. Format: [C_OUT] - * N, H, W : Not used - * @param[in] bias_data Bias data pointer. Data type: int64 - * @param[in] output_dims Output tensor dimensions. Format: [N, C_OUT] - * N : Batches - * C_OUT : Output depth - * H & W : Not used. - * @param[in, out] output_data Output data pointer. Data type: int16 - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * - Supported framework: TensorFlow Lite - * - q15 is used as data type eventhough it is s16 data. It is done so to be consistent with existing APIs. - */ -arm_status arm_fully_connected_s16(const cmsis_nn_context *ctx, - const cmsis_nn_fc_params *fc_params, - const cmsis_nn_per_tensor_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q15_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int64_t *bias_data, - const cmsis_nn_dims *output_dims, - q15_t *output_data); - -/** - * @brief Get the required buffer size for S16 basic fully-connected and - * matrix multiplication layer function for TF Lite - * @param[in] filter_dims dimension of filter - * @return The function returns required buffer size in bytes - * - */ -int32_t arm_fully_connected_s16_get_buffer_size(const cmsis_nn_dims *filter_dims); - -/** - * @brief Q7 opt fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - */ - -arm_status arm_fully_connected_q7_opt(const q7_t *pV, - const q7_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q7_t *pOut, - q15_t *vec_buffer); - -/** - * @brief Q15 basic fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - */ - -arm_status arm_fully_connected_q15(const q15_t *pV, - const q15_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q15_t *bias, - q15_t *pOut, - q15_t *vec_buffer); - -/** - * @brief Q15 opt fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - */ - -arm_status arm_fully_connected_q15_opt(const q15_t *pV, - const q15_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q15_t *bias, - q15_t *pOut, - q15_t *vec_buffer); - -/** - * @brief Mixed Q15-Q7 fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - */ - -arm_status arm_fully_connected_mat_q7_vec_q15(const q15_t *pV, - const q7_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q15_t *pOut, - q15_t *vec_buffer); - -/** - * @brief Mixed Q15-Q7 opt fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - */ - -arm_status arm_fully_connected_mat_q7_vec_q15_opt(const q15_t *pV, - const q7_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q15_t *pOut, - q15_t *vec_buffer); - -/** - * @brief Matrix-Multiplication Kernels for Convolution - * - * These functions are used within convolution layer functions for - * matrix multiplication. - * - * The implementation is similar to CMSIS-DSP arm_mat_mult functions - * with one Q7 and one Q15 operands. The Q15 operand is the im2col - * output which is always with 2 columns. - * - */ - -/** - * @brief Matrix-multiplication function for convolution - * @param[in] pA pointer to operand A - * @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors - * @param[in] ch_im_out numRow of A - * @param[in] numCol_A numCol of A - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias the bias - * @param[in,out] pOut pointer to output - * @return The function returns the incremented output pointer - */ - -q7_t *arm_nn_mat_mult_kernel_q7_q15(const q7_t *pA, - const q15_t *pInBuffer, - const uint16_t ch_im_out, - const uint16_t numCol_A, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q7_t *pOut); - -#ifdef __cplusplus -} -#endif - -/* - * Other functions - * These layers are typically not timing critical - * Basic implementation is supported here - */ - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup BasicMath Basic math functions - * - * Elementwise add and multiplication functions. - * - */ - -/** - * @brief s8 elementwise add of two vectors - * @param[in] input_1_vect pointer to input vector 1 - * @param[in] input_2_vect pointer to input vector 2 - * @param[in] input_1_offset offset for input 1. Range: -127 to 128 - * @param[in] input_1_mult multiplier for input 1 - * @param[in] input_1_shift shift for input 1 - * @param[in] input_2_offset offset for input 2. Range: -127 to 128 - * @param[in] input_2_mult multiplier for input 2 - * @param[in] input_2_shift shift for input 2 - * @param[in] left_shift input left shift - * @param[in,out] output pointer to output vector - * @param[in] out_offset output offset. Range: -128 to 127 - * @param[in] out_mult output multiplier - * @param[in] out_shift output shift - * @param[in] out_activation_min minimum value to clamp output to. Min: -128 - * @param[in] out_activation_max maximum value to clamp output to. Max: 127 - * @param[in] block_size number of samples - * @return The function returns ARM_MATH_SUCCESS - */ -arm_status arm_elementwise_add_s8(const int8_t *input_1_vect, - const int8_t *input_2_vect, - const int32_t input_1_offset, - const int32_t input_1_mult, - const int32_t input_1_shift, - const int32_t input_2_offset, - const int32_t input_2_mult, - const int32_t input_2_shift, - const int32_t left_shift, - int8_t *output, - const int32_t out_offset, - const int32_t out_mult, - const int32_t out_shift, - const int32_t out_activation_min, - const int32_t out_activation_max, - const int32_t block_size); - -/** - * @brief s16 elementwise add of two vectors - * @param[in] input_1_vect pointer to input vector 1 - * @param[in] input_2_vect pointer to input vector 2 - * @param[in] input_1_offset offset for input 1. Not used. - * @param[in] input_1_mult multiplier for input 1 - * @param[in] input_1_shift shift for input 1 - * @param[in] input_2_offset offset for input 2. Not used. - * @param[in] input_2_mult multiplier for input 2 - * @param[in] input_2_shift shift for input 2 - * @param[in] left_shift input left shift - * @param[in,out] output pointer to output vector - * @param[in] out_offset output offset. Not used. - * @param[in] out_mult output multiplier - * @param[in] out_shift output shift - * @param[in] out_activation_min minimum value to clamp output to. Min: -32768 - * @param[in] out_activation_max maximum value to clamp output to. Max: 32767 - * @param[in] block_size number of samples - * @return The function returns ARM_MATH_SUCCESS - */ -arm_status arm_elementwise_add_s16(const int16_t *input_1_vect, - const int16_t *input_2_vect, - const int32_t input_1_offset, - const int32_t input_1_mult, - const int32_t input_1_shift, - const int32_t input_2_offset, - const int32_t input_2_mult, - const int32_t input_2_shift, - const int32_t left_shift, - int16_t *output, - const int32_t out_offset, - const int32_t out_mult, - const int32_t out_shift, - const int32_t out_activation_min, - const int32_t out_activation_max, - const int32_t block_size); - -/** - * @brief s8 elementwise multiplication - * @param[in] input_1_vect pointer to input vector 1 - * @param[in] input_2_vect pointer to input vector 2 - * @param[in] input_1_offset offset for input 1. Range: -127 to 128 - * @param[in] input_2_offset offset for input 2. Range: -127 to 128 - * @param[in,out] output pointer to output vector - * @param[in] out_offset output offset. Range: -128 to 127 - * @param[in] out_mult output multiplier - * @param[in] out_shift output shift - * @param[in] out_activation_min minimum value to clamp output to. Min: -128 - * @param[in] out_activation_max maximum value to clamp output to. Max: 127 - * @param[in] block_size number of samples - * @return The function returns ARM_MATH_SUCCESS - * - * @details Supported framework: TensorFlow Lite micro - */ -arm_status arm_elementwise_mul_s8(const int8_t *input_1_vect, - const int8_t *input_2_vect, - const int32_t input_1_offset, - const int32_t input_2_offset, - int8_t *output, - const int32_t out_offset, - const int32_t out_mult, - const int32_t out_shift, - const int32_t out_activation_min, - const int32_t out_activation_max, - const int32_t block_size); - -/** - * @brief s16 elementwise multiplication - * @param[in] input_1_vect pointer to input vector 1 - * @param[in] input_2_vect pointer to input vector 2 - * @param[in] input_1_offset offset for input 1. Not used. - * @param[in] input_2_offset offset for input 2. Not used. - * @param[in,out] output pointer to output vector - * @param[in] out_offset output offset. Not used. - * @param[in] out_mult output multiplier - * @param[in] out_shift output shift - * @param[in] out_activation_min minimum value to clamp output to. Min: -32768 - * @param[in] out_activation_max maximum value to clamp output to. Max: 32767 - * @param[in] block_size number of samples - * @return The function returns ARM_MATH_SUCCESS - * - * @details Supported framework: TensorFlow Lite micro - */ -arm_status arm_elementwise_mul_s16(const int16_t *input_1_vect, - const int16_t *input_2_vect, - const int32_t input_1_offset, - const int32_t input_2_offset, - int16_t *output, - const int32_t out_offset, - const int32_t out_mult, - const int32_t out_shift, - const int32_t out_activation_min, - const int32_t out_activation_max, - const int32_t block_size); - -/** - * @defgroup Acti Activation Functions - * - * Perform activation layers, including ReLU (Rectified Linear Unit), - * sigmoid and tanh - * - */ - -/** - * @brief Q7 RELU function - * @param[in,out] data pointer to input - * @param[in] size number of elements - * @return none. - */ - -void arm_relu_q7(q7_t *data, uint16_t size); - -/** - * @brief s8 ReLU6 function - * @param[in,out] data pointer to input - * @param[in] size number of elements - */ - -void arm_relu6_s8(q7_t *data, uint16_t size); - -/** - * @brief Q15 RELU function - * @param[in,out] data pointer to input - * @param[in] size number of elements - * @return none. - */ - -void arm_relu_q15(q15_t *data, uint16_t size); - -/** - * @brief Q7 neural network activation function using direct table look-up - * @param[in,out] data pointer to input - * @param[in] size number of elements - * @param[in] int_width bit-width of the integer part, assume to be smaller than 3 - * @param[in] type type of activation functions - * @return none. - */ - -void arm_nn_activations_direct_q7(q7_t *data, uint16_t size, uint16_t int_width, arm_nn_activation_type type); - -/** - * @brief Q15 neural network activation function using direct table look-up - * @param[in,out] data pointer to input - * @param[in] size number of elements - * @param[in] int_width bit-width of the integer part, assume to be smaller than 3 - * @param[in] type type of activation functions - * @return none. - * - * @details - * - * This is the direct table look-up approach. - * - * Assume here the integer part of the fixed-point is <= 3. - * More than 3 just not making much sense, makes no difference with - * saturation followed by any of these activation functions. - */ - -void arm_nn_activations_direct_q15(q15_t *data, uint16_t size, uint16_t int_width, arm_nn_activation_type type); - -/** - * @defgroup Pooling Pooling Functions - * - * Perform pooling functions, including max pooling and average pooling - * - */ - -/** - * @brief Q7 max pooling function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimension - * @param[in] ch_im_in number of input tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] Im_out pointer to output tensor - * @return none. - * - */ - -void arm_maxpool_q7_HWC(q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const uint16_t dim_im_out, - q7_t *bufferA, - q7_t *Im_out); - -/** - * @brief Q7 average pooling function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimension - * @param[in] ch_im_in number of input tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] Im_out pointer to output tensor - * @return none. - * - */ - -void arm_avepool_q7_HWC(q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const uint16_t dim_im_out, - q7_t *bufferA, - q7_t *Im_out); - -/** - * @brief s8 average pooling function. - * - * @param[in, out] ctx Function context (e.g. temporary buffer). Check the function - * definition file to see if an additional buffer is required. - * Optional function {API}_get_buffer_size() provides the buffer - * size if an additional buffer is required. - * @param[in] pool_params Pooling parameters - * @param[in] input_dims Input (activation) tensor dimensions. Format: [H, W, C_IN] - * Argument 'N' is not used. - * @param[in] input_data Input (activation) data pointer. Data type: int8 - * @param[in] filter_dims Filter tensor dimensions. Format: [H, W] - * Argument N and C are not used. - * @param[in] output_dims Output tensor dimensions. Format: [H, W, C_OUT] - * Argument N is not used. - * C_OUT equals C_IN. - * @param[in, out] output_data Output data pointer. Data type: int8 - * @return The function returns - * ARM_MATH_SUCCESS - Successful operation - * - * @details - * - Supported Framework: TensorFlow Lite - * - */ -arm_status arm_avgpool_s8(const cmsis_nn_context *ctx, - const cmsis_nn_pool_params *pool_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief Get the required buffer size for S8 average pooling function - * @param[in] dim_dst_width output tensor dimension - * @param[in] ch_src number of input tensor channels - * @return The function returns required buffer size in bytes - * - */ -int32_t arm_avgpool_s8_get_buffer_size(const int dim_dst_width, const int ch_src); - -/** - * @brief s16 average pooling function. - * - * @param[in, out] ctx Function context (e.g. temporary buffer). Check the function - * definition file to see if an additional buffer is required. - * Optional function {API}_get_buffer_size() provides the buffer - * size if an additional buffer is required. - * @param[in] pool_params Pooling parameters - * @param[in] input_dims Input (activation) tensor dimensions. Format: [H, W, C_IN] - * Argument 'N' is not used. - * @param[in] input_data Input (activation) data pointer. Data type: int16 - * @param[in] filter_dims Filter tensor dimensions. Format: [H, W] - * Argument N and C are not used. - * @param[in] output_dims Output tensor dimensions. Format: [H, W, C_OUT] - * Argument N is not used. - * C_OUT equals C_IN. - * @param[in, out] output_data Output data pointer. Data type: int16 - * @return The function returns - * ARM_MATH_SUCCESS - Successful operation - * - * @details - * - Supported Framework: TensorFlow Lite - * - */ -arm_status arm_avgpool_s16(const cmsis_nn_context *ctx, - const cmsis_nn_pool_params *pool_params, - const cmsis_nn_dims *input_dims, - const int16_t *input_data, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims, - int16_t *output_data); - -/** - * @brief Get the required buffer size for S16 average pooling function - * @param[in] dim_dst_width output tensor dimension - * @param[in] ch_src number of input tensor channels - * @return The function returns required buffer size in bytes - * - */ -int32_t arm_avgpool_s16_get_buffer_size(const int dim_dst_width, const int ch_src); - -/** - * @brief s8 max pooling function. - * - * @param[in, out] ctx Function context (e.g. temporary buffer). Check the function - * definition file to see if an additional buffer is required. - * Optional function {API}_get_buffer_size() provides the buffer - * size if an additional buffer is required. - * @param[in] pool_params Pooling parameters - * @param[in] input_dims Input (activation) tensor dimensions. Format: [H, W, C_IN] - * Argument 'N' is not used. - * @param[in] input_data Input (activation) data pointer. The input tensor must not - * overlap with the output tensor. Data type: int8 - * @param[in] filter_dims Filter tensor dimensions. Format: [H, W] - * Argument N and C are not used. - * @param[in] output_dims Output tensor dimensions. Format: [H, W, C_OUT] - * Argument N is not used. - * C_OUT equals C_IN. - * @param[in, out] output_data Output data pointer. Data type: int8 - * @return The function returns - * ARM_MATH_SUCCESS - Successful operation - * - * @details - * - Supported Framework: TensorFlow Lite - * - */ -arm_status arm_max_pool_s8(const cmsis_nn_context *ctx, - const cmsis_nn_pool_params *pool_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief s16 max pooling function. - * - * @param[in, out] ctx Function context (e.g. temporary buffer). Check the function - * definition file to see if an additional buffer is required. - * Optional function {API}_get_buffer_size() provides the buffer - * size if an additional buffer is required. - * @param[in] pool_params Pooling parameters - * @param[in] input_dims Input (activation) tensor dimensions. Format: [H, W, C_IN] - * Argument 'N' is not used. - * @param[in] src Input (activation) data pointer. The input tensor must not - * overlap with the output tensor. Data type: int16 - * @param[in] filter_dims Filter tensor dimensions. Format: [H, W] - * Argument N and C are not used. - * @param[in] output_dims Output tensor dimensions. Format: [H, W, C_OUT] - * Argument N is not used. - * C_OUT equals C_IN. - * @param[in, out] dst Output data pointer. Data type: int16 - * @return The function returns - * ARM_MATH_SUCCESS - Successful operation - * - * @details - * - Supported Framework: TensorFlow Lite - * - */ -arm_status arm_max_pool_s16(const cmsis_nn_context *ctx, - const cmsis_nn_pool_params *pool_params, - const cmsis_nn_dims *input_dims, - const int16_t *src, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims, - int16_t *dst); - -/** - * @defgroup Softmax Softmax Functions - * - * EXP(2) based softmax functions. - * - */ - -/** - * @brief Q7 softmax function - * @param[in] vec_in pointer to input vector - * @param[in] dim_vec input vector dimension - * @param[out] p_out pointer to output vector - * - * @note This function is an optimized version which is not bit-accurate with - * TensorFlow Lite's kernel - * - */ - -void arm_softmax_q7(const q7_t *vec_in, const uint16_t dim_vec, q7_t *p_out); - -/** - * @brief Q7 softmax function with batch parameter - * @param[in] vec_in pointer to input vector - * @param[in] nb_batches number of batches - * @param[in] dim_vec input vector dimension - * @param[out] p_out pointer to output vector - * @return none. - * - * @note This function is an optimized version which is not bit-accurate with - * TensorFlow Lite's kernel - * - */ - -void arm_softmax_with_batch_q7(const q7_t *vec_in, const uint16_t nb_batches, const uint16_t dim_vec, q7_t *p_out); -/** - * @brief Q15 softmax function - * @param[in] vec_in pointer to input vector - * @param[in] dim_vec input vector dimension - * @param[out] p_out pointer to output vector - * @return none. - * - * @note This function is an optimized version which is not bit-accurate with - * TensorFlow Lite's kernel - * - */ - -void arm_softmax_q15(const q15_t *vec_in, const uint16_t dim_vec, q15_t *p_out); - -/** - * @brief S8 softmax function - * @param[in] input Pointer to the input tensor - * @param[in] num_rows Number of rows in the input tensor - * @param[in] row_size Number of elements in each input row - * @param[in] mult Input quantization multiplier - * @param[in] shift Input quantization shift within the range [0, 31] - * @param[in] diff_min Minimum difference with max in row. Used to check if - * the quantized exponential operation can be performed - * @param[out] output Pointer to the output tensor - * - * @note Supported framework: TensorFlow Lite micro (bit-accurate) - * - */ -void arm_softmax_s8(const int8_t *input, - const int32_t num_rows, - const int32_t row_size, - const int32_t mult, - const int32_t shift, - const int32_t diff_min, - int8_t *output); - -/** - * @brief S8 to s16 softmax function - * @param[in] input Pointer to the input tensor - * @param[in] num_rows Number of rows in the input tensor - * @param[in] row_size Number of elements in each input row - * @param[in] mult Input quantization multiplier - * @param[in] shift Input quantization shift within the range [0, 31] - * @param[in] diff_min Minimum difference with max in row. Used to check if - * the quantized exponential operation can be performed - * @param[out] output Pointer to the output tensor - * - * @note Supported framework: TensorFlow Lite micro (bit-accurate) - * - */ -void arm_softmax_s8_s16(const int8_t *input, - const int32_t num_rows, - const int32_t row_size, - const int32_t mult, - const int32_t shift, - const int32_t diff_min, - int16_t *output); - -/** - * @brief S16 softmax function - * @param[in] input Pointer to the input tensor - * @param[in] num_rows Number of rows in the input tensor - * @param[in] row_size Number of elements in each input row - * @param[in] mult Input quantization multiplier - * @param[in] shift Input quantization shift within the range [0, 31] - * @param[in] softmax_params Softmax s16 layer parameters with two pointers to LUTs speficied below. - * For indexing the high 9 bits are used and 7 remaining for interpolation. - * That means 512 entries for the 9-bit indexing and 1 extra for interpolation, i.e. 513 - * values for each LUT. - * - Lookup table for exp(x), where x uniform distributed between [-10.0 , 0.0] - * - Lookup table for 1 / (1 + x), where x uniform distributed between [0.0 , 1.0] - * @param[out] output Pointer to the output tensor - * @return The function returns - * ARM_MATH_ARGUMENT_ERROR if LUTs are NULL - * ARM_MATH_SUCCESS - Successful operation - * - * @note Supported framework: TensorFlow Lite micro (bit-accurate) - * - */ -arm_status arm_softmax_s16(const int16_t *input, - const int32_t num_rows, - const int32_t row_size, - const int32_t mult, - const int32_t shift, - const cmsis_nn_softmax_lut_s16 *softmax_params, - int16_t *output); - -/** - * @brief U8 softmax function - * @param[in] input Pointer to the input tensor - * @param[in] num_rows Number of rows in the input tensor - * @param[in] row_size Number of elements in each input row - * @param[in] mult Input quantization multiplier - * @param[in] shift Input quantization shift within the range [0, 31] - * @param[in] diff_min Minimum difference with max in row. Used to check if - * the quantized exponential operation can be performed - * @param[out] output Pointer to the output tensor - * - * @note Supported framework: TensorFlow Lite micro (bit-accurate) - * - */ - -void arm_softmax_u8(const uint8_t *input, - const int32_t num_rows, - const int32_t row_size, - const int32_t mult, - const int32_t shift, - const int32_t diff_min, - uint8_t *output); - -/** - * @brief uint8 depthwise convolution function with asymmetric quantization - * Unless specified otherwise, arguments are mandatory. - * - * @param[in] input Pointer to input tensor - * @param[in] input_x Width of input tensor - * @param[in] input_y Height of input tensor - * @param[in] input_ch Channels in input tensor - * @param[in] kernel Pointer to kernel weights - * @param[in] kernel_x Width of kernel - * @param[in] kernel_y Height of kernel - * @param[in] ch_mult Number of channel multiplier - * @param[in] pad_x Padding sizes x - * @param[in] pad_y Padding sizes y - * @param[in] stride_x stride along the width - * @param[in] stride_y stride along the height - * @param[in] dilation_x Dilation along width. Not used and intended for future enhancement. - * @param[in] dilation_y Dilation along height. Not used and intended for future enhancement. - * @param[in] bias Pointer to optional bias values. If no bias is - * availble, NULL is expected - * @param[in] input_offset Input tensor zero offset - * @param[in] filter_offset Kernel tensor zero offset - * @param[in] output_offset Output tensor zero offset - * @param[in,out] output Pointer to output tensor - * @param[in] output_x Width of output tensor - * @param[in] output_y Height of output tensor - * @param[in] output_activation_min Minimum value to clamp the output to. Range : {0, 255} - * @param[in] output_activation_max Minimum value to clamp the output to. Range : {0, 255} - * @param[in] out_shift Amount of right-shift for output - * @param[in] out_mult Output multiplier for requantization - * @return The function returns the following - * ARM_MATH_SUCCESS - Successful operation - * - */ -arm_status arm_depthwise_conv_u8_basic_ver1(const uint8_t *input, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_ch, - const uint8_t *kernel, - const uint16_t kernel_x, - const uint16_t kernel_y, - const int16_t ch_mult, - const int16_t pad_x, - const int16_t pad_y, - const int16_t stride_x, - const int16_t stride_y, - const int16_t dilation_x, - const int16_t dilation_y, - const int32_t *bias, - const int32_t input_offset, - const int32_t filter_offset, - const int32_t output_offset, - uint8_t *output, - const uint16_t output_x, - const uint16_t output_y, - const int32_t output_activation_min, - const int32_t output_activation_max, - const int32_t out_shift, - const int32_t out_mult); - -/** - * @defgroup Reshape Reshape Functions - * - */ - -/** - * @brief Reshape a s8 vector into another with different shape - * @param[in] input points to the s8 input vector - * @param[out] output points to the s8 output vector - * @param[in] total_size total size of the input and output vectors in bytes - * - * @note The output is expected to be in a memory area that does not overlap with the input's - * - */ -void arm_reshape_s8(const int8_t *input, int8_t *output, const uint32_t total_size); - -/** - * @defgroup Concatenation Concatenation Functions - * - */ - -/** - * @brief int8/uint8 concatenation function to be used for concatenating N-tensors along the X axis - * This function should be called for each input tensor to concatenate. The argument offset_x - * will be used to store the input tensor in the correct position in the output tensor - * - * i.e. offset_x = 0 - * for(i = 0 i < num_input_tensors; ++i) - * { - * arm_concatenation_s8_x(&input[i], ..., &output, ..., ..., offset_x) - * offset_x += input_x[i] - * } - * - * This function assumes that the output tensor has: - * -# The same height of the input tensor - * -# The same number of channels of the input tensor - * -# The same batch size of the input tensor - * - * Unless specified otherwise, arguments are mandatory. - * - * @note This function, data layout independent, can be used to concatenate either int8 or uint8 tensors because it - * does not involve any arithmetic operation - * - * @param[in] input Pointer to input tensor. Input tensor must not overlap with the output tensor. - * @param[in] input_x Width of input tensor - * @param[in] input_y Height of input tensor - * @param[in] input_z Channels in input tensor - * @param[in] input_w Batch size in input tensor - * @param[out] output Pointer to output tensor. Expected to be at least - * (input_x * input_y * input_z * input_w) + offset_x - * bytes. - * @param[in] output_x Width of output tensor - * @param[in] offset_x The offset (in number of elements) on the X axis to start concatenating the input tensor - * It is user responsibility to provide the correct value - * - * Input constraints - * offset_x is less than output_x - * - */ -void arm_concatenation_s8_x(const int8_t *input, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_z, - const uint16_t input_w, - int8_t *output, - const uint16_t output_x, - const uint32_t offset_x); - -/** - * @brief int8/uint8 concatenation function to be used for concatenating N-tensors along the Y axis - * This function should be called for each input tensor to concatenate. The argument offset_y - * will be used to store the input tensor in the correct position in the output tensor - * - * i.e. offset_y = 0 - * for(i = 0 i < num_input_tensors; ++i) - * { - * arm_concatenation_s8_y(&input[i], ..., &output, ..., ..., offset_y) - * offset_y += input_y[i] - * } - * - * This function assumes that the output tensor has: - * -# The same width of the input tensor - * -# The same number of channels of the input tensor - * -# The same batch size of the input tensor - * - * Unless specified otherwise, arguments are mandatory. - * - * @note This function, data layout independent, can be used to concatenate either int8 or uint8 tensors because it - * does not involve any arithmetic operation - * - * @param[in] input Pointer to input tensor. Input tensor must not overlap with the output tensor. - * @param[in] input_x Width of input tensor - * @param[in] input_y Height of input tensor - * @param[in] input_z Channels in input tensor - * @param[in] input_w Batch size in input tensor - * @param[out] output Pointer to output tensor. Expected to be at least - * (input_z * input_w * input_x * input_y) + offset_y - * bytes. - * @param[in] output_y Height of output tensor - * @param[in] offset_y The offset on the Y axis to start concatenating the input tensor - * It is user responsibility to provide the correct value - * - * Input constraints - * offset_y is less than output_y - * - */ -void arm_concatenation_s8_y(const int8_t *input, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_z, - const uint16_t input_w, - int8_t *output, - const uint16_t output_y, - const uint32_t offset_y); - -/** - * @brief int8/uint8 concatenation function to be used for concatenating N-tensors along the Z axis - * This function should be called for each input tensor to concatenate. The argument offset_z - * will be used to store the input tensor in the correct position in the output tensor - * - * i.e. offset_z = 0 - * for(i = 0 i < num_input_tensors; ++i) - * { - * arm_concatenation_s8_z(&input[i], ..., &output, ..., ..., offset_z) - * offset_z += input_z[i] - * } - * - * This function assumes that the output tensor has: - * -# The same width of the input tensor - * -# The same height of the input tensor - * -# The same batch size of the input tensor - * - * Unless specified otherwise, arguments are mandatory. - * - * @note This function, data layout independent, can be used to concatenate either int8 or uint8 tensors because it - * does not involve any arithmetic operation - * - * @param[in] input Pointer to input tensor. Input tensor must not overlap with output tensor. - * @param[in] input_x Width of input tensor - * @param[in] input_y Height of input tensor - * @param[in] input_z Channels in input tensor - * @param[in] input_w Batch size in input tensor - * @param[out] output Pointer to output tensor. Expected to be at least - * (input_x * input_y * input_z * input_w) + offset_z - * bytes. - * @param[in] output_z Channels in output tensor - * @param[in] offset_z The offset on the Z axis to start concatenating the input tensor - * It is user responsibility to provide the correct value - * - * Input constraints - * offset_z is less than output_z - * - */ -void arm_concatenation_s8_z(const int8_t *input, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_z, - const uint16_t input_w, - int8_t *output, - const uint16_t output_z, - const uint32_t offset_z); - -/** - * @brief int8/uint8 concatenation function to be used for concatenating N-tensors along the W axis (Batch size) - * This function should be called for each input tensor to concatenate. The argument offset_w - * will be used to store the input tensor in the correct position in the output tensor - * - * i.e. offset_w = 0 - * for(i = 0 i < num_input_tensors; ++i) - * { - * arm_concatenation_s8_w(&input[i], ..., &output, ..., ..., offset_w) - * offset_w += input_w[i] - * } - * - * This function assumes that the output tensor has: - * -# The same width of the input tensor - * -# The same height of the input tensor - * -# The same number o channels of the input tensor - * - * Unless specified otherwise, arguments are mandatory. - * - * @note This function, data layout independent, can be used to concatenate either int8 or uint8 tensors because it - * does not involve any arithmetic operation - * - * @param[in] input Pointer to input tensor - * @param[in] input_x Width of input tensor - * @param[in] input_y Height of input tensor - * @param[in] input_z Channels in input tensor - * @param[in] input_w Batch size in input tensor - * @param[out] output Pointer to output tensor. Expected to be at least - * input_x * input_y * input_z * input_w - * bytes. - * @param[in] offset_w The offset on the W axis to start concatenating the input tensor - * It is user responsibility to provide the correct value - * - */ -void arm_concatenation_s8_w(const int8_t *input, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_z, - const uint16_t input_w, - int8_t *output, - const uint32_t offset_w); -/** - * @defgroup SVDF SVDF Layer Functions - * - */ - -/** - * @brief s8 SVDF function with 8 bit state tensor and 8 bit time weights - * - * @param[in] input_ctx Temporary scratch buffer - * @param[in] output_ctx Temporary output scratch buffer - * @param[in] svdf_params SVDF Parameters - * Range of svdf_params->input_offset : [-128, 127] - * Range of svdf_params->output_offset : [-128, 127] - * @param[in] input_quant_params Input quantization parameters - * @param[in] output_quant_params Output quantization parameters - * @param[in] input_dims Input tensor dimensions - * @param[in] input_data Pointer to input tensor - * @param[in] state_dims State tensor dimensions - * @param[in] state_data Pointer to state tensor - * @param[in] weights_feature_dims Weights (feature) tensor dimensions - * @param[in] weights_feature_data Pointer to the weights (feature) tensor - * @param[in] weights_time_dims Weights (time) tensor dimensions - * @param[in] weights_time_data Pointer to the weights (time) tensor - * @param[in] bias_dims Bias tensor dimensions - * @param[in] bias_data Pointer to bias tensor - * @param[in] output_dims Output tensor dimensions - * @param[out] output_data Pointer to the output tensor - * - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * 1. Supported framework: TensorFlow Lite micro - * 2. q7 is used as data type eventhough it is s8 data. It is done so to be consistent with existing APIs. - * - */ -arm_status arm_svdf_s8(const cmsis_nn_context *input_ctx, - const cmsis_nn_context *output_ctx, - const cmsis_nn_svdf_params *svdf_params, - const cmsis_nn_per_tensor_quant_params *input_quant_params, - const cmsis_nn_per_tensor_quant_params *output_quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *state_dims, - q7_t *state_data, - const cmsis_nn_dims *weights_feature_dims, - const q7_t *weights_feature_data, - const cmsis_nn_dims *weights_time_dims, - const q7_t *weights_time_data, - const cmsis_nn_dims *bias_dims, - const q31_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -/** - * @brief s8 SVDF function with 16 bit state tensor and 16 bit time weights - * - * @param[in] input_ctx Temporary scratch buffer - * @param[in] output_ctx Temporary output scratch buffer - * @param[in] svdf_params SVDF Parameters - * Range of svdf_params->input_offset : [-128, 127] - * Range of svdf_params->output_offset : [-128, 127] - * @param[in] input_quant_params Input quantization parameters - * @param[in] output_quant_params Output quantization parameters - * @param[in] input_dims Input tensor dimensions - * @param[in] input_data Pointer to input tensor - * @param[in] state_dims State tensor dimensions - * @param[in] state_data Pointer to state tensor - * @param[in] weights_feature_dims Weights (feature) tensor dimensions - * @param[in] weights_feature_data Pointer to the weights (feature) tensor - * @param[in] weights_time_dims Weights (time) tensor dimensions - * @param[in] weights_time_data Pointer to the weights (time) tensor - * @param[in] bias_dims Bias tensor dimensions - * @param[in] bias_data Pointer to bias tensor - * @param[in] output_dims Output tensor dimensions - * @param[out] output_data Pointer to the output tensor - * - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * 1. Supported framework: TensorFlow Lite micro - * 2. q7 is used as data type eventhough it is s8 data. It is done so to be consistent with existing APIs. - * - */ -arm_status arm_svdf_state_s16_s8(const cmsis_nn_context *input_ctx, - const cmsis_nn_context *output_ctx, - const cmsis_nn_svdf_params *svdf_params, - const cmsis_nn_per_tensor_quant_params *input_quant_params, - const cmsis_nn_per_tensor_quant_params *output_quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *state_dims, - q15_t *state_data, - const cmsis_nn_dims *weights_feature_dims, - const q7_t *weights_feature_data, - const cmsis_nn_dims *weights_time_dims, - const q15_t *weights_time_data, - const cmsis_nn_dims *bias_dims, - const q31_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/Drivers/CMSIS/NN/Include/arm_nnsupportfunctions.h b/Drivers/CMSIS/NN/Include/arm_nnsupportfunctions.h deleted file mode 100644 index 45fe2c8..0000000 --- a/Drivers/CMSIS/NN/Include/arm_nnsupportfunctions.h +++ /dev/null @@ -1,1186 +0,0 @@ -/* - * Copyright (C) 2010-2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nnsupportfunctions.h - * Description: Public header file of support functions for CMSIS NN Library - * - * $Date: 19. April 2022 - * $Revision: V.7.0.1 - * - * Target Processor: Cortex-M CPUs - * -------------------------------------------------------------------- */ - -#ifndef _ARM_NNSUPPORTFUNCTIONS_H_ -#define _ARM_NNSUPPORTFUNCTIONS_H_ - -#include "arm_nn_math_types.h" -#include "arm_nn_types.h" - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define LEFT_SHIFT(_shift) (_shift > 0 ? _shift : 0) -#define RIGHT_SHIFT(_shift) (_shift > 0 ? 0 : -_shift) -#define MASK_IF_ZERO(x) (x) == 0 ? ~0 : 0 -#define MASK_IF_NON_ZERO(x) (x) != 0 ? ~0 : 0 -#define SELECT_USING_MASK(mask, a, b) ((mask) & (a)) ^ (~(mask) & (b)) - -#define MAX(A, B) ((A) > (B) ? (A) : (B)) -#define MIN(A, B) ((A) < (B) ? (A) : (B)) -#define CLAMP(x, h, l) MAX(MIN((x), (h)), (l)) -#define REDUCE_MULTIPLIER(_mult) ((_mult < 0x7FFF0000) ? ((_mult + (1 << 15)) >> 16) : 0x7FFF) - -/** - * @brief definition to pack four 8 bit values. - */ -#define PACK_Q7x4_32x1(v0, v1, v2, v3) \ - ((((int32_t)(v0) << 0) & (int32_t)0x000000FF) | (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \ - (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | (((int32_t)(v3) << 24) & (int32_t)0xFF000000)) - -/** - * @brief Union for SIMD access of q31/q15/q7 types - */ -union arm_nnword -{ - q31_t word; - /**< q31 type */ - q15_t half_words[2]; - /**< q15 type */ - q7_t bytes[4]; - /**< q7 type */ -}; - -/** - * @brief Union for data type long long - */ -struct arm_nn_double -{ - uint32_t low; - int32_t high; -}; - -union arm_nn_long_long -{ - int64_t long_long; - struct arm_nn_double word; -}; - -/** - * @defgroup nndata_convert Neural Network Data Conversion Functions - * - * Perform data type conversion in-between neural network operations - * - */ - -/** - * @brief Converts the elements of the q7 vector to q15 vector without left-shift - * @param[in] *pSrc points to the q7 input vector - * @param[out] *pDst points to the q15 output vector - * @param[in] blockSize length of the input vector - * - */ -void arm_q7_to_q15_no_shift(const q7_t *pSrc, q15_t *pDst, uint32_t blockSize); - -/** - * @brief Non-saturating addition of elements of a q7 vector - * @param[in] *input Pointer to the q7 input vector - * @param[out] *output Pointer to the q31 output variable. - * @param[in] block_size length of the input vector - * \par Description: - * - * 2^24 samples can be added without saturating the result. - * - * The equation used for the conversion process is: - * - * 
- *  sum = input[0] + input[1] + .. + input[block_size -1]
- *
- * - * */ -void arm_nn_add_q7(const q7_t *input, q31_t *output, uint32_t block_size); - -/** - * @brief Converts the elements of the q7 vector to reordered q15 vector without left-shift - * @param[in] *pSrc points to the q7 input vector - * @param[out] *pDst points to the q15 output vector - * @param[in] blockSize length of the input vector - * @return none. - * - */ -void arm_q7_to_q15_reordered_no_shift(const q7_t *pSrc, q15_t *pDst, uint32_t blockSize); - -/** - * @brief Converts the elements from a q7 vector to a q15 vector with an added offset - * @param[in] src pointer to the q7 input vector - * @param[out] dst pointer to the q15 output vector - * @param[in] block_size length of the input vector - * @param[in] offset q7 offset to be added to each input vector element. - * - * \par Description: - * - * The equation used for the conversion process is: - * - * 
- *  dst[n] = (q15_t) src[n] + offset;   0 <= n < block_size.
- *
- * - */ -void arm_q7_to_q15_with_offset(const q7_t *src, q15_t *dst, uint32_t block_size, q15_t offset); - -/** - * @brief Converts the elements of the q7 vector to reordered q15 vector with an added offset - * @param[in] src pointer to the q7 input vector - * @param[out] dst pointer to the q15 output vector - * @param[in] block_size length of the input vector - * @param[in] offset offset to be added to each input vector element. - * @return none. - * - * @details This function does the q7 to q15 expansion with re-ordering of bytes. Re-ordering is a consequence of - * the sign extension intrinsic(DSP extension). The tail (i.e., last (N % 4) elements) retains its - * original order. - * - */ -void arm_q7_to_q15_reordered_with_offset(const q7_t *src, q15_t *dst, uint32_t block_size, q15_t offset); - -/** - * @brief Converts the elements from a q7 vector and accumulate to a q15 vector - * @param[in] *src points to the q7 input vector - * @param[out] *dst points to the q15 output vector - * @param[in] block_size length of the input vector - * - * \par Description: - * - * The equation used for the conversion process is: - * - * 
- *  dst[n] += (q15_t) src[n] ;   0 <= n < block_size.
- *
- * - */ -void arm_nn_accumulate_q7_to_q15(q15_t *dst, const q7_t *src, uint32_t block_size); - -/** - * @brief Depthwise conv on an im2col buffer where the input channel equals output channel. - * @param[in] row pointer to row - * @param[in] col pointer to im2col buffer, always consists of 2 columns. - * @param[in] num_ch number of channels - * @param[in] out_shift pointer to per output channel requantization shift parameter. - * @param[in] out_mult pointer to per output channel requantization multiplier parameter. - * @param[in] out_offset output tensor offset. - * @param[in] activation_min minimum value to clamp the output to. Range : int8 - * @param[in] activation_max maximum value to clamp the output to. Range : int8 - * @param[in] kernel_size number of elements in one column. - * @param[in] output_bias per output channel bias. Range : int32 - * @param[out] out pointer to output - * @return The function returns one of the two - * 1. The incremented output pointer for a successful operation or - * 2. NULL if implementation is not available. - * - * @details Supported framework: TensorFlow Lite micro. - */ -q7_t *arm_nn_depthwise_conv_s8_core(const q7_t *row, - const q15_t *col, - const uint16_t num_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int32_t out_offset, - const int32_t activation_min, - const int32_t activation_max, - const uint16_t kernel_size, - const int32_t *const output_bias, - q7_t *out); - -/** - * @brief General Matrix-multiplication function with per-channel requantization. - * @param[in] input_row pointer to row operand - * @param[in] input_col pointer to col operand - * @param[in] output_ch number of rows of input_row - * @param[in] col_batches number of column batches. Range: 1 to 4 - * @param[in] output_shift pointer to per output channel requantization shift parameter. - * @param[in] output_mult pointer to per output channel requantization multiplier parameter. - * @param[in] out_offset output tensor offset. - * @param[in] col_offset input tensor(col) offset. - * @param[in] row_offset kernel offset(row). Not used. - * @param[in] out_activation_min minimum value to clamp the output to. Range : int8 - * @param[in] out_activation_max maximum value to clamp the output to. Range : int8 - * @param[in] row_len number of elements in each row - * @param[in] bias per output channel bias. Range : int32 - * @param[in,out] out pointer to output - * @return The function returns one of the two - * 1. The incremented output pointer for a successful operation or - * 2. NULL if implementation is not available. - * - * @details Supported framework: TensorFlow Lite - */ -q7_t *arm_nn_mat_mult_s8(const q7_t *input_row, - const q7_t *input_col, - const uint16_t output_ch, - const uint16_t col_batches, - const int32_t *output_shift, - const int32_t *output_mult, - const int32_t out_offset, - const int32_t col_offset, - const int32_t row_offset, - const int16_t out_activation_min, - const int16_t out_activation_max, - const uint16_t row_len, - const int32_t *const bias, - q7_t *out); -/** - * @brief Matrix-multiplication function for convolution with per-channel requantization for 16 bits convolution. - * @param[in] input_a pointer to operand A - * @param[in] input_b pointer to operand B, always consists of 2 vectors. - * @param[in] output_ch number of rows of A - * @param[in] out_shift pointer to per output channel requantization shift parameter. - * @param[in] out_mult pointer to per output channel requantization multiplier parameter. - * @param[in] activation_min minimum value to clamp the output to. Range : int16 - * @param[in] activation_max maximum value to clamp the output to. Range : int16 - * @param[in] num_col_a number of columns of A - * @param[in] output_bias per output channel bias. Range : int64 - * @param[in,out] out_0 pointer to output - * @return The function returns one of the two - * 1. The incremented output pointer for a successful operation or - * 2. NULL if implementation is not available. - * - * @details This function does the matrix multiplication of weight matrix for all output channels - * with 2 columns from im2col and produces two elements/output_channel. The outputs are - * clamped in the range provided by activation min and max. - * Supported framework: TensorFlow Lite micro. - */ -q15_t *arm_nn_mat_mult_kernel_s16(const q7_t *input_a, - const q15_t *input_b, - const int32_t output_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int16_t activation_min, - const int16_t activation_max, - const int32_t num_col_a, - const int64_t *const output_bias, - q15_t *out_0); -/** - * @brief General Matrix-multiplication without requantization for one row & one column - * @param[in] row_elements number of row elements - * @param[in] row_base pointer to row operand - * @param[in] col_base pointer to col operand - * @param[out] sum_col pointer to store sum of column elements - * @param[out] output pointer to store result of multiply-accumulate - * @return The function returns the multiply-accumulated result of the row by column. - * - * @details Pseudo-code - * *output = 0 - * sum_col = 0 - * for (i = 0; i < row_elements; i++) - * *output += row_base[i] * col_base[i] - * sum_col += col_base[i] - * - */ -arm_status arm_nn_mat_mul_core_1x_s8(int32_t row_elements, - const int8_t *row_base, - const int8_t *col_base, - int32_t *const sum_col, - int32_t *const output); - -/** - * @brief Matrix-multiplication with requantization & activation function for four rows and one column - * @param[in] row_elements number of row elements - * @param[in] offset offset between rows. Can be the same as row_elements. - * For e.g, in a 1x1 conv scenario with stride as 1. - * @param[in] row_base pointer to row operand - * @param[in] col_base pointer to col operand - * @param[in] out_ch Number of output channels - * @param[in] conv_params Pointer to convolution parameters like offsets and activation values - * @param[in] quant_params Pointer to per-channel quantization parameters - * @param[in] bias Pointer to per-channel bias - * @param[out] output Pointer to output where int8 results are stored. - * - * @return The function returns the updated output pointer or NULL if implementation is not available. - * - * @details Compliant to TFLM int8 specification. MVE implementation only - */ -int8_t *arm_nn_mat_mul_core_4x_s8(const int32_t row_elements, - const int32_t offset, - const int8_t *row_base, - const int8_t *col_base, - const int32_t out_ch, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const int32_t *bias, - int8_t *output); - -/** - * @brief General Matrix-multiplication function with per-channel requantization. - * This function assumes: - * - LHS input matrix NOT transposed (nt) - * - RHS input matrix transposed (t) - * - * @note This operation also performs the broadcast bias addition before the requantization - * - * @param[in] lhs Pointer to the LHS input matrix - * @param[in] rhs Pointer to the RHS input matrix - * @param[in] bias Pointer to the bias vector. The length of this vector is equal to the number of - * output columns (or RHS input rows) - * @param[out] dst Pointer to the output matrix with "m" rows and "n" columns - * @param[in] dst_multipliers Pointer to the multipliers vector needed for the per-channel requantization. - * The length of this vector is equal to the number of output columns (or RHS input - * rows) - * @param[in] dst_shifts Pointer to the shifts vector needed for the per-channel requantization. The length - * of this vector is equal to the number of output columns (or RHS input rows) - * @param[in] lhs_rows Number of LHS input rows - * @param[in] rhs_rows Number of RHS input rows - * @param[in] rhs_cols Number of LHS/RHS input columns - * @param[in] lhs_offset Offset to be applied to the LHS input value - * @param[in] dst_offset Offset to be applied the output result - * @param[in] activation_min Minimum value to clamp down the output. Range : int8 - * @param[in] activation_max Maximum value to clamp up the output. Range : int8 - * - * @return The function returns ARM_MATH_SUCCESS - * - */ -arm_status arm_nn_mat_mult_nt_t_s8(const q7_t *lhs, - const q7_t *rhs, - const q31_t *bias, - q7_t *dst, - const int32_t *dst_multipliers, - const int32_t *dst_shifts, - const int32_t lhs_rows, - const int32_t rhs_rows, - const int32_t rhs_cols, - const int32_t lhs_offset, - const int32_t dst_offset, - const int32_t activation_min, - const int32_t activation_max); - -/** - * @brief s8 Vector by Matrix (transposed) multiplication - * - * @param[in] lhs Input left-hand side vector - * @param[in] rhs Input right-hand side matrix (transposed) - * @param[in] bias Input bias - * @param[out] dst Output vector - * @param[in] lhs_offset Offset to be added to the input values of the left-hand side vector. - * Range: -127 to 128 - * @param[in] rhs_offset Not used - * @param[in] dst_offset Offset to be added to the output values. Range: -127 to 128 - * @param[in] dst_multiplier Output multiplier - * @param[in] dst_shift Output shift - * @param[in] rhs_cols Number of columns in the right-hand side input matrix - * @param[in] rhs_rows Number of rows in the right-hand side input matrix - * @param[in] activation_min Minimum value to clamp the output to. Range: int8 - * @param[in] activation_max Maximum value to clamp the output to. Range: int8 - * @param[in] address_offset Memory position offset for dst. First output is stored at 'dst', the - * second at 'dst + address_offset' and so on. Default value is typically 1. - * - * @return The function returns ARM_MATH_SUCCESS - * - */ -arm_status arm_nn_vec_mat_mult_t_s8(const q7_t *lhs, - const q7_t *rhs, - const q31_t *bias, - q7_t *dst, - const int32_t lhs_offset, - const int32_t rhs_offset, - const int32_t dst_offset, - const int32_t dst_multiplier, - const int32_t dst_shift, - const int32_t rhs_cols, - const int32_t rhs_rows, - const int32_t activation_min, - const int32_t activation_max, - const int32_t address_offset); - -/** - * @brief s16 Vector by Matrix (transposed) multiplication - * - * @param[in] lhs Input left-hand side vector - * @param[in] rhs Input right-hand side matrix (transposed) - * @param[in] bias Input bias - * @param[out] dst Output vector - * @param[in] dst_multiplier Output multiplier - * @param[in] dst_shift Output shift - * @param[in] rhs_cols Number of columns in the right-hand side input matrix - * @param[in] rhs_rows Number of rows in the right-hand side input matrix - * @param[in] activation_min Minimum value to clamp the output to. Range: int16 - * @param[in] activation_max Maximum value to clamp the output to. Range: int16 - * - * @return The function returns ARM_MATH_SUCCESS - * - */ -arm_status arm_nn_vec_mat_mult_t_s16(const q15_t *lhs, - const q7_t *rhs, - const q63_t *bias, - q15_t *dst, - const int32_t dst_multiplier, - const int32_t dst_shift, - const int32_t rhs_cols, - const int32_t rhs_rows, - const int32_t activation_min, - const int32_t activation_max); - -/** - * @brief s8 Vector by Matrix (transposed) multiplication with s16 output - * - * @param[in] lhs Input left-hand side vector - * @param[in] rhs Input right-hand side matrix (transposed) - * @param[out] dst Output vector - * @param[in] lhs_offset Offset to be added to the input values of the left-hand side - * vector. Range: -127 to 128 - * @param[in] rhs_offset Not used - * @param[in] scatter_offset Address offset for dst. First output is stored at 'dst', the - * second at 'dst + scatter_offset' and so on. - * @param[in] dst_multiplier Output multiplier - * @param[in] dst_shift Output shift - * @param[in] rhs_cols Number of columns in the right-hand side input matrix - * @param[in] rhs_rows Number of rows in the right-hand side input matrix - * @param[in] activation_min Minimum value to clamp the output to. Range: int16 - * @param[in] activation_max Maximum value to clamp the output to. Range: int16 - * - * @return The function returns ARM_MATH_SUCCESS - * - */ -arm_status arm_nn_vec_mat_mult_t_svdf_s8(const q7_t *lhs, - const q7_t *rhs, - q15_t *dst, - const int32_t lhs_offset, - const int32_t rhs_offset, - const int32_t scatter_offset, - const int32_t dst_multiplier, - const int32_t dst_shift, - const int32_t rhs_cols, - const int32_t rhs_rows, - const int32_t activation_min, - const int32_t activation_max); - -/** - * @brief Depthwise convolution of transposed rhs matrix with 4 lhs matrices. To be used in padded cases where - * the padding is -lhs_offset(Range: int8). Dimensions are the same for lhs and rhs. - * - * @param[in] lhs Input left-hand side matrix - * @param[in] rhs Input right-hand side matrix (transposed) - * @param[in] lhs_offset LHS matrix offset(input offset). Range: -127 to 128 - * @param[in] num_ch Number of channels in LHS/RHS - * @param[in] out_shift Per channel output shift. Length of vector is equal to number of channels - * @param[in] out_mult Per channel output multiplier. Length of vector is equal to number of channels - * @param[in] out_offset Offset to be added to the output values. Range: -127 to 128 - * @param[in] activation_min Minimum value to clamp the output to. Range: int8 - * @param[in] activation_max Maximum value to clamp the output to. Range: int8 - * @param[in] row_x_col (row_dimension * col_dimension) of LHS/RHS matrix - * @param[in] output_bias Per channel output bias. Length of vector is equal to number of channels - * @param[in] out Output pointer - * - * @return The function returns one of the two - * - Updated output pointer if an implementation is available - * - NULL if no implementation is available. - * - * @note If number of channels is not a multiple of 4, upto 3 elements outside the boundary will be read - * out for the following. - * - Output shift - * - Output multiplier - * - Output bias - * - rhs - */ -q7_t *arm_nn_depthwise_conv_nt_t_padded_s8(const q7_t *lhs, - const q7_t *rhs, - const int32_t lhs_offset, - const uint16_t num_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int32_t out_offset, - const int32_t activation_min, - const int32_t activation_max, - const uint16_t row_x_col, - const int32_t *const output_bias, - q7_t *out); - -/** - * @brief Depthwise convolution of transposed rhs matrix with 4 lhs matrices. To be used in non-padded cases. - * Dimensions are the same for lhs and rhs. - * - * @param[in] lhs Input left-hand side matrix - * @param[in] rhs Input right-hand side matrix (transposed) - * @param[in] lhs_offset LHS matrix offset(input offset). Range: -127 to 128 - * @param[in] num_ch Number of channels in LHS/RHS - * @param[in] out_shift Per channel output shift. Length of vector is equal to number of channels. - * @param[in] out_mult Per channel output multiplier. Length of vector is equal to number of channels. - * @param[in] out_offset Offset to be added to the output values. Range: -127 to 128 - * @param[in] activation_min Minimum value to clamp the output to. Range: int8 - * @param[in] activation_max Maximum value to clamp the output to. Range: int8 - * @param[in] row_x_col (row_dimension * col_dimension) of LHS/RHS matrix - * @param[in] output_bias Per channel output bias. Length of vector is equal to number of channels. - * @param[in] out Output pointer - * - * @return The function returns one of the two - * - Updated output pointer if an implementation is available - * - NULL if no implementation is available. - * - * @note If number of channels is not a multiple of 4, upto 3 elements outside the boundary will be read - * out for the following. - * - Output shift - * - Output multiplier - * - Output bias - * - rhs - */ -q7_t *arm_nn_depthwise_conv_nt_t_s8(const q7_t *lhs, - const q7_t *rhs, - const int32_t lhs_offset, - const uint16_t num_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int32_t out_offset, - const int32_t activation_min, - const int32_t activation_max, - const uint16_t row_x_col, - const int32_t *const output_bias, - q7_t *out); - -/** - *@brief Matrix-multiplication function for convolution with reordered columns - *@param[in] pA pointer to operand A - *@param[in] pInBuffer pointer to operand B, always conssists of 2 vectors - *@param[in] ch_im_out numRow of A - *@param[in] numCol_A numCol of A - *@param[in] bias_shift amount of left-shift for bias - *@param[in] out_shift amount of right-shift for output - *@param[in] bias the bias - *@param[in,out] pOut pointer to output - *@return The function returns the incremented output pointer - * - *@details This function assumes that data in pInBuffer are reordered - */ -q7_t *arm_nn_mat_mult_kernel_q7_q15_reordered(const q7_t *pA, - const q15_t *pInBuffer, - const uint16_t ch_im_out, - const uint16_t numCol_A, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q7_t *pOut); - -/** - @brief Read 2 q15 elements and post increment pointer. - @param[in] in_q15 Pointer to pointer that holds address of input. - @return q31 value - */ -__STATIC_FORCEINLINE q31_t arm_nn_read_q15x2_ia(const q15_t **in_q15) -{ - q31_t val; - - memcpy(&val, *in_q15, 4); - *in_q15 += 2; - - return (val); -} - -/** - @brief Read 4 q7 from q7 pointer and post increment pointer. - @param[in] in_q7 Pointer to pointer that holds address of input. - @return q31 value - */ -__STATIC_FORCEINLINE q31_t arm_nn_read_q7x4_ia(const q7_t **in_q7) -{ - q31_t val; - memcpy(&val, *in_q7, 4); - *in_q7 += 4; - - return (val); -} - -/** - @brief Read 2 q15 from q15 pointer. - @param[in] in_q15 pointer to address of input. - @return q31 value - */ -__STATIC_FORCEINLINE q31_t arm_nn_read_q15x2(const q15_t *in_q15) -{ - q31_t val; - memcpy(&val, in_q15, 4); - - return (val); -} - -/** - @brief Read 4 q7 values. - @param[in] in_q7 pointer to address of input. - @return q31 value - */ -__STATIC_FORCEINLINE q31_t arm_nn_read_q7x4(const q7_t *in_q7) -{ - q31_t val; - memcpy(&val, in_q7, 4); - - return (val); -} - -/** - @brief Write four q7 to q7 pointer and increment pointer afterwards. - @param[in] in Double pointer to input value - @param[in] value Four bytes to copy - */ -__STATIC_FORCEINLINE void arm_nn_write_q7x4_ia(q7_t **in, q31_t value) -{ - memcpy(*in, &value, 4); - *in += 4; -} - -/** - * @brief memset optimized for MVE - * @param[in, out] dst Destination pointer - * @param[in] val Value to set - * @param[in] block_size Number of bytes to copy. - * - */ -__STATIC_FORCEINLINE void arm_memset_q7(q7_t *dst, const q7_t val, uint32_t block_size) -{ -#if defined(ARM_MATH_MVEI) - __asm volatile(" vdup.8 q0, %[set_val] \n" - " wlstp.8 lr, %[cnt], 1f \n" - "2: \n" - " vstrb.8 q0, [%[in]], #16 \n" - " letp lr, 2b \n" - "1: \n" - : [ in ] "+r"(dst) - : [ cnt ] "r"(block_size), [ set_val ] "r"(val) - : "q0", "memory", "r14"); -#else - memset(dst, val, block_size); -#endif -} - -#if defined(ARM_MATH_DSP) - -/** - * @brief read and expand one q7 word into two q15 words - */ - -__STATIC_FORCEINLINE const q7_t *read_and_pad(const q7_t *source, q31_t *out1, q31_t *out2) -{ - q31_t inA = arm_nn_read_q7x4_ia(&source); - q31_t inAbuf1 = __SXTB16_RORn((uint32_t)inA, 8); - q31_t inAbuf2 = __SXTB16(inA); - -#ifndef ARM_MATH_BIG_ENDIAN - *out2 = (int32_t)(__PKHTB(inAbuf1, inAbuf2, 16)); - *out1 = (int32_t)(__PKHBT(inAbuf2, inAbuf1, 16)); -#else - *out1 = (int32_t)(__PKHTB(inAbuf1, inAbuf2, 16)); - *out2 = (int32_t)(__PKHBT(inAbuf2, inAbuf1, 16)); -#endif - - return source; -} - -/** - * @brief read and expand one q7 word into two q15 words with reordering - */ - -__STATIC_FORCEINLINE const q7_t *read_and_pad_reordered(const q7_t *source, q31_t *out1, q31_t *out2) -{ - q31_t inA = arm_nn_read_q7x4_ia(&source); -#ifndef ARM_MATH_BIG_ENDIAN - *out2 = __SXTB16(__ROR((uint32_t)inA, 8)); - *out1 = __SXTB16(inA); -#else - *out1 = __SXTB16(__ROR((uint32_t)inA, 8)); - *out2 = __SXTB16(inA); -#endif - - return source; -} - -/** - * @brief read and expand one q7 word into two q15 words with reordering and add an offset - */ -__STATIC_FORCEINLINE const q7_t * -read_and_pad_reordered_with_offset(const q7_t *source, q31_t *out1, q31_t *out2, q31_t offset) -{ - q31_t inA = arm_nn_read_q7x4_ia(&source); - -#ifndef ARM_MATH_BIG_ENDIAN - *out2 = __SXTB16(__ROR((uint32_t)inA, 8)); - *out1 = __SXTB16(inA); -#else - *out1 = __SXTB16(__ROR((uint32_t)inA, 8)); - *out2 = __SXTB16(inA); -#endif - *out1 = __QADD16(*out1, offset); - *out2 = __QADD16(*out2, offset); - - return source; -} - -#endif - -/** - * @defgroup NNBasicMath Basic Math Functions for Neural Network Computation - * - * Basic Math Functions for Neural Network Computation - * - */ - -/** - * @brief q7 vector multiplication with variable output shifts - * @param[in] *pSrcA pointer to the first input vector - * @param[in] *pSrcB pointer to the second input vector - * @param[out] *pDst pointer to the output vector - * @param[in] out_shift amount of right-shift for output - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_nn_mult_q15(q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, const uint16_t out_shift, uint32_t blockSize); - -/** - * @brief q7 vector multiplication with variable output shifts - * @param[in] *pSrcA pointer to the first input vector - * @param[in] *pSrcB pointer to the second input vector - * @param[out] *pDst pointer to the output vector - * @param[in] out_shift amount of right-shift for output - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable q7 range [0x80 0x7F] will be saturated. - */ - -void arm_nn_mult_q7(q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, const uint16_t out_shift, uint32_t blockSize); - -/** - * @brief Matrix-multiplication function for convolution with per-channel requantization. - * @param[in] input_a pointer to operand A - * @param[in] input_b pointer to operand B, always consists of 2 vectors. - * @param[in] output_ch number of rows of A - * @param[in] out_shift pointer to per output channel requantization shift parameter. - * @param[in] out_mult pointer to per output channel requantization multiplier parameter. - * @param[in] out_offset output tensor offset. - * @param[in] activation_min minimum value to clamp the output to. Range : int8 - * @param[in] activation_max maximum value to clamp the output to. Range : int8 - * @param[in] num_col_a number of columns of A - * @param[in] output_bias per output channel bias. Range : int32 - * @param[in,out] out_0 pointer to output - * @return The function returns one of the two - * 1. The incremented output pointer for a successful operation or - * 2. NULL if implementation is not available. - * - * @details This function does the matrix multiplication of weight matrix for all output channels - * with 2 columns from im2col and produces two elements/output_channel. The outputs are - * clamped in the range provided by activation min and max. - * Supported framework: TensorFlow Lite micro. - */ -q7_t *arm_nn_mat_mult_kernel_s8_s16(const q7_t *input_a, - const q15_t *input_b, - const uint16_t output_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int32_t out_offset, - const int16_t activation_min, - const int16_t activation_max, - const uint16_t num_col_a, - const int32_t *const output_bias, - q7_t *out_0); - -/** - * @brief Common softmax function for s8 input and s8 or s16 output - * @param[in] input Pointer to the input tensor - * @param[in] num_rows Number of rows in the input tensor - * @param[in] row_size Number of elements in each input row - * @param[in] mult Input quantization multiplier - * @param[in] shift Input quantization shift within the range [0, 31] - * @param[in] diff_min Minimum difference with max in row. Used to check if - * the quantized exponential operation can be performed - * @param[in] int16_output Indicating s8 output if 0 else s16 output - * @param[out] output Pointer to the output tensor - * - * @note Supported framework: TensorFlow Lite micro (bit-accurate) - * - */ -void arm_nn_softmax_common_s8(const int8_t *input, - const int32_t num_rows, - const int32_t row_size, - const int32_t mult, - const int32_t shift, - const int32_t diff_min, - const bool int16_output, - void *output); - -/** - * @brief macro for adding rounding offset - */ -#ifndef ARM_NN_TRUNCATE -#define NN_ROUND(out_shift) ((0x1 << out_shift) >> 1) -#else -#define NN_ROUND(out_shift) 0 -#endif - -// Macros for shortening quantization functions' names and avoid long lines -#define MUL_SAT(a, b) arm_nn_doubling_high_mult((a), (b)) -#define MUL_SAT_MVE(a, b) arm_doubling_high_mult_mve_32x4((a), (b)) -#define MUL_POW2(a, b) arm_nn_mult_by_power_of_two((a), (b)) - -#define DIV_POW2(a, b) arm_nn_divide_by_power_of_two((a), (b)) -#define DIV_POW2_MVE(a, b) arm_divide_by_power_of_two_mve((a), (b)) - -#define EXP_ON_NEG(x) arm_nn_exp_on_negative_values((x)) -#define ONE_OVER1(x) arm_nn_one_over_one_plus_x_for_x_in_0_1((x)) - -/** - * @brief Saturating doubling high multiply. Result matches - * NEON instruction VQRDMULH. - * @param[in] m1 Multiplicand. Range: {NN_Q31_MIN, NN_Q31_MAX} - * @param[in] m2 Multiplier. Range: {NN_Q31_MIN, NN_Q31_MAX} - * @return Result of multiplication. - * - */ -__STATIC_FORCEINLINE q31_t arm_nn_doubling_high_mult(const q31_t m1, const q31_t m2) -{ - q31_t result = 0; - // Rounding offset to add for a right shift of 31 - q63_t mult = 1 << 30; - - if ((m1 < 0) ^ (m2 < 0)) - { - mult = 1 - mult; - } - // Gets resolved as a SMLAL instruction - mult = mult + (q63_t)m1 * m2; - - // Utilize all of the upper 32 bits. This is the doubling step - // as well. - result = (int32_t)(mult / (1ll << 31)); - - if ((m1 == m2) && (m1 == (int32_t)NN_Q31_MIN)) - { - result = NN_Q31_MAX; - } - return result; -} - -/** - * @brief Doubling high multiply without saturation. This is intended - * for requantization where the scale is a positive integer - * - * @param[in] m1 Multiplicand. Range: {NN_Q31_MIN, NN_Q31_MAX} - * @param[in] m2 Multiplier Range: {NN_Q31_MIN, NN_Q31_MAX} - * @return Result of multiplication. - * @note The result of this matches that of neon instruction - * VQRDMULH for m1 in range {NN_Q31_MIN, NN_Q31_MAX} and m2 in - * range {NN_Q31_MIN + 1, NN_Q31_MAX}. Saturation occurs when - * m1 equals m2 equals NN_Q31_MIN and that is not handled by - * this function. - * - */ -__STATIC_FORCEINLINE q31_t arm_nn_doubling_high_mult_no_sat(const q31_t m1, const q31_t m2) -{ - q31_t result = 0; - union arm_nn_long_long mult; - - // Rounding offset to add for a right shift of 31 - mult.word.low = 1 << 30; - mult.word.high = 0; - - // Gets resolved as a SMLAL instruction - mult.long_long = mult.long_long + (q63_t)m1 * m2; - - // Utilize all of the upper 32 bits. This is the doubling step - // as well. - result = (int32_t)(mult.long_long >> 31); - - return result; -} - -/** - * @brief Rounding divide by power of two. - * @param[in] dividend - Dividend - * @param[in] exponent - Divisor = power(2, exponent) - * Range: [0, 31] - * @return Rounded result of division. Midpoint is rounded away from zero. - * - */ -__STATIC_FORCEINLINE q31_t arm_nn_divide_by_power_of_two(const q31_t dividend, const q31_t exponent) -{ - q31_t result = 0; - const q31_t remainder_mask = (1 << exponent) - 1; - int32_t remainder = remainder_mask & dividend; - - // Basic division - result = dividend >> exponent; - - // Adjust 'result' for rounding (mid point away from zero) - q31_t threshold = remainder_mask >> 1; - if (result < 0) - { - threshold++; - } - if (remainder > threshold) - { - result++; - } - - return result; -} - -/** - * @brief Requantize a given value. - * @param[in] val Value to be requantized - * @param[in] multiplier multiplier. Range {NN_Q31_MIN + 1, Q32_MAX} - * @param[in] shift left or right shift for 'val * multiplier' - * - * @return Returns (val * multiplier)/(2 ^ shift) - * - */ -__STATIC_FORCEINLINE q31_t arm_nn_requantize(const q31_t val, const q31_t multiplier, const q31_t shift) -{ -#ifdef CMSIS_NN_USE_SINGLE_ROUNDING - const int64_t total_shift = 31 - shift; - const int64_t new_val = val * (int64_t)multiplier; - - int32_t result = new_val >> (total_shift - 1); - result = (result + 1) >> 1; - - return result; -#else - return arm_nn_divide_by_power_of_two(arm_nn_doubling_high_mult_no_sat(val * (1 << LEFT_SHIFT(shift)), multiplier), - RIGHT_SHIFT(shift)); -#endif -} - -/** - * @brief Requantize a given 64 bit value. - * @param[in] val Value to be requantized in the range {-(1<<47)} to {(1<<47) - 1} - * @param[in] reduced_multiplier Reduced multiplier in the range {NN_Q31_MIN + 1, Q32_MAX} to {Q16_MIN + 1, - * Q16_MAX} - * @param[in] shift Left or right shift for 'val * multiplier' in the range {-31} to {7} - * - * @return Returns (val * multiplier)/(2 ^ shift) - * - */ -__STATIC_FORCEINLINE q31_t arm_nn_requantize_s64(const q63_t val, const q31_t reduced_multiplier, const q31_t shift) -{ - const q63_t new_val = val * reduced_multiplier; - - q31_t result = new_val >> (14 - shift); // 64->32 bit reduction - result = (result + 1) >> 1; // Last shift position and insert round - - return result; -} - -/** - * @brief memcpy optimized for MVE - * @param[in, out] dst Destination pointer - * @param[in] src Source pointer. - * @param[in] block_size Number of bytes to copy. - * - */ -__STATIC_FORCEINLINE void arm_memcpy_q7(q7_t *__RESTRICT dst, const q7_t *__RESTRICT src, uint32_t block_size) -{ -#if defined(ARM_MATH_MVEI) - __asm volatile(" wlstp.8 lr, %[cnt], 1f \n" - "2: \n" - " vldrb.8 q0, [%[in]], #16 \n" - " vstrb.8 q0, [%[out]], #16 \n" - " letp lr, 2b \n" - "1: \n" - : [ in ] "+r"(src), [ out ] "+r"(dst) - : [ cnt ] "r"(block_size) - : "q0", "memory", "r14"); -#else - memcpy(dst, src, block_size); -#endif -} - -#if defined(ARM_MATH_MVEI) -/** - * @brief Vector saturating doubling high multiply returning high half. - * @param[in] m1 Multiplicand - * @param[in] m2 Multiplier - * @return Result of multiplication. - * - */ -__STATIC_FORCEINLINE int32x4_t arm_doubling_high_mult_mve(const int32x4_t m1, const q31_t m2) -{ - return vqrdmulhq_n_s32(m1, m2); -} - -/** - * @brief Vector rounding divide by power of two. - * @param[in] dividend - Dividend vector - * @param[in] exponent - Divisor = power(2, exponent) - * Range: [0, 31] - * @return Rounded result of division. Midpoint is rounded away from zero. - * - */ -__STATIC_FORCEINLINE int32x4_t arm_divide_by_power_of_two_mve(const int32x4_t dividend, const q31_t exponent) -{ - const int32x4_t shift = vdupq_n_s32(-exponent); - const int32x4_t fixup = vshrq_n_s32(vandq_s32(dividend, shift), 31); - const int32x4_t fixed_up_dividend = vqaddq_s32(dividend, fixup); - return vrshlq_s32(fixed_up_dividend, shift); -} - -/** - * @brief Requantize a given vector. - * @param[in] val Vector to be requantized - * @param[in] multiplier multiplier - * @param[in] shift shift - * - * @return Returns (val * multiplier)/(2 ^ shift) - * - */ -__STATIC_FORCEINLINE int32x4_t arm_requantize_mve(const int32x4_t val, const q31_t multiplier, const q31_t shift) -{ -#ifdef CMSIS_NN_USE_SINGLE_ROUNDING - const int right_shift = MIN(-1, shift); - const int left_shift = shift - right_shift; - - const int32x4_t left_shift_dup = vdupq_n_s32(left_shift); - const int32x4_t right_shift_dup = vdupq_n_s32(right_shift); - - int32x4_t result = vqdmulhq_n_s32(vshlq_s32(val, left_shift_dup), multiplier); - result = vrshlq_s32(result, right_shift_dup); - - return result; -#else - return arm_divide_by_power_of_two_mve( - arm_doubling_high_mult_mve(vshlq_s32(val, vdupq_n_s32(LEFT_SHIFT(shift))), multiplier), RIGHT_SHIFT(shift)); -#endif -} - -__STATIC_FORCEINLINE int32x4_t arm_doubling_high_mult_mve_32x4(const int32x4_t m1, const int32x4_t m2) -{ - return vqrdmulhq_s32(m1, m2); -} - -__STATIC_FORCEINLINE int32x4_t arm_divide_by_power_of_two_mve_32x4(const int32x4_t dividend, const int32x4_t exponent) -{ - const int32x4_t shift = -exponent; - const int32x4_t fixup = vshrq_n_s32(vandq_s32(dividend, shift), 31); - const int32x4_t fixed_up_dividend = vqaddq_s32(dividend, fixup); - return vrshlq_s32(fixed_up_dividend, shift); -} - -__STATIC_FORCEINLINE int32x4_t arm_requantize_mve_32x4(const int32x4_t val, - const int32x4_t multiplier, - const int32x4_t shift) -{ -#ifdef CMSIS_NN_USE_SINGLE_ROUNDING - const int32x4_t right_shift = vminq_s32(vdupq_n_s32(-1), shift); - const int32x4_t left_shift = vqsubq_s32(shift, right_shift); - - int32x4_t result = vqdmulhq_s32(vshlq_s32(val, left_shift), multiplier); - result = vrshlq_s32(result, right_shift); - - return result; -#else - const int32x4_t zz = vdupq_n_s32(0); - const mve_pred16_t p = vcmpgtq_n_s32(shift, 0); - - const int32x4_t left_shift = vpselq_s32(shift, zz, p); - const int32x4_t right_shift = -vpselq_s32(zz, shift, p); - - return arm_divide_by_power_of_two_mve_32x4(arm_doubling_high_mult_mve_32x4(vshlq_s32(val, left_shift), multiplier), - right_shift); -#endif -} -#endif - -// @note The following functions are used only for softmax layer, scaled bits = 5 assumed - -__STATIC_FORCEINLINE int32_t arm_nn_exp_on_negative_values(int32_t val) -{ - int32_t mask = 0; - int32_t shift = 24; - - const int32_t val_mod_minus_quarter = (val & ((1 << shift) - 1)) - (1 << shift); - const int32_t remainder = val_mod_minus_quarter - val; - const int32_t x = (val_mod_minus_quarter << 5) + (1 << 28); - const int32_t x2 = MUL_SAT(x, x); - - int32_t result = 1895147668 + - MUL_SAT(1895147668, x + DIV_POW2(MUL_SAT(DIV_POW2(MUL_SAT(x2, x2), 2) + MUL_SAT(x2, x), 715827883) + x2, 1)); - -#define SELECT_IF_NON_ZERO(x) \ - { \ - mask = MASK_IF_NON_ZERO(remainder & (1 << shift++)); \ - result = SELECT_USING_MASK(mask, MUL_SAT(result, x), result); \ - } - - SELECT_IF_NON_ZERO(1672461947) - SELECT_IF_NON_ZERO(1302514674) - SELECT_IF_NON_ZERO(790015084) - SELECT_IF_NON_ZERO(290630308) - SELECT_IF_NON_ZERO(39332535) - SELECT_IF_NON_ZERO(720401) - SELECT_IF_NON_ZERO(242) - -#undef SELECT_IF_NON_ZERO - - mask = MASK_IF_ZERO(val); - return SELECT_USING_MASK(mask, NN_Q31_MAX, result); -} - -__STATIC_FORCEINLINE q31_t arm_nn_mult_by_power_of_two(const int32_t val, const int32_t exp) -{ - const int32_t thresh = ((1 << (31 - exp)) - 1); - int32_t result = val << exp; - result = SELECT_USING_MASK(MASK_IF_NON_ZERO(val > thresh), NN_Q31_MAX, result); - result = SELECT_USING_MASK(MASK_IF_NON_ZERO(val < -thresh), NN_Q31_MIN, result); - return result; -} - -__STATIC_FORCEINLINE int32_t arm_nn_one_over_one_plus_x_for_x_in_0_1(int32_t val) -{ - const int64_t sum = (int64_t)val + (int64_t)NN_Q31_MAX; - const int32_t half_denominator = (int32_t)((sum + (sum >= 0 ? 1 : -1)) / 2L); - int32_t x = 1515870810 + MUL_SAT(half_denominator, -1010580540); - - const int32_t shift = (1 << 29); - x += MUL_POW2(MUL_SAT(x, shift - MUL_SAT(half_denominator, x)), 2); - x += MUL_POW2(MUL_SAT(x, shift - MUL_SAT(half_denominator, x)), 2); - x += MUL_POW2(MUL_SAT(x, shift - MUL_SAT(half_denominator, x)), 2); - - return MUL_POW2(x, 1); -} - -/** - @brief Write 2 q15 elements and post increment pointer. - @param[in] dest_q15 Pointer to pointer that holds address of destination. - @param[in] src_q31 Input value to be written. - */ -__STATIC_FORCEINLINE void arm_nn_write_q15x2_ia(q15_t **dest_q15, q31_t src_q31) -{ - q31_t val = src_q31; - - memcpy(*dest_q15, &val, 4); - *dest_q15 += 2; -} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/Drivers/CMSIS/NN/Source/ActivationFunctions/CMakeLists.txt b/Drivers/CMSIS/NN/Source/ActivationFunctions/CMakeLists.txt deleted file mode 100644 index 30e7ab4..0000000 --- a/Drivers/CMSIS/NN/Source/ActivationFunctions/CMakeLists.txt +++ /dev/null @@ -1,30 +0,0 @@ -# -# Copyright (c) 2019-2021 Arm Limited. All rights reserved. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -project(CMSISNNActivation) - -file(GLOB SRC "./*_s8.c") -add_library(CMSISNNActivation STATIC ${SRC}) - -### Includes -target_include_directories(CMSISNNActivation PUBLIC "${NN}/Include") -target_include_directories(CMSISNNActivation PUBLIC "${ROOT}/CMSIS/Core/Include") -target_include_directories(CMSISNNActivation PUBLIC "${ROOT}/CMSIS/DSP/Include") - - - diff --git a/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c b/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c deleted file mode 100644 index 4c351d3..0000000 --- a/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_activations_q15.c - * Description: Q15 neural network activation function using direct table look-up - * - * $Date: 09. October 2020 - * $Revision: V.1.0.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nn_tables.h" -#include "arm_nnfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Acti - * @{ - */ - -/** - * @brief neural network activation function using direct table look-up - * - * @note Refer header file for details. - * - */ - -void arm_nn_activations_direct_q15(q15_t *data, uint16_t size, uint16_t int_width, arm_nn_activation_type type) -{ - uint16_t i = size; - q15_t *pIn = data; - q15_t *pOut = data; - uint16_t shift_size = 8 + 3 - int_width; - uint32_t bit_mask = 0x7FF >> int_width; - uint32_t full_frac = bit_mask + 1; - const q15_t *lookup_table; - - switch (type) - { - case ARM_SIGMOID: - lookup_table = sigmoidTable_q15; - break; - case ARM_TANH: - default: - lookup_table = tanhTable_q15; - break; - } - - while (i) - { - q15_t out; - q15_t in = *pIn++; - q15_t frac = (uint32_t)in & bit_mask; - q15_t value = lookup_table[(uint8_t)(in >> shift_size)]; - if ((in >> shift_size) != 0x7f) - { - q15_t value2 = lookup_table[(uint8_t)(1 + ((uint8_t)(in >> shift_size)))]; - /* doing the interpolation here for better accuracy */ - out = ((q31_t)(full_frac - frac) * value + (q31_t)value2 * frac) >> shift_size; - } - else - { - /* the largest positive value does not have a right side for linear interpolation */ - out = value; - } - - *pOut++ = out; - i--; - } -} - -/** - * @} end of Acti group - */ diff --git a/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c b/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c deleted file mode 100644 index da25d36..0000000 --- a/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c +++ /dev/null @@ -1,89 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_activations_q7.c - * Description: Q7 neural network activation function using direct table look-up - * - * $Date: 09. October 2020 - * $Revision: V.1.0.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nn_tables.h" -#include "arm_nnfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Acti - * @{ - */ - -/** - * @brief Q7 neural network activation function using direct table look-up - * @param[in,out] data pointer to input - * @param[in] size number of elements - * @param[in] int_width bit-width of the integer part, assume to be smaller than 3 - * @param[in] type type of activation functions - * - * @details - * - * This is the direct table look-up approach. - * - * Assume here the integer part of the fixed-point is <= 3. - * More than 3 just not making much sense, makes no difference with - * saturation followed by any of these activation functions. - */ - -void arm_nn_activations_direct_q7(q7_t *data, uint16_t size, uint16_t int_width, arm_nn_activation_type type) -{ - uint16_t i = size; - q7_t *pIn = data; - q7_t *pOut = data; - q7_t in; - q7_t out; - uint16_t shift_size = 3 - int_width; - const q7_t *lookup_table; - switch (type) - { - case ARM_SIGMOID: - lookup_table = sigmoidTable_q7; - break; - case ARM_TANH: - default: - lookup_table = tanhTable_q7; - break; - } - while (i) - { - in = *pIn++; - out = lookup_table[(uint8_t)(in >> shift_size)]; - *pOut++ = out; - i--; - } -} - -/** - * @} end of Acti group - */ diff --git a/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c b/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c deleted file mode 100644 index e2d9529..0000000 --- a/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright (C) 2010-2019 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_relu6_s8.c - * Description: Basic s8 version of ReLU6 - * - * $Date: 09. October 2020 - * $Revision: V.1.0.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Acti - * @{ - */ - -/* - * Basic ReLU6 function - * - * Refer to header file for details. - * - */ - -void arm_relu6_s8(q7_t *data, uint16_t size) -{ - int32_t i; - - for (i = 0; i < size; i++) - { - int32_t ip = data[i]; - - ip = MAX(ip, 0); - data[i] = MIN(ip, 6); - } -} - -/** - * @} end of Acti group - */ diff --git a/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c b/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c deleted file mode 100644 index b761666..0000000 --- a/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_relu_q15.c - * Description: Q15 version of ReLU - * - * $Date: 09. October 2020 - * $Revision: V.1.0.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Acti - * @{ - */ - -/** - * @brief Q15 RELU function - * @param[in,out] data pointer to input - * @param[in] size number of elements - * - * @details - * - * Optimized relu with QSUB instructions. - * - */ - -void arm_relu_q15(q15_t *data, uint16_t size) -{ - -#if defined(ARM_MATH_DSP) - /* Run the following code for M cores with DSP extension */ - - uint16_t i = size >> 1; - q15_t *input = data; - q15_t *output = data; - q31_t in; - q31_t buf; - q31_t mask; - - while (i) - { - in = read_q15x2_ia(&input); - - /* extract the first bit */ - buf = __ROR(in & 0x80008000, 15); - - /* if MSB=1, mask will be 0xFF, 0x0 otherwise */ - mask = __QSUB16(0x00000000, buf); - - arm_nn_write_q15x2_ia(&output, in & (~mask)); - i--; - } - - if (size & 0x1) - { - if (*input < 0) - { - *input = 0; - } - input++; - } -#else - /* Run the following code as reference implementation for M cores without DSP extension */ - uint16_t i; - - for (i = 0; i < size; i++) - { - if (data[i] < 0) - data[i] = 0; - } - -#endif /* ARM_MATH_DSP */ -} - -/** - * @} end of Acti group - */ diff --git a/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c b/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c deleted file mode 100644 index d58e2f3..0000000 --- a/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_relu_q7.c - * Description: Q7 version of ReLU - * - * $Date: 20. July 2021 - * $Revision: V.1.1.3 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Acti - * @{ - */ - -/** - * @brief Q7 RELU function - * @param[in,out] data pointer to input - * @param[in] size number of elements - * - * @details - * - * Optimized relu with QSUB instructions. - * - */ - -void arm_relu_q7(q7_t *data, uint16_t size) -{ - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for M cores with DSP extension */ - - uint16_t i = size >> 2; - q7_t *input = data; - q7_t *output = data; - q31_t in; - q31_t buf; - q31_t mask; - - while (i) - { - in = arm_nn_read_q7x4_ia((const q7_t **)&input); - - /* extract the first bit */ - buf = (int32_t)__ROR((uint32_t)in & 0x80808080, 7); - - /* if MSB=1, mask will be 0xFF, 0x0 otherwise */ - mask = __QSUB8(0x00000000, buf); - - arm_nn_write_q7x4_ia(&output, in & (~mask)); - - i--; - } - - i = size & 0x3; - while (i) - { - if (*input < 0) - { - *input = 0; - } - input++; - i--; - } - -#else - /* Run the following code as reference implementation for cores without DSP extension */ - - uint16_t i; - - for (i = 0; i < size; i++) - { - if (data[i] < 0) - data[i] = 0; - } - -#endif -} - -/** - * @} end of Acti group - */ diff --git a/Drivers/CMSIS/NN/Source/BasicMathFunctions/CMakeLists.txt b/Drivers/CMSIS/NN/Source/BasicMathFunctions/CMakeLists.txt deleted file mode 100644 index 37f71ac..0000000 --- a/Drivers/CMSIS/NN/Source/BasicMathFunctions/CMakeLists.txt +++ /dev/null @@ -1,31 +0,0 @@ -# -# Copyright (c) 2019-2021 Arm Limited. All rights reserved. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -project(CMSISNNBasicMaths) - -file(GLOB SRC "./*_*.c") - -add_library(CMSISNNBasicMaths STATIC ${SRC}) - -### Includes -target_include_directories(CMSISNNBasicMaths PUBLIC "${NN}/Include") -target_include_directories(CMSISNNBasicMaths PUBLIC "${ROOT}/CMSIS/Core/Include") -target_include_directories(CMSISNNBasicMaths PUBLIC "${ROOT}/CMSIS/DSP/Include") - - - diff --git a/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s16.c b/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s16.c deleted file mode 100644 index 057d208..0000000 --- a/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s16.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (C) 2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_elementwise_add_s16 - * Description: Elementwise add - * - * $Date: 14 Februari 2022 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup BasicMath - * @{ - */ - -/* - * s16 elementwise add - * - * Refer header file for details. - * - */ - -/* Note: __SHIFT is expected to be <=0 */ - -arm_status arm_elementwise_add_s16(const int16_t *input_1_vect, - const int16_t *input_2_vect, - const int32_t input_1_offset, - const int32_t input_1_mult, - const int32_t input_1_shift, - const int32_t input_2_offset, - const int32_t input_2_mult, - const int32_t input_2_shift, - const int32_t left_shift, - int16_t *output, - const int32_t out_offset, - const int32_t out_mult, - const int32_t out_shift, - const int32_t out_activation_min, - const int32_t out_activation_max, - const int32_t block_size) -{ - (void)input_1_offset; - (void)input_2_offset; - (void)out_offset; - int32_t loop_count; - int32_t input_1; - int32_t input_2; - int32_t sum; - - loop_count = block_size; - - while (loop_count > 0) - { - /* C = A + B */ - input_1 = *input_1_vect++ << left_shift; - input_2 = *input_2_vect++ << left_shift; - - input_1 = arm_nn_requantize(input_1, input_1_mult, input_1_shift); - input_2 = arm_nn_requantize(input_2, input_2_mult, input_2_shift); - - sum = input_1 + input_2; - sum = arm_nn_requantize(sum, out_mult, out_shift); - - sum = MAX(sum, out_activation_min); - sum = MIN(sum, out_activation_max); - - *output++ = (int16_t)sum; - - /* Decrement loop counter */ - loop_count--; - } - - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of BasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c b/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c deleted file mode 100644 index 9ccf639..0000000 --- a/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c +++ /dev/null @@ -1,255 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_elementwise_add_s8 - * Description: Element wise add - * - * $Date: 01. March 2021 - * $Revision: V.2.5.3 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" -#if defined(ARM_MATH_MVEI) -#include "arm_helium_utils.h" -#endif - -#if defined(ARM_MATH_MVEI) -#define SAT_INPUT_VECT(__INPUT_V, __MULT, __SHIFT) \ - __INPUT_V = arm_doubling_high_mult_mve(__INPUT_V, __MULT); \ - __INPUT_V = arm_divide_by_power_of_two_mve(__INPUT_V, -__SHIFT); -#endif - -/** - * @note The *_no_sat API does not mean that the input not saturated, Since - * __MULT is a positive integer, it is saturated. The API definition - * has more info about it. - */ -#define SAT_INPUT(__INPUT, __MULT, __SHIFT) \ - __INPUT = arm_nn_doubling_high_mult_no_sat(__INPUT, __MULT); \ - __INPUT = arm_nn_divide_by_power_of_two(__INPUT, -__SHIFT); - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup BasicMath - * @{ - */ - -/* - * s8 element wise add - * - * Refer header file for details. - * - */ - -/* Note: __SHIFT is expected to be <=0 */ - -arm_status arm_elementwise_add_s8(const int8_t *input_1_vect, - const int8_t *input_2_vect, - const int32_t input_1_offset, - const int32_t input_1_mult, - const int32_t input_1_shift, - const int32_t input_2_offset, - const int32_t input_2_mult, - const int32_t input_2_shift, - const int32_t left_shift, - int8_t *output, - const int32_t out_offset, - const int32_t out_mult, - const int32_t out_shift, - const int32_t out_activation_min, - const int32_t out_activation_max, - const uint32_t block_size) -{ -#if defined(ARM_MATH_MVEI) - int32_t count = (int32_t)block_size; - - while (count > 0) - { - int32x4_t vect_1; - int32x4_t vect_2; - - mve_pred16_t p = vctp32q((uint32_t)count); - - vect_1 = vldrbq_z_s32(input_1_vect, p); - vect_2 = vldrbq_z_s32(input_2_vect, p); - - vect_1 = vaddq_s32(vect_1, vdupq_n_s32(input_1_offset)); - vect_2 = vaddq_s32(vect_2, vdupq_n_s32(input_2_offset)); - - vect_1 = vshlq_r_s32(vect_1, left_shift); - vect_2 = vshlq_r_s32(vect_2, left_shift); - - SAT_INPUT_VECT(vect_1, input_1_mult, input_1_shift); - SAT_INPUT_VECT(vect_2, input_2_mult, input_2_shift); - - vect_1 = vaddq_s32(vect_1, vect_2); - SAT_INPUT_VECT(vect_1, out_mult, out_shift); - - vect_1 = vaddq_n_s32(vect_1, out_offset); - - vect_1 = vmaxq_s32(vect_1, vdupq_n_s32(out_activation_min)); - vect_1 = vminq_s32(vect_1, vdupq_n_s32(out_activation_max)); - - input_1_vect += 4; - input_2_vect += 4; - vstrbq_p_s32(output, vect_1, p); - - output += 4; - count -= 4; - } -#else - uint32_t loop_count; - int32_t input_1; - int32_t input_2; - int32_t sum; - -#if defined(ARM_MATH_DSP) - int32_t a_1, b_1, a_2, b_2; - - int32_t offset_1_packed, offset_2_packed; - - int8_t r1, r2, r3, r4; - - offset_1_packed = (input_1_offset << 16U) | (input_1_offset & 0x0FFFFL); - offset_2_packed = (input_2_offset << 16U) | (input_2_offset & 0x0FFFFL); - - loop_count = block_size >> 2; - - while (loop_count > 0U) - { - /* 4 outputs are calculated in one loop. The order of calculation is follows the order of output sign extension - intrinsic */ - input_1_vect = read_and_pad_reordered(input_1_vect, &b_1, &a_1); - input_2_vect = read_and_pad_reordered(input_2_vect, &b_2, &a_2); - - a_1 = __SADD16(a_1, offset_1_packed); - b_1 = __SADD16(b_1, offset_1_packed); - - a_2 = __SADD16(a_2, offset_2_packed); - b_2 = __SADD16(b_2, offset_2_packed); - - /* Sum 1 */ - input_1 = (b_1 & 0x0FFFF) << left_shift; - - SAT_INPUT(input_1, input_1_mult, input_1_shift); - - input_2 = (b_2 & 0x0FFFF) << left_shift; - SAT_INPUT(input_2, input_2_mult, input_2_shift); - - sum = input_1 + input_2; - SAT_INPUT(sum, out_mult, out_shift); - sum += out_offset; - sum = MAX(sum, out_activation_min); - sum = MIN(sum, out_activation_max); - r1 = (q7_t)sum; - - /* Sum 3 */ - input_1 = ((b_1 >> 16) & 0x0FFFF) << left_shift; - SAT_INPUT(input_1, input_1_mult, input_1_shift); - - input_2 = ((b_2 >> 16) & 0x0FFFF) << left_shift; - SAT_INPUT(input_2, input_2_mult, input_2_shift); - - sum = input_1 + input_2; - SAT_INPUT(sum, out_mult, out_shift); - sum += out_offset; - sum = MAX(sum, out_activation_min); - sum = MIN(sum, out_activation_max); - r3 = (q7_t)sum; - - /* Sum 2 */ - input_1 = (a_1 & 0x0FFFF) << left_shift; - SAT_INPUT(input_1, input_1_mult, input_1_shift); - - input_2 = (a_2 & 0x0FFFF) << left_shift; - SAT_INPUT(input_2, input_2_mult, input_2_shift); - - sum = input_1 + input_2; - SAT_INPUT(sum, out_mult, out_shift); - sum += out_offset; - sum = MAX(sum, out_activation_min); - sum = MIN(sum, out_activation_max); - r2 = (q7_t)sum; - - /* Sum 4 */ - input_1 = ((a_1 >> 16) & 0x0FFFF) << left_shift; - SAT_INPUT(input_1, input_1_mult, input_1_shift); - - input_2 = ((a_2 >> 16) & 0x0FFFF) << left_shift; - SAT_INPUT(input_2, input_2_mult, input_2_shift); - - sum = input_1 + input_2; - SAT_INPUT(sum, out_mult, out_shift); - sum += out_offset; - sum = MAX(sum, out_activation_min); - sum = MIN(sum, out_activation_max); - r4 = (q7_t)sum; - - write_q7x4_ia(&output, __PACKq7(r1, r2, r3, r4)); - - loop_count--; - } - - loop_count = block_size & 0x3; -#else - loop_count = block_size; -#endif - - while (loop_count > 0U) - { - /* C = A + B */ - - input_1 = (*input_1_vect++ + input_1_offset) << left_shift; - input_2 = (*input_2_vect++ + input_2_offset) << left_shift; - - input_1 = arm_nn_doubling_high_mult(input_1, input_1_mult); - input_1 = arm_nn_divide_by_power_of_two(input_1, -input_1_shift); - - input_2 = arm_nn_doubling_high_mult(input_2, input_2_mult); - input_2 = arm_nn_divide_by_power_of_two(input_2, -input_2_shift); - - sum = input_1 + input_2; - SAT_INPUT(sum, out_mult, out_shift); - sum += out_offset; - - sum = MAX(sum, out_activation_min); - sum = MIN(sum, out_activation_max); - - *output++ = (q7_t)sum; - - /* Decrement loop counter */ - loop_count--; - } - -#endif /* ARM_MATH_MVEI */ - - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of BasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s16.c b/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s16.c deleted file mode 100644 index f4b4f3e..0000000 --- a/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s16.c +++ /dev/null @@ -1,95 +0,0 @@ -/* - * Copyright (C) 2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_elementwise_mul_s16 - * Description: Element wise multiplication - * - * $Date: 14 Februari 2022 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup BasicMath - * @{ - */ - -/** - * @brief s16 element wise multiplication of two vectors - * - * @note Refer header file for details. - * - */ -arm_status arm_elementwise_mul_s16(const int16_t *input_1_vect, - const int16_t *input_2_vect, - const int32_t input_1_offset, - const int32_t input_2_offset, - int16_t *output, - const int32_t out_offset, - const int32_t out_mult, - const int32_t out_shift, - const int32_t out_activation_min, - const int32_t out_activation_max, - const int32_t block_size) -{ - (void)input_1_offset; - (void)input_2_offset; - (void)out_offset; - int32_t loop_count; - int32_t input_1; - int32_t input_2; - int32_t mul_res; - - loop_count = block_size; - - while (loop_count > 0) - { - /* C = A * B */ - - input_1 = *input_1_vect++; - input_2 = *input_2_vect++; - - mul_res = input_1 * input_2; - mul_res = arm_nn_requantize(mul_res, out_mult, out_shift); - - mul_res = MAX(mul_res, out_activation_min); - mul_res = MIN(mul_res, out_activation_max); - - *output++ = (int16_t)mul_res; - - /* Decrement loop counter */ - loop_count--; - } - - return ARM_MATH_SUCCESS; -} - -/** - * @} end of BasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c b/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c deleted file mode 100644 index 0a8f7c1..0000000 --- a/Drivers/CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_elementwise_mul_s8 - * Description: Element wise multiplication - * - * $Date: January 26, 2021 - * $Revision: V.1.0.5 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup BasicMath - * @{ - */ - -/** - * @brief s8 element wise multiplication of two vectors - * - * @note Refer header file for details. - * - */ - -arm_status arm_elementwise_mul_s8(const int8_t *input_1_vect, - const int8_t *input_2_vect, - const int32_t input_1_offset, - const int32_t input_2_offset, - int8_t *output, - const int32_t out_offset, - const int32_t out_mult, - const int32_t out_shift, - const int32_t out_activation_min, - const int32_t out_activation_max, - const uint32_t block_size) -{ - - int32_t loop_count; -#if defined(ARM_MATH_MVEI) - - loop_count = (block_size + 3) / 4; - uint32_t num_elements = block_size; - - for (int i = 0; i < loop_count; i++) - { - mve_pred16_t p = vctp32q(num_elements); - - int32x4_t input_1 = vldrbq_z_s32(input_1_vect, p); - input_1 = vaddq_n_s32(input_1, input_1_offset); - - int32x4_t input_2 = vldrbq_z_s32(input_2_vect, p); - input_2 = vaddq_n_s32(input_2, input_2_offset); - - int32x4_t res_0 = vmulq_s32(input_1, input_2); - - res_0 = arm_requantize_mve_32x4(res_0, vdupq_n_s32(out_mult), vdupq_n_s32(out_shift)); - - res_0 += vdupq_n_s32(out_offset); - - res_0 = vmaxq_s32(res_0, vdupq_n_s32(out_activation_min)); - res_0 = vminq_s32(res_0, vdupq_n_s32(out_activation_max)); - - vstrbq_p_s32(output, res_0, p); - input_1_vect += 4; - input_2_vect += 4; - output += 4; - num_elements -= 4; - } - -#else - int32_t input_1; - int32_t input_2; - int32_t mul_res; - -#if defined(ARM_MATH_DSP) - int32_t a_1, b_1, a_2, b_2; - - int32_t offset_1_packed, offset_2_packed; - - int8_t r1, r2, r3, r4; - - offset_1_packed = (input_1_offset << 16U) | (input_1_offset & 0x0FFFFL); - offset_2_packed = (input_2_offset << 16U) | (input_2_offset & 0x0FFFFL); - - loop_count = block_size >> 2; - - while (loop_count > 0) - { - /* 4 outputs are calculated in one loop. The order of calculation is follows the order of output sign extension - intrinsic */ - input_1_vect = read_and_pad_reordered(input_1_vect, &b_1, &a_1); - input_2_vect = read_and_pad_reordered(input_2_vect, &b_2, &a_2); - - a_1 = __SADD16(a_1, offset_1_packed); - b_1 = __SADD16(b_1, offset_1_packed); - - a_2 = __SADD16(a_2, offset_2_packed); - b_2 = __SADD16(b_2, offset_2_packed); - - /* Mul 1 */ - input_1 = (int16_t)(b_1 & 0x0FFFFL); - input_2 = (int16_t)(b_2 & 0x0FFFFL); - - mul_res = input_1 * input_2; - mul_res = arm_nn_requantize(mul_res, out_mult, out_shift) + out_offset; - - mul_res = MAX(mul_res, out_activation_min); - mul_res = MIN(mul_res, out_activation_max); - r1 = (q7_t)mul_res; - - /* Mul 3 */ - input_1 = (int16_t)((b_1 >> 16U) & 0x0FFFFL); - input_2 = (int16_t)((b_2 >> 16U) & 0x0FFFFL); - - mul_res = input_1 * input_2; - mul_res = arm_nn_requantize(mul_res, out_mult, out_shift) + out_offset; - mul_res = MAX(mul_res, out_activation_min); - mul_res = MIN(mul_res, out_activation_max); - r3 = (q7_t)mul_res; - - /* Mul 2 */ - input_1 = (int16_t)(a_1 & 0x0FFFFL); - input_2 = (int16_t)(a_2 & 0x0FFFFL); - - mul_res = input_1 * input_2; - mul_res = arm_nn_requantize(mul_res, out_mult, out_shift) + out_offset; - mul_res = MAX(mul_res, out_activation_min); - mul_res = MIN(mul_res, out_activation_max); - r2 = (q7_t)mul_res; - - /* Mul 4 */ - input_1 = (int16_t)((a_1 >> 16U) & 0x0FFFFL); - input_2 = (int16_t)((a_2 >> 16U) & 0x0FFFFL); - - mul_res = input_1 * input_2; - mul_res = arm_nn_requantize(mul_res, out_mult, out_shift) + out_offset; - mul_res = MAX(mul_res, out_activation_min); - mul_res = MIN(mul_res, out_activation_max); - r4 = (q7_t)mul_res; - - write_q7x4_ia(&output, __PACKq7(r1, r2, r3, r4)); - - loop_count--; - } - - loop_count = block_size & 0x3; -#else - loop_count = block_size; -#endif - - while (loop_count > 0) - { - /* C = A * B */ - - input_1 = *input_1_vect++ + input_1_offset; - input_2 = *input_2_vect++ + input_2_offset; - - mul_res = input_1 * input_2; - mul_res = arm_nn_requantize(mul_res, out_mult, out_shift) + out_offset; - - mul_res = MAX(mul_res, out_activation_min); - mul_res = MIN(mul_res, out_activation_max); - - *output++ = (q7_t)mul_res; - - /* Decrement loop counter */ - loop_count--; - } -#endif - return ARM_MATH_SUCCESS; -} - -/** - * @} end of BasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/CMakeLists.txt b/Drivers/CMSIS/NN/Source/CMakeLists.txt deleted file mode 100644 index 62af9ec..0000000 --- a/Drivers/CMSIS/NN/Source/CMakeLists.txt +++ /dev/null @@ -1,98 +0,0 @@ -# -# Copyright (c) 2019-2021 Arm Limited. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -SET(ROOT ${CMSIS_PATH}) - -# Select which parts of the CMSIS-DSP must be compiled. -# There are some dependencies between the parts but they are not tracked -# by this cmake. So, enabling some functions may require to enable some -# other ones. -option(CONCATENATION "Concatenation" ON) -option(FULLYCONNECTED "Fully Connected" ON) -option(CONVOLUTION "Convolutions" ON) -option(ACTIVATION "Activations" ON) -option(POOLING "Pooling" ON) -option(SOFTMAX "Softmax" ON) -option(BASICMATHSNN "Basic Maths for NN" ON) -option(RESHAPE "Reshape" ON) -option(SVDF "SVDF" ON) - -# When OFF it is the default behavior : all tables are included. -option(NNSUPPORT "NN Support" ON) - - -########################### -# -# CMSIS NN -# -########################### - -# NN Sources -SET(NN ${ROOT}/CMSIS/NN) - -list(APPEND CMAKE_MODULE_PATH ${NN}/Source) - -add_library(cmsis-nn STATIC) - -target_compile_options(cmsis-nn PRIVATE -Ofast) - -### Includes -target_include_directories(cmsis-nn PUBLIC "${NN}/Include") -target_include_directories(cmsis-nn PUBLIC "${ROOT}/CMSIS/Core/Include") -target_include_directories(cmsis-nn PUBLIC "${ROOT}/CMSIS/DSP/Include") - -if (BASICMATHSNN) - add_subdirectory(BasicMathFunctions) -endif() - -if (CONCATENATION) - add_subdirectory(ConcatenationFunctions) -endif() - -if (FULLYCONNECTED) - add_subdirectory(FullyConnectedFunctions) -endif() - -if (CONVOLUTION) - add_subdirectory(ConvolutionFunctions) -endif() - -if (ACTIVATION) - add_subdirectory(ActivationFunctions) -endif() - -if (POOLING) - add_subdirectory(PoolingFunctions) -endif() - -if (SOFTMAX) - add_subdirectory(SoftmaxFunctions) -endif() - -if (SVDF) - add_subdirectory(SVDFunctions) -endif() - -if (RESHAPE) - add_subdirectory(ReshapeFunctions) -endif() - -# Keep NNSUPPORT at the end -if (NNSUPPORT) - add_subdirectory(NNSupportFunctions) -endif() diff --git a/Drivers/CMSIS/NN/Source/ConcatenationFunctions/CMakeLists.txt b/Drivers/CMSIS/NN/Source/ConcatenationFunctions/CMakeLists.txt deleted file mode 100644 index 6485077..0000000 --- a/Drivers/CMSIS/NN/Source/ConcatenationFunctions/CMakeLists.txt +++ /dev/null @@ -1,20 +0,0 @@ -# -# Copyright (c) 2019-2021 Arm Limited. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -file(GLOB SRC "./*_*.c") -target_sources(cmsis-nn PRIVATE ${SRC}) diff --git a/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c b/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c deleted file mode 100644 index d704cfc..0000000 --- a/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_concatenation_s8_w.c - * Description: s8 version of concatenation along the W axis - * - * $Date: October 2019 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Concatenation - * @{ - */ - -/* - * s8 version of concatenation along the W axis - * - * Refer to header file for details. - * - */ -void arm_concatenation_s8_w(const int8_t *input, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_z, - const uint16_t input_w, - int8_t *output, - const uint32_t offset_w) -{ - const uint32_t input_copy_size = input_x * input_y * input_z * input_w; - - output += offset_w * (input_x * input_y * input_z); - - arm_memcpy_q7(output, input, input_copy_size); -} - -/** - * @} end of Concatenation group - */ diff --git a/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c b/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c deleted file mode 100644 index f786b24..0000000 --- a/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_concatenation_s8_x.c - * Description: s8 version of concatenation along the X axis - * - * $Date: October 2019 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Concatenation - * @{ - */ - -/* - * s8 version of concatenation along the X axis - * - * Refer to header file for details. - * - */ -void arm_concatenation_s8_x(const int8_t *input, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_z, - const uint16_t input_w, - int8_t *output, - const uint16_t output_x, - const uint32_t offset_x) -{ - const uint32_t num_iterations = input_y * input_z * input_w; - - output += offset_x; - - uint32_t i; - - // Copy per row - for (i = 0; i < num_iterations; ++i) - { - arm_memcpy_q7(output, input, input_x); - input += input_x; - output += output_x; - } -} - -/** - * @} end of Concatenation group - */ diff --git a/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c b/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c deleted file mode 100644 index 7822e37..0000000 --- a/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_concatenation_s8_y.c - * Description: s8 version of concatenation along the Y axis - * - * $Date: October 2019 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Concatenation - * @{ - */ - -/* - * s8 version of concatenation along the Y axis - * - * Refer to header file for details. - * - */ -void arm_concatenation_s8_y(const int8_t *input, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_z, - const uint16_t input_w, - int8_t *output, - const uint16_t output_y, - const uint32_t offset_y) -{ - const uint32_t num_iterations = input_z * input_w; - const uint32_t input_copy_size = input_x * input_y; - const uint32_t output_stride = input_x * output_y; - - output += offset_y * input_x; - uint32_t i; - - // Copy per tile - for (i = 0; i < num_iterations; ++i) - { - arm_memcpy_q7(output, input, input_copy_size); - input += input_copy_size; - output += output_stride; - } -} - -/** - * @} end of Concatenation group - */ diff --git a/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c b/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c deleted file mode 100644 index 20cc19e..0000000 --- a/Drivers/CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_concatenation_s8_z.c - * Description: s8 version of concatenation along the Z axis - * - * $Date: October 2019 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Concatenation - * @{ - */ - -/* - * s8 version of concatenation along the Z axis - * - * Refer to header file for details. - * - */ -void arm_concatenation_s8_z(const int8_t *input, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_z, - const uint16_t input_w, - int8_t *output, - const uint16_t output_z, - const uint32_t offset_z) -{ - const uint32_t input_copy_size = input_x * input_y * input_z; - const uint32_t output_stride = input_x * input_y * output_z; - - output += offset_z * (input_x * input_y); - - uint32_t i; - - for (i = 0; i < input_w; ++i) - { - arm_memcpy_q7(output, input, input_copy_size); - input += input_copy_size; - output += output_stride; - } -} - -/** - * @} end of Concatenation group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/CMakeLists.txt b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/CMakeLists.txt deleted file mode 100644 index 4c0712a..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/CMakeLists.txt +++ /dev/null @@ -1,24 +0,0 @@ -# -# Copyright (c) 2019-2022 Arm Limited. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -file(GLOB SRC "./*_s8*.c") -file(GLOB SRC_S16 "./*_s16*.c") -target_sources(cmsis-nn PRIVATE ${SRC} ${SRC_S16}) - - - diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c deleted file mode 100644 index bd0506a..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_1_x_n_s8.c - * Description: s8 version of 1xN convolution using symmetric quantization. - * - * $Date: December 14, 2021 - * $Revision: V.2.1.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * 1xN s8 convolution function. - * - * Refer header file for details. - * - */ - -arm_status arm_convolve_1_x_n_s8(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data) -{ - (void)bias_dims; - arm_status status = ARM_MATH_SUCCESS; - if (output_dims->w % 4 != 0) - { - status = ARM_MATH_SIZE_MISMATCH; - goto out; - } - -#if defined(ARM_MATH_MVEI) - (void)ctx; - - const uint16_t input_x = input_dims->w; - const uint16_t kernel_x = filter_dims->w; - const uint16_t output_x = output_dims->w; - const uint16_t output_ch = output_dims->c; - const uint16_t input_ch = input_dims->c; - const uint16_t pad_x = conv_params->padding.w; - const uint16_t stride_x = conv_params->stride.w; - - const int32_t input_offset = conv_params->input_offset; - const int32_t out_offset = conv_params->output_offset; - const int32_t out_activation_min = conv_params->activation.min; - const int32_t out_activation_max = conv_params->activation.max; - int32_t *output_mult = quant_params->multiplier; - int32_t *output_shift = quant_params->shift; - - for (int i_out_x = 0; i_out_x <= (output_x - 4); i_out_x += 4) - { - int32_t input_begin_idx[4]; - int32_t ker_begin_idx[4]; - int32_t ker_end_idx[4]; - - for (int i = 0; i < 4; i++) - { - const int32_t est_input_x_idx = stride_x * (i_out_x + i) - pad_x; - input_begin_idx[i] = MAX(0, est_input_x_idx); - ker_begin_idx[i] = MAX(0, -est_input_x_idx); - ker_end_idx[i] = MIN(kernel_x, input_x - est_input_x_idx); - } - - if ((ker_begin_idx[0] != 0) || (ker_end_idx[3] != kernel_x)) - { - for (int i_out_ch = 0; i_out_ch < output_ch; i_out_ch++) - { - int32x4_t s_offset; - int32_t acc[4]; - { - int32_t sum_row[4]; - - (void)arm_nn_mat_mul_core_1x_s8((ker_end_idx[0] - ker_begin_idx[0]) * input_ch, - input_data + input_begin_idx[0] * input_ch, - filter_data + (input_ch * kernel_x * i_out_ch) + - (ker_begin_idx[0] * input_ch), - &sum_row[0], - &acc[0]); - (void)arm_nn_mat_mul_core_1x_s8((ker_end_idx[1] - ker_begin_idx[1]) * input_ch, - input_data + input_begin_idx[1] * input_ch, - filter_data + (input_ch * kernel_x * i_out_ch) + - (ker_begin_idx[1] * input_ch), - &sum_row[1], - &acc[1]); - - (void)arm_nn_mat_mul_core_1x_s8((ker_end_idx[2] - ker_begin_idx[2]) * input_ch, - input_data + input_begin_idx[2] * input_ch, - filter_data + (input_ch * kernel_x * i_out_ch) + - (ker_begin_idx[2] * input_ch), - &sum_row[2], - &acc[2]); - - (void)arm_nn_mat_mul_core_1x_s8((ker_end_idx[3] - ker_begin_idx[3]) * input_ch, - input_data + input_begin_idx[3] * input_ch, - filter_data + (input_ch * kernel_x * i_out_ch) + - (ker_begin_idx[3] * input_ch), - &sum_row[3], - &acc[3]); - - s_offset = vldrwq_s32(sum_row); - } - int32x4_t res = vldrwq_s32(acc); - s_offset = vmulq_n_s32(s_offset, input_offset); - res = vaddq_s32(res, s_offset); - if (bias_data) - { - res = vaddq_n_s32(res, bias_data[i_out_ch]); - } - res = arm_requantize_mve(res, output_mult[i_out_ch], output_shift[i_out_ch]); - res = vaddq_n_s32(res, out_offset); - - res = vmaxq_s32(res, vdupq_n_s32(out_activation_min)); - res = vminq_s32(res, vdupq_n_s32(out_activation_max)); - - const uint32x4_t scatter_offset = {0, output_ch, output_ch * 2, output_ch * 3}; - vstrbq_scatter_offset_s32(output_data, scatter_offset, res); - output_data++; - } - output_data += (3 * output_ch); - } - else - { - output_data = arm_nn_mat_mul_core_4x_s8(kernel_x * input_ch, - stride_x * input_ch, - input_data + input_begin_idx[0] * input_ch, - filter_data, - output_ch, - conv_params, - quant_params, - bias_data, - output_data); - } - } - -#else - status = arm_convolve_s8(ctx, - conv_params, - quant_params, - input_dims, - input_data, - filter_dims, - filter_data, - bias_dims, - bias_data, - output_dims, - output_data); -#endif - -out: - /* Return to application */ - return status; -} - -int32_t arm_convolve_1_x_n_s8_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims) -{ -#if !defined(ARM_MATH_MVEI) - return (2 * input_dims->c * filter_dims->w * filter_dims->h) * sizeof(int16_t); -#else - (void)input_dims; - (void)filter_dims; - return 0; -#endif -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c deleted file mode 100644 index 051527f..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c +++ /dev/null @@ -1,235 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_1x1_HWC_q7_fast_nonsquare.c - * Description: Fast Q7 version of 1x1 convolution (non-square shape) - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Fast Q7 version of 1x1 convolution (non-sqaure shape) - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in_x input tensor dimention x - * @param[in] dim_im_in_y input tensor dimention y - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel_x filter kernel size x - * @param[in] dim_kernel_y filter kernel size y - * @param[in] padding_x padding size x - * @param[in] padding_y padding size y - * @param[in] stride_x convolution stride x - * @param[in] stride_y convolution stride y - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out_x output tensor dimension x - * @param[in] dim_im_out_y output tensor dimension y - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * This function is optimized for convolution with 1x1 kernel size (i.e., dim_kernel_x=1 - * and dim_kernel_y=1). It can be used for the second half of MobileNets [1] after depthwise - * separable convolution. - * - * This function is the version with full list of optimization tricks, but with - * some constraints: - * ch_im_in is multiple of 4 - * ch_im_out is multiple of 2 - * - * [1] MobileNets: Efficient Convolutional Neural Networks for Mobile Vision Applications - * https://arxiv.org/abs/1704.04861 - */ - -arm_status arm_convolve_1x1_HWC_q7_fast_nonsquare(const q7_t *Im_in, - const uint16_t dim_im_in_x, - const uint16_t dim_im_in_y, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel_x, - const uint16_t dim_kernel_y, - const uint16_t padding_x, - const uint16_t padding_y, - const uint16_t stride_x, - const uint16_t stride_y, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out_x, - const uint16_t dim_im_out_y, - q15_t *bufferA, - q7_t *bufferB) -{ - (void)bufferB; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - (void)dim_im_in_y; - int16_t i_out_y, i_out_x; - int16_t i_ch_out; - - /* ----------------------- - * Here we use bufferA as q15_t internally as computation are done with q15_t level - * im2col are done to output in q15_t format from q7_t input - */ - - q15_t *pBuffer = bufferA; - q7_t *pOut = Im_out; - - if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0 || dim_kernel_x != 1 || dim_kernel_y != 1 || padding_x != 0 || - padding_y != 0 || stride_x != 1 || stride_y != 1) - { - /* check if the input dimension meets the constraints */ - return ARM_MATH_SIZE_MISMATCH; - } - - for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++) - { - /* This part implements the im2col function */ - arm_q7_to_q15_reordered_no_shift( - (q7_t *)Im_in + (i_out_y * dim_im_in_x + i_out_x) * ch_im_in, pBuffer, ch_im_in); - pBuffer += ch_im_in; - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - } - - /* check if there is left-over for compute */ - if (pBuffer != bufferA) - { - const q7_t *pA = wt; - for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++) - { - q31_t sum = ((q31_t)(bias[i_ch_out]) << bias_shift) + NN_ROUND(out_shift); - const q15_t *pB = bufferA; - /* basically each time it process 4 entries */ - uint16_t colCnt = ch_im_in * dim_kernel_x * dim_kernel_y >> 2; - - while (colCnt) - { - - q31_t inA1, inA2; - q31_t inB1, inB2; - - pA = read_and_pad_reordered(pA, &inA1, &inA2); - - inB1 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inA1, inB1, sum); - inB2 = arm_nn_read_q15x2_ia(&pB); - - sum = __SMLAD(inA2, inB2, sum); - - colCnt--; - } - colCnt = ch_im_in * dim_kernel_y * dim_kernel_x & 0x3; - while (colCnt) - { - q7_t inA1 = *pA++; - q15_t inB1 = *pB++; - sum += inA1 * inB1; - colCnt--; - } - *pOut = (q7_t)__SSAT((sum >> out_shift), 8); - pOut++; - } - } - -#else - (void)bufferA; - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - int i, j, k, l, m, n; - int conv_out; - int in_row, in_col; - - if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0 || dim_kernel_x != 1 || dim_kernel_y != 1 || padding_x != 0 || - padding_y != 0 || stride_x != 1 || stride_y != 1) - { - /* check if the input dimension meets the constraints */ - return ARM_MATH_SIZE_MISMATCH; - } - - for (i = 0; i < ch_im_out; i++) - { - for (j = 0; j < dim_im_out_y; j++) - { - for (k = 0; k < dim_im_out_x; k++) - { - conv_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift); - for (m = 0; m < dim_kernel_y; m++) - { - for (n = 0; n < dim_kernel_x; n++) - { - // if-for implementation - in_row = stride_y * j + m - padding_y; - in_col = stride_x * k + n - padding_x; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x) - { - for (l = 0; l < ch_im_in; l++) - { - conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] * - wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_y + n) * ch_im_in + - l]; - } - } - } - } - Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t)__SSAT((conv_out >> out_shift), 8); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c deleted file mode 100644 index f75b0b2..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_1x1_s8_fast.c - * Description: Fast q7 version of 1x1 convolution (non-square shape) - * - * $Date: 12. November 2021 - * $Revision: V.2.0.4 - * - * Target Processor: Cortex-M Processors - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" -#include - -#define DIM_KER_X (1U) -#define DIM_KER_Y (1U) - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * Fast s8 version for 1x1 convolution (non-square shape) - * - * Refer header file for details. - * - */ - -arm_status arm_convolve_1x1_s8_fast(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data) -{ - if (input_dims->c % 4 != 0 || conv_params->padding.w != 0 || conv_params->padding.h != 0 || - conv_params->stride.w != 1 || conv_params->stride.h != 1) - { - return ARM_MATH_SIZE_MISMATCH; - } - - (void)ctx; - (void)filter_dims; - (void)bias_dims; - -#if defined(ARM_MATH_MVEI) - - const int32_t col_len = input_dims->w * input_dims->h * input_dims->n; - const int32_t output_ch = output_dims->c; - const int32_t input_ch = input_dims->c; - const int32_t input_offset = conv_params->input_offset; - const int32_t out_offset = conv_params->output_offset; - const int32_t out_activation_min = conv_params->activation.min; - const int32_t out_activation_max = conv_params->activation.max; - int32_t *output_mult = quant_params->multiplier; - int32_t *output_shift = quant_params->shift; - - for (int i_items = 0; i_items <= (col_len - 4); i_items += 4) - { - - output_data = arm_nn_mat_mul_core_4x_s8(input_ch, - input_ch, - input_data + i_items * input_ch, - filter_data, - output_ch, - conv_params, - quant_params, - bias_data, - output_data); - } - - /* Handle left over elements */ - for (int i_items = (col_len & ~0x3); i_items < col_len; i_items++) - { - for (int i_out_ch = 0; i_out_ch < output_ch; i_out_ch++) - { - int32_t sum_row = 0; - int32_t acc; - (void)arm_nn_mat_mul_core_1x_s8( - input_ch, input_data + i_items * input_ch, filter_data + i_out_ch * input_ch, &sum_row, &acc); - if (bias_data) - { - acc += bias_data[i_out_ch]; - } - sum_row = (sum_row * input_offset); - acc += sum_row; - acc = arm_nn_requantize(acc, output_mult[i_out_ch], output_shift[i_out_ch]); - acc += out_offset; - - acc = MAX(acc, out_activation_min); - acc = MIN(acc, out_activation_max); - *output_data++ = acc; - } - } - -#else - /* Run the following code as reference implementation for Cortex-M processors with or without DSP extension */ - - const int32_t lhs_rows = input_dims->w * input_dims->h * input_dims->n; - const int32_t rhs_rows = output_dims->c; - const int32_t rhs_cols = input_dims->c; - - arm_nn_mat_mult_nt_t_s8(input_data, - filter_data, - bias_data, - output_data, - quant_params->multiplier, - quant_params->shift, - lhs_rows, - rhs_rows, - rhs_cols, - conv_params->input_offset, - conv_params->output_offset, - conv_params->activation.min, - conv_params->activation.max); - -#endif - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -int32_t arm_convolve_1x1_s8_fast_get_buffer_size(const cmsis_nn_dims *input_dims) -{ - (void)input_dims; - return 0; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c deleted file mode 100644 index 7598c7b..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c +++ /dev/null @@ -1,209 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_HWC_q15_basic.c - * Description: Q15 version of convolution - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Basic Q15 convolution function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimention - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * - * Buffer size: - * - * bufferA size: ch_im_in*dim_kernel*dim_kernel - * - * bufferB size: 0 - * - * This basic version is designed to work for any input tensor and weight - * dimension. - */ - -arm_status arm_convolve_HWC_q15_basic(const q15_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q15_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q15_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q15_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB) -{ - (void)bufferB; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - int16_t i_out_y, i_out_x, i_ker_y, i_ker_x; - - uint16_t im2col_out_pixel_index = 0; - q15_t *pBuffer = bufferA; - q15_t *pOut = Im_out; - q15_t *im_buffer = bufferA; - const q15_t *pA; - int i; - - /* This part implements the im2col function */ - for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++) - { - for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++) - { - for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in) - { - /* Filling 0 for out-of-bound paddings */ - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - /* arm_copy_q15((q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, - * ch_im_in); */ - memcpy(pBuffer, - (q15_t *)Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, - sizeof(q15_t) * ch_im_in); - } - pBuffer += ch_im_in; - } - } - - pA = wt; - for (i = 0; i < ch_im_out; i++) - { - q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - const q15_t *pB = im_buffer; - uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 2; - while (colCnt) - { - q31_t inA1 = arm_nn_read_q15x2_ia(&pA); - q31_t inB1 = arm_nn_read_q15x2_ia(&pB); - q31_t inA2 = arm_nn_read_q15x2_ia(&pA); - q31_t inB2 = arm_nn_read_q15x2_ia(&pB); - - sum = __SMLAD(inA1, inB1, sum); - sum = __SMLAD(inA2, inB2, sum); - - colCnt--; - } - colCnt = ch_im_in * dim_kernel * dim_kernel & 0x3; - while (colCnt) - { - q15_t inA1 = *pA++; - q15_t inB1 = *pB++; - sum += inA1 * inB1; - colCnt--; - } - *pOut = (q15_t)__SSAT((sum >> out_shift), 16); - pOut++; - } - - /* counter reset */ - pBuffer = im_buffer; - im2col_out_pixel_index++; - } - } - -#else - (void)bufferA; - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - int i, j, k, l, m, n; - int conv_out; - int in_row, in_col; - - for (i = 0; i < ch_im_out; i++) - { - for (j = 0; j < dim_im_out; j++) - { - for (k = 0; k < dim_im_out; k++) - { - conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - for (m = 0; m < dim_kernel; m++) - { - for (n = 0; n < dim_kernel; n++) - { - in_row = stride * j + m - padding; - in_col = stride * k + n - padding; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in) - { - for (l = 0; l < ch_im_in; l++) - { - conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] * - wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l]; - } - } - } - } - Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q15_t)__SSAT((conv_out >> out_shift), 16); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c deleted file mode 100644 index d952a49..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c +++ /dev/null @@ -1,259 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_HWC_q15_fast.c - * Description: Fast Q15 version of convolution - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Fast Q15 convolution function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimention - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * - * Buffer size: - * - * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel - * - * bufferB size: 0 - * - * Input dimension constraints: - * - * ch_im_in is multiple of 2 - * - * ch_im_out is multiple of 2 - * - * dim_im_out is a multiple of 2 - * - */ - -arm_status arm_convolve_HWC_q15_fast(const q15_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q15_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q15_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q15_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB) -{ - (void)bufferB; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - int16_t i_out_y, i_out_x, i_ker_y, i_ker_x; - - q15_t *pBuffer = bufferA; - q15_t *im_buffer = bufferA; - q15_t *pOut = Im_out; - - if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0 || dim_im_out & 0x1) - { - /* check if the input dimension meets the constraints */ - return ARM_MATH_SIZE_MISMATCH; - } - - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - /* This part implements the im2col function */ - for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++) - { - for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++) - { - for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in) - { - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - /* arm_copy_q15((q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, - * ch_im_in); */ - memcpy(pBuffer, - (q15_t *)Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, - sizeof(q15_t) * ch_im_in); - } - pBuffer += ch_im_in; - } - } - - if (i_out_x & 0x1) - { - int i; - /* initialize the matrix pointers for A */ - const q15_t *pA = wt; - - /* set up the second output pointers */ - q15_t *pOut2 = pOut + ch_im_out; - - /* this loop over rows in A */ - for (i = 0; i < ch_im_out; i += 2) - { - /* setup pointers for B */ - const q15_t *pB = im_buffer; - const q15_t *pB2 = pB + ch_im_in * dim_kernel * dim_kernel; - - /* aling the second pointer for A */ - const q15_t *pA2 = pA + ch_im_in * dim_kernel * dim_kernel; - - /* init the sum with bias */ - q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)bias[i + 1] << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)bias[i + 1] << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 1; - /* accumulate over the vector */ - while (colCnt) - { - q31_t inA1 = arm_nn_read_q15x2_ia(&pA); - q31_t inB1 = arm_nn_read_q15x2_ia(&pB); - q31_t inA2 = arm_nn_read_q15x2_ia(&pA2); - q31_t inB2 = arm_nn_read_q15x2_ia(&pB2); - - sum = __SMLAD(inA1, inB1, sum); - sum2 = __SMLAD(inA1, inB2, sum2); - sum3 = __SMLAD(inA2, inB1, sum3); - sum4 = __SMLAD(inA2, inB2, sum4); - - colCnt--; - } /* while over colCnt */ - colCnt = ch_im_in * dim_kernel * dim_kernel & 0x1; - while (colCnt) - { - q15_t inA1 = *pA++; - q15_t inB1 = *pB++; - q15_t inA2 = *pA2++; - q15_t inB2 = *pB2++; - - sum += inA1 * inB1; - sum2 += inA1 * inB2; - sum3 += inA2 * inB1; - sum4 += inA2 * inB2; - colCnt--; - } /* while over colCnt */ - *pOut++ = (q15_t)__SSAT(sum >> out_shift, 16); - *pOut++ = (q15_t)__SSAT(sum3 >> out_shift, 16); - *pOut2++ = (q15_t)__SSAT(sum2 >> out_shift, 16); - *pOut2++ = (q15_t)__SSAT(sum4 >> out_shift, 16); - - /* skip the row computed with A2 */ - pA += ch_im_in * dim_kernel * dim_kernel; - } /* for over ch_im_out */ - - pOut += ch_im_out; - /* counter reset */ - pBuffer = im_buffer; - } - } - } - -#else - (void)bufferA; - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - int i, j, k, l, m, n; - int conv_out; - int in_row, in_col; - - if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0) - { - /* check if the input dimension meets the constraints */ - return ARM_MATH_SIZE_MISMATCH; - } - - for (i = 0; i < ch_im_out; i++) - { - for (j = 0; j < dim_im_out; j++) - { - for (k = 0; k < dim_im_out; k++) - { - conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - for (m = 0; m < dim_kernel; m++) - { - for (n = 0; n < dim_kernel; n++) - { - in_row = stride * j + m - padding; - in_col = stride * k + n - padding; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in) - { - for (l = 0; l < ch_im_in; l++) - { - conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] * - wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l]; - } - } - } - } - Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q15_t)__SSAT((conv_out >> out_shift), 16); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c deleted file mode 100644 index 15963fa..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c +++ /dev/null @@ -1,270 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_HWC_q15_fast.c - * Description: Fast Q15 version of convolution - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Fast Q15 convolution function (non-sqaure shape) - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in_x input tensor dimention x - * @param[in] dim_im_in_y input tensor dimention y - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel_x filter kernel size x - * @param[in] dim_kernel_y filter kernel size y - * @param[in] padding_x padding size x - * @param[in] padding_y padding size y - * @param[in] stride_x convolution stride x - * @param[in] stride_y convolution stride y - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out_x output tensor dimension x - * @param[in] dim_im_out_y output tensor dimension y - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * - * Buffer size: - * - * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel - * - * bufferB size: 0 - * - * Input dimension constraints: - * - * ch_im_in is multiple of 2 - * - * ch_im_out is multiple of 2 - * - */ - -arm_status arm_convolve_HWC_q15_fast_nonsquare(const q15_t *Im_in, - const uint16_t dim_im_in_x, - const uint16_t dim_im_in_y, - const uint16_t ch_im_in, - const q15_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel_x, - const uint16_t dim_kernel_y, - const uint16_t padding_x, - const uint16_t padding_y, - const uint16_t stride_x, - const uint16_t stride_y, - const q15_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q15_t *Im_out, - const uint16_t dim_im_out_x, - const uint16_t dim_im_out_y, - q15_t *bufferA, - q7_t *bufferB) -{ - (void)bufferB; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - int16_t i_out_y, i_out_x, i_ker_y, i_ker_x; - - q15_t *pBuffer = bufferA; - q15_t *im_buffer = bufferA; - q15_t *pOut = Im_out; - - if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0) - { - /* check if the input dimension meets the constraints */ - return ARM_MATH_SIZE_MISMATCH; - } - - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - /* This part implements the im2col function */ - for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++) - { - for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y; - i_ker_y++) - { - for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x; - i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x) - { - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - /* arm_copy_q15((q15_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, - * ch_im_in); */ - memcpy(pBuffer, - (q15_t *)Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, - sizeof(q15_t) * ch_im_in); - } - pBuffer += ch_im_in; - } - } - - if (i_out_x & 0x1) - { - int i; - /* initialize the matrix pointers for A */ - const q15_t *pA = wt; - - /* set up the second output pointers */ - q15_t *pOut2 = pOut + ch_im_out; - - /* this loop over rows in A */ - for (i = 0; i < ch_im_out; i += 2) - { - /* setup pointers for B */ - const q15_t *pB = im_buffer; - const q15_t *pB2 = pB + ch_im_in * dim_kernel_y * dim_kernel_x; - - /* aling the second pointer for A */ - const q15_t *pA2 = pA + ch_im_in * dim_kernel_y * dim_kernel_x; - - /* init the sum with bias */ - q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)bias[i + 1] << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)bias[i + 1] << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = ch_im_in * dim_kernel_y * dim_kernel_x >> 1; - /* accumulate over the vector */ - while (colCnt) - { - q31_t inA1 = arm_nn_read_q15x2_ia(&pA); - q31_t inB1 = arm_nn_read_q15x2_ia(&pB); - q31_t inA2 = arm_nn_read_q15x2_ia(&pA2); - q31_t inB2 = arm_nn_read_q15x2_ia(&pB2); - - sum = __SMLAD(inA1, inB1, sum); - sum2 = __SMLAD(inA1, inB2, sum2); - sum3 = __SMLAD(inA2, inB1, sum3); - sum4 = __SMLAD(inA2, inB2, sum4); - - colCnt--; - } /* while over colCnt */ - colCnt = ch_im_in * dim_kernel_y * dim_kernel_x & 0x1; - while (colCnt) - { - q15_t inA1 = *pA++; - q15_t inB1 = *pB++; - q15_t inA2 = *pA2++; - q15_t inB2 = *pB2++; - - sum += inA1 * inB1; - sum2 += inA1 * inB2; - sum3 += inA2 * inB1; - sum4 += inA2 * inB2; - colCnt--; - } /* while over colCnt */ - *pOut++ = (q15_t)__SSAT(sum >> out_shift, 16); - *pOut++ = (q15_t)__SSAT(sum3 >> out_shift, 16); - *pOut2++ = (q15_t)__SSAT(sum2 >> out_shift, 16); - *pOut2++ = (q15_t)__SSAT(sum4 >> out_shift, 16); - - /* skip the row computed with A2 */ - pA += ch_im_in * dim_kernel_y * dim_kernel_x; - } /* for over ch_im_out */ - - pOut += ch_im_out; - /* counter reset */ - pBuffer = im_buffer; - } - } - } - -#else - (void)bufferA; - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - int i, j, k, l, m, n; - int conv_out; - int in_row, in_col; - - if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0) - { - /* check if the input dimension meets the constraints */ - return ARM_MATH_SIZE_MISMATCH; - } - - for (i = 0; i < ch_im_out; i++) - { - for (j = 0; j < dim_im_out_y; j++) - { - for (k = 0; k < dim_im_out_x; k++) - { - conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - for (m = 0; m < dim_kernel_y; m++) - { - for (n = 0; n < dim_kernel_x; n++) - { - in_row = stride_y * j + m - padding_y; - in_col = stride_x * k + n - padding_x; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x) - { - for (l = 0; l < ch_im_in; l++) - { - conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] * - wt[i * ch_im_in * dim_kernel_x * dim_kernel_y + (m * dim_kernel_x + n) * ch_im_in + - l]; - } - } - } - } - Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q15_t)__SSAT((conv_out >> out_shift), 16); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c deleted file mode 100644 index a970960..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c +++ /dev/null @@ -1,280 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_HWC_q7_RGB.c - * Description: Q7 version of convolution for RGB image - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Q7 convolution function for RGB image - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimention - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * - * Buffer size: - * - * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel - * - * bufferB size: 0 - * - * Input dimension constraints: - * - * ch_im_in equals 3 - * - * This kernel is written exclusively for convolution with ch_im_in - * equals 3. This applies on the first layer of CNNs which has input - * image with RGB format. - */ - -arm_status arm_convolve_HWC_q7_RGB(const q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB) -{ - (void)bufferB; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - int16_t i_out_y, i_out_x, i_ker_y, i_ker_x; - - /* - * Here we use bufferA as q15_t internally as computation are done with q15_t level - * im2col are done to output in q15_t format from q7_t input - */ - q15_t *pBuffer = bufferA; - q7_t *pOut = Im_out; - - // check if number of input channels is 3 - if (ch_im_in != 3) - { - return ARM_MATH_SIZE_MISMATCH; - } - // This part implements the im2col function - for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++) - { - for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++) - { - for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in) - { - /* Equivalent to arm_fill_q15(0, pBuffer, ch_im_in) with assumption: ch_im_in = 3 */ - arm_memset_q7((q7_t *)pBuffer, (q7_t)0, 3 * sizeof(q15_t)); - pBuffer += 3; - } - else - { - /* - * Equivalent to: - * arm_q7_to_q15_no_shift( (q7_t*)Im_in+(i_ker_y*dim_im_in+i_ker_x)*3, pBuffer, 3); - */ - - const q7_t *pPixel = Im_in + (i_ker_y * dim_im_in + i_ker_x) * 3; - q31_t buf = arm_nn_read_q7x4(pPixel); - - union arm_nnword top; - union arm_nnword bottom; - - top.word = __SXTB16(buf); - bottom.word = __SXTB16(__ROR(buf, 8)); - -#ifndef ARM_MATH_BIG_ENDIAN - /* - * little-endian, | omit | 3rd | 2nd | 1st | - * MSB LSB - * top | 3rd | 1st |; bottom | omit | 2nd | - * - * version 1, need to swap 2nd and 3rd weight - * *__SIMD32(pBuffer) = top.word; - * *(pBuffer+2) = bottom.half_words[0]; - * - * version 2, no weight shuffling required - */ - *pBuffer++ = top.half_words[0]; - int32_t packed_word = __PKHBT(bottom.word, top.word, 0); - arm_memcpy_q7((q7_t *)pBuffer, (q7_t *)&packed_word, 4); -#else - /* - * big-endian, | 1st | 2nd | 3rd | omit | - * MSB LSB - * top | 2nd | omit |; bottom | 1st | 3rd | - * - * version 1, need to swap 2nd and 3rd weight - * *__SIMD32(pBuffer) = bottom.word; - * *(pBuffer+2) = top.half_words[1]; - * - * version 2, no weight shuffling required - */ - *pBuffer++ = bottom.half_words[0]; - int32_t packed_word = __PKHTB(top.word, bottom.word, 0); - arm_memcpy_q7((q7_t *)pBuffer, (q7_t *)&packed_word, 4); -#endif - pBuffer += 2; - } - } - } - - if (pBuffer == bufferA + 2 * 3 * dim_kernel * dim_kernel) - { - pOut = arm_nn_mat_mult_kernel_q7_q15( - wt, bufferA, ch_im_out, 3 * dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut); - - /* counter reset */ - pBuffer = bufferA; - } - } - } - - /* left-over because odd number of output pixels */ - if (pBuffer != bufferA) - { - const q7_t *pA = wt; - int i; - - for (i = 0; i < ch_im_out; i++) - { - q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - q15_t *pB = bufferA; - /* basically each time it process 4 entries */ - uint16_t colCnt = 3 * dim_kernel * dim_kernel >> 2; - - while (colCnt) - { - - q31_t inA1, inA2; - q31_t inB1, inB2; - - pA = read_and_pad(pA, &inA1, &inA2); - - inB1 = arm_nn_read_q15x2_ia((const q15_t **)&pB); - sum = __SMLAD(inA1, inB1, sum); - inB2 = arm_nn_read_q15x2_ia((const q15_t **)&pB); - sum = __SMLAD(inA2, inB2, sum); - - colCnt--; - } - colCnt = 3 * dim_kernel * dim_kernel & 0x3; - while (colCnt) - { - q7_t inA1 = *pA++; - q15_t inB1 = *pB++; - sum += inA1 * inB1; - colCnt--; - } - *pOut++ = (q7_t)__SSAT((sum >> out_shift), 8); - } - } -#else - (void)bufferA; - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - int i, j, k, l, m, n; - int conv_out; - int in_row, in_col; - - // check if number of input channels is 3 - if (ch_im_in != 3) - { - return ARM_MATH_SIZE_MISMATCH; - } - - for (i = 0; i < ch_im_out; i++) - { - for (j = 0; j < dim_im_out; j++) - { - for (k = 0; k < dim_im_out; k++) - { - conv_out = (bias[i] << bias_shift) + NN_ROUND(out_shift); - for (m = 0; m < dim_kernel; m++) - { - for (n = 0; n < dim_kernel; n++) - { - /* if-for implementation */ - in_row = stride * j + m - padding; - in_col = stride * k + n - padding; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in) - { - for (l = 0; l < ch_im_in; l++) - { - conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] * - wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l]; - } - } - } - } - Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t)__SSAT((conv_out >> out_shift), 8); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c deleted file mode 100644 index 262255d..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c +++ /dev/null @@ -1,227 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_HWC_q7_basic.c - * Description: Q7 version of convolution - * - * $Date: 20. July 2021 - * $Revision: V.1.1.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Basic Q7 convolution function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimention - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * - * Buffer size: - * - * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel - * - * bufferB size: 0 - * - * This basic version is designed to work for any input tensor and weight - * dimension. - */ - -arm_status arm_convolve_HWC_q7_basic(const q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB) -{ - (void)bufferB; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - int16_t i_out_y, i_out_x, i_ker_y, i_ker_x; - - /* - * Here we use bufferA as q15_t internally as computation are done with q15_t level - * im2col are done to output in q15_t format from q7_t input - */ - q15_t *pBuffer = bufferA; - q7_t *pOut = Im_out; - - /* This part implements the im2col function */ - for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++) - { - for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++) - { - for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in) - { - /* Filling 0 for out-of-bound paddings */ - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - /* Copying the pixel data to column */ - arm_q7_to_q15_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - /* Computation is filed for every 2 columns */ - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel) - { - pOut = arm_nn_mat_mult_kernel_q7_q15( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut); - - /* counter reset */ - pBuffer = bufferA; - } - } - } - - /* left-over because odd number of output pixels */ - if (pBuffer != bufferA) - { - const q7_t *pA = wt; - int i; - - for (i = 0; i < ch_im_out; i++) - { - /* Load the accumulator with bias first */ - q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - - /* Point to the beging of the im2col buffer */ - const q15_t *pB = bufferA; - - /* Each time it process 4 entries */ - uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 2; - - while (colCnt) - { - q31_t inA1, inA2; - q31_t inB1, inB2; - - pA = read_and_pad(pA, &inA1, &inA2); - - inB1 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inA1, inB1, sum); - inB2 = arm_nn_read_q15x2_ia(&pB); - - sum = __SMLAD(inA2, inB2, sum); - - colCnt--; - } - colCnt = ch_im_in * dim_kernel * dim_kernel & 0x3; - while (colCnt) - { - q7_t inA1 = *pA++; - q15_t inB1 = *pB++; - sum += inA1 * inB1; - colCnt--; - } - *pOut++ = (q7_t)__SSAT((sum >> out_shift), 8); - } - } -#else - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - (void)bufferA; - int i, j, k, l, m, n; - int conv_out; - int in_row, in_col; - - for (i = 0; i < ch_im_out; i++) - { - for (j = 0; j < dim_im_out; j++) - { - for (k = 0; k < dim_im_out; k++) - { - conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - for (m = 0; m < dim_kernel; m++) - { - for (n = 0; n < dim_kernel; n++) - { - // if-for implementation - in_row = stride * j + m - padding; - in_col = stride * k + n - padding; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in) - { - for (l = 0; l < ch_im_in; l++) - { - conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] * - wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l]; - } - } - } - } - Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t)__SSAT((conv_out >> out_shift), 8); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c deleted file mode 100644 index 3a34568..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_HWC_q7_basic.c - * Description: Q7 version of convolution - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Basic Q7 convolution function (non-sqaure shape) - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in_x input tensor dimention x - * @param[in] dim_im_in_y input tensor dimention y - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel_x filter kernel size x - * @param[in] dim_kernel_y filter kernel size y - * @param[in] padding_x padding size x - * @param[in] padding_y padding size y - * @param[in] stride_x convolution stride x - * @param[in] stride_y convolution stride y - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out_x output tensor dimension x - * @param[in] dim_im_out_y output tensor dimension y - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns ARM_MATH_SUCCESS - */ - -arm_status arm_convolve_HWC_q7_basic_nonsquare(const q7_t *Im_in, - const uint16_t dim_im_in_x, - const uint16_t dim_im_in_y, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel_x, - const uint16_t dim_kernel_y, - const uint16_t padding_x, - const uint16_t padding_y, - const uint16_t stride_x, - const uint16_t stride_y, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out_x, - const uint16_t dim_im_out_y, - q15_t *bufferA, - q7_t *bufferB) -{ - (void)bufferB; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - int16_t i_out_y, i_out_x, i_ker_y, i_ker_x; - - /* - * Here we use bufferA as q15_t internally as computation are done with q15_t level - * im2col are done to output in q15_t format from q7_t input - */ - q15_t *pBuffer = bufferA; - q7_t *pOut = Im_out; - - /* This part implements the im2col function */ - for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++) - { - for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y; - i_ker_y++) - { - for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x; - i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x) - { - /* Filling 0 for out-of-bound paddings */ - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - /* Copying the pixel data to column */ - arm_q7_to_q15_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - /* Computation is filed for every 2 columns */ - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_y * dim_kernel_x) - { - pOut = arm_nn_mat_mult_kernel_q7_q15( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel_y * dim_kernel_x, bias_shift, out_shift, bias, pOut); - - /* counter reset */ - pBuffer = bufferA; - } - } - } - - /* left-over because odd number of output pixels */ - if (pBuffer != bufferA) - { - const q7_t *pA = wt; - int i; - - for (i = 0; i < ch_im_out; i++) - { - /* Load the accumulator with bias first */ - q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - - /* Point to the beging of the im2col buffer */ - const q15_t *pB = bufferA; - - /* Each time it process 4 entries */ - uint16_t colCnt = ch_im_in * dim_kernel_y * dim_kernel_x >> 2; - - while (colCnt) - { - q31_t inA1, inA2; - q31_t inB1, inB2; - - pA = read_and_pad(pA, &inA1, &inA2); - - inB1 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inA1, inB1, sum); - inB2 = arm_nn_read_q15x2_ia(&pB); - - sum = __SMLAD(inA2, inB2, sum); - - colCnt--; - } - colCnt = ch_im_in * dim_kernel_y * dim_kernel_x & 0x3; - while (colCnt) - { - q7_t inA1 = *pA++; - q15_t inB1 = *pB++; - sum += inA1 * inB1; - colCnt--; - } - *pOut++ = (q7_t)__SSAT((sum >> out_shift), 8); - } - } -#else - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - (void)bufferA; - int i, j, k, l, m, n; - int conv_out; - int in_row, in_col; - - for (i = 0; i < ch_im_out; i++) - { - for (j = 0; j < dim_im_out_y; j++) - { - for (k = 0; k < dim_im_out_x; k++) - { - conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - for (m = 0; m < dim_kernel_y; m++) - { - for (n = 0; n < dim_kernel_x; n++) - { - // if-for implementation - in_row = stride_y * j + m - padding_y; - in_col = stride_x * k + n - padding_x; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x) - { - for (l = 0; l < ch_im_in; l++) - { - conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] * - wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_x + n) * ch_im_in + - l]; - } - } - } - } - Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t)__SSAT((conv_out >> out_shift), 8); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c deleted file mode 100644 index 190c72a..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c +++ /dev/null @@ -1,380 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_HWC_q7_fast.c - * Description: Fast Q7 version of convolution - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Fast Q7 convolution function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimention - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * - * Buffer size: - * - * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel - * - * bufferB size: 0 - * - * Input dimension constraints: - * - * ch_im_in is multiple of 4 ( because of the SIMD32 read and swap ) - * - * ch_im_out is multiple of 2 ( bacause 2x2 mat_mult kernel ) - * - * The im2col converts the Q7 tensor input into Q15 column, which is stored in - * bufferA. There is reordering happenning during this im2col process with - * arm_q7_to_q15_reordered_no_shift. For every four elements, the second and - * third elements are swapped. - * - * The computation kernel arm_nn_mat_mult_kernel_q7_q15_reordered does the - * GEMM computation with the reordered columns. - * - * To speed-up the determination of the padding condition, we split the - * computation into 3x3 parts, i.e., {top, mid, bottom} X {left, mid, right}. - * This reduces the total number of boundary condition checks and improves - * the data copying performance. - */ - -arm_status arm_convolve_HWC_q7_fast(const q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB) -{ - (void)bufferB; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - int16_t i_out_y, i_out_x, i_ker_y, i_ker_x; - - /* - * Here we use bufferA as q15_t internally as computation are done with q15_t level - * im2col are done to output in q15_t format from q7_t input - */ - - q15_t *pBuffer = bufferA; - q7_t *pOut = Im_out; - - if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0) - { - /* check if the input dimension meets the constraints */ - return ARM_MATH_SIZE_MISMATCH; - } - - /* - * Here we split the entire matrix into three regions depending on the padding situation - * Top: i_out_y from 0 to padding - 1 - * Middle: i_out_y from padding to dim_im_out-padding-1 - * Bottom: i_out_y from dim_im_out-padding to dim_im_out-1 - */ - - /* top part */ - for (i_out_y = 0; i_out_y < padding; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++) - { - /* This part implements the im2col function */ - for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++) - { - for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in) - { - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - arm_q7_to_q15_reordered_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - } - - /* middle part, here we also divide the x into left, mid and right */ - for (; i_out_y < dim_im_out - padding; i_out_y++) - { - - /* left part */ - for (i_out_x = 0; i_out_x < padding; i_out_x++) - { - /* This part implements the im2col function */ - for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++) - { - for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++) - { - if (i_ker_x < 0 || i_ker_x >= dim_im_in) - { - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - arm_q7_to_q15_reordered_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - - /* mid part */ - for (; i_out_x < dim_im_out - padding; i_out_x++) - { - /* This part implements the im2col function */ - for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++) - { - arm_q7_to_q15_reordered_no_shift((q7_t *)Im_in + - (i_ker_y * dim_im_in + i_out_x * stride - padding) * ch_im_in, - pBuffer, - ch_im_in * dim_kernel); - pBuffer += ch_im_in * dim_kernel; - } - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - - /* right part */ - for (; i_out_x < dim_im_out; i_out_x++) - { - /* This part implements the im2col function */ - for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++) - { - for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++) - { - if (i_ker_x < 0 || i_ker_x >= dim_im_in) - { - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - arm_q7_to_q15_reordered_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - } - - for (; i_out_y < dim_im_out; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++) - { - /* This part implements the im2col function */ - for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++) - { - for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in) - { - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - arm_q7_to_q15_reordered_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - } - - /* check if there is left-over for compute */ - if (pBuffer != bufferA) - { - const q7_t *pA = wt; - int i; - - for (i = 0; i < ch_im_out; i++) - { - q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift); - const q15_t *pB = bufferA; - /* each time it process 4 entries */ - uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 2; - - while (colCnt) - { - - q31_t inA1, inA2; - q31_t inB1, inB2; - - pA = read_and_pad_reordered(pA, &inA1, &inA2); - - inB1 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inA1, inB1, sum); - inB2 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inA2, inB2, sum); - - colCnt--; - } - colCnt = ch_im_in * dim_kernel * dim_kernel & 0x3; - while (colCnt) - { - q7_t inA1 = *pA++; - q15_t inB1 = *pB++; - sum += inA1 * inB1; - colCnt--; - } - *pOut = (q7_t)__SSAT((sum >> out_shift), 8); - pOut++; - } - } -#else - (void)bufferA; - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - int i, j, k, l, m, n; - int conv_out; - int in_row, in_col; - - if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0) - { - /* check if the input dimension meets the constraints */ - return ARM_MATH_SIZE_MISMATCH; - } - - for (i = 0; i < ch_im_out; i++) - { - for (j = 0; j < dim_im_out; j++) - { - for (k = 0; k < dim_im_out; k++) - { - conv_out = (bias[i] << bias_shift) + NN_ROUND(out_shift); - for (m = 0; m < dim_kernel; m++) - { - for (n = 0; n < dim_kernel; n++) - { - // if-for implementation - in_row = stride * j + m - padding; - in_col = stride * k + n - padding; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in) - { - for (l = 0; l < ch_im_in; l++) - { - conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] * - wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l]; - } - } - } - } - Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t)__SSAT((conv_out >> out_shift), 8); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c deleted file mode 100644 index 4c8a001..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c +++ /dev/null @@ -1,378 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_HWC_q7_fast_nonsquare.c - * Description: Fast Q7 version of convolution (non-sqaure shape) - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Fast Q7 convolution function (non-sqaure shape) - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in_x input tensor dimention x - * @param[in] dim_im_in_y input tensor dimention y - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel_x filter kernel size x - * @param[in] dim_kernel_y filter kernel size y - * @param[in] padding_x padding size x - * @param[in] padding_y padding size y - * @param[in] stride_x convolution stride x - * @param[in] stride_y convolution stride y - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out_x output tensor dimension x - * @param[in] dim_im_out_y output tensor dimension y - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * This function is the version with full list of optimization tricks, but with - * some constraints: - * ch_im_in is multiple of 4 - * ch_im_out is multiple of 2 - */ - -arm_status arm_convolve_HWC_q7_fast_nonsquare(const q7_t *Im_in, - const uint16_t dim_im_in_x, - const uint16_t dim_im_in_y, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel_x, - const uint16_t dim_kernel_y, - const uint16_t padding_x, - const uint16_t padding_y, - const uint16_t stride_x, - const uint16_t stride_y, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out_x, - const uint16_t dim_im_out_y, - q15_t *bufferA, - q7_t *bufferB) -{ - (void)bufferB; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - int16_t i_out_y, i_out_x, i_ker_y, i_ker_x; - - /* ----------------------- - * Here we use bufferA as q15_t internally as computation are done with q15_t level - * im2col are done to output in q15_t format from q7_t input - */ - - q15_t *pBuffer = bufferA; - q7_t *pOut = Im_out; - - if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0) - { - /* check if the input dimension meets the constraints */ - return ARM_MATH_SIZE_MISMATCH; - } - - /* - * Here we split the entire matrix into three regions depending on the padding situation - * Top: i_out_y from 0 to padding - 1 - * Middle: i_out_y from padding to dim_im_out-padding-1 - * Bottom: i_out_y from dim_im_out-padding to dim_im_out-1 - */ - - /* top part */ - for (i_out_y = 0; i_out_y < padding_y; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++) - { - /* This part implements the im2col function */ - for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y; - i_ker_y++) - { - for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x; - i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x) - { - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - arm_q7_to_q15_reordered_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - } - - /* middle part, here we also divide the x into left, mid and right */ - for (; i_out_y < dim_im_out_y - padding_y; i_out_y++) - { - - /* left part */ - for (i_out_x = 0; i_out_x < padding_x; i_out_x++) - { - /* This part implements the im2col function */ - for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y; - i_ker_y++) - { - for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x; - i_ker_x++) - { - if (i_ker_x < 0 || i_ker_x >= dim_im_in_x) - { - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - arm_q7_to_q15_reordered_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - - /* mid part */ - for (; i_out_x < dim_im_out_x - padding_x; i_out_x++) - { - /* This part implements the im2col function */ - for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y; - i_ker_y++) - { - arm_q7_to_q15_reordered_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in_x + i_out_x * stride_x - padding_x) * ch_im_in, - pBuffer, - ch_im_in * dim_kernel_x); - pBuffer += ch_im_in * dim_kernel_x; - } - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - - /* right part */ - for (; i_out_x < dim_im_out_x; i_out_x++) - { - /* This part implements the im2col function */ - for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y; - i_ker_y++) - { - for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x; - i_ker_x++) - { - if (i_ker_x < 0 || i_ker_x >= dim_im_in_x) - { - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - arm_q7_to_q15_reordered_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - } - - for (; i_out_y < dim_im_out_y; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++) - { - /* This part implements the im2col function */ - for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y; - i_ker_y++) - { - for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x; - i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x) - { - /* arm_fill_q15(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, sizeof(q15_t) * ch_im_in); - } - else - { - arm_q7_to_q15_reordered_no_shift( - (q7_t *)Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y) - { - pOut = arm_nn_mat_mult_kernel_q7_q15_reordered( - wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y, bias_shift, out_shift, bias, pOut); - /* counter reset */ - pBuffer = bufferA; - } - } - } - - /* check if there is left-over for compute */ - if (pBuffer != bufferA) - { - const q7_t *pA = wt; - int i; - for (i = 0; i < ch_im_out; i++) - { - q31_t sum = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift); - const q15_t *pB = bufferA; - /* basically each time it process 4 entries */ - uint16_t colCnt = ch_im_in * dim_kernel_x * dim_kernel_y >> 2; - - while (colCnt) - { - - q31_t inA1, inA2; - q31_t inB1, inB2; - - pA = read_and_pad_reordered(pA, &inA1, &inA2); - - inB1 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inA1, inB1, sum); - inB2 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inA2, inB2, sum); - - colCnt--; - } - colCnt = (ch_im_in * dim_kernel_y * dim_kernel_x) & 0x3; - while (colCnt) - { - q7_t inA1 = *pA++; - q15_t inB1 = *pB++; - sum += inA1 * inB1; - colCnt--; - } - *pOut = (q7_t)__SSAT((sum >> out_shift), 8); - pOut++; - } - } - -#else - (void)bufferA; - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - int i, j, k, l, m, n; - int conv_out; - int in_row, in_col; - - if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0) - { - /* check if the input dimension meets the constraints */ - return ARM_MATH_SIZE_MISMATCH; - } - - for (i = 0; i < ch_im_out; i++) - { - for (j = 0; j < dim_im_out_y; j++) - { - for (k = 0; k < dim_im_out_x; k++) - { - conv_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift); - for (m = 0; m < dim_kernel_y; m++) - { - for (n = 0; n < dim_kernel_x; n++) - { - /* if-for implementation */ - in_row = stride_y * j + m - padding_y; - in_col = stride_x * k + n - padding_x; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x) - { - for (l = 0; l < ch_im_in; l++) - { - conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] * - wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_x + n) * ch_im_in + - l]; - } - } - } - } - Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t)__SSAT((conv_out >> out_shift), 8); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_fast_s16.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_fast_s16.c deleted file mode 100644 index 4dd1a78..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_fast_s16.c +++ /dev/null @@ -1,241 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_fast_s16.c - * Description: Optimized s16 version of convolution. - * - * $Date: 12 August 2021 - * $Revision: V.1.1.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * Basic s16 convolution function. - * - * Refer header file for details. Optimal use case for the DSP/MVE implementation is when input and output channels - * are multiples of 4 or atleast greater than 4. - * - */ - -arm_status arm_convolve_fast_s16(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q15_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int64_t *bias_data, - const cmsis_nn_dims *output_dims, - q15_t *output_data) -{ - (void)bias_dims; - if (filter_dims->w * filter_dims->h * input_dims->c >= 512) - { - return ARM_MATH_SIZE_MISMATCH; - } - - if (ctx->buf == NULL && arm_convolve_s8_get_buffer_size(input_dims, filter_dims) > 0) - { - return ARM_MATH_ARGUMENT_ERROR; - } - q15_t *buffer_a = (q15_t *)ctx->buf; - - const int32_t input_batches = input_dims->n; - const int32_t input_x = input_dims->w; - const int32_t input_y = input_dims->h; - const int32_t input_ch = input_dims->c; - const int32_t kernel_x = filter_dims->w; - const int32_t kernel_y = filter_dims->h; - const int32_t output_x = output_dims->w; - const int32_t output_y = output_dims->h; - const int32_t output_ch = output_dims->c; - - const int32_t pad_x = conv_params->padding.w; - const int32_t pad_y = conv_params->padding.h; - const int32_t stride_x = conv_params->stride.w; - const int32_t stride_y = conv_params->stride.h; - - const int16_t out_activation_min = conv_params->activation.min; - const int16_t out_activation_max = conv_params->activation.max; - int32_t *output_mult = quant_params->multiplier; - int32_t *output_shift = quant_params->shift; - - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Generate two columns from the input tensor a GEMM computation */ - q15_t *two_column_buf = buffer_a; - q15_t *out = output_data; - /* This part implements the im2col function */ - for (int32_t i_out_y = 0; i_out_y < output_y; i_out_y++) - { - for (int32_t i_out_x = 0; i_out_x < output_x; i_out_x++) - { - for (int32_t i_ker_y = i_out_y * stride_y - pad_y; i_ker_y < i_out_y * stride_y - pad_y + kernel_y; - i_ker_y++) - { - for (int32_t i_ker_x = i_out_x * stride_x - pad_x; i_ker_x < i_out_x * stride_x - pad_x + kernel_x; - i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= input_y || i_ker_x < 0 || i_ker_x >= input_x) - { - /* Filling 0 for out-of-bound paddings */ - arm_memset_q7((q7_t *)two_column_buf, 0, sizeof(q15_t) * input_ch); - } - else - { - arm_memcpy_q7((q7_t *)two_column_buf, - (const q7_t *)(input_data + (i_ker_y * input_x + i_ker_x) * input_ch), - input_ch * sizeof(q15_t)); - } - two_column_buf += input_ch; - } - } - /* Computation is filed for every 2 columns */ - if (two_column_buf == buffer_a + 2 * input_ch * kernel_y * kernel_x) - { - out = arm_nn_mat_mult_kernel_s16(filter_data, - buffer_a, - output_ch, - output_shift, - output_mult, - out_activation_min, - out_activation_max, - (input_ch * kernel_y * kernel_x), - bias_data, - out); - - /* Counter reset */ - two_column_buf = buffer_a; - } - } - } - - /* Left-over because odd number of output pixels */ - if (two_column_buf != buffer_a) - { - const q7_t *ker_a = filter_data; - int i; - - for (i = 0; i < output_ch; i++) - { - /* Init the accumulator*/ - q31_t sum = 0; - - /* Point to the beginning of the im2col buffer where the input is available as a rearranged column */ - const q15_t *ip_as_col = buffer_a; - - /* 4 multiply and accumulates are done in one loop. */ - uint16_t col_count = (input_ch * kernel_y * kernel_x) >> 2; - - while (col_count) - { - q31_t ker_a1, ker_a2; - q31_t ip_b1, ip_b2; - - ker_a = read_and_pad(ker_a, &ker_a1, &ker_a2); - - ip_b1 = arm_nn_read_q15x2_ia(&ip_as_col); - sum = __SMLAD(ker_a1, ip_b1, sum); - ip_b2 = arm_nn_read_q15x2_ia(&ip_as_col); - sum = __SMLAD(ker_a2, ip_b2, sum); - - col_count--; - } - /* Handle left over mac */ - col_count = input_ch * kernel_y * kernel_x & 0x3; - while (col_count) - { - q7_t ker_a1 = *ker_a++; - q15_t ip_b1 = *ip_as_col++; - sum += ker_a1 * ip_b1; - col_count--; - } - if (bias_data) - { - q31_t reduced_multiplier = REDUCE_MULTIPLIER(output_mult[i]); - q63_t acc_64 = sum + bias_data[i]; - sum = arm_nn_requantize_s64(acc_64, reduced_multiplier, output_shift[i]); - } - else - { - sum = arm_nn_requantize(sum, output_mult[i], output_shift[i]); - } - sum = MAX(sum, out_activation_min); - sum = MIN(sum, out_activation_max); - *out++ = (q15_t)sum; - } - } -#else - (void)input_data; - (void)output_data; - (void)bias_data; - (void)filter_data; - (void)buffer_a; - (void)kernel_x; - (void)kernel_y; - (void)pad_x; - (void)pad_y; - (void)stride_x; - (void)stride_y; - (void)out_activation_min; - (void)out_activation_max; - (void)output_mult; - (void)output_shift; - return ARM_MATH_ARGUMENT_ERROR; -#endif - /* Advance to the next batch */ - input_data += (input_x * input_y * input_ch); - output_data += (output_x * output_y * output_ch); - } - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -int32_t arm_convolve_fast_s16_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims) -{ -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - return (2 * input_dims->c * filter_dims->w * filter_dims->h) * (int32_t)sizeof(int16_t); -#else - (void)input_dims; - (void)filter_dims; - return 0; -#endif -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s16.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s16.c deleted file mode 100644 index e9f2a91..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s16.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * Copyright (C) 2010-2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_s16.c - * Description: s16 version of convolution using symmetric quantization. - * - * $Date: January 13, 2022 - * $Revision: V.1.1.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * Basic s16 convolution function. - * - * Refer header file for details. Optimal use case for the DSP/MVE implementation is when input and output channels - * are multiples of 4 or atleast greater than 4. - * - */ - -arm_status arm_convolve_s16(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q15_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int64_t *bias_data, - const cmsis_nn_dims *output_dims, - q15_t *output_data) -{ - (void)bias_dims; - (void)ctx; - - const int32_t input_batches = input_dims->n; - const int32_t input_x = input_dims->w; - const int32_t input_y = input_dims->h; - const int32_t input_ch = input_dims->c; - const int32_t kernel_x = filter_dims->w; - const int32_t kernel_y = filter_dims->h; - const int32_t output_x = output_dims->w; - const int32_t output_y = output_dims->h; - const int32_t output_ch = output_dims->c; - - const int32_t pad_x = conv_params->padding.w; - const int32_t pad_y = conv_params->padding.h; - const int32_t stride_x = conv_params->stride.w; - const int32_t stride_y = conv_params->stride.h; - const int32_t dilation_x = conv_params->dilation.w; - const int32_t dilation_y = conv_params->dilation.h; - - const int32_t out_activation_min = conv_params->activation.min; - const int32_t out_activation_max = conv_params->activation.max; - int32_t *output_mult = quant_params->multiplier; - int32_t *output_shift = quant_params->shift; - - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - for (int32_t i_out_ch = 0; i_out_ch < output_ch; i_out_ch++) - { - const q31_t reduced_multiplier = REDUCE_MULTIPLIER(output_mult[i_out_ch]); - - for (int32_t base_idx_y = -pad_y, i_out_y = 0; i_out_y < output_y; base_idx_y += stride_y, i_out_y++) - { - for (int32_t base_idx_x = -pad_x, i_out_x = 0; i_out_x < output_x; base_idx_x += stride_x, i_out_x++) - { - int64_t conv_out_acc = 0; - - const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y; - const int32_t ker_y_start = MAX(0, start_y_max); - const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x; - const int32_t ker_x_start = MAX(0, start_x_max); - const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y; - const int32_t ker_y_end = MIN(kernel_y, end_min_y); - const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x; - const int32_t ker_x_end = MIN(kernel_x, end_min_x); - - for (int32_t i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++) - { - for (int32_t i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++) - { - const int32_t in_row = base_idx_y + dilation_y * i_ker_y; - const int32_t in_col = base_idx_x + dilation_x * i_ker_x; - - for (int32_t i_input_ch = 0; i_input_ch < input_ch; i_input_ch++) - { - conv_out_acc += input_data[(in_row * input_x + in_col) * input_ch + i_input_ch] * - filter_data[i_out_ch * input_ch * kernel_y * kernel_x + - (i_ker_y * kernel_x + i_ker_x) * input_ch + i_input_ch]; - } - } - } - - if (bias_data) - { - conv_out_acc += bias_data[i_out_ch]; - } - - int32_t conv_out = arm_nn_requantize_s64(conv_out_acc, reduced_multiplier, output_shift[i_out_ch]); - conv_out = MAX(conv_out, out_activation_min); - conv_out = MIN(conv_out, out_activation_max); - output_data[i_out_ch + (i_out_y * output_x + i_out_x) * output_ch] = (int16_t)conv_out; - } - } - } - /* Advance to the next batch */ - input_data += (input_x * input_y * input_ch); - output_data += (output_x * output_y * output_ch); - } - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -int32_t arm_convolve_s16_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims) -{ - (void)input_dims; - (void)filter_dims; - return 0; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c deleted file mode 100644 index a9e9be5..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c +++ /dev/null @@ -1,335 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_s8.c - * Description: s8 version of convolution using symmetric quantization. - * - * $Date: December 14, 2021 - * $Revision: V.2.1.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * Basic s8 convolution function. - * - * Refer header file for details. Optimal use case for the DSP/MVE implementation is when input and output channels - * are multiples of 4 or atleast greater than 4. - * - */ - -arm_status arm_convolve_s8(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data) -{ - (void)bias_dims; - - if (ctx->buf == NULL && arm_convolve_s8_get_buffer_size(input_dims, filter_dims) > 0) - { - return ARM_MATH_ARGUMENT_ERROR; - } - q15_t *buffer_a = (q15_t *)ctx->buf; - - const int32_t input_batches = input_dims->n; - const uint16_t input_x = input_dims->w; - const uint16_t input_y = input_dims->h; - const uint16_t input_ch = input_dims->c; - const uint16_t kernel_x = filter_dims->w; - const uint16_t kernel_y = filter_dims->h; - const uint16_t output_x = output_dims->w; - const uint16_t output_y = output_dims->h; - const uint16_t output_ch = output_dims->c; - - const uint16_t pad_x = conv_params->padding.w; - const uint16_t pad_y = conv_params->padding.h; - const uint16_t stride_x = conv_params->stride.w; - const uint16_t stride_y = conv_params->stride.h; - - const int32_t input_offset = conv_params->input_offset; - const int32_t out_offset = conv_params->output_offset; - const int32_t out_activation_min = conv_params->activation.min; - const int32_t out_activation_max = conv_params->activation.max; - int32_t *output_mult = quant_params->multiplier; - int32_t *output_shift = quant_params->shift; - - int i_batch; - for (i_batch = 0; i_batch < input_batches; i_batch++) - { -#if defined(ARM_MATH_MVEI) - /* Generate upto four columns from the input tensor a GEMM computation */ - q7_t *im2col_buf = (q7_t *)buffer_a; - q7_t *out = output_data; - int32_t buffer_fill_cnt = 0; - int32_t padded = 0; - const int32_t num_elem = kernel_x * kernel_y * input_ch; - const int32_t dilation_x = conv_params->dilation.w; - const int32_t dilation_y = conv_params->dilation.h; - - /* This part implements the im2col function */ - for (int i_out_y = 0; i_out_y < output_y; i_out_y++) - { - for (int i_out_x = 0; i_out_x < output_x; i_out_x++) - { - const int32_t base_idx_x = stride_x * i_out_x - pad_x; - const int32_t base_idx_y = stride_y * i_out_y - pad_y; - - for (int32_t i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++) - { - for (int32_t i_ker_x = 0; i_ker_x < kernel_x; i_ker_x++) - { - const int32_t k_y = base_idx_y + dilation_y * i_ker_y; - const int32_t k_x = base_idx_x + dilation_x * i_ker_x; - - if (k_y < 0 || k_y >= input_y || k_x < 0 || k_x >= input_x) - { - memset(im2col_buf, (int8_t)-input_offset, sizeof(q7_t) * input_ch); - padded = 1; - } - else - { - arm_memcpy_q7(im2col_buf, input_data + (k_y * input_x + k_x) * input_ch, input_ch); - } - im2col_buf += input_ch; - } - } - - buffer_fill_cnt++; - - /* Computation is filed for every 4 columns */ - if (buffer_fill_cnt == 4 && (padded == 0)) - { - buffer_fill_cnt = 0; - out = arm_nn_mat_mul_core_4x_s8(num_elem, - num_elem, - (q7_t *)buffer_a, - filter_data, - output_ch, - conv_params, - quant_params, - bias_data, - out); - im2col_buf = (q7_t *)buffer_a; - } - else if (buffer_fill_cnt == 4 && (padded != 0)) - { - buffer_fill_cnt = 0; - out = arm_nn_mat_mult_s8(filter_data, - (q7_t *)buffer_a, - output_ch, - 4, - output_shift, - output_mult, - out_offset, - input_offset, - 0, - out_activation_min, - out_activation_max, - num_elem, - bias_data, - out); - - im2col_buf = (q7_t *)buffer_a; - padded = 0; - } - } - } - /* Handle left over columns */ - if (buffer_fill_cnt != 0) - { - out = arm_nn_mat_mult_s8(filter_data, - (q7_t *)buffer_a, - output_ch, - buffer_fill_cnt, - output_shift, - output_mult, - out_offset, - input_offset, - 0, - out_activation_min, - out_activation_max, - num_elem, - bias_data, - out); - } -#else // #if defined(ARM_MATH_MVEI) - const uint16_t dilation_x = conv_params->dilation.w; - const uint16_t dilation_y = conv_params->dilation.h; - - int32_t i_out_y, i_out_x, i_ker_y, i_ker_x; - - /* Generate two columns from the input tensor a GEMM computation */ - q15_t *two_column_buf = buffer_a; - q7_t *out = output_data; - - /* This part implements the im2col function */ - for (i_out_y = 0; i_out_y < output_y; i_out_y++) - { - for (i_out_x = 0; i_out_x < output_x; i_out_x++) - { - const int32_t base_idx_y = stride_y * i_out_y - pad_y; - const int32_t base_idx_x = stride_x * i_out_x - pad_x; - - for (i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++) - { - for (i_ker_x = 0; i_ker_x < kernel_x; i_ker_x++) - { - const int32_t k_y = base_idx_y + dilation_y * i_ker_y; - const int32_t k_x = base_idx_x + dilation_x * i_ker_x; - - if (k_y < 0 || k_y >= input_y || k_x < 0 || k_x >= input_x) - { - /* Filling 0 for out-of-bound paddings */ - memset(two_column_buf, 0, sizeof(q15_t) * input_ch); - } - else - { - /* Copying the pixel data to column */ - arm_q7_to_q15_with_offset( - input_data + (k_y * input_x + k_x) * input_ch, two_column_buf, input_ch, input_offset); - } - two_column_buf += input_ch; - } - } - - /* Computation is filed for every 2 columns */ - if (two_column_buf == buffer_a + 2 * input_ch * kernel_y * kernel_x) - { - out = arm_nn_mat_mult_kernel_s8_s16(filter_data, - buffer_a, - output_ch, - output_shift, - output_mult, - out_offset, - out_activation_min, - out_activation_max, - input_ch * kernel_y * kernel_x, - bias_data, - out); - - /* counter reset */ - two_column_buf = buffer_a; - } - } - } - - /* left-over because odd number of output pixels */ - if (two_column_buf != buffer_a) - { - const q7_t *ker_a = filter_data; - int i; - - for (i = 0; i < output_ch; i++) - { - /* Load the accumulator with bias first */ - q31_t sum = 0; - if (bias_data) - { - sum = bias_data[i]; - } - - /* Point to the beginning of the im2col buffer where the input is available as a rearranged column */ - const q15_t *ip_as_col = buffer_a; - - /* 4 multiply and accumulates are done in one loop. */ -#if defined(ARM_MATH_DSP) - uint16_t col_count = (input_ch * kernel_y * kernel_x) >> 2; - - while (col_count) - { - q31_t ker_a1, ker_a2; - q31_t ip_b1, ip_b2; - - ker_a = read_and_pad(ker_a, &ker_a1, &ker_a2); - - ip_b1 = arm_nn_read_q15x2_ia(&ip_as_col); - sum = __SMLAD(ker_a1, ip_b1, sum); - ip_b2 = arm_nn_read_q15x2_ia(&ip_as_col); - sum = __SMLAD(ker_a2, ip_b2, sum); - - col_count--; - } - /* Handle left over mac */ - col_count = input_ch * kernel_y * kernel_x & 0x3; -#else - uint16_t col_count = input_ch * kernel_y * kernel_x; -#endif - while (col_count) - { - q7_t ker_a1 = *ker_a++; - q15_t ip_b1 = *ip_as_col++; - sum += ker_a1 * ip_b1; - col_count--; - } - - sum = arm_nn_requantize(sum, output_mult[i], output_shift[i]); - sum += out_offset; - sum = MAX(sum, out_activation_min); - sum = MIN(sum, out_activation_max); - *out++ = (q7_t)sum; - } - } -#endif // #if defined(ARM_MATH_MVEI) - /* Advance to the next batch */ - input_data += (input_x * input_y * input_ch); - output_data += (output_x * output_y * output_ch); - } - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -int32_t arm_convolve_s8_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims) -{ -#if defined(ARM_MATH_MVEI) - int32_t col_length = input_dims->c * filter_dims->w * filter_dims->h; - // Get number of complete int16 lanes(multiple of 8) for given col_length. This is dependent on - // implementation of arm_nn_mat_mult_s8 - col_length = (col_length + 7) / 8; - // 4 -> number of im2col buffers, 8 -> 8 elements per Q register - return 4 * col_length * 8 * (int32_t)sizeof(int8_t); -#else - return (2 * input_dims->c * filter_dims->w * filter_dims->h) * (int32_t)sizeof(int16_t); -#endif -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c deleted file mode 100644 index eee6273..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c +++ /dev/null @@ -1,130 +0,0 @@ -/* - * Copyright (C) 2021-2022 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_wrapper_s16.c - * Description: s16 convolution layer wrapper function with the main purpose to call the optimal kernel available in - * cmsis-nn to perform the convolution. - * - * $Date: 13 January 2022 - * $Revision: V.1.2.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * Convolution layer - * - * Refer header file for details. - * - */ - -arm_status arm_convolve_wrapper_s16(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q15_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int64_t *bias_data, - const cmsis_nn_dims *output_dims, - q15_t *output_data) -{ -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - if (filter_dims->w * filter_dims->h * input_dims->c < 512 && - (conv_params->dilation.w == 1 && conv_params->dilation.h == 1)) - { - return arm_convolve_fast_s16(ctx, - conv_params, - quant_params, - input_dims, - input_data, - filter_dims, - filter_data, - bias_dims, - bias_data, - output_dims, - output_data); - } - else - { - return arm_convolve_s16(ctx, - conv_params, - quant_params, - input_dims, - input_data, - filter_dims, - filter_data, - bias_dims, - bias_data, - output_dims, - output_data); - } -#else - return arm_convolve_s16(ctx, - conv_params, - quant_params, - input_dims, - input_data, - filter_dims, - filter_data, - bias_dims, - bias_data, - output_dims, - output_data); -#endif -} - -int32_t arm_convolve_wrapper_s16_get_buffer_size(const cmsis_nn_conv_params *conv_params, - const cmsis_nn_dims *input_dims, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims) -{ - (void)conv_params; - (void)output_dims; - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - if (filter_dims->w * filter_dims->h * input_dims->c < 512 && - (conv_params->dilation.w == 1 && conv_params->dilation.h == 1)) - { - return arm_convolve_fast_s16_get_buffer_size(input_dims, filter_dims); - } - - return arm_convolve_s16_get_buffer_size(input_dims, filter_dims); -#else - return arm_convolve_s16_get_buffer_size(input_dims, filter_dims); -#endif -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c deleted file mode 100644 index 7846225..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c +++ /dev/null @@ -1,133 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_convolve_wrapper_s8.c - * Description: s8 convolution layer wrapper function with the main purpose to call the optimal kernel available in - * cmsis-nn to perform the convolution. - * - * $Date: 02. December 2021 - * $Revision: V.1.1.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * Convolution layer - * - * Refer header file for details. - * - */ - -arm_status arm_convolve_wrapper_s8(const cmsis_nn_context *ctx, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *filter_dims, - const q7_t *filter_data, - const cmsis_nn_dims *bias_dims, - const int32_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data) -{ - if ((conv_params->padding.w == 0) && (conv_params->padding.h == 0) && (input_dims->c % 4 == 0) && - (conv_params->stride.w == 1) && (conv_params->stride.h == 1) && (filter_dims->w == 1) && - (filter_dims->h == 1) && (conv_params->dilation.w == 1 && conv_params->dilation.h == 1)) - { - return arm_convolve_1x1_s8_fast(ctx, - conv_params, - quant_params, - input_dims, - input_data, - filter_dims, - filter_data, - bias_dims, - bias_data, - output_dims, - output_data); - } - else if ((output_dims->h == 1) && (input_dims->h == 1) && (filter_dims->h == 1) && (output_dims->w % 4 == 0) && - (input_dims->n == 1) && (conv_params->dilation.w == 1 && conv_params->dilation.h == 1)) - { - return arm_convolve_1_x_n_s8(ctx, - conv_params, - quant_params, - input_dims, - input_data, - filter_dims, - filter_data, - bias_dims, - bias_data, - output_dims, - output_data); - } - else - { - return arm_convolve_s8(ctx, - conv_params, - quant_params, - input_dims, - input_data, - filter_dims, - filter_data, - bias_dims, - bias_data, - output_dims, - output_data); - } -} - -int32_t arm_convolve_wrapper_s8_get_buffer_size(const cmsis_nn_conv_params *conv_params, - const cmsis_nn_dims *input_dims, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims) -{ - if ((conv_params->padding.w == 0) && (conv_params->padding.h == 0) && (input_dims->c % 4 == 0) && - (conv_params->stride.w == 1) && (conv_params->stride.h == 1) && (filter_dims->w == 1) && - (filter_dims->h == 1) && (conv_params->dilation.w == 1 && conv_params->dilation.h == 1)) - { - return arm_convolve_1x1_s8_fast_get_buffer_size(input_dims); - } - else if ((output_dims->h == 1) && (input_dims->h == 1) && (filter_dims->h == 1) && (output_dims->w % 4 == 0) && - (input_dims->n == 1) && (conv_params->dilation.w == 1 && conv_params->dilation.h == 1)) - { - return arm_convolve_1_x_n_s8_get_buffer_size(input_dims, filter_dims); - } - else - { - return arm_convolve_s8_get_buffer_size(input_dims, filter_dims); - } -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c deleted file mode 100644 index a04bcf1..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_depthwise_conv_3x3_s8.c - * Description: Optimized s8 depthwise convolution function for channel - * multiplier of 1 and 3x3 kernel size. - * - * $Date: 09. October 2020 - * $Revision: V.2.0.1 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * Optimized s8 depthwise convolution function with constraint that - * in_channel == out_channel and kernel_x == kernel_y == 3 with pads at most 1 - * - * Refer prototype header file for details. - * - */ - -arm_status arm_depthwise_conv_3x3_s8(const cmsis_nn_context *ctx, - const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input, - const cmsis_nn_dims *filter_dims, - const q7_t *kernel, - const cmsis_nn_dims *bias_dims, - const int32_t *bias, - const cmsis_nn_dims *output_dims, - q7_t *output) -{ - (void)ctx; - (void)bias_dims; - - const int32_t input_x = input_dims->w; - const int32_t input_y = input_dims->h; - const int32_t input_ch = input_dims->c; - const int32_t output_ch = output_dims->c; - const int32_t pad_x = dw_conv_params->padding.w; - const int32_t pad_y = dw_conv_params->padding.h; - const int32_t stride_x = dw_conv_params->stride.w; - const int32_t stride_y = dw_conv_params->stride.h; - const int32_t *output_shift = quant_params->shift; - const int32_t *output_mult = quant_params->multiplier; - const int32_t output_x = output_dims->w; - const int32_t output_y = output_dims->h; - const int32_t output_offset = dw_conv_params->output_offset; - const int32_t input_offset = dw_conv_params->input_offset; - const int32_t output_activation_min = dw_conv_params->activation.min; - const int32_t output_activation_max = dw_conv_params->activation.max; - - /* Check input constraints input_ch == output_ch */ - if (input_ch != output_ch) - { - return ARM_MATH_SIZE_MISMATCH; - } - /* Check input constraints pad_x <= 1 */ - if (pad_x > 1 || filter_dims->w != 3 || filter_dims->h != 3) - { - return ARM_MATH_ARGUMENT_ERROR; - } - - for (int32_t in_h = -pad_y, out_h = 0, out_idx = 0; out_h < output_y; in_h += stride_y, ++out_h) - { - for (int32_t in_w = -pad_x, out_w = 0, ker_h_start = MAX(0, -in_h); out_w < output_x; in_w += stride_x, ++out_w) - { - int32_t in_ch = 0; - int32_t ker_w_start = MAX(0, -in_w); - - for (; in_ch <= (input_ch - 4); in_ch += 4) - { - int32_t out_buff0 = bias[in_ch + 0]; - int32_t out_buff1 = bias[in_ch + 1]; - int32_t out_buff2 = bias[in_ch + 2]; - int32_t out_buff3 = bias[in_ch + 3]; - - const int8_t *input_ptr = input + (in_h + ker_h_start) * (input_ch * input_x) + in_w * input_ch + in_ch; - const int8_t *kernel_ptr = kernel + ker_h_start * (input_ch * 3) + in_ch; - - for (int32_t ker_h = ker_h_start; ker_h < MIN(3, input_y - in_h); ++ker_h) - { - int32_t in_val = 0; - int32_t ker_val = 0; - - if (ker_w_start == 0) - { - in_val = arm_nn_read_q7x4(input_ptr); - ker_val = arm_nn_read_q7x4(kernel_ptr); - - out_buff0 += ((int8_t)in_val + input_offset) * (int8_t)ker_val; - out_buff1 += ((int8_t)(in_val >> 8) + input_offset) * (int8_t)(ker_val >> 8); - out_buff2 += ((int8_t)(in_val >> 16) + input_offset) * (int8_t)(ker_val >> 16); - out_buff3 += ((int8_t)(in_val >> 24) + input_offset) * (int8_t)(ker_val >> 24); - } - - in_val = arm_nn_read_q7x4(input_ptr + input_ch); - ker_val = arm_nn_read_q7x4(kernel_ptr + input_ch); - - out_buff0 += ((int8_t)in_val + input_offset) * (int8_t)ker_val; - out_buff1 += ((int8_t)(in_val >> 8) + input_offset) * (int8_t)(ker_val >> 8); - out_buff2 += ((int8_t)(in_val >> 16) + input_offset) * (int8_t)(ker_val >> 16); - out_buff3 += ((int8_t)(in_val >> 24) + input_offset) * (int8_t)(ker_val >> 24); - - if ((input_x - in_w) >= 3) - { - in_val = arm_nn_read_q7x4(input_ptr + (input_ch << 1)); - ker_val = arm_nn_read_q7x4(kernel_ptr + (input_ch << 1)); - - out_buff0 += ((int8_t)in_val + input_offset) * (int8_t)ker_val; - out_buff1 += ((int8_t)(in_val >> 8) + input_offset) * (int8_t)(ker_val >> 8); - out_buff2 += ((int8_t)(in_val >> 16) + input_offset) * (int8_t)(ker_val >> 16); - out_buff3 += ((int8_t)(in_val >> 24) + input_offset) * (int8_t)(ker_val >> 24); - } - - input_ptr += (input_ch * input_x); - kernel_ptr += (input_ch * 3); - } - - out_buff0 = arm_nn_requantize(out_buff0, output_mult[in_ch + 0], output_shift[in_ch + 0]); - out_buff1 = arm_nn_requantize(out_buff1, output_mult[in_ch + 1], output_shift[in_ch + 1]); - out_buff2 = arm_nn_requantize(out_buff2, output_mult[in_ch + 2], output_shift[in_ch + 2]); - out_buff3 = arm_nn_requantize(out_buff3, output_mult[in_ch + 3], output_shift[in_ch + 3]); - - out_buff0 += output_offset; - out_buff1 += output_offset; - out_buff2 += output_offset; - out_buff3 += output_offset; - - out_buff0 = MIN(MAX(out_buff0, output_activation_min), output_activation_max); - out_buff1 = MIN(MAX(out_buff1, output_activation_min), output_activation_max); - out_buff2 = MIN(MAX(out_buff2, output_activation_min), output_activation_max); - out_buff3 = MIN(MAX(out_buff3, output_activation_min), output_activation_max); - - output[out_idx++] = (int8_t)out_buff0; - output[out_idx++] = (int8_t)out_buff1; - output[out_idx++] = (int8_t)out_buff2; - output[out_idx++] = (int8_t)out_buff3; - } - - // Leftover - for (; in_ch < input_ch; ++in_ch) - { - int32_t out_buff = bias[in_ch]; - - const int8_t *input_ptr = input + (in_h + ker_h_start) * (input_ch * input_x) + in_w * input_ch + in_ch; - const int8_t *kernel_ptr = kernel + ker_h_start * (input_ch * 3) + in_ch; - - for (int32_t ker_h = ker_h_start; ker_h < MIN(3, input_y - in_h); ++ker_h) - { - if (ker_w_start == 0) - { - out_buff += (*(input_ptr) + input_offset) * *(kernel_ptr); - } - - out_buff += (*(input_ptr + input_ch) + input_offset) * *(kernel_ptr + input_ch); - - if ((input_x - in_w) >= 3) - { - out_buff += (*(input_ptr + (input_ch << 1)) + input_offset) * *(kernel_ptr + (input_ch << 1)); - } - - input_ptr += (input_ch * input_x); - kernel_ptr += (input_ch * 3); - } - - out_buff = arm_nn_requantize(out_buff, output_mult[in_ch], output_shift[in_ch]); - out_buff += output_offset; - out_buff = MIN(MAX(out_buff, output_activation_min), output_activation_max); - output[out_idx++] = (int8_t)out_buff; - } - } - } - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s16.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s16.c deleted file mode 100644 index 7dd0071..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s16.c +++ /dev/null @@ -1,292 +0,0 @@ -/* - * Copyright (C) 2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_depthwise_conv_s16.c - * Description: s16 version of depthwise convolution. - * - * $Date: 26. Jan 2022 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -static void __attribute__((unused)) depthwise_conv_s16_mult_4_s16(const int16_t *input, - const int32_t input_x, - const int32_t input_y, - const int32_t input_ch, - const int8_t *kernel, - const int32_t output_ch, - const int32_t ch_mult, - const int32_t kernel_x, - const int32_t kernel_y, - const int32_t pad_x, - const int32_t pad_y, - const int32_t stride_x, - const int32_t stride_y, - const int64_t *bias, - int16_t *output, - const int32_t *output_shift, - const int32_t *output_mult, - const int32_t output_x, - const int32_t output_y, - const int32_t output_activation_min, - const int32_t output_activation_max) -{ - for (int32_t in_h = -pad_y, out_h = 0, out_idx = 0; out_h < output_y; in_h += stride_y, ++out_h) - { - for (int32_t in_w = -pad_x, out_w = 0, ker_h_start = MAX(0, -in_h); out_w < output_x; in_w += stride_x, ++out_w) - { - for (int32_t in_ch = 0, out_ch = 0, ker_w_start = MAX(0, -in_w); out_ch < output_ch; - ++in_ch, out_ch += ch_mult) - { - for (int mult_tile = 0; mult_tile < ch_mult; mult_tile += 4) - { - int32_t out_buff32[4] = {REDUCE_MULTIPLIER(output_mult[out_ch + 0 + mult_tile]), - REDUCE_MULTIPLIER(output_mult[out_ch + 1 + mult_tile]), - REDUCE_MULTIPLIER(output_mult[out_ch + 2 + mult_tile]), - REDUCE_MULTIPLIER(output_mult[out_ch + 3 + mult_tile])}; - - int64_t out_buff[4] = {0, 0, 0, 0}; - - if (bias) - { - out_buff[0] = bias[out_ch + 0 + mult_tile]; - out_buff[1] = bias[out_ch + 1 + mult_tile]; - out_buff[2] = bias[out_ch + 2 + mult_tile]; - out_buff[3] = bias[out_ch + 3 + mult_tile]; - } - - for (int32_t ker_h = ker_h_start; ker_h < MIN(kernel_y, input_y - in_h); ++ker_h) - { - int32_t ker_idx = ker_h * (output_ch * kernel_x) + ker_w_start * output_ch + out_ch; - int32_t in_idx = (in_h + ker_h) * (input_ch * input_x) + in_w * input_ch + in_ch; -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -#pragma clang loop unroll(disable) -#endif - for (int32_t ker_w = ker_w_start; ker_w < MIN(kernel_x, input_x - in_w); - ++ker_w, ker_idx += output_ch) - { - // TODO: Unroll of 4 with 64 bit accumulator will probably result in too much register - // spills. Try with unroll of 2 when enabling this. - int32_t in_val = input[in_idx + ker_w * input_ch]; - out_buff[0] += in_val * kernel[ker_idx + 0 + mult_tile]; - out_buff[1] += in_val * kernel[ker_idx + 1 + mult_tile]; - out_buff[2] += in_val * kernel[ker_idx + 2 + mult_tile]; - out_buff[3] += in_val * kernel[ker_idx + 3 + mult_tile]; - } - } - - out_buff32[0] = - arm_nn_requantize_s64(out_buff[0], out_buff32[0], output_shift[out_ch + 0 + mult_tile]); - out_buff32[1] = - arm_nn_requantize_s64(out_buff[1], out_buff32[1], output_shift[out_ch + 1 + mult_tile]); - out_buff32[2] = - arm_nn_requantize_s64(out_buff[2], out_buff32[2], output_shift[out_ch + 2 + mult_tile]); - out_buff32[3] = - arm_nn_requantize_s64(out_buff[3], out_buff32[3], output_shift[out_ch + 3 + mult_tile]); - - out_buff32[0] = MIN(MAX(out_buff32[0], output_activation_min), output_activation_max); - out_buff32[1] = MIN(MAX(out_buff32[1], output_activation_min), output_activation_max); - out_buff32[2] = MIN(MAX(out_buff32[2], output_activation_min), output_activation_max); - out_buff32[3] = MIN(MAX(out_buff32[3], output_activation_min), output_activation_max); - - output[out_idx++] = (int16_t)out_buff32[0]; - output[out_idx++] = (int16_t)out_buff32[1]; - output[out_idx++] = (int16_t)out_buff32[2]; - output[out_idx++] = (int16_t)out_buff32[3]; - } - } - } - } -} - -static void depthwise_conv_s16_generic_s16(const int16_t *input, - const uint16_t input_batches, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_ch, - const int8_t *kernel, - const uint16_t ch_mult, - const uint16_t kernel_x, - const uint16_t kernel_y, - const uint16_t pad_x, - const uint16_t pad_y, - const uint16_t stride_x, - const uint16_t stride_y, - const int64_t *bias, - int16_t *output, - const int32_t *output_shift, - const int32_t *output_mult, - const uint16_t output_x, - const uint16_t output_y, - const int32_t output_activation_min, - const int32_t output_activation_max, - const uint16_t dilation_x, - const uint16_t dilation_y) - -{ - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { - for (int i_out_y = 0; i_out_y < output_y; i_out_y++) - { - const int16_t base_idx_y = (i_out_y * stride_y) - pad_y; - for (int i_out_x = 0; i_out_x < output_x; i_out_x++) - { - const int16_t base_idx_x = (i_out_x * stride_x) - pad_x; - for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++) - { - for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult++) - { - const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult; - - const q31_t reduced_multiplier = REDUCE_MULTIPLIER(output_mult[idx_out_ch]); - int64_t acc_0 = 0; - - int ker_y_start; - int ker_x_start; - int ker_y_end; - int ker_x_end; - - if (dilation_x > 1) - { - const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x; - ker_x_start = MAX(0, start_x_max); - const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x; - ker_x_end = MIN(kernel_x, end_min_x); - } - else - { - ker_x_start = MAX(0, -base_idx_x); - ker_x_end = MIN(kernel_x, input_x - base_idx_x); - } - - if (dilation_y > 1) - { - const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y; - ker_y_start = MAX(0, start_y_max); - const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y; - ker_y_end = MIN(kernel_y, end_min_y); - } - else - { - ker_y_start = MAX(0, -base_idx_y); - ker_y_end = MIN(kernel_y, input_y - base_idx_y); - } - - if (bias) - { - acc_0 = bias[idx_out_ch]; - } - - for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++) - { - const int32_t idx_y = base_idx_y + dilation_y * i_ker_y; - for (int i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++) - { - const int32_t idx_x = base_idx_x + dilation_x * i_ker_x; - int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch; - int32_t ker_idx_0 = (i_ker_y * kernel_x + i_ker_x) * (input_ch * ch_mult) + idx_out_ch; - - acc_0 += input[idx_0] * kernel[ker_idx_0]; - } - } - - /* Requantize and clamp output to provided range */ - int32_t result = arm_nn_requantize_s64(acc_0, reduced_multiplier, output_shift[idx_out_ch]); - result = MAX(result, output_activation_min); - result = MIN(result, output_activation_max); - *output++ = (int16_t)result; - } - } - } - } - /* Advance to the next batch */ - input += (input_x * input_y * input_ch); - } -} - -/* - * Basic s16 depthwise convolution function. - * - * Refer header file for details. - * - */ -arm_status arm_depthwise_conv_s16(const cmsis_nn_context *ctx, - const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q15_t *input, - const cmsis_nn_dims *filter_dims, - const q7_t *kernel, - const cmsis_nn_dims *bias_dims, - const int64_t *bias, - const cmsis_nn_dims *output_dims, - q15_t *output) -{ - const uint16_t dilation_x = dw_conv_params->dilation.w; - const uint16_t dilation_y = dw_conv_params->dilation.h; - - (void)bias_dims; - (void)ctx; - - depthwise_conv_s16_generic_s16(input, - input_dims->n, - input_dims->w, - input_dims->h, - input_dims->c, - kernel, - dw_conv_params->ch_mult, - filter_dims->w, - filter_dims->h, - dw_conv_params->padding.w, - dw_conv_params->padding.h, - dw_conv_params->stride.w, - dw_conv_params->stride.h, - bias, - output, - quant_params->shift, - quant_params->multiplier, - output_dims->w, - output_dims->h, - dw_conv_params->activation.min, - dw_conv_params->activation.max, - dilation_x, - dilation_y); - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c deleted file mode 100644 index 09e5847..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c +++ /dev/null @@ -1,347 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_depthwise_conv_s8.c - * Description: s8 version of depthwise convolution. - * - * $Date: 30. Dec 2021 - * $Revision: V.2.7.1 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -static void depthwise_conv_s8_mult_4(const int8_t *input, - const int32_t input_x, - const int32_t input_y, - const int32_t input_ch, - const int8_t *kernel, - const int32_t output_ch, - const int32_t ch_mult, - const int32_t kernel_x, - const int32_t kernel_y, - const int32_t pad_x, - const int32_t pad_y, - const int32_t stride_x, - const int32_t stride_y, - const int32_t *bias, - int8_t *output, - const int32_t *output_shift, - const int32_t *output_mult, - const int32_t output_x, - const int32_t output_y, - const int32_t output_offset, - const int32_t input_offset, - const int32_t output_activation_min, - const int32_t output_activation_max) -{ - for (int32_t in_h = -pad_y, out_h = 0, out_idx = 0; out_h < output_y; in_h += stride_y, ++out_h) - { - for (int32_t in_w = -pad_x, out_w = 0, ker_h_start = MAX(0, -in_h); out_w < output_x; in_w += stride_x, ++out_w) - { - for (int32_t in_ch = 0, out_ch = 0, ker_w_start = MAX(0, -in_w); out_ch < output_ch; - ++in_ch, out_ch += ch_mult) - { - for (int mult_tile = 0; mult_tile < ch_mult; mult_tile += 4) - { - int32_t out_buff[4] = {0, 0, 0, 0}; - if (bias) - { - out_buff[0] = bias[out_ch + 0 + mult_tile]; - out_buff[1] = bias[out_ch + 1 + mult_tile]; - out_buff[2] = bias[out_ch + 2 + mult_tile]; - out_buff[3] = bias[out_ch + 3 + mult_tile]; - } - - for (int32_t ker_h = ker_h_start; ker_h < MIN(kernel_y, input_y - in_h); ++ker_h) - { - int32_t ker_idx = ker_h * (output_ch * kernel_x) + ker_w_start * output_ch + out_ch; - int32_t in_idx = (in_h + ker_h) * (input_ch * input_x) + in_w * input_ch + in_ch; -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -#pragma clang loop unroll(disable) -#endif - for (int32_t ker_w = ker_w_start; ker_w < MIN(kernel_x, input_x - in_w); - ++ker_w, ker_idx += output_ch) - { - int32_t in_val = input[in_idx + ker_w * input_ch] + input_offset; - out_buff[0] += in_val * kernel[ker_idx + 0 + mult_tile]; - out_buff[1] += in_val * kernel[ker_idx + 1 + mult_tile]; - out_buff[2] += in_val * kernel[ker_idx + 2 + mult_tile]; - out_buff[3] += in_val * kernel[ker_idx + 3 + mult_tile]; - } - } -#if defined(ARM_MATH_MVEI) - (void)out_idx; - int32x4_t res = vldrwq_s32(out_buff); - res = arm_requantize_mve_32x4(res, - vldrwq_s32(&output_mult[out_ch + mult_tile]), - vldrwq_s32(&output_shift[out_ch + mult_tile])); - res = vaddq_n_s32(res, output_offset); - - res = vmaxq_s32(res, vdupq_n_s32(output_activation_min)); - res = vminq_s32(res, vdupq_n_s32(output_activation_max)); - vstrbq_s32(output, res); - output += 4; -#else - out_buff[0] = arm_nn_requantize( - out_buff[0], output_mult[out_ch + 0 + mult_tile], output_shift[out_ch + 0 + mult_tile]); - out_buff[1] = arm_nn_requantize( - out_buff[1], output_mult[out_ch + 1 + mult_tile], output_shift[out_ch + 1 + mult_tile]); - out_buff[2] = arm_nn_requantize( - out_buff[2], output_mult[out_ch + 2 + mult_tile], output_shift[out_ch + 2 + mult_tile]); - out_buff[3] = arm_nn_requantize( - out_buff[3], output_mult[out_ch + 3 + mult_tile], output_shift[out_ch + 3 + mult_tile]); - - out_buff[0] += output_offset; - out_buff[1] += output_offset; - out_buff[2] += output_offset; - out_buff[3] += output_offset; - - out_buff[0] = MIN(MAX(out_buff[0], output_activation_min), output_activation_max); - out_buff[1] = MIN(MAX(out_buff[1], output_activation_min), output_activation_max); - out_buff[2] = MIN(MAX(out_buff[2], output_activation_min), output_activation_max); - out_buff[3] = MIN(MAX(out_buff[3], output_activation_min), output_activation_max); - - output[out_idx++] = (int8_t)out_buff[0]; - output[out_idx++] = (int8_t)out_buff[1]; - output[out_idx++] = (int8_t)out_buff[2]; - output[out_idx++] = (int8_t)out_buff[3]; - -#endif - } - } - } - } -} - -static void depthwise_conv_s8_generic(const q7_t *input, - const uint16_t input_batches, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_ch, - const q7_t *kernel, - const uint16_t output_ch, - const uint16_t ch_mult, - const uint16_t kernel_x, - const uint16_t kernel_y, - const uint16_t pad_x, - const uint16_t pad_y, - const uint16_t stride_x, - const uint16_t stride_y, - const int32_t *bias, - q7_t *output, - const int32_t *output_shift, - const int32_t *output_mult, - const uint16_t output_x, - const uint16_t output_y, - const int32_t output_offset, - const int32_t input_offset, - const int32_t output_activation_min, - const int32_t output_activation_max, - const uint16_t dilation_x, - const uint16_t dilation_y) - -{ - (void)output_ch; - int i_out = 0; - int i_batch; - - for (i_batch = 0; i_batch < input_batches; i_batch++) - { - for (int i_out_y = 0; i_out_y < output_y; i_out_y++) - { - const int16_t base_idx_y = (i_out_y * stride_y) - pad_y; - for (int i_out_x = 0; i_out_x < output_x; i_out_x++) - { - const int16_t base_idx_x = (i_out_x * stride_x) - pad_x; - for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++) - { - for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult++) - { - const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult; - int32_t acc_0 = 0; - - int ker_y_start; - int ker_x_start; - int ker_y_end; - int ker_x_end; - - if (dilation_x > 1) - { - const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x; - ker_x_start = MAX(0, start_x_max); - const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x; - ker_x_end = MIN(kernel_x, end_min_x); - } - else - { - ker_x_start = MAX(0, -base_idx_x); - ker_x_end = MIN(kernel_x, input_x - base_idx_x); - } - - if (dilation_y > 1) - { - const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y; - ker_y_start = MAX(0, start_y_max); - const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y; - ker_y_end = MIN(kernel_y, end_min_y); - } - else - { - ker_y_start = MAX(0, -base_idx_y); - ker_y_end = MIN(kernel_y, input_y - base_idx_y); - } - - if (bias) - { - acc_0 = bias[idx_out_ch]; - } - - for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++) - { - const int32_t idx_y = base_idx_y + dilation_y * i_ker_y; - for (int i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++) - { - const int32_t idx_x = base_idx_x + dilation_x * i_ker_x; - int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch; - int32_t ker_idx_0 = (i_ker_y * kernel_x + i_ker_x) * (input_ch * ch_mult) + idx_out_ch; - - acc_0 += (input[idx_0] + input_offset) * kernel[ker_idx_0]; - } - } - - /* Requantize and clamp output to provided range */ - acc_0 = arm_nn_requantize(acc_0, output_mult[idx_out_ch], output_shift[idx_out_ch]); - acc_0 += output_offset; - acc_0 = MAX(acc_0, output_activation_min); - acc_0 = MIN(acc_0, output_activation_max); - - output[i_out++] = acc_0; - } - } - } - } - /* Advance to the next batch */ - input += (input_x * input_y * input_ch); - } -} - -/* - * Basic s8 depthwise convolution function. - * - * Refer header file for details. - * Optimization using DSP extension is not available for the generic case where channel multiplier is > 1. - * - */ -arm_status arm_depthwise_conv_s8(const cmsis_nn_context *ctx, - const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input, - const cmsis_nn_dims *filter_dims, - const q7_t *kernel, - const cmsis_nn_dims *bias_dims, - const int32_t *bias, - const cmsis_nn_dims *output_dims, - q7_t *output) -{ - const uint16_t dilation_x = dw_conv_params->dilation.w; - const uint16_t dilation_y = dw_conv_params->dilation.h; - - (void)dw_conv_params->dilation; - (void)bias_dims; - (void)ctx; - - if (dw_conv_params->ch_mult % 4 == 0 && input_dims->n == 1 && dw_conv_params->dilation.w == 1 && - dw_conv_params->dilation.h == 1) - { - depthwise_conv_s8_mult_4(input, - input_dims->w, - input_dims->h, - input_dims->c, - kernel, - output_dims->c, - dw_conv_params->ch_mult, - filter_dims->w, - filter_dims->h, - dw_conv_params->padding.w, - dw_conv_params->padding.h, - dw_conv_params->stride.w, - dw_conv_params->stride.h, - bias, - output, - quant_params->shift, - quant_params->multiplier, - output_dims->w, - output_dims->h, - dw_conv_params->output_offset, - dw_conv_params->input_offset, - dw_conv_params->activation.min, - dw_conv_params->activation.max); - } - else - { - depthwise_conv_s8_generic(input, - input_dims->n, - input_dims->w, - input_dims->h, - input_dims->c, - kernel, - output_dims->c, - dw_conv_params->ch_mult, - filter_dims->w, - filter_dims->h, - dw_conv_params->padding.w, - dw_conv_params->padding.h, - dw_conv_params->stride.w, - dw_conv_params->stride.h, - bias, - output, - quant_params->shift, - quant_params->multiplier, - output_dims->w, - output_dims->h, - dw_conv_params->output_offset, - dw_conv_params->input_offset, - dw_conv_params->activation.min, - dw_conv_params->activation.max, - dilation_x, - dilation_y); - } - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c deleted file mode 100644 index 6987d7c..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c +++ /dev/null @@ -1,433 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_depthwise_conv_s8_opt.c - * Description: Optimized s8 depthwise separable convolution function for - * channel multiplier of 1. - * - * $Date: January 26, 2021 - * $Revision: V.2.0.3 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * Optimized s8 depthwise convolution function with constraint that in_channel equals out_channel - * - * Refer prototype header file for details. - * - */ - -arm_status arm_depthwise_conv_s8_opt(const cmsis_nn_context *ctx, - const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input, - const cmsis_nn_dims *filter_dims, - const q7_t *kernel, - const cmsis_nn_dims *bias_dims, - const int32_t *bias, - const cmsis_nn_dims *output_dims, - q7_t *output) -{ - - const int32_t input_ch = input_dims->c; - const int32_t output_ch = output_dims->c; - - /* Check input constraints input_ch == output_ch */ - if (input_ch != output_ch) - { - return ARM_MATH_SIZE_MISMATCH; - } - - if (ctx->buf == NULL && arm_depthwise_conv_s8_opt_get_buffer_size(input_dims, filter_dims) > 0) - { - return ARM_MATH_ARGUMENT_ERROR; - } -#ifdef ARM_MATH_DSP - const int32_t input_x = input_dims->w; - const int32_t input_y = input_dims->h; - const int32_t kernel_x = filter_dims->w; - const int32_t kernel_y = filter_dims->h; - const int32_t pad_x = dw_conv_params->padding.w; - const int32_t pad_y = dw_conv_params->padding.h; - const int32_t stride_x = dw_conv_params->stride.w; - const int32_t stride_y = dw_conv_params->stride.h; - const int32_t *output_shift = quant_params->shift; - const int32_t *output_mult = quant_params->multiplier; - const int32_t output_x = output_dims->w; - const int32_t output_y = output_dims->h; - const int32_t output_offset = dw_conv_params->output_offset; - const int32_t input_offset = dw_conv_params->input_offset; - const int32_t output_activation_min = dw_conv_params->activation.min; - const int32_t output_activation_max = dw_conv_params->activation.max; - q15_t *buffer_a = (q15_t *)ctx->buf; - -#ifdef ARM_MATH_MVEI - (void)bias_dims; - /* Generate two columns from the input tensor */ - q7_t *lhs_buffer = (q7_t *)buffer_a; - q7_t *out = output; - int padded = 0; - int buffer_count = 0; - const int32_t kernel_size = kernel_x * kernel_y; - - /* This part implements the im2col function */ - for (int i_out_y = 0, base_idx_y = -pad_y; i_out_y < output_y; base_idx_y += stride_y, i_out_y++) - { - for (int i_out_x = 0, base_idx_x = -pad_x; i_out_x < output_x; base_idx_x += stride_x, i_out_x++) - { - for (int i_ker_y = base_idx_y; i_ker_y < base_idx_y + kernel_y; i_ker_y++) - { - for (int i_ker_x = base_idx_x; i_ker_x < base_idx_x + kernel_x; i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= input_y || i_ker_x < 0 || i_ker_x >= input_x) - { - arm_memset_q7(lhs_buffer, (int8_t)-input_offset, (uint32_t)input_ch); - padded = 1; - } - else - { - arm_memcpy_q7(lhs_buffer, input + (i_ker_y * input_x + i_ker_x) * input_ch, (uint32_t)input_ch); - } - lhs_buffer += input_ch; - } - } - buffer_count++; - - if (buffer_count == 4) - { - lhs_buffer = (q7_t *)buffer_a; - if (padded == 0) - { - out = arm_nn_depthwise_conv_nt_t_s8(lhs_buffer, - kernel, - input_offset, - input_ch, - output_shift, - output_mult, - output_offset, - output_activation_min, - output_activation_max, - kernel_size, - bias, - out); - } - else - { - out = arm_nn_depthwise_conv_nt_t_padded_s8(lhs_buffer, - kernel, - input_offset, - input_ch, - output_shift, - output_mult, - output_offset, - output_activation_min, - output_activation_max, - kernel_size, - bias, - out); - padded = 0; - } - buffer_count = 0; - } - } - } - - /* Handle left over buffers */ - lhs_buffer = (q7_t *)buffer_a; - - for (int i_buf = 0; i_buf < buffer_count; i_buf++) - { - int32_t loop_count = (input_ch + 3) / 4; - - int32_t num_ch_to_process = input_ch; - for (int i_loop_cnt = 0, offset = 0; i_loop_cnt < loop_count; num_ch_to_process -= 4, offset += 4, i_loop_cnt++) - { - const int8_t *col_0 = lhs_buffer + (kernel_size * input_ch * i_buf) + offset; - const int8_t *row_0 = kernel + offset; - int32x4_t out_0 = vldrwq_s32(&bias[offset]); - - for (int i_ker = 0; i_ker < kernel_size; i_ker++) - { - const int32x4_t ker_0 = vldrbq_s32(row_0); - - int32x4_t ip_0 = vldrbq_s32(col_0); - ip_0 = vaddq_n_s32(ip_0, input_offset); - out_0 += vmulq_s32(ip_0, ker_0); - - col_0 += input_ch; - row_0 += input_ch; - } - - const int32x4_t mult = vldrwq_s32(&output_mult[offset]); - const int32x4_t shift = vldrwq_s32(&output_shift[offset]); - - out_0 = arm_requantize_mve_32x4(out_0, mult, shift); - out_0 = vaddq_n_s32(out_0, output_offset); - out_0 = vmaxq_s32(out_0, vdupq_n_s32(output_activation_min)); - out_0 = vminq_s32(out_0, vdupq_n_s32(output_activation_max)); - mve_pred16_t p = vctp32q((uint32_t)num_ch_to_process); - vstrbq_p_s32(out, out_0, p); - - out += 4; - } - - const int tail_ch = input_ch & 0x3; - if (tail_ch != 0) - { - out -= (4 - tail_ch); - } - } - -#else // ARM_MATH_DSP - (void)bias_dims; - /* Run the following code in cores using DSP extension */ - q15_t *const col_buffer_start = buffer_a; - q15_t *col_buffer = col_buffer_start; - const int32_t *const bias_start_pos = bias; - const q31_t *const out_mult_start_pos = output_mult; - const q31_t *const out_shift_start_pos = output_shift; - uint16_t row_count; - uint16_t row_shift; - - for (int i_out_y = 0; i_out_y < output_y; i_out_y++) - { - const int16_t base_idx_y = (i_out_y * stride_y) - pad_y; - for (int i_out_x = 0; i_out_x < output_x; i_out_x++) - { - const int16_t base_idx_x = (i_out_x * stride_x) - pad_x; - - /* Out of bounds is only considered for the y axis as it provides a contiguous zero'ing opportunity than - along the x axis */ - const int ker_y_start = MAX(0, -base_idx_y); - /* Condition for kernel end dimension: (base_idx_y + ker_y_end) < input_y */ - const int ker_y_end = MIN(kernel_y, input_y - base_idx_y); - - int32_t index = 0; - if (ker_y_start != 0) - { - memset(&col_buffer[index], 0, (kernel_x * input_ch) * ker_y_start * sizeof(q15_t)); - index += (kernel_x * input_ch) * ker_y_start; - } - - for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++) - { - const int32_t idx_y = base_idx_y + i_ker_y; - - for (int i_ker_x = 0; i_ker_x < kernel_x; i_ker_x++) - { - const int32_t idx_x = base_idx_x + i_ker_x; - if (idx_x < 0 || idx_x >= input_x) - { - memset(&col_buffer[index], 0, input_ch * sizeof(q15_t)); - } - else - { - arm_q7_to_q15_with_offset((q7_t *)input + (idx_y * input_x + idx_x) * input_ch, - &col_buffer[index], - input_ch, - input_offset); - } - index += input_ch; - } - } - - const int diff = kernel_y - ker_y_end; - if (diff != 0) - { - memset(&col_buffer[index], 0, (kernel_x * input_ch) * diff * sizeof(q15_t)); - } - - row_count = output_ch / 4; - row_shift = 0; - bias = bias_start_pos; - output_mult = out_mult_start_pos; - output_shift = out_shift_start_pos; - - while (row_count) - { - q31_t sum = *bias++; - q31_t sum_2 = *bias++; - q31_t sum_3 = *bias++; - q31_t sum_4 = *bias++; - - uint16_t col_count = (kernel_x * kernel_y) / 2; - q15_t *col_pos = col_buffer_start + row_shift; - const q7_t *row_pos = kernel + row_shift; - row_shift += 4; - - while (col_count) - { - /* General idea is to read 4 + 4 (input, kernel) pair and re-arrange them in the right order to - use in a SMLAD instruction . One run of this loop produces 4 partial outputs with 8 MACs. */ - /* Note: variable names can be improved here to align with rows and columns. */ - q31_t ip_a1, ip_a2, ip_b1, ip_b2, op_a, op_b, op_c; - /* Read 4 weights */ - ip_b1 = arm_nn_read_q7x4(row_pos); - ip_a1 = arm_nn_read_q7x4(row_pos + input_ch); - op_a = arm_nn_read_q15x2(col_pos); - op_b = arm_nn_read_q15x2(col_pos + input_ch); - - ip_a2 = __SXTB16(ip_b1); - ip_b1 = __SXTB16(__ROR(ip_b1, 8)); - - ip_b2 = __SXTB16(ip_a1); - ip_a1 = __SXTB16(__ROR(ip_a1, 8)); - - op_c = __PKHBT(op_b, op_a, 16); - op_a = __PKHTB(op_b, op_a, 16); - op_b = __PKHBT(ip_b2, ip_a2, 16); - sum = __SMLAD(op_c, op_b, sum); - - op_b = __PKHBT(ip_b1, ip_a1, 16); - sum_2 = __SMLAD(op_a, op_b, sum_2); - - op_a = arm_nn_read_q15x2(col_pos + 2); - op_b = arm_nn_read_q15x2(col_pos + input_ch + 2); - - op_c = __PKHBT(op_b, op_a, 16); - op_a = __PKHTB(op_b, op_a, 16); - op_b = __PKHTB(ip_a2, ip_b2, 16); - sum_3 = __SMLAD(op_c, op_b, sum_3); - - op_b = __PKHTB(ip_a1, ip_b1, 16); - sum_4 = __SMLAD(op_a, op_b, sum_4); - - row_pos += input_ch << 1; - col_pos += input_ch << 1; - col_count--; - } - - col_count = (kernel_x * kernel_y) & 0x1; - while (col_count) - { - sum += row_pos[0] * col_pos[0]; - sum_2 += row_pos[1] * col_pos[1]; - sum_3 += row_pos[2] * col_pos[2]; - sum_4 += row_pos[3] * col_pos[3]; - - row_pos += input_ch; - col_pos += input_ch; - - col_count--; - } - sum = arm_nn_requantize(sum, *output_mult++, *output_shift++); - sum += output_offset; - sum = MAX(sum, output_activation_min); - sum = MIN(sum, output_activation_max); - *output++ = (q7_t)sum; - - sum_2 = arm_nn_requantize(sum_2, *output_mult++, *output_shift++); - sum_2 += output_offset; - sum_2 = MAX(sum_2, output_activation_min); - sum_2 = MIN(sum_2, output_activation_max); - *output++ = (q7_t)sum_2; - sum_3 = arm_nn_requantize(sum_3, *output_mult++, *output_shift++); - sum_3 += output_offset; - sum_3 = MAX(sum_3, output_activation_min); - sum_3 = MIN(sum_3, output_activation_max); - *output++ = (q7_t)sum_3; - - sum_4 = arm_nn_requantize(sum_4, *output_mult++, *output_shift++); - sum_4 += output_offset; - sum_4 = MAX(sum_4, output_activation_min); - sum_4 = MIN(sum_4, output_activation_max); - *output++ = (q7_t)sum_4; - - row_count--; - } - - row_count = output_ch & 0x3; - while (row_count) - { - q15_t *col_pos = col_buffer_start + row_shift; - const q7_t *row_pos = kernel + row_shift; - q31_t sum = *bias++; - const uint16_t col_count = (kernel_x * kernel_y); - row_shift += 1; - - for (int i = 0; i < col_count; i++) - { - sum += row_pos[i * input_ch] * col_pos[i * input_ch]; - } - sum = arm_nn_requantize(sum, *output_mult++, *output_shift++); - sum += output_offset; - sum = MAX(sum, output_activation_min); - sum = MIN(sum, output_activation_max); - *output++ = (q7_t)sum; - - row_count--; - } - - // clear counter and pointers - col_buffer = col_buffer_start; - } - } -#endif -#else - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - return arm_depthwise_conv_s8(ctx, - dw_conv_params, - quant_params, - input_dims, - input, - filter_dims, - kernel, - bias_dims, - bias, - output_dims, - output); -#endif /* ARM_MATH_MVEI | ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -int32_t arm_depthwise_conv_s8_opt_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims) -{ -#if defined(ARM_MATH_MVEI) - /* The + 4 accounts for out of bounds read of the lhs buffers in the *_nt_t_* functions. */ - return (2 * input_dims->c * filter_dims->w * filter_dims->h) * (int32_t)sizeof(int16_t) + 4; -#elif defined(ARM_MATH_DSP) - return (input_dims->c * filter_dims->w * filter_dims->h) * sizeof(int16_t); -#else - (void)input_dims; - (void)filter_dims; - return 0; -#endif -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c deleted file mode 100644 index 558f164..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c +++ /dev/null @@ -1,336 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_depthwise_conv_u8_basic_ver1.c - * Description: u8 depthwise convolution function - * - * $Date: 09. October 2020 - * $Revision: V.1.1.1 - * - * Target : Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -static void depthwise_conv_u8_mult_4(const uint8_t *input, - const int32_t input_x, - const int32_t input_y, - const int32_t input_ch, - const uint8_t *kernel, - const int32_t output_ch, - const int32_t ch_mult, - const int32_t kernel_x, - const int32_t kernel_y, - const int32_t pad_x, - const int32_t pad_y, - const int32_t stride_x, - const int32_t stride_y, - const int32_t *bias, - uint8_t *output, - const int32_t output_shift, - const int32_t output_mult, - const int32_t output_x, - const int32_t output_y, - const int32_t output_offset, - const int32_t input_offset, - const int32_t filter_offset, - const int32_t output_activation_min, - const int32_t output_activation_max) -{ - for (int32_t in_h = -pad_y, out_h = 0, out_idx = 0; out_h < output_y; in_h += stride_y, ++out_h) - { - for (int32_t in_w = -pad_x, out_w = 0, ker_h_start = MAX(0, -in_h); out_w < output_x; in_w += stride_x, ++out_w) - { - for (int32_t in_ch = 0, out_ch = 0, ker_w_start = MAX(0, -in_w); out_ch < output_ch; - ++in_ch, out_ch += ch_mult) - { - for (int mult_tile = 0; mult_tile < ch_mult; mult_tile += 4) - { - int32_t out_buff[4]; - - out_buff[0] = 0; - out_buff[1] = 0; - out_buff[2] = 0; - out_buff[3] = 0; - - for (int32_t ker_h = ker_h_start; ker_h < MIN(kernel_y, input_y - in_h); ++ker_h) - { - int32_t ker_idx = ker_h * (output_ch * kernel_x) + ker_w_start * output_ch + out_ch; - int32_t in_idx = (in_h + ker_h) * (input_ch * input_x) + in_w * input_ch + in_ch; - - for (int32_t ker_w = ker_w_start; ker_w < MIN(kernel_x, input_x - in_w); - ++ker_w, ker_idx += output_ch) - { - int32_t in_val = input[in_idx + ker_w * input_ch] + input_offset; - out_buff[0] += in_val * (kernel[ker_idx + 0 + mult_tile] + filter_offset); - out_buff[1] += in_val * (kernel[ker_idx + 1 + mult_tile] + filter_offset); - out_buff[2] += in_val * (kernel[ker_idx + 2 + mult_tile] + filter_offset); - out_buff[3] += in_val * (kernel[ker_idx + 3 + mult_tile] + filter_offset); - } - } - - if (bias != NULL) - { - out_buff[0] += bias[out_ch + 0 + mult_tile]; - out_buff[1] += bias[out_ch + 1 + mult_tile]; - out_buff[2] += bias[out_ch + 2 + mult_tile]; - out_buff[3] += bias[out_ch + 3 + mult_tile]; - } - out_buff[0] = arm_nn_requantize(out_buff[0], output_mult, output_shift); - out_buff[1] = arm_nn_requantize(out_buff[1], output_mult, output_shift); - out_buff[2] = arm_nn_requantize(out_buff[2], output_mult, output_shift); - out_buff[3] = arm_nn_requantize(out_buff[3], output_mult, output_shift); - - out_buff[0] += output_offset; - out_buff[1] += output_offset; - out_buff[2] += output_offset; - out_buff[3] += output_offset; - - out_buff[0] = MIN(MAX(out_buff[0], output_activation_min), output_activation_max); - out_buff[1] = MIN(MAX(out_buff[1], output_activation_min), output_activation_max); - out_buff[2] = MIN(MAX(out_buff[2], output_activation_min), output_activation_max); - out_buff[3] = MIN(MAX(out_buff[3], output_activation_min), output_activation_max); - - output[out_idx++] = (uint8_t)out_buff[0]; - output[out_idx++] = (uint8_t)out_buff[1]; - output[out_idx++] = (uint8_t)out_buff[2]; - output[out_idx++] = (uint8_t)out_buff[3]; - } - } - } - } -} - -static void depthwise_conv_u8_generic(const uint8_t *input, - const int32_t input_x, - const int32_t input_y, - const int32_t input_ch, - const uint8_t *kernel, - const int32_t output_ch, - const int32_t ch_mult, - const int32_t kernel_x, - const int32_t kernel_y, - const int32_t pad_x, - const int32_t pad_y, - const int32_t stride_x, - const int32_t stride_y, - const int32_t *bias, - uint8_t *output, - const int32_t output_shift, - const int32_t output_mult, - const int32_t output_x, - const int32_t output_y, - const int32_t output_offset, - const int32_t input_offset, - const int32_t filter_offset, - const int32_t output_activation_min, - const int32_t output_activation_max) -{ - (void)output_ch; - int i_out = 0; - for (int i_out_y = 0; i_out_y < output_y; i_out_y++) - { - const int16_t base_idx_y = (i_out_y * stride_y) - pad_y; - for (int i_out_x = 0; i_out_x < output_x; i_out_x++) - { - const int16_t base_idx_x = (i_out_x * stride_x) - pad_x; - for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++) - { - for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult++) - { - const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult; - int32_t acc_0; - /* Condition for kernel start dimension: (base_idx_ + ker__start) >= 0 */ - const int ker_y_start = MAX(0, -base_idx_y); - const int ker_x_start = MAX(0, -base_idx_x); - /* Condition for kernel end dimension: (base_idx_ + ker__end) < input_ */ - const int ker_y_end = MIN(kernel_y, input_y - base_idx_y); - const int ker_x_end = MIN(kernel_x, input_x - base_idx_x); - acc_0 = 0; - - for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++) - { - const int32_t idx_y = base_idx_y + i_ker_y; - for (int i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++) - { - const int32_t idx_x = base_idx_x + i_ker_x; - int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch; - int32_t ker_idx_0 = (i_ker_y * kernel_x + i_ker_x) * (input_ch * ch_mult) + idx_out_ch; - - acc_0 += (input[idx_0] + input_offset) * (kernel[ker_idx_0] + filter_offset); - } - } - if (bias != NULL) - { - acc_0 += bias[idx_out_ch]; - } - - /* Requantize and clamp output to provided range */ - acc_0 = arm_nn_requantize(acc_0, output_mult, output_shift); - acc_0 += output_offset; - acc_0 = MAX(acc_0, output_activation_min); - acc_0 = MIN(acc_0, output_activation_max); - - output[i_out++] = acc_0; - } - } - } - } -} - -/** - * @brief uint8 depthwise convolution function with asymmetric quantization - * - * @param[in] input Pointer to input tensor - * @param[in] input_x Width of input tensor - * @param[in] input_y Height of input tensor - * @param[in] input_ch Channels in input tensor - * @param[in] kernel Pointer to kernel weights - * @param[in] kernel_x Width of kernel - * @param[in] kernel_y Height of kernel - * @param[in] ch_mult Number of channel multiplier - * @param[in] pad_x Padding sizes x - * @param[in] pad_y Padding sizes y - * @param[in] stride_x Convolution stride along the width - * @param[in] stride_y Convolution stride along the height - * @param[in] dilation_x Dilation along width. Not used and intended for future enhancement. - * @param[in] dilation_y Dilation along height. Not used and intended for future enhancement. - * @param[in] bias Pointer to optional bias values. If no bias is - * available, NULL is expected - * @param[in] input_offset Input tensor zero offset - * @param[in] filter_offset Kernel tensor zero offset - * @param[in] output_offset Output tensor zero offset - * @param[in,out] output Pointer to output tensor - * @param[in] output_x Width of output tensor - * @param[in] output_y Height of output tensor - * @param[in] output_activation_min Minimum value to clamp the output to. Range : {0, 255} - * @param[in] output_activation_max Minimum value to clamp the output to. Range : {0, 255} - * @param[in] output_shift Amount of right-shift for output - * @param[in] output_mult Output multiplier for requantization - * @return The function returns one of the following - * ARM_MATH_SIZE_MISMATCH - Not supported dimension of tensors - * ARM_MATH_SUCCESS - Successful operation - * ARM_MATH_ARGUMENT_ERROR - Implementation not available - * - * - */ - -arm_status arm_depthwise_conv_u8_basic_ver1(const uint8_t *input, - const uint16_t input_x, - const uint16_t input_y, - const uint16_t input_ch, - const uint8_t *kernel, - const uint16_t kernel_x, - const uint16_t kernel_y, - const int16_t ch_mult, - const int16_t pad_x, - const int16_t pad_y, - const int16_t stride_x, - const int16_t stride_y, - const int16_t dilation_x, - const int16_t dilation_y, - const int32_t *bias, - const int32_t input_offset, - const int32_t filter_offset, - const int32_t output_offset, - uint8_t *output, - const uint16_t output_x, - const uint16_t output_y, - const int32_t output_activation_min, - const int32_t output_activation_max, - const int32_t output_shift, - const int32_t output_mult) -{ - (void)dilation_x; - (void)dilation_y; - - if (ch_mult % 4 == 0) - { - depthwise_conv_u8_mult_4(input, - input_x, - input_y, - input_ch, - kernel, - ch_mult * input_ch, - ch_mult, - kernel_x, - kernel_y, - pad_x, - pad_y, - stride_x, - stride_y, - bias, - output, - output_shift, - output_mult, - output_x, - output_y, - output_offset, - input_offset, - filter_offset, - output_activation_min, - output_activation_max); - } - else - { - depthwise_conv_u8_generic(input, - input_x, - input_y, - input_ch, - kernel, - ch_mult * input_ch, - ch_mult, - kernel_x, - kernel_y, - pad_x, - pad_y, - stride_x, - stride_y, - bias, - output, - output_shift, - output_mult, - output_x, - output_y, - output_offset, - input_offset, - filter_offset, - output_activation_min, - output_activation_max); - } - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c deleted file mode 100644 index 7747bda..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_depthwise_conv_wrapper_s8.c - * Description: Wrapper API to select appropriate depthwise conv API based - * on dimensions. - * - * $Date: 20. Dec 2021 - * $Revision: V.1.4.0 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/* - * s8 Depthwise conv wrapper function - * - * Refer header file for details. - * - */ -arm_status arm_depthwise_conv_wrapper_s8(const cmsis_nn_context *ctx, - const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input, - const cmsis_nn_dims *filter_dims, - const q7_t *filter, - const cmsis_nn_dims *bias_dims, - const int32_t *bias, - const cmsis_nn_dims *output_dims, - q7_t *output) -{ - arm_status status = ARM_MATH_SUCCESS; - if (1 == dw_conv_params->ch_mult && input_dims->n == 1 && dw_conv_params->dilation.w == 1 && - dw_conv_params->dilation.h == 1) - { -#if !defined(ARM_MATH_MVEI) - if ((filter_dims->w == 3) && (filter_dims->h == 3) && (dw_conv_params->padding.h <= 1) && - (dw_conv_params->padding.w <= 1)) - { - status = arm_depthwise_conv_3x3_s8(ctx, - dw_conv_params, - quant_params, - input_dims, - input, - filter_dims, - filter, - bias_dims, - bias, - output_dims, - output); - } - else -#endif - { - status = arm_depthwise_conv_s8_opt(ctx, - dw_conv_params, - quant_params, - input_dims, - input, - filter_dims, - filter, - bias_dims, - bias, - output_dims, - output); - } - } - else - { - status = arm_depthwise_conv_s8(ctx, - dw_conv_params, - quant_params, - input_dims, - input, - filter_dims, - filter, - bias_dims, - bias, - output_dims, - output); - } - - /* Return to application */ - return status; -} - -int32_t arm_depthwise_conv_wrapper_s8_get_buffer_size(const cmsis_nn_dw_conv_params *dw_conv_params, - const cmsis_nn_dims *input_dims, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims) -{ - (void)dw_conv_params; - int32_t size = 0; - - if (input_dims->c == output_dims->c && input_dims->n == 1 && dw_conv_params->dilation.w == 1 && - dw_conv_params->dilation.h == 1) - { - size = arm_depthwise_conv_s8_opt_get_buffer_size(input_dims, filter_dims); - } - - return size; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c deleted file mode 100644 index fe4a3d3..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c +++ /dev/null @@ -1,422 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_depthwise_separable_conv_HWC_q7.c - * Description: Q7 depthwise separable convolution function - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Q7 depthwise separable convolution function - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimension - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * @details - * - * Buffer size: - * - * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel - * - * bufferB size: 0 - * - * Input dimension constraints: - * - * ch_im_in equals ch_im_out - * - * Implementation: - * There are 3 nested loop here: - * Inner loop: calculate each output value with MAC instruction over an accumulator - * Mid loop: loop over different output channel - * Outer loop: loop over different output (x, y) - */ - -arm_status arm_depthwise_separable_conv_HWC_q7(const q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out, - q15_t *bufferA, - q7_t *bufferB) -{ - (void)bufferB; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - int16_t i_out_y, i_out_x; - int16_t i_ker_y, i_ker_x; - q7_t *colBuffer = (q7_t *)bufferA; - q7_t *pBuffer = colBuffer; - const q7_t *pBias = bias; - q7_t *pOut = Im_out; - uint16_t rowCnt; - uint16_t row_shift; - - /* do some checking here, basically ch_im_in == ch_im_out */ - if (ch_im_in != ch_im_out) - { - return ARM_MATH_SIZE_MISMATCH; - } - - for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++) - { - /* we first do im2col here */ - for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++) - { - for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in) - { - /* arm_fill_q7(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, ch_im_in); - } - else - { - /* arm_copy_q7((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); - */ - memcpy(pBuffer, (q7_t *)Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - /* we will do the computation here for each channel */ - rowCnt = ch_im_out >> 2; - row_shift = 0; - pBias = bias; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = (dim_kernel * dim_kernel) >> 1; - q7_t *pB = colBuffer + row_shift; - const q7_t *pA = wt + row_shift; - row_shift += 4; - -#ifdef USE_INTRINSIC - -#ifndef ARM_MATH_BIG_ENDIAN - - while (colCnt) - { - q31_t inA1, inA2, inB1, inB2, opA, opB; - - inB1 = arm_nn_read_q7x4(pB); - pB += ch_im_in; - opB = arm_nn_read_q7x4(pB); - pB += ch_im_in; - inB2 = __PKHTB(opB, inB1, 16); - inB1 = __PKHBT(inB1, opB, 16); - inA1 = arm_nn_read_q7x4(pA); - pA += ch_im_in; - opB = arm_nn_read_q7x4(pA); - pA += ch_im_in; - inA2 = __PKHTB(opB, inA1, 16); - inA1 = __PKHBT(inA1, opB, 16); - opA = __SXTB16(inA1); - opB = __SXTB16(inB1); - sum = __SMLAD(opA, opB, sum); - opA = __SXTB16(__ROR(inA1, 8)); - opB = __SXTB16(__ROR(inB1, 8)); - sum2 = __SMLAD(opA, opB, sum2); - opA = __SXTB16(inA2); - opB = __SXTB16(inB2); - sum3 = __SMLAD(opA, opB, sum3); - opA = __SXTB16(__ROR(inA2, 8)); - opB = __SXTB16(__ROR(inB2, 8)); - sum4 = __SMLAD(opA, opB, sum4); - colCnt--; - } -#else - - while (colCnt) - { - q31_t inA1, inA2, inB1, inB2, opA, opB; - - inB1 = arm_nn_read_q7x4(pB); - pB += ch_im_in; - opB = arm_nn_read_q7x4(pB); - pB += ch_im_in; - inB2 = __PKHBT(opB, inB1, 16); - inB1 = __PKHTB(inB1, opB, 16); - inA1 = arm_nn_read_q7x4(pA); - pA += ch_im_in; - opB = arm_nn_read_q7x4(pA); - pA += ch_im_in; - inA2 = __PKHBT(opB, inA1, 16); - inA1 = __PKHTB(inA1, opB, 16); - opA = __SXTB16(inA1); - opB = __SXTB16(inB1); - sum2 = __SMLAD(opA, opB, sum2); - opA = __SXTB16(__ROR(inA1, 8)); - opB = __SXTB16(__ROR(inB1, 8)); - sum = __SMLAD(opA, opB, sum); - opA = __SXTB16(inA2); - opB = __SXTB16(inB2); - sum4 = __SMLAD(opA, opB, sum4); - opA = __SXTB16(__ROR(inA2, 8)); - opB = __SXTB16(__ROR(inB2, 8)); - sum3 = __SMLAD(opA, opB, sum3); - colCnt--; - } - -#endif /* ARM_MATH_BIG_ENDIAN */ - -#else - -#ifndef ARM_MATH_BIG_ENDIAN - /* - * r0 r1 r2 r3 r4 r5 - * inA1, inA2, inB1, inB2, opA, opB - */ - - asm volatile("COL_LOOP_%=:\n" - "ldr.w r2, [%[pB], #0]\n" - "add.w %[pB], %[pB], %[ch_im_in]\n" - "ldr.w r5, [%[pB], #0]\n" - "add.w %[pB], %[pB], %[ch_im_in]\n" - "pkhtb r3, r5, r2, ASR #16\n" - "pkhbt r2, r2, r5, LSL #16\n" - "ldr.w r0, [%[pA], #0]\n" - "add.w %[pA], %[pA], %[ch_im_in]\n" - "ldr.w r5, [%[pA], #0]\n" - "add.w %[pA], %[pA], %[ch_im_in]\n" - "pkhtb r1, r5, r0, ASR #16\n" - "pkhbt r0, r0, r5, LSL #16\n" - "sxtb16 r4, r0\n" - "sxtb16 r5, r2\n" - "smlad %[sum], r4, r5, %[sum]\n" - "mov.w r4, r0, ror #8\n" - "mov.w r5, r2, ror #8\n" - "sxtb16 r4, r4\n" - "sxtb16 r5, r5\n" - "smlad %[sum2], r4, r5, %[sum2]\n" - "sxtb16 r4, r1\n" - "sxtb16 r5, r3\n" - "smlad %[sum3], r4, r5, %[sum3]\n" - "mov.w r4, r1, ror #8\n" - "mov.w r5, r3, ror #8\n" - "sxtb16 r4, r4\n" - "sxtb16 r5, r5\n" - "smlad %[sum4], r4, r5, %[sum4]\n" - "subs %[colCnt], #1\n" - "bne COL_LOOP_%=\n" - : [ sum ] "+r"(sum), - [ sum2 ] "+r"(sum2), - [ sum3 ] "+r"(sum3), - [ sum4 ] "+r"(sum4), - [ pB ] "+r"(pB), - [ pA ] "+r"(pA) - : [ colCnt ] "r"(colCnt), [ ch_im_in ] "r"(ch_im_in) - : "r0", "r1", "r2", "r3", "r4", "r5"); -#else - /* - * r0 r1 r2 r3 r4 r5 - * inA1, inA2, inB1, inB2, opA, opB - */ - asm volatile("COL_LOOP_%=:\n" - "ldr.w r2, [%[pB], #0]\n" - "add.w %[pB], %[pB], %[ch_im_in]\n" - "ldr.w r5, [%[pB], #0]\n" - "add.w %[pB], %[pB], %[ch_im_in]\n" - "pkhbt r3, r5, r2, LSL #16\n" - "pkhtb r2, r2, r5, ASR #16\n" - "ldr.w r0, [%[pA], #0]\n" - "add.w %[pA], %[pA], %[ch_im_in]\n" - "ldr.w r5, [%[pA], #0]\n" - "add.w %[pA], %[pA], %[ch_im_in]\n" - "pkhbt r1, r5, r0, LSL #16\n" - "pkhtb r0, r0, r5, ASR #16\n" - "sxtb16 r4, r0\n" - "sxtb16 r5, r2\n" - "smlad %[sum2], r4, r5, %[sum2]\n" - "mov.w r4, r0, ror #8\n" - "mov.w r5, r2, ror #8\n" - "sxtb16 r4, r4\n" - "sxtb16 r5, r5\n" - "smlad %[sum], r4, r5, %[sum]\n" - "sxtb16 r4, r1\n" - "sxtb16 r5, r3\n" - "smlad %[sum4], r4, r5, %[sum4]\n" - "mov.w r4, r1, ror #8\n" - "mov.w r5, r3, ror #8\n" - "sxtb16 r4, r4\n" - "sxtb16 r5, r5\n" - "smlad %[sum3], r4, r5, %[sum3]\n" - "subs %[colCnt], #1\n" - "bne COL_LOOP_%=\n" - : [ sum ] "+r"(sum), - [ sum2 ] "+r"(sum2), - [ sum3 ] "+r"(sum3), - [ sum4 ] "+r"(sum4), - [ pB ] "+r"(pB), - [ pA ] "+r"(pA) - : [ colCnt ] "r"(colCnt), [ ch_im_in ] "r"(ch_im_in) - : "r0", "r1", "r2", "r3", "r4", "r5"); - -#endif /* ARM_MATH_BIG_ENDIAN */ - -#endif /* USE_INTRINSIC */ - - colCnt = (dim_kernel * dim_kernel) & 0x1; - while (colCnt) - { - union arm_nnword inA, inB; - inA.word = arm_nn_read_q7x4(pA); - pA += ch_im_in; - inB.word = arm_nn_read_q7x4(pB); - pB += ch_im_in; - sum += inA.bytes[0] * inB.bytes[0]; - sum2 += inA.bytes[1] * inB.bytes[1]; - sum3 += inA.bytes[2] * inB.bytes[2]; - sum4 += inA.bytes[3] * inB.bytes[3]; - colCnt--; - } - - *pOut++ = (q7_t)__SSAT((sum >> out_shift), 8); - *pOut++ = (q7_t)__SSAT((sum2 >> out_shift), 8); - *pOut++ = (q7_t)__SSAT((sum3 >> out_shift), 8); - *pOut++ = (q7_t)__SSAT((sum4 >> out_shift), 8); - - rowCnt--; - } - - rowCnt = ch_im_out & 0x3; - while (rowCnt) - { - q7_t *pB = colBuffer + row_shift; - const q7_t *pA = wt + row_shift; - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - uint16_t colCnt = (dim_kernel * dim_kernel); - - row_shift += 1; - - while (colCnt) - { - q7_t A1 = *pA; - q7_t B1 = *pB; - pA += ch_im_in; - pB += ch_im_in; - sum += A1 * B1; - - colCnt--; - } - *pOut++ = (q7_t)__SSAT((sum >> out_shift), 8); - rowCnt--; - } - - /* clear counter and pointers */ - pBuffer = colBuffer; - } - } - -#else - (void)bufferA; - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - int i_out_y, i_out_x, i_ch_out, i_ker_x, i_ker_y; - int conv_out; - - /* do some checking here, basically ch_im_in == ch_im_out */ - if (ch_im_in != ch_im_out) - { - return ARM_MATH_SIZE_MISMATCH; - } - - for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++) - { - for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++) - { - // for each output - conv_out = ((q31_t)(bias[i_ch_out]) << bias_shift) + NN_ROUND(out_shift); - for (i_ker_y = 0; i_ker_y < dim_kernel; i_ker_y++) - { - for (i_ker_x = 0; i_ker_x < dim_kernel; i_ker_x++) - { - int in_row = stride * i_out_y + i_ker_y - padding; - int in_col = stride * i_out_x + i_ker_x - padding; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in) - { - conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + i_ch_out] * - wt[(i_ker_y * dim_kernel + i_ker_x) * ch_im_out + i_ch_out]; - } - } - } - Im_out[(i_out_y * dim_im_out + i_out_x) * ch_im_out + i_ch_out] = - (q7_t)__SSAT((conv_out >> out_shift), 8); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c deleted file mode 100644 index 0b1a4a8..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c +++ /dev/null @@ -1,427 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_depthwise_separable_conv_HWC_q7_nonsquare.c - * Description: Q7 depthwise separable convolution function (non-square shape) - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup NNConv - * @{ - */ - -/** - * @brief Q7 depthwise separable convolution function (non-square shape) - * @param[in] Im_in pointer to input tensor - * @param[in] dim_im_in_x input tensor dimension x - * @param[in] dim_im_in_y input tensor dimension y - * @param[in] ch_im_in number of input tensor channels - * @param[in] wt pointer to kernel weights - * @param[in] ch_im_out number of filters, i.e., output tensor channels - * @param[in] dim_kernel_x filter kernel size x - * @param[in] dim_kernel_y filter kernel size y - * @param[in] padding_x padding sizes x - * @param[in] padding_y padding sizes y - * @param[in] stride_x convolution stride x - * @param[in] stride_y convolution stride y - * @param[in] bias pointer to bias - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in,out] Im_out pointer to output tensor - * @param[in] dim_im_out_x output tensor dimension x - * @param[in] dim_im_out_y output tensor dimension y - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] bufferB pointer to buffer space for output - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - * - * This function is the version with full list of optimization tricks, but with - * some constraints: - * ch_im_in is equal to ch_im_out - * - */ - -arm_status arm_depthwise_separable_conv_HWC_q7_nonsquare(const q7_t *Im_in, - const uint16_t dim_im_in_x, - const uint16_t dim_im_in_y, - const uint16_t ch_im_in, - const q7_t *wt, - const uint16_t ch_im_out, - const uint16_t dim_kernel_x, - const uint16_t dim_kernel_y, - const uint16_t padding_x, - const uint16_t padding_y, - const uint16_t stride_x, - const uint16_t stride_y, - const q7_t *bias, - const uint16_t bias_shift, - const uint16_t out_shift, - q7_t *Im_out, - const uint16_t dim_im_out_x, - const uint16_t dim_im_out_y, - q15_t *bufferA, - q7_t *bufferB) -{ - - (void)bufferB; - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - /* - * Implementation: - * There are 3 nested loop here: - * Inner loop: calculate each output value with MAC instruction over an accumulator - * Mid loop: loop over different output channel - * Outer loop: loop over different output (x, y) - * - */ - - int16_t i_out_y, i_out_x; - int16_t i_ker_y, i_ker_x; - q7_t *colBuffer = (q7_t *)bufferA; - q7_t *pBuffer = colBuffer; - const q7_t *pBias = bias; - q7_t *pOut = Im_out; - uint16_t rowCnt; - uint16_t row_shift; - - /* do some checking here, basically ch_im_in == ch_im_out */ - if (ch_im_in != ch_im_out) - { - return ARM_MATH_SIZE_MISMATCH; - } - - for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++) - { - /* we first do im2col here */ - for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y; - i_ker_y++) - { - for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x; - i_ker_x++) - { - if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x) - { - /* arm_fill_q7(0, pBuffer, ch_im_in); */ - memset(pBuffer, 0, ch_im_in); - } - else - { - /* arm_copy_q7((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, - * ch_im_in); */ - memcpy(pBuffer, (q7_t *)Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, ch_im_in); - } - pBuffer += ch_im_in; - } - } - - /* we will do the computation here for each channel */ - rowCnt = ch_im_out >> 2; - row_shift = 0; - pBias = bias; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = (dim_kernel_x * dim_kernel_y) >> 1; - q7_t *pB = colBuffer + row_shift; - const q7_t *pA = wt + row_shift; - row_shift += 4; - -#ifdef USE_INTRINSIC - -#ifndef ARM_MATH_BIG_ENDIAN - - while (colCnt) - { - q31_t inA1, inA2, inB1, inB2, opA, opB; - - inB1 = arm_nn_read_q7x4(pB); - pB += ch_im_in; - opB = arm_nn_read_q7x4(pB); - pB += ch_im_in; - inB2 = __PKHTB(opB, inB1, 16); - inB1 = __PKHBT(inB1, opB, 16); - inA1 = arm_nn_read_q7x4(pA); - pA += ch_im_in; - opB = arm_nn_read_q7x4(pA); - pA += ch_im_in; - inA2 = __PKHTB(opB, inA1, 16); - inA1 = __PKHBT(inA1, opB, 16); - opA = __SXTB16(inA1); - opB = __SXTB16(inB1); - sum = __SMLAD(opA, opB, sum); - opA = __SXTB16(__ROR(inA1, 8)); - opB = __SXTB16(__ROR(inB1, 8)); - sum2 = __SMLAD(opA, opB, sum2); - opA = __SXTB16(inA2); - opB = __SXTB16(inB2); - sum3 = __SMLAD(opA, opB, sum3); - opA = __SXTB16(__ROR(inA2, 8)); - opB = __SXTB16(__ROR(inB2, 8)); - sum4 = __SMLAD(opA, opB, sum4); - colCnt--; - } -#else - - while (colCnt) - { - q31_t inA1, inA2, inB1, inB2, opA, opB; - - inB1 = arm_nn_read_q7x4(pB); - pB += ch_im_in; - opB = arm_nn_read_q7x4(pB); - pB += ch_im_in; - inB2 = __PKHBT(opB, inB1, 16); - inB1 = __PKHTB(inB1, opB, 16); - inA1 = arm_nn_read_q7x4(pA); - pA += ch_im_in; - opB = arm_nn_read_q7x4(pA); - pA += ch_im_in; - inA2 = __PKHBT(opB, inA1, 16); - inA1 = __PKHTB(inA1, opB, 16); - opA = __SXTB16(inA1); - opB = __SXTB16(inB1); - sum2 = __SMLAD(opA, opB, sum2); - opA = __SXTB16(__ROR(inA1, 8)); - opB = __SXTB16(__ROR(inB1, 8)); - sum = __SMLAD(opA, opB, sum); - opA = __SXTB16(inA2); - opB = __SXTB16(inB2); - sum4 = __SMLAD(opA, opB, sum4); - opA = __SXTB16(__ROR(inA2, 8)); - opB = __SXTB16(__ROR(inB2, 8)); - sum3 = __SMLAD(opA, opB, sum3); - colCnt--; - } - -#endif /* ARM_MATH_BIG_ENDIAN */ - -#else - -#ifndef ARM_MATH_BIG_ENDIAN - // r0 r1 r2 r3 r4 r5 - // inA1, inA2, inB1, inB2, opA, opB - asm volatile("COL_LOOP:\n" - "ldr.w r2, [%[pB], #0]\n" - "add.w %[pB], %[pB], %[ch_im_in]\n" - "ldr.w r5, [%[pB], #0]\n" - "add.w %[pB], %[pB], %[ch_im_in]\n" - "pkhtb r3, r5, r2, ASR #16\n" - "pkhbt r2, r2, r5, LSL #16\n" - "ldr.w r0, [%[pA], #0]\n" - "add.w %[pA], %[pA], %[ch_im_in]\n" - "ldr.w r5, [%[pA], #0]\n" - "add.w %[pA], %[pA], %[ch_im_in]\n" - "pkhtb r1, r5, r0, ASR #16\n" - "pkhbt r0, r0, r5, LSL #16\n" - "sxtb16 r4, r0\n" - "sxtb16 r5, r2\n" - "smlad %[sum], r4, r5, %[sum]\n" - "mov.w r4, r0, ror #8\n" - "mov.w r5, r2, ror #8\n" - "sxtb16 r4, r4\n" - "sxtb16 r5, r5\n" - "smlad %[sum2], r4, r5, %[sum2]\n" - "sxtb16 r4, r1\n" - "sxtb16 r5, r3\n" - "smlad %[sum3], r4, r5, %[sum3]\n" - "mov.w r4, r1, ror #8\n" - "mov.w r5, r3, ror #8\n" - "sxtb16 r4, r4\n" - "sxtb16 r5, r5\n" - "smlad %[sum4], r4, r5, %[sum4]\n" - "subs %[colCnt], #1\n" - "bne COL_LOOP\n" - : [ sum ] "+r"(sum), - [ sum2 ] "+r"(sum2), - [ sum3 ] "+r"(sum3), - [ sum4 ] "+r"(sum4), - [ pB ] "+r"(pB), - [ pA ] "+r"(pA) - : [ colCnt ] "r"(colCnt), [ ch_im_in ] "r"(ch_im_in) - : "r0", "r1", "r2", "r3", "r4", "r5"); -#else - // r0 r1 r2 r3 r4 r5 - // inA1, inA2, inB1, inB2, opA, opB - asm volatile("COL_LOOP:\n" - "ldr.w r2, [%[pB], #0]\n" - "add.w %[pB], %[pB], %[ch_im_in]\n" - "ldr.w r5, [%[pB], #0]\n" - "add.w %[pB], %[pB], %[ch_im_in]\n" - "pkhbt r3, r5, r2, LSL #16\n" - "pkhtb r2, r2, r5, ASR #16\n" - "ldr.w r0, [%[pA], #0]\n" - "add.w %[pA], %[pA], %[ch_im_in]\n" - "ldr.w r5, [%[pA], #0]\n" - "add.w %[pA], %[pA], %[ch_im_in]\n" - "pkhbt r1, r5, r0, LSL #16\n" - "pkhtb r0, r0, r5, ASR #16\n" - "sxtb16 r4, r0\n" - "sxtb16 r5, r2\n" - "smlad %[sum2], r4, r5, %[sum2]\n" - "mov.w r4, r0, ror #8\n" - "mov.w r5, r2, ror #8\n" - "sxtb16 r4, r4\n" - "sxtb16 r5, r5\n" - "smlad %[sum], r4, r5, %[sum]\n" - "sxtb16 r4, r1\n" - "sxtb16 r5, r3\n" - "smlad %[sum4], r4, r5, %[sum4]\n" - "mov.w r4, r1, ror #8\n" - "mov.w r5, r3, ror #8\n" - "sxtb16 r4, r4\n" - "sxtb16 r5, r5\n" - "smlad %[sum3], r4, r5, %[sum3]\n" - "subs %[colCnt], #1\n" - "bne COL_LOOP\n" - : [ sum ] "+r"(sum), - [ sum2 ] "+r"(sum2), - [ sum3 ] "+r"(sum3), - [ sum4 ] "+r"(sum4), - [ pB ] "+r"(pB), - [ pA ] "+r"(pA) - : [ colCnt ] "r"(colCnt), [ ch_im_in ] "r"(ch_im_in) - : "r0", "r1", "r2", "r3", "r4", "r5"); -#endif /*ARM_MATH_BIG_ENDIAN */ - -#endif /* USE_INTRINSIC */ - - colCnt = (dim_kernel_x * dim_kernel_y) & 0x1; - while (colCnt) - { - union arm_nnword inA, inB; - inA.word = arm_nn_read_q7x4(pA); - pA += ch_im_in; - inB.word = arm_nn_read_q7x4(pB); - pB += ch_im_in; - sum += inA.bytes[0] * inB.bytes[0]; - sum2 += inA.bytes[1] * inB.bytes[1]; - sum3 += inA.bytes[2] * inB.bytes[2]; - sum4 += inA.bytes[3] * inB.bytes[3]; - colCnt--; - } - - *pOut++ = (q7_t)__SSAT((sum >> out_shift), 8); - *pOut++ = (q7_t)__SSAT((sum2 >> out_shift), 8); - *pOut++ = (q7_t)__SSAT((sum3 >> out_shift), 8); - *pOut++ = (q7_t)__SSAT((sum4 >> out_shift), 8); - - rowCnt--; - } - - rowCnt = ch_im_out & 0x3; - while (rowCnt) - { - q7_t *pB = colBuffer + row_shift; - const q7_t *pA = wt + row_shift; - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - uint16_t colCnt = (dim_kernel_x * dim_kernel_y); - - row_shift += 1; - - while (colCnt) - { - q7_t A1 = *pA; - q7_t B1 = *pB; - pA += ch_im_in; - pB += ch_im_in; - sum += A1 * B1; - - colCnt--; - } - *pOut++ = (q7_t)__SSAT((sum >> out_shift), 8); - rowCnt--; - } - - // clear counter and pointers - pBuffer = colBuffer; - } - } - -#else - (void)bufferA; - - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - int i_out_y, i_out_x, i_ch_out; - int i_ker_y, i_ker_x; - - /* do some checking here, basically ch_im_in == ch_im_out */ - if (ch_im_in != ch_im_out) - { - return ARM_MATH_SIZE_MISMATCH; - } - - for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++) - { - for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++) - { - for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++) - { - // for each output - int conv_out = ((q31_t)(bias[i_ch_out]) << bias_shift) + NN_ROUND(out_shift); - for (i_ker_y = 0; i_ker_y < dim_kernel_y; i_ker_y++) - { - for (i_ker_x = 0; i_ker_x < dim_kernel_x; i_ker_x++) - { - int in_row = stride_y * i_out_y + i_ker_y - padding_y; - int in_col = stride_x * i_out_x + i_ker_x - padding_x; - if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x) - { - conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + i_ch_out] * - wt[(i_ker_y * dim_kernel_x + i_ker_x) * ch_im_out + i_ch_out]; - } - } - } - Im_out[(i_out_y * dim_im_out_x + i_out_x) * ch_im_out + i_ch_out] = - (q7_t)__SSAT((conv_out >> out_shift), 8); - } - } - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNConv group - */ diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c deleted file mode 100644 index 9a61e17..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_depthwise_conv_s8_core.c - * Description: Depthwise convolution on im2col buffers. - * - * $Date: 09. October 2020 - * $Revision: V.1.0.4 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/* - * Depthwise conv on an im2col buffer where the input channel equals - * output channel. - * - * Refer header file for details. - * - */ - -q7_t *arm_nn_depthwise_conv_s8_core(const q7_t *row, - const q15_t *col, - const uint16_t num_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int32_t out_offset, - const int32_t activation_min, - const int32_t activation_max, - const uint16_t kernel_size, - const int32_t *const output_bias, - q7_t *out) -{ -#if defined(ARM_MATH_MVEI) - int32_t ch_per_loop = num_ch / 4; - - const int32_t *bias = output_bias; - int8_t *out_tmp = out; - - int32_t idx = 0; - - while (ch_per_loop > 0) - { - int32x4_t ip_0; - int32x4_t ip_1; - int32_t ker_loop = kernel_size / 3; - int32x4_t out_0 = vldrwq_s32(bias); - int32x4_t out_1 = out_0; - bias += 4; - - const int32_t offset = idx * 4; - const int8_t *row_0 = row + offset; - const int16_t *col_0 = col + offset; - const int16_t *col_1 = col + kernel_size * num_ch + offset; - - int32x4_t ker_0 = vldrbq_s32(row_0); - - while (ker_loop > 0) - { - const int8_t *row_1 = row_0 + num_ch; - const int8_t *row_2 = row_0 + 2 * num_ch; - const int32x4_t ker_1 = vldrbq_s32(row_1); - const int32x4_t ker_2 = vldrbq_s32(row_2); - - ip_0 = vldrhq_s32(col_0); - ip_1 = vldrhq_s32(col_1); - col_0 += num_ch; - col_1 += num_ch; - - out_0 += vmulq_s32(ip_0, ker_0); - out_1 += vmulq_s32(ip_1, ker_0); - - ip_0 = vldrhq_s32(col_0); - ip_1 = vldrhq_s32(col_1); - col_0 += num_ch; - col_1 += num_ch; - - out_0 += vmulq_s32(ip_0, ker_1); - out_1 += vmulq_s32(ip_1, ker_1); - - ip_0 = vldrhq_s32(col_0); - ip_1 = vldrhq_s32(col_1); - col_0 += num_ch; - col_1 += num_ch; - - out_0 += vmulq_s32(ip_0, ker_2); - out_1 += vmulq_s32(ip_1, ker_2); - row_0 += 3 * num_ch; - - ker_0 = vldrbq_s32(row_0); - ker_loop--; - } - - idx++; - /* Handle tail kernel elements */ - ker_loop = kernel_size - ((kernel_size / 3) * 3); - while (ker_loop > 0) - { - ip_0 = vldrhq_s32(col_0); - ip_1 = vldrhq_s32(col_1); - - out_0 += vmulq_s32(ip_0, ker_0); - out_1 += vmulq_s32(ip_1, ker_0); - - col_0 += num_ch; - col_1 += num_ch; - - ip_0 = vldrhq_s32(col_0); - ip_1 = vldrhq_s32(col_1); - - row_0 += num_ch; - ker_0 = vldrbq_s32(row_0); - ker_loop--; - } - const int32x4_t mult = vldrwq_s32(out_mult); - const int32x4_t shift = vldrwq_s32(out_shift); - out_mult += 4; - out_shift += 4; - - out_0 = arm_requantize_mve_32x4(out_0, mult, shift); - out_1 = arm_requantize_mve_32x4(out_1, mult, shift); - - out_0 = vaddq_n_s32(out_0, out_offset); - out_0 = vmaxq_s32(out_0, vdupq_n_s32(activation_min)); - out_0 = vminq_s32(out_0, vdupq_n_s32(activation_max)); - vstrbq_s32(out_tmp, out_0); - - out_1 = vaddq_n_s32(out_1, out_offset); - out_1 = vmaxq_s32(out_1, vdupq_n_s32(activation_min)); - out_1 = vminq_s32(out_1, vdupq_n_s32(activation_max)); - vstrbq_s32(out_tmp + num_ch, out_1); - - out_tmp += 4; - ch_per_loop--; - } - - int32_t tail_ch = num_ch & 3; - if (tail_ch != 0) - { - int32_t ch_idx = (num_ch & ~3); - int32x4_t col_0_sum; - int32x4_t col_1_sum; - - const int32_t single_buffer_size = kernel_size * num_ch; - for (int i = 0; i < tail_ch; i++) - { - const int16_t *col_pos_0 = col + ch_idx; - const int16_t *col_pos_1 = col_pos_0 + single_buffer_size; - - const int8_t *row_pos = row + ch_idx; - int32_t sum_0 = bias[i]; - int32_t sum_1 = bias[i]; - - for (int j = 0; j < kernel_size; j++) - { - const int8_t row_val = row_pos[j * num_ch]; - sum_0 += row_val * col_pos_0[j * num_ch]; - sum_1 += row_val * col_pos_1[j * num_ch]; - } - col_0_sum[i] = sum_0; - col_1_sum[i] = sum_1; - - ch_idx++; - } - const mve_pred16_t p = vctp32q((uint32_t)tail_ch); - const int32x4_t mult = vldrwq_z_s32(out_mult, p); - const int32x4_t shift = vldrwq_z_s32(out_shift, p); - - col_0_sum = arm_requantize_mve_32x4(col_0_sum, mult, shift); - col_1_sum = arm_requantize_mve_32x4(col_1_sum, mult, shift); - - col_0_sum = vaddq_n_s32(col_0_sum, out_offset); - col_0_sum = vmaxq_s32(col_0_sum, vdupq_n_s32(activation_min)); - col_0_sum = vminq_s32(col_0_sum, vdupq_n_s32(activation_max)); - vstrbq_p_s32(out_tmp, col_0_sum, p); - - col_1_sum = vaddq_n_s32(col_1_sum, out_offset); - col_1_sum = vmaxq_s32(col_1_sum, vdupq_n_s32(activation_min)); - col_1_sum = vminq_s32(col_1_sum, vdupq_n_s32(activation_max)); - vstrbq_p_s32(out_tmp + num_ch, col_1_sum, p); - - out_tmp += tail_ch; - } - - return out_tmp + num_ch; -#else - (void)row; - (void)col; - (void)num_ch; - (void)out_shift; - (void)out_mult; - (void)out_offset; - (void)activation_min; - (void)activation_max; - (void)kernel_size; - (void)output_bias; - (void)out; - return NULL; -#endif -} diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c deleted file mode 100644 index 008fe6a..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c +++ /dev/null @@ -1,186 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mat_mult_kernel_q7_q15.c - * Description: Matrix-multiplication function for convolution - * - * $Date: January 26, 2021 - * $Revision: V.1.0.2 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @brief Matrix-multiplication function for convolution. - * - * @details Refer to header file for details. - * - */ - -q7_t *arm_nn_mat_mult_kernel_q7_q15(const q7_t *pA, - const q15_t *pInBuffer, - const uint16_t ch_im_out, - const uint16_t numCol_A, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q7_t *pOut) -{ -#if defined(ARM_MATH_DSP) - /* set up the second output pointers */ - q7_t *pOut2 = pOut + ch_im_out; - const q7_t *pBias = bias; - - uint16_t rowCnt = ch_im_out >> 1; - /* this loop over rows in A */ - while (rowCnt) - { - /* setup pointers for B */ - const q15_t *pB = pInBuffer; - const q15_t *pB2 = pB + numCol_A; - - /* align the second pointer for A */ - const q7_t *pA2 = pA + numCol_A; - - /* init the sum with bias */ - q31_t sum = ((q31_t)(*pBias) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)(*pBias) << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = numCol_A >> 2; - /* accumulate over the vector */ - while (colCnt) - { - q31_t inA11, inA12, inA21, inA22; - - q31_t inB1 = arm_nn_read_q15x2_ia(&pB); - q31_t inB2 = arm_nn_read_q15x2_ia(&pB2); - - pA = read_and_pad(pA, &inA11, &inA12); - pA2 = read_and_pad(pA2, &inA21, &inA22); - - sum = __SMLAD(inA11, inB1, sum); - sum2 = __SMLAD(inA11, inB2, sum2); - sum3 = __SMLAD(inA21, inB1, sum3); - sum4 = __SMLAD(inA21, inB2, sum4); - - inB1 = arm_nn_read_q15x2_ia(&pB); - inB2 = arm_nn_read_q15x2_ia(&pB2); - - sum = __SMLAD(inA12, inB1, sum); - sum2 = __SMLAD(inA12, inB2, sum2); - sum3 = __SMLAD(inA22, inB1, sum3); - sum4 = __SMLAD(inA22, inB2, sum4); - - colCnt--; - } /* while over colCnt */ - colCnt = numCol_A & 0x3; - while (colCnt) - { - q7_t inA1 = *pA++; - q15_t inB1 = *pB++; - q7_t inA2 = *pA2++; - q15_t inB2 = *pB2++; - - sum += inA1 * inB1; - sum2 += inA1 * inB2; - sum3 += inA2 * inB1; - sum4 += inA2 * inB2; - colCnt--; - } /* while over colCnt */ - *pOut++ = (q7_t)__SSAT((sum >> out_shift), 8); - *pOut++ = (q7_t)__SSAT((sum3 >> out_shift), 8); - *pOut2++ = (q7_t)__SSAT((sum2 >> out_shift), 8); - *pOut2++ = (q7_t)__SSAT((sum4 >> out_shift), 8); - - /* skip the row computed with A2 */ - pA += numCol_A; - rowCnt--; - } /* for over ch_im_out */ - - /* compute left-over row if any */ - if (ch_im_out & 0x1) - { - /* setup pointers for B */ - const q15_t *pB = pInBuffer; - const q15_t *pB2 = pB + numCol_A; - - /* load the bias */ - q31_t sum = ((q31_t)(*pBias) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = numCol_A >> 2; - while (colCnt) - { - q31_t inA11, inA12; - - q31_t inB1 = arm_nn_read_q15x2_ia(&pB); - q31_t inB2 = arm_nn_read_q15x2_ia(&pB2); - - pA = read_and_pad(pA, &inA11, &inA12); - - sum = __SMLAD(inA11, inB1, sum); - sum2 = __SMLAD(inA11, inB2, sum2); - - inB1 = arm_nn_read_q15x2_ia(&pB); - inB2 = arm_nn_read_q15x2_ia(&pB2); - - sum = __SMLAD(inA12, inB1, sum); - sum2 = __SMLAD(inA12, inB2, sum2); - - colCnt--; - } - colCnt = numCol_A & 0x3; - while (colCnt) - { - q7_t inA1 = *pA++; - q15_t inB1 = *pB++; - q15_t inB2 = *pB2++; - - sum += inA1 * inB1; - sum2 += inA1 * inB2; - colCnt--; - } - - *pOut++ = (q7_t)__SSAT((sum >> out_shift), 8); - *pOut2++ = (q7_t)__SSAT((sum2 >> out_shift), 8); - } - - pOut += ch_im_out; - - /* return the new output pointer with offset */ - return pOut; -#else - (void)pA; - (void)pInBuffer; - (void)ch_im_out; - (void)numCol_A; - (void)bias_shift; - (void)out_shift; - (void)bias; - (void)pOut; - /* To be completed */ - return NULL; -#endif /* ARM_MATH_DSP */ -} diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c deleted file mode 100644 index 295396b..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mat_mult_kernel_q7_q15_reordered.c - * Description: Matrix-multiplication function for convolution with reordered columns - * - * $Date: January 26, 2021 - * $Revision: V.1.0.2 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @brief Matrix-multiplication function for convolution with re-ordered input. - * - * @details Refer to header file for details. - * - */ - -q7_t *arm_nn_mat_mult_kernel_q7_q15_reordered(const q7_t *pA, - const q15_t *pInBuffer, - const uint16_t ch_im_out, - const uint16_t numCol_A, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q7_t *pOut) -{ - -#if defined(ARM_MATH_DSP) - /* set up the second output pointers */ - q7_t *pOut2 = pOut + ch_im_out; - int i; - - /* this loop over rows in A */ - for (i = 0; i < ch_im_out; i += 2) - { - /* setup pointers for B */ - const q15_t *pB = pInBuffer; - const q15_t *pB2 = pB + numCol_A; - - /* align the second pointer for A */ - const q7_t *pA2 = pA + numCol_A; - - /* init the sum with bias */ - q31_t sum = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)(bias[i + 1]) << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)(bias[i + 1]) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = numCol_A >> 2; - /* accumulate over the vector */ - while (colCnt) - { - q31_t inA11, inA12, inA21, inA22; - - q31_t inB1 = arm_nn_read_q15x2_ia(&pB); - q31_t inB2 = arm_nn_read_q15x2_ia(&pB2); - - pA = read_and_pad_reordered(pA, &inA11, &inA12); - pA2 = read_and_pad_reordered(pA2, &inA21, &inA22); - - sum = __SMLAD(inA11, inB1, sum); - sum2 = __SMLAD(inA11, inB2, sum2); - sum3 = __SMLAD(inA21, inB1, sum3); - sum4 = __SMLAD(inA21, inB2, sum4); - - inB1 = arm_nn_read_q15x2_ia(&pB); - inB2 = arm_nn_read_q15x2_ia(&pB2); - - sum = __SMLAD(inA12, inB1, sum); - sum2 = __SMLAD(inA12, inB2, sum2); - sum3 = __SMLAD(inA22, inB1, sum3); - sum4 = __SMLAD(inA22, inB2, sum4); - - colCnt--; - } /* while over colCnt */ - colCnt = numCol_A & 0x3; - while (colCnt) - { - q7_t inA1 = *pA++; - q15_t inB1 = *pB++; - q7_t inA2 = *pA2++; - q15_t inB2 = *pB2++; - - sum += inA1 * inB1; - sum2 += inA1 * inB2; - sum3 += inA2 * inB1; - sum4 += inA2 * inB2; - colCnt--; - } /* while over colCnt */ - *pOut++ = (q7_t)__SSAT((sum >> out_shift), 8); - *pOut++ = (q7_t)__SSAT((sum3 >> out_shift), 8); - *pOut2++ = (q7_t)__SSAT((sum2 >> out_shift), 8); - *pOut2++ = (q7_t)__SSAT((sum4 >> out_shift), 8); - - /* skip the row computed with A2 */ - pA += numCol_A; - } /* for over ch_im_out */ - - pOut += ch_im_out; - - /* return the new output pointer with offset */ - return pOut; -#else - (void)pA; - (void)pInBuffer; - (void)ch_im_out; - (void)numCol_A; - (void)bias_shift; - (void)out_shift; - (void)bias; - (void)pOut; - /* To be completed */ - return NULL; -#endif /* ARM_MATH_DSP */ -} diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c deleted file mode 100644 index 1af95dc..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c +++ /dev/null @@ -1,245 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mat_mult_kernel_s8_s16.c - * Description: Matrix-multiplication function for convolution - * - * $Date: 14. December 2021 - * $Revision: V.1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/* - * Matrix-multiplication function for convolution with per-channel requantization. - * - * Refer header file for details. - * - */ - -q7_t *arm_nn_mat_mult_kernel_s8_s16(const q7_t *input_a, - const q15_t *input_b, - const uint16_t output_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int32_t out_offset, - const int16_t activation_min, - const int16_t activation_max, - const uint16_t num_col_a, - const int32_t *const output_bias, - q7_t *out_0) -{ -#if !defined(ARM_MATH_MVEI) - /* set up the second output pointers */ - q7_t *out_1 = out_0 + output_ch; - const int32_t *bias = output_bias; - - uint16_t row_count = output_ch / 2; - const q7_t *ip_a0 = input_a; - /* this loop over rows in A */ - while (row_count) - { - /* setup pointers for B */ - const q15_t *ip_b0 = input_b; - const q15_t *ip_b1 = ip_b0 + num_col_a; - - /* align the second pointer for A */ - const q7_t *ip_a1 = ip_a0 + num_col_a; - - q31_t ch_0_out_0 = 0; - q31_t ch_0_out_1 = 0; - q31_t ch_1_out_0 = 0; - q31_t ch_1_out_1 = 0; - /* Init accumulator with bias for channel N and N + 1 */ - if (bias) - { - ch_0_out_0 = *bias; - ch_0_out_1 = *bias++; - ch_1_out_0 = *bias; - ch_1_out_1 = *bias++; - } - -#if defined(ARM_MATH_DSP) - uint16_t col_count = num_col_a / 4; - /* accumulate over the vector */ - while (col_count) - { - q31_t a01, a02, a11, a12; - q31_t b0 = arm_nn_read_q15x2_ia(&ip_b0); - q31_t b1 = arm_nn_read_q15x2_ia(&ip_b1); - - ip_a0 = read_and_pad(ip_a0, &a01, &a02); - ip_a1 = read_and_pad(ip_a1, &a11, &a12); - - ch_0_out_0 = __SMLAD(a01, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a01, b1, ch_0_out_1); - ch_1_out_0 = __SMLAD(a11, b0, ch_1_out_0); - ch_1_out_1 = __SMLAD(a11, b1, ch_1_out_1); - - b0 = arm_nn_read_q15x2_ia(&ip_b0); - b1 = arm_nn_read_q15x2_ia(&ip_b1); - - ch_0_out_0 = __SMLAD(a02, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a02, b1, ch_0_out_1); - ch_1_out_0 = __SMLAD(a12, b0, ch_1_out_0); - ch_1_out_1 = __SMLAD(a12, b1, ch_1_out_1); - - col_count--; - } /* while over col_count */ - col_count = num_col_a & 0x3; -#else - uint16_t col_count = num_col_a; -#endif - while (col_count) - { - q7_t a0 = *ip_a0++; - q15_t b0 = *ip_b0++; - q7_t a1 = *ip_a1++; - q15_t b1 = *ip_b1++; - - ch_0_out_0 += a0 * b0; - ch_0_out_1 += a0 * b1; - ch_1_out_0 += a1 * b0; - ch_1_out_1 += a1 * b1; - col_count--; - } /* while over col_count */ - - ch_0_out_0 = arm_nn_requantize(ch_0_out_0, *out_mult, *out_shift); - ch_0_out_0 += out_offset; - ch_0_out_0 = MAX(ch_0_out_0, activation_min); - ch_0_out_0 = MIN(ch_0_out_0, activation_max); - *out_0++ = (q7_t)ch_0_out_0; - - ch_0_out_1 = arm_nn_requantize(ch_0_out_1, *out_mult, *out_shift); - ch_0_out_1 += out_offset; - ch_0_out_1 = MAX(ch_0_out_1, activation_min); - ch_0_out_1 = MIN(ch_0_out_1, activation_max); - *out_1++ = (q7_t)ch_0_out_1; - out_mult++; - out_shift++; - - ch_1_out_0 = arm_nn_requantize(ch_1_out_0, *out_mult, *out_shift); - ch_1_out_0 += out_offset; - ch_1_out_0 = MAX(ch_1_out_0, activation_min); - ch_1_out_0 = MIN(ch_1_out_0, activation_max); - *out_0++ = (q7_t)ch_1_out_0; - - ch_1_out_1 = arm_nn_requantize(ch_1_out_1, *out_mult, *out_shift); - ch_1_out_1 += out_offset; - ch_1_out_1 = MAX(ch_1_out_1, activation_min); - ch_1_out_1 = MIN(ch_1_out_1, activation_max); - *out_1++ = (q7_t)ch_1_out_1; - out_mult++; - out_shift++; - - /* skip row */ - ip_a0 += num_col_a; - row_count--; - } - - /* compute the last odd numbered row if any */ - if (output_ch & 0x1) - { - /* setup pointers for B */ - const q15_t *ip_b0 = input_b; - const q15_t *ip_b1 = ip_b0 + num_col_a; - - q31_t ch_0_out_0 = 0; - q31_t ch_0_out_1 = 0; - - /* load the bias */ - if (bias) - { - ch_0_out_0 = *bias; - ch_0_out_1 = *bias++; - } - -#if defined(ARM_MATH_DSP) - uint16_t col_count = num_col_a >> 2; - while (col_count) - { - q31_t a01, a02; - q31_t b0 = arm_nn_read_q15x2_ia(&ip_b0); - q31_t b1 = arm_nn_read_q15x2_ia(&ip_b1); - - ip_a0 = read_and_pad(ip_a0, &a01, &a02); - - ch_0_out_0 = __SMLAD(a01, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a01, b1, ch_0_out_1); - - b0 = arm_nn_read_q15x2_ia(&ip_b0); - b1 = arm_nn_read_q15x2_ia(&ip_b1); - ch_0_out_0 = __SMLAD(a02, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a02, b1, ch_0_out_1); - - col_count--; - } - col_count = num_col_a & 0x3; -#else - uint16_t col_count = num_col_a; -#endif - while (col_count) - { - q7_t a0 = *ip_a0++; - q15_t b0 = *ip_b0++; - q15_t b1 = *ip_b1++; - - ch_0_out_0 += a0 * b0; - ch_0_out_1 += a0 * b1; - col_count--; - } - ch_0_out_0 = arm_nn_requantize(ch_0_out_0, *out_mult, *out_shift); - ch_0_out_0 += out_offset; - ch_0_out_0 = MAX(ch_0_out_0, activation_min); - ch_0_out_0 = MIN(ch_0_out_0, activation_max); - *out_0++ = (q7_t)ch_0_out_0; - - ch_0_out_1 = arm_nn_requantize(ch_0_out_1, *out_mult, *out_shift); - ch_0_out_1 += out_offset; - ch_0_out_1 = MAX(ch_0_out_1, activation_min); - ch_0_out_1 = MIN(ch_0_out_1, activation_max); - *out_1++ = (q7_t)ch_0_out_1; - out_mult++; - out_shift++; - } - - out_0 += output_ch; - - /* return the new output pointer with offset */ - return out_0; -#else - (void)input_a; - (void)input_b; - (void)output_ch; - (void)out_shift; - (void)out_mult; - (void)out_offset; - (void)activation_min; - (void)activation_max; - (void)num_col_a; - (void)output_bias; - (void)out_0; - /* To be completed */ - return NULL; -#endif -} diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c deleted file mode 100644 index 68928be..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mat_mult_kernel_s8_s16_reordered.c - * Description: Matrix-multiplication function for convolution with reordered columns - * - * $Date: 09. October 2020 - * $Revision: V.1.0.3 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/* - * Matrix-multiplication with re-ordered input and bias inputs for convolution with per-channel - * requantization. The re-ordering is a consequence of sign extension is done by the SXTB16 command. - * - * Refer header file for details. This function differs from arm_nn_mat_mult_kernel_s8_s16(), in that it uses - * read_and_pad_reordered() instead of arm_nn_mat_mult_kernel_s8_s16(). Investigating the cycles impact and - * unifying these two functions is a potential future improvement. - * - */ - -q7_t *arm_nn_mat_mult_kernel_s8_s16_reordered(const q7_t *input_a, - const q15_t *input_b, - const uint16_t output_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int32_t out_offset, - const int16_t activation_min, - const int16_t activation_max, - const uint16_t num_col_a, - const int32_t *const output_bias, - q7_t *out_0) -{ -#if defined(ARM_MATH_DSP) - /* set up the second output pointers */ - q7_t *out_1 = out_0 + output_ch; - const int32_t *bias = output_bias; - - uint16_t row_count = output_ch / 2; - const q7_t *ip_a0 = input_a; - /* this loop over rows in A */ - while (row_count) - { - /* setup pointers for B */ - const q15_t *ip_b0 = input_b; - const q15_t *ip_b1 = ip_b0 + num_col_a; - - /* align the second pointer for A */ - const q7_t *ip_a1 = ip_a0 + num_col_a; - - /* Init accumulator with bias for channel N and N + 1 */ - q31_t ch_0_out_0 = *bias; - q31_t ch_0_out_1 = *bias++; - q31_t ch_1_out_0 = *bias; - q31_t ch_1_out_1 = *bias++; - - uint16_t col_count = num_col_a / 4; - /* accumulate over the vector */ - while (col_count) - { - q31_t a01, a02, a11, a12; - q31_t b0 = arm_nn_read_q15x2_ia(&ip_b0); - q31_t b1 = arm_nn_read_q15x2_ia(&ip_b1); - - ip_a0 = read_and_pad_reordered(ip_a0, &a01, &a02); - ip_a1 = read_and_pad_reordered(ip_a1, &a11, &a12); - - ch_0_out_0 = __SMLAD(a01, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a01, b1, ch_0_out_1); - ch_1_out_0 = __SMLAD(a11, b0, ch_1_out_0); - ch_1_out_1 = __SMLAD(a11, b1, ch_1_out_1); - - b0 = arm_nn_read_q15x2_ia(&ip_b0); - b1 = arm_nn_read_q15x2_ia(&ip_b1); - - ch_0_out_0 = __SMLAD(a02, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a02, b1, ch_0_out_1); - ch_1_out_0 = __SMLAD(a12, b0, ch_1_out_0); - ch_1_out_1 = __SMLAD(a12, b1, ch_1_out_1); - - col_count--; - } /* while over col_count */ - - ch_0_out_0 = arm_nn_requantize(ch_0_out_0, *out_mult, *out_shift); - ch_0_out_0 += out_offset; - ch_0_out_0 = MAX(ch_0_out_0, activation_min); - ch_0_out_0 = MIN(ch_0_out_0, activation_max); - *out_0++ = (q7_t)ch_0_out_0; - - ch_0_out_1 = arm_nn_requantize(ch_0_out_1, *out_mult, *out_shift); - ch_0_out_1 += out_offset; - ch_0_out_1 = MAX(ch_0_out_1, activation_min); - ch_0_out_1 = MIN(ch_0_out_1, activation_max); - *out_1++ = (q7_t)ch_0_out_1; - out_mult++; - out_shift++; - - ch_1_out_0 = arm_nn_requantize(ch_1_out_0, *out_mult, *out_shift); - ch_1_out_0 += out_offset; - ch_1_out_0 = MAX(ch_1_out_0, activation_min); - ch_1_out_0 = MIN(ch_1_out_0, activation_max); - *out_0++ = (q7_t)ch_1_out_0; - - ch_1_out_1 = arm_nn_requantize(ch_1_out_1, *out_mult, *out_shift); - ch_1_out_1 += out_offset; - ch_1_out_1 = MAX(ch_1_out_1, activation_min); - ch_1_out_1 = MIN(ch_1_out_1, activation_max); - *out_1++ = (q7_t)ch_1_out_1; - out_mult++; - out_shift++; - - /* skip row */ - ip_a0 += num_col_a; - row_count--; - } - - if (output_ch & 1) - { - /* setup pointers for B */ - const q15_t *ip_b0 = input_b; - const q15_t *ip_b1 = ip_b0 + num_col_a; - - /* Init accumulator with bias for channel N + 1 */ - q31_t ch_0_out_0 = *bias; - q31_t ch_0_out_1 = ch_0_out_0; - - int32_t col_count = num_col_a / 4; - while (col_count) - { - q31_t a01, a02; - q31_t b0 = arm_nn_read_q15x2_ia(&ip_b0); - q31_t b1 = arm_nn_read_q15x2_ia(&ip_b1); - - ip_a0 = read_and_pad_reordered(ip_a0, &a01, &a02); - - ch_0_out_0 = __SMLAD(a01, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a01, b1, ch_0_out_1); - - b0 = arm_nn_read_q15x2_ia(&ip_b0); - b1 = arm_nn_read_q15x2_ia(&ip_b1); - - ch_0_out_0 = __SMLAD(a02, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a02, b1, ch_0_out_1); - - col_count--; - } /* while over col_count */ - - ch_0_out_0 = arm_nn_requantize(ch_0_out_0, *out_mult, *out_shift); - ch_0_out_0 += out_offset; - ch_0_out_0 = MAX(ch_0_out_0, activation_min); - ch_0_out_0 = MIN(ch_0_out_0, activation_max); - *out_0++ = (q7_t)ch_0_out_0; - - ch_0_out_1 = arm_nn_requantize(ch_0_out_1, *out_mult, *out_shift); - ch_0_out_1 += out_offset; - ch_0_out_1 = MAX(ch_0_out_1, activation_min); - ch_0_out_1 = MIN(ch_0_out_1, activation_max); - *out_1++ = (q7_t)ch_0_out_1; - } - - out_0 += output_ch; - - /* return the new output pointer with offset */ - return out_0; -#else - (void)input_a; - (void)input_b; - (void)output_ch; - (void)out_shift; - (void)out_mult; - (void)out_offset; - (void)activation_min; - (void)activation_max; - (void)num_col_a; - (void)output_bias; - (void)out_0; - /* To be completed */ - return NULL; -#endif -} diff --git a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c b/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c deleted file mode 100644 index f168e27..0000000 --- a/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c +++ /dev/null @@ -1,180 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mat_mult_s8.c - * Description: General Matrix-multiplication function - * - * $Date: 27. October 2021 - * $Revision: V.2.0.6 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/* - * s8 General matrix multiplication function with per-channel requantization for upto 4 column batches. - * - * Refer header file for details. - * - */ - -q7_t *arm_nn_mat_mult_s8(const q7_t *input_row, - const q7_t *input_col, - const uint16_t output_ch, - const uint16_t col_batches, - const int32_t *output_shift, - const int32_t *output_mult, - const int32_t out_offset, - const int32_t col_offset, - const int32_t row_offset, - const int16_t activation_min, - const int16_t activation_max, - const uint16_t row_len, - const int32_t *const bias, - q7_t *out) -{ -#if defined(ARM_MATH_MVEI) - (void)row_offset; - if (col_batches == 4) - { - for (int i_out_ch = 0; i_out_ch < output_ch; i_out_ch++) - { - int32_t row_len_tmp = row_len; - const int8_t *ip_r0 = input_row + (i_out_ch * row_len); - const int8_t *ip_c0 = input_col; - const int8_t *ip_c1 = input_col + row_len; - const int8_t *ip_c2 = input_col + (2 * row_len); - const int8_t *ip_c3 = input_col + (3 * row_len); - - int32_t acc_0 = 0; - int32_t acc_1 = 0; - int32_t acc_2 = 0; - int32_t acc_3 = 0; - const int32_t row_loop_cnt = (row_len + 7) / 8; - - for (int i_row_loop = 0; i_row_loop < row_loop_cnt; i_row_loop++) - { - mve_pred16_t p = vctp16q((uint32_t)row_len_tmp); - const int16x8_t offset = vdupq_m_n_s16(vuninitializedq_s16(), col_offset, p); - row_len_tmp -= 8; - - int16x8_t c0 = vldrbq_s16(ip_c0); - ip_c0 += 8; - c0 = vaddq_s16(c0, offset); - - int16x8_t c1 = vldrbq_s16(ip_c1); - ip_c1 += 8; - c1 = vaddq_s16(c1, offset); - - int16x8_t c2 = vldrbq_s16(ip_c2); - ip_c2 += 8; - c2 = vaddq_s16(c2, offset); - - int16x8_t c3 = vldrbq_s16(ip_c3); - ip_c3 += 8; - c3 = vaddq_s16(c3, offset); - - int16x8_t r0 = vldrbq_z_s16(ip_r0, p); - ip_r0 += 8; - - acc_0 = vmladavaq_p_s16(acc_0, r0, c0, p); - acc_1 = vmladavaq_p_s16(acc_1, r0, c1, p); - acc_2 = vmladavaq_p_s16(acc_2, r0, c2, p); - acc_3 = vmladavaq_p_s16(acc_3, r0, c3, p); - } - - int32x4_t res = {acc_0, acc_1, acc_2, acc_3}; - if (bias) - { - res = vaddq_n_s32(res, bias[i_out_ch]); - } - res = arm_requantize_mve(res, output_mult[i_out_ch], output_shift[i_out_ch]); - res = vaddq_n_s32(res, out_offset); - - res = vmaxq_s32(res, vdupq_n_s32(activation_min)); - res = vminq_s32(res, vdupq_n_s32(activation_max)); - - const uint32x4_t scatter_offset = {0, output_ch, output_ch * 2, output_ch * 3}; - vstrbq_scatter_offset_s32(&out[i_out_ch], scatter_offset, res); - } - out += 4 * output_ch; - } - else - { - for (int i_col_batch = (col_batches & ~0x3); i_col_batch < (col_batches & 0x3); i_col_batch++) - { - for (int i_out_ch = 0; i_out_ch < output_ch; i_out_ch++) - { - int32_t row_len_tmp = row_len; - - const int8_t *ip_r0 = input_row + (i_out_ch * row_len); - const int8_t *ip_c0 = input_col + (i_col_batch * row_len); - int32_t acc_0 = 0; - const int32_t row_loop_cnt = (row_len + 7) / 8; - - for (int i_row_loop = 0; i_row_loop < row_loop_cnt; i_row_loop++) - { - const mve_pred16_t p = vctp16q((uint32_t)row_len_tmp); - const int16x8_t offset = vdupq_m_n_s16(vuninitializedq_s16(), col_offset, p); - row_len_tmp -= 8; - - int16x8_t c0 = vldrbq_s16(ip_c0); - ip_c0 += 8; - c0 = vaddq_s16(c0, offset); - - int16x8_t r0 = vldrbq_z_s16(ip_r0, p); - ip_r0 += 8; - acc_0 = vmladavaq_p_s16(acc_0, r0, c0, p); - } - - if (bias) - { - acc_0 += bias[i_out_ch]; - } - acc_0 = arm_nn_requantize(acc_0, output_mult[i_out_ch], output_shift[i_out_ch]); - acc_0 += out_offset; - acc_0 = MAX(acc_0, activation_min); - acc_0 = MIN(acc_0, activation_max); - out[i_out_ch] = (q7_t)acc_0; - } - out += output_ch; - } - } - return out; - -#else - (void)input_row; - (void)input_col; - (void)output_ch; - (void)col_batches; - (void)output_shift; - (void)output_mult; - (void)out_offset; - (void)col_offset; - (void)row_offset; - (void)activation_min; - (void)activation_max; - (void)row_len; - (void)bias; - (void)out; - return NULL; -#endif -} diff --git a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/CMakeLists.txt b/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/CMakeLists.txt deleted file mode 100644 index 7ffc0e7..0000000 --- a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/CMakeLists.txt +++ /dev/null @@ -1,21 +0,0 @@ -# -# Copyright (c) 2019-2021 Arm Limited. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -file(GLOB SRC "./*_s8.c") -target_sources(cmsis-nn PRIVATE ${SRC} arm_fully_connected_s16.c) - diff --git a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c b/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c deleted file mode 100644 index 1d396ed..0000000 --- a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_fully_connected_mat_q7_vec_q15.c - * Description: Mixed Q15-Q7 fully-connected layer function - * - * $Date: 20. July 2021 - * $Revision: V.1.1.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup FC - * @{ - */ - -/** - * @brief Mixed Q15-Q7 fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * - * Buffer size: - * - * vec_buffer size: 0 - * - * Q7_Q15 version of the fully connected layer - * - * Weights are in q7_t and Activations are in q15_t - * - */ - -arm_status arm_fully_connected_mat_q7_vec_q15(const q15_t *pV, - const q7_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q15_t *pOut, - q15_t *vec_buffer) -{ - (void)vec_buffer; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - const q7_t *pB = pM; - const q7_t *pB2; - q15_t *pO = pOut; - const q7_t *pBias = bias; - const q15_t *pA = pV; - - uint16_t rowCnt = num_of_rows >> 1; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - uint16_t colCnt = dim_vec >> 2; - - pA = pV; - pB2 = pB + dim_vec; - - while (colCnt) - { - q31_t inV, inM11, inM12, inM21, inM22; - pB = read_and_pad(pB, &inM11, &inM12); - pB2 = read_and_pad(pB2, &inM21, &inM22); - - inV = arm_nn_read_q15x2_ia(&pA); - - sum = __SMLAD(inV, inM11, sum); - sum2 = __SMLAD(inV, inM21, sum2); - - inV = arm_nn_read_q15x2_ia(&pA); - - sum = __SMLAD(inV, inM12, sum); - sum2 = __SMLAD(inV, inM22, sum2); - - colCnt--; - } - colCnt = dim_vec & 0x3; - while (colCnt) - { - q15_t inV = *pA++; - q7_t inM = *pB++; - q7_t inM2 = *pB2++; - - sum += inV * inM; - sum2 += inV * inM2; - colCnt--; - } /* while over colCnt */ - *pO++ = (q15_t)(__SSAT((sum >> out_shift), 16)); - *pO++ = (q15_t)(__SSAT((sum2 >> out_shift), 16)); - - /*adjust the pointers and counters */ - pB += dim_vec; - rowCnt--; - } - - /* left-over part of the rows */ - rowCnt = num_of_rows & 0x1; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - uint16_t colCnt = dim_vec >> 2; - - pA = pV; - - while (colCnt) - { - q31_t inV1, inV2, inM11, inM12; - - pB = read_and_pad(pB, &inM11, &inM12); - - inV1 = arm_nn_read_q15x2_ia(&pA); - sum = __SMLAD(inV1, inM11, sum); - - inV2 = arm_nn_read_q15x2_ia(&pA); - sum = __SMLAD(inV2, inM12, sum); - - colCnt--; - } - - /* left-over of the vector */ - colCnt = dim_vec & 0x3; - while (colCnt) - { - q15_t inV = *pA++; - q7_t inM = *pB++; - sum += inV * inM; - colCnt--; - } - - *pO++ = (q15_t)(__SSAT((sum >> out_shift), 16)); - - rowCnt--; - } - -#else - int i, j; - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - for (i = 0; i < num_of_rows; i++) - { - int ip_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift); - for (j = 0; j < dim_vec; j++) - { - ip_out += pV[j] * pM[i * dim_vec + j]; - } - pOut[i] = (q15_t)__SSAT((ip_out >> out_shift), 16); - } - -#endif /* ARM_MATH_DSP */ - - /* Return to ARM_MATH_SUCCESS */ - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of FC group - */ diff --git a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c b/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c deleted file mode 100644 index 1009a75..0000000 --- a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c +++ /dev/null @@ -1,417 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_fully_connected_mat_q7_vec_q15_opt.c - * Description: Mixed Q15-Q7 opt fully-connected layer function - * - * $Date: 20. July 2021 - * $Revision: V.1.1.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup FC - * @{ - */ - -/** - * @brief Mixed Q15-Q7 opt fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * - * Buffer size: - * - * vec_buffer size: 0 - * - * Q7_Q15 version of the fully connected layer - * - * Weights are in q7_t and Activations are in q15_t - * - * Limitation: x4 version requires weight reordering to work - * - * Here we use only one pointer to read 4 rows in the weight - * matrix. So if the original q7_t matrix looks like this: - * - * | a11 | a12 | a13 | a14 | a15 | a16 | a17 | - * - * | a21 | a22 | a23 | a24 | a25 | a26 | a27 | - * - * | a31 | a32 | a33 | a34 | a35 | a36 | a37 | - * - * | a41 | a42 | a43 | a44 | a45 | a46 | a47 | - * - * | a51 | a52 | a53 | a54 | a55 | a56 | a57 | - * - * | a61 | a62 | a63 | a64 | a65 | a66 | a67 | - * - * We operates on multiple-of-4 rows, so the first four rows becomes - * - * | a11 | a21 | a12 | a22 | a31 | a41 | a32 | a42 | - * - * | a13 | a23 | a14 | a24 | a33 | a43 | a34 | a44 | - * - * | a15 | a25 | a16 | a26 | a35 | a45 | a36 | a46 | - * - * The column left over will be in-order. - * which is: - * | a17 | a27 | a37 | a47 | - * - * For the left-over rows, we do 1x1 computation, so the data remains - * as its original order. - * - * So the stored weight matrix looks like this: - * - * | a11 | a21 | a12 | a22 | a31 | a41 | - * - * | a32 | a42 | a13 | a23 | a14 | a24 | - * - * | a33 | a43 | a34 | a44 | a15 | a25 | - * - * | a16 | a26 | a35 | a45 | a36 | a46 | - * - * | a17 | a27 | a37 | a47 | a51 | a52 | - * - * | a53 | a54 | a55 | a56 | a57 | a61 | - * - * | a62 | a63 | a64 | a65 | a66 | a67 | - * - */ - -arm_status arm_fully_connected_mat_q7_vec_q15_opt(const q15_t *pV, - const q7_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q15_t *pOut, - q15_t *vec_buffer) -{ - - (void)vec_buffer; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - const q7_t *pB = pM; - q15_t *pO = pOut; - const q7_t *pBias = bias; - const q15_t *pA = pV; - - uint16_t rowCnt = num_of_rows >> 2; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = dim_vec >> 1; - - pA = pV; - -#ifdef USE_INTRINSIC - -#ifndef ARM_MATH_BIG_ENDIAN - - while (colCnt) - { - q31_t inM11, inM12, inM13, inM14; - q31_t inV; - - inV = arm_nn_read_q15x2_ia(&pA); - inM11 = arm_nn_read_q7x4_ia(&pB); - inM12 = __SXTB16(__ROR(inM11, 8)); - inM11 = __SXTB16(inM11); - sum = __SMLAD(inM11, inV, sum); - sum2 = __SMLAD(inM12, inV, sum2); - inM13 = arm_nn_read_q7x4_ia(&pB); - inM14 = __SXTB16(__ROR(inM13, 8)); - inM13 = __SXTB16(inM13); - sum3 = __SMLAD(inM13, inV, sum3); - sum4 = __SMLAD(inM14, inV, sum4); - colCnt--; - } - -#else - - while (colCnt) - { - q31_t inM11, inM12, inM13, inM14; - q31_t inV; - - inV = *__SIMD32(pA)++; - inM11 = arm_nn_read_q7x4_ia(&pB); - inM12 = __SXTB16(__ROR(inM11, 8)); - inM11 = __SXTB16(inM11); - sum = __SMLAD(inM12, inV, sum); - sum2 = __SMLAD(inM11, inV, sum2); - inM13 = arm_nn_read_q7x4_ia(&pB); - inM14 = __SXTB16(__ROR(inM13, 8)); - inM13 = __SXTB16(inM13); - sum3 = __SMLAD(inM14, inV, sum3); - sum4 = __SMLAD(inM13, inV, sum4); - colCnt--; - } - -#endif /* ARM_MATH_BIG_ENDIAN */ - -#else - - /* - * register needed: - * loop counter: colCnt - * accumulators: sum, sum2, sum3, sum4 - * pointers: pB, pA - * weight data: inM11, inM12, inM13, inM14 - * activation data: inV - */ - -#ifndef ARM_MATH_BIG_ENDIAN - asm volatile("COL_LOOP_%=:\n" - "ldr.w r4, [%[pA]], #4\n" - "ldr.w r1, [%[pB]], #8\n" - "mov.w r0, r1, ror #8\n" - "sxtb16 r0, r0\n" - "sxtb16 r1, r1\n" - "smlad %[sum], r4, r1, %[sum]\n" - "smlad %[sum2], r4, r0, %[sum2]\n" - "ldr.w r3, [%[pB], #-4]\n" - "mov.w r2, r3, ror #8\n" - "sxtb16 r2, r2\n" - "sxtb16 r3, r3\n" - "smlad %[sum3], r4, r3, %[sum3]\n" - "smlad %[sum4], r4, r2, %[sum4]\n" - "subs %[colCnt], #1\n" - "bne COL_LOOP_%=\n" - : [ sum ] "+r"(sum), - [ sum2 ] "+r"(sum2), - [ sum3 ] "+r"(sum3), - [ sum4 ] "+r"(sum4), - [ pB ] "+r"(pB), - [ pA ] "+r"(pA) - : [ colCnt ] "r"(colCnt) - : "r0", "r1", "r2", "r3", "r4"); -#else - asm volatile("COL_LOOP_%=:\n" - "ldr.w r4, [%[pA]], #4\n" - "ldr.w r1, [%[pB]], #8\n" - "mov.w r0, r1, ror #8\n" - "sxtb16 r0, r0\n" - "sxtb16 r1, r1\n" - "smlad %[sum], r4, r0, %[sum]\n" - "smlad %[sum2], r4, r1, %[sum2]\n" - "ldr.w r3, [%[pB], #-4]\n" - "mov.w r2, r3, ror #8\n" - "sxtb16 r2, r2\n" - "sxtb16 r3, r3\n" - "smlad %[sum3], r4, r2, %[sum3]\n" - "smlad %[sum4], r4, r3, %[sum4]\n" - "subs %[colCnt], #1\n" - "bne COL_LOOP_%=\n" - : [ sum ] "+r"(sum), - [ sum2 ] "+r"(sum2), - [ sum3 ] "+r"(sum3), - [ sum4 ] "+r"(sum4), - [ pB ] "+r"(pB), - [ pA ] "+r"(pA) - : [ colCnt ] "r"(colCnt) - : "r0", "r1", "r2", "r3", "r4"); -#endif /* ARM_MATH_BIG_ENDIAN */ - -#endif /* USE_INTRINSIC */ - - colCnt = dim_vec & 0x1; - while (colCnt) - { - q15_t inV = *pA++; - q7_t inM = *pB++; - q7_t inM2 = *pB++; - q7_t inM3 = *pB++; - q7_t inM4 = *pB++; - - sum += inV * inM; - sum2 += inV * inM2; - sum3 += inV * inM3; - sum4 += inV * inM4; - colCnt--; - } /* while over colCnt */ - *pO++ = (q15_t)(__SSAT((sum >> out_shift), 16)); - *pO++ = (q15_t)(__SSAT((sum2 >> out_shift), 16)); - *pO++ = (q15_t)(__SSAT((sum3 >> out_shift), 16)); - *pO++ = (q15_t)(__SSAT((sum4 >> out_shift), 16)); - - /* adjust the pointers and counters */ - rowCnt--; - } - - /* left-over part of the rows */ - rowCnt = num_of_rows & 0x3; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = dim_vec >> 2; - - pA = pV; - - while (colCnt) - { - q31_t inV1, inV2, inM11, inM12; - - pB = read_and_pad(pB, &inM11, &inM12); - - inV1 = arm_nn_read_q15x2_ia(&pA); - sum = __SMLAD(inV1, inM11, sum); - - inV2 = arm_nn_read_q15x2_ia(&pA); - sum = __SMLAD(inV2, inM12, sum); - - colCnt--; - } - - /* left-over of the vector */ - colCnt = dim_vec & 0x3; - while (colCnt) - { - q15_t inV = *pA++; - q7_t inM = *pB++; - sum += inV * inM; - colCnt--; - } - - *pO++ = (q15_t)(__SSAT((sum >> out_shift), 16)); - - rowCnt--; - } - -#else - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - uint16_t rowCnt = num_of_rows >> 2; - const q7_t *pB = pM; - const q15_t *pA; - q15_t *pO = pOut; - const q7_t *pBias = bias; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - uint16_t colCnt = dim_vec >> 1; - - pA = pV; - - while (colCnt) - { - q15_t inA1 = *pA++; - q15_t inA2 = *pA++; - - q7_t inB1 = *pB++; - q7_t inB3 = *pB++; - q7_t inB2 = *pB++; - q7_t inB4 = *pB++; - - sum += inA1 * inB1 + inA2 * inB2; - sum2 += inA1 * inB3 + inA2 * inB4; - - inB1 = *pB++; - inB3 = *pB++; - inB2 = *pB++; - inB4 = *pB++; - - sum3 += inA1 * inB1 + inA2 * inB2; - sum4 += inA1 * inB3 + inA2 * inB4; - - colCnt--; - } - - colCnt = dim_vec & 0x1; - while (colCnt) - { - q15_t inA = *pA++; - q7_t inB = *pB++; - sum += inA * inB; - inB = *pB++; - sum2 += inA * inB; - inB = *pB++; - sum3 += inA * inB; - inB = *pB++; - sum4 += inA * inB; - - colCnt--; - } - *pO++ = (q15_t)__SSAT((sum >> out_shift), 16); - *pO++ = (q15_t)__SSAT((sum2 >> out_shift), 16); - *pO++ = (q15_t)__SSAT((sum3 >> out_shift), 16); - *pO++ = (q15_t)__SSAT((sum4 >> out_shift), 16); - - rowCnt--; - } - - rowCnt = num_of_rows & 0x3; - - while (rowCnt) - { - int ip_out = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - int j; - - pA = pV; - for (j = 0; j < dim_vec; j++) - { - q15_t inA = *pA++; - q7_t inB = *pB++; - ip_out += inA * inB; - } - *pO++ = (q15_t)__SSAT((ip_out >> out_shift), 16); - - rowCnt--; - } - -#endif /* ARM_MATH_DSP */ - - /* Return to ARM_MATH_SUCCESS */ - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of FC group - */ diff --git a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c b/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c deleted file mode 100644 index 2f0aefa..0000000 --- a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c +++ /dev/null @@ -1,195 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_fully_connected_q15.c - * Description: Q15 basic fully-connected layer function - * - * $Date: 20. July 2021 - * $Revision: V.1.1.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup FC - * @{ - */ - -/** - * @brief Q15 opt fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - * - * @details - * - * Buffer size: - * - * vec_buffer size: 0 - * - */ - -arm_status arm_fully_connected_q15(const q15_t *pV, - const q15_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q15_t *bias, - q15_t *pOut, - q15_t *vec_buffer) -{ - (void)vec_buffer; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - const q15_t *pB = pM; - const q15_t *pB2 = pB + dim_vec; - q15_t *pO = pOut; - const q15_t *pA; - const q15_t *pBias = bias; - uint16_t rowCnt = num_of_rows >> 1; - - /* this loop loops over different output */ - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = dim_vec >> 2; - - pA = pV; - pB2 = pB + dim_vec; - - while (colCnt) - { - q31_t inV1, inM1, inM2; - inV1 = arm_nn_read_q15x2_ia(&pA); - inM1 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inV1, inM1, sum); - inM2 = arm_nn_read_q15x2_ia(&pB2); - sum2 = __SMLAD(inV1, inM2, sum2); - - inV1 = arm_nn_read_q15x2_ia(&pA); - inM1 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inV1, inM1, sum); - inM2 = arm_nn_read_q15x2_ia(&pB2); - sum2 = __SMLAD(inV1, inM2, sum2); - - colCnt--; - } - colCnt = dim_vec & 0x3; - while (colCnt) - { - q15_t inV = *pA++; - q15_t inM = *pB++; - q15_t inM2 = *pB2++; - - sum += inV * inM; - sum2 += inV * inM2; - colCnt--; - } /* while over colCnt */ - *pO++ = (q15_t)(__SSAT((sum >> out_shift), 16)); - *pO++ = (q15_t)(__SSAT((sum2 >> out_shift), 16)); - - /* adjust the pointers and counters */ - pB = pB + dim_vec; - rowCnt--; - } - - rowCnt = num_of_rows & 0x1; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = dim_vec >> 2; - - pA = pV; - - while (colCnt) - { - q31_t inV1, inM1; - inV1 = arm_nn_read_q15x2_ia(&pA); - inM1 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inV1, inM1, sum); - - inV1 = arm_nn_read_q15x2_ia(&pA); - inM1 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inV1, inM1, sum); - - colCnt--; - } - - /* left-over of the vector */ - colCnt = dim_vec & 0x3; - while (colCnt) - { - q15_t inV = *pA++; - q15_t inM = *pB++; - - sum += inV * inM; - - colCnt--; - } - - *pO++ = (q15_t)(__SSAT((sum >> out_shift), 16)); - - rowCnt--; - } - -#else - int i, j; - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - for (i = 0; i < num_of_rows; i++) - { - int ip_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift); - for (j = 0; j < dim_vec; j++) - { - ip_out += pV[j] * pM[i * dim_vec + j]; - } - pOut[i] = (q15_t)__SSAT((ip_out >> out_shift), 16); - } - -#endif /* ARM_MATH_DSP */ - - /* Return to application */ - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of FC group - */ diff --git a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c b/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c deleted file mode 100644 index 3dd299a..0000000 --- a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c +++ /dev/null @@ -1,336 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_fully_connected_q15_opt.c - * Description: Q15 opt fully-connected layer function - * - * $Date: 20. July 2021 - * $Revision: V.1.1.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup FC - * @{ - */ - -/** - * @brief Q15 opt fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - * - * @details - * - * Buffer size: - * - * vec_buffer size: 0 - * - * Here we use only one pointer to read 4 rows in the weight - * matrix. So if the original matrix looks like this: - * - * | a11 | a12 | a13 | - * - * | a21 | a22 | a23 | - * - * | a31 | a32 | a33 | - * - * | a41 | a42 | a43 | - * - * | a51 | a52 | a53 | - * - * | a61 | a62 | a63 | - * - * We operates on multiple-of-4 rows, so the first four rows becomes - * - * | a11 | a12 | a21 | a22 | a31 | a32 | a41 | a42 | - * - * | a13 | a23 | a33 | a43 | - * - * Remaining rows are kept the same original order. - * - * So the stored weight matrix looks like this: - * - * - * | a11 | a12 | a21 | a22 | a31 | a32 | a41 | a42 | - * - * | a13 | a23 | a33 | a43 | a51 | a52 | a53 | a61 | - * - * | a62 | a63 | - */ - -arm_status arm_fully_connected_q15_opt(const q15_t *pV, - const q15_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q15_t *bias, - q15_t *pOut, - q15_t *vec_buffer) -{ - (void)vec_buffer; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - const q15_t *pB = pM; - q15_t *pO = pOut; - const q15_t *pBias = bias; - const q15_t *pA = pV; - - uint16_t rowCnt = num_of_rows >> 2; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = dim_vec >> 1; - - pA = pV; - -#ifdef USE_INTRINSIC - - while (colCnt) - { - q31_t inM11, inM12, inM13, inM14; - q31_t inV; - - inV = arm_nn_read_q15x2_ia(&pA); - inM11 = arm_nn_read_q15x2_ia(&pB); - sum = __SMLAD(inV, inM11, sum); - inM12 = arm_nn_read_q15x2_ia(&pB); - sum2 = __SMLAD(inV, inM12, sum2); - inM13 = arm_nn_read_q15x2_ia(&pB); - sum3 = __SMLAD(inV, inM13, sum3); - inM14 = arm_nn_read_q15x2_ia(&pB); - sum4 = __SMLAD(inV, inM14, sum4); - colCnt--; - } - -#else - - /* - * register needed: - * loop counter: colCnt - * accumulators: sum, sum2, sum3, sum4 - * pointers: pB, pA - * weight data: inM11, inM12, inM13, inM14 - * activation data: inV - */ - - asm volatile("COL_LOOP_%=:\n" - "ldr.w r4, [%[pA]], #4\n" - "ldr.w r0, [%[pB]], #16\n" - "smlad %[sum], r4, r0, %[sum]\n" - "ldr.w r1, [%[pB] , #-12]\n" - "smlad %[sum2], r4, r1, %[sum2]\n" - "ldr.w r2, [%[pB] , #-8]\n" - "smlad %[sum3], r4, r2, %[sum3]\n" - "ldr.w r3, [%[pB] , #-4]\n" - "smlad %[sum4], r4, r3, %[sum4]\n" - "subs %[colCnt], #1\n" - "bne COL_LOOP_%=\n" - : [ sum ] "+r"(sum), - [ sum2 ] "+r"(sum2), - [ sum3 ] "+r"(sum3), - [ sum4 ] "+r"(sum4), - [ pB ] "+r"(pB), - [ pA ] "+r"(pA) - : [ colCnt ] "r"(colCnt) - : "r0", "r1", "r2", "r3", "r4"); - -#endif /* USE_INTRINSIC */ - - colCnt = dim_vec & 0x1; - while (colCnt) - { - - q15_t inV = *pA++; - q15_t inM = *pB++; - q15_t inM2 = *pB++; - q15_t inM3 = *pB++; - q15_t inM4 = *pB++; - - sum += inV * inM; - sum2 += inV * inM2; - sum3 += inV * inM3; - sum4 += inV * inM4; - colCnt--; - } /* while over colCnt */ - *pO++ = (q15_t)(__SSAT((sum >> out_shift), 16)); - *pO++ = (q15_t)(__SSAT((sum2 >> out_shift), 16)); - *pO++ = (q15_t)(__SSAT((sum3 >> out_shift), 16)); - *pO++ = (q15_t)(__SSAT((sum4 >> out_shift), 16)); - - /* adjust the pointers and counters */ - rowCnt--; - } - - /* left-over part of the rows */ - rowCnt = num_of_rows & 0x3; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = dim_vec >> 2; - - pA = pV; - - while (colCnt) - { - q31_t inV1, inV2, inM1, inM2; - - inM1 = arm_nn_read_q15x2_ia(&pB); - inV1 = arm_nn_read_q15x2_ia(&pA); - sum = __SMLAD(inV1, inM1, sum); - - inM2 = arm_nn_read_q15x2_ia(&pB); - inV2 = arm_nn_read_q15x2_ia(&pA); - sum = __SMLAD(inV2, inM2, sum); - - colCnt--; - } - - /* left-over of the vector */ - colCnt = dim_vec & 0x3; - while (colCnt) - { - q15_t inV = *pA++; - q15_t inM = *pB++; - sum += inV * inM; - colCnt--; - } - - *pO++ = (q15_t)(__SSAT((sum >> out_shift), 16)); - - rowCnt--; - } - -#else - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - uint16_t rowCnt = num_of_rows >> 2; - const q15_t *pB = pM; - const q15_t *pA; - q15_t *pO = pOut; - const q15_t *pBias = bias; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = dim_vec >> 1; - - pA = pV; - while (colCnt) - { - q15_t inA1 = *pA++; - q15_t inA2 = *pA++; - - q15_t inB1 = *pB++; - q15_t inB2 = *pB++; - sum += inA1 * inB1 + inA2 * inB2; - - inB1 = *pB++; - inB2 = *pB++; - sum2 += inA1 * inB1 + inA2 * inB2; - - inB1 = *pB++; - inB2 = *pB++; - sum3 += inA1 * inB1 + inA2 * inB2; - - inB1 = *pB++; - inB2 = *pB++; - sum4 += inA1 * inB1 + inA2 * inB2; - - colCnt--; - } - colCnt = dim_vec & 0x1; - while (colCnt) - { - q15_t inA = *pA++; - q15_t inB = *pB++; - sum += inA * inB; - inB = *pB++; - sum2 += inA * inB; - inB = *pB++; - sum3 += inA * inB; - inB = *pB++; - sum4 += inA * inB; - colCnt--; - } - *pO++ = (q15_t)__SSAT((sum >> out_shift), 16); - *pO++ = (q15_t)__SSAT((sum2 >> out_shift), 16); - *pO++ = (q15_t)__SSAT((sum3 >> out_shift), 16); - *pO++ = (q15_t)__SSAT((sum4 >> out_shift), 16); - - rowCnt--; - } - rowCnt = num_of_rows & 0x3; - - while (rowCnt) - { - int ip_out = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - int j; - - pA = pV; - for (j = 0; j < dim_vec; j++) - { - q15_t inA = *pA++; - q15_t inB = *pB++; - ip_out += inA * inB; - } - *pO++ = (q15_t)__SSAT((ip_out >> out_shift), 16); - - rowCnt--; - } - -#endif /* ARM_MATH_DSP */ - - /* Return to ARM_MATH_SUCCESS */ - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of FC group - */ diff --git a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c b/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c deleted file mode 100644 index 8df7b08..0000000 --- a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_fully_connected_q7.c - * Description: Q7 basic fully-connected layer function - * - * $Date: July 20, 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup FC - * @{ - */ - -/** - * @brief Q7 basic fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * - * Buffer size: - * - * vec_buffer size: dim_vec - * - * This basic function is designed to work with regular weight - * matrix without interleaving. - * - */ - -arm_status arm_fully_connected_q7(const q7_t *pV, - const q7_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q7_t *pOut, - q15_t *vec_buffer) -{ - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - const q7_t *pB = pM; - const q7_t *pB2; - q7_t *pO = pOut; - const q7_t *pBias = bias; - const q15_t *pA; - uint16_t rowCnt = num_of_rows >> 1; - - /* expand the vector into the buffer */ - arm_q7_to_q15_reordered_no_shift(pV, vec_buffer, dim_vec); - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - uint16_t colCnt = dim_vec >> 2; - - pA = vec_buffer; - pB2 = pB + dim_vec; - - while (colCnt) - { - q31_t inV, inM11, inM12, inM21, inM22; - pB = read_and_pad_reordered(pB, &inM11, &inM12); - pB2 = read_and_pad_reordered(pB2, &inM21, &inM22); - - inV = arm_nn_read_q15x2_ia(&pA); - - sum = __SMLAD(inV, inM11, sum); - sum2 = __SMLAD(inV, inM21, sum2); - - inV = arm_nn_read_q15x2_ia(&pA); - - sum = __SMLAD(inV, inM12, sum); - sum2 = __SMLAD(inV, inM22, sum2); - - colCnt--; - } - colCnt = dim_vec & 0x3; - while (colCnt) - { - q7_t inV = *pA++; - q15_t inM = *pB++; - q15_t inM2 = *pB2++; - - sum += inV * inM; - sum2 += inV * inM2; - colCnt--; - } /* while over colCnt */ - *pO++ = (q7_t)(__SSAT((sum >> out_shift), 8)); - *pO++ = (q7_t)(__SSAT((sum2 >> out_shift), 8)); - - /* adjust the pointers and counters */ - pB += dim_vec; - rowCnt--; - } - - /* left-over part of the rows */ - rowCnt = num_of_rows & 0x1; - - while (rowCnt) - { - uint16_t colCnt = dim_vec >> 2; - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - pA = vec_buffer; - - while (colCnt) - { - q31_t inV1, inV2, inM11, inM12; - - pB = read_and_pad_reordered(pB, &inM11, &inM12); - - inV1 = arm_nn_read_q15x2_ia(&pA); - sum = __SMLAD(inV1, inM11, sum); - - inV2 = arm_nn_read_q15x2_ia(&pA); - sum = __SMLAD(inV2, inM12, sum); - - colCnt--; - } - - /* left-over of the vector */ - colCnt = dim_vec & 0x3; - while (colCnt) - { - q7_t inV = *pA++; - q15_t inM = *pB++; - sum += inV * inM; - colCnt--; - } - - *pO++ = (q7_t)(__SSAT((sum >> out_shift), 8)); - - rowCnt--; - } - -#else - (void)vec_buffer; - int i, j; - - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - for (i = 0; i < num_of_rows; i++) - { - int ip_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift); - for (j = 0; j < dim_vec; j++) - { - ip_out += pV[j] * pM[i * dim_vec + j]; - } - pOut[i] = (q7_t)__SSAT((ip_out >> out_shift), 8); - } - -#endif /* ARM_MATH_DSP */ - - /* Return to ARM_MATH_SUCCESS */ - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of FC group - */ diff --git a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c b/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c deleted file mode 100644 index 4c27c6f..0000000 --- a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c +++ /dev/null @@ -1,495 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_fully_connected_q7_opt.c - * Description: Q7 basic fully-connected layer function - * - * $Date: 20. July 2021 - * $Revision: V.1.1.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup FC - * @{ - */ - -/** - * @brief Q7 opt fully-connected layer function - * @param[in] pV pointer to input vector - * @param[in] pM pointer to matrix weights - * @param[in] dim_vec length of the vector - * @param[in] num_of_rows number of rows in weight matrix - * @param[in] bias_shift amount of left-shift for bias - * @param[in] out_shift amount of right-shift for output - * @param[in] bias pointer to bias - * @param[in,out] pOut pointer to output vector - * @param[in,out] vec_buffer pointer to buffer space for input - * @return The function returns ARM_MATH_SUCCESS - * - * @details - * - * Buffer size: - * - * vec_buffer size: dim_vec - * - * This opt function is designed to work with interleaved weight - * matrix. The vector input is assumed in q7_t format, we call - * arm_q7_to_q15_no_shift_shuffle function to expand into - * q15_t format with certain weight re-ordering, refer to the function - * comments for more details. - * Here we use only one pointer to read 4 rows in the weight - * matrix. So if the original q7_t matrix looks like this: - * - * | a11 | a12 | a13 | a14 | a15 | a16 | a17 | - * - * | a21 | a22 | a23 | a24 | a25 | a26 | a27 | - * - * | a31 | a32 | a33 | a34 | a35 | a36 | a37 | - * - * | a41 | a42 | a43 | a44 | a45 | a46 | a47 | - * - * | a51 | a52 | a53 | a54 | a55 | a56 | a57 | - * - * | a61 | a62 | a63 | a64 | a65 | a66 | a67 | - * - * - * We operates on multiple-of-4 rows, so the first four rows becomes - * - * | a11 | a21 | a13 | a23 | a31 | a41 | a33 | a43 | - * - * | a12 | a22 | a14 | a24 | a32 | a42 | a34 | a44 | - * - * | a15 | a25 | a35 | a45 | a16 | a26 | a36 | a46 | - * - * So within the kernel, we first read the re-ordered vector in as: - * - * | b1 | b3 | and | b2 | b4 | - * - * the four q31_t weights will look like - * - * | a11 | a13 |, | a21 | a23 |, | a31 | a33 |, | a41 | a43 | - * - * | a12 | a14 |, | a22 | a24 |, | a32 | a34 |, | a42 | a44 | - * - * The column left over will be in-order. - * which is: - * - * | a17 | a27 | a37 | a47 | - * - * For the left-over rows, we do 1x1 computation, so the data remains - * as its original order. - * - * So the stored weight matrix looks like this: - * - * | a11 | a21 | a13 | a23 | a31 | a41 | - * - * | a33 | a43 | a12 | a22 | a14 | a24 | - * - * | a32 | a42 | a34 | a44 | a15 | a25 | - * - * | a35 | a45 | a16 | a26 | a36 | a46 | - * - * | a17 | a27 | a37 | a47 | a51 | a52 | - * - * | a53 | a54 | a55 | a56 | a57 | a61 | - * - * | a62 | a63 | a64 | a65 | a66 | a67 | - * - * - */ - -arm_status arm_fully_connected_q7_opt(const q7_t *pV, - const q7_t *pM, - const uint16_t dim_vec, - const uint16_t num_of_rows, - const uint16_t bias_shift, - const uint16_t out_shift, - const q7_t *bias, - q7_t *pOut, - q15_t *vec_buffer) -{ - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - const q7_t *pB = pM; - q7_t *pO = pOut; - const q7_t *pBias = bias; - const q15_t *pA; - uint16_t rowCnt = num_of_rows >> 2; - - arm_q7_to_q15_reordered_no_shift(pV, vec_buffer, dim_vec); - - while (rowCnt) - { - - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = dim_vec >> 2; - - pA = vec_buffer; - -#ifdef USE_INTRINSIC - -#ifndef ARM_MATH_BIG_ENDIAN - while (colCnt) - { - q31_t inM11, inM12, inM13, inM14; - q31_t inV; - - inV = arm_nn_read_q15x2_ia(&pA); - inM11 = arm_nn_read_q7x4_ia(&pB); - inM12 = __SXTB16(__ROR(inM11, 8)); - inM11 = __SXTB16(inM11); - sum = __SMLAD(inM11, inV, sum); - sum2 = __SMLAD(inM12, inV, sum2); - inM13 = arm_nn_read_q7x4_ia(&pB); - inM14 = __SXTB16(__ROR(inM13, 8)); - inM13 = __SXTB16(inM13); - sum3 = __SMLAD(inM13, inV, sum3); - sum4 = __SMLAD(inM14, inV, sum4); - - inV = arm_nn_read_q15x2_ia(&pA); - inM11 = arm_nn_read_q7x4_ia(&pB); - inM12 = __SXTB16(__ROR(inM11, 8)); - inM11 = __SXTB16(inM11); - sum = __SMLAD(inM11, inV, sum); - sum2 = __SMLAD(inM12, inV, sum2); - inM13 = arm_nn_read_q7x4_ia(&pB); - inM14 = __SXTB16(__ROR(inM13, 8)); - inM13 = __SXTB16(inM13); - sum3 = __SMLAD(inM13, inV, sum3); - sum4 = __SMLAD(inM14, inV, sum4); - colCnt--; - } -#else - while (colCnt) - { - q31_t inM11, inM12, inM13, inM14; - q31_t inV; - - inV = arm_nn_read_q15x2_ia(&pA); - inM11 = arm_nn_read_q7x4_ia(&pB); - inM12 = __SXTB16(__ROR(inM11, 8)); - inM11 = __SXTB16(inM11); - sum = __SMLAD(inM12, inV, sum); - sum2 = __SMLAD(inM11, inV, sum2); - inM13 = arm_nn_read_q7x4_ia(&pB); - inM14 = __SXTB16(__ROR(inM13, 8)); - inM13 = __SXTB16(inM13); - sum3 = __SMLAD(inM14, inV, sum3); - sum4 = __SMLAD(inM13, inV, sum4); - - inV = arm_nn_read_q15x2_ia(&pA); - inM11 = arm_nn_read_q7x4_ia(&pB); - inM12 = __SXTB16(__ROR(inM11, 8)); - inM11 = __SXTB16(inM11); - sum = __SMLAD(inM12, inV, sum); - sum2 = __SMLAD(inM11, inV, sum2); - inM13 = arm_nn_read_q7x4_ia(&pB); - inM14 = __SXTB16(__ROR(inM13, 8)); - inM13 = __SXTB16(inM13); - sum3 = __SMLAD(inM14, inV, sum3); - sum4 = __SMLAD(inM13, inV, sum4); - colCnt--; - } -#endif /* ARM_MATH_BIG_ENDIAN */ - -#else - - /* - * register needed: - * loop counter: colCnt - * accumulators: sum, sum2, sum3, sum4 - * pointers: pB, pA - * weight data: inM11, inM12, inM13, inM14 - * activation data: inV - */ - -#ifndef ARM_MATH_BIG_ENDIAN - asm volatile("COL_LOOP_%=:\n" - "ldr.w r4, [%[pA]], #8\n" - "ldr.w r1, [%[pB]], #16\n" - "mov.w r0, r1, ror #8\n" - "sxtb16 r0, r0\n" - "sxtb16 r1, r1\n" - "smlad %[sum], r4, r1, %[sum]\n" - "smlad %[sum2], r4, r0, %[sum2]\n" - "ldr.w r3, [%[pB], #-12]\n" - "mov.w r2, r3, ror #8\n" - "sxtb16 r2, r2\n" - "sxtb16 r3, r3\n" - "smlad %[sum3], r4, r3, %[sum3]\n" - "smlad %[sum4], r4, r2, %[sum4]\n" - "ldr.w r4, [%[pA], #-4]\n" - "ldr.w r1, [%[pB], #-8]\n" - "mov.w r0, r1, ror #8\n" - "sxtb16 r0, r0\n" - "sxtb16 r1, r1\n" - "smlad %[sum], r4, r1, %[sum]\n" - "smlad %[sum2], r4, r0, %[sum2]\n" - "ldr.w r3, [%[pB], #-4]\n" - "mov.w r2, r3, ror #8\n" - "sxtb16 r2, r2\n" - "sxtb16 r3, r3\n" - "smlad %[sum3], r4, r3, %[sum3]\n" - "smlad %[sum4], r4, r2, %[sum4]\n" - "subs %[colCnt], #1\n" - "bne COL_LOOP_%=\n" - : [ sum ] "+r"(sum), - [ sum2 ] "+r"(sum2), - [ sum3 ] "+r"(sum3), - [ sum4 ] "+r"(sum4), - [ pB ] "+r"(pB), - [ pA ] "+r"(pA) - : [ colCnt ] "r"(colCnt) - : "r0", "r1", "r2", "r3", "r4"); -#else - asm volatile("COL_LOOP_%=:\n" - "ldr.w r4, [%[pA]], #8\n" - "ldr.w r1, [%[pB]], #16\n" - "mov.w r0, r1, ror #8\n" - "sxtb16 r0, r0\n" - "sxtb16 r1, r1\n" - "smlad %[sum], r4, r0, %[sum]\n" - "smlad %[sum2], r4, r1, %[sum2]\n" - "ldr.w r3, [%[pB], #-12]\n" - "mov.w r2, r3, ror #8\n" - "sxtb16 r2, r2\n" - "sxtb16 r3, r3\n" - "smlad %[sum3], r4, r2, %[sum3]\n" - "smlad %[sum4], r4, r3, %[sum4]\n" - "ldr.w r4, [%[pA], #-4]\n" - "ldr.w r1, [%[pB], #-8]\n" - "mov.w r0, r1, ror #8\n" - "sxtb16 r0, r0\n" - "sxtb16 r1, r1\n" - "smlad %[sum], r4, r0, %[sum]\n" - "smlad %[sum2], r4, r1, %[sum2]\n" - "ldr.w r3, [%[pB], #-4]\n" - "mov.w r2, r3, ror #8\n" - "sxtb16 r2, r2\n" - "sxtb16 r3, r3\n" - "smlad %[sum3], r4, r2, %[sum3]\n" - "smlad %[sum4], r4, r3, %[sum4]\n" - "subs %[colCnt], #1\n" - "bne COL_LOOP_%=\n" - : [ sum ] "+r"(sum), - [ sum2 ] "+r"(sum2), - [ sum3 ] "+r"(sum3), - [ sum4 ] "+r"(sum4), - [ pB ] "+r"(pB), - [ pA ] "+r"(pA) - : [ colCnt ] "r"(colCnt) - : "r0", "r1", "r2", "r3", "r4"); -#endif /* ARM_MATH_BIG_ENDIAN */ - -#endif /* USE_INTRINSIC */ - - colCnt = dim_vec & 0x3; - while (colCnt) - { - q15_t inV = *pA++; - q7_t inM = *pB++; - q7_t inM2 = *pB++; - q7_t inM3 = *pB++; - q7_t inM4 = *pB++; - - sum += inV * inM; - sum2 += inV * inM2; - sum3 += inV * inM3; - sum4 += inV * inM4; - colCnt--; - } /* while over colCnt */ - *pO++ = (q7_t)(__SSAT((sum >> out_shift), 8)); - *pO++ = (q7_t)(__SSAT((sum2 >> out_shift), 8)); - *pO++ = (q7_t)(__SSAT((sum3 >> out_shift), 8)); - *pO++ = (q7_t)(__SSAT((sum4 >> out_shift), 8)); - - /* adjust the pointers and counters */ - rowCnt--; - } - - /* left-over part of the rows */ - rowCnt = num_of_rows & 0x3; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - uint16_t colCnt = dim_vec >> 2; - - pA = vec_buffer; - - while (colCnt) - { - q31_t inV1, inV2, inM11, inM12; - - pB = read_and_pad_reordered(pB, &inM11, &inM12); - - inV1 = arm_nn_read_q15x2_ia(&pA); - sum = __SMLAD(inV1, inM11, sum); - - inV2 = arm_nn_read_q15x2_ia(&pA); - sum = __SMLAD(inV2, inM12, sum); - - colCnt--; - } - - /* left-over of the vector */ - colCnt = dim_vec & 0x3; - while (colCnt) - { - q15_t inV = *pA++; - q7_t inM = *pB++; - sum += inV * inM; - colCnt--; - } - - *pO++ = (q7_t)(__SSAT((sum >> out_shift), 8)); - - rowCnt--; - } - -#else - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - (void)vec_buffer; - uint16_t rowCnt = num_of_rows >> 2; - const q7_t *pB = pM; - const q7_t *pA; - q7_t *pO = pOut; - const q7_t *pBias = bias; - - while (rowCnt) - { - q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - uint16_t colCnt = dim_vec >> 2; - - pA = pV; - - while (colCnt) - { - q7_t inA1 = *pA++; - q7_t inA3 = *pA++; - q7_t inA2 = *pA++; - q7_t inA4 = *pA++; - - q7_t inB1 = *pB++; - q7_t inB3 = *pB++; - q7_t inB2 = *pB++; - q7_t inB4 = *pB++; - - sum += inA1 * inB1 + inA2 * inB2; - sum2 += inA1 * inB3 + inA2 * inB4; - - inB1 = *pB++; - inB3 = *pB++; - inB2 = *pB++; - inB4 = *pB++; - - sum3 += inA1 * inB1 + inA2 * inB2; - sum4 += inA1 * inB3 + inA2 * inB4; - - inB1 = *pB++; - inB3 = *pB++; - inB2 = *pB++; - inB4 = *pB++; - - sum += inA3 * inB1 + inA4 * inB2; - sum2 += inA3 * inB3 + inA4 * inB4; - - inB1 = *pB++; - inB3 = *pB++; - inB2 = *pB++; - inB4 = *pB++; - - sum3 += inA3 * inB1 + inA4 * inB2; - sum4 += inA3 * inB3 + inA4 * inB4; - - colCnt--; - } - colCnt = dim_vec & 0x3; - while (colCnt) - { - q7_t inA = *pA++; - q7_t inB = *pB++; - sum += inA * inB; - inB = *pB++; - sum2 += inA * inB; - inB = *pB++; - sum3 += inA * inB; - inB = *pB++; - sum4 += inA * inB; - - colCnt--; - } - *pO++ = (q7_t)__SSAT((sum >> out_shift), 8); - *pO++ = (q7_t)__SSAT((sum2 >> out_shift), 8); - *pO++ = (q7_t)__SSAT((sum3 >> out_shift), 8); - *pO++ = (q7_t)__SSAT((sum4 >> out_shift), 8); - - rowCnt--; - } - - rowCnt = num_of_rows & 0x3; - - while (rowCnt) - { - int ip_out = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift); - - int j; - - pA = pV; - for (j = 0; j < dim_vec; j++) - { - q7_t inA = *pA++; - q7_t inB = *pB++; - ip_out += inA * inB; - } - *pO++ = (q7_t)__SSAT((ip_out >> out_shift), 8); - - rowCnt--; - } - -#endif /* ARM_MATH_DSP */ - - /* Return to ARM_MATH_SUCCESS */ - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of FC group - */ diff --git a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s16.c b/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s16.c deleted file mode 100644 index 1b62c0e..0000000 --- a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s16.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_fully_connected_s16 - * Description: Fully connected function compatible with TF Lite. - * - * $Date: 3. August 2021 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup FC - * @{ - */ - -/* - * S16 basic fully-connected and matrix multiplication layer function for TensorFlow Lite - * - * Refer header file for details. - * - */ -arm_status arm_fully_connected_s16(const cmsis_nn_context *ctx, - const cmsis_nn_fc_params *fc_params, - const cmsis_nn_per_tensor_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q15_t *input, - const cmsis_nn_dims *filter_dims, - const q7_t *kernel, - const cmsis_nn_dims *bias_dims, - const int64_t *bias, - const cmsis_nn_dims *output_dims, - q15_t *output) -{ - (void)bias_dims; - (void)ctx; - (void)fc_params->filter_offset; - - int32_t batch_cnt = input_dims->n; - - const q31_t reduced_multiplier = REDUCE_MULTIPLIER(quant_params->multiplier); - - while (batch_cnt) - { - arm_nn_vec_mat_mult_t_s16(input, - kernel, - bias, - output, - reduced_multiplier, - quant_params->shift, - filter_dims->n, /* col_dim or accum_depth */ - output_dims->c, /* row_dim or output_depth */ - fc_params->activation.min, - fc_params->activation.max); - input += filter_dims->n; - output += output_dims->c; - batch_cnt--; - } - - return (ARM_MATH_SUCCESS); -} - -int32_t arm_fully_connected_s16_get_buffer_size(const cmsis_nn_dims *filter_dims) -{ - (void)filter_dims; - return 0; -} - -/** - * @} end of FC group - */ diff --git a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c b/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c deleted file mode 100644 index b5a3110..0000000 --- a/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Copyright (C) 2010-2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_fully_connected_s8 - * Description: Fully connected function compatible with TF Lite. - * - * $Date: 8 April 2022 - * $Revision: V.3.1.0 - * - * Target Processor: Cortex-M and Cortex-A cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup FC - * @{ - */ - -/* - * S8 basic fully-connected and matrix multiplication layer function for TensorFlow Lite - * - * Refer header file for details. - * - */ - -arm_status arm_fully_connected_s8(const cmsis_nn_context *ctx, - const cmsis_nn_fc_params *fc_params, - const cmsis_nn_per_tensor_quant_params *quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input, - const cmsis_nn_dims *filter_dims, - const q7_t *kernel, - const cmsis_nn_dims *bias_dims, - const int32_t *bias, - const cmsis_nn_dims *output_dims, - q7_t *output) -{ - (void)bias_dims; - (void)ctx; - (void)fc_params->filter_offset; - - int32_t batch_cnt = input_dims->n; - - while (batch_cnt) - { - arm_nn_vec_mat_mult_t_s8(input, - kernel, - bias, - output, - fc_params->input_offset, - 0, - fc_params->output_offset, - quant_params->multiplier, - quant_params->shift, - filter_dims->n, /* col_dim or accum_depth */ - output_dims->c, /* row_dim or output_depth */ - fc_params->activation.min, - fc_params->activation.max, - 1L); - input += filter_dims->n; - output += output_dims->c; - batch_cnt--; - } - return (ARM_MATH_SUCCESS); -} - -int32_t arm_fully_connected_s8_get_buffer_size(const cmsis_nn_dims *filter_dims) -{ - (void)filter_dims; - return 0; -} - -/** - * @} end of FC group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/CMakeLists.txt b/Drivers/CMSIS/NN/Source/NNSupportFunctions/CMakeLists.txt deleted file mode 100644 index e8f0d86..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/CMakeLists.txt +++ /dev/null @@ -1,26 +0,0 @@ -# -# Copyright (c) 2019-2022 Arm Limited. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -file(GLOB SRC "./*_s8.c") -target_sources(cmsis-nn PRIVATE ${SRC} arm_q7_to_q15_with_offset.c - arm_nn_mat_mul_kernel_s16.c - arm_q7_to_q15_with_offset.c - arm_nn_mat_mul_kernel_s16.c - arm_nn_vec_mat_mult_t_s16.c - arm_q7_to_q15_no_shift.c) - diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c deleted file mode 100644 index de47574..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_accumulate_q7_to_q15.c - * Description: Accumulate q7 vector into q15 one. - * - * $Date: 20 July 2021 - * $Revision: V.1.1.2 - * - * pSrc Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -void arm_nn_accumulate_q7_to_q15(q15_t *pDst, const q7_t *pSrc, uint32_t length) -{ - q15_t *pCnt = pDst; - const q7_t *pV = pSrc; - int32_t count = length; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - q31_t v1, v2, vo1, vo2; - count = length >> 2; - q31_t in; - - while (count > 0l) - { - q31_t value = arm_nn_read_q7x4_ia(&pV); - v1 = __SXTB16(__ROR((uint32_t)value, 8)); - v2 = __SXTB16(value); -#ifndef ARM_MATH_BIG_ENDIAN - vo2 = (q31_t)__PKHTB(v1, v2, 16); - vo1 = (q31_t)__PKHBT(v2, v1, 16); -#else - vo1 = (q31_t)__PKHTB(v1, v2, 16); - vo2 = (q31_t)__PKHBT(v2, v1, 16); -#endif - - in = arm_nn_read_q15x2(pCnt); - arm_nn_write_q15x2_ia(&pCnt, __QADD16(vo1, in)); - - in = arm_nn_read_q15x2(pCnt); - arm_nn_write_q15x2_ia(&pCnt, __QADD16(vo2, in)); - - count--; - } - count = length & 0x3; -#endif - while (count > 0l) - { - *pCnt++ += *pV++; - count--; - } -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c deleted file mode 100644 index d08ad92..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_add_q7.c - * Description: Non saturating addition of elements of a q7 vector. - * - * $Date: 20. July 2021 - * $Revision: V.1.1.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nn_tables.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -void arm_nn_add_q7(const q7_t *input, q31_t *output, uint32_t block_size) -{ - uint32_t block_count; - q31_t result = 0; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Loop unrolling: Compute 4 outputs at a time */ - block_count = block_size >> 2U; - - while (block_count > 0U) - { - const int32_t mult_q15x2 = (1UL << 16) | 1UL; - q31_t in_q7x4 = arm_nn_read_q7x4_ia(&input); - q31_t temp_q15x2 = __SXTAB16(__SXTB16(in_q7x4), __ROR((uint32_t)in_q7x4, 8)); - - result = __SMLAD(temp_q15x2, mult_q15x2, result); - - /* Decrement loop counter */ - block_count--; - } - - /* Loop unrolling: Compute remaining outputs */ - block_count = block_size & 0x3; -#else - block_count = block_size; -#endif - while (block_count > 0U) - { - /* Add and store result in destination buffer. */ - result += *input++; - - /* Decrement loop counter */ - block_count--; - } - - *output = result; -} - -/** - * @} end of NNBasicMath group - */ \ No newline at end of file diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c deleted file mode 100644 index 6ee1247..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_depthwise_conv_nt_t_padded_s8.c - * Description: Depthwise convolution with padded matrices. - * - * $Date: 09. October 2020 - * $Revision: V.1.0.2 - * - * Target Processor: Cortex-M processors with MVE extension - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -/* - * Depthwise convolution of transposed rhs matrix with 4 lhs matrices. One or more of the rhs matrices are padded. - * Dimensions are the same for lhs and rhs. - * - * Refer header file for details. - * - */ - -q7_t *arm_nn_depthwise_conv_nt_t_padded_s8(const q7_t *lhs, - const q7_t *rhs, - const int32_t input_offset, - const uint16_t num_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int32_t out_offset, - const int32_t activation_min, - const int32_t activation_max, - const uint16_t row_x_col, - const int32_t *const output_bias, - q7_t *out) -{ -#if defined(ARM_MATH_MVEI) - int32_t loop_count = (num_ch + 3) / 4; - const int32_t *bias = output_bias; - uint32_t num_ch_to_process = num_ch; - - for (int i_loop_cnt = 0, offset = 0; i_loop_cnt < loop_count; - num_ch_to_process -= 4, out += 4, offset += 4, i_loop_cnt++) - { - int32x4_t out_0 = vldrwq_s32(bias); - int32x4_t out_1 = out_0; - int32x4_t out_2 = out_0; - int32x4_t out_3 = out_0; - bias += 4; - - const int8_t *rhs_0 = rhs + offset; - const int8_t *lhs_0 = lhs + offset; - const int8_t *lhs_1 = lhs + row_x_col * num_ch + offset; - const int8_t *lhs_2 = lhs + (row_x_col * num_ch * 2) + offset; - const int8_t *lhs_3 = lhs + (row_x_col * num_ch * 3) + offset; - - for (int i_row_x_col = 0; i_row_x_col < row_x_col; i_row_x_col++) - { - const int32x4_t ker_0 = vldrbq_s32(rhs_0); - - int32x4_t ip_0 = vldrbq_s32(lhs_0); - ip_0 = vaddq_n_s32(ip_0, input_offset); - out_0 += vmulq_s32(ip_0, ker_0); - - int32x4_t ip_1 = vldrbq_s32(lhs_1); - ip_1 = vaddq_n_s32(ip_1, input_offset); - out_1 += vmulq_s32(ip_1, ker_0); - - int32x4_t ip_2 = vldrbq_s32(lhs_2); - ip_2 = vaddq_n_s32(ip_2, input_offset); - out_2 += vmulq_s32(ip_2, ker_0); - - int32x4_t ip_3 = vldrbq_s32(lhs_3); - ip_3 = vaddq_n_s32(ip_3, input_offset); - - out_3 += vmulq_s32(ip_3, ker_0); - - lhs_0 += num_ch; - lhs_1 += num_ch; - lhs_2 += num_ch; - lhs_3 += num_ch; - - rhs_0 += num_ch; - } - - const int32x4_t mult = vldrwq_s32(out_mult); - const int32x4_t shift = vldrwq_s32(out_shift); - out_mult += 4; - out_shift += 4; - - out_0 = arm_requantize_mve_32x4(out_0, mult, shift); - out_0 = vaddq_n_s32(out_0, out_offset); - out_0 = vmaxq_s32(out_0, vdupq_n_s32(activation_min)); - out_0 = vminq_s32(out_0, vdupq_n_s32(activation_max)); - mve_pred16_t p = vctp32q(num_ch_to_process); - vstrbq_p_s32(out, out_0, p); - - out_1 = arm_requantize_mve_32x4(out_1, mult, shift); - out_1 = vaddq_n_s32(out_1, out_offset); - out_1 = vmaxq_s32(out_1, vdupq_n_s32(activation_min)); - out_1 = vminq_s32(out_1, vdupq_n_s32(activation_max)); - vstrbq_p_s32(out + num_ch, out_1, p); - - out_2 = arm_requantize_mve_32x4(out_2, mult, shift); - out_2 = vaddq_n_s32(out_2, out_offset); - out_2 = vmaxq_s32(out_2, vdupq_n_s32(activation_min)); - out_2 = vminq_s32(out_2, vdupq_n_s32(activation_max)); - vstrbq_p_s32(out + 2 * num_ch, out_2, p); - - out_3 = arm_requantize_mve_32x4(out_3, mult, shift); - out_3 = vaddq_n_s32(out_3, out_offset); - out_3 = vmaxq_s32(out_3, vdupq_n_s32(activation_min)); - out_3 = vminq_s32(out_3, vdupq_n_s32(activation_max)); - vstrbq_p_s32(out + 3 * num_ch, out_3, p); - } - - const int tail_ch = num_ch & 0x3; - if (tail_ch != 0) - { - out -= (4 - tail_ch); - } - return out + (3 * num_ch); - -#else - (void)lhs; - (void)rhs; - (void)input_offset; - (void)num_ch; - (void)out_shift; - (void)out_mult; - (void)out_offset; - (void)activation_min; - (void)activation_max; - (void)row_x_col; - (void)output_bias; - (void)out; - return NULL; -#endif -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c deleted file mode 100644 index ef594a7..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c +++ /dev/null @@ -1,170 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_depthwise_conv_nt_t_s8.c - * Description: Depthwise convolution on matrices with no padding. - * - * $Date: 09. October 2020 - * $Revision: V.1.0.2 - * - * Target Processor: Cortex-M processors with MVE extension. - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -/* - * Depthwise convolution of rhs matrix with 4 lhs matrices with no padding. Dimensions are the same for lhs and rhs. - * - * Refer header file for details. - * - */ - -q7_t *arm_nn_depthwise_conv_nt_t_s8(const q7_t *lhs, - const q7_t *rhs, - const int32_t input_offset, - const uint16_t num_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int32_t out_offset, - const int32_t activation_min, - const int32_t activation_max, - const uint16_t row_x_col, - const int32_t *const output_bias, - q7_t *out) -{ -#if defined(ARM_MATH_MVEI) - const int32_t *bias = output_bias; - int32_t loop_count = (num_ch + 3) / 4; - uint32_t num_ch_to_process = num_ch; - - for (int i_loop_cnt = 0, offset = 0; i_loop_cnt < loop_count; - num_ch_to_process -= 4, offset += 4, out += 4, i_loop_cnt++) - { - int32x4_t out_0 = vldrwq_s32(bias); - int32x4_t out_1 = out_0; - int32x4_t out_2 = out_0; - int32x4_t out_3 = out_0; - bias += 4; - - const int8_t *rhs_0 = rhs + offset; - const int8_t *lhs_0 = lhs + offset; - const int8_t *lhs_1 = lhs + row_x_col * num_ch + offset; - const int8_t *lhs_2 = lhs + (row_x_col * num_ch * 2) + offset; - const int8_t *lhs_3 = lhs + (row_x_col * num_ch * 3) + offset; - int32x4_t ker_sum = vdupq_n_s32(0); - - for (int i_row_x_col = 0; i_row_x_col < row_x_col; i_row_x_col++) - { - const int32x4_t ker_0 = vldrbq_s32(rhs_0); - ker_sum = vaddq_s32(ker_sum, ker_0); - - int32x4_t ip_0 = vldrbq_s32(lhs_0); - out_0 += vmulq_s32(ip_0, ker_0); - - int32x4_t ip_1 = vldrbq_s32(lhs_1); - out_1 += vmulq_s32(ip_1, ker_0); - - int32x4_t ip_2 = vldrbq_s32(lhs_2); - out_2 += vmulq_s32(ip_2, ker_0); - - int32x4_t ip_3 = vldrbq_s32(lhs_3); - out_3 += vmulq_s32(ip_3, ker_0); - - lhs_0 += num_ch; - lhs_1 += num_ch; - lhs_2 += num_ch; - lhs_3 += num_ch; - - rhs_0 += num_ch; - } - - ker_sum = vmulq_n_s32(ker_sum, input_offset); - out_0 = ker_sum + out_0; - out_1 = ker_sum + out_1; - out_2 = ker_sum + out_2; - out_3 = ker_sum + out_3; - - const int32x4_t mult = vldrwq_s32(out_mult); - const int32x4_t shift = vldrwq_s32(out_shift); - out_mult += 4; - out_shift += 4; - mve_pred16_t p = vctp32q(num_ch_to_process); - - out_0 = arm_requantize_mve_32x4(out_0, mult, shift); - out_0 = vaddq_n_s32(out_0, out_offset); - out_0 = vmaxq_s32(out_0, vdupq_n_s32(activation_min)); - out_0 = vminq_s32(out_0, vdupq_n_s32(activation_max)); - vstrbq_p_s32(out, out_0, p); - - out_1 = arm_requantize_mve_32x4(out_1, mult, shift); - out_1 = vaddq_n_s32(out_1, out_offset); - out_1 = vmaxq_s32(out_1, vdupq_n_s32(activation_min)); - out_1 = vminq_s32(out_1, vdupq_n_s32(activation_max)); - vstrbq_p_s32(out + num_ch, out_1, p); - - out_2 = arm_requantize_mve_32x4(out_2, mult, shift); - out_2 = vaddq_n_s32(out_2, out_offset); - out_2 = vmaxq_s32(out_2, vdupq_n_s32(activation_min)); - out_2 = vminq_s32(out_2, vdupq_n_s32(activation_max)); - vstrbq_p_s32(out + 2 * num_ch, out_2, p); - - out_3 = arm_requantize_mve_32x4(out_3, mult, shift); - out_3 = vaddq_n_s32(out_3, out_offset); - out_3 = vmaxq_s32(out_3, vdupq_n_s32(activation_min)); - out_3 = vminq_s32(out_3, vdupq_n_s32(activation_max)); - vstrbq_p_s32(out + 3 * num_ch, out_3, p); - } - - const int tail_ch = num_ch & 0x3; - if (tail_ch != 0) - { - out -= (4 - tail_ch); - } - - return out + (3 * num_ch); -#else - (void)lhs; - (void)rhs; - (void)input_offset; - (void)num_ch; - (void)out_shift; - (void)out_mult; - (void)out_offset; - (void)activation_min; - (void)activation_max; - (void)row_x_col; - (void)output_bias; - (void)out; - return NULL; -#endif -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c deleted file mode 100644 index b447812..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Copyright (C) 2010-2022 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mat_mul_core_1x_s8.c - * Description: General Matrix-multiplication function - * - * $Date: 19. April 2022 - * $Revision: V.1.0.3 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -/* - * s8 matrix multiplication to process 1 row - * - * Refer header file for details. - * - */ - -arm_status arm_nn_mat_mul_core_1x_s8(int32_t row_elements, - const int8_t *row_base, - const int8_t *col_base, - int32_t *const sum_col, - int32_t *const output) -{ - int32_t acc_n0 = 0; - int32_t sum_tmp = 0; - -#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) - - __ASM volatile(" vldrb.8 q0, [%[col]], #16 \n" - " wlstp.8 lr, %[cnt], 1f \n" - "2: \n" - " vaddva.s8 %[sum], q0 \n" - " vldrb.8 q1, [%[row0]], #16 \n" - " vmladava.s8 %[out0], q0, q1 \n" - " vldrb.8 q0, [%[col]], #16 \n" - " letp lr, 2b \n" - "1: \n" - : [col] "+r"(col_base), [sum] "+Te"(sum_tmp), [row0] "+r"(row_base), [out0] "+Te"(acc_n0) - : [cnt] "r"(row_elements) - : "q0", "q1", "memory", "r14"); -#else - for (int i = 0; i < row_elements; i++) - { - sum_tmp += col_base[i]; - acc_n0 += row_base[i] * col_base[i]; - } -#endif - - *sum_col = sum_tmp; - *output = acc_n0; - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c deleted file mode 100644 index a9d75fb..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright (C) 2010-2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mat_mul_core_4x_s8.c - * Description: General matrix multiplication function for MVE extension - * - * $Date: 19. April 2022 - * $Revision: V.3.0.1 - * - * Target Processor: Cortex-M processors - * -------------------------------------------------------------------- */ -#include "arm_nn_types.h" -#include "arm_nnsupportfunctions.h" -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -/* - * s8 matrix multiplication to process 4 rows and one column - * - * Refer header file for details. - * - */ - -int8_t *arm_nn_mat_mul_core_4x_s8(const int32_t row_elements, - const int32_t offset, - const int8_t *row_base, - const int8_t *col_base_ref, - const int32_t out_ch, - const cmsis_nn_conv_params *conv_params, - const cmsis_nn_per_channel_quant_params *quant_params, - const int32_t *bias, - int8_t *output) -{ - -#if defined(ARM_MATH_MVEI) - for (int i = 0; i < out_ch; i++) - { - int32_t acc_n0 = 0; - int32_t acc_n1 = 0; - int32_t acc_n2 = 0; - int32_t acc_n3 = 0; - - const int8_t *ip_row_0 = row_base; - const int8_t *ip_row_1 = row_base + offset; - const int8_t *ip_row_2 = row_base + (2 * offset); - const int8_t *ip_row_3 = row_base + (3 * offset); - const int8_t *col_base = col_base_ref + i * row_elements; - int32_t sum_tmp = 0; - - __ASM volatile(" vldrb.8 q0, [%[col]], #16 \n" - " wlstp.8 lr, %[cnt], 1f \n" - "2: \n" - " vaddva.s8 %[sum], q0 \n" - " vldrb.8 q1, [%[row0]], #16 \n" - " vmladava.s8 %[out0], q0, q1 \n" - " vldrb.8 q2, [%[row1]], #16 \n" - " vmladava.s8 %[out1], q0, q2 \n" - " vldrb.8 q3, [%[row2]], #16 \n" - " vmladava.s8 %[out2], q0, q3 \n" - " vldrb.8 q4, [%[row3]], #16 \n" - " vmladava.s8 %[out3], q0, q4 \n" - " vldrb.8 q0, [%[col]], #16 \n" - " letp lr, 2b \n" - "1: \n" - : [col] "+r"(col_base), - [sum] "+Te"(sum_tmp), - [row0] "+r"(ip_row_0), - [row1] "+r"(ip_row_1), - [row2] "+r"(ip_row_2), - [row3] "+r"(ip_row_3), - [out0] "+Te"(acc_n0), - [out1] "+Te"(acc_n1), - [out2] "+Te"(acc_n2), - [out3] "+Te"(acc_n3) - : [cnt] "r"(row_elements) - : "q0", "q1", "q2", "q3", "q4", "memory", "r14"); - - int32x4_t res = {acc_n0, acc_n1, acc_n2, acc_n3}; - sum_tmp *= conv_params->input_offset; - if (bias) - { - sum_tmp += bias[i]; - } - res = vaddq_n_s32(res, sum_tmp); - - res = arm_requantize_mve(res, quant_params->multiplier[i], quant_params->shift[i]); - res = vaddq_n_s32(res, conv_params->output_offset); - - res = vmaxq_s32(res, vdupq_n_s32(conv_params->activation.min)); - res = vminq_s32(res, vdupq_n_s32(conv_params->activation.max)); - - const uint32x4_t scatter_offset = {0, (uint32_t)out_ch, (uint32_t)out_ch * 2, (uint32_t)out_ch * 3}; - vstrbq_scatter_offset_s32(output, scatter_offset, res); - output++; - } - - return output + (3 * out_ch); -#else - (void)row_elements; - (void)offset; - (void)row_base; - (void)col_base_ref; - (void)out_ch; - (void)conv_params; - (void)quant_params; - (void)bias; - (void)output; - return NULL; -#endif -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c deleted file mode 100644 index 55eb615..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mat_mult_kernel_s16.c - * Description: Matrix-multiplication function for convolution - * - * $Date: 12 August 2021 - * $Revision: V.1.1.0 - * - * Target Processor: Cortex-M cores - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/* - * Matrix-multiplication function for convolution with per-channel requantization. - * - * Refer header file for details. - * - */ - -q15_t *arm_nn_mat_mult_kernel_s16(const q7_t *input_a, - const q15_t *input_b, - const int32_t output_ch, - const int32_t *out_shift, - const int32_t *out_mult, - const int16_t activation_min, - const int16_t activation_max, - const int32_t num_col_a, - const int64_t *const output_bias, - q15_t *out_0) -{ - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* set up the second output pointers */ - q15_t *out_1 = out_0 + output_ch; - const int64_t *bias = output_bias; - uint16_t row_count = output_ch / 2; - const q7_t *ip_a0 = input_a; - - /* this loop over rows in A */ - while (row_count) - { - /* setup pointers for B */ - const q15_t *ip_b0 = input_b; - const q15_t *ip_b1 = ip_b0 + num_col_a; - - /* align the second pointer for A */ - const q7_t *ip_a1 = ip_a0 + num_col_a; - - /* Init accumulator for channel N and N + 1 */ - q31_t ch_0_out_0 = 0; - q31_t ch_0_out_1 = 0; - q31_t ch_1_out_0 = 0; - q31_t ch_1_out_1 = 0; - - uint16_t col_count = num_col_a / 4; - /* accumulate over the vector */ - while (col_count) - { - q31_t a01, a02, a11, a12; - q31_t b0 = arm_nn_read_q15x2_ia(&ip_b0); - q31_t b1 = arm_nn_read_q15x2_ia(&ip_b1); - - ip_a0 = read_and_pad(ip_a0, &a01, &a02); - ip_a1 = read_and_pad(ip_a1, &a11, &a12); - - ch_0_out_0 = __SMLAD(a01, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a01, b1, ch_0_out_1); - ch_1_out_0 = __SMLAD(a11, b0, ch_1_out_0); - ch_1_out_1 = __SMLAD(a11, b1, ch_1_out_1); - - b0 = arm_nn_read_q15x2_ia(&ip_b0); - b1 = arm_nn_read_q15x2_ia(&ip_b1); - - ch_0_out_0 = __SMLAD(a02, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a02, b1, ch_0_out_1); - ch_1_out_0 = __SMLAD(a12, b0, ch_1_out_0); - ch_1_out_1 = __SMLAD(a12, b1, ch_1_out_1); - - col_count--; - } /* while over col_count */ - col_count = num_col_a & 0x3; - while (col_count) - { - q7_t a0 = *ip_a0++; - q15_t b0 = *ip_b0++; - q7_t a1 = *ip_a1++; - q15_t b1 = *ip_b1++; - - ch_0_out_0 += a0 * b0; - ch_0_out_1 += a0 * b1; - ch_1_out_0 += a1 * b0; - ch_1_out_1 += a1 * b1; - col_count--; - } /* while over col_count */ - if (bias) - { - q31_t reduced_multiplier = REDUCE_MULTIPLIER(*out_mult); - q63_t acc_64 = ch_0_out_0 + *bias; - ch_0_out_0 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - acc_64 = ch_0_out_1 + *bias++; - ch_0_out_1 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - out_mult++; - } - else - { - ch_0_out_0 = arm_nn_requantize(ch_0_out_0, *out_mult, *out_shift); - ch_0_out_1 = arm_nn_requantize(ch_0_out_1, *out_mult, *out_shift); - out_mult++; - } - ch_0_out_0 = MAX(ch_0_out_0, activation_min); - ch_0_out_0 = MIN(ch_0_out_0, activation_max); - *out_0++ = (q15_t)ch_0_out_0; - - ch_0_out_1 = MAX(ch_0_out_1, activation_min); - ch_0_out_1 = MIN(ch_0_out_1, activation_max); - *out_1++ = (q15_t)ch_0_out_1; - out_shift++; - - if (bias) - { - q31_t reduced_multiplier = REDUCE_MULTIPLIER(*out_mult); - q63_t acc_64 = ch_1_out_0 + *bias; - ch_1_out_0 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - acc_64 = ch_1_out_1 + *bias++; - ch_1_out_1 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - out_mult++; - } - else - { - ch_1_out_0 = arm_nn_requantize(ch_1_out_0, *out_mult, *out_shift); - ch_1_out_1 = arm_nn_requantize(ch_1_out_1, *out_mult, *out_shift); - out_mult++; - } - ch_1_out_0 = MAX(ch_1_out_0, activation_min); - ch_1_out_0 = MIN(ch_1_out_0, activation_max); - *out_0++ = (q15_t)ch_1_out_0; - - ch_1_out_1 = MAX(ch_1_out_1, activation_min); - ch_1_out_1 = MIN(ch_1_out_1, activation_max); - *out_1++ = (q15_t)ch_1_out_1; - out_shift++; - - /* skip row */ - ip_a0 += num_col_a; - row_count--; - } - - /* compute the last odd numbered row if any */ - if (output_ch & 0x1) - { - /* setup pointers for B */ - const q15_t *ip_b0 = input_b; - const q15_t *ip_b1 = ip_b0 + num_col_a; - - q31_t ch_0_out_0 = 0; - q31_t ch_0_out_1 = 0; - - uint16_t col_count = num_col_a >> 2; - while (col_count) - { - q31_t a01, a02; - q31_t b0 = arm_nn_read_q15x2_ia(&ip_b0); - q31_t b1 = arm_nn_read_q15x2_ia(&ip_b1); - - ip_a0 = read_and_pad(ip_a0, &a01, &a02); - - ch_0_out_0 = __SMLAD(a01, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a01, b1, ch_0_out_1); - - b0 = arm_nn_read_q15x2_ia(&ip_b0); - b1 = arm_nn_read_q15x2_ia(&ip_b1); - ch_0_out_0 = __SMLAD(a02, b0, ch_0_out_0); - ch_0_out_1 = __SMLAD(a02, b1, ch_0_out_1); - - col_count--; - } - col_count = num_col_a & 0x3; - while (col_count) - { - q7_t a0 = *ip_a0++; - q15_t b0 = *ip_b0++; - q15_t b1 = *ip_b1++; - - ch_0_out_0 += a0 * b0; - ch_0_out_1 += a0 * b1; - col_count--; - } - if (bias) - { - q31_t reduced_multiplier = REDUCE_MULTIPLIER(*out_mult); - q63_t acc_64 = ch_0_out_0 + *bias; - ch_0_out_0 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - acc_64 = ch_0_out_1 + *bias++; - ch_0_out_1 = arm_nn_requantize_s64(acc_64, reduced_multiplier, *out_shift); - } - else - { - ch_0_out_0 = arm_nn_requantize(ch_0_out_0, *out_mult, *out_shift); - ch_0_out_1 = arm_nn_requantize(ch_0_out_1, *out_mult, *out_shift); - } - ch_0_out_0 = MAX(ch_0_out_0, activation_min); - ch_0_out_0 = MIN(ch_0_out_0, activation_max); - *out_0++ = (q15_t)ch_0_out_0; - - ch_0_out_1 = MAX(ch_0_out_1, activation_min); - ch_0_out_1 = MIN(ch_0_out_1, activation_max); - *out_1++ = (q15_t)ch_0_out_1; - out_mult++; - out_shift++; - } - - out_0 += output_ch; - - /* return the new output pointer with offset */ - return out_0; -#else - (void)input_a; - (void)input_b; - (void)output_ch; - (void)out_shift; - (void)out_mult; - (void)activation_min; - (void)activation_max; - (void)num_col_a; - (void)output_bias; - (void)out_0; - /* To be completed */ - return NULL; -#endif -} diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c deleted file mode 100644 index 13e374c..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c +++ /dev/null @@ -1,582 +0,0 @@ -/* - * Copyright (C) 2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mat_mult_s8_nt_t_s8 - * Description: Matrix multiplication support function with the right-hand-side (rhs) matrix transposed - * - * $Date: 09. October 2020 - * $Revision: V.1.0.3 - * - * Target Processor: Cortex-M - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -/* - * s8 matrix multiplication with the right-hand-side matrix transposed - * - * Refer header file for details. - * - */ -arm_status arm_nn_mat_mult_nt_t_s8(const q7_t *lhs, - const q7_t *rhs, - const q31_t *bias, - q7_t *dst, - const int32_t *dst_multipliers, - const int32_t *dst_shifts, - const int32_t lhs_rows, - const int32_t rhs_rows, - const int32_t rhs_cols, - const int32_t lhs_offset, - const int32_t dst_offset, - const int32_t activation_min, - const int32_t activation_max) -{ -#if defined(ARM_MATH_DSP) - const int32_t off0 = rhs_cols - 4; - - for (int32_t rhs_rows_idx = 0; rhs_rows_idx <= (rhs_rows - 2); rhs_rows_idx += 2) - { - const q7_t *lhs_ptr = &lhs[0]; - q7_t *dst_ptr = &dst[0]; - - q31_t lhs_offset_contribution0 = 0; - q31_t lhs_offset_contribution1 = 0; - - for (int32_t x = 0; x < rhs_cols; ++x) - { - lhs_offset_contribution0 += rhs[x]; - lhs_offset_contribution1 += rhs[x + rhs_cols]; - } - - lhs_offset_contribution0 *= lhs_offset; - lhs_offset_contribution1 *= lhs_offset; - if (bias) - { - lhs_offset_contribution0 += bias[rhs_rows_idx]; - lhs_offset_contribution1 += bias[rhs_rows_idx + 1]; - } - - int32_t lhs_rows_idx = lhs_rows >> 1; - - while (lhs_rows_idx) - { - const q7_t *rhs_ptr = &rhs[0]; - - q31_t res00 = lhs_offset_contribution0; - q31_t res01 = lhs_offset_contribution1; - q31_t res10 = lhs_offset_contribution0; - q31_t res11 = lhs_offset_contribution1; - - int32_t rhs_cols_idx = 0; - - q31_t val0, val1, val2, val3, val4, val5; - - for (; rhs_cols_idx <= (rhs_cols - 16); rhs_cols_idx += 16) - { - val1 = arm_nn_read_q7x4_ia((const q7_t **)&rhs_ptr); - val2 = __SXTB16(val1); - val0 = arm_nn_read_q7x4_ia((const q7_t **)&lhs_ptr); - val3 = __SXTB16(val0); - val4 = arm_nn_read_q7x4((const q7_t *)&rhs_ptr[off0]); - val1 = __SXTB16_RORn(val1, 8); - val0 = __SXTB16_RORn(val0, 8); - - // 4 x MAC res00, res01 - res00 = __SMLAD(val3, val2, res00); - val5 = __SXTB16(val4); - res00 = __SMLAD(val0, val1, res00); - val4 = __SXTB16_RORn(val4, 8); - res01 = __SMLAD(val3, val5, res01); - res01 = __SMLAD(val0, val4, res01); - - // 4 x MAC res10, res11 - val0 = arm_nn_read_q7x4((const q7_t *)&lhs_ptr[off0]); - val3 = __SXTB16(val0); - val0 = __SXTB16_RORn(val0, 8); - res10 = __SMLAD(val3, val2, res10); - res11 = __SMLAD(val3, val5, res11); - res10 = __SMLAD(val0, val1, res10); - val1 = arm_nn_read_q7x4_ia((const q7_t **)&rhs_ptr); - res11 = __SMLAD(val0, val4, res11); - - val4 = arm_nn_read_q7x4((const q7_t *)&rhs_ptr[off0]); - val2 = __SXTB16(val1); - val0 = arm_nn_read_q7x4_ia((const q7_t **)&lhs_ptr); - val3 = __SXTB16(val0); - val1 = __SXTB16_RORn(val1, 8); - val0 = __SXTB16_RORn(val0, 8); - - // 4 x MAC res00, res01 - res00 = __SMLAD(val3, val2, res00); - val5 = __SXTB16(val4); - res00 = __SMLAD(val0, val1, res00); - val4 = __SXTB16_RORn(val4, 8); - res01 = __SMLAD(val3, val5, res01); - res01 = __SMLAD(val0, val4, res01); - - // 4 x MAC res10, res11 - val0 = arm_nn_read_q7x4((const q7_t *)&lhs_ptr[off0]); - val3 = __SXTB16(val0); - val0 = __SXTB16_RORn(val0, 8); - res10 = __SMLAD(val3, val2, res10); - res11 = __SMLAD(val3, val5, res11); - res10 = __SMLAD(val0, val1, res10); - val1 = arm_nn_read_q7x4_ia((const q7_t **)&rhs_ptr); - res11 = __SMLAD(val0, val4, res11); - - val4 = arm_nn_read_q7x4((const q7_t *)&rhs_ptr[off0]); - val2 = __SXTB16(val1); - val0 = arm_nn_read_q7x4_ia((const q7_t **)&lhs_ptr); - val3 = __SXTB16(val0); - val1 = __SXTB16_RORn(val1, 8); - val0 = __SXTB16_RORn(val0, 8); - - // 4 x MAC res00, res01 - res00 = __SMLAD(val3, val2, res00); - val5 = __SXTB16(val4); - res00 = __SMLAD(val0, val1, res00); - val4 = __SXTB16_RORn(val4, 8); - res01 = __SMLAD(val3, val5, res01); - res01 = __SMLAD(val0, val4, res01); - - // 4 x MAC res10, res11 - val0 = arm_nn_read_q7x4((const q7_t *)&lhs_ptr[off0]); - val3 = __SXTB16(val0); - val0 = __SXTB16_RORn(val0, 8); - res10 = __SMLAD(val3, val2, res10); - res11 = __SMLAD(val3, val5, res11); - res10 = __SMLAD(val0, val1, res10); - val1 = arm_nn_read_q7x4_ia((const q7_t **)&rhs_ptr); - res11 = __SMLAD(val0, val4, res11); - - val4 = arm_nn_read_q7x4((const q7_t *)&rhs_ptr[off0]); - val2 = __SXTB16(val1); - val0 = arm_nn_read_q7x4_ia((const q7_t **)&lhs_ptr); - val3 = __SXTB16(val0); - val1 = __SXTB16_RORn(val1, 8); - val0 = __SXTB16_RORn(val0, 8); - - // 4 x MAC res00, res01 - res00 = __SMLAD(val3, val2, res00); - val5 = __SXTB16(val4); - res00 = __SMLAD(val0, val1, res00); - val4 = __SXTB16_RORn(val4, 8); - res01 = __SMLAD(val3, val5, res01); - res01 = __SMLAD(val0, val4, res01); - - // 4 x MAC res10, res11 - val0 = arm_nn_read_q7x4((const q7_t *)&lhs_ptr[off0]); - val3 = __SXTB16(val0); - val0 = __SXTB16_RORn(val0, 8); - res10 = __SMLAD(val3, val2, res10); - res11 = __SMLAD(val3, val5, res11); - res10 = __SMLAD(val0, val1, res10); - res11 = __SMLAD(val0, val4, res11); - } - - for (; rhs_cols_idx < rhs_cols; ++rhs_cols_idx) - { - q7_t rhs_value0 = rhs_ptr[0]; - q7_t rhs_value1 = rhs_ptr[rhs_cols]; - q7_t lhs_value = lhs_ptr[0]; - - res00 += lhs_value * rhs_value0; - res01 += lhs_value * rhs_value1; - - lhs_value = lhs_ptr[rhs_cols]; - res10 += lhs_value * rhs_value0; - res11 += lhs_value * rhs_value1; - - ++rhs_ptr; - ++lhs_ptr; - } - - // Quantize down - res00 = arm_nn_requantize(res00, dst_multipliers[rhs_rows_idx], dst_shifts[rhs_rows_idx]); - res01 = arm_nn_requantize(res01, dst_multipliers[rhs_rows_idx + 1], dst_shifts[rhs_rows_idx + 1]); - res10 = arm_nn_requantize(res10, dst_multipliers[rhs_rows_idx], dst_shifts[rhs_rows_idx]); - res11 = arm_nn_requantize(res11, dst_multipliers[rhs_rows_idx + 1], dst_shifts[rhs_rows_idx + 1]); - - // Add offset - res00 += dst_offset; - res01 += dst_offset; - res10 += dst_offset; - res11 += dst_offset; - - // Clamp the result - res00 = MAX(res00, activation_min); - res00 = MIN(res00, activation_max); - res01 = MAX(res01, activation_min); - res01 = MIN(res01, activation_max); - res10 = MAX(res10, activation_min); - res10 = MIN(res10, activation_max); - res11 = MAX(res11, activation_min); - res11 = MIN(res11, activation_max); - - dst_ptr[0] = (q7_t)res00; - dst_ptr[1] = (q7_t)res01; - dst_ptr += rhs_rows; - dst_ptr[0] = (q7_t)res10; - dst_ptr[1] = (q7_t)res11; - dst_ptr += rhs_rows; - - lhs_ptr += rhs_cols; - - lhs_rows_idx--; - } - - // Left-over rows - if (lhs_rows % 2) - { - const q7_t *rhs_ptr = &rhs[0]; - - q31_t res00 = lhs_offset_contribution0; - q31_t res01 = lhs_offset_contribution1; - - int32_t rhs_cols_idx = 0; - - q31_t val0, val1, val2, val3, val4, val5; - for (; rhs_cols_idx <= (rhs_cols - 16); rhs_cols_idx += 16) - { - val0 = arm_nn_read_q7x4_ia((const q7_t **)&rhs_ptr); - val1 = arm_nn_read_q7x4((const q7_t *)&rhs_ptr[off0]); - val2 = arm_nn_read_q7x4_ia((const q7_t **)&lhs_ptr); - val3 = __SXTB16(val0); - val5 = __SXTB16(val2); - val4 = __SXTB16(val1); - val0 = __SXTB16_RORn(val0, 8); - val2 = __SXTB16_RORn(val2, 8); - val1 = __SXTB16_RORn(val1, 8); - - // 4 x MAC res00, res01 - res00 = __SMLAD(val5, val3, res00); - res00 = __SMLAD(val2, val0, res00); - res01 = __SMLAD(val5, val4, res01); - res01 = __SMLAD(val2, val1, res01); - - val0 = arm_nn_read_q7x4_ia((const q7_t **)&rhs_ptr); - val1 = arm_nn_read_q7x4((const q7_t *)&rhs_ptr[off0]); - val2 = arm_nn_read_q7x4_ia((const q7_t **)&lhs_ptr); - val3 = __SXTB16(val0); - val5 = __SXTB16(val2); - val4 = __SXTB16(val1); - val0 = __SXTB16_RORn(val0, 8); - val2 = __SXTB16_RORn(val2, 8); - val1 = __SXTB16_RORn(val1, 8); - - // 4 x MAC res00, res01 - res00 = __SMLAD(val5, val3, res00); - res00 = __SMLAD(val2, val0, res00); - res01 = __SMLAD(val5, val4, res01); - res01 = __SMLAD(val2, val1, res01); - - val0 = arm_nn_read_q7x4_ia((const q7_t **)&rhs_ptr); - val1 = arm_nn_read_q7x4((const q7_t *)&rhs_ptr[off0]); - val2 = arm_nn_read_q7x4_ia((const q7_t **)&lhs_ptr); - val3 = __SXTB16(val0); - val5 = __SXTB16(val2); - val4 = __SXTB16(val1); - val0 = __SXTB16_RORn(val0, 8); - val2 = __SXTB16_RORn(val2, 8); - val1 = __SXTB16_RORn(val1, 8); - - // 4 x MAC res00, res01 - res00 = __SMLAD(val5, val3, res00); - res00 = __SMLAD(val2, val0, res00); - res01 = __SMLAD(val5, val4, res01); - res01 = __SMLAD(val2, val1, res01); - - val0 = arm_nn_read_q7x4_ia((const q7_t **)&rhs_ptr); - val1 = arm_nn_read_q7x4((const q7_t *)&rhs_ptr[off0]); - val2 = arm_nn_read_q7x4_ia((const q7_t **)&lhs_ptr); - val3 = __SXTB16(val0); - val5 = __SXTB16(val2); - val4 = __SXTB16(val1); - val0 = __SXTB16_RORn(val0, 8); - val2 = __SXTB16_RORn(val2, 8); - val1 = __SXTB16_RORn(val1, 8); - - // 4 x MAC res00, res01 - res00 = __SMLAD(val5, val3, res00); - res00 = __SMLAD(val2, val0, res00); - res01 = __SMLAD(val5, val4, res01); - res01 = __SMLAD(val2, val1, res01); - } - - // Left-over accumulations - for (; rhs_cols_idx < rhs_cols; ++rhs_cols_idx) - { - q7_t rhs_value0 = rhs_ptr[0]; - q7_t rhs_value1 = rhs_ptr[rhs_cols]; - q7_t lhs_value = lhs_ptr[0]; - - res00 += lhs_value * rhs_value0; - res01 += lhs_value * rhs_value1; - - ++rhs_ptr; - ++lhs_ptr; - } - - // Quantize down - res00 = arm_nn_requantize(res00, dst_multipliers[rhs_rows_idx], dst_shifts[rhs_rows_idx]); - res01 = arm_nn_requantize(res01, dst_multipliers[rhs_rows_idx + 1], dst_shifts[rhs_rows_idx + 1]); - - // Add offset - res00 += dst_offset; - res01 += dst_offset; - - // Clamp the result - res00 = MAX(res00, activation_min); - res00 = MIN(res00, activation_max); - res01 = MAX(res01, activation_min); - res01 = MIN(res01, activation_max); - - dst_ptr[0] = (q7_t)res00; - dst_ptr[1] = (q7_t)res01; - } - - rhs += 2 * rhs_cols; - dst += 2; - } - - if (rhs_rows % 2) - { - const q7_t *lhs_ptr = &lhs[0]; - q7_t *dst_ptr = &dst[0]; - - for (int32_t lhs_rows_idx = 0; lhs_rows_idx < lhs_rows; ++lhs_rows_idx) - { - const q7_t *rhs_ptr = &rhs[0]; - q31_t res00 = 0; - if (bias) - { - res00 = bias[rhs_rows - 1]; - } - - for (int32_t rhs_cols_idx = 0; rhs_cols_idx < rhs_cols; ++rhs_cols_idx) - { - q31_t rhs_value = rhs_ptr[0]; - q31_t lhs_value = lhs_ptr[0] + lhs_offset; - - res00 += lhs_value * rhs_value; - - ++rhs_ptr; - ++lhs_ptr; - } - - // Quantize down - res00 = arm_nn_requantize(res00, dst_multipliers[rhs_rows - 1], dst_shifts[rhs_rows - 1]); - - // Add offset - res00 += dst_offset; - - // Clamp the result - res00 = MAX(res00, activation_min); - res00 = MIN(res00, activation_max); - - dst_ptr[0] = (q7_t)res00; - dst_ptr += rhs_rows; - } - } -#else - for (int32_t rhs_rows_idx = 0; rhs_rows_idx <= (rhs_rows - 2); rhs_rows_idx += 2) - { - const q7_t *lhs_ptr = &lhs[0]; - q7_t *dst_ptr = &dst[0]; - - q31_t lhs_offset_contribution0 = 0; - q31_t lhs_offset_contribution1 = 0; - - for (int32_t x = 0; x < rhs_cols; ++x) - { - lhs_offset_contribution0 += rhs[x]; - lhs_offset_contribution1 += rhs[x + rhs_cols]; - } - - lhs_offset_contribution0 *= lhs_offset; - lhs_offset_contribution1 *= lhs_offset; - if (bias) - { - lhs_offset_contribution0 += bias[rhs_rows_idx]; - lhs_offset_contribution1 += bias[rhs_rows_idx + 1]; - } - - int32_t lhs_rows_idx = lhs_rows >> 1; - - while (lhs_rows_idx) - { - const q7_t *rhs_ptr = &rhs[0]; - - q31_t res00 = lhs_offset_contribution0; - q31_t res01 = lhs_offset_contribution1; - q31_t res10 = lhs_offset_contribution0; - q31_t res11 = lhs_offset_contribution1; - - for (int32_t rhs_cols_idx = rhs_cols; rhs_cols_idx != 0; rhs_cols_idx--) - { - q7_t rhs_value0 = rhs_ptr[0]; - q7_t rhs_value1 = rhs_ptr[rhs_cols]; - q7_t lhs_value = lhs_ptr[0]; - - res00 += lhs_value * rhs_value0; - res01 += lhs_value * rhs_value1; - - lhs_value = lhs_ptr[rhs_cols]; - res10 += lhs_value * rhs_value0; - res11 += lhs_value * rhs_value1; - - ++rhs_ptr; - ++lhs_ptr; - } - - // Quantize down - res00 = arm_nn_requantize(res00, dst_multipliers[rhs_rows_idx], dst_shifts[rhs_rows_idx]); - res01 = arm_nn_requantize(res01, dst_multipliers[rhs_rows_idx + 1], dst_shifts[rhs_rows_idx + 1]); - res10 = arm_nn_requantize(res10, dst_multipliers[rhs_rows_idx], dst_shifts[rhs_rows_idx]); - res11 = arm_nn_requantize(res11, dst_multipliers[rhs_rows_idx + 1], dst_shifts[rhs_rows_idx + 1]); - - // Add offset - res00 += dst_offset; - res01 += dst_offset; - res10 += dst_offset; - res11 += dst_offset; - - // Clamp the result - res00 = MAX(res00, activation_min); - res00 = MIN(res00, activation_max); - res01 = MAX(res01, activation_min); - res01 = MIN(res01, activation_max); - res10 = MAX(res10, activation_min); - res10 = MIN(res10, activation_max); - res11 = MAX(res11, activation_min); - res11 = MIN(res11, activation_max); - - dst_ptr[0] = (q7_t)res00; - dst_ptr[1] = (q7_t)res01; - dst_ptr += rhs_rows; - dst_ptr[0] = (q7_t)res10; - dst_ptr[1] = (q7_t)res11; - dst_ptr += rhs_rows; - - lhs_ptr += rhs_cols; - - lhs_rows_idx--; - } - - // Left-over rows - if (lhs_rows % 2) - { - const q7_t *rhs_ptr = &rhs[0]; - - q31_t res00 = lhs_offset_contribution0; - q31_t res01 = lhs_offset_contribution1; - - for (int32_t rhs_cols_idx = rhs_cols; rhs_cols_idx != 0; rhs_cols_idx--) - { - q7_t rhs_value0 = rhs_ptr[0]; - q7_t rhs_value1 = rhs_ptr[rhs_cols]; - q7_t lhs_value = lhs_ptr[0]; - - res00 += lhs_value * rhs_value0; - res01 += lhs_value * rhs_value1; - - ++rhs_ptr; - ++lhs_ptr; - } - - // Quantize down - res00 = arm_nn_requantize(res00, dst_multipliers[rhs_rows_idx], dst_shifts[rhs_rows_idx]); - res01 = arm_nn_requantize(res01, dst_multipliers[rhs_rows_idx + 1], dst_shifts[rhs_rows_idx + 1]); - - // Add offset - res00 += dst_offset; - res01 += dst_offset; - - // Clamp the result - res00 = MAX(res00, activation_min); - res00 = MIN(res00, activation_max); - res01 = MAX(res01, activation_min); - res01 = MIN(res01, activation_max); - - dst_ptr[0] = (q7_t)res00; - dst_ptr[1] = (q7_t)res01; - } - - rhs += 2 * rhs_cols; - dst += 2; - } - - if (rhs_rows % 2) - { - const q7_t *lhs_ptr = &lhs[0]; - q7_t *dst_ptr = &dst[0]; - - for (int32_t lhs_rows_idx = 0; lhs_rows_idx < lhs_rows; ++lhs_rows_idx) - { - const q7_t *rhs_ptr = &rhs[0]; - q31_t res00 = 0; - if (bias) - { - res00 = bias[rhs_rows - 1]; - } - - for (int32_t rhs_cols_idx = rhs_cols; rhs_cols_idx != 0; rhs_cols_idx--) - { - q31_t rhs_value = rhs_ptr[0]; - q31_t lhs_value = lhs_ptr[0] + lhs_offset; - - res00 += lhs_value * rhs_value; - - ++rhs_ptr; - ++lhs_ptr; - } - - // Quantize down - res00 = arm_nn_requantize(res00, dst_multipliers[rhs_rows - 1], dst_shifts[rhs_rows - 1]); - - // Add offset - res00 += dst_offset; - - // Clamp the result - res00 = MAX(res00, activation_min); - res00 = MIN(res00, activation_max); - - dst_ptr[0] = (q7_t)res00; - dst_ptr += rhs_rows; - } - } -#endif - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c deleted file mode 100644 index 21b4682..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mult_q15.c - * Description: Q15 vector multiplication with variable output shifts - * - * $Date: 20. July 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -/** - * @brief Q7 vector multiplication with variable output shifts - * @param[in] *pSrcA pointer to the first input vector - * @param[in] *pSrcB pointer to the second input vector - * @param[out] *pDst pointer to the output vector - * @param[in] out_shift amount of right-shift for output - * @param[in] blockSize number of samples in each vector - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_nn_mult_q15(q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, const uint16_t out_shift, uint32_t blockSize) -{ - uint32_t blkCnt = blockSize; /* loop counters */ - - while (blkCnt > 0U) - { - /* C = A * B */ - /* Multiply the inputs and store the result in the destination buffer */ - *pDst++ = (q15_t)__SSAT(((q31_t)((q31_t)(*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 16); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c deleted file mode 100644 index 2f504d3..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_mult_q7.c - * Description: Q7 vector multiplication with variable output shifts - * - * $Date: 20. July 2021 - * $Revision: V.1.1.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -/** - * @brief Q7 vector multiplication with variable output shifts - * @param[in] *pSrcA pointer to the first input vector - * @param[in] *pSrcB pointer to the second input vector - * @param[out] *pDst pointer to the output vector - * @param[in] out_shift amount of right-shift for output - * @param[in] blockSize number of samples in each vector - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ - -void arm_nn_mult_q7(q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, const uint16_t out_shift, uint32_t blockSize) -{ - uint32_t blkCnt = blockSize; /* loop counters */ - - while (blkCnt > 0U) - { - /* C = A * B */ - /* Multiply the inputs and store the result in the destination buffer */ - *pDst++ = (q7_t)__SSAT(((q15_t)((q15_t)(*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c deleted file mode 100644 index 5fd62be..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c +++ /dev/null @@ -1,211 +0,0 @@ -/* - * Copyright (C) 2020-2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_vec_mat_mult_t_s16 - * Description: s16 vector by matrix (transposed) multiplication - * - * $Date: 04. January 2022 - * $Revision: V.1.2.0 - * - * Target Processor: Cortex-M - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -/* - * s16 vector(lhs) by matrix (transposed) multiplication - * - * Refer header file for details. - * - */ -arm_status arm_nn_vec_mat_mult_t_s16(const q15_t *lhs, - const q7_t *rhs, - const q63_t *bias, - q15_t *dst, - const int32_t dst_multiplier, - const int32_t dst_shift, - const int32_t rhs_cols, - const int32_t rhs_rows, - const int32_t activation_min, - const int32_t activation_max) -{ -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - const int32_t row_loop_cnt = rhs_rows / 2; - - int32_t rhs_cols_fast = rhs_cols; - - if (rhs_cols > 512) - { - rhs_cols_fast = 512; - } - - for (int32_t i = 0; i < row_loop_cnt; i++) - { - q63_t acc_64_0 = 0; - q63_t acc_64_1 = 0; - int32_t acc_0 = 0; - int32_t acc_1 = 0; - - const int32_t col_loop_cnt = rhs_cols_fast / 4; - - const int16_t *lhs_vec = lhs; - const int8_t *rhs_0 = rhs; - const int8_t *rhs_1 = rhs + rhs_cols; - rhs += 2 * rhs_cols; - - for (int j = col_loop_cnt; j != 0; j--) - { - int32_t ker_0, ker_1, vec_part_0, vec_part_1; - vec_part_0 = arm_nn_read_q15x2_ia(&lhs_vec); - vec_part_1 = arm_nn_read_q15x2_ia(&lhs_vec); - - rhs_0 = read_and_pad(rhs_0, &ker_0, &ker_1); - - acc_0 = __SMLAD(ker_0, vec_part_0, acc_0); - acc_0 = __SMLAD(ker_1, vec_part_1, acc_0); - - rhs_1 = read_and_pad(rhs_1, &ker_0, &ker_1); - - acc_1 = __SMLAD(ker_0, vec_part_0, acc_1); - acc_1 = __SMLAD(ker_1, vec_part_1, acc_1); - } - - acc_64_0 += acc_0; - acc_64_1 += acc_1; - - for (int k = col_loop_cnt * 4; k < rhs_cols; k++) - { - const int32_t lhs_temp = (*lhs_vec); - lhs_vec++; - acc_64_0 += lhs_temp * (*rhs_0); - rhs_0++; - acc_64_1 += lhs_temp * (*rhs_1); - rhs_1++; - } - - if (bias) - { - acc_64_0 += *bias++; - acc_64_1 += *bias++; - } - q31_t tmp; - tmp = arm_nn_requantize_s64(acc_64_0, dst_multiplier, dst_shift); - tmp = MAX(tmp, activation_min); - tmp = MIN(tmp, activation_max); - *dst++ = (q15_t)tmp; - - tmp = arm_nn_requantize_s64(acc_64_1, dst_multiplier, dst_shift); - tmp = MAX(tmp, activation_min); - tmp = MIN(tmp, activation_max); - *dst++ = (q15_t)tmp; - } - - if (rhs_rows & 0x1) - { - q63_t acc_64_0 = 0; - int32_t acc_0 = 0; - const int32_t col_loop_cnt = rhs_cols_fast / 4; - - const int16_t *lhs_vec = lhs; - const int8_t *rhs_0 = rhs; - - for (int i = col_loop_cnt; i != 0; i--) - { - int32_t ker_0, ker_1, vec; - rhs_0 = read_and_pad(rhs_0, &ker_0, &ker_1); - - vec = arm_nn_read_q15x2_ia(&lhs_vec); - acc_0 = __SMLAD(ker_0, vec, acc_0); - - vec = arm_nn_read_q15x2_ia(&lhs_vec); - acc_0 = __SMLAD(ker_1, vec, acc_0); - } - - acc_64_0 += acc_0; - - for (int j = col_loop_cnt * 4; j < rhs_cols; j++) - { - const int32_t lhs_temp = (*lhs_vec); - lhs_vec++; - acc_64_0 += lhs_temp * (*rhs_0); - rhs_0++; - } - - if (bias) - { - acc_64_0 += *bias++; - } - q31_t tmp; - tmp = arm_nn_requantize_s64(acc_64_0, dst_multiplier, dst_shift); - tmp = MAX(tmp, activation_min); - tmp = MIN(tmp, activation_max); - *dst++ = (q15_t)tmp; - } - -#else - for (int i_row_loop_cnt = 0; i_row_loop_cnt < rhs_rows; i_row_loop_cnt++) - { - const q15_t *lhs_ptr = lhs; - const q7_t *rhs_ptr_0 = &rhs[0]; - - q63_t result = 0; - - if (bias) - { - result = *bias++; - } - for (int32_t rhs_cols_idx = 0; rhs_cols_idx < rhs_cols; ++rhs_cols_idx) - { - const q63_t rhs_value0 = (int8_t)*rhs_ptr_0; - const q63_t lhs_value = *lhs_ptr; - - result += lhs_value * rhs_value0; - - ++rhs_ptr_0; - ++lhs_ptr; - } - - // Quantize down - result = arm_nn_requantize_s64(result, dst_multiplier, dst_shift); - - // Clamp the result - result = ((result) > (activation_min) ? (result) : (activation_min)); - result = ((result) < (activation_max) ? (result) : (activation_max)); - - *dst++ = (q15_t)result; - rhs += rhs_cols; - } -#endif - - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c deleted file mode 100644 index e29da20..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c +++ /dev/null @@ -1,402 +0,0 @@ -/* - * Copyright (C) 2020-2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_vec_mat_mult_t_s8 - * Description: s8 vector by matrix (transposed) multiplication - * - * $Date: 28 April 2022 - * $Revision: V.3.0.1 - * - * Target Processor: Cortex-M - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -/* - * s8 vector(lhs) by matrix (transposed) multiplication - * - * Refer header file for details. - * - */ -arm_status arm_nn_vec_mat_mult_t_s8(const q7_t *lhs, - const q7_t *rhs, - const q31_t *bias, - q7_t *dst, - const int32_t lhs_offset, - const int32_t rhs_offset, - const int32_t dst_offset, - const int32_t dst_multiplier, - const int32_t dst_shift, - const int32_t rhs_cols, - const int32_t rhs_rows, - const int32_t activation_min, - const int32_t activation_max, - const int32_t address_offset) -{ - (void)rhs_offset; -#if defined(ARM_MATH_MVEI) - const int32_t row_loop_cnt = rhs_rows / 3; - const uint32x4_t address_offset_array = {0, address_offset, address_offset * 2, address_offset * 3}; - - for (int i_row_loop_cnt = 0; i_row_loop_cnt < row_loop_cnt; i_row_loop_cnt++) - { - int32_t acc_0 = 0; - int32_t acc_1 = 0; - int32_t acc_2 = 0; - - const int32_t col_loop_cnt = (rhs_cols + 15) / 16; - - const int8_t *lhs_vec = lhs; - const int8_t *rhs_0 = rhs; - const int8_t *rhs_1 = rhs + rhs_cols; - const int8_t *rhs_2 = rhs + 2 * rhs_cols; - - int32_t rhs_sum_0 = 0; - int32_t rhs_sum_1 = 0; - int32_t rhs_sum_2 = 0; - - uint32_t col_cnt = (uint32_t)rhs_cols; - - for (int i = 0; i < col_loop_cnt; i++) - { - mve_pred16_t p = vctp8q(col_cnt); - col_cnt -= 16; - - const int8x16_t input = vldrbq_z_s8(lhs_vec, p); - - const int8x16_t ker_0 = vldrbq_z_s8(rhs_0, p); - rhs_sum_0 = vaddvaq_p_s8(rhs_sum_0, ker_0, p); - acc_0 = vmladavaq_p_s8(acc_0, ker_0, input, p); - - const int8x16_t ker_1 = vldrbq_z_s8(rhs_1, p); - rhs_sum_1 = vaddvaq_p_s8(rhs_sum_1, ker_1, p); - acc_1 = vmladavaq_p_s8(acc_1, ker_1, input, p); - - const int8x16_t ker_2 = vldrbq_z_s8(rhs_2, p); - rhs_sum_2 = vaddvaq_p_s8(rhs_sum_2, ker_2, p); - acc_2 = vmladavaq_p_s8(acc_2, ker_2, input, p); - - lhs_vec += 16; - rhs_0 += 16; - rhs_1 += 16; - rhs_2 += 16; - } - rhs += 3 * rhs_cols; - - int32x4_t acc = {acc_0, acc_1, acc_2, 0}; - mve_pred16_t p = vctp32q(3); - if (bias) - { - int32x4_t b = vldrwq_z_s32(bias, p); - acc = vaddq_m_s32(vuninitializedq_s32(), acc, b, p); - bias += 3; - } - const int32x4_t rhs_sum = {rhs_sum_0, rhs_sum_1, rhs_sum_2, 0}; - acc += vdupq_n_s32(lhs_offset) * rhs_sum; - - acc = arm_requantize_mve(acc, dst_multiplier, dst_shift); - acc = vaddq_s32(acc, vdupq_n_s32(dst_offset)); - acc = vmaxq_s32(acc, vdupq_n_s32(activation_min)); - acc = vminq_s32(acc, vdupq_n_s32(activation_max)); - - if (address_offset > 1L) - { - vstrbq_scatter_offset_s32(dst, address_offset_array, acc); - } - else - { - vstrbq_p_s32(dst, acc, p); - } - dst += 3 * address_offset; - } - - const int loop_cnt = rhs_rows % 3; - for (int i_row_loop_cnt = 0; i_row_loop_cnt < loop_cnt; i_row_loop_cnt++) - { - int32_t acc_0 = 0; - const int32_t col_loop_cnt = (rhs_cols + 15) / 16; - const int8_t *lhs_vec = lhs; - const int8_t *rhs_0 = rhs; - int32_t rhs_sum_0 = 0; - uint32_t col_cnt = (uint32_t)rhs_cols; - - for (int i = 0; i < col_loop_cnt; i++) - { - mve_pred16_t p = vctp8q(col_cnt); - col_cnt -= 16; - const int8x16_t input = vldrbq_z_s8(lhs_vec, p); - - const int8x16_t ker_0 = vldrbq_z_s8(rhs_0, p); - rhs_sum_0 = vaddvaq_p_s8(rhs_sum_0, ker_0, p); - acc_0 = vmladavaq_p_s8(acc_0, ker_0, input, p); - - lhs_vec += 16; - rhs_0 += 16; - } - rhs += rhs_cols; - - if (bias) - { - acc_0 += *bias; - bias++; - } - const int32_t offsets = rhs_sum_0 * lhs_offset; - acc_0 += offsets; - acc_0 = arm_nn_requantize(acc_0, dst_multiplier, dst_shift); - acc_0 += dst_offset; - - // Clamp the result - acc_0 = MAX(acc_0, activation_min); - *dst = MIN(acc_0, activation_max); - dst += address_offset; - } - -#elif defined(ARM_MATH_DSP) - const int32_t row_loop_cnt = rhs_rows / 2; - const int16_t lhs_offset_s16 = (int16_t)lhs_offset; - const uint32_t lhs_offset_s16x2 = __PKHBT(lhs_offset_s16, lhs_offset_s16, 16); - - for (int32_t i = 0; i < row_loop_cnt; i++) - { - int32_t acc_0 = 0; - int32_t acc_1 = 0; - if (bias) - { - acc_0 = *bias++; - acc_1 = *bias++; - } - - const int32_t col_loop_cnt = rhs_cols / 4; - - const int8_t *lhs_vec = lhs; - const int8_t *rhs_0 = rhs; - const int8_t *rhs_1 = rhs + rhs_cols; - rhs += 2 * rhs_cols; - - for (int j = col_loop_cnt; j != 0; j--) - { - int32_t vec_0 = arm_nn_read_q7x4_ia(&lhs_vec); - int32_t vec_1 = __SXTAB16_RORn(lhs_offset_s16x2, (uint32_t)vec_0, 8); - - vec_0 = __SXTAB16(lhs_offset_s16x2, vec_0); - - int32_t ker_0 = arm_nn_read_q7x4_ia(&rhs_0); - int32_t ker_1 = __SXTB16_RORn((uint32_t)ker_0, 8); - ker_0 = __SXTB16(ker_0); - - acc_0 = __SMLAD(ker_1, vec_1, acc_0); - acc_0 = __SMLAD(ker_0, vec_0, acc_0); - - ker_0 = arm_nn_read_q7x4_ia(&rhs_1); - ker_1 = __SXTB16_RORn((uint32_t)ker_0, 8); - ker_0 = __SXTB16(ker_0); - - acc_1 = __SMLAD(ker_1, vec_1, acc_1); - acc_1 = __SMLAD(ker_0, vec_0, acc_1); - } - - for (int k = col_loop_cnt * 4; k < rhs_cols; k++) - { - const int32_t lhs_temp = (*lhs_vec + lhs_offset); - lhs_vec++; - acc_0 += lhs_temp * (*rhs_0); - rhs_0++; - acc_1 += lhs_temp * (*rhs_1); - rhs_1++; - } - - acc_0 = arm_nn_requantize(acc_0, dst_multiplier, dst_shift); - acc_1 = arm_nn_requantize(acc_1, dst_multiplier, dst_shift); - - // Add offset - acc_0 += dst_offset; - acc_1 += dst_offset; - // Clamp the result - acc_0 = MAX(acc_0, activation_min); - acc_0 = MIN(acc_0, activation_max); - acc_1 = MAX(acc_1, activation_min); - acc_1 = MIN(acc_1, activation_max); - *dst = (int8_t)acc_0; - *(dst + address_offset) = (int8_t)acc_1; - dst += 2 * address_offset; - } - - if (rhs_rows & 0x1) - { - int32_t acc_0 = 0; - if (bias) - { - acc_0 = *bias++; - } - const int32_t col_loop_cnt = rhs_cols / 4; - - const int8_t *lhs_vec = lhs; - const int8_t *rhs_0 = rhs; - - for (int i = col_loop_cnt; i != 0; i--) - { - int32_t vec_0 = arm_nn_read_q7x4_ia(&lhs_vec); - int32_t vec_1 = __SXTAB16_RORn(lhs_offset_s16x2, (uint32_t)vec_0, 8); - vec_0 = __SXTAB16(lhs_offset_s16x2, vec_0); - - int32_t ker_0 = arm_nn_read_q7x4_ia(&rhs_0); - int32_t ker_1 = __SXTB16_RORn((uint32_t)ker_0, 8); - ker_0 = __SXTB16(ker_0); - - acc_0 = __SMLAD(ker_1, vec_1, acc_0); - acc_0 = __SMLAD(ker_0, vec_0, acc_0); - } - - for (int j = col_loop_cnt * 4; j < rhs_cols; j++) - { - const int32_t lhs_temp = (*lhs_vec + lhs_offset); - lhs_vec++; - acc_0 += lhs_temp * (*rhs_0); - rhs_0++; - } - - acc_0 = arm_nn_requantize(acc_0, dst_multiplier, dst_shift); - - // Add offset - acc_0 += dst_offset; - // Clamp the result - acc_0 = MAX(acc_0, activation_min); - acc_0 = MIN(acc_0, activation_max); - *dst = (int8_t)acc_0; - dst += address_offset; - } - -#else - - const int32_t row_loop_cnt = rhs_rows / 3; - - for (int i_row_loop_cnt = 0; i_row_loop_cnt < row_loop_cnt; i_row_loop_cnt++) - { - const q7_t *lhs_ptr = lhs; - const q7_t *rhs_ptr_0 = &rhs[0]; - const q7_t *rhs_ptr_1 = &rhs[rhs_cols]; - const q7_t *rhs_ptr_2 = &rhs[rhs_cols * 2]; - - q31_t res00 = 0; - q31_t res01 = 0; - q31_t res02 = 0; - if (bias) - { - res00 = *bias++; - res01 = *bias++; - res02 = *bias++; - } - for (int32_t rhs_cols_idx = 0; rhs_cols_idx < rhs_cols; ++rhs_cols_idx) - { - const q31_t rhs_value0 = (int8_t)*rhs_ptr_0; - const q31_t rhs_value1 = (int8_t)*rhs_ptr_1; - const q31_t rhs_value2 = (int8_t)*rhs_ptr_2; - const q31_t lhs_value = (int8_t)*lhs_ptr + lhs_offset; - - res00 += lhs_value * rhs_value0; - res01 += lhs_value * rhs_value1; - res02 += lhs_value * rhs_value2; - - ++rhs_ptr_0; - ++rhs_ptr_1; - ++rhs_ptr_2; - ++lhs_ptr; - } - // Quantize down - res00 = arm_nn_requantize(res00, dst_multiplier, dst_shift); - res01 = arm_nn_requantize(res01, dst_multiplier, dst_shift); - res02 = arm_nn_requantize(res02, dst_multiplier, dst_shift); - - // Add offset - res00 += dst_offset; - res01 += dst_offset; - res02 += dst_offset; - - // Clamp the result - res00 = MAX(res00, activation_min); - res00 = MIN(res00, activation_max); - res01 = MAX(res01, activation_min); - res01 = MIN(res01, activation_max); - res02 = MAX(res02, activation_min); - res02 = MIN(res02, activation_max); - - *dst = (q7_t)res00; - *(dst + address_offset) = (q7_t)res01; - *(dst + 2 * address_offset) = (q7_t)res02; - dst += 3 * address_offset; - - rhs += 3 * rhs_cols; - } - - const int loop_cnt = rhs_rows % 3; - - for (int i_loop_cnt = 0; i_loop_cnt < loop_cnt; i_loop_cnt++) - { - const q7_t *lhs_ptr = &lhs[0]; - const q7_t *rhs_ptr = &rhs[0]; - - q31_t res00 = 0; - if (bias) - { - res00 = *bias++; - } - - for (int32_t rhs_cols_idx = 0; rhs_cols_idx < rhs_cols; ++rhs_cols_idx) - { - q31_t rhs_value0 = (int8_t)rhs_ptr[0]; - q31_t lhs_value = (int8_t)lhs_ptr[0] + lhs_offset; - - res00 += lhs_value * rhs_value0; - - ++rhs_ptr; - ++lhs_ptr; - } - - // Quantize down - res00 = arm_nn_requantize(res00, dst_multiplier, dst_shift); - - // Add offset - res00 += dst_offset; - - // Clamp the result - res00 = MAX(res00, activation_min); - res00 = MIN(res00, activation_max); - - *dst = (int8_t)res00; - dst += address_offset; - rhs += rhs_cols; - } -#endif - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c deleted file mode 100644 index 0be9751..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c +++ /dev/null @@ -1,341 +0,0 @@ -/* - * Copyright (C) 2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_vec_mat_mult_t_svdf_s8 - * Description: s8 vector by matrix (transposed) multiplication with - * s16 output. Targetted at SVDF operator. - * - * $Date: 15. April 2021 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup NNBasicMath - * @{ - */ - -/* - * s8 vector(lhs) by matrix (transposed) multiplication - * - * Refer header file for details. - * - */ -arm_status arm_nn_vec_mat_mult_t_svdf_s8(const q7_t *lhs, - const q7_t *rhs, - q15_t *dst, - const int32_t lhs_offset, - const int32_t rhs_offset, - const int32_t dst_offset, - const int32_t dst_multiplier, - const int32_t dst_shift, - const int32_t rhs_cols, - const int32_t rhs_rows, - const int32_t activation_min, - const int32_t activation_max) -{ - (void)rhs_offset; - if (rhs_cols < 0 || (NN_Q31_MAX - rhs_cols) < 16 || dst_offset < 0) - { - return ARM_MATH_ARGUMENT_ERROR; - } - - (void)rhs_offset; -#if defined(ARM_MATH_MVEI) - int32_t row_loop_cnt = rhs_rows / 3; - - for (int i_row_loop_cnt = 0; i_row_loop_cnt < row_loop_cnt; i_row_loop_cnt++) - { - int32_t acc_0 = 0; - int32_t acc_1 = 0; - int32_t acc_2 = 0; - - const int32_t col_loop_cnt = (rhs_cols + 15) / 16; - - const int8_t *lhs_vec = lhs; - const int8_t *rhs_0 = rhs; - const int8_t *rhs_1 = rhs + rhs_cols; - const int8_t *rhs_2 = rhs + 2 * rhs_cols; - - int32_t rhs_sum_0 = 0; - int32_t rhs_sum_1 = 0; - int32_t rhs_sum_2 = 0; - - uint32_t col_cnt = (uint32_t)rhs_cols; - - for (int i = 0; i < col_loop_cnt; i++) - { - mve_pred16_t p = vctp8q(col_cnt); - col_cnt -= 16; - - const int8x16_t input = vldrbq_z_s8(lhs_vec, p); - - const int8x16_t ker_0 = vldrbq_z_s8(rhs_0, p); - rhs_sum_0 = vaddvaq_p_s8(rhs_sum_0, ker_0, p); - acc_0 = vmladavaq_p_s8(acc_0, ker_0, input, p); - - const int8x16_t ker_1 = vldrbq_z_s8(rhs_1, p); - rhs_sum_1 = vaddvaq_p_s8(rhs_sum_1, ker_1, p); - acc_1 = vmladavaq_p_s8(acc_1, ker_1, input, p); - - const int8x16_t ker_2 = vldrbq_z_s8(rhs_2, p); - rhs_sum_2 = vaddvaq_p_s8(rhs_sum_2, ker_2, p); - acc_2 = vmladavaq_p_s8(acc_2, ker_2, input, p); - - lhs_vec += 16; - rhs_0 += 16; - rhs_1 += 16; - rhs_2 += 16; - } - rhs += 3 * rhs_cols; - - int32x4_t acc = {acc_0, acc_1, acc_2, 0}; - const int32x4_t rhs_sum = {rhs_sum_0, rhs_sum_1, rhs_sum_2, 0}; - acc += vdupq_n_s32(lhs_offset) * rhs_sum; - - acc = arm_requantize_mve(acc, dst_multiplier, dst_shift); - acc = vmaxq_s32(acc, vdupq_n_s32(activation_min)); - acc = vminq_s32(acc, vdupq_n_s32(activation_max)); - *(dst) = (int16_t)acc[0]; - *(dst + dst_offset) = (int16_t)acc[1]; - *(dst + 2 * dst_offset) = (int16_t)acc[2]; - dst += 3 * dst_offset; - } - - const int loop_cnt = rhs_rows % 3; - for (int i_row_loop_cnt = 0; i_row_loop_cnt < loop_cnt; i_row_loop_cnt++) - { - int32_t acc_0 = 0; - const int32_t col_loop_cnt = (rhs_cols + 15) / 16; - const int8_t *lhs_vec = lhs; - const int8_t *rhs_0 = rhs; - int32_t rhs_sum_0 = 0; - uint32_t col_cnt = (uint32_t)rhs_cols; - - for (int i = 0; i < col_loop_cnt; i++) - { - mve_pred16_t p = vctp8q(col_cnt); - col_cnt -= 16; - const int8x16_t input = vldrbq_z_s8(lhs_vec, p); - - const int8x16_t ker_0 = vldrbq_z_s8(rhs_0, p); - rhs_sum_0 = vaddvaq_p_s8(rhs_sum_0, ker_0, p); - acc_0 = vmladavaq_p_s8(acc_0, ker_0, input, p); - - lhs_vec += 16; - rhs_0 += 16; - } - rhs += rhs_cols; - - const int32_t offsets = rhs_sum_0 * lhs_offset; - acc_0 = __QADD(acc_0, offsets); - acc_0 = arm_nn_requantize(acc_0, dst_multiplier, dst_shift); - - // Clamp the result - acc_0 = MAX(acc_0, activation_min); - *dst = (q15_t)MIN(acc_0, activation_max); - dst += dst_offset; - } - -#elif defined(ARM_MATH_DSP) - int32_t row_loop_cnt = rhs_rows / 2; - - const int16_t lhs_offset_s16 = lhs_offset; - const int16_t rhs_offset_s16 = rhs_offset; - - const uint32_t lhs_offset_s16x2 = __PKHBT(lhs_offset_s16, lhs_offset_s16, 16); - const uint32_t rhs_offset_s16x2 = __PKHBT(rhs_offset_s16, rhs_offset_s16, 16); - for (int32_t i = 0; i < row_loop_cnt; i++) - { - int32_t acc_0 = 0; - int32_t acc_1 = 0; - - const int32_t col_loop_cnt = rhs_cols / 4; - const int8_t *lhs_vec = lhs; - const int8_t *rhs_0 = rhs; - const int8_t *rhs_1 = rhs + rhs_cols; - rhs += 2 * rhs_cols; - for (int j = col_loop_cnt; j != 0; j--) - { - int32_t vec_0 = arm_nn_read_q7x4_ia(&lhs_vec); - int32_t vec_1 = __SXTAB16_RORn(lhs_offset_s16x2, (uint32_t)vec_0, 8); - vec_0 = __SXTAB16(lhs_offset_s16x2, vec_0); - int32_t ker_0 = arm_nn_read_q7x4_ia(&rhs_0); - int32_t ker_1 = __SXTAB16_RORn(rhs_offset_s16x2, (uint32_t)ker_0, 8); - ker_0 = __SXTAB16(rhs_offset_s16x2, ker_0); - acc_0 = __SMLAD(ker_1, vec_1, acc_0); - acc_0 = __SMLAD(ker_0, vec_0, acc_0); - ker_0 = arm_nn_read_q7x4_ia(&rhs_1); - ker_1 = __SXTAB16_RORn(rhs_offset_s16x2, (uint32_t)ker_0, 8); - ker_0 = __SXTAB16(rhs_offset_s16x2, ker_0); - acc_1 = __SMLAD(ker_1, vec_1, acc_1); - acc_1 = __SMLAD(ker_0, vec_0, acc_1); - } - for (int k = col_loop_cnt * 4; k < rhs_cols; k++) - { - const int32_t lhs_temp = (*lhs_vec + lhs_offset); - lhs_vec++; - acc_0 += lhs_temp * (*rhs_0 + rhs_offset); - rhs_0++; - acc_1 += lhs_temp * (*rhs_1 + rhs_offset); - rhs_1++; - } - acc_0 = arm_nn_requantize(acc_0, dst_multiplier, dst_shift); - acc_1 = arm_nn_requantize(acc_1, dst_multiplier, dst_shift); - - // Clamp the result - acc_0 = MAX(acc_0, activation_min); - acc_0 = MIN(acc_0, activation_max); - acc_1 = MAX(acc_1, activation_min); - acc_1 = MIN(acc_1, activation_max); - *dst = (q15_t)acc_0; - *(dst + dst_offset) = (q15_t)acc_1; - dst += 2 * dst_offset; - } - if (rhs_rows & 0x1) - { - int32_t acc_0 = 0; - const int32_t col_loop_cnt = rhs_cols / 4; - const int8_t *lhs_vec = lhs; - const int8_t *rhs_0 = rhs; - for (int i = col_loop_cnt; i != 0; i--) - { - int32_t vec_0 = arm_nn_read_q7x4_ia(&lhs_vec); - int32_t vec_1 = __SXTAB16(lhs_offset_s16x2, __ROR((uint32_t)vec_0, 8)); - vec_0 = __SXTAB16(lhs_offset_s16x2, vec_0); - int32_t ker_0 = arm_nn_read_q7x4_ia(&rhs_0); - int32_t ker_1 = __SXTAB16(rhs_offset_s16x2, __ROR((uint32_t)ker_0, 8)); - ker_0 = __SXTAB16(rhs_offset_s16x2, ker_0); - acc_0 = __SMLAD(ker_1, vec_1, acc_0); - acc_0 = __SMLAD(ker_0, vec_0, acc_0); - } - for (int j = col_loop_cnt * 4; j < rhs_cols; j++) - { - const int32_t lhs_temp = (*lhs_vec + lhs_offset); - lhs_vec++; - acc_0 += lhs_temp * (*rhs_0 + rhs_offset); - rhs_0++; - } - acc_0 = arm_nn_requantize(acc_0, dst_multiplier, dst_shift); - - // Clamp the result - acc_0 = MAX(acc_0, activation_min); - acc_0 = MIN(acc_0, activation_max); - *dst = (q15_t)acc_0; - dst += dst_offset; - } - -#else - - int32_t row_loop_cnt = rhs_rows / 3; - - for (int i_row_loop_cnt = 0; i_row_loop_cnt < row_loop_cnt; i_row_loop_cnt++) - { - const q7_t *lhs_ptr = lhs; - const q7_t *rhs_ptr_0 = &rhs[0]; - const q7_t *rhs_ptr_1 = &rhs[rhs_cols]; - const q7_t *rhs_ptr_2 = &rhs[rhs_cols * 2]; - - q31_t res00 = 0; - q31_t res01 = 0; - q31_t res02 = 0; - for (int32_t rhs_cols_idx = 0; rhs_cols_idx < rhs_cols; ++rhs_cols_idx) - { - const q31_t rhs_value0 = (int8_t)*rhs_ptr_0; - const q31_t rhs_value1 = (int8_t)*rhs_ptr_1; - const q31_t rhs_value2 = (int8_t)*rhs_ptr_2; - const q31_t lhs_value = (int8_t)*lhs_ptr + lhs_offset; - - res00 += lhs_value * rhs_value0; - res01 += lhs_value * rhs_value1; - res02 += lhs_value * rhs_value2; - - ++rhs_ptr_0; - ++rhs_ptr_1; - ++rhs_ptr_2; - ++lhs_ptr; - } - // Quantize down - res00 = arm_nn_requantize(res00, dst_multiplier, dst_shift); - res01 = arm_nn_requantize(res01, dst_multiplier, dst_shift); - res02 = arm_nn_requantize(res02, dst_multiplier, dst_shift); - - // Clamp the result - res00 = MAX(res00, activation_min); - res00 = MIN(res00, activation_max); - res01 = MAX(res01, activation_min); - res01 = MIN(res01, activation_max); - res02 = MAX(res02, activation_min); - res02 = MIN(res02, activation_max); - - *dst = (q15_t)res00; - *(dst + dst_offset) = (q15_t)res01; - *(dst + 2 * dst_offset) = (q15_t)res02; - dst += 3 * dst_offset; - rhs += 3 * rhs_cols; - } - - const int loop_cnt = rhs_rows % 3; - - for (int i_loop_cnt = 0; i_loop_cnt < loop_cnt; i_loop_cnt++) - { - const q7_t *lhs_ptr = &lhs[0]; - const q7_t *rhs_ptr = &rhs[0]; - - q31_t res00 = 0; - - for (int32_t rhs_cols_idx = 0; rhs_cols_idx < rhs_cols; ++rhs_cols_idx) - { - q31_t rhs_value0 = (int8_t)rhs_ptr[0] + rhs_offset; - q31_t lhs_value = (int8_t)lhs_ptr[0] + lhs_offset; - - res00 += lhs_value * rhs_value0; - - ++rhs_ptr; - ++lhs_ptr; - } - - // Quantize down - res00 = arm_nn_requantize(res00, dst_multiplier, dst_shift); - - // Clamp the result - res00 = MAX(res00, activation_min); - res00 = MIN(res00, activation_max); - - *dst = (q15_t)res00; - dst += dst_offset; - rhs += rhs_cols; - } -#endif - - return ARM_MATH_SUCCESS; -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c deleted file mode 100644 index 9dcba06..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c +++ /dev/null @@ -1,203 +0,0 @@ -/* - * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nntables.c - * Description: Converts the elements of the Q7 vector to Q15 vector without left-shift - * - * $Date: 17. January 2018 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @brief tables for various activation functions - * - * This file include the declaration of common tables. - * Most of them are used for activation functions - * - * Assumption: - * Unified table: input is 3.x format, i.e, range of [-8, 8) - * sigmoid(8) = 0.9996646498695336 - * tanh(8) = 0.9999997749296758 - * The accuracy here should be good enough - * - * 2-stage HL table: - * - * The entire input range is divided into two parts: - * - * Low range table: 0x000x xxxx or 0x111x xxxx - * table entry will be the binary number excluding the first - * two digits, i.e., 0x0x xxxx or 0x1x xxxx - * - * - * - * High range table 0x0010 0000 -- 0x0111 1111 - * 0x1000 0000 -- 0x1101 1111 - * - * For positive numbers, table entry will be - * 0x0010 0000 -- 0x0111 1111 minus 0x0010 0000 - * i.e., 0x0000 0000 - 0x0101 11111 - * - * same thing for the negative numbers, table entry will be - * 0x1000 0000 -- 0x1101 1111 minux 0x0010 0000 - * i.e., 0x0110 0000 - 0x1011 1111 - */ - -const q7_t sigmoidTable_q7[256] = { - 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e, 0x50, 0x52, 0x53, 0x55, 0x57, 0x59, 0x5a, 0x5c, 0x5e, 0x5f, 0x61, - 0x62, 0x63, 0x65, 0x66, 0x67, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72, 0x72, 0x73, 0x74, 0x74, - 0x75, 0x76, 0x76, 0x77, 0x77, 0x78, 0x78, 0x79, 0x79, 0x7a, 0x7a, 0x7a, 0x7b, 0x7b, 0x7b, 0x7c, 0x7c, 0x7c, 0x7c, - 0x7c, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, - 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, - 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, - 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, - 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x02, - 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x04, 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x06, 0x06, - 0x06, 0x07, 0x07, 0x08, 0x08, 0x09, 0x09, 0x0a, 0x0a, 0x0b, 0x0c, 0x0c, 0x0d, 0x0e, 0x0e, 0x0f, 0x10, 0x11, 0x12, - 0x13, 0x14, 0x15, 0x16, 0x17, 0x19, 0x1a, 0x1b, 0x1d, 0x1e, 0x1f, 0x21, 0x22, 0x24, 0x26, 0x27, 0x29, 0x2b, 0x2d, - 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3e, -}; - -const q15_t sigmoidTable_q15[256] = { - 0x4000, 0x4200, 0x43ff, 0x45fc, 0x47f5, 0x49eb, 0x4bdc, 0x4dc8, 0x4fad, 0x518a, 0x5360, 0x552c, 0x56ef, 0x58a8, - 0x5a57, 0x5bfb, 0x5d93, 0x5f20, 0x60a1, 0x6216, 0x637f, 0x64db, 0x662b, 0x676f, 0x68a6, 0x69d2, 0x6af1, 0x6c05, - 0x6d0d, 0x6e09, 0x6efb, 0x6fe2, 0x70be, 0x7190, 0x7258, 0x7316, 0x73cc, 0x7478, 0x751b, 0x75b7, 0x764a, 0x76d6, - 0x775b, 0x77d8, 0x784f, 0x78c0, 0x792a, 0x798f, 0x79ee, 0x7a48, 0x7a9d, 0x7aed, 0x7b39, 0x7b80, 0x7bc4, 0x7c03, - 0x7c3f, 0x7c78, 0x7cad, 0x7ce0, 0x7d0f, 0x7d3c, 0x7d66, 0x7d8d, 0x7db3, 0x7dd6, 0x7df7, 0x7e16, 0x7e33, 0x7e4f, - 0x7e69, 0x7e81, 0x7e98, 0x7eae, 0x7ec2, 0x7ed5, 0x7ee7, 0x7ef8, 0x7f08, 0x7f17, 0x7f25, 0x7f32, 0x7f3e, 0x7f4a, - 0x7f55, 0x7f5f, 0x7f69, 0x7f72, 0x7f7b, 0x7f83, 0x7f8a, 0x7f91, 0x7f98, 0x7f9e, 0x7fa4, 0x7faa, 0x7faf, 0x7fb4, - 0x7fb8, 0x7fbd, 0x7fc1, 0x7fc5, 0x7fc8, 0x7fcc, 0x7fcf, 0x7fd2, 0x7fd5, 0x7fd7, 0x7fda, 0x7fdc, 0x7fde, 0x7fe0, - 0x7fe2, 0x7fe4, 0x7fe6, 0x7fe7, 0x7fe9, 0x7fea, 0x7feb, 0x7fed, 0x7fee, 0x7fef, 0x7ff0, 0x7ff1, 0x7ff2, 0x7ff3, - 0x7ff4, 0x7ff4, 0x000b, 0x000c, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010, 0x0011, 0x0012, 0x0013, 0x0015, 0x0016, - 0x0017, 0x0019, 0x001a, 0x001c, 0x001e, 0x0020, 0x0022, 0x0024, 0x0026, 0x0029, 0x002b, 0x002e, 0x0031, 0x0034, - 0x0038, 0x003b, 0x003f, 0x0043, 0x0048, 0x004c, 0x0051, 0x0056, 0x005c, 0x0062, 0x0068, 0x006f, 0x0076, 0x007d, - 0x0085, 0x008e, 0x0097, 0x00a1, 0x00ab, 0x00b6, 0x00c2, 0x00ce, 0x00db, 0x00e9, 0x00f8, 0x0108, 0x0119, 0x012b, - 0x013e, 0x0152, 0x0168, 0x017f, 0x0197, 0x01b1, 0x01cd, 0x01ea, 0x0209, 0x022a, 0x024d, 0x0273, 0x029a, 0x02c4, - 0x02f1, 0x0320, 0x0353, 0x0388, 0x03c1, 0x03fd, 0x043c, 0x0480, 0x04c7, 0x0513, 0x0563, 0x05b8, 0x0612, 0x0671, - 0x06d6, 0x0740, 0x07b1, 0x0828, 0x08a5, 0x092a, 0x09b6, 0x0a49, 0x0ae5, 0x0b88, 0x0c34, 0x0cea, 0x0da8, 0x0e70, - 0x0f42, 0x101e, 0x1105, 0x11f7, 0x12f3, 0x13fb, 0x150f, 0x162e, 0x175a, 0x1891, 0x19d5, 0x1b25, 0x1c81, 0x1dea, - 0x1f5f, 0x20e0, 0x226d, 0x2405, 0x25a9, 0x2758, 0x2911, 0x2ad4, 0x2ca0, 0x2e76, 0x3053, 0x3238, 0x3424, 0x3615, - 0x380b, 0x3a04, 0x3c01, 0x3e00, -}; - -const q15_t sigmoidLTable_q15[128] = { - 0x4000, 0x4100, 0x4200, 0x42ff, 0x43ff, 0x44fd, 0x45fc, 0x46f9, 0x47f5, 0x48f1, 0x49eb, 0x4ae5, 0x4bdc, - 0x4cd3, 0x4dc8, 0x4ebb, 0x4fad, 0x509c, 0x518a, 0x5276, 0x5360, 0x5447, 0x552c, 0x560f, 0x56ef, 0x57cd, - 0x58a8, 0x5981, 0x5a57, 0x5b2a, 0x5bfb, 0x5cc9, 0x5d93, 0x5e5b, 0x5f20, 0x5fe2, 0x60a1, 0x615d, 0x6216, - 0x62cc, 0x637f, 0x642e, 0x64db, 0x6584, 0x662b, 0x66ce, 0x676f, 0x680c, 0x68a6, 0x693d, 0x69d2, 0x6a63, - 0x6af1, 0x6b7c, 0x6c05, 0x6c8a, 0x6d0d, 0x6d8d, 0x6e09, 0x6e84, 0x6efb, 0x6f70, 0x6fe2, 0x7051, 0x0f42, - 0x0faf, 0x101e, 0x1090, 0x1105, 0x117c, 0x11f7, 0x1273, 0x12f3, 0x1376, 0x13fb, 0x1484, 0x150f, 0x159d, - 0x162e, 0x16c3, 0x175a, 0x17f4, 0x1891, 0x1932, 0x19d5, 0x1a7c, 0x1b25, 0x1bd2, 0x1c81, 0x1d34, 0x1dea, - 0x1ea3, 0x1f5f, 0x201e, 0x20e0, 0x21a5, 0x226d, 0x2337, 0x2405, 0x24d6, 0x25a9, 0x267f, 0x2758, 0x2833, - 0x2911, 0x29f1, 0x2ad4, 0x2bb9, 0x2ca0, 0x2d8a, 0x2e76, 0x2f64, 0x3053, 0x3145, 0x3238, 0x332d, 0x3424, - 0x351b, 0x3615, 0x370f, 0x380b, 0x3907, 0x3a04, 0x3b03, 0x3c01, 0x3d01, 0x3e00, 0x3f00, -}; - -const q15_t sigmoidHTable_q15[192] = { - 0x70be, 0x7190, 0x7258, 0x7316, 0x73cc, 0x7478, 0x751b, 0x75b7, 0x764a, 0x76d6, 0x775b, 0x77d8, 0x784f, 0x78c0, - 0x792a, 0x798f, 0x79ee, 0x7a48, 0x7a9d, 0x7aed, 0x7b39, 0x7b80, 0x7bc4, 0x7c03, 0x7c3f, 0x7c78, 0x7cad, 0x7ce0, - 0x7d0f, 0x7d3c, 0x7d66, 0x7d8d, 0x7db3, 0x7dd6, 0x7df7, 0x7e16, 0x7e33, 0x7e4f, 0x7e69, 0x7e81, 0x7e98, 0x7eae, - 0x7ec2, 0x7ed5, 0x7ee7, 0x7ef8, 0x7f08, 0x7f17, 0x7f25, 0x7f32, 0x7f3e, 0x7f4a, 0x7f55, 0x7f5f, 0x7f69, 0x7f72, - 0x7f7b, 0x7f83, 0x7f8a, 0x7f91, 0x7f98, 0x7f9e, 0x7fa4, 0x7faa, 0x7faf, 0x7fb4, 0x7fb8, 0x7fbd, 0x7fc1, 0x7fc5, - 0x7fc8, 0x7fcc, 0x7fcf, 0x7fd2, 0x7fd5, 0x7fd7, 0x7fda, 0x7fdc, 0x7fde, 0x7fe0, 0x7fe2, 0x7fe4, 0x7fe6, 0x7fe7, - 0x7fe9, 0x7fea, 0x7feb, 0x7fed, 0x7fee, 0x7fef, 0x7ff0, 0x7ff1, 0x7ff2, 0x7ff3, 0x7ff4, 0x7ff4, 0x000b, 0x000c, - 0x000c, 0x000d, 0x000e, 0x000f, 0x0010, 0x0011, 0x0012, 0x0013, 0x0015, 0x0016, 0x0017, 0x0019, 0x001a, 0x001c, - 0x001e, 0x0020, 0x0022, 0x0024, 0x0026, 0x0029, 0x002b, 0x002e, 0x0031, 0x0034, 0x0038, 0x003b, 0x003f, 0x0043, - 0x0048, 0x004c, 0x0051, 0x0056, 0x005c, 0x0062, 0x0068, 0x006f, 0x0076, 0x007d, 0x0085, 0x008e, 0x0097, 0x00a1, - 0x00ab, 0x00b6, 0x00c2, 0x00ce, 0x00db, 0x00e9, 0x00f8, 0x0108, 0x0119, 0x012b, 0x013e, 0x0152, 0x0168, 0x017f, - 0x0197, 0x01b1, 0x01cd, 0x01ea, 0x0209, 0x022a, 0x024d, 0x0273, 0x029a, 0x02c4, 0x02f1, 0x0320, 0x0353, 0x0388, - 0x03c1, 0x03fd, 0x043c, 0x0480, 0x04c7, 0x0513, 0x0563, 0x05b8, 0x0612, 0x0671, 0x06d6, 0x0740, 0x07b1, 0x0828, - 0x08a5, 0x092a, 0x09b6, 0x0a49, 0x0ae5, 0x0b88, 0x0c34, 0x0cea, 0x0da8, 0x0e70, -}; - -const q7_t tanhTable_q7[256] = { - 0x00, 0x08, 0x10, 0x18, 0x1f, 0x27, 0x2e, 0x35, 0x3b, 0x41, 0x47, 0x4c, 0x51, 0x56, 0x5a, 0x5e, 0x61, 0x65, 0x68, - 0x6a, 0x6d, 0x6f, 0x71, 0x72, 0x74, 0x75, 0x76, 0x78, 0x78, 0x79, 0x7a, 0x7b, 0x7b, 0x7c, 0x7c, 0x7d, 0x7d, 0x7e, - 0x7e, 0x7e, 0x7e, 0x7e, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, - 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, - 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, - 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, - 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, - 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x81, 0x81, - 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x82, 0x82, 0x82, 0x82, 0x82, 0x83, 0x83, 0x84, 0x84, 0x85, 0x85, 0x86, 0x87, - 0x88, 0x88, 0x8a, 0x8b, 0x8c, 0x8e, 0x8f, 0x91, 0x93, 0x96, 0x98, 0x9b, 0x9f, 0xa2, 0xa6, 0xaa, 0xaf, 0xb4, 0xb9, - 0xbf, 0xc5, 0xcb, 0xd2, 0xd9, 0xe1, 0xe8, 0xf0, 0xf8, -}; - -const q15_t tanhTable_q15[256] = { - 0x0000, 0x07fd, 0x0feb, 0x17b9, 0x1f59, 0x26bf, 0x2ddf, 0x34ae, 0x3b27, 0x4142, 0x46fd, 0x4c56, 0x514d, 0x55e2, - 0x5a1a, 0x5df6, 0x617c, 0x64b0, 0x6797, 0x6a37, 0x6c95, 0x6eb5, 0x709e, 0x7254, 0x73dc, 0x753a, 0x7672, 0x7788, - 0x787f, 0x795b, 0x7a1e, 0x7acb, 0x7b65, 0x7bee, 0x7c66, 0x7cd1, 0x7d30, 0x7d84, 0x7dce, 0x7e0f, 0x7e49, 0x7e7d, - 0x7eaa, 0x7ed2, 0x7ef5, 0x7f14, 0x7f30, 0x7f48, 0x7f5e, 0x7f71, 0x7f82, 0x7f91, 0x7f9e, 0x7fa9, 0x7fb3, 0x7fbc, - 0x7fc4, 0x7fcb, 0x7fd1, 0x7fd7, 0x7fdc, 0x7fe0, 0x7fe4, 0x7fe7, 0x7fea, 0x7fed, 0x7fef, 0x7ff1, 0x7ff3, 0x7ff4, - 0x7ff6, 0x7ff7, 0x7ff8, 0x7ff9, 0x7ffa, 0x7ffa, 0x7ffb, 0x7ffc, 0x7ffc, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffe, 0x7ffe, - 0x7ffe, 0x7ffe, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, - 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, - 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, - 0x8001, 0x8001, 0x8001, 0x8002, 0x8002, 0x8002, 0x8002, 0x8003, 0x8003, 0x8003, 0x8004, 0x8004, 0x8005, 0x8006, - 0x8006, 0x8007, 0x8008, 0x8009, 0x800a, 0x800c, 0x800d, 0x800f, 0x8011, 0x8013, 0x8016, 0x8019, 0x801c, 0x8020, - 0x8024, 0x8029, 0x802f, 0x8035, 0x803c, 0x8044, 0x804d, 0x8057, 0x8062, 0x806f, 0x807e, 0x808f, 0x80a2, 0x80b8, - 0x80d0, 0x80ec, 0x810b, 0x812e, 0x8156, 0x8183, 0x81b7, 0x81f1, 0x8232, 0x827c, 0x82d0, 0x832f, 0x839a, 0x8412, - 0x849b, 0x8535, 0x85e2, 0x86a5, 0x8781, 0x8878, 0x898e, 0x8ac6, 0x8c24, 0x8dac, 0x8f62, 0x914b, 0x936b, 0x95c9, - 0x9869, 0x9b50, 0x9e84, 0xa20a, 0xa5e6, 0xaa1e, 0xaeb3, 0xb3aa, 0xb903, 0xbebe, 0xc4d9, 0xcb52, 0xd221, 0xd941, - 0xe0a7, 0xe847, 0xf015, 0xf803, -}; - -const q15_t tanhLTable_q15[128] = { - 0x0000, 0x0400, 0x07fd, 0x0bf7, 0x0feb, 0x13d7, 0x17b9, 0x1b90, 0x1f59, 0x2314, 0x26bf, 0x2a58, 0x2ddf, - 0x3151, 0x34ae, 0x37f6, 0x3b27, 0x3e40, 0x4142, 0x442c, 0x46fd, 0x49b6, 0x4c56, 0x4edd, 0x514d, 0x53a3, - 0x55e2, 0x580a, 0x5a1a, 0x5c13, 0x5df6, 0x5fc4, 0x617c, 0x6320, 0x64b0, 0x662d, 0x6797, 0x68f0, 0x6a37, - 0x6b6e, 0x6c95, 0x6dac, 0x6eb5, 0x6fb0, 0x709e, 0x717f, 0x7254, 0x731e, 0x73dc, 0x7490, 0x753a, 0x75da, - 0x7672, 0x7701, 0x7788, 0x7807, 0x787f, 0x78f0, 0x795b, 0x79bf, 0x7a1e, 0x7a77, 0x7acb, 0x7b1b, 0x849b, - 0x84e5, 0x8535, 0x8589, 0x85e2, 0x8641, 0x86a5, 0x8710, 0x8781, 0x87f9, 0x8878, 0x88ff, 0x898e, 0x8a26, - 0x8ac6, 0x8b70, 0x8c24, 0x8ce2, 0x8dac, 0x8e81, 0x8f62, 0x9050, 0x914b, 0x9254, 0x936b, 0x9492, 0x95c9, - 0x9710, 0x9869, 0x99d3, 0x9b50, 0x9ce0, 0x9e84, 0xa03c, 0xa20a, 0xa3ed, 0xa5e6, 0xa7f6, 0xaa1e, 0xac5d, - 0xaeb3, 0xb123, 0xb3aa, 0xb64a, 0xb903, 0xbbd4, 0xbebe, 0xc1c0, 0xc4d9, 0xc80a, 0xcb52, 0xceaf, 0xd221, - 0xd5a8, 0xd941, 0xdcec, 0xe0a7, 0xe470, 0xe847, 0xec29, 0xf015, 0xf409, 0xf803, 0xfc00, -}; - -const q15_t tanhHTable_q15[192] = { - 0x7b65, 0x7bee, 0x7c66, 0x7cd1, 0x7d30, 0x7d84, 0x7dce, 0x7e0f, 0x7e49, 0x7e7d, 0x7eaa, 0x7ed2, 0x7ef5, 0x7f14, - 0x7f30, 0x7f48, 0x7f5e, 0x7f71, 0x7f82, 0x7f91, 0x7f9e, 0x7fa9, 0x7fb3, 0x7fbc, 0x7fc4, 0x7fcb, 0x7fd1, 0x7fd7, - 0x7fdc, 0x7fe0, 0x7fe4, 0x7fe7, 0x7fea, 0x7fed, 0x7fef, 0x7ff1, 0x7ff3, 0x7ff4, 0x7ff6, 0x7ff7, 0x7ff8, 0x7ff9, - 0x7ffa, 0x7ffa, 0x7ffb, 0x7ffc, 0x7ffc, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, - 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x8000, 0x8000, - 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, - 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, - 0x8000, 0x8000, 0x8000, 0x8000, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8002, - 0x8002, 0x8002, 0x8002, 0x8003, 0x8003, 0x8003, 0x8004, 0x8004, 0x8005, 0x8006, 0x8006, 0x8007, 0x8008, 0x8009, - 0x800a, 0x800c, 0x800d, 0x800f, 0x8011, 0x8013, 0x8016, 0x8019, 0x801c, 0x8020, 0x8024, 0x8029, 0x802f, 0x8035, - 0x803c, 0x8044, 0x804d, 0x8057, 0x8062, 0x806f, 0x807e, 0x808f, 0x80a2, 0x80b8, 0x80d0, 0x80ec, 0x810b, 0x812e, - 0x8156, 0x8183, 0x81b7, 0x81f1, 0x8232, 0x827c, 0x82d0, 0x832f, 0x839a, 0x8412, -}; diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c deleted file mode 100644 index 97b8b45..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_q7_to_q15_no_shift.c - * Description: Converts the elements of the Q7 vector to Q15 vector without left-shift - * - * $Date: May 29, 2020 - * $Revision: V.1.0.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup nndata_convert - * @{ - */ - -/** - * @brief Converts the elements of the Q7 vector to Q15 vector without left-shift - * @param[in] *pSrc points to the Q7 input vector - * @param[out] *pDst points to the Q15 output vector - * @param[in] blockSize length of the input vector - * - * \par Description: - * - * The equation used for the conversion process is: - * - * 
- * 	pDst[n] = (q15_t) pSrc[n];   0 <= n < blockSize.
- *
- * - */ - -void arm_q7_to_q15_no_shift(const q7_t *pSrc, q15_t *pDst, uint32_t blockSize) -{ - const q7_t *pIn = pSrc; - uint32_t blkCnt; - -#if defined(ARM_MATH_DSP) - q31_t in; - q31_t in1, in2; - q31_t out1, out2; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. */ - while (blkCnt > 0u) - { - in = arm_nn_read_q7x4_ia(&pIn); - - /* rotatate in by 8 and extend two q7_t values to q15_t values */ - in1 = __SXTB16(__ROR((uint32_t)in, 8)); - - /* extend remaining two q7_t values to q15_t values */ - in2 = __SXTB16(in); - -#ifndef ARM_MATH_BIG_ENDIAN - out2 = (int32_t)__PKHTB(in1, in2, 16); - out1 = (int32_t)__PKHBT(in2, in1, 16); -#else - out1 = (int32_t)__PKHTB(in1, in2, 16); - out2 = (int32_t)__PKHBT(in2, in1, 16); -#endif - arm_nn_write_q15x2_ia(&pDst, out1); - arm_nn_write_q15x2_ia(&pDst, out2); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while (blkCnt > 0u) - { - /* convert from q7 to q15 and then store the results in the destination buffer */ - *pDst++ = (q15_t)*pIn++; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of nndata_convert group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c deleted file mode 100644 index 853d9b7..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_q7_to_q15_reordered_no_shift.c - * Description: Converts the elements of the Q7 vector to reordered Q15 vector without left-shift - * - * $Date: July 20, 2021 - * $Revision: V.1.1.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup nndata_convert - * @{ - */ - -/** - * @brief Converts the elements of the Q7 vector to reordered Q15 vector without left-shift - * @param[in] *pSrc points to the Q7 input vector - * @param[out] *pDst points to the Q15 output vector - * @param[in] blockSize length of the input vector - * - * @details - * - * This function does the q7 to q15 expansion with re-ordering - * - * 
- *                          |   A1   |   A2   |   A3   |   A4   |
- *
- *                           0      7 8     15 16    23 24    31
- *
- * - * is converted into: - * - * 
- *  |       A1       |       A3       |   and  |       A2       |       A4       |
- *
- *   0             15 16            31          0             15 16            31
- *
- * - * - * This looks strange but is natural considering how sign-extension is done at - * assembly level. - * - * The expansion of other other oprand will follow the same rule so that the end - * results are the same. - * - * The tail (i.e., last (N % 4) elements) will still be in original order. - * - */ - -void arm_q7_to_q15_reordered_no_shift(const q7_t *pSrc, q15_t *pDst, uint32_t blockSize) -{ - const q7_t *pIn = pSrc; /* Src pointer */ - uint32_t blkCnt; /* loop counter */ - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - q31_t in; - q31_t in1, in2; - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while (blkCnt > 0u) - { - /* C = (q15_t) A << 8 */ - /* convert from q7 to q15 and then store the results in the destination buffer */ - in = arm_nn_read_q7x4_ia(&pIn); - - /* rotatate in by 8 and extend two q7_t values to q15_t values */ - in1 = __SXTB16(__ROR((uint32_t)in, 8)); - - /* extend remainig two q7_t values to q15_t values */ - in2 = __SXTB16(in); - -#ifndef ARM_MATH_BIG_ENDIAN - arm_nn_write_q7x4_ia((q7_t **)&pDst, in2); - arm_nn_write_q7x4_ia((q7_t **)&pDst, in1); -#else - arm_nn_write_q7x4_ia((q7_t **)&pDst, in1); - arm_nn_write_q7x4_ia((q7_t **)&pDst, in2); -#endif - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Loop over blockSize number of values */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while (blkCnt > 0u) - { - /* C = (q15_t) A << 8 */ - /* convert from q7 to q15 and then store the results in the destination buffer */ - *pDst++ = (q15_t)*pIn++; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of q7_to_x group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c deleted file mode 100644 index 552cae4..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_q7_to_q15_reordered_with_offset.c - * Description: Converts the elements of the Q7 vector to a reordered Q15 vector with an added offset. The re-ordering - * is a signature of sign extension intrinsic(DSP extension). - * - * $Date: May 29, 2020 - * $Revision: V.2.0.3 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup nndata_convert - * @{ - */ - -/** - * @brief Converts the elements of the Q7 vector to a reordered Q15 vector with an added offset. - * - * @note Refer header file for details. - * - */ - -void arm_q7_to_q15_reordered_with_offset(const q7_t *src, q15_t *dst, uint32_t block_size, q15_t offset) -{ - -#if defined(ARM_MATH_DSP) - uint32_t block_cnt; - /* Run the below code for cores that support SIMD instructions */ - q31_t in_q7x4; - q31_t out_q15x2_1; - q31_t out_q15x2_2; - - /*loop unrolling */ - block_cnt = block_size >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. */ - const q31_t offset_q15x2 = (q31_t)__PKHBT(offset, offset, 16); - while (block_cnt > 0u) - { - /* convert from q7 to q15 and then store the results in the destination buffer */ - in_q7x4 = arm_nn_read_q7x4_ia(&src); - - /* Extract and sign extend each of the four q7 values to q15 */ - out_q15x2_1 = __SXTAB16(offset_q15x2, __ROR((uint32_t)in_q7x4, 8)); - out_q15x2_2 = __SXTAB16(offset_q15x2, in_q7x4); - - arm_nn_write_q15x2_ia(&dst, out_q15x2_2); - arm_nn_write_q15x2_ia(&dst, out_q15x2_1); - - block_cnt--; - } - /* Handle left over samples */ - block_cnt = block_size % 0x4u; - - while (block_cnt > 0u) - { - *dst++ = (q15_t)*src++ + offset; - - /* Decrement the loop counter */ - block_cnt--; - } -#else - (void)src; - (void)dst; - (void)block_size; - (void)offset; - /* Not available */ -#endif -} - -/** - * @} end of nndata_convert group - */ diff --git a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c b/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c deleted file mode 100644 index 0ce47e4..0000000 --- a/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in_q7x4 compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in_q7x4 writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_q7_to_q15_with_offset.c - * Description: Converts the elements of the Q7 vector to Q15 vector with an added offset - * - * $Date: March 3, 2020 - * $Revision: V.2.0.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup nndata_convert - * @{ - */ - -void arm_q7_to_q15_with_offset(const q7_t *src, q15_t *dst, uint32_t block_size, q15_t offset) -{ - int block_cnt; - -#if defined(ARM_MATH_MVEI) - - int16x8_t source; - const int16x8_t source_offset = vdupq_n_s16(offset); - block_cnt = block_size / 8; - - while (block_cnt > 0) - { - source = vldrbq_s16(src); - source = vaddq_s16(source, source_offset); - vstrhq_s16(dst, source); - dst += 8; - src += 8; - block_cnt--; - } - - block_cnt = block_size & 0x7; - -#elif defined(ARM_MATH_DSP) - /* Run the below code for cores that support SIMD instructions */ - q31_t in_q7x4; - q31_t in_q15x2_1; - q31_t in_q15x2_2; - q31_t out_q15x2_1; - q31_t out_q15x2_2; - - /*loop unrolling */ - block_cnt = block_size >> 2; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. */ - const q31_t offset_q15x2 = __PKHBT(offset, offset, 16); - while (block_cnt > 0) - { - /* convert from q7 to q15 and then store the results in the destination buffer */ - in_q7x4 = arm_nn_read_q7x4_ia(&src); - - /* Extract and sign extend each of the four q7 values to q15 */ - in_q15x2_1 = __SXTAB16(offset_q15x2, __ROR(in_q7x4, 8)); - in_q15x2_2 = __SXTAB16(offset_q15x2, in_q7x4); - - out_q15x2_2 = __PKHTB(in_q15x2_1, in_q15x2_2, 16); - out_q15x2_1 = __PKHBT(in_q15x2_2, in_q15x2_1, 16); - - arm_nn_write_q15x2_ia(&dst, out_q15x2_1); - arm_nn_write_q15x2_ia(&dst, out_q15x2_2); - - block_cnt--; - } - /* Handle left over samples */ - block_cnt = block_size % 0x4; - -#else - /* Run the below code for Cortex-M0 */ - /* Loop over block_size number of values */ - block_cnt = block_size; -#endif - - while (block_cnt > 0) - { - *dst++ = (q15_t)*src++ + offset; - - /* Decrement the loop counter */ - block_cnt--; - } -} - -/** - * @} end of nndata_convert group - */ diff --git a/Drivers/CMSIS/NN/Source/PoolingFunctions/CMakeLists.txt b/Drivers/CMSIS/NN/Source/PoolingFunctions/CMakeLists.txt deleted file mode 100644 index 962d83d..0000000 --- a/Drivers/CMSIS/NN/Source/PoolingFunctions/CMakeLists.txt +++ /dev/null @@ -1,24 +0,0 @@ -# -# Copyright (c) 2019-2022 Arm Limited. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -file(GLOB SRC "./*_s8.c") -file(GLOB SRC_S16 "./*_s16.c") -target_sources(cmsis-nn PRIVATE ${SRC} ${SRC_S16}) - - - diff --git a/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s16.c b/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s16.c deleted file mode 100644 index e63f869..0000000 --- a/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s16.c +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (C) 2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_avgpool_s16.c - * Description: Pooling function implementations - * - * $Date: 3. February 2022 - * $Revision: V.1.0.1 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Pooling - * @{ - */ - -/* - * s16 average pooling function - * - * Refer to header file for details. - * - */ -arm_status arm_avgpool_s16(const cmsis_nn_context *ctx, - const cmsis_nn_pool_params *pool_params, - const cmsis_nn_dims *input_dims, - const q15_t *src, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims, - q15_t *dst) -{ - (void)ctx; - const int32_t input_y = input_dims->h; - const int32_t input_x = input_dims->w; - const int32_t output_y = output_dims->h; - const int32_t output_x = output_dims->w; - const int32_t stride_y = pool_params->stride.h; - const int32_t stride_x = pool_params->stride.w; - const int32_t kernel_y = filter_dims->h; - const int32_t kernel_x = filter_dims->w; - const int32_t pad_y = pool_params->padding.h; - const int32_t pad_x = pool_params->padding.w; - const int32_t act_min = pool_params->activation.min; - const int32_t act_max = pool_params->activation.max; - const int32_t ch_src = input_dims->c; - - /* Reference C code adapted from CMSIS-NN arm_avgpool_s8.c. - */ - - for (int i_y = 0, base_idx_y = -pad_y; i_y < output_y; base_idx_y += stride_y, i_y++) - { - for (int i_x = 0, base_idx_x = -pad_x; i_x < output_x; base_idx_x += stride_x, i_x++) - { - /* Condition for kernel start dimension: (base_idx_ + kernel__start) >= 0 */ - const int32_t ker_y_start = MAX(0, -base_idx_y); - const int32_t ker_x_start = MAX(0, -base_idx_x); - - /* Condition for kernel end dimension: (base_idx_ + kernel__end) < dim_src_ */ - const int32_t kernel_y_end = MIN(kernel_y, input_y - base_idx_y); - const int32_t kernel_x_end = MIN(kernel_x, input_x - base_idx_x); - - for (int i_ch_in = 0; i_ch_in < ch_src; i_ch_in++) - { - int sum = 0; - int count = 0; - - for (int k_y = ker_y_start; k_y < kernel_y_end; k_y++) - { - for (int k_x = ker_x_start; k_x < kernel_x_end; k_x++) - { - sum += src[i_ch_in + ch_src * (k_x + base_idx_x + (k_y + base_idx_y) * input_x)]; - count++; - } - } - - // Prevent static code issue DIVIDE_BY_ZERO. - if (count == 0) - { - return ARM_MATH_ARGUMENT_ERROR; - } - - sum = sum > 0 ? (sum + count / 2) / count : (sum - count / 2) / count; - sum = MAX(sum, act_min); - sum = MIN(sum, act_max); - - dst[i_ch_in + ch_src * (i_x + i_y * output_x)] = sum; - } - } - } - - return ARM_MATH_SUCCESS; -} - -int32_t arm_avgpool_s16_get_buffer_size(const int output_x, const int ch_src) -{ - (void)output_x; - (void)ch_src; - return 0; -} - -/** - * @} end of Pooling group - */ diff --git a/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c b/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c deleted file mode 100644 index 8e04bdc..0000000 --- a/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c +++ /dev/null @@ -1,401 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_avgpool_s8.c - * Description: Pooling function implementations - * - * $Date: 01. March 2021 - * $Revision: V.2.0.4 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - -static void scale_q31_to_q7_and_clamp(const q31_t *buffer, - q7_t *target, - int32_t length, - const int32_t count, - const int act_min, - const int act_max) -{ - const int half_count = count / 2; - - // Prevent static code issue DIVIDE_BY_ZERO. - if (count == 0) - { - return; - } - - for (int i = 0; i < length; i++) - { - int32_t sum = buffer[i] > 0 ? (buffer[i] + half_count) : (buffer[i] - half_count); - sum = sum / count; - sum = MAX(sum, act_min); - sum = MIN(sum, act_max); - - target[i] = (q7_t)sum; - } -} -#endif - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Pooling - * @{ - */ - -/* - * s8 average pooling function - * - * Refer to header file for details. - * - */ - -#if defined(ARM_MATH_MVEI) - -arm_status arm_avgpool_s8(const cmsis_nn_context *ctx, - const cmsis_nn_pool_params *pool_params, - const cmsis_nn_dims *input_dims, - const q7_t *src, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims, - q7_t *dst) -{ - (void)ctx; - const int32_t input_y = input_dims->h; - const int32_t input_x = input_dims->w; - const int32_t output_y = output_dims->h; - const int32_t output_x = output_dims->w; - const int32_t stride_y = pool_params->stride.h; - const int32_t stride_x = pool_params->stride.w; - const int32_t kernel_y = filter_dims->h; - const int32_t kernel_x = filter_dims->w; - const int32_t pad_y = pool_params->padding.h; - const int32_t pad_x = pool_params->padding.w; - const int32_t act_min = pool_params->activation.min; - const int32_t act_max = pool_params->activation.max; - const int32_t ch_src = input_dims->c; - - int32_t i_x, i_y; - int32_t k_x, k_y; - - for (i_y = 0; i_y < output_y; i_y++) - { - for (i_x = 0; i_x < output_x; i_x++) - { - - int32_t k_y_start, k_y_end; - int32_t k_x_start, k_x_end; - int32_t chCnt; - const int8_t *pTmp, *pTmpInner; - int8_t *pDst; - - k_y_start = MAX(0, i_y * stride_y - pad_y); - k_y_end = MIN(i_y * stride_y - pad_y + kernel_y, input_y); - - k_x_start = MAX(0, i_x * stride_x - pad_x); - k_x_end = MIN(i_x * stride_x - pad_x + kernel_x, input_x); - - pTmp = src; - pDst = &dst[ch_src * (i_x + i_y * output_x)]; - - chCnt = ch_src >> 4; - while (chCnt > 0) - { - int32x4_t sumV1, sumV2, sumV3, sumV4; - - int8x16_t tempV; - int16x8_t tempVLO, tempVHI; - int32x4_t tempVLOLO, tempVLOHI, tempVHILO, tempVHIHI; - int32_t count = 0; - - sumV1 = vdupq_n_s32(0); - sumV2 = vdupq_n_s32(0); - sumV3 = vdupq_n_s32(0); - sumV4 = vdupq_n_s32(0); - - for (k_y = k_y_start; k_y < k_y_end; k_y++) - { - for (k_x = k_x_start; k_x < k_x_end; k_x++) - { - pTmpInner = pTmp + (ch_src * (k_x + k_y * input_x)); - tempV = vldrbq_s8(pTmpInner); - - tempVLO = vmovlbq_s8(tempV); - tempVHI = vmovltq_s8(tempV); - - tempVLOLO = vmovlbq_s16(tempVLO); - tempVLOHI = vmovltq_s16(tempVLO); - - tempVHILO = vmovlbq_s16(tempVHI); - tempVHIHI = vmovltq_s16(tempVHI); - - sumV1 = vaddq_s32(sumV1, tempVLOLO); - sumV2 = vaddq_s32(sumV2, tempVLOHI); - sumV3 = vaddq_s32(sumV3, tempVHILO); - sumV4 = vaddq_s32(sumV4, tempVHIHI); - - count++; - } - } - - // Prevent static code issue DIVIDE_BY_ZERO. - if (count == 0) - { - return ARM_MATH_ARGUMENT_ERROR; - } - - sumV1[0] = sumV1[0] > 0 ? (sumV1[0] + count / 2) / count : (sumV1[0] - count / 2) / count; - sumV1[1] = sumV1[1] > 0 ? (sumV1[1] + count / 2) / count : (sumV1[1] - count / 2) / count; - sumV1[2] = sumV1[2] > 0 ? (sumV1[2] + count / 2) / count : (sumV1[2] - count / 2) / count; - sumV1[3] = sumV1[3] > 0 ? (sumV1[3] + count / 2) / count : (sumV1[3] - count / 2) / count; - - sumV2[0] = sumV2[0] > 0 ? (sumV2[0] + count / 2) / count : (sumV2[0] - count / 2) / count; - sumV2[1] = sumV2[1] > 0 ? (sumV2[1] + count / 2) / count : (sumV2[1] - count / 2) / count; - sumV2[2] = sumV2[2] > 0 ? (sumV2[2] + count / 2) / count : (sumV2[2] - count / 2) / count; - sumV2[3] = sumV2[3] > 0 ? (sumV2[3] + count / 2) / count : (sumV2[3] - count / 2) / count; - - sumV3[0] = sumV3[0] > 0 ? (sumV3[0] + count / 2) / count : (sumV3[0] - count / 2) / count; - sumV3[1] = sumV3[1] > 0 ? (sumV3[1] + count / 2) / count : (sumV3[1] - count / 2) / count; - sumV3[2] = sumV3[2] > 0 ? (sumV3[2] + count / 2) / count : (sumV3[2] - count / 2) / count; - sumV3[3] = sumV3[3] > 0 ? (sumV3[3] + count / 2) / count : (sumV3[3] - count / 2) / count; - - sumV4[0] = sumV4[0] > 0 ? (sumV4[0] + count / 2) / count : (sumV4[0] - count / 2) / count; - sumV4[1] = sumV4[1] > 0 ? (sumV4[1] + count / 2) / count : (sumV4[1] - count / 2) / count; - sumV4[2] = sumV4[2] > 0 ? (sumV4[2] + count / 2) / count : (sumV4[2] - count / 2) / count; - sumV4[3] = sumV4[3] > 0 ? (sumV4[3] + count / 2) / count : (sumV4[3] - count / 2) / count; - - sumV1 = vmaxq_s32(sumV1, vdupq_n_s32(act_min)); - sumV1 = vminq_s32(sumV1, vdupq_n_s32(act_max)); - - sumV2 = vmaxq_s32(sumV2, vdupq_n_s32(act_min)); - sumV2 = vminq_s32(sumV2, vdupq_n_s32(act_max)); - - sumV3 = vmaxq_s32(sumV3, vdupq_n_s32(act_min)); - sumV3 = vminq_s32(sumV3, vdupq_n_s32(act_max)); - - sumV4 = vmaxq_s32(sumV4, vdupq_n_s32(act_min)); - sumV4 = vminq_s32(sumV4, vdupq_n_s32(act_max)); - - tempVLO = vmovnbq_s32(tempVLO, sumV1); - tempVLO = vmovntq_s32(tempVLO, sumV2); - - tempVHI = vmovnbq_s32(tempVHI, sumV3); - tempVHI = vmovntq_s32(tempVHI, sumV4); - - tempV = vmovnbq_s16(tempV, tempVLO); - tempV = vmovntq_s16(tempV, tempVHI); - - vstrbq_s8(pDst, tempV); - pDst += 16; - - chCnt--; - pTmp += 16; - } - - chCnt = ch_src & 0xF; - while (chCnt > 0) - { - int32_t sum = 0; - int32_t count = 0; - - for (k_y = k_y_start; k_y < k_y_end; k_y++) - { - for (k_x = k_x_start; k_x < k_x_end; k_x++) - { - sum += pTmp[ch_src * (k_x + k_y * input_x)]; - count++; - } - } - - // Prevent static code issue DIVIDE_BY_ZERO. - if (count == 0) - { - return ARM_MATH_ARGUMENT_ERROR; - } - - sum = sum > 0 ? (sum + count / 2) / count : (sum - count / 2) / count; - sum = MAX(sum, act_min); - sum = MIN(sum, act_max); - - *pDst++ = sum; - - chCnt--; - pTmp++; - } - } - } - return ARM_MATH_SUCCESS; -} - -#else -arm_status arm_avgpool_s8(const cmsis_nn_context *ctx, - const cmsis_nn_pool_params *pool_params, - const cmsis_nn_dims *input_dims, - const q7_t *src, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims, - q7_t *dst) -{ - const int32_t input_y = input_dims->h; - const int32_t input_x = input_dims->w; - const int32_t output_y = output_dims->h; - const int32_t output_x = output_dims->w; - const int32_t stride_y = pool_params->stride.h; - const int32_t stride_x = pool_params->stride.w; - const int32_t kernel_y = filter_dims->h; - const int32_t kernel_x = filter_dims->w; - const int32_t pad_y = pool_params->padding.h; - const int32_t pad_x = pool_params->padding.w; - const int32_t act_min = pool_params->activation.min; - const int32_t act_max = pool_params->activation.max; - const int32_t ch_src = input_dims->c; - - if (ctx->buf == NULL && arm_avgpool_s8_get_buffer_size(output_dims->w, input_dims->c)) - { - return ARM_MATH_ARGUMENT_ERROR; - } - q31_t *buffer = (q31_t *)ctx->buf; - -#if defined(ARM_MATH_DSP) - - /* Run the following code for CPU's with DSP extension - */ - for (int i_y = 0, idx_y = -pad_y; i_y < output_y; idx_y += stride_y, i_y++) - { - for (int i_x = 0, idx_x = -pad_x; i_x < output_x; idx_x += stride_x, i_x++) - { - /* Condition for kernel start dimension: - (base_idx_ + kernel__start) >= 0 */ - const int32_t kernel_y_start = MAX(0, -idx_y); - const int32_t kernel_x_start = MAX(0, -idx_x); - - /* Condition for kernel end dimension: - (base_idx_ + kernel__end) < dim_src_ */ - const int32_t kernel_y_end = MIN(kernel_y, input_y - idx_y); - const int32_t kernel_x_end = MIN(kernel_x, input_x - idx_x); - - int count = 0; - - for (int k_y = kernel_y_start; k_y < kernel_y_end; k_y++) - { - for (int k_x = kernel_x_start; k_x < kernel_x_end; k_x++) - { - const q7_t *start = src + ch_src * (k_x + idx_x + (k_y + idx_y) * input_x); - - if (count == 0) - { - for (int i = 0; i < ch_src; i++) - { - buffer[i] = start[i]; - } - } - else - { - for (int i = 0; i < ch_src; i++) - { - buffer[i] = __QADD(start[i], buffer[i]); - } - } - count++; - } - } - - // Prevent static code issue DIVIDE_BY_ZERO. - if (count == 0) - { - return ARM_MATH_ARGUMENT_ERROR; - } - - scale_q31_to_q7_and_clamp(buffer, dst, ch_src, count, act_min, act_max); - dst += ch_src; - } - } -#else - - /* Reference C code adapted from CMSIS-NN arm_avepool_q7_HWC. - */ - (void)buffer; - int16_t i_ch_in, i_x, i_y; - int16_t k_x, k_y; - - for (i_y = 0; i_y < output_y; i_y++) - { - for (i_x = 0; i_x < output_x; i_x++) - { - for (i_ch_in = 0; i_ch_in < ch_src; i_ch_in++) - { - int sum = 0; - int count = 0; - for (k_y = i_y * stride_y - pad_y; k_y < i_y * stride_y - pad_y + kernel_y; k_y++) - { - for (k_x = i_x * stride_x - pad_x; k_x < i_x * stride_x - pad_x + kernel_x; k_x++) - { - if (k_y >= 0 && k_x >= 0 && k_y < input_y && k_x < input_x) - { - sum += src[i_ch_in + ch_src * (k_x + k_y * input_x)]; - count++; - } - } - } - - // Prevent static code issue DIVIDE_BY_ZERO. - if (count == 0) - { - return ARM_MATH_ARGUMENT_ERROR; - } - - sum = sum > 0 ? (sum + count / 2) / count : (sum - count / 2) / count; - sum = MAX(sum, act_min); - sum = MIN(sum, act_max); - - dst[i_ch_in + ch_src * (i_x + i_y * output_x)] = sum; - } - } - } - -#endif - return ARM_MATH_SUCCESS; -} - -#endif /* ARM_MATH_MVEI */ - -int32_t arm_avgpool_s8_get_buffer_size(const int output_x, const int ch_src) -{ - (void)output_x; - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - return (ch_src * sizeof(int32_t)); -#else - (void)ch_src; - return 0; -#endif -} -/** - * @} end of Pooling group - */ diff --git a/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s16.c b/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s16.c deleted file mode 100644 index 859d12c..0000000 --- a/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s16.c +++ /dev/null @@ -1,180 +0,0 @@ -/* - * Copyright (C) 2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_max_pool_s16.c - * Description: Pooling function implementations - * - * $Date: 24. January 2022 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -static void compare_and_replace_if_larger(int16_t *base, const int16_t *target, int32_t length) -{ - q15_t *dst = base; - const q15_t *src = target; - union arm_nnword ref_max; - union arm_nnword comp_max; - int32_t cnt = length >> 1; - - while (cnt > 0l) - { - ref_max.word = arm_nn_read_q15x2(dst); - comp_max.word = arm_nn_read_q15x2_ia(&src); - - if (comp_max.half_words[0] > ref_max.half_words[0]) - { - ref_max.half_words[0] = comp_max.half_words[0]; - } - if (comp_max.half_words[1] > ref_max.half_words[1]) - { - ref_max.half_words[1] = comp_max.half_words[1]; - } - - arm_nn_write_q15x2_ia(&dst, ref_max.word); - - cnt--; - } - - if (length & 0x1) - { - if (*src > *dst) - { - *dst = *src; - } - } -} - -static void clamp_output(int16_t *source, int32_t length, const int16_t act_min, const int16_t act_max) -{ - union arm_nnword in; - int32_t cnt = length >> 1; - - while (cnt > 0l) - { - in.word = arm_nn_read_q15x2(source); - - in.half_words[0] = MAX(in.half_words[0], act_min); - in.half_words[0] = MIN(in.half_words[0], act_max); - in.half_words[1] = MAX(in.half_words[1], act_min); - in.half_words[1] = MIN(in.half_words[1], act_max); - - arm_nn_write_q15x2_ia(&source, in.word); - cnt--; - } - - if (length & 0x1) - { - int16_t comp = *source; - comp = MAX(comp, act_min); - comp = MIN(comp, act_max); - *source = comp; - } -} - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Pooling - * @{ - */ - -/* - * Optimized s16 max pooling function - * - * Refer to header file for details. - * - */ - -arm_status arm_max_pool_s16(const cmsis_nn_context *ctx, - const cmsis_nn_pool_params *pool_params, - const cmsis_nn_dims *input_dims, - const int16_t *src, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims, - int16_t *dst) -{ - const int32_t input_y = input_dims->h; - const int32_t input_x = input_dims->w; - const int32_t output_y = output_dims->h; - const int32_t output_x = output_dims->w; - const int32_t stride_y = pool_params->stride.h; - const int32_t stride_x = pool_params->stride.w; - const int32_t kernel_y = filter_dims->h; - const int32_t kernel_x = filter_dims->w; - const int32_t pad_y = pool_params->padding.h; - const int32_t pad_x = pool_params->padding.w; - const int16_t act_min = pool_params->activation.min; - const int16_t act_max = pool_params->activation.max; - const int32_t channel_in = input_dims->c; - (void)ctx; - int16_t *dst_base = dst; - - for (int i_y = 0, base_idx_y = -pad_y; i_y < output_y; base_idx_y += stride_y, i_y++) - { - for (int i_x = 0, base_idx_x = -pad_x; i_x < output_x; base_idx_x += stride_x, i_x++) - { - /* Condition for kernel start dimension: (base_idx_ + kernel__start) >= 0 */ - const int32_t ker_y_start = MAX(0, -base_idx_y); - const int32_t ker_x_start = MAX(0, -base_idx_x); - - /* Condition for kernel end dimension: (base_idx_ + kernel__end) < dim_src_ */ - const int32_t kernel_y_end = MIN(kernel_y, input_y - base_idx_y); - const int32_t kernel_x_end = MIN(kernel_x, input_x - base_idx_x); - - int count = 0; - - for (int k_y = ker_y_start; k_y < kernel_y_end; k_y++) - { - for (int k_x = ker_x_start; k_x < kernel_x_end; k_x++) - { - const int16_t *start = src + channel_in * (k_x + base_idx_x + (k_y + base_idx_y) * input_x); - - if (count == 0) - { - memcpy(dst, start, channel_in * sizeof(int16_t)); - count++; - } - else - { - compare_and_replace_if_larger(dst, start, channel_in); - } - } - } - /* 'count' is expected to be non-zero here. */ - dst += channel_in; - } - } - - clamp_output(dst_base, output_x * output_y * channel_in, act_min, act_max); - - return ARM_MATH_SUCCESS; -} - -/** - * @} end of Pooling group - */ diff --git a/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c b/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c deleted file mode 100644 index aac3394..0000000 --- a/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_max_pool_s8.c - * Description: Pooling function implementations - * - * $Date: 20. July 2021 - * $Revision: V.2.0.3 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -static void compare_and_replace_if_larger_q7(q7_t *base, const q7_t *target, int32_t length) -{ -#if defined(ARM_MATH_MVEI) - int32_t loop_count = (length + 15) / 16; - for (int i = 0; i < loop_count; i++) - { - mve_pred16_t p = vctp8q((uint32_t)length); - const int8x16_t op_1 = vldrbq_z_s8(base, p); - const int8x16_t op_2 = vldrbq_z_s8(target, p); - const int8x16_t max = vmaxq_m_s8(vuninitializedq_s8(), op_1, op_2, p); - vstrbq_p_s8(base, max, p); - base += 16; - target += 16; - length -= 16; - } -#else - q7_t *dst = base; - const q7_t *src = target; - union arm_nnword ref_max; - union arm_nnword comp_max; - int32_t cnt = length >> 2; - - while (cnt > 0l) - { - ref_max.word = arm_nn_read_q7x4(dst); - comp_max.word = arm_nn_read_q7x4_ia(&src); - - if (comp_max.bytes[0] > ref_max.bytes[0]) - { - ref_max.bytes[0] = comp_max.bytes[0]; - } - if (comp_max.bytes[1] > ref_max.bytes[1]) - { - ref_max.bytes[1] = comp_max.bytes[1]; - } - if (comp_max.bytes[2] > ref_max.bytes[2]) - { - ref_max.bytes[2] = comp_max.bytes[2]; - } - if (comp_max.bytes[3] > ref_max.bytes[3]) - { - ref_max.bytes[3] = comp_max.bytes[3]; - } - - arm_nn_write_q7x4_ia(&dst, ref_max.word); - - cnt--; - } - - cnt = length & 0x3; - while (cnt > 0l) - { - if (*src > *dst) - { - *dst = *src; - } - dst++; - src++; - cnt--; - } -#endif -} - -static void clamp_output(q7_t *source, int32_t length, const int32_t act_min, const int32_t act_max) -{ -#if defined(ARM_MATH_MVEI) - int32_t loop_count = (length + 15) / 16; - for (int i = 0; i < loop_count; i++) - { - mve_pred16_t p = vctp8q((uint32_t)length); - length -= 16; - const int8x16_t src = vldrbq_z_s8(source, p); - const int8x16_t predicated_min = vdupq_m_n_s8(vuninitializedq_s8(), (int8_t)act_min, p); - const int8x16_t predicated_max = vdupq_m_n_s8(vuninitializedq_s8(), (int8_t)act_max, p); - int8x16_t res = vmaxq_m_s8(vuninitializedq_s8(), src, predicated_min, p); - res = vminq_m_s8(vuninitializedq_s8(), res, predicated_max, p); - vstrbq_p_s8(source, res, p); - source += 16; - } -#else - union arm_nnword in; - int32_t cnt = length >> 2; - - while (cnt > 0l) - { - in.word = arm_nn_read_q7x4(source); - - in.bytes[0] = MAX(in.bytes[0], act_min); - in.bytes[0] = MIN(in.bytes[0], act_max); - in.bytes[1] = MAX(in.bytes[1], act_min); - in.bytes[1] = MIN(in.bytes[1], act_max); - in.bytes[2] = MAX(in.bytes[2], act_min); - in.bytes[2] = MIN(in.bytes[2], act_max); - in.bytes[3] = MAX(in.bytes[3], act_min); - in.bytes[3] = MIN(in.bytes[3], act_max); - - arm_nn_write_q7x4_ia(&source, in.word); - cnt--; - } - - cnt = length & 0x3; - while (cnt > 0l) - { - int32_t comp = *source; - comp = MAX(comp, act_min); - comp = MIN(comp, act_max); - *source++ = (int8_t)comp; - cnt--; - } -#endif -} - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Pooling - * @{ - */ - -/* - * Optimized s8 max pooling function - * - * Refer to header file for details. - * - */ - -arm_status arm_max_pool_s8(const cmsis_nn_context *ctx, - const cmsis_nn_pool_params *pool_params, - const cmsis_nn_dims *input_dims, - const q7_t *src, - const cmsis_nn_dims *filter_dims, - const cmsis_nn_dims *output_dims, - q7_t *dst) -{ - const int32_t input_y = input_dims->h; - const int32_t input_x = input_dims->w; - const int32_t output_y = output_dims->h; - const int32_t output_x = output_dims->w; - const int32_t stride_y = pool_params->stride.h; - const int32_t stride_x = pool_params->stride.w; - const int32_t kernel_y = filter_dims->h; - const int32_t kernel_x = filter_dims->w; - const int32_t pad_y = pool_params->padding.h; - const int32_t pad_x = pool_params->padding.w; - const int32_t act_min = pool_params->activation.min; - const int32_t act_max = pool_params->activation.max; - const int32_t channel_in = input_dims->c; - (void)ctx; - q7_t *dst_base = dst; - - for (int i_y = 0, base_idx_y = -pad_y; i_y < output_y; base_idx_y += stride_y, i_y++) - { - for (int i_x = 0, base_idx_x = -pad_x; i_x < output_x; base_idx_x += stride_x, i_x++) - { - /* Condition for kernel start dimension: (base_idx_ + kernel__start) >= 0 */ - const int32_t ker_y_start = MAX(0, -base_idx_y); - const int32_t ker_x_start = MAX(0, -base_idx_x); - - /* Condition for kernel end dimension: (base_idx_ + kernel__end) < dim_src_ */ - const int32_t kernel_y_end = MIN(kernel_y, input_y - base_idx_y); - const int32_t kernel_x_end = MIN(kernel_x, input_x - base_idx_x); - - int count = 0; - - for (int k_y = ker_y_start; k_y < kernel_y_end; k_y++) - { - for (int k_x = ker_x_start; k_x < kernel_x_end; k_x++) - { - const q7_t *start = src + channel_in * (k_x + base_idx_x + (k_y + base_idx_y) * input_x); - - if (count == 0) - { - arm_memcpy_q7(dst, start, channel_in); - count++; - } - else - { - compare_and_replace_if_larger_q7(dst, start, channel_in); - } - } - } - /* 'count' is expected to be non-zero here. */ - dst += channel_in; - } - } - - clamp_output(dst_base, output_x * output_y * channel_in, act_min, act_max); - - return ARM_MATH_SUCCESS; -} - -/** - * @} end of Pooling group - */ diff --git a/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c b/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c deleted file mode 100644 index 42c7baa..0000000 --- a/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c +++ /dev/null @@ -1,464 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_pool_q7_HWC.c - * Description: Pooling function implementations - * - * $Date: 20. July 2021 - * $Revision: V.1.1.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - -/** - * @brief A few utility functions used by pooling functions - * - * - */ - -static void buffer_scale_back_q15_to_q7(q15_t *buffer, q7_t *target, uint16_t length, uint16_t scale) -{ - int i; - - for (i = 0; i < length; i++) - { - target[i] = (q7_t)(buffer[i] / scale); - } -} - -static void compare_and_replace_if_larger_q7(q7_t *base, // base data - const q7_t *target, // compare target - const uint16_t length // data length -) -{ - q7_t *pIn = base; - const q7_t *pCom = target; - union arm_nnword in; - union arm_nnword com; - uint16_t cnt = length >> 2; - - while (cnt > 0u) - { - in.word = arm_nn_read_q7x4((const q7_t *)pIn); - com.word = arm_nn_read_q7x4_ia((const q7_t **)&pCom); - - // if version - if (com.bytes[0] > in.bytes[0]) - in.bytes[0] = com.bytes[0]; - if (com.bytes[1] > in.bytes[1]) - in.bytes[1] = com.bytes[1]; - if (com.bytes[2] > in.bytes[2]) - in.bytes[2] = com.bytes[2]; - if (com.bytes[3] > in.bytes[3]) - in.bytes[3] = com.bytes[3]; - - arm_nn_write_q7x4_ia(&pIn, in.word); - - cnt--; - } - - cnt = length & 0x3; - while (cnt > 0u) - { - if (*pCom > *pIn) - { - *pIn = *pCom; - } - pIn++; - pCom++; - cnt--; - } -} - -static void accumulate_q7_to_q15(q15_t *base, q7_t *target, const uint16_t length) -{ - q15_t *pCnt = base; - q7_t *pV = target; - q31_t v1, v2, vo1, vo2; - uint16_t cnt = length >> 2; - q31_t in; - - while (cnt > 0u) - { - q31_t value = arm_nn_read_q7x4_ia((const q7_t **)&pV); - v1 = __SXTB16(__ROR(value, 8)); - v2 = __SXTB16(value); -#ifndef ARM_MATH_BIG_ENDIAN - - vo2 = __PKHTB(v1, v2, 16); - vo1 = __PKHBT(v2, v1, 16); - -#else - - vo1 = __PKHTB(v1, v2, 16); - vo2 = __PKHBT(v2, v1, 16); - -#endif - - in = arm_nn_read_q15x2(pCnt); - arm_nn_write_q15x2_ia(&pCnt, __QADD16(vo1, in)); - - in = arm_nn_read_q15x2(pCnt); - arm_nn_write_q15x2_ia(&pCnt, __QADD16(vo2, in)); - - cnt--; - } - cnt = length & 0x3; - while (cnt > 0u) - { - *pCnt++ += *pV++; - cnt--; - } -} - -#endif // ARM_MATH_DSP - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Pooling - * @{ - */ - -/** - * @brief Q7 max pooling function - * @param[in, out] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimention - * @param[in] ch_im_in number of input tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA Not used - * @param[in,out] Im_out pointer to output tensor - * - * @details - * - * The pooling function is implemented as split x-pooling then - * y-pooling. - * - * This pooling function is input-destructive. Input data is undefined - * after calling this function. - * - */ - -void arm_maxpool_q7_HWC(q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const uint16_t dim_im_out, - q7_t *bufferA, - q7_t *Im_out) -{ - (void)bufferA; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - int16_t i_x, i_y; - - /* first does the pooling along x axis */ - for (i_y = 0; i_y < dim_im_in; i_y++) - { - - for (i_x = 0; i_x < dim_im_out; i_x++) - { - /* for each output pixel */ - q7_t *target = Im_in + (i_y * dim_im_in + i_x) * ch_im_in; - q7_t *win_start; - q7_t *win_stop; - if (i_x * stride - padding < 0) - { - win_start = target; - } - else - { - win_start = Im_in + (i_y * dim_im_in + i_x * stride - padding) * ch_im_in; - } - - if (i_x * stride - padding + dim_kernel >= dim_im_in) - { - win_stop = Im_in + (i_y * dim_im_in + dim_im_in) * ch_im_in; - } - else - { - win_stop = Im_in + (i_y * dim_im_in + i_x * stride - padding + dim_kernel) * ch_im_in; - } - - /* first step is to copy over initial data */ - /* arm_copy_q7(win_start, target, ch_im_in); */ - memmove(target, win_start, ch_im_in); - - /* start the max operation from the second part */ - win_start += ch_im_in; - for (; win_start < win_stop; win_start += ch_im_in) - { - compare_and_replace_if_larger_q7(target, win_start, ch_im_in); - } - } - } - - /* then does the pooling along y axis */ - for (i_y = 0; i_y < dim_im_out; i_y++) - { - - /* for each output row */ - q7_t *target = Im_out + i_y * dim_im_out * ch_im_in; - q7_t *row_start; - q7_t *row_end; - /* setting the starting row */ - if (i_y * stride - padding < 0) - { - row_start = Im_in; - } - else - { - row_start = Im_in + (i_y * stride - padding) * dim_im_in * ch_im_in; - } - /* setting the stopping row */ - if (i_y * stride - padding + dim_kernel >= dim_im_in) - { - row_end = Im_in + dim_im_in * dim_im_in * ch_im_in; - } - else - { - row_end = Im_in + (i_y * stride - padding + dim_kernel) * dim_im_in * ch_im_in; - } - - /* copy over the first row */ - /* arm_copy_q7(row_start, target, dim_im_out * ch_im_in); */ - memmove(target, row_start, dim_im_out * ch_im_in); - - /* move over to next row */ - row_start += ch_im_in * dim_im_in; - - for (; row_start < row_end; row_start += dim_im_in * ch_im_in) - { - compare_and_replace_if_larger_q7(target, row_start, dim_im_out * ch_im_in); - } - } - -#else - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - int16_t i_ch_in, i_x, i_y; - int16_t k_x, k_y; - - for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++) - { - for (i_y = 0; i_y < dim_im_out; i_y++) - { - for (i_x = 0; i_x < dim_im_out; i_x++) - { - int max = -129; - for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++) - { - for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++) - { - if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in) - { - if (Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)] > max) - { - max = Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)]; - } - } - } - } - Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = max; - } - } - } - -#endif /* ARM_MATH_DSP */ -} - -/** - * @brief Q7 average pooling function - * @param[in,out] Im_in pointer to input tensor - * @param[in] dim_im_in input tensor dimention - * @param[in] ch_im_in number of input tensor channels - * @param[in] dim_kernel filter kernel size - * @param[in] padding padding sizes - * @param[in] stride convolution stride - * @param[in] dim_im_out output tensor dimension - * @param[in,out] bufferA pointer to buffer space for input - * @param[in,out] Im_out pointer to output tensor - * - * @details - * - * Buffer size: - * - * bufferA size: 2*dim_im_out*ch_im_in - * - * The pooling function is implemented as split x-pooling then - * y-pooling. - * - * This pooling function is input-destructive. Input data is undefined - * after calling this function. - * - */ - -void arm_avepool_q7_HWC(q7_t *Im_in, - const uint16_t dim_im_in, - const uint16_t ch_im_in, - const uint16_t dim_kernel, - const uint16_t padding, - const uint16_t stride, - const uint16_t dim_im_out, - q7_t *bufferA, - q7_t *Im_out) -{ - -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - /* Run the following code for Cortex-M4 and Cortex-M7 */ - - q15_t *buffer = (q15_t *)bufferA; - int16_t i_x, i_y; - int16_t count = 0; - - /* first does the pooling along x axis */ - for (i_y = 0; i_y < dim_im_in; i_y++) - { - - for (i_x = 0; i_x < dim_im_out; i_x++) - { - /* for each output pixel */ - q7_t *target = Im_in + (i_y * dim_im_in + i_x) * ch_im_in; - q7_t *win_start; - q7_t *win_stop; - if (i_x * stride - padding < 0) - { - win_start = target; - } - else - { - win_start = Im_in + (i_y * dim_im_in + i_x * stride - padding) * ch_im_in; - } - - if (i_x * stride - padding + dim_kernel >= dim_im_in) - { - win_stop = Im_in + (i_y * dim_im_in + dim_im_in) * ch_im_in; - } - else - { - win_stop = Im_in + (i_y * dim_im_in + i_x * stride - padding + dim_kernel) * ch_im_in; - } - - /* first step is to copy over initial data */ - arm_q7_to_q15_no_shift(win_start, buffer, ch_im_in); - count = 1; - - /* start the max operation from the second part */ - win_start += ch_im_in; - for (; win_start < win_stop; win_start += ch_im_in) - { - accumulate_q7_to_q15(buffer, win_start, ch_im_in); - count++; - } - buffer_scale_back_q15_to_q7(buffer, target, ch_im_in, count); - } - } - - /* then does the pooling along y axis */ - for (i_y = 0; i_y < dim_im_out; i_y++) - { - /* for each output row */ - q7_t *target = Im_out + i_y * dim_im_out * ch_im_in; - q7_t *row_start; - q7_t *row_end; - /* setting the starting row */ - if (i_y * stride - padding < 0) - { - row_start = Im_in; - } - else - { - row_start = Im_in + (i_y * stride - padding) * dim_im_in * ch_im_in; - } - /* setting the stopping row */ - if (i_y * stride - padding + dim_kernel >= dim_im_in) - { - row_end = Im_in + dim_im_in * dim_im_in * ch_im_in; - } - else - { - row_end = Im_in + (i_y * stride - padding + dim_kernel) * dim_im_in * ch_im_in; - } - - /* copy over the first row */ - arm_q7_to_q15_no_shift(row_start, buffer, dim_im_out * ch_im_in); - count = 1; - - /* move over to next row */ - row_start += ch_im_in * dim_im_in; - - for (; row_start < row_end; row_start += dim_im_in * ch_im_in) - { - accumulate_q7_to_q15(buffer, row_start, dim_im_out * ch_im_in); - count++; - } - buffer_scale_back_q15_to_q7(buffer, target, dim_im_out * ch_im_in, count); - } - -#else - /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */ - - (void)bufferA; - int16_t i_ch_in, i_x, i_y; - int16_t k_x, k_y; - - for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++) - { - for (i_y = 0; i_y < dim_im_out; i_y++) - { - for (i_x = 0; i_x < dim_im_out; i_x++) - { - int sum = 0; - int count = 0; - for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++) - { - for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++) - { - if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in) - { - sum += Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)]; - count++; - } - } - } - Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = sum / count; - } - } - } - -#endif /* ARM_MATH_DSP */ -} - -/** - * @} end of Pooling group - */ diff --git a/Drivers/CMSIS/NN/Source/ReshapeFunctions/CMakeLists.txt b/Drivers/CMSIS/NN/Source/ReshapeFunctions/CMakeLists.txt deleted file mode 100644 index 109c731..0000000 --- a/Drivers/CMSIS/NN/Source/ReshapeFunctions/CMakeLists.txt +++ /dev/null @@ -1,29 +0,0 @@ -# -# Copyright (c) 2019-2021 Arm Limited. All rights reserved. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -project(CMSISNNReshape) - -file(GLOB SRC "./*_*.c") - -add_library(CMSISNNReshape STATIC ${SRC}) - -### Includes -target_include_directories(CMSISNNReshape PUBLIC "${NN}/Include") -target_include_directories(CMSISNNReshape PUBLIC "${ROOT}/CMSIS/Core/Include") -target_include_directories(CMSISNNReshape PUBLIC "${ROOT}/CMSIS/DSP/Include") - diff --git a/Drivers/CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c b/Drivers/CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c deleted file mode 100644 index fdd9b37..0000000 --- a/Drivers/CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright (C) 2010-2019 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_reshape_s8.c - * Description: Reshape a s8 vector - * - * $Date: September 2019 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Reshape - * @{ - */ - -/** - * Basic s8 reshape function. - * - * Refer header file for details. - * - */ - -void arm_reshape_s8(const int8_t *input, int8_t *output, const uint32_t total_size) -{ - memcpy(output, input, total_size); -} - -/** - * @} end of Reshape group - */ \ No newline at end of file diff --git a/Drivers/CMSIS/NN/Source/SVDFunctions/CMakeLists.txt b/Drivers/CMSIS/NN/Source/SVDFunctions/CMakeLists.txt deleted file mode 100644 index 0809ce5..0000000 --- a/Drivers/CMSIS/NN/Source/SVDFunctions/CMakeLists.txt +++ /dev/null @@ -1,31 +0,0 @@ -# -# Copyright (c) 2019-2021 Arm Limited. All rights reserved. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -project(CMSISNNSVDF) - -file(GLOB SRC "./*_s8.c") - -add_library(CMSISNNSVDF STATIC ${SRC}) - -### Includes -target_include_directories(CMSISNNSVDF PUBLIC "${NN}/Include") -target_include_directories(CMSISNNSVDF PUBLIC "${ROOT}/CMSIS/Core/Include") -target_include_directories(CMSISNNSVDF PUBLIC "${ROOT}/CMSIS/DSP/Include") - - - diff --git a/Drivers/CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c b/Drivers/CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c deleted file mode 100644 index 65b8ec4..0000000 --- a/Drivers/CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c +++ /dev/null @@ -1,254 +0,0 @@ -/* - * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_svdf_s8.c - * Description: S8 basic SVDF layer function - * - * $Date: 15. April 2021 - * $Revision: V.1.5.0 - * - * Target Processor: Cortex-M processors - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup SVDF - * @{ - */ - -/* - * S8 SVDF layer function for TensorFlow Lite - * - * Refer to header file for details. - * - */ - -arm_status arm_svdf_s8(const cmsis_nn_context *input_ctx, - const cmsis_nn_context *output_ctx, - const cmsis_nn_svdf_params *svdf_params, - const cmsis_nn_per_tensor_quant_params *input_quant_params, - const cmsis_nn_per_tensor_quant_params *output_quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *state_dims, - q15_t *state_data, - const cmsis_nn_dims *weights_feature_dims, - const q7_t *weights_feature_data, - const cmsis_nn_dims *weights_time_dims, - const q15_t *weights_time_data, - const cmsis_nn_dims *bias_dims, - const q31_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data) -{ - (void)bias_dims; - (void)state_dims; - (void)output_dims; - - const q31_t multiplier_in = input_quant_params->multiplier; - const q31_t shift_in = input_quant_params->shift; - const q31_t multiplier_out = output_quant_params->multiplier; - const q31_t shift_2 = output_quant_params->shift; - const int32_t zp_in = svdf_params->input_offset; - const int32_t zp_out = svdf_params->output_offset; - const int32_t in_activation_min = svdf_params->input_activation.min; - const int32_t in_activation_max = svdf_params->input_activation.max; - const int32_t out_activation_min = svdf_params->output_activation.min; - const int32_t out_activation_max = svdf_params->output_activation.max; - const int16_t rank = svdf_params->rank; - - const int32_t input_batches = input_dims->n; - const int32_t input_height = input_dims->h; - const int32_t feature_batches = weights_feature_dims->n; - const int32_t time_batches = weights_time_dims->h; - const int32_t unit_count = feature_batches / rank; - - q31_t *buffer_a = (q31_t *)input_ctx->buf; - q31_t *buffer_b = (q31_t *)output_ctx->buf; - - memmove((q15_t *)state_data, - (q15_t *)state_data + 1, - (size_t)(input_batches * feature_batches * time_batches * (int32_t)sizeof(int16_t))); - - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { - q15_t *res_ptr = state_data + (time_batches * i_batch * feature_batches) + (time_batches - 1); - const q7_t *weight = weights_feature_data; - const q7_t *input = input_data + i_batch * input_height; - - arm_status res = arm_nn_vec_mat_mult_t_svdf_s8(input, - weight, - res_ptr, - -zp_in, - 0, - time_batches, - multiplier_in, - shift_in, - input_height, - feature_batches, - in_activation_min, - in_activation_max); - - if (res != ARM_MATH_SUCCESS) - { - return res; - } - } - - { - q31_t *ptr_a = buffer_a; - const q15_t *v2 = state_data; - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { - const q15_t *v1 = weights_time_data; - - for (int i_feature_batch = 0; i_feature_batch < feature_batches; i_feature_batch++) - { - *ptr_a = 0; - int32_t sum = 0; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - int j = 0; - int32_t block_count = time_batches >> 1; - for (int i = 0; i < block_count; i++) - { - j += 2; - q31_t r1 = arm_nn_read_q15x2_ia(&v1); - q31_t r2 = arm_nn_read_q15x2_ia(&v2); - - sum = __SMLAD(r1, r2, sum); - } - - // Process the remaining data - for (; j < time_batches; j++) - { - sum += *v1 * *v2; - v1++; - v2++; - } -#else - for (int j = 0; j < time_batches; j++) - { - sum += *v1 * *v2; - v1++; - v2++; - } -#endif - - *ptr_a = sum; - ptr_a++; - } - } - } - - if (bias_data) - { - if (unit_count == feature_batches) - { - for (int i = 0; i < input_batches; i++) - { - q31_t *output_temp = buffer_b + i * feature_batches; - const q31_t *ptr_a = buffer_a + i * feature_batches; - - const int32_t *bi = bias_data; - for (int j = 0; j < feature_batches; j++) - { - output_temp[j] = ptr_a[j] + bi[j]; - } - } - } - else - { - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { - q31_t *output_data_temp = buffer_b + i_batch * unit_count; - q31_t *ptr_a = buffer_a + i_batch * feature_batches; - - for (int i = 0; i < unit_count; i++) - { - int32_t sum = bias_data[i]; - for (int j = 0; j < rank; j++) - { - sum += *ptr_a; - ptr_a++; - } - output_data_temp[i] = sum; - } - } - } - } - else - { - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { - q31_t *output_data_temp = buffer_b + i_batch * unit_count; - q31_t *ptr_a = buffer_a + i_batch * feature_batches; - - for (int i = 0; i < unit_count; i++) - { - int32_t sum = 0; - for (int j = 0; j < rank; j++) - { - sum += *ptr_a; - ptr_a++; - } - output_data_temp[i] = sum; - } - } - } - -#if defined(ARM_MATH_MVEI) - int32_t num_elements = input_batches * unit_count; - const int32_t loop_count = (num_elements + 3) / 4; - for (int i_op = 0; i_op < loop_count; i_op++) - { - mve_pred16_t p = vctp32q((uint32_t)num_elements); - int32x4_t op = vldrwq_z_s32(buffer_b, p); - op = arm_requantize_mve(op, multiplier_out, shift_2); - op = vaddq_n_s32(op, zp_out); - const int32x4_t min_vec = vdupq_n_s32((int8_t)out_activation_min); - const int32x4_t max_vec = vdupq_n_s32((int8_t)out_activation_max); - op = vmaxq_s32(op, min_vec); - op = vminq_s32(op, max_vec); - vstrbq_p_s32(output_data, op, p); - output_data += 4; - buffer_b += 4; - num_elements -= 4; - } -#else - for (int i = 0; i < input_batches * unit_count; i++) - { - output_data[i] = (q7_t)CLAMP( - arm_nn_requantize(buffer_b[i], multiplier_out, shift_2) + zp_out, out_activation_max, out_activation_min); - } -#endif - - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of SVDF group - */ diff --git a/Drivers/CMSIS/NN/Source/SVDFunctions/arm_svdf_state_s16_s8.c b/Drivers/CMSIS/NN/Source/SVDFunctions/arm_svdf_state_s16_s8.c deleted file mode 100644 index 495152e..0000000 --- a/Drivers/CMSIS/NN/Source/SVDFunctions/arm_svdf_state_s16_s8.c +++ /dev/null @@ -1,267 +0,0 @@ -/* - * Copyright (C) 2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_svdf_s8.c - * Description: S8 basic SVDF layer function with s16 state tensor - * - * $Date: 28 April 2022 - * $Revision: V.1.0.1 - * - * Target Processor: Cortex-M processors - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup SVDF - * @{ - */ - -/* - * S8 SVDF layer function for TensorFlow Lite with 16 bit state tensor - * - * Refer to header file for details. - * - */ - -arm_status arm_svdf_state_s16_s8(const cmsis_nn_context *input_ctx, - const cmsis_nn_context *output_ctx, - const cmsis_nn_svdf_params *svdf_params, - const cmsis_nn_per_tensor_quant_params *input_quant_params, - const cmsis_nn_per_tensor_quant_params *output_quant_params, - const cmsis_nn_dims *input_dims, - const q7_t *input_data, - const cmsis_nn_dims *state_dims, - q15_t *state_data, - const cmsis_nn_dims *weights_feature_dims, - const q7_t *weights_feature_data, - const cmsis_nn_dims *weights_time_dims, - const q15_t *weights_time_data, - const cmsis_nn_dims *bias_dims, - const q31_t *bias_data, - const cmsis_nn_dims *output_dims, - q7_t *output_data) -{ - (void)bias_dims; - (void)state_dims; - (void)output_dims; - - const q31_t multiplier_in = input_quant_params->multiplier; - const q31_t shift_in = input_quant_params->shift; - const q31_t multiplier_out = output_quant_params->multiplier; - const q31_t shift_2 = output_quant_params->shift; - const int32_t zp_in = svdf_params->input_offset; - const int32_t zp_out = svdf_params->output_offset; - const int32_t in_activation_min = svdf_params->input_activation.min; - const int32_t in_activation_max = svdf_params->input_activation.max; - const int32_t out_activation_min = svdf_params->output_activation.min; - const int32_t out_activation_max = svdf_params->output_activation.max; - const int16_t rank = svdf_params->rank; - - const int32_t input_batches = input_dims->n; - const int32_t input_height = input_dims->h; - const int32_t feature_batches = weights_feature_dims->n; - const int32_t time_batches = weights_time_dims->h; - const int32_t unit_count = feature_batches / rank; - - if (input_ctx->buf == NULL) - { - return ARM_MATH_ARGUMENT_ERROR; - } - q31_t *buffer_a = (q31_t *)input_ctx->buf; - - if (output_ctx->buf == NULL) - { - return ARM_MATH_ARGUMENT_ERROR; - } - q31_t *buffer_b = (q31_t *)output_ctx->buf; - - // Left shift state - memmove((q15_t *)state_data, - (q15_t *)state_data + 1, - (size_t)((input_batches * feature_batches * time_batches - 1) * (int32_t)sizeof(int16_t))); - - // Matrix multiplication input * feature weight - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { - q15_t *res_ptr = state_data + (time_batches * i_batch * feature_batches) + (time_batches - 1); - const q7_t *weight = weights_feature_data; - const q7_t *input = input_data + i_batch * input_height; - - arm_status res = arm_nn_vec_mat_mult_t_svdf_s8(input, - weight, - res_ptr, - -zp_in, - 0, - time_batches, - multiplier_in, - shift_in, - input_height, - feature_batches, - in_activation_min, - in_activation_max); - - if (res != ARM_MATH_SUCCESS) - { - return res; - } - } - - { - // Matrix multiplication time weight * state tensors - q31_t *ptr_a = buffer_a; - const q15_t *v2 = state_data; - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { - const q15_t *v1 = weights_time_data; - - for (int i_feature_batch = 0; i_feature_batch < feature_batches; i_feature_batch++) - { - *ptr_a = 0; - int32_t sum = 0; -#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI) - // Perform matrix multiplication in blocks of two - int j = 0; - int32_t block_count = time_batches >> 1; - for (int i = 0; i < block_count; i++) - { - j += 2; - q31_t r1 = arm_nn_read_q15x2_ia(&v1); - q31_t r2 = arm_nn_read_q15x2_ia(&v2); - - sum = __SMLAD(r1, r2, sum); - } - - // Process the remaining data - for (; j < time_batches; j++) - { - sum += *v1 * *v2; - v1++; - v2++; - } -#else - for (int j = 0; j < time_batches; j++) - { - sum += *v1 * *v2; - v1++; - v2++; - } -#endif - - *ptr_a = sum; - ptr_a++; - } - } - } - - if (bias_data) - { - if (unit_count == feature_batches) - { - for (int i = 0; i < input_batches; i++) - { - q31_t *output_temp = buffer_b + i * feature_batches; - const q31_t *ptr_a = buffer_a + i * feature_batches; - - const int32_t *bi = bias_data; - for (int j = 0; j < feature_batches; j++) - { - output_temp[j] = ptr_a[j] + bi[j]; - } - } - } - else - { - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { - q31_t *output_data_temp = buffer_b + i_batch * unit_count; - q31_t *ptr_a = buffer_a + i_batch * feature_batches; - - for (int i = 0; i < unit_count; i++) - { - int32_t sum = bias_data[i]; - for (int j = 0; j < rank; j++) - { - sum += *ptr_a; - ptr_a++; - } - output_data_temp[i] = sum; - } - } - } - } - else - { - for (int i_batch = 0; i_batch < input_batches; i_batch++) - { - q31_t *output_data_temp = buffer_b + i_batch * unit_count; - q31_t *ptr_a = buffer_a + i_batch * feature_batches; - - for (int i = 0; i < unit_count; i++) - { - int32_t sum = 0; - for (int j = 0; j < rank; j++) - { - sum += *ptr_a; - ptr_a++; - } - output_data_temp[i] = sum; - } - } - } - -#if defined(ARM_MATH_MVEI) - int32_t num_elements = input_batches * unit_count; - const int32_t loop_count = (num_elements + 3) / 4; - for (int i_op = 0; i_op < loop_count; i_op++) - { - mve_pred16_t p = vctp32q((uint32_t)num_elements); - int32x4_t op = vldrwq_z_s32(buffer_b, p); - op = arm_requantize_mve(op, multiplier_out, shift_2); - op = vaddq_n_s32(op, zp_out); - const int32x4_t min_vec = vdupq_n_s32((int8_t)out_activation_min); - const int32x4_t max_vec = vdupq_n_s32((int8_t)out_activation_max); - op = vmaxq_s32(op, min_vec); - op = vminq_s32(op, max_vec); - vstrbq_p_s32(output_data, op, p); - output_data += 4; - buffer_b += 4; - num_elements -= 4; - } -#else - for (int i = 0; i < input_batches * unit_count; i++) - { - output_data[i] = (q7_t)CLAMP( - arm_nn_requantize(buffer_b[i], multiplier_out, shift_2) + zp_out, out_activation_max, out_activation_min); - } -#endif - - return (ARM_MATH_SUCCESS); -} - -/** - * @} end of SVDF group - */ diff --git a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/CMakeLists.txt b/Drivers/CMSIS/NN/Source/SoftmaxFunctions/CMakeLists.txt deleted file mode 100644 index 1218acd..0000000 --- a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/CMakeLists.txt +++ /dev/null @@ -1,30 +0,0 @@ -# -# Copyright (c) 2019-2021 Arm Limited. All rights reserved. -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the License); you may -# not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an AS IS BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -project(CMSISNNSoftmax) - -file(GLOB SRC "./*_s8.c") -add_library(CMSISNNSoftmax STATIC ${SRC}) - -### Includes -target_include_directories(CMSISNNSoftmax PUBLIC "${NN}/Include") -target_include_directories(CMSISNNSoftmax PUBLIC "${ROOT}/CMSIS/Core/Include") -target_include_directories(CMSISNNSoftmax PUBLIC "${ROOT}/CMSIS/DSP/Include") - - - diff --git a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_nn_softmax_common_s8.c b/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_nn_softmax_common_s8.c deleted file mode 100644 index 08a32a6..0000000 --- a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_nn_softmax_common_s8.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Copyright (C) 2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_nn_softmax_common_s8.c - * Description: Softmax with s8 input and output of s8 or s16. - * - * $Date: 17 March 2022 - * $Revision: V.1.0.1 - * - * Target Processor: Cortex-M processors - * -------------------------------------------------------------------- */ - -#include "arm_nnsupportfunctions.h" - -#define ACCUM_BITS 12 - -/** - * @ingroup groupSupport - */ - -/** - * @addtogroup Softmax - * @{ - */ - -/* - * Softmax function with s8 input and output of s8 or s16. - * - * Refer header file for details. - * - */ -void arm_nn_softmax_common_s8(const int8_t *input, - const int32_t num_rows, - const int32_t row_size, - const int32_t mult, - const int32_t shift, - const int32_t diff_min, - const bool int16_output, - void *output) -{ - const int32_t mask = (1 << shift); - - int32_t col = 0; - int32_t row_idx; - - for (row_idx = 0; row_idx < num_rows; ++row_idx) - { - // Find the maximum value in order to ensure numerical stability - int8_t max = *input; - - for (col = 1; col < row_size; ++col) - { - max = MAX(max, input[col]); - } - - int32_t diff = 0; - int32_t sum = 0; - - for (col = 0; col < row_size; ++col) - { - diff = input[col] - max; - if (diff >= diff_min) - { - sum += DIV_POW2(EXP_ON_NEG(MUL_SAT(diff * mask, mult)), ACCUM_BITS); - } - } - - const int32_t headroom = __CLZ(sum); - const int32_t shifted_scale = ONE_OVER1((sum > 0 ? sum << headroom : 0) - (1 << 31)); - int32_t bits_over_unit; - - if (int16_output) - { - int16_t *output_s16 = (int16_t *)output + row_idx * row_size; - - bits_over_unit = ACCUM_BITS - headroom + 15; - - for (col = 0; col < row_size; ++col) - { - diff = input[col] - max; - - if (diff >= diff_min) - { - const int32_t res = - DIV_POW2(MUL_SAT(shifted_scale, EXP_ON_NEG(MUL_SAT(diff * mask, mult))), bits_over_unit) + - NN_Q15_MIN; - output_s16[col] = (int16_t)CLAMP(res, (int32_t)NN_Q15_MAX, (int32_t)NN_Q15_MIN); - } - else - { - output_s16[col] = NN_Q15_MIN; - } - } - } - else - { - int8_t *output_s8 = (int8_t *)output + row_idx * row_size; - - bits_over_unit = ACCUM_BITS - headroom + 23; - - for (col = 0; col < row_size; ++col) - { - diff = input[col] - max; - if (diff >= diff_min) - { - const int32_t res = - DIV_POW2(MUL_SAT(shifted_scale, EXP_ON_NEG(MUL_SAT(diff * mask, mult))), bits_over_unit) + - NN_Q7_MIN; - output_s8[col] = (int8_t)CLAMP(res, (int32_t)NN_Q7_MAX, (int32_t)NN_Q7_MIN); - } - else - { - output_s8[col] = NN_Q7_MIN; - } - } - } - - input += row_size; - } -} - -/** - * @} end of NNBasicMath group - */ diff --git a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c b/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c deleted file mode 100644 index 582e4a6..0000000 --- a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_softmax_q15.c - * Description: Q15 softmax function - * - * $Date: 09. October 2020 - * $Revision: V.1.0.1 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Softmax - * @{ - */ - -/** - * @brief Q15 softmax function - * @param[in] vec_in pointer to input vector - * @param[in] dim_vec input vector dimention - * @param[out] p_out pointer to output vector - * - * @details - * - * Here, instead of typical e based softmax, we use - * 2-based softmax, i.e.,: - * - * y_i = 2^(x_i) / sum(2^x_j) - * - * The relative output will be different here. - * But mathematically, the gradient will be the same - * with a log(2) scaling factor. - * - */ - -void arm_softmax_q15(const q15_t *vec_in, const uint16_t dim_vec, q15_t *p_out) -{ - q31_t sum; - int16_t i; - uint8_t shift; - q31_t base; - base = -1 * 0x100000; - for (i = 0; i < dim_vec; i++) - { - if (vec_in[i] > base) - { - base = vec_in[i]; - } - } - - /* we ignore really small values - * anyway, they will be 0 after shrinking - * to q15_t - */ - base = base - 16; - - sum = 0; - - for (i = 0; i < dim_vec; i++) - { - if (vec_in[i] > base) - { - shift = (uint8_t)__USAT(vec_in[i] - base, 5); - sum += 0x1 << shift; - } - } - - /* This is effectively (0x1 << 32) / sum */ - int64_t div_base = 0x100000000LL; - int output_base = (int32_t)(div_base / sum); - - /* Final confidence will be output_base >> ( 17 - (vec_in[i] - base) ) - * so 32768 (0x1<<15) -> 100% confidence when sum = 0x1 << 16, output_base = 0x1 << 16 - * and vec_in[i]-base = 16 - */ - for (i = 0; i < dim_vec; i++) - { - if (vec_in[i] > base) - { - /* Here minimum value of 17+base-vec[i] will be 1 */ - shift = (uint8_t)__USAT(17 + base - vec_in[i], 5); - p_out[i] = (q15_t)__SSAT((output_base >> shift), 16); - } - else - { - p_out[i] = 0; - } - } -} - -/** - * @} end of Softmax group - */ diff --git a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c b/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c deleted file mode 100644 index 157dbfb..0000000 --- a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_softmax_q7.c - * Description: Q7 softmax function - * - * $Date: 09. October 2020 - * $Revision: V.1.0.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Softmax - * @{ - */ - -/** - * @brief Q7 softmax function - * @param[in] vec_in pointer to input vector - * @param[in] dim_vec input vector dimention - * @param[out] p_out pointer to output vector - * - * @details - * - * Here, instead of typical natural logarithm e based softmax, we use - * 2-based softmax here, i.e.,: - * - * y_i = 2^(x_i) / sum(2^x_j) - * - * The relative output will be different here. - * But mathematically, the gradient will be the same - * with a log(2) scaling factor. - * - */ - -void arm_softmax_q7(const q7_t *vec_in, const uint16_t dim_vec, q7_t *p_out) -{ - q31_t sum; - int16_t i; - uint8_t shift; - q15_t base; - base = -128; - - /* We first search for the maximum */ - for (i = 0; i < dim_vec; i++) - { - if (vec_in[i] > base) - { - base = vec_in[i]; - } - } - - /* - * So the base is set to max-8, meaning - * that we ignore really small values. - * anyway, they will be 0 after shrinking to q7_t. - */ - base = base - (1 << 3); - - sum = 0; - - for (i = 0; i < dim_vec; i++) - { - shift = (uint8_t)__USAT(vec_in[i] - base, 3); - sum += 0x1 << shift; - } - - /* This is effectively (0x1 << 20) / sum */ - int output_base = (1 << 20) / sum; - - for (i = 0; i < dim_vec; i++) - { - - /* Here minimum value of 13+base-vec_in[i] will be 5 */ - shift = (uint8_t)__USAT(13 + base - vec_in[i], 5); - p_out[i] = (q7_t)__SSAT((output_base >> shift), 8); - } -} - -/** - * @} end of Softmax group - */ diff --git a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s16.c b/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s16.c deleted file mode 100644 index f88711d..0000000 --- a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s16.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - * Copyright (C) 2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_softmax_s16.c - * Description: S16 softmax function - * - * $Date: 9 March 2022 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @addtogroup Softmax - * @{ - */ - -arm_status arm_softmax_s16(const int16_t *input, - const int32_t num_rows, - const int32_t row_size, - const int32_t mult, - const int32_t shift, - const cmsis_nn_softmax_lut_s16 *softmax_params, - int16_t *output) -{ - int32_t col = 0; - int32_t row_idx; - - if (softmax_params->exp_lut == NULL || softmax_params->one_by_one_lut == NULL) - { - return ARM_MATH_ARGUMENT_ERROR; - } - - for (row_idx = 0; row_idx < num_rows; ++row_idx) - { - // Find the maximum value in order to ensure numerical stability - int16_t max = *input; - for (col = 1; col < row_size; ++col) - { - max = MAX(max, input[col]); - } - - int32_t diff = 0; - int32_t sum = 0; - int16_t *cached_exp_results = output; - - for (col = 0; col < row_size; ++col) - { - diff = input[col] - max; - const int32_t scaled_diff = arm_nn_requantize(diff, mult, shift); - const int32_t symmetric_scaled_diff = scaled_diff + NN_Q15_MAX; - const int16_t saturated_symmetric_scaled_diff = MIN(MAX(symmetric_scaled_diff, NN_Q15_MIN), NN_Q15_MAX); - - // Lookup from exp table and cache result for next step - const int16_t index = (256 + (saturated_symmetric_scaled_diff >> 7)); - const int16_t offset = saturated_symmetric_scaled_diff & 0x7f; - const int16_t base = softmax_params->exp_lut[index]; - const int16_t slope = softmax_params->exp_lut[index + 1] - softmax_params->exp_lut[index]; - const int16_t delta = (slope * offset + 64) >> 7; - const int16_t result = (base + delta); - cached_exp_results[col] = result; - - sum += cached_exp_results[col]; - } - - const int32_t headroom = __CLZ(sum); - - // Compute the reciprocal 1/sum - const int32_t shifted_sum = (((sum) << (headroom - 1)) + (1 << 13)) >> 14; - - // Since LUT computes 1/(1 + x), compute x = (sum - 1) => -65536 - // Since LUT expects a symmetrical input, recenter from [UINT16_MIN, UINT16_MAX] to [INT16_MIN, INT16_MAX] => - // -32768 ==> So in total -65536 -32768 => -98304 - const int16_t symmetric_shifted_sum = shifted_sum - 98304; - - // Lookup from one by one table - const int16_t index = (256 + (symmetric_shifted_sum >> 7)); - const int16_t offset = symmetric_shifted_sum & 0x7f; - const int16_t base = softmax_params->one_by_one_lut[index]; - const int16_t slope = softmax_params->one_by_one_lut[index + 1] - softmax_params->one_by_one_lut[index]; - const int16_t delta = (slope * offset + 64) >> 7; - const int16_t one_by_one_result = (base + delta); - - for (col = 0; col < row_size; ++col) - { - const int16_t right_shift = 30 - headroom; - int32_t result = (cached_exp_results[col] * one_by_one_result) >> right_shift; - result = (result + 1) >> 1; // Last shift position and insert round - output[col] = (int16_t)result; - } - - output += row_size; - input += row_size; - } - - return ARM_MATH_SUCCESS; -} - -/** - * @} end of Softmax group - */ diff --git a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c b/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c deleted file mode 100644 index 6da5e63..0000000 --- a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c +++ /dev/null @@ -1,261 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_softmax_s8.c - * Description: S8 softmax function - * - * $Date: 01. March 2021 - * $Revision: V.2.0.2 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -#define ACCUM_BITS 12 - -#ifdef ARM_MATH_MVEI -static int32x4_t arm_exp_on_negative_values_mve_32x4(int32x4_t val) -{ -#define SHIFT_START (24) - int32_t shift = SHIFT_START; - int32x4_t mask; - - const int32x4_t val_mod_minus_quarter = - vandq_s32(val, vdupq_n_s32((1 << SHIFT_START) - 1)) - vdupq_n_s32(1 << SHIFT_START); - const int32x4_t remainder = vsubq_s32(val_mod_minus_quarter, val); - const int32x4_t x = vaddq_n_s32(val_mod_minus_quarter << 5, 1 << 28); - const int32x4_t x2 = MUL_SAT_MVE(x, x); - const int32x4_t op_1 = DIV_POW2_MVE(MUL_SAT_MVE(x2, x2), 2) + MUL_SAT_MVE(x2, x); - const int32x4_t op_2 = x + DIV_POW2_MVE(MUL_SAT_MVE(op_1, vdupq_n_s32(715827883)) + x2, 1); - int32x4_t result = vdupq_n_s32(1895147668) + MUL_SAT_MVE(vdupq_n_s32(1895147668), op_2); - -#define SELECT_IF_NON_ZERO(x) \ - { \ - mve_pred16_t p = vcmpneq_n_s32(remainder & vdupq_n_s32(1 << shift++), 0); \ - mask = vmvnq_m_s32(vdupq_n_s32(0), vdupq_n_s32(0), p); \ - result = SELECT_USING_MASK(mask, MUL_SAT_MVE(result, vdupq_n_s32(x)), result); \ - } - - SELECT_IF_NON_ZERO(1672461947) - SELECT_IF_NON_ZERO(1302514674) - SELECT_IF_NON_ZERO(790015084) - SELECT_IF_NON_ZERO(290630308) - SELECT_IF_NON_ZERO(39332535) - SELECT_IF_NON_ZERO(720401) - SELECT_IF_NON_ZERO(242) - -#undef SELECT_IF_NON_ZERO - - mve_pred16_t p = vcmpeqq_n_s32(val, 0); - mask = vmvnq_m_s32(vdupq_n_s32(0), vdupq_n_s32(0), p); - - result = SELECT_USING_MASK(mask, vdupq_n_s32(Q31_MAX), result); - return result; -} -#endif - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Softmax - * @{ - */ - -void arm_softmax_s8(const int8_t *input, - const int32_t num_rows, - const int32_t row_size, - const int32_t mult, - const int32_t shift, - const int32_t diff_min, - int8_t *output) -{ -#ifdef ARM_MATH_MVEI - -#define ACT_MIN ((int8_t)Q7_MIN) -#define ACT_MAX ((int8_t)Q7_MAX) - - const int32_t mask = (1 << shift); - - for (int i_num_rows = 0; i_num_rows < num_rows; ++i_num_rows) - { - int8_t max = ACT_MIN; - - int32_t vec_count = (row_size + 15) / 16; - uint32_t r_count = (uint32_t)row_size; - for (int i = 0; i < vec_count; i++) - { - mve_pred16_t p = vctp8q(r_count); - const int8x16_t ip = vldrbq_z_s8(&input[i * 16], p); - max = vmaxvq_p_s8(max, ip, p); - r_count -= 16; - } - - vec_count = row_size / 4; - int32_t idx = 0; - int32_t sum = 0; - - while (vec_count) - { - int32x4_t ip = vldrbq_s32(&input[idx * 4]); - ip = vsubq_n_s32(ip, max); - mve_pred16_t p = vcmpgeq_n_s32(ip, diff_min); - if (p != 0) - { - ip = vmulq_n_s32(ip, mask); - - int32x4_t res = MUL_SAT_MVE(ip, vdupq_n_s32(mult)); - - res = arm_exp_on_negative_values_mve_32x4(res); - res = DIV_POW2_MVE(res, ACCUM_BITS); - res = vpselq_s32(res, vdupq_n_s32(0), p); - sum += vaddvq_s32(res); - } - - vec_count--; - idx++; - } - - const int32_t tail_idx = row_size & ~3; - for (int i = 0; i < (row_size & 3); i++) - { - const int32_t diff = input[tail_idx + i] - max; - if (diff >= diff_min) - { - sum += DIV_POW2(EXP_ON_NEG(MUL_SAT(diff * mask, mult)), ACCUM_BITS); - } - } - - const int32_t headroom = __CLZ((uint32_t)sum); - const int32_t bits_over_unit = ACCUM_BITS - headroom + 23; - const int32_t shifted_scale = ONE_OVER1((sum > 0 ? sum << headroom : 0) - (1 << 31)); - - vec_count = row_size / 4; - idx = 0; - - while (vec_count) - { - int32x4_t ip = vldrbq_s32(&input[idx]); - ip = vsubq_n_s32(ip, max); - - mve_pred16_t p = vcmpgeq_n_s32(ip, diff_min); - - int32x4_t tmp_res; - - if (p != 0) - { - ip = vmulq_n_s32(ip, mask); - - tmp_res = MUL_SAT_MVE(ip, vdupq_n_s32(mult)); - tmp_res = arm_exp_on_negative_values_mve_32x4(tmp_res); - tmp_res = MUL_SAT_MVE(vdupq_n_s32(shifted_scale), tmp_res); - tmp_res = DIV_POW2_MVE(tmp_res, bits_over_unit); - tmp_res += vdupq_n_s32(ACT_MIN); - - tmp_res = vmaxq_s32(tmp_res, vdupq_n_s32(ACT_MIN)); - tmp_res = vminq_s32(tmp_res, vdupq_n_s32(ACT_MAX)); - tmp_res = vpselq_s32(tmp_res, vdupq_n_s32(ACT_MIN), p); - } - else - { - tmp_res = vdupq_n_s32(ACT_MIN); - } - vstrbq_s32(&output[idx], tmp_res); - vec_count--; - idx += 4; - } - - for (int i = 0; i < (row_size & 3); i++) - { - int32_t diff = input[tail_idx + i] - max; - if (diff >= diff_min) - { - const int32_t res = - DIV_POW2(MUL_SAT(shifted_scale, EXP_ON_NEG(MUL_SAT(diff * mask, mult))), bits_over_unit) - 128; - output[tail_idx + i] = (int8_t)CLAMP(res, (int32_t)ACT_MAX, (int32_t)ACT_MIN); - } - else - { - output[tail_idx + i] = ACT_MIN; - } - } - - input += row_size; - output += row_size; - } -#else - const int32_t mask = (1 << shift); - - int32_t col = 0; - int32_t row_idx; - - for (row_idx = 0; row_idx < num_rows; ++row_idx) - { - // Find the maximum value in order to ensure numerical stability - int8_t max = *input; - - for (col = 1; col < row_size; ++col) - { - max = MAX(max, input[col]); - } - - int32_t diff = 0; - int32_t sum = 0; - - for (col = 0; col < row_size; ++col) - { - diff = input[col] - max; - if (diff >= diff_min) - { - sum += DIV_POW2(EXP_ON_NEG(MUL_SAT(diff * mask, mult)), ACCUM_BITS); - } - } - - const int32_t headroom = __CLZ(sum); - const int32_t bits_over_unit = ACCUM_BITS - headroom + 23; - const int32_t shifted_scale = ONE_OVER1((sum > 0 ? sum << headroom : 0) - (1 << 31)); - - for (col = 0; col < row_size; ++col) - { - diff = input[col] - max; - if (diff >= diff_min) - { - const int32_t res = - DIV_POW2(MUL_SAT(shifted_scale, EXP_ON_NEG(MUL_SAT(diff * mask, mult))), bits_over_unit) - 128; - output[col] = (int8_t)CLAMP(res, (int32_t)127, (int32_t)-128); - } - else - { - output[col] = -128; - } - } - input += row_size; - output += row_size; - } - -#endif -} -/** - * @} end of Softmax group - */ diff --git a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8_s16.c b/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8_s16.c deleted file mode 100644 index 56cfd04..0000000 --- a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8_s16.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (C) 2022 Arm Limited or its affiliates. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_softmax_s8_s16.c - * Description: S8 to s16 softmax function - * - * $Date: 7 January 2022 - * $Revision: V.1.0.0 - * - * Target Processor: Cortex-M cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Softmax - * @{ - */ - -void arm_softmax_s8_s16(const int8_t *input, - const int32_t num_rows, - const int32_t row_size, - const int32_t mult, - const int32_t shift, - const int32_t diff_min, - int16_t *output) -{ - arm_nn_softmax_common_s8(input, num_rows, row_size, mult, shift, diff_min, true, (void *)output); -} -/** - * @} end of Softmax group - */ diff --git a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c b/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c deleted file mode 100644 index 79cf0a4..0000000 --- a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_softmax_u8.c - * Description: U8 softmax function - * - * $Date: 09. October 2020 - * $Revision: V.1.0.2 - * - * Target Processor: Cortex-M CPUs - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" -#include "arm_nnsupportfunctions.h" - -#define ACCUM_BITS 12 - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Softmax - * @{ - */ -void arm_softmax_u8(const uint8_t *input, - const int32_t num_rows, - const int32_t row_size, - const int32_t mult, - const int32_t shift, - const int32_t diff_min, - uint8_t *output) -{ - const int32_t mask = (1 << shift); - - int32_t col = 0; - int32_t row_idx; - - for (row_idx = 0; row_idx < num_rows; ++row_idx) - { - // Find the maximum value in order to ensure numerical stability - uint8_t max = *input; - - for (col = 1; col < row_size; ++col) - { - max = MAX(max, input[col]); - } - - int32_t diff = 0; - int32_t sum = 0; - - for (col = 0; col < row_size; ++col) - { - diff = input[col] - max; - if (diff >= diff_min) - { - sum += DIV_POW2(EXP_ON_NEG(MUL_SAT(diff * mask, mult)), ACCUM_BITS); - } - } - - const int32_t headroom = __CLZ((uint32_t)sum); - const int32_t bits_over_unit = ACCUM_BITS - headroom + 23; - const int32_t shifted_scale = ONE_OVER1((sum << headroom) - (1 << 31)); - - for (col = 0; col < row_size; ++col) - { - diff = input[col] - max; - if (diff >= diff_min) - { - const int32_t res = - DIV_POW2(MUL_SAT(shifted_scale, EXP_ON_NEG(MUL_SAT(diff * mask, mult))), bits_over_unit); - output[col] = (uint8_t)CLAMP(res, (int32_t)255, (int32_t)0); - } - else - { - output[col] = 0; - } - } - input += row_size; - output += row_size; - } -} -/** - * @} end of Softmax group - */ \ No newline at end of file diff --git a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c b/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c deleted file mode 100644 index a29dd7f..0000000 --- a/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright (C) 2010-2019 Arm Limited or its affiliates. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* ---------------------------------------------------------------------- - * Project: CMSIS NN Library - * Title: arm_softmax_with_batch_q7.c - * Description: Q7 softmax function - * - * $Date: 09. October 2020 - * $Revision: V.1.0.1 - * - * Target Processor: Cortex-M and Cortex-A cores - * - * -------------------------------------------------------------------- */ - -#include "arm_nnfunctions.h" - -/** - * @ingroup groupNN - */ - -/** - * @addtogroup Softmax - * @{ - */ - -/** - * @brief Q7 softmax function with batch parameter - * @param[in] vec_in pointer to input vector - * @param[in] nb_batches number of batches - * @param[in] dim_vec input vector dimention - * @param[out] p_out pointer to output vector - * - * @details - * - * Here, instead of typical natural logarithm e based softmax, we use - * 2-based softmax here, i.e.,: - * - * y_i = 2^(x_i) / sum(2^x_j) - * - * The relative output will be different here. - * But mathematically, the gradient will be the same - * with a log(2) scaling factor. - * - */ - -void arm_softmax_with_batch_q7(const q7_t *vec_in, const uint16_t nb_batches, const uint16_t dim_vec, q7_t *p_out) -{ - for (int i = 0; i < nb_batches; i++) - { - arm_softmax_q7(vec_in, dim_vec, p_out); - vec_in += dim_vec; - p_out += dim_vec; - } -} - -/** - * @} end of Softmax group - */ diff --git a/Drivers/CMSIS/RTOS/Template/cmsis_os.h b/Drivers/CMSIS/RTOS/Template/cmsis_os.h deleted file mode 100644 index 85e24a4..0000000 --- a/Drivers/CMSIS/RTOS/Template/cmsis_os.h +++ /dev/null @@ -1,698 +0,0 @@ -/* ---------------------------------------------------------------------- - * $Date: 5. February 2013 - * $Revision: V1.02 - * - * Project: CMSIS-RTOS API - * Title: cmsis_os.h template header file - * - * Version 0.02 - * Initial Proposal Phase - * Version 0.03 - * osKernelStart added, optional feature: main started as thread - * osSemaphores have standard behavior - * osTimerCreate does not start the timer, added osTimerStart - * osThreadPass is renamed to osThreadYield - * Version 1.01 - * Support for C++ interface - * - const attribute removed from the osXxxxDef_t typedef's - * - const attribute added to the osXxxxDef macros - * Added: osTimerDelete, osMutexDelete, osSemaphoreDelete - * Added: osKernelInitialize - * Version 1.02 - * Control functions for short timeouts in microsecond resolution: - * Added: osKernelSysTick, osKernelSysTickFrequency, osKernelSysTickMicroSec - * Removed: osSignalGet - *---------------------------------------------------------------------------- - * - * Copyright (c) 2013-2017 ARM LIMITED - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - *---------------------------------------------------------------------------*/ - - -#ifndef _CMSIS_OS_H -#define _CMSIS_OS_H - -/// \note MUST REMAIN UNCHANGED: \b osCMSIS identifies the CMSIS-RTOS API version. -#define osCMSIS 0x10002 ///< API version (main [31:16] .sub [15:0]) - -/// \note CAN BE CHANGED: \b osCMSIS_KERNEL identifies the underlying RTOS kernel and version number. -#define osCMSIS_KERNEL 0x10000 ///< RTOS identification and version (main [31:16] .sub [15:0]) - -/// \note MUST REMAIN UNCHANGED: \b osKernelSystemId shall be consistent in every CMSIS-RTOS. -#define osKernelSystemId "KERNEL V1.00" ///< RTOS identification string - -/// \note MUST REMAIN UNCHANGED: \b osFeature_xxx shall be consistent in every CMSIS-RTOS. -#define osFeature_MainThread 1 ///< main thread 1=main can be thread, 0=not available -#define osFeature_Pool 1 ///< Memory Pools: 1=available, 0=not available -#define osFeature_MailQ 1 ///< Mail Queues: 1=available, 0=not available -#define osFeature_MessageQ 1 ///< Message Queues: 1=available, 0=not available -#define osFeature_Signals 8 ///< maximum number of Signal Flags available per thread -#define osFeature_Semaphore 30 ///< maximum count for \ref osSemaphoreCreate function -#define osFeature_Wait 1 ///< osWait function: 1=available, 0=not available -#define osFeature_SysTick 1 ///< osKernelSysTick functions: 1=available, 0=not available - -#include -#include - -#ifdef __cplusplus -extern "C" -{ -#endif - - -// ==== Enumeration, structures, defines ==== - -/// Priority used for thread control. -/// \note MUST REMAIN UNCHANGED: \b osPriority shall be consistent in every CMSIS-RTOS. -typedef enum { - osPriorityIdle = -3, ///< priority: idle (lowest) - osPriorityLow = -2, ///< priority: low - osPriorityBelowNormal = -1, ///< priority: below normal - osPriorityNormal = 0, ///< priority: normal (default) - osPriorityAboveNormal = +1, ///< priority: above normal - osPriorityHigh = +2, ///< priority: high - osPriorityRealtime = +3, ///< priority: realtime (highest) - osPriorityError = 0x84 ///< system cannot determine priority or thread has illegal priority -} osPriority; - -/// Timeout value. -/// \note MUST REMAIN UNCHANGED: \b osWaitForever shall be consistent in every CMSIS-RTOS. -#define osWaitForever 0xFFFFFFFF ///< wait forever timeout value - -/// Status code values returned by CMSIS-RTOS functions. -/// \note MUST REMAIN UNCHANGED: \b osStatus shall be consistent in every CMSIS-RTOS. -typedef enum { - osOK = 0, ///< function completed; no error or event occurred. - osEventSignal = 0x08, ///< function completed; signal event occurred. - osEventMessage = 0x10, ///< function completed; message event occurred. - osEventMail = 0x20, ///< function completed; mail event occurred. - osEventTimeout = 0x40, ///< function completed; timeout occurred. - osErrorParameter = 0x80, ///< parameter error: a mandatory parameter was missing or specified an incorrect object. - osErrorResource = 0x81, ///< resource not available: a specified resource was not available. - osErrorTimeoutResource = 0xC1, ///< resource not available within given time: a specified resource was not available within the timeout period. - osErrorISR = 0x82, ///< not allowed in ISR context: the function cannot be called from interrupt service routines. - osErrorISRRecursive = 0x83, ///< function called multiple times from ISR with same object. - osErrorPriority = 0x84, ///< system cannot determine priority or thread has illegal priority. - osErrorNoMemory = 0x85, ///< system is out of memory: it was impossible to allocate or reserve memory for the operation. - osErrorValue = 0x86, ///< value of a parameter is out of range. - osErrorOS = 0xFF, ///< unspecified RTOS error: run-time error but no other error message fits. - os_status_reserved = 0x7FFFFFFF ///< prevent from enum down-size compiler optimization. -} osStatus; - - -/// Timer type value for the timer definition. -/// \note MUST REMAIN UNCHANGED: \b os_timer_type shall be consistent in every CMSIS-RTOS. -typedef enum { - osTimerOnce = 0, ///< one-shot timer - osTimerPeriodic = 1 ///< repeating timer -} os_timer_type; - -/// Entry point of a thread. -/// \note MUST REMAIN UNCHANGED: \b os_pthread shall be consistent in every CMSIS-RTOS. -typedef void (*os_pthread) (void const *argument); - -/// Entry point of a timer call back function. -/// \note MUST REMAIN UNCHANGED: \b os_ptimer shall be consistent in every CMSIS-RTOS. -typedef void (*os_ptimer) (void const *argument); - -// >>> the following data type definitions may shall adapted towards a specific RTOS - -/// Thread ID identifies the thread (pointer to a thread control block). -/// \note CAN BE CHANGED: \b os_thread_cb is implementation specific in every CMSIS-RTOS. -typedef struct os_thread_cb *osThreadId; - -/// Timer ID identifies the timer (pointer to a timer control block). -/// \note CAN BE CHANGED: \b os_timer_cb is implementation specific in every CMSIS-RTOS. -typedef struct os_timer_cb *osTimerId; - -/// Mutex ID identifies the mutex (pointer to a mutex control block). -/// \note CAN BE CHANGED: \b os_mutex_cb is implementation specific in every CMSIS-RTOS. -typedef struct os_mutex_cb *osMutexId; - -/// Semaphore ID identifies the semaphore (pointer to a semaphore control block). -/// \note CAN BE CHANGED: \b os_semaphore_cb is implementation specific in every CMSIS-RTOS. -typedef struct os_semaphore_cb *osSemaphoreId; - -/// Pool ID identifies the memory pool (pointer to a memory pool control block). -/// \note CAN BE CHANGED: \b os_pool_cb is implementation specific in every CMSIS-RTOS. -typedef struct os_pool_cb *osPoolId; - -/// Message ID identifies the message queue (pointer to a message queue control block). -/// \note CAN BE CHANGED: \b os_messageQ_cb is implementation specific in every CMSIS-RTOS. -typedef struct os_messageQ_cb *osMessageQId; - -/// Mail ID identifies the mail queue (pointer to a mail queue control block). -/// \note CAN BE CHANGED: \b os_mailQ_cb is implementation specific in every CMSIS-RTOS. -typedef struct os_mailQ_cb *osMailQId; - - -/// Thread Definition structure contains startup information of a thread. -/// \note CAN BE CHANGED: \b os_thread_def is implementation specific in every CMSIS-RTOS. -typedef struct os_thread_def { - os_pthread pthread; ///< start address of thread function - osPriority tpriority; ///< initial thread priority - uint32_t instances; ///< maximum number of instances of that thread function - uint32_t stacksize; ///< stack size requirements in bytes; 0 is default stack size -} osThreadDef_t; - -/// Timer Definition structure contains timer parameters. -/// \note CAN BE CHANGED: \b os_timer_def is implementation specific in every CMSIS-RTOS. -typedef struct os_timer_def { - os_ptimer ptimer; ///< start address of a timer function -} osTimerDef_t; - -/// Mutex Definition structure contains setup information for a mutex. -/// \note CAN BE CHANGED: \b os_mutex_def is implementation specific in every CMSIS-RTOS. -typedef struct os_mutex_def { - uint32_t dummy; ///< dummy value. -} osMutexDef_t; - -/// Semaphore Definition structure contains setup information for a semaphore. -/// \note CAN BE CHANGED: \b os_semaphore_def is implementation specific in every CMSIS-RTOS. -typedef struct os_semaphore_def { - uint32_t dummy; ///< dummy value. -} osSemaphoreDef_t; - -/// Definition structure for memory block allocation. -/// \note CAN BE CHANGED: \b os_pool_def is implementation specific in every CMSIS-RTOS. -typedef struct os_pool_def { - uint32_t pool_sz; ///< number of items (elements) in the pool - uint32_t item_sz; ///< size of an item - void *pool; ///< pointer to memory for pool -} osPoolDef_t; - -/// Definition structure for message queue. -/// \note CAN BE CHANGED: \b os_messageQ_def is implementation specific in every CMSIS-RTOS. -typedef struct os_messageQ_def { - uint32_t queue_sz; ///< number of elements in the queue - uint32_t item_sz; ///< size of an item - void *pool; ///< memory array for messages -} osMessageQDef_t; - -/// Definition structure for mail queue. -/// \note CAN BE CHANGED: \b os_mailQ_def is implementation specific in every CMSIS-RTOS. -typedef struct os_mailQ_def { - uint32_t queue_sz; ///< number of elements in the queue - uint32_t item_sz; ///< size of an item - void *pool; ///< memory array for mail -} osMailQDef_t; - -/// Event structure contains detailed information about an event. -/// \note MUST REMAIN UNCHANGED: \b os_event shall be consistent in every CMSIS-RTOS. -/// However the struct may be extended at the end. -typedef struct { - osStatus status; ///< status code: event or error information - union { - uint32_t v; ///< message as 32-bit value - void *p; ///< message or mail as void pointer - int32_t signals; ///< signal flags - } value; ///< event value - union { - osMailQId mail_id; ///< mail id obtained by \ref osMailCreate - osMessageQId message_id; ///< message id obtained by \ref osMessageCreate - } def; ///< event definition -} osEvent; - - -// ==== Kernel Control Functions ==== - -/// Initialize the RTOS Kernel for creating objects. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osKernelInitialize shall be consistent in every CMSIS-RTOS. -osStatus osKernelInitialize (void); - -/// Start the RTOS Kernel. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS. -osStatus osKernelStart (void); - -/// Check if the RTOS kernel is already started. -/// \note MUST REMAIN UNCHANGED: \b osKernelRunning shall be consistent in every CMSIS-RTOS. -/// \return 0 RTOS is not started, 1 RTOS is started. -int32_t osKernelRunning(void); - -#if (defined (osFeature_SysTick) && (osFeature_SysTick != 0)) // System Timer available - -/// Get the RTOS kernel system timer counter -/// \note MUST REMAIN UNCHANGED: \b osKernelSysTick shall be consistent in every CMSIS-RTOS. -/// \return RTOS kernel system timer as 32-bit value -uint32_t osKernelSysTick (void); - -/// The RTOS kernel system timer frequency in Hz -/// \note Reflects the system timer setting and is typically defined in a configuration file. -#define osKernelSysTickFrequency 100000000 - -/// Convert a microseconds value to a RTOS kernel system timer value. -/// \param microsec time value in microseconds. -/// \return time value normalized to the \ref osKernelSysTickFrequency -#define osKernelSysTickMicroSec(microsec) (((uint64_t)microsec * (osKernelSysTickFrequency)) / 1000000) - -#endif // System Timer available - -// ==== Thread Management ==== - -/// Create a Thread Definition with function, priority, and stack requirements. -/// \param name name of the thread function. -/// \param priority initial priority of the thread function. -/// \param instances number of possible thread instances. -/// \param stacksz stack size (in bytes) requirements for the thread function. -/// \note CAN BE CHANGED: The parameters to \b osThreadDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osThreadDef(name, priority, instances, stacksz) \ -extern const osThreadDef_t os_thread_def_##name -#else // define the object -#define osThreadDef(name, priority, instances, stacksz) \ -const osThreadDef_t os_thread_def_##name = \ -{ (name), (priority), (instances), (stacksz) } -#endif - -/// Access a Thread definition. -/// \param name name of the thread definition object. -/// \note CAN BE CHANGED: The parameter to \b osThread shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osThread(name) \ -&os_thread_def_##name - -/// Create a thread and add it to Active Threads and set it to state READY. -/// \param[in] thread_def thread definition referenced with \ref osThread. -/// \param[in] argument pointer that is passed to the thread function as start argument. -/// \return thread ID for reference by other functions or NULL in case of error. -/// \note MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS. -osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument); - -/// Return the thread ID of the current running thread. -/// \return thread ID for reference by other functions or NULL in case of error. -/// \note MUST REMAIN UNCHANGED: \b osThreadGetId shall be consistent in every CMSIS-RTOS. -osThreadId osThreadGetId (void); - -/// Terminate execution of a thread and remove it from Active Threads. -/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osThreadTerminate shall be consistent in every CMSIS-RTOS. -osStatus osThreadTerminate (osThreadId thread_id); - -/// Pass control to next thread that is in state \b READY. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osThreadYield shall be consistent in every CMSIS-RTOS. -osStatus osThreadYield (void); - -/// Change priority of an active thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId. -/// \param[in] priority new priority value for the thread function. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osThreadSetPriority shall be consistent in every CMSIS-RTOS. -osStatus osThreadSetPriority (osThreadId thread_id, osPriority priority); - -/// Get current priority of an active thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId. -/// \return current priority value of the thread function. -/// \note MUST REMAIN UNCHANGED: \b osThreadGetPriority shall be consistent in every CMSIS-RTOS. -osPriority osThreadGetPriority (osThreadId thread_id); - - -// ==== Generic Wait Functions ==== - -/// Wait for Timeout (Time Delay). -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue "time delay" value -/// \return status code that indicates the execution status of the function. -osStatus osDelay (uint32_t millisec); - -#if (defined (osFeature_Wait) && (osFeature_Wait != 0)) // Generic Wait available - -/// Wait for Signal, Message, Mail, or Timeout. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out -/// \return event that contains signal, message, or mail information or error code. -/// \note MUST REMAIN UNCHANGED: \b osWait shall be consistent in every CMSIS-RTOS. -osEvent osWait (uint32_t millisec); - -#endif // Generic Wait available - - -// ==== Timer Management Functions ==== -/// Define a Timer object. -/// \param name name of the timer object. -/// \param function name of the timer call back function. -/// \note CAN BE CHANGED: The parameter to \b osTimerDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osTimerDef(name, function) \ -extern const osTimerDef_t os_timer_def_##name -#else // define the object -#define osTimerDef(name, function) \ -const osTimerDef_t os_timer_def_##name = \ -{ (function) } -#endif - -/// Access a Timer definition. -/// \param name name of the timer object. -/// \note CAN BE CHANGED: The parameter to \b osTimer shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osTimer(name) \ -&os_timer_def_##name - -/// Create a timer. -/// \param[in] timer_def timer object referenced with \ref osTimer. -/// \param[in] type osTimerOnce for one-shot or osTimerPeriodic for periodic behavior. -/// \param[in] argument argument to the timer call back function. -/// \return timer ID for reference by other functions or NULL in case of error. -/// \note MUST REMAIN UNCHANGED: \b osTimerCreate shall be consistent in every CMSIS-RTOS. -osTimerId osTimerCreate (const osTimerDef_t *timer_def, os_timer_type type, void *argument); - -/// Start or restart a timer. -/// \param[in] timer_id timer ID obtained by \ref osTimerCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue "time delay" value of the timer. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osTimerStart shall be consistent in every CMSIS-RTOS. -osStatus osTimerStart (osTimerId timer_id, uint32_t millisec); - -/// Stop the timer. -/// \param[in] timer_id timer ID obtained by \ref osTimerCreate. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osTimerStop shall be consistent in every CMSIS-RTOS. -osStatus osTimerStop (osTimerId timer_id); - -/// Delete a timer that was created by \ref osTimerCreate. -/// \param[in] timer_id timer ID obtained by \ref osTimerCreate. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osTimerDelete shall be consistent in every CMSIS-RTOS. -osStatus osTimerDelete (osTimerId timer_id); - - -// ==== Signal Management ==== - -/// Set the specified Signal Flags of an active thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId. -/// \param[in] signals specifies the signal flags of the thread that should be set. -/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters. -/// \note MUST REMAIN UNCHANGED: \b osSignalSet shall be consistent in every CMSIS-RTOS. -int32_t osSignalSet (osThreadId thread_id, int32_t signals); - -/// Clear the specified Signal Flags of an active thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId. -/// \param[in] signals specifies the signal flags of the thread that shall be cleared. -/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters or call from ISR. -/// \note MUST REMAIN UNCHANGED: \b osSignalClear shall be consistent in every CMSIS-RTOS. -int32_t osSignalClear (osThreadId thread_id, int32_t signals); - -/// Wait for one or more Signal Flags to become signaled for the current \b RUNNING thread. -/// \param[in] signals wait until all specified signal flags set or 0 for any single signal flag. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return event flag information or error code. -/// \note MUST REMAIN UNCHANGED: \b osSignalWait shall be consistent in every CMSIS-RTOS. -osEvent osSignalWait (int32_t signals, uint32_t millisec); - - -// ==== Mutex Management ==== - -/// Define a Mutex. -/// \param name name of the mutex object. -/// \note CAN BE CHANGED: The parameter to \b osMutexDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osMutexDef(name) \ -extern const osMutexDef_t os_mutex_def_##name -#else // define the object -#define osMutexDef(name) \ -const osMutexDef_t os_mutex_def_##name = { 0 } -#endif - -/// Access a Mutex definition. -/// \param name name of the mutex object. -/// \note CAN BE CHANGED: The parameter to \b osMutex shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osMutex(name) \ -&os_mutex_def_##name - -/// Create and Initialize a Mutex object. -/// \param[in] mutex_def mutex definition referenced with \ref osMutex. -/// \return mutex ID for reference by other functions or NULL in case of error. -/// \note MUST REMAIN UNCHANGED: \b osMutexCreate shall be consistent in every CMSIS-RTOS. -osMutexId osMutexCreate (const osMutexDef_t *mutex_def); - -/// Wait until a Mutex becomes available. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osMutexWait shall be consistent in every CMSIS-RTOS. -osStatus osMutexWait (osMutexId mutex_id, uint32_t millisec); - -/// Release a Mutex that was obtained by \ref osMutexWait. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osMutexRelease shall be consistent in every CMSIS-RTOS. -osStatus osMutexRelease (osMutexId mutex_id); - -/// Delete a Mutex that was created by \ref osMutexCreate. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osMutexDelete shall be consistent in every CMSIS-RTOS. -osStatus osMutexDelete (osMutexId mutex_id); - - -// ==== Semaphore Management Functions ==== - -#if (defined (osFeature_Semaphore) && (osFeature_Semaphore != 0)) // Semaphore available - -/// Define a Semaphore object. -/// \param name name of the semaphore object. -/// \note CAN BE CHANGED: The parameter to \b osSemaphoreDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osSemaphoreDef(name) \ -extern const osSemaphoreDef_t os_semaphore_def_##name -#else // define the object -#define osSemaphoreDef(name) \ -const osSemaphoreDef_t os_semaphore_def_##name = { 0 } -#endif - -/// Access a Semaphore definition. -/// \param name name of the semaphore object. -/// \note CAN BE CHANGED: The parameter to \b osSemaphore shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osSemaphore(name) \ -&os_semaphore_def_##name - -/// Create and Initialize a Semaphore object used for managing resources. -/// \param[in] semaphore_def semaphore definition referenced with \ref osSemaphore. -/// \param[in] count number of available resources. -/// \return semaphore ID for reference by other functions or NULL in case of error. -/// \note MUST REMAIN UNCHANGED: \b osSemaphoreCreate shall be consistent in every CMSIS-RTOS. -osSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count); - -/// Wait until a Semaphore token becomes available. -/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return number of available tokens, or -1 in case of incorrect parameters. -/// \note MUST REMAIN UNCHANGED: \b osSemaphoreWait shall be consistent in every CMSIS-RTOS. -int32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec); - -/// Release a Semaphore token. -/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osSemaphoreRelease shall be consistent in every CMSIS-RTOS. -osStatus osSemaphoreRelease (osSemaphoreId semaphore_id); - -/// Delete a Semaphore that was created by \ref osSemaphoreCreate. -/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osSemaphoreDelete shall be consistent in every CMSIS-RTOS. -osStatus osSemaphoreDelete (osSemaphoreId semaphore_id); - -#endif // Semaphore available - - -// ==== Memory Pool Management Functions ==== - -#if (defined (osFeature_Pool) && (osFeature_Pool != 0)) // Memory Pool Management available - -/// \brief Define a Memory Pool. -/// \param name name of the memory pool. -/// \param no maximum number of blocks (objects) in the memory pool. -/// \param type data type of a single block (object). -/// \note CAN BE CHANGED: The parameter to \b osPoolDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osPoolDef(name, no, type) \ -extern const osPoolDef_t os_pool_def_##name -#else // define the object -#define osPoolDef(name, no, type) \ -const osPoolDef_t os_pool_def_##name = \ -{ (no), sizeof(type), NULL } -#endif - -/// \brief Access a Memory Pool definition. -/// \param name name of the memory pool -/// \note CAN BE CHANGED: The parameter to \b osPool shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osPool(name) \ -&os_pool_def_##name - -/// Create and Initialize a memory pool. -/// \param[in] pool_def memory pool definition referenced with \ref osPool. -/// \return memory pool ID for reference by other functions or NULL in case of error. -/// \note MUST REMAIN UNCHANGED: \b osPoolCreate shall be consistent in every CMSIS-RTOS. -osPoolId osPoolCreate (const osPoolDef_t *pool_def); - -/// Allocate a memory block from a memory pool. -/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate. -/// \return address of the allocated memory block or NULL in case of no memory available. -/// \note MUST REMAIN UNCHANGED: \b osPoolAlloc shall be consistent in every CMSIS-RTOS. -void *osPoolAlloc (osPoolId pool_id); - -/// Allocate a memory block from a memory pool and set memory block to zero. -/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate. -/// \return address of the allocated memory block or NULL in case of no memory available. -/// \note MUST REMAIN UNCHANGED: \b osPoolCAlloc shall be consistent in every CMSIS-RTOS. -void *osPoolCAlloc (osPoolId pool_id); - -/// Return an allocated memory block back to a specific memory pool. -/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate. -/// \param[in] block address of the allocated memory block that is returned to the memory pool. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osPoolFree shall be consistent in every CMSIS-RTOS. -osStatus osPoolFree (osPoolId pool_id, void *block); - -#endif // Memory Pool Management available - - -// ==== Message Queue Management Functions ==== - -#if (defined (osFeature_MessageQ) && (osFeature_MessageQ != 0)) // Message Queues available - -/// \brief Create a Message Queue Definition. -/// \param name name of the queue. -/// \param queue_sz maximum number of messages in the queue. -/// \param type data type of a single message element (for debugger). -/// \note CAN BE CHANGED: The parameter to \b osMessageQDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osMessageQDef(name, queue_sz, type) \ -extern const osMessageQDef_t os_messageQ_def_##name -#else // define the object -#define osMessageQDef(name, queue_sz, type) \ -const osMessageQDef_t os_messageQ_def_##name = \ -{ (queue_sz), sizeof (type) } -#endif - -/// \brief Access a Message Queue Definition. -/// \param name name of the queue -/// \note CAN BE CHANGED: The parameter to \b osMessageQ shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osMessageQ(name) \ -&os_messageQ_def_##name - -/// Create and Initialize a Message Queue. -/// \param[in] queue_def queue definition referenced with \ref osMessageQ. -/// \param[in] thread_id thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL. -/// \return message queue ID for reference by other functions or NULL in case of error. -/// \note MUST REMAIN UNCHANGED: \b osMessageCreate shall be consistent in every CMSIS-RTOS. -osMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id); - -/// Put a Message to a Queue. -/// \param[in] queue_id message queue ID obtained with \ref osMessageCreate. -/// \param[in] info message information. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osMessagePut shall be consistent in every CMSIS-RTOS. -osStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec); - -/// Get a Message or Wait for a Message from a Queue. -/// \param[in] queue_id message queue ID obtained with \ref osMessageCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return event information that includes status code. -/// \note MUST REMAIN UNCHANGED: \b osMessageGet shall be consistent in every CMSIS-RTOS. -osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec); - -#endif // Message Queues available - - -// ==== Mail Queue Management Functions ==== - -#if (defined (osFeature_MailQ) && (osFeature_MailQ != 0)) // Mail Queues available - -/// \brief Create a Mail Queue Definition. -/// \param name name of the queue -/// \param queue_sz maximum number of messages in queue -/// \param type data type of a single message element -/// \note CAN BE CHANGED: The parameter to \b osMailQDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osMailQDef(name, queue_sz, type) \ -extern const osMailQDef_t os_mailQ_def_##name -#else // define the object -#define osMailQDef(name, queue_sz, type) \ -const osMailQDef_t os_mailQ_def_##name = \ -{ (queue_sz), sizeof (type) } -#endif - -/// \brief Access a Mail Queue Definition. -/// \param name name of the queue -/// \note CAN BE CHANGED: The parameter to \b osMailQ shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osMailQ(name) \ -&os_mailQ_def_##name - -/// Create and Initialize mail queue. -/// \param[in] queue_def reference to the mail queue definition obtain with \ref osMailQ -/// \param[in] thread_id thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL. -/// \return mail queue ID for reference by other functions or NULL in case of error. -/// \note MUST REMAIN UNCHANGED: \b osMailCreate shall be consistent in every CMSIS-RTOS. -osMailQId osMailCreate (const osMailQDef_t *queue_def, osThreadId thread_id); - -/// Allocate a memory block from a mail. -/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out -/// \return pointer to memory block that can be filled with mail or NULL in case of error. -/// \note MUST REMAIN UNCHANGED: \b osMailAlloc shall be consistent in every CMSIS-RTOS. -void *osMailAlloc (osMailQId queue_id, uint32_t millisec); - -/// Allocate a memory block from a mail and set memory block to zero. -/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out -/// \return pointer to memory block that can be filled with mail or NULL in case of error. -/// \note MUST REMAIN UNCHANGED: \b osMailCAlloc shall be consistent in every CMSIS-RTOS. -void *osMailCAlloc (osMailQId queue_id, uint32_t millisec); - -/// Put a mail to a queue. -/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate. -/// \param[in] mail memory block previously allocated with \ref osMailAlloc or \ref osMailCAlloc. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osMailPut shall be consistent in every CMSIS-RTOS. -osStatus osMailPut (osMailQId queue_id, void *mail); - -/// Get a mail from a queue. -/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out -/// \return event that contains mail information or error code. -/// \note MUST REMAIN UNCHANGED: \b osMailGet shall be consistent in every CMSIS-RTOS. -osEvent osMailGet (osMailQId queue_id, uint32_t millisec); - -/// Free a memory block from a mail. -/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate. -/// \param[in] mail pointer to the memory block that was obtained with \ref osMailGet. -/// \return status code that indicates the execution status of the function. -/// \note MUST REMAIN UNCHANGED: \b osMailFree shall be consistent in every CMSIS-RTOS. -osStatus osMailFree (osMailQId queue_id, void *mail); - -#endif // Mail Queues available - - -#ifdef __cplusplus -} -#endif - -#endif // _CMSIS_OS_H diff --git a/Drivers/CMSIS/RTOS2/Include/cmsis_os2.h b/Drivers/CMSIS/RTOS2/Include/cmsis_os2.h deleted file mode 100644 index 7ffe1e5..0000000 --- a/Drivers/CMSIS/RTOS2/Include/cmsis_os2.h +++ /dev/null @@ -1,756 +0,0 @@ -/* - * Copyright (c) 2013-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 12. June 2020 - * $Revision: V2.1.3 - * - * Project: CMSIS-RTOS2 API - * Title: cmsis_os2.h header file - * - * Version 2.1.3 - * Additional functions allowed to be called from Interrupt Service Routines: - * - osThreadGetId - * Version 2.1.2 - * Additional functions allowed to be called from Interrupt Service Routines: - * - osKernelGetInfo, osKernelGetState - * Version 2.1.1 - * Additional functions allowed to be called from Interrupt Service Routines: - * - osKernelGetTickCount, osKernelGetTickFreq - * Changed Kernel Tick type to uint32_t: - * - updated: osKernelGetTickCount, osDelayUntil - * Version 2.1.0 - * Support for critical and uncritical sections (nesting safe): - * - updated: osKernelLock, osKernelUnlock - * - added: osKernelRestoreLock - * Updated Thread and Event Flags: - * - changed flags parameter and return type from int32_t to uint32_t - * Version 2.0.0 - * Initial Release - *---------------------------------------------------------------------------*/ - -#ifndef CMSIS_OS2_H_ -#define CMSIS_OS2_H_ - -#ifndef __NO_RETURN -#if defined(__CC_ARM) -#define __NO_RETURN __declspec(noreturn) -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -#define __NO_RETURN __attribute__((__noreturn__)) -#elif defined(__GNUC__) -#define __NO_RETURN __attribute__((__noreturn__)) -#elif defined(__ICCARM__) -#define __NO_RETURN __noreturn -#else -#define __NO_RETURN -#endif -#endif - -#include -#include - -#ifdef __cplusplus -extern "C" -{ -#endif - - -// ==== Enumerations, structures, defines ==== - -/// Version information. -typedef struct { - uint32_t api; ///< API version (major.minor.rev: mmnnnrrrr dec). - uint32_t kernel; ///< Kernel version (major.minor.rev: mmnnnrrrr dec). -} osVersion_t; - -/// Kernel state. -typedef enum { - osKernelInactive = 0, ///< Inactive. - osKernelReady = 1, ///< Ready. - osKernelRunning = 2, ///< Running. - osKernelLocked = 3, ///< Locked. - osKernelSuspended = 4, ///< Suspended. - osKernelError = -1, ///< Error. - osKernelReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization. -} osKernelState_t; - -/// Thread state. -typedef enum { - osThreadInactive = 0, ///< Inactive. - osThreadReady = 1, ///< Ready. - osThreadRunning = 2, ///< Running. - osThreadBlocked = 3, ///< Blocked. - osThreadTerminated = 4, ///< Terminated. - osThreadError = -1, ///< Error. - osThreadReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization. -} osThreadState_t; - -/// Priority values. -typedef enum { - osPriorityNone = 0, ///< No priority (not initialized). - osPriorityIdle = 1, ///< Reserved for Idle thread. - osPriorityLow = 8, ///< Priority: low - osPriorityLow1 = 8+1, ///< Priority: low + 1 - osPriorityLow2 = 8+2, ///< Priority: low + 2 - osPriorityLow3 = 8+3, ///< Priority: low + 3 - osPriorityLow4 = 8+4, ///< Priority: low + 4 - osPriorityLow5 = 8+5, ///< Priority: low + 5 - osPriorityLow6 = 8+6, ///< Priority: low + 6 - osPriorityLow7 = 8+7, ///< Priority: low + 7 - osPriorityBelowNormal = 16, ///< Priority: below normal - osPriorityBelowNormal1 = 16+1, ///< Priority: below normal + 1 - osPriorityBelowNormal2 = 16+2, ///< Priority: below normal + 2 - osPriorityBelowNormal3 = 16+3, ///< Priority: below normal + 3 - osPriorityBelowNormal4 = 16+4, ///< Priority: below normal + 4 - osPriorityBelowNormal5 = 16+5, ///< Priority: below normal + 5 - osPriorityBelowNormal6 = 16+6, ///< Priority: below normal + 6 - osPriorityBelowNormal7 = 16+7, ///< Priority: below normal + 7 - osPriorityNormal = 24, ///< Priority: normal - osPriorityNormal1 = 24+1, ///< Priority: normal + 1 - osPriorityNormal2 = 24+2, ///< Priority: normal + 2 - osPriorityNormal3 = 24+3, ///< Priority: normal + 3 - osPriorityNormal4 = 24+4, ///< Priority: normal + 4 - osPriorityNormal5 = 24+5, ///< Priority: normal + 5 - osPriorityNormal6 = 24+6, ///< Priority: normal + 6 - osPriorityNormal7 = 24+7, ///< Priority: normal + 7 - osPriorityAboveNormal = 32, ///< Priority: above normal - osPriorityAboveNormal1 = 32+1, ///< Priority: above normal + 1 - osPriorityAboveNormal2 = 32+2, ///< Priority: above normal + 2 - osPriorityAboveNormal3 = 32+3, ///< Priority: above normal + 3 - osPriorityAboveNormal4 = 32+4, ///< Priority: above normal + 4 - osPriorityAboveNormal5 = 32+5, ///< Priority: above normal + 5 - osPriorityAboveNormal6 = 32+6, ///< Priority: above normal + 6 - osPriorityAboveNormal7 = 32+7, ///< Priority: above normal + 7 - osPriorityHigh = 40, ///< Priority: high - osPriorityHigh1 = 40+1, ///< Priority: high + 1 - osPriorityHigh2 = 40+2, ///< Priority: high + 2 - osPriorityHigh3 = 40+3, ///< Priority: high + 3 - osPriorityHigh4 = 40+4, ///< Priority: high + 4 - osPriorityHigh5 = 40+5, ///< Priority: high + 5 - osPriorityHigh6 = 40+6, ///< Priority: high + 6 - osPriorityHigh7 = 40+7, ///< Priority: high + 7 - osPriorityRealtime = 48, ///< Priority: realtime - osPriorityRealtime1 = 48+1, ///< Priority: realtime + 1 - osPriorityRealtime2 = 48+2, ///< Priority: realtime + 2 - osPriorityRealtime3 = 48+3, ///< Priority: realtime + 3 - osPriorityRealtime4 = 48+4, ///< Priority: realtime + 4 - osPriorityRealtime5 = 48+5, ///< Priority: realtime + 5 - osPriorityRealtime6 = 48+6, ///< Priority: realtime + 6 - osPriorityRealtime7 = 48+7, ///< Priority: realtime + 7 - osPriorityISR = 56, ///< Reserved for ISR deferred thread. - osPriorityError = -1, ///< System cannot determine priority or illegal priority. - osPriorityReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization. -} osPriority_t; - -/// Entry point of a thread. -typedef void (*osThreadFunc_t) (void *argument); - -/// Timer callback function. -typedef void (*osTimerFunc_t) (void *argument); - -/// Timer type. -typedef enum { - osTimerOnce = 0, ///< One-shot timer. - osTimerPeriodic = 1 ///< Repeating timer. -} osTimerType_t; - -// Timeout value. -#define osWaitForever 0xFFFFFFFFU ///< Wait forever timeout value. - -// Flags options (\ref osThreadFlagsWait and \ref osEventFlagsWait). -#define osFlagsWaitAny 0x00000000U ///< Wait for any flag (default). -#define osFlagsWaitAll 0x00000001U ///< Wait for all flags. -#define osFlagsNoClear 0x00000002U ///< Do not clear flags which have been specified to wait for. - -// Flags errors (returned by osThreadFlagsXxxx and osEventFlagsXxxx). -#define osFlagsError 0x80000000U ///< Error indicator. -#define osFlagsErrorUnknown 0xFFFFFFFFU ///< osError (-1). -#define osFlagsErrorTimeout 0xFFFFFFFEU ///< osErrorTimeout (-2). -#define osFlagsErrorResource 0xFFFFFFFDU ///< osErrorResource (-3). -#define osFlagsErrorParameter 0xFFFFFFFCU ///< osErrorParameter (-4). -#define osFlagsErrorISR 0xFFFFFFFAU ///< osErrorISR (-6). - -// Thread attributes (attr_bits in \ref osThreadAttr_t). -#define osThreadDetached 0x00000000U ///< Thread created in detached mode (default) -#define osThreadJoinable 0x00000001U ///< Thread created in joinable mode - -// Mutex attributes (attr_bits in \ref osMutexAttr_t). -#define osMutexRecursive 0x00000001U ///< Recursive mutex. -#define osMutexPrioInherit 0x00000002U ///< Priority inherit protocol. -#define osMutexRobust 0x00000008U ///< Robust mutex. - -/// Status code values returned by CMSIS-RTOS functions. -typedef enum { - osOK = 0, ///< Operation completed successfully. - osError = -1, ///< Unspecified RTOS error: run-time error but no other error message fits. - osErrorTimeout = -2, ///< Operation not completed within the timeout period. - osErrorResource = -3, ///< Resource not available. - osErrorParameter = -4, ///< Parameter error. - osErrorNoMemory = -5, ///< System is out of memory: it was impossible to allocate or reserve memory for the operation. - osErrorISR = -6, ///< Not allowed in ISR context: the function cannot be called from interrupt service routines. - osStatusReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization. -} osStatus_t; - - -/// \details Thread ID identifies the thread. -typedef void *osThreadId_t; - -/// \details Timer ID identifies the timer. -typedef void *osTimerId_t; - -/// \details Event Flags ID identifies the event flags. -typedef void *osEventFlagsId_t; - -/// \details Mutex ID identifies the mutex. -typedef void *osMutexId_t; - -/// \details Semaphore ID identifies the semaphore. -typedef void *osSemaphoreId_t; - -/// \details Memory Pool ID identifies the memory pool. -typedef void *osMemoryPoolId_t; - -/// \details Message Queue ID identifies the message queue. -typedef void *osMessageQueueId_t; - - -#ifndef TZ_MODULEID_T -#define TZ_MODULEID_T -/// \details Data type that identifies secure software modules called by a process. -typedef uint32_t TZ_ModuleId_t; -#endif - - -/// Attributes structure for thread. -typedef struct { - const char *name; ///< name of the thread - uint32_t attr_bits; ///< attribute bits - void *cb_mem; ///< memory for control block - uint32_t cb_size; ///< size of provided memory for control block - void *stack_mem; ///< memory for stack - uint32_t stack_size; ///< size of stack - osPriority_t priority; ///< initial thread priority (default: osPriorityNormal) - TZ_ModuleId_t tz_module; ///< TrustZone module identifier - uint32_t reserved; ///< reserved (must be 0) -} osThreadAttr_t; - -/// Attributes structure for timer. -typedef struct { - const char *name; ///< name of the timer - uint32_t attr_bits; ///< attribute bits - void *cb_mem; ///< memory for control block - uint32_t cb_size; ///< size of provided memory for control block -} osTimerAttr_t; - -/// Attributes structure for event flags. -typedef struct { - const char *name; ///< name of the event flags - uint32_t attr_bits; ///< attribute bits - void *cb_mem; ///< memory for control block - uint32_t cb_size; ///< size of provided memory for control block -} osEventFlagsAttr_t; - -/// Attributes structure for mutex. -typedef struct { - const char *name; ///< name of the mutex - uint32_t attr_bits; ///< attribute bits - void *cb_mem; ///< memory for control block - uint32_t cb_size; ///< size of provided memory for control block -} osMutexAttr_t; - -/// Attributes structure for semaphore. -typedef struct { - const char *name; ///< name of the semaphore - uint32_t attr_bits; ///< attribute bits - void *cb_mem; ///< memory for control block - uint32_t cb_size; ///< size of provided memory for control block -} osSemaphoreAttr_t; - -/// Attributes structure for memory pool. -typedef struct { - const char *name; ///< name of the memory pool - uint32_t attr_bits; ///< attribute bits - void *cb_mem; ///< memory for control block - uint32_t cb_size; ///< size of provided memory for control block - void *mp_mem; ///< memory for data storage - uint32_t mp_size; ///< size of provided memory for data storage -} osMemoryPoolAttr_t; - -/// Attributes structure for message queue. -typedef struct { - const char *name; ///< name of the message queue - uint32_t attr_bits; ///< attribute bits - void *cb_mem; ///< memory for control block - uint32_t cb_size; ///< size of provided memory for control block - void *mq_mem; ///< memory for data storage - uint32_t mq_size; ///< size of provided memory for data storage -} osMessageQueueAttr_t; - - -// ==== Kernel Management Functions ==== - -/// Initialize the RTOS Kernel. -/// \return status code that indicates the execution status of the function. -osStatus_t osKernelInitialize (void); - -/// Get RTOS Kernel Information. -/// \param[out] version pointer to buffer for retrieving version information. -/// \param[out] id_buf pointer to buffer for retrieving kernel identification string. -/// \param[in] id_size size of buffer for kernel identification string. -/// \return status code that indicates the execution status of the function. -osStatus_t osKernelGetInfo (osVersion_t *version, char *id_buf, uint32_t id_size); - -/// Get the current RTOS Kernel state. -/// \return current RTOS Kernel state. -osKernelState_t osKernelGetState (void); - -/// Start the RTOS Kernel scheduler. -/// \return status code that indicates the execution status of the function. -osStatus_t osKernelStart (void); - -/// Lock the RTOS Kernel scheduler. -/// \return previous lock state (1 - locked, 0 - not locked, error code if negative). -int32_t osKernelLock (void); - -/// Unlock the RTOS Kernel scheduler. -/// \return previous lock state (1 - locked, 0 - not locked, error code if negative). -int32_t osKernelUnlock (void); - -/// Restore the RTOS Kernel scheduler lock state. -/// \param[in] lock lock state obtained by \ref osKernelLock or \ref osKernelUnlock. -/// \return new lock state (1 - locked, 0 - not locked, error code if negative). -int32_t osKernelRestoreLock (int32_t lock); - -/// Suspend the RTOS Kernel scheduler. -/// \return time in ticks, for how long the system can sleep or power-down. -uint32_t osKernelSuspend (void); - -/// Resume the RTOS Kernel scheduler. -/// \param[in] sleep_ticks time in ticks for how long the system was in sleep or power-down mode. -void osKernelResume (uint32_t sleep_ticks); - -/// Get the RTOS kernel tick count. -/// \return RTOS kernel current tick count. -uint32_t osKernelGetTickCount (void); - -/// Get the RTOS kernel tick frequency. -/// \return frequency of the kernel tick in hertz, i.e. kernel ticks per second. -uint32_t osKernelGetTickFreq (void); - -/// Get the RTOS kernel system timer count. -/// \return RTOS kernel current system timer count as 32-bit value. -uint32_t osKernelGetSysTimerCount (void); - -/// Get the RTOS kernel system timer frequency. -/// \return frequency of the system timer in hertz, i.e. timer ticks per second. -uint32_t osKernelGetSysTimerFreq (void); - - -// ==== Thread Management Functions ==== - -/// Create a thread and add it to Active Threads. -/// \param[in] func thread function. -/// \param[in] argument pointer that is passed to the thread function as start argument. -/// \param[in] attr thread attributes; NULL: default values. -/// \return thread ID for reference by other functions or NULL in case of error. -osThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr); - -/// Get name of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \return name as null-terminated string. -const char *osThreadGetName (osThreadId_t thread_id); - -/// Return the thread ID of the current running thread. -/// \return thread ID for reference by other functions or NULL in case of error. -osThreadId_t osThreadGetId (void); - -/// Get current thread state of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \return current thread state of the specified thread. -osThreadState_t osThreadGetState (osThreadId_t thread_id); - -/// Get stack size of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \return stack size in bytes. -uint32_t osThreadGetStackSize (osThreadId_t thread_id); - -/// Get available stack space of a thread based on stack watermark recording during execution. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \return remaining stack space in bytes. -uint32_t osThreadGetStackSpace (osThreadId_t thread_id); - -/// Change priority of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \param[in] priority new priority value for the thread function. -/// \return status code that indicates the execution status of the function. -osStatus_t osThreadSetPriority (osThreadId_t thread_id, osPriority_t priority); - -/// Get current priority of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \return current priority value of the specified thread. -osPriority_t osThreadGetPriority (osThreadId_t thread_id); - -/// Pass control to next thread that is in state \b READY. -/// \return status code that indicates the execution status of the function. -osStatus_t osThreadYield (void); - -/// Suspend execution of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \return status code that indicates the execution status of the function. -osStatus_t osThreadSuspend (osThreadId_t thread_id); - -/// Resume execution of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \return status code that indicates the execution status of the function. -osStatus_t osThreadResume (osThreadId_t thread_id); - -/// Detach a thread (thread storage can be reclaimed when thread terminates). -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \return status code that indicates the execution status of the function. -osStatus_t osThreadDetach (osThreadId_t thread_id); - -/// Wait for specified thread to terminate. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \return status code that indicates the execution status of the function. -osStatus_t osThreadJoin (osThreadId_t thread_id); - -/// Terminate execution of current running thread. -__NO_RETURN void osThreadExit (void); - -/// Terminate execution of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \return status code that indicates the execution status of the function. -osStatus_t osThreadTerminate (osThreadId_t thread_id); - -/// Get number of active threads. -/// \return number of active threads. -uint32_t osThreadGetCount (void); - -/// Enumerate active threads. -/// \param[out] thread_array pointer to array for retrieving thread IDs. -/// \param[in] array_items maximum number of items in array for retrieving thread IDs. -/// \return number of enumerated threads. -uint32_t osThreadEnumerate (osThreadId_t *thread_array, uint32_t array_items); - - -// ==== Thread Flags Functions ==== - -/// Set the specified Thread Flags of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. -/// \param[in] flags specifies the flags of the thread that shall be set. -/// \return thread flags after setting or error code if highest bit set. -uint32_t osThreadFlagsSet (osThreadId_t thread_id, uint32_t flags); - -/// Clear the specified Thread Flags of current running thread. -/// \param[in] flags specifies the flags of the thread that shall be cleared. -/// \return thread flags before clearing or error code if highest bit set. -uint32_t osThreadFlagsClear (uint32_t flags); - -/// Get the current Thread Flags of current running thread. -/// \return current thread flags. -uint32_t osThreadFlagsGet (void); - -/// Wait for one or more Thread Flags of the current running thread to become signaled. -/// \param[in] flags specifies the flags to wait for. -/// \param[in] options specifies flags options (osFlagsXxxx). -/// \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return thread flags before clearing or error code if highest bit set. -uint32_t osThreadFlagsWait (uint32_t flags, uint32_t options, uint32_t timeout); - - -// ==== Generic Wait Functions ==== - -/// Wait for Timeout (Time Delay). -/// \param[in] ticks \ref CMSIS_RTOS_TimeOutValue "time ticks" value -/// \return status code that indicates the execution status of the function. -osStatus_t osDelay (uint32_t ticks); - -/// Wait until specified time. -/// \param[in] ticks absolute time in ticks -/// \return status code that indicates the execution status of the function. -osStatus_t osDelayUntil (uint32_t ticks); - - -// ==== Timer Management Functions ==== - -/// Create and Initialize a timer. -/// \param[in] func function pointer to callback function. -/// \param[in] type \ref osTimerOnce for one-shot or \ref osTimerPeriodic for periodic behavior. -/// \param[in] argument argument to the timer callback function. -/// \param[in] attr timer attributes; NULL: default values. -/// \return timer ID for reference by other functions or NULL in case of error. -osTimerId_t osTimerNew (osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr); - -/// Get name of a timer. -/// \param[in] timer_id timer ID obtained by \ref osTimerNew. -/// \return name as null-terminated string. -const char *osTimerGetName (osTimerId_t timer_id); - -/// Start or restart a timer. -/// \param[in] timer_id timer ID obtained by \ref osTimerNew. -/// \param[in] ticks \ref CMSIS_RTOS_TimeOutValue "time ticks" value of the timer. -/// \return status code that indicates the execution status of the function. -osStatus_t osTimerStart (osTimerId_t timer_id, uint32_t ticks); - -/// Stop a timer. -/// \param[in] timer_id timer ID obtained by \ref osTimerNew. -/// \return status code that indicates the execution status of the function. -osStatus_t osTimerStop (osTimerId_t timer_id); - -/// Check if a timer is running. -/// \param[in] timer_id timer ID obtained by \ref osTimerNew. -/// \return 0 not running, 1 running. -uint32_t osTimerIsRunning (osTimerId_t timer_id); - -/// Delete a timer. -/// \param[in] timer_id timer ID obtained by \ref osTimerNew. -/// \return status code that indicates the execution status of the function. -osStatus_t osTimerDelete (osTimerId_t timer_id); - - -// ==== Event Flags Management Functions ==== - -/// Create and Initialize an Event Flags object. -/// \param[in] attr event flags attributes; NULL: default values. -/// \return event flags ID for reference by other functions or NULL in case of error. -osEventFlagsId_t osEventFlagsNew (const osEventFlagsAttr_t *attr); - -/// Get name of an Event Flags object. -/// \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. -/// \return name as null-terminated string. -const char *osEventFlagsGetName (osEventFlagsId_t ef_id); - -/// Set the specified Event Flags. -/// \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. -/// \param[in] flags specifies the flags that shall be set. -/// \return event flags after setting or error code if highest bit set. -uint32_t osEventFlagsSet (osEventFlagsId_t ef_id, uint32_t flags); - -/// Clear the specified Event Flags. -/// \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. -/// \param[in] flags specifies the flags that shall be cleared. -/// \return event flags before clearing or error code if highest bit set. -uint32_t osEventFlagsClear (osEventFlagsId_t ef_id, uint32_t flags); - -/// Get the current Event Flags. -/// \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. -/// \return current event flags. -uint32_t osEventFlagsGet (osEventFlagsId_t ef_id); - -/// Wait for one or more Event Flags to become signaled. -/// \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. -/// \param[in] flags specifies the flags to wait for. -/// \param[in] options specifies flags options (osFlagsXxxx). -/// \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return event flags before clearing or error code if highest bit set. -uint32_t osEventFlagsWait (osEventFlagsId_t ef_id, uint32_t flags, uint32_t options, uint32_t timeout); - -/// Delete an Event Flags object. -/// \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. -/// \return status code that indicates the execution status of the function. -osStatus_t osEventFlagsDelete (osEventFlagsId_t ef_id); - - -// ==== Mutex Management Functions ==== - -/// Create and Initialize a Mutex object. -/// \param[in] attr mutex attributes; NULL: default values. -/// \return mutex ID for reference by other functions or NULL in case of error. -osMutexId_t osMutexNew (const osMutexAttr_t *attr); - -/// Get name of a Mutex object. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexNew. -/// \return name as null-terminated string. -const char *osMutexGetName (osMutexId_t mutex_id); - -/// Acquire a Mutex or timeout if it is locked. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexNew. -/// \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return status code that indicates the execution status of the function. -osStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout); - -/// Release a Mutex that was acquired by \ref osMutexAcquire. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexNew. -/// \return status code that indicates the execution status of the function. -osStatus_t osMutexRelease (osMutexId_t mutex_id); - -/// Get Thread which owns a Mutex object. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexNew. -/// \return thread ID of owner thread or NULL when mutex was not acquired. -osThreadId_t osMutexGetOwner (osMutexId_t mutex_id); - -/// Delete a Mutex object. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexNew. -/// \return status code that indicates the execution status of the function. -osStatus_t osMutexDelete (osMutexId_t mutex_id); - - -// ==== Semaphore Management Functions ==== - -/// Create and Initialize a Semaphore object. -/// \param[in] max_count maximum number of available tokens. -/// \param[in] initial_count initial number of available tokens. -/// \param[in] attr semaphore attributes; NULL: default values. -/// \return semaphore ID for reference by other functions or NULL in case of error. -osSemaphoreId_t osSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr); - -/// Get name of a Semaphore object. -/// \param[in] semaphore_id semaphore ID obtained by \ref osSemaphoreNew. -/// \return name as null-terminated string. -const char *osSemaphoreGetName (osSemaphoreId_t semaphore_id); - -/// Acquire a Semaphore token or timeout if no tokens are available. -/// \param[in] semaphore_id semaphore ID obtained by \ref osSemaphoreNew. -/// \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return status code that indicates the execution status of the function. -osStatus_t osSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout); - -/// Release a Semaphore token up to the initial maximum count. -/// \param[in] semaphore_id semaphore ID obtained by \ref osSemaphoreNew. -/// \return status code that indicates the execution status of the function. -osStatus_t osSemaphoreRelease (osSemaphoreId_t semaphore_id); - -/// Get current Semaphore token count. -/// \param[in] semaphore_id semaphore ID obtained by \ref osSemaphoreNew. -/// \return number of tokens available. -uint32_t osSemaphoreGetCount (osSemaphoreId_t semaphore_id); - -/// Delete a Semaphore object. -/// \param[in] semaphore_id semaphore ID obtained by \ref osSemaphoreNew. -/// \return status code that indicates the execution status of the function. -osStatus_t osSemaphoreDelete (osSemaphoreId_t semaphore_id); - - -// ==== Memory Pool Management Functions ==== - -/// Create and Initialize a Memory Pool object. -/// \param[in] block_count maximum number of memory blocks in memory pool. -/// \param[in] block_size memory block size in bytes. -/// \param[in] attr memory pool attributes; NULL: default values. -/// \return memory pool ID for reference by other functions or NULL in case of error. -osMemoryPoolId_t osMemoryPoolNew (uint32_t block_count, uint32_t block_size, const osMemoryPoolAttr_t *attr); - -/// Get name of a Memory Pool object. -/// \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. -/// \return name as null-terminated string. -const char *osMemoryPoolGetName (osMemoryPoolId_t mp_id); - -/// Allocate a memory block from a Memory Pool. -/// \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. -/// \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return address of the allocated memory block or NULL in case of no memory is available. -void *osMemoryPoolAlloc (osMemoryPoolId_t mp_id, uint32_t timeout); - -/// Return an allocated memory block back to a Memory Pool. -/// \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. -/// \param[in] block address of the allocated memory block to be returned to the memory pool. -/// \return status code that indicates the execution status of the function. -osStatus_t osMemoryPoolFree (osMemoryPoolId_t mp_id, void *block); - -/// Get maximum number of memory blocks in a Memory Pool. -/// \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. -/// \return maximum number of memory blocks. -uint32_t osMemoryPoolGetCapacity (osMemoryPoolId_t mp_id); - -/// Get memory block size in a Memory Pool. -/// \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. -/// \return memory block size in bytes. -uint32_t osMemoryPoolGetBlockSize (osMemoryPoolId_t mp_id); - -/// Get number of memory blocks used in a Memory Pool. -/// \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. -/// \return number of memory blocks used. -uint32_t osMemoryPoolGetCount (osMemoryPoolId_t mp_id); - -/// Get number of memory blocks available in a Memory Pool. -/// \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. -/// \return number of memory blocks available. -uint32_t osMemoryPoolGetSpace (osMemoryPoolId_t mp_id); - -/// Delete a Memory Pool object. -/// \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. -/// \return status code that indicates the execution status of the function. -osStatus_t osMemoryPoolDelete (osMemoryPoolId_t mp_id); - - -// ==== Message Queue Management Functions ==== - -/// Create and Initialize a Message Queue object. -/// \param[in] msg_count maximum number of messages in queue. -/// \param[in] msg_size maximum message size in bytes. -/// \param[in] attr message queue attributes; NULL: default values. -/// \return message queue ID for reference by other functions or NULL in case of error. -osMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr); - -/// Get name of a Message Queue object. -/// \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. -/// \return name as null-terminated string. -const char *osMessageQueueGetName (osMessageQueueId_t mq_id); - -/// Put a Message into a Queue or timeout if Queue is full. -/// \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. -/// \param[in] msg_ptr pointer to buffer with message to put into a queue. -/// \param[in] msg_prio message priority. -/// \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return status code that indicates the execution status of the function. -osStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout); - -/// Get a Message from a Queue or timeout if Queue is empty. -/// \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. -/// \param[out] msg_ptr pointer to buffer for message to get from a queue. -/// \param[out] msg_prio pointer to buffer for message priority or NULL. -/// \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return status code that indicates the execution status of the function. -osStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout); - -/// Get maximum number of messages in a Message Queue. -/// \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. -/// \return maximum number of messages. -uint32_t osMessageQueueGetCapacity (osMessageQueueId_t mq_id); - -/// Get maximum message size in a Message Queue. -/// \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. -/// \return maximum message size in bytes. -uint32_t osMessageQueueGetMsgSize (osMessageQueueId_t mq_id); - -/// Get number of queued messages in a Message Queue. -/// \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. -/// \return number of queued messages. -uint32_t osMessageQueueGetCount (osMessageQueueId_t mq_id); - -/// Get number of available slots for messages in a Message Queue. -/// \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. -/// \return number of available slots for messages. -uint32_t osMessageQueueGetSpace (osMessageQueueId_t mq_id); - -/// Reset a Message Queue to initial empty state. -/// \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. -/// \return status code that indicates the execution status of the function. -osStatus_t osMessageQueueReset (osMessageQueueId_t mq_id); - -/// Delete a Message Queue object. -/// \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. -/// \return status code that indicates the execution status of the function. -osStatus_t osMessageQueueDelete (osMessageQueueId_t mq_id); - - -#ifdef __cplusplus -} -#endif - -#endif // CMSIS_OS2_H_ diff --git a/Drivers/CMSIS/RTOS2/Include/os_tick.h b/Drivers/CMSIS/RTOS2/Include/os_tick.h deleted file mode 100644 index 4fe9561..0000000 --- a/Drivers/CMSIS/RTOS2/Include/os_tick.h +++ /dev/null @@ -1,80 +0,0 @@ -/**************************************************************************//** - * @file os_tick.h - * @brief CMSIS OS Tick header file - * @version V1.0.2 - * @date 19. March 2021 - ******************************************************************************/ -/* - * Copyright (c) 2017-2021 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef OS_TICK_H -#define OS_TICK_H - -#include - -#ifdef __cplusplus -extern "C" -{ -#endif - -/// IRQ Handler. -#ifndef IRQHANDLER_T -#define IRQHANDLER_T -typedef void (*IRQHandler_t) (void); -#endif - -/// Setup OS Tick timer to generate periodic RTOS Kernel Ticks -/// \param[in] freq tick frequency in Hz -/// \param[in] handler tick IRQ handler -/// \return 0 on success, -1 on error. -int32_t OS_Tick_Setup (uint32_t freq, IRQHandler_t handler); - -/// Enable OS Tick timer interrupt -void OS_Tick_Enable (void); - -/// Disable OS Tick timer interrupt -void OS_Tick_Disable (void); - -/// Acknowledge execution of OS Tick timer interrupt -void OS_Tick_AcknowledgeIRQ (void); - -/// Get OS Tick timer IRQ number -/// \return OS Tick IRQ number -int32_t OS_Tick_GetIRQn (void); - -/// Get OS Tick timer clock frequency -/// \return OS Tick timer clock frequency in Hz -uint32_t OS_Tick_GetClock (void); - -/// Get OS Tick timer interval reload value -/// \return OS Tick timer interval reload value -uint32_t OS_Tick_GetInterval (void); - -/// Get OS Tick timer counter value -/// \return OS Tick timer counter value -uint32_t OS_Tick_GetCount (void); - -/// Get OS Tick timer overflow status -/// \return OS Tick overflow status (1 - overflow, 0 - no overflow). -uint32_t OS_Tick_GetOverflow (void); - -#ifdef __cplusplus -} -#endif - -#endif /* OS_TICK_H */ diff --git a/Drivers/CMSIS/RTOS2/Source/os_systick.c b/Drivers/CMSIS/RTOS2/Source/os_systick.c deleted file mode 100644 index ad13bec..0000000 --- a/Drivers/CMSIS/RTOS2/Source/os_systick.c +++ /dev/null @@ -1,133 +0,0 @@ -/**************************************************************************//** - * @file os_systick.c - * @brief CMSIS OS Tick SysTick implementation - * @version V1.0.3 - * @date 19. March 2021 - ******************************************************************************/ -/* - * Copyright (c) 2017-2021 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "os_tick.h" - -//lint -emacro((923,9078),SCB,SysTick) "cast from unsigned long to pointer" -#include "RTE_Components.h" -#include CMSIS_device_header - -#ifdef SysTick - -#ifndef SYSTICK_IRQ_PRIORITY -#define SYSTICK_IRQ_PRIORITY 0xFFU -#endif - -static uint8_t PendST __attribute__((section(".bss.os"))); - -// Setup OS Tick. -__WEAK int32_t OS_Tick_Setup (uint32_t freq, IRQHandler_t handler) { - uint32_t load; - (void)handler; - - if (freq == 0U) { - //lint -e{904} "Return statement before end of function" - return (-1); - } - - load = (SystemCoreClock / freq) - 1U; - if (load > 0x00FFFFFFU) { - //lint -e{904} "Return statement before end of function" - return (-1); - } - - // Set SysTick Interrupt Priority -#if ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)) || \ - (defined(__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ != 0)) || \ - (defined(__CORTEX_M) && (__CORTEX_M == 7U))) - SCB->SHPR[11] = SYSTICK_IRQ_PRIORITY; -#elif (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0)) - SCB->SHPR[1] |= ((uint32_t)SYSTICK_IRQ_PRIORITY << 24); -#elif ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ != 0)) || \ - (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ != 0))) - SCB->SHP[11] = SYSTICK_IRQ_PRIORITY; -#elif (defined(__ARM_ARCH_6M__) && (__ARM_ARCH_6M__ != 0)) - SCB->SHP[1] |= ((uint32_t)SYSTICK_IRQ_PRIORITY << 24); -#else -#error "Unknown ARM Core!" -#endif - - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk; - SysTick->LOAD = load; - SysTick->VAL = 0U; - - PendST = 0U; - - return (0); -} - -/// Enable OS Tick. -__WEAK void OS_Tick_Enable (void) { - - if (PendST != 0U) { - PendST = 0U; - SCB->ICSR = SCB_ICSR_PENDSTSET_Msk; - } - - SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; -} - -/// Disable OS Tick. -__WEAK void OS_Tick_Disable (void) { - - SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; - - if ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) != 0U) { - SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk; - PendST = 1U; - } -} - -// Acknowledge OS Tick IRQ. -__WEAK void OS_Tick_AcknowledgeIRQ (void) { - (void)SysTick->CTRL; -} - -// Get OS Tick IRQ number. -__WEAK int32_t OS_Tick_GetIRQn (void) { - return ((int32_t)SysTick_IRQn); -} - -// Get OS Tick clock. -__WEAK uint32_t OS_Tick_GetClock (void) { - return (SystemCoreClock); -} - -// Get OS Tick interval. -__WEAK uint32_t OS_Tick_GetInterval (void) { - return (SysTick->LOAD + 1U); -} - -// Get OS Tick count value. -__WEAK uint32_t OS_Tick_GetCount (void) { - uint32_t load = SysTick->LOAD; - return (load - SysTick->VAL); -} - -// Get OS Tick overflow status. -__WEAK uint32_t OS_Tick_GetOverflow (void) { - return ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) >> SCB_ICSR_PENDSTSET_Pos); -} - -#endif // SysTick diff --git a/Drivers/CMSIS/RTOS2/Source/os_tick_gtim.c b/Drivers/CMSIS/RTOS2/Source/os_tick_gtim.c deleted file mode 100644 index 1778ab7..0000000 --- a/Drivers/CMSIS/RTOS2/Source/os_tick_gtim.c +++ /dev/null @@ -1,187 +0,0 @@ -/**************************************************************************//** - * @file os_tick_gtim.c - * @brief CMSIS OS Tick implementation for Generic Timer - * @version V1.0.1 - * @date 24. November 2017 - ******************************************************************************/ -/* - * Copyright (c) 2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "os_tick.h" -#include "irq_ctrl.h" - -#include "RTE_Components.h" -#include CMSIS_device_header - -#ifndef GTIM_IRQ_PRIORITY -#define GTIM_IRQ_PRIORITY 0xFFU -#endif - -#ifndef GTIM_IRQ_NUM -#define GTIM_IRQ_NUM SecurePhyTimer_IRQn -#endif - -// Timer interrupt pending flag -static uint8_t GTIM_PendIRQ; - -// Timer tick frequency -static uint32_t GTIM_Clock; - -// Timer load value -static uint32_t GTIM_Load; - -// Setup OS Tick. -int32_t OS_Tick_Setup (uint32_t freq, IRQHandler_t handler) { - uint32_t prio, bits; - - if (freq == 0U) { - return (-1); - } - - GTIM_PendIRQ = 0U; - - // Get timer clock -#ifdef SCTR_BASE - GTIM_Clock = *(uint32_t*)(SCTR_BASE+0x20); -#else - // FVP REFCLK CNTControl 100MHz - GTIM_Clock = 100000000UL; -#endif - - PL1_SetCounterFrequency(GTIM_Clock); - - // Calculate load value - GTIM_Load = (GTIM_Clock / freq) - 1U; - - // Disable Generic Timer and set load value - PL1_SetControl(0U); - PL1_SetLoadValue(GTIM_Load); - - // Disable corresponding IRQ - IRQ_Disable(GTIM_IRQ_NUM); - IRQ_ClearPending(GTIM_IRQ_NUM); - - // Determine number of implemented priority bits - IRQ_SetPriority(GTIM_IRQ_NUM, 0xFFU); - - prio = IRQ_GetPriority(GTIM_IRQ_NUM); - - // At least bits [7:4] must be implemented - if ((prio & 0xF0U) == 0U) { - return (-1); - } - - for (bits = 0; bits < 4; bits++) { - if ((prio & 0x01) != 0) { - break; - } - prio >>= 1; - } - - // Adjust configured priority to the number of implemented priority bits - prio = (GTIM_IRQ_PRIORITY << bits) & 0xFFUL; - - // Set Private Timer interrupt priority - IRQ_SetPriority(GTIM_IRQ_NUM, prio-1U); - - // Set edge-triggered IRQ - IRQ_SetMode(GTIM_IRQ_NUM, IRQ_MODE_TRIG_EDGE); - - // Register tick interrupt handler function - IRQ_SetHandler(GTIM_IRQ_NUM, handler); - - // Enable corresponding interrupt - IRQ_Enable(GTIM_IRQ_NUM); - - // Enable system counter and timer control -#ifdef SCTR_BASE - *(uint32_t*)SCTR_BASE |= 3U; -#endif - - // Enable timer control - PL1_SetControl(1U); - - return (0); -} - -/// Enable OS Tick. -void OS_Tick_Enable (void) { - uint32_t ctrl; - - // Set pending interrupt if flag set - if (GTIM_PendIRQ != 0U) { - GTIM_PendIRQ = 0U; - IRQ_SetPending (GTIM_IRQ_NUM); - } - - // Start the Private Timer - ctrl = PL1_GetControl(); - // Set bit: Timer enable - ctrl |= 1U; - PL1_SetControl(ctrl); -} - -/// Disable OS Tick. -void OS_Tick_Disable (void) { - uint32_t ctrl; - - // Stop the Private Timer - ctrl = PL1_GetControl(); - // Clear bit: Timer enable - ctrl &= ~1U; - PL1_SetControl(ctrl); - - // Remember pending interrupt flag - if (IRQ_GetPending(GTIM_IRQ_NUM) != 0) { - IRQ_ClearPending(GTIM_IRQ_NUM); - GTIM_PendIRQ = 1U; - } -} - -// Acknowledge OS Tick IRQ. -void OS_Tick_AcknowledgeIRQ (void) { - IRQ_ClearPending (GTIM_IRQ_NUM); - PL1_SetLoadValue(GTIM_Load); -} - -// Get OS Tick IRQ number. -int32_t OS_Tick_GetIRQn (void) { - return (GTIM_IRQ_NUM); -} - -// Get OS Tick clock. -uint32_t OS_Tick_GetClock (void) { - return (GTIM_Clock); -} - -// Get OS Tick interval. -uint32_t OS_Tick_GetInterval (void) { - return (GTIM_Load + 1U); -} - -// Get OS Tick count value. -uint32_t OS_Tick_GetCount (void) { - return (GTIM_Load - PL1_GetCurrentValue()); -} - -// Get OS Tick overflow status. -uint32_t OS_Tick_GetOverflow (void) { - CNTP_CTL_Type cntp_ctl; - cntp_ctl.w = PL1_GetControl(); - return (cntp_ctl.b.ISTATUS); -} diff --git a/Drivers/CMSIS/RTOS2/Source/os_tick_ptim.c b/Drivers/CMSIS/RTOS2/Source/os_tick_ptim.c deleted file mode 100644 index ccd9cb6..0000000 --- a/Drivers/CMSIS/RTOS2/Source/os_tick_ptim.c +++ /dev/null @@ -1,165 +0,0 @@ -/**************************************************************************//** - * @file os_tick_ptim.c - * @brief CMSIS OS Tick implementation for Private Timer - * @version V1.0.2 - * @date 02. March 2018 - ******************************************************************************/ -/* - * Copyright (c) 2017-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "RTE_Components.h" -#include CMSIS_device_header - -#if defined(PTIM) - -#include "os_tick.h" -#include "irq_ctrl.h" - -#ifndef PTIM_IRQ_PRIORITY -#define PTIM_IRQ_PRIORITY 0xFFU -#endif - -static uint8_t PTIM_PendIRQ; // Timer interrupt pending flag - -// Setup OS Tick. -int32_t OS_Tick_Setup (uint32_t freq, IRQHandler_t handler) { - uint32_t load; - uint32_t prio; - uint32_t bits; - - if (freq == 0U) { - return (-1); - } - - PTIM_PendIRQ = 0U; - - // Private Timer runs with the system frequency - load = (SystemCoreClock / freq) - 1U; - - // Disable Private Timer and set load value - PTIM_SetControl (0U); - PTIM_SetLoadValue (load); - - // Disable corresponding IRQ - IRQ_Disable (PrivTimer_IRQn); - IRQ_ClearPending(PrivTimer_IRQn); - - // Determine number of implemented priority bits - IRQ_SetPriority (PrivTimer_IRQn, 0xFFU); - - prio = IRQ_GetPriority (PrivTimer_IRQn); - - // At least bits [7:4] must be implemented - if ((prio & 0xF0U) == 0U) { - return (-1); - } - - for (bits = 0; bits < 4; bits++) { - if ((prio & 0x01) != 0) { - break; - } - prio >>= 1; - } - - // Adjust configured priority to the number of implemented priority bits - prio = (PTIM_IRQ_PRIORITY << bits) & 0xFFUL; - - // Set Private Timer interrupt priority - IRQ_SetPriority(PrivTimer_IRQn, prio-1U); - - // Set edge-triggered IRQ - IRQ_SetMode(PrivTimer_IRQn, IRQ_MODE_TRIG_EDGE); - - // Register tick interrupt handler function - IRQ_SetHandler(PrivTimer_IRQn, handler); - - // Enable corresponding interrupt - IRQ_Enable (PrivTimer_IRQn); - - // Set bits: IRQ enable and Auto reload - PTIM_SetControl (0x06U); - - return (0); -} - -/// Enable OS Tick. -void OS_Tick_Enable (void) { - uint32_t ctrl; - - // Set pending interrupt if flag set - if (PTIM_PendIRQ != 0U) { - PTIM_PendIRQ = 0U; - IRQ_SetPending (PrivTimer_IRQn); - } - - // Start the Private Timer - ctrl = PTIM_GetControl(); - // Set bit: Timer enable - ctrl |= 1U; - PTIM_SetControl (ctrl); -} - -/// Disable OS Tick. -void OS_Tick_Disable (void) { - uint32_t ctrl; - - // Stop the Private Timer - ctrl = PTIM_GetControl(); - // Clear bit: Timer enable - ctrl &= ~1U; - PTIM_SetControl (ctrl); - - // Remember pending interrupt flag - if (IRQ_GetPending(PrivTimer_IRQn) != 0) { - IRQ_ClearPending (PrivTimer_IRQn); - PTIM_PendIRQ = 1U; - } -} - -// Acknowledge OS Tick IRQ. -void OS_Tick_AcknowledgeIRQ (void) { - PTIM_ClearEventFlag(); -} - -// Get OS Tick IRQ number. -int32_t OS_Tick_GetIRQn (void) { - return (PrivTimer_IRQn); -} - -// Get OS Tick clock. -uint32_t OS_Tick_GetClock (void) { - return (SystemCoreClock); -} - -// Get OS Tick interval. -uint32_t OS_Tick_GetInterval (void) { - return (PTIM_GetLoadValue() + 1U); -} - -// Get OS Tick count value. -uint32_t OS_Tick_GetCount (void) { - uint32_t load = PTIM_GetLoadValue(); - return (load - PTIM_GetCurrentValue()); -} - -// Get OS Tick overflow status. -uint32_t OS_Tick_GetOverflow (void) { - return (PTIM->ISR & 1); -} - -#endif // PTIM diff --git a/Drivers/CMSIS/RTOS2/Template/cmsis_os.h b/Drivers/CMSIS/RTOS2/Template/cmsis_os.h deleted file mode 100644 index 5447842..0000000 --- a/Drivers/CMSIS/RTOS2/Template/cmsis_os.h +++ /dev/null @@ -1,922 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 18. June 2018 - * $Revision: V2.1.3 - * - * Project: CMSIS-RTOS API - * Title: cmsis_os.h template header file - * - * Version 0.02 - * Initial Proposal Phase - * Version 0.03 - * osKernelStart added, optional feature: main started as thread - * osSemaphores have standard behavior - * osTimerCreate does not start the timer, added osTimerStart - * osThreadPass is renamed to osThreadYield - * Version 1.01 - * Support for C++ interface - * - const attribute removed from the osXxxxDef_t typedefs - * - const attribute added to the osXxxxDef macros - * Added: osTimerDelete, osMutexDelete, osSemaphoreDelete - * Added: osKernelInitialize - * Version 1.02 - * Control functions for short timeouts in microsecond resolution: - * Added: osKernelSysTick, osKernelSysTickFrequency, osKernelSysTickMicroSec - * Removed: osSignalGet - * Version 2.0.0 - * OS objects creation without macros (dynamic creation and resource allocation): - * - added: osXxxxNew functions which replace osXxxxCreate - * - added: osXxxxAttr_t structures - * - deprecated: osXxxxCreate functions, osXxxxDef_t structures - * - deprecated: osXxxxDef and osXxxx macros - * osStatus codes simplified and renamed to osStatus_t - * osEvent return structure deprecated - * Kernel: - * - added: osKernelInfo_t and osKernelGetInfo - * - added: osKernelState_t and osKernelGetState (replaces osKernelRunning) - * - added: osKernelLock, osKernelUnlock - * - added: osKernelSuspend, osKernelResume - * - added: osKernelGetTickCount, osKernelGetTickFreq - * - renamed osKernelSysTick to osKernelGetSysTimerCount - * - replaced osKernelSysTickFrequency with osKernelGetSysTimerFreq - * - deprecated osKernelSysTickMicroSec - * Thread: - * - extended number of thread priorities - * - renamed osPrioriry to osPrioriry_t - * - replaced osThreadCreate with osThreadNew - * - added: osThreadGetName - * - added: osThreadState_t and osThreadGetState - * - added: osThreadGetStackSize, osThreadGetStackSpace - * - added: osThreadSuspend, osThreadResume - * - added: osThreadJoin, osThreadDetach, osThreadExit - * - added: osThreadGetCount, osThreadEnumerate - * - added: Thread Flags (moved from Signals) - * Signals: - * - renamed osSignals to osThreadFlags (moved to Thread Flags) - * - changed return value of Set/Clear/Wait functions - * - Clear function limited to current running thread - * - extended Wait function (options) - * - added: osThreadFlagsGet - * Event Flags: - * - added new independent object for handling Event Flags - * Delay and Wait functions: - * - added: osDelayUntil - * - deprecated: osWait - * Timer: - * - replaced osTimerCreate with osTimerNew - * - added: osTimerGetName, osTimerIsRunning - * Mutex: - * - extended: attributes (Recursive, Priority Inherit, Robust) - * - replaced osMutexCreate with osMutexNew - * - renamed osMutexWait to osMutexAcquire - * - added: osMutexGetName, osMutexGetOwner - * Semaphore: - * - extended: maximum and initial token count - * - replaced osSemaphoreCreate with osSemaphoreNew - * - renamed osSemaphoreWait to osSemaphoreAcquire (changed return value) - * - added: osSemaphoreGetName, osSemaphoreGetCount - * Memory Pool: - * - using osMemoryPool prefix instead of osPool - * - replaced osPoolCreate with osMemoryPoolNew - * - extended osMemoryPoolAlloc (timeout) - * - added: osMemoryPoolGetName - * - added: osMemoryPoolGetCapacity, osMemoryPoolGetBlockSize - * - added: osMemoryPoolGetCount, osMemoryPoolGetSpace - * - added: osMemoryPoolDelete - * - deprecated: osPoolCAlloc - * Message Queue: - * - extended: fixed size message instead of a single 32-bit value - * - using osMessageQueue prefix instead of osMessage - * - replaced osMessageCreate with osMessageQueueNew - * - updated: osMessageQueuePut, osMessageQueueGet - * - added: osMessageQueueGetName - * - added: osMessageQueueGetCapacity, osMessageQueueGetMsgSize - * - added: osMessageQueueGetCount, osMessageQueueGetSpace - * - added: osMessageQueueReset, osMessageQueueDelete - * Mail Queue: - * - deprecated (superseded by extended Message Queue functionality) - * Version 2.1.0 - * Support for critical and uncritical sections (nesting safe): - * - updated: osKernelLock, osKernelUnlock - * - added: osKernelRestoreLock - * Updated Thread and Event Flags: - * - changed flags parameter and return type from int32_t to uint32_t - * Version 2.1.1 - * Additional functions allowed to be called from Interrupt Service Routines: - * - osKernelGetTickCount, osKernelGetTickFreq - * Changed Kernel Tick type to uint32_t: - * - updated: osKernelGetTickCount, osDelayUntil - * Version 2.1.2 - * Additional functions allowed to be called from Interrupt Service Routines: - * - osKernelGetInfo, osKernelGetState - * Version 2.1.3 - * Additional functions allowed to be called from Interrupt Service Routines: - * - osThreadGetId - *---------------------------------------------------------------------------*/ - -#ifndef CMSIS_OS_H_ -#define CMSIS_OS_H_ - -/// \b osCMSIS identifies the CMSIS-RTOS API version. -#define osCMSIS 0x20001U ///< API version (main[31:16].sub[15:0]) - -/// \note CAN BE CHANGED: \b osCMSIS_KERNEL identifies the underlying RTOS kernel and version number. -#define osCMSIS_KERNEL 0x10000U ///< RTOS identification and version (main[31:16].sub[15:0]) - -/// \note CAN BE CHANGED: \b osKernelSystemId identifies the underlying RTOS kernel. -#define osKernelSystemId "KERNEL V1.0" ///< RTOS identification string - -/// \note CAN BE CHANGED: \b osFeature_xxx identifies RTOS features. -#define osFeature_MainThread 0 ///< main thread 1=main can be thread, 0=not available -#define osFeature_Signals 16U ///< maximum number of Signal Flags available per thread -#define osFeature_Semaphore 65535U ///< maximum count for \ref osSemaphoreCreate function -#define osFeature_Wait 0 ///< osWait function: 1=available, 0=not available -#define osFeature_SysTick 1 ///< osKernelSysTick functions: 1=available, 0=not available -#define osFeature_Pool 1 ///< Memory Pools: 1=available, 0=not available -#define osFeature_MessageQ 1 ///< Message Queues: 1=available, 0=not available -#define osFeature_MailQ 1 ///< Mail Queues: 1=available, 0=not available - -#if (osCMSIS >= 0x20000U) -#include "cmsis_os2.h" -#else -#include -#include -#endif - -#ifdef __cplusplus -extern "C" -{ -#endif - - -// ==== Enumerations, structures, defines ==== - -/// Priority values. -#if (osCMSIS < 0x20000U) -typedef enum { - osPriorityIdle = -3, ///< Priority: idle (lowest) - osPriorityLow = -2, ///< Priority: low - osPriorityBelowNormal = -1, ///< Priority: below normal - osPriorityNormal = 0, ///< Priority: normal (default) - osPriorityAboveNormal = +1, ///< Priority: above normal - osPriorityHigh = +2, ///< Priority: high - osPriorityRealtime = +3, ///< Priority: realtime (highest) - osPriorityError = 0x84, ///< System cannot determine priority or illegal priority. - osPriorityReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization. -} osPriority; -#else -#define osPriority osPriority_t -#endif - -/// Entry point of a thread. -typedef void (*os_pthread) (void const *argument); - -/// Entry point of a timer call back function. -typedef void (*os_ptimer) (void const *argument); - -/// Timer type. -#if (osCMSIS < 0x20000U) -typedef enum { - osTimerOnce = 0, ///< One-shot timer. - osTimerPeriodic = 1 ///< Repeating timer. -} os_timer_type; -#else -#define os_timer_type osTimerType_t -#endif - -/// Timeout value. -#define osWaitForever 0xFFFFFFFFU ///< Wait forever timeout value. - -/// Status code values returned by CMSIS-RTOS functions. -#if (osCMSIS < 0x20000U) -typedef enum { - osOK = 0, ///< Function completed; no error or event occurred. - osEventSignal = 0x08, ///< Function completed; signal event occurred. - osEventMessage = 0x10, ///< Function completed; message event occurred. - osEventMail = 0x20, ///< Function completed; mail event occurred. - osEventTimeout = 0x40, ///< Function completed; timeout occurred. - osErrorParameter = 0x80, ///< Parameter error: a mandatory parameter was missing or specified an incorrect object. - osErrorResource = 0x81, ///< Resource not available: a specified resource was not available. - osErrorTimeoutResource = 0xC1, ///< Resource not available within given time: a specified resource was not available within the timeout period. - osErrorISR = 0x82, ///< Not allowed in ISR context: the function cannot be called from interrupt service routines. - osErrorISRRecursive = 0x83, ///< Function called multiple times from ISR with same object. - osErrorPriority = 0x84, ///< System cannot determine priority or thread has illegal priority. - osErrorNoMemory = 0x85, ///< System is out of memory: it was impossible to allocate or reserve memory for the operation. - osErrorValue = 0x86, ///< Value of a parameter is out of range. - osErrorOS = 0xFF, ///< Unspecified RTOS error: run-time error but no other error message fits. - osStatusReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization. -} osStatus; -#else -typedef int32_t osStatus; -#define osEventSignal (0x08) -#define osEventMessage (0x10) -#define osEventMail (0x20) -#define osEventTimeout (0x40) -#define osErrorOS osError -#define osErrorTimeoutResource osErrorTimeout -#define osErrorISRRecursive (-126) -#define osErrorValue (-127) -#define osErrorPriority (-128) -#endif - - -// >>> the following data type definitions may be adapted towards a specific RTOS - -/// Thread ID identifies the thread. -/// \note CAN BE CHANGED: \b implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef void *osThreadId; -#else -#define osThreadId osThreadId_t -#endif - -/// Timer ID identifies the timer. -/// \note CAN BE CHANGED: \b implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef void *osTimerId; -#else -#define osTimerId osTimerId_t -#endif - -/// Mutex ID identifies the mutex. -/// \note CAN BE CHANGED: \b implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef void *osMutexId; -#else -#define osMutexId osMutexId_t -#endif - -/// Semaphore ID identifies the semaphore. -/// \note CAN BE CHANGED: \b implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef void *osSemaphoreId; -#else -#define osSemaphoreId osSemaphoreId_t -#endif - -/// Pool ID identifies the memory pool. -/// \note CAN BE CHANGED: \b implementation specific in every CMSIS-RTOS. -typedef void *osPoolId; - -/// Message ID identifies the message queue. -/// \note CAN BE CHANGED: \b implementation specific in every CMSIS-RTOS. -typedef void *osMessageQId; - -/// Mail ID identifies the mail queue. -/// \note CAN BE CHANGED: \b implementation specific in every CMSIS-RTOS. -typedef void *osMailQId; - - -/// Thread Definition structure contains startup information of a thread. -/// \note CAN BE CHANGED: \b os_thread_def is implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef struct os_thread_def { - os_pthread pthread; ///< start address of thread function - osPriority tpriority; ///< initial thread priority - uint32_t instances; ///< maximum number of instances of that thread function - uint32_t stacksize; ///< stack size requirements in bytes; 0 is default stack size -} osThreadDef_t; -#else -typedef struct os_thread_def { - os_pthread pthread; ///< start address of thread function - osThreadAttr_t attr; ///< thread attributes -} osThreadDef_t; -#endif - -/// Timer Definition structure contains timer parameters. -/// \note CAN BE CHANGED: \b os_timer_def is implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef struct os_timer_def { - os_ptimer ptimer; ///< start address of a timer function -} osTimerDef_t; -#else -typedef struct os_timer_def { - os_ptimer ptimer; ///< start address of a timer function - osTimerAttr_t attr; ///< timer attributes -} osTimerDef_t; -#endif - -/// Mutex Definition structure contains setup information for a mutex. -/// \note CAN BE CHANGED: \b os_mutex_def is implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef struct os_mutex_def { - uint32_t dummy; ///< dummy value -} osMutexDef_t; -#else -#define osMutexDef_t osMutexAttr_t -#endif - -/// Semaphore Definition structure contains setup information for a semaphore. -/// \note CAN BE CHANGED: \b os_semaphore_def is implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef struct os_semaphore_def { - uint32_t dummy; ///< dummy value -} osSemaphoreDef_t; -#else -#define osSemaphoreDef_t osSemaphoreAttr_t -#endif - -/// Definition structure for memory block allocation. -/// \note CAN BE CHANGED: \b os_pool_def is implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef struct os_pool_def { - uint32_t pool_sz; ///< number of items (elements) in the pool - uint32_t item_sz; ///< size of an item - void *pool; ///< pointer to memory for pool -} osPoolDef_t; -#else -typedef struct os_pool_def { - uint32_t pool_sz; ///< number of items (elements) in the pool - uint32_t item_sz; ///< size of an item - osMemoryPoolAttr_t attr; ///< memory pool attributes -} osPoolDef_t; -#endif - -/// Definition structure for message queue. -/// \note CAN BE CHANGED: \b os_messageQ_def is implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef struct os_messageQ_def { - uint32_t queue_sz; ///< number of elements in the queue - void *pool; ///< memory array for messages -} osMessageQDef_t; -#else -typedef struct os_messageQ_def { - uint32_t queue_sz; ///< number of elements in the queue - osMessageQueueAttr_t attr; ///< message queue attributes -} osMessageQDef_t; -#endif - -/// Definition structure for mail queue. -/// \note CAN BE CHANGED: \b os_mailQ_def is implementation specific in every CMSIS-RTOS. -#if (osCMSIS < 0x20000U) -typedef struct os_mailQ_def { - uint32_t queue_sz; ///< number of elements in the queue - uint32_t item_sz; ///< size of an item - void *pool; ///< memory array for mail -} osMailQDef_t; -#else -typedef struct os_mailQ_def { - uint32_t queue_sz; ///< number of elements in the queue - uint32_t item_sz; ///< size of an item - void *mail; ///< pointer to mail - osMemoryPoolAttr_t mp_attr; ///< memory pool attributes - osMessageQueueAttr_t mq_attr; ///< message queue attributes -} osMailQDef_t; -#endif - - -/// Event structure contains detailed information about an event. -typedef struct { - osStatus status; ///< status code: event or error information - union { - uint32_t v; ///< message as 32-bit value - void *p; ///< message or mail as void pointer - int32_t signals; ///< signal flags - } value; ///< event value - union { - osMailQId mail_id; ///< mail id obtained by \ref osMailCreate - osMessageQId message_id; ///< message id obtained by \ref osMessageCreate - } def; ///< event definition -} osEvent; - - -// ==== Kernel Management Functions ==== - -/// Initialize the RTOS Kernel for creating objects. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osKernelInitialize (void); -#endif - -/// Start the RTOS Kernel scheduler. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osKernelStart (void); -#endif - -/// Check if the RTOS kernel is already started. -/// \return 0 RTOS is not started, 1 RTOS is started. -#if (osCMSIS < 0x20000U) -int32_t osKernelRunning(void); -#endif - -#if (defined(osFeature_SysTick) && (osFeature_SysTick != 0)) // System Timer available - -/// Get the RTOS kernel system timer counter. -/// \return RTOS kernel system timer as 32-bit value -#if (osCMSIS < 0x20000U) -uint32_t osKernelSysTick (void); -#else -#define osKernelSysTick osKernelGetSysTimerCount -#endif - -/// The RTOS kernel system timer frequency in Hz. -/// \note Reflects the system timer setting and is typically defined in a configuration file. -#if (osCMSIS < 0x20000U) -#define osKernelSysTickFrequency 100000000 -#endif - -/// Convert a microseconds value to a RTOS kernel system timer value. -/// \param microsec time value in microseconds. -/// \return time value normalized to the \ref osKernelSysTickFrequency -#if (osCMSIS < 0x20000U) -#define osKernelSysTickMicroSec(microsec) (((uint64_t)microsec * (osKernelSysTickFrequency)) / 1000000) -#else -#define osKernelSysTickMicroSec(microsec) (((uint64_t)microsec * osKernelGetSysTimerFreq()) / 1000000) -#endif - -#endif // System Timer available - - -// ==== Thread Management Functions ==== - -/// Create a Thread Definition with function, priority, and stack requirements. -/// \param name name of the thread function. -/// \param priority initial priority of the thread function. -/// \param instances number of possible thread instances. -/// \param stacksz stack size (in bytes) requirements for the thread function. -/// \note CAN BE CHANGED: The parameters to \b osThreadDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osThreadDef(name, priority, instances, stacksz) \ -extern const osThreadDef_t os_thread_def_##name -#else // define the object -#if (osCMSIS < 0x20000U) -#define osThreadDef(name, priority, instances, stacksz) \ -const osThreadDef_t os_thread_def_##name = \ -{ (name), (priority), (instances), (stacksz) } -#else -#define osThreadDef(name, priority, instances, stacksz) \ -const osThreadDef_t os_thread_def_##name = \ -{ (name), \ - { NULL, osThreadDetached, NULL, 0U, NULL, 8*((stacksz+7)/8), (priority), 0U, 0U } } -#endif -#endif - -/// Access a Thread definition. -/// \param name name of the thread definition object. -/// \note CAN BE CHANGED: The parameter to \b osThread shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osThread(name) \ -&os_thread_def_##name - -/// Create a thread and add it to Active Threads and set it to state READY. -/// \param[in] thread_def thread definition referenced with \ref osThread. -/// \param[in] argument pointer that is passed to the thread function as start argument. -/// \return thread ID for reference by other functions or NULL in case of error. -osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument); - -/// Return the thread ID of the current running thread. -/// \return thread ID for reference by other functions or NULL in case of error. -#if (osCMSIS < 0x20000U) -osThreadId osThreadGetId (void); -#endif - -/// Change priority of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId. -/// \param[in] priority new priority value for the thread function. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osThreadSetPriority (osThreadId thread_id, osPriority priority); -#endif - -/// Get current priority of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId. -/// \return current priority value of the specified thread. -#if (osCMSIS < 0x20000U) -osPriority osThreadGetPriority (osThreadId thread_id); -#endif - -/// Pass control to next thread that is in state \b READY. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osThreadYield (void); -#endif - -/// Terminate execution of a thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osThreadTerminate (osThreadId thread_id); -#endif - - -// ==== Signal Management ==== - -/// Set the specified Signal Flags of an active thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId. -/// \param[in] signals specifies the signal flags of the thread that should be set. -/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters. -int32_t osSignalSet (osThreadId thread_id, int32_t signals); - -/// Clear the specified Signal Flags of an active thread. -/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId. -/// \param[in] signals specifies the signal flags of the thread that shall be cleared. -/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters or call from ISR. -int32_t osSignalClear (osThreadId thread_id, int32_t signals); - -/// Wait for one or more Signal Flags to become signaled for the current \b RUNNING thread. -/// \param[in] signals wait until all specified signal flags set or 0 for any single signal flag. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return event flag information or error code. -osEvent osSignalWait (int32_t signals, uint32_t millisec); - - -// ==== Generic Wait Functions ==== - -/// Wait for Timeout (Time Delay). -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue "time delay" value -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osDelay (uint32_t millisec); -#endif - -#if (defined (osFeature_Wait) && (osFeature_Wait != 0)) // Generic Wait available - -/// Wait for Signal, Message, Mail, or Timeout. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out -/// \return event that contains signal, message, or mail information or error code. -osEvent osWait (uint32_t millisec); - -#endif // Generic Wait available - - -// ==== Timer Management Functions ==== - -/// Define a Timer object. -/// \param name name of the timer object. -/// \param function name of the timer call back function. -/// \note CAN BE CHANGED: The parameter to \b osTimerDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osTimerDef(name, function) \ -extern const osTimerDef_t os_timer_def_##name -#else // define the object -#if (osCMSIS < 0x20000U) -#define osTimerDef(name, function) \ -const osTimerDef_t os_timer_def_##name = { (function) } -#else -#define osTimerDef(name, function) \ -const osTimerDef_t os_timer_def_##name = \ -{ (function), { NULL, 0U, NULL, 0U } } -#endif -#endif - -/// Access a Timer definition. -/// \param name name of the timer object. -/// \note CAN BE CHANGED: The parameter to \b osTimer shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osTimer(name) \ -&os_timer_def_##name - -/// Create and Initialize a timer. -/// \param[in] timer_def timer object referenced with \ref osTimer. -/// \param[in] type osTimerOnce for one-shot or osTimerPeriodic for periodic behavior. -/// \param[in] argument argument to the timer call back function. -/// \return timer ID for reference by other functions or NULL in case of error. -osTimerId osTimerCreate (const osTimerDef_t *timer_def, os_timer_type type, void *argument); - -/// Start or restart a timer. -/// \param[in] timer_id timer ID obtained by \ref osTimerCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue "time delay" value of the timer. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osTimerStart (osTimerId timer_id, uint32_t millisec); -#endif - -/// Stop a timer. -/// \param[in] timer_id timer ID obtained by \ref osTimerCreate. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osTimerStop (osTimerId timer_id); -#endif - -/// Delete a timer. -/// \param[in] timer_id timer ID obtained by \ref osTimerCreate. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osTimerDelete (osTimerId timer_id); -#endif - - -// ==== Mutex Management Functions ==== - -/// Define a Mutex. -/// \param name name of the mutex object. -/// \note CAN BE CHANGED: The parameter to \b osMutexDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osMutexDef(name) \ -extern const osMutexDef_t os_mutex_def_##name -#else // define the object -#if (osCMSIS < 0x20000U) -#define osMutexDef(name) \ -const osMutexDef_t os_mutex_def_##name = { 0 } -#else -#define osMutexDef(name) \ -const osMutexDef_t os_mutex_def_##name = \ -{ NULL, osMutexRecursive | osMutexPrioInherit | osMutexRobust, NULL, 0U } -#endif -#endif - -/// Access a Mutex definition. -/// \param name name of the mutex object. -/// \note CAN BE CHANGED: The parameter to \b osMutex shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osMutex(name) \ -&os_mutex_def_##name - -/// Create and Initialize a Mutex object. -/// \param[in] mutex_def mutex definition referenced with \ref osMutex. -/// \return mutex ID for reference by other functions or NULL in case of error. -osMutexId osMutexCreate (const osMutexDef_t *mutex_def); - -/// Wait until a Mutex becomes available. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osMutexWait (osMutexId mutex_id, uint32_t millisec); -#else -#define osMutexWait osMutexAcquire -#endif - -/// Release a Mutex that was obtained by \ref osMutexWait. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osMutexRelease (osMutexId mutex_id); -#endif - -/// Delete a Mutex object. -/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osMutexDelete (osMutexId mutex_id); -#endif - - -// ==== Semaphore Management Functions ==== - -#if (defined (osFeature_Semaphore) && (osFeature_Semaphore != 0U)) // Semaphore available - -/// Define a Semaphore object. -/// \param name name of the semaphore object. -/// \note CAN BE CHANGED: The parameter to \b osSemaphoreDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osSemaphoreDef(name) \ -extern const osSemaphoreDef_t os_semaphore_def_##name -#else // define the object -#if (osCMSIS < 0x20000U) -#define osSemaphoreDef(name) \ -const osSemaphoreDef_t os_semaphore_def_##name = { 0 } -#else -#define osSemaphoreDef(name) \ -const osSemaphoreDef_t os_semaphore_def_##name = \ -{ NULL, 0U, NULL, 0U } -#endif -#endif - -/// Access a Semaphore definition. -/// \param name name of the semaphore object. -/// \note CAN BE CHANGED: The parameter to \b osSemaphore shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osSemaphore(name) \ -&os_semaphore_def_##name - -/// Create and Initialize a Semaphore object. -/// \param[in] semaphore_def semaphore definition referenced with \ref osSemaphore. -/// \param[in] count maximum and initial number of available tokens. -/// \return semaphore ID for reference by other functions or NULL in case of error. -osSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count); - -/// Wait until a Semaphore token becomes available. -/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return number of available tokens, or -1 in case of incorrect parameters. -int32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec); - -/// Release a Semaphore token. -/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osSemaphoreRelease (osSemaphoreId semaphore_id); -#endif - -/// Delete a Semaphore object. -/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate. -/// \return status code that indicates the execution status of the function. -#if (osCMSIS < 0x20000U) -osStatus osSemaphoreDelete (osSemaphoreId semaphore_id); -#endif - -#endif // Semaphore available - - -// ==== Memory Pool Management Functions ==== - -#if (defined(osFeature_Pool) && (osFeature_Pool != 0)) // Memory Pool available - -/// \brief Define a Memory Pool. -/// \param name name of the memory pool. -/// \param no maximum number of blocks (objects) in the memory pool. -/// \param type data type of a single block (object). -/// \note CAN BE CHANGED: The parameter to \b osPoolDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osPoolDef(name, no, type) \ -extern const osPoolDef_t os_pool_def_##name -#else // define the object -#if (osCMSIS < 0x20000U) -#define osPoolDef(name, no, type) \ -const osPoolDef_t os_pool_def_##name = \ -{ (no), sizeof(type), NULL } -#else -#define osPoolDef(name, no, type) \ -const osPoolDef_t os_pool_def_##name = \ -{ (no), sizeof(type), { NULL, 0U, NULL, 0U, NULL, 0U } } -#endif -#endif - -/// \brief Access a Memory Pool definition. -/// \param name name of the memory pool -/// \note CAN BE CHANGED: The parameter to \b osPool shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osPool(name) \ -&os_pool_def_##name - -/// Create and Initialize a Memory Pool object. -/// \param[in] pool_def memory pool definition referenced with \ref osPool. -/// \return memory pool ID for reference by other functions or NULL in case of error. -osPoolId osPoolCreate (const osPoolDef_t *pool_def); - -/// Allocate a memory block from a Memory Pool. -/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate. -/// \return address of the allocated memory block or NULL in case of no memory available. -void *osPoolAlloc (osPoolId pool_id); - -/// Allocate a memory block from a Memory Pool and set memory block to zero. -/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate. -/// \return address of the allocated memory block or NULL in case of no memory available. -void *osPoolCAlloc (osPoolId pool_id); - -/// Return an allocated memory block back to a Memory Pool. -/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate. -/// \param[in] block address of the allocated memory block to be returned to the memory pool. -/// \return status code that indicates the execution status of the function. -osStatus osPoolFree (osPoolId pool_id, void *block); - -#endif // Memory Pool available - - -// ==== Message Queue Management Functions ==== - -#if (defined(osFeature_MessageQ) && (osFeature_MessageQ != 0)) // Message Queue available - -/// \brief Create a Message Queue Definition. -/// \param name name of the queue. -/// \param queue_sz maximum number of messages in the queue. -/// \param type data type of a single message element (for debugger). -/// \note CAN BE CHANGED: The parameter to \b osMessageQDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osMessageQDef(name, queue_sz, type) \ -extern const osMessageQDef_t os_messageQ_def_##name -#else // define the object -#if (osCMSIS < 0x20000U) -#define osMessageQDef(name, queue_sz, type) \ -const osMessageQDef_t os_messageQ_def_##name = \ -{ (queue_sz), NULL } -#else -#define osMessageQDef(name, queue_sz, type) \ -const osMessageQDef_t os_messageQ_def_##name = \ -{ (queue_sz), { NULL, 0U, NULL, 0U, NULL, 0U } } -#endif -#endif - -/// \brief Access a Message Queue Definition. -/// \param name name of the queue -/// \note CAN BE CHANGED: The parameter to \b osMessageQ shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osMessageQ(name) \ -&os_messageQ_def_##name - -/// Create and Initialize a Message Queue object. -/// \param[in] queue_def message queue definition referenced with \ref osMessageQ. -/// \param[in] thread_id thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL. -/// \return message queue ID for reference by other functions or NULL in case of error. -osMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id); - -/// Put a Message to a Queue. -/// \param[in] queue_id message queue ID obtained with \ref osMessageCreate. -/// \param[in] info message information. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return status code that indicates the execution status of the function. -osStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec); - -/// Get a Message from a Queue or timeout if Queue is empty. -/// \param[in] queue_id message queue ID obtained with \ref osMessageCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return event information that includes status code. -osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec); - -#endif // Message Queue available - - -// ==== Mail Queue Management Functions ==== - -#if (defined(osFeature_MailQ) && (osFeature_MailQ != 0)) // Mail Queue available - -/// \brief Create a Mail Queue Definition. -/// \param name name of the queue. -/// \param queue_sz maximum number of mails in the queue. -/// \param type data type of a single mail element. -/// \note CAN BE CHANGED: The parameter to \b osMailQDef shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#if defined (osObjectsExternal) // object is external -#define osMailQDef(name, queue_sz, type) \ -extern const osMailQDef_t os_mailQ_def_##name -#else // define the object -#if (osCMSIS < 0x20000U) -#define osMailQDef(name, queue_sz, type) \ -const osMailQDef_t os_mailQ_def_##name = \ -{ (queue_sz), sizeof(type), NULL } -#else -#define osMailQDef(name, queue_sz, type) \ -static void *os_mail_p_##name[2]; \ -const osMailQDef_t os_mailQ_def_##name = \ -{ (queue_sz), sizeof(type), (&os_mail_p_##name), \ - { NULL, 0U, NULL, 0U, NULL, 0U }, \ - { NULL, 0U, NULL, 0U, NULL, 0U } } -#endif -#endif - -/// \brief Access a Mail Queue Definition. -/// \param name name of the queue -/// \note CAN BE CHANGED: The parameter to \b osMailQ shall be consistent but the -/// macro body is implementation specific in every CMSIS-RTOS. -#define osMailQ(name) \ -&os_mailQ_def_##name - -/// Create and Initialize a Mail Queue object. -/// \param[in] queue_def mail queue definition referenced with \ref osMailQ. -/// \param[in] thread_id thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL. -/// \return mail queue ID for reference by other functions or NULL in case of error. -osMailQId osMailCreate (const osMailQDef_t *queue_def, osThreadId thread_id); - -/// Allocate a memory block for mail from a mail memory pool. -/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out -/// \return pointer to memory block that can be filled with mail or NULL in case of error. -void *osMailAlloc (osMailQId queue_id, uint32_t millisec); - -/// Allocate a memory block for mail from a mail memory pool and set memory block to zero. -/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out -/// \return pointer to memory block that can be filled with mail or NULL in case of error. -void *osMailCAlloc (osMailQId queue_id, uint32_t millisec); - -/// Put a Mail into a Queue. -/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate. -/// \param[in] mail pointer to memory with mail to put into a queue. -/// \return status code that indicates the execution status of the function. -osStatus osMailPut (osMailQId queue_id, const void *mail); - -/// Get a Mail from a Queue or timeout if Queue is empty. -/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate. -/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. -/// \return event information that includes status code. -osEvent osMailGet (osMailQId queue_id, uint32_t millisec); - -/// Free a memory block by returning it to a mail memory pool. -/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate. -/// \param[in] mail pointer to memory block that was obtained with \ref osMailGet. -/// \return status code that indicates the execution status of the function. -osStatus osMailFree (osMailQId queue_id, void *mail); - -#endif // Mail Queue available - - -#ifdef __cplusplus -} -#endif - -#endif // CMSIS_OS_H_ diff --git a/Drivers/CMSIS/RTOS2/Template/cmsis_os1.c b/Drivers/CMSIS/RTOS2/Template/cmsis_os1.c deleted file mode 100644 index effe4a1..0000000 --- a/Drivers/CMSIS/RTOS2/Template/cmsis_os1.c +++ /dev/null @@ -1,361 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * ---------------------------------------------------------------------- - * - * $Date: 10. January 2017 - * $Revision: V1.2 - * - * Project: CMSIS-RTOS API V1 - * Title: cmsis_os_v1.c V1 module file - *---------------------------------------------------------------------------*/ - -#include -#include "cmsis_os.h" - -#if (osCMSIS >= 0x20000U) - - -// Thread -osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument) { - - if (thread_def == NULL) { - return (osThreadId)NULL; - } - return osThreadNew((osThreadFunc_t)thread_def->pthread, argument, &thread_def->attr); -} - - -// Signals - -#define SignalMask ((1U< 0U) && (flags < 0x80000000U)) { - event.status = osEventSignal; - event.value.signals = (int32_t)flags; - } else { - switch ((int32_t)flags) { - case osErrorResource: - event.status = osOK; - break; - case osErrorTimeout: - event.status = osEventTimeout; - break; - case osErrorParameter: - event.status = osErrorValue; - break; - default: - event.status = (osStatus)flags; - break; - } - } - return event; -} - - -// Timer -osTimerId osTimerCreate (const osTimerDef_t *timer_def, os_timer_type type, void *argument) { - - if (timer_def == NULL) { - return (osTimerId)NULL; - } - return osTimerNew((osTimerFunc_t)timer_def->ptimer, type, argument, &timer_def->attr); -} - - -// Mutex -osMutexId osMutexCreate (const osMutexDef_t *mutex_def) { - - if (mutex_def == NULL) { - return (osMutexId)NULL; - } - return osMutexNew(mutex_def); -} - - -// Semaphore - -#if (defined (osFeature_Semaphore) && (osFeature_Semaphore != 0U)) - -osSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count) { - - if (semaphore_def == NULL) { - return (osSemaphoreId)NULL; - } - return osSemaphoreNew((uint32_t)count, (uint32_t)count, semaphore_def); -} - -int32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec) { - osStatus_t status; - uint32_t count; - - status = osSemaphoreAcquire(semaphore_id, millisec); - switch (status) { - case osOK: - count = osSemaphoreGetCount(semaphore_id); - return ((int32_t)count + 1); - case osErrorResource: - case osErrorTimeout: - return 0; - default: - break; - } - return -1; -} - -#endif // Semaphore - - -// Memory Pool - -#if (defined(osFeature_Pool) && (osFeature_Pool != 0)) - -osPoolId osPoolCreate (const osPoolDef_t *pool_def) { - - if (pool_def == NULL) { - return (osPoolId)NULL; - } - return ((osPoolId)(osMemoryPoolNew(pool_def->pool_sz, pool_def->item_sz, &pool_def->attr))); -} - -void *osPoolAlloc (osPoolId pool_id) { - return osMemoryPoolAlloc((osMemoryPoolId_t)pool_id, 0U); -} - -void *osPoolCAlloc (osPoolId pool_id) { - void *block; - uint32_t block_size; - - block_size = osMemoryPoolGetBlockSize((osMemoryPoolId_t)pool_id); - if (block_size == 0U) { - return NULL; - } - block = osMemoryPoolAlloc((osMemoryPoolId_t)pool_id, 0U); - if (block != NULL) { - memset(block, 0, block_size); - } - return block; -} - -osStatus osPoolFree (osPoolId pool_id, void *block) { - return osMemoryPoolFree((osMemoryPoolId_t)pool_id, block); -} - -#endif // Memory Pool - - -// Message Queue - -#if (defined(osFeature_MessageQ) && (osFeature_MessageQ != 0)) - -osMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id) { - (void)thread_id; - - if (queue_def == NULL) { - return (osMessageQId)NULL; - } - return ((osMessageQId)(osMessageQueueNew(queue_def->queue_sz, sizeof(uint32_t), &queue_def->attr))); -} - -osStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec) { - return osMessageQueuePut((osMessageQueueId_t)queue_id, &info, 0U, millisec); -} - -osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec) { - osStatus_t status; - osEvent event; - uint32_t message; - - status = osMessageQueueGet((osMessageQueueId_t)queue_id, &message, NULL, millisec); - switch (status) { - case osOK: - event.status = osEventMessage; - event.value.v = message; - break; - case osErrorResource: - event.status = osOK; - break; - case osErrorTimeout: - event.status = osEventTimeout; - break; - default: - event.status = status; - break; - } - return event; -} - -#endif // Message Queue - - -// Mail Queue - -#if (defined(osFeature_MailQ) && (osFeature_MailQ != 0)) - -typedef struct os_mail_queue_s { - osMemoryPoolId_t mp_id; - osMessageQueueId_t mq_id; -} os_mail_queue_t; - -osMailQId osMailCreate (const osMailQDef_t *queue_def, osThreadId thread_id) { - os_mail_queue_t *ptr; - (void)thread_id; - - if (queue_def == NULL) { - return (osMailQId)NULL; - } - - ptr = queue_def->mail; - if (ptr == NULL) { - return (osMailQId)NULL; - } - - ptr->mp_id = osMemoryPoolNew (queue_def->queue_sz, queue_def->item_sz, &queue_def->mp_attr); - ptr->mq_id = osMessageQueueNew(queue_def->queue_sz, sizeof(void *), &queue_def->mq_attr); - if ((ptr->mp_id == (osMemoryPoolId_t)NULL) || (ptr->mq_id == (osMessageQueueId_t)NULL)) { - if (ptr->mp_id != (osMemoryPoolId_t)NULL) { - osMemoryPoolDelete(ptr->mp_id); - } - if (ptr->mq_id != (osMessageQueueId_t)NULL) { - osMessageQueueDelete(ptr->mq_id); - } - return (osMailQId)NULL; - } - - return (osMailQId)ptr; -} - -void *osMailAlloc (osMailQId queue_id, uint32_t millisec) { - os_mail_queue_t *ptr = (os_mail_queue_t *)queue_id; - - if (ptr == NULL) { - return NULL; - } - return osMemoryPoolAlloc(ptr->mp_id, millisec); -} - -void *osMailCAlloc (osMailQId queue_id, uint32_t millisec) { - os_mail_queue_t *ptr = (os_mail_queue_t *)queue_id; - void *block; - uint32_t block_size; - - if (ptr == NULL) { - return NULL; - } - block_size = osMemoryPoolGetBlockSize(ptr->mp_id); - if (block_size == 0U) { - return NULL; - } - block = osMemoryPoolAlloc(ptr->mp_id, millisec); - if (block != NULL) { - memset(block, 0, block_size); - } - - return block; - -} - -osStatus osMailPut (osMailQId queue_id, const void *mail) { - os_mail_queue_t *ptr = (os_mail_queue_t *)queue_id; - - if (ptr == NULL) { - return osErrorParameter; - } - if (mail == NULL) { - return osErrorValue; - } - return osMessageQueuePut(ptr->mq_id, &mail, 0U, 0U); -} - -osEvent osMailGet (osMailQId queue_id, uint32_t millisec) { - os_mail_queue_t *ptr = (os_mail_queue_t *)queue_id; - osStatus_t status; - osEvent event; - void *mail; - - if (ptr == NULL) { - event.status = osErrorParameter; - return event; - } - - status = osMessageQueueGet(ptr->mq_id, &mail, NULL, millisec); - switch (status) { - case osOK: - event.status = osEventMail; - event.value.p = mail; - break; - case osErrorResource: - event.status = osOK; - break; - case osErrorTimeout: - event.status = osEventTimeout; - break; - default: - event.status = status; - break; - } - return event; -} - -osStatus osMailFree (osMailQId queue_id, void *mail) { - os_mail_queue_t *ptr = (os_mail_queue_t *)queue_id; - - if (ptr == NULL) { - return osErrorParameter; - } - if (mail == NULL) { - return osErrorValue; - } - return osMemoryPoolFree(ptr->mp_id, mail); -} - -#endif // Mail Queue - - -#endif // osCMSIS diff --git a/MSB-FW.ioc b/MSB-FW.ioc index 9bead6b..2782abb 100644 --- a/MSB-FW.ioc +++ b/MSB-FW.ioc @@ -264,3 +264,4 @@ VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick board=custom +rtos.0.ip=FREERTOS diff --git a/Makefile b/Makefile index 294f416..336372f 100644 --- a/Makefile +++ b/Makefile @@ -1,5 +1,5 @@ ########################################################################################################################## -# File automatically-generated by tool: [projectgenerator] version: [4.3.0-B58] date: [Thu May 23 22:03:07 GMT 2024] +# File automatically-generated by tool: [projectgenerator] version: [4.3.0-B58] date: [Thu May 23 22:09:20 GMT 2024] ########################################################################################################################## # ------------------------------------------------